source_filename = "llpc_compute_8"
target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7:8"
target triple = "amdgcn--amdpal"

%llpc.matrix.column = type <{ [3 x float] }>

; Function Attrs: nounwind memory(readwrite)
define amdgpu_cs void @_amdgpu_cs_main(i32 inreg noundef %userdata5, i32 inreg noundef %userdata6, i32 inreg noundef %userdata7, i32 inreg noundef %userdata8, i32 inreg noundef %userdata9, i32 %0, float %1, ptr addrspace(1) %2, ptr addrspace(1) %3, i64 %4, ptr addrspace(1) %5, ptr addrspace(1) %.i21175) #0 {
.entry:
  %6 = insertelement <2 x i32> zeroinitializer, i32 %userdata5, i64 1
  %7 = bitcast <2 x i32> %6 to i64
  %8 = inttoptr i64 %7 to ptr addrspace(1)
  %9 = icmp eq i32 %0, 0
  %10 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 0, i32 0, i64 3
  %.ii0524 = load float, ptr addrspace(1) %10, align 16
  %.fr2283.i0 = freeze float %.ii0524
  br i1 poison, label %.exit23, label %.exit26

.exit23:                                          ; preds = %.entry
  br label %.exit26

.exit26:                                          ; preds = %.exit23, %.entry
  %cond.freeze1.i18 = phi i1 [ false, %.entry ], [ true, %.exit23 ]
  %11 = fcmp olt float %1, 1.000000e+00
  %12 = and i1 %11, %cond.freeze1.i18
  %13 = call reassoc nsz arcp contract afn float @llvm.fabs.f32(float %.fr2283.i0)
  %14 = fcmp olt float %13, 1.000000e+00
  %15 = and i1 %14, %12
  %16 = and i1 %9, %15
  %17 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 0, i32 1, i64 0, i32 0
  %.ii0540 = load i32, ptr addrspace(1) %17, align 16
  %.i1541 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 0, i32 1, i64 0, i32 0, i64 1
  %.ii1542 = load i32, ptr addrspace(1) %.i1541, align 4
  %.i2543 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 0, i32 1, i64 0, i32 0, i64 2
  %.ii2544 = load i32, ptr addrspace(1) %.i2543, align 8
  %.u0545 = insertelement <3 x i32> zeroinitializer, i32 %.ii0540, i64 0
  %.u1546 = insertelement <3 x i32> %.u0545, i32 %.ii1542, i64 1
  %18 = insertelement <3 x i32> %.u1546, i32 %.ii2544, i64 2
  %19 = icmp eq <3 x i32> %18, zeroinitializer
  %20 = extractelement <3 x i1> %19, i64 0
  %21 = extractelement <3 x i1> %19, i64 1
  %22 = and i1 %20, %21
  %23 = extractelement <3 x i1> %19, i64 2
  %24 = and i1 %23, %22
  %25 = and i1 %24, %16
  %26 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 0, i32 1, i64 0, i32 1, i64 0
  %.ii0548 = load float, ptr addrspace(1) %26, align 8
  %.i1549 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 0, i32 1, i64 0, i32 1, i64 0, i64 1
  %.ii1550 = load float, ptr addrspace(1) %.i1549, align 4
  %.fr2286.i0 = freeze float %.ii0548
  %.fr2286.i1 = freeze float %.ii1550
  %27 = call reassoc nsz arcp contract afn float @llvm.fabs.f32(float %.fr2286.i0)
  %28 = fcmp olt float %27, 1.000000e+00
  %29 = call reassoc nnan nsz arcp contract afn float @llvm.fabs.f32(float %.fr2286.i1)
  %30 = fcmp olt float %29, 1.000000e+00
  %31 = select i1 %28, i1 %30, i1 false
  %32 = and i1 %25, %31
  %33 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 0, i32 1, i64 0, i32 1, i64 1
  %.ii0554 = load float, ptr addrspace(1) %33, align 8
  %.i1555 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 0, i32 1, i64 0, i32 1, i64 1, i64 1
  %.ii1556 = load float, ptr addrspace(1) %.i1555, align 4
  %.fr2289.i0 = freeze float %.ii0554
  %.fr2289.i1 = freeze float %.ii1556
  %34 = call reassoc nsz arcp contract afn float @llvm.fabs.f32(float %.fr2289.i0)
  %35 = fcmp olt float %34, 1.000000e+00
  %36 = call reassoc nnan nsz arcp contract afn float @llvm.fabs.f32(float %.fr2289.i1)
  %37 = fcmp olt float %36, 1.000000e+00
  %38 = select i1 %35, i1 %37, i1 false
  %39 = and i1 %38, %32
  %.ii0560 = load float, ptr addrspace(1) %2, align 8
  %.i1561 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 0, i32 1, i64 0, i32 1, i64 2, i64 1
  %.ii1562 = load float, ptr addrspace(1) %.i1561, align 4
  %.fr2292.i0 = freeze float %.ii0560
  %.fr2292.i1 = freeze float %.ii1562
  %40 = call reassoc nsz arcp contract afn float @llvm.fabs.f32(float %.fr2292.i0)
  %41 = fcmp olt float %40, 1.000000e+00
  %42 = call reassoc nnan nsz arcp contract afn float @llvm.fabs.f32(float %.fr2292.i1)
  %43 = fcmp olt float %42, 1.000000e+00
  %44 = select i1 %41, i1 %43, i1 false
  %45 = and i1 %44, %39
  %46 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 0, i32 1, i64 0, i32 1, i64 3
  %.ii0566 = load float, ptr addrspace(1) %46, align 8
  %.i1567 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 0, i32 1, i64 0, i32 1, i64 3, i64 1
  %.ii1568 = load float, ptr addrspace(1) %.i1567, align 4
  %.fr2295.i0 = freeze float %.ii0566
  %.fr2295.i1 = freeze float %.ii1568
  %47 = call reassoc nsz arcp contract afn float @llvm.fabs.f32(float %.fr2295.i0)
  %48 = fcmp olt float %47, 1.000000e+00
  %49 = call reassoc nnan nsz arcp contract afn float @llvm.fabs.f32(float %.fr2295.i1)
  %50 = fcmp olt float %49, 1.000000e+00
  %51 = select i1 %48, i1 %50, i1 false
  %52 = and i1 %51, %45
  %53 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 0, i32 1, i64 0, i32 2
  %54 = load <4 x float>, ptr addrspace(1) %53, align 16
  %.fr = freeze <4 x float> %54
  %.i1241 = extractelement <4 x float> %.fr, i64 1
  %55 = call reassoc nsz arcp contract afn float @llvm.fabs.f32(float %.i1241)
  %56 = fcmp olt float %55, 1.000000e+00
  %57 = and i1 %52, %56
  %58 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 0, i32 1, i64 1, i32 0
  %.ii0572 = load i32, ptr addrspace(1) %58, align 16
  %.ii1574 = load i32, ptr addrspace(1) null, align 4
  %.i2575 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 0, i32 1, i64 1, i32 0, i64 2
  %.ii2576 = load i32, ptr addrspace(1) %.i2575, align 8
  %.u0577 = insertelement <3 x i32> zeroinitializer, i32 %.ii0572, i64 0
  %.u1578 = insertelement <3 x i32> %.u0577, i32 %.ii1574, i64 1
  %59 = insertelement <3 x i32> %.u1578, i32 %.ii2576, i64 2
  %60 = icmp eq <3 x i32> %59, zeroinitializer
  %61 = extractelement <3 x i1> %60, i64 0
  %62 = extractelement <3 x i1> %60, i64 1
  %63 = and i1 %61, %62
  %64 = extractelement <3 x i1> %60, i64 2
  %65 = and i1 %64, %63
  %66 = and i1 %65, %57
  %67 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 0, i32 1, i64 1, i32 1, i64 0
  %.ii0580 = load float, ptr addrspace(1) %67, align 8
  %.i1581 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 0, i32 1, i64 1, i32 1, i64 0, i64 1
  %.ii1582 = load float, ptr addrspace(1) %.i1581, align 4
  %.fr2301.i0 = freeze float %.ii0580
  %.fr2301.i1 = freeze float %.ii1582
  %68 = call reassoc nsz arcp contract afn float @llvm.fabs.f32(float %.fr2301.i0)
  %69 = fcmp olt float %68, 1.000000e+00
  %70 = fadd reassoc nnan nsz arcp contract afn float %.fr2301.i1, 1.000000e+00
  %71 = call reassoc nnan nsz arcp contract afn float @llvm.fabs.f32(float %70)
  %72 = fcmp olt float %71, 1.000000e+00
  %73 = select i1 %69, i1 %72, i1 false
  %74 = and i1 %73, %66
  %75 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 0, i32 1, i64 1, i32 1, i64 1
  %.ii0586 = load float, ptr addrspace(1) %75, align 8
  %.i1587 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 0, i32 1, i64 1, i32 1, i64 1, i64 1
  %.ii1588 = load float, ptr addrspace(1) %.i1587, align 4
  %.fr2304.i0 = freeze float %.ii0586
  %.fr2304.i1 = freeze float %.ii1588
  %76 = fadd reassoc nsz arcp contract afn float %.fr2304.i0, 1.000000e+00
  %77 = call reassoc nsz arcp contract afn float @llvm.fabs.f32(float %76)
  %78 = fcmp olt float %77, 1.000000e+00
  %79 = call reassoc nnan nsz arcp contract afn float @llvm.fabs.f32(float %.fr2304.i1)
  %80 = fcmp olt float %79, 1.000000e+00
  %81 = select i1 %78, i1 %80, i1 false
  %82 = and i1 %81, %74
  %83 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 0, i32 1, i64 1, i32 1, i64 2
  %.ii0592 = load float, ptr addrspace(1) %83, align 8
  %.i1593 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 0, i32 1, i64 1, i32 1, i64 2, i64 1
  %.ii1594 = load float, ptr addrspace(1) %.i1593, align 4
  %.fr2307.i0 = freeze float %.ii0592
  %.fr2307.i1 = freeze float %.ii1594
  %84 = call reassoc nsz arcp contract afn float @llvm.fabs.f32(float %.fr2307.i0)
  %85 = fcmp olt float %84, 1.000000e+00
  %86 = fadd reassoc nnan nsz arcp contract afn float %.fr2307.i1, 1.000000e+00
  %87 = call reassoc nnan nsz arcp contract afn float @llvm.fabs.f32(float %86)
  %88 = fcmp olt float %87, 1.000000e+00
  %89 = select i1 %85, i1 %88, i1 false
  %90 = and i1 %89, %82
  %.i1599 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 0, i32 1, i64 1, i32 1, i64 3, i64 1
  %.ii1600 = load float, ptr addrspace(1) %.i1599, align 4
  %.fr2310.i1 = freeze float %.ii1600
  %91 = fadd reassoc nnan nsz arcp contract afn float %.fr2310.i1, 1.000000e+00
  %92 = call reassoc nnan nsz arcp contract afn float @llvm.fabs.f32(float %91)
  %93 = fcmp olt float %92, 1.000000e+00
  %94 = and i1 %93, %90
  %95 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 0, i32 1, i64 1, i32 2
  %96 = load <4 x float>, ptr addrspace(1) %95, align 16
  %.fr1275 = freeze <4 x float> %96
  %.i2253 = extractelement <4 x float> %.fr1275, i64 1
  %97 = call reassoc nsz arcp contract afn float @llvm.fabs.f32(float %.i2253)
  %98 = fcmp olt float %97, 1.000000e+00
  %99 = and i1 %98, %94
  %100 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 0, i32 1, i64 2, i32 0
  %.ii0604 = load i32, ptr addrspace(1) %100, align 16
  %.i1605 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 0, i32 1, i64 2, i32 0, i64 1
  %.ii1606 = load i32, ptr addrspace(1) %.i1605, align 4
  %.i2607 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 0, i32 1, i64 2, i32 0, i64 2
  %.ii2608 = load i32, ptr addrspace(1) %.i2607, align 8
  %.u0609 = insertelement <3 x i32> zeroinitializer, i32 %.ii0604, i64 0
  %.u1610 = insertelement <3 x i32> %.u0609, i32 %.ii1606, i64 1
  %101 = insertelement <3 x i32> %.u1610, i32 %.ii2608, i64 2
  %102 = icmp eq <3 x i32> %101, zeroinitializer
  %103 = extractelement <3 x i1> %102, i64 0
  %104 = extractelement <3 x i1> %102, i64 1
  %105 = and i1 %103, %104
  %106 = extractelement <3 x i1> %102, i64 2
  %107 = and i1 %106, %105
  %108 = and i1 %107, %99
  br i1 poison, label %.exit38, label %.exit16

.exit38:                                          ; preds = %.exit26
  br label %.exit16

.exit16:                                          ; preds = %.exit38, %.exit26
  %109 = phi i1 [ false, %.exit26 ], [ true, %.exit38 ]
  %110 = and i1 %108, %109
  %111 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 1, i32 1, i64 0, i32 0
  %.ii0668 = load i32, ptr addrspace(1) %111, align 16
  %.i1669 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 1, i32 1, i64 0, i32 0, i64 1
  %.ii1670 = load i32, ptr addrspace(1) %.i1669, align 4
  %.i2671 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 1, i32 1, i64 0, i32 0, i64 2
  %.ii2672 = load i32, ptr addrspace(1) %.i2671, align 8
  %.u0673 = insertelement <3 x i32> zeroinitializer, i32 %.ii0668, i64 0
  %.u1674 = insertelement <3 x i32> %.u0673, i32 %.ii1670, i64 1
  %112 = insertelement <3 x i32> %.u1674, i32 %.ii2672, i64 2
  %113 = icmp eq <3 x i32> %112, zeroinitializer
  %114 = extractelement <3 x i1> %113, i64 0
  %115 = extractelement <3 x i1> %113, i64 1
  %116 = and i1 %114, %115
  %117 = extractelement <3 x i1> %113, i64 2
  %118 = and i1 %117, %116
  %119 = and i1 %110, %118
  %120 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 1, i32 1, i64 0, i32 1, i64 0
  %.ii0676 = load float, ptr addrspace(1) %120, align 8
  %.i1677 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 1, i32 1, i64 0, i32 1, i64 0, i64 1
  %.ii1678 = load float, ptr addrspace(1) %.i1677, align 4
  %.fr2342.i0 = freeze float %.ii0676
  %.fr2342.i1 = freeze float %.ii1678
  %121 = call reassoc nsz arcp contract afn float @llvm.fabs.f32(float %.fr2342.i0)
  %122 = fcmp olt float %121, 1.000000e+00
  %123 = call reassoc nnan nsz arcp contract afn float @llvm.fabs.f32(float %.fr2342.i1)
  %124 = fcmp olt float %123, 1.000000e+00
  %125 = select i1 %122, i1 %124, i1 false
  %126 = and i1 %119, %125
  %127 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 1, i32 1, i64 0, i32 1, i64 1
  %.ii0682 = load float, ptr addrspace(1) %127, align 8
  %.i1683 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 1, i32 1, i64 0, i32 1, i64 1, i64 1
  %.ii1684 = load float, ptr addrspace(1) %.i1683, align 4
  %.fr2345.i0 = freeze float %.ii0682
  %.fr2345.i1 = freeze float %.ii1684
  %128 = call reassoc nsz arcp contract afn float @llvm.fabs.f32(float %.fr2345.i0)
  %129 = fcmp olt float %128, 1.000000e+00
  %130 = call reassoc nnan nsz arcp contract afn float @llvm.fabs.f32(float %.fr2345.i1)
  %131 = fcmp olt float %130, 1.000000e+00
  %132 = select i1 %129, i1 %131, i1 false
  %133 = and i1 %132, %126
  %.ii0688 = load float, ptr addrspace(1) poison, align 8
  %.i1689 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 1, i32 1, i64 0, i32 1, i64 2, i64 1
  %.ii1690 = load float, ptr addrspace(1) %.i1689, align 4
  %.fr2348.i0 = freeze float %.ii0688
  %.fr2348.i1 = freeze float %.ii1690
  %134 = call reassoc nsz arcp contract afn float @llvm.fabs.f32(float %.fr2348.i0)
  %135 = fcmp olt float %134, 1.000000e+00
  %136 = call reassoc nnan nsz arcp contract afn float @llvm.fabs.f32(float %.fr2348.i1)
  %137 = fcmp olt float %136, 1.000000e+00
  %138 = select i1 %135, i1 %137, i1 false
  %139 = and i1 %138, %133
  %140 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 1, i32 1, i64 0, i32 1, i64 3
  %.ii0694 = load float, ptr addrspace(1) %140, align 8
  %.i1695 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 1, i32 1, i64 0, i32 1, i64 3, i64 1
  %.ii1696 = load float, ptr addrspace(1) %.i1695, align 4
  %.fr2351.i0 = freeze float %.ii0694
  %.fr2351.i1 = freeze float %.ii1696
  %141 = call reassoc nsz arcp contract afn float @llvm.fabs.f32(float %.fr2351.i0)
  %142 = fcmp olt float %141, 1.000000e+00
  %143 = call reassoc nnan nsz arcp contract afn float @llvm.fabs.f32(float %.fr2351.i1)
  %144 = fcmp olt float %143, 1.000000e+00
  %145 = select i1 %142, i1 %144, i1 false
  %146 = and i1 %145, %139
  %147 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 1, i32 1, i64 0, i32 2
  %148 = load <4 x float>, ptr addrspace(1) %147, align 16
  %.fr1277 = freeze <4 x float> %148
  %.i1288 = extractelement <4 x float> %.fr1277, i64 1
  %149 = call reassoc nsz arcp contract afn float @llvm.fabs.f32(float %.i1288)
  %150 = fcmp olt float %149, 1.000000e+00
  %151 = and i1 %146, %150
  %152 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 1, i32 1, i64 1, i32 0
  %.ii0700 = load i32, ptr addrspace(1) %152, align 16
  %.u0705 = insertelement <3 x i32> zeroinitializer, i32 %.ii0700, i64 0
  %.u1706 = insertelement <3 x i32> %.u0705, i32 0, i64 1
  %153 = insertelement <3 x i32> %.u1706, i32 0, i64 1
  %154 = icmp eq <3 x i32> %153, zeroinitializer
  %155 = extractelement <3 x i1> %154, i64 0
  %156 = and i1 %155, %151
  %157 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 1, i32 1, i64 1, i32 1, i64 2
  %.ii0720 = load float, ptr addrspace(1) %157, align 8
  %.i1721 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 1, i32 1, i64 1, i32 1, i64 2, i64 1
  %.ii1722 = load float, ptr addrspace(1) %.i1721, align 4
  %.fr2363.i0 = freeze float %.ii0720
  %.fr2363.i1 = freeze float %.ii1722
  %158 = call reassoc nsz arcp contract afn float @llvm.fabs.f32(float %.fr2363.i0)
  %159 = fcmp olt float %158, 1.000000e+00
  %160 = call reassoc nnan nsz arcp contract afn float @llvm.fabs.f32(float %.fr2363.i1)
  %161 = fcmp olt float %160, 1.000000e+00
  %162 = select i1 %159, i1 %161, i1 false
  %163 = and i1 %162, %156
  %164 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 1, i32 1, i64 1, i32 1, i64 3
  %.ii0726 = load float, ptr addrspace(1) %164, align 8
  %.i1727 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 1, i32 1, i64 1, i32 1, i64 3, i64 1
  %.ii1728 = load float, ptr addrspace(1) %.i1727, align 4
  %.fr2366.i0 = freeze float %.ii0726
  %.fr2366.i1 = freeze float %.ii1728
  %165 = call reassoc nsz arcp contract afn float @llvm.fabs.f32(float %.fr2366.i0)
  %166 = fcmp olt float %165, 1.000000e+00
  %167 = call reassoc nnan nsz arcp contract afn float @llvm.fabs.f32(float %.fr2366.i1)
  %168 = fcmp olt float %167, 1.000000e+00
  %169 = select i1 %166, i1 %168, i1 false
  %170 = and i1 %169, %163
  %171 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 1, i32 1, i64 1, i32 2
  %172 = load <4 x float>, ptr addrspace(1) %171, align 16
  %.fr1278 = freeze <4 x float> %172
  %.i0299 = extractelement <4 x float> %.fr1278, i64 0
  %.i2301 = extractelement <4 x float> %.fr1278, i64 2
  %173 = call reassoc nsz arcp contract afn float @llvm.fabs.f32(float %.i0299)
  %174 = fcmp olt float %173, 1.000000e+00
  %175 = call reassoc nsz arcp contract afn float @llvm.fabs.f32(float %.i2301)
  %176 = fcmp olt float %175, 1.000000e+00
  %177 = and i1 %176, %174
  %178 = and i1 %177, %170
  %179 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 1, i32 1, i64 2, i32 0
  %.ii0732 = load i32, ptr addrspace(1) %179, align 16
  %.i1733 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 1, i32 1, i64 2, i32 0, i64 1
  %.ii1734 = load i32, ptr addrspace(1) %.i1733, align 4
  %.i2735 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 1, i32 1, i64 2, i32 0, i64 2
  %.ii2736 = load i32, ptr addrspace(1) %.i2735, align 8
  %.u0737 = insertelement <3 x i32> zeroinitializer, i32 %.ii0732, i64 0
  %.u1738 = insertelement <3 x i32> %.u0737, i32 %.ii1734, i64 1
  %180 = insertelement <3 x i32> %.u1738, i32 %.ii2736, i64 2
  %181 = icmp eq <3 x i32> %180, zeroinitializer
  %182 = extractelement <3 x i1> %181, i64 0
  %183 = extractelement <3 x i1> %181, i64 1
  %184 = and i1 %182, %183
  %185 = extractelement <3 x i1> %181, i64 2
  %186 = and i1 %185, %184
  %187 = and i1 %186, %178
  %188 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 1, i32 1, i64 2, i32 1, i64 0
  %.ii0740 = load float, ptr addrspace(1) %188, align 8
  %.i1741 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 1, i32 1, i64 2, i32 1, i64 0, i64 1
  %.ii1742 = load float, ptr addrspace(1) %.i1741, align 4
  %.fr2372.i0 = freeze float %.ii0740
  %.fr2372.i1 = freeze float %.ii1742
  %189 = call reassoc nsz arcp contract afn float @llvm.fabs.f32(float %.fr2372.i0)
  %190 = fcmp olt float %189, 1.000000e+00
  %191 = call reassoc nnan nsz arcp contract afn float @llvm.fabs.f32(float %.fr2372.i1)
  %192 = fcmp olt float %191, 1.000000e+00
  %193 = select i1 %190, i1 %192, i1 false
  %194 = and i1 %193, %187
  %195 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 1, i32 1, i64 2, i32 1, i64 1
  %.ii0746 = load float, ptr addrspace(1) %195, align 8
  %.i1747 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 1, i32 1, i64 2, i32 1, i64 1, i64 1
  %.ii1748 = load float, ptr addrspace(1) %.i1747, align 4
  %.fr2375.i0 = freeze float %.ii0746
  %.fr2375.i1 = freeze float %.ii1748
  %196 = call reassoc nsz arcp contract afn float @llvm.fabs.f32(float %.fr2375.i0)
  %197 = fcmp olt float %196, 1.000000e+00
  %198 = call reassoc nnan nsz arcp contract afn float @llvm.fabs.f32(float %.fr2375.i1)
  %199 = fcmp olt float %198, 1.000000e+00
  %200 = select i1 %197, i1 %199, i1 false
  %201 = and i1 %200, %194
  %202 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 1, i32 1, i64 2, i32 1, i64 2
  %.ii0752 = load float, ptr addrspace(1) %202, align 8
  %.fr2378.i0 = freeze float %.ii0752
  %203 = call reassoc nsz arcp contract afn float @llvm.fabs.f32(float %.fr2378.i0)
  %204 = fcmp olt float %203, 1.000000e+00
  %205 = and i1 %204, %201
  %206 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 2, i32 1, i64 0, i32 0
  %.ii0796 = load i32, ptr addrspace(1) %206, align 16
  %.i1797 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 2, i32 1, i64 0, i32 0, i64 1
  %.ii1798 = load i32, ptr addrspace(1) %.i1797, align 4
  %.i2799 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 2, i32 1, i64 0, i32 0, i64 2
  %.ii2800 = load i32, ptr addrspace(1) %.i2799, align 8
  %.u0801 = insertelement <3 x i32> zeroinitializer, i32 %.ii0796, i64 0
  %.u1802 = insertelement <3 x i32> %.u0801, i32 %.ii1798, i64 1
  %207 = insertelement <3 x i32> %.u1802, i32 %.ii2800, i64 2
  %208 = icmp eq <3 x i32> %207, zeroinitializer
  %209 = extractelement <3 x i1> %208, i64 0
  %210 = extractelement <3 x i1> %208, i64 1
  %211 = and i1 %209, %210
  %212 = extractelement <3 x i1> %208, i64 2
  %213 = and i1 %212, %211
  %214 = and i1 %205, %213
  %215 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 2, i32 1, i64 0, i32 1, i64 0
  %.ii0804 = load float, ptr addrspace(1) %215, align 8
  %.i1805 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 2, i32 1, i64 0, i32 1, i64 0, i64 1
  %.ii1806 = load float, ptr addrspace(1) %.i1805, align 4
  %.fr2398.i0 = freeze float %.ii0804
  %.fr2398.i1 = freeze float %.ii1806
  %216 = call reassoc nsz arcp contract afn float @llvm.fabs.f32(float %.fr2398.i0)
  %217 = fcmp olt float %216, 1.000000e+00
  %218 = call reassoc nnan nsz arcp contract afn float @llvm.fabs.f32(float %.fr2398.i1)
  %219 = fcmp olt float %218, 1.000000e+00
  %220 = select i1 %217, i1 %219, i1 false
  %221 = and i1 %214, %220
  %222 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 2, i32 1, i64 0, i32 1, i64 1
  %.ii0810 = load float, ptr addrspace(1) %222, align 8
  %.i1811 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 2, i32 1, i64 0, i32 1, i64 1, i64 1
  %.ii1812 = load float, ptr addrspace(1) %.i1811, align 4
  %.fr2401.i0 = freeze float %.ii0810
  %.fr2401.i1 = freeze float %.ii1812
  %223 = call reassoc nsz arcp contract afn float @llvm.fabs.f32(float %.fr2401.i0)
  %224 = fcmp olt float %223, 1.000000e+00
  %225 = call reassoc nnan nsz arcp contract afn float @llvm.fabs.f32(float %.fr2401.i1)
  %226 = fcmp olt float %225, 1.000000e+00
  %227 = select i1 %224, i1 %226, i1 false
  %228 = and i1 %227, %221
  %229 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 2, i32 1, i64 0, i32 1, i64 2
  %.ii0816 = load float, ptr addrspace(1) %229, align 8
  %.i1817 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 2, i32 1, i64 0, i32 1, i64 2, i64 1
  %.ii1818 = load float, ptr addrspace(1) %.i1817, align 4
  %.fr2404.i0 = freeze float %.ii0816
  %.fr2404.i1 = freeze float %.ii1818
  %230 = call reassoc nsz arcp contract afn float @llvm.fabs.f32(float %.fr2404.i0)
  %231 = fcmp olt float %230, 1.000000e+00
  %232 = call reassoc nnan nsz arcp contract afn float @llvm.fabs.f32(float %.fr2404.i1)
  %233 = fcmp olt float %232, 1.000000e+00
  %234 = select i1 %231, i1 %233, i1 false
  %235 = and i1 %234, %228
  %236 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 2, i32 1, i64 0, i32 1, i64 3
  %.ii0822 = load float, ptr addrspace(1) %236, align 8
  %.i1823 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 2, i32 1, i64 0, i32 1, i64 3, i64 1
  %.ii1824 = load float, ptr addrspace(1) %.i1823, align 4
  %.fr2407.i0 = freeze float %.ii0822
  %.fr2407.i1 = freeze float %.ii1824
  %237 = call reassoc nsz arcp contract afn float @llvm.fabs.f32(float %.fr2407.i0)
  %238 = fcmp olt float %237, 1.000000e+00
  %239 = call reassoc nnan nsz arcp contract afn float @llvm.fabs.f32(float %.fr2407.i1)
  %240 = fcmp olt float %239, 1.000000e+00
  %241 = select i1 %238, i1 %240, i1 false
  %242 = and i1 %241, %235
  %243 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 2, i32 1, i64 0, i32 2
  %244 = load <4 x float>, ptr addrspace(1) %243, align 16
  %.fr1280 = freeze <4 x float> %244
  %.i1336 = extractelement <4 x float> %.fr1280, i64 1
  %245 = call reassoc nsz arcp contract afn float @llvm.fabs.f32(float %.i1336)
  %246 = fcmp olt float %245, 1.000000e+00
  %247 = and i1 %242, %246
  %248 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 2, i32 1, i64 1, i32 0
  %.ii0828 = load i32, ptr addrspace(1) %248, align 16
  %.i2831 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 2, i32 1, i64 1, i32 0, i64 2
  %.ii2832 = load i32, ptr addrspace(1) %.i2831, align 8
  %.u0833 = insertelement <3 x i32> zeroinitializer, i32 %.ii0828, i64 0
  %.u1834 = insertelement <3 x i32> %.u0833, i32 0, i64 1
  %249 = insertelement <3 x i32> %.u1834, i32 %.ii2832, i64 2
  %250 = icmp eq <3 x i32> %249, zeroinitializer
  %251 = extractelement <3 x i1> %250, i64 0
  %252 = extractelement <3 x i1> %250, i64 2
  %253 = and i1 %252, %251
  %254 = and i1 %253, %247
  %255 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 2, i32 1, i64 1, i32 1, i64 0
  %.ii0836 = load float, ptr addrspace(1) %255, align 8
  %.i1837 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 2, i32 1, i64 1, i32 1, i64 0, i64 1
  %.ii1838 = load float, ptr addrspace(1) %.i1837, align 4
  %.fr2413.i0 = freeze float %.ii0836
  %.fr2413.i1 = freeze float %.ii1838
  %256 = call reassoc nsz arcp contract afn float @llvm.fabs.f32(float %.fr2413.i0)
  %257 = fcmp olt float %256, 1.000000e+00
  %258 = call reassoc nnan nsz arcp contract afn float @llvm.fabs.f32(float %.fr2413.i1)
  %259 = fcmp olt float %258, 1.000000e+00
  %260 = select i1 %257, i1 %259, i1 false
  %261 = and i1 %260, %254
  %262 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 2, i32 1, i64 1, i32 1, i64 1
  %.ii0842 = load float, ptr addrspace(1) %262, align 8
  %.i1843 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 2, i32 1, i64 1, i32 1, i64 1, i64 1
  %.ii1844 = load float, ptr addrspace(1) %.i1843, align 4
  %.fr2416.i0 = freeze float %.ii0842
  %.fr2416.i1 = freeze float %.ii1844
  %263 = call reassoc nsz arcp contract afn float @llvm.fabs.f32(float %.fr2416.i0)
  %264 = fcmp olt float %263, 1.000000e+00
  %265 = call reassoc nnan nsz arcp contract afn float @llvm.fabs.f32(float %.fr2416.i1)
  %266 = fcmp olt float %265, 1.000000e+00
  %267 = select i1 %264, i1 %266, i1 false
  %268 = and i1 %267, %261
  %269 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 2, i32 1, i64 1, i32 1, i64 2
  %.ii0848 = load float, ptr addrspace(1) %269, align 8
  %.i1849 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 2, i32 1, i64 1, i32 1, i64 2, i64 1
  %.ii1850 = load float, ptr addrspace(1) %.i1849, align 4
  %.fr2419.i0 = freeze float %.ii0848
  %.fr2419.i1 = freeze float %.ii1850
  %270 = call reassoc nsz arcp contract afn float @llvm.fabs.f32(float %.fr2419.i0)
  %271 = fcmp olt float %270, 1.000000e+00
  %272 = call reassoc nnan nsz arcp contract afn float @llvm.fabs.f32(float %.fr2419.i1)
  %273 = fcmp olt float %272, 1.000000e+00
  %274 = select i1 %271, i1 %273, i1 false
  %275 = and i1 %274, %268
  %.ii1856 = load float, ptr addrspace(1) null, align 4
  %.fr2422.i1 = freeze float %.ii1856
  %276 = call reassoc nnan nsz arcp contract afn float @llvm.fabs.f32(float %.fr2422.i1)
  %277 = fcmp olt float %276, 1.000000e+00
  %278 = and i1 %277, %275
  %279 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 2, i32 1, i64 1, i32 2
  %280 = load <4 x float>, ptr addrspace(1) %279, align 16
  %.fr1281 = freeze <4 x float> %280
  %.i0347 = extractelement <4 x float> %.fr1281, i64 0
  %.i1348 = extractelement <4 x float> %.fr1281, i64 1
  %.i2349 = extractelement <4 x float> %.fr1281, i64 2
  %.i3350 = extractelement <4 x float> %.fr1281, i64 3
  %281 = call reassoc nsz arcp contract afn float @llvm.fabs.f32(float %.i0347)
  %282 = fcmp olt float %281, 1.000000e+00
  %283 = call reassoc nsz arcp contract afn float @llvm.fabs.f32(float %.i1348)
  %284 = fcmp olt float %283, 1.000000e+00
  %285 = and i1 %282, %284
  %286 = call reassoc nsz arcp contract afn float @llvm.fabs.f32(float %.i2349)
  %287 = fcmp olt float %286, 1.000000e+00
  %288 = and i1 %287, %285
  %289 = call reassoc nnan nsz arcp contract afn float @llvm.fabs.f32(float %.i3350)
  %290 = fcmp olt float %289, 1.000000e+00
  %291 = select i1 %288, i1 %290, i1 false
  %292 = and i1 %291, %278
  %293 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 2, i32 1, i64 2, i32 0
  %.ii0860 = load i32, ptr addrspace(1) %293, align 16
  %.i1861 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 2, i32 1, i64 2, i32 0, i64 1
  %.ii1862 = load i32, ptr addrspace(1) %.i1861, align 4
  %.i2863 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %8, i64 0, i32 3, i64 2, i32 1, i64 2, i32 0, i64 2
  %.ii2864 = load i32, ptr addrspace(1) %.i2863, align 8
  %.u0865 = insertelement <3 x i32> zeroinitializer, i32 %.ii0860, i64 0
  %.u1866 = insertelement <3 x i32> %.u0865, i32 %.ii1862, i64 1
  %294 = insertelement <3 x i32> %.u1866, i32 %.ii2864, i64 2
  %295 = icmp eq <3 x i32> %294, zeroinitializer
  %296 = extractelement <3 x i1> %295, i64 0
  %297 = extractelement <3 x i1> %295, i64 1
  %298 = and i1 %296, %297
  %299 = extractelement <3 x i1> %295, i64 2
  %300 = and i1 %299, %298
  %301 = and i1 %300, %292
  %.ii2960 = load i32, ptr addrspace(1) null, align 8
  %302 = insertelement <3 x i32> zeroinitializer, i32 %.ii2960, i64 0
  %303 = icmp eq <3 x i32> %302, zeroinitializer
  %304 = extractelement <3 x i1> %303, i64 0
  %305 = and i1 %304, %301
  %306 = load i32, ptr addrspace(1) %3, align 4
  %307 = icmp eq i32 %306, 0
  %308 = and i1 %307, %305
  %309 = inttoptr i64 %4 to ptr addrspace(1)
  br i1 poison, label %.exit71, label %.exit4

.exit71:                                          ; preds = %.exit16
  br label %.exit4

.exit4:                                           ; preds = %.exit71, %.exit16
  %310 = phi i1 [ false, %.exit16 ], [ true, %.exit71 ]
  %311 = and i1 %308, %310
  %312 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %309, i64 0, i32 3, i64 0, i32 1, i64 0, i32 1, i64 3
  %.ii01078 = load float, ptr addrspace(1) %312, align 8
  %.i11079 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %309, i64 0, i32 3, i64 0, i32 1, i64 0, i32 1, i64 3, i64 1
  %.ii11080 = load float, ptr addrspace(1) %.i11079, align 4
  %.fr2519.i0 = freeze float %.ii01078
  %.fr2519.i1 = freeze float %.ii11080
  %313 = call reassoc nsz arcp contract afn float @llvm.fabs.f32(float %.fr2519.i0)
  %314 = fcmp olt float %313, 1.000000e+00
  %315 = call reassoc nnan nsz arcp contract afn float @llvm.fabs.f32(float %.fr2519.i1)
  %316 = fcmp olt float %315, 1.000000e+00
  %317 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %309, i64 0, i32 3, i64 0, i32 1, i64 0, i32 2
  %318 = load <4 x float>, ptr addrspace(1) %317, align 16
  %.fr1286 = freeze <4 x float> %318
  %.i0431 = extractelement <4 x float> %.fr1286, i64 0
  %319 = fadd reassoc nsz arcp contract afn float %.i0431, 0.000000e+00
  %320 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %309, i64 0, i32 3, i64 0, i32 1, i64 1, i32 0
  %.ii01084 = load i32, ptr addrspace(1) %320, align 16
  %.i11085 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %309, i64 0, i32 3, i64 0, i32 1, i64 1, i32 0, i64 1
  %.ii11086 = load i32, ptr addrspace(1) %.i11085, align 4
  %.i21087 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %309, i64 0, i32 3, i64 0, i32 1, i64 1, i32 0, i64 2
  %.ii21088 = load i32, ptr addrspace(1) %.i21087, align 8
  %.u01089 = insertelement <3 x i32> zeroinitializer, i32 %.ii01084, i64 0
  %.u11090 = insertelement <3 x i32> %.u01089, i32 %.ii11086, i64 0
  %321 = insertelement <3 x i32> %.u11090, i32 %.ii21088, i64 2
  %322 = icmp eq <3 x i32> %321, zeroinitializer
  %323 = extractelement <3 x i1> %322, i64 0
  %324 = extractelement <3 x i1> %322, i64 2
  %325 = and i1 %324, %323
  %326 = and i1 %325, %311
  %.ii01110 = load float, ptr addrspace(1) %5, align 8
  %.fr2534.i0 = freeze float %.ii01110
  %327 = call reassoc nsz arcp contract afn float @llvm.fabs.f32(float %.fr2534.i0)
  %328 = fcmp olt float %327, 1.000000e+00
  %329 = and i1 %328, %326
  %330 = icmp eq <3 x i32> zeroinitializer, zeroinitializer
  %331 = extractelement <3 x i1> %330, i64 0
  %332 = and i1 %331, %329
  %333 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %309, i64 0, i32 3, i64 0, i32 2
  %334 = load i32, ptr addrspace(1) %333, align 4
  %335 = icmp eq i32 %334, 0
  %336 = and i1 %335, %332
  %337 = insertelement <2 x i32> <i32 1, i32 1>, i32 %userdata9, i64 1
  %338 = bitcast <2 x i32> %337 to i64
  %339 = inttoptr i64 %338 to ptr addrspace(1)
  %340 = load i32, ptr addrspace(1) null, align 4
  %341 = icmp eq i32 %340, 0
  %342 = and i1 %341, %336
  br i1 poison, label %.exit83, label %.exit

.exit83:                                          ; preds = %.exit4
  %.i11173 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %339, i64 0, i32 3, i64 0, i32 0, i64 1, i32 0, i64 1
  %.ii11174 = load float, ptr addrspace(1) %.i11173, align 4
  %.ii21176 = load float, ptr addrspace(1) %.i21175, align 8
  %.fr2557.i1 = freeze float %.ii11174
  %.fr2557.i2 = freeze float %.ii21176
  %343 = fadd reassoc nsz arcp contract afn float %.fr2557.i1, 0.000000e+00
  %344 = call reassoc nsz arcp contract afn float @llvm.fabs.f32(float %.fr2557.i2)
  %345 = fcmp olt float %344, 1.000000e+00
  br i1 %345, label %.exit86, label %.exit

.exit86:                                          ; preds = %.exit83
  br label %.exit

.exit:                                            ; preds = %.exit86, %.exit83, %.exit4
  %346 = phi i1 [ false, %.exit4 ], [ false, %.exit83 ], [ true, %.exit86 ]
  %347 = and i1 %342, %346
  %348 = getelementptr <{ <{ [3 x i32], [4 x [2 x float]], [4 x float] }>, [2 x float], i32, [4294967295 x <{ [4 x %llpc.matrix.column], [3 x <{ [3 x i32], [4 x [2 x float]], [4 x float] }>], i32 }>] }>, ptr addrspace(1) %339, i64 0, i32 3, i64 0, i32 1, i64 0, i32 1, i64 0
  %.ii01188 = load float, ptr addrspace(1) %348, align 8
  %.fr2566.i0 = freeze float %.ii01188
  %349 = fadd reassoc nsz arcp contract afn float %.fr2566.i0, 1.000000e+00
  %350 = call reassoc nsz arcp contract afn float @llvm.fabs.f32(float %349)
  %351 = fcmp olt float %350, 1.000000e+00
  %352 = and i1 %347, %351
  %cond.freeze = freeze i1 %352
  br i1 %cond.freeze, label %353, label %354

353:                                              ; preds = %.exit
  call void @llvm.amdgcn.raw.buffer.store.i32(i32 0, <4 x i32> zeroinitializer, i32 0, i32 0, i32 0)
  br label %354

354:                                              ; preds = %353, %.exit
  store i32 0, ptr addrspace(1) %8, align 4
  store i32 0, ptr addrspace(1) %309, align 4
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fabs.f32(float) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(write)
declare void @llvm.amdgcn.raw.buffer.store.i32(i32, <4 x i32>, i32, i32, i32 immarg) #2

attributes #0 = { nounwind memory(readwrite) "amdgpu-flat-work-group-size"="1,1" "amdgpu-memory-bound"="false" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-unroll-threshold"="700" "amdgpu-wave-limiter"="false" "amdgpu-work-group-info-arg-no"="8" "denormal-fp-math-f32"="preserve-sign" "target-features"=",+wavefrontsize32,+cumode,+enable-flat-scratch" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(write) }