--- build.head//SingleSource/UnitTests/CMakeFiles/matrix-types-spec.dir/matrix-types-spec.s 2023-11-13 08:03:23.031539208 +0000 +++ build//SingleSource/UnitTests/CMakeFiles/matrix-types-spec.dir/matrix-types-spec.s 2023-11-13 08:03:18.107681539 +0000 @@ -1370,13 +1370,13 @@ addi a0, a0, 976 vl8r.v v8, (a0) # Unknown-size Folded Reload vse64.v v8, (s0) + csrr a0, vlenb + slli a1, a0, 4 + add a0, a1, a0 + add a0, sp, a0 + addi a0, a0, 976 + vl8r.v v8, (a0) # Unknown-size Folded Reload addi a0, sp, 96 - csrr a1, vlenb - slli a2, a1, 4 - add a1, a2, a1 - add a1, sp, a1 - addi a1, a1, 976 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) addi a0, a0, 80 vse64.v v16, (a0) @@ -1934,7 +1934,7 @@ .LBB5_4: # %for.cond1.preheader.us.i.preheader lui a3, 2 addiw a3, a3, -1448 - add s5, sp, a3 + add s8, sp, a3 addi t0, sp, 364 addi a3, a2, -17 slli a2, a2, 2 @@ -2189,68 +2189,68 @@ bnez a6, .LBB5_15 .LBB5_16: # %for.cond1.preheader.us.i15.preheader416 addi a3, t0, 68 - sd a3, 280(sp) # 8-byte Folded Spill + sd a3, 64(sp) # 8-byte Folded Spill addi a3, t0, 136 - sd a3, 272(sp) # 8-byte Folded Spill + sd a3, 72(sp) # 8-byte Folded Spill addi a3, t0, 204 - sd a3, 264(sp) # 8-byte Folded Spill + sd a3, 80(sp) # 8-byte Folded Spill addi a3, t0, 272 - sd a3, 256(sp) # 8-byte Folded Spill + sd a3, 88(sp) # 8-byte Folded Spill addi a3, t0, 340 - sd a3, 248(sp) # 8-byte Folded Spill + sd a3, 96(sp) # 8-byte Folded Spill addi a3, t0, 408 - sd a3, 240(sp) # 8-byte Folded Spill + sd a3, 104(sp) # 8-byte Folded Spill addi a3, t0, 476 - sd a3, 232(sp) # 8-byte Folded Spill + sd a3, 112(sp) # 8-byte Folded Spill addi a3, t0, 544 - sd a3, 224(sp) # 8-byte Folded Spill + sd a3, 120(sp) # 8-byte Folded Spill addi a3, t0, 612 - sd a3, 216(sp) # 8-byte Folded Spill + sd a3, 128(sp) # 8-byte Folded Spill addi a3, t0, 680 - sd a3, 208(sp) # 8-byte Folded Spill + sd a3, 136(sp) # 8-byte Folded Spill addi a3, t0, 748 - sd a3, 200(sp) # 8-byte Folded Spill + sd a3, 144(sp) # 8-byte Folded Spill addi a3, t0, 816 - sd a3, 192(sp) # 8-byte Folded Spill + sd a3, 152(sp) # 8-byte Folded Spill addi a3, t0, 884 - sd a3, 184(sp) # 8-byte Folded Spill + sd a3, 160(sp) # 8-byte Folded Spill addi a3, t0, 952 - sd a3, 176(sp) # 8-byte Folded Spill + sd a3, 168(sp) # 8-byte Folded Spill addi a3, t0, 1020 sd a3, 288(sp) # 8-byte Folded Spill addi a3, t0, 1088 - sd a3, 168(sp) # 8-byte Folded Spill + sd a3, 176(sp) # 8-byte Folded Spill addi a3, t0, 1156 - sd a3, 160(sp) # 8-byte Folded Spill + sd a3, 192(sp) # 8-byte Folded Spill addi a3, t0, 1224 - sd a3, 152(sp) # 8-byte Folded Spill + sd a3, 224(sp) # 8-byte Folded Spill addi a3, t0, 1292 - sd a3, 144(sp) # 8-byte Folded Spill + sd a3, 232(sp) # 8-byte Folded Spill addi a3, t0, 1360 - sd a3, 136(sp) # 8-byte Folded Spill + sd a3, 240(sp) # 8-byte Folded Spill addi a3, t0, 1428 - sd a3, 128(sp) # 8-byte Folded Spill + sd a3, 248(sp) # 8-byte Folded Spill addi a3, t0, 1496 - sd a3, 120(sp) # 8-byte Folded Spill + sd a3, 256(sp) # 8-byte Folded Spill addi a3, t0, 1564 - sd a3, 112(sp) # 8-byte Folded Spill + sd a3, 264(sp) # 8-byte Folded Spill addi a3, t0, 1632 - sd a3, 104(sp) # 8-byte Folded Spill + sd a3, 272(sp) # 8-byte Folded Spill addi a3, t0, 1700 - sd a3, 96(sp) # 8-byte Folded Spill + sd a3, 280(sp) # 8-byte Folded Spill slli a3, a2, 2 addi a4, sp, 296 add a3, a3, a4 addi a4, t0, 1768 - sd a4, 88(sp) # 8-byte Folded Spill + sd a4, 216(sp) # 8-byte Folded Spill addi a2, a2, -17 addi a3, a3, 1020 addi a4, t0, 1836 - sd a4, 80(sp) # 8-byte Folded Spill + sd a4, 184(sp) # 8-byte Folded Spill addi a4, t0, 1904 - sd a4, 72(sp) # 8-byte Folded Spill + sd a4, 208(sp) # 8-byte Folded Spill addi a4, t0, 1972 - sd a4, 64(sp) # 8-byte Folded Spill + sd a4, 200(sp) # 8-byte Folded Spill .LBB5_17: # %for.cond1.preheader.us.i15 # =>This Inner Loop Header: Depth=1 sw zero, -1020(a3) @@ -2382,26 +2382,26 @@ add a5, a5, a0 bnez a7, .LBB5_21 .LBB5_22: # %for.cond1.preheader.i.preheader - addi s1, s5, 124 - addi s0, s5, 248 - addi s6, s5, 372 - addi s7, s5, 496 - addi s8, s5, 620 - addi s9, s5, 744 - addi s10, s5, 868 - addi s11, s5, 992 - addi a0, s5, 1116 - sd a0, 56(sp) # 8-byte Folded Spill - addi a0, s5, 1240 - sd a0, 48(sp) # 8-byte Folded Spill - addi s3, s5, 1364 - addi s4, s5, 1488 - addi a0, s5, 1612 - sd a0, 40(sp) # 8-byte Folded Spill - addi a0, s5, 1736 - sd a0, 32(sp) # 8-byte Folded Spill - addi a0, s5, 1860 + addi s11, s8, 124 + addi s10, s8, 248 + addi s9, s8, 372 + addi s1, s8, 496 + addi s0, s8, 620 + addi s7, s8, 744 + addi s6, s8, 868 + addi s5, s8, 992 + addi s4, s8, 1116 + addi s3, s8, 1240 + addi a0, s8, 1364 sd a0, 24(sp) # 8-byte Folded Spill + addi a0, s8, 1488 + sd a0, 32(sp) # 8-byte Folded Spill + addi a0, s8, 1612 + sd a0, 40(sp) # 8-byte Folded Spill + addi a0, s8, 1736 + sd a0, 48(sp) # 8-byte Folded Spill + addi a0, s8, 1860 + sd a0, 56(sp) # 8-byte Folded Spill addi a0, a1, -31 li a2, 68 mul a2, a1, a2 @@ -2476,7 +2476,7 @@ addiw a1, a1, 544 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s5) + vle32.v v8, (s8) csrr a0, vlenb li a1, 418 mul a0, a0, a1 @@ -2485,7 +2485,7 @@ addiw a1, a1, 544 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s1) + vle32.v v8, (s11) csrr a0, vlenb li a1, 410 mul a0, a0, a1 @@ -2494,7 +2494,7 @@ addiw a1, a1, 544 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s0) + vle32.v v8, (s10) csrr a0, vlenb li a1, 346 mul a0, a0, a1 @@ -2504,7 +2504,7 @@ add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill li a0, 32 - vle32.v v8, (s6) + vle32.v v8, (s9) csrr a1, vlenb li a2, 378 mul a1, a1, a2 @@ -2513,7 +2513,7 @@ addiw a2, a2, 544 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle32.v v8, (s7) + vle32.v v8, (s1) csrr a1, vlenb li a2, 338 mul a1, a1, a2 @@ -2522,7 +2522,7 @@ addiw a2, a2, 544 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle32.v v8, (s8) + vle32.v v8, (s0) csrr a1, vlenb li a2, 386 mul a1, a1, a2 @@ -2531,7 +2531,7 @@ addiw a2, a2, 544 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle32.v v8, (s9) + vle32.v v8, (s7) csrr a1, vlenb li a2, 330 mul a1, a1, a2 @@ -2540,7 +2540,7 @@ addiw a2, a2, 544 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle32.v v8, (s10) + vle32.v v8, (s6) csrr a1, vlenb li a2, 354 mul a1, a1, a2 @@ -2549,7 +2549,7 @@ addiw a2, a2, 544 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle32.v v8, (s11) + vle32.v v8, (s5) csrr a1, vlenb li a2, 322 mul a1, a1, a2 @@ -2558,8 +2558,7 @@ addiw a2, a2, 544 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - ld a1, 56(sp) # 8-byte Folded Reload - vle32.v v8, (a1) + vle32.v v8, (s4) csrr a1, vlenb li a2, 370 mul a1, a1, a2 @@ -2568,8 +2567,7 @@ addiw a2, a2, 544 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - ld a1, 48(sp) # 8-byte Folded Reload - vle32.v v8, (a1) + vle32.v v8, (s3) csrr a1, vlenb li a2, 314 mul a1, a1, a2 @@ -2578,7 +2576,8 @@ addiw a2, a2, 544 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle32.v v16, (s3) + ld a1, 24(sp) # 8-byte Folded Reload + vle32.v v16, (a1) csrr a1, vlenb li a2, 298 mul a1, a1, a2 @@ -2587,7 +2586,8 @@ addiw a2, a2, 544 add a1, a1, a2 vs8r.v v16, (a1) # Unknown-size Folded Spill - vle32.v v24, (s4) + ld a1, 32(sp) # 8-byte Folded Reload + vle32.v v24, (a1) csrr a1, vlenb li a2, 279 mul a1, a1, a2 @@ -2606,7 +2606,7 @@ addiw a2, a2, 544 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - ld a1, 32(sp) # 8-byte Folded Reload + ld a1, 48(sp) # 8-byte Folded Reload vle32.v v8, (a1) csrr a1, vlenb li a2, 306 @@ -2616,7 +2616,7 @@ addiw a2, a2, 544 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - ld a1, 24(sp) # 8-byte Folded Reload + ld a1, 56(sp) # 8-byte Folded Reload vle32.v v8, (a1) csrr a1, vlenb li a2, 394 @@ -12801,292 +12801,292 @@ add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + li a1, 232 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 2 + addiw a1, a1, 544 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload addi a0, sp, 364 - csrr a1, vlenb - li a2, 232 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 2 - addiw a2, a2, 544 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a0) - ld a0, 280(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 224 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 2 - addiw a2, a2, 544 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) - ld a0, 272(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 216 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 2 - addiw a2, a2, 544 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 224 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 2 + addiw a1, a1, 544 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 64(sp) # 8-byte Folded Reload vse32.v v8, (a0) - ld a0, 264(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 208 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 2 - addiw a2, a2, 544 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 216 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 2 + addiw a1, a1, 544 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 72(sp) # 8-byte Folded Reload vse32.v v8, (a0) - ld a0, 256(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 200 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 2 - addiw a2, a2, 544 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 208 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 2 + addiw a1, a1, 544 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 80(sp) # 8-byte Folded Reload vse32.v v8, (a0) - ld a0, 248(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 192 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 2 - addiw a2, a2, 544 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 200 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 2 + addiw a1, a1, 544 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 88(sp) # 8-byte Folded Reload vse32.v v8, (a0) - ld a0, 240(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 184 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 2 - addiw a2, a2, 544 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 192 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 2 + addiw a1, a1, 544 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 96(sp) # 8-byte Folded Reload vse32.v v8, (a0) - ld a0, 232(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 176 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 2 - addiw a2, a2, 544 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 184 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 2 + addiw a1, a1, 544 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 104(sp) # 8-byte Folded Reload vse32.v v8, (a0) - ld a0, 224(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 168 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 2 - addiw a2, a2, 544 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 176 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 2 + addiw a1, a1, 544 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 112(sp) # 8-byte Folded Reload vse32.v v8, (a0) - ld a0, 216(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 160 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 2 - addiw a2, a2, 544 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 168 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 2 + addiw a1, a1, 544 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 120(sp) # 8-byte Folded Reload vse32.v v8, (a0) - ld a0, 208(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 152 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 2 - addiw a2, a2, 544 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 160 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 2 + addiw a1, a1, 544 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 128(sp) # 8-byte Folded Reload vse32.v v8, (a0) - ld a0, 200(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 144 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 2 - addiw a2, a2, 544 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 152 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 2 + addiw a1, a1, 544 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 136(sp) # 8-byte Folded Reload vse32.v v8, (a0) - ld a0, 192(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 136 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 2 - addiw a2, a2, 544 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 144 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 2 + addiw a1, a1, 544 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 144(sp) # 8-byte Folded Reload vse32.v v8, (a0) - ld a0, 184(sp) # 8-byte Folded Reload - csrr a1, vlenb - slli a1, a1, 7 - add a1, sp, a1 - lui a2, 2 - addiw a2, a2, 544 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 136 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 2 + addiw a1, a1, 544 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 152(sp) # 8-byte Folded Reload vse32.v v8, (a0) - ld a0, 176(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 120 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 2 - addiw a2, a2, 544 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + slli a0, a0, 7 + add a0, sp, a0 + lui a1, 2 + addiw a1, a1, 544 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 160(sp) # 8-byte Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + li a1, 120 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 2 + addiw a1, a1, 544 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload ld a0, 168(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 104 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 2 - addiw a2, a2, 544 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) - ld a0, 160(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 96 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 2 - addiw a2, a2, 544 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 104 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 2 + addiw a1, a1, 544 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 176(sp) # 8-byte Folded Reload vse32.v v8, (a0) - ld a0, 152(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 88 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 2 - addiw a2, a2, 544 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 96 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 2 + addiw a1, a1, 544 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 192(sp) # 8-byte Folded Reload vse32.v v8, (a0) - ld a0, 144(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 80 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 2 - addiw a2, a2, 544 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 88 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 2 + addiw a1, a1, 544 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 224(sp) # 8-byte Folded Reload vse32.v v8, (a0) - ld a0, 136(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 72 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 2 - addiw a2, a2, 544 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 80 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 2 + addiw a1, a1, 544 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 232(sp) # 8-byte Folded Reload vse32.v v8, (a0) - ld a0, 128(sp) # 8-byte Folded Reload - csrr a1, vlenb - slli a1, a1, 6 - add a1, sp, a1 - lui a2, 2 - addiw a2, a2, 544 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 72 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 2 + addiw a1, a1, 544 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 240(sp) # 8-byte Folded Reload vse32.v v8, (a0) - ld a0, 120(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 56 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 2 - addiw a2, a2, 544 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + slli a0, a0, 6 + add a0, sp, a0 + lui a1, 2 + addiw a1, a1, 544 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 248(sp) # 8-byte Folded Reload vse32.v v8, (a0) - ld a0, 112(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 48 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 2 - addiw a2, a2, 544 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 56 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 2 + addiw a1, a1, 544 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 256(sp) # 8-byte Folded Reload vse32.v v8, (a0) - ld a0, 104(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 40 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 2 - addiw a2, a2, 544 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 48 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 2 + addiw a1, a1, 544 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 264(sp) # 8-byte Folded Reload vse32.v v8, (a0) - ld a0, 96(sp) # 8-byte Folded Reload - csrr a1, vlenb - slli a1, a1, 5 - add a1, sp, a1 - lui a2, 2 - addiw a2, a2, 544 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 40 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 2 + addiw a1, a1, 544 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 272(sp) # 8-byte Folded Reload vse32.v v8, (a0) - ld a0, 88(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 24 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 2 - addiw a2, a2, 544 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + slli a0, a0, 5 + add a0, sp, a0 + lui a1, 2 + addiw a1, a1, 544 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 280(sp) # 8-byte Folded Reload vse32.v v8, (a0) - ld a0, 80(sp) # 8-byte Folded Reload - csrr a1, vlenb - slli a1, a1, 4 - add a1, sp, a1 - lui a2, 2 - addiw a2, a2, 544 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 24 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 2 + addiw a1, a1, 544 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 216(sp) # 8-byte Folded Reload vse32.v v8, (a0) - ld a0, 72(sp) # 8-byte Folded Reload - csrr a1, vlenb - slli a1, a1, 3 - add a1, sp, a1 - lui a2, 2 - addiw a2, a2, 544 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + slli a0, a0, 4 + add a0, sp, a0 + lui a1, 2 + addiw a1, a1, 544 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 184(sp) # 8-byte Folded Reload vse32.v v8, (a0) - ld a0, 64(sp) # 8-byte Folded Reload + csrr a0, vlenb + slli a0, a0, 3 + add a0, sp, a0 + lui a1, 2 + addiw a1, a1, 544 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 208(sp) # 8-byte Folded Reload + vse32.v v8, (a0) + ld a0, 200(sp) # 8-byte Folded Reload vse32.v v24, (a0) + csrr a0, vlenb + li a1, 112 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 2 + addiw a1, a1, 544 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload ld a0, 288(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 112 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 2 - addiw a2, a2, 544 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) lui a0, 1 addiw a0, a0, 416 @@ -15001,47 +15001,47 @@ li a5, 0 li a6, 0 addi a7, s11, 80 - sd a7, 176(sp) # 8-byte Folded Spill + sd a7, 16(sp) # 8-byte Folded Spill addi a7, s11, 160 - sd a7, 168(sp) # 8-byte Folded Spill + sd a7, 24(sp) # 8-byte Folded Spill addi a7, s11, 240 - sd a7, 160(sp) # 8-byte Folded Spill + sd a7, 32(sp) # 8-byte Folded Spill addi a7, s11, 320 - sd a7, 152(sp) # 8-byte Folded Spill + sd a7, 40(sp) # 8-byte Folded Spill addi a7, s11, 400 - sd a7, 144(sp) # 8-byte Folded Spill + sd a7, 48(sp) # 8-byte Folded Spill addi a7, s11, 480 - sd a7, 136(sp) # 8-byte Folded Spill + sd a7, 56(sp) # 8-byte Folded Spill addi a7, s11, 560 - sd a7, 128(sp) # 8-byte Folded Spill + sd a7, 64(sp) # 8-byte Folded Spill addi a7, s11, 640 - sd a7, 120(sp) # 8-byte Folded Spill + sd a7, 72(sp) # 8-byte Folded Spill addi a7, s11, 720 - sd a7, 112(sp) # 8-byte Folded Spill + sd a7, 80(sp) # 8-byte Folded Spill addi a7, s11, 800 - sd a7, 104(sp) # 8-byte Folded Spill + sd a7, 88(sp) # 8-byte Folded Spill addi a7, s11, 880 sd a7, 96(sp) # 8-byte Folded Spill addi a7, s11, 960 - sd a7, 88(sp) # 8-byte Folded Spill + sd a7, 104(sp) # 8-byte Folded Spill addi a7, s11, 1040 - sd a7, 80(sp) # 8-byte Folded Spill + sd a7, 112(sp) # 8-byte Folded Spill addi a7, s11, 1120 - sd a7, 72(sp) # 8-byte Folded Spill + sd a7, 120(sp) # 8-byte Folded Spill addi a7, s11, 1200 - sd a7, 64(sp) # 8-byte Folded Spill + sd a7, 128(sp) # 8-byte Folded Spill addi a7, s11, 1280 - sd a7, 56(sp) # 8-byte Folded Spill + sd a7, 136(sp) # 8-byte Folded Spill addi a7, s11, 1360 - sd a7, 48(sp) # 8-byte Folded Spill + sd a7, 144(sp) # 8-byte Folded Spill addi a7, s11, 1440 - sd a7, 40(sp) # 8-byte Folded Spill + sd a7, 152(sp) # 8-byte Folded Spill addi a7, s11, 1520 - sd a7, 32(sp) # 8-byte Folded Spill + sd a7, 160(sp) # 8-byte Folded Spill addi a7, s11, 1600 - sd a7, 24(sp) # 8-byte Folded Spill + sd a7, 176(sp) # 8-byte Folded Spill addi a7, s11, 1680 - sd a7, 16(sp) # 8-byte Folded Spill + sd a7, 168(sp) # 8-byte Folded Spill neg a7, a1 and a3, a3, a7 addi a7, sp, 248 @@ -15103,32 +15103,32 @@ lui a4, 2 addiw a4, a4, 1520 add a4, sp, a4 - addi s1, a4, 80 - addi s0, a4, 160 - addi a5, a4, 240 - sd a5, 240(sp) # 8-byte Folded Spill - addi a5, a4, 320 - sd a5, 232(sp) # 8-byte Folded Spill - addi s2, a4, 400 - addi s3, a4, 480 - addi s9, a4, 560 - addi s10, a4, 640 - addi s11, a4, 720 - addi s4, a4, 800 + addi s0, a4, 80 + addi s11, a4, 160 + addi s10, a4, 240 + addi s9, a4, 320 + addi s3, a4, 400 + addi s2, a4, 480 + addi s1, a4, 560 + addi s8, a4, 640 + addi s6, a4, 720 + addi s5, a4, 800 addi s7, a4, 880 - addi s5, a4, 960 - addi s6, a4, 1040 - addi s8, a4, 1120 + addi s4, a4, 960 + addi a5, a4, 1040 + sd a5, 192(sp) # 8-byte Folded Spill + addi a5, a4, 1120 + sd a5, 200(sp) # 8-byte Folded Spill addi a5, a4, 1200 - sd a5, 224(sp) # 8-byte Folded Spill + sd a5, 208(sp) # 8-byte Folded Spill addi a5, a4, 1280 sd a5, 216(sp) # 8-byte Folded Spill addi a5, a4, 1360 - sd a5, 208(sp) # 8-byte Folded Spill + sd a5, 224(sp) # 8-byte Folded Spill addi a5, a4, 1440 - sd a5, 200(sp) # 8-byte Folded Spill + sd a5, 232(sp) # 8-byte Folded Spill addi a4, a4, 1520 - sd a4, 192(sp) # 8-byte Folded Spill + sd a4, 240(sp) # 8-byte Folded Spill li a4, 20 mul a4, a2, a4 li a5, 42 @@ -15157,49 +15157,49 @@ add t5, sp, a2 add t5, t5, t4 fld fa4, 0(t5) - add t5, s1, t4 - fld fa3, 0(t5) add t5, s0, t4 + fld fa3, 0(t5) + add t5, s11, t4 fld fa2, 0(t5) - ld t5, 240(sp) # 8-byte Folded Reload - add t5, t5, t4 + add t5, s10, t4 fld fa1, 0(t5) - ld t5, 232(sp) # 8-byte Folded Reload - add t5, t5, t4 + add t5, s9, t4 fld fa0, 0(t5) - add t5, s2, t4 - fld ft0, 0(t5) add t5, s3, t4 + fld ft0, 0(t5) + add t5, s2, t4 fld ft1, 0(t5) - add t5, s9, t4 + add t5, s1, t4 fld ft2, 0(t5) - add t5, s10, t4 + add t5, s8, t4 fld ft3, 0(t5) - add t5, s11, t4 + add t5, s6, t4 fld ft4, 0(t5) - add t5, s4, t4 + add t5, s5, t4 fld ft5, 0(t5) add t5, s7, t4 fld ft6, 0(t5) - add t5, s5, t4 + add t5, s4, t4 fld ft7, 0(t5) - add t5, s6, t4 + ld t5, 192(sp) # 8-byte Folded Reload + add t5, t5, t4 fld fa6, 0(t5) - add t5, s8, t4 + ld t5, 200(sp) # 8-byte Folded Reload + add t5, t5, t4 fld fa7, 0(t5) - ld t5, 224(sp) # 8-byte Folded Reload + ld t5, 208(sp) # 8-byte Folded Reload add t5, t5, t4 fld ft8, 0(t5) ld t5, 216(sp) # 8-byte Folded Reload add t5, t5, t4 fld ft9, 0(t5) - ld t5, 208(sp) # 8-byte Folded Reload + ld t5, 224(sp) # 8-byte Folded Reload add t5, t5, t4 fld ft10, 0(t5) - ld t5, 200(sp) # 8-byte Folded Reload + ld t5, 232(sp) # 8-byte Folded Reload add t5, t5, t4 fld ft11, 0(t5) - ld a2, 192(sp) # 8-byte Folded Reload + ld a2, 240(sp) # 8-byte Folded Reload add t4, a2, t4 fld fs0, 0(t4) bgeu t0, a0, .LBB8_21 @@ -15582,7 +15582,7 @@ addiw a0, a0, 1520 add a0, sp, a0 vle64.v v16, (a0) - vle64.v v8, (s1) + vle64.v v8, (s0) csrr a0, vlenb li a1, 710 mul a0, a0, a1 @@ -15591,7 +15591,7 @@ addiw a1, a1, -976 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s0) + vle64.v v8, (s11) csrr a0, vlenb li a1, 638 mul a0, a0, a1 @@ -15603,8 +15603,7 @@ lui a0, 1 addiw a0, a0, 1800 add a0, sp, a0 - ld a1, 240(sp) # 8-byte Folded Reload - vle64.v v8, (a1) + vle64.v v8, (s10) csrr a1, vlenb li a2, 694 mul a1, a1, a2 @@ -15613,8 +15612,7 @@ addiw a2, a2, -976 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - ld a1, 232(sp) # 8-byte Folded Reload - vle64.v v8, (a1) + vle64.v v8, (s9) csrr a1, vlenb li a2, 718 mul a1, a1, a2 @@ -15623,7 +15621,7 @@ addiw a2, a2, -976 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle64.v v8, (s2) + vle64.v v8, (s3) csrr a1, vlenb li a2, 726 mul a1, a1, a2 @@ -15632,7 +15630,7 @@ addiw a2, a2, -976 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle64.v v8, (s3) + vle64.v v8, (s2) csrr a1, vlenb li a2, 654 mul a1, a1, a2 @@ -15641,7 +15639,7 @@ addiw a2, a2, -976 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle64.v v8, (s9) + vle64.v v8, (s1) csrr a1, vlenb li a2, 686 mul a1, a1, a2 @@ -15650,7 +15648,7 @@ addiw a2, a2, -976 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle64.v v8, (s10) + vle64.v v8, (s8) csrr a1, vlenb li a2, 734 mul a1, a1, a2 @@ -15659,7 +15657,7 @@ addiw a2, a2, -976 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle64.v v8, (s11) + vle64.v v8, (s6) csrr a1, vlenb li a2, 742 mul a1, a1, a2 @@ -15668,7 +15666,7 @@ addiw a2, a2, -976 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle64.v v8, (s4) + vle64.v v8, (s5) csrr a1, vlenb li a2, 750 mul a1, a1, a2 @@ -15686,7 +15684,7 @@ addiw a2, a2, -976 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle64.v v8, (s5) + vle64.v v8, (s4) csrr a1, vlenb li a2, 758 mul a1, a1, a2 @@ -15695,7 +15693,8 @@ addiw a2, a2, -976 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle64.v v8, (s6) + ld a1, 192(sp) # 8-byte Folded Reload + vle64.v v8, (a1) csrr a1, vlenb li a2, 766 mul a1, a1, a2 @@ -15704,7 +15703,8 @@ addiw a2, a2, -976 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle64.v v8, (s8) + ld a1, 200(sp) # 8-byte Folded Reload + vle64.v v8, (a1) csrr a1, vlenb li a2, 670 mul a1, a1, a2 @@ -15713,7 +15713,7 @@ addiw a2, a2, -976 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - ld a1, 224(sp) # 8-byte Folded Reload + ld a1, 208(sp) # 8-byte Folded Reload vle64.v v8, (a1) csrr a1, vlenb li a2, 702 @@ -15733,7 +15733,7 @@ addiw a2, a2, -976 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - ld a1, 208(sp) # 8-byte Folded Reload + ld a1, 224(sp) # 8-byte Folded Reload vle64.v v8, (a1) csrr a1, vlenb li a2, 782 @@ -15743,7 +15743,7 @@ addiw a2, a2, -976 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - ld a1, 200(sp) # 8-byte Folded Reload + ld a1, 232(sp) # 8-byte Folded Reload vle64.v v8, (a1) csrr a1, vlenb li a2, 774 @@ -15753,7 +15753,7 @@ addiw a2, a2, -976 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - ld a1, 192(sp) # 8-byte Folded Reload + ld a1, 240(sp) # 8-byte Folded Reload vle64.v v8, (a1) csrr a1, vlenb li a2, 662 @@ -18007,8 +18007,8 @@ vl8r.v v16, (a2) # Unknown-size Folded Reload vfmul.vf v10, v16, fs2 vfadd.vv v8, v8, v10 - fld fs4, 144(a5) - fld fs5, 152(a5) + fld fs5, 144(a5) + fld fs4, 152(a5) csrr a2, vlenb li a3, 790 mul a2, a2, a3 @@ -18027,7 +18027,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl8r.v v16, (a2) # Unknown-size Folded Reload - vfmul.vf v10, v16, fs4 + vfmul.vf v10, v16, fs5 vfadd.vv v8, v8, v10 csrr a2, vlenb li a3, 774 @@ -18037,7 +18037,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl8r.v v16, (a2) # Unknown-size Folded Reload - vfmul.vf v10, v16, fs5 + vfmul.vf v10, v16, fs4 vfadd.vv v8, v8, v10 csrr a2, vlenb li a3, 626 @@ -18314,7 +18314,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl4r.v v12, (a2) # Unknown-size Folded Reload - vfmul.vf v12, v12, fs4 + vfmul.vf v12, v12, fs5 vfadd.vv v10, v10, v12 csrr a2, vlenb li a3, 558 @@ -18324,7 +18324,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl4r.v v12, (a2) # Unknown-size Folded Reload - vfmul.vf v12, v12, fs5 + vfmul.vf v12, v12, fs4 vfadd.vv v10, v10, v12 csrr a2, vlenb li a3, 662 @@ -18917,8 +18917,8 @@ vl8r.v v16, (a2) # Unknown-size Folded Reload vfmul.vf v10, v16, fs1 vfadd.vv v8, v8, v10 - fld fs3, 312(a5) - fld fs4, 320(a5) + fld fs4, 312(a5) + fld fs3, 320(a5) csrr a2, vlenb li a3, 790 mul a2, a2, a3 @@ -18937,7 +18937,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl8r.v v16, (a2) # Unknown-size Folded Reload - vfmul.vf v10, v16, fs3 + vfmul.vf v10, v16, fs4 vfadd.vv v8, v8, v10 csrr a2, vlenb li a3, 774 @@ -18947,7 +18947,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl8r.v v16, (a2) # Unknown-size Folded Reload - vfmul.vf v10, v16, fs4 + vfmul.vf v10, v16, fs3 vfadd.vv v8, v8, v10 csrr a2, vlenb li a3, 626 @@ -19228,7 +19228,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl4r.v v12, (a2) # Unknown-size Folded Reload - vfmul.vf v12, v12, fs3 + vfmul.vf v12, v12, fs4 vfadd.vv v10, v10, v12 csrr a2, vlenb li a3, 558 @@ -19238,7 +19238,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl4r.v v12, (a2) # Unknown-size Folded Reload - vfmul.vf v12, v12, fs4 + vfmul.vf v12, v12, fs3 vfadd.vv v10, v10, v12 csrr a2, vlenb li a3, 662 @@ -19832,8 +19832,8 @@ vl8r.v v16, (a2) # Unknown-size Folded Reload vfmul.vf v10, v16, fs0 vfadd.vv v8, v8, v10 - fld fs2, 480(a5) - fld fs3, 488(a5) + fld fs3, 480(a5) + fld fs2, 488(a5) csrr a2, vlenb li a3, 790 mul a2, a2, a3 @@ -19852,7 +19852,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl8r.v v16, (a2) # Unknown-size Folded Reload - vfmul.vf v10, v16, fs2 + vfmul.vf v10, v16, fs3 vfadd.vv v8, v8, v10 csrr a2, vlenb li a3, 774 @@ -19862,7 +19862,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl8r.v v16, (a2) # Unknown-size Folded Reload - vfmul.vf v10, v16, fs3 + vfmul.vf v10, v16, fs2 vfadd.vv v8, v8, v10 csrr a2, vlenb li a3, 626 @@ -20143,7 +20143,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl4r.v v12, (a2) # Unknown-size Folded Reload - vfmul.vf v12, v12, fs2 + vfmul.vf v12, v12, fs3 vfadd.vv v10, v10, v12 csrr a2, vlenb li a3, 558 @@ -20153,7 +20153,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl4r.v v12, (a2) # Unknown-size Folded Reload - vfmul.vf v12, v12, fs3 + vfmul.vf v12, v12, fs2 vfadd.vv v10, v10, v12 csrr a2, vlenb li a3, 662 @@ -20748,8 +20748,8 @@ vl8r.v v16, (a2) # Unknown-size Folded Reload vfmul.vf v10, v16, ft11 vfadd.vv v8, v8, v10 - fld fs1, 648(a5) - fld fs2, 656(a5) + fld fs2, 648(a5) + fld fs1, 656(a5) csrr a2, vlenb li a3, 790 mul a2, a2, a3 @@ -20768,7 +20768,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl8r.v v16, (a2) # Unknown-size Folded Reload - vfmul.vf v10, v16, fs1 + vfmul.vf v10, v16, fs2 vfadd.vv v8, v8, v10 csrr a2, vlenb li a3, 774 @@ -20778,7 +20778,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl8r.v v16, (a2) # Unknown-size Folded Reload - vfmul.vf v10, v16, fs2 + vfmul.vf v10, v16, fs1 vfadd.vv v8, v8, v10 csrr a2, vlenb li a3, 626 @@ -21060,7 +21060,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl4r.v v12, (a2) # Unknown-size Folded Reload - vfmul.vf v12, v12, fs1 + vfmul.vf v12, v12, fs2 vfadd.vv v10, v10, v12 csrr a2, vlenb li a3, 558 @@ -21070,7 +21070,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl4r.v v12, (a2) # Unknown-size Folded Reload - vfmul.vf v12, v12, fs2 + vfmul.vf v12, v12, fs1 vfadd.vv v10, v10, v12 csrr a2, vlenb li a3, 662 @@ -21663,8 +21663,8 @@ vl8r.v v16, (a2) # Unknown-size Folded Reload vfmul.vf v10, v16, ft10 vfadd.vv v8, v8, v10 - fld fs0, 816(a5) - fld fs1, 824(a5) + fld fs1, 816(a5) + fld fs0, 824(a5) csrr a2, vlenb li a3, 790 mul a2, a2, a3 @@ -21683,7 +21683,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl8r.v v16, (a2) # Unknown-size Folded Reload - vfmul.vf v10, v16, fs0 + vfmul.vf v10, v16, fs1 vfadd.vv v8, v8, v10 csrr a2, vlenb li a3, 774 @@ -21693,7 +21693,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl8r.v v16, (a2) # Unknown-size Folded Reload - vfmul.vf v10, v16, fs1 + vfmul.vf v10, v16, fs0 vfadd.vv v8, v8, v10 csrr a2, vlenb li a3, 626 @@ -21975,7 +21975,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl4r.v v12, (a2) # Unknown-size Folded Reload - vfmul.vf v12, v12, fs0 + vfmul.vf v12, v12, fs1 vfadd.vv v10, v10, v12 csrr a2, vlenb li a3, 558 @@ -21985,7 +21985,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl4r.v v12, (a2) # Unknown-size Folded Reload - vfmul.vf v12, v12, fs1 + vfmul.vf v12, v12, fs0 vfadd.vv v10, v10, v12 csrr a2, vlenb li a3, 662 @@ -22580,8 +22580,8 @@ vl8r.v v16, (a2) # Unknown-size Folded Reload vfmul.vf v10, v16, ft9 vfadd.vv v8, v8, v10 - fld ft11, 984(a5) - fld fs0, 992(a5) + fld fs0, 984(a5) + fld ft11, 992(a5) csrr a2, vlenb li a3, 790 mul a2, a2, a3 @@ -22600,7 +22600,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl8r.v v16, (a2) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft11 + vfmul.vf v10, v16, fs0 vfadd.vv v8, v8, v10 csrr a2, vlenb li a3, 774 @@ -22610,7 +22610,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl8r.v v16, (a2) # Unknown-size Folded Reload - vfmul.vf v10, v16, fs0 + vfmul.vf v10, v16, ft11 vfadd.vv v8, v8, v10 csrr a2, vlenb li a3, 626 @@ -22893,7 +22893,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl4r.v v12, (a2) # Unknown-size Folded Reload - vfmul.vf v12, v12, ft11 + vfmul.vf v12, v12, fs0 vfadd.vv v10, v10, v12 csrr a2, vlenb li a3, 558 @@ -22903,7 +22903,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl4r.v v12, (a2) # Unknown-size Folded Reload - vfmul.vf v12, v12, fs0 + vfmul.vf v12, v12, ft11 vfadd.vv v10, v10, v12 csrr a2, vlenb li a3, 662 @@ -23498,8 +23498,8 @@ vl8r.v v16, (a2) # Unknown-size Folded Reload vfmul.vf v10, v16, ft8 vfadd.vv v8, v8, v10 - fld ft10, 1152(a5) - fld ft11, 1160(a5) + fld ft11, 1152(a5) + fld ft10, 1160(a5) csrr a2, vlenb li a3, 790 mul a2, a2, a3 @@ -23518,7 +23518,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl8r.v v16, (a2) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft10 + vfmul.vf v10, v16, ft11 vfadd.vv v8, v8, v10 csrr a2, vlenb li a3, 774 @@ -23528,7 +23528,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl8r.v v16, (a2) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft11 + vfmul.vf v10, v16, ft10 vfadd.vv v8, v8, v10 csrr a2, vlenb li a3, 626 @@ -23810,7 +23810,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl4r.v v12, (a2) # Unknown-size Folded Reload - vfmul.vf v12, v12, ft10 + vfmul.vf v12, v12, ft11 vfadd.vv v10, v10, v12 csrr a2, vlenb li a3, 558 @@ -23820,7 +23820,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl4r.v v12, (a2) # Unknown-size Folded Reload - vfmul.vf v12, v12, ft11 + vfmul.vf v12, v12, ft10 vfadd.vv v10, v10, v12 csrr a2, vlenb li a3, 662 @@ -24415,8 +24415,8 @@ vl8r.v v16, (a2) # Unknown-size Folded Reload vfmul.vf v10, v16, fa7 vfadd.vv v8, v8, v10 - fld ft9, 1320(a5) - fld ft10, 1328(a5) + fld ft10, 1320(a5) + fld ft9, 1328(a5) csrr a2, vlenb li a3, 790 mul a2, a2, a3 @@ -24435,7 +24435,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl8r.v v16, (a2) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft9 + vfmul.vf v10, v16, ft10 vfadd.vv v8, v8, v10 csrr a2, vlenb li a3, 774 @@ -24445,7 +24445,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl8r.v v16, (a2) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft10 + vfmul.vf v10, v16, ft9 vfadd.vv v8, v8, v10 csrr a2, vlenb li a3, 626 @@ -24727,7 +24727,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl4r.v v12, (a2) # Unknown-size Folded Reload - vfmul.vf v12, v12, ft9 + vfmul.vf v12, v12, ft10 vfadd.vv v10, v10, v12 csrr a2, vlenb li a3, 558 @@ -24737,7 +24737,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl4r.v v12, (a2) # Unknown-size Folded Reload - vfmul.vf v12, v12, ft10 + vfmul.vf v12, v12, ft9 vfadd.vv v10, v10, v12 csrr a2, vlenb li a3, 662 @@ -25332,8 +25332,8 @@ vl8r.v v16, (a2) # Unknown-size Folded Reload vfmul.vf v10, v16, fa6 vfadd.vv v8, v8, v10 - fld ft8, 1488(a5) - fld ft9, 1496(a5) + fld ft9, 1488(a5) + fld ft8, 1496(a5) csrr a2, vlenb li a3, 790 mul a2, a2, a3 @@ -25352,7 +25352,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl8r.v v16, (a2) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft8 + vfmul.vf v10, v16, ft9 vfadd.vv v8, v8, v10 csrr a2, vlenb li a3, 774 @@ -25362,7 +25362,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl8r.v v16, (a2) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft9 + vfmul.vf v10, v16, ft8 vfadd.vv v8, v8, v10 csrr a2, vlenb li a3, 626 @@ -25644,7 +25644,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl4r.v v12, (a2) # Unknown-size Folded Reload - vfmul.vf v12, v12, ft8 + vfmul.vf v12, v12, ft9 vfadd.vv v10, v10, v12 csrr a2, vlenb li a3, 558 @@ -25654,7 +25654,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl4r.v v12, (a2) # Unknown-size Folded Reload - vfmul.vf v12, v12, ft9 + vfmul.vf v12, v12, ft8 vfadd.vv v10, v10, v12 csrr a2, vlenb li a3, 662 @@ -26250,8 +26250,8 @@ vl8r.v v16, (a2) # Unknown-size Folded Reload vfmul.vf v10, v16, ft7 vfadd.vv v8, v8, v10 - fld fa7, 1656(a5) - fld ft8, 1664(a5) + fld ft8, 1656(a5) + fld fa7, 1664(a5) csrr a2, vlenb li a3, 790 mul a2, a2, a3 @@ -26270,7 +26270,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl8r.v v16, (a2) # Unknown-size Folded Reload - vfmul.vf v10, v16, fa7 + vfmul.vf v10, v16, ft8 vfadd.vv v8, v8, v10 csrr a2, vlenb li a3, 774 @@ -26280,7 +26280,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl8r.v v16, (a2) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft8 + vfmul.vf v10, v16, fa7 vfadd.vv v8, v8, v10 csrr a2, vlenb li a3, 626 @@ -26563,7 +26563,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl4r.v v12, (a2) # Unknown-size Folded Reload - vfmul.vf v12, v12, fa7 + vfmul.vf v12, v12, ft8 vfadd.vv v10, v10, v12 csrr a2, vlenb li a3, 558 @@ -26573,7 +26573,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl4r.v v12, (a2) # Unknown-size Folded Reload - vfmul.vf v12, v12, ft8 + vfmul.vf v12, v12, fa7 vfadd.vv v10, v10, v12 csrr a2, vlenb li a3, 662 @@ -27169,8 +27169,8 @@ vl8r.v v16, (a2) # Unknown-size Folded Reload vfmul.vf v10, v16, ft6 vfadd.vv v8, v8, v10 - fld fa6, 1824(a5) - fld fa7, 1832(a5) + fld fa7, 1824(a5) + fld fa6, 1832(a5) csrr a2, vlenb li a3, 790 mul a2, a2, a3 @@ -27189,7 +27189,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl8r.v v16, (a2) # Unknown-size Folded Reload - vfmul.vf v10, v16, fa6 + vfmul.vf v10, v16, fa7 vfadd.vv v8, v8, v10 csrr a2, vlenb li a3, 774 @@ -27199,7 +27199,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl8r.v v16, (a2) # Unknown-size Folded Reload - vfmul.vf v10, v16, fa7 + vfmul.vf v10, v16, fa6 vfadd.vv v8, v8, v10 csrr a2, vlenb li a3, 626 @@ -27482,7 +27482,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl4r.v v12, (a2) # Unknown-size Folded Reload - vfmul.vf v12, v12, fa6 + vfmul.vf v12, v12, fa7 vfadd.vv v10, v10, v12 csrr a2, vlenb li a3, 558 @@ -27492,7 +27492,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl4r.v v12, (a2) # Unknown-size Folded Reload - vfmul.vf v12, v12, fa7 + vfmul.vf v12, v12, fa6 vfadd.vv v10, v10, v12 csrr a2, vlenb li a3, 662 @@ -28087,8 +28087,8 @@ vl8r.v v16, (a2) # Unknown-size Folded Reload vfmul.vf v10, v16, ft5 vfadd.vv v8, v8, v10 - fld ft7, 1992(a5) - fld fa6, 2000(a5) + fld fa6, 1992(a5) + fld ft7, 2000(a5) csrr a2, vlenb li a3, 790 mul a2, a2, a3 @@ -28107,7 +28107,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl8r.v v16, (a2) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft7 + vfmul.vf v10, v16, fa6 vfadd.vv v8, v8, v10 csrr a2, vlenb li a3, 774 @@ -28117,7 +28117,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl8r.v v16, (a2) # Unknown-size Folded Reload - vfmul.vf v10, v16, fa6 + vfmul.vf v10, v16, ft7 vfadd.vv v8, v8, v10 csrr a2, vlenb li a3, 626 @@ -28400,7 +28400,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl4r.v v12, (a2) # Unknown-size Folded Reload - vfmul.vf v12, v12, ft7 + vfmul.vf v12, v12, fa6 vfadd.vv v10, v10, v12 csrr a2, vlenb li a3, 558 @@ -28410,7 +28410,7 @@ addiw a3, a3, -976 add a2, a2, a3 vl4r.v v12, (a2) # Unknown-size Folded Reload - vfmul.vf v12, v12, fa6 + vfmul.vf v12, v12, ft7 vfadd.vv v10, v10, v12 csrr a2, vlenb li a3, 662 @@ -29005,8 +29005,8 @@ vl8r.v v16, (a1) # Unknown-size Folded Reload vfmul.vf v10, v16, ft4 vfadd.vv v8, v8, v10 - fld ft6, 16(a0) - fld ft7, 24(a0) + fld ft7, 16(a0) + fld ft6, 24(a0) csrr a0, vlenb li a1, 790 mul a0, a0, a1 @@ -29025,7 +29025,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft6 + vfmul.vf v10, v16, ft7 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 774 @@ -29035,7 +29035,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft7 + vfmul.vf v10, v16, ft6 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 626 @@ -29317,7 +29317,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, ft6 + vfmul.vf v12, v12, ft7 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 558 @@ -29327,7 +29327,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, ft7 + vfmul.vf v12, v12, ft6 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 662 @@ -29922,8 +29922,8 @@ vl8r.v v16, (a0) # Unknown-size Folded Reload vfmul.vf v10, v16, ft3 vfadd.vv v8, v8, v10 - fld ft5, 144(a4) - fld ft6, 152(a4) + fld ft6, 144(a4) + fld ft5, 152(a4) csrr a0, vlenb li a1, 790 mul a0, a0, a1 @@ -29942,7 +29942,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft5 + vfmul.vf v10, v16, ft6 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 774 @@ -29952,7 +29952,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft6 + vfmul.vf v10, v16, ft5 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 626 @@ -30234,7 +30234,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, ft5 + vfmul.vf v12, v12, ft6 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 558 @@ -30244,7 +30244,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, ft6 + vfmul.vf v12, v12, ft5 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 662 @@ -30840,8 +30840,8 @@ vl8r.v v16, (a0) # Unknown-size Folded Reload vfmul.vf v10, v16, ft2 vfadd.vv v8, v8, v10 - fld ft4, 312(a4) - fld ft5, 320(a4) + fld ft5, 312(a4) + fld ft4, 320(a4) csrr a0, vlenb li a1, 790 mul a0, a0, a1 @@ -30860,7 +30860,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft4 + vfmul.vf v10, v16, ft5 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 774 @@ -30870,7 +30870,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft5 + vfmul.vf v10, v16, ft4 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 626 @@ -31153,7 +31153,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, ft4 + vfmul.vf v12, v12, ft5 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 558 @@ -31163,7 +31163,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, ft5 + vfmul.vf v12, v12, ft4 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 662 @@ -31759,8 +31759,8 @@ vl8r.v v16, (a0) # Unknown-size Folded Reload vfmul.vf v10, v16, ft1 vfadd.vv v8, v8, v10 - fld ft3, 480(a4) - fld ft4, 488(a4) + fld ft4, 480(a4) + fld ft3, 488(a4) csrr a0, vlenb li a1, 790 mul a0, a0, a1 @@ -31779,7 +31779,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft3 + vfmul.vf v10, v16, ft4 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 774 @@ -31789,7 +31789,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft4 + vfmul.vf v10, v16, ft3 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 626 @@ -32072,7 +32072,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, ft3 + vfmul.vf v12, v12, ft4 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 558 @@ -32082,7 +32082,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, ft4 + vfmul.vf v12, v12, ft3 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 662 @@ -32678,8 +32678,8 @@ vl8r.v v16, (a0) # Unknown-size Folded Reload vfmul.vf v10, v16, ft0 vfadd.vv v8, v8, v10 - fld ft2, 648(a4) - fld ft3, 656(a4) + fld ft3, 648(a4) + fld ft2, 656(a4) csrr a0, vlenb li a1, 790 mul a0, a0, a1 @@ -32698,7 +32698,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft2 + vfmul.vf v10, v16, ft3 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 774 @@ -32708,7 +32708,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft3 + vfmul.vf v10, v16, ft2 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 626 @@ -32991,7 +32991,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, ft2 + vfmul.vf v12, v12, ft3 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 558 @@ -33001,7 +33001,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, ft3 + vfmul.vf v12, v12, ft2 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 662 @@ -33597,8 +33597,8 @@ vl8r.v v16, (a0) # Unknown-size Folded Reload vfmul.vf v10, v16, fa0 vfadd.vv v8, v8, v10 - fld ft1, 816(a4) - fld ft2, 824(a4) + fld ft2, 816(a4) + fld ft1, 824(a4) csrr a0, vlenb li a1, 790 mul a0, a0, a1 @@ -33617,7 +33617,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft1 + vfmul.vf v10, v16, ft2 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 774 @@ -33627,7 +33627,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft2 + vfmul.vf v10, v16, ft1 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 626 @@ -33910,7 +33910,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, ft1 + vfmul.vf v12, v12, ft2 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 558 @@ -33920,7 +33920,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, ft2 + vfmul.vf v12, v12, ft1 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 662 @@ -34517,8 +34517,8 @@ vl8r.v v16, (a0) # Unknown-size Folded Reload vfmul.vf v10, v16, fa1 vfadd.vv v8, v8, v10 - fld ft0, 984(a4) - fld ft1, 992(a4) + fld ft1, 984(a4) + fld ft0, 992(a4) csrr a0, vlenb li a1, 790 mul a0, a0, a1 @@ -34537,7 +34537,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft0 + vfmul.vf v10, v16, ft1 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 774 @@ -34547,7 +34547,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft1 + vfmul.vf v10, v16, ft0 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 626 @@ -34831,7 +34831,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, ft0 + vfmul.vf v12, v12, ft1 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 558 @@ -34841,7 +34841,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, ft1 + vfmul.vf v12, v12, ft0 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 662 @@ -35438,8 +35438,8 @@ vl8r.v v16, (a0) # Unknown-size Folded Reload vfmul.vf v10, v16, fa2 vfadd.vv v8, v8, v10 - fld fa0, 1152(a4) - fld ft0, 1160(a4) + fld ft0, 1152(a4) + fld fa0, 1160(a4) csrr a0, vlenb li a1, 790 mul a0, a0, a1 @@ -35458,7 +35458,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, fa0 + vfmul.vf v10, v16, ft0 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 774 @@ -35468,7 +35468,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft0 + vfmul.vf v10, v16, fa0 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 626 @@ -35752,7 +35752,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, fa0 + vfmul.vf v12, v12, ft0 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 558 @@ -35762,7 +35762,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, ft0 + vfmul.vf v12, v12, fa0 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 662 @@ -36359,8 +36359,8 @@ vl8r.v v16, (a0) # Unknown-size Folded Reload vfmul.vf v10, v16, fa3 vfadd.vv v8, v8, v10 - fld fa1, 1320(a4) - fld fa0, 1328(a4) + fld fa0, 1320(a4) + fld fa1, 1328(a4) csrr a0, vlenb li a1, 790 mul a0, a0, a1 @@ -36379,7 +36379,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, fa1 + vfmul.vf v10, v16, fa0 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 774 @@ -36389,7 +36389,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, fa0 + vfmul.vf v10, v16, fa1 vfadd.vv v10, v8, v10 csrr a0, vlenb li a1, 626 @@ -36673,7 +36673,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, fa1 + vfmul.vf v12, v12, fa0 vfadd.vv v8, v8, v12 csrr a0, vlenb li a1, 558 @@ -36683,7 +36683,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, fa0 + vfmul.vf v12, v12, fa1 vfadd.vv v8, v8, v12 csrr a0, vlenb li a1, 662 @@ -37305,10 +37305,10 @@ addiw a1, a1, -976 add a0, a0, a1 vs2r.v v8, (a0) # Unknown-size Folded Spill - fld fa4, 1472(a4) - fld fa3, 1480(a4) - fld fa2, 1488(a4) - fld fa1, 1496(a4) + fld fa1, 1472(a4) + fld fa2, 1480(a4) + fld fa3, 1488(a4) + fld fa4, 1496(a4) csrr a0, vlenb li a1, 702 mul a0, a0, a1 @@ -37317,7 +37317,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v8, v16, fa4 + vfmul.vf v8, v16, fa1 csrr a0, vlenb li a1, 702 mul a0, a0, a1 @@ -37334,7 +37334,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v8, v16, fa3 + vfmul.vf v8, v16, fa2 csrr a0, vlenb li a1, 320 mul a0, a0, a1 @@ -37351,7 +37351,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v8, v16, fa2 + vfmul.vf v8, v16, fa3 csrr a0, vlenb li a1, 782 mul a0, a0, a1 @@ -37368,7 +37368,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v8, v16, fa1 + vfmul.vf v8, v16, fa4 csrr a0, vlenb li a1, 774 mul a0, a0, a1 @@ -37849,7 +37849,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, fa4 + vfmul.vf v12, v12, fa1 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 574 @@ -37859,7 +37859,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, fa3 + vfmul.vf v12, v12, fa2 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 566 @@ -37869,7 +37869,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, fa2 + vfmul.vf v12, v12, fa3 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 558 @@ -37879,7 +37879,7 @@ addiw a1, a1, -976 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, fa1 + vfmul.vf v12, v12, fa4 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 550 @@ -38192,216 +38192,216 @@ add a1, a1, a2 vl8r.v v16, (a1) # Unknown-size Folded Reload vse64.v v16, (a0) + csrr a0, vlenb + li a1, 328 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 3 + addiw a1, a1, -976 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload addi a0, sp, 328 - csrr a1, vlenb - li a2, 328 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 3 - addiw a2, a2, -976 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) - ld a0, 176(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 304 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 3 - addiw a2, a2, -976 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 304 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 3 + addiw a1, a1, -976 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 16(sp) # 8-byte Folded Reload vse64.v v8, (a0) - ld a0, 168(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 280 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 3 - addiw a2, a2, -976 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 280 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 3 + addiw a1, a1, -976 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 24(sp) # 8-byte Folded Reload vse64.v v8, (a0) - ld a0, 160(sp) # 8-byte Folded Reload - csrr a1, vlenb - slli a1, a1, 8 - add a1, sp, a1 - lui a2, 3 - addiw a2, a2, -976 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + slli a0, a0, 8 + add a0, sp, a0 + lui a1, 3 + addiw a1, a1, -976 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 32(sp) # 8-byte Folded Reload vse64.v v8, (a0) - ld a0, 152(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 232 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 3 - addiw a2, a2, -976 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 232 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 3 + addiw a1, a1, -976 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 40(sp) # 8-byte Folded Reload vse64.v v8, (a0) - ld a0, 144(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 208 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 3 - addiw a2, a2, -976 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 208 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 3 + addiw a1, a1, -976 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 48(sp) # 8-byte Folded Reload vse64.v v8, (a0) - ld a0, 136(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 184 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 3 - addiw a2, a2, -976 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 184 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 3 + addiw a1, a1, -976 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 56(sp) # 8-byte Folded Reload vse64.v v8, (a0) - ld a0, 128(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 160 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 3 - addiw a2, a2, -976 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 160 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 3 + addiw a1, a1, -976 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 64(sp) # 8-byte Folded Reload vse64.v v8, (a0) - ld a0, 120(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 136 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 3 - addiw a2, a2, -976 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 136 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 3 + addiw a1, a1, -976 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 72(sp) # 8-byte Folded Reload vse64.v v8, (a0) - ld a0, 112(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 112 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 3 - addiw a2, a2, -976 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 112 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 3 + addiw a1, a1, -976 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 80(sp) # 8-byte Folded Reload vse64.v v8, (a0) - ld a0, 104(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 120 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 3 - addiw a2, a2, -976 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 120 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 3 + addiw a1, a1, -976 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 88(sp) # 8-byte Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + li a1, 144 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 3 + addiw a1, a1, -976 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload ld a0, 96(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 144 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 3 - addiw a2, a2, -976 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) - ld a0, 88(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 168 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 3 - addiw a2, a2, -976 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 168 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 3 + addiw a1, a1, -976 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 104(sp) # 8-byte Folded Reload vse64.v v8, (a0) - ld a0, 80(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 192 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 3 - addiw a2, a2, -976 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 192 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 3 + addiw a1, a1, -976 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 112(sp) # 8-byte Folded Reload vse64.v v8, (a0) - ld a0, 72(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 216 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 3 - addiw a2, a2, -976 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 216 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 3 + addiw a1, a1, -976 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 120(sp) # 8-byte Folded Reload vse64.v v8, (a0) - ld a0, 64(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 240 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 3 - addiw a2, a2, -976 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 240 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 3 + addiw a1, a1, -976 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 128(sp) # 8-byte Folded Reload vse64.v v8, (a0) - ld a0, 56(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 264 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 3 - addiw a2, a2, -976 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 264 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 3 + addiw a1, a1, -976 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 136(sp) # 8-byte Folded Reload vse64.v v8, (a0) - ld a0, 48(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 288 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 3 - addiw a2, a2, -976 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 288 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 3 + addiw a1, a1, -976 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 144(sp) # 8-byte Folded Reload vse64.v v8, (a0) - ld a0, 40(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 312 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 3 - addiw a2, a2, -976 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 312 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 3 + addiw a1, a1, -976 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 152(sp) # 8-byte Folded Reload vse64.v v8, (a0) - ld a0, 32(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 336 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 3 - addiw a2, a2, -976 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 336 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 3 + addiw a1, a1, -976 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 160(sp) # 8-byte Folded Reload vse64.v v8, (a0) - ld a0, 24(sp) # 8-byte Folded Reload - csrr a1, vlenb - li a2, 352 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 3 - addiw a2, a2, -976 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 352 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 3 + addiw a1, a1, -976 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a0, 176(sp) # 8-byte Folded Reload vse64.v v8, (a0) - ld a0, 16(sp) # 8-byte Folded Reload + ld a0, 168(sp) # 8-byte Folded Reload vse64.v v24, (a0) addi a0, sp, 2047 addi a0, a0, 41 @@ -43609,8 +43609,8 @@ vl8r.v v0, (a0) # Unknown-size Folded Reload vfmul.vv v12, v0, v20 vfadd.vv v8, v8, v12 - fld ft4, 128(a3) - fld ft5, 136(a3) + fld ft5, 128(a3) + fld ft4, 136(a3) csrr a0, vlenb li a1, 986 mul a0, a0, a1 @@ -43629,7 +43629,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v0, ft4 + vfmul.vf v12, v0, ft5 vfadd.vv v8, v8, v12 csrr a0, vlenb li a1, 970 @@ -43639,7 +43639,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v0, ft5 + vfmul.vf v12, v0, ft4 vfadd.vv v8, v8, v12 csrr a0, vlenb li a1, 140 @@ -43932,7 +43932,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, ft4 + vfmul.vf v12, v12, ft5 vfadd.vv v8, v8, v12 csrr a0, vlenb li a1, 698 @@ -43942,7 +43942,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, ft5 + vfmul.vf v12, v12, ft4 vfadd.vv v8, v8, v12 csrr a0, vlenb li a1, 108 @@ -44182,7 +44182,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v0, ft4 + vfmul.vf v12, v0, ft5 vfadd.vv v8, v8, v12 csrr a0, vlenb li a1, 554 @@ -44192,7 +44192,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v0, ft5 + vfmul.vf v12, v0, ft4 vfadd.vv v8, v8, v12 csrr a0, vlenb li a1, 100 @@ -44432,7 +44432,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload - vfmul.vf v14, v0, ft4 + vfmul.vf v14, v0, ft5 vfadd.vv v12, v12, v14 csrr a0, vlenb li a1, 322 @@ -44442,7 +44442,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload - vfmul.vf v14, v0, ft5 + vfmul.vf v14, v0, ft4 vfadd.vv v12, v12, v14 csrr a0, vlenb li a1, 1018 @@ -44793,7 +44793,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v12, ft4 + vfmul.vf v10, v12, ft5 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 878 @@ -44803,7 +44803,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v12, ft5 + vfmul.vf v10, v12, ft4 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 538 @@ -45004,7 +45004,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, ft4 + vfmul.vf v12, v12, ft5 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 466 @@ -45014,7 +45014,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, ft5 + vfmul.vf v12, v12, ft4 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 898 @@ -45642,8 +45642,8 @@ vl8r.v v24, (a0) # Unknown-size Folded Reload vfmul.vv v10, v24, v20 vfadd.vv v8, v8, v10 - fld ft3, 280(a3) - fld ft4, 288(a3) + fld ft4, 280(a3) + fld ft3, 288(a3) csrr a0, vlenb li a1, 986 mul a0, a0, a1 @@ -45662,7 +45662,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v24, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v24, ft3 + vfmul.vf v10, v24, ft4 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 970 @@ -45672,7 +45672,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v24, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v24, ft4 + vfmul.vf v10, v24, ft3 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 100 @@ -45976,7 +45976,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v12, ft3 + vfmul.vf v10, v12, ft4 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 698 @@ -45986,7 +45986,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v12, ft4 + vfmul.vf v10, v12, ft3 vfadd.vv v8, v8, v10 csrr a0, vlenb slli a0, a0, 1 @@ -46226,7 +46226,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v24, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v24, ft3 + vfmul.vf v10, v24, ft4 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 554 @@ -46236,7 +46236,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v24, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v24, ft4 + vfmul.vf v10, v24, ft3 vfadd.vv v8, v8, v10 lui a0, 3 addiw a0, a0, 1472 @@ -46472,7 +46472,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v24, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v24, ft3 + vfmul.vf v12, v24, ft4 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 322 @@ -46482,7 +46482,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v24, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v24, ft4 + vfmul.vf v12, v24, ft3 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 1018 @@ -46836,7 +46836,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v12, ft3 + vfmul.vf v10, v12, ft4 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 878 @@ -46846,7 +46846,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v12, ft4 + vfmul.vf v10, v12, ft3 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 538 @@ -47047,7 +47047,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, ft3 + vfmul.vf v12, v12, ft4 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 466 @@ -47057,7 +47057,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, ft4 + vfmul.vf v12, v12, ft3 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 898 @@ -47668,8 +47668,8 @@ vl8r.v v16, (a0) # Unknown-size Folded Reload vfmul.vv v10, v16, v26 vfadd.vv v8, v8, v10 - fld ft2, 432(a3) - fld ft3, 440(a3) + fld ft3, 432(a3) + fld ft2, 440(a3) csrr a0, vlenb li a1, 986 mul a0, a0, a1 @@ -47688,7 +47688,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft2 + vfmul.vf v10, v16, ft3 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 970 @@ -47698,7 +47698,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft3 + vfmul.vf v10, v16, ft2 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 68 @@ -48002,7 +48002,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v12, ft2 + vfmul.vf v10, v12, ft3 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 698 @@ -48012,7 +48012,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v12, ft3 + vfmul.vf v10, v12, ft2 vfadd.vv v8, v8, v10 csrr a0, vlenb slli a0, a0, 1 @@ -48253,7 +48253,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft2 + vfmul.vf v10, v16, ft3 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 554 @@ -48263,7 +48263,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft3 + vfmul.vf v10, v16, ft2 vfadd.vv v10, v8, v10 csrr a0, vlenb li a1, 530 @@ -48479,7 +48479,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v16, ft2 + vfmul.vf v12, v16, ft3 vfadd.vv v8, v8, v12 csrr a0, vlenb li a1, 322 @@ -48489,7 +48489,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v16, ft3 + vfmul.vf v12, v16, ft2 vfadd.vv v12, v8, v12 csrr a0, vlenb li a1, 1018 @@ -48855,7 +48855,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v12, ft2 + vfmul.vf v10, v12, ft3 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 878 @@ -48865,7 +48865,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v12, ft3 + vfmul.vf v10, v12, ft2 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 538 @@ -49066,7 +49066,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, ft2 + vfmul.vf v12, v12, ft3 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 466 @@ -49076,7 +49076,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, ft3 + vfmul.vf v12, v12, ft2 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 898 @@ -49687,8 +49687,8 @@ vl8r.v v16, (a0) # Unknown-size Folded Reload vfmul.vv v10, v16, v26 vfadd.vv v8, v8, v10 - fld ft1, 584(a3) - fld ft2, 592(a3) + fld ft2, 584(a3) + fld ft1, 592(a3) csrr a0, vlenb li a1, 986 mul a0, a0, a1 @@ -49707,7 +49707,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft1 + vfmul.vf v10, v16, ft2 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 970 @@ -49717,7 +49717,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft2 + vfmul.vf v10, v16, ft1 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 36 @@ -50021,7 +50021,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v12, ft1 + vfmul.vf v10, v12, ft2 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 698 @@ -50031,7 +50031,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v12, ft2 + vfmul.vf v10, v12, ft1 vfadd.vv v8, v8, v10 csrr a0, vlenb slli a0, a0, 1 @@ -50272,7 +50272,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft1 + vfmul.vf v10, v16, ft2 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 554 @@ -50282,7 +50282,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft2 + vfmul.vf v10, v16, ft1 vfadd.vv v10, v8, v10 csrr a0, vlenb li a1, 530 @@ -50498,7 +50498,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v16, ft1 + vfmul.vf v12, v16, ft2 vfadd.vv v8, v8, v12 csrr a0, vlenb li a1, 322 @@ -50508,7 +50508,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v16, ft2 + vfmul.vf v12, v16, ft1 vfadd.vv v12, v8, v12 csrr a0, vlenb li a1, 1018 @@ -50874,7 +50874,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v12, ft1 + vfmul.vf v10, v12, ft2 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 878 @@ -50884,7 +50884,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v12, ft2 + vfmul.vf v10, v12, ft1 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 538 @@ -51085,7 +51085,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, ft1 + vfmul.vf v12, v12, ft2 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 466 @@ -51095,7 +51095,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, ft2 + vfmul.vf v12, v12, ft1 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 898 @@ -51698,8 +51698,8 @@ vl8r.v v16, (a0) # Unknown-size Folded Reload vfmul.vv v10, v16, v24 vfadd.vv v8, v8, v10 - fld ft0, 736(a3) - fld ft1, 744(a3) + fld ft1, 736(a3) + fld ft0, 744(a3) csrr a0, vlenb li a1, 986 mul a0, a0, a1 @@ -51718,7 +51718,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft0 + vfmul.vf v10, v16, ft1 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 970 @@ -51728,7 +51728,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft1 + vfmul.vf v10, v16, ft0 vfadd.vv v8, v8, v10 csrr a0, vlenb slli a0, a0, 2 @@ -52031,7 +52031,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v12, ft0 + vfmul.vf v10, v12, ft1 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 698 @@ -52041,7 +52041,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v12, ft1 + vfmul.vf v10, v12, ft0 vfadd.vv v8, v8, v10 csrr a0, vlenb slli a0, a0, 1 @@ -52281,7 +52281,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft0 + vfmul.vf v10, v16, ft1 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 554 @@ -52291,7 +52291,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft1 + vfmul.vf v10, v16, ft0 vfadd.vv v10, v8, v10 csrr a0, vlenb li a1, 530 @@ -52508,7 +52508,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v16, ft0 + vfmul.vf v12, v16, ft1 vfadd.vv v8, v8, v12 csrr a0, vlenb li a1, 322 @@ -52518,7 +52518,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v16, ft1 + vfmul.vf v12, v16, ft0 vfadd.vv v12, v8, v12 csrr a0, vlenb li a1, 1018 @@ -52882,7 +52882,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v12, ft0 + vfmul.vf v10, v12, ft1 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 878 @@ -52892,7 +52892,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v12, ft1 + vfmul.vf v10, v12, ft0 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 538 @@ -53093,7 +53093,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, ft0 + vfmul.vf v12, v12, ft1 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 466 @@ -53103,7 +53103,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, ft1 + vfmul.vf v12, v12, ft0 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 898 @@ -53707,8 +53707,8 @@ vl8r.v v16, (a0) # Unknown-size Folded Reload vfmul.vv v10, v16, v24 vfadd.vv v8, v8, v10 - fld fa0, 888(a3) - fld ft0, 896(a3) + fld ft0, 888(a3) + fld fa0, 896(a3) csrr a0, vlenb li a1, 986 mul a0, a0, a1 @@ -53727,7 +53727,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, fa0 + vfmul.vf v10, v16, ft0 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 970 @@ -53737,7 +53737,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft0 + vfmul.vf v10, v16, fa0 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 20 @@ -54041,7 +54041,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v12, fa0 + vfmul.vf v10, v12, ft0 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 698 @@ -54051,7 +54051,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v12, ft0 + vfmul.vf v10, v12, fa0 vfadd.vv v8, v8, v10 csrr a0, vlenb slli a0, a0, 1 @@ -54291,7 +54291,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, fa0 + vfmul.vf v10, v16, ft0 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 554 @@ -54301,7 +54301,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, ft0 + vfmul.vf v10, v16, fa0 vfadd.vv v10, v8, v10 csrr a0, vlenb li a1, 530 @@ -54518,7 +54518,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v16, fa0 + vfmul.vf v12, v16, ft0 vfadd.vv v8, v8, v12 csrr a0, vlenb li a1, 322 @@ -54528,7 +54528,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v16, ft0 + vfmul.vf v12, v16, fa0 vfadd.vv v12, v8, v12 csrr a0, vlenb li a1, 1018 @@ -54894,7 +54894,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v12, fa0 + vfmul.vf v10, v12, ft0 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 878 @@ -54904,7 +54904,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v12, ft0 + vfmul.vf v10, v12, fa0 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 538 @@ -55105,7 +55105,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, fa0 + vfmul.vf v12, v12, ft0 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 466 @@ -55115,7 +55115,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, ft0 + vfmul.vf v12, v12, fa0 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 898 @@ -55719,8 +55719,8 @@ vl8r.v v16, (a0) # Unknown-size Folded Reload vfmul.vv v10, v16, v24 vfadd.vv v8, v8, v10 - fld fa1, 1040(a3) - fld fa0, 1048(a3) + fld fa0, 1040(a3) + fld fa1, 1048(a3) csrr a0, vlenb li a1, 986 mul a0, a0, a1 @@ -55739,7 +55739,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, fa1 + vfmul.vf v10, v16, fa0 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 970 @@ -55749,7 +55749,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, fa0 + vfmul.vf v10, v16, fa1 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 52 @@ -56053,7 +56053,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v12, fa1 + vfmul.vf v10, v12, fa0 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 698 @@ -56063,7 +56063,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v12, fa0 + vfmul.vf v10, v12, fa1 vfadd.vv v8, v8, v10 csrr a0, vlenb slli a0, a0, 1 @@ -56303,7 +56303,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, fa1 + vfmul.vf v10, v16, fa0 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 554 @@ -56313,7 +56313,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, fa0 + vfmul.vf v10, v16, fa1 vfadd.vv v10, v8, v10 csrr a0, vlenb li a1, 530 @@ -56530,7 +56530,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v16, fa1 + vfmul.vf v12, v16, fa0 vfadd.vv v8, v8, v12 csrr a0, vlenb li a1, 322 @@ -56540,7 +56540,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v16, fa0 + vfmul.vf v12, v16, fa1 vfadd.vv v12, v8, v12 csrr a0, vlenb li a1, 1018 @@ -56906,7 +56906,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v12, fa1 + vfmul.vf v10, v12, fa0 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 878 @@ -56916,7 +56916,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v12, fa0 + vfmul.vf v10, v12, fa1 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 538 @@ -57117,7 +57117,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, fa1 + vfmul.vf v12, v12, fa0 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 466 @@ -57127,7 +57127,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, fa0 + vfmul.vf v12, v12, fa1 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 898 @@ -57731,8 +57731,8 @@ vl8r.v v16, (a0) # Unknown-size Folded Reload vfmul.vv v10, v16, v24 vfadd.vv v8, v8, v10 - fld fa2, 1192(a3) - fld fa1, 1200(a3) + fld fa1, 1192(a3) + fld fa2, 1200(a3) csrr a0, vlenb li a1, 986 mul a0, a0, a1 @@ -57751,7 +57751,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, fa2 + vfmul.vf v10, v16, fa1 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 970 @@ -57761,7 +57761,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, fa1 + vfmul.vf v10, v16, fa2 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 84 @@ -58065,7 +58065,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v12, fa2 + vfmul.vf v10, v12, fa1 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 698 @@ -58075,7 +58075,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v12, fa1 + vfmul.vf v10, v12, fa2 vfadd.vv v8, v8, v10 csrr a0, vlenb slli a0, a0, 1 @@ -58315,7 +58315,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, fa2 + vfmul.vf v10, v16, fa1 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 554 @@ -58325,7 +58325,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, fa1 + vfmul.vf v10, v16, fa2 vfadd.vv v10, v8, v10 csrr a0, vlenb li a1, 530 @@ -58542,7 +58542,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v16, fa2 + vfmul.vf v12, v16, fa1 vfadd.vv v8, v8, v12 csrr a0, vlenb li a1, 322 @@ -58552,7 +58552,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v16, fa1 + vfmul.vf v12, v16, fa2 vfadd.vv v12, v8, v12 csrr a0, vlenb li a1, 1018 @@ -58918,7 +58918,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v12, fa2 + vfmul.vf v10, v12, fa1 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 878 @@ -58928,7 +58928,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v12, fa1 + vfmul.vf v10, v12, fa2 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 538 @@ -59129,7 +59129,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, fa2 + vfmul.vf v12, v12, fa1 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 466 @@ -59139,7 +59139,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, fa1 + vfmul.vf v12, v12, fa2 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 898 @@ -59743,8 +59743,8 @@ vl8r.v v16, (a0) # Unknown-size Folded Reload vfmul.vv v10, v16, v26 vfadd.vv v8, v8, v10 - fld fa3, 1344(a3) - fld fa2, 1352(a3) + fld fa2, 1344(a3) + fld fa3, 1352(a3) csrr a0, vlenb li a1, 986 mul a0, a0, a1 @@ -59763,7 +59763,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, fa3 + vfmul.vf v10, v16, fa2 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 970 @@ -59773,7 +59773,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, fa2 + vfmul.vf v10, v16, fa3 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 124 @@ -60077,7 +60077,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v12, fa3 + vfmul.vf v10, v12, fa2 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 698 @@ -60087,7 +60087,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v12, fa2 + vfmul.vf v10, v12, fa3 vfadd.vv v8, v8, v10 csrr a0, vlenb slli a0, a0, 1 @@ -60327,7 +60327,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, fa3 + vfmul.vf v10, v16, fa2 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 554 @@ -60337,7 +60337,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v16, fa2 + vfmul.vf v10, v16, fa3 vfadd.vv v10, v8, v10 csrr a0, vlenb li a1, 530 @@ -60554,7 +60554,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v16, fa3 + vfmul.vf v12, v16, fa2 vfadd.vv v8, v8, v12 csrr a0, vlenb li a1, 322 @@ -60564,7 +60564,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v16, fa2 + vfmul.vf v12, v16, fa3 vfadd.vv v12, v8, v12 csrr a0, vlenb li a1, 1018 @@ -60930,7 +60930,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v12, fa3 + vfmul.vf v10, v12, fa2 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 878 @@ -60940,7 +60940,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v12, fa2 + vfmul.vf v10, v12, fa3 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 538 @@ -61141,7 +61141,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, fa3 + vfmul.vf v12, v12, fa2 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 466 @@ -61151,7 +61151,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v12, v12, fa2 + vfmul.vf v12, v12, fa3 vfadd.vv v10, v10, v12 csrr a0, vlenb li a1, 898 @@ -61783,8 +61783,8 @@ addiw a1, a1, 1472 add a0, a0, a1 vs2r.v v12, (a0) # Unknown-size Folded Spill - fld fa4, 1496(a3) - fld fa3, 1504(a3) + fld fa3, 1496(a3) + fld fa4, 1504(a3) vrgather.vi v16, v8, 3 csrr a0, vlenb li a1, 1066 @@ -61819,7 +61819,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vfmul.vf v8, v8, fa4 + vfmul.vf v8, v8, fa3 csrr a0, vlenb li a1, 1026 mul a0, a0, a1 @@ -61836,7 +61836,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vfmul.vf v8, v8, fa3 + vfmul.vf v8, v8, fa4 csrr a0, vlenb li a1, 970 mul a0, a0, a1 @@ -62270,7 +62270,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vfmul.vf v8, v8, fa4 + vfmul.vf v8, v8, fa3 csrr a0, vlenb li a1, 562 mul a0, a0, a1 @@ -62287,7 +62287,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vfmul.vf v8, v8, fa3 + vfmul.vf v8, v8, fa4 csrr a0, vlenb li a1, 554 mul a0, a0, a1 @@ -62626,7 +62626,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vfmul.vf v8, v8, fa4 + vfmul.vf v8, v8, fa3 csrr a0, vlenb li a1, 338 mul a0, a0, a1 @@ -62643,7 +62643,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v8, fa3 + vfmul.vf v10, v8, fa4 csrr a0, vlenb li a1, 314 mul a0, a0, a1 @@ -62962,7 +62962,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v20, (a0) # Unknown-size Folded Reload - vfmul.vf v14, v20, fa4 + vfmul.vf v14, v20, fa3 vfadd.vv v12, v12, v14 csrr a0, vlenb li a1, 698 @@ -62972,7 +62972,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v20, (a0) # Unknown-size Folded Reload - vfmul.vf v14, v20, fa3 + vfmul.vf v14, v20, fa4 vfadd.vv v12, v12, v14 csrr a0, vlenb li a1, 310 @@ -63955,7 +63955,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v12, fa4 + vfmul.vf v10, v12, fa3 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 878 @@ -63965,7 +63965,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v12, (a0) # Unknown-size Folded Reload - vfmul.vf v10, v12, fa3 + vfmul.vf v10, v12, fa4 vfadd.vv v8, v8, v10 csrr a0, vlenb li a1, 898 @@ -64103,7 +64103,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v14, v16, fa4 + vfmul.vf v14, v16, fa3 vfadd.vv v12, v12, v14 csrr a0, vlenb li a1, 466 @@ -64113,7 +64113,7 @@ addiw a1, a1, 1472 add a0, a0, a1 vl4r.v v16, (a0) # Unknown-size Folded Reload - vfmul.vf v14, v16, fa3 + vfmul.vf v14, v16, fa4 vfadd.vv v12, v12, v14 csrr a0, vlenb li a1, 450 @@ -65108,7 +65108,7 @@ mul a2, a2, a3 sub sp, sp, a2 andi sp, sp, -128 - sd a0, 48(sp) # 8-byte Folded Spill + sd a0, 80(sp) # 8-byte Folded Spill li s10, 0 li s11, 0 addi a0, a1, 124 @@ -65291,387 +65291,336 @@ addiw a0, a0, -1792 add a0, sp, a0 vse32.v v16, (a0) - vsetivli zero, 1, e32, mf2, ta, ma - vfmv.f.s fa4, v8 - vfmv.f.s fa5, v16 - lui a0, 63 - addiw a0, a0, -1716 - add s9, sp, a0 - lui a0, 63 - addiw a0, a0, -1720 - add t6, sp, a0 - lui a0, 63 - addiw a0, a0, -1724 - add s2, sp, a0 - lui a0, 63 - addiw a0, a0, -1728 - add ra, sp, a0 - lui a0, 63 - addiw a0, a0, -1732 + lui a0, 62 + addiw a0, a0, 352 add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1736 + vsetivli zero, 1, e32, mf2, ta, ma + lui a1, 62 + addiw a1, a1, 348 add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1740 + lui a2, 62 + addiw a2, a2, 344 add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1744 + lui a3, 62 + addiw a3, a3, 340 add a3, sp, a3 - lui a4, 63 - addiw a4, a4, -1748 + lui a4, 62 + addiw a4, a4, 336 add a4, sp, a4 - lui a5, 63 - addiw a5, a5, -1752 + lui a5, 62 + addiw a5, a5, 332 add a5, sp, a5 - lui a6, 63 - addiw a6, a6, -1756 + lui a6, 62 + addiw a6, a6, 328 add a6, sp, a6 - lui a7, 63 - addiw a7, a7, -1760 + lui a7, 62 + addiw a7, a7, 324 add a7, sp, a7 lui t0, 62 - addiw t0, t0, 376 + addiw t0, t0, 320 add t0, sp, t0 lui t1, 62 - addiw t1, t1, 372 + addiw t1, t1, 316 add t1, sp, t1 lui t2, 62 - addiw t2, t2, 368 + addiw t2, t2, 312 add t2, sp, t2 lui t3, 62 - addiw t3, t3, 364 + addiw t3, t3, 308 add t3, sp, t3 lui t4, 62 - addiw t4, t4, 360 + addiw t4, t4, 304 add t4, sp, t4 lui t5, 62 - addiw t5, t5, 356 + addiw t5, t5, 300 add t5, sp, t5 - lui s3, 63 - addiw s3, s3, -1672 - add s7, sp, s3 - lui s3, 63 - addiw s3, s3, -1676 - add s8, sp, s3 - lui s3, 63 - addiw s3, s3, -1684 - add s4, sp, s3 - lui s3, 63 - addiw s3, s3, -1688 - add s5, sp, s3 - lui s3, 63 - addiw s3, s3, -1692 - add s6, sp, s3 - lui s3, 62 - addiw s3, s3, 352 - add s3, sp, s3 - vle32.v v24, (s3) - csrr s3, vlenb - li s10, 464 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v24, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 348 - add s3, sp, s3 - vle32.v v24, (s3) - csrr s3, vlenb - li s10, 448 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v24, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 344 - add s3, sp, s3 - vle32.v v24, (s3) - csrr s3, vlenb - li s10, 424 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v24, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 340 - add s3, sp, s3 - vle32.v v24, (s3) - csrr s3, vlenb - li s10, 392 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v24, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 336 - add s3, sp, s3 - vle32.v v24, (s3) - csrr s3, vlenb - li s10, 352 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v24, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 332 - add s3, sp, s3 - vle32.v v24, (s3) - csrr s3, vlenb - li s10, 312 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v24, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 328 - add s3, sp, s3 - vle32.v v24, (s3) - csrr s3, vlenb - li s10, 280 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v24, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 324 - add s3, sp, s3 - vle32.v v24, (s3) - csrr s3, vlenb - slli s3, s3, 8 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v24, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 320 - add s3, sp, s3 - vle32.v v24, (s3) - csrr s3, vlenb - li s10, 240 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v24, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 316 - add s3, sp, s3 - vle32.v v24, (s3) - csrr s3, vlenb - li s10, 232 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v24, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 312 - add s3, sp, s3 - vle32.v v24, (s3) - csrr s3, vlenb - li s10, 224 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v24, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 308 - add s3, sp, s3 - vle32.v v24, (s3) - csrr s3, vlenb - li s10, 216 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v24, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 304 - add s3, sp, s3 - vle32.v v24, (s3) - csrr s3, vlenb - li s10, 208 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v24, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 300 - add s3, sp, s3 - vle32.v v24, (s3) - csrr s3, vlenb - li s10, 200 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v24, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 296 - add s3, sp, s3 - vle32.v v24, (s3) - csrr s3, vlenb - li s10, 192 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v24, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 292 - add s3, sp, s3 - vle32.v v24, (s3) - csrr s3, vlenb - li s10, 184 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v24, (s3) # Unknown-size Folded Spill + lui t6, 62 + addiw t6, t6, 296 + add t6, sp, t6 + lui s2, 62 + addiw s2, s2, 292 + add s2, sp, s2 lui s3, 62 addiw s3, s3, 288 add s3, sp, s3 - vle32.v v24, (s3) - csrr s3, vlenb - li s10, 176 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v24, (s3) # Unknown-size Folded Spill - lui s3, 63 - addiw s3, s3, -1696 - add s3, sp, s3 - vle32.v v24, (s3) - csrr s3, vlenb - li s10, 856 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v24, (s3) # Unknown-size Folded Spill - lui s3, 63 - addiw s3, s3, -1700 - add s3, sp, s3 - vle32.v v24, (s3) - csrr s3, vlenb - li s10, 792 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v24, (s3) # Unknown-size Folded Spill - lui s3, 63 - addiw s3, s3, -1704 - add s3, sp, s3 - vle32.v v24, (s3) - csrr s3, vlenb - li s10, 744 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v24, (s3) # Unknown-size Folded Spill - lui s3, 63 - addiw s3, s3, -1708 - add s3, sp, s3 - vle32.v v24, (s3) - csrr s3, vlenb - li s10, 704 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v24, (s3) # Unknown-size Folded Spill - lui s3, 63 - addiw s3, s3, -1712 - add s3, sp, s3 - vle32.v v24, (s3) - csrr s3, vlenb - li s10, 672 - mul s3, s3, s10 - add s3, sp, s3 + lui s4, 63 + addiw s4, s4, -1696 + add s4, sp, s4 + lui s5, 63 + addiw s5, s5, -1700 + add s5, sp, s5 + lui s6, 63 + addiw s6, s6, -1704 + add s6, sp, s6 + lui s7, 63 + addiw s7, s7, -1708 + add ra, sp, s7 + lui s7, 63 + addiw s7, s7, -1712 + add s7, sp, s7 + vfmv.f.s fa4, v8 + vfmv.f.s fa5, v16 + lui s8, 63 + addiw s8, s8, -1716 + add s8, sp, s8 + lui s9, 63 + addiw s9, s9, -1720 + add s9, sp, s9 + vle32.v v24, (a0) + csrr a0, vlenb + li s10, 464 + mul a0, a0, s10 + add a0, sp, a0 lui s10, 63 addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v24, (s3) # Unknown-size Folded Spill - vle32.v v24, (s9) - csrr s3, vlenb - li s9, 648 - mul s3, s3, s9 - add s3, sp, s3 - lui s9, 63 - addiw s9, s9, -1632 - add s3, s3, s9 - vs8r.v v24, (s3) # Unknown-size Folded Spill + add a0, a0, s10 + vs8r.v v24, (a0) # Unknown-size Folded Spill + vle32.v v24, (a1) + csrr a0, vlenb + li a1, 448 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill + vle32.v v24, (a2) + csrr a0, vlenb + li a1, 424 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill + vle32.v v24, (a3) + csrr a0, vlenb + li a1, 392 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill + vle32.v v24, (a4) + csrr a0, vlenb + li a1, 352 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill + vle32.v v24, (a5) + csrr a0, vlenb + li a1, 312 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill + vle32.v v24, (a6) + csrr a0, vlenb + li a1, 280 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill + vle32.v v24, (a7) + csrr a0, vlenb + slli a0, a0, 8 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill + vle32.v v24, (t0) + csrr a0, vlenb + li a1, 240 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill + vle32.v v24, (t1) + csrr a0, vlenb + li a1, 232 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill + vle32.v v24, (t2) + csrr a0, vlenb + li a1, 224 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill + vle32.v v24, (t3) + csrr a0, vlenb + li a1, 216 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill + vle32.v v24, (t4) + csrr a0, vlenb + li a1, 208 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill + vle32.v v24, (t5) + csrr a0, vlenb + li a1, 200 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill vle32.v v24, (t6) - csrr t6, vlenb - li s3, 632 - mul t6, t6, s3 - add t6, sp, t6 - lui s3, 63 - addiw s3, s3, -1632 - add t6, t6, s3 - vs8r.v v24, (t6) # Unknown-size Folded Spill + csrr a0, vlenb + li a1, 192 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill vle32.v v24, (s2) - csrr t6, vlenb - li s2, 616 - mul t6, t6, s2 - add t6, sp, t6 - lui s2, 63 - addiw s2, s2, -1632 - add t6, t6, s2 - vs8r.v v24, (t6) # Unknown-size Folded Spill + csrr a0, vlenb + li a1, 184 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill + vle32.v v24, (s3) + csrr a0, vlenb + li a1, 176 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill + vle32.v v24, (s4) + csrr a0, vlenb + li a1, 856 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill + vle32.v v24, (s5) + csrr a0, vlenb + li a1, 792 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill + vle32.v v24, (s6) + csrr a0, vlenb + li a1, 744 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill vle32.v v24, (ra) - csrr t6, vlenb - li s2, 600 - mul t6, t6, s2 - add t6, sp, t6 - lui s2, 63 - addiw s2, s2, -1632 - add t6, t6, s2 - vs8r.v v24, (t6) # Unknown-size Folded Spill + csrr a0, vlenb + li a1, 704 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill + vle32.v v24, (s7) + csrr a0, vlenb + li a1, 672 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill + vle32.v v24, (s8) + csrr a0, vlenb + li a1, 648 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill + vle32.v v24, (s9) + csrr a0, vlenb + li a1, 632 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill + lui a0, 63 + addiw a0, a0, -1724 + add a0, sp, a0 vle32.v v24, (a0) csrr a0, vlenb - li t6, 584 - mul a0, a0, t6 + li a1, 616 + mul a0, a0, a1 add a0, sp, a0 - lui t6, 63 - addiw t6, t6, -1632 - add a0, a0, t6 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill - vle32.v v24, (a1) + lui a0, 63 + addiw a0, a0, -1728 + add a0, sp, a0 + vle32.v v24, (a0) + csrr a0, vlenb + li a1, 600 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill + lui a0, 63 + addiw a0, a0, -1732 + add a0, sp, a0 + vle32.v v24, (a0) + csrr a0, vlenb + li a1, 584 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill + lui a0, 63 + addiw a0, a0, -1736 + add a0, sp, a0 + vle32.v v24, (a0) csrr a0, vlenb li a1, 568 mul a0, a0, a1 @@ -65680,7 +65629,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill - vle32.v v24, (a2) + lui a0, 63 + addiw a0, a0, -1740 + add a0, sp, a0 + vle32.v v24, (a0) csrr a0, vlenb li a1, 552 mul a0, a0, a1 @@ -65689,7 +65641,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill - vle32.v v24, (a3) + lui a0, 63 + addiw a0, a0, -1744 + add a0, sp, a0 + vle32.v v24, (a0) csrr a0, vlenb li a1, 536 mul a0, a0, a1 @@ -65698,7 +65653,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill - vle32.v v24, (a4) + lui a0, 63 + addiw a0, a0, -1748 + add a0, sp, a0 + vle32.v v24, (a0) csrr a0, vlenb li a1, 520 mul a0, a0, a1 @@ -65707,7 +65665,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill - vle32.v v24, (a5) + lui a0, 63 + addiw a0, a0, -1752 + add a0, sp, a0 + vle32.v v24, (a0) csrr a0, vlenb li a1, 504 mul a0, a0, a1 @@ -65716,7 +65677,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill - vle32.v v24, (a6) + lui a0, 63 + addiw a0, a0, -1756 + add a0, sp, a0 + vle32.v v24, (a0) csrr a0, vlenb li a1, 488 mul a0, a0, a1 @@ -65725,7 +65689,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill - vle32.v v24, (a7) + lui a0, 63 + addiw a0, a0, -1760 + add a0, sp, a0 + vle32.v v24, (a0) csrr a0, vlenb li a1, 472 mul a0, a0, a1 @@ -65734,7 +65701,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill - vle32.v v24, (t0) + lui a0, 62 + addiw a0, a0, 376 + add a0, sp, a0 + vle32.v v24, (a0) csrr a0, vlenb li a1, 456 mul a0, a0, a1 @@ -65743,7 +65713,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill - vle32.v v24, (t1) + lui a0, 62 + addiw a0, a0, 372 + add a0, sp, a0 + vle32.v v24, (a0) csrr a0, vlenb li a1, 432 mul a0, a0, a1 @@ -65752,7 +65725,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill - vle32.v v24, (t2) + lui a0, 62 + addiw a0, a0, 368 + add a0, sp, a0 + vle32.v v24, (a0) csrr a0, vlenb li a1, 400 mul a0, a0, a1 @@ -65761,16 +65737,22 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill - vle32.v v24, (t3) + lui a0, 62 + addiw a0, a0, 364 + add a0, sp, a0 + vle32.v v24, (a0) csrr a0, vlenb - li a1, 360 + li a1, 368 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill - vle32.v v24, (t4) + lui a0, 62 + addiw a0, a0, 360 + add a0, sp, a0 + vle32.v v24, (a0) csrr a0, vlenb li a1, 320 mul a0, a0, a1 @@ -65779,7 +65761,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill - vle32.v v24, (t5) + lui a0, 62 + addiw a0, a0, 356 + add a0, sp, a0 + vle32.v v24, (a0) csrr a0, vlenb li a1, 288 mul a0, a0, a1 @@ -65798,7 +65783,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill - vle32.v v0, (s7) + lui a0, 63 + addiw a0, a0, -1672 + add a0, sp, a0 + vle32.v v0, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, 96 @@ -65808,7 +65796,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v0, (a0) # Unknown-size Folded Spill - vle32.v v0, (s8) + lui a0, 63 + addiw a0, a0, -1676 + add a0, sp, a0 + vle32.v v0, (a0) csrr a0, vlenb li a1, 848 mul a0, a0, a1 @@ -65829,7 +65820,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v0, (a0) # Unknown-size Folded Spill - vle32.v v0, (s4) + lui a0, 63 + addiw a0, a0, -1684 + add a0, sp, a0 + vle32.v v0, (a0) csrr a0, vlenb li a1, 736 mul a0, a0, a1 @@ -65838,7 +65832,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v0, (a0) # Unknown-size Folded Spill - vle32.v v0, (s5) + lui a0, 63 + addiw a0, a0, -1688 + add a0, sp, a0 + vle32.v v0, (a0) csrr a0, vlenb li a1, 696 mul a0, a0, a1 @@ -65847,7 +65844,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v0, (a0) # Unknown-size Folded Spill - vle32.v v0, (s6) + lui a0, 63 + addiw a0, a0, -1692 + add a0, sp, a0 + vle32.v v0, (a0) csrr a0, vlenb li a1, 664 mul a0, a0, a1 @@ -66040,388 +66040,337 @@ add a1, a1, a2 vl8r.v v24, (a1) # Unknown-size Folded Reload vse32.v v24, (a0) - vsetivli zero, 1, e32, mf2, ta, ma - vfmv.f.s fa4, v16 - vfmv.f.s fa5, v24 - lui a0, 62 - addiw a0, a0, 460 - add s9, sp, a0 - lui a0, 62 - addiw a0, a0, 456 - add t6, sp, a0 lui a0, 62 - addiw a0, a0, 452 - add s2, sp, a0 - lui a0, 62 - addiw a0, a0, 448 - add ra, sp, a0 - lui a0, 62 - addiw a0, a0, 444 + addiw a0, a0, 608 add a0, sp, a0 + vsetivli zero, 1, e32, mf2, ta, ma lui a1, 62 - addiw a1, a1, 440 + addiw a1, a1, 604 add a1, sp, a1 lui a2, 62 - addiw a2, a2, 436 + addiw a2, a2, 600 add a2, sp, a2 lui a3, 62 - addiw a3, a3, 432 + addiw a3, a3, 596 add a3, sp, a3 lui a4, 62 - addiw a4, a4, 428 + addiw a4, a4, 592 add a4, sp, a4 lui a5, 62 - addiw a5, a5, 424 + addiw a5, a5, 588 add a5, sp, a5 lui a6, 62 - addiw a6, a6, 420 + addiw a6, a6, 584 add a6, sp, a6 lui a7, 62 - addiw a7, a7, 416 + addiw a7, a7, 580 add a7, sp, a7 lui t0, 62 - addiw t0, t0, 632 + addiw t0, t0, 576 add t0, sp, t0 lui t1, 62 - addiw t1, t1, 628 + addiw t1, t1, 572 add t1, sp, t1 lui t2, 62 - addiw t2, t2, 624 + addiw t2, t2, 568 add t2, sp, t2 lui t3, 62 - addiw t3, t3, 620 + addiw t3, t3, 564 add t3, sp, t3 lui t4, 62 - addiw t4, t4, 616 + addiw t4, t4, 560 add t4, sp, t4 lui t5, 62 - addiw t5, t5, 612 + addiw t5, t5, 556 add t5, sp, t5 - lui s3, 62 - addiw s3, s3, 504 - add s7, sp, s3 - lui s3, 62 - addiw s3, s3, 500 - add s8, sp, s3 - lui s3, 62 - addiw s3, s3, 492 - add s4, sp, s3 - lui s3, 62 - addiw s3, s3, 488 - add s5, sp, s3 - lui s3, 62 - addiw s3, s3, 484 - add s6, sp, s3 - lui s3, 62 - addiw s3, s3, 608 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1416 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 604 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1384 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 600 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1344 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 596 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1280 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 592 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1216 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 588 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1168 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 584 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1136 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 580 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1112 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 576 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1096 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 572 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1080 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 568 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1064 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 564 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1048 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 560 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1032 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 556 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1016 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 552 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1000 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 548 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 984 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill + lui t6, 62 + addiw t6, t6, 552 + add t6, sp, t6 + lui s2, 62 + addiw s2, s2, 548 + add s2, sp, s2 lui s3, 62 addiw s3, s3, 544 add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 968 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 480 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 896 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 476 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 832 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 472 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 776 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 468 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 728 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 464 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 688 - mul s3, s3, s10 - add s3, sp, s3 + lui s4, 62 + addiw s4, s4, 480 + add s4, sp, s4 + lui s5, 62 + addiw s5, s5, 476 + add s5, sp, s5 + lui s6, 62 + addiw s6, s6, 472 + add s6, sp, s6 + lui s7, 62 + addiw s7, s7, 468 + add s7, sp, s7 + lui s8, 62 + addiw s8, s8, 464 + add s9, sp, s8 + vfmv.f.s fa4, v16 + vfmv.f.s fa5, v24 + lui s8, 62 + addiw s8, s8, 460 + add ra, sp, s8 + lui s8, 62 + addiw s8, s8, 456 + add s8, sp, s8 + vle32.v v8, (a0) + csrr a0, vlenb + li s10, 1416 + mul a0, a0, s10 + add a0, sp, a0 lui s10, 63 addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - vle32.v v8, (s9) - csrr s3, vlenb - li s9, 656 - mul s3, s3, s9 - add s3, sp, s3 - lui s9, 63 - addiw s9, s9, -1632 - add s3, s3, s9 - vs8r.v v8, (s3) # Unknown-size Folded Spill + add a0, a0, s10 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a1) + csrr a0, vlenb + li a1, 1384 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a2) + csrr a0, vlenb + li a1, 1344 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a3) + csrr a0, vlenb + li a1, 1280 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a4) + csrr a0, vlenb + li a1, 1216 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a5) + csrr a0, vlenb + li a1, 1168 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a6) + csrr a0, vlenb + li a1, 1136 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a7) + csrr a0, vlenb + li a1, 1112 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (t0) + csrr a0, vlenb + li a1, 1096 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (t1) + csrr a0, vlenb + li a1, 1080 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (t2) + csrr a0, vlenb + li a1, 1064 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (t3) + csrr a0, vlenb + li a1, 1048 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (t4) + csrr a0, vlenb + li a1, 1032 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (t5) + csrr a0, vlenb + li a1, 1016 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (t6) - csrr t6, vlenb - li s3, 640 - mul t6, t6, s3 - add t6, sp, t6 - lui s3, 63 - addiw s3, s3, -1632 - add t6, t6, s3 - vs8r.v v8, (t6) # Unknown-size Folded Spill + csrr a0, vlenb + li a1, 1000 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (s2) - csrr t6, vlenb - li s2, 624 - mul t6, t6, s2 - add t6, sp, t6 - lui s2, 63 - addiw s2, s2, -1632 - add t6, t6, s2 - vs8r.v v8, (t6) # Unknown-size Folded Spill + csrr a0, vlenb + li a1, 984 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s3) + csrr a0, vlenb + li a1, 968 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s4) + csrr a0, vlenb + li a1, 896 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s5) + csrr a0, vlenb + li a1, 832 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s6) + csrr a0, vlenb + li a1, 776 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s7) + csrr a0, vlenb + li a1, 728 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s9) + csrr a0, vlenb + li a1, 688 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (ra) - csrr t6, vlenb - li s2, 608 - mul t6, t6, s2 - add t6, sp, t6 - lui s2, 63 - addiw s2, s2, -1632 - add t6, t6, s2 - vs8r.v v8, (t6) # Unknown-size Folded Spill + csrr a0, vlenb + li a1, 656 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s8) + csrr a0, vlenb + li a1, 640 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 452 + add a0, sp, a0 vle32.v v8, (a0) csrr a0, vlenb - li t6, 592 - mul a0, a0, t6 + li a1, 624 + mul a0, a0, a1 add a0, sp, a0 - lui t6, 63 - addiw t6, t6, -1632 - add a0, a0, t6 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a1) + lui a0, 62 + addiw a0, a0, 448 + add a0, sp, a0 + vle32.v v8, (a0) + csrr a0, vlenb + li a1, 608 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 444 + add a0, sp, a0 + vle32.v v8, (a0) + csrr a0, vlenb + li a1, 592 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 440 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 576 mul a0, a0, a1 @@ -66430,7 +66379,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a2) + lui a0, 62 + addiw a0, a0, 436 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 560 mul a0, a0, a1 @@ -66439,7 +66391,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a3) + lui a0, 62 + addiw a0, a0, 432 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 544 mul a0, a0, a1 @@ -66448,7 +66403,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a4) + lui a0, 62 + addiw a0, a0, 428 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 528 mul a0, a0, a1 @@ -66457,7 +66415,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a5) + lui a0, 62 + addiw a0, a0, 424 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb slli a0, a0, 9 add a0, sp, a0 @@ -66465,7 +66426,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a6) + lui a0, 62 + addiw a0, a0, 420 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 496 mul a0, a0, a1 @@ -66474,7 +66438,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a7) + lui a0, 62 + addiw a0, a0, 416 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 480 mul a0, a0, a1 @@ -66483,7 +66450,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t0) + lui a0, 62 + addiw a0, a0, 632 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 1400 mul a0, a0, a1 @@ -66492,7 +66462,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t1) + lui a0, 62 + addiw a0, a0, 628 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 1352 mul a0, a0, a1 @@ -66501,7 +66474,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t2) + lui a0, 62 + addiw a0, a0, 624 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 1304 mul a0, a0, a1 @@ -66510,7 +66486,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t3) + lui a0, 62 + addiw a0, a0, 620 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 1240 mul a0, a0, a1 @@ -66519,7 +66498,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t4) + lui a0, 62 + addiw a0, a0, 616 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 1192 mul a0, a0, a1 @@ -66528,7 +66510,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t5) + lui a0, 62 + addiw a0, a0, 612 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 1144 mul a0, a0, a1 @@ -66546,7 +66531,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s7) + lui a0, 62 + addiw a0, a0, 504 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 912 mul a0, a0, a1 @@ -66555,7 +66543,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s8) + lui a0, 62 + addiw a0, a0, 500 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 888 mul a0, a0, a1 @@ -66576,7 +66567,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s4) + lui a0, 62 + addiw a0, a0, 492 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 768 mul a0, a0, a1 @@ -66585,7 +66579,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s5) + lui a0, 62 + addiw a0, a0, 488 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 720 mul a0, a0, a1 @@ -66594,7 +66591,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s6) + lui a0, 62 + addiw a0, a0, 484 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 680 mul a0, a0, a1 @@ -66674,7 +66674,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vfmv.s.f v8, fa0 csrr a0, vlenb - li a1, 368 + li a1, 360 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 @@ -66798,388 +66798,337 @@ add a1, a1, a2 vl8r.v v24, (a1) # Unknown-size Folded Reload vse32.v v24, (a0) - vsetivli zero, 1, e32, mf2, ta, ma - vfmv.f.s fa4, v16 - vfmv.f.s fa5, v24 - lui a0, 62 - addiw a0, a0, 716 - add s9, sp, a0 - lui a0, 62 - addiw a0, a0, 712 - add t6, sp, a0 lui a0, 62 - addiw a0, a0, 708 - add s2, sp, a0 - lui a0, 62 - addiw a0, a0, 704 - add ra, sp, a0 - lui a0, 62 - addiw a0, a0, 700 + addiw a0, a0, 864 add a0, sp, a0 + vsetivli zero, 1, e32, mf2, ta, ma lui a1, 62 - addiw a1, a1, 696 + addiw a1, a1, 860 add a1, sp, a1 lui a2, 62 - addiw a2, a2, 692 + addiw a2, a2, 856 add a2, sp, a2 lui a3, 62 - addiw a3, a3, 688 + addiw a3, a3, 852 add a3, sp, a3 lui a4, 62 - addiw a4, a4, 684 + addiw a4, a4, 848 add a4, sp, a4 lui a5, 62 - addiw a5, a5, 680 + addiw a5, a5, 844 add a5, sp, a5 lui a6, 62 - addiw a6, a6, 676 + addiw a6, a6, 840 add a6, sp, a6 lui a7, 62 - addiw a7, a7, 672 + addiw a7, a7, 836 add a7, sp, a7 lui t0, 62 - addiw t0, t0, 888 + addiw t0, t0, 832 add t0, sp, t0 lui t1, 62 - addiw t1, t1, 884 + addiw t1, t1, 828 add t1, sp, t1 lui t2, 62 - addiw t2, t2, 880 + addiw t2, t2, 824 add t2, sp, t2 lui t3, 62 - addiw t3, t3, 876 + addiw t3, t3, 820 add t3, sp, t3 lui t4, 62 - addiw t4, t4, 872 + addiw t4, t4, 816 add t4, sp, t4 lui t5, 62 - addiw t5, t5, 868 + addiw t5, t5, 812 add t5, sp, t5 - lui s3, 62 - addiw s3, s3, 760 - add s7, sp, s3 - lui s3, 62 - addiw s3, s3, 756 - add s8, sp, s3 - lui s3, 62 - addiw s3, s3, 748 - add s4, sp, s3 - lui s3, 62 - addiw s3, s3, 744 - add s5, sp, s3 - lui s3, 62 - addiw s3, s3, 740 - add s6, sp, s3 - lui s3, 62 - addiw s3, s3, 864 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1904 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 860 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1872 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 856 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1824 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 852 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1760 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 848 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1696 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 844 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1648 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 840 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1616 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 836 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1592 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 832 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1576 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 828 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1560 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 824 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1544 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 820 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1528 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 816 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1512 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 812 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1496 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 808 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1480 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 804 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1464 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill + lui t6, 62 + addiw t6, t6, 808 + add t6, sp, t6 + lui s2, 62 + addiw s2, s2, 804 + add s2, sp, s2 lui s3, 62 addiw s3, s3, 800 add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1448 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 736 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1328 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 732 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1264 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 728 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1208 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 724 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1160 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 720 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1128 - mul s3, s3, s10 - add s3, sp, s3 + lui s4, 62 + addiw s4, s4, 736 + add s4, sp, s4 + lui s5, 62 + addiw s5, s5, 732 + add s5, sp, s5 + lui s6, 62 + addiw s6, s6, 728 + add s6, sp, s6 + lui s7, 62 + addiw s7, s7, 724 + add s7, sp, s7 + lui s8, 62 + addiw s8, s8, 720 + add s9, sp, s8 + vfmv.f.s fa4, v16 + vfmv.f.s fa5, v24 + lui s8, 62 + addiw s8, s8, 716 + add ra, sp, s8 + lui s8, 62 + addiw s8, s8, 712 + add s8, sp, s8 + vle32.v v8, (a0) + csrr a0, vlenb + li s10, 1904 + mul a0, a0, s10 + add a0, sp, a0 lui s10, 63 addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - vle32.v v8, (s9) - csrr s3, vlenb - li s9, 1104 - mul s3, s3, s9 - add s3, sp, s3 - lui s9, 63 - addiw s9, s9, -1632 - add s3, s3, s9 - vs8r.v v8, (s3) # Unknown-size Folded Spill + add a0, a0, s10 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a1) + csrr a0, vlenb + li a1, 1872 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a2) + csrr a0, vlenb + li a1, 1824 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a3) + csrr a0, vlenb + li a1, 1760 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a4) + csrr a0, vlenb + li a1, 1696 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a5) + csrr a0, vlenb + li a1, 1648 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a6) + csrr a0, vlenb + li a1, 1616 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a7) + csrr a0, vlenb + li a1, 1592 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (t0) + csrr a0, vlenb + li a1, 1576 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (t1) + csrr a0, vlenb + li a1, 1560 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (t2) + csrr a0, vlenb + li a1, 1544 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (t3) + csrr a0, vlenb + li a1, 1528 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (t4) + csrr a0, vlenb + li a1, 1512 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (t5) + csrr a0, vlenb + li a1, 1496 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (t6) - csrr t6, vlenb - li s3, 1088 - mul t6, t6, s3 - add t6, sp, t6 - lui s3, 63 - addiw s3, s3, -1632 - add t6, t6, s3 - vs8r.v v8, (t6) # Unknown-size Folded Spill + csrr a0, vlenb + li a1, 1480 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (s2) - csrr t6, vlenb - li s2, 1072 - mul t6, t6, s2 - add t6, sp, t6 - lui s2, 63 - addiw s2, s2, -1632 - add t6, t6, s2 - vs8r.v v8, (t6) # Unknown-size Folded Spill + csrr a0, vlenb + li a1, 1464 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s3) + csrr a0, vlenb + li a1, 1448 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s4) + csrr a0, vlenb + li a1, 1328 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s5) + csrr a0, vlenb + li a1, 1264 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s6) + csrr a0, vlenb + li a1, 1208 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s7) + csrr a0, vlenb + li a1, 1160 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s9) + csrr a0, vlenb + li a1, 1128 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (ra) - csrr t6, vlenb - li s2, 1056 - mul t6, t6, s2 - add t6, sp, t6 - lui s2, 63 - addiw s2, s2, -1632 - add t6, t6, s2 - vs8r.v v8, (t6) # Unknown-size Folded Spill + csrr a0, vlenb + li a1, 1104 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s8) + csrr a0, vlenb + li a1, 1088 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 708 + add a0, sp, a0 vle32.v v8, (a0) csrr a0, vlenb - li t6, 1040 - mul a0, a0, t6 + li a1, 1072 + mul a0, a0, a1 add a0, sp, a0 - lui t6, 63 - addiw t6, t6, -1632 - add a0, a0, t6 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a1) + lui a0, 62 + addiw a0, a0, 704 + add a0, sp, a0 + vle32.v v8, (a0) + csrr a0, vlenb + li a1, 1056 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 700 + add a0, sp, a0 + vle32.v v8, (a0) + csrr a0, vlenb + li a1, 1040 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 696 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb slli a0, a0, 10 add a0, sp, a0 @@ -67187,7 +67136,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a2) + lui a0, 62 + addiw a0, a0, 692 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 1008 mul a0, a0, a1 @@ -67196,7 +67148,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a3) + lui a0, 62 + addiw a0, a0, 688 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 992 mul a0, a0, a1 @@ -67205,7 +67160,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a4) + lui a0, 62 + addiw a0, a0, 684 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 976 mul a0, a0, a1 @@ -67214,7 +67172,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a5) + lui a0, 62 + addiw a0, a0, 680 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 960 mul a0, a0, a1 @@ -67223,7 +67184,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a6) + lui a0, 62 + addiw a0, a0, 676 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 952 mul a0, a0, a1 @@ -67232,7 +67196,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a7) + lui a0, 62 + addiw a0, a0, 672 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 944 mul a0, a0, a1 @@ -67241,7 +67208,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t0) + lui a0, 62 + addiw a0, a0, 888 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 1888 mul a0, a0, a1 @@ -67250,7 +67220,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t1) + lui a0, 62 + addiw a0, a0, 884 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 1840 mul a0, a0, a1 @@ -67259,7 +67232,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t2) + lui a0, 62 + addiw a0, a0, 880 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 1784 mul a0, a0, a1 @@ -67268,7 +67244,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t3) + lui a0, 62 + addiw a0, a0, 876 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 1720 mul a0, a0, a1 @@ -67277,7 +67256,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t4) + lui a0, 62 + addiw a0, a0, 872 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 1672 mul a0, a0, a1 @@ -67286,7 +67268,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t5) + lui a0, 62 + addiw a0, a0, 868 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 1624 mul a0, a0, a1 @@ -67304,7 +67289,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s7) + lui a0, 62 + addiw a0, a0, 760 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 1368 mul a0, a0, a1 @@ -67313,7 +67301,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s8) + lui a0, 62 + addiw a0, a0, 756 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 1320 mul a0, a0, a1 @@ -67334,7 +67325,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s4) + lui a0, 62 + addiw a0, a0, 748 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 1200 mul a0, a0, a1 @@ -67343,7 +67337,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s5) + lui a0, 62 + addiw a0, a0, 744 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 1152 mul a0, a0, a1 @@ -67352,7 +67349,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s6) + lui a0, 62 + addiw a0, a0, 740 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 1120 mul a0, a0, a1 @@ -67556,405 +67556,354 @@ add a1, a1, a2 vl8r.v v24, (a1) # Unknown-size Folded Reload vse32.v v24, (a0) - vsetivli zero, 1, e32, mf2, ta, ma - vfmv.f.s fa4, v16 - vfmv.f.s fa5, v24 - lui a0, 62 - addiw a0, a0, 972 - add s9, sp, a0 - lui a0, 62 - addiw a0, a0, 968 - add t6, sp, a0 - lui a0, 62 - addiw a0, a0, 964 - add s2, sp, a0 - lui a0, 62 - addiw a0, a0, 960 - add ra, sp, a0 lui a0, 62 - addiw a0, a0, 956 + addiw a0, a0, 1120 add a0, sp, a0 + vsetivli zero, 1, e32, mf2, ta, ma lui a1, 62 - addiw a1, a1, 952 + addiw a1, a1, 1116 add a1, sp, a1 lui a2, 62 - addiw a2, a2, 948 + addiw a2, a2, 1112 add a2, sp, a2 lui a3, 62 - addiw a3, a3, 944 + addiw a3, a3, 1108 add a3, sp, a3 lui a4, 62 - addiw a4, a4, 940 + addiw a4, a4, 1104 add a4, sp, a4 lui a5, 62 - addiw a5, a5, 936 + addiw a5, a5, 1100 add a5, sp, a5 lui a6, 62 - addiw a6, a6, 932 + addiw a6, a6, 1096 add a6, sp, a6 lui a7, 62 - addiw a7, a7, 928 + addiw a7, a7, 1092 add a7, sp, a7 lui t0, 62 - addiw t0, t0, 1144 + addiw t0, t0, 1088 add t0, sp, t0 lui t1, 62 - addiw t1, t1, 1140 + addiw t1, t1, 1084 add t1, sp, t1 lui t2, 62 - addiw t2, t2, 1136 + addiw t2, t2, 1080 add t2, sp, t2 lui t3, 62 - addiw t3, t3, 1132 + addiw t3, t3, 1076 add t3, sp, t3 lui t4, 62 - addiw t4, t4, 1128 + addiw t4, t4, 1072 add t4, sp, t4 lui t5, 62 - addiw t5, t5, 1124 + addiw t5, t5, 1068 add t5, sp, t5 - lui s3, 62 - addiw s3, s3, 1016 - add s7, sp, s3 - lui s3, 62 - addiw s3, s3, 1012 - add s8, sp, s3 - lui s3, 62 - addiw s3, s3, 1004 - add s4, sp, s3 - lui s3, 62 - addiw s3, s3, 1000 - add s5, sp, s3 - lui s3, 62 - addiw s3, s3, 996 - add s6, sp, s3 - lui s3, 62 - addiw s3, s3, 1120 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -656 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1116 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -728 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1112 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -832 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1108 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -968 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1104 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -1088 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1100 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -1216 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1096 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -1352 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1092 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -1480 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1088 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -1592 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1084 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -1672 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1080 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -1736 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1076 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -1800 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1072 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -1856 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1068 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -1912 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1064 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -1968 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1060 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -1992 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill + lui t6, 62 + addiw t6, t6, 1064 + add t6, sp, t6 + lui s2, 62 + addiw s2, s2, 1060 + add s2, sp, s2 lui s3, 62 addiw s3, s3, 1056 add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb + lui s4, 62 + addiw s4, s4, 992 + add s4, sp, s4 + lui s5, 62 + addiw s5, s5, 988 + add s5, sp, s5 + lui s6, 62 + addiw s6, s6, 984 + add s6, sp, s6 + lui s7, 62 + addiw s7, s7, 980 + add s7, sp, s7 + lui s8, 62 + addiw s8, s8, 976 + add s9, sp, s8 + vfmv.f.s fa4, v16 + vfmv.f.s fa5, v24 + lui s8, 62 + addiw s8, s8, 972 + add ra, sp, s8 + lui s8, 62 + addiw s8, s8, 968 + add s8, sp, s8 + vle32.v v8, (a0) + csrr a0, vlenb lui s10, 1 - addiw s10, s10, -2024 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 992 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1808 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 988 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1744 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 984 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1688 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 980 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1640 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 976 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 1608 - mul s3, s3, s10 - add s3, sp, s3 + addiw s10, s10, -656 + mul a0, a0, s10 + add a0, sp, a0 lui s10, 63 addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - vle32.v v8, (s9) - csrr s3, vlenb - li s9, 1584 - mul s3, s3, s9 - add s3, sp, s3 - lui s9, 63 - addiw s9, s9, -1632 - add s3, s3, s9 - vs8r.v v8, (s3) # Unknown-size Folded Spill + add a0, a0, s10 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a1) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -728 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a2) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -832 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a3) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -968 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a4) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1088 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a5) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1216 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1352 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a7) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1480 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (t0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1592 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (t1) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1672 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (t2) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1736 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (t3) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1800 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (t4) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1856 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (t5) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1912 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (t6) - csrr t6, vlenb - li s3, 1568 - mul t6, t6, s3 - add t6, sp, t6 - lui s3, 63 - addiw s3, s3, -1632 - add t6, t6, s3 - vs8r.v v8, (t6) # Unknown-size Folded Spill + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1968 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (s2) - csrr t6, vlenb - li s2, 1552 - mul t6, t6, s2 - add t6, sp, t6 - lui s2, 63 - addiw s2, s2, -1632 - add t6, t6, s2 - vs8r.v v8, (t6) # Unknown-size Folded Spill + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1992 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s3) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -2024 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s4) + csrr a0, vlenb + li a1, 1808 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s5) + csrr a0, vlenb + li a1, 1744 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s6) + csrr a0, vlenb + li a1, 1688 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s7) + csrr a0, vlenb + li a1, 1640 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s9) + csrr a0, vlenb + li a1, 1608 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (ra) - csrr t6, vlenb - li s2, 1536 - mul t6, t6, s2 - add t6, sp, t6 - lui s2, 63 - addiw s2, s2, -1632 - add t6, t6, s2 - vs8r.v v8, (t6) # Unknown-size Folded Spill + csrr a0, vlenb + li a1, 1584 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s8) + csrr a0, vlenb + li a1, 1568 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 964 + add a0, sp, a0 vle32.v v8, (a0) csrr a0, vlenb - li t6, 1520 - mul a0, a0, t6 + li a1, 1552 + mul a0, a0, a1 add a0, sp, a0 - lui t6, 63 - addiw t6, t6, -1632 - add a0, a0, t6 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a1) + lui a0, 62 + addiw a0, a0, 960 + add a0, sp, a0 + vle32.v v8, (a0) + csrr a0, vlenb + li a1, 1536 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 956 + add a0, sp, a0 + vle32.v v8, (a0) + csrr a0, vlenb + li a1, 1520 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 952 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 1504 mul a0, a0, a1 @@ -67963,7 +67912,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a2) + lui a0, 62 + addiw a0, a0, 948 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 1488 mul a0, a0, a1 @@ -67972,7 +67924,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a3) + lui a0, 62 + addiw a0, a0, 944 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 1472 mul a0, a0, a1 @@ -67981,7 +67936,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a4) + lui a0, 62 + addiw a0, a0, 940 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 1456 mul a0, a0, a1 @@ -67990,7 +67948,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a5) + lui a0, 62 + addiw a0, a0, 936 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 1440 mul a0, a0, a1 @@ -67999,7 +67960,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a6) + lui a0, 62 + addiw a0, a0, 932 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 1432 mul a0, a0, a1 @@ -68008,7 +67972,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a7) + lui a0, 62 + addiw a0, a0, 928 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 1424 mul a0, a0, a1 @@ -68017,7 +67984,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t0) + lui a0, 62 + addiw a0, a0, 1144 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -696 @@ -68027,7 +67997,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t1) + lui a0, 62 + addiw a0, a0, 1140 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -792 @@ -68037,7 +68010,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t2) + lui a0, 62 + addiw a0, a0, 1136 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -912 @@ -68047,7 +68023,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t3) + lui a0, 62 + addiw a0, a0, 1132 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1048 @@ -68057,7 +68036,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t4) + lui a0, 62 + addiw a0, a0, 1128 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1168 @@ -68067,7 +68049,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t5) + lui a0, 62 + addiw a0, a0, 1124 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1320 @@ -68086,7 +68071,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s7) + lui a0, 62 + addiw a0, a0, 1016 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 1856 mul a0, a0, a1 @@ -68095,7 +68083,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s8) + lui a0, 62 + addiw a0, a0, 1012 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 1800 mul a0, a0, a1 @@ -68116,7 +68107,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s4) + lui a0, 62 + addiw a0, a0, 1004 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 1680 mul a0, a0, a1 @@ -68125,7 +68119,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s5) + lui a0, 62 + addiw a0, a0, 1000 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 1632 mul a0, a0, a1 @@ -68134,7 +68131,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s6) + lui a0, 62 + addiw a0, a0, 996 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 1600 mul a0, a0, a1 @@ -68338,418 +68338,95 @@ add a1, a1, a2 vl8r.v v24, (a1) # Unknown-size Folded Reload vse32.v v24, (a0) - vsetivli zero, 1, e32, mf2, ta, ma - vfmv.f.s fa4, v16 - vfmv.f.s fa5, v24 - lui a0, 62 - addiw a0, a0, 1228 - add s9, sp, a0 - lui a0, 62 - addiw a0, a0, 1224 - add t6, sp, a0 - lui a0, 62 - addiw a0, a0, 1220 - add s2, sp, a0 - lui a0, 62 - addiw a0, a0, 1216 - add ra, sp, a0 lui a0, 62 - addiw a0, a0, 1212 + addiw a0, a0, 1376 add a0, sp, a0 + vsetivli zero, 1, e32, mf2, ta, ma lui a1, 62 - addiw a1, a1, 1208 + addiw a1, a1, 1372 add a1, sp, a1 lui a2, 62 - addiw a2, a2, 1204 + addiw a2, a2, 1368 add a2, sp, a2 lui a3, 62 - addiw a3, a3, 1200 + addiw a3, a3, 1364 add a3, sp, a3 lui a4, 62 - addiw a4, a4, 1196 + addiw a4, a4, 1360 add a4, sp, a4 lui a5, 62 - addiw a5, a5, 1192 + addiw a5, a5, 1356 add a5, sp, a5 lui a6, 62 - addiw a6, a6, 1188 + addiw a6, a6, 1352 add a6, sp, a6 lui a7, 62 - addiw a7, a7, 1184 + addiw a7, a7, 1348 add a7, sp, a7 lui t0, 62 - addiw t0, t0, 1400 + addiw t0, t0, 1344 add t0, sp, t0 lui t1, 62 - addiw t1, t1, 1396 + addiw t1, t1, 1340 add t1, sp, t1 lui t2, 62 - addiw t2, t2, 1392 + addiw t2, t2, 1336 add t2, sp, t2 lui t3, 62 - addiw t3, t3, 1388 + addiw t3, t3, 1332 add t3, sp, t3 lui t4, 62 - addiw t4, t4, 1384 + addiw t4, t4, 1328 add t4, sp, t4 lui t5, 62 - addiw t5, t5, 1380 + addiw t5, t5, 1324 add t5, sp, t5 - lui s3, 62 - addiw s3, s3, 1272 - add s7, sp, s3 - lui s3, 62 - addiw s3, s3, 1268 - add s8, sp, s3 - lui s3, 62 - addiw s3, s3, 1260 - add s4, sp, s3 - lui s3, 62 - addiw s3, s3, 1256 - add s5, sp, s3 - lui s3, 62 - addiw s3, s3, 1252 - add s6, sp, s3 - lui s3, 62 - addiw s3, s3, 1376 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, 88 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1372 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, 80 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1368 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, 72 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1364 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, 64 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1360 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, 56 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1356 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, 48 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1352 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, 40 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1348 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, 32 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1344 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, 16 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1340 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -8 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1336 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -32 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1332 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -56 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1328 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -80 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1324 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -104 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1320 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 31 - slli s10, s10, 7 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1316 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, 168 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill + lui t6, 62 + addiw t6, t6, 1320 + add t6, sp, t6 + lui s2, 62 + addiw s2, s2, 1316 + add s2, sp, s2 lui s3, 62 addiw s3, s3, 1312 add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -184 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1248 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -848 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1244 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -984 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1240 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -1104 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1236 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -1248 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1232 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -1384 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - vle32.v v8, (s9) - csrr s3, vlenb - lui s9, 1 - addiw s9, s9, -1504 - mul s3, s3, s9 - add s3, sp, s3 - lui s9, 63 - addiw s9, s9, -1632 - add s3, s3, s9 - vs8r.v v8, (s3) # Unknown-size Folded Spill - vle32.v v8, (t6) - csrr t6, vlenb - lui s3, 1 - addiw s3, s3, -1632 - mul t6, t6, s3 - add t6, sp, t6 - lui s3, 63 - addiw s3, s3, -1632 - add t6, t6, s3 - vs8r.v v8, (t6) # Unknown-size Folded Spill - vle32.v v8, (s2) - csrr t6, vlenb - lui s2, 1 - addiw s2, s2, -1688 - mul t6, t6, s2 - add t6, sp, t6 - lui s2, 63 - addiw s2, s2, -1632 - add t6, t6, s2 - vs8r.v v8, (t6) # Unknown-size Folded Spill - vle32.v v8, (ra) - csrr t6, vlenb - lui s2, 1 - addiw s2, s2, -1752 - mul t6, t6, s2 - add t6, sp, t6 - lui s2, 63 - addiw s2, s2, -1632 - add t6, t6, s2 - vs8r.v v8, (t6) # Unknown-size Folded Spill + lui s4, 62 + addiw s4, s4, 1248 + add s4, sp, s4 + lui s5, 62 + addiw s5, s5, 1244 + add s5, sp, s5 + lui s6, 62 + addiw s6, s6, 1240 + add s6, sp, s6 + lui s7, 62 + addiw s7, s7, 1236 + add s7, sp, s7 + lui s8, 62 + addiw s8, s8, 1232 + add s9, sp, s8 + vfmv.f.s fa4, v16 + vfmv.f.s fa5, v24 + lui s8, 62 + addiw s8, s8, 1228 + add ra, sp, s8 + lui s8, 62 + addiw s8, s8, 1224 + add s8, sp, s8 vle32.v v8, (a0) csrr a0, vlenb - lui t6, 1 - addiw t6, t6, -1824 - mul a0, a0, t6 + lui s10, 1 + addiw s10, s10, 88 + mul a0, a0, s10 add a0, sp, a0 - lui t6, 63 - addiw t6, t6, -1632 - add a0, a0, t6 + lui s10, 63 + addiw s10, s10, -1632 + add a0, a0, s10 vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (a1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1872 + addiw a1, a1, 80 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 @@ -68759,7 +68436,7 @@ vle32.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1928 + addiw a1, a1, 72 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 @@ -68769,7 +68446,7 @@ vle32.v v8, (a3) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1976 + addiw a1, a1, 64 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 @@ -68779,7 +68456,7 @@ vle32.v v8, (a4) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2000 + addiw a1, a1, 56 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 @@ -68789,7 +68466,7 @@ vle32.v v8, (a5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2032 + addiw a1, a1, 48 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 @@ -68798,7 +68475,8 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (a6) csrr a0, vlenb - li a1, 2040 + lui a1, 1 + addiw a1, a1, 40 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 @@ -68808,7 +68486,7 @@ vle32.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 160 + addiw a1, a1, 32 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 @@ -68818,7 +68496,7 @@ vle32.v v8, (t0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 24 + addiw a1, a1, 16 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 @@ -68828,7 +68506,7 @@ vle32.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 8 + addiw a1, a1, -8 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 @@ -68838,7 +68516,7 @@ vle32.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -16 + addiw a1, a1, -32 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 @@ -68848,7 +68526,7 @@ vle32.v v8, (t3) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -40 + addiw a1, a1, -56 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 @@ -68858,7 +68536,7 @@ vle32.v v8, (t4) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -64 + addiw a1, a1, -80 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 @@ -68868,67 +68546,386 @@ vle32.v v8, (t5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -88 + addiw a1, a1, -104 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vfmv.s.f v8, fa4 + vle32.v v8, (t6) csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -664 + li a1, 31 + slli a1, a1, 7 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s7) + vle32.v v8, (s2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -744 + addiw a1, a1, 168 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s8) + vle32.v v8, (s3) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -856 + addiw a1, a1, -184 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 62 - addiw a0, a0, 1264 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (s4) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -992 + addiw a1, a1, -848 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s4) + vle32.v v8, (s5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1112 + addiw a1, a1, -984 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s5) + vle32.v v8, (s6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1104 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s7) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1248 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s9) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1384 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (ra) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1504 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s8) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1632 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 1220 + add a0, sp, a0 + vle32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1688 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 1216 + add a0, sp, a0 + vle32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1752 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 1212 + add a0, sp, a0 + vle32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1824 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 1208 + add a0, sp, a0 + vle32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1872 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 1204 + add a0, sp, a0 + vle32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1928 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 1200 + add a0, sp, a0 + vle32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1976 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 1196 + add a0, sp, a0 + vle32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -2000 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 1192 + add a0, sp, a0 + vle32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -2032 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 1188 + add a0, sp, a0 + vle32.v v8, (a0) + csrr a0, vlenb + li a1, 2040 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 1184 + add a0, sp, a0 + vle32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 160 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 1400 + add a0, sp, a0 + vle32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 24 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 1396 + add a0, sp, a0 + vle32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 1392 + add a0, sp, a0 + vle32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 1388 + add a0, sp, a0 + vle32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -40 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 1384 + add a0, sp, a0 + vle32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -64 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 1380 + add a0, sp, a0 + vle32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -88 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vfmv.s.f v8, fa4 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -664 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 1272 + add a0, sp, a0 + vle32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -744 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 1268 + add a0, sp, a0 + vle32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -856 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 1264 + add a0, sp, a0 + vle32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -992 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 1260 + add a0, sp, a0 + vle32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1112 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 1256 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1256 @@ -68938,7 +68935,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s6) + lui a0, 62 + addiw a0, a0, 1252 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1392 @@ -69148,413 +69148,362 @@ add a1, a1, a2 vl8r.v v24, (a1) # Unknown-size Folded Reload vse32.v v24, (a0) - vsetivli zero, 1, e32, mf2, ta, ma - vfmv.f.s fa4, v16 - vfmv.f.s fa5, v24 - lui a0, 62 - addiw a0, a0, 1484 - add s9, sp, a0 - lui a0, 62 - addiw a0, a0, 1480 - add t6, sp, a0 - lui a0, 62 - addiw a0, a0, 1476 - add s2, sp, a0 - lui a0, 62 - addiw a0, a0, 1472 - add ra, sp, a0 lui a0, 62 - addiw a0, a0, 1468 + addiw a0, a0, 1632 add a0, sp, a0 + vsetivli zero, 1, e32, mf2, ta, ma lui a1, 62 - addiw a1, a1, 1464 + addiw a1, a1, 1628 add a1, sp, a1 lui a2, 62 - addiw a2, a2, 1460 + addiw a2, a2, 1624 add a2, sp, a2 lui a3, 62 - addiw a3, a3, 1456 + addiw a3, a3, 1620 add a3, sp, a3 lui a4, 62 - addiw a4, a4, 1452 + addiw a4, a4, 1616 add a4, sp, a4 lui a5, 62 - addiw a5, a5, 1448 + addiw a5, a5, 1612 add a5, sp, a5 lui a6, 62 - addiw a6, a6, 1444 + addiw a6, a6, 1608 add a6, sp, a6 lui a7, 62 - addiw a7, a7, 1440 + addiw a7, a7, 1604 add a7, sp, a7 lui t0, 62 - addiw t0, t0, 1656 + addiw t0, t0, 1600 add t0, sp, t0 lui t1, 62 - addiw t1, t1, 1652 + addiw t1, t1, 1596 add t1, sp, t1 lui t2, 62 - addiw t2, t2, 1648 + addiw t2, t2, 1592 add t2, sp, t2 lui t3, 62 - addiw t3, t3, 1644 + addiw t3, t3, 1588 add t3, sp, t3 lui t4, 62 - addiw t4, t4, 1640 + addiw t4, t4, 1584 add t4, sp, t4 lui t5, 62 - addiw t5, t5, 1636 + addiw t5, t5, 1580 add t5, sp, t5 - lui s3, 62 - addiw s3, s3, 1528 - add s7, sp, s3 - lui s3, 62 - addiw s3, s3, 1524 - add s8, sp, s3 - lui s3, 62 - addiw s3, s3, 1516 - add s4, sp, s3 - lui s3, 62 - addiw s3, s3, 1512 - add s5, sp, s3 - lui s3, 62 - addiw s3, s3, 1508 - add s6, sp, s3 - lui s3, 62 - addiw s3, s3, 1632 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - slli s3, s3, 12 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1628 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -24 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1624 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -48 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1620 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -72 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1616 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -96 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1612 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -120 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1608 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -144 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1604 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -160 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1600 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -192 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1596 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -216 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1592 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -248 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1588 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -280 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1584 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -312 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1580 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, 152 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1576 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -360 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1572 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -392 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill + lui t6, 62 + addiw t6, t6, 1576 + add t6, sp, t6 + lui s2, 62 + addiw s2, s2, 1572 + add s2, sp, s2 lui s3, 62 addiw s3, s3, 1568 add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -424 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1504 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -616 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1500 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -624 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1496 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -632 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1492 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 27 - slli s10, s10, 7 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1488 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -680 - mul s3, s3, s10 - add s3, sp, s3 + lui s4, 62 + addiw s4, s4, 1504 + add s4, sp, s4 + lui s5, 62 + addiw s5, s5, 1500 + add s5, sp, s5 + lui s6, 62 + addiw s6, s6, 1496 + add s6, sp, s6 + lui s7, 62 + addiw s7, s7, 1492 + add s7, sp, s7 + lui s8, 62 + addiw s8, s8, 1488 + add s9, sp, s8 + vfmv.f.s fa4, v16 + vfmv.f.s fa5, v24 + lui s8, 62 + addiw s8, s8, 1484 + add ra, sp, s8 + lui s8, 62 + addiw s8, s8, 1480 + add s8, sp, s8 + vle32.v v8, (a0) + csrr a0, vlenb + slli a0, a0, 12 + add a0, sp, a0 lui s10, 63 addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - vle32.v v8, (s9) - csrr s3, vlenb - lui s9, 1 - addiw s9, s9, -712 - mul s3, s3, s9 - add s3, sp, s3 - lui s9, 63 - addiw s9, s9, -1632 - add s3, s3, s9 - vs8r.v v8, (s3) # Unknown-size Folded Spill + add a0, a0, s10 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a1) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -24 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a2) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -48 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a3) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -72 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a4) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -96 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a5) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -120 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -144 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a7) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -160 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (t0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -192 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (t1) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -216 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (t2) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -248 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (t3) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -280 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (t4) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -312 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (t5) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 152 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (t6) - csrr t6, vlenb - li s3, 13 - slli s3, s3, 8 - mul t6, t6, s3 - add t6, sp, t6 - lui s3, 63 - addiw s3, s3, -1632 - add t6, t6, s3 - vs8r.v v8, (t6) # Unknown-size Folded Spill + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -360 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (s2) - csrr t6, vlenb - lui s2, 1 - addiw s2, s2, -816 - mul t6, t6, s2 - add t6, sp, t6 - lui s2, 63 - addiw s2, s2, -1632 - add t6, t6, s2 - vs8r.v v8, (t6) # Unknown-size Folded Spill + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -392 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s3) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -424 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s4) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -616 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s5) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -624 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -632 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s7) + csrr a0, vlenb + li a1, 27 + slli a1, a1, 7 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s9) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -680 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (ra) - csrr t6, vlenb - lui s2, 1 - addiw s2, s2, -880 - mul t6, t6, s2 - add t6, sp, t6 - lui s2, 63 - addiw s2, s2, -1632 - add t6, t6, s2 - vs8r.v v8, (t6) # Unknown-size Folded Spill + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -712 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s8) + csrr a0, vlenb + li a1, 13 + slli a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 1476 + add a0, sp, a0 vle32.v v8, (a0) csrr a0, vlenb - lui t6, 1 - addiw t6, t6, -944 - mul a0, a0, t6 + lui a1, 1 + addiw a1, a1, -816 + mul a0, a0, a1 add a0, sp, a0 - lui t6, 63 - addiw t6, t6, -1632 - add a0, a0, t6 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a1) + lui a0, 62 + addiw a0, a0, 1472 + add a0, sp, a0 + vle32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -880 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 1468 + add a0, sp, a0 + vle32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -944 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 1464 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 3 slli a1, a1, 10 @@ -69564,7 +69513,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a2) + lui a0, 62 + addiw a0, a0, 1460 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1080 @@ -69574,7 +69526,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a3) + lui a0, 62 + addiw a0, a0, 1456 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1136 @@ -69584,7 +69539,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a4) + lui a0, 62 + addiw a0, a0, 1452 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1200 @@ -69594,7 +69552,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a5) + lui a0, 62 + addiw a0, a0, 1448 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, 144 @@ -69604,7 +69565,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a6) + lui a0, 62 + addiw a0, a0, 1444 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1288 @@ -69614,7 +69578,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a7) + lui a0, 62 + addiw a0, a0, 1440 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1360 @@ -69624,7 +69591,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t0) + lui a0, 62 + addiw a0, a0, 1656 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -168 @@ -69634,7 +69604,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t1) + lui a0, 62 + addiw a0, a0, 1652 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -200 @@ -69644,7 +69617,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t2) + lui a0, 62 + addiw a0, a0, 1648 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -224 @@ -69654,7 +69630,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t3) + lui a0, 62 + addiw a0, a0, 1644 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 15 slli a1, a1, 8 @@ -69664,7 +69643,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t4) + lui a0, 62 + addiw a0, a0, 1640 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -288 @@ -69674,7 +69656,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t5) + lui a0, 62 + addiw a0, a0, 1636 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -328 @@ -69694,7 +69679,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s7) + lui a0, 62 + addiw a0, a0, 1528 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -688 @@ -69704,7 +69692,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s8) + lui a0, 62 + addiw a0, a0, 1524 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -720 @@ -69727,7 +69718,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s4) + lui a0, 62 + addiw a0, a0, 1516 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -824 @@ -69737,7 +69731,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s5) + lui a0, 62 + addiw a0, a0, 1512 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -888 @@ -69747,7 +69744,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s6) + lui a0, 62 + addiw a0, a0, 1508 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -952 @@ -69962,415 +69962,364 @@ add a1, a1, a2 vl8r.v v24, (a1) # Unknown-size Folded Reload vse32.v v24, (a0) - vsetivli zero, 1, e32, mf2, ta, ma - vfmv.f.s fa4, v16 - vfmv.f.s fa5, v24 - lui a0, 62 - addiw a0, a0, 1740 - add s9, sp, a0 - lui a0, 62 - addiw a0, a0, 1736 - add t6, sp, a0 - lui a0, 62 - addiw a0, a0, 1732 - add s2, sp, a0 lui a0, 62 - addiw a0, a0, 1728 - add ra, sp, a0 - lui a0, 62 - addiw a0, a0, 1724 + addiw a0, a0, 1888 add a0, sp, a0 + vsetivli zero, 1, e32, mf2, ta, ma lui a1, 62 - addiw a1, a1, 1720 + addiw a1, a1, 1884 add a1, sp, a1 lui a2, 62 - addiw a2, a2, 1716 + addiw a2, a2, 1880 add a2, sp, a2 lui a3, 62 - addiw a3, a3, 1712 + addiw a3, a3, 1876 add a3, sp, a3 lui a4, 62 - addiw a4, a4, 1708 + addiw a4, a4, 1872 add a4, sp, a4 lui a5, 62 - addiw a5, a5, 1704 + addiw a5, a5, 1868 add a5, sp, a5 lui a6, 62 - addiw a6, a6, 1700 + addiw a6, a6, 1864 add a6, sp, a6 lui a7, 62 - addiw a7, a7, 1696 + addiw a7, a7, 1860 add a7, sp, a7 lui t0, 62 - addiw t0, t0, 1912 + addiw t0, t0, 1856 add t0, sp, t0 lui t1, 62 - addiw t1, t1, 1908 + addiw t1, t1, 1852 add t1, sp, t1 lui t2, 62 - addiw t2, t2, 1904 + addiw t2, t2, 1848 add t2, sp, t2 lui t3, 62 - addiw t3, t3, 1900 + addiw t3, t3, 1844 add t3, sp, t3 lui t4, 62 - addiw t4, t4, 1896 + addiw t4, t4, 1840 add t4, sp, t4 lui t5, 62 - addiw t5, t5, 1892 + addiw t5, t5, 1836 add t5, sp, t5 - lui s3, 62 - addiw s3, s3, 1784 - add s7, sp, s3 - lui s3, 62 - addiw s3, s3, 1780 - add s8, sp, s3 - lui s3, 62 - addiw s3, s3, 1772 - add s4, sp, s3 - lui s3, 62 - addiw s3, s3, 1768 - add s5, sp, s3 - lui s3, 62 - addiw s3, s3, 1764 - add s6, sp, s3 - lui s3, 62 - addiw s3, s3, 1888 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -112 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1884 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -136 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1880 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -152 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1876 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -176 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1872 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -208 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1868 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -240 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1864 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -272 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1860 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -304 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1856 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -344 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1852 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -376 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1848 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -408 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1844 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, 136 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1840 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -440 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1836 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -472 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1832 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -504 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1828 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -528 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill + lui t6, 62 + addiw t6, t6, 1832 + add t6, sp, t6 + lui s2, 62 + addiw s2, s2, 1828 + add s2, sp, s2 lui s3, 62 addiw s3, s3, 1824 add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -552 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1760 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -920 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1756 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -1008 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1752 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -1056 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1748 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -1120 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 1744 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb + lui s4, 62 + addiw s4, s4, 1760 + add s4, sp, s4 + lui s5, 62 + addiw s5, s5, 1756 + add s5, sp, s5 + lui s6, 62 + addiw s6, s6, 1752 + add s6, sp, s6 + lui s7, 62 + addiw s7, s7, 1748 + add s7, sp, s7 + lui s8, 62 + addiw s8, s8, 1744 + add s9, sp, s8 + vfmv.f.s fa4, v16 + vfmv.f.s fa5, v24 + lui s8, 62 + addiw s8, s8, 1740 + add ra, sp, s8 + lui s8, 62 + addiw s8, s8, 1736 + add s8, sp, s8 + vle32.v v8, (a0) + csrr a0, vlenb lui s10, 1 - addiw s10, s10, -1176 - mul s3, s3, s10 - add s3, sp, s3 + addiw s10, s10, -112 + mul a0, a0, s10 + add a0, sp, a0 lui s10, 63 addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - vle32.v v8, (s9) - csrr s3, vlenb - lui s9, 1 - addiw s9, s9, -1264 - mul s3, s3, s9 - add s3, sp, s3 - lui s9, 63 - addiw s9, s9, -1632 - add s3, s3, s9 - vs8r.v v8, (s3) # Unknown-size Folded Spill + add a0, a0, s10 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a1) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -136 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a2) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -152 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a3) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -176 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a4) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -208 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a5) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -240 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -272 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a7) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -304 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (t0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -344 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (t1) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -376 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (t2) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -408 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (t3) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 136 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (t4) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -440 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (t5) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -472 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (t6) - csrr t6, vlenb - lui s3, 1 - addiw s3, s3, -1328 - mul t6, t6, s3 - add t6, sp, t6 - lui s3, 63 - addiw s3, s3, -1632 - add t6, t6, s3 - vs8r.v v8, (t6) # Unknown-size Folded Spill + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -504 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (s2) - csrr t6, vlenb - lui s2, 1 - addiw s2, s2, -1400 - mul t6, t6, s2 - add t6, sp, t6 - lui s2, 63 - addiw s2, s2, -1632 - add t6, t6, s2 - vs8r.v v8, (t6) # Unknown-size Folded Spill + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -528 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s3) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -552 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s4) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -920 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s5) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1008 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1056 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s7) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1120 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s9) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1176 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (ra) - csrr t6, vlenb - lui s2, 1 - addiw s2, s2, -1448 - mul t6, t6, s2 - add t6, sp, t6 - lui s2, 63 - addiw s2, s2, -1632 - add t6, t6, s2 - vs8r.v v8, (t6) # Unknown-size Folded Spill + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1264 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s8) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1328 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 1732 + add a0, sp, a0 vle32.v v8, (a0) csrr a0, vlenb - lui t6, 1 - addiw t6, t6, -1512 - mul a0, a0, t6 + lui a1, 1 + addiw a1, a1, -1400 + mul a0, a0, a1 add a0, sp, a0 - lui t6, 63 - addiw t6, t6, -1632 - add a0, a0, t6 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a1) + lui a0, 62 + addiw a0, a0, 1728 + add a0, sp, a0 + vle32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1448 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 1724 + add a0, sp, a0 + vle32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1512 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 1720 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1568 @@ -70380,7 +70329,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a2) + lui a0, 62 + addiw a0, a0, 1716 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1640 @@ -70390,7 +70342,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a3) + lui a0, 62 + addiw a0, a0, 1712 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, 128 @@ -70400,7 +70355,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a4) + lui a0, 62 + addiw a0, a0, 1708 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 19 slli a1, a1, 7 @@ -70410,7 +70368,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a5) + lui a0, 62 + addiw a0, a0, 1704 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1704 @@ -70420,7 +70381,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a6) + lui a0, 62 + addiw a0, a0, 1700 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1728 @@ -70430,7 +70394,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a7) + lui a0, 62 + addiw a0, a0, 1696 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1776 @@ -70440,7 +70407,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t0) + lui a0, 62 + addiw a0, a0, 1912 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -320 @@ -70450,7 +70420,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t1) + lui a0, 62 + addiw a0, a0, 1908 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -352 @@ -70460,7 +70433,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t2) + lui a0, 62 + addiw a0, a0, 1904 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 29 slli a1, a1, 7 @@ -70470,7 +70446,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t3) + lui a0, 62 + addiw a0, a0, 1900 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -416 @@ -70480,7 +70459,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t4) + lui a0, 62 + addiw a0, a0, 1896 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -448 @@ -70490,7 +70472,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t5) + lui a0, 62 + addiw a0, a0, 1892 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -480 @@ -70510,7 +70495,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s7) + lui a0, 62 + addiw a0, a0, 1784 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1184 @@ -70520,7 +70508,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s8) + lui a0, 62 + addiw a0, a0, 1780 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1272 @@ -70543,7 +70534,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s4) + lui a0, 62 + addiw a0, a0, 1772 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb li a1, 21 slli a1, a1, 7 @@ -70553,7 +70547,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s5) + lui a0, 62 + addiw a0, a0, 1768 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1456 @@ -70563,7 +70560,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s6) + lui a0, 62 + addiw a0, a0, 1764 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1520 @@ -70774,416 +70774,365 @@ add a1, a1, a2 vl8r.v v16, (a1) # Unknown-size Folded Reload vse32.v v16, (a0) - vsetivli zero, 1, e32, mf2, ta, ma - vfmv.f.s fa4, v24 - vfmv.f.s fa5, v16 - lui a0, 62 - addiw a0, a0, 1996 - add s9, sp, a0 - lui a0, 62 - addiw a0, a0, 1992 - add t6, sp, a0 - lui a0, 62 - addiw a0, a0, 1988 - add s2, sp, a0 - lui a0, 62 - addiw a0, a0, 1984 - add ra, sp, a0 - lui a0, 62 - addiw a0, a0, 1980 + lui a0, 63 + addiw a0, a0, -1952 add a0, sp, a0 - lui a1, 62 - addiw a1, a1, 1976 + vsetivli zero, 1, e32, mf2, ta, ma + lui a1, 63 + addiw a1, a1, -1956 add a1, sp, a1 - lui a2, 62 - addiw a2, a2, 1972 + lui a2, 63 + addiw a2, a2, -1960 add a2, sp, a2 - lui a3, 62 - addiw a3, a3, 1968 + lui a3, 63 + addiw a3, a3, -1964 add a3, sp, a3 - lui a4, 62 - addiw a4, a4, 1964 + lui a4, 63 + addiw a4, a4, -1968 add a4, sp, a4 - lui a5, 62 - addiw a5, a5, 1960 + lui a5, 63 + addiw a5, a5, -1972 add a5, sp, a5 - lui a6, 62 - addiw a6, a6, 1956 + lui a6, 63 + addiw a6, a6, -1976 add a6, sp, a6 - lui a7, 62 - addiw a7, a7, 1952 + lui a7, 63 + addiw a7, a7, -1980 add a7, sp, a7 lui t0, 63 - addiw t0, t0, -1928 + addiw t0, t0, -1984 add t0, sp, t0 lui t1, 63 - addiw t1, t1, -1932 + addiw t1, t1, -1988 add t1, sp, t1 lui t2, 63 - addiw t2, t2, -1936 + addiw t2, t2, -1992 add t2, sp, t2 lui t3, 63 - addiw t3, t3, -1940 + addiw t3, t3, -1996 add t3, sp, t3 lui t4, 63 - addiw t4, t4, -1944 + addiw t4, t4, -2000 add t4, sp, t4 lui t5, 63 - addiw t5, t5, -1948 + addiw t5, t5, -2004 add t5, sp, t5 - lui s3, 62 - addiw s3, s3, 2040 - add s7, sp, s3 - lui s3, 62 - addiw s3, s3, 2036 - add s8, sp, s3 - lui s3, 62 - addiw s3, s3, 2028 - add s4, sp, s3 - lui s3, 62 - addiw s3, s3, 2024 - add s5, sp, s3 - lui s3, 62 - addiw s3, s3, 2020 - add s6, sp, s3 - lui s3, 63 - addiw s3, s3, -1952 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -232 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 63 - addiw s3, s3, -1956 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -264 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 63 - addiw s3, s3, -1960 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -296 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 63 - addiw s3, s3, -1964 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -336 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 63 - addiw s3, s3, -1968 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -368 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 63 - addiw s3, s3, -1972 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -400 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 63 - addiw s3, s3, -1976 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -432 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 63 - addiw s3, s3, -1980 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -456 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 63 - addiw s3, s3, -1984 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -488 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 63 - addiw s3, s3, -1988 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, 120 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 63 - addiw s3, s3, -1992 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 7 - slli s10, s10, 9 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 63 - addiw s3, s3, -1996 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -536 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 63 - addiw s3, s3, -2000 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -560 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 63 - addiw s3, s3, -2004 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -576 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 63 - addiw s3, s3, -2008 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -592 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 63 - addiw s3, s3, -2012 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -600 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill + lui t6, 63 + addiw t6, t6, -2008 + add t6, sp, t6 + lui s2, 63 + addiw s2, s2, -2012 + add s2, sp, s2 lui s3, 63 addiw s3, s3, -2016 add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -608 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 2016 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -1096 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 2012 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - li s10, 23 - slli s10, s10, 7 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 2008 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -1232 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 2004 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb - lui s10, 1 - addiw s10, s10, -1304 - mul s3, s3, s10 - add s3, sp, s3 - lui s10, 63 - addiw s10, s10, -1632 - add s3, s3, s10 - vs8r.v v8, (s3) # Unknown-size Folded Spill - lui s3, 62 - addiw s3, s3, 2000 - add s3, sp, s3 - vle32.v v8, (s3) - csrr s3, vlenb + lui s4, 62 + addiw s4, s4, 2016 + add s4, sp, s4 + lui s5, 62 + addiw s5, s5, 2012 + add s5, sp, s5 + lui s6, 62 + addiw s6, s6, 2008 + add s6, sp, s6 + lui s7, 62 + addiw s7, s7, 2004 + add s7, sp, s7 + lui s8, 62 + addiw s8, s8, 2000 + add s9, sp, s8 + vfmv.f.s fa4, v24 + vfmv.f.s fa5, v16 + lui s8, 62 + addiw s8, s8, 1996 + add ra, sp, s8 + lui s8, 62 + addiw s8, s8, 1992 + add s8, sp, s8 + vle32.v v8, (a0) + csrr a0, vlenb lui s10, 1 - addiw s10, s10, -1376 - mul s3, s3, s10 - add s3, sp, s3 + addiw s10, s10, -232 + mul a0, a0, s10 + add a0, sp, a0 lui s10, 63 addiw s10, s10, -1632 - add s3, s3, s10 + add a0, a0, s10 ld s10, 8(sp) - vs8r.v v8, (s3) # Unknown-size Folded Spill - vle32.v v8, (s9) - csrr s3, vlenb - lui s9, 1 - addiw s9, s9, -1432 - mul s3, s3, s9 - add s3, sp, s3 - lui s9, 63 - addiw s9, s9, -1632 - add s3, s3, s9 - vs8r.v v8, (s3) # Unknown-size Folded Spill + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a1) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -264 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a2) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -296 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a3) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -336 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a4) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -368 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a5) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -400 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -432 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (a7) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -456 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (t0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -488 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (t1) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 120 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (t2) + csrr a0, vlenb + li a1, 7 + slli a1, a1, 9 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (t3) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -536 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (t4) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -560 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (t5) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -576 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (t6) - csrr t6, vlenb - lui s3, 1 - addiw s3, s3, -1488 - mul t6, t6, s3 - add t6, sp, t6 - lui s3, 63 - addiw s3, s3, -1632 - add t6, t6, s3 - vs8r.v v8, (t6) # Unknown-size Folded Spill + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -592 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (s2) - csrr t6, vlenb - lui s2, 1 - addiw s2, s2, -1544 - mul t6, t6, s2 - add t6, sp, t6 - lui s2, 63 - addiw s2, s2, -1632 - add t6, t6, s2 - vs8r.v v8, (t6) # Unknown-size Folded Spill + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -600 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s3) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -608 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s4) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1096 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s5) + csrr a0, vlenb + li a1, 23 + slli a1, a1, 7 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1232 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s7) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1304 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s9) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1376 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (ra) - csrr t6, vlenb - lui s2, 1 - addiw s2, s2, -1608 - mul t6, t6, s2 - add t6, sp, t6 - lui s2, 63 - addiw s2, s2, -1632 - add t6, t6, s2 - vs8r.v v8, (t6) # Unknown-size Folded Spill + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1432 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s8) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1488 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 1988 + add a0, sp, a0 vle32.v v8, (a0) csrr a0, vlenb - lui t6, 1 - addiw t6, t6, -1648 - mul a0, a0, t6 + lui a1, 1 + addiw a1, a1, -1544 + mul a0, a0, a1 add a0, sp, a0 - lui t6, 63 - addiw t6, t6, -1632 - add a0, a0, t6 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a1) + lui a0, 62 + addiw a0, a0, 1984 + add a0, sp, a0 + vle32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1608 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 1980 + add a0, sp, a0 + vle32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1648 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 62 + addiw a0, a0, 1976 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, 112 @@ -71193,7 +71142,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a2) + lui a0, 62 + addiw a0, a0, 1972 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1696 @@ -71203,7 +71155,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a3) + lui a0, 62 + addiw a0, a0, 1968 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1712 @@ -71213,7 +71168,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a4) + lui a0, 62 + addiw a0, a0, 1964 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1760 @@ -71223,7 +71181,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a5) + lui a0, 62 + addiw a0, a0, 1960 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1784 @@ -71233,7 +71194,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a6) + lui a0, 62 + addiw a0, a0, 1956 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1848 @@ -71243,7 +71207,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a7) + lui a0, 62 + addiw a0, a0, 1952 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1896 @@ -71253,7 +71220,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t0) + lui a0, 63 + addiw a0, a0, -1928 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -464 @@ -71263,7 +71233,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t1) + lui a0, 63 + addiw a0, a0, -1932 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -496 @@ -71273,7 +71246,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t2) + lui a0, 63 + addiw a0, a0, -1936 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -520 @@ -71283,7 +71259,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t3) + lui a0, 63 + addiw a0, a0, -1940 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -544 @@ -71293,7 +71272,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t4) + lui a0, 63 + addiw a0, a0, -1944 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -568 @@ -71303,7 +71285,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t5) + lui a0, 63 + addiw a0, a0, -1948 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -584 @@ -71323,7 +71308,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s7) + lui a0, 62 + addiw a0, a0, 2040 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1240 @@ -71333,7 +71321,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s8) + lui a0, 62 + addiw a0, a0, 2036 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1312 @@ -71356,7 +71347,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s4) + lui a0, 62 + addiw a0, a0, 2028 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1560 @@ -71366,7 +71360,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s5) + lui a0, 62 + addiw a0, a0, 2024 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1616 @@ -71376,7 +71373,10 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s6) + lui a0, 62 + addiw a0, a0, 2020 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1656 @@ -71575,296 +71575,296 @@ vse32.v v16, (a0) lui a0, 63 addiw a0, a0, -1824 - add a0, sp, a0 + add t1, sp, a0 vsetivli zero, 1, e32, mf2, ta, ma + lui a0, 63 + addiw a0, a0, -1828 + add t2, sp, a0 + lui a0, 63 + addiw a0, a0, -1832 + add t3, sp, a0 + lui a0, 63 + addiw a0, a0, -1836 + add t4, sp, a0 + lui a0, 63 + addiw a0, a0, -1840 + add t5, sp, a0 + lui a0, 63 + addiw a0, a0, -1844 + add t6, sp, a0 + lui a0, 63 + addiw a0, a0, -1848 + add s2, sp, a0 + lui a0, 63 + addiw a0, a0, -1852 + add s3, sp, a0 + lui a0, 63 + addiw a0, a0, -1856 + add s4, sp, a0 + lui a0, 63 + addiw a0, a0, -1860 + add s5, sp, a0 + lui a0, 63 + addiw a0, a0, -1864 + add s6, sp, a0 + lui a0, 63 + addiw a0, a0, -1868 + add s7, sp, a0 + lui a0, 63 + addiw a0, a0, -1872 + add s8, sp, a0 + lui a0, 63 + addiw a0, a0, -1876 + add s9, sp, a0 + lui a0, 63 + addiw a0, a0, -1880 + add t0, sp, a0 + lui a0, 63 + addiw a0, a0, -1884 + add a7, sp, a0 + lui a0, 63 + addiw a0, a0, -1888 + add a6, sp, a0 + lui a0, 63 + addiw a0, a0, -1800 + add a5, sp, a0 + lui a0, 63 + addiw a0, a0, -1804 + add a4, sp, a0 + lui a0, 63 + addiw a0, a0, -1808 + add a3, sp, a0 + lui a0, 63 + addiw a0, a0, -1812 + add a2, sp, a0 + lui a0, 63 + addiw a0, a0, -1816 + add a0, sp, a0 + vfmv.f.s fa5, v16 lui a1, 63 - addiw a1, a1, -1828 + addiw a1, a1, -1820 add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1832 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1836 - add a3, sp, a3 - lui a4, 63 - addiw a4, a4, -1840 - add a4, sp, a4 - lui a5, 63 - addiw a5, a5, -1844 - add a5, sp, a5 - lui a6, 63 - addiw a6, a6, -1848 - add a6, sp, a6 - lui a7, 63 - addiw a7, a7, -1852 - add a7, sp, a7 - lui t0, 63 - addiw t0, t0, -1856 - add t0, sp, t0 - lui t1, 63 - addiw t1, t1, -1860 - add t1, sp, t1 - lui t2, 63 - addiw t2, t2, -1864 - add t2, sp, t2 - lui t3, 63 - addiw t3, t3, -1868 - add t3, sp, t3 - lui t4, 63 - addiw t4, t4, -1872 - add t4, sp, t4 - lui t5, 63 - addiw t5, t5, -1876 - add t5, sp, t5 - lui t6, 63 - addiw t6, t6, -1880 - add t6, sp, t6 - lui s2, 63 - addiw s2, s2, -1884 - add s2, sp, s2 - lui s3, 63 - addiw s3, s3, -1888 - add s3, sp, s3 - lui s4, 63 - addiw s4, s4, -1800 - add s4, sp, s4 - lui s5, 63 - addiw s5, s5, -1804 - add s5, sp, s5 - lui s6, 63 - addiw s6, s6, -1808 - add s6, sp, s6 - lui s7, 63 - addiw s7, s7, -1812 - add s7, sp, s7 - lui s8, 63 - addiw s8, s8, -1816 - add s8, sp, s8 - vfmv.f.s fa5, v16 - lui s9, 63 - addiw s9, s9, -1820 - add s9, sp, s9 - vle32.v v8, (a0) - csrr a0, vlenb + vle32.v v8, (t1) + csrr t1, vlenb lui ra, 1 addiw ra, ra, -672 - mul a0, a0, ra - add a0, sp, a0 + mul t1, t1, ra + add t1, sp, t1 lui ra, 63 addiw ra, ra, -1632 - add a0, a0, ra - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a1) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -704 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a2) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -760 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a3) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -800 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a4) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -872 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a5) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -928 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a6) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1016 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a7) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1064 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t0) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 104 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t1) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1144 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill + add t1, t1, ra + vs8r.v v8, (t1) # Unknown-size Folded Spill vle32.v v8, (t2) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1208 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill + csrr t1, vlenb + lui t2, 1 + addiw t2, t2, -704 + mul t1, t1, t2 + add t1, sp, t1 + lui t2, 63 + addiw t2, t2, -1632 + add t1, t1, t2 + vs8r.v v8, (t1) # Unknown-size Folded Spill vle32.v v8, (t3) - csrr a0, vlenb - li a1, 11 - slli a1, a1, 8 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill + csrr t1, vlenb + lui t2, 1 + addiw t2, t2, -760 + mul t1, t1, t2 + add t1, sp, t1 + lui t2, 63 + addiw t2, t2, -1632 + add t1, t1, t2 + vs8r.v v8, (t1) # Unknown-size Folded Spill vle32.v v8, (t4) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1344 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill + csrr t1, vlenb + lui t2, 1 + addiw t2, t2, -800 + mul t1, t1, t2 + add t1, sp, t1 + lui t2, 63 + addiw t2, t2, -1632 + add t1, t1, t2 + vs8r.v v8, (t1) # Unknown-size Folded Spill vle32.v v8, (t5) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1416 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill + csrr t1, vlenb + lui t2, 1 + addiw t2, t2, -872 + mul t1, t1, t2 + add t1, sp, t1 + lui t2, 63 + addiw t2, t2, -1632 + add t1, t1, t2 + vs8r.v v8, (t1) # Unknown-size Folded Spill vle32.v v8, (t6) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1472 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill + csrr t1, vlenb + lui t2, 1 + addiw t2, t2, -928 + mul t1, t1, t2 + add t1, sp, t1 + lui t2, 63 + addiw t2, t2, -1632 + add t1, t1, t2 + vs8r.v v8, (t1) # Unknown-size Folded Spill vle32.v v8, (s2) - csrr a0, vlenb - li a1, 5 - slli a1, a1, 9 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill + csrr t1, vlenb + lui t2, 1 + addiw t2, t2, -1016 + mul t1, t1, t2 + add t1, sp, t1 + lui t2, 63 + addiw t2, t2, -1632 + add t1, t1, t2 + vs8r.v v8, (t1) # Unknown-size Folded Spill vle32.v v8, (s3) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1584 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill + csrr t1, vlenb + lui t2, 1 + addiw t2, t2, -1064 + mul t1, t1, t2 + add t1, sp, t1 + lui t2, 63 + addiw t2, t2, -1632 + add t1, t1, t2 + vs8r.v v8, (t1) # Unknown-size Folded Spill vle32.v v8, (s4) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -736 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill + csrr t1, vlenb + lui t2, 1 + addiw t2, t2, 104 + mul t1, t1, t2 + add t1, sp, t1 + lui t2, 63 + addiw t2, t2, -1632 + add t1, t1, t2 + vs8r.v v8, (t1) # Unknown-size Folded Spill vle32.v v8, (s5) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -784 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill + csrr t1, vlenb + lui t2, 1 + addiw t2, t2, -1144 + mul t1, t1, t2 + add t1, sp, t1 + lui t2, 63 + addiw t2, t2, -1632 + add t1, t1, t2 + vs8r.v v8, (t1) # Unknown-size Folded Spill vle32.v v8, (s6) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -840 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill + csrr t1, vlenb + lui t2, 1 + addiw t2, t2, -1208 + mul t1, t1, t2 + add t1, sp, t1 + lui t2, 63 + addiw t2, t2, -1632 + add t1, t1, t2 + vs8r.v v8, (t1) # Unknown-size Folded Spill vle32.v v8, (s7) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -904 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill + csrr t1, vlenb + li t2, 11 + slli t2, t2, 8 + mul t1, t1, t2 + add t1, sp, t1 + lui t2, 63 + addiw t2, t2, -1632 + add t1, t1, t2 + vs8r.v v8, (t1) # Unknown-size Folded Spill vle32.v v8, (s8) + csrr t1, vlenb + lui t2, 1 + addiw t2, t2, -1344 + mul t1, t1, t2 + add t1, sp, t1 + lui t2, 63 + addiw t2, t2, -1632 + add t1, t1, t2 + vs8r.v v8, (t1) # Unknown-size Folded Spill + vle32.v v8, (s9) + csrr t1, vlenb + lui t2, 1 + addiw t2, t2, -1416 + mul t1, t1, t2 + add t1, sp, t1 + lui t2, 63 + addiw t2, t2, -1632 + add t1, t1, t2 + vs8r.v v8, (t1) # Unknown-size Folded Spill + vle32.v v8, (t0) + csrr t0, vlenb + lui t1, 1 + addiw t1, t1, -1472 + mul t0, t0, t1 + add t0, sp, t0 + lui t1, 63 + addiw t1, t1, -1632 + add t0, t0, t1 + vs8r.v v8, (t0) # Unknown-size Folded Spill + vle32.v v8, (a7) + csrr a7, vlenb + li t0, 5 + slli t0, t0, 9 + mul a7, a7, t0 + add a7, sp, a7 + lui t0, 63 + addiw t0, t0, -1632 + add a7, a7, t0 + vs8r.v v8, (a7) # Unknown-size Folded Spill + vle32.v v8, (a6) + csrr a6, vlenb + lui a7, 1 + addiw a7, a7, -1584 + mul a6, a6, a7 + add a6, sp, a6 + lui a7, 63 + addiw a7, a7, -1632 + add a6, a6, a7 + vs8r.v v8, (a6) # Unknown-size Folded Spill + vle32.v v8, (a5) + csrr a5, vlenb + lui a6, 1 + addiw a6, a6, -736 + mul a5, a5, a6 + add a5, sp, a5 + lui a6, 63 + addiw a6, a6, -1632 + add a5, a5, a6 + vs8r.v v8, (a5) # Unknown-size Folded Spill + vle32.v v8, (a4) + csrr a4, vlenb + lui a5, 1 + addiw a5, a5, -784 + mul a4, a4, a5 + add a4, sp, a4 + lui a5, 63 + addiw a5, a5, -1632 + add a4, a4, a5 + vs8r.v v8, (a4) # Unknown-size Folded Spill + vle32.v v8, (a3) + csrr a3, vlenb + lui a4, 1 + addiw a4, a4, -840 + mul a3, a3, a4 + add a3, sp, a3 + lui a4, 63 + addiw a4, a4, -1632 + add a3, a3, a4 + vs8r.v v8, (a3) # Unknown-size Folded Spill + vle32.v v8, (a2) + csrr a2, vlenb + lui a3, 1 + addiw a3, a3, -904 + mul a2, a2, a3 + add a2, sp, a2 + lui a3, 63 + addiw a3, a3, -1632 + add a2, a2, a3 + vs8r.v v8, (a2) # Unknown-size Folded Spill + vle32.v v8, (a0) csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -976 - mul a0, a0, a1 + lui a2, 1 + addiw a2, a2, -976 + mul a0, a0, a2 add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s9) + vle32.v v8, (a1) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1040 @@ -72240,7 +72240,7 @@ vslideup.vi v16, v8, 26 vsetivli zero, 28, e32, m8, tu, ma csrr a0, vlenb - li a1, 360 + li a1, 368 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 @@ -72602,7 +72602,7 @@ vsetvli zero, a0, e32, m8, ta, ma li a0, 32 csrr a1, vlenb - li a2, 368 + li a2, 360 mul a1, a1, a2 add a1, sp, a1 lui a2, 63 @@ -74590,363 +74590,362 @@ vl8r.v v8, (a1) # Unknown-size Folded Reload vslideup.vi v24, v8, 30 vsetvli zero, a0, e32, m8, ta, ma - csrr a0, vlenb - li a1, 1832 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + li a2, 1832 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vslideup.vi v24, v8, 31 - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 184 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vs8r.v v24, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 184 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vs8r.v v24, (a1) # Unknown-size Folded Spill vsetivli zero, 2, e32, m8, tu, ma - csrr a0, vlenb - li a1, 2040 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 160 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vl8r.v v24, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + li a2, 2040 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 160 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v24, (a1) # Unknown-size Folded Reload vslideup.vi v24, v8, 1 vsetivli zero, 3, e32, m8, tu, ma - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -2032 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -2032 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vslideup.vi v24, v8, 2 vsetivli zero, 4, e32, m8, tu, ma - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -2000 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -2000 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vslideup.vi v24, v8, 3 vsetivli zero, 5, e32, m8, tu, ma - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1976 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -1976 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vslideup.vi v24, v8, 4 vsetivli zero, 6, e32, m8, tu, ma - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1928 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -1928 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vslideup.vi v24, v8, 5 vsetivli zero, 7, e32, m8, tu, ma - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1872 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -1872 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vslideup.vi v24, v8, 6 vsetivli zero, 8, e32, m8, tu, ma - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1824 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -1824 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vslideup.vi v24, v8, 7 vsetivli zero, 9, e32, m8, tu, ma - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1752 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -1752 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vslideup.vi v24, v8, 8 vsetivli zero, 10, e32, m8, tu, ma - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1688 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -1688 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vslideup.vi v24, v8, 9 vsetivli zero, 11, e32, m8, tu, ma - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1632 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -1632 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vslideup.vi v24, v8, 10 vsetivli zero, 12, e32, m8, tu, ma - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1504 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -1504 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vslideup.vi v24, v8, 11 vsetivli zero, 13, e32, m8, tu, ma - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1384 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -1384 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vslideup.vi v24, v8, 12 vsetivli zero, 14, e32, m8, tu, ma - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1248 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -1248 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vslideup.vi v24, v8, 13 vsetivli zero, 15, e32, m8, tu, ma - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1104 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -1104 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vslideup.vi v24, v8, 14 vsetivli zero, 16, e32, m8, tu, ma - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -984 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -984 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vslideup.vi v24, v8, 15 vsetivli zero, 17, e32, m8, tu, ma - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -848 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -848 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vslideup.vi v24, v8, 16 vsetivli zero, 18, e32, m8, tu, ma - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1392 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -1392 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vslideup.vi v24, v8, 17 vsetivli zero, 19, e32, m8, tu, ma - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1256 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -1256 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vslideup.vi v24, v8, 18 vsetivli zero, 20, e32, m8, tu, ma - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1112 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -1112 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vslideup.vi v24, v8, 19 vsetivli zero, 21, e32, m8, tu, ma - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -992 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -992 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vslideup.vi v24, v8, 20 vsetivli zero, 22, e32, m8, tu, ma - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -856 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -856 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vslideup.vi v24, v8, 21 vsetivli zero, 23, e32, m8, tu, ma - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -744 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -744 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vslideup.vi v24, v8, 22 vsetivli zero, 24, e32, m8, tu, ma - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -664 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -664 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vslideup.vi v24, v8, 23 vsetivli zero, 25, e32, m8, tu, ma - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1000 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -1000 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vslideup.vi v24, v8, 24 vsetivli zero, 26, e32, m8, tu, ma - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -864 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -864 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vslideup.vi v24, v8, 25 vsetivli zero, 27, e32, m8, tu, ma - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -752 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -752 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vslideup.vi v24, v8, 26 vsetivli zero, 28, e32, m8, tu, ma - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1192 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -1192 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vslideup.vi v24, v8, 27 vsetivli zero, 29, e32, m8, tu, ma - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1072 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -1072 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vslideup.vi v24, v8, 28 vsetivli zero, 30, e32, m8, tu, ma - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -936 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -936 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vslideup.vi v24, v8, 29 vsetivli zero, 31, e32, m8, tu, ma - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -808 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 63 - addiw a1, a1, -1632 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -808 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vslideup.vi v24, v8, 30 - li a0, 32 vsetvli zero, a0, e32, m8, ta, ma csrr a1, vlenb lui a2, 1 @@ -75304,7 +75303,6 @@ vl8r.v v24, (a1) # Unknown-size Folded Reload vslideup.vi v8, v24, 30 vsetvli zero, a0, e32, m8, ta, ma - li a0, 32 csrr a1, vlenb lui a2, 1 addiw a2, a2, -1288 @@ -77634,59 +77632,59 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - ld a0, 48(sp) # 8-byte Folded Reload + ld a0, 80(sp) # 8-byte Folded Reload addi a0, a0, 68 - sd a0, 40(sp) # 8-byte Folded Spill + sd a0, 72(sp) # 8-byte Folded Spill lui a0, 61 addiw a0, a0, 256 - add a3, sp, a0 - li a2, 1 - slli a2, a2, 11 + add a2, sp, a0 + li a4, 1 + slli a4, a4, 11 li a0, 9 slli a0, a0, 8 - sd a0, 200(sp) # 8-byte Folded Spill + sd a0, 248(sp) # 8-byte Folded Spill li a0, 19 slli a0, a0, 7 - sd a0, 192(sp) # 8-byte Folded Spill + sd a0, 240(sp) # 8-byte Folded Spill li a0, 5 slli a0, a0, 9 - sd a0, 152(sp) # 8-byte Folded Spill + sd a0, 232(sp) # 8-byte Folded Spill li a0, 21 slli a0, a0, 7 - sd a0, 144(sp) # 8-byte Folded Spill + sd a0, 224(sp) # 8-byte Folded Spill li a0, 11 slli a0, a0, 8 - sd a0, 232(sp) # 8-byte Folded Spill + sd a0, 216(sp) # 8-byte Folded Spill li a0, 23 slli a0, a0, 7 - sd a0, 184(sp) # 8-byte Folded Spill - li a4, 3 - slli a4, a4, 10 - sd a4, 224(sp) # 8-byte Folded Spill + sd a0, 208(sp) # 8-byte Folded Spill + li a0, 3 + slli a0, a0, 10 + sd a0, 176(sp) # 8-byte Folded Spill li t0, 25 slli t0, t0, 7 - sd t0, 136(sp) # 8-byte Folded Spill + sd t0, 168(sp) # 8-byte Folded Spill li a6, 13 slli a6, a6, 8 - sd a6, 128(sp) # 8-byte Folded Spill + sd a6, 160(sp) # 8-byte Folded Spill li a0, 27 slli a0, a0, 7 - sd a0, 120(sp) # 8-byte Folded Spill + sd a0, 152(sp) # 8-byte Folded Spill li t1, 7 slli t1, t1, 9 - sd t1, 176(sp) # 8-byte Folded Spill + sd t1, 144(sp) # 8-byte Folded Spill li a1, 29 slli a1, a1, 7 - sd a1, 216(sp) # 8-byte Folded Spill + sd a1, 136(sp) # 8-byte Folded Spill li a7, 15 slli a7, a7, 8 - sd a7, 168(sp) # 8-byte Folded Spill + sd a7, 128(sp) # 8-byte Folded Spill li t2, 31 slli t2, t2, 7 - sd t2, 160(sp) # 8-byte Folded Spill - sd a2, 248(sp) # 8-byte Folded Spill - add a2, a3, a2 - sd a2, 56(sp) # 8-byte Folded Spill + sd t2, 120(sp) # 8-byte Folded Spill + sd a4, 184(sp) # 8-byte Folded Spill + add a2, a2, a4 + sd a2, 88(sp) # 8-byte Folded Spill # implicit-def: $v8 csrr a0, vlenb lui a1, 1 @@ -82674,8 +82672,8 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 61 addiw a0, a0, 256 - add a4, sp, a0 - vse32.v v8, (a4) + add a3, sp, a0 + vse32.v v8, (a3) csrr a0, vlenb lui a1, 1 addiw a1, a1, 96 @@ -82687,8 +82685,8 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 61 addiw a0, a0, 384 - add a3, sp, a0 - vse32.v v8, (a3) + add a2, sp, a0 + vse32.v v8, (a2) csrr a0, vlenb lui a1, 1 addiw a1, a1, 208 @@ -82700,8 +82698,8 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 61 addiw a0, a0, 512 - add a3, sp, a0 - vse32.v v8, (a3) + add a2, sp, a0 + vse32.v v8, (a2) csrr a0, vlenb lui a1, 1 addiw a1, a1, 216 @@ -82713,8 +82711,8 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 61 addiw a0, a0, 640 - add a3, sp, a0 - vse32.v v8, (a3) + add a2, sp, a0 + vse32.v v8, (a2) csrr a0, vlenb lui a1, 1 addiw a1, a1, 192 @@ -82726,8 +82724,8 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 61 addiw a0, a0, 768 - add a3, sp, a0 - vse32.v v8, (a3) + add a2, sp, a0 + vse32.v v8, (a2) csrr a0, vlenb lui a1, 1 addiw a1, a1, 200 @@ -82739,8 +82737,8 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 61 addiw a0, a0, 896 - add a3, sp, a0 - vse32.v v8, (a3) + add a2, sp, a0 + vse32.v v8, (a2) csrr a0, vlenb lui a1, 1 addiw a1, a1, 176 @@ -82880,13 +82878,14 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - ld a0, 56(sp) # 8-byte Folded Reload + ld a0, 88(sp) # 8-byte Folded Reload vse32.v v8, (a0) - sd s10, 240(sp) # 8-byte Folded Spill - andi a3, s10, 1023 - slli a3, a3, 2 - add a3, a4, a3 - flw fa5, 0(a3) + andi a2, s10, 1023 + mv t6, s10 + sd s10, 112(sp) # 8-byte Folded Spill + slli a2, a2, 2 + add a2, a3, a2 + flw fa5, 0(a2) vsetivli zero, 2, e32, m8, tu, ma vslideup.vi v16, v0, 1 vsetivli zero, 3, e32, m8, tu, ma @@ -83836,8 +83835,8 @@ vslideup.vi v16, v8, 31 lui a0, 30 addiw a0, a0, 512 - add a6, sp, a0 - vse32.v v16, (a6) + add t0, sp, a0 + vse32.v v16, (t0) vsetivli zero, 2, e32, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -84160,8 +84159,8 @@ vslideup.vi v16, v8, 31 lui a0, 30 addiw a0, a0, 640 - add a4, sp, a0 - vse32.v v16, (a4) + add a5, sp, a0 + vse32.v v16, (a5) vsetivli zero, 2, e32, m8, tu, ma csrr a0, vlenb slli a0, a0, 12 @@ -87896,8 +87895,8 @@ vslideup.vi v24, v8, 31 lui a0, 31 addiw a0, a0, -2048 - add a0, sp, a0 - vse32.v v24, (a0) + add a1, sp, a0 + vse32.v v24, (a1) vsetivli zero, 2, e32, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -88415,15 +88414,15 @@ add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 14 - ld a5, 248(sp) # 8-byte Folded Reload - add a5, ra, a5 - vsetvli zero, t1, e32, m8, ta, ma - vse32.v v8, (a5) - sd s11, 112(sp) # 8-byte Folded Spill - andi a3, s11, 1023 - slli a3, a3, 2 + ld a3, 184(sp) # 8-byte Folded Reload add a3, ra, a3 - fsw fa5, 0(a3) + vsetvli zero, t1, e32, m8, ta, ma + vse32.v v8, (a3) + sd s11, 192(sp) # 8-byte Folded Spill + andi a2, s11, 1023 + slli a2, a2, 2 + add a2, ra, a2 + fsw fa5, 0(a2) vle32.v v8, (ra) csrr a0, vlenb lui a1, 1 @@ -88444,7 +88443,7 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a6) + vle32.v v8, (t0) csrr a0, vlenb lui a1, 1 addiw a1, a1, 72 @@ -88454,7 +88453,7 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a4) + vle32.v v8, (a5) csrr a0, vlenb lui a1, 1 addiw a1, a1, 64 @@ -88466,563 +88465,565 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill li a0, 17 slli a0, a0, 7 - sd a0, 208(sp) # 8-byte Folded Spill - add t3, ra, a0 - ld t4, 200(sp) # 8-byte Folded Reload + sd a0, 200(sp) # 8-byte Folded Spill + add a5, ra, a0 + ld t3, 248(sp) # 8-byte Folded Reload + add t3, ra, t3 + ld t4, 240(sp) # 8-byte Folded Reload add t4, ra, t4 - ld t5, 192(sp) # 8-byte Folded Reload + ld t5, 232(sp) # 8-byte Folded Reload add t5, ra, t5 - ld t6, 152(sp) # 8-byte Folded Reload - add t6, ra, t6 - ld s2, 144(sp) # 8-byte Folded Reload + ld s2, 224(sp) # 8-byte Folded Reload add s2, ra, s2 - ld s3, 232(sp) # 8-byte Folded Reload + ld s3, 216(sp) # 8-byte Folded Reload add s3, ra, s3 - ld s4, 184(sp) # 8-byte Folded Reload + ld s4, 208(sp) # 8-byte Folded Reload add s4, ra, s4 - ld s5, 224(sp) # 8-byte Folded Reload - add s5, ra, s5 - ld t2, 136(sp) # 8-byte Folded Reload - add s6, ra, t2 - ld t1, 128(sp) # 8-byte Folded Reload - add s7, ra, t1 - ld t0, 120(sp) # 8-byte Folded Reload - add s8, ra, t0 - ld a7, 176(sp) # 8-byte Folded Reload - add s9, ra, a7 - ld a6, 216(sp) # 8-byte Folded Reload - add s10, ra, a6 - ld a3, 168(sp) # 8-byte Folded Reload - add s11, ra, a3 - ld a1, 160(sp) # 8-byte Folded Reload + ld t2, 176(sp) # 8-byte Folded Reload + add s5, ra, t2 + ld t1, 168(sp) # 8-byte Folded Reload + add s6, ra, t1 + ld t0, 160(sp) # 8-byte Folded Reload + add s7, ra, t0 + ld a7, 152(sp) # 8-byte Folded Reload + add s8, ra, a7 + ld a6, 144(sp) # 8-byte Folded Reload + add s9, ra, a6 + ld a4, 136(sp) # 8-byte Folded Reload + add s10, ra, a4 + ld a2, 128(sp) # 8-byte Folded Reload + add s11, ra, a2 + ld a1, 120(sp) # 8-byte Folded Reload add ra, ra, a1 - ld a4, 240(sp) # 8-byte Folded Reload - addi a4, a4, 1 - andi a4, a4, 1023 - slli a4, a4, 2 - sd a5, 8(sp) + addi t6, t6, 1 + andi t6, t6, 1023 + slli t6, t6, 2 + sd a3, 8(sp) lui a0, 60 addiw a0, a0, 256 add a0, sp, a0 - add a4, a0, a4 - lui a2, 30 - addiw a2, a2, 768 - add a2, sp, a2 - vle32.v v8, (a2) - csrr a2, vlenb + add t6, a0, t6 + sd t6, 104(sp) # 8-byte Folded Spill + lui a3, 30 + addiw a3, a3, 768 + add t6, sp, a3 + vle32.v v8, (t6) + csrr a3, vlenb + lui t6, 1 + addiw t6, t6, 56 + mul a3, a3, t6 + add a3, sp, a3 + lui t6, 63 + addiw t6, t6, -1632 + add a3, a3, t6 + vs8r.v v8, (a3) # Unknown-size Folded Spill + lui a3, 30 + addiw a3, a3, 896 + add t6, sp, a3 + vle32.v v8, (t6) + csrr a3, vlenb + lui t6, 1 + addiw t6, t6, 48 + mul a3, a3, t6 + add a3, sp, a3 + lui t6, 63 + addiw t6, t6, -1632 + add a3, a3, t6 + vs8r.v v8, (a3) # Unknown-size Folded Spill + lui a3, 30 + addiw a3, a3, 1024 + add t6, sp, a3 + vle32.v v8, (t6) + csrr a3, vlenb + lui t6, 1 + addiw t6, t6, 40 + mul a3, a3, t6 + add a3, sp, a3 + lui t6, 63 + addiw t6, t6, -1632 + add a3, a3, t6 + vs8r.v v8, (a3) # Unknown-size Folded Spill + lui a3, 30 + addiw a3, a3, 1152 + add t6, sp, a3 + vle32.v v8, (t6) + csrr a3, vlenb + lui t6, 1 + addiw t6, t6, 32 + mul a3, a3, t6 + add a3, sp, a3 + lui t6, 63 + addiw t6, t6, -1632 + add a3, a3, t6 + vs8r.v v8, (a3) # Unknown-size Folded Spill + lui a3, 30 + addiw a3, a3, 1280 + add t6, sp, a3 + vle32.v v8, (t6) + csrr a3, vlenb + lui t6, 1 + addiw t6, t6, 24 + mul a3, a3, t6 + add a3, sp, a3 + lui t6, 63 + addiw t6, t6, -1632 + add a3, a3, t6 + vs8r.v v8, (a3) # Unknown-size Folded Spill + lui a3, 30 + addiw a3, a3, 1408 + add t6, sp, a3 + vle32.v v8, (t6) + csrr a3, vlenb + lui t6, 1 + addiw t6, t6, 16 + mul a3, a3, t6 + add a3, sp, a3 + lui t6, 63 + addiw t6, t6, -1632 + add a3, a3, t6 + vs8r.v v8, (a3) # Unknown-size Folded Spill + lui a3, 30 + addiw a3, a3, 1536 + add t6, sp, a3 + vle32.v v8, (t6) + csrr a3, vlenb + lui t6, 1 + addiw t6, t6, 8 + mul a3, a3, t6 + add a3, sp, a3 + lui t6, 63 + addiw t6, t6, -1632 + add a3, a3, t6 + vs8r.v v8, (a3) # Unknown-size Folded Spill + lui a3, 30 + addiw a3, a3, 1664 + add t6, sp, a3 + vle32.v v8, (t6) + csrr a3, vlenb + slli a3, a3, 12 + add a3, sp, a3 + lui t6, 63 + addiw t6, t6, -1632 + add a3, a3, t6 + vs8r.v v8, (a3) # Unknown-size Folded Spill + lui a3, 30 + addiw a3, a3, 1792 + add t6, sp, a3 + vle32.v v8, (t6) + csrr a3, vlenb + lui t6, 1 + addiw t6, t6, -8 + mul a3, a3, t6 + add a3, sp, a3 + lui t6, 63 + addiw t6, t6, -1632 + add a3, a3, t6 + vs8r.v v8, (a3) # Unknown-size Folded Spill + lui a3, 30 + addiw a3, a3, 1920 + add t6, sp, a3 + vle32.v v8, (t6) + csrr a3, vlenb + lui t6, 1 + addiw t6, t6, -16 + mul a3, a3, t6 + add a3, sp, a3 + lui t6, 63 + addiw t6, t6, -1632 + add a3, a3, t6 + vs8r.v v8, (a3) # Unknown-size Folded Spill + lui a3, 31 + addiw a3, a3, -2048 + add t6, sp, a3 + vle32.v v8, (t6) + csrr a3, vlenb + lui t6, 1 + addiw t6, t6, -24 + mul a3, a3, t6 + add a3, sp, a3 + lui t6, 63 + addiw t6, t6, -1632 + add a3, a3, t6 + vs8r.v v8, (a3) # Unknown-size Folded Spill + lui a3, 31 + addiw a3, a3, -1920 + add t6, sp, a3 + vle32.v v8, (t6) + csrr t6, vlenb + lui a3, 1 + addiw a3, a3, -32 + mul t6, t6, a3 + add t6, sp, t6 + lui a3, 63 + addiw a3, a3, -1632 + add t6, t6, a3 + ld a3, 8(sp) + vs8r.v v8, (t6) # Unknown-size Folded Spill + vle32.v v8, (a3) + csrr a3, vlenb + lui t6, 1 + addiw t6, t6, -40 + mul a3, a3, t6 + add a3, sp, a3 + lui t6, 63 + addiw t6, t6, -1632 + add a3, a3, t6 + vs8r.v v8, (a3) # Unknown-size Folded Spill + vle32.v v8, (a5) + csrr a3, vlenb lui a5, 1 - addiw a5, a5, 56 - mul a2, a2, a5 - add a2, sp, a2 + addiw a5, a5, -48 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a2, a2, a5 - vs8r.v v8, (a2) # Unknown-size Folded Spill - lui a2, 30 - addiw a2, a2, 896 - add a2, sp, a2 - vle32.v v8, (a2) - csrr a2, vlenb + add a3, a3, a5 + vs8r.v v8, (a3) # Unknown-size Folded Spill + vle32.v v8, (t3) + csrr a3, vlenb lui a5, 1 - addiw a5, a5, 48 - mul a2, a2, a5 - add a2, sp, a2 + addiw a5, a5, -56 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a2, a2, a5 - vs8r.v v8, (a2) # Unknown-size Folded Spill - lui a2, 30 - addiw a2, a2, 1024 - add a2, sp, a2 - vle32.v v8, (a2) - csrr a2, vlenb + add a3, a3, a5 + vs8r.v v8, (a3) # Unknown-size Folded Spill + vle32.v v8, (t4) + csrr a3, vlenb lui a5, 1 - addiw a5, a5, 40 - mul a2, a2, a5 - add a2, sp, a2 + addiw a5, a5, -64 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a2, a2, a5 - vs8r.v v8, (a2) # Unknown-size Folded Spill - lui a2, 30 - addiw a2, a2, 1152 - add a2, sp, a2 - vle32.v v8, (a2) - csrr a2, vlenb + add a3, a3, a5 + vs8r.v v8, (a3) # Unknown-size Folded Spill + vle32.v v8, (t5) + csrr a3, vlenb lui a5, 1 - addiw a5, a5, 32 - mul a2, a2, a5 - add a2, sp, a2 + addiw a5, a5, -72 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a2, a2, a5 - vs8r.v v8, (a2) # Unknown-size Folded Spill - lui a2, 30 - addiw a2, a2, 1280 - add a2, sp, a2 - vle32.v v8, (a2) - csrr a2, vlenb + add a3, a3, a5 + vs8r.v v8, (a3) # Unknown-size Folded Spill + vle32.v v8, (s2) + csrr a3, vlenb lui a5, 1 - addiw a5, a5, 24 - mul a2, a2, a5 - add a2, sp, a2 + addiw a5, a5, -80 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a2, a2, a5 - vs8r.v v8, (a2) # Unknown-size Folded Spill - lui a2, 30 - addiw a2, a2, 1408 - add a2, sp, a2 - vle32.v v8, (a2) - csrr a2, vlenb + add a3, a3, a5 + vs8r.v v8, (a3) # Unknown-size Folded Spill + vle32.v v8, (s3) + csrr a3, vlenb lui a5, 1 - addiw a5, a5, 16 - mul a2, a2, a5 - add a2, sp, a2 + addiw a5, a5, -88 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a2, a2, a5 - vs8r.v v8, (a2) # Unknown-size Folded Spill - lui a2, 30 - addiw a2, a2, 1536 - add a2, sp, a2 - vle32.v v8, (a2) - csrr a2, vlenb + add a3, a3, a5 + vs8r.v v8, (a3) # Unknown-size Folded Spill + vle32.v v8, (s4) + csrr a3, vlenb lui a5, 1 - addiw a5, a5, 8 - mul a2, a2, a5 - add a2, sp, a2 + addiw a5, a5, -96 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a2, a2, a5 - vs8r.v v8, (a2) # Unknown-size Folded Spill - lui a2, 30 - addiw a2, a2, 1664 - add a2, sp, a2 - vle32.v v8, (a2) - csrr a2, vlenb - slli a2, a2, 12 - add a2, sp, a2 + add a3, a3, a5 + vs8r.v v8, (a3) # Unknown-size Folded Spill + vle32.v v8, (s5) + csrr a3, vlenb + lui a5, 1 + addiw a5, a5, -104 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a2, a2, a5 - vs8r.v v8, (a2) # Unknown-size Folded Spill - lui a2, 30 - addiw a2, a2, 1792 - add a2, sp, a2 - vle32.v v8, (a2) - csrr a2, vlenb + add a3, a3, a5 + vs8r.v v8, (a3) # Unknown-size Folded Spill + vle32.v v8, (s6) + csrr a3, vlenb lui a5, 1 - addiw a5, a5, -8 - mul a2, a2, a5 - add a2, sp, a2 + addiw a5, a5, -112 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a2, a2, a5 - vs8r.v v8, (a2) # Unknown-size Folded Spill - lui a2, 30 - addiw a2, a2, 1920 - add a2, sp, a2 - vle32.v v8, (a2) - csrr a2, vlenb + add a3, a3, a5 + vs8r.v v8, (a3) # Unknown-size Folded Spill + vle32.v v8, (s7) + csrr a3, vlenb lui a5, 1 - addiw a5, a5, -16 - mul a2, a2, a5 - add a2, sp, a2 + addiw a5, a5, -120 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a2, a2, a5 - vs8r.v v8, (a2) # Unknown-size Folded Spill - lui a2, 31 - addiw a2, a2, -2048 - add a2, sp, a2 - vle32.v v8, (a2) - csrr a2, vlenb + add a3, a3, a5 + vs8r.v v8, (a3) # Unknown-size Folded Spill + vle32.v v8, (s8) + csrr a3, vlenb + li a5, 31 + slli a5, a5, 7 + mul a3, a3, a5 + add a3, sp, a3 + lui a5, 63 + addiw a5, a5, -1632 + add a3, a3, a5 + vs8r.v v8, (a3) # Unknown-size Folded Spill + vle32.v v8, (s9) + csrr a3, vlenb lui a5, 1 - addiw a5, a5, -24 - mul a2, a2, a5 - add a2, sp, a2 + addiw a5, a5, -136 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a2, a2, a5 - vs8r.v v8, (a2) # Unknown-size Folded Spill - lui a2, 31 - addiw a2, a2, -1920 - add a2, sp, a2 - vle32.v v8, (a2) - csrr a2, vlenb + add a3, a3, a5 + vs8r.v v8, (a3) # Unknown-size Folded Spill + vle32.v v24, (s10) + vle32.v v16, (s11) + vle32.v v8, (ra) + csrr a3, vlenb lui a5, 1 - addiw a5, a5, -32 - mul a2, a2, a5 - add a2, sp, a2 + addiw a5, a5, 224 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a2, a2, a5 - ld a5, 8(sp) - vs8r.v v8, (a2) # Unknown-size Folded Spill - vle32.v v8, (a5) - csrr a2, vlenb + add a3, a3, a5 + vl8r.v v0, (a3) # Unknown-size Folded Reload + vse32.v v0, (a0) + csrr a3, vlenb lui a5, 1 - addiw a5, a5, -40 - mul a2, a2, a5 - add a2, sp, a2 + addiw a5, a5, 96 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a2, a2, a5 - vs8r.v v8, (a2) # Unknown-size Folded Spill - vle32.v v8, (t3) - csrr a2, vlenb + add a3, a3, a5 + vl8r.v v0, (a3) # Unknown-size Folded Reload + lui a3, 60 + addiw a3, a3, 384 + add a3, sp, a3 + vse32.v v0, (a3) + csrr a3, vlenb lui a5, 1 - addiw a5, a5, -48 - mul a2, a2, a5 - add a2, sp, a2 + addiw a5, a5, 208 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a2, a2, a5 - vs8r.v v8, (a2) # Unknown-size Folded Spill - vle32.v v8, (t4) - csrr a2, vlenb + add a3, a3, a5 + vl8r.v v0, (a3) # Unknown-size Folded Reload + lui a3, 60 + addiw a3, a3, 512 + add a3, sp, a3 + vse32.v v0, (a3) + csrr a3, vlenb lui a5, 1 - addiw a5, a5, -56 - mul a2, a2, a5 - add a2, sp, a2 + addiw a5, a5, 216 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a2, a2, a5 - vs8r.v v8, (a2) # Unknown-size Folded Spill - vle32.v v8, (t5) - csrr a2, vlenb + add a3, a3, a5 + vl8r.v v0, (a3) # Unknown-size Folded Reload + lui a3, 60 + addiw a3, a3, 640 + add a3, sp, a3 + vse32.v v0, (a3) + csrr a3, vlenb lui a5, 1 - addiw a5, a5, -64 - mul a2, a2, a5 - add a2, sp, a2 + addiw a5, a5, 192 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a2, a2, a5 - vs8r.v v8, (a2) # Unknown-size Folded Spill - vle32.v v8, (t6) - csrr a2, vlenb + add a3, a3, a5 + vl8r.v v0, (a3) # Unknown-size Folded Reload + lui a3, 60 + addiw a3, a3, 768 + add a3, sp, a3 + vse32.v v0, (a3) + csrr a3, vlenb lui a5, 1 - addiw a5, a5, -72 - mul a2, a2, a5 - add a2, sp, a2 + addiw a5, a5, 200 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a2, a2, a5 - vs8r.v v8, (a2) # Unknown-size Folded Spill - vle32.v v8, (s2) - csrr a2, vlenb + add a3, a3, a5 + vl8r.v v0, (a3) # Unknown-size Folded Reload + lui a3, 60 + addiw a3, a3, 896 + add a3, sp, a3 + vse32.v v0, (a3) + csrr a3, vlenb lui a5, 1 - addiw a5, a5, -80 - mul a2, a2, a5 - add a2, sp, a2 + addiw a5, a5, 176 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a2, a2, a5 - vs8r.v v8, (a2) # Unknown-size Folded Spill - vle32.v v8, (s3) - csrr a2, vlenb + add a3, a3, a5 + vl8r.v v0, (a3) # Unknown-size Folded Reload + lui a3, 60 + addiw a3, a3, 1024 + add a3, sp, a3 + vse32.v v0, (a3) + csrr a3, vlenb lui a5, 1 - addiw a5, a5, -88 - mul a2, a2, a5 - add a2, sp, a2 + addiw a5, a5, 184 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a2, a2, a5 - vs8r.v v8, (a2) # Unknown-size Folded Spill - vle32.v v8, (s4) - csrr a2, vlenb + add a3, a3, a5 + vl8r.v v0, (a3) # Unknown-size Folded Reload + lui a3, 60 + addiw a3, a3, 1152 + add a3, sp, a3 + vse32.v v0, (a3) + csrr a3, vlenb lui a5, 1 - addiw a5, a5, -96 - mul a2, a2, a5 - add a2, sp, a2 + addiw a5, a5, 160 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a2, a2, a5 - vs8r.v v8, (a2) # Unknown-size Folded Spill - vle32.v v8, (s5) - csrr a2, vlenb + add a3, a3, a5 + vl8r.v v0, (a3) # Unknown-size Folded Reload + lui a3, 60 + addiw a3, a3, 1280 + add a3, sp, a3 + vse32.v v0, (a3) + csrr a3, vlenb lui a5, 1 - addiw a5, a5, -104 - mul a2, a2, a5 - add a2, sp, a2 + addiw a5, a5, 168 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a2, a2, a5 - vs8r.v v8, (a2) # Unknown-size Folded Spill - vle32.v v8, (s6) - csrr a2, vlenb + add a3, a3, a5 + vl8r.v v0, (a3) # Unknown-size Folded Reload + lui a3, 60 + addiw a3, a3, 1408 + add a3, sp, a3 + vse32.v v0, (a3) + csrr a3, vlenb lui a5, 1 - addiw a5, a5, -112 - mul a2, a2, a5 - add a2, sp, a2 + addiw a5, a5, 144 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a2, a2, a5 - vs8r.v v8, (a2) # Unknown-size Folded Spill - vle32.v v8, (s7) - csrr a2, vlenb + add a3, a3, a5 + vl8r.v v0, (a3) # Unknown-size Folded Reload + lui a3, 60 + addiw a3, a3, 1536 + add a3, sp, a3 + vse32.v v0, (a3) + csrr a3, vlenb lui a5, 1 - addiw a5, a5, -120 - mul a2, a2, a5 - add a2, sp, a2 + addiw a5, a5, 152 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a2, a2, a5 - vs8r.v v8, (a2) # Unknown-size Folded Spill - vle32.v v8, (s8) - csrr a2, vlenb - li a5, 31 - slli a5, a5, 7 - mul a2, a2, a5 - add a2, sp, a2 + add a3, a3, a5 + vl8r.v v0, (a3) # Unknown-size Folded Reload + lui a3, 60 + addiw a3, a3, 1664 + add a3, sp, a3 + vse32.v v0, (a3) + csrr a3, vlenb + lui a5, 1 + addiw a5, a5, 128 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a2, a2, a5 - vs8r.v v8, (a2) # Unknown-size Folded Spill - vle32.v v8, (s9) - csrr a2, vlenb + add a3, a3, a5 + vl8r.v v0, (a3) # Unknown-size Folded Reload + lui a3, 60 + addiw a3, a3, 1792 + add a3, sp, a3 + vse32.v v0, (a3) + csrr a3, vlenb lui a5, 1 - addiw a5, a5, -136 - mul a2, a2, a5 - add a2, sp, a2 + addiw a5, a5, 136 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a2, a2, a5 - vs8r.v v8, (a2) # Unknown-size Folded Spill - vle32.v v24, (s10) - vle32.v v16, (s11) - vle32.v v8, (ra) - csrr a2, vlenb + add a3, a3, a5 + vl8r.v v0, (a3) # Unknown-size Folded Reload + lui a3, 60 + addiw a3, a3, 1920 + add a3, sp, a3 + vse32.v v0, (a3) + csrr a3, vlenb lui a5, 1 - addiw a5, a5, 224 - mul a2, a2, a5 - add a2, sp, a2 + addiw a5, a5, 112 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a2, a2, a5 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse32.v v0, (a0) - lui a2, 60 - addiw a2, a2, 384 - add a2, sp, a2 - csrr a5, vlenb - lui t3, 1 - addiw t3, t3, 96 - mul a5, a5, t3 - add a5, sp, a5 - lui t3, 63 - addiw t3, t3, -1632 - add a5, a5, t3 - vl8r.v v0, (a5) # Unknown-size Folded Reload - vse32.v v0, (a2) - lui a2, 60 - addiw a2, a2, 512 - add a2, sp, a2 - csrr a5, vlenb - lui t3, 1 - addiw t3, t3, 208 - mul a5, a5, t3 - add a5, sp, a5 - lui t3, 63 - addiw t3, t3, -1632 - add a5, a5, t3 - vl8r.v v0, (a5) # Unknown-size Folded Reload - vse32.v v0, (a2) - lui a2, 60 - addiw a2, a2, 640 - add a2, sp, a2 - csrr a5, vlenb - lui t3, 1 - addiw t3, t3, 216 - mul a5, a5, t3 - add a5, sp, a5 - lui t3, 63 - addiw t3, t3, -1632 - add a5, a5, t3 - vl8r.v v0, (a5) # Unknown-size Folded Reload - vse32.v v0, (a2) - lui a2, 60 - addiw a2, a2, 768 - add a2, sp, a2 - csrr a5, vlenb - lui t3, 1 - addiw t3, t3, 192 - mul a5, a5, t3 - add a5, sp, a5 - lui t3, 63 - addiw t3, t3, -1632 - add a5, a5, t3 - vl8r.v v0, (a5) # Unknown-size Folded Reload - vse32.v v0, (a2) - lui a2, 60 - addiw a2, a2, 896 - add a2, sp, a2 - csrr a5, vlenb - lui t3, 1 - addiw t3, t3, 200 - mul a5, a5, t3 - add a5, sp, a5 - lui t3, 63 - addiw t3, t3, -1632 - add a5, a5, t3 - vl8r.v v0, (a5) # Unknown-size Folded Reload - vse32.v v0, (a2) - lui a2, 60 - addiw a2, a2, 1024 - add a2, sp, a2 - csrr a5, vlenb - lui t3, 1 - addiw t3, t3, 176 - mul a5, a5, t3 - add a5, sp, a5 - lui t3, 63 - addiw t3, t3, -1632 - add a5, a5, t3 - vl8r.v v0, (a5) # Unknown-size Folded Reload - vse32.v v0, (a2) - lui a2, 60 - addiw a2, a2, 1152 - add a2, sp, a2 - csrr a5, vlenb - lui t3, 1 - addiw t3, t3, 184 - mul a5, a5, t3 - add a5, sp, a5 - lui t3, 63 - addiw t3, t3, -1632 - add a5, a5, t3 - vl8r.v v0, (a5) # Unknown-size Folded Reload - vse32.v v0, (a2) - lui a2, 60 - addiw a2, a2, 1280 - add a2, sp, a2 - csrr a5, vlenb - lui t3, 1 - addiw t3, t3, 160 - mul a5, a5, t3 - add a5, sp, a5 - lui t3, 63 - addiw t3, t3, -1632 - add a5, a5, t3 - vl8r.v v0, (a5) # Unknown-size Folded Reload - vse32.v v0, (a2) - lui a2, 60 - addiw a2, a2, 1408 - add a2, sp, a2 - csrr a5, vlenb - lui t3, 1 - addiw t3, t3, 168 - mul a5, a5, t3 - add a5, sp, a5 - lui t3, 63 - addiw t3, t3, -1632 - add a5, a5, t3 - vl8r.v v0, (a5) # Unknown-size Folded Reload - vse32.v v0, (a2) - lui a2, 60 - addiw a2, a2, 1536 - add a2, sp, a2 - csrr a5, vlenb - lui t3, 1 - addiw t3, t3, 144 - mul a5, a5, t3 - add a5, sp, a5 - lui t3, 63 - addiw t3, t3, -1632 - add a5, a5, t3 - vl8r.v v0, (a5) # Unknown-size Folded Reload - vse32.v v0, (a2) - lui a2, 60 - addiw a2, a2, 1664 - add a2, sp, a2 - csrr a5, vlenb - lui t3, 1 - addiw t3, t3, 152 - mul a5, a5, t3 - add a5, sp, a5 - lui t3, 63 - addiw t3, t3, -1632 - add a5, a5, t3 - vl8r.v v0, (a5) # Unknown-size Folded Reload - vse32.v v0, (a2) - lui a2, 60 - addiw a2, a2, 1792 - add a2, sp, a2 - csrr a5, vlenb - lui t3, 1 - addiw t3, t3, 128 - mul a5, a5, t3 - add a5, sp, a5 - lui t3, 63 - addiw t3, t3, -1632 - add a5, a5, t3 - vl8r.v v0, (a5) # Unknown-size Folded Reload - vse32.v v0, (a2) - lui a2, 60 - addiw a2, a2, 1920 - add a2, sp, a2 - csrr a5, vlenb - lui t3, 1 - addiw t3, t3, 136 - mul a5, a5, t3 - add a5, sp, a5 - lui t3, 63 - addiw t3, t3, -1632 - add a5, a5, t3 - vl8r.v v0, (a5) # Unknown-size Folded Reload - vse32.v v0, (a2) - lui a2, 61 - addiw a2, a2, -2048 - add a2, sp, a2 - csrr a5, vlenb - lui t3, 1 - addiw t3, t3, 112 - mul a5, a5, t3 - add a5, sp, a5 - lui t3, 63 - addiw t3, t3, -1632 - add a5, a5, t3 - vl8r.v v0, (a5) # Unknown-size Folded Reload - vse32.v v0, (a2) - lui a2, 61 - addiw a2, a2, -1920 - add a2, sp, a2 - csrr a5, vlenb - lui t3, 1 - addiw t3, t3, 120 - mul a5, a5, t3 - add a5, sp, a5 - lui t3, 63 - addiw t3, t3, -1632 - add a5, a5, t3 - vl8r.v v0, (a5) # Unknown-size Folded Reload - vse32.v v0, (a2) - ld t3, 248(sp) # 8-byte Folded Reload - add a5, a0, t3 + add a3, a3, a5 + vl8r.v v0, (a3) # Unknown-size Folded Reload + lui a3, 61 + addiw a3, a3, -2048 + add a3, sp, a3 + vse32.v v0, (a3) + csrr a3, vlenb + lui a5, 1 + addiw a5, a5, 120 + mul a3, a3, a5 + add a3, sp, a3 + lui a5, 63 + addiw a5, a5, -1632 + add a3, a3, a5 + vl8r.v v0, (a3) # Unknown-size Folded Reload + lui a3, 61 + addiw a3, a3, -1920 + add a3, sp, a3 + vse32.v v0, (a3) + ld t3, 184(sp) # 8-byte Folded Reload + add a3, a0, t3 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 104 - mul a0, a0, a2 + lui a5, 1 + addiw a5, a5, 104 + mul a0, a0, a5 add a0, sp, a0 - lui a2, 63 - addiw a2, a2, -1632 - add a0, a0, a2 + lui a5, 63 + addiw a5, a5, -1632 + add a0, a0, a5 vl8r.v v0, (a0) # Unknown-size Folded Reload - vse32.v v0, (a5) - flw fa5, 0(a4) + vse32.v v0, (a3) + ld a0, 104(sp) # 8-byte Folded Reload + flw fa5, 0(a0) lui a0, 29 addiw a0, a0, 256 add a0, sp, a0 - add ra, a0, a1 - vse32.v v8, (ra) - add s11, a0, a3 + add a1, a0, a1 + sd a1, 104(sp) # 8-byte Folded Spill + vse32.v v8, (a1) + add s11, a0, a2 vse32.v v16, (s11) - add s10, a0, a6 + add s10, a0, a4 vse32.v v24, (s10) - add s9, a0, a7 - sd ra, 8(sp) - sd s11, 0(sp) + add s9, a0, a6 + sd s11, 8(sp) + sd s10, 0(sp) csrr a1, vlenb lui a2, 1 addiw a2, a2, -136 @@ -89033,7 +89034,7 @@ add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (s9) - add s8, a0, t0 + add s8, a0, a7 csrr a1, vlenb li a2, 31 slli a2, a2, 7 @@ -89044,7 +89045,7 @@ add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (s8) - add s7, a0, t1 + add s7, a0, t0 csrr a1, vlenb lui a2, 1 addiw a2, a2, -120 @@ -89055,7 +89056,7 @@ add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (s7) - add s6, a0, t2 + add s6, a0, t1 csrr a1, vlenb lui a2, 1 addiw a2, a2, -112 @@ -89066,8 +89067,7 @@ add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (s6) - ld a6, 224(sp) # 8-byte Folded Reload - add s5, a0, a6 + add s5, a0, t2 csrr a1, vlenb lui a2, 1 addiw a2, a2, -104 @@ -89078,8 +89078,8 @@ add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (s5) - ld a3, 184(sp) # 8-byte Folded Reload - add s4, a0, a3 + ld s4, 208(sp) # 8-byte Folded Reload + add s4, a0, s4 csrr a1, vlenb lui a2, 1 addiw a2, a2, -96 @@ -89090,7 +89090,7 @@ add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (s4) - ld s3, 232(sp) # 8-byte Folded Reload + ld s3, 216(sp) # 8-byte Folded Reload add s3, a0, s3 csrr a1, vlenb lui a2, 1 @@ -89102,7 +89102,7 @@ add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (s3) - ld s2, 144(sp) # 8-byte Folded Reload + ld s2, 224(sp) # 8-byte Folded Reload add s2, a0, s2 csrr a1, vlenb lui a2, 1 @@ -89114,7 +89114,7 @@ add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (s2) - ld t6, 152(sp) # 8-byte Folded Reload + ld t6, 232(sp) # 8-byte Folded Reload add t6, a0, t6 csrr a1, vlenb lui a2, 1 @@ -89126,8 +89126,8 @@ add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (t6) - ld t5, 192(sp) # 8-byte Folded Reload - add t5, a0, t5 + ld t4, 240(sp) # 8-byte Folded Reload + add t4, a0, t4 csrr a1, vlenb lui a2, 1 addiw a2, a2, -64 @@ -89137,9 +89137,9 @@ addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (t5) - ld t4, 200(sp) # 8-byte Folded Reload - add t4, a0, t4 + vse32.v v8, (t4) + ld a3, 248(sp) # 8-byte Folded Reload + add a3, a0, a3 csrr a1, vlenb lui a2, 1 addiw a2, a2, -56 @@ -89149,8 +89149,8 @@ addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (t4) - ld a5, 208(sp) # 8-byte Folded Reload + vse32.v v8, (a3) + ld a5, 200(sp) # 8-byte Folded Reload add a5, a0, a5 csrr a1, vlenb lui a2, 1 @@ -89173,274 +89173,274 @@ add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (t3) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -32 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 30 addiw a1, a1, -1920 - add a2, sp, a1 + add a4, sp, a1 + vse32.v v8, (a4) csrr a1, vlenb - lui a4, 1 - addiw a4, a4, -32 - mul a1, a1, a4 + lui a2, 1 + addiw a2, a2, -24 + mul a1, a1, a2 add a1, sp, a1 - lui a4, 63 - addiw a4, a4, -1632 - add a1, a1, a4 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a2) lui a1, 30 addiw a1, a1, -2048 + add a6, sp, a1 + vse32.v v8, (a6) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -16 + mul a1, a1, a2 add a1, sp, a1 - csrr a2, vlenb - lui a4, 1 - addiw a4, a4, -24 - mul a2, a2, a4 - add a2, sp, a2 - lui a4, 63 - addiw a4, a4, -1632 - add a2, a2, a4 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse32.v v8, (a1) + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 29 addiw a1, a1, 1920 add a1, sp, a1 - csrr a2, vlenb - lui a4, 1 - addiw a4, a4, -16 - mul a2, a2, a4 - add a2, sp, a2 - lui a4, 63 - addiw a4, a4, -1632 - add a2, a2, a4 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse32.v v8, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -8 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 29 addiw a1, a1, 1792 add a1, sp, a1 - csrr a2, vlenb - lui a4, 1 - addiw a4, a4, -8 - mul a2, a2, a4 - add a2, sp, a2 - lui a4, 63 - addiw a4, a4, -1632 - add a2, a2, a4 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse32.v v8, (a1) + csrr a1, vlenb + slli a1, a1, 12 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 29 addiw a1, a1, 1664 add a1, sp, a1 - csrr a2, vlenb - slli a2, a2, 12 - add a2, sp, a2 - lui a4, 63 - addiw a4, a4, -1632 - add a2, a2, a4 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse32.v v8, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 8 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 29 addiw a1, a1, 1536 add a1, sp, a1 - csrr a2, vlenb - lui a4, 1 - addiw a4, a4, 8 - mul a2, a2, a4 - add a2, sp, a2 - lui a4, 63 - addiw a4, a4, -1632 - add a2, a2, a4 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse32.v v8, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 16 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 29 addiw a1, a1, 1408 + add t0, sp, a1 + vse32.v v8, (t0) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 24 + mul a1, a1, a2 add a1, sp, a1 - csrr a2, vlenb - lui a4, 1 - addiw a4, a4, 16 - mul a2, a2, a4 - add a2, sp, a2 - lui a4, 63 - addiw a4, a4, -1632 - add a2, a2, a4 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse32.v v8, (a1) + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 29 addiw a1, a1, 1280 + add a7, sp, a1 + vse32.v v8, (a7) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 32 + mul a1, a1, a2 add a1, sp, a1 - csrr a2, vlenb - lui a4, 1 - addiw a4, a4, 24 - mul a2, a2, a4 - add a2, sp, a2 - lui a4, 63 - addiw a4, a4, -1632 - add a2, a2, a4 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse32.v v8, (a1) + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 29 addiw a1, a1, 1152 - add a4, sp, a1 + add a6, sp, a1 + vse32.v v8, (a6) csrr a1, vlenb lui a2, 1 - addiw a2, a2, 32 + addiw a2, a2, 40 mul a1, a1, a2 add a1, sp, a1 lui a2, 63 addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a4) lui a1, 29 addiw a1, a1, 1024 - add a7, sp, a1 + add a4, sp, a1 + vse32.v v8, (a4) csrr a1, vlenb lui a2, 1 - addiw a2, a2, 40 + addiw a2, a2, 48 mul a1, a1, a2 add a1, sp, a1 lui a2, 63 addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a7) lui a1, 29 addiw a1, a1, 896 add a2, sp, a1 + vse32.v v8, (a2) csrr a1, vlenb - lui a4, 1 - addiw a4, a4, 48 - mul a1, a1, a4 + lui t1, 1 + addiw t1, t1, 56 + mul a1, a1, t1 add a1, sp, a1 - lui a4, 63 - addiw a4, a4, -1632 - add a1, a1, a4 + lui t1, 63 + addiw t1, t1, -1632 + add a1, a1, t1 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a2) lui a1, 29 addiw a1, a1, 768 add a1, sp, a1 - csrr a4, vlenb - lui t0, 1 - addiw t0, t0, 56 - mul a4, a4, t0 - add a4, sp, a4 - lui t0, 63 - addiw t0, t0, -1632 - add a4, a4, t0 - vl8r.v v8, (a4) # Unknown-size Folded Reload vse32.v v8, (a1) - ld a4, 112(sp) # 8-byte Folded Reload - addi a4, a4, 17 - andi a4, a4, 1023 - slli a4, a4, 2 - add a4, a0, a4 - lui t0, 29 - addiw t0, t0, 640 - add t2, sp, t0 - csrr t0, vlenb - lui t1, 1 - addiw t1, t1, 64 - mul t0, t0, t1 - add t0, sp, t0 - lui t1, 63 - addiw t1, t1, -1632 - add t0, t0, t1 - vl8r.v v8, (t0) # Unknown-size Folded Reload + ld t5, 192(sp) # 8-byte Folded Reload + addi t5, t5, 17 + andi t5, t5, 1023 + slli t5, t5, 2 + add t5, a0, t5 + csrr t1, vlenb + lui t2, 1 + addiw t2, t2, 64 + mul t1, t1, t2 + add t1, sp, t1 + lui t2, 63 + addiw t2, t2, -1632 + add t1, t1, t2 + vl8r.v v8, (t1) # Unknown-size Folded Reload + lui t1, 29 + addiw t1, t1, 640 + add t2, sp, t1 vse32.v v8, (t2) - lui t0, 29 - addiw t0, t0, 512 - add t1, sp, t0 - csrr t0, vlenb + csrr t1, vlenb + lui s10, 1 + addiw s10, s10, 72 + mul t1, t1, s10 + add t1, sp, t1 + lui s10, 63 + addiw s10, s10, -1632 + add t1, t1, s10 + vl8r.v v8, (t1) # Unknown-size Folded Reload + lui t1, 29 + addiw t1, t1, 512 + add t1, sp, t1 + vse32.v v8, (t1) + csrr s10, vlenb lui s11, 1 - addiw s11, s11, 72 - mul t0, t0, s11 - add t0, sp, t0 + addiw s11, s11, 80 + mul s10, s10, s11 + add s10, sp, s10 lui s11, 63 addiw s11, s11, -1632 - add t0, t0, s11 - vl8r.v v8, (t0) # Unknown-size Folded Reload - vse32.v v8, (t1) - lui t0, 29 - addiw t0, t0, 384 - add t0, sp, t0 - csrr s11, vlenb - lui ra, 1 - addiw ra, ra, 80 - mul s11, s11, ra + add s10, s10, s11 + vl8r.v v8, (s10) # Unknown-size Folded Reload + lui s10, 29 + addiw s10, s10, 384 + add ra, sp, s10 + vse32.v v8, (ra) + csrr s11, vlenb + lui s10, 1 + addiw s10, s10, 88 + mul s11, s11, s10 add s11, sp, s11 - lui ra, 63 - addiw ra, ra, -1632 - add s11, s11, ra + lui s10, 63 + addiw s10, s10, -1632 + add s11, s11, s10 + ld s10, 0(sp) vl8r.v v8, (s11) # Unknown-size Folded Reload - vse32.v v8, (t0) - csrr ra, vlenb - lui s11, 1 - addiw s11, s11, 88 - mul ra, ra, s11 - add ra, sp, ra - lui s11, 63 - addiw s11, s11, -1632 - add ra, ra, s11 - ld s11, 0(sp) - vl8r.v v8, (ra) # Unknown-size Folded Reload - ld ra, 8(sp) + ld s11, 8(sp) vse32.v v8, (a0) - fsw fa5, 0(a4) + fsw fa5, 0(t5) vle32.v v8, (a0) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 88 - mul a0, a0, a4 + lui t5, 1 + addiw t5, t5, 88 + mul a0, a0, t5 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui t5, 63 + addiw t5, t5, -1632 + add a0, a0, t5 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t0) + vle32.v v8, (ra) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 80 - mul a0, a0, a4 + lui t5, 1 + addiw t5, t5, 80 + mul a0, a0, t5 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui t5, 63 + addiw t5, t5, -1632 + add a0, a0, t5 vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (t1) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 72 - mul a0, a0, a4 + lui t1, 1 + addiw t1, t1, 72 + mul a0, a0, t1 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui t1, 63 + addiw t1, t1, -1632 + add a0, a0, t1 vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (t2) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 64 - mul a0, a0, a4 + lui t1, 1 + addiw t1, t1, 64 + mul a0, a0, t1 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui t1, 63 + addiw t1, t1, -1632 + add a0, a0, t1 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a4, 240(sp) # 8-byte Folded Reload - addi a4, a4, 2 - andi a4, a4, 1023 - slli a4, a4, 2 + ld t5, 112(sp) # 8-byte Folded Reload + addi t5, t5, 2 + andi t5, t5, 1023 + slli t5, t5, 2 lui a0, 59 addiw a0, a0, 256 add a0, sp, a0 - add a4, a0, a4 + add t5, a0, t5 vle32.v v8, (a1) csrr a1, vlenb - lui t0, 1 - addiw t0, t0, 56 - mul a1, a1, t0 + lui t1, 1 + addiw t1, t1, 56 + mul a1, a1, t1 add a1, sp, a1 - lui t0, 63 - addiw t0, t0, -1632 - add a1, a1, t0 + lui t1, 63 + addiw t1, t1, -1632 + add a1, a1, t1 vs8r.v v8, (a1) # Unknown-size Folded Spill vle32.v v8, (a2) csrr a1, vlenb @@ -89452,7 +89452,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle32.v v8, (a7) + vle32.v v8, (a4) csrr a1, vlenb lui a2, 1 addiw a2, a2, 40 @@ -89462,10 +89462,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - lui a1, 29 - addiw a1, a1, 1152 - add a1, sp, a1 - vle32.v v8, (a1) + vle32.v v8, (a6) csrr a1, vlenb lui a2, 1 addiw a2, a2, 32 @@ -89475,10 +89472,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - lui a1, 29 - addiw a1, a1, 1280 - add a1, sp, a1 - vle32.v v8, (a1) + vle32.v v8, (a7) csrr a1, vlenb lui a2, 1 addiw a2, a2, 24 @@ -89488,10 +89482,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - lui a1, 29 - addiw a1, a1, 1408 - add a1, sp, a1 - vle32.v v8, (a1) + vle32.v v8, (t0) csrr a1, vlenb lui a2, 1 addiw a2, a2, 16 @@ -89597,7 +89588,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle32.v v8, (t4) + vle32.v v8, (a3) csrr a1, vlenb lui a2, 1 addiw a2, a2, -56 @@ -89607,7 +89598,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle32.v v8, (t5) + vle32.v v8, (t4) csrr a1, vlenb lui a2, 1 addiw a2, a2, -64 @@ -89709,7 +89700,8 @@ vs8r.v v8, (a1) # Unknown-size Folded Spill vle32.v v24, (s10) vle32.v v16, (s11) - vle32.v v8, (ra) + ld a1, 104(sp) # 8-byte Folded Reload + vle32.v v8, (a1) csrr a1, vlenb lui a2, 1 addiw a2, a2, 224 @@ -89720,203 +89712,203 @@ add a1, a1, a2 vl8r.v v0, (a1) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 96 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 59 addiw a1, a1, 384 add a1, sp, a1 - csrr a2, vlenb - lui a5, 1 - addiw a5, a5, 96 - mul a2, a2, a5 - add a2, sp, a2 - lui a5, 63 - addiw a5, a5, -1632 - add a2, a2, a5 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 208 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 59 addiw a1, a1, 512 add a1, sp, a1 - csrr a2, vlenb - lui a5, 1 - addiw a5, a5, 208 - mul a2, a2, a5 - add a2, sp, a2 - lui a5, 63 - addiw a5, a5, -1632 - add a2, a2, a5 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 216 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 59 addiw a1, a1, 640 add a1, sp, a1 - csrr a2, vlenb - lui a5, 1 - addiw a5, a5, 216 - mul a2, a2, a5 - add a2, sp, a2 - lui a5, 63 - addiw a5, a5, -1632 - add a2, a2, a5 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 192 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 59 addiw a1, a1, 768 add a1, sp, a1 - csrr a2, vlenb - lui a5, 1 - addiw a5, a5, 192 - mul a2, a2, a5 - add a2, sp, a2 - lui a5, 63 - addiw a5, a5, -1632 - add a2, a2, a5 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 200 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 59 addiw a1, a1, 896 add a1, sp, a1 - csrr a2, vlenb - lui a5, 1 - addiw a5, a5, 200 - mul a2, a2, a5 - add a2, sp, a2 - lui a5, 63 - addiw a5, a5, -1632 - add a2, a2, a5 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 176 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 59 addiw a1, a1, 1024 add a1, sp, a1 - csrr a2, vlenb - lui a5, 1 - addiw a5, a5, 176 - mul a2, a2, a5 - add a2, sp, a2 - lui a5, 63 - addiw a5, a5, -1632 - add a2, a2, a5 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 184 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 59 addiw a1, a1, 1152 add a1, sp, a1 - csrr a2, vlenb - lui a5, 1 - addiw a5, a5, 184 - mul a2, a2, a5 - add a2, sp, a2 - lui a5, 63 - addiw a5, a5, -1632 - add a2, a2, a5 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 160 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 59 addiw a1, a1, 1280 add a1, sp, a1 - csrr a2, vlenb - lui a5, 1 - addiw a5, a5, 160 - mul a2, a2, a5 - add a2, sp, a2 - lui a5, 63 - addiw a5, a5, -1632 - add a2, a2, a5 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 168 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 59 addiw a1, a1, 1408 add a1, sp, a1 - csrr a2, vlenb - lui a5, 1 - addiw a5, a5, 168 - mul a2, a2, a5 - add a2, sp, a2 - lui a5, 63 - addiw a5, a5, -1632 - add a2, a2, a5 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 144 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 59 addiw a1, a1, 1536 add a1, sp, a1 - csrr a2, vlenb - lui a5, 1 - addiw a5, a5, 144 - mul a2, a2, a5 - add a2, sp, a2 - lui a5, 63 - addiw a5, a5, -1632 - add a2, a2, a5 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 152 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 59 addiw a1, a1, 1664 add a1, sp, a1 - csrr a2, vlenb - lui a5, 1 - addiw a5, a5, 152 - mul a2, a2, a5 - add a2, sp, a2 - lui a5, 63 - addiw a5, a5, -1632 - add a2, a2, a5 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 128 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 59 addiw a1, a1, 1792 add a1, sp, a1 - csrr a2, vlenb - lui a5, 1 - addiw a5, a5, 128 - mul a2, a2, a5 - add a2, sp, a2 - lui a5, 63 - addiw a5, a5, -1632 - add a2, a2, a5 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 136 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 59 addiw a1, a1, 1920 add a1, sp, a1 - csrr a2, vlenb - lui a5, 1 - addiw a5, a5, 136 - mul a2, a2, a5 - add a2, sp, a2 - lui a5, 63 - addiw a5, a5, -1632 - add a2, a2, a5 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 112 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 60 addiw a1, a1, -2048 add a1, sp, a1 - csrr a2, vlenb - lui a5, 1 - addiw a5, a5, 112 - mul a2, a2, a5 - add a2, sp, a2 - lui a5, 63 - addiw a5, a5, -1632 - add a2, a2, a5 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 120 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 60 addiw a1, a1, -1920 add a1, sp, a1 - csrr a2, vlenb - lui a5, 1 - addiw a5, a5, 120 - mul a2, a2, a5 - add a2, sp, a2 - lui a5, 63 - addiw a5, a5, -1632 - add a2, a2, a5 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) - ld t3, 248(sp) # 8-byte Folded Reload - add a5, a0, t3 + ld t3, 184(sp) # 8-byte Folded Reload + add a3, a0, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, 104 @@ -89926,69 +89918,28 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload - vse32.v v0, (a5) - flw fa5, 0(a4) + vse32.v v0, (a3) + flw fa5, 0(t5) lui a0, 28 addiw a0, a0, 256 add a0, sp, a0 - ld ra, 160(sp) # 8-byte Folded Reload - add a1, a0, ra - sd a1, 104(sp) # 8-byte Folded Spill - vse32.v v8, (a1) - ld s8, 168(sp) # 8-byte Folded Reload - add a1, a0, s8 - sd a1, 96(sp) # 8-byte Folded Spill - vse32.v v16, (a1) - ld a1, 216(sp) # 8-byte Folded Reload - add a1, a0, a1 - sd a1, 88(sp) # 8-byte Folded Spill - vse32.v v24, (a1) - ld s11, 176(sp) # 8-byte Folded Reload - add a1, a0, s11 - sd a1, 80(sp) # 8-byte Folded Spill - sd ra, 8(sp) - sd s8, 0(sp) - csrr a2, vlenb - lui a4, 1 - addiw a4, a4, -136 - mul a2, a2, a4 - add a2, sp, a2 - lui a4, 63 - addiw a4, a4, -1632 - add a2, a2, a4 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse32.v v8, (a1) - ld s10, 120(sp) # 8-byte Folded Reload - add a1, a0, s10 - sd a1, 72(sp) # 8-byte Folded Spill - csrr a2, vlenb - li a4, 31 - slli a4, a4, 7 - mul a2, a2, a4 - add a2, sp, a2 - lui a4, 63 - addiw a4, a4, -1632 - add a2, a2, a4 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse32.v v8, (a1) - ld a1, 128(sp) # 8-byte Folded Reload + ld a1, 120(sp) # 8-byte Folded Reload add a1, a0, a1 - sd a1, 64(sp) # 8-byte Folded Spill - csrr a2, vlenb - lui a4, 1 - addiw a4, a4, -120 - mul a2, a2, a4 - add a2, sp, a2 - lui a4, 63 - addiw a4, a4, -1632 - add a2, a2, a4 - vl8r.v v8, (a2) # Unknown-size Folded Reload + sd a1, 104(sp) # 8-byte Folded Spill vse32.v v8, (a1) - ld s9, 136(sp) # 8-byte Folded Reload + ld s11, 128(sp) # 8-byte Folded Reload + add s11, a0, s11 + vse32.v v16, (s11) + ld s10, 136(sp) # 8-byte Folded Reload + add s10, a0, s10 + vse32.v v24, (s10) + ld s9, 144(sp) # 8-byte Folded Reload add s9, a0, s9 + sd s11, 8(sp) + sd s10, 0(sp) csrr a1, vlenb lui a2, 1 - addiw a2, a2, -112 + addiw a2, a2, -136 mul a1, a1, a2 add a1, sp, a1 lui a2, 63 @@ -89996,7 +89947,44 @@ add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (s9) - add s5, a0, a6 + ld s8, 152(sp) # 8-byte Folded Reload + add s8, a0, s8 + csrr a1, vlenb + li a2, 31 + slli a2, a2, 7 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse32.v v8, (s8) + ld s7, 160(sp) # 8-byte Folded Reload + add s7, a0, s7 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -120 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse32.v v8, (s7) + ld s6, 168(sp) # 8-byte Folded Reload + add s6, a0, s6 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -112 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse32.v v8, (s6) + ld s5, 176(sp) # 8-byte Folded Reload + add s5, a0, s5 csrr a1, vlenb lui a2, 1 addiw a2, a2, -104 @@ -90007,7 +89995,8 @@ add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (s5) - add s4, a0, a3 + ld s4, 208(sp) # 8-byte Folded Reload + add s4, a0, s4 csrr a1, vlenb lui a2, 1 addiw a2, a2, -96 @@ -90018,7 +90007,7 @@ add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (s4) - ld s3, 232(sp) # 8-byte Folded Reload + ld s3, 216(sp) # 8-byte Folded Reload add s3, a0, s3 csrr a1, vlenb lui a2, 1 @@ -90030,7 +90019,7 @@ add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (s3) - ld s2, 144(sp) # 8-byte Folded Reload + ld s2, 224(sp) # 8-byte Folded Reload add s2, a0, s2 csrr a1, vlenb lui a2, 1 @@ -90042,8 +90031,8 @@ add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (s2) - ld s7, 152(sp) # 8-byte Folded Reload - add t6, a0, s7 + ld t6, 232(sp) # 8-byte Folded Reload + add t6, a0, t6 csrr a1, vlenb lui a2, 1 addiw a2, a2, -72 @@ -90054,8 +90043,8 @@ add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (t6) - ld t5, 192(sp) # 8-byte Folded Reload - add t5, a0, t5 + ld t4, 240(sp) # 8-byte Folded Reload + add t4, a0, t4 csrr a1, vlenb lui a2, 1 addiw a2, a2, -64 @@ -90065,9 +90054,9 @@ addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (t5) - ld t4, 200(sp) # 8-byte Folded Reload - add t4, a0, t4 + vse32.v v8, (t4) + ld a3, 248(sp) # 8-byte Folded Reload + add a3, a0, a3 csrr a1, vlenb lui a2, 1 addiw a2, a2, -56 @@ -90077,8 +90066,8 @@ addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (t4) - ld a5, 208(sp) # 8-byte Folded Reload + vse32.v v8, (a3) + ld a5, 200(sp) # 8-byte Folded Reload add a5, a0, a5 csrr a1, vlenb lui a2, 1 @@ -90101,265 +90090,265 @@ add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (t3) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -32 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 29 addiw a1, a1, -1920 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, -32 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse32.v v8, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -24 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 29 addiw a1, a1, -2048 add a2, sp, a1 + vse32.v v8, (a2) csrr a1, vlenb - lui a3, 1 - addiw a3, a3, -24 - mul a1, a1, a3 + lui a2, 1 + addiw a2, a2, -16 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a2) lui a1, 28 addiw a1, a1, 1920 - add a3, sp, a1 + add a4, sp, a1 + vse32.v v8, (a4) csrr a1, vlenb lui a2, 1 - addiw a2, a2, -16 + addiw a2, a2, -8 mul a1, a1, a2 add a1, sp, a1 lui a2, 63 addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a3) lui a1, 28 addiw a1, a1, 1792 add a6, sp, a1 + vse32.v v8, (a6) csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -8 - mul a1, a1, a2 + slli a1, a1, 12 add a1, sp, a1 lui a2, 63 addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a6) lui a1, 28 addiw a1, a1, 1664 add a7, sp, a1 + vse32.v v8, (a7) csrr a1, vlenb - slli a1, a1, 12 + lui a2, 1 + addiw a2, a2, 8 + mul a1, a1, a2 add a1, sp, a1 lui a2, 63 addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a7) lui a1, 28 addiw a1, a1, 1536 add t0, sp, a1 + vse32.v v8, (t0) csrr a1, vlenb lui a2, 1 - addiw a2, a2, 8 + addiw a2, a2, 16 mul a1, a1, a2 add a1, sp, a1 lui a2, 63 addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (t0) lui a1, 28 addiw a1, a1, 1408 add t1, sp, a1 + vse32.v v8, (t1) csrr a1, vlenb lui a2, 1 - addiw a2, a2, 16 + addiw a2, a2, 24 mul a1, a1, a2 add a1, sp, a1 lui a2, 63 addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (t1) lui a1, 28 addiw a1, a1, 1280 add t2, sp, a1 + vse32.v v8, (t2) csrr a1, vlenb lui a2, 1 - addiw a2, a2, 24 + addiw a2, a2, 32 mul a1, a1, a2 add a1, sp, a1 lui a2, 63 addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a1, 28 addiw a1, a1, 1152 add a6, sp, a1 + vse32.v v8, (a6) csrr a1, vlenb lui a2, 1 - addiw a2, a2, 32 + addiw a2, a2, 40 mul a1, a1, a2 add a1, sp, a1 lui a2, 63 addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a6) lui a1, 28 addiw a1, a1, 1024 - add a3, sp, a1 + add a4, sp, a1 + vse32.v v8, (a4) csrr a1, vlenb lui a2, 1 - addiw a2, a2, 40 + addiw a2, a2, 48 mul a1, a1, a2 add a1, sp, a1 lui a2, 63 addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a3) lui a1, 28 addiw a1, a1, 896 add a2, sp, a1 + vse32.v v8, (a2) csrr a1, vlenb - lui a4, 1 - addiw a4, a4, 48 - mul a1, a1, a4 + lui a7, 1 + addiw a7, a7, 56 + mul a1, a1, a7 add a1, sp, a1 - lui a4, 63 - addiw a4, a4, -1632 - add a1, a1, a4 + lui a7, 63 + addiw a7, a7, -1632 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a2) lui a1, 28 addiw a1, a1, 768 add a1, sp, a1 - csrr a4, vlenb - lui a7, 1 - addiw a7, a7, 56 - mul a4, a4, a7 - add a4, sp, a4 - lui a7, 63 - addiw a7, a7, -1632 - add a4, a4, a7 - vl8r.v v8, (a4) # Unknown-size Folded Reload vse32.v v8, (a1) - ld s6, 112(sp) # 8-byte Folded Reload - addi a4, s6, 34 - andi a4, a4, 1023 - slli a4, a4, 2 - add a4, a0, a4 + ld a7, 192(sp) # 8-byte Folded Reload + addi t5, a7, 34 + andi t5, t5, 1023 + slli t5, t5, 2 + add t5, a0, t5 + csrr a7, vlenb + lui t0, 1 + addiw t0, t0, 64 + mul a7, a7, t0 + add a7, sp, a7 + lui t0, 63 + addiw t0, t0, -1632 + add a7, a7, t0 + vl8r.v v8, (a7) # Unknown-size Folded Reload lui a7, 28 addiw a7, a7, 640 add a7, sp, a7 + vse32.v v8, (a7) csrr t0, vlenb - lui t1, 1 - addiw t1, t1, 64 - mul t0, t0, t1 + lui s10, 1 + addiw s10, s10, 72 + mul t0, t0, s10 add t0, sp, t0 - lui t1, 63 - addiw t1, t1, -1632 - add t0, t0, t1 + lui s10, 63 + addiw s10, s10, -1632 + add t0, t0, s10 vl8r.v v8, (t0) # Unknown-size Folded Reload - vse32.v v8, (a7) lui t0, 28 addiw t0, t0, 512 add t0, sp, t0 - csrr t1, vlenb - lui s8, 1 - addiw s8, s8, 72 - mul t1, t1, s8 - add t1, sp, t1 - lui s8, 63 - addiw s8, s8, -1632 - add t1, t1, s8 - vl8r.v v8, (t1) # Unknown-size Folded Reload vse32.v v8, (t0) - lui t1, 28 - addiw t1, t1, 384 - add t1, sp, t1 - csrr s8, vlenb - lui ra, 1 - addiw ra, ra, 80 - mul s8, s8, ra - add s8, sp, s8 - lui ra, 63 - addiw ra, ra, -1632 - add s8, s8, ra - vl8r.v v8, (s8) # Unknown-size Folded Reload - vse32.v v8, (t1) - csrr ra, vlenb - lui s8, 1 - addiw s8, s8, 88 - mul ra, ra, s8 - add ra, sp, ra - lui s8, 63 - addiw s8, s8, -1632 - add ra, ra, s8 - ld s8, 0(sp) - vl8r.v v8, (ra) # Unknown-size Folded Reload - ld ra, 8(sp) + csrr s10, vlenb + lui s11, 1 + addiw s11, s11, 80 + mul s10, s10, s11 + add s10, sp, s10 + lui s11, 63 + addiw s11, s11, -1632 + add s10, s10, s11 + vl8r.v v8, (s10) # Unknown-size Folded Reload + lui s10, 28 + addiw s10, s10, 384 + add ra, sp, s10 + vse32.v v8, (ra) + csrr s11, vlenb + lui s10, 1 + addiw s10, s10, 88 + mul s11, s11, s10 + add s11, sp, s11 + lui s10, 63 + addiw s10, s10, -1632 + add s11, s11, s10 + ld s10, 0(sp) + vl8r.v v8, (s11) # Unknown-size Folded Reload + ld s11, 8(sp) vse32.v v8, (a0) - fsw fa5, 0(a4) + fsw fa5, 0(t5) vle32.v v8, (a0) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 88 - mul a0, a0, a4 + lui t5, 1 + addiw t5, t5, 88 + mul a0, a0, t5 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui t5, 63 + addiw t5, t5, -1632 + add a0, a0, t5 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t1) + vle32.v v8, (ra) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 80 - mul a0, a0, a4 + lui t5, 1 + addiw t5, t5, 80 + mul a0, a0, t5 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui t5, 63 + addiw t5, t5, -1632 + add a0, a0, t5 vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (t0) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 72 - mul a0, a0, a4 + lui t0, 1 + addiw t0, t0, 72 + mul a0, a0, t0 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui t0, 63 + addiw t0, t0, -1632 + add a0, a0, t0 vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (a7) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 64 - mul a0, a0, a4 + lui a7, 1 + addiw a7, a7, 64 + mul a0, a0, a7 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui a7, 63 + addiw a7, a7, -1632 + add a0, a0, a7 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a4, 240(sp) # 8-byte Folded Reload - addi a4, a4, 3 - andi a4, a4, 1023 - slli a4, a4, 2 + ld t5, 112(sp) # 8-byte Folded Reload + addi t5, t5, 3 + andi t5, t5, 1023 + slli t5, t5, 2 lui a0, 58 addiw a0, a0, 256 add a0, sp, a0 - add a4, a0, a4 + add t5, a0, t5 vle32.v v8, (a1) csrr a1, vlenb lui a7, 1 @@ -90380,7 +90369,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle32.v v8, (a3) + vle32.v v8, (a4) csrr a1, vlenb lui a2, 1 addiw a2, a2, 40 @@ -90410,10 +90399,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - lui a1, 28 - addiw a1, a1, 1408 - add a1, sp, a1 - vle32.v v8, (a1) + vle32.v v8, (t1) csrr a1, vlenb lui a2, 1 addiw a2, a2, 16 @@ -90519,7 +90505,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle32.v v8, (t4) + vle32.v v8, (a3) csrr a1, vlenb lui a2, 1 addiw a2, a2, -56 @@ -90529,7 +90515,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle32.v v8, (t5) + vle32.v v8, (t4) csrr a1, vlenb lui a2, 1 addiw a2, a2, -64 @@ -90589,7 +90575,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle32.v v8, (s9) + vle32.v v8, (s6) csrr a1, vlenb lui a2, 1 addiw a2, a2, -112 @@ -90599,8 +90585,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - ld a1, 64(sp) # 8-byte Folded Reload - vle32.v v8, (a1) + vle32.v v8, (s7) csrr a1, vlenb lui a2, 1 addiw a2, a2, -120 @@ -90610,8 +90595,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - ld a1, 72(sp) # 8-byte Folded Reload - vle32.v v8, (a1) + vle32.v v8, (s8) csrr a1, vlenb li a2, 31 slli a2, a2, 7 @@ -90621,8 +90605,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - ld a1, 80(sp) # 8-byte Folded Reload - vle32.v v8, (a1) + vle32.v v8, (s9) csrr a1, vlenb lui a2, 1 addiw a2, a2, -136 @@ -90632,10 +90615,8 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - ld a1, 88(sp) # 8-byte Folded Reload - vle32.v v24, (a1) - ld a1, 96(sp) # 8-byte Folded Reload - vle32.v v16, (a1) + vle32.v v24, (s10) + vle32.v v16, (s11) ld a1, 104(sp) # 8-byte Folded Reload vle32.v v8, (a1) csrr a1, vlenb @@ -90648,373 +90629,374 @@ add a1, a1, a2 vl8r.v v0, (a1) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 96 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 58 addiw a1, a1, 384 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 96 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 208 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 58 addiw a1, a1, 512 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 216 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 58 addiw a1, a1, 640 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 192 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 58 addiw a1, a1, 768 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 200 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 58 addiw a1, a1, 896 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 176 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 58 addiw a1, a1, 1024 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 184 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 58 addiw a1, a1, 1152 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 160 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 58 addiw a1, a1, 1280 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 168 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 58 addiw a1, a1, 1408 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 144 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 58 addiw a1, a1, 1536 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 152 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 58 addiw a1, a1, 1664 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 128 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 58 addiw a1, a1, 1792 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 136 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 58 addiw a1, a1, 1920 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 112 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 59 addiw a1, a1, -2048 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 112 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 120 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 59 addiw a1, a1, -1920 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) - ld a1, 248(sp) # 8-byte Folded Reload - add a5, a0, a1 + ld t3, 184(sp) # 8-byte Folded Reload + add a3, a0, t3 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 104 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 104 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 63 - addiw a2, a2, -1632 - add a0, a0, a2 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload - vse32.v v0, (a5) - flw fa5, 0(a4) + vse32.v v0, (a3) + flw fa5, 0(t5) lui a0, 27 addiw a0, a0, 256 add a0, sp, a0 - add ra, a0, ra - sd ra, 104(sp) # 8-byte Folded Spill - vse32.v v8, (ra) - add s8, a0, s8 - sd s8, 96(sp) # 8-byte Folded Spill - vse32.v v16, (s8) - ld a2, 216(sp) # 8-byte Folded Reload - add a2, a0, a2 - sd a2, 88(sp) # 8-byte Folded Spill - vse32.v v24, (a2) + ld a1, 120(sp) # 8-byte Folded Reload + add a1, a0, a1 + sd a1, 104(sp) # 8-byte Folded Spill + vse32.v v8, (a1) + ld s11, 128(sp) # 8-byte Folded Reload add s11, a0, s11 - sd s11, 80(sp) # 8-byte Folded Spill - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, -136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse32.v v8, (s11) + vse32.v v16, (s11) + ld s10, 136(sp) # 8-byte Folded Reload add s10, a0, s10 - sd s10, 72(sp) # 8-byte Folded Spill - csrr a2, vlenb - li a3, 31 - slli a3, a3, 7 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse32.v v8, (s10) - ld ra, 128(sp) # 8-byte Folded Reload - add ra, a0, ra - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, -120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse32.v v8, (ra) - ld s9, 136(sp) # 8-byte Folded Reload - add s11, a0, s9 - sd ra, 8(sp) - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, -112 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse32.v v8, (s11) - ld s5, 224(sp) # 8-byte Folded Reload + vse32.v v24, (s10) + ld s9, 144(sp) # 8-byte Folded Reload + add s9, a0, s9 + sd s11, 8(sp) + sd s10, 0(sp) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -136 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse32.v v8, (s9) + ld s8, 152(sp) # 8-byte Folded Reload + add s8, a0, s8 + csrr a1, vlenb + li a2, 31 + slli a2, a2, 7 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse32.v v8, (s8) + ld s7, 160(sp) # 8-byte Folded Reload + add s7, a0, s7 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -120 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse32.v v8, (s7) + ld s6, 168(sp) # 8-byte Folded Reload + add s6, a0, s6 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -112 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse32.v v8, (s6) + ld s5, 176(sp) # 8-byte Folded Reload add s5, a0, s5 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, -104 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -104 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (s5) - ld s4, 184(sp) # 8-byte Folded Reload + ld s4, 208(sp) # 8-byte Folded Reload add s4, a0, s4 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, -96 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -96 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (s4) - ld s10, 232(sp) # 8-byte Folded Reload - add s3, a0, s10 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, -88 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload + ld s3, 216(sp) # 8-byte Folded Reload + add s3, a0, s3 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -88 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (s3) - ld s2, 144(sp) # 8-byte Folded Reload + ld s2, 224(sp) # 8-byte Folded Reload add s2, a0, s2 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, -80 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -80 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (s2) - add t6, a0, s7 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, -72 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload + ld t6, 232(sp) # 8-byte Folded Reload + add t6, a0, t6 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -72 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (t6) - ld t5, 192(sp) # 8-byte Folded Reload - add t5, a0, t5 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, -64 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse32.v v8, (t5) - ld s8, 200(sp) # 8-byte Folded Reload - add t4, a0, s8 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, -56 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload + ld t4, 240(sp) # 8-byte Folded Reload + add t4, a0, t4 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -64 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (t4) - ld a5, 208(sp) # 8-byte Folded Reload + ld a3, 248(sp) # 8-byte Folded Reload + add a3, a0, a3 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -56 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse32.v v8, (a3) + ld a5, 200(sp) # 8-byte Folded Reload add a5, a0, a5 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, -48 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -48 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a5) - add t3, a0, a1 - mv s7, a1 + add t3, a0, t3 csrr a1, vlenb lui a2, 1 addiw a2, a2, -40 @@ -91025,263 +91007,265 @@ add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (t3) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -32 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 28 addiw a1, a1, -1920 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, -32 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse32.v v8, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -24 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 28 addiw a1, a1, -2048 add a2, sp, a1 + vse32.v v8, (a2) csrr a1, vlenb - lui a3, 1 - addiw a3, a3, -24 - mul a1, a1, a3 + lui a2, 1 + addiw a2, a2, -16 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a2) lui a1, 27 addiw a1, a1, 1920 - add a3, sp, a1 + add a4, sp, a1 + vse32.v v8, (a4) csrr a1, vlenb lui a2, 1 - addiw a2, a2, -16 + addiw a2, a2, -8 mul a1, a1, a2 add a1, sp, a1 lui a2, 63 addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a3) lui a1, 27 addiw a1, a1, 1792 add a6, sp, a1 + vse32.v v8, (a6) csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -8 - mul a1, a1, a2 + slli a1, a1, 12 add a1, sp, a1 lui a2, 63 addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a6) lui a1, 27 addiw a1, a1, 1664 add a7, sp, a1 + vse32.v v8, (a7) csrr a1, vlenb - slli a1, a1, 12 + lui a2, 1 + addiw a2, a2, 8 + mul a1, a1, a2 add a1, sp, a1 lui a2, 63 addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a7) lui a1, 27 addiw a1, a1, 1536 add t0, sp, a1 + vse32.v v8, (t0) csrr a1, vlenb lui a2, 1 - addiw a2, a2, 8 + addiw a2, a2, 16 mul a1, a1, a2 add a1, sp, a1 lui a2, 63 addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (t0) lui a1, 27 addiw a1, a1, 1408 add t1, sp, a1 + vse32.v v8, (t1) csrr a1, vlenb lui a2, 1 - addiw a2, a2, 16 + addiw a2, a2, 24 mul a1, a1, a2 add a1, sp, a1 lui a2, 63 addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (t1) lui a1, 27 addiw a1, a1, 1280 add t2, sp, a1 + vse32.v v8, (t2) csrr a1, vlenb lui a2, 1 - addiw a2, a2, 24 + addiw a2, a2, 32 mul a1, a1, a2 add a1, sp, a1 lui a2, 63 addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a1, 27 addiw a1, a1, 1152 add a6, sp, a1 + vse32.v v8, (a6) csrr a1, vlenb lui a2, 1 - addiw a2, a2, 32 + addiw a2, a2, 40 mul a1, a1, a2 add a1, sp, a1 lui a2, 63 addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a6) lui a1, 27 addiw a1, a1, 1024 - add a3, sp, a1 + add a4, sp, a1 + vse32.v v8, (a4) csrr a1, vlenb lui a2, 1 - addiw a2, a2, 40 + addiw a2, a2, 48 mul a1, a1, a2 add a1, sp, a1 lui a2, 63 addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a3) lui a1, 27 addiw a1, a1, 896 add a2, sp, a1 + vse32.v v8, (a2) csrr a1, vlenb - lui a4, 1 - addiw a4, a4, 48 - mul a1, a1, a4 + lui a7, 1 + addiw a7, a7, 56 + mul a1, a1, a7 add a1, sp, a1 - lui a4, 63 - addiw a4, a4, -1632 - add a1, a1, a4 + lui a7, 63 + addiw a7, a7, -1632 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a2) lui a1, 27 addiw a1, a1, 768 add a1, sp, a1 - csrr a4, vlenb - lui a7, 1 - addiw a7, a7, 56 - mul a4, a4, a7 - add a4, sp, a4 - lui a7, 63 - addiw a7, a7, -1632 - add a4, a4, a7 - vl8r.v v8, (a4) # Unknown-size Folded Reload vse32.v v8, (a1) - addi a4, s6, 51 - andi a4, a4, 1023 - slli a4, a4, 2 - add a4, a0, a4 + ld a7, 192(sp) # 8-byte Folded Reload + addi t5, a7, 51 + andi t5, t5, 1023 + slli t5, t5, 2 + add t5, a0, t5 + csrr a7, vlenb + lui t0, 1 + addiw t0, t0, 64 + mul a7, a7, t0 + add a7, sp, a7 + lui t0, 63 + addiw t0, t0, -1632 + add a7, a7, t0 + vl8r.v v8, (a7) # Unknown-size Folded Reload lui a7, 27 addiw a7, a7, 640 add a7, sp, a7 + vse32.v v8, (a7) csrr t0, vlenb - lui t1, 1 - addiw t1, t1, 64 - mul t0, t0, t1 + lui s10, 1 + addiw s10, s10, 72 + mul t0, t0, s10 add t0, sp, t0 - lui t1, 63 - addiw t1, t1, -1632 - add t0, t0, t1 + lui s10, 63 + addiw s10, s10, -1632 + add t0, t0, s10 vl8r.v v8, (t0) # Unknown-size Folded Reload - vse32.v v8, (a7) lui t0, 27 addiw t0, t0, 512 add t0, sp, t0 - csrr t1, vlenb - lui s6, 1 - addiw s6, s6, 72 - mul t1, t1, s6 - add t1, sp, t1 - lui s6, 63 - addiw s6, s6, -1632 - add t1, t1, s6 - vl8r.v v8, (t1) # Unknown-size Folded Reload vse32.v v8, (t0) - lui t1, 27 - addiw t1, t1, 384 - add t1, sp, t1 - csrr s6, vlenb - lui ra, 1 - addiw ra, ra, 80 - mul s6, s6, ra - add s6, sp, s6 - lui ra, 63 - addiw ra, ra, -1632 - add s6, s6, ra - vl8r.v v8, (s6) # Unknown-size Folded Reload - vse32.v v8, (t1) - csrr s6, vlenb - lui ra, 1 - addiw ra, ra, 88 - mul s6, s6, ra - add s6, sp, s6 - lui ra, 63 - addiw ra, ra, -1632 - add s6, s6, ra - ld ra, 8(sp) - vl8r.v v8, (s6) # Unknown-size Folded Reload + csrr s10, vlenb + lui s11, 1 + addiw s11, s11, 80 + mul s10, s10, s11 + add s10, sp, s10 + lui s11, 63 + addiw s11, s11, -1632 + add s10, s10, s11 + vl8r.v v8, (s10) # Unknown-size Folded Reload + lui s10, 27 + addiw s10, s10, 384 + add ra, sp, s10 + vse32.v v8, (ra) + csrr s11, vlenb + lui s10, 1 + addiw s10, s10, 88 + mul s11, s11, s10 + add s11, sp, s11 + lui s10, 63 + addiw s10, s10, -1632 + add s11, s11, s10 + ld s10, 0(sp) + vl8r.v v8, (s11) # Unknown-size Folded Reload + ld s11, 8(sp) vse32.v v8, (a0) - fsw fa5, 0(a4) + fsw fa5, 0(t5) vle32.v v8, (a0) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 88 - mul a0, a0, a4 + lui t5, 1 + addiw t5, t5, 88 + mul a0, a0, t5 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui t5, 63 + addiw t5, t5, -1632 + add a0, a0, t5 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t1) + vle32.v v8, (ra) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 80 - mul a0, a0, a4 + lui t5, 1 + addiw t5, t5, 80 + mul a0, a0, t5 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui t5, 63 + addiw t5, t5, -1632 + add a0, a0, t5 vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (t0) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 72 - mul a0, a0, a4 + lui t0, 1 + addiw t0, t0, 72 + mul a0, a0, t0 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui t0, 63 + addiw t0, t0, -1632 + add a0, a0, t0 vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (a7) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 64 - mul a0, a0, a4 + lui a7, 1 + addiw a7, a7, 64 + mul a0, a0, a7 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui a7, 63 + addiw a7, a7, -1632 + add a0, a0, a7 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a4, 240(sp) # 8-byte Folded Reload - addi a4, a4, 4 - andi a4, a4, 1023 - slli a4, a4, 2 + ld t5, 112(sp) # 8-byte Folded Reload + addi t5, t5, 4 + andi t5, t5, 1023 + slli t5, t5, 2 lui a0, 57 addiw a0, a0, 256 add a0, sp, a0 - add a4, a0, a4 + add t5, a0, t5 vle32.v v8, (a1) csrr a1, vlenb lui a7, 1 @@ -91302,7 +91286,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle32.v v8, (a3) + vle32.v v8, (a4) csrr a1, vlenb lui a2, 1 addiw a2, a2, 40 @@ -91332,10 +91316,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - lui a1, 27 - addiw a1, a1, 1408 - add a1, sp, a1 - vle32.v v8, (a1) + vle32.v v8, (t1) csrr a1, vlenb lui a2, 1 addiw a2, a2, 16 @@ -91441,7 +91422,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle32.v v8, (t4) + vle32.v v8, (a3) csrr a1, vlenb lui a2, 1 addiw a2, a2, -56 @@ -91451,7 +91432,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle32.v v8, (t5) + vle32.v v8, (t4) csrr a1, vlenb lui a2, 1 addiw a2, a2, -64 @@ -91511,7 +91492,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle32.v v8, (s11) + vle32.v v8, (s6) csrr a1, vlenb lui a2, 1 addiw a2, a2, -112 @@ -91521,7 +91502,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle32.v v8, (ra) + vle32.v v8, (s7) csrr a1, vlenb lui a2, 1 addiw a2, a2, -120 @@ -91531,8 +91512,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - ld a1, 72(sp) # 8-byte Folded Reload - vle32.v v8, (a1) + vle32.v v8, (s8) csrr a1, vlenb li a2, 31 slli a2, a2, 7 @@ -91542,8 +91522,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - ld a1, 80(sp) # 8-byte Folded Reload - vle32.v v8, (a1) + vle32.v v8, (s9) csrr a1, vlenb lui a2, 1 addiw a2, a2, -136 @@ -91553,10 +91532,8 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - ld a1, 88(sp) # 8-byte Folded Reload - vle32.v v24, (a1) - ld a1, 96(sp) # 8-byte Folded Reload - vle32.v v16, (a1) + vle32.v v24, (s10) + vle32.v v16, (s11) ld a1, 104(sp) # 8-byte Folded Reload vle32.v v8, (a1) csrr a1, vlenb @@ -91569,203 +91546,203 @@ add a1, a1, a2 vl8r.v v0, (a1) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 96 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 57 addiw a1, a1, 384 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 96 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 208 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 57 addiw a1, a1, 512 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 216 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 57 addiw a1, a1, 640 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 192 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 57 addiw a1, a1, 768 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 200 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 57 addiw a1, a1, 896 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 176 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 57 addiw a1, a1, 1024 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 184 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 57 addiw a1, a1, 1152 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 160 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 57 addiw a1, a1, 1280 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 168 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 57 addiw a1, a1, 1408 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 144 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 57 addiw a1, a1, 1536 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 152 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 57 addiw a1, a1, 1664 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 128 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 57 addiw a1, a1, 1792 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 136 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 57 addiw a1, a1, 1920 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 112 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 58 addiw a1, a1, -2048 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 112 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 120 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 58 addiw a1, a1, -1920 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) - mv a2, s7 - add a5, a0, s7 + ld t3, 184(sp) # 8-byte Folded Reload + add a3, a0, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, 104 @@ -91775,170 +91752,168 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload - vse32.v v0, (a5) - flw fa5, 0(a4) + vse32.v v0, (a3) + flw fa5, 0(t5) lui a0, 26 addiw a0, a0, 256 add a0, sp, a0 - ld a1, 160(sp) # 8-byte Folded Reload - add a1, a0, a1 - sd a1, 104(sp) # 8-byte Folded Spill - vse32.v v8, (a1) - ld a1, 168(sp) # 8-byte Folded Reload - add a1, a0, a1 - sd a1, 96(sp) # 8-byte Folded Spill - vse32.v v16, (a1) - ld ra, 216(sp) # 8-byte Folded Reload - add a1, a0, ra - sd a1, 88(sp) # 8-byte Folded Spill - vse32.v v24, (a1) - ld a1, 176(sp) # 8-byte Folded Reload - add a1, a0, a1 - sd a1, 80(sp) # 8-byte Folded Spill - sd ra, 8(sp) - csrr a3, vlenb - lui a4, 1 - addiw a4, a4, -136 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 63 - addiw a4, a4, -1632 - add a3, a3, a4 - vl8r.v v8, (a3) # Unknown-size Folded Reload - vse32.v v8, (a1) ld a1, 120(sp) # 8-byte Folded Reload add a1, a0, a1 - sd a1, 72(sp) # 8-byte Folded Spill - csrr a3, vlenb - li a4, 31 - slli a4, a4, 7 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 63 - addiw a4, a4, -1632 - add a3, a3, a4 - vl8r.v v8, (a3) # Unknown-size Folded Reload + sd a1, 104(sp) # 8-byte Folded Spill vse32.v v8, (a1) - ld s7, 128(sp) # 8-byte Folded Reload - add s6, a0, s7 - sd s7, 0(sp) + ld s11, 128(sp) # 8-byte Folded Reload + add s11, a0, s11 + vse32.v v16, (s11) + ld s10, 136(sp) # 8-byte Folded Reload + add s10, a0, s10 + vse32.v v24, (s10) + ld s9, 144(sp) # 8-byte Folded Reload + add s9, a0, s9 + sd s11, 8(sp) + sd s10, 0(sp) csrr a1, vlenb - lui a3, 1 - addiw a3, a3, -120 - mul a1, a1, a3 + lui a2, 1 + addiw a2, a2, -136 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (s6) - add s11, a0, s9 + vse32.v v8, (s9) + ld s8, 152(sp) # 8-byte Folded Reload + add s8, a0, s8 csrr a1, vlenb - lui a3, 1 - addiw a3, a3, -112 - mul a1, a1, a3 + li a2, 31 + slli a2, a2, 7 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (s11) - ld s5, 224(sp) # 8-byte Folded Reload + vse32.v v8, (s8) + ld s7, 160(sp) # 8-byte Folded Reload + add s7, a0, s7 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -120 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse32.v v8, (s7) + ld s6, 168(sp) # 8-byte Folded Reload + add s6, a0, s6 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -112 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse32.v v8, (s6) + ld s5, 176(sp) # 8-byte Folded Reload add s5, a0, s5 csrr a1, vlenb - lui a3, 1 - addiw a3, a3, -104 - mul a1, a1, a3 + lui a2, 1 + addiw a2, a2, -104 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (s5) - ld s9, 184(sp) # 8-byte Folded Reload - add s9, a0, s9 + ld s4, 208(sp) # 8-byte Folded Reload + add s4, a0, s4 csrr a1, vlenb - lui a3, 1 - addiw a3, a3, -96 - mul a1, a1, a3 + lui a2, 1 + addiw a2, a2, -96 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (s9) - add s3, a0, s10 + vse32.v v8, (s4) + ld s3, 216(sp) # 8-byte Folded Reload + add s3, a0, s3 csrr a1, vlenb - lui a3, 1 - addiw a3, a3, -88 - mul a1, a1, a3 + lui a2, 1 + addiw a2, a2, -88 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (s3) - ld s2, 144(sp) # 8-byte Folded Reload + ld s2, 224(sp) # 8-byte Folded Reload add s2, a0, s2 csrr a1, vlenb - lui a3, 1 - addiw a3, a3, -80 - mul a1, a1, a3 + lui a2, 1 + addiw a2, a2, -80 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (s2) - ld t6, 152(sp) # 8-byte Folded Reload + ld t6, 232(sp) # 8-byte Folded Reload add t6, a0, t6 csrr a1, vlenb - lui a3, 1 - addiw a3, a3, -72 - mul a1, a1, a3 + lui a2, 1 + addiw a2, a2, -72 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (t6) - ld s10, 192(sp) # 8-byte Folded Reload - add t5, a0, s10 + ld t4, 240(sp) # 8-byte Folded Reload + add t4, a0, t4 csrr a1, vlenb - lui a3, 1 - addiw a3, a3, -64 - mul a1, a1, a3 + lui a2, 1 + addiw a2, a2, -64 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (t5) - add t4, a0, s8 + vse32.v v8, (t4) + ld a3, 248(sp) # 8-byte Folded Reload + add a3, a0, a3 csrr a1, vlenb - lui a3, 1 - addiw a3, a3, -56 - mul a1, a1, a3 + lui a2, 1 + addiw a2, a2, -56 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (t4) - ld a5, 208(sp) # 8-byte Folded Reload + vse32.v v8, (a3) + ld a5, 200(sp) # 8-byte Folded Reload add a5, a0, a5 csrr a1, vlenb - lui a3, 1 - addiw a3, a3, -48 - mul a1, a1, a3 + lui a2, 1 + addiw a2, a2, -48 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a5) - add t3, a0, a2 - mv s8, a2 + add t3, a0, t3 csrr a1, vlenb lui a2, 1 addiw a2, a2, -40 @@ -91949,265 +91924,265 @@ add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (t3) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -32 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 27 addiw a1, a1, -1920 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, -32 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse32.v v8, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -24 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 27 addiw a1, a1, -2048 add a2, sp, a1 + vse32.v v8, (a2) csrr a1, vlenb - lui a3, 1 - addiw a3, a3, -24 - mul a1, a1, a3 + lui a2, 1 + addiw a2, a2, -16 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a2) lui a1, 26 addiw a1, a1, 1920 - add a3, sp, a1 + add a4, sp, a1 + vse32.v v8, (a4) csrr a1, vlenb lui a2, 1 - addiw a2, a2, -16 + addiw a2, a2, -8 mul a1, a1, a2 add a1, sp, a1 lui a2, 63 addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a3) lui a1, 26 addiw a1, a1, 1792 add a6, sp, a1 + vse32.v v8, (a6) csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -8 - mul a1, a1, a2 + slli a1, a1, 12 add a1, sp, a1 lui a2, 63 addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a6) lui a1, 26 addiw a1, a1, 1664 add a7, sp, a1 + vse32.v v8, (a7) csrr a1, vlenb - slli a1, a1, 12 + lui a2, 1 + addiw a2, a2, 8 + mul a1, a1, a2 add a1, sp, a1 lui a2, 63 addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a7) lui a1, 26 addiw a1, a1, 1536 add t0, sp, a1 + vse32.v v8, (t0) csrr a1, vlenb lui a2, 1 - addiw a2, a2, 8 + addiw a2, a2, 16 mul a1, a1, a2 add a1, sp, a1 lui a2, 63 addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (t0) lui a1, 26 addiw a1, a1, 1408 add t1, sp, a1 + vse32.v v8, (t1) csrr a1, vlenb lui a2, 1 - addiw a2, a2, 16 + addiw a2, a2, 24 mul a1, a1, a2 add a1, sp, a1 lui a2, 63 addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (t1) lui a1, 26 addiw a1, a1, 1280 add t2, sp, a1 + vse32.v v8, (t2) csrr a1, vlenb lui a2, 1 - addiw a2, a2, 24 + addiw a2, a2, 32 mul a1, a1, a2 add a1, sp, a1 lui a2, 63 addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a1, 26 addiw a1, a1, 1152 add a6, sp, a1 + vse32.v v8, (a6) csrr a1, vlenb lui a2, 1 - addiw a2, a2, 32 + addiw a2, a2, 40 mul a1, a1, a2 add a1, sp, a1 lui a2, 63 addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a6) lui a1, 26 addiw a1, a1, 1024 - add a3, sp, a1 + add a4, sp, a1 + vse32.v v8, (a4) csrr a1, vlenb lui a2, 1 - addiw a2, a2, 40 + addiw a2, a2, 48 mul a1, a1, a2 add a1, sp, a1 lui a2, 63 addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a3) lui a1, 26 addiw a1, a1, 896 add a2, sp, a1 + vse32.v v8, (a2) csrr a1, vlenb - lui a4, 1 - addiw a4, a4, 48 - mul a1, a1, a4 + lui a7, 1 + addiw a7, a7, 56 + mul a1, a1, a7 add a1, sp, a1 - lui a4, 63 - addiw a4, a4, -1632 - add a1, a1, a4 + lui a7, 63 + addiw a7, a7, -1632 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a2) lui a1, 26 addiw a1, a1, 768 add a1, sp, a1 - csrr a4, vlenb - lui a7, 1 - addiw a7, a7, 56 - mul a4, a4, a7 - add a4, sp, a4 - lui a7, 63 - addiw a7, a7, -1632 - add a4, a4, a7 - vl8r.v v8, (a4) # Unknown-size Folded Reload vse32.v v8, (a1) - ld s4, 112(sp) # 8-byte Folded Reload - addi a4, s4, 68 - andi a4, a4, 1023 - slli a4, a4, 2 - add a4, a0, a4 + ld a7, 192(sp) # 8-byte Folded Reload + addi t5, a7, 68 + andi t5, t5, 1023 + slli t5, t5, 2 + add t5, a0, t5 + csrr a7, vlenb + lui t0, 1 + addiw t0, t0, 64 + mul a7, a7, t0 + add a7, sp, a7 + lui t0, 63 + addiw t0, t0, -1632 + add a7, a7, t0 + vl8r.v v8, (a7) # Unknown-size Folded Reload lui a7, 26 addiw a7, a7, 640 add a7, sp, a7 + vse32.v v8, (a7) csrr t0, vlenb - lui t1, 1 - addiw t1, t1, 64 - mul t0, t0, t1 + lui s10, 1 + addiw s10, s10, 72 + mul t0, t0, s10 add t0, sp, t0 - lui t1, 63 - addiw t1, t1, -1632 - add t0, t0, t1 + lui s10, 63 + addiw s10, s10, -1632 + add t0, t0, s10 vl8r.v v8, (t0) # Unknown-size Folded Reload - vse32.v v8, (a7) lui t0, 26 addiw t0, t0, 512 add t0, sp, t0 - csrr t1, vlenb - lui s7, 1 - addiw s7, s7, 72 - mul t1, t1, s7 - add t1, sp, t1 - lui s7, 63 - addiw s7, s7, -1632 - add t1, t1, s7 - vl8r.v v8, (t1) # Unknown-size Folded Reload vse32.v v8, (t0) - lui t1, 26 - addiw t1, t1, 384 - add t1, sp, t1 - csrr s7, vlenb - lui ra, 1 - addiw ra, ra, 80 - mul s7, s7, ra - add s7, sp, s7 - lui ra, 63 - addiw ra, ra, -1632 - add s7, s7, ra - vl8r.v v8, (s7) # Unknown-size Folded Reload - vse32.v v8, (t1) - csrr ra, vlenb - lui s7, 1 - addiw s7, s7, 88 - mul ra, ra, s7 - add ra, sp, ra - lui s7, 63 - addiw s7, s7, -1632 - add ra, ra, s7 - ld s7, 0(sp) - vl8r.v v8, (ra) # Unknown-size Folded Reload - ld ra, 8(sp) + csrr s10, vlenb + lui s11, 1 + addiw s11, s11, 80 + mul s10, s10, s11 + add s10, sp, s10 + lui s11, 63 + addiw s11, s11, -1632 + add s10, s10, s11 + vl8r.v v8, (s10) # Unknown-size Folded Reload + lui s10, 26 + addiw s10, s10, 384 + add ra, sp, s10 + vse32.v v8, (ra) + csrr s11, vlenb + lui s10, 1 + addiw s10, s10, 88 + mul s11, s11, s10 + add s11, sp, s11 + lui s10, 63 + addiw s10, s10, -1632 + add s11, s11, s10 + ld s10, 0(sp) + vl8r.v v8, (s11) # Unknown-size Folded Reload + ld s11, 8(sp) vse32.v v8, (a0) - fsw fa5, 0(a4) + fsw fa5, 0(t5) vle32.v v8, (a0) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 88 - mul a0, a0, a4 + lui t5, 1 + addiw t5, t5, 88 + mul a0, a0, t5 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui t5, 63 + addiw t5, t5, -1632 + add a0, a0, t5 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t1) + vle32.v v8, (ra) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 80 - mul a0, a0, a4 + lui t5, 1 + addiw t5, t5, 80 + mul a0, a0, t5 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui t5, 63 + addiw t5, t5, -1632 + add a0, a0, t5 vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (t0) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 72 - mul a0, a0, a4 + lui t0, 1 + addiw t0, t0, 72 + mul a0, a0, t0 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui t0, 63 + addiw t0, t0, -1632 + add a0, a0, t0 vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (a7) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 64 - mul a0, a0, a4 + lui a7, 1 + addiw a7, a7, 64 + mul a0, a0, a7 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui a7, 63 + addiw a7, a7, -1632 + add a0, a0, a7 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a4, 240(sp) # 8-byte Folded Reload - addi a4, a4, 5 - andi a4, a4, 1023 - slli a4, a4, 2 + ld t5, 112(sp) # 8-byte Folded Reload + addi t5, t5, 5 + andi t5, t5, 1023 + slli t5, t5, 2 lui a0, 56 addiw a0, a0, 256 add a0, sp, a0 - add a4, a0, a4 + add t5, a0, t5 vle32.v v8, (a1) csrr a1, vlenb lui a7, 1 @@ -92228,7 +92203,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle32.v v8, (a3) + vle32.v v8, (a4) csrr a1, vlenb lui a2, 1 addiw a2, a2, 40 @@ -92258,10 +92233,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - lui a1, 26 - addiw a1, a1, 1408 - add a1, sp, a1 - vle32.v v8, (a1) + vle32.v v8, (t1) csrr a1, vlenb lui a2, 1 addiw a2, a2, 16 @@ -92367,7 +92339,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle32.v v8, (t4) + vle32.v v8, (a3) csrr a1, vlenb lui a2, 1 addiw a2, a2, -56 @@ -92377,7 +92349,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle32.v v8, (t5) + vle32.v v8, (t4) csrr a1, vlenb lui a2, 1 addiw a2, a2, -64 @@ -92417,7 +92389,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle32.v v8, (s9) + vle32.v v8, (s4) csrr a1, vlenb lui a2, 1 addiw a2, a2, -96 @@ -92437,7 +92409,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle32.v v8, (s11) + vle32.v v8, (s6) csrr a1, vlenb lui a2, 1 addiw a2, a2, -112 @@ -92447,7 +92419,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle32.v v8, (s6) + vle32.v v8, (s7) csrr a1, vlenb lui a2, 1 addiw a2, a2, -120 @@ -92457,8 +92429,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - ld a1, 72(sp) # 8-byte Folded Reload - vle32.v v8, (a1) + vle32.v v8, (s8) csrr a1, vlenb li a2, 31 slli a2, a2, 7 @@ -92468,8 +92439,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - ld a1, 80(sp) # 8-byte Folded Reload - vle32.v v8, (a1) + vle32.v v8, (s9) csrr a1, vlenb lui a2, 1 addiw a2, a2, -136 @@ -92479,10 +92449,8 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - ld a1, 88(sp) # 8-byte Folded Reload - vle32.v v24, (a1) - ld a1, 96(sp) # 8-byte Folded Reload - vle32.v v16, (a1) + vle32.v v24, (s10) + vle32.v v16, (s11) ld a1, 104(sp) # 8-byte Folded Reload vle32.v v8, (a1) csrr a1, vlenb @@ -92495,376 +92463,374 @@ add a1, a1, a2 vl8r.v v0, (a1) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 96 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 56 addiw a1, a1, 384 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 96 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 208 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 56 addiw a1, a1, 512 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 216 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 56 addiw a1, a1, 640 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 192 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 56 addiw a1, a1, 768 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 200 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 56 addiw a1, a1, 896 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 176 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 56 addiw a1, a1, 1024 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 184 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 56 addiw a1, a1, 1152 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 160 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 56 addiw a1, a1, 1280 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 168 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 56 addiw a1, a1, 1408 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 144 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 56 addiw a1, a1, 1536 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 152 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 56 addiw a1, a1, 1664 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 128 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 56 addiw a1, a1, 1792 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 136 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 56 addiw a1, a1, 1920 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 112 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 57 addiw a1, a1, -2048 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 112 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 120 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 57 addiw a1, a1, -1920 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) - mv a1, s8 - add a5, a0, s8 + ld t3, 184(sp) # 8-byte Folded Reload + add a3, a0, t3 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 104 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 104 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 63 - addiw a2, a2, -1632 - add a0, a0, a2 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload - vse32.v v0, (a5) - flw fa5, 0(a4) + vse32.v v0, (a3) + flw fa5, 0(t5) lui a0, 25 addiw a0, a0, 256 add a0, sp, a0 - ld a2, 160(sp) # 8-byte Folded Reload - add a2, a0, a2 - sd a2, 104(sp) # 8-byte Folded Spill - vse32.v v8, (a2) - ld a2, 168(sp) # 8-byte Folded Reload - add a2, a0, a2 - sd a2, 96(sp) # 8-byte Folded Spill - vse32.v v16, (a2) - add ra, a0, ra - sd ra, 88(sp) # 8-byte Folded Spill - vse32.v v24, (ra) - ld s9, 176(sp) # 8-byte Folded Reload - add a2, a0, s9 - sd a2, 80(sp) # 8-byte Folded Spill - sd s9, 8(sp) - csrr a3, vlenb - lui a4, 1 - addiw a4, a4, -136 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 63 - addiw a4, a4, -1632 - add a3, a3, a4 - vl8r.v v8, (a3) # Unknown-size Folded Reload - vse32.v v8, (a2) - ld ra, 120(sp) # 8-byte Folded Reload - add a2, a0, ra - sd a2, 72(sp) # 8-byte Folded Spill - csrr a3, vlenb - li a4, 31 - slli a4, a4, 7 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 63 - addiw a4, a4, -1632 - add a3, a3, a4 - vl8r.v v8, (a3) # Unknown-size Folded Reload - vse32.v v8, (a2) + ld a1, 120(sp) # 8-byte Folded Reload + add a1, a0, a1 + sd a1, 104(sp) # 8-byte Folded Spill + vse32.v v8, (a1) + ld s11, 128(sp) # 8-byte Folded Reload + add s11, a0, s11 + vse32.v v16, (s11) + ld s10, 136(sp) # 8-byte Folded Reload + add s10, a0, s10 + vse32.v v24, (s10) + ld s9, 144(sp) # 8-byte Folded Reload + add s9, a0, s9 + sd s11, 8(sp) + sd s10, 0(sp) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -136 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse32.v v8, (s9) + ld s8, 152(sp) # 8-byte Folded Reload + add s8, a0, s8 + csrr a1, vlenb + li a2, 31 + slli a2, a2, 7 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse32.v v8, (s8) + ld s7, 160(sp) # 8-byte Folded Reload add s7, a0, s7 - sd s7, 64(sp) # 8-byte Folded Spill - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, -120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -120 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (s7) - ld s11, 136(sp) # 8-byte Folded Reload - add s11, a0, s11 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, -112 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse32.v v8, (s11) - ld s6, 224(sp) # 8-byte Folded Reload + ld s6, 168(sp) # 8-byte Folded Reload add s6, a0, s6 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, -104 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -112 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (s6) - ld s5, 184(sp) # 8-byte Folded Reload + ld s5, 176(sp) # 8-byte Folded Reload add s5, a0, s5 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, -96 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -104 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (s5) - ld s3, 232(sp) # 8-byte Folded Reload + ld s4, 208(sp) # 8-byte Folded Reload + add s4, a0, s4 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -96 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse32.v v8, (s4) + ld s3, 216(sp) # 8-byte Folded Reload add s3, a0, s3 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, -88 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -88 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (s3) - ld s8, 144(sp) # 8-byte Folded Reload - add s2, a0, s8 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, -80 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload + ld s2, 224(sp) # 8-byte Folded Reload + add s2, a0, s2 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -80 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (s2) - ld t6, 152(sp) # 8-byte Folded Reload + ld t6, 232(sp) # 8-byte Folded Reload add t6, a0, t6 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, -72 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -72 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (t6) - add t5, a0, s10 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, -64 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse32.v v8, (t5) - ld t4, 200(sp) # 8-byte Folded Reload + ld t4, 240(sp) # 8-byte Folded Reload add t4, a0, t4 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, -56 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -64 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (t4) - ld s7, 208(sp) # 8-byte Folded Reload - add a5, a0, s7 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, -48 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload + ld a3, 248(sp) # 8-byte Folded Reload + add a3, a0, a3 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -56 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse32.v v8, (a3) + ld a5, 200(sp) # 8-byte Folded Reload + add a5, a0, a5 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -48 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a5) - add t3, a0, a1 - mv s10, a1 + add t3, a0, t3 csrr a1, vlenb lui a2, 1 addiw a2, a2, -40 @@ -92875,263 +92841,265 @@ add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (t3) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -32 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 26 addiw a1, a1, -1920 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, -32 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse32.v v8, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -24 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 26 addiw a1, a1, -2048 add a2, sp, a1 + vse32.v v8, (a2) csrr a1, vlenb - lui a3, 1 - addiw a3, a3, -24 - mul a1, a1, a3 + lui a2, 1 + addiw a2, a2, -16 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a2) lui a1, 25 addiw a1, a1, 1920 - add a3, sp, a1 + add a4, sp, a1 + vse32.v v8, (a4) csrr a1, vlenb lui a2, 1 - addiw a2, a2, -16 + addiw a2, a2, -8 mul a1, a1, a2 add a1, sp, a1 lui a2, 63 addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a3) lui a1, 25 addiw a1, a1, 1792 add a6, sp, a1 + vse32.v v8, (a6) csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -8 - mul a1, a1, a2 + slli a1, a1, 12 add a1, sp, a1 lui a2, 63 addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a6) lui a1, 25 addiw a1, a1, 1664 add a7, sp, a1 + vse32.v v8, (a7) csrr a1, vlenb - slli a1, a1, 12 + lui a2, 1 + addiw a2, a2, 8 + mul a1, a1, a2 add a1, sp, a1 lui a2, 63 addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a7) lui a1, 25 addiw a1, a1, 1536 add t0, sp, a1 + vse32.v v8, (t0) csrr a1, vlenb lui a2, 1 - addiw a2, a2, 8 + addiw a2, a2, 16 mul a1, a1, a2 add a1, sp, a1 lui a2, 63 addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (t0) lui a1, 25 addiw a1, a1, 1408 add t1, sp, a1 + vse32.v v8, (t1) csrr a1, vlenb lui a2, 1 - addiw a2, a2, 16 + addiw a2, a2, 24 mul a1, a1, a2 add a1, sp, a1 lui a2, 63 addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (t1) lui a1, 25 addiw a1, a1, 1280 add t2, sp, a1 + vse32.v v8, (t2) csrr a1, vlenb lui a2, 1 - addiw a2, a2, 24 + addiw a2, a2, 32 mul a1, a1, a2 add a1, sp, a1 lui a2, 63 addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a1, 25 addiw a1, a1, 1152 add a6, sp, a1 + vse32.v v8, (a6) csrr a1, vlenb lui a2, 1 - addiw a2, a2, 32 + addiw a2, a2, 40 mul a1, a1, a2 add a1, sp, a1 lui a2, 63 addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a6) lui a1, 25 addiw a1, a1, 1024 - add a3, sp, a1 + add a4, sp, a1 + vse32.v v8, (a4) csrr a1, vlenb lui a2, 1 - addiw a2, a2, 40 + addiw a2, a2, 48 mul a1, a1, a2 add a1, sp, a1 lui a2, 63 addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a3) lui a1, 25 addiw a1, a1, 896 add a2, sp, a1 + vse32.v v8, (a2) csrr a1, vlenb - lui a4, 1 - addiw a4, a4, 48 - mul a1, a1, a4 + lui a7, 1 + addiw a7, a7, 56 + mul a1, a1, a7 add a1, sp, a1 - lui a4, 63 - addiw a4, a4, -1632 - add a1, a1, a4 + lui a7, 63 + addiw a7, a7, -1632 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a2) lui a1, 25 addiw a1, a1, 768 add a1, sp, a1 - csrr a4, vlenb - lui a7, 1 - addiw a7, a7, 56 - mul a4, a4, a7 - add a4, sp, a4 - lui a7, 63 - addiw a7, a7, -1632 - add a4, a4, a7 - vl8r.v v8, (a4) # Unknown-size Folded Reload vse32.v v8, (a1) - addi a4, s4, 85 - andi a4, a4, 1023 - slli a4, a4, 2 - add a4, a0, a4 + ld a7, 192(sp) # 8-byte Folded Reload + addi t5, a7, 85 + andi t5, t5, 1023 + slli t5, t5, 2 + add t5, a0, t5 + csrr a7, vlenb + lui t0, 1 + addiw t0, t0, 64 + mul a7, a7, t0 + add a7, sp, a7 + lui t0, 63 + addiw t0, t0, -1632 + add a7, a7, t0 + vl8r.v v8, (a7) # Unknown-size Folded Reload lui a7, 25 addiw a7, a7, 640 add a7, sp, a7 + vse32.v v8, (a7) csrr t0, vlenb - lui t1, 1 - addiw t1, t1, 64 - mul t0, t0, t1 + lui s10, 1 + addiw s10, s10, 72 + mul t0, t0, s10 add t0, sp, t0 - lui t1, 63 - addiw t1, t1, -1632 - add t0, t0, t1 + lui s10, 63 + addiw s10, s10, -1632 + add t0, t0, s10 vl8r.v v8, (t0) # Unknown-size Folded Reload - vse32.v v8, (a7) lui t0, 25 addiw t0, t0, 512 add t0, sp, t0 - csrr t1, vlenb - lui s4, 1 - addiw s4, s4, 72 - mul t1, t1, s4 - add t1, sp, t1 - lui s4, 63 - addiw s4, s4, -1632 - add t1, t1, s4 - vl8r.v v8, (t1) # Unknown-size Folded Reload vse32.v v8, (t0) - lui t1, 25 - addiw t1, t1, 384 - add t1, sp, t1 - csrr s4, vlenb - lui s9, 1 - addiw s9, s9, 80 - mul s4, s4, s9 - add s4, sp, s4 - lui s9, 63 - addiw s9, s9, -1632 - add s4, s4, s9 - vl8r.v v8, (s4) # Unknown-size Folded Reload - vse32.v v8, (t1) - csrr s4, vlenb - lui s9, 1 - addiw s9, s9, 88 - mul s4, s4, s9 - add s4, sp, s4 - lui s9, 63 - addiw s9, s9, -1632 - add s4, s4, s9 - ld s9, 8(sp) - vl8r.v v8, (s4) # Unknown-size Folded Reload + csrr s10, vlenb + lui s11, 1 + addiw s11, s11, 80 + mul s10, s10, s11 + add s10, sp, s10 + lui s11, 63 + addiw s11, s11, -1632 + add s10, s10, s11 + vl8r.v v8, (s10) # Unknown-size Folded Reload + lui s10, 25 + addiw s10, s10, 384 + add ra, sp, s10 + vse32.v v8, (ra) + csrr s11, vlenb + lui s10, 1 + addiw s10, s10, 88 + mul s11, s11, s10 + add s11, sp, s11 + lui s10, 63 + addiw s10, s10, -1632 + add s11, s11, s10 + ld s10, 0(sp) + vl8r.v v8, (s11) # Unknown-size Folded Reload + ld s11, 8(sp) vse32.v v8, (a0) - fsw fa5, 0(a4) + fsw fa5, 0(t5) vle32.v v8, (a0) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 88 - mul a0, a0, a4 + lui t5, 1 + addiw t5, t5, 88 + mul a0, a0, t5 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui t5, 63 + addiw t5, t5, -1632 + add a0, a0, t5 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t1) + vle32.v v8, (ra) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 80 - mul a0, a0, a4 + lui t5, 1 + addiw t5, t5, 80 + mul a0, a0, t5 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui t5, 63 + addiw t5, t5, -1632 + add a0, a0, t5 vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (t0) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 72 - mul a0, a0, a4 + lui t0, 1 + addiw t0, t0, 72 + mul a0, a0, t0 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui t0, 63 + addiw t0, t0, -1632 + add a0, a0, t0 vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (a7) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 64 - mul a0, a0, a4 + lui a7, 1 + addiw a7, a7, 64 + mul a0, a0, a7 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui a7, 63 + addiw a7, a7, -1632 + add a0, a0, a7 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a4, 240(sp) # 8-byte Folded Reload - addi a4, a4, 6 - andi a4, a4, 1023 - slli a4, a4, 2 + ld t5, 112(sp) # 8-byte Folded Reload + addi t5, t5, 6 + andi t5, t5, 1023 + slli t5, t5, 2 lui a0, 55 addiw a0, a0, 256 add a0, sp, a0 - add a4, a0, a4 + add t5, a0, t5 vle32.v v8, (a1) csrr a1, vlenb lui a7, 1 @@ -93152,7 +93120,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle32.v v8, (a3) + vle32.v v8, (a4) csrr a1, vlenb lui a2, 1 addiw a2, a2, 40 @@ -93182,10 +93150,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - lui a1, 25 - addiw a1, a1, 1408 - add a1, sp, a1 - vle32.v v8, (a1) + vle32.v v8, (t1) csrr a1, vlenb lui a2, 1 addiw a2, a2, 16 @@ -93291,7 +93256,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle32.v v8, (t4) + vle32.v v8, (a3) csrr a1, vlenb lui a2, 1 addiw a2, a2, -56 @@ -93301,7 +93266,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle32.v v8, (t5) + vle32.v v8, (t4) csrr a1, vlenb lui a2, 1 addiw a2, a2, -64 @@ -93341,7 +93306,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle32.v v8, (s5) + vle32.v v8, (s4) csrr a1, vlenb lui a2, 1 addiw a2, a2, -96 @@ -93351,7 +93316,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle32.v v8, (s6) + vle32.v v8, (s5) csrr a1, vlenb lui a2, 1 addiw a2, a2, -104 @@ -93361,7 +93326,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle32.v v8, (s11) + vle32.v v8, (s6) csrr a1, vlenb lui a2, 1 addiw a2, a2, -112 @@ -93371,8 +93336,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - ld a1, 64(sp) # 8-byte Folded Reload - vle32.v v8, (a1) + vle32.v v8, (s7) csrr a1, vlenb lui a2, 1 addiw a2, a2, -120 @@ -93382,8 +93346,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - ld a1, 72(sp) # 8-byte Folded Reload - vle32.v v8, (a1) + vle32.v v8, (s8) csrr a1, vlenb li a2, 31 slli a2, a2, 7 @@ -93393,8 +93356,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - ld a1, 80(sp) # 8-byte Folded Reload - vle32.v v8, (a1) + vle32.v v8, (s9) csrr a1, vlenb lui a2, 1 addiw a2, a2, -136 @@ -93404,10 +93366,8 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - ld a1, 88(sp) # 8-byte Folded Reload - vle32.v v24, (a1) - ld a1, 96(sp) # 8-byte Folded Reload - vle32.v v16, (a1) + vle32.v v24, (s10) + vle32.v v16, (s11) ld a1, 104(sp) # 8-byte Folded Reload vle32.v v8, (a1) csrr a1, vlenb @@ -93420,375 +93380,374 @@ add a1, a1, a2 vl8r.v v0, (a1) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 96 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 55 addiw a1, a1, 384 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 96 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 208 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 55 addiw a1, a1, 512 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 216 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 55 addiw a1, a1, 640 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 192 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 55 addiw a1, a1, 768 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 200 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 55 addiw a1, a1, 896 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 176 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 55 addiw a1, a1, 1024 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 184 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 55 addiw a1, a1, 1152 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 160 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 55 addiw a1, a1, 1280 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 168 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 55 addiw a1, a1, 1408 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 144 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 55 addiw a1, a1, 1536 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 152 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 55 addiw a1, a1, 1664 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 128 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 55 addiw a1, a1, 1792 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 136 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 55 addiw a1, a1, 1920 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 112 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 56 addiw a1, a1, -2048 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 112 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 120 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 56 addiw a1, a1, -1920 add a1, sp, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a1) - mv a1, s10 - add a5, a0, s10 + ld t3, 184(sp) # 8-byte Folded Reload + add a3, a0, t3 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 104 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 104 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 63 - addiw a2, a2, -1632 - add a0, a0, a2 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload - vse32.v v0, (a5) - flw fa5, 0(a4) + vse32.v v0, (a3) + flw fa5, 0(t5) lui a0, 24 addiw a0, a0, 256 add a0, sp, a0 - ld a2, 160(sp) # 8-byte Folded Reload + ld a2, 120(sp) # 8-byte Folded Reload add a2, a0, a2 sd a2, 104(sp) # 8-byte Folded Spill vse32.v v8, (a2) - ld a2, 168(sp) # 8-byte Folded Reload - add a2, a0, a2 - sd a2, 96(sp) # 8-byte Folded Spill - vse32.v v16, (a2) - ld a2, 216(sp) # 8-byte Folded Reload - add a2, a0, a2 - sd a2, 88(sp) # 8-byte Folded Spill - vse32.v v24, (a2) + ld s11, 128(sp) # 8-byte Folded Reload + add s11, a0, s11 + vse32.v v16, (s11) + ld s10, 136(sp) # 8-byte Folded Reload + add s10, a0, s10 + vse32.v v24, (s10) + ld s9, 144(sp) # 8-byte Folded Reload add s9, a0, s9 - sd s9, 80(sp) # 8-byte Folded Spill - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, -136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload + sd s11, 8(sp) + sd s10, 0(sp) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -136 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (s9) - add ra, a0, ra - sd ra, 72(sp) # 8-byte Folded Spill - csrr a2, vlenb - li a3, 31 - slli a3, a3, 7 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse32.v v8, (ra) - ld ra, 128(sp) # 8-byte Folded Reload - add ra, a0, ra - sd ra, 64(sp) # 8-byte Folded Spill - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, -120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse32.v v8, (ra) - ld s6, 136(sp) # 8-byte Folded Reload - add s11, a0, s6 - sd s6, 8(sp) - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, -112 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse32.v v8, (s11) - ld s9, 224(sp) # 8-byte Folded Reload - add s5, a0, s9 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, -104 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload + ld s8, 152(sp) # 8-byte Folded Reload + add s8, a0, s8 + csrr a1, vlenb + li a2, 31 + slli a2, a2, 7 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse32.v v8, (s8) + ld s7, 160(sp) # 8-byte Folded Reload + add s7, a0, s7 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -120 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse32.v v8, (s7) + ld s6, 168(sp) # 8-byte Folded Reload + add s6, a0, s6 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -112 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse32.v v8, (s6) + ld s5, 176(sp) # 8-byte Folded Reload + add s5, a0, s5 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -104 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (s5) - ld s10, 184(sp) # 8-byte Folded Reload - add s4, a0, s10 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, -96 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload + ld s4, 208(sp) # 8-byte Folded Reload + add s4, a0, s4 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -96 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (s4) - ld s3, 232(sp) # 8-byte Folded Reload + ld s3, 216(sp) # 8-byte Folded Reload add s3, a0, s3 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, -88 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -88 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (s3) - add s2, a0, s8 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, -80 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload + ld s2, 224(sp) # 8-byte Folded Reload + add s2, a0, s2 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -80 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (s2) - ld t6, 152(sp) # 8-byte Folded Reload + ld t6, 232(sp) # 8-byte Folded Reload add t6, a0, t6 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, -72 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -72 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (t6) - ld t5, 192(sp) # 8-byte Folded Reload - add t5, a0, t5 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, -64 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse32.v v8, (t5) - ld t4, 200(sp) # 8-byte Folded Reload + ld t4, 240(sp) # 8-byte Folded Reload add t4, a0, t4 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, -56 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -64 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (t4) - add a5, a0, s7 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, -48 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload + ld a3, 248(sp) # 8-byte Folded Reload + add a3, a0, a3 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -56 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse32.v v8, (a3) + ld a5, 200(sp) # 8-byte Folded Reload + add a5, a0, a5 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -48 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a5) - add t3, a0, a1 - mv s7, a1 + add t3, a0, t3 csrr a1, vlenb lui a2, 1 addiw a2, a2, -40 @@ -93799,9 +93758,6 @@ add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (t3) - lui a1, 25 - addiw a1, a1, -1920 - add s8, sp, a1 csrr a1, vlenb lui a2, 1 addiw a2, a2, -32 @@ -93811,23 +93767,23 @@ addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (s8) lui a1, 25 - addiw a1, a1, -2048 - add a2, sp, a1 + addiw a1, a1, -1920 + add a1, sp, a1 + vse32.v v8, (a1) csrr a1, vlenb - lui a3, 1 - addiw a3, a3, -24 - mul a1, a1, a3 + lui a2, 1 + addiw a2, a2, -24 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload + lui a1, 25 + addiw a1, a1, -2048 + add a2, sp, a1 vse32.v v8, (a2) - lui a1, 24 - addiw a1, a1, 1920 - add a3, sp, a1 csrr a1, vlenb lui a2, 1 addiw a2, a2, -16 @@ -93837,10 +93793,10 @@ addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a3) lui a1, 24 - addiw a1, a1, 1792 - add a6, sp, a1 + addiw a1, a1, 1920 + add a4, sp, a1 + vse32.v v8, (a4) csrr a1, vlenb lui a2, 1 addiw a2, a2, -8 @@ -93850,10 +93806,10 @@ addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a6) lui a1, 24 - addiw a1, a1, 1664 - add a7, sp, a1 + addiw a1, a1, 1792 + add a6, sp, a1 + vse32.v v8, (a6) csrr a1, vlenb slli a1, a1, 12 add a1, sp, a1 @@ -93861,10 +93817,10 @@ addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a7) lui a1, 24 - addiw a1, a1, 1536 - add t0, sp, a1 + addiw a1, a1, 1664 + add a7, sp, a1 + vse32.v v8, (a7) csrr a1, vlenb lui a2, 1 addiw a2, a2, 8 @@ -93874,10 +93830,10 @@ addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (t0) lui a1, 24 - addiw a1, a1, 1408 - add t1, sp, a1 + addiw a1, a1, 1536 + add t0, sp, a1 + vse32.v v8, (t0) csrr a1, vlenb lui a2, 1 addiw a2, a2, 16 @@ -93887,10 +93843,10 @@ addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (t1) lui a1, 24 - addiw a1, a1, 1280 - add t2, sp, a1 + addiw a1, a1, 1408 + add t1, sp, a1 + vse32.v v8, (t1) csrr a1, vlenb lui a2, 1 addiw a2, a2, 24 @@ -93900,10 +93856,10 @@ addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a1, 24 - addiw a1, a1, 1152 + addiw a1, a1, 1280 add t2, sp, a1 + vse32.v v8, (t2) csrr a1, vlenb lui a2, 1 addiw a2, a2, 32 @@ -93913,10 +93869,10 @@ addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a1, 24 - addiw a1, a1, 1024 - add a3, sp, a1 + addiw a1, a1, 1152 + add a6, sp, a1 + vse32.v v8, (a6) csrr a1, vlenb lui a2, 1 addiw a2, a2, 40 @@ -93926,10 +93882,10 @@ addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a3) lui a1, 24 - addiw a1, a1, 896 - add a6, sp, a1 + addiw a1, a1, 1024 + add a4, sp, a1 + vse32.v v8, (a4) csrr a1, vlenb lui a2, 1 addiw a2, a2, 48 @@ -93939,125 +93895,128 @@ addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a6) + lui a1, 24 + addiw a1, a1, 896 + add a2, sp, a1 + vse32.v v8, (a2) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, 56 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 63 + addiw a7, a7, -1632 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 24 addiw a1, a1, 768 add a1, sp, a1 - csrr a2, vlenb - lui a4, 1 - addiw a4, a4, 56 - mul a2, a2, a4 - add a2, sp, a2 - lui a4, 63 - addiw a4, a4, -1632 - add a2, a2, a4 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse32.v v8, (a1) - ld a2, 112(sp) # 8-byte Folded Reload - addi a4, a2, 102 - andi a4, a4, 1023 - slli a4, a4, 2 - add a4, a0, a4 + ld a7, 192(sp) # 8-byte Folded Reload + addi t5, a7, 102 + andi t5, t5, 1023 + slli t5, t5, 2 + add t5, a0, t5 + csrr a7, vlenb + lui t0, 1 + addiw t0, t0, 64 + mul a7, a7, t0 + add a7, sp, a7 + lui t0, 63 + addiw t0, t0, -1632 + add a7, a7, t0 + vl8r.v v8, (a7) # Unknown-size Folded Reload lui a7, 24 addiw a7, a7, 640 add a7, sp, a7 + vse32.v v8, (a7) csrr t0, vlenb - lui t1, 1 - addiw t1, t1, 64 - mul t0, t0, t1 + lui s10, 1 + addiw s10, s10, 72 + mul t0, t0, s10 add t0, sp, t0 - lui t1, 63 - addiw t1, t1, -1632 - add t0, t0, t1 + lui s10, 63 + addiw s10, s10, -1632 + add t0, t0, s10 vl8r.v v8, (t0) # Unknown-size Folded Reload - vse32.v v8, (a7) lui t0, 24 addiw t0, t0, 512 add t0, sp, t0 - csrr t1, vlenb - lui s6, 1 - addiw s6, s6, 72 - mul t1, t1, s6 - add t1, sp, t1 - lui s6, 63 - addiw s6, s6, -1632 - add t1, t1, s6 - vl8r.v v8, (t1) # Unknown-size Folded Reload vse32.v v8, (t0) - lui t1, 24 - addiw t1, t1, 384 - add t1, sp, t1 - csrr s6, vlenb - lui ra, 1 - addiw ra, ra, 80 - mul s6, s6, ra - add s6, sp, s6 - lui ra, 63 - addiw ra, ra, -1632 - add s6, s6, ra - vl8r.v v8, (s6) # Unknown-size Folded Reload - vse32.v v8, (t1) - csrr ra, vlenb - lui s6, 1 - addiw s6, s6, 88 - mul ra, ra, s6 - add ra, sp, ra - lui s6, 63 - addiw s6, s6, -1632 - add ra, ra, s6 - ld s6, 8(sp) - vl8r.v v8, (ra) # Unknown-size Folded Reload + csrr s10, vlenb + lui s11, 1 + addiw s11, s11, 80 + mul s10, s10, s11 + add s10, sp, s10 + lui s11, 63 + addiw s11, s11, -1632 + add s10, s10, s11 + vl8r.v v8, (s10) # Unknown-size Folded Reload + lui s10, 24 + addiw s10, s10, 384 + add ra, sp, s10 + vse32.v v8, (ra) + csrr s11, vlenb + lui s10, 1 + addiw s10, s10, 88 + mul s11, s11, s10 + add s11, sp, s11 + lui s10, 63 + addiw s10, s10, -1632 + add s11, s11, s10 + ld s10, 0(sp) + vl8r.v v8, (s11) # Unknown-size Folded Reload + ld s11, 8(sp) vse32.v v8, (a0) - fsw fa5, 0(a4) + fsw fa5, 0(t5) vle32.v v8, (a0) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 88 - mul a0, a0, a4 + lui t5, 1 + addiw t5, t5, 88 + mul a0, a0, t5 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui t5, 63 + addiw t5, t5, -1632 + add a0, a0, t5 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t1) + vle32.v v8, (ra) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 80 - mul a0, a0, a4 + lui t5, 1 + addiw t5, t5, 80 + mul a0, a0, t5 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui t5, 63 + addiw t5, t5, -1632 + add a0, a0, t5 vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (t0) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 72 - mul a0, a0, a4 + lui t0, 1 + addiw t0, t0, 72 + mul a0, a0, t0 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui t0, 63 + addiw t0, t0, -1632 + add a0, a0, t0 vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (a7) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 64 - mul a0, a0, a4 + lui a7, 1 + addiw a7, a7, 64 + mul a0, a0, a7 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui a7, 63 + addiw a7, a7, -1632 + add a0, a0, a7 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld ra, 240(sp) # 8-byte Folded Reload - addi a4, ra, 7 - andi a4, a4, 1023 - slli a4, a4, 2 - sd ra, 8(sp) + ld t5, 112(sp) # 8-byte Folded Reload + addi t5, t5, 7 + andi t5, t5, 1023 + slli t5, t5, 2 lui a0, 54 addiw a0, a0, 256 add a0, sp, a0 - add a4, a0, a4 + add t5, a0, t5 vle32.v v8, (a1) csrr a1, vlenb lui a7, 1 @@ -94068,74 +94027,68 @@ addiw a7, a7, -1632 add a1, a1, a7 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle32.v v8, (a6) + vle32.v v8, (a2) csrr a1, vlenb - lui a6, 1 - addiw a6, a6, 48 - mul a1, a1, a6 + lui a2, 1 + addiw a2, a2, 48 + mul a1, a1, a2 add a1, sp, a1 - lui a6, 63 - addiw a6, a6, -1632 - add a1, a1, a6 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle32.v v8, (a3) + vle32.v v8, (a4) csrr a1, vlenb - lui a3, 1 - addiw a3, a3, 40 - mul a1, a1, a3 + lui a2, 1 + addiw a2, a2, 40 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle32.v v8, (t2) + vle32.v v8, (a6) csrr a1, vlenb - lui a3, 1 - addiw a3, a3, 32 - mul a1, a1, a3 + lui a2, 1 + addiw a2, a2, 32 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - lui a1, 24 - addiw a1, a1, 1280 - add a1, sp, a1 - vle32.v v8, (a1) + vle32.v v8, (t2) csrr a1, vlenb - lui a3, 1 - addiw a3, a3, 24 - mul a1, a1, a3 + lui a2, 1 + addiw a2, a2, 24 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - lui a1, 24 - addiw a1, a1, 1408 - add a1, sp, a1 - vle32.v v8, (a1) + vle32.v v8, (t1) csrr a1, vlenb - lui a3, 1 - addiw a3, a3, 16 - mul a1, a1, a3 + lui a2, 1 + addiw a2, a2, 16 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill lui a1, 24 addiw a1, a1, 1536 add a1, sp, a1 vle32.v v8, (a1) csrr a1, vlenb - lui a3, 1 - addiw a3, a3, 8 - mul a1, a1, a3 + lui a2, 1 + addiw a2, a2, 8 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill lui a1, 24 addiw a1, a1, 1664 @@ -94144,405 +94097,403 @@ csrr a1, vlenb slli a1, a1, 12 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill lui a1, 24 addiw a1, a1, 1792 add a1, sp, a1 vle32.v v8, (a1) csrr a1, vlenb - lui a3, 1 - addiw a3, a3, -8 - mul a1, a1, a3 + lui a2, 1 + addiw a2, a2, -8 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill lui a1, 24 addiw a1, a1, 1920 add a1, sp, a1 vle32.v v8, (a1) csrr a1, vlenb - lui a3, 1 - addiw a3, a3, -16 - mul a1, a1, a3 + lui a2, 1 + addiw a2, a2, -16 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill lui a1, 25 addiw a1, a1, -2048 add a1, sp, a1 vle32.v v8, (a1) csrr a1, vlenb - lui a3, 1 - addiw a3, a3, -24 - mul a1, a1, a3 + lui a2, 1 + addiw a2, a2, -24 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle32.v v8, (s8) + lui a1, 25 + addiw a1, a1, -1920 + add a1, sp, a1 + vle32.v v8, (a1) csrr a1, vlenb - lui a3, 1 - addiw a3, a3, -32 - mul a1, a1, a3 + lui a2, 1 + addiw a2, a2, -32 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill vle32.v v8, (t3) csrr a1, vlenb - lui a3, 1 - addiw a3, a3, -40 - mul a1, a1, a3 + lui a2, 1 + addiw a2, a2, -40 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill vle32.v v8, (a5) csrr a1, vlenb - lui a3, 1 - addiw a3, a3, -48 - mul a1, a1, a3 + lui a2, 1 + addiw a2, a2, -48 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle32.v v8, (t4) + vle32.v v8, (a3) csrr a1, vlenb - lui a3, 1 - addiw a3, a3, -56 - mul a1, a1, a3 + lui a2, 1 + addiw a2, a2, -56 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle32.v v8, (t5) + vle32.v v8, (t4) csrr a1, vlenb - lui a3, 1 - addiw a3, a3, -64 - mul a1, a1, a3 + lui a2, 1 + addiw a2, a2, -64 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill vle32.v v8, (t6) csrr a1, vlenb - lui a3, 1 - addiw a3, a3, -72 - mul a1, a1, a3 + lui a2, 1 + addiw a2, a2, -72 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill vle32.v v8, (s2) csrr a1, vlenb - lui a3, 1 - addiw a3, a3, -80 - mul a1, a1, a3 + lui a2, 1 + addiw a2, a2, -80 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill vle32.v v8, (s3) csrr a1, vlenb - lui a3, 1 - addiw a3, a3, -88 - mul a1, a1, a3 + lui a2, 1 + addiw a2, a2, -88 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill vle32.v v8, (s4) csrr a1, vlenb - lui a3, 1 - addiw a3, a3, -96 - mul a1, a1, a3 + lui a2, 1 + addiw a2, a2, -96 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill vle32.v v8, (s5) csrr a1, vlenb - lui a3, 1 - addiw a3, a3, -104 - mul a1, a1, a3 + lui a2, 1 + addiw a2, a2, -104 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - vle32.v v8, (s11) + vle32.v v8, (s6) csrr a1, vlenb - lui a3, 1 - addiw a3, a3, -112 - mul a1, a1, a3 + lui a2, 1 + addiw a2, a2, -112 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - ld a1, 64(sp) # 8-byte Folded Reload - vle32.v v8, (a1) + vle32.v v8, (s7) csrr a1, vlenb - lui a3, 1 - addiw a3, a3, -120 - mul a1, a1, a3 + lui a2, 1 + addiw a2, a2, -120 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - ld a1, 72(sp) # 8-byte Folded Reload - vle32.v v8, (a1) + vle32.v v8, (s8) csrr a1, vlenb - li a3, 31 - slli a3, a3, 7 - mul a1, a1, a3 + li a2, 31 + slli a2, a2, 7 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - ld a1, 80(sp) # 8-byte Folded Reload - vle32.v v8, (a1) + vle32.v v8, (s9) csrr a1, vlenb - lui a3, 1 - addiw a3, a3, -136 - mul a1, a1, a3 + lui a2, 1 + addiw a2, a2, -136 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill - ld a1, 88(sp) # 8-byte Folded Reload - vle32.v v24, (a1) - ld a1, 96(sp) # 8-byte Folded Reload - vle32.v v16, (a1) + vle32.v v24, (s10) + vle32.v v16, (s11) ld a1, 104(sp) # 8-byte Folded Reload vle32.v v8, (a1) csrr a1, vlenb - lui a3, 1 - addiw a3, a3, 224 - mul a1, a1, a3 + lui a2, 1 + addiw a2, a2, 224 + mul a1, a1, a2 add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 vl8r.v v0, (a1) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 96 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 54 addiw a1, a1, 384 add a1, sp, a1 - csrr a3, vlenb - lui a5, 1 - addiw a5, a5, 96 - mul a3, a3, a5 - add a3, sp, a3 - lui a5, 63 - addiw a5, a5, -1632 - add a3, a3, a5 - vl8r.v v0, (a3) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 208 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 54 addiw a1, a1, 512 add a1, sp, a1 - csrr a3, vlenb - lui a5, 1 - addiw a5, a5, 208 - mul a3, a3, a5 - add a3, sp, a3 - lui a5, 63 - addiw a5, a5, -1632 - add a3, a3, a5 - vl8r.v v0, (a3) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 216 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 54 addiw a1, a1, 640 add a1, sp, a1 - csrr a3, vlenb - lui a5, 1 - addiw a5, a5, 216 - mul a3, a3, a5 - add a3, sp, a3 - lui a5, 63 - addiw a5, a5, -1632 - add a3, a3, a5 - vl8r.v v0, (a3) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 192 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 54 addiw a1, a1, 768 add a1, sp, a1 - csrr a3, vlenb - lui a5, 1 - addiw a5, a5, 192 - mul a3, a3, a5 - add a3, sp, a3 - lui a5, 63 - addiw a5, a5, -1632 - add a3, a3, a5 - vl8r.v v0, (a3) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 200 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 54 addiw a1, a1, 896 add a1, sp, a1 - csrr a3, vlenb - lui a5, 1 - addiw a5, a5, 200 - mul a3, a3, a5 - add a3, sp, a3 - lui a5, 63 - addiw a5, a5, -1632 - add a3, a3, a5 - vl8r.v v0, (a3) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 176 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 54 addiw a1, a1, 1024 add a1, sp, a1 - csrr a3, vlenb - lui a5, 1 - addiw a5, a5, 176 - mul a3, a3, a5 - add a3, sp, a3 - lui a5, 63 - addiw a5, a5, -1632 - add a3, a3, a5 - vl8r.v v0, (a3) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 184 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 54 addiw a1, a1, 1152 add a1, sp, a1 - csrr a3, vlenb - lui a5, 1 - addiw a5, a5, 184 - mul a3, a3, a5 - add a3, sp, a3 - lui a5, 63 - addiw a5, a5, -1632 - add a3, a3, a5 - vl8r.v v0, (a3) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 160 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 54 addiw a1, a1, 1280 add a1, sp, a1 - csrr a3, vlenb - lui a5, 1 - addiw a5, a5, 160 - mul a3, a3, a5 - add a3, sp, a3 - lui a5, 63 - addiw a5, a5, -1632 - add a3, a3, a5 - vl8r.v v0, (a3) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 168 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 54 addiw a1, a1, 1408 add a1, sp, a1 - csrr a3, vlenb - lui a5, 1 - addiw a5, a5, 168 - mul a3, a3, a5 - add a3, sp, a3 - lui a5, 63 - addiw a5, a5, -1632 - add a3, a3, a5 - vl8r.v v0, (a3) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 144 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 54 addiw a1, a1, 1536 add a1, sp, a1 - csrr a3, vlenb - lui a5, 1 - addiw a5, a5, 144 - mul a3, a3, a5 - add a3, sp, a3 - lui a5, 63 - addiw a5, a5, -1632 - add a3, a3, a5 - vl8r.v v0, (a3) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 152 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 54 addiw a1, a1, 1664 add a1, sp, a1 - csrr a3, vlenb - lui a5, 1 - addiw a5, a5, 152 - mul a3, a3, a5 - add a3, sp, a3 - lui a5, 63 - addiw a5, a5, -1632 - add a3, a3, a5 - vl8r.v v0, (a3) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 128 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 54 addiw a1, a1, 1792 add a1, sp, a1 - csrr a3, vlenb - lui a5, 1 - addiw a5, a5, 128 - mul a3, a3, a5 - add a3, sp, a3 - lui a5, 63 - addiw a5, a5, -1632 - add a3, a3, a5 - vl8r.v v0, (a3) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 136 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 54 addiw a1, a1, 1920 add a1, sp, a1 - csrr a3, vlenb - lui a5, 1 - addiw a5, a5, 136 - mul a3, a3, a5 - add a3, sp, a3 - lui a5, 63 - addiw a5, a5, -1632 - add a3, a3, a5 - vl8r.v v0, (a3) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 112 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 55 addiw a1, a1, -2048 add a1, sp, a1 - csrr a3, vlenb - lui a5, 1 - addiw a5, a5, 112 - mul a3, a3, a5 - add a3, sp, a3 - lui a5, 63 - addiw a5, a5, -1632 - add a3, a3, a5 - vl8r.v v0, (a3) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 120 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 63 + addiw a2, a2, -1632 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 55 addiw a1, a1, -1920 add a1, sp, a1 - csrr a3, vlenb - lui a5, 1 - addiw a5, a5, 120 - mul a3, a3, a5 - add a3, sp, a3 - lui a5, 63 - addiw a5, a5, -1632 - add a3, a3, a5 - vl8r.v v0, (a3) # Unknown-size Folded Reload vse32.v v0, (a1) - mv t3, s7 - add a5, a0, s7 + ld t3, 184(sp) # 8-byte Folded Reload + add a3, a0, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, 104 @@ -94552,52 +94503,49 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload - vse32.v v0, (a5) - flw fa5, 0(a4) + vse32.v v0, (a3) + flw fa5, 0(t5) lui a0, 23 addiw a0, a0, 256 - add a5, sp, a0 - ld a0, 160(sp) # 8-byte Folded Reload - add a0, a5, a0 + add a3, sp, a0 + ld a0, 120(sp) # 8-byte Folded Reload + add a0, a3, a0 sd a0, 104(sp) # 8-byte Folded Spill vse32.v v8, (a0) - ld a0, 168(sp) # 8-byte Folded Reload - add a0, a5, a0 - sd a0, 96(sp) # 8-byte Folded Spill - vse32.v v16, (a0) - ld a0, 216(sp) # 8-byte Folded Reload - add a0, a5, a0 - sd a0, 88(sp) # 8-byte Folded Spill - vse32.v v24, (a0) - ld a0, 176(sp) # 8-byte Folded Reload - add a0, a5, a0 - sd a0, 80(sp) # 8-byte Folded Spill - csrr a1, vlenb - lui a3, 1 - addiw a3, a3, -136 - mul a1, a1, a3 - add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a0) - ld s8, 120(sp) # 8-byte Folded Reload - add a0, a5, s8 - sd a0, 72(sp) # 8-byte Folded Spill - sd s8, 0(sp) - csrr a1, vlenb - li a3, 31 - slli a3, a3, 7 - mul a1, a1, a3 - add a1, sp, a1 - lui a3, 63 - addiw a3, a3, -1632 - add a1, a1, a3 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a0) - ld s11, 128(sp) # 8-byte Folded Reload - add s11, a5, s11 + ld ra, 128(sp) # 8-byte Folded Reload + add ra, a3, ra + vse32.v v16, (ra) + ld s11, 136(sp) # 8-byte Folded Reload + add s11, a3, s11 + vse32.v v24, (s11) + ld s10, 144(sp) # 8-byte Folded Reload + add s10, a3, s10 + sd ra, 8(sp) + sd s11, 0(sp) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -136 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vse32.v v8, (s10) + ld s9, 152(sp) # 8-byte Folded Reload + add s9, a3, s9 + csrr a0, vlenb + li a1, 31 + slli a1, a1, 7 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vse32.v v8, (s9) + ld s8, 160(sp) # 8-byte Folded Reload + add s8, a3, s8 csrr a0, vlenb lui a1, 1 addiw a1, a1, -120 @@ -94607,8 +94555,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s11) - add t0, a5, s6 + vse32.v v8, (s8) + ld s7, 168(sp) # 8-byte Folded Reload + add s7, a3, s7 csrr a0, vlenb lui a1, 1 addiw a1, a1, -112 @@ -94618,8 +94567,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t0) - add s5, a5, s9 + vse32.v v8, (s7) + ld s6, 176(sp) # 8-byte Folded Reload + add s6, a3, s6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -104 @@ -94629,8 +94579,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s5) - add s4, a5, s10 + vse32.v v8, (s6) + ld s5, 208(sp) # 8-byte Folded Reload + add s5, a3, s5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -96 @@ -94640,9 +94591,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s4) - ld s6, 232(sp) # 8-byte Folded Reload - add s3, a5, s6 + vse32.v v8, (s5) + ld s4, 216(sp) # 8-byte Folded Reload + add s4, a3, s4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -88 @@ -94652,9 +94603,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s3) - ld a7, 144(sp) # 8-byte Folded Reload - add s2, a5, a7 + vse32.v v8, (s4) + ld s3, 224(sp) # 8-byte Folded Reload + add s3, a3, s3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -80 @@ -94664,9 +94615,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s2) - ld t6, 152(sp) # 8-byte Folded Reload - add t6, a5, t6 + vse32.v v8, (s3) + ld s2, 232(sp) # 8-byte Folded Reload + add s2, a3, s2 csrr a0, vlenb lui a1, 1 addiw a1, a1, -72 @@ -94676,9 +94627,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t6) - ld s10, 192(sp) # 8-byte Folded Reload - add t5, a5, s10 + vse32.v v8, (s2) + ld t6, 240(sp) # 8-byte Folded Reload + add t6, a3, t6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -64 @@ -94688,9 +94639,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t5) - ld s7, 200(sp) # 8-byte Folded Reload - add t4, a5, s7 + vse32.v v8, (t6) + ld t4, 248(sp) # 8-byte Folded Reload + add t4, a3, t4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -56 @@ -94701,8 +94652,8 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t4) - ld a6, 208(sp) # 8-byte Folded Reload - add a3, a5, a6 + ld a5, 200(sp) # 8-byte Folded Reload + add a5, a3, a5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -48 @@ -94712,8 +94663,8 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a3) - add t3, a5, t3 + vse32.v v8, (a5) + add t3, a3, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -40 @@ -94724,235 +94675,236 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t3) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -32 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 24 addiw a0, a0, -1920 add a0, sp, a0 - csrr a1, vlenb - lui a4, 1 - addiw a4, a4, -32 - mul a1, a1, a4 - add a1, sp, a1 - lui a4, 63 - addiw a4, a4, -1632 - add a1, a1, a4 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -24 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 24 addiw a0, a0, -2048 add a0, sp, a0 - csrr a1, vlenb - lui a4, 1 - addiw a4, a4, -24 - mul a1, a1, a4 - add a1, sp, a1 - lui a4, 63 - addiw a4, a4, -1632 - add a1, a1, a4 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 23 addiw a0, a0, 1920 add a0, sp, a0 - csrr a1, vlenb - lui a4, 1 - addiw a4, a4, -16 - mul a1, a1, a4 - add a1, sp, a1 - lui a4, 63 - addiw a4, a4, -1632 - add a1, a1, a4 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 23 addiw a0, a0, 1792 add a0, sp, a0 - csrr a1, vlenb - lui a4, 1 - addiw a4, a4, -8 - mul a1, a1, a4 - add a1, sp, a1 - lui a4, 63 - addiw a4, a4, -1632 - add a1, a1, a4 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + slli a0, a0, 12 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 23 addiw a0, a0, 1664 add a0, sp, a0 - csrr a1, vlenb - slli a1, a1, 12 - add a1, sp, a1 - lui a4, 63 - addiw a4, a4, -1632 - add a1, a1, a4 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 23 addiw a0, a0, 1536 add a0, sp, a0 - csrr a1, vlenb - lui a4, 1 - addiw a4, a4, 8 - mul a1, a1, a4 - add a1, sp, a1 - lui a4, 63 - addiw a4, a4, -1632 - add a1, a1, a4 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 23 addiw a0, a0, 1408 add t2, sp, a0 + vse32.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 16 + addiw a1, a1, 24 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 23 addiw a0, a0, 1280 add t1, sp, a0 + vse32.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 24 + addiw a1, a1, 32 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) lui a0, 23 addiw a0, a0, 1152 + add t0, sp, a0 + vse32.v v8, (t0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 40 + mul a0, a0, a1 add a0, sp, a0 - csrr a1, vlenb - lui a4, 1 - addiw a4, a4, 32 - mul a1, a1, a4 - add a1, sp, a1 - lui a4, 63 - addiw a4, a4, -1632 - add a1, a1, a4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a0) + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 23 addiw a0, a0, 1024 - add s9, sp, a0 + add a7, sp, a0 + vse32.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 40 + addiw a1, a1, 48 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s9) lui a0, 23 addiw a0, a0, 896 - add t2, sp, a0 + add a6, sp, a0 + vse32.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 48 + addiw a1, a1, 56 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 23 addiw a0, a0, 768 - add t1, sp, a0 + add a4, sp, a0 + vse32.v v8, (a4) + ld a0, 192(sp) # 8-byte Folded Reload + addi t5, a0, 119 + andi t5, t5, 1023 + slli t5, t5, 2 + add t5, a3, t5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 56 + addiw a1, a1, 64 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) - addi a4, a2, 119 - andi a4, a4, 1023 - slli a4, a4, 2 - add a4, a5, a4 lui a0, 23 addiw a0, a0, 640 add a2, sp, a0 + vse32.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 64 + addiw a1, a1, 72 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a2) lui a0, 23 addiw a0, a0, 512 add a1, sp, a0 + vse32.v v8, (a1) csrr a0, vlenb - lui s8, 1 - addiw s8, s8, 72 - mul a0, a0, s8 + lui s11, 1 + addiw s11, s11, 80 + mul a0, a0, s11 add a0, sp, a0 - lui s8, 63 - addiw s8, s8, -1632 - add a0, a0, s8 + lui s11, 63 + addiw s11, s11, -1632 + add a0, a0, s11 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) lui a0, 23 addiw a0, a0, 384 add a0, sp, a0 - csrr s8, vlenb - lui ra, 1 - addiw ra, ra, 80 - mul s8, s8, ra - add s8, sp, s8 - lui ra, 63 - addiw ra, ra, -1632 - add s8, s8, ra - vl8r.v v8, (s8) # Unknown-size Folded Reload vse32.v v8, (a0) csrr ra, vlenb - lui s8, 1 - addiw s8, s8, 88 - mul ra, ra, s8 + lui s11, 1 + addiw s11, s11, 88 + mul ra, ra, s11 add ra, sp, ra - lui s8, 63 - addiw s8, s8, -1632 - add ra, ra, s8 - ld s8, 0(sp) + lui s11, 63 + addiw s11, s11, -1632 + add ra, ra, s11 + ld s11, 0(sp) vl8r.v v8, (ra) # Unknown-size Folded Reload ld ra, 8(sp) - vse32.v v8, (a5) - fsw fa5, 0(a4) - vle32.v v8, (a5) - csrr a4, vlenb - lui a5, 1 - addiw a5, a5, 88 - mul a4, a4, a5 - add a4, sp, a4 - lui a5, 63 - addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + vse32.v v8, (a3) + fsw fa5, 0(t5) + vle32.v v8, (a3) + csrr a3, vlenb + lui t5, 1 + addiw t5, t5, 88 + mul a3, a3, t5 + add a3, sp, a3 + lui t5, 63 + addiw t5, t5, -1632 + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vle32.v v8, (a0) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 80 - mul a0, a0, a4 + lui a3, 1 + addiw a3, a3, 80 + mul a0, a0, a3 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui a3, 63 + addiw a3, a3, -1632 + add a0, a0, a3 vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (a1) csrr a0, vlenb @@ -94974,14 +94926,15 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - addi a4, ra, 8 - andi a4, a4, 1023 - slli a4, a4, 2 + ld t5, 112(sp) # 8-byte Folded Reload + addi t5, t5, 8 + andi t5, t5, 1023 + slli t5, t5, 2 lui a0, 53 addiw a0, a0, 256 add a1, sp, a0 - add a4, a1, a4 - vle32.v v8, (t1) + add t5, a1, t5 + vle32.v v8, (a4) csrr a0, vlenb lui a2, 1 addiw a2, a2, 56 @@ -94991,7 +94944,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t2) + vle32.v v8, (a6) csrr a0, vlenb lui a2, 1 addiw a2, a2, 48 @@ -95001,7 +94954,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s9) + vle32.v v8, (a7) csrr a0, vlenb lui a2, 1 addiw a2, a2, 40 @@ -95011,10 +94964,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 23 - addiw a0, a0, 1152 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t0) csrr a0, vlenb lui a2, 1 addiw a2, a2, 32 @@ -95024,10 +94974,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 23 - addiw a0, a0, 1280 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t1) csrr a0, vlenb lui a2, 1 addiw a2, a2, 24 @@ -95037,10 +94984,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 23 - addiw a0, a0, 1408 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t2) csrr a0, vlenb lui a2, 1 addiw a2, a2, 16 @@ -95136,7 +95080,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a3) + vle32.v v8, (a5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -48 @@ -95156,7 +95100,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t5) + vle32.v v8, (t6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -64 @@ -95166,7 +95110,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t6) + vle32.v v8, (s2) csrr a0, vlenb lui a2, 1 addiw a2, a2, -72 @@ -95176,7 +95120,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s2) + vle32.v v8, (s3) csrr a0, vlenb lui a2, 1 addiw a2, a2, -80 @@ -95186,7 +95130,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s3) + vle32.v v8, (s4) csrr a0, vlenb lui a2, 1 addiw a2, a2, -88 @@ -95196,7 +95140,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s4) + vle32.v v8, (s5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -96 @@ -95206,7 +95150,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s5) + vle32.v v8, (s6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -104 @@ -95216,7 +95160,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t0) + vle32.v v8, (s7) csrr a0, vlenb lui a2, 1 addiw a2, a2, -112 @@ -95226,7 +95170,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s11) + vle32.v v8, (s8) csrr a0, vlenb lui a2, 1 addiw a2, a2, -120 @@ -95236,8 +95180,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 72(sp) # 8-byte Folded Reload - vle32.v v8, (a0) + vle32.v v8, (s9) csrr a0, vlenb li a2, 31 slli a2, a2, 7 @@ -95247,8 +95190,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 80(sp) # 8-byte Folded Reload - vle32.v v8, (a0) + vle32.v v8, (s10) csrr a0, vlenb lui a2, 1 addiw a2, a2, -136 @@ -95258,10 +95200,8 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 88(sp) # 8-byte Folded Reload - vle32.v v24, (a0) - ld a0, 96(sp) # 8-byte Folded Reload - vle32.v v16, (a0) + vle32.v v24, (s11) + vle32.v v16, (ra) ld a0, 104(sp) # 8-byte Folded Reload vle32.v v8, (a0) csrr a0, vlenb @@ -95274,203 +95214,203 @@ add a0, a0, a2 vl8r.v v0, (a0) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 96 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 53 addiw a0, a0, 384 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 96 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 208 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 53 addiw a0, a0, 512 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 216 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 53 addiw a0, a0, 640 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 192 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 53 addiw a0, a0, 768 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 200 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 53 addiw a0, a0, 896 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 176 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 53 addiw a0, a0, 1024 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 184 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 53 addiw a0, a0, 1152 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 160 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 53 addiw a0, a0, 1280 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 168 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 53 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 144 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 53 addiw a0, a0, 1536 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 152 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 53 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 128 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 53 addiw a0, a0, 1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 136 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 53 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 112 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 54 addiw a0, a0, -2048 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 112 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 120 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 54 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) - ld t3, 248(sp) # 8-byte Folded Reload - add a5, a1, t3 + ld t3, 184(sp) # 8-byte Folded Reload + add a3, a1, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, 104 @@ -95480,40 +95420,37 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload - vse32.v v0, (a5) - flw fa5, 0(a4) + vse32.v v0, (a3) + flw fa5, 0(t5) lui a0, 22 addiw a0, a0, 256 - add a5, sp, a0 - ld t0, 160(sp) # 8-byte Folded Reload - add a1, a5, t0 - sd a1, 104(sp) # 8-byte Folded Spill - vse32.v v8, (a1) - ld ra, 168(sp) # 8-byte Folded Reload - add a1, a5, ra - sd a1, 96(sp) # 8-byte Folded Spill - vse32.v v16, (a1) - ld a1, 216(sp) # 8-byte Folded Reload - add a1, a5, a1 - sd a1, 88(sp) # 8-byte Folded Spill - vse32.v v24, (a1) - ld a1, 176(sp) # 8-byte Folded Reload - add a1, a5, a1 - sd a1, 80(sp) # 8-byte Folded Spill - sd t0, 8(sp) - sd ra, 0(sp) + add a3, sp, a0 + ld a0, 120(sp) # 8-byte Folded Reload + add a0, a3, a0 + sd a0, 104(sp) # 8-byte Folded Spill + vse32.v v8, (a0) + ld ra, 128(sp) # 8-byte Folded Reload + add ra, a3, ra + vse32.v v16, (ra) + ld s11, 136(sp) # 8-byte Folded Reload + add s11, a3, s11 + vse32.v v24, (s11) + ld s10, 144(sp) # 8-byte Folded Reload + add s10, a3, s10 + sd ra, 8(sp) + sd s11, 0(sp) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -136 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 63 - addiw a2, a2, -1632 - add a0, a0, a2 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) - add s8, a5, s8 - sd s8, 72(sp) # 8-byte Folded Spill + vse32.v v8, (s10) + ld s9, 152(sp) # 8-byte Folded Reload + add s9, a3, s9 csrr a0, vlenb li a1, 31 slli a1, a1, 7 @@ -95523,9 +95460,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s8) - ld s9, 128(sp) # 8-byte Folded Reload - add s9, a5, s9 + vse32.v v8, (s9) + ld s8, 160(sp) # 8-byte Folded Reload + add s8, a3, s8 csrr a0, vlenb lui a1, 1 addiw a1, a1, -120 @@ -95535,9 +95472,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s9) - ld s8, 136(sp) # 8-byte Folded Reload - add s8, a5, s8 + vse32.v v8, (s8) + ld s7, 168(sp) # 8-byte Folded Reload + add s7, a3, s7 csrr a0, vlenb lui a1, 1 addiw a1, a1, -112 @@ -95547,9 +95484,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s8) - ld s5, 224(sp) # 8-byte Folded Reload - add s5, a5, s5 + vse32.v v8, (s7) + ld s6, 176(sp) # 8-byte Folded Reload + add s6, a3, s6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -104 @@ -95559,9 +95496,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s5) - ld s4, 184(sp) # 8-byte Folded Reload - add s4, a5, s4 + vse32.v v8, (s6) + ld s5, 208(sp) # 8-byte Folded Reload + add s5, a3, s5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -96 @@ -95571,8 +95508,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s4) - add s3, a5, s6 + vse32.v v8, (s5) + ld s4, 216(sp) # 8-byte Folded Reload + add s4, a3, s4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -88 @@ -95582,8 +95520,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s3) - add s2, a5, a7 + vse32.v v8, (s4) + ld s3, 224(sp) # 8-byte Folded Reload + add s3, a3, s3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -80 @@ -95593,9 +95532,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s2) - ld a7, 152(sp) # 8-byte Folded Reload - add t6, a5, a7 + vse32.v v8, (s3) + ld s2, 232(sp) # 8-byte Folded Reload + add s2, a3, s2 csrr a0, vlenb lui a1, 1 addiw a1, a1, -72 @@ -95605,8 +95544,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t6) - add t5, a5, s10 + vse32.v v8, (s2) + ld t6, 240(sp) # 8-byte Folded Reload + add t6, a3, t6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -64 @@ -95616,8 +95556,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t5) - add t4, a5, s7 + vse32.v v8, (t6) + ld t4, 248(sp) # 8-byte Folded Reload + add t4, a3, t4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -56 @@ -95628,7 +95569,8 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t4) - add a3, a5, a6 + ld a5, 200(sp) # 8-byte Folded Reload + add a5, a3, a5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -48 @@ -95638,8 +95580,8 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a3) - add t3, a5, t3 + vse32.v v8, (a5) + add t3, a3, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -40 @@ -95650,236 +95592,236 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t3) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -32 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 23 addiw a0, a0, -1920 - add s7, sp, a0 + add a0, sp, a0 + vse32.v v8, (a0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -32 + addiw a1, a1, -24 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s7) lui a0, 23 addiw a0, a0, -2048 - add s10, sp, a0 + add a0, sp, a0 + vse32.v v8, (a0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -24 + addiw a1, a1, -16 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s10) lui a0, 22 addiw a0, a0, 1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -16 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 22 addiw a0, a0, 1792 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + slli a0, a0, 12 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 22 addiw a0, a0, 1664 add a0, sp, a0 - csrr a1, vlenb - slli a1, a1, 12 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 22 addiw a0, a0, 1536 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 22 addiw a0, a0, 1408 add t2, sp, a0 + vse32.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 16 + addiw a1, a1, 24 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 22 addiw a0, a0, 1280 add t1, sp, a0 + vse32.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 24 + addiw a1, a1, 32 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) lui a0, 22 addiw a0, a0, 1152 - add s6, sp, a0 + add t0, sp, a0 + vse32.v v8, (t0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 32 + addiw a1, a1, 40 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s6) lui a0, 22 addiw a0, a0, 1024 - add t2, sp, a0 + add a7, sp, a0 + vse32.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 40 + addiw a1, a1, 48 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 22 addiw a0, a0, 896 - add t1, sp, a0 + add a6, sp, a0 + vse32.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 48 + addiw a1, a1, 56 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) lui a0, 22 addiw a0, a0, 768 - add a6, sp, a0 + add a4, sp, a0 + vse32.v v8, (a4) + ld a0, 192(sp) # 8-byte Folded Reload + addi t5, a0, 136 + andi t5, t5, 1023 + slli t5, t5, 2 + add t5, a3, t5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 56 + addiw a1, a1, 64 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a6) - ld s11, 112(sp) # 8-byte Folded Reload - addi a4, s11, 136 - andi a4, a4, 1023 - slli a4, a4, 2 - add a4, a5, a4 lui a0, 22 addiw a0, a0, 640 add a2, sp, a0 + vse32.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 64 + addiw a1, a1, 72 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a2) lui a0, 22 addiw a0, a0, 512 add a1, sp, a0 + vse32.v v8, (a1) csrr a0, vlenb - lui t0, 1 - addiw t0, t0, 72 - mul a0, a0, t0 + lui s11, 1 + addiw s11, s11, 80 + mul a0, a0, s11 add a0, sp, a0 - lui t0, 63 - addiw t0, t0, -1632 - add a0, a0, t0 + lui s11, 63 + addiw s11, s11, -1632 + add a0, a0, s11 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) lui a0, 22 addiw a0, a0, 384 add a0, sp, a0 - csrr t0, vlenb - lui ra, 1 - addiw ra, ra, 80 - mul t0, t0, ra - add t0, sp, t0 - lui ra, 63 - addiw ra, ra, -1632 - add t0, t0, ra - vl8r.v v8, (t0) # Unknown-size Folded Reload vse32.v v8, (a0) - csrr t0, vlenb - lui ra, 1 - addiw ra, ra, 88 - mul t0, t0, ra - add t0, sp, t0 - lui ra, 63 - addiw ra, ra, -1632 - add t0, t0, ra - ld ra, 0(sp) - vl8r.v v8, (t0) # Unknown-size Folded Reload - ld t0, 8(sp) - vse32.v v8, (a5) - fsw fa5, 0(a4) - vle32.v v8, (a5) - csrr a4, vlenb - lui a5, 1 - addiw a5, a5, 88 - mul a4, a4, a5 - add a4, sp, a4 - lui a5, 63 - addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + csrr ra, vlenb + lui s11, 1 + addiw s11, s11, 88 + mul ra, ra, s11 + add ra, sp, ra + lui s11, 63 + addiw s11, s11, -1632 + add ra, ra, s11 + ld s11, 0(sp) + vl8r.v v8, (ra) # Unknown-size Folded Reload + ld ra, 8(sp) + vse32.v v8, (a3) + fsw fa5, 0(t5) + vle32.v v8, (a3) + csrr a3, vlenb + lui t5, 1 + addiw t5, t5, 88 + mul a3, a3, t5 + add a3, sp, a3 + lui t5, 63 + addiw t5, t5, -1632 + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vle32.v v8, (a0) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 80 - mul a0, a0, a4 + lui a3, 1 + addiw a3, a3, 80 + mul a0, a0, a3 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui a3, 63 + addiw a3, a3, -1632 + add a0, a0, a3 vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (a1) csrr a0, vlenb @@ -95901,15 +95843,15 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a4, 240(sp) # 8-byte Folded Reload - addi a4, a4, 9 - andi a4, a4, 1023 - slli a4, a4, 2 + ld t5, 112(sp) # 8-byte Folded Reload + addi t5, t5, 9 + andi t5, t5, 1023 + slli t5, t5, 2 lui a0, 52 addiw a0, a0, 256 add a1, sp, a0 - add a4, a1, a4 - vle32.v v8, (a6) + add t5, a1, t5 + vle32.v v8, (a4) csrr a0, vlenb lui a2, 1 addiw a2, a2, 56 @@ -95919,7 +95861,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t1) + vle32.v v8, (a6) csrr a0, vlenb lui a2, 1 addiw a2, a2, 48 @@ -95929,7 +95871,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t2) + vle32.v v8, (a7) csrr a0, vlenb lui a2, 1 addiw a2, a2, 40 @@ -95939,7 +95881,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s6) + vle32.v v8, (t0) csrr a0, vlenb lui a2, 1 addiw a2, a2, 32 @@ -95949,10 +95891,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 22 - addiw a0, a0, 1280 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t1) csrr a0, vlenb lui a2, 1 addiw a2, a2, 24 @@ -95962,10 +95901,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 22 - addiw a0, a0, 1408 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t2) csrr a0, vlenb lui a2, 1 addiw a2, a2, 16 @@ -96025,7 +95961,10 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s10) + lui a0, 23 + addiw a0, a0, -2048 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a2, 1 addiw a2, a2, -24 @@ -96035,7 +95974,10 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s7) + lui a0, 23 + addiw a0, a0, -1920 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a2, 1 addiw a2, a2, -32 @@ -96055,7 +95997,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a3) + vle32.v v8, (a5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -48 @@ -96075,7 +96017,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t5) + vle32.v v8, (t6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -64 @@ -96085,7 +96027,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t6) + vle32.v v8, (s2) csrr a0, vlenb lui a2, 1 addiw a2, a2, -72 @@ -96095,7 +96037,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s2) + vle32.v v8, (s3) csrr a0, vlenb lui a2, 1 addiw a2, a2, -80 @@ -96105,7 +96047,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s3) + vle32.v v8, (s4) csrr a0, vlenb lui a2, 1 addiw a2, a2, -88 @@ -96115,7 +96057,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s4) + vle32.v v8, (s5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -96 @@ -96125,7 +96067,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s5) + vle32.v v8, (s6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -104 @@ -96135,7 +96077,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s8) + vle32.v v8, (s7) csrr a0, vlenb lui a2, 1 addiw a2, a2, -112 @@ -96145,7 +96087,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s9) + vle32.v v8, (s8) csrr a0, vlenb lui a2, 1 addiw a2, a2, -120 @@ -96155,8 +96097,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 72(sp) # 8-byte Folded Reload - vle32.v v8, (a0) + vle32.v v8, (s9) csrr a0, vlenb li a2, 31 slli a2, a2, 7 @@ -96166,8 +96107,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 80(sp) # 8-byte Folded Reload - vle32.v v8, (a0) + vle32.v v8, (s10) csrr a0, vlenb lui a2, 1 addiw a2, a2, -136 @@ -96177,10 +96117,8 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 88(sp) # 8-byte Folded Reload - vle32.v v24, (a0) - ld a0, 96(sp) # 8-byte Folded Reload - vle32.v v16, (a0) + vle32.v v24, (s11) + vle32.v v16, (ra) ld a0, 104(sp) # 8-byte Folded Reload vle32.v v8, (a0) csrr a0, vlenb @@ -96193,203 +96131,203 @@ add a0, a0, a2 vl8r.v v0, (a0) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 96 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 52 addiw a0, a0, 384 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 96 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 208 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 52 addiw a0, a0, 512 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 216 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 52 addiw a0, a0, 640 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 192 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 52 addiw a0, a0, 768 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 200 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 52 addiw a0, a0, 896 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 176 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 52 addiw a0, a0, 1024 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 184 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 52 addiw a0, a0, 1152 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 160 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 52 addiw a0, a0, 1280 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 168 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 52 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 144 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 52 addiw a0, a0, 1536 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 152 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 52 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 128 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 52 addiw a0, a0, 1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 136 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 52 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 112 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 53 addiw a0, a0, -2048 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 112 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 120 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 53 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) - ld t3, 248(sp) # 8-byte Folded Reload - add a5, a1, t3 + ld t3, 184(sp) # 8-byte Folded Reload + add a3, a1, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, 104 @@ -96399,50 +96337,49 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload - vse32.v v0, (a5) - flw fa5, 0(a4) + vse32.v v0, (a3) + flw fa5, 0(t5) lui a0, 21 addiw a0, a0, 256 - add a5, sp, a0 - add t0, a5, t0 - sd t0, 104(sp) # 8-byte Folded Spill - vse32.v v8, (t0) - add ra, a5, ra - sd ra, 96(sp) # 8-byte Folded Spill - vse32.v v16, (ra) - ld s10, 216(sp) # 8-byte Folded Reload - add a0, a5, s10 - sd a0, 88(sp) # 8-byte Folded Spill - vse32.v v24, (a0) - ld s8, 176(sp) # 8-byte Folded Reload - add a0, a5, s8 - sd a0, 80(sp) # 8-byte Folded Spill - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -136 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a0) - ld s9, 120(sp) # 8-byte Folded Reload - add a0, a5, s9 - sd a0, 72(sp) # 8-byte Folded Spill - csrr a1, vlenb - li a2, 31 - slli a2, a2, 7 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + add a3, sp, a0 + ld a0, 120(sp) # 8-byte Folded Reload + add a0, a3, a0 + sd a0, 104(sp) # 8-byte Folded Spill vse32.v v8, (a0) ld ra, 128(sp) # 8-byte Folded Reload - add ra, a5, ra - sd ra, 64(sp) # 8-byte Folded Spill + add ra, a3, ra + vse32.v v16, (ra) + ld s11, 136(sp) # 8-byte Folded Reload + add s11, a3, s11 + vse32.v v24, (s11) + ld s10, 144(sp) # 8-byte Folded Reload + add s10, a3, s10 + sd ra, 8(sp) + sd s11, 0(sp) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -136 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vse32.v v8, (s10) + ld s9, 152(sp) # 8-byte Folded Reload + add s9, a3, s9 + csrr a0, vlenb + li a1, 31 + slli a1, a1, 7 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vse32.v v8, (s9) + ld s8, 160(sp) # 8-byte Folded Reload + add s8, a3, s8 csrr a0, vlenb lui a1, 1 addiw a1, a1, -120 @@ -96452,9 +96389,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (ra) - ld s7, 136(sp) # 8-byte Folded Reload - add s7, a5, s7 + vse32.v v8, (s8) + ld s7, 168(sp) # 8-byte Folded Reload + add s7, a3, s7 csrr a0, vlenb lui a1, 1 addiw a1, a1, -112 @@ -96465,8 +96402,8 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (s7) - ld s5, 224(sp) # 8-byte Folded Reload - add s5, a5, s5 + ld s6, 176(sp) # 8-byte Folded Reload + add s6, a3, s6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -104 @@ -96476,9 +96413,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s5) - ld s6, 184(sp) # 8-byte Folded Reload - add s4, a5, s6 + vse32.v v8, (s6) + ld s5, 208(sp) # 8-byte Folded Reload + add s5, a3, s5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -96 @@ -96488,9 +96425,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s4) - ld s3, 232(sp) # 8-byte Folded Reload - add s3, a5, s3 + vse32.v v8, (s5) + ld s4, 216(sp) # 8-byte Folded Reload + add s4, a3, s4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -88 @@ -96500,9 +96437,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s3) - ld a6, 144(sp) # 8-byte Folded Reload - add s2, a5, a6 + vse32.v v8, (s4) + ld s3, 224(sp) # 8-byte Folded Reload + add s3, a3, s3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -80 @@ -96512,8 +96449,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s2) - add t6, a5, a7 + vse32.v v8, (s3) + ld s2, 232(sp) # 8-byte Folded Reload + add s2, a3, s2 csrr a0, vlenb lui a1, 1 addiw a1, a1, -72 @@ -96523,9 +96461,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t6) - ld t0, 192(sp) # 8-byte Folded Reload - add t5, a5, t0 + vse32.v v8, (s2) + ld t6, 240(sp) # 8-byte Folded Reload + add t6, a3, t6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -64 @@ -96535,9 +96473,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t5) - ld t4, 200(sp) # 8-byte Folded Reload - add t4, a5, t4 + vse32.v v8, (t6) + ld t4, 248(sp) # 8-byte Folded Reload + add t4, a3, t4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -56 @@ -96548,8 +96486,8 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t4) - ld a3, 208(sp) # 8-byte Folded Reload - add a3, a5, a3 + ld a5, 200(sp) # 8-byte Folded Reload + add a5, a3, a5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -48 @@ -96559,8 +96497,8 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a3) - add t3, a5, t3 + vse32.v v8, (a5) + add t3, a3, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -40 @@ -96571,233 +96509,236 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t3) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -32 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 22 addiw a0, a0, -1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -32 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -24 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 22 addiw a0, a0, -2048 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -24 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 21 addiw a0, a0, 1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -16 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 21 addiw a0, a0, 1792 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + slli a0, a0, 12 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 21 addiw a0, a0, 1664 add a0, sp, a0 - csrr a1, vlenb - slli a1, a1, 12 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 21 addiw a0, a0, 1536 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 21 addiw a0, a0, 1408 add t2, sp, a0 + vse32.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 16 + addiw a1, a1, 24 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 21 addiw a0, a0, 1280 add t1, sp, a0 + vse32.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 24 + addiw a1, a1, 32 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) lui a0, 21 addiw a0, a0, 1152 + add t0, sp, a0 + vse32.v v8, (t0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 40 + mul a0, a0, a1 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 32 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a0) + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 21 addiw a0, a0, 1024 - add t2, sp, a0 + add a7, sp, a0 + vse32.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 40 + addiw a1, a1, 48 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 21 addiw a0, a0, 896 - add t1, sp, a0 + add a6, sp, a0 + vse32.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 48 + addiw a1, a1, 56 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) lui a0, 21 addiw a0, a0, 768 - add a7, sp, a0 + add a4, sp, a0 + vse32.v v8, (a4) + ld a0, 192(sp) # 8-byte Folded Reload + addi t5, a0, 153 + andi t5, t5, 1023 + slli t5, t5, 2 + add t5, a3, t5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 56 + addiw a1, a1, 64 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a7) - addi a4, s11, 153 - andi a4, a4, 1023 - slli a4, a4, 2 - add a4, a5, a4 lui a0, 21 addiw a0, a0, 640 add a2, sp, a0 + vse32.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 64 + addiw a1, a1, 72 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a2) lui a0, 21 addiw a0, a0, 512 add a1, sp, a0 + vse32.v v8, (a1) csrr a0, vlenb lui s11, 1 - addiw s11, s11, 72 + addiw s11, s11, 80 mul a0, a0, s11 add a0, sp, a0 lui s11, 63 addiw s11, s11, -1632 add a0, a0, s11 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) lui a0, 21 addiw a0, a0, 384 add a0, sp, a0 - csrr s11, vlenb - lui ra, 1 - addiw ra, ra, 80 - mul s11, s11, ra - add s11, sp, s11 - lui ra, 63 - addiw ra, ra, -1632 - add s11, s11, ra - vl8r.v v8, (s11) # Unknown-size Folded Reload vse32.v v8, (a0) - csrr s11, vlenb - lui ra, 1 - addiw ra, ra, 88 - mul s11, s11, ra - add s11, sp, s11 - lui ra, 63 - addiw ra, ra, -1632 - add s11, s11, ra - vl8r.v v8, (s11) # Unknown-size Folded Reload - vse32.v v8, (a5) - fsw fa5, 0(a4) - vle32.v v8, (a5) - csrr a4, vlenb - lui a5, 1 - addiw a5, a5, 88 - mul a4, a4, a5 - add a4, sp, a4 - lui a5, 63 - addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + csrr ra, vlenb + lui s11, 1 + addiw s11, s11, 88 + mul ra, ra, s11 + add ra, sp, ra + lui s11, 63 + addiw s11, s11, -1632 + add ra, ra, s11 + ld s11, 0(sp) + vl8r.v v8, (ra) # Unknown-size Folded Reload + ld ra, 8(sp) + vse32.v v8, (a3) + fsw fa5, 0(t5) + vle32.v v8, (a3) + csrr a3, vlenb + lui t5, 1 + addiw t5, t5, 88 + mul a3, a3, t5 + add a3, sp, a3 + lui t5, 63 + addiw t5, t5, -1632 + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vle32.v v8, (a0) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 80 - mul a0, a0, a4 + lui a3, 1 + addiw a3, a3, 80 + mul a0, a0, a3 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui a3, 63 + addiw a3, a3, -1632 + add a0, a0, a3 vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (a1) csrr a0, vlenb @@ -96819,16 +96760,15 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld ra, 240(sp) # 8-byte Folded Reload - addi a4, ra, 10 - andi a4, a4, 1023 - slli a4, a4, 2 - sd ra, 8(sp) + ld t5, 112(sp) # 8-byte Folded Reload + addi t5, t5, 10 + andi t5, t5, 1023 + slli t5, t5, 2 lui a0, 51 addiw a0, a0, 256 add a1, sp, a0 - add a4, a1, a4 - vle32.v v8, (a7) + add t5, a1, t5 + vle32.v v8, (a4) csrr a0, vlenb lui a2, 1 addiw a2, a2, 56 @@ -96838,7 +96778,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t1) + vle32.v v8, (a6) csrr a0, vlenb lui a2, 1 addiw a2, a2, 48 @@ -96848,7 +96788,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t2) + vle32.v v8, (a7) csrr a0, vlenb lui a2, 1 addiw a2, a2, 40 @@ -96858,10 +96798,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 21 - addiw a0, a0, 1152 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t0) csrr a0, vlenb lui a2, 1 addiw a2, a2, 32 @@ -96871,10 +96808,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 21 - addiw a0, a0, 1280 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t1) csrr a0, vlenb lui a2, 1 addiw a2, a2, 24 @@ -96884,10 +96818,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 21 - addiw a0, a0, 1408 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t2) csrr a0, vlenb lui a2, 1 addiw a2, a2, 16 @@ -96983,7 +96914,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a3) + vle32.v v8, (a5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -48 @@ -97003,7 +96934,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t5) + vle32.v v8, (t6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -64 @@ -97013,7 +96944,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t6) + vle32.v v8, (s2) csrr a0, vlenb lui a2, 1 addiw a2, a2, -72 @@ -97023,7 +96954,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s2) + vle32.v v8, (s3) csrr a0, vlenb lui a2, 1 addiw a2, a2, -80 @@ -97033,7 +96964,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s3) + vle32.v v8, (s4) csrr a0, vlenb lui a2, 1 addiw a2, a2, -88 @@ -97043,7 +96974,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s4) + vle32.v v8, (s5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -96 @@ -97053,7 +96984,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s5) + vle32.v v8, (s6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -104 @@ -97073,8 +97004,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 64(sp) # 8-byte Folded Reload - vle32.v v8, (a0) + vle32.v v8, (s8) csrr a0, vlenb lui a2, 1 addiw a2, a2, -120 @@ -97084,8 +97014,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 72(sp) # 8-byte Folded Reload - vle32.v v8, (a0) + vle32.v v8, (s9) csrr a0, vlenb li a2, 31 slli a2, a2, 7 @@ -97095,8 +97024,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 80(sp) # 8-byte Folded Reload - vle32.v v8, (a0) + vle32.v v8, (s10) csrr a0, vlenb lui a2, 1 addiw a2, a2, -136 @@ -97106,10 +97034,8 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 88(sp) # 8-byte Folded Reload - vle32.v v24, (a0) - ld a0, 96(sp) # 8-byte Folded Reload - vle32.v v16, (a0) + vle32.v v24, (s11) + vle32.v v16, (ra) ld a0, 104(sp) # 8-byte Folded Reload vle32.v v8, (a0) csrr a0, vlenb @@ -97122,203 +97048,203 @@ add a0, a0, a2 vl8r.v v0, (a0) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 96 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 51 addiw a0, a0, 384 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 96 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 208 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 51 addiw a0, a0, 512 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 216 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 51 addiw a0, a0, 640 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 192 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 51 addiw a0, a0, 768 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 200 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 51 addiw a0, a0, 896 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 176 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 51 addiw a0, a0, 1024 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 184 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 51 addiw a0, a0, 1152 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 160 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 51 addiw a0, a0, 1280 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 168 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 51 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 144 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 51 addiw a0, a0, 1536 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 152 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 51 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 128 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 51 addiw a0, a0, 1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 136 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 51 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 112 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 52 addiw a0, a0, -2048 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 112 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 120 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 52 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) - ld t3, 248(sp) # 8-byte Folded Reload - add a5, a1, t3 + ld t3, 184(sp) # 8-byte Folded Reload + add a3, a1, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, 104 @@ -97328,24 +97254,25 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload - vse32.v v0, (a5) - flw fa5, 0(a4) + vse32.v v0, (a3) + flw fa5, 0(t5) lui a0, 20 addiw a0, a0, 256 - add a5, sp, a0 - ld a1, 160(sp) # 8-byte Folded Reload - add a1, a5, a1 - sd a1, 104(sp) # 8-byte Folded Spill - vse32.v v8, (a1) - ld a1, 168(sp) # 8-byte Folded Reload - add a1, a5, a1 - sd a1, 96(sp) # 8-byte Folded Spill - vse32.v v16, (a1) - add s10, a5, s10 - sd s10, 88(sp) # 8-byte Folded Spill - vse32.v v24, (s10) - add s8, a5, s8 - sd s8, 80(sp) # 8-byte Folded Spill + add a3, sp, a0 + ld a0, 120(sp) # 8-byte Folded Reload + add a0, a3, a0 + sd a0, 104(sp) # 8-byte Folded Spill + vse32.v v8, (a0) + ld ra, 128(sp) # 8-byte Folded Reload + add ra, a3, ra + vse32.v v16, (ra) + ld s11, 136(sp) # 8-byte Folded Reload + add s11, a3, s11 + vse32.v v24, (s11) + ld s10, 144(sp) # 8-byte Folded Reload + add s10, a3, s10 + sd ra, 8(sp) + sd s11, 0(sp) csrr a0, vlenb lui a1, 1 addiw a1, a1, -136 @@ -97355,8 +97282,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s8) - add s10, a5, s9 + vse32.v v8, (s10) + ld s9, 152(sp) # 8-byte Folded Reload + add s9, a3, s9 csrr a0, vlenb li a1, 31 slli a1, a1, 7 @@ -97366,10 +97294,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s10) - ld s7, 128(sp) # 8-byte Folded Reload - add s7, a5, s7 - sd s10, 0(sp) + vse32.v v8, (s9) + ld s8, 160(sp) # 8-byte Folded Reload + add s8, a3, s8 csrr a0, vlenb lui a1, 1 addiw a1, a1, -120 @@ -97379,9 +97306,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s7) - ld s8, 136(sp) # 8-byte Folded Reload - add s11, a5, s8 + vse32.v v8, (s8) + ld s7, 168(sp) # 8-byte Folded Reload + add s7, a3, s7 csrr a0, vlenb lui a1, 1 addiw a1, a1, -112 @@ -97391,9 +97318,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s11) - ld a7, 224(sp) # 8-byte Folded Reload - add s5, a5, a7 + vse32.v v8, (s7) + ld s6, 176(sp) # 8-byte Folded Reload + add s6, a3, s6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -104 @@ -97403,8 +97330,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s5) - add s4, a5, s6 + vse32.v v8, (s6) + ld s5, 208(sp) # 8-byte Folded Reload + add s5, a3, s5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -96 @@ -97414,9 +97342,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s4) - ld s6, 232(sp) # 8-byte Folded Reload - add s3, a5, s6 + vse32.v v8, (s5) + ld s4, 216(sp) # 8-byte Folded Reload + add s4, a3, s4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -88 @@ -97426,8 +97354,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s3) - add s2, a5, a6 + vse32.v v8, (s4) + ld s3, 224(sp) # 8-byte Folded Reload + add s3, a3, s3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -80 @@ -97437,9 +97366,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s2) - ld t6, 152(sp) # 8-byte Folded Reload - add t6, a5, t6 + vse32.v v8, (s3) + ld s2, 232(sp) # 8-byte Folded Reload + add s2, a3, s2 csrr a0, vlenb lui a1, 1 addiw a1, a1, -72 @@ -97449,8 +97378,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t6) - add t5, a5, t0 + vse32.v v8, (s2) + ld t6, 240(sp) # 8-byte Folded Reload + add t6, a3, t6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -64 @@ -97460,9 +97390,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t5) - ld t4, 200(sp) # 8-byte Folded Reload - add t4, a5, t4 + vse32.v v8, (t6) + ld t4, 248(sp) # 8-byte Folded Reload + add t4, a3, t4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -56 @@ -97473,8 +97403,8 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t4) - ld s9, 208(sp) # 8-byte Folded Reload - add a3, a5, s9 + ld a5, 200(sp) # 8-byte Folded Reload + add a5, a3, a5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -48 @@ -97484,8 +97414,8 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a3) - add t3, a5, t3 + vse32.v v8, (a5) + add t3, a3, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -40 @@ -97496,236 +97426,236 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t3) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -32 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 21 addiw a0, a0, -1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -32 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -24 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 21 addiw a0, a0, -2048 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -24 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 20 addiw a0, a0, 1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -16 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 20 addiw a0, a0, 1792 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + slli a0, a0, 12 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 20 addiw a0, a0, 1664 add a0, sp, a0 - csrr a1, vlenb - slli a1, a1, 12 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 20 addiw a0, a0, 1536 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 20 addiw a0, a0, 1408 add t2, sp, a0 + vse32.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 16 + addiw a1, a1, 24 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 20 addiw a0, a0, 1280 add t1, sp, a0 + vse32.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 24 + addiw a1, a1, 32 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) lui a0, 20 addiw a0, a0, 1152 + add t0, sp, a0 + vse32.v v8, (t0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 40 + mul a0, a0, a1 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 32 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a0) + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 20 addiw a0, a0, 1024 - add t0, sp, a0 + add a7, sp, a0 + vse32.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 40 + addiw a1, a1, 48 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t0) lui a0, 20 addiw a0, a0, 896 - add t2, sp, a0 + add a6, sp, a0 + vse32.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 48 + addiw a1, a1, 56 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 20 addiw a0, a0, 768 - add t1, sp, a0 + add a4, sp, a0 + vse32.v v8, (a4) + ld a0, 192(sp) # 8-byte Folded Reload + addi t5, a0, 170 + andi t5, t5, 1023 + slli t5, t5, 2 + add t5, a3, t5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 56 + addiw a1, a1, 64 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) - ld a6, 112(sp) # 8-byte Folded Reload - addi a4, a6, 170 - andi a4, a4, 1023 - slli a4, a4, 2 - add a4, a5, a4 lui a0, 20 addiw a0, a0, 640 add a2, sp, a0 + vse32.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 64 + addiw a1, a1, 72 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a2) lui a0, 20 addiw a0, a0, 512 add a1, sp, a0 + vse32.v v8, (a1) csrr a0, vlenb - lui s10, 1 - addiw s10, s10, 72 - mul a0, a0, s10 + lui s11, 1 + addiw s11, s11, 80 + mul a0, a0, s11 add a0, sp, a0 - lui s10, 63 - addiw s10, s10, -1632 - add a0, a0, s10 + lui s11, 63 + addiw s11, s11, -1632 + add a0, a0, s11 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) lui a0, 20 addiw a0, a0, 384 add a0, sp, a0 - csrr s10, vlenb - lui ra, 1 - addiw ra, ra, 80 - mul s10, s10, ra - add s10, sp, s10 - lui ra, 63 - addiw ra, ra, -1632 - add s10, s10, ra - vl8r.v v8, (s10) # Unknown-size Folded Reload vse32.v v8, (a0) csrr ra, vlenb - lui s10, 1 - addiw s10, s10, 88 - mul ra, ra, s10 + lui s11, 1 + addiw s11, s11, 88 + mul ra, ra, s11 add ra, sp, ra - lui s10, 63 - addiw s10, s10, -1632 - add ra, ra, s10 - ld s10, 0(sp) + lui s11, 63 + addiw s11, s11, -1632 + add ra, ra, s11 + ld s11, 0(sp) vl8r.v v8, (ra) # Unknown-size Folded Reload ld ra, 8(sp) - vse32.v v8, (a5) - fsw fa5, 0(a4) - vle32.v v8, (a5) - csrr a4, vlenb - lui a5, 1 - addiw a5, a5, 88 - mul a4, a4, a5 - add a4, sp, a4 - lui a5, 63 - addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + vse32.v v8, (a3) + fsw fa5, 0(t5) + vle32.v v8, (a3) + csrr a3, vlenb + lui t5, 1 + addiw t5, t5, 88 + mul a3, a3, t5 + add a3, sp, a3 + lui t5, 63 + addiw t5, t5, -1632 + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vle32.v v8, (a0) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 80 - mul a0, a0, a4 + lui a3, 1 + addiw a3, a3, 80 + mul a0, a0, a3 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui a3, 63 + addiw a3, a3, -1632 + add a0, a0, a3 vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (a1) csrr a0, vlenb @@ -97747,14 +97677,15 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - addi a4, ra, 11 - andi a4, a4, 1023 - slli a4, a4, 2 + ld t5, 112(sp) # 8-byte Folded Reload + addi t5, t5, 11 + andi t5, t5, 1023 + slli t5, t5, 2 lui a0, 50 addiw a0, a0, 256 add a1, sp, a0 - add a4, a1, a4 - vle32.v v8, (t1) + add t5, a1, t5 + vle32.v v8, (a4) csrr a0, vlenb lui a2, 1 addiw a2, a2, 56 @@ -97764,7 +97695,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t2) + vle32.v v8, (a6) csrr a0, vlenb lui a2, 1 addiw a2, a2, 48 @@ -97774,7 +97705,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t0) + vle32.v v8, (a7) csrr a0, vlenb lui a2, 1 addiw a2, a2, 40 @@ -97784,10 +97715,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 20 - addiw a0, a0, 1152 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t0) csrr a0, vlenb lui a2, 1 addiw a2, a2, 32 @@ -97797,10 +97725,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 20 - addiw a0, a0, 1280 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t1) csrr a0, vlenb lui a2, 1 addiw a2, a2, 24 @@ -97810,10 +97735,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 20 - addiw a0, a0, 1408 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t2) csrr a0, vlenb lui a2, 1 addiw a2, a2, 16 @@ -97909,7 +97831,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a3) + vle32.v v8, (a5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -48 @@ -97929,7 +97851,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t5) + vle32.v v8, (t6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -64 @@ -97939,7 +97861,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t6) + vle32.v v8, (s2) csrr a0, vlenb lui a2, 1 addiw a2, a2, -72 @@ -97949,7 +97871,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s2) + vle32.v v8, (s3) csrr a0, vlenb lui a2, 1 addiw a2, a2, -80 @@ -97959,7 +97881,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s3) + vle32.v v8, (s4) csrr a0, vlenb lui a2, 1 addiw a2, a2, -88 @@ -97969,7 +97891,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s4) + vle32.v v8, (s5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -96 @@ -97979,7 +97901,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s5) + vle32.v v8, (s6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -104 @@ -97989,7 +97911,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s11) + vle32.v v8, (s7) csrr a0, vlenb lui a2, 1 addiw a2, a2, -112 @@ -97999,7 +97921,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s7) + vle32.v v8, (s8) csrr a0, vlenb lui a2, 1 addiw a2, a2, -120 @@ -98009,7 +97931,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s10) + vle32.v v8, (s9) csrr a0, vlenb li a2, 31 slli a2, a2, 7 @@ -98019,8 +97941,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 80(sp) # 8-byte Folded Reload - vle32.v v8, (a0) + vle32.v v8, (s10) csrr a0, vlenb lui a2, 1 addiw a2, a2, -136 @@ -98030,10 +97951,8 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 88(sp) # 8-byte Folded Reload - vle32.v v24, (a0) - ld a0, 96(sp) # 8-byte Folded Reload - vle32.v v16, (a0) + vle32.v v24, (s11) + vle32.v v16, (ra) ld a0, 104(sp) # 8-byte Folded Reload vle32.v v8, (a0) csrr a0, vlenb @@ -98046,203 +97965,203 @@ add a0, a0, a2 vl8r.v v0, (a0) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 96 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 50 addiw a0, a0, 384 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 96 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 208 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 50 addiw a0, a0, 512 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 216 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 50 addiw a0, a0, 640 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 192 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 50 addiw a0, a0, 768 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 200 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 50 addiw a0, a0, 896 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 176 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 50 addiw a0, a0, 1024 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 184 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 50 addiw a0, a0, 1152 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 160 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 50 addiw a0, a0, 1280 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 168 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 50 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 144 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 50 addiw a0, a0, 1536 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 152 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 50 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 128 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 50 addiw a0, a0, 1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 136 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 50 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 112 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 51 addiw a0, a0, -2048 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 112 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 120 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 51 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) - ld t3, 248(sp) # 8-byte Folded Reload - add a5, a1, t3 + ld t3, 184(sp) # 8-byte Folded Reload + add a3, a1, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, 104 @@ -98252,51 +98171,49 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload - vse32.v v0, (a5) - flw fa5, 0(a4) + vse32.v v0, (a3) + flw fa5, 0(t5) lui a0, 19 addiw a0, a0, 256 - add a5, sp, a0 - ld ra, 160(sp) # 8-byte Folded Reload - add a0, a5, ra + add a3, sp, a0 + ld a0, 120(sp) # 8-byte Folded Reload + add a0, a3, a0 sd a0, 104(sp) # 8-byte Folded Spill vse32.v v8, (a0) - ld a1, 168(sp) # 8-byte Folded Reload - add a1, a5, a1 - sd a1, 96(sp) # 8-byte Folded Spill - vse32.v v16, (a1) - ld a1, 216(sp) # 8-byte Folded Reload - add a1, a5, a1 - sd a1, 88(sp) # 8-byte Folded Spill - vse32.v v24, (a1) - ld a1, 176(sp) # 8-byte Folded Reload - add a1, a5, a1 - sd a1, 80(sp) # 8-byte Folded Spill + ld ra, 128(sp) # 8-byte Folded Reload + add ra, a3, ra + vse32.v v16, (ra) + ld s11, 136(sp) # 8-byte Folded Reload + add s11, a3, s11 + vse32.v v24, (s11) + ld s10, 144(sp) # 8-byte Folded Reload + add s10, a3, s10 + sd ra, 8(sp) + sd s11, 0(sp) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -136 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 63 - addiw a2, a2, -1632 - add a0, a0, a2 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) - ld a1, 120(sp) # 8-byte Folded Reload - add a1, a5, a1 - sd a1, 72(sp) # 8-byte Folded Spill + vse32.v v8, (s10) + ld s9, 152(sp) # 8-byte Folded Reload + add s9, a3, s9 csrr a0, vlenb - li a2, 31 - slli a2, a2, 7 - mul a0, a0, a2 + li a1, 31 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 63 - addiw a2, a2, -1632 - add a0, a0, a2 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) - ld s7, 128(sp) # 8-byte Folded Reload - add s11, a5, s7 + vse32.v v8, (s9) + ld s8, 160(sp) # 8-byte Folded Reload + add s8, a3, s8 csrr a0, vlenb lui a1, 1 addiw a1, a1, -120 @@ -98306,8 +98223,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s11) - add s10, a5, s8 + vse32.v v8, (s8) + ld s7, 168(sp) # 8-byte Folded Reload + add s7, a3, s7 csrr a0, vlenb lui a1, 1 addiw a1, a1, -112 @@ -98317,8 +98235,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s10) - add s5, a5, a7 + vse32.v v8, (s7) + ld s6, 176(sp) # 8-byte Folded Reload + add s6, a3, s6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -104 @@ -98328,9 +98247,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s5) - ld s4, 184(sp) # 8-byte Folded Reload - add s4, a5, s4 + vse32.v v8, (s6) + ld s5, 208(sp) # 8-byte Folded Reload + add s5, a3, s5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -96 @@ -98340,8 +98259,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s4) - add s3, a5, s6 + vse32.v v8, (s5) + ld s4, 216(sp) # 8-byte Folded Reload + add s4, a3, s4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -88 @@ -98351,9 +98271,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s3) - ld a7, 144(sp) # 8-byte Folded Reload - add s2, a5, a7 + vse32.v v8, (s4) + ld s3, 224(sp) # 8-byte Folded Reload + add s3, a3, s3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -80 @@ -98363,9 +98283,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s2) - ld t0, 152(sp) # 8-byte Folded Reload - add t6, a5, t0 + vse32.v v8, (s3) + ld s2, 232(sp) # 8-byte Folded Reload + add s2, a3, s2 csrr a0, vlenb lui a1, 1 addiw a1, a1, -72 @@ -98375,9 +98295,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t6) - ld t5, 192(sp) # 8-byte Folded Reload - add t5, a5, t5 + vse32.v v8, (s2) + ld t6, 240(sp) # 8-byte Folded Reload + add t6, a3, t6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -64 @@ -98387,9 +98307,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t5) - ld t4, 200(sp) # 8-byte Folded Reload - add t4, a5, t4 + vse32.v v8, (t6) + ld t4, 248(sp) # 8-byte Folded Reload + add t4, a3, t4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -56 @@ -98400,7 +98320,8 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t4) - add a3, a5, s9 + ld a5, 200(sp) # 8-byte Folded Reload + add a5, a3, a5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -48 @@ -98410,8 +98331,8 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a3) - add t3, a5, t3 + vse32.v v8, (a5) + add t3, a3, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -40 @@ -98422,233 +98343,236 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t3) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -32 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 20 addiw a0, a0, -1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -32 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -24 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 20 addiw a0, a0, -2048 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -24 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 19 addiw a0, a0, 1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -16 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 19 addiw a0, a0, 1792 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + slli a0, a0, 12 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 19 addiw a0, a0, 1664 add a0, sp, a0 - csrr a1, vlenb - slli a1, a1, 12 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 19 addiw a0, a0, 1536 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 19 addiw a0, a0, 1408 add t2, sp, a0 + vse32.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 16 + addiw a1, a1, 24 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 19 addiw a0, a0, 1280 add t1, sp, a0 + vse32.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 24 + addiw a1, a1, 32 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) lui a0, 19 addiw a0, a0, 1152 - add t2, sp, a0 + add t0, sp, a0 + vse32.v v8, (t0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 32 + addiw a1, a1, 40 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 19 addiw a0, a0, 1024 - add t1, sp, a0 + add a7, sp, a0 + vse32.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 40 + addiw a1, a1, 48 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) lui a0, 19 addiw a0, a0, 896 - add s8, sp, a0 + add a6, sp, a0 + vse32.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 48 + addiw a1, a1, 56 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s8) lui a0, 19 addiw a0, a0, 768 - add s6, sp, a0 + add a4, sp, a0 + vse32.v v8, (a4) + ld a0, 192(sp) # 8-byte Folded Reload + addi t5, a0, 187 + andi t5, t5, 1023 + slli t5, t5, 2 + add t5, a3, t5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 56 + addiw a1, a1, 64 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s6) - addi a4, a6, 187 - andi a4, a4, 1023 - slli a4, a4, 2 - add a4, a5, a4 lui a0, 19 addiw a0, a0, 640 add a2, sp, a0 + vse32.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 64 + addiw a1, a1, 72 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a2) lui a0, 19 addiw a0, a0, 512 add a1, sp, a0 + vse32.v v8, (a1) csrr a0, vlenb - lui a6, 1 - addiw a6, a6, 72 - mul a0, a0, a6 + lui s11, 1 + addiw s11, s11, 80 + mul a0, a0, s11 add a0, sp, a0 - lui a6, 63 - addiw a6, a6, -1632 - add a0, a0, a6 + lui s11, 63 + addiw s11, s11, -1632 + add a0, a0, s11 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) lui a0, 19 addiw a0, a0, 384 add a0, sp, a0 - csrr a6, vlenb - lui s9, 1 - addiw s9, s9, 80 - mul a6, a6, s9 - add a6, sp, a6 - lui s9, 63 - addiw s9, s9, -1632 - add a6, a6, s9 - vl8r.v v8, (a6) # Unknown-size Folded Reload vse32.v v8, (a0) - csrr a6, vlenb - lui s9, 1 - addiw s9, s9, 88 - mul a6, a6, s9 - add a6, sp, a6 - lui s9, 63 - addiw s9, s9, -1632 - add a6, a6, s9 - vl8r.v v8, (a6) # Unknown-size Folded Reload - vse32.v v8, (a5) - fsw fa5, 0(a4) - vle32.v v8, (a5) - csrr a4, vlenb - lui a5, 1 - addiw a5, a5, 88 - mul a4, a4, a5 - add a4, sp, a4 - lui a5, 63 - addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + csrr ra, vlenb + lui s11, 1 + addiw s11, s11, 88 + mul ra, ra, s11 + add ra, sp, ra + lui s11, 63 + addiw s11, s11, -1632 + add ra, ra, s11 + ld s11, 0(sp) + vl8r.v v8, (ra) # Unknown-size Folded Reload + ld ra, 8(sp) + vse32.v v8, (a3) + fsw fa5, 0(t5) + vle32.v v8, (a3) + csrr a3, vlenb + lui t5, 1 + addiw t5, t5, 88 + mul a3, a3, t5 + add a3, sp, a3 + lui t5, 63 + addiw t5, t5, -1632 + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vle32.v v8, (a0) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 80 - mul a0, a0, a4 + lui a3, 1 + addiw a3, a3, 80 + mul a0, a0, a3 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui a3, 63 + addiw a3, a3, -1632 + add a0, a0, a3 vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (a1) csrr a0, vlenb @@ -98670,16 +98594,15 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld s9, 240(sp) # 8-byte Folded Reload - addi a4, s9, 12 - andi a4, a4, 1023 - slli a4, a4, 2 - sd s9, 8(sp) + ld t5, 112(sp) # 8-byte Folded Reload + addi t5, t5, 12 + andi t5, t5, 1023 + slli t5, t5, 2 lui a0, 49 addiw a0, a0, 256 add a1, sp, a0 - add a4, a1, a4 - vle32.v v8, (s6) + add t5, a1, t5 + vle32.v v8, (a4) csrr a0, vlenb lui a2, 1 addiw a2, a2, 56 @@ -98689,7 +98612,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s8) + vle32.v v8, (a6) csrr a0, vlenb lui a2, 1 addiw a2, a2, 48 @@ -98699,7 +98622,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t1) + vle32.v v8, (a7) csrr a0, vlenb lui a2, 1 addiw a2, a2, 40 @@ -98709,7 +98632,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t2) + vle32.v v8, (t0) csrr a0, vlenb lui a2, 1 addiw a2, a2, 32 @@ -98719,10 +98642,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 19 - addiw a0, a0, 1280 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t1) csrr a0, vlenb lui a2, 1 addiw a2, a2, 24 @@ -98732,10 +98652,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 19 - addiw a0, a0, 1408 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t2) csrr a0, vlenb lui a2, 1 addiw a2, a2, 16 @@ -98831,7 +98748,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a3) + vle32.v v8, (a5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -48 @@ -98851,7 +98768,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t5) + vle32.v v8, (t6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -64 @@ -98861,7 +98778,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t6) + vle32.v v8, (s2) csrr a0, vlenb lui a2, 1 addiw a2, a2, -72 @@ -98871,7 +98788,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s2) + vle32.v v8, (s3) csrr a0, vlenb lui a2, 1 addiw a2, a2, -80 @@ -98881,7 +98798,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s3) + vle32.v v8, (s4) csrr a0, vlenb lui a2, 1 addiw a2, a2, -88 @@ -98891,7 +98808,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s4) + vle32.v v8, (s5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -96 @@ -98901,7 +98818,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s5) + vle32.v v8, (s6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -104 @@ -98911,7 +98828,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s10) + vle32.v v8, (s7) csrr a0, vlenb lui a2, 1 addiw a2, a2, -112 @@ -98921,7 +98838,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s11) + vle32.v v8, (s8) csrr a0, vlenb lui a2, 1 addiw a2, a2, -120 @@ -98931,8 +98848,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 72(sp) # 8-byte Folded Reload - vle32.v v8, (a0) + vle32.v v8, (s9) csrr a0, vlenb li a2, 31 slli a2, a2, 7 @@ -98942,8 +98858,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 80(sp) # 8-byte Folded Reload - vle32.v v8, (a0) + vle32.v v8, (s10) csrr a0, vlenb lui a2, 1 addiw a2, a2, -136 @@ -98953,10 +98868,8 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 88(sp) # 8-byte Folded Reload - vle32.v v24, (a0) - ld a0, 96(sp) # 8-byte Folded Reload - vle32.v v16, (a0) + vle32.v v24, (s11) + vle32.v v16, (ra) ld a0, 104(sp) # 8-byte Folded Reload vle32.v v8, (a0) csrr a0, vlenb @@ -98969,203 +98882,203 @@ add a0, a0, a2 vl8r.v v0, (a0) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 96 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 49 addiw a0, a0, 384 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 96 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 208 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 49 addiw a0, a0, 512 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 216 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 49 addiw a0, a0, 640 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 192 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 49 addiw a0, a0, 768 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 200 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 49 addiw a0, a0, 896 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 176 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 49 addiw a0, a0, 1024 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 184 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 49 addiw a0, a0, 1152 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 160 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 49 addiw a0, a0, 1280 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 168 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 49 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 144 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 49 addiw a0, a0, 1536 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 152 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 49 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 128 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 49 addiw a0, a0, 1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 136 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 49 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 112 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 50 addiw a0, a0, -2048 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 112 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 120 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 50 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) - ld t3, 248(sp) # 8-byte Folded Reload - add a5, a1, t3 + ld t3, 184(sp) # 8-byte Folded Reload + add a3, a1, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, 104 @@ -99175,38 +99088,37 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload - vse32.v v0, (a5) - flw fa5, 0(a4) + vse32.v v0, (a3) + flw fa5, 0(t5) lui a0, 18 addiw a0, a0, 256 - add a5, sp, a0 - add ra, a5, ra - sd ra, 104(sp) # 8-byte Folded Spill - vse32.v v8, (ra) - ld s11, 168(sp) # 8-byte Folded Reload - add a1, a5, s11 - sd a1, 96(sp) # 8-byte Folded Spill - vse32.v v16, (a1) - ld a1, 216(sp) # 8-byte Folded Reload - add a1, a5, a1 - sd a1, 88(sp) # 8-byte Folded Spill - vse32.v v24, (a1) - ld a1, 176(sp) # 8-byte Folded Reload - add a1, a5, a1 - sd a1, 80(sp) # 8-byte Folded Spill + add a3, sp, a0 + ld a0, 120(sp) # 8-byte Folded Reload + add a0, a3, a0 + sd a0, 104(sp) # 8-byte Folded Spill + vse32.v v8, (a0) + ld ra, 128(sp) # 8-byte Folded Reload + add ra, a3, ra + vse32.v v16, (ra) + ld s11, 136(sp) # 8-byte Folded Reload + add s11, a3, s11 + vse32.v v24, (s11) + ld s10, 144(sp) # 8-byte Folded Reload + add s10, a3, s10 + sd ra, 8(sp) sd s11, 0(sp) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -136 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 63 - addiw a2, a2, -1632 - add a0, a0, a2 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) - ld s8, 120(sp) # 8-byte Folded Reload - add s10, a5, s8 + vse32.v v8, (s10) + ld s9, 152(sp) # 8-byte Folded Reload + add s9, a3, s9 csrr a0, vlenb li a1, 31 slli a1, a1, 7 @@ -99216,8 +99128,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s10) - add ra, a5, s7 + vse32.v v8, (s9) + ld s8, 160(sp) # 8-byte Folded Reload + add s8, a3, s8 csrr a0, vlenb lui a1, 1 addiw a1, a1, -120 @@ -99227,9 +99140,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (ra) - ld s6, 136(sp) # 8-byte Folded Reload - add s7, a5, s6 + vse32.v v8, (s8) + ld s7, 168(sp) # 8-byte Folded Reload + add s7, a3, s7 csrr a0, vlenb lui a1, 1 addiw a1, a1, -112 @@ -99240,8 +99153,8 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (s7) - ld s5, 224(sp) # 8-byte Folded Reload - add s5, a5, s5 + ld s6, 176(sp) # 8-byte Folded Reload + add s6, a3, s6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -104 @@ -99251,9 +99164,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s5) - ld a6, 184(sp) # 8-byte Folded Reload - add s4, a5, a6 + vse32.v v8, (s6) + ld s5, 208(sp) # 8-byte Folded Reload + add s5, a3, s5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -96 @@ -99263,9 +99176,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s4) - ld s3, 232(sp) # 8-byte Folded Reload - add s3, a5, s3 + vse32.v v8, (s5) + ld s4, 216(sp) # 8-byte Folded Reload + add s4, a3, s4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -88 @@ -99275,8 +99188,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s3) - add s2, a5, a7 + vse32.v v8, (s4) + ld s3, 224(sp) # 8-byte Folded Reload + add s3, a3, s3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -80 @@ -99286,8 +99200,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s2) - add t6, a5, t0 + vse32.v v8, (s3) + ld s2, 232(sp) # 8-byte Folded Reload + add s2, a3, s2 csrr a0, vlenb lui a1, 1 addiw a1, a1, -72 @@ -99297,9 +99212,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t6) - ld t5, 192(sp) # 8-byte Folded Reload - add t5, a5, t5 + vse32.v v8, (s2) + ld t6, 240(sp) # 8-byte Folded Reload + add t6, a3, t6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -64 @@ -99309,9 +99224,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t5) - ld a7, 200(sp) # 8-byte Folded Reload - add t4, a5, a7 + vse32.v v8, (t6) + ld t4, 248(sp) # 8-byte Folded Reload + add t4, a3, t4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -56 @@ -99322,8 +99237,8 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t4) - ld a3, 208(sp) # 8-byte Folded Reload - add a3, a5, a3 + ld a5, 200(sp) # 8-byte Folded Reload + add a5, a3, a5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -48 @@ -99333,8 +99248,8 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a3) - add t3, a5, t3 + vse32.v v8, (a5) + add t3, a3, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -40 @@ -99345,236 +99260,236 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t3) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -32 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 19 addiw a0, a0, -1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -32 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -24 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 19 addiw a0, a0, -2048 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -24 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 18 addiw a0, a0, 1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -16 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 18 addiw a0, a0, 1792 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + slli a0, a0, 12 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 18 addiw a0, a0, 1664 add a0, sp, a0 - csrr a1, vlenb - slli a1, a1, 12 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 18 addiw a0, a0, 1536 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 18 addiw a0, a0, 1408 add t2, sp, a0 + vse32.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 16 + addiw a1, a1, 24 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 18 addiw a0, a0, 1280 add t1, sp, a0 + vse32.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 24 + addiw a1, a1, 32 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) lui a0, 18 addiw a0, a0, 1152 + add t0, sp, a0 + vse32.v v8, (t0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 40 + mul a0, a0, a1 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 32 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a0) + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 18 addiw a0, a0, 1024 - add t0, sp, a0 + add a7, sp, a0 + vse32.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 40 + addiw a1, a1, 48 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t0) lui a0, 18 addiw a0, a0, 896 - add t2, sp, a0 + add a6, sp, a0 + vse32.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 48 + addiw a1, a1, 56 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 18 addiw a0, a0, 768 - add t1, sp, a0 + add a4, sp, a0 + vse32.v v8, (a4) + ld a0, 192(sp) # 8-byte Folded Reload + addi t5, a0, 204 + andi t5, t5, 1023 + slli t5, t5, 2 + add t5, a3, t5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 56 + addiw a1, a1, 64 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) - ld a0, 112(sp) # 8-byte Folded Reload - addi a4, a0, 204 - andi a4, a4, 1023 - slli a4, a4, 2 - add a4, a5, a4 lui a0, 18 addiw a0, a0, 640 add a2, sp, a0 + vse32.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 64 + addiw a1, a1, 72 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a2) lui a0, 18 addiw a0, a0, 512 add a1, sp, a0 + vse32.v v8, (a1) csrr a0, vlenb - lui s9, 1 - addiw s9, s9, 72 - mul a0, a0, s9 + lui s11, 1 + addiw s11, s11, 80 + mul a0, a0, s11 add a0, sp, a0 - lui s9, 63 - addiw s9, s9, -1632 - add a0, a0, s9 + lui s11, 63 + addiw s11, s11, -1632 + add a0, a0, s11 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) lui a0, 18 addiw a0, a0, 384 add a0, sp, a0 - csrr s9, vlenb - lui s11, 1 - addiw s11, s11, 80 - mul s9, s9, s11 - add s9, sp, s9 - lui s11, 63 - addiw s11, s11, -1632 - add s9, s9, s11 - vl8r.v v8, (s9) # Unknown-size Folded Reload vse32.v v8, (a0) - csrr s9, vlenb + csrr ra, vlenb lui s11, 1 addiw s11, s11, 88 - mul s9, s9, s11 - add s9, sp, s9 + mul ra, ra, s11 + add ra, sp, ra lui s11, 63 addiw s11, s11, -1632 - add s9, s9, s11 + add ra, ra, s11 ld s11, 0(sp) - vl8r.v v8, (s9) # Unknown-size Folded Reload - ld s9, 8(sp) - vse32.v v8, (a5) - fsw fa5, 0(a4) - vle32.v v8, (a5) - csrr a4, vlenb - lui a5, 1 - addiw a5, a5, 88 - mul a4, a4, a5 - add a4, sp, a4 - lui a5, 63 - addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + vl8r.v v8, (ra) # Unknown-size Folded Reload + ld ra, 8(sp) + vse32.v v8, (a3) + fsw fa5, 0(t5) + vle32.v v8, (a3) + csrr a3, vlenb + lui t5, 1 + addiw t5, t5, 88 + mul a3, a3, t5 + add a3, sp, a3 + lui t5, 63 + addiw t5, t5, -1632 + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vle32.v v8, (a0) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 80 - mul a0, a0, a4 + lui a3, 1 + addiw a3, a3, 80 + mul a0, a0, a3 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui a3, 63 + addiw a3, a3, -1632 + add a0, a0, a3 vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (a1) csrr a0, vlenb @@ -99596,15 +99511,15 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - addi a4, s9, 13 - andi a4, a4, 1023 - slli a4, a4, 2 - sd s9, 8(sp) + ld t5, 112(sp) # 8-byte Folded Reload + addi t5, t5, 13 + andi t5, t5, 1023 + slli t5, t5, 2 lui a0, 48 addiw a0, a0, 256 add a1, sp, a0 - add a4, a1, a4 - vle32.v v8, (t1) + add t5, a1, t5 + vle32.v v8, (a4) csrr a0, vlenb lui a2, 1 addiw a2, a2, 56 @@ -99614,7 +99529,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t2) + vle32.v v8, (a6) csrr a0, vlenb lui a2, 1 addiw a2, a2, 48 @@ -99624,7 +99539,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t0) + vle32.v v8, (a7) csrr a0, vlenb lui a2, 1 addiw a2, a2, 40 @@ -99634,10 +99549,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 18 - addiw a0, a0, 1152 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t0) csrr a0, vlenb lui a2, 1 addiw a2, a2, 32 @@ -99647,10 +99559,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 18 - addiw a0, a0, 1280 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t1) csrr a0, vlenb lui a2, 1 addiw a2, a2, 24 @@ -99660,10 +99569,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 18 - addiw a0, a0, 1408 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t2) csrr a0, vlenb lui a2, 1 addiw a2, a2, 16 @@ -99759,7 +99665,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a3) + vle32.v v8, (a5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -48 @@ -99779,7 +99685,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t5) + vle32.v v8, (t6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -64 @@ -99789,7 +99695,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t6) + vle32.v v8, (s2) csrr a0, vlenb lui a2, 1 addiw a2, a2, -72 @@ -99799,7 +99705,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s2) + vle32.v v8, (s3) csrr a0, vlenb lui a2, 1 addiw a2, a2, -80 @@ -99809,7 +99715,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s3) + vle32.v v8, (s4) csrr a0, vlenb lui a2, 1 addiw a2, a2, -88 @@ -99819,7 +99725,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s4) + vle32.v v8, (s5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -96 @@ -99829,7 +99735,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s5) + vle32.v v8, (s6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -104 @@ -99849,7 +99755,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (ra) + vle32.v v8, (s8) csrr a0, vlenb lui a2, 1 addiw a2, a2, -120 @@ -99859,7 +99765,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s10) + vle32.v v8, (s9) csrr a0, vlenb li a2, 31 slli a2, a2, 7 @@ -99869,8 +99775,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 80(sp) # 8-byte Folded Reload - vle32.v v8, (a0) + vle32.v v8, (s10) csrr a0, vlenb lui a2, 1 addiw a2, a2, -136 @@ -99880,10 +99785,8 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 88(sp) # 8-byte Folded Reload - vle32.v v24, (a0) - ld a0, 96(sp) # 8-byte Folded Reload - vle32.v v16, (a0) + vle32.v v24, (s11) + vle32.v v16, (ra) ld a0, 104(sp) # 8-byte Folded Reload vle32.v v8, (a0) csrr a0, vlenb @@ -99896,203 +99799,203 @@ add a0, a0, a2 vl8r.v v0, (a0) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 96 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 48 addiw a0, a0, 384 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 96 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 208 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 48 addiw a0, a0, 512 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 216 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 48 addiw a0, a0, 640 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 192 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 48 addiw a0, a0, 768 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 200 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 48 addiw a0, a0, 896 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 176 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 48 addiw a0, a0, 1024 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 184 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 48 addiw a0, a0, 1152 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 160 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 48 addiw a0, a0, 1280 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 168 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 48 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 144 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 48 addiw a0, a0, 1536 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 152 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 48 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 128 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 48 addiw a0, a0, 1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 136 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 48 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 112 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 49 addiw a0, a0, -2048 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 112 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 120 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 49 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) - ld t3, 248(sp) # 8-byte Folded Reload - add a5, a1, t3 + ld t3, 184(sp) # 8-byte Folded Reload + add a3, a1, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, 104 @@ -100102,38 +100005,37 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload - vse32.v v0, (a5) - flw fa5, 0(a4) + vse32.v v0, (a3) + flw fa5, 0(t5) lui a0, 17 addiw a0, a0, 256 - add a5, sp, a0 - ld ra, 160(sp) # 8-byte Folded Reload - add a0, a5, ra + add a3, sp, a0 + ld a0, 120(sp) # 8-byte Folded Reload + add a0, a3, a0 sd a0, 104(sp) # 8-byte Folded Spill vse32.v v8, (a0) - add s11, a5, s11 - sd s11, 96(sp) # 8-byte Folded Spill - vse32.v v16, (s11) - ld s10, 216(sp) # 8-byte Folded Reload - add a0, a5, s10 - sd a0, 88(sp) # 8-byte Folded Spill - vse32.v v24, (a0) - ld a1, 176(sp) # 8-byte Folded Reload - add a1, a5, a1 - sd a1, 80(sp) # 8-byte Folded Spill - sd ra, 0(sp) + ld ra, 128(sp) # 8-byte Folded Reload + add ra, a3, ra + vse32.v v16, (ra) + ld s11, 136(sp) # 8-byte Folded Reload + add s11, a3, s11 + vse32.v v24, (s11) + ld s10, 144(sp) # 8-byte Folded Reload + add s10, a3, s10 + sd ra, 8(sp) + sd s11, 0(sp) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -136 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 63 - addiw a2, a2, -1632 - add a0, a0, a2 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) - add s8, a5, s8 - sd s8, 72(sp) # 8-byte Folded Spill + vse32.v v8, (s10) + ld s9, 152(sp) # 8-byte Folded Reload + add s9, a3, s9 csrr a0, vlenb li a1, 31 slli a1, a1, 7 @@ -100143,9 +100045,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s8) - ld s8, 128(sp) # 8-byte Folded Reload - add s7, a5, s8 + vse32.v v8, (s9) + ld s8, 160(sp) # 8-byte Folded Reload + add s8, a3, s8 csrr a0, vlenb lui a1, 1 addiw a1, a1, -120 @@ -100155,8 +100057,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s7) - add s11, a5, s6 + vse32.v v8, (s8) + ld s7, 168(sp) # 8-byte Folded Reload + add s7, a3, s7 csrr a0, vlenb lui a1, 1 addiw a1, a1, -112 @@ -100166,9 +100069,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s11) - ld t0, 224(sp) # 8-byte Folded Reload - add s5, a5, t0 + vse32.v v8, (s7) + ld s6, 176(sp) # 8-byte Folded Reload + add s6, a3, s6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -104 @@ -100178,8 +100081,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s5) - add s4, a5, a6 + vse32.v v8, (s6) + ld s5, 208(sp) # 8-byte Folded Reload + add s5, a3, s5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -96 @@ -100189,9 +100093,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s4) - ld s3, 232(sp) # 8-byte Folded Reload - add s3, a5, s3 + vse32.v v8, (s5) + ld s4, 216(sp) # 8-byte Folded Reload + add s4, a3, s4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -88 @@ -100201,9 +100105,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s3) - ld a6, 144(sp) # 8-byte Folded Reload - add s2, a5, a6 + vse32.v v8, (s4) + ld s3, 224(sp) # 8-byte Folded Reload + add s3, a3, s3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -80 @@ -100213,9 +100117,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s2) - ld t6, 152(sp) # 8-byte Folded Reload - add t6, a5, t6 + vse32.v v8, (s3) + ld s2, 232(sp) # 8-byte Folded Reload + add s2, a3, s2 csrr a0, vlenb lui a1, 1 addiw a1, a1, -72 @@ -100225,9 +100129,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t6) - ld s6, 192(sp) # 8-byte Folded Reload - add t5, a5, s6 + vse32.v v8, (s2) + ld t6, 240(sp) # 8-byte Folded Reload + add t6, a3, t6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -64 @@ -100237,8 +100141,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t5) - add t4, a5, a7 + vse32.v v8, (t6) + ld t4, 248(sp) # 8-byte Folded Reload + add t4, a3, t4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -56 @@ -100249,8 +100154,8 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t4) - ld a3, 208(sp) # 8-byte Folded Reload - add a3, a5, a3 + ld a5, 200(sp) # 8-byte Folded Reload + add a5, a3, a5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -48 @@ -100260,8 +100165,8 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a3) - add t3, a5, t3 + vse32.v v8, (a5) + add t3, a3, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -40 @@ -100272,236 +100177,236 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t3) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -32 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 18 addiw a0, a0, -1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -32 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -24 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 18 addiw a0, a0, -2048 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -24 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 17 addiw a0, a0, 1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -16 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 17 addiw a0, a0, 1792 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + slli a0, a0, 12 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 17 addiw a0, a0, 1664 add a0, sp, a0 - csrr a1, vlenb - slli a1, a1, 12 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 17 addiw a0, a0, 1536 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 17 addiw a0, a0, 1408 add t2, sp, a0 + vse32.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 16 + addiw a1, a1, 24 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 17 addiw a0, a0, 1280 add t1, sp, a0 + vse32.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 24 + addiw a1, a1, 32 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) lui a0, 17 addiw a0, a0, 1152 + add t0, sp, a0 + vse32.v v8, (t0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 40 + mul a0, a0, a1 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 32 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a0) + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 17 addiw a0, a0, 1024 - add t2, sp, a0 + add a7, sp, a0 + vse32.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 40 + addiw a1, a1, 48 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 17 addiw a0, a0, 896 - add a7, sp, a0 + add a6, sp, a0 + vse32.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 48 + addiw a1, a1, 56 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a7) lui a0, 17 addiw a0, a0, 768 - add t1, sp, a0 + add a4, sp, a0 + vse32.v v8, (a4) + ld a0, 192(sp) # 8-byte Folded Reload + addi t5, a0, 221 + andi t5, t5, 1023 + slli t5, t5, 2 + add t5, a3, t5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 56 + addiw a1, a1, 64 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) - ld a0, 112(sp) # 8-byte Folded Reload - addi a4, a0, 221 - andi a4, a4, 1023 - slli a4, a4, 2 - add a4, a5, a4 lui a0, 17 addiw a0, a0, 640 add a2, sp, a0 + vse32.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 64 + addiw a1, a1, 72 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a2) lui a0, 17 addiw a0, a0, 512 add a1, sp, a0 + vse32.v v8, (a1) csrr a0, vlenb - lui s9, 1 - addiw s9, s9, 72 - mul a0, a0, s9 + lui s11, 1 + addiw s11, s11, 80 + mul a0, a0, s11 add a0, sp, a0 - lui s9, 63 - addiw s9, s9, -1632 - add a0, a0, s9 + lui s11, 63 + addiw s11, s11, -1632 + add a0, a0, s11 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) lui a0, 17 addiw a0, a0, 384 add a0, sp, a0 - csrr s9, vlenb - lui ra, 1 - addiw ra, ra, 80 - mul s9, s9, ra - add s9, sp, s9 - lui ra, 63 - addiw ra, ra, -1632 - add s9, s9, ra - vl8r.v v8, (s9) # Unknown-size Folded Reload vse32.v v8, (a0) - csrr s9, vlenb - lui ra, 1 - addiw ra, ra, 88 - mul s9, s9, ra - add s9, sp, s9 - lui ra, 63 - addiw ra, ra, -1632 - add s9, s9, ra - ld ra, 0(sp) - vl8r.v v8, (s9) # Unknown-size Folded Reload - ld s9, 8(sp) - vse32.v v8, (a5) - fsw fa5, 0(a4) - vle32.v v8, (a5) - csrr a4, vlenb - lui a5, 1 - addiw a5, a5, 88 - mul a4, a4, a5 - add a4, sp, a4 - lui a5, 63 - addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + csrr ra, vlenb + lui s11, 1 + addiw s11, s11, 88 + mul ra, ra, s11 + add ra, sp, ra + lui s11, 63 + addiw s11, s11, -1632 + add ra, ra, s11 + ld s11, 0(sp) + vl8r.v v8, (ra) # Unknown-size Folded Reload + ld ra, 8(sp) + vse32.v v8, (a3) + fsw fa5, 0(t5) + vle32.v v8, (a3) + csrr a3, vlenb + lui t5, 1 + addiw t5, t5, 88 + mul a3, a3, t5 + add a3, sp, a3 + lui t5, 63 + addiw t5, t5, -1632 + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vle32.v v8, (a0) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 80 - mul a0, a0, a4 + lui a3, 1 + addiw a3, a3, 80 + mul a0, a0, a3 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui a3, 63 + addiw a3, a3, -1632 + add a0, a0, a3 vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (a1) csrr a0, vlenb @@ -100523,14 +100428,15 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - addi a4, s9, 14 - andi a4, a4, 1023 - slli a4, a4, 2 + ld t5, 112(sp) # 8-byte Folded Reload + addi t5, t5, 14 + andi t5, t5, 1023 + slli t5, t5, 2 lui a0, 47 addiw a0, a0, 256 add a1, sp, a0 - add a4, a1, a4 - vle32.v v8, (t1) + add t5, a1, t5 + vle32.v v8, (a4) csrr a0, vlenb lui a2, 1 addiw a2, a2, 56 @@ -100540,7 +100446,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a7) + vle32.v v8, (a6) csrr a0, vlenb lui a2, 1 addiw a2, a2, 48 @@ -100550,7 +100456,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t2) + vle32.v v8, (a7) csrr a0, vlenb lui a2, 1 addiw a2, a2, 40 @@ -100560,10 +100466,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 17 - addiw a0, a0, 1152 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t0) csrr a0, vlenb lui a2, 1 addiw a2, a2, 32 @@ -100573,10 +100476,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 17 - addiw a0, a0, 1280 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t1) csrr a0, vlenb lui a2, 1 addiw a2, a2, 24 @@ -100586,10 +100486,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 17 - addiw a0, a0, 1408 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t2) csrr a0, vlenb lui a2, 1 addiw a2, a2, 16 @@ -100685,7 +100582,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a3) + vle32.v v8, (a5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -48 @@ -100705,7 +100602,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t5) + vle32.v v8, (t6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -64 @@ -100715,7 +100612,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t6) + vle32.v v8, (s2) csrr a0, vlenb lui a2, 1 addiw a2, a2, -72 @@ -100725,7 +100622,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s2) + vle32.v v8, (s3) csrr a0, vlenb lui a2, 1 addiw a2, a2, -80 @@ -100735,7 +100632,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s3) + vle32.v v8, (s4) csrr a0, vlenb lui a2, 1 addiw a2, a2, -88 @@ -100745,7 +100642,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s4) + vle32.v v8, (s5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -96 @@ -100755,7 +100652,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s5) + vle32.v v8, (s6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -104 @@ -100765,7 +100662,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s11) + vle32.v v8, (s7) csrr a0, vlenb lui a2, 1 addiw a2, a2, -112 @@ -100775,7 +100672,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s7) + vle32.v v8, (s8) csrr a0, vlenb lui a2, 1 addiw a2, a2, -120 @@ -100785,8 +100682,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 72(sp) # 8-byte Folded Reload - vle32.v v8, (a0) + vle32.v v8, (s9) csrr a0, vlenb li a2, 31 slli a2, a2, 7 @@ -100796,8 +100692,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 80(sp) # 8-byte Folded Reload - vle32.v v8, (a0) + vle32.v v8, (s10) csrr a0, vlenb lui a2, 1 addiw a2, a2, -136 @@ -100807,10 +100702,8 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 88(sp) # 8-byte Folded Reload - vle32.v v24, (a0) - ld a0, 96(sp) # 8-byte Folded Reload - vle32.v v16, (a0) + vle32.v v24, (s11) + vle32.v v16, (ra) ld a0, 104(sp) # 8-byte Folded Reload vle32.v v8, (a0) csrr a0, vlenb @@ -100823,203 +100716,203 @@ add a0, a0, a2 vl8r.v v0, (a0) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 96 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 47 addiw a0, a0, 384 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 96 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 208 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 47 addiw a0, a0, 512 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 216 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 47 addiw a0, a0, 640 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 192 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 47 addiw a0, a0, 768 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 200 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 47 addiw a0, a0, 896 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 176 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 47 addiw a0, a0, 1024 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 184 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 47 addiw a0, a0, 1152 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 160 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 47 addiw a0, a0, 1280 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 168 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 47 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 144 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 47 addiw a0, a0, 1536 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 152 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 47 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 128 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 47 addiw a0, a0, 1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 136 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 47 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 112 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 48 addiw a0, a0, -2048 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 112 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 120 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 48 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) - ld t3, 248(sp) # 8-byte Folded Reload - add a5, a1, t3 + ld t3, 184(sp) # 8-byte Folded Reload + add a3, a1, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, 104 @@ -101029,51 +100922,49 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload - vse32.v v0, (a5) - flw fa5, 0(a4) + vse32.v v0, (a3) + flw fa5, 0(t5) lui a0, 16 addiw a0, a0, 256 - add a5, sp, a0 - add ra, a5, ra - sd ra, 104(sp) # 8-byte Folded Spill - vse32.v v8, (ra) - ld ra, 168(sp) # 8-byte Folded Reload - add a0, a5, ra - sd a0, 96(sp) # 8-byte Folded Spill - vse32.v v16, (a0) - add s10, a5, s10 - sd s10, 88(sp) # 8-byte Folded Spill - vse32.v v24, (s10) - ld s9, 176(sp) # 8-byte Folded Reload - add a0, a5, s9 - sd a0, 80(sp) # 8-byte Folded Spill - sd ra, 8(sp) - sd s9, 0(sp) - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -136 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + add a3, sp, a0 + ld a0, 120(sp) # 8-byte Folded Reload + add a0, a3, a0 + sd a0, 104(sp) # 8-byte Folded Spill vse32.v v8, (a0) - ld a1, 120(sp) # 8-byte Folded Reload - add a1, a5, a1 - sd a1, 72(sp) # 8-byte Folded Spill + ld ra, 128(sp) # 8-byte Folded Reload + add ra, a3, ra + vse32.v v16, (ra) + ld s11, 136(sp) # 8-byte Folded Reload + add s11, a3, s11 + vse32.v v24, (s11) + ld s10, 144(sp) # 8-byte Folded Reload + add s10, a3, s10 + sd ra, 8(sp) + sd s11, 0(sp) csrr a0, vlenb - li a2, 31 - slli a2, a2, 7 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 63 - addiw a2, a2, -1632 - add a0, a0, a2 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) - mv s7, s8 - add s11, a5, s8 + vse32.v v8, (s10) + ld s9, 152(sp) # 8-byte Folded Reload + add s9, a3, s9 + csrr a0, vlenb + li a1, 31 + slli a1, a1, 7 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vse32.v v8, (s9) + ld s8, 160(sp) # 8-byte Folded Reload + add s8, a3, s8 csrr a0, vlenb lui a1, 1 addiw a1, a1, -120 @@ -101083,9 +100974,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s11) - ld s8, 136(sp) # 8-byte Folded Reload - add s8, a5, s8 + vse32.v v8, (s8) + ld s7, 168(sp) # 8-byte Folded Reload + add s7, a3, s7 csrr a0, vlenb lui a1, 1 addiw a1, a1, -112 @@ -101095,8 +100986,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s8) - add s5, a5, t0 + vse32.v v8, (s7) + ld s6, 176(sp) # 8-byte Folded Reload + add s6, a3, s6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -104 @@ -101106,9 +100998,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s5) - ld s4, 184(sp) # 8-byte Folded Reload - add s4, a5, s4 + vse32.v v8, (s6) + ld s5, 208(sp) # 8-byte Folded Reload + add s5, a3, s5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -96 @@ -101118,9 +101010,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s4) - ld a7, 232(sp) # 8-byte Folded Reload - add s3, a5, a7 + vse32.v v8, (s5) + ld s4, 216(sp) # 8-byte Folded Reload + add s4, a3, s4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -88 @@ -101130,8 +101022,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s3) - add s2, a5, a6 + vse32.v v8, (s4) + ld s3, 224(sp) # 8-byte Folded Reload + add s3, a3, s3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -80 @@ -101141,9 +101034,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s2) - ld a6, 152(sp) # 8-byte Folded Reload - add t6, a5, a6 + vse32.v v8, (s3) + ld s2, 232(sp) # 8-byte Folded Reload + add s2, a3, s2 csrr a0, vlenb lui a1, 1 addiw a1, a1, -72 @@ -101153,8 +101046,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t6) - add t5, a5, s6 + vse32.v v8, (s2) + ld t6, 240(sp) # 8-byte Folded Reload + add t6, a3, t6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -64 @@ -101164,9 +101058,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t5) - ld s10, 200(sp) # 8-byte Folded Reload - add t4, a5, s10 + vse32.v v8, (t6) + ld t4, 248(sp) # 8-byte Folded Reload + add t4, a3, t4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -56 @@ -101177,8 +101071,8 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t4) - ld s6, 208(sp) # 8-byte Folded Reload - add a3, a5, s6 + ld a5, 200(sp) # 8-byte Folded Reload + add a5, a3, a5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -48 @@ -101188,8 +101082,8 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a3) - add t3, a5, t3 + vse32.v v8, (a5) + add t3, a3, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -40 @@ -101200,236 +101094,236 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t3) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -32 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 17 addiw a0, a0, -1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -32 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -24 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 17 addiw a0, a0, -2048 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -24 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 16 addiw a0, a0, 1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -16 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 16 addiw a0, a0, 1792 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + slli a0, a0, 12 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 16 addiw a0, a0, 1664 add a0, sp, a0 - csrr a1, vlenb - slli a1, a1, 12 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 16 addiw a0, a0, 1536 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 16 addiw a0, a0, 1408 add t2, sp, a0 + vse32.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 16 + addiw a1, a1, 24 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 16 addiw a0, a0, 1280 add t1, sp, a0 + vse32.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 24 + addiw a1, a1, 32 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) lui a0, 16 addiw a0, a0, 1152 + add t0, sp, a0 + vse32.v v8, (t0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 40 + mul a0, a0, a1 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 32 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a0) + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 16 addiw a0, a0, 1024 - add t0, sp, a0 + add a7, sp, a0 + vse32.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 40 + addiw a1, a1, 48 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t0) lui a0, 16 addiw a0, a0, 896 - add t2, sp, a0 + add a6, sp, a0 + vse32.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 48 + addiw a1, a1, 56 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 16 addiw a0, a0, 768 - add t1, sp, a0 + add a4, sp, a0 + vse32.v v8, (a4) + ld a0, 192(sp) # 8-byte Folded Reload + addi t5, a0, 238 + andi t5, t5, 1023 + slli t5, t5, 2 + add t5, a3, t5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 56 + addiw a1, a1, 64 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) - ld a0, 112(sp) # 8-byte Folded Reload - addi a4, a0, 238 - andi a4, a4, 1023 - slli a4, a4, 2 - add a4, a5, a4 lui a0, 16 addiw a0, a0, 640 add a2, sp, a0 + vse32.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 64 + addiw a1, a1, 72 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a2) lui a0, 16 addiw a0, a0, 512 add a1, sp, a0 + vse32.v v8, (a1) csrr a0, vlenb - lui s9, 1 - addiw s9, s9, 72 - mul a0, a0, s9 + lui s11, 1 + addiw s11, s11, 80 + mul a0, a0, s11 add a0, sp, a0 - lui s9, 63 - addiw s9, s9, -1632 - add a0, a0, s9 + lui s11, 63 + addiw s11, s11, -1632 + add a0, a0, s11 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) lui a0, 16 addiw a0, a0, 384 add a0, sp, a0 - csrr s9, vlenb - lui ra, 1 - addiw ra, ra, 80 - mul s9, s9, ra - add s9, sp, s9 - lui ra, 63 - addiw ra, ra, -1632 - add s9, s9, ra - vl8r.v v8, (s9) # Unknown-size Folded Reload vse32.v v8, (a0) csrr ra, vlenb - lui s9, 1 - addiw s9, s9, 88 - mul ra, ra, s9 + lui s11, 1 + addiw s11, s11, 88 + mul ra, ra, s11 add ra, sp, ra - lui s9, 63 - addiw s9, s9, -1632 - add ra, ra, s9 - ld s9, 0(sp) + lui s11, 63 + addiw s11, s11, -1632 + add ra, ra, s11 + ld s11, 0(sp) vl8r.v v8, (ra) # Unknown-size Folded Reload ld ra, 8(sp) - vse32.v v8, (a5) - fsw fa5, 0(a4) - vle32.v v8, (a5) - csrr a4, vlenb - lui a5, 1 - addiw a5, a5, 88 - mul a4, a4, a5 - add a4, sp, a4 - lui a5, 63 - addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + vse32.v v8, (a3) + fsw fa5, 0(t5) + vle32.v v8, (a3) + csrr a3, vlenb + lui t5, 1 + addiw t5, t5, 88 + mul a3, a3, t5 + add a3, sp, a3 + lui t5, 63 + addiw t5, t5, -1632 + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vle32.v v8, (a0) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 80 - mul a0, a0, a4 + lui a3, 1 + addiw a3, a3, 80 + mul a0, a0, a3 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui a3, 63 + addiw a3, a3, -1632 + add a0, a0, a3 vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (a1) csrr a0, vlenb @@ -101451,15 +101345,15 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a4, 240(sp) # 8-byte Folded Reload - addi a4, a4, 15 - andi a4, a4, 1023 - slli a4, a4, 2 + ld t5, 112(sp) # 8-byte Folded Reload + addi t5, t5, 15 + andi t5, t5, 1023 + slli t5, t5, 2 lui a0, 46 addiw a0, a0, 256 add a1, sp, a0 - add a4, a1, a4 - vle32.v v8, (t1) + add t5, a1, t5 + vle32.v v8, (a4) csrr a0, vlenb lui a2, 1 addiw a2, a2, 56 @@ -101469,7 +101363,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t2) + vle32.v v8, (a6) csrr a0, vlenb lui a2, 1 addiw a2, a2, 48 @@ -101479,7 +101373,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t0) + vle32.v v8, (a7) csrr a0, vlenb lui a2, 1 addiw a2, a2, 40 @@ -101489,10 +101383,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 16 - addiw a0, a0, 1152 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t0) csrr a0, vlenb lui a2, 1 addiw a2, a2, 32 @@ -101502,10 +101393,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 16 - addiw a0, a0, 1280 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t1) csrr a0, vlenb lui a2, 1 addiw a2, a2, 24 @@ -101515,10 +101403,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 16 - addiw a0, a0, 1408 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t2) csrr a0, vlenb lui a2, 1 addiw a2, a2, 16 @@ -101614,7 +101499,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a3) + vle32.v v8, (a5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -48 @@ -101634,7 +101519,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t5) + vle32.v v8, (t6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -64 @@ -101644,7 +101529,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t6) + vle32.v v8, (s2) csrr a0, vlenb lui a2, 1 addiw a2, a2, -72 @@ -101654,7 +101539,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s2) + vle32.v v8, (s3) csrr a0, vlenb lui a2, 1 addiw a2, a2, -80 @@ -101664,7 +101549,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s3) + vle32.v v8, (s4) csrr a0, vlenb lui a2, 1 addiw a2, a2, -88 @@ -101674,7 +101559,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s4) + vle32.v v8, (s5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -96 @@ -101684,7 +101569,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s5) + vle32.v v8, (s6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -104 @@ -101694,7 +101579,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s8) + vle32.v v8, (s7) csrr a0, vlenb lui a2, 1 addiw a2, a2, -112 @@ -101704,7 +101589,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s11) + vle32.v v8, (s8) csrr a0, vlenb lui a2, 1 addiw a2, a2, -120 @@ -101714,8 +101599,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 72(sp) # 8-byte Folded Reload - vle32.v v8, (a0) + vle32.v v8, (s9) csrr a0, vlenb li a2, 31 slli a2, a2, 7 @@ -101725,8 +101609,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 80(sp) # 8-byte Folded Reload - vle32.v v8, (a0) + vle32.v v8, (s10) csrr a0, vlenb lui a2, 1 addiw a2, a2, -136 @@ -101736,10 +101619,8 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 88(sp) # 8-byte Folded Reload - vle32.v v24, (a0) - ld a0, 96(sp) # 8-byte Folded Reload - vle32.v v16, (a0) + vle32.v v24, (s11) + vle32.v v16, (ra) ld a0, 104(sp) # 8-byte Folded Reload vle32.v v8, (a0) csrr a0, vlenb @@ -101752,203 +101633,203 @@ add a0, a0, a2 vl8r.v v0, (a0) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 96 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 46 addiw a0, a0, 384 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 96 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 208 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 46 addiw a0, a0, 512 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 216 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 46 addiw a0, a0, 640 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 192 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 46 addiw a0, a0, 768 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 200 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 46 addiw a0, a0, 896 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 176 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 46 addiw a0, a0, 1024 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 184 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 46 addiw a0, a0, 1152 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 160 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 46 addiw a0, a0, 1280 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 168 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 46 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 144 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 46 addiw a0, a0, 1536 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 152 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 46 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 128 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 46 addiw a0, a0, 1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 136 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 46 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 112 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 47 addiw a0, a0, -2048 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 112 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 120 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 47 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) - ld t3, 248(sp) # 8-byte Folded Reload - add a5, a1, t3 + ld t3, 184(sp) # 8-byte Folded Reload + add a3, a1, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, 104 @@ -101958,24 +101839,25 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload - vse32.v v0, (a5) - flw fa5, 0(a4) + vse32.v v0, (a3) + flw fa5, 0(t5) lui a0, 15 addiw a0, a0, 256 - add a5, sp, a0 - ld a1, 160(sp) # 8-byte Folded Reload - add a1, a5, a1 - sd a1, 104(sp) # 8-byte Folded Spill - vse32.v v8, (a1) - add ra, a5, ra - sd ra, 96(sp) # 8-byte Folded Spill + add a3, sp, a0 + ld a0, 120(sp) # 8-byte Folded Reload + add a0, a3, a0 + sd a0, 104(sp) # 8-byte Folded Spill + vse32.v v8, (a0) + ld ra, 128(sp) # 8-byte Folded Reload + add ra, a3, ra vse32.v v16, (ra) - ld a1, 216(sp) # 8-byte Folded Reload - add a1, a5, a1 - sd a1, 88(sp) # 8-byte Folded Spill - vse32.v v24, (a1) - add s9, a5, s9 - sd s9, 80(sp) # 8-byte Folded Spill + ld s11, 136(sp) # 8-byte Folded Reload + add s11, a3, s11 + vse32.v v24, (s11) + ld s10, 144(sp) # 8-byte Folded Reload + add s10, a3, s10 + sd ra, 8(sp) + sd s11, 0(sp) csrr a0, vlenb lui a1, 1 addiw a1, a1, -136 @@ -101985,22 +101867,21 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload + vse32.v v8, (s10) + ld s9, 152(sp) # 8-byte Folded Reload + add s9, a3, s9 + csrr a0, vlenb + li a1, 31 + slli a1, a1, 7 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (s9) - ld s8, 120(sp) # 8-byte Folded Reload - add a0, a5, s8 - sd a0, 72(sp) # 8-byte Folded Spill - sd s8, 8(sp) - csrr a1, vlenb - li a2, 31 - slli a2, a2, 7 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a0) - add ra, a5, s7 + ld s8, 160(sp) # 8-byte Folded Reload + add s8, a3, s8 csrr a0, vlenb lui a1, 1 addiw a1, a1, -120 @@ -102010,9 +101891,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (ra) - ld s9, 136(sp) # 8-byte Folded Reload - add s7, a5, s9 + vse32.v v8, (s8) + ld s7, 168(sp) # 8-byte Folded Reload + add s7, a3, s7 csrr a0, vlenb lui a1, 1 addiw a1, a1, -112 @@ -102023,8 +101904,8 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (s7) - ld t0, 224(sp) # 8-byte Folded Reload - add s5, a5, t0 + ld s6, 176(sp) # 8-byte Folded Reload + add s6, a3, s6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -104 @@ -102034,9 +101915,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s5) - ld s4, 184(sp) # 8-byte Folded Reload - add s4, a5, s4 + vse32.v v8, (s6) + ld s5, 208(sp) # 8-byte Folded Reload + add s5, a3, s5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -96 @@ -102046,8 +101927,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s4) - add s3, a5, a7 + vse32.v v8, (s5) + ld s4, 216(sp) # 8-byte Folded Reload + add s4, a3, s4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -88 @@ -102057,9 +101939,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s3) - ld a7, 144(sp) # 8-byte Folded Reload - add s2, a5, a7 + vse32.v v8, (s4) + ld s3, 224(sp) # 8-byte Folded Reload + add s3, a3, s3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -80 @@ -102069,8 +101951,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s2) - add t6, a5, a6 + vse32.v v8, (s3) + ld s2, 232(sp) # 8-byte Folded Reload + add s2, a3, s2 csrr a0, vlenb lui a1, 1 addiw a1, a1, -72 @@ -102080,9 +101963,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t6) - ld t5, 192(sp) # 8-byte Folded Reload - add t5, a5, t5 + vse32.v v8, (s2) + ld t6, 240(sp) # 8-byte Folded Reload + add t6, a3, t6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -64 @@ -102092,8 +101975,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t5) - add t4, a5, s10 + vse32.v v8, (t6) + ld t4, 248(sp) # 8-byte Folded Reload + add t4, a3, t4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -56 @@ -102104,7 +101988,8 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t4) - add a3, a5, s6 + ld a5, 200(sp) # 8-byte Folded Reload + add a5, a3, a5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -48 @@ -102114,8 +101999,8 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a3) - add t3, a5, t3 + vse32.v v8, (a5) + add t3, a3, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -40 @@ -102126,235 +102011,236 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t3) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -32 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 16 addiw a0, a0, -1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -32 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -24 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload li a0, 31 slli a0, a0, 11 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -24 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 15 addiw a0, a0, 1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -16 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 15 addiw a0, a0, 1792 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + slli a0, a0, 12 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 15 addiw a0, a0, 1664 add a0, sp, a0 - csrr a1, vlenb - slli a1, a1, 12 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 15 addiw a0, a0, 1536 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 15 addiw a0, a0, 1408 add t2, sp, a0 + vse32.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 16 + addiw a1, a1, 24 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 15 addiw a0, a0, 1280 add t1, sp, a0 + vse32.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 24 + addiw a1, a1, 32 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) lui a0, 15 addiw a0, a0, 1152 + add t0, sp, a0 + vse32.v v8, (t0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 40 + mul a0, a0, a1 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 32 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a0) + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 15 addiw a0, a0, 1024 - add t2, sp, a0 + add a7, sp, a0 + vse32.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 40 + addiw a1, a1, 48 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 15 addiw a0, a0, 896 - add t1, sp, a0 + add a6, sp, a0 + vse32.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 48 + addiw a1, a1, 56 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) lui a0, 15 addiw a0, a0, 768 - add s6, sp, a0 + add a4, sp, a0 + vse32.v v8, (a4) + ld a0, 192(sp) # 8-byte Folded Reload + addi t5, a0, 255 + andi t5, t5, 1023 + slli t5, t5, 2 + add t5, a3, t5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 56 + addiw a1, a1, 64 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s6) - ld s11, 112(sp) # 8-byte Folded Reload - addi a4, s11, 255 - andi a4, a4, 1023 - slli a4, a4, 2 - add a4, a5, a4 lui a0, 15 addiw a0, a0, 640 add a2, sp, a0 + vse32.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 64 + addiw a1, a1, 72 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a2) lui a0, 15 addiw a0, a0, 512 add a1, sp, a0 + vse32.v v8, (a1) csrr a0, vlenb - lui s8, 1 - addiw s8, s8, 72 - mul a0, a0, s8 + lui s11, 1 + addiw s11, s11, 80 + mul a0, a0, s11 add a0, sp, a0 - lui s8, 63 - addiw s8, s8, -1632 - add a0, a0, s8 + lui s11, 63 + addiw s11, s11, -1632 + add a0, a0, s11 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) lui a0, 15 addiw a0, a0, 384 add a0, sp, a0 - csrr s8, vlenb - lui s10, 1 - addiw s10, s10, 80 - mul s8, s8, s10 - add s8, sp, s8 - lui s10, 63 - addiw s10, s10, -1632 - add s8, s8, s10 - vl8r.v v8, (s8) # Unknown-size Folded Reload vse32.v v8, (a0) - csrr s10, vlenb - lui s8, 1 - addiw s8, s8, 88 - mul s10, s10, s8 - add s10, sp, s10 - lui s8, 63 - addiw s8, s8, -1632 - add s10, s10, s8 - ld s8, 8(sp) - vl8r.v v8, (s10) # Unknown-size Folded Reload - vse32.v v8, (a5) - fsw fa5, 0(a4) - vle32.v v8, (a5) - csrr a4, vlenb - lui a5, 1 - addiw a5, a5, 88 - mul a4, a4, a5 - add a4, sp, a4 - lui a5, 63 - addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + csrr ra, vlenb + lui s11, 1 + addiw s11, s11, 88 + mul ra, ra, s11 + add ra, sp, ra + lui s11, 63 + addiw s11, s11, -1632 + add ra, ra, s11 + ld s11, 0(sp) + vl8r.v v8, (ra) # Unknown-size Folded Reload + ld ra, 8(sp) + vse32.v v8, (a3) + fsw fa5, 0(t5) + vle32.v v8, (a3) + csrr a3, vlenb + lui t5, 1 + addiw t5, t5, 88 + mul a3, a3, t5 + add a3, sp, a3 + lui t5, 63 + addiw t5, t5, -1632 + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vle32.v v8, (a0) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 80 - mul a0, a0, a4 + lui a3, 1 + addiw a3, a3, 80 + mul a0, a0, a3 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui a3, 63 + addiw a3, a3, -1632 + add a0, a0, a3 vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (a1) csrr a0, vlenb @@ -102376,16 +102262,15 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld s10, 240(sp) # 8-byte Folded Reload - addi a4, s10, 16 - andi a4, a4, 1023 - slli a4, a4, 2 - sd s10, 8(sp) + ld t5, 112(sp) # 8-byte Folded Reload + addi t5, t5, 16 + andi t5, t5, 1023 + slli t5, t5, 2 lui a0, 45 addiw a0, a0, 256 add a1, sp, a0 - add a4, a1, a4 - vle32.v v8, (s6) + add t5, a1, t5 + vle32.v v8, (a4) csrr a0, vlenb lui a2, 1 addiw a2, a2, 56 @@ -102395,7 +102280,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t1) + vle32.v v8, (a6) csrr a0, vlenb lui a2, 1 addiw a2, a2, 48 @@ -102405,7 +102290,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t2) + vle32.v v8, (a7) csrr a0, vlenb lui a2, 1 addiw a2, a2, 40 @@ -102415,10 +102300,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 15 - addiw a0, a0, 1152 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t0) csrr a0, vlenb lui a2, 1 addiw a2, a2, 32 @@ -102428,10 +102310,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 15 - addiw a0, a0, 1280 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t1) csrr a0, vlenb lui a2, 1 addiw a2, a2, 24 @@ -102441,10 +102320,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 15 - addiw a0, a0, 1408 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t2) csrr a0, vlenb lui a2, 1 addiw a2, a2, 16 @@ -102540,7 +102416,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a3) + vle32.v v8, (a5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -48 @@ -102560,7 +102436,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t5) + vle32.v v8, (t6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -64 @@ -102570,7 +102446,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t6) + vle32.v v8, (s2) csrr a0, vlenb lui a2, 1 addiw a2, a2, -72 @@ -102580,7 +102456,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s2) + vle32.v v8, (s3) csrr a0, vlenb lui a2, 1 addiw a2, a2, -80 @@ -102590,7 +102466,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s3) + vle32.v v8, (s4) csrr a0, vlenb lui a2, 1 addiw a2, a2, -88 @@ -102600,7 +102476,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s4) + vle32.v v8, (s5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -96 @@ -102610,7 +102486,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s5) + vle32.v v8, (s6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -104 @@ -102630,7 +102506,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (ra) + vle32.v v8, (s8) csrr a0, vlenb lui a2, 1 addiw a2, a2, -120 @@ -102640,8 +102516,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 72(sp) # 8-byte Folded Reload - vle32.v v8, (a0) + vle32.v v8, (s9) csrr a0, vlenb li a2, 31 slli a2, a2, 7 @@ -102651,8 +102526,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 80(sp) # 8-byte Folded Reload - vle32.v v8, (a0) + vle32.v v8, (s10) csrr a0, vlenb lui a2, 1 addiw a2, a2, -136 @@ -102662,10 +102536,8 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 88(sp) # 8-byte Folded Reload - vle32.v v24, (a0) - ld a0, 96(sp) # 8-byte Folded Reload - vle32.v v16, (a0) + vle32.v v24, (s11) + vle32.v v16, (ra) ld a0, 104(sp) # 8-byte Folded Reload vle32.v v8, (a0) csrr a0, vlenb @@ -102678,203 +102550,203 @@ add a0, a0, a2 vl8r.v v0, (a0) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 96 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 45 addiw a0, a0, 384 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 96 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 208 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 45 addiw a0, a0, 512 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 216 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 45 addiw a0, a0, 640 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 192 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 45 addiw a0, a0, 768 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 200 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 45 addiw a0, a0, 896 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 176 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 45 addiw a0, a0, 1024 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 184 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 45 addiw a0, a0, 1152 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 160 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 45 addiw a0, a0, 1280 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 168 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 45 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 144 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 45 addiw a0, a0, 1536 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 152 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 45 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 128 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 45 addiw a0, a0, 1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 136 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 45 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 112 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 46 addiw a0, a0, -2048 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 112 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 120 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 46 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) - ld t3, 248(sp) # 8-byte Folded Reload - add a5, a1, t3 + ld t3, 184(sp) # 8-byte Folded Reload + add a3, a1, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, 104 @@ -102884,37 +102756,37 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload - vse32.v v0, (a5) - flw fa5, 0(a4) + vse32.v v0, (a3) + flw fa5, 0(t5) lui a0, 14 addiw a0, a0, 256 - add a5, sp, a0 - ld a1, 160(sp) # 8-byte Folded Reload - add a1, a5, a1 - sd a1, 104(sp) # 8-byte Folded Spill - vse32.v v8, (a1) - ld a1, 168(sp) # 8-byte Folded Reload - add a1, a5, a1 - sd a1, 96(sp) # 8-byte Folded Spill - vse32.v v16, (a1) - ld a1, 216(sp) # 8-byte Folded Reload - add a1, a5, a1 - sd a1, 88(sp) # 8-byte Folded Spill - vse32.v v24, (a1) - ld a1, 176(sp) # 8-byte Folded Reload - add a1, a5, a1 - sd a1, 80(sp) # 8-byte Folded Spill + add a3, sp, a0 + ld a0, 120(sp) # 8-byte Folded Reload + add a0, a3, a0 + sd a0, 104(sp) # 8-byte Folded Spill + vse32.v v8, (a0) + ld ra, 128(sp) # 8-byte Folded Reload + add ra, a3, ra + vse32.v v16, (ra) + ld s11, 136(sp) # 8-byte Folded Reload + add s11, a3, s11 + vse32.v v24, (s11) + ld s10, 144(sp) # 8-byte Folded Reload + add s10, a3, s10 + sd ra, 8(sp) + sd s11, 0(sp) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -136 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 63 - addiw a2, a2, -1632 - add a0, a0, a2 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) - add ra, a5, s8 + vse32.v v8, (s10) + ld s9, 152(sp) # 8-byte Folded Reload + add s9, a3, s9 csrr a0, vlenb li a1, 31 slli a1, a1, 7 @@ -102924,9 +102796,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (ra) - ld s7, 128(sp) # 8-byte Folded Reload - add s8, a5, s7 + vse32.v v8, (s9) + ld s8, 160(sp) # 8-byte Folded Reload + add s8, a3, s8 csrr a0, vlenb lui a1, 1 addiw a1, a1, -120 @@ -102937,7 +102809,8 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (s8) - add s6, a5, s9 + ld s7, 168(sp) # 8-byte Folded Reload + add s7, a3, s7 csrr a0, vlenb lui a1, 1 addiw a1, a1, -112 @@ -102947,8 +102820,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s6) - add s5, a5, t0 + vse32.v v8, (s7) + ld s6, 176(sp) # 8-byte Folded Reload + add s6, a3, s6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -104 @@ -102958,9 +102832,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s5) - ld s4, 184(sp) # 8-byte Folded Reload - add s4, a5, s4 + vse32.v v8, (s6) + ld s5, 208(sp) # 8-byte Folded Reload + add s5, a3, s5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -96 @@ -102970,9 +102844,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s4) - ld s3, 232(sp) # 8-byte Folded Reload - add s3, a5, s3 + vse32.v v8, (s5) + ld s4, 216(sp) # 8-byte Folded Reload + add s4, a3, s4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -88 @@ -102982,8 +102856,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s3) - add s2, a5, a7 + vse32.v v8, (s4) + ld s3, 224(sp) # 8-byte Folded Reload + add s3, a3, s3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -80 @@ -102993,8 +102868,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s2) - add t6, a5, a6 + vse32.v v8, (s3) + ld s2, 232(sp) # 8-byte Folded Reload + add s2, a3, s2 csrr a0, vlenb lui a1, 1 addiw a1, a1, -72 @@ -103004,9 +102880,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t6) - ld a6, 192(sp) # 8-byte Folded Reload - add t5, a5, a6 + vse32.v v8, (s2) + ld t6, 240(sp) # 8-byte Folded Reload + add t6, a3, t6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -64 @@ -103016,9 +102892,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t5) - ld t4, 200(sp) # 8-byte Folded Reload - add t4, a5, t4 + vse32.v v8, (t6) + ld t4, 248(sp) # 8-byte Folded Reload + add t4, a3, t4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -56 @@ -103029,8 +102905,8 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t4) - ld a3, 208(sp) # 8-byte Folded Reload - add a3, a5, a3 + ld a5, 200(sp) # 8-byte Folded Reload + add a5, a3, a5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -48 @@ -103040,8 +102916,8 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a3) - add t3, a5, t3 + vse32.v v8, (a5) + add t3, a3, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -40 @@ -103052,234 +102928,236 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t3) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -32 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 15 addiw a0, a0, -1920 - add s9, sp, a0 + add a0, sp, a0 + vse32.v v8, (a0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -32 + addiw a1, a1, -24 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s9) li a0, 29 slli a0, a0, 11 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -24 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 14 addiw a0, a0, 1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -16 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 14 addiw a0, a0, 1792 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + slli a0, a0, 12 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 14 addiw a0, a0, 1664 add a0, sp, a0 - csrr a1, vlenb - slli a1, a1, 12 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 14 addiw a0, a0, 1536 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 14 addiw a0, a0, 1408 add t2, sp, a0 + vse32.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 16 + addiw a1, a1, 24 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 14 addiw a0, a0, 1280 add t1, sp, a0 + vse32.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 24 + addiw a1, a1, 32 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) lui a0, 14 addiw a0, a0, 1152 add t0, sp, a0 + vse32.v v8, (t0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 32 + addiw a1, a1, 40 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t0) lui a0, 14 addiw a0, a0, 1024 - add t2, sp, a0 + add a7, sp, a0 + vse32.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 40 + addiw a1, a1, 48 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 14 addiw a0, a0, 896 - add a7, sp, a0 + add a6, sp, a0 + vse32.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 48 + addiw a1, a1, 56 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a7) lui a0, 14 addiw a0, a0, 768 - add t1, sp, a0 + add a4, sp, a0 + vse32.v v8, (a4) + ld a0, 192(sp) # 8-byte Folded Reload + addi t5, a0, 272 + andi t5, t5, 1023 + slli t5, t5, 2 + add t5, a3, t5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 56 + addiw a1, a1, 64 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) - addi a4, s11, 272 - andi a4, a4, 1023 - slli a4, a4, 2 - add a4, a5, a4 lui a0, 14 addiw a0, a0, 640 add a2, sp, a0 + vse32.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 64 + addiw a1, a1, 72 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a2) lui a0, 14 addiw a0, a0, 512 add a1, sp, a0 + vse32.v v8, (a1) csrr a0, vlenb - lui s10, 1 - addiw s10, s10, 72 - mul a0, a0, s10 + lui s11, 1 + addiw s11, s11, 80 + mul a0, a0, s11 add a0, sp, a0 - lui s10, 63 - addiw s10, s10, -1632 - add a0, a0, s10 + lui s11, 63 + addiw s11, s11, -1632 + add a0, a0, s11 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) lui a0, 14 addiw a0, a0, 384 add a0, sp, a0 - csrr s10, vlenb + vse32.v v8, (a0) + csrr ra, vlenb lui s11, 1 - addiw s11, s11, 80 - mul s10, s10, s11 - add s10, sp, s10 + addiw s11, s11, 88 + mul ra, ra, s11 + add ra, sp, ra lui s11, 63 addiw s11, s11, -1632 - add s10, s10, s11 - vl8r.v v8, (s10) # Unknown-size Folded Reload - vse32.v v8, (a0) - csrr s11, vlenb - lui s10, 1 - addiw s10, s10, 88 - mul s11, s11, s10 - add s11, sp, s11 - lui s10, 63 - addiw s10, s10, -1632 - add s11, s11, s10 - ld s10, 8(sp) - vl8r.v v8, (s11) # Unknown-size Folded Reload - vse32.v v8, (a5) - fsw fa5, 0(a4) - vle32.v v8, (a5) - csrr a4, vlenb - lui a5, 1 - addiw a5, a5, 88 - mul a4, a4, a5 - add a4, sp, a4 - lui a5, 63 - addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add ra, ra, s11 + ld s11, 0(sp) + vl8r.v v8, (ra) # Unknown-size Folded Reload + ld ra, 8(sp) + vse32.v v8, (a3) + fsw fa5, 0(t5) + vle32.v v8, (a3) + csrr a3, vlenb + lui t5, 1 + addiw t5, t5, 88 + mul a3, a3, t5 + add a3, sp, a3 + lui t5, 63 + addiw t5, t5, -1632 + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vle32.v v8, (a0) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 80 - mul a0, a0, a4 + lui a3, 1 + addiw a3, a3, 80 + mul a0, a0, a3 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui a3, 63 + addiw a3, a3, -1632 + add a0, a0, a3 vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (a1) csrr a0, vlenb @@ -103301,14 +103179,15 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - addi a4, s10, 17 - andi a4, a4, 1023 - slli a4, a4, 2 + ld t5, 112(sp) # 8-byte Folded Reload + addi t5, t5, 17 + andi t5, t5, 1023 + slli t5, t5, 2 lui a0, 44 addiw a0, a0, 256 add a1, sp, a0 - add a4, a1, a4 - vle32.v v8, (t1) + add t5, a1, t5 + vle32.v v8, (a4) csrr a0, vlenb lui a2, 1 addiw a2, a2, 56 @@ -103318,7 +103197,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a7) + vle32.v v8, (a6) csrr a0, vlenb lui a2, 1 addiw a2, a2, 48 @@ -103328,7 +103207,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t2) + vle32.v v8, (a7) csrr a0, vlenb lui a2, 1 addiw a2, a2, 40 @@ -103348,10 +103227,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 14 - addiw a0, a0, 1280 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t1) csrr a0, vlenb lui a2, 1 addiw a2, a2, 24 @@ -103361,10 +103237,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 14 - addiw a0, a0, 1408 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t2) csrr a0, vlenb lui a2, 1 addiw a2, a2, 16 @@ -103437,7 +103310,10 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s9) + lui a0, 15 + addiw a0, a0, -1920 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a2, 1 addiw a2, a2, -32 @@ -103457,7 +103333,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a3) + vle32.v v8, (a5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -48 @@ -103477,7 +103353,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t5) + vle32.v v8, (t6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -64 @@ -103487,7 +103363,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t6) + vle32.v v8, (s2) csrr a0, vlenb lui a2, 1 addiw a2, a2, -72 @@ -103497,7 +103373,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s2) + vle32.v v8, (s3) csrr a0, vlenb lui a2, 1 addiw a2, a2, -80 @@ -103507,7 +103383,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s3) + vle32.v v8, (s4) csrr a0, vlenb lui a2, 1 addiw a2, a2, -88 @@ -103517,7 +103393,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s4) + vle32.v v8, (s5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -96 @@ -103527,7 +103403,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s5) + vle32.v v8, (s6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -104 @@ -103537,7 +103413,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s6) + vle32.v v8, (s7) csrr a0, vlenb lui a2, 1 addiw a2, a2, -112 @@ -103557,7 +103433,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (ra) + vle32.v v8, (s9) csrr a0, vlenb li a2, 31 slli a2, a2, 7 @@ -103567,8 +103443,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 80(sp) # 8-byte Folded Reload - vle32.v v8, (a0) + vle32.v v8, (s10) csrr a0, vlenb lui a2, 1 addiw a2, a2, -136 @@ -103578,10 +103453,8 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 88(sp) # 8-byte Folded Reload - vle32.v v24, (a0) - ld a0, 96(sp) # 8-byte Folded Reload - vle32.v v16, (a0) + vle32.v v24, (s11) + vle32.v v16, (ra) ld a0, 104(sp) # 8-byte Folded Reload vle32.v v8, (a0) csrr a0, vlenb @@ -103594,203 +103467,203 @@ add a0, a0, a2 vl8r.v v0, (a0) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 96 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 44 addiw a0, a0, 384 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 96 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 208 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 44 addiw a0, a0, 512 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 216 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 44 addiw a0, a0, 640 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 192 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 44 addiw a0, a0, 768 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 200 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 44 addiw a0, a0, 896 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 176 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 44 addiw a0, a0, 1024 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 184 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 44 addiw a0, a0, 1152 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 160 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 44 addiw a0, a0, 1280 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 168 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 44 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 144 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 44 addiw a0, a0, 1536 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 152 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 44 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 128 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 44 addiw a0, a0, 1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 136 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 44 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 112 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 45 addiw a0, a0, -2048 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 112 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 120 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 45 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) - ld t3, 248(sp) # 8-byte Folded Reload - add a5, a1, t3 + ld t3, 184(sp) # 8-byte Folded Reload + add a3, a1, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, 104 @@ -103800,40 +103673,37 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload - vse32.v v0, (a5) - flw fa5, 0(a4) + vse32.v v0, (a3) + flw fa5, 0(t5) lui a0, 13 addiw a0, a0, 256 - add a5, sp, a0 - ld ra, 160(sp) # 8-byte Folded Reload - add a0, a5, ra + add a3, sp, a0 + ld a0, 120(sp) # 8-byte Folded Reload + add a0, a3, a0 sd a0, 104(sp) # 8-byte Folded Spill vse32.v v8, (a0) - ld s11, 168(sp) # 8-byte Folded Reload - add a0, a5, s11 - sd a0, 96(sp) # 8-byte Folded Spill - vse32.v v16, (a0) - ld s10, 216(sp) # 8-byte Folded Reload - add s10, a5, s10 - sd s10, 88(sp) # 8-byte Folded Spill - vse32.v v24, (s10) - ld s9, 176(sp) # 8-byte Folded Reload - add a0, a5, s9 - sd a0, 80(sp) # 8-byte Folded Spill + ld ra, 128(sp) # 8-byte Folded Reload + add ra, a3, ra + vse32.v v16, (ra) + ld s11, 136(sp) # 8-byte Folded Reload + add s11, a3, s11 + vse32.v v24, (s11) + ld s10, 144(sp) # 8-byte Folded Reload + add s10, a3, s10 sd ra, 8(sp) sd s11, 0(sp) - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -136 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a0) - ld s8, 120(sp) # 8-byte Folded Reload - add s10, a5, s8 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -136 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vse32.v v8, (s10) + ld s9, 152(sp) # 8-byte Folded Reload + add s9, a3, s9 csrr a0, vlenb li a1, 31 slli a1, a1, 7 @@ -103843,8 +103713,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s10) - add t0, a5, s7 + vse32.v v8, (s9) + ld s8, 160(sp) # 8-byte Folded Reload + add s8, a3, s8 csrr a0, vlenb lui a1, 1 addiw a1, a1, -120 @@ -103854,9 +103725,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t0) - ld s6, 136(sp) # 8-byte Folded Reload - add s7, a5, s6 + vse32.v v8, (s8) + ld s7, 168(sp) # 8-byte Folded Reload + add s7, a3, s7 csrr a0, vlenb lui a1, 1 addiw a1, a1, -112 @@ -103867,8 +103738,8 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (s7) - ld s5, 224(sp) # 8-byte Folded Reload - add s5, a5, s5 + ld s6, 176(sp) # 8-byte Folded Reload + add s6, a3, s6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -104 @@ -103878,9 +103749,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s5) - ld s4, 184(sp) # 8-byte Folded Reload - add s4, a5, s4 + vse32.v v8, (s6) + ld s5, 208(sp) # 8-byte Folded Reload + add s5, a3, s5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -96 @@ -103890,9 +103761,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s4) - ld s3, 232(sp) # 8-byte Folded Reload - add s3, a5, s3 + vse32.v v8, (s5) + ld s4, 216(sp) # 8-byte Folded Reload + add s4, a3, s4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -88 @@ -103902,9 +103773,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s3) - ld a7, 144(sp) # 8-byte Folded Reload - add s2, a5, a7 + vse32.v v8, (s4) + ld s3, 224(sp) # 8-byte Folded Reload + add s3, a3, s3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -80 @@ -103914,9 +103785,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s2) - ld t6, 152(sp) # 8-byte Folded Reload - add t6, a5, t6 + vse32.v v8, (s3) + ld s2, 232(sp) # 8-byte Folded Reload + add s2, a3, s2 csrr a0, vlenb lui a1, 1 addiw a1, a1, -72 @@ -103926,8 +103797,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t6) - add t5, a5, a6 + vse32.v v8, (s2) + ld t6, 240(sp) # 8-byte Folded Reload + add t6, a3, t6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -64 @@ -103937,9 +103809,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t5) - ld t4, 200(sp) # 8-byte Folded Reload - add t4, a5, t4 + vse32.v v8, (t6) + ld t4, 248(sp) # 8-byte Folded Reload + add t4, a3, t4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -56 @@ -103950,8 +103822,8 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t4) - ld a3, 208(sp) # 8-byte Folded Reload - add a3, a5, a3 + ld a5, 200(sp) # 8-byte Folded Reload + add a5, a3, a5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -48 @@ -103961,8 +103833,8 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a3) - add t3, a5, t3 + vse32.v v8, (a5) + add t3, a3, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -40 @@ -103973,203 +103845,203 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t3) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -32 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 14 addiw a0, a0, -1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -32 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -24 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload li a0, 27 slli a0, a0, 11 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -24 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 13 addiw a0, a0, 1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -16 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 13 addiw a0, a0, 1792 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + slli a0, a0, 12 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 13 addiw a0, a0, 1664 add a0, sp, a0 - csrr a1, vlenb - slli a1, a1, 12 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 13 addiw a0, a0, 1536 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 13 addiw a0, a0, 1408 add t2, sp, a0 + vse32.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 16 + addiw a1, a1, 24 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 13 addiw a0, a0, 1280 add t1, sp, a0 + vse32.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 24 + addiw a1, a1, 32 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) lui a0, 13 addiw a0, a0, 1152 + add t0, sp, a0 + vse32.v v8, (t0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 40 + mul a0, a0, a1 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 32 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a0) + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 13 addiw a0, a0, 1024 + add a7, sp, a0 + vse32.v v8, (a7) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 48 + mul a0, a0, a1 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 40 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a0) + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 13 addiw a0, a0, 896 - add t2, sp, a0 + add a6, sp, a0 + vse32.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 48 + addiw a1, a1, 56 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 13 addiw a0, a0, 768 - add t1, sp, a0 + add a4, sp, a0 + vse32.v v8, (a4) + ld a0, 192(sp) # 8-byte Folded Reload + addi t5, a0, 289 + andi t5, t5, 1023 + slli t5, t5, 2 + add t5, a3, t5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 56 + addiw a1, a1, 64 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) - ld a6, 112(sp) # 8-byte Folded Reload - addi a4, a6, 289 - andi a4, a4, 1023 - slli a4, a4, 2 - add a4, a5, a4 lui a0, 13 addiw a0, a0, 640 add a2, sp, a0 + vse32.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 64 + addiw a1, a1, 72 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a2) lui a0, 13 addiw a0, a0, 512 add a1, sp, a0 + vse32.v v8, (a1) csrr a0, vlenb lui s11, 1 - addiw s11, s11, 72 + addiw s11, s11, 80 mul a0, a0, s11 add a0, sp, a0 lui s11, 63 addiw s11, s11, -1632 add a0, a0, s11 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) lui a0, 13 addiw a0, a0, 384 add a0, sp, a0 - csrr s11, vlenb - lui ra, 1 - addiw ra, ra, 80 - mul s11, s11, ra - add s11, sp, s11 - lui ra, 63 - addiw ra, ra, -1632 - add s11, s11, ra - vl8r.v v8, (s11) # Unknown-size Folded Reload vse32.v v8, (a0) csrr ra, vlenb lui s11, 1 @@ -104182,27 +104054,27 @@ ld s11, 0(sp) vl8r.v v8, (ra) # Unknown-size Folded Reload ld ra, 8(sp) - vse32.v v8, (a5) - fsw fa5, 0(a4) - vle32.v v8, (a5) - csrr a4, vlenb - lui a5, 1 - addiw a5, a5, 88 - mul a4, a4, a5 - add a4, sp, a4 - lui a5, 63 - addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + vse32.v v8, (a3) + fsw fa5, 0(t5) + vle32.v v8, (a3) + csrr a3, vlenb + lui t5, 1 + addiw t5, t5, 88 + mul a3, a3, t5 + add a3, sp, a3 + lui t5, 63 + addiw t5, t5, -1632 + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vle32.v v8, (a0) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 80 - mul a0, a0, a4 + lui a3, 1 + addiw a3, a3, 80 + mul a0, a0, a3 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui a3, 63 + addiw a3, a3, -1632 + add a0, a0, a3 vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (a1) csrr a0, vlenb @@ -104224,15 +104096,15 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a4, 240(sp) # 8-byte Folded Reload - addi a4, a4, 18 - andi a4, a4, 1023 - slli a4, a4, 2 + ld t5, 112(sp) # 8-byte Folded Reload + addi t5, t5, 18 + andi t5, t5, 1023 + slli t5, t5, 2 lui a0, 43 addiw a0, a0, 256 add a1, sp, a0 - add a4, a1, a4 - vle32.v v8, (t1) + add t5, a1, t5 + vle32.v v8, (a4) csrr a0, vlenb lui a2, 1 addiw a2, a2, 56 @@ -104242,7 +104114,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t2) + vle32.v v8, (a6) csrr a0, vlenb lui a2, 1 addiw a2, a2, 48 @@ -104252,10 +104124,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 13 - addiw a0, a0, 1024 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (a7) csrr a0, vlenb lui a2, 1 addiw a2, a2, 40 @@ -104265,10 +104134,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 13 - addiw a0, a0, 1152 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t0) csrr a0, vlenb lui a2, 1 addiw a2, a2, 32 @@ -104278,10 +104144,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 13 - addiw a0, a0, 1280 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t1) csrr a0, vlenb lui a2, 1 addiw a2, a2, 24 @@ -104291,10 +104154,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 13 - addiw a0, a0, 1408 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t2) csrr a0, vlenb lui a2, 1 addiw a2, a2, 16 @@ -104390,7 +104250,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a3) + vle32.v v8, (a5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -48 @@ -104410,7 +104270,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t5) + vle32.v v8, (t6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -64 @@ -104420,7 +104280,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t6) + vle32.v v8, (s2) csrr a0, vlenb lui a2, 1 addiw a2, a2, -72 @@ -104430,7 +104290,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s2) + vle32.v v8, (s3) csrr a0, vlenb lui a2, 1 addiw a2, a2, -80 @@ -104440,7 +104300,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s3) + vle32.v v8, (s4) csrr a0, vlenb lui a2, 1 addiw a2, a2, -88 @@ -104450,7 +104310,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s4) + vle32.v v8, (s5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -96 @@ -104460,7 +104320,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s5) + vle32.v v8, (s6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -104 @@ -104480,7 +104340,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t0) + vle32.v v8, (s8) csrr a0, vlenb lui a2, 1 addiw a2, a2, -120 @@ -104490,7 +104350,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s10) + vle32.v v8, (s9) csrr a0, vlenb li a2, 31 slli a2, a2, 7 @@ -104500,8 +104360,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 80(sp) # 8-byte Folded Reload - vle32.v v8, (a0) + vle32.v v8, (s10) csrr a0, vlenb lui a2, 1 addiw a2, a2, -136 @@ -104511,10 +104370,8 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 88(sp) # 8-byte Folded Reload - vle32.v v24, (a0) - ld a0, 96(sp) # 8-byte Folded Reload - vle32.v v16, (a0) + vle32.v v24, (s11) + vle32.v v16, (ra) ld a0, 104(sp) # 8-byte Folded Reload vle32.v v8, (a0) csrr a0, vlenb @@ -104527,203 +104384,203 @@ add a0, a0, a2 vl8r.v v0, (a0) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 96 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 43 addiw a0, a0, 384 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 96 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 208 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 43 addiw a0, a0, 512 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 216 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 43 addiw a0, a0, 640 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 192 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 43 addiw a0, a0, 768 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 200 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 43 addiw a0, a0, 896 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 176 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 43 addiw a0, a0, 1024 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 184 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 43 addiw a0, a0, 1152 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 160 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 43 addiw a0, a0, 1280 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 168 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 43 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 144 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 43 addiw a0, a0, 1536 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 152 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 43 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 128 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 43 addiw a0, a0, 1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 136 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 43 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 112 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 44 addiw a0, a0, -2048 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 112 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 120 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 44 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) - ld t3, 248(sp) # 8-byte Folded Reload - add a5, a1, t3 + ld t3, 184(sp) # 8-byte Folded Reload + add a3, a1, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, 104 @@ -104733,24 +104590,25 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload - vse32.v v0, (a5) - flw fa5, 0(a4) + vse32.v v0, (a3) + flw fa5, 0(t5) lui a0, 12 addiw a0, a0, 256 - add a5, sp, a0 - add ra, a5, ra - sd ra, 104(sp) # 8-byte Folded Spill - vse32.v v8, (ra) - add s11, a5, s11 - sd s11, 96(sp) # 8-byte Folded Spill - vse32.v v16, (s11) - ld s11, 216(sp) # 8-byte Folded Reload - add a0, a5, s11 - sd a0, 88(sp) # 8-byte Folded Spill - vse32.v v24, (a0) - add s9, a5, s9 - sd s9, 80(sp) # 8-byte Folded Spill - sd s11, 8(sp) + add a3, sp, a0 + ld a0, 120(sp) # 8-byte Folded Reload + add a0, a3, a0 + sd a0, 104(sp) # 8-byte Folded Spill + vse32.v v8, (a0) + ld ra, 128(sp) # 8-byte Folded Reload + add ra, a3, ra + vse32.v v16, (ra) + ld s11, 136(sp) # 8-byte Folded Reload + add s11, a3, s11 + vse32.v v24, (s11) + ld s10, 144(sp) # 8-byte Folded Reload + add s10, a3, s10 + sd ra, 8(sp) + sd s11, 0(sp) csrr a0, vlenb lui a1, 1 addiw a1, a1, -136 @@ -104760,9 +104618,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s9) - add s8, a5, s8 - sd s8, 72(sp) # 8-byte Folded Spill + vse32.v v8, (s10) + ld s9, 152(sp) # 8-byte Folded Reload + add s9, a3, s9 csrr a0, vlenb li a1, 31 slli a1, a1, 7 @@ -104772,21 +104630,21 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload + vse32.v v8, (s9) + ld s8, 160(sp) # 8-byte Folded Reload + add s8, a3, s8 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -120 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (s8) - ld s9, 128(sp) # 8-byte Folded Reload - add a0, a5, s9 - sd a0, 64(sp) # 8-byte Folded Spill - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -120 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a0) - add s8, a5, s6 + ld s7, 168(sp) # 8-byte Folded Reload + add s7, a3, s7 csrr a0, vlenb lui a1, 1 addiw a1, a1, -112 @@ -104796,9 +104654,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s8) - ld s5, 224(sp) # 8-byte Folded Reload - add s5, a5, s5 + vse32.v v8, (s7) + ld s6, 176(sp) # 8-byte Folded Reload + add s6, a3, s6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -104 @@ -104808,9 +104666,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s5) - ld s7, 184(sp) # 8-byte Folded Reload - add s4, a5, s7 + vse32.v v8, (s6) + ld s5, 208(sp) # 8-byte Folded Reload + add s5, a3, s5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -96 @@ -104820,9 +104678,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s4) - ld ra, 232(sp) # 8-byte Folded Reload - add s3, a5, ra + vse32.v v8, (s5) + ld s4, 216(sp) # 8-byte Folded Reload + add s4, a3, s4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -88 @@ -104832,8 +104690,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s3) - add s2, a5, a7 + vse32.v v8, (s4) + ld s3, 224(sp) # 8-byte Folded Reload + add s3, a3, s3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -80 @@ -104843,9 +104702,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s2) - ld s10, 152(sp) # 8-byte Folded Reload - add t6, a5, s10 + vse32.v v8, (s3) + ld s2, 232(sp) # 8-byte Folded Reload + add s2, a3, s2 csrr a0, vlenb lui a1, 1 addiw a1, a1, -72 @@ -104855,9 +104714,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t6) - ld a7, 192(sp) # 8-byte Folded Reload - add t5, a5, a7 + vse32.v v8, (s2) + ld t6, 240(sp) # 8-byte Folded Reload + add t6, a3, t6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -64 @@ -104867,9 +104726,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t5) - ld t0, 200(sp) # 8-byte Folded Reload - add t4, a5, t0 + vse32.v v8, (t6) + ld t4, 248(sp) # 8-byte Folded Reload + add t4, a3, t4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -56 @@ -104880,8 +104739,8 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t4) - ld s6, 208(sp) # 8-byte Folded Reload - add a3, a5, s6 + ld a5, 200(sp) # 8-byte Folded Reload + add a5, a3, a5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -48 @@ -104891,8 +104750,8 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a3) - add t3, a5, t3 + vse32.v v8, (a5) + add t3, a3, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -40 @@ -104903,234 +104762,236 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t3) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -32 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 13 addiw a0, a0, -1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -32 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -24 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload li a0, 25 slli a0, a0, 11 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -24 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 12 addiw a0, a0, 1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -16 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 12 addiw a0, a0, 1792 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + slli a0, a0, 12 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 12 addiw a0, a0, 1664 add a0, sp, a0 - csrr a1, vlenb - slli a1, a1, 12 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 12 addiw a0, a0, 1536 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 12 addiw a0, a0, 1408 add t2, sp, a0 + vse32.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 16 + addiw a1, a1, 24 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 12 addiw a0, a0, 1280 add t1, sp, a0 + vse32.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 24 + addiw a1, a1, 32 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) lui a0, 12 addiw a0, a0, 1152 + add t0, sp, a0 + vse32.v v8, (t0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 40 + mul a0, a0, a1 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 32 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a0) + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 12 addiw a0, a0, 1024 + add a7, sp, a0 + vse32.v v8, (a7) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 48 + mul a0, a0, a1 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 40 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a0) + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 12 addiw a0, a0, 896 - add t2, sp, a0 + add a6, sp, a0 + vse32.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 48 + addiw a1, a1, 56 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 12 addiw a0, a0, 768 - add t1, sp, a0 + add a4, sp, a0 + vse32.v v8, (a4) + ld a0, 192(sp) # 8-byte Folded Reload + addi t5, a0, 306 + andi t5, t5, 1023 + slli t5, t5, 2 + add t5, a3, t5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 56 + addiw a1, a1, 64 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) - addi a4, a6, 306 - andi a4, a4, 1023 - slli a4, a4, 2 - add a4, a5, a4 lui a0, 12 addiw a0, a0, 640 add a2, sp, a0 + vse32.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 64 + addiw a1, a1, 72 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a2) lui a0, 12 addiw a0, a0, 512 add a1, sp, a0 + vse32.v v8, (a1) csrr a0, vlenb - lui a6, 1 - addiw a6, a6, 72 - mul a0, a0, a6 + lui s11, 1 + addiw s11, s11, 80 + mul a0, a0, s11 add a0, sp, a0 - lui a6, 63 - addiw a6, a6, -1632 - add a0, a0, a6 + lui s11, 63 + addiw s11, s11, -1632 + add a0, a0, s11 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) lui a0, 12 addiw a0, a0, 384 add a0, sp, a0 - csrr a6, vlenb - lui s11, 1 - addiw s11, s11, 80 - mul a6, a6, s11 - add a6, sp, a6 - lui s11, 63 - addiw s11, s11, -1632 - add a6, a6, s11 - vl8r.v v8, (a6) # Unknown-size Folded Reload vse32.v v8, (a0) - csrr a6, vlenb + csrr ra, vlenb lui s11, 1 addiw s11, s11, 88 - mul a6, a6, s11 - add a6, sp, a6 + mul ra, ra, s11 + add ra, sp, ra lui s11, 63 addiw s11, s11, -1632 - add a6, a6, s11 - ld s11, 8(sp) - vl8r.v v8, (a6) # Unknown-size Folded Reload - vse32.v v8, (a5) - fsw fa5, 0(a4) - vle32.v v8, (a5) - csrr a4, vlenb - lui a5, 1 - addiw a5, a5, 88 - mul a4, a4, a5 - add a4, sp, a4 - lui a5, 63 - addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add ra, ra, s11 + ld s11, 0(sp) + vl8r.v v8, (ra) # Unknown-size Folded Reload + ld ra, 8(sp) + vse32.v v8, (a3) + fsw fa5, 0(t5) + vle32.v v8, (a3) + csrr a3, vlenb + lui t5, 1 + addiw t5, t5, 88 + mul a3, a3, t5 + add a3, sp, a3 + lui t5, 63 + addiw t5, t5, -1632 + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vle32.v v8, (a0) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 80 - mul a0, a0, a4 + lui a3, 1 + addiw a3, a3, 80 + mul a0, a0, a3 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui a3, 63 + addiw a3, a3, -1632 + add a0, a0, a3 vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (a1) csrr a0, vlenb @@ -105152,15 +105013,15 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a4, 240(sp) # 8-byte Folded Reload - addi a4, a4, 19 - andi a4, a4, 1023 - slli a4, a4, 2 + ld t5, 112(sp) # 8-byte Folded Reload + addi t5, t5, 19 + andi t5, t5, 1023 + slli t5, t5, 2 lui a0, 42 addiw a0, a0, 256 add a1, sp, a0 - add a4, a1, a4 - vle32.v v8, (t1) + add t5, a1, t5 + vle32.v v8, (a4) csrr a0, vlenb lui a2, 1 addiw a2, a2, 56 @@ -105170,7 +105031,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t2) + vle32.v v8, (a6) csrr a0, vlenb lui a2, 1 addiw a2, a2, 48 @@ -105180,10 +105041,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 12 - addiw a0, a0, 1024 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (a7) csrr a0, vlenb lui a2, 1 addiw a2, a2, 40 @@ -105193,10 +105051,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 12 - addiw a0, a0, 1152 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t0) csrr a0, vlenb lui a2, 1 addiw a2, a2, 32 @@ -105206,10 +105061,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 12 - addiw a0, a0, 1280 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t1) csrr a0, vlenb lui a2, 1 addiw a2, a2, 24 @@ -105219,10 +105071,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 12 - addiw a0, a0, 1408 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t2) csrr a0, vlenb lui a2, 1 addiw a2, a2, 16 @@ -105318,7 +105167,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a3) + vle32.v v8, (a5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -48 @@ -105338,7 +105187,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t5) + vle32.v v8, (t6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -64 @@ -105348,7 +105197,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t6) + vle32.v v8, (s2) csrr a0, vlenb lui a2, 1 addiw a2, a2, -72 @@ -105358,7 +105207,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s2) + vle32.v v8, (s3) csrr a0, vlenb lui a2, 1 addiw a2, a2, -80 @@ -105368,7 +105217,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s3) + vle32.v v8, (s4) csrr a0, vlenb lui a2, 1 addiw a2, a2, -88 @@ -105378,7 +105227,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s4) + vle32.v v8, (s5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -96 @@ -105388,7 +105237,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s5) + vle32.v v8, (s6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -104 @@ -105398,7 +105247,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s8) + vle32.v v8, (s7) csrr a0, vlenb lui a2, 1 addiw a2, a2, -112 @@ -105408,8 +105257,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 64(sp) # 8-byte Folded Reload - vle32.v v8, (a0) + vle32.v v8, (s8) csrr a0, vlenb lui a2, 1 addiw a2, a2, -120 @@ -105419,8 +105267,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 72(sp) # 8-byte Folded Reload - vle32.v v8, (a0) + vle32.v v8, (s9) csrr a0, vlenb li a2, 31 slli a2, a2, 7 @@ -105430,8 +105277,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 80(sp) # 8-byte Folded Reload - vle32.v v8, (a0) + vle32.v v8, (s10) csrr a0, vlenb lui a2, 1 addiw a2, a2, -136 @@ -105441,10 +105287,8 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 88(sp) # 8-byte Folded Reload - vle32.v v24, (a0) - ld a0, 96(sp) # 8-byte Folded Reload - vle32.v v16, (a0) + vle32.v v24, (s11) + vle32.v v16, (ra) ld a0, 104(sp) # 8-byte Folded Reload vle32.v v8, (a0) csrr a0, vlenb @@ -105457,203 +105301,203 @@ add a0, a0, a2 vl8r.v v0, (a0) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 96 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 42 addiw a0, a0, 384 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 96 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 208 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 42 addiw a0, a0, 512 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 216 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 42 addiw a0, a0, 640 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 192 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 42 addiw a0, a0, 768 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 200 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 42 addiw a0, a0, 896 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 176 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 42 addiw a0, a0, 1024 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 184 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 42 addiw a0, a0, 1152 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 160 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 42 addiw a0, a0, 1280 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 168 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 42 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 144 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 42 addiw a0, a0, 1536 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 152 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 42 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 128 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 42 addiw a0, a0, 1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 136 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 42 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 112 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 43 addiw a0, a0, -2048 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 112 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 120 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 43 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) - ld t3, 248(sp) # 8-byte Folded Reload - add a5, a1, t3 + ld t3, 184(sp) # 8-byte Folded Reload + add a3, a1, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, 104 @@ -105663,50 +105507,49 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload - vse32.v v0, (a5) - flw fa5, 0(a4) + vse32.v v0, (a3) + flw fa5, 0(t5) lui a0, 11 addiw a0, a0, 256 - add a5, sp, a0 - ld a1, 160(sp) # 8-byte Folded Reload - add a1, a5, a1 - sd a1, 104(sp) # 8-byte Folded Spill - vse32.v v8, (a1) - ld a1, 168(sp) # 8-byte Folded Reload - add a1, a5, a1 - sd a1, 96(sp) # 8-byte Folded Spill - vse32.v v16, (a1) - add s11, a5, s11 - sd s11, 88(sp) # 8-byte Folded Spill + add a3, sp, a0 + ld a0, 120(sp) # 8-byte Folded Reload + add a0, a3, a0 + sd a0, 104(sp) # 8-byte Folded Spill + vse32.v v8, (a0) + ld ra, 128(sp) # 8-byte Folded Reload + add ra, a3, ra + vse32.v v16, (ra) + ld s11, 136(sp) # 8-byte Folded Reload + add s11, a3, s11 vse32.v v24, (s11) - ld a1, 176(sp) # 8-byte Folded Reload - add a1, a5, a1 - sd a1, 80(sp) # 8-byte Folded Spill + ld s10, 144(sp) # 8-byte Folded Reload + add s10, a3, s10 + sd ra, 8(sp) + sd s11, 0(sp) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -136 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 63 - addiw a2, a2, -1632 - add a0, a0, a2 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) - ld s8, 120(sp) # 8-byte Folded Reload - add a1, a5, s8 - sd a1, 72(sp) # 8-byte Folded Spill - sd s8, 8(sp) + vse32.v v8, (s10) + ld s9, 152(sp) # 8-byte Folded Reload + add s9, a3, s9 csrr a0, vlenb - li a2, 31 - slli a2, a2, 7 - mul a0, a0, a2 + li a1, 31 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 63 - addiw a2, a2, -1632 - add a0, a0, a2 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) - add s11, a5, s9 + vse32.v v8, (s9) + ld s8, 160(sp) # 8-byte Folded Reload + add s8, a3, s8 csrr a0, vlenb lui a1, 1 addiw a1, a1, -120 @@ -105716,10 +105559,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s11) - ld s9, 136(sp) # 8-byte Folded Reload - add s9, a5, s9 - sd s11, 0(sp) + vse32.v v8, (s8) + ld s7, 168(sp) # 8-byte Folded Reload + add s7, a3, s7 csrr a0, vlenb lui a1, 1 addiw a1, a1, -112 @@ -105729,9 +105571,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s9) - ld s5, 224(sp) # 8-byte Folded Reload - add s5, a5, s5 + vse32.v v8, (s7) + ld s6, 176(sp) # 8-byte Folded Reload + add s6, a3, s6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -104 @@ -105741,8 +105583,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s5) - add s4, a5, s7 + vse32.v v8, (s6) + ld s5, 208(sp) # 8-byte Folded Reload + add s5, a3, s5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -96 @@ -105752,8 +105595,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s4) - add s3, a5, ra + vse32.v v8, (s5) + ld s4, 216(sp) # 8-byte Folded Reload + add s4, a3, s4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -88 @@ -105763,9 +105607,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s3) - ld a6, 144(sp) # 8-byte Folded Reload - add s2, a5, a6 + vse32.v v8, (s4) + ld s3, 224(sp) # 8-byte Folded Reload + add s3, a3, s3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -80 @@ -105775,8 +105619,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s2) - add t6, a5, s10 + vse32.v v8, (s3) + ld s2, 232(sp) # 8-byte Folded Reload + add s2, a3, s2 csrr a0, vlenb lui a1, 1 addiw a1, a1, -72 @@ -105786,8 +105631,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t6) - add t5, a5, a7 + vse32.v v8, (s2) + ld t6, 240(sp) # 8-byte Folded Reload + add t6, a3, t6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -64 @@ -105797,8 +105643,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t5) - add t4, a5, t0 + vse32.v v8, (t6) + ld t4, 248(sp) # 8-byte Folded Reload + add t4, a3, t4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -56 @@ -105809,7 +105656,8 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t4) - add a3, a5, s6 + ld a5, 200(sp) # 8-byte Folded Reload + add a5, a3, a5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -48 @@ -105819,8 +105667,8 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a3) - add t3, a5, t3 + vse32.v v8, (a5) + add t3, a3, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -40 @@ -105831,236 +105679,236 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t3) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -32 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 12 addiw a0, a0, -1920 - add s6, sp, a0 + add a0, sp, a0 + vse32.v v8, (a0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -32 + addiw a1, a1, -24 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s6) li a0, 23 slli a0, a0, 11 - add s7, sp, a0 + add a0, sp, a0 + vse32.v v8, (a0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -24 + addiw a1, a1, -16 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s7) lui a0, 11 addiw a0, a0, 1920 - add ra, sp, a0 + add a0, sp, a0 + vse32.v v8, (a0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -16 + addiw a1, a1, -8 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (ra) lui a0, 11 addiw a0, a0, 1792 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + slli a0, a0, 12 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 11 addiw a0, a0, 1664 add a0, sp, a0 - csrr a1, vlenb - slli a1, a1, 12 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 11 addiw a0, a0, 1536 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 11 addiw a0, a0, 1408 add t2, sp, a0 + vse32.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 16 + addiw a1, a1, 24 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 11 addiw a0, a0, 1280 add t1, sp, a0 + vse32.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 24 + addiw a1, a1, 32 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) lui a0, 11 addiw a0, a0, 1152 + add t0, sp, a0 + vse32.v v8, (t0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 40 + mul a0, a0, a1 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 32 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a0) + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 11 addiw a0, a0, 1024 - add t0, sp, a0 + add a7, sp, a0 + vse32.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 40 + addiw a1, a1, 48 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t0) lui a0, 11 addiw a0, a0, 896 - add t2, sp, a0 + add a6, sp, a0 + vse32.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 48 + addiw a1, a1, 56 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 11 addiw a0, a0, 768 - add t1, sp, a0 + add a4, sp, a0 + vse32.v v8, (a4) + ld a0, 192(sp) # 8-byte Folded Reload + addi t5, a0, 323 + andi t5, t5, 1023 + slli t5, t5, 2 + add t5, a3, t5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 56 + addiw a1, a1, 64 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) - ld s10, 112(sp) # 8-byte Folded Reload - addi a4, s10, 323 - andi a4, a4, 1023 - slli a4, a4, 2 - add a4, a5, a4 lui a0, 11 addiw a0, a0, 640 add a2, sp, a0 + vse32.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 64 + addiw a1, a1, 72 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a2) lui a0, 11 addiw a0, a0, 512 add a1, sp, a0 + vse32.v v8, (a1) csrr a0, vlenb - lui s8, 1 - addiw s8, s8, 72 - mul a0, a0, s8 + lui s11, 1 + addiw s11, s11, 80 + mul a0, a0, s11 add a0, sp, a0 - lui s8, 63 - addiw s8, s8, -1632 - add a0, a0, s8 + lui s11, 63 + addiw s11, s11, -1632 + add a0, a0, s11 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) lui a0, 11 addiw a0, a0, 384 add a0, sp, a0 - csrr s8, vlenb - lui s11, 1 - addiw s11, s11, 80 - mul s8, s8, s11 - add s8, sp, s8 - lui s11, 63 - addiw s11, s11, -1632 - add s8, s8, s11 - vl8r.v v8, (s8) # Unknown-size Folded Reload vse32.v v8, (a0) - csrr s8, vlenb + csrr ra, vlenb lui s11, 1 addiw s11, s11, 88 - mul s8, s8, s11 - add s8, sp, s8 + mul ra, ra, s11 + add ra, sp, ra lui s11, 63 addiw s11, s11, -1632 - add s8, s8, s11 + add ra, ra, s11 ld s11, 0(sp) - vl8r.v v8, (s8) # Unknown-size Folded Reload - ld s8, 8(sp) - vse32.v v8, (a5) - fsw fa5, 0(a4) - vle32.v v8, (a5) - csrr a4, vlenb - lui a5, 1 - addiw a5, a5, 88 - mul a4, a4, a5 - add a4, sp, a4 - lui a5, 63 - addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + vl8r.v v8, (ra) # Unknown-size Folded Reload + ld ra, 8(sp) + vse32.v v8, (a3) + fsw fa5, 0(t5) + vle32.v v8, (a3) + csrr a3, vlenb + lui t5, 1 + addiw t5, t5, 88 + mul a3, a3, t5 + add a3, sp, a3 + lui t5, 63 + addiw t5, t5, -1632 + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vle32.v v8, (a0) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 80 - mul a0, a0, a4 + lui a3, 1 + addiw a3, a3, 80 + mul a0, a0, a3 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui a3, 63 + addiw a3, a3, -1632 + add a0, a0, a3 vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (a1) csrr a0, vlenb @@ -106082,15 +105930,15 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a4, 240(sp) # 8-byte Folded Reload - addi a4, a4, 20 - andi a4, a4, 1023 - slli a4, a4, 2 + ld t5, 112(sp) # 8-byte Folded Reload + addi t5, t5, 20 + andi t5, t5, 1023 + slli t5, t5, 2 lui a0, 41 addiw a0, a0, 256 add a1, sp, a0 - add a4, a1, a4 - vle32.v v8, (t1) + add t5, a1, t5 + vle32.v v8, (a4) csrr a0, vlenb lui a2, 1 addiw a2, a2, 56 @@ -106100,7 +105948,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t2) + vle32.v v8, (a6) csrr a0, vlenb lui a2, 1 addiw a2, a2, 48 @@ -106110,7 +105958,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t0) + vle32.v v8, (a7) csrr a0, vlenb lui a2, 1 addiw a2, a2, 40 @@ -106120,10 +105968,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 11 - addiw a0, a0, 1152 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t0) csrr a0, vlenb lui a2, 1 addiw a2, a2, 32 @@ -106133,10 +105978,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 11 - addiw a0, a0, 1280 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t1) csrr a0, vlenb lui a2, 1 addiw a2, a2, 24 @@ -106146,10 +105988,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 11 - addiw a0, a0, 1408 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t2) csrr a0, vlenb lui a2, 1 addiw a2, a2, 16 @@ -106196,7 +106035,10 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (ra) + lui a0, 11 + addiw a0, a0, 1920 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a2, 1 addiw a2, a2, -16 @@ -106206,7 +106048,10 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s7) + li a0, 23 + slli a0, a0, 11 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a2, 1 addiw a2, a2, -24 @@ -106216,7 +106061,10 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s6) + lui a0, 12 + addiw a0, a0, -1920 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a2, 1 addiw a2, a2, -32 @@ -106236,7 +106084,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a3) + vle32.v v8, (a5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -48 @@ -106256,7 +106104,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t5) + vle32.v v8, (t6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -64 @@ -106266,7 +106114,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t6) + vle32.v v8, (s2) csrr a0, vlenb lui a2, 1 addiw a2, a2, -72 @@ -106276,7 +106124,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s2) + vle32.v v8, (s3) csrr a0, vlenb lui a2, 1 addiw a2, a2, -80 @@ -106286,7 +106134,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s3) + vle32.v v8, (s4) csrr a0, vlenb lui a2, 1 addiw a2, a2, -88 @@ -106296,7 +106144,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s4) + vle32.v v8, (s5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -96 @@ -106306,7 +106154,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s5) + vle32.v v8, (s6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -104 @@ -106316,7 +106164,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s9) + vle32.v v8, (s7) csrr a0, vlenb lui a2, 1 addiw a2, a2, -112 @@ -106326,7 +106174,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s11) + vle32.v v8, (s8) csrr a0, vlenb lui a2, 1 addiw a2, a2, -120 @@ -106336,8 +106184,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 72(sp) # 8-byte Folded Reload - vle32.v v8, (a0) + vle32.v v8, (s9) csrr a0, vlenb li a2, 31 slli a2, a2, 7 @@ -106347,8 +106194,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 80(sp) # 8-byte Folded Reload - vle32.v v8, (a0) + vle32.v v8, (s10) csrr a0, vlenb lui a2, 1 addiw a2, a2, -136 @@ -106358,10 +106204,8 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 88(sp) # 8-byte Folded Reload - vle32.v v24, (a0) - ld a0, 96(sp) # 8-byte Folded Reload - vle32.v v16, (a0) + vle32.v v24, (s11) + vle32.v v16, (ra) ld a0, 104(sp) # 8-byte Folded Reload vle32.v v8, (a0) csrr a0, vlenb @@ -106374,203 +106218,203 @@ add a0, a0, a2 vl8r.v v0, (a0) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 96 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 41 addiw a0, a0, 384 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 96 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 208 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 41 addiw a0, a0, 512 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 216 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 41 addiw a0, a0, 640 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 192 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 41 addiw a0, a0, 768 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 200 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 41 addiw a0, a0, 896 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 176 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 41 addiw a0, a0, 1024 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 184 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 41 addiw a0, a0, 1152 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 160 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 41 addiw a0, a0, 1280 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 168 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 41 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 144 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 41 addiw a0, a0, 1536 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 152 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 41 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 128 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 41 addiw a0, a0, 1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 136 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 41 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 112 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 42 addiw a0, a0, -2048 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 112 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 120 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 42 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) - ld t3, 248(sp) # 8-byte Folded Reload - add a5, a1, t3 + ld t3, 184(sp) # 8-byte Folded Reload + add a3, a1, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, 104 @@ -106580,26 +106424,25 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload - vse32.v v0, (a5) - flw fa5, 0(a4) + vse32.v v0, (a3) + flw fa5, 0(t5) lui a0, 10 addiw a0, a0, 256 - add a5, sp, a0 - ld t0, 160(sp) # 8-byte Folded Reload - add a0, a5, t0 + add a3, sp, a0 + ld a0, 120(sp) # 8-byte Folded Reload + add a0, a3, a0 sd a0, 104(sp) # 8-byte Folded Spill vse32.v v8, (a0) - ld ra, 168(sp) # 8-byte Folded Reload - add a0, a5, ra - sd a0, 96(sp) # 8-byte Folded Spill - vse32.v v16, (a0) - ld a1, 216(sp) # 8-byte Folded Reload - add a1, a5, a1 - sd a1, 88(sp) # 8-byte Folded Spill - vse32.v v24, (a1) - ld s11, 176(sp) # 8-byte Folded Reload - add s11, a5, s11 - sd t0, 8(sp) + ld ra, 128(sp) # 8-byte Folded Reload + add ra, a3, ra + vse32.v v16, (ra) + ld s11, 136(sp) # 8-byte Folded Reload + add s11, a3, s11 + vse32.v v24, (s11) + ld s10, 144(sp) # 8-byte Folded Reload + add s10, a3, s10 + sd ra, 8(sp) + sd s11, 0(sp) csrr a0, vlenb lui a1, 1 addiw a1, a1, -136 @@ -106609,8 +106452,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s11) - add s9, a5, s8 + vse32.v v8, (s10) + ld s9, 152(sp) # 8-byte Folded Reload + add s9, a3, s9 csrr a0, vlenb li a1, 31 slli a1, a1, 7 @@ -106621,8 +106465,8 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (s9) - ld s7, 128(sp) # 8-byte Folded Reload - add s7, a5, s7 + ld s8, 160(sp) # 8-byte Folded Reload + add s8, a3, s8 csrr a0, vlenb lui a1, 1 addiw a1, a1, -120 @@ -106632,9 +106476,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s7) - ld s8, 136(sp) # 8-byte Folded Reload - add s8, a5, s8 + vse32.v v8, (s8) + ld s7, 168(sp) # 8-byte Folded Reload + add s7, a3, s7 csrr a0, vlenb lui a1, 1 addiw a1, a1, -112 @@ -106644,9 +106488,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s8) - ld s5, 224(sp) # 8-byte Folded Reload - add s5, a5, s5 + vse32.v v8, (s7) + ld s6, 176(sp) # 8-byte Folded Reload + add s6, a3, s6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -104 @@ -106656,9 +106500,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s5) - ld s6, 184(sp) # 8-byte Folded Reload - add s4, a5, s6 + vse32.v v8, (s6) + ld s5, 208(sp) # 8-byte Folded Reload + add s5, a3, s5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -96 @@ -106668,9 +106512,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s4) - ld s3, 232(sp) # 8-byte Folded Reload - add s3, a5, s3 + vse32.v v8, (s5) + ld s4, 216(sp) # 8-byte Folded Reload + add s4, a3, s4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -88 @@ -106680,8 +106524,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s3) - add s2, a5, a6 + vse32.v v8, (s4) + ld s3, 224(sp) # 8-byte Folded Reload + add s3, a3, s3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -80 @@ -106691,9 +106536,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s2) - ld a6, 152(sp) # 8-byte Folded Reload - add t6, a5, a6 + vse32.v v8, (s3) + ld s2, 232(sp) # 8-byte Folded Reload + add s2, a3, s2 csrr a0, vlenb lui a1, 1 addiw a1, a1, -72 @@ -106703,8 +106548,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t6) - add t5, a5, a7 + vse32.v v8, (s2) + ld t6, 240(sp) # 8-byte Folded Reload + add t6, a3, t6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -64 @@ -106714,9 +106560,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t5) - ld a7, 200(sp) # 8-byte Folded Reload - add t4, a5, a7 + vse32.v v8, (t6) + ld t4, 248(sp) # 8-byte Folded Reload + add t4, a3, t4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -56 @@ -106727,8 +106573,8 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t4) - ld a3, 208(sp) # 8-byte Folded Reload - add a3, a5, a3 + ld a5, 200(sp) # 8-byte Folded Reload + add a5, a3, a5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -48 @@ -106738,8 +106584,8 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a3) - add t3, a5, t3 + vse32.v v8, (a5) + add t3, a3, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -40 @@ -106750,234 +106596,236 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t3) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -32 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 11 addiw a0, a0, -1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -32 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -24 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload li a0, 21 slli a0, a0, 11 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -24 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 10 addiw a0, a0, 1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -16 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 10 addiw a0, a0, 1792 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + slli a0, a0, 12 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 10 addiw a0, a0, 1664 add a0, sp, a0 - csrr a1, vlenb - slli a1, a1, 12 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 10 addiw a0, a0, 1536 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 10 addiw a0, a0, 1408 add t2, sp, a0 + vse32.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 16 + addiw a1, a1, 24 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 10 addiw a0, a0, 1280 add t1, sp, a0 + vse32.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 24 + addiw a1, a1, 32 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) lui a0, 10 addiw a0, a0, 1152 + add t0, sp, a0 + vse32.v v8, (t0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 40 + mul a0, a0, a1 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 32 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a0) + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 10 addiw a0, a0, 1024 + add a7, sp, a0 + vse32.v v8, (a7) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 48 + mul a0, a0, a1 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 40 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a0) + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 10 addiw a0, a0, 896 - add t2, sp, a0 + add a6, sp, a0 + vse32.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 48 + addiw a1, a1, 56 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 10 addiw a0, a0, 768 - add t1, sp, a0 + add a4, sp, a0 + vse32.v v8, (a4) + ld a0, 192(sp) # 8-byte Folded Reload + addi t5, a0, 340 + andi t5, t5, 1023 + slli t5, t5, 2 + add t5, a3, t5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 56 + addiw a1, a1, 64 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) - addi a4, s10, 340 - andi a4, a4, 1023 - slli a4, a4, 2 - add a4, a5, a4 lui a0, 10 addiw a0, a0, 640 add a2, sp, a0 + vse32.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 64 + addiw a1, a1, 72 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a2) lui a0, 10 addiw a0, a0, 512 add a1, sp, a0 + vse32.v v8, (a1) csrr a0, vlenb - lui t0, 1 - addiw t0, t0, 72 - mul a0, a0, t0 + lui s11, 1 + addiw s11, s11, 80 + mul a0, a0, s11 add a0, sp, a0 - lui t0, 63 - addiw t0, t0, -1632 - add a0, a0, t0 + lui s11, 63 + addiw s11, s11, -1632 + add a0, a0, s11 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) lui a0, 10 addiw a0, a0, 384 add a0, sp, a0 - csrr t0, vlenb - lui s10, 1 - addiw s10, s10, 80 - mul t0, t0, s10 - add t0, sp, t0 - lui s10, 63 - addiw s10, s10, -1632 - add t0, t0, s10 - vl8r.v v8, (t0) # Unknown-size Folded Reload vse32.v v8, (a0) - csrr s10, vlenb - lui t0, 1 - addiw t0, t0, 88 - mul s10, s10, t0 - add s10, sp, s10 - lui t0, 63 - addiw t0, t0, -1632 - add s10, s10, t0 - ld t0, 8(sp) - vl8r.v v8, (s10) # Unknown-size Folded Reload - vse32.v v8, (a5) - fsw fa5, 0(a4) - vle32.v v8, (a5) - csrr a4, vlenb - lui a5, 1 - addiw a5, a5, 88 - mul a4, a4, a5 - add a4, sp, a4 - lui a5, 63 - addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + csrr ra, vlenb + lui s11, 1 + addiw s11, s11, 88 + mul ra, ra, s11 + add ra, sp, ra + lui s11, 63 + addiw s11, s11, -1632 + add ra, ra, s11 + ld s11, 0(sp) + vl8r.v v8, (ra) # Unknown-size Folded Reload + ld ra, 8(sp) + vse32.v v8, (a3) + fsw fa5, 0(t5) + vle32.v v8, (a3) + csrr a3, vlenb + lui t5, 1 + addiw t5, t5, 88 + mul a3, a3, t5 + add a3, sp, a3 + lui t5, 63 + addiw t5, t5, -1632 + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vle32.v v8, (a0) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 80 - mul a0, a0, a4 + lui a3, 1 + addiw a3, a3, 80 + mul a0, a0, a3 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui a3, 63 + addiw a3, a3, -1632 + add a0, a0, a3 vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (a1) csrr a0, vlenb @@ -106999,15 +106847,15 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a4, 240(sp) # 8-byte Folded Reload - addi a4, a4, 21 - andi a4, a4, 1023 - slli a4, a4, 2 + ld t5, 112(sp) # 8-byte Folded Reload + addi t5, t5, 21 + andi t5, t5, 1023 + slli t5, t5, 2 lui a0, 40 addiw a0, a0, 256 add a1, sp, a0 - add a4, a1, a4 - vle32.v v8, (t1) + add t5, a1, t5 + vle32.v v8, (a4) csrr a0, vlenb lui a2, 1 addiw a2, a2, 56 @@ -107017,7 +106865,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t2) + vle32.v v8, (a6) csrr a0, vlenb lui a2, 1 addiw a2, a2, 48 @@ -107027,10 +106875,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 10 - addiw a0, a0, 1024 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (a7) csrr a0, vlenb lui a2, 1 addiw a2, a2, 40 @@ -107040,10 +106885,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 10 - addiw a0, a0, 1152 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t0) csrr a0, vlenb lui a2, 1 addiw a2, a2, 32 @@ -107053,10 +106895,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 10 - addiw a0, a0, 1280 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t1) csrr a0, vlenb lui a2, 1 addiw a2, a2, 24 @@ -107066,10 +106905,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 10 - addiw a0, a0, 1408 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t2) csrr a0, vlenb lui a2, 1 addiw a2, a2, 16 @@ -107165,7 +107001,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a3) + vle32.v v8, (a5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -48 @@ -107185,7 +107021,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t5) + vle32.v v8, (t6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -64 @@ -107195,7 +107031,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t6) + vle32.v v8, (s2) csrr a0, vlenb lui a2, 1 addiw a2, a2, -72 @@ -107205,7 +107041,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s2) + vle32.v v8, (s3) csrr a0, vlenb lui a2, 1 addiw a2, a2, -80 @@ -107215,7 +107051,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s3) + vle32.v v8, (s4) csrr a0, vlenb lui a2, 1 addiw a2, a2, -88 @@ -107225,7 +107061,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s4) + vle32.v v8, (s5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -96 @@ -107235,7 +107071,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s5) + vle32.v v8, (s6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -104 @@ -107245,7 +107081,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s8) + vle32.v v8, (s7) csrr a0, vlenb lui a2, 1 addiw a2, a2, -112 @@ -107255,7 +107091,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s7) + vle32.v v8, (s8) csrr a0, vlenb lui a2, 1 addiw a2, a2, -120 @@ -107275,7 +107111,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s11) + vle32.v v8, (s10) csrr a0, vlenb lui a2, 1 addiw a2, a2, -136 @@ -107285,10 +107121,8 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 88(sp) # 8-byte Folded Reload - vle32.v v24, (a0) - ld a0, 96(sp) # 8-byte Folded Reload - vle32.v v16, (a0) + vle32.v v24, (s11) + vle32.v v16, (ra) ld a0, 104(sp) # 8-byte Folded Reload vle32.v v8, (a0) csrr a0, vlenb @@ -107301,203 +107135,203 @@ add a0, a0, a2 vl8r.v v0, (a0) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 96 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 40 addiw a0, a0, 384 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 96 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 208 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 40 addiw a0, a0, 512 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 216 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 40 addiw a0, a0, 640 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 192 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 40 addiw a0, a0, 768 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 200 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 40 addiw a0, a0, 896 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 176 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 40 addiw a0, a0, 1024 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 184 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 40 addiw a0, a0, 1152 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 160 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 40 addiw a0, a0, 1280 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 168 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 40 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 144 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 40 addiw a0, a0, 1536 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 152 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 40 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 128 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 40 addiw a0, a0, 1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 136 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 40 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 112 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 41 addiw a0, a0, -2048 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 112 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 120 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 41 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) - ld t3, 248(sp) # 8-byte Folded Reload - add a5, a1, t3 + ld t3, 184(sp) # 8-byte Folded Reload + add a3, a1, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, 104 @@ -107507,51 +107341,49 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload - vse32.v v0, (a5) - flw fa5, 0(a4) + vse32.v v0, (a3) + flw fa5, 0(t5) lui a0, 9 addiw a0, a0, 256 - add a5, sp, a0 - add t0, a5, t0 - sd t0, 104(sp) # 8-byte Folded Spill - vse32.v v8, (t0) - add ra, a5, ra - sd ra, 96(sp) # 8-byte Folded Spill - vse32.v v16, (ra) - ld s11, 216(sp) # 8-byte Folded Reload - add a0, a5, s11 - sd a0, 88(sp) # 8-byte Folded Spill - vse32.v v24, (a0) - ld s9, 176(sp) # 8-byte Folded Reload - add a0, a5, s9 - sd a0, 80(sp) # 8-byte Folded Spill - sd s11, 8(sp) - sd s9, 0(sp) - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -136 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + add a3, sp, a0 + ld a0, 120(sp) # 8-byte Folded Reload + add a0, a3, a0 + sd a0, 104(sp) # 8-byte Folded Spill vse32.v v8, (a0) - ld a1, 120(sp) # 8-byte Folded Reload - add a1, a5, a1 - sd a1, 72(sp) # 8-byte Folded Spill + ld ra, 128(sp) # 8-byte Folded Reload + add ra, a3, ra + vse32.v v16, (ra) + ld s11, 136(sp) # 8-byte Folded Reload + add s11, a3, s11 + vse32.v v24, (s11) + ld s10, 144(sp) # 8-byte Folded Reload + add s10, a3, s10 + sd ra, 8(sp) + sd s11, 0(sp) csrr a0, vlenb - li a2, 31 - slli a2, a2, 7 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 63 - addiw a2, a2, -1632 - add a0, a0, a2 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) - ld s8, 128(sp) # 8-byte Folded Reload - add ra, a5, s8 + vse32.v v8, (s10) + ld s9, 152(sp) # 8-byte Folded Reload + add s9, a3, s9 + csrr a0, vlenb + li a1, 31 + slli a1, a1, 7 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vse32.v v8, (s9) + ld s8, 160(sp) # 8-byte Folded Reload + add s8, a3, s8 csrr a0, vlenb lui a1, 1 addiw a1, a1, -120 @@ -107561,9 +107393,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (ra) - ld s10, 136(sp) # 8-byte Folded Reload - add s10, a5, s10 + vse32.v v8, (s8) + ld s7, 168(sp) # 8-byte Folded Reload + add s7, a3, s7 csrr a0, vlenb lui a1, 1 addiw a1, a1, -112 @@ -107573,9 +107405,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s10) - ld t0, 224(sp) # 8-byte Folded Reload - add s5, a5, t0 + vse32.v v8, (s7) + ld s6, 176(sp) # 8-byte Folded Reload + add s6, a3, s6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -104 @@ -107585,8 +107417,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s5) - add s4, a5, s6 + vse32.v v8, (s6) + ld s5, 208(sp) # 8-byte Folded Reload + add s5, a3, s5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -96 @@ -107596,9 +107429,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s4) - ld s7, 232(sp) # 8-byte Folded Reload - add s3, a5, s7 + vse32.v v8, (s5) + ld s4, 216(sp) # 8-byte Folded Reload + add s4, a3, s4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -88 @@ -107608,9 +107441,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s3) - ld s2, 144(sp) # 8-byte Folded Reload - add s2, a5, s2 + vse32.v v8, (s4) + ld s3, 224(sp) # 8-byte Folded Reload + add s3, a3, s3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -80 @@ -107620,8 +107453,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s2) - add t6, a5, a6 + vse32.v v8, (s3) + ld s2, 232(sp) # 8-byte Folded Reload + add s2, a3, s2 csrr a0, vlenb lui a1, 1 addiw a1, a1, -72 @@ -107631,9 +107465,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t6) - ld a6, 192(sp) # 8-byte Folded Reload - add t5, a5, a6 + vse32.v v8, (s2) + ld t6, 240(sp) # 8-byte Folded Reload + add t6, a3, t6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -64 @@ -107643,8 +107477,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t5) - add t4, a5, a7 + vse32.v v8, (t6) + ld t4, 248(sp) # 8-byte Folded Reload + add t4, a3, t4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -56 @@ -107655,8 +107490,8 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t4) - ld s6, 208(sp) # 8-byte Folded Reload - add a3, a5, s6 + ld a5, 200(sp) # 8-byte Folded Reload + add a5, a3, a5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -48 @@ -107666,8 +107501,8 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a3) - add t3, a5, t3 + vse32.v v8, (a5) + add t3, a3, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -40 @@ -107678,236 +107513,236 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t3) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -32 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 10 addiw a0, a0, -1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -32 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -24 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload li a0, 19 slli a0, a0, 11 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -24 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 9 addiw a0, a0, 1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -16 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 9 addiw a0, a0, 1792 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + slli a0, a0, 12 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 9 addiw a0, a0, 1664 add a0, sp, a0 - csrr a1, vlenb - slli a1, a1, 12 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 9 addiw a0, a0, 1536 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 9 addiw a0, a0, 1408 add t2, sp, a0 + vse32.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 16 + addiw a1, a1, 24 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 9 addiw a0, a0, 1280 add t1, sp, a0 + vse32.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 24 + addiw a1, a1, 32 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) lui a0, 9 addiw a0, a0, 1152 + add t0, sp, a0 + vse32.v v8, (t0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 40 + mul a0, a0, a1 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 32 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a0) + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 9 addiw a0, a0, 1024 - add t2, sp, a0 + add a7, sp, a0 + vse32.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 40 + addiw a1, a1, 48 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 9 addiw a0, a0, 896 - add t1, sp, a0 + add a6, sp, a0 + vse32.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 48 + addiw a1, a1, 56 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) lui a0, 9 addiw a0, a0, 768 - add a7, sp, a0 + add a4, sp, a0 + vse32.v v8, (a4) + ld a0, 192(sp) # 8-byte Folded Reload + addi t5, a0, 357 + andi t5, t5, 1023 + slli t5, t5, 2 + add t5, a3, t5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 56 + addiw a1, a1, 64 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a7) - ld a0, 112(sp) # 8-byte Folded Reload - addi a4, a0, 357 - andi a4, a4, 1023 - slli a4, a4, 2 - add a4, a5, a4 lui a0, 9 addiw a0, a0, 640 add a2, sp, a0 + vse32.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 64 + addiw a1, a1, 72 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a2) lui a0, 9 addiw a0, a0, 512 add a1, sp, a0 + vse32.v v8, (a1) csrr a0, vlenb - lui s9, 1 - addiw s9, s9, 72 - mul a0, a0, s9 + lui s11, 1 + addiw s11, s11, 80 + mul a0, a0, s11 add a0, sp, a0 - lui s9, 63 - addiw s9, s9, -1632 - add a0, a0, s9 + lui s11, 63 + addiw s11, s11, -1632 + add a0, a0, s11 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) lui a0, 9 addiw a0, a0, 384 add a0, sp, a0 - csrr s9, vlenb + vse32.v v8, (a0) + csrr ra, vlenb lui s11, 1 - addiw s11, s11, 80 - mul s9, s9, s11 - add s9, sp, s9 + addiw s11, s11, 88 + mul ra, ra, s11 + add ra, sp, ra lui s11, 63 addiw s11, s11, -1632 - add s9, s9, s11 - vl8r.v v8, (s9) # Unknown-size Folded Reload - vse32.v v8, (a0) - csrr s11, vlenb - lui s9, 1 - addiw s9, s9, 88 - mul s11, s11, s9 - add s11, sp, s11 - lui s9, 63 - addiw s9, s9, -1632 - add s11, s11, s9 - ld s9, 0(sp) - vl8r.v v8, (s11) # Unknown-size Folded Reload - ld s11, 8(sp) - vse32.v v8, (a5) - fsw fa5, 0(a4) - vle32.v v8, (a5) - csrr a4, vlenb - lui a5, 1 - addiw a5, a5, 88 - mul a4, a4, a5 - add a4, sp, a4 - lui a5, 63 - addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add ra, ra, s11 + ld s11, 0(sp) + vl8r.v v8, (ra) # Unknown-size Folded Reload + ld ra, 8(sp) + vse32.v v8, (a3) + fsw fa5, 0(t5) + vle32.v v8, (a3) + csrr a3, vlenb + lui t5, 1 + addiw t5, t5, 88 + mul a3, a3, t5 + add a3, sp, a3 + lui t5, 63 + addiw t5, t5, -1632 + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vle32.v v8, (a0) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 80 - mul a0, a0, a4 + lui a3, 1 + addiw a3, a3, 80 + mul a0, a0, a3 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui a3, 63 + addiw a3, a3, -1632 + add a0, a0, a3 vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (a1) csrr a0, vlenb @@ -107929,15 +107764,15 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a4, 240(sp) # 8-byte Folded Reload - addi a4, a4, 22 - andi a4, a4, 1023 - slli a4, a4, 2 + ld t5, 112(sp) # 8-byte Folded Reload + addi t5, t5, 22 + andi t5, t5, 1023 + slli t5, t5, 2 lui a0, 39 addiw a0, a0, 256 add a1, sp, a0 - add a4, a1, a4 - vle32.v v8, (a7) + add t5, a1, t5 + vle32.v v8, (a4) csrr a0, vlenb lui a2, 1 addiw a2, a2, 56 @@ -107947,7 +107782,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t1) + vle32.v v8, (a6) csrr a0, vlenb lui a2, 1 addiw a2, a2, 48 @@ -107957,7 +107792,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t2) + vle32.v v8, (a7) csrr a0, vlenb lui a2, 1 addiw a2, a2, 40 @@ -107967,10 +107802,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 9 - addiw a0, a0, 1152 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t0) csrr a0, vlenb lui a2, 1 addiw a2, a2, 32 @@ -107980,10 +107812,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 9 - addiw a0, a0, 1280 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t1) csrr a0, vlenb lui a2, 1 addiw a2, a2, 24 @@ -107993,10 +107822,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 9 - addiw a0, a0, 1408 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t2) csrr a0, vlenb lui a2, 1 addiw a2, a2, 16 @@ -108092,7 +107918,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a3) + vle32.v v8, (a5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -48 @@ -108112,7 +107938,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t5) + vle32.v v8, (t6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -64 @@ -108122,7 +107948,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t6) + vle32.v v8, (s2) csrr a0, vlenb lui a2, 1 addiw a2, a2, -72 @@ -108132,7 +107958,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s2) + vle32.v v8, (s3) csrr a0, vlenb lui a2, 1 addiw a2, a2, -80 @@ -108142,7 +107968,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s3) + vle32.v v8, (s4) csrr a0, vlenb lui a2, 1 addiw a2, a2, -88 @@ -108152,7 +107978,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s4) + vle32.v v8, (s5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -96 @@ -108162,7 +107988,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s5) + vle32.v v8, (s6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -104 @@ -108172,7 +107998,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s10) + vle32.v v8, (s7) csrr a0, vlenb lui a2, 1 addiw a2, a2, -112 @@ -108182,7 +108008,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (ra) + vle32.v v8, (s8) csrr a0, vlenb lui a2, 1 addiw a2, a2, -120 @@ -108192,8 +108018,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 72(sp) # 8-byte Folded Reload - vle32.v v8, (a0) + vle32.v v8, (s9) csrr a0, vlenb li a2, 31 slli a2, a2, 7 @@ -108203,8 +108028,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 80(sp) # 8-byte Folded Reload - vle32.v v8, (a0) + vle32.v v8, (s10) csrr a0, vlenb lui a2, 1 addiw a2, a2, -136 @@ -108214,10 +108038,8 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 88(sp) # 8-byte Folded Reload - vle32.v v24, (a0) - ld a0, 96(sp) # 8-byte Folded Reload - vle32.v v16, (a0) + vle32.v v24, (s11) + vle32.v v16, (ra) ld a0, 104(sp) # 8-byte Folded Reload vle32.v v8, (a0) csrr a0, vlenb @@ -108230,203 +108052,203 @@ add a0, a0, a2 vl8r.v v0, (a0) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 96 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 39 addiw a0, a0, 384 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 96 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 208 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 39 addiw a0, a0, 512 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 216 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 39 addiw a0, a0, 640 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 192 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 39 addiw a0, a0, 768 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 200 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 39 addiw a0, a0, 896 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 176 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 39 addiw a0, a0, 1024 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 184 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 39 addiw a0, a0, 1152 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 160 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 39 addiw a0, a0, 1280 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 168 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 39 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 144 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 39 addiw a0, a0, 1536 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 152 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 39 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 128 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 39 addiw a0, a0, 1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 136 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 39 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 112 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 40 addiw a0, a0, -2048 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 112 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 120 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 40 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) - ld t3, 248(sp) # 8-byte Folded Reload - add a5, a1, t3 + ld t3, 184(sp) # 8-byte Folded Reload + add a3, a1, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, 104 @@ -108436,24 +108258,25 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload - vse32.v v0, (a5) - flw fa5, 0(a4) + vse32.v v0, (a3) + flw fa5, 0(t5) lui a0, 8 addiw a0, a0, 256 - add a5, sp, a0 - ld a1, 160(sp) # 8-byte Folded Reload - add a1, a5, a1 - sd a1, 104(sp) # 8-byte Folded Spill - vse32.v v8, (a1) - ld a1, 168(sp) # 8-byte Folded Reload - add a1, a5, a1 - sd a1, 96(sp) # 8-byte Folded Spill - vse32.v v16, (a1) - add s11, a5, s11 - sd s11, 88(sp) # 8-byte Folded Spill + add a3, sp, a0 + ld a0, 120(sp) # 8-byte Folded Reload + add a0, a3, a0 + sd a0, 104(sp) # 8-byte Folded Spill + vse32.v v8, (a0) + ld ra, 128(sp) # 8-byte Folded Reload + add ra, a3, ra + vse32.v v16, (ra) + ld s11, 136(sp) # 8-byte Folded Reload + add s11, a3, s11 vse32.v v24, (s11) - add s9, a5, s9 - sd s9, 80(sp) # 8-byte Folded Spill + ld s10, 144(sp) # 8-byte Folded Reload + add s10, a3, s10 + sd ra, 8(sp) + sd s11, 0(sp) csrr a0, vlenb lui a1, 1 addiw a1, a1, -136 @@ -108463,9 +108286,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s9) - ld s9, 120(sp) # 8-byte Folded Reload - add s9, a5, s9 + vse32.v v8, (s10) + ld s9, 152(sp) # 8-byte Folded Reload + add s9, a3, s9 csrr a0, vlenb li a1, 31 slli a1, a1, 7 @@ -108476,8 +108299,8 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (s9) - add s11, a5, s8 - sd s9, 8(sp) + ld s8, 160(sp) # 8-byte Folded Reload + add s8, a3, s8 csrr a0, vlenb lui a1, 1 addiw a1, a1, -120 @@ -108487,10 +108310,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s11) - ld s10, 136(sp) # 8-byte Folded Reload - add s8, a5, s10 - sd s11, 0(sp) + vse32.v v8, (s8) + ld s7, 168(sp) # 8-byte Folded Reload + add s7, a3, s7 csrr a0, vlenb lui a1, 1 addiw a1, a1, -112 @@ -108500,8 +108322,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s8) - add s5, a5, t0 + vse32.v v8, (s7) + ld s6, 176(sp) # 8-byte Folded Reload + add s6, a3, s6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -104 @@ -108511,9 +108334,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s5) - ld t0, 184(sp) # 8-byte Folded Reload - add s4, a5, t0 + vse32.v v8, (s6) + ld s5, 208(sp) # 8-byte Folded Reload + add s5, a3, s5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -96 @@ -108523,8 +108346,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s4) - add s3, a5, s7 + vse32.v v8, (s5) + ld s4, 216(sp) # 8-byte Folded Reload + add s4, a3, s4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -88 @@ -108534,9 +108358,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s3) - ld s7, 144(sp) # 8-byte Folded Reload - add s2, a5, s7 + vse32.v v8, (s4) + ld s3, 224(sp) # 8-byte Folded Reload + add s3, a3, s3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -80 @@ -108546,9 +108370,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s2) - ld t6, 152(sp) # 8-byte Folded Reload - add t6, a5, t6 + vse32.v v8, (s3) + ld s2, 232(sp) # 8-byte Folded Reload + add s2, a3, s2 csrr a0, vlenb lui a1, 1 addiw a1, a1, -72 @@ -108558,8 +108382,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t6) - add t5, a5, a6 + vse32.v v8, (s2) + ld t6, 240(sp) # 8-byte Folded Reload + add t6, a3, t6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -64 @@ -108569,9 +108394,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t5) - ld a7, 200(sp) # 8-byte Folded Reload - add t4, a5, a7 + vse32.v v8, (t6) + ld t4, 248(sp) # 8-byte Folded Reload + add t4, a3, t4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -56 @@ -108582,7 +108407,8 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t4) - add a3, a5, s6 + ld a5, 200(sp) # 8-byte Folded Reload + add a5, a3, a5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -48 @@ -108592,8 +108418,8 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a3) - add t3, a5, t3 + vse32.v v8, (a5) + add t3, a3, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -40 @@ -108604,236 +108430,236 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t3) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -32 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 9 addiw a0, a0, -1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -32 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -24 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload li a0, 17 slli a0, a0, 11 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -24 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 8 addiw a0, a0, 1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -16 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 8 addiw a0, a0, 1792 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + slli a0, a0, 12 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 8 addiw a0, a0, 1664 add a0, sp, a0 - csrr a1, vlenb - slli a1, a1, 12 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 8 addiw a0, a0, 1536 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 8 addiw a0, a0, 1408 add t2, sp, a0 + vse32.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 16 + addiw a1, a1, 24 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 8 addiw a0, a0, 1280 add t1, sp, a0 + vse32.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 24 + addiw a1, a1, 32 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) lui a0, 8 addiw a0, a0, 1152 - add s6, sp, a0 + add t0, sp, a0 + vse32.v v8, (t0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 32 + addiw a1, a1, 40 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s6) lui a0, 8 addiw a0, a0, 1024 - add t2, sp, a0 + add a7, sp, a0 + vse32.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 40 + addiw a1, a1, 48 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 8 addiw a0, a0, 896 - add t1, sp, a0 + add a6, sp, a0 + vse32.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 48 + addiw a1, a1, 56 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) lui a0, 8 addiw a0, a0, 768 - add a6, sp, a0 + add a4, sp, a0 + vse32.v v8, (a4) + ld a0, 192(sp) # 8-byte Folded Reload + addi t5, a0, 374 + andi t5, t5, 1023 + slli t5, t5, 2 + add t5, a3, t5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 56 + addiw a1, a1, 64 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a6) - ld ra, 112(sp) # 8-byte Folded Reload - addi a4, ra, 374 - andi a4, a4, 1023 - slli a4, a4, 2 - add a4, a5, a4 lui a0, 8 addiw a0, a0, 640 add a2, sp, a0 + vse32.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 64 + addiw a1, a1, 72 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a2) lui a0, 8 addiw a0, a0, 512 add a1, sp, a0 + vse32.v v8, (a1) csrr a0, vlenb - lui s9, 1 - addiw s9, s9, 72 - mul a0, a0, s9 + lui s11, 1 + addiw s11, s11, 80 + mul a0, a0, s11 add a0, sp, a0 - lui s9, 63 - addiw s9, s9, -1632 - add a0, a0, s9 + lui s11, 63 + addiw s11, s11, -1632 + add a0, a0, s11 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) lui a0, 8 addiw a0, a0, 384 add a0, sp, a0 - csrr s9, vlenb - lui s11, 1 - addiw s11, s11, 80 - mul s9, s9, s11 - add s9, sp, s9 - lui s11, 63 - addiw s11, s11, -1632 - add s9, s9, s11 - vl8r.v v8, (s9) # Unknown-size Folded Reload vse32.v v8, (a0) - csrr s9, vlenb + csrr ra, vlenb lui s11, 1 addiw s11, s11, 88 - mul s9, s9, s11 - add s9, sp, s9 + mul ra, ra, s11 + add ra, sp, ra lui s11, 63 addiw s11, s11, -1632 - add s9, s9, s11 + add ra, ra, s11 ld s11, 0(sp) - vl8r.v v8, (s9) # Unknown-size Folded Reload - ld s9, 8(sp) - vse32.v v8, (a5) - fsw fa5, 0(a4) - vle32.v v8, (a5) - csrr a4, vlenb - lui a5, 1 - addiw a5, a5, 88 - mul a4, a4, a5 - add a4, sp, a4 - lui a5, 63 - addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + vl8r.v v8, (ra) # Unknown-size Folded Reload + ld ra, 8(sp) + vse32.v v8, (a3) + fsw fa5, 0(t5) + vle32.v v8, (a3) + csrr a3, vlenb + lui t5, 1 + addiw t5, t5, 88 + mul a3, a3, t5 + add a3, sp, a3 + lui t5, 63 + addiw t5, t5, -1632 + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vle32.v v8, (a0) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 80 - mul a0, a0, a4 + lui a3, 1 + addiw a3, a3, 80 + mul a0, a0, a3 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui a3, 63 + addiw a3, a3, -1632 + add a0, a0, a3 vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (a1) csrr a0, vlenb @@ -108855,15 +108681,15 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a4, 240(sp) # 8-byte Folded Reload - addi a4, a4, 23 - andi a4, a4, 1023 - slli a4, a4, 2 + ld t5, 112(sp) # 8-byte Folded Reload + addi t5, t5, 23 + andi t5, t5, 1023 + slli t5, t5, 2 lui a0, 38 addiw a0, a0, 256 add a1, sp, a0 - add a4, a1, a4 - vle32.v v8, (a6) + add t5, a1, t5 + vle32.v v8, (a4) csrr a0, vlenb lui a2, 1 addiw a2, a2, 56 @@ -108873,7 +108699,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t1) + vle32.v v8, (a6) csrr a0, vlenb lui a2, 1 addiw a2, a2, 48 @@ -108883,7 +108709,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t2) + vle32.v v8, (a7) csrr a0, vlenb lui a2, 1 addiw a2, a2, 40 @@ -108893,7 +108719,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s6) + vle32.v v8, (t0) csrr a0, vlenb lui a2, 1 addiw a2, a2, 32 @@ -108903,10 +108729,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 8 - addiw a0, a0, 1280 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t1) csrr a0, vlenb lui a2, 1 addiw a2, a2, 24 @@ -108916,10 +108739,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 8 - addiw a0, a0, 1408 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t2) csrr a0, vlenb lui a2, 1 addiw a2, a2, 16 @@ -109015,7 +108835,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a3) + vle32.v v8, (a5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -48 @@ -109035,7 +108855,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t5) + vle32.v v8, (t6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -64 @@ -109045,7 +108865,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t6) + vle32.v v8, (s2) csrr a0, vlenb lui a2, 1 addiw a2, a2, -72 @@ -109055,7 +108875,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s2) + vle32.v v8, (s3) csrr a0, vlenb lui a2, 1 addiw a2, a2, -80 @@ -109065,7 +108885,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s3) + vle32.v v8, (s4) csrr a0, vlenb lui a2, 1 addiw a2, a2, -88 @@ -109075,7 +108895,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s4) + vle32.v v8, (s5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -96 @@ -109085,7 +108905,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s5) + vle32.v v8, (s6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -104 @@ -109095,7 +108915,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s8) + vle32.v v8, (s7) csrr a0, vlenb lui a2, 1 addiw a2, a2, -112 @@ -109105,7 +108925,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s11) + vle32.v v8, (s8) csrr a0, vlenb lui a2, 1 addiw a2, a2, -120 @@ -109125,8 +108945,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 80(sp) # 8-byte Folded Reload - vle32.v v8, (a0) + vle32.v v8, (s10) csrr a0, vlenb lui a2, 1 addiw a2, a2, -136 @@ -109136,10 +108955,8 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 88(sp) # 8-byte Folded Reload - vle32.v v24, (a0) - ld a0, 96(sp) # 8-byte Folded Reload - vle32.v v16, (a0) + vle32.v v24, (s11) + vle32.v v16, (ra) ld a0, 104(sp) # 8-byte Folded Reload vle32.v v8, (a0) csrr a0, vlenb @@ -109152,203 +108969,203 @@ add a0, a0, a2 vl8r.v v0, (a0) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 96 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 38 addiw a0, a0, 384 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 96 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 208 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 38 addiw a0, a0, 512 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 216 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 38 addiw a0, a0, 640 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 192 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 38 addiw a0, a0, 768 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 200 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 38 addiw a0, a0, 896 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 176 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 38 addiw a0, a0, 1024 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 184 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 38 addiw a0, a0, 1152 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 160 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 38 addiw a0, a0, 1280 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 168 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 38 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 144 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 38 addiw a0, a0, 1536 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 152 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 38 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 128 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 38 addiw a0, a0, 1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 136 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 38 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 112 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 39 addiw a0, a0, -2048 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 112 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 120 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 39 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) - ld t3, 248(sp) # 8-byte Folded Reload - add a5, a1, t3 + ld t3, 184(sp) # 8-byte Folded Reload + add a3, a1, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, 104 @@ -109358,64 +109175,61 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload - vse32.v v0, (a5) - flw fa5, 0(a4) + vse32.v v0, (a3) + flw fa5, 0(t5) lui a0, 7 addiw a0, a0, 256 - add a5, sp, a0 - ld a1, 160(sp) # 8-byte Folded Reload - add a1, a5, a1 - sd a1, 104(sp) # 8-byte Folded Spill - vse32.v v8, (a1) - ld s11, 168(sp) # 8-byte Folded Reload - add a1, a5, s11 - sd a1, 96(sp) # 8-byte Folded Spill - vse32.v v16, (a1) - ld a1, 216(sp) # 8-byte Folded Reload - add a1, a5, a1 - sd a1, 88(sp) # 8-byte Folded Spill - vse32.v v24, (a1) - ld s9, 176(sp) # 8-byte Folded Reload - add a1, a5, s9 - sd a1, 80(sp) # 8-byte Folded Spill - sd s11, 8(sp) + add a3, sp, a0 + ld a0, 120(sp) # 8-byte Folded Reload + add a0, a3, a0 + sd a0, 104(sp) # 8-byte Folded Spill + vse32.v v8, (a0) + ld ra, 128(sp) # 8-byte Folded Reload + add ra, a3, ra + vse32.v v16, (ra) + ld s11, 136(sp) # 8-byte Folded Reload + add s11, a3, s11 + vse32.v v24, (s11) + ld s10, 144(sp) # 8-byte Folded Reload + add s10, a3, s10 + sd ra, 8(sp) + sd s11, 0(sp) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -136 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 63 - addiw a2, a2, -1632 - add a0, a0, a2 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) - ld s8, 120(sp) # 8-byte Folded Reload - add a1, a5, s8 - sd a1, 72(sp) # 8-byte Folded Spill + vse32.v v8, (s10) + ld s9, 152(sp) # 8-byte Folded Reload + add s9, a3, s9 csrr a0, vlenb - li a2, 31 - slli a2, a2, 7 - mul a0, a0, a2 + li a1, 31 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 63 - addiw a2, a2, -1632 - add a0, a0, a2 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) - ld a1, 128(sp) # 8-byte Folded Reload - add a1, a5, a1 - sd a1, 64(sp) # 8-byte Folded Spill + vse32.v v8, (s9) + ld s8, 160(sp) # 8-byte Folded Reload + add s8, a3, s8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -120 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -120 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 63 - addiw a2, a2, -1632 - add a0, a0, a2 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) - add s6, a5, s10 + vse32.v v8, (s8) + ld s7, 168(sp) # 8-byte Folded Reload + add s7, a3, s7 csrr a0, vlenb lui a1, 1 addiw a1, a1, -112 @@ -109425,9 +109239,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s6) - ld a6, 224(sp) # 8-byte Folded Reload - add s5, a5, a6 + vse32.v v8, (s7) + ld s6, 176(sp) # 8-byte Folded Reload + add s6, a3, s6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -104 @@ -109437,8 +109251,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s5) - add s4, a5, t0 + vse32.v v8, (s6) + ld s5, 208(sp) # 8-byte Folded Reload + add s5, a3, s5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -96 @@ -109448,9 +109263,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s4) - ld t0, 232(sp) # 8-byte Folded Reload - add s3, a5, t0 + vse32.v v8, (s5) + ld s4, 216(sp) # 8-byte Folded Reload + add s4, a3, s4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -88 @@ -109460,8 +109275,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s3) - add s2, a5, s7 + vse32.v v8, (s4) + ld s3, 224(sp) # 8-byte Folded Reload + add s3, a3, s3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -80 @@ -109471,9 +109287,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s2) - ld t6, 152(sp) # 8-byte Folded Reload - add t6, a5, t6 + vse32.v v8, (s3) + ld s2, 232(sp) # 8-byte Folded Reload + add s2, a3, s2 csrr a0, vlenb lui a1, 1 addiw a1, a1, -72 @@ -109483,9 +109299,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t6) - ld t5, 192(sp) # 8-byte Folded Reload - add t5, a5, t5 + vse32.v v8, (s2) + ld t6, 240(sp) # 8-byte Folded Reload + add t6, a3, t6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -64 @@ -109495,8 +109311,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t5) - add t4, a5, a7 + vse32.v v8, (t6) + ld t4, 248(sp) # 8-byte Folded Reload + add t4, a3, t4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -56 @@ -109507,8 +109324,8 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t4) - ld a3, 208(sp) # 8-byte Folded Reload - add a3, a5, a3 + ld a5, 200(sp) # 8-byte Folded Reload + add a5, a3, a5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -48 @@ -109518,8 +109335,8 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a3) - add t3, a5, t3 + vse32.v v8, (a5) + add t3, a3, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -40 @@ -109530,202 +109347,203 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t3) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -32 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 8 addiw a0, a0, -1920 - add s10, sp, a0 + add a0, sp, a0 + vse32.v v8, (a0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -32 + addiw a1, a1, -24 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s10) li a0, 15 slli a0, a0, 11 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -24 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 7 addiw a0, a0, 1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -16 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 7 addiw a0, a0, 1792 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + slli a0, a0, 12 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 7 addiw a0, a0, 1664 add a0, sp, a0 - csrr a1, vlenb - slli a1, a1, 12 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 7 addiw a0, a0, 1536 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 7 addiw a0, a0, 1408 add t2, sp, a0 + vse32.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 16 + addiw a1, a1, 24 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 7 addiw a0, a0, 1280 add t1, sp, a0 + vse32.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 24 + addiw a1, a1, 32 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) lui a0, 7 addiw a0, a0, 1152 - add s7, sp, a0 + add t0, sp, a0 + vse32.v v8, (t0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 32 + addiw a1, a1, 40 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s7) li a0, 29 slli a0, a0, 10 - add t2, sp, a0 + add a7, sp, a0 + vse32.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 40 + addiw a1, a1, 48 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 7 addiw a0, a0, 896 - add t1, sp, a0 + add a6, sp, a0 + vse32.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 48 + addiw a1, a1, 56 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) lui a0, 7 addiw a0, a0, 768 - add a7, sp, a0 + add a4, sp, a0 + vse32.v v8, (a4) + ld a0, 192(sp) # 8-byte Folded Reload + addi t5, a0, 391 + andi t5, t5, 1023 + slli t5, t5, 2 + add t5, a3, t5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 56 + addiw a1, a1, 64 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a7) - addi a4, ra, 391 - andi a4, a4, 1023 - slli a4, a4, 2 - add a4, a5, a4 lui a0, 7 addiw a0, a0, 640 add a2, sp, a0 + vse32.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 64 + addiw a1, a1, 72 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a2) lui a0, 7 addiw a0, a0, 512 add a1, sp, a0 + vse32.v v8, (a1) csrr a0, vlenb lui s11, 1 - addiw s11, s11, 72 + addiw s11, s11, 80 mul a0, a0, s11 add a0, sp, a0 lui s11, 63 addiw s11, s11, -1632 add a0, a0, s11 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) lui a0, 7 addiw a0, a0, 384 add a0, sp, a0 - csrr s11, vlenb - lui ra, 1 - addiw ra, ra, 80 - mul s11, s11, ra - add s11, sp, s11 - lui ra, 63 - addiw ra, ra, -1632 - add s11, s11, ra - vl8r.v v8, (s11) # Unknown-size Folded Reload vse32.v v8, (a0) csrr ra, vlenb lui s11, 1 @@ -109735,29 +109553,30 @@ lui s11, 63 addiw s11, s11, -1632 add ra, ra, s11 - ld s11, 8(sp) + ld s11, 0(sp) vl8r.v v8, (ra) # Unknown-size Folded Reload - vse32.v v8, (a5) - fsw fa5, 0(a4) - vle32.v v8, (a5) - csrr a4, vlenb - lui a5, 1 - addiw a5, a5, 88 - mul a4, a4, a5 - add a4, sp, a4 - lui a5, 63 - addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + ld ra, 8(sp) + vse32.v v8, (a3) + fsw fa5, 0(t5) + vle32.v v8, (a3) + csrr a3, vlenb + lui t5, 1 + addiw t5, t5, 88 + mul a3, a3, t5 + add a3, sp, a3 + lui t5, 63 + addiw t5, t5, -1632 + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vle32.v v8, (a0) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 80 - mul a0, a0, a4 + lui a3, 1 + addiw a3, a3, 80 + mul a0, a0, a3 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui a3, 63 + addiw a3, a3, -1632 + add a0, a0, a3 vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (a1) csrr a0, vlenb @@ -109779,16 +109598,15 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld ra, 240(sp) # 8-byte Folded Reload - addi a4, ra, 24 - andi a4, a4, 1023 - slli a4, a4, 2 - sd ra, 8(sp) + ld t5, 112(sp) # 8-byte Folded Reload + addi t5, t5, 24 + andi t5, t5, 1023 + slli t5, t5, 2 lui a0, 37 addiw a0, a0, 256 add a1, sp, a0 - add a4, a1, a4 - vle32.v v8, (a7) + add t5, a1, t5 + vle32.v v8, (a4) csrr a0, vlenb lui a2, 1 addiw a2, a2, 56 @@ -109798,7 +109616,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t1) + vle32.v v8, (a6) csrr a0, vlenb lui a2, 1 addiw a2, a2, 48 @@ -109808,7 +109626,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t2) + vle32.v v8, (a7) csrr a0, vlenb lui a2, 1 addiw a2, a2, 40 @@ -109818,7 +109636,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s7) + vle32.v v8, (t0) csrr a0, vlenb lui a2, 1 addiw a2, a2, 32 @@ -109828,10 +109646,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 7 - addiw a0, a0, 1280 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t1) csrr a0, vlenb lui a2, 1 addiw a2, a2, 24 @@ -109841,10 +109656,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 7 - addiw a0, a0, 1408 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t2) csrr a0, vlenb lui a2, 1 addiw a2, a2, 16 @@ -109917,7 +109729,10 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s10) + lui a0, 8 + addiw a0, a0, -1920 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a2, 1 addiw a2, a2, -32 @@ -109937,7 +109752,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a3) + vle32.v v8, (a5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -48 @@ -109957,7 +109772,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t5) + vle32.v v8, (t6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -64 @@ -109967,7 +109782,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t6) + vle32.v v8, (s2) csrr a0, vlenb lui a2, 1 addiw a2, a2, -72 @@ -109977,7 +109792,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s2) + vle32.v v8, (s3) csrr a0, vlenb lui a2, 1 addiw a2, a2, -80 @@ -109987,7 +109802,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s3) + vle32.v v8, (s4) csrr a0, vlenb lui a2, 1 addiw a2, a2, -88 @@ -109997,7 +109812,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s4) + vle32.v v8, (s5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -96 @@ -110007,7 +109822,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s5) + vle32.v v8, (s6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -104 @@ -110017,7 +109832,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s6) + vle32.v v8, (s7) csrr a0, vlenb lui a2, 1 addiw a2, a2, -112 @@ -110027,8 +109842,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 64(sp) # 8-byte Folded Reload - vle32.v v8, (a0) + vle32.v v8, (s8) csrr a0, vlenb lui a2, 1 addiw a2, a2, -120 @@ -110038,8 +109852,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 72(sp) # 8-byte Folded Reload - vle32.v v8, (a0) + vle32.v v8, (s9) csrr a0, vlenb li a2, 31 slli a2, a2, 7 @@ -110049,8 +109862,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 80(sp) # 8-byte Folded Reload - vle32.v v8, (a0) + vle32.v v8, (s10) csrr a0, vlenb lui a2, 1 addiw a2, a2, -136 @@ -110060,10 +109872,8 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 88(sp) # 8-byte Folded Reload - vle32.v v24, (a0) - ld a0, 96(sp) # 8-byte Folded Reload - vle32.v v16, (a0) + vle32.v v24, (s11) + vle32.v v16, (ra) ld a0, 104(sp) # 8-byte Folded Reload vle32.v v8, (a0) csrr a0, vlenb @@ -110076,203 +109886,203 @@ add a0, a0, a2 vl8r.v v0, (a0) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 96 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 37 addiw a0, a0, 384 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 96 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 208 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 37 addiw a0, a0, 512 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 216 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 37 addiw a0, a0, 640 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 192 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 37 addiw a0, a0, 768 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 200 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 37 addiw a0, a0, 896 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 176 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 37 addiw a0, a0, 1024 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 184 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 37 addiw a0, a0, 1152 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 160 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 37 addiw a0, a0, 1280 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 168 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 37 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 144 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 37 addiw a0, a0, 1536 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 152 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 37 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 128 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 37 addiw a0, a0, 1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 136 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 37 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 112 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 38 addiw a0, a0, -2048 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 112 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 120 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 38 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) - ld t3, 248(sp) # 8-byte Folded Reload - add a5, a1, t3 + ld t3, 184(sp) # 8-byte Folded Reload + add a3, a1, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, 104 @@ -110282,25 +110092,25 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload - vse32.v v0, (a5) - flw fa5, 0(a4) + vse32.v v0, (a3) + flw fa5, 0(t5) lui a0, 6 addiw a0, a0, 256 - add a5, sp, a0 - ld a7, 160(sp) # 8-byte Folded Reload - add a0, a5, a7 + add a3, sp, a0 + ld a0, 120(sp) # 8-byte Folded Reload + add a0, a3, a0 sd a0, 104(sp) # 8-byte Folded Spill vse32.v v8, (a0) - add s11, a5, s11 - sd s11, 96(sp) # 8-byte Folded Spill - vse32.v v16, (s11) - ld s10, 216(sp) # 8-byte Folded Reload - add a0, a5, s10 - sd a0, 88(sp) # 8-byte Folded Spill - vse32.v v24, (a0) - add s9, a5, s9 - sd s9, 80(sp) # 8-byte Folded Spill - sd a7, 0(sp) + ld ra, 128(sp) # 8-byte Folded Reload + add ra, a3, ra + vse32.v v16, (ra) + ld s11, 136(sp) # 8-byte Folded Reload + add s11, a3, s11 + vse32.v v24, (s11) + ld s10, 144(sp) # 8-byte Folded Reload + add s10, a3, s10 + sd ra, 8(sp) + sd s11, 0(sp) csrr a0, vlenb lui a1, 1 addiw a1, a1, -136 @@ -110310,8 +110120,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s9) - add s11, a5, s8 + vse32.v v8, (s10) + ld s9, 152(sp) # 8-byte Folded Reload + add s9, a3, s9 csrr a0, vlenb li a1, 31 slli a1, a1, 7 @@ -110321,9 +110132,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s11) - ld s9, 128(sp) # 8-byte Folded Reload - add s9, a5, s9 + vse32.v v8, (s9) + ld s8, 160(sp) # 8-byte Folded Reload + add s8, a3, s8 csrr a0, vlenb lui a1, 1 addiw a1, a1, -120 @@ -110333,9 +110144,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s9) - ld s8, 136(sp) # 8-byte Folded Reload - add s7, a5, s8 + vse32.v v8, (s8) + ld s7, 168(sp) # 8-byte Folded Reload + add s7, a3, s7 csrr a0, vlenb lui a1, 1 addiw a1, a1, -112 @@ -110346,7 +110157,8 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (s7) - add s5, a5, a6 + ld s6, 176(sp) # 8-byte Folded Reload + add s6, a3, s6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -104 @@ -110356,9 +110168,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s5) - ld a6, 184(sp) # 8-byte Folded Reload - add s4, a5, a6 + vse32.v v8, (s6) + ld s5, 208(sp) # 8-byte Folded Reload + add s5, a3, s5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -96 @@ -110368,8 +110180,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s4) - add s3, a5, t0 + vse32.v v8, (s5) + ld s4, 216(sp) # 8-byte Folded Reload + add s4, a3, s4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -88 @@ -110379,9 +110192,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s3) - ld s2, 144(sp) # 8-byte Folded Reload - add s2, a5, s2 + vse32.v v8, (s4) + ld s3, 224(sp) # 8-byte Folded Reload + add s3, a3, s3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -80 @@ -110391,9 +110204,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s2) - ld t0, 152(sp) # 8-byte Folded Reload - add t6, a5, t0 + vse32.v v8, (s3) + ld s2, 232(sp) # 8-byte Folded Reload + add s2, a3, s2 csrr a0, vlenb lui a1, 1 addiw a1, a1, -72 @@ -110403,9 +110216,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t6) - ld t5, 192(sp) # 8-byte Folded Reload - add t5, a5, t5 + vse32.v v8, (s2) + ld t6, 240(sp) # 8-byte Folded Reload + add t6, a3, t6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -64 @@ -110415,9 +110228,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t5) - ld s6, 200(sp) # 8-byte Folded Reload - add t4, a5, s6 + vse32.v v8, (t6) + ld t4, 248(sp) # 8-byte Folded Reload + add t4, a3, t4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -56 @@ -110428,8 +110241,8 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t4) - ld a3, 208(sp) # 8-byte Folded Reload - add a3, a5, a3 + ld a5, 200(sp) # 8-byte Folded Reload + add a5, a3, a5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -48 @@ -110439,8 +110252,8 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a3) - add t3, a5, t3 + vse32.v v8, (a5) + add t3, a3, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -40 @@ -110451,236 +110264,236 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t3) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -32 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 7 addiw a0, a0, -1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -32 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -24 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload li a0, 13 slli a0, a0, 11 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -24 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 6 addiw a0, a0, 1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -16 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 6 addiw a0, a0, 1792 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + slli a0, a0, 12 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 6 addiw a0, a0, 1664 add a0, sp, a0 - csrr a1, vlenb - slli a1, a1, 12 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 6 addiw a0, a0, 1536 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 6 addiw a0, a0, 1408 add t2, sp, a0 + vse32.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 16 + addiw a1, a1, 24 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 6 addiw a0, a0, 1280 add t1, sp, a0 + vse32.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 24 + addiw a1, a1, 32 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) lui a0, 6 addiw a0, a0, 1152 + add t0, sp, a0 + vse32.v v8, (t0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 40 + mul a0, a0, a1 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 32 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a0) + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload li a0, 25 slli a0, a0, 10 + add a7, sp, a0 + vse32.v v8, (a7) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 48 + mul a0, a0, a1 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 40 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a0) + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 6 addiw a0, a0, 896 - add t2, sp, a0 + add a6, sp, a0 + vse32.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 48 + addiw a1, a1, 56 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 6 addiw a0, a0, 768 - add t1, sp, a0 + add a4, sp, a0 + vse32.v v8, (a4) + ld a0, 192(sp) # 8-byte Folded Reload + addi t5, a0, 408 + andi t5, t5, 1023 + slli t5, t5, 2 + add t5, a3, t5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 56 + addiw a1, a1, 64 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) - ld a0, 112(sp) # 8-byte Folded Reload - addi a4, a0, 408 - andi a4, a4, 1023 - slli a4, a4, 2 - add a4, a5, a4 lui a0, 6 addiw a0, a0, 640 add a2, sp, a0 + vse32.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 64 + addiw a1, a1, 72 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a2) lui a0, 6 addiw a0, a0, 512 add a1, sp, a0 + vse32.v v8, (a1) csrr a0, vlenb - lui a7, 1 - addiw a7, a7, 72 - mul a0, a0, a7 + lui s11, 1 + addiw s11, s11, 80 + mul a0, a0, s11 add a0, sp, a0 - lui a7, 63 - addiw a7, a7, -1632 - add a0, a0, a7 + lui s11, 63 + addiw s11, s11, -1632 + add a0, a0, s11 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) lui a0, 6 addiw a0, a0, 384 add a0, sp, a0 - csrr a7, vlenb - lui ra, 1 - addiw ra, ra, 80 - mul a7, a7, ra - add a7, sp, a7 - lui ra, 63 - addiw ra, ra, -1632 - add a7, a7, ra - vl8r.v v8, (a7) # Unknown-size Folded Reload vse32.v v8, (a0) csrr ra, vlenb - lui a7, 1 - addiw a7, a7, 88 - mul ra, ra, a7 + lui s11, 1 + addiw s11, s11, 88 + mul ra, ra, s11 add ra, sp, ra - lui a7, 63 - addiw a7, a7, -1632 - add ra, ra, a7 - ld a7, 0(sp) + lui s11, 63 + addiw s11, s11, -1632 + add ra, ra, s11 + ld s11, 0(sp) vl8r.v v8, (ra) # Unknown-size Folded Reload ld ra, 8(sp) - vse32.v v8, (a5) - fsw fa5, 0(a4) - vle32.v v8, (a5) - csrr a4, vlenb - lui a5, 1 - addiw a5, a5, 88 - mul a4, a4, a5 - add a4, sp, a4 - lui a5, 63 - addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + vse32.v v8, (a3) + fsw fa5, 0(t5) + vle32.v v8, (a3) + csrr a3, vlenb + lui t5, 1 + addiw t5, t5, 88 + mul a3, a3, t5 + add a3, sp, a3 + lui t5, 63 + addiw t5, t5, -1632 + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vle32.v v8, (a0) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 80 - mul a0, a0, a4 + lui a3, 1 + addiw a3, a3, 80 + mul a0, a0, a3 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui a3, 63 + addiw a3, a3, -1632 + add a0, a0, a3 vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (a1) csrr a0, vlenb @@ -110702,14 +110515,15 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - addi a4, ra, 25 - andi a4, a4, 1023 - slli a4, a4, 2 + ld t5, 112(sp) # 8-byte Folded Reload + addi t5, t5, 25 + andi t5, t5, 1023 + slli t5, t5, 2 lui a0, 36 addiw a0, a0, 256 add a1, sp, a0 - add a4, a1, a4 - vle32.v v8, (t1) + add t5, a1, t5 + vle32.v v8, (a4) csrr a0, vlenb lui a2, 1 addiw a2, a2, 56 @@ -110719,7 +110533,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t2) + vle32.v v8, (a6) csrr a0, vlenb lui a2, 1 addiw a2, a2, 48 @@ -110729,10 +110543,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - li a0, 25 - slli a0, a0, 10 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (a7) csrr a0, vlenb lui a2, 1 addiw a2, a2, 40 @@ -110742,10 +110553,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 6 - addiw a0, a0, 1152 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t0) csrr a0, vlenb lui a2, 1 addiw a2, a2, 32 @@ -110755,10 +110563,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 6 - addiw a0, a0, 1280 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t1) csrr a0, vlenb lui a2, 1 addiw a2, a2, 24 @@ -110768,10 +110573,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 6 - addiw a0, a0, 1408 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t2) csrr a0, vlenb lui a2, 1 addiw a2, a2, 16 @@ -110867,7 +110669,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a3) + vle32.v v8, (a5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -48 @@ -110887,7 +110689,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t5) + vle32.v v8, (t6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -64 @@ -110897,7 +110699,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t6) + vle32.v v8, (s2) csrr a0, vlenb lui a2, 1 addiw a2, a2, -72 @@ -110907,7 +110709,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s2) + vle32.v v8, (s3) csrr a0, vlenb lui a2, 1 addiw a2, a2, -80 @@ -110917,7 +110719,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s3) + vle32.v v8, (s4) csrr a0, vlenb lui a2, 1 addiw a2, a2, -88 @@ -110927,7 +110729,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s4) + vle32.v v8, (s5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -96 @@ -110937,7 +110739,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s5) + vle32.v v8, (s6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -104 @@ -110957,7 +110759,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s9) + vle32.v v8, (s8) csrr a0, vlenb lui a2, 1 addiw a2, a2, -120 @@ -110967,7 +110769,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s11) + vle32.v v8, (s9) csrr a0, vlenb li a2, 31 slli a2, a2, 7 @@ -110977,8 +110779,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 80(sp) # 8-byte Folded Reload - vle32.v v8, (a0) + vle32.v v8, (s10) csrr a0, vlenb lui a2, 1 addiw a2, a2, -136 @@ -110988,10 +110789,8 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 88(sp) # 8-byte Folded Reload - vle32.v v24, (a0) - ld a0, 96(sp) # 8-byte Folded Reload - vle32.v v16, (a0) + vle32.v v24, (s11) + vle32.v v16, (ra) ld a0, 104(sp) # 8-byte Folded Reload vle32.v v8, (a0) csrr a0, vlenb @@ -111004,203 +110803,203 @@ add a0, a0, a2 vl8r.v v0, (a0) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 96 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 36 addiw a0, a0, 384 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 96 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 208 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 36 addiw a0, a0, 512 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 216 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 36 addiw a0, a0, 640 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 192 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 36 addiw a0, a0, 768 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 200 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 36 addiw a0, a0, 896 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 176 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 36 addiw a0, a0, 1024 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 184 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 36 addiw a0, a0, 1152 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 160 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 36 addiw a0, a0, 1280 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 168 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 36 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 144 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 36 addiw a0, a0, 1536 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 152 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 36 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 128 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 36 addiw a0, a0, 1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 136 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 36 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 112 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 37 addiw a0, a0, -2048 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 112 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 120 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 37 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) - ld t3, 248(sp) # 8-byte Folded Reload - add a5, a1, t3 + ld t3, 184(sp) # 8-byte Folded Reload + add a3, a1, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, 104 @@ -111210,50 +111009,49 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload - vse32.v v0, (a5) - flw fa5, 0(a4) + vse32.v v0, (a3) + flw fa5, 0(t5) lui a0, 5 addiw a0, a0, 256 - add a5, sp, a0 - add a7, a5, a7 - sd a7, 104(sp) # 8-byte Folded Spill - vse32.v v8, (a7) - ld a1, 168(sp) # 8-byte Folded Reload - add a1, a5, a1 - sd a1, 96(sp) # 8-byte Folded Spill - vse32.v v16, (a1) - add s10, a5, s10 - sd s10, 88(sp) # 8-byte Folded Spill - vse32.v v24, (s10) - ld a1, 176(sp) # 8-byte Folded Reload - add a1, a5, a1 - sd a1, 80(sp) # 8-byte Folded Spill + add a3, sp, a0 + ld a0, 120(sp) # 8-byte Folded Reload + add a0, a3, a0 + sd a0, 104(sp) # 8-byte Folded Spill + vse32.v v8, (a0) + ld ra, 128(sp) # 8-byte Folded Reload + add ra, a3, ra + vse32.v v16, (ra) + ld s11, 136(sp) # 8-byte Folded Reload + add s11, a3, s11 + vse32.v v24, (s11) + ld s10, 144(sp) # 8-byte Folded Reload + add s10, a3, s10 + sd ra, 8(sp) + sd s11, 0(sp) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -136 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 63 - addiw a2, a2, -1632 - add a0, a0, a2 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) - ld a1, 120(sp) # 8-byte Folded Reload - add a1, a5, a1 - sd a1, 72(sp) # 8-byte Folded Spill + vse32.v v8, (s10) + ld s9, 152(sp) # 8-byte Folded Reload + add s9, a3, s9 csrr a0, vlenb - li a2, 31 - slli a2, a2, 7 - mul a0, a0, a2 + li a1, 31 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 63 - addiw a2, a2, -1632 - add a0, a0, a2 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) - ld s7, 128(sp) # 8-byte Folded Reload - add ra, a5, s7 - sd s7, 8(sp) + vse32.v v8, (s9) + ld s8, 160(sp) # 8-byte Folded Reload + add s8, a3, s8 csrr a0, vlenb lui a1, 1 addiw a1, a1, -120 @@ -111263,8 +111061,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (ra) - add s9, a5, s8 + vse32.v v8, (s8) + ld s7, 168(sp) # 8-byte Folded Reload + add s7, a3, s7 csrr a0, vlenb lui a1, 1 addiw a1, a1, -112 @@ -111274,9 +111073,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s9) - ld s5, 224(sp) # 8-byte Folded Reload - add s5, a5, s5 + vse32.v v8, (s7) + ld s6, 176(sp) # 8-byte Folded Reload + add s6, a3, s6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -104 @@ -111286,8 +111085,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s5) - add s4, a5, a6 + vse32.v v8, (s6) + ld s5, 208(sp) # 8-byte Folded Reload + add s5, a3, s5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -96 @@ -111297,9 +111097,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s4) - ld a6, 232(sp) # 8-byte Folded Reload - add s3, a5, a6 + vse32.v v8, (s5) + ld s4, 216(sp) # 8-byte Folded Reload + add s4, a3, s4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -88 @@ -111309,9 +111109,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s3) - ld a7, 144(sp) # 8-byte Folded Reload - add s2, a5, a7 + vse32.v v8, (s4) + ld s3, 224(sp) # 8-byte Folded Reload + add s3, a3, s3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -80 @@ -111321,8 +111121,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s2) - add t6, a5, t0 + vse32.v v8, (s3) + ld s2, 232(sp) # 8-byte Folded Reload + add s2, a3, s2 csrr a0, vlenb lui a1, 1 addiw a1, a1, -72 @@ -111332,9 +111133,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t6) - ld t0, 192(sp) # 8-byte Folded Reload - add t5, a5, t0 + vse32.v v8, (s2) + ld t6, 240(sp) # 8-byte Folded Reload + add t6, a3, t6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -64 @@ -111344,8 +111145,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t5) - add t4, a5, s6 + vse32.v v8, (t6) + ld t4, 248(sp) # 8-byte Folded Reload + add t4, a3, t4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -56 @@ -111356,8 +111158,8 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t4) - ld a3, 208(sp) # 8-byte Folded Reload - add a3, a5, a3 + ld a5, 200(sp) # 8-byte Folded Reload + add a5, a3, a5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -48 @@ -111367,8 +111169,8 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a3) - add t3, a5, t3 + vse32.v v8, (a5) + add t3, a3, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -40 @@ -111379,235 +111181,236 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t3) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -32 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 6 addiw a0, a0, -1920 - add s8, sp, a0 + add a0, sp, a0 + vse32.v v8, (a0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -32 + addiw a1, a1, -24 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s8) li a0, 11 slli a0, a0, 11 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -24 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 5 addiw a0, a0, 1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -16 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 5 addiw a0, a0, 1792 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + slli a0, a0, 12 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 5 addiw a0, a0, 1664 add a0, sp, a0 - csrr a1, vlenb - slli a1, a1, 12 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 5 addiw a0, a0, 1536 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 5 addiw a0, a0, 1408 add t2, sp, a0 + vse32.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 16 + addiw a1, a1, 24 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 5 addiw a0, a0, 1280 add t1, sp, a0 + vse32.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 24 + addiw a1, a1, 32 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) lui a0, 5 addiw a0, a0, 1152 + add t0, sp, a0 + vse32.v v8, (t0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 40 + mul a0, a0, a1 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 32 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a0) + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload li a0, 21 slli a0, a0, 10 - add s6, sp, a0 + add a7, sp, a0 + vse32.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 40 + addiw a1, a1, 48 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s6) lui a0, 5 addiw a0, a0, 896 - add t2, sp, a0 + add a6, sp, a0 + vse32.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 48 + addiw a1, a1, 56 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 5 addiw a0, a0, 768 - add t1, sp, a0 + add a4, sp, a0 + vse32.v v8, (a4) + ld a0, 192(sp) # 8-byte Folded Reload + addi t5, a0, 425 + andi t5, t5, 1023 + slli t5, t5, 2 + add t5, a3, t5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 56 + addiw a1, a1, 64 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) - ld s11, 112(sp) # 8-byte Folded Reload - addi a4, s11, 425 - andi a4, a4, 1023 - slli a4, a4, 2 - add a4, a5, a4 lui a0, 5 addiw a0, a0, 640 add a2, sp, a0 + vse32.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 64 + addiw a1, a1, 72 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a2) lui a0, 5 addiw a0, a0, 512 add a1, sp, a0 + vse32.v v8, (a1) csrr a0, vlenb - lui s7, 1 - addiw s7, s7, 72 - mul a0, a0, s7 + lui s11, 1 + addiw s11, s11, 80 + mul a0, a0, s11 add a0, sp, a0 - lui s7, 63 - addiw s7, s7, -1632 - add a0, a0, s7 + lui s11, 63 + addiw s11, s11, -1632 + add a0, a0, s11 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) lui a0, 5 addiw a0, a0, 384 add a0, sp, a0 - csrr s7, vlenb - lui s10, 1 - addiw s10, s10, 80 - mul s7, s7, s10 - add s7, sp, s7 - lui s10, 63 - addiw s10, s10, -1632 - add s7, s7, s10 - vl8r.v v8, (s7) # Unknown-size Folded Reload vse32.v v8, (a0) - csrr s10, vlenb - lui s7, 1 - addiw s7, s7, 88 - mul s10, s10, s7 - add s10, sp, s10 - lui s7, 63 - addiw s7, s7, -1632 - add s10, s10, s7 - ld s7, 8(sp) - vl8r.v v8, (s10) # Unknown-size Folded Reload - vse32.v v8, (a5) - fsw fa5, 0(a4) - vle32.v v8, (a5) - csrr a4, vlenb - lui a5, 1 - addiw a5, a5, 88 - mul a4, a4, a5 - add a4, sp, a4 - lui a5, 63 - addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + csrr ra, vlenb + lui s11, 1 + addiw s11, s11, 88 + mul ra, ra, s11 + add ra, sp, ra + lui s11, 63 + addiw s11, s11, -1632 + add ra, ra, s11 + ld s11, 0(sp) + vl8r.v v8, (ra) # Unknown-size Folded Reload + ld ra, 8(sp) + vse32.v v8, (a3) + fsw fa5, 0(t5) + vle32.v v8, (a3) + csrr a3, vlenb + lui t5, 1 + addiw t5, t5, 88 + mul a3, a3, t5 + add a3, sp, a3 + lui t5, 63 + addiw t5, t5, -1632 + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vle32.v v8, (a0) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 80 - mul a0, a0, a4 + lui a3, 1 + addiw a3, a3, 80 + mul a0, a0, a3 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui a3, 63 + addiw a3, a3, -1632 + add a0, a0, a3 vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (a1) csrr a0, vlenb @@ -111629,16 +111432,15 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld s10, 240(sp) # 8-byte Folded Reload - addi a4, s10, 26 - andi a4, a4, 1023 - slli a4, a4, 2 - sd s10, 8(sp) + ld t5, 112(sp) # 8-byte Folded Reload + addi t5, t5, 26 + andi t5, t5, 1023 + slli t5, t5, 2 lui a0, 35 addiw a0, a0, 256 add a1, sp, a0 - add a4, a1, a4 - vle32.v v8, (t1) + add t5, a1, t5 + vle32.v v8, (a4) csrr a0, vlenb lui a2, 1 addiw a2, a2, 56 @@ -111648,7 +111450,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t2) + vle32.v v8, (a6) csrr a0, vlenb lui a2, 1 addiw a2, a2, 48 @@ -111658,7 +111460,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s6) + vle32.v v8, (a7) csrr a0, vlenb lui a2, 1 addiw a2, a2, 40 @@ -111668,10 +111470,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 5 - addiw a0, a0, 1152 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t0) csrr a0, vlenb lui a2, 1 addiw a2, a2, 32 @@ -111681,10 +111480,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 5 - addiw a0, a0, 1280 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t1) csrr a0, vlenb lui a2, 1 addiw a2, a2, 24 @@ -111694,10 +111490,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 5 - addiw a0, a0, 1408 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t2) csrr a0, vlenb lui a2, 1 addiw a2, a2, 16 @@ -111770,7 +111563,10 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s8) + lui a0, 6 + addiw a0, a0, -1920 + add a0, sp, a0 + vle32.v v8, (a0) csrr a0, vlenb lui a2, 1 addiw a2, a2, -32 @@ -111790,7 +111586,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a3) + vle32.v v8, (a5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -48 @@ -111810,7 +111606,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t5) + vle32.v v8, (t6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -64 @@ -111820,7 +111616,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t6) + vle32.v v8, (s2) csrr a0, vlenb lui a2, 1 addiw a2, a2, -72 @@ -111830,7 +111626,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s2) + vle32.v v8, (s3) csrr a0, vlenb lui a2, 1 addiw a2, a2, -80 @@ -111840,7 +111636,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s3) + vle32.v v8, (s4) csrr a0, vlenb lui a2, 1 addiw a2, a2, -88 @@ -111850,7 +111646,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s4) + vle32.v v8, (s5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -96 @@ -111860,7 +111656,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s5) + vle32.v v8, (s6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -104 @@ -111870,7 +111666,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s9) + vle32.v v8, (s7) csrr a0, vlenb lui a2, 1 addiw a2, a2, -112 @@ -111880,7 +111676,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (ra) + vle32.v v8, (s8) csrr a0, vlenb lui a2, 1 addiw a2, a2, -120 @@ -111890,8 +111686,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 72(sp) # 8-byte Folded Reload - vle32.v v8, (a0) + vle32.v v8, (s9) csrr a0, vlenb li a2, 31 slli a2, a2, 7 @@ -111901,8 +111696,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 80(sp) # 8-byte Folded Reload - vle32.v v8, (a0) + vle32.v v8, (s10) csrr a0, vlenb lui a2, 1 addiw a2, a2, -136 @@ -111912,10 +111706,8 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 88(sp) # 8-byte Folded Reload - vle32.v v24, (a0) - ld a0, 96(sp) # 8-byte Folded Reload - vle32.v v16, (a0) + vle32.v v24, (s11) + vle32.v v16, (ra) ld a0, 104(sp) # 8-byte Folded Reload vle32.v v8, (a0) csrr a0, vlenb @@ -111928,203 +111720,203 @@ add a0, a0, a2 vl8r.v v0, (a0) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 96 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 35 addiw a0, a0, 384 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 96 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 208 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 35 addiw a0, a0, 512 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 216 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 35 addiw a0, a0, 640 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 192 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 35 addiw a0, a0, 768 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 200 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 35 addiw a0, a0, 896 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 176 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 35 addiw a0, a0, 1024 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 184 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 35 addiw a0, a0, 1152 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 160 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 35 addiw a0, a0, 1280 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 168 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 35 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 144 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 35 addiw a0, a0, 1536 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 152 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 35 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 128 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 35 addiw a0, a0, 1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 136 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 35 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 112 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 36 addiw a0, a0, -2048 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 112 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 120 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 36 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) - ld t3, 248(sp) # 8-byte Folded Reload - add a5, a1, t3 + ld t3, 184(sp) # 8-byte Folded Reload + add a3, a1, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, 104 @@ -112134,38 +111926,37 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload - vse32.v v0, (a5) - flw fa5, 0(a4) + vse32.v v0, (a3) + flw fa5, 0(t5) lui a0, 4 addiw a0, a0, 256 - add a5, sp, a0 - ld a1, 160(sp) # 8-byte Folded Reload - add a1, a5, a1 - sd a1, 104(sp) # 8-byte Folded Spill - vse32.v v8, (a1) - ld a1, 168(sp) # 8-byte Folded Reload - add a1, a5, a1 - sd a1, 96(sp) # 8-byte Folded Spill - vse32.v v16, (a1) - ld s8, 216(sp) # 8-byte Folded Reload - add a1, a5, s8 - sd a1, 88(sp) # 8-byte Folded Spill - vse32.v v24, (a1) - ld a1, 176(sp) # 8-byte Folded Reload - add a1, a5, a1 - sd a1, 80(sp) # 8-byte Folded Spill + add a3, sp, a0 + ld a0, 120(sp) # 8-byte Folded Reload + add a0, a3, a0 + sd a0, 104(sp) # 8-byte Folded Spill + vse32.v v8, (a0) + ld ra, 128(sp) # 8-byte Folded Reload + add ra, a3, ra + vse32.v v16, (ra) + ld s11, 136(sp) # 8-byte Folded Reload + add s11, a3, s11 + vse32.v v24, (s11) + ld s10, 144(sp) # 8-byte Folded Reload + add s10, a3, s10 + sd ra, 8(sp) + sd s11, 0(sp) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -136 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 63 - addiw a2, a2, -1632 - add a0, a0, a2 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) - ld ra, 120(sp) # 8-byte Folded Reload - add ra, a5, ra + vse32.v v8, (s10) + ld s9, 152(sp) # 8-byte Folded Reload + add s9, a3, s9 csrr a0, vlenb li a1, 31 slli a1, a1, 7 @@ -112175,8 +111966,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (ra) - add s9, a5, s7 + vse32.v v8, (s9) + ld s8, 160(sp) # 8-byte Folded Reload + add s8, a3, s8 csrr a0, vlenb lui a1, 1 addiw a1, a1, -120 @@ -112186,9 +111978,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s9) - ld s7, 136(sp) # 8-byte Folded Reload - add s7, a5, s7 + vse32.v v8, (s8) + ld s7, 168(sp) # 8-byte Folded Reload + add s7, a3, s7 csrr a0, vlenb lui a1, 1 addiw a1, a1, -112 @@ -112199,8 +111991,8 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (s7) - ld s5, 224(sp) # 8-byte Folded Reload - add s5, a5, s5 + ld s6, 176(sp) # 8-byte Folded Reload + add s6, a3, s6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -104 @@ -112210,9 +112002,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s5) - ld s6, 184(sp) # 8-byte Folded Reload - add s4, a5, s6 + vse32.v v8, (s6) + ld s5, 208(sp) # 8-byte Folded Reload + add s5, a3, s5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -96 @@ -112222,8 +112014,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s4) - add s3, a5, a6 + vse32.v v8, (s5) + ld s4, 216(sp) # 8-byte Folded Reload + add s4, a3, s4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -88 @@ -112233,8 +112026,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s3) - add s2, a5, a7 + vse32.v v8, (s4) + ld s3, 224(sp) # 8-byte Folded Reload + add s3, a3, s3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -80 @@ -112244,9 +112038,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s2) - ld a7, 152(sp) # 8-byte Folded Reload - add t6, a5, a7 + vse32.v v8, (s3) + ld s2, 232(sp) # 8-byte Folded Reload + add s2, a3, s2 csrr a0, vlenb lui a1, 1 addiw a1, a1, -72 @@ -112256,8 +112050,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t6) - add t5, a5, t0 + vse32.v v8, (s2) + ld t6, 240(sp) # 8-byte Folded Reload + add t6, a3, t6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -64 @@ -112267,9 +112062,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t5) - ld t4, 200(sp) # 8-byte Folded Reload - add t4, a5, t4 + vse32.v v8, (t6) + ld t4, 248(sp) # 8-byte Folded Reload + add t4, a3, t4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -56 @@ -112280,8 +112075,8 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t4) - ld a6, 208(sp) # 8-byte Folded Reload - add a3, a5, a6 + ld a5, 200(sp) # 8-byte Folded Reload + add a5, a3, a5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -48 @@ -112291,8 +112086,8 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a3) - add t3, a5, t3 + vse32.v v8, (a5) + add t3, a3, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -40 @@ -112303,234 +112098,236 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t3) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -32 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 5 addiw a0, a0, -1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -32 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -24 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload li a0, 9 slli a0, a0, 11 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -24 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 4 addiw a0, a0, 1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -16 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 4 addiw a0, a0, 1792 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + slli a0, a0, 12 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 4 addiw a0, a0, 1664 add a0, sp, a0 - csrr a1, vlenb - slli a1, a1, 12 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 4 addiw a0, a0, 1536 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 4 addiw a0, a0, 1408 add t2, sp, a0 + vse32.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 16 + addiw a1, a1, 24 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 4 addiw a0, a0, 1280 add t1, sp, a0 + vse32.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 24 + addiw a1, a1, 32 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) lui a0, 4 addiw a0, a0, 1152 + add t0, sp, a0 + vse32.v v8, (t0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 40 + mul a0, a0, a1 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 32 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a0) + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload li a0, 17 slli a0, a0, 10 - add t0, sp, a0 + add a7, sp, a0 + vse32.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 40 + addiw a1, a1, 48 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t0) lui a0, 4 addiw a0, a0, 896 - add t2, sp, a0 + add a6, sp, a0 + vse32.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 48 + addiw a1, a1, 56 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 4 addiw a0, a0, 768 - add t1, sp, a0 + add a4, sp, a0 + vse32.v v8, (a4) + ld a0, 192(sp) # 8-byte Folded Reload + addi t5, a0, 442 + andi t5, t5, 1023 + slli t5, t5, 2 + add t5, a3, t5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 56 + addiw a1, a1, 64 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) - addi a4, s11, 442 - andi a4, a4, 1023 - slli a4, a4, 2 - add a4, a5, a4 lui a0, 4 addiw a0, a0, 640 add a2, sp, a0 + vse32.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 64 + addiw a1, a1, 72 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a2) lui a0, 4 addiw a0, a0, 512 add a1, sp, a0 + vse32.v v8, (a1) csrr a0, vlenb - lui s10, 1 - addiw s10, s10, 72 - mul a0, a0, s10 + lui s11, 1 + addiw s11, s11, 80 + mul a0, a0, s11 add a0, sp, a0 - lui s10, 63 - addiw s10, s10, -1632 - add a0, a0, s10 + lui s11, 63 + addiw s11, s11, -1632 + add a0, a0, s11 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) lui a0, 4 addiw a0, a0, 384 add a0, sp, a0 - csrr s10, vlenb + vse32.v v8, (a0) + csrr ra, vlenb lui s11, 1 - addiw s11, s11, 80 - mul s10, s10, s11 - add s10, sp, s10 + addiw s11, s11, 88 + mul ra, ra, s11 + add ra, sp, ra lui s11, 63 addiw s11, s11, -1632 - add s10, s10, s11 - vl8r.v v8, (s10) # Unknown-size Folded Reload - vse32.v v8, (a0) - csrr s11, vlenb - lui s10, 1 - addiw s10, s10, 88 - mul s11, s11, s10 - add s11, sp, s11 - lui s10, 63 - addiw s10, s10, -1632 - add s11, s11, s10 - ld s10, 8(sp) - vl8r.v v8, (s11) # Unknown-size Folded Reload - vse32.v v8, (a5) - fsw fa5, 0(a4) - vle32.v v8, (a5) - csrr a4, vlenb - lui a5, 1 - addiw a5, a5, 88 - mul a4, a4, a5 - add a4, sp, a4 - lui a5, 63 - addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add ra, ra, s11 + ld s11, 0(sp) + vl8r.v v8, (ra) # Unknown-size Folded Reload + ld ra, 8(sp) + vse32.v v8, (a3) + fsw fa5, 0(t5) + vle32.v v8, (a3) + csrr a3, vlenb + lui t5, 1 + addiw t5, t5, 88 + mul a3, a3, t5 + add a3, sp, a3 + lui t5, 63 + addiw t5, t5, -1632 + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vle32.v v8, (a0) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 80 - mul a0, a0, a4 + lui a3, 1 + addiw a3, a3, 80 + mul a0, a0, a3 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui a3, 63 + addiw a3, a3, -1632 + add a0, a0, a3 vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (a1) csrr a0, vlenb @@ -112552,14 +112349,15 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - addi a4, s10, 27 - andi a4, a4, 1023 - slli a4, a4, 2 + ld t5, 112(sp) # 8-byte Folded Reload + addi t5, t5, 27 + andi t5, t5, 1023 + slli t5, t5, 2 lui a0, 34 addiw a0, a0, 256 add a1, sp, a0 - add a4, a1, a4 - vle32.v v8, (t1) + add t5, a1, t5 + vle32.v v8, (a4) csrr a0, vlenb lui a2, 1 addiw a2, a2, 56 @@ -112569,7 +112367,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t2) + vle32.v v8, (a6) csrr a0, vlenb lui a2, 1 addiw a2, a2, 48 @@ -112579,7 +112377,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t0) + vle32.v v8, (a7) csrr a0, vlenb lui a2, 1 addiw a2, a2, 40 @@ -112589,10 +112387,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 4 - addiw a0, a0, 1152 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t0) csrr a0, vlenb lui a2, 1 addiw a2, a2, 32 @@ -112602,10 +112397,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 4 - addiw a0, a0, 1280 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t1) csrr a0, vlenb lui a2, 1 addiw a2, a2, 24 @@ -112615,10 +112407,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 4 - addiw a0, a0, 1408 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t2) csrr a0, vlenb lui a2, 1 addiw a2, a2, 16 @@ -112714,7 +112503,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a3) + vle32.v v8, (a5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -48 @@ -112734,7 +112523,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t5) + vle32.v v8, (t6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -64 @@ -112744,7 +112533,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t6) + vle32.v v8, (s2) csrr a0, vlenb lui a2, 1 addiw a2, a2, -72 @@ -112754,7 +112543,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s2) + vle32.v v8, (s3) csrr a0, vlenb lui a2, 1 addiw a2, a2, -80 @@ -112764,7 +112553,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s3) + vle32.v v8, (s4) csrr a0, vlenb lui a2, 1 addiw a2, a2, -88 @@ -112774,7 +112563,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s4) + vle32.v v8, (s5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -96 @@ -112784,7 +112573,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s5) + vle32.v v8, (s6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -104 @@ -112804,7 +112593,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s9) + vle32.v v8, (s8) csrr a0, vlenb lui a2, 1 addiw a2, a2, -120 @@ -112814,7 +112603,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (ra) + vle32.v v8, (s9) csrr a0, vlenb li a2, 31 slli a2, a2, 7 @@ -112824,8 +112613,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 80(sp) # 8-byte Folded Reload - vle32.v v8, (a0) + vle32.v v8, (s10) csrr a0, vlenb lui a2, 1 addiw a2, a2, -136 @@ -112835,10 +112623,8 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 88(sp) # 8-byte Folded Reload - vle32.v v24, (a0) - ld a0, 96(sp) # 8-byte Folded Reload - vle32.v v16, (a0) + vle32.v v24, (s11) + vle32.v v16, (ra) ld a0, 104(sp) # 8-byte Folded Reload vle32.v v8, (a0) csrr a0, vlenb @@ -112851,374 +112637,374 @@ add a0, a0, a2 vl8r.v v0, (a0) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 96 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 34 addiw a0, a0, 384 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 96 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 208 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 34 addiw a0, a0, 512 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 216 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 34 addiw a0, a0, 640 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 192 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 34 addiw a0, a0, 768 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 200 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 34 addiw a0, a0, 896 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 176 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 34 addiw a0, a0, 1024 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 184 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 34 addiw a0, a0, 1152 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 160 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 34 addiw a0, a0, 1280 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 168 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 34 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 144 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 34 addiw a0, a0, 1536 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 152 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 34 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 128 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 34 addiw a0, a0, 1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 136 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 34 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 112 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 35 addiw a0, a0, -2048 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 112 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 120 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 35 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) - ld a0, 248(sp) # 8-byte Folded Reload - add a5, a1, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 104 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse32.v v0, (a5) - flw fa5, 0(a4) - lui a1, 3 - addiw a1, a1, 256 - add a5, sp, a1 - ld ra, 160(sp) # 8-byte Folded Reload - add a1, a5, ra - sd a1, 104(sp) # 8-byte Folded Spill - vse32.v v8, (a1) - ld a1, 168(sp) # 8-byte Folded Reload - add a1, a5, a1 - sd a1, 96(sp) # 8-byte Folded Spill - vse32.v v16, (a1) - add s8, a5, s8 - sd s8, 88(sp) # 8-byte Folded Spill - vse32.v v24, (s8) - ld s9, 176(sp) # 8-byte Folded Reload - add a1, a5, s9 - sd a1, 80(sp) # 8-byte Folded Spill + ld t3, 184(sp) # 8-byte Folded Reload + add a3, a1, t3 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 104 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vse32.v v0, (a3) + flw fa5, 0(t5) + lui a0, 3 + addiw a0, a0, 256 + add a3, sp, a0 + ld a0, 120(sp) # 8-byte Folded Reload + add a0, a3, a0 + sd a0, 104(sp) # 8-byte Folded Spill + vse32.v v8, (a0) + ld ra, 128(sp) # 8-byte Folded Reload + add ra, a3, ra + vse32.v v16, (ra) + ld s11, 136(sp) # 8-byte Folded Reload + add s11, a3, s11 + vse32.v v24, (s11) + ld s10, 144(sp) # 8-byte Folded Reload + add s10, a3, s10 sd ra, 8(sp) - sd s9, 0(sp) - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, -136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse32.v v8, (a1) - ld t0, 120(sp) # 8-byte Folded Reload - add s11, a5, t0 - csrr a1, vlenb - li a2, 31 - slli a2, a2, 7 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (s11) - ld s8, 128(sp) # 8-byte Folded Reload - add s8, a5, s8 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -120 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + sd s11, 0(sp) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -136 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vse32.v v8, (s10) + ld s9, 152(sp) # 8-byte Folded Reload + add s9, a3, s9 + csrr a0, vlenb + li a1, 31 + slli a1, a1, 7 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vse32.v v8, (s9) + ld s8, 160(sp) # 8-byte Folded Reload + add s8, a3, s8 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -120 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (s8) - ld s7, 136(sp) # 8-byte Folded Reload - add s7, a5, s7 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -112 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + ld s7, 168(sp) # 8-byte Folded Reload + add s7, a3, s7 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -112 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (s7) - ld s5, 224(sp) # 8-byte Folded Reload - add s5, a5, s5 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -104 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + ld s6, 176(sp) # 8-byte Folded Reload + add s6, a3, s6 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -104 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vse32.v v8, (s6) + ld s5, 208(sp) # 8-byte Folded Reload + add s5, a3, s5 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -96 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (s5) - add s4, a5, s6 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -96 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + ld s4, 216(sp) # 8-byte Folded Reload + add s4, a3, s4 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -88 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (s4) - ld s3, 232(sp) # 8-byte Folded Reload - add s3, a5, s3 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -88 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + ld s3, 224(sp) # 8-byte Folded Reload + add s3, a3, s3 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -80 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (s3) - ld s2, 144(sp) # 8-byte Folded Reload - add s2, a5, s2 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -80 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + ld s2, 232(sp) # 8-byte Folded Reload + add s2, a3, s2 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -72 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (s2) - add t6, a5, a7 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -72 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + ld t6, 240(sp) # 8-byte Folded Reload + add t6, a3, t6 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -64 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t6) - ld t5, 192(sp) # 8-byte Folded Reload - add t5, a5, t5 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -64 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (t5) - ld t4, 200(sp) # 8-byte Folded Reload - add t4, a5, t4 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -56 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + ld t4, 248(sp) # 8-byte Folded Reload + add t4, a3, t4 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -56 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t4) - add a3, a5, a6 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -48 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a3) - add t3, a5, a0 - mv s6, a0 + ld a5, 200(sp) # 8-byte Folded Reload + add a5, a3, a5 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -48 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vse32.v v8, (a5) + add t3, a3, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -40 @@ -113229,236 +113015,236 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t3) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -32 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 4 addiw a0, a0, -1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -32 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -24 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload li a0, 7 slli a0, a0, 11 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -24 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 3 addiw a0, a0, 1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -16 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 3 addiw a0, a0, 1792 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + slli a0, a0, 12 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 3 addiw a0, a0, 1664 add a0, sp, a0 - csrr a1, vlenb - slli a1, a1, 12 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload li a0, 27 slli a0, a0, 9 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 3 addiw a0, a0, 1408 add t2, sp, a0 + vse32.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 16 + addiw a1, a1, 24 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 3 addiw a0, a0, 1280 add t1, sp, a0 + vse32.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 24 + addiw a1, a1, 32 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) lui a0, 3 addiw a0, a0, 1152 - add a7, sp, a0 + add t0, sp, a0 + vse32.v v8, (t0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 32 + addiw a1, a1, 40 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a7) li a0, 13 slli a0, a0, 10 - add t2, sp, a0 + add a7, sp, a0 + vse32.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 40 + addiw a1, a1, 48 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 3 addiw a0, a0, 896 - add t1, sp, a0 + add a6, sp, a0 + vse32.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 48 + addiw a1, a1, 56 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) lui a0, 3 addiw a0, a0, 768 - add a6, sp, a0 + add a4, sp, a0 + vse32.v v8, (a4) + ld a0, 192(sp) # 8-byte Folded Reload + addi t5, a0, 459 + andi t5, t5, 1023 + slli t5, t5, 2 + add t5, a3, t5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 56 + addiw a1, a1, 64 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a6) - ld s10, 112(sp) # 8-byte Folded Reload - addi a4, s10, 459 - andi a4, a4, 1023 - slli a4, a4, 2 - add a4, a5, a4 lui a0, 3 addiw a0, a0, 640 add a2, sp, a0 + vse32.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 64 + addiw a1, a1, 72 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a2) li a0, 25 slli a0, a0, 9 add a1, sp, a0 + vse32.v v8, (a1) csrr a0, vlenb - lui s9, 1 - addiw s9, s9, 72 - mul a0, a0, s9 + lui s11, 1 + addiw s11, s11, 80 + mul a0, a0, s11 add a0, sp, a0 - lui s9, 63 - addiw s9, s9, -1632 - add a0, a0, s9 + lui s11, 63 + addiw s11, s11, -1632 + add a0, a0, s11 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) lui a0, 3 addiw a0, a0, 384 add a0, sp, a0 - csrr s9, vlenb - lui ra, 1 - addiw ra, ra, 80 - mul s9, s9, ra - add s9, sp, s9 - lui ra, 63 - addiw ra, ra, -1632 - add s9, s9, ra - vl8r.v v8, (s9) # Unknown-size Folded Reload vse32.v v8, (a0) csrr ra, vlenb - lui s9, 1 - addiw s9, s9, 88 - mul ra, ra, s9 + lui s11, 1 + addiw s11, s11, 88 + mul ra, ra, s11 add ra, sp, ra - lui s9, 63 - addiw s9, s9, -1632 - add ra, ra, s9 - ld s9, 0(sp) + lui s11, 63 + addiw s11, s11, -1632 + add ra, ra, s11 + ld s11, 0(sp) vl8r.v v8, (ra) # Unknown-size Folded Reload ld ra, 8(sp) - vse32.v v8, (a5) - fsw fa5, 0(a4) - vle32.v v8, (a5) - csrr a4, vlenb - lui a5, 1 - addiw a5, a5, 88 - mul a4, a4, a5 - add a4, sp, a4 - lui a5, 63 - addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + vse32.v v8, (a3) + fsw fa5, 0(t5) + vle32.v v8, (a3) + csrr a3, vlenb + lui t5, 1 + addiw t5, t5, 88 + mul a3, a3, t5 + add a3, sp, a3 + lui t5, 63 + addiw t5, t5, -1632 + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vle32.v v8, (a0) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 80 - mul a0, a0, a4 + lui a3, 1 + addiw a3, a3, 80 + mul a0, a0, a3 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui a3, 63 + addiw a3, a3, -1632 + add a0, a0, a3 vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (a1) csrr a0, vlenb @@ -113480,15 +113266,15 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a4, 240(sp) # 8-byte Folded Reload - addi a4, a4, 28 - andi a4, a4, 1023 - slli a4, a4, 2 + ld t5, 112(sp) # 8-byte Folded Reload + addi t5, t5, 28 + andi t5, t5, 1023 + slli t5, t5, 2 lui a0, 33 addiw a0, a0, 256 add a1, sp, a0 - add a4, a1, a4 - vle32.v v8, (a6) + add t5, a1, t5 + vle32.v v8, (a4) csrr a0, vlenb lui a2, 1 addiw a2, a2, 56 @@ -113498,7 +113284,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t1) + vle32.v v8, (a6) csrr a0, vlenb lui a2, 1 addiw a2, a2, 48 @@ -113508,7 +113294,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t2) + vle32.v v8, (a7) csrr a0, vlenb lui a2, 1 addiw a2, a2, 40 @@ -113518,7 +113304,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a7) + vle32.v v8, (t0) csrr a0, vlenb lui a2, 1 addiw a2, a2, 32 @@ -113528,10 +113314,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 3 - addiw a0, a0, 1280 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t1) csrr a0, vlenb lui a2, 1 addiw a2, a2, 24 @@ -113541,10 +113324,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 3 - addiw a0, a0, 1408 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t2) csrr a0, vlenb lui a2, 1 addiw a2, a2, 16 @@ -113640,7 +113420,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a3) + vle32.v v8, (a5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -48 @@ -113660,7 +113440,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t5) + vle32.v v8, (t6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -64 @@ -113670,7 +113450,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t6) + vle32.v v8, (s2) csrr a0, vlenb lui a2, 1 addiw a2, a2, -72 @@ -113680,7 +113460,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s2) + vle32.v v8, (s3) csrr a0, vlenb lui a2, 1 addiw a2, a2, -80 @@ -113690,7 +113470,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s3) + vle32.v v8, (s4) csrr a0, vlenb lui a2, 1 addiw a2, a2, -88 @@ -113700,7 +113480,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s4) + vle32.v v8, (s5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -96 @@ -113710,7 +113490,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s5) + vle32.v v8, (s6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -104 @@ -113740,7 +113520,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s11) + vle32.v v8, (s9) csrr a0, vlenb li a2, 31 slli a2, a2, 7 @@ -113750,8 +113530,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 80(sp) # 8-byte Folded Reload - vle32.v v8, (a0) + vle32.v v8, (s10) csrr a0, vlenb lui a2, 1 addiw a2, a2, -136 @@ -113761,10 +113540,8 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 88(sp) # 8-byte Folded Reload - vle32.v v24, (a0) - ld a0, 96(sp) # 8-byte Folded Reload - vle32.v v16, (a0) + vle32.v v24, (s11) + vle32.v v16, (ra) ld a0, 104(sp) # 8-byte Folded Reload vle32.v v8, (a0) csrr a0, vlenb @@ -113777,203 +113554,203 @@ add a0, a0, a2 vl8r.v v0, (a0) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 96 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 33 addiw a0, a0, 384 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 96 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 208 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 33 addiw a0, a0, 512 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 216 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 33 addiw a0, a0, 640 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 192 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 33 addiw a0, a0, 768 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 200 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 33 addiw a0, a0, 896 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 176 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 33 addiw a0, a0, 1024 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 184 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 33 addiw a0, a0, 1152 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 160 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 33 addiw a0, a0, 1280 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 168 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 33 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 144 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 33 addiw a0, a0, 1536 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 152 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 33 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 128 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 33 addiw a0, a0, 1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 136 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 33 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 112 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 34 addiw a0, a0, -2048 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 112 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 120 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 34 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) - mv t3, s6 - add a5, a1, s6 + ld t3, 184(sp) # 8-byte Folded Reload + add a3, a1, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, 104 @@ -113983,25 +113760,25 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload - vse32.v v0, (a5) - flw fa5, 0(a4) + vse32.v v0, (a3) + flw fa5, 0(t5) lui a0, 2 addiw a0, a0, 256 - add a5, sp, a0 - add ra, a5, ra - sd ra, 104(sp) # 8-byte Folded Spill - vse32.v v8, (ra) - ld s11, 168(sp) # 8-byte Folded Reload - add a0, a5, s11 - sd a0, 96(sp) # 8-byte Folded Spill - vse32.v v16, (a0) - ld a1, 216(sp) # 8-byte Folded Reload - add a1, a5, a1 - sd a1, 88(sp) # 8-byte Folded Spill - vse32.v v24, (a1) - add s9, a5, s9 - sd s9, 80(sp) # 8-byte Folded Spill - sd s11, 8(sp) + add a3, sp, a0 + ld a0, 120(sp) # 8-byte Folded Reload + add a0, a3, a0 + sd a0, 104(sp) # 8-byte Folded Spill + vse32.v v8, (a0) + ld ra, 128(sp) # 8-byte Folded Reload + add ra, a3, ra + vse32.v v16, (ra) + ld s11, 136(sp) # 8-byte Folded Reload + add s11, a3, s11 + vse32.v v24, (s11) + ld s10, 144(sp) # 8-byte Folded Reload + add s10, a3, s10 + sd ra, 8(sp) + sd s11, 0(sp) csrr a0, vlenb lui a1, 1 addiw a1, a1, -136 @@ -114011,9 +113788,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s9) - add t0, a5, t0 - sd t0, 72(sp) # 8-byte Folded Spill + vse32.v v8, (s10) + ld s9, 152(sp) # 8-byte Folded Reload + add s9, a3, s9 csrr a0, vlenb li a1, 31 slli a1, a1, 7 @@ -114023,9 +113800,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t0) - ld s7, 128(sp) # 8-byte Folded Reload - add ra, a5, s7 + vse32.v v8, (s9) + ld s8, 160(sp) # 8-byte Folded Reload + add s8, a3, s8 csrr a0, vlenb lui a1, 1 addiw a1, a1, -120 @@ -114035,9 +113812,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (ra) - ld s6, 136(sp) # 8-byte Folded Reload - add s9, a5, s6 + vse32.v v8, (s8) + ld s7, 168(sp) # 8-byte Folded Reload + add s7, a3, s7 csrr a0, vlenb lui a1, 1 addiw a1, a1, -112 @@ -114047,9 +113824,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s9) - ld t0, 224(sp) # 8-byte Folded Reload - add s5, a5, t0 + vse32.v v8, (s7) + ld s6, 176(sp) # 8-byte Folded Reload + add s6, a3, s6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -104 @@ -114059,9 +113836,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s5) - ld s4, 184(sp) # 8-byte Folded Reload - add s4, a5, s4 + vse32.v v8, (s6) + ld s5, 208(sp) # 8-byte Folded Reload + add s5, a3, s5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -96 @@ -114071,9 +113848,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s4) - ld s3, 232(sp) # 8-byte Folded Reload - add s3, a5, s3 + vse32.v v8, (s5) + ld s4, 216(sp) # 8-byte Folded Reload + add s4, a3, s4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -88 @@ -114083,9 +113860,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s3) - ld s2, 144(sp) # 8-byte Folded Reload - add s2, a5, s2 + vse32.v v8, (s4) + ld s3, 224(sp) # 8-byte Folded Reload + add s3, a3, s3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -80 @@ -114095,9 +113872,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s2) - ld a7, 152(sp) # 8-byte Folded Reload - add t6, a5, a7 + vse32.v v8, (s3) + ld s2, 232(sp) # 8-byte Folded Reload + add s2, a3, s2 csrr a0, vlenb lui a1, 1 addiw a1, a1, -72 @@ -114107,9 +113884,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t6) - ld t5, 192(sp) # 8-byte Folded Reload - add t5, a5, t5 + vse32.v v8, (s2) + ld t6, 240(sp) # 8-byte Folded Reload + add t6, a3, t6 csrr a0, vlenb lui a1, 1 addiw a1, a1, -64 @@ -114119,9 +113896,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t5) - ld s8, 200(sp) # 8-byte Folded Reload - add t4, a5, s8 + vse32.v v8, (t6) + ld t4, 248(sp) # 8-byte Folded Reload + add t4, a3, t4 csrr a0, vlenb lui a1, 1 addiw a1, a1, -56 @@ -114132,8 +113909,8 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t4) - ld a6, 208(sp) # 8-byte Folded Reload - add a3, a5, a6 + ld a5, 200(sp) # 8-byte Folded Reload + add a5, a3, a5 csrr a0, vlenb lui a1, 1 addiw a1, a1, -48 @@ -114143,8 +113920,8 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a3) - add t3, a5, t3 + vse32.v v8, (a5) + add t3, a3, t3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -40 @@ -114155,234 +113932,236 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t3) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -32 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 3 addiw a0, a0, -1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -32 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -24 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload li a0, 5 slli a0, a0, 11 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -24 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 2 addiw a0, a0, 1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -16 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 2 addiw a0, a0, 1792 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + slli a0, a0, 12 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 2 addiw a0, a0, 1664 add a0, sp, a0 - csrr a1, vlenb - slli a1, a1, 12 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload li a0, 19 slli a0, a0, 9 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 2 addiw a0, a0, 1408 add t2, sp, a0 + vse32.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 16 + addiw a1, a1, 24 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 2 addiw a0, a0, 1280 add t1, sp, a0 + vse32.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 24 + addiw a1, a1, 32 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) lui a0, 2 addiw a0, a0, 1152 + add t0, sp, a0 + vse32.v v8, (t0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 40 + mul a0, a0, a1 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 32 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a0) + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload li a0, 9 slli a0, a0, 10 + add a7, sp, a0 + vse32.v v8, (a7) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 48 + mul a0, a0, a1 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 40 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (a0) + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 2 addiw a0, a0, 896 - add t2, sp, a0 + add a6, sp, a0 + vse32.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 48 + addiw a1, a1, 56 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 2 addiw a0, a0, 768 - add t1, sp, a0 + add a4, sp, a0 + vse32.v v8, (a4) + ld a0, 192(sp) # 8-byte Folded Reload + addi t5, a0, 476 + andi t5, t5, 1023 + slli t5, t5, 2 + add t5, a3, t5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 56 + addiw a1, a1, 64 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) - addi a4, s10, 476 - andi a4, a4, 1023 - slli a4, a4, 2 - add a4, a5, a4 lui a0, 2 addiw a0, a0, 640 add a2, sp, a0 + vse32.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 64 + addiw a1, a1, 72 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a2) li a0, 17 slli a0, a0, 9 add a1, sp, a0 + vse32.v v8, (a1) csrr a0, vlenb - lui s10, 1 - addiw s10, s10, 72 - mul a0, a0, s10 + lui s11, 1 + addiw s11, s11, 80 + mul a0, a0, s11 add a0, sp, a0 - lui s10, 63 - addiw s10, s10, -1632 - add a0, a0, s10 + lui s11, 63 + addiw s11, s11, -1632 + add a0, a0, s11 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) lui a0, 2 addiw a0, a0, 384 add a0, sp, a0 - csrr s10, vlenb - lui s11, 1 - addiw s11, s11, 80 - mul s10, s10, s11 - add s10, sp, s10 - lui s11, 63 - addiw s11, s11, -1632 - add s10, s10, s11 - vl8r.v v8, (s10) # Unknown-size Folded Reload vse32.v v8, (a0) - csrr s10, vlenb + csrr ra, vlenb lui s11, 1 addiw s11, s11, 88 - mul s10, s10, s11 - add s10, sp, s10 + mul ra, ra, s11 + add ra, sp, ra lui s11, 63 addiw s11, s11, -1632 - add s10, s10, s11 - ld s11, 8(sp) - vl8r.v v8, (s10) # Unknown-size Folded Reload - vse32.v v8, (a5) - fsw fa5, 0(a4) - vle32.v v8, (a5) - csrr a4, vlenb - lui a5, 1 - addiw a5, a5, 88 - mul a4, a4, a5 - add a4, sp, a4 - lui a5, 63 - addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add ra, ra, s11 + ld s11, 0(sp) + vl8r.v v8, (ra) # Unknown-size Folded Reload + ld ra, 8(sp) + vse32.v v8, (a3) + fsw fa5, 0(t5) + vle32.v v8, (a3) + csrr a3, vlenb + lui t5, 1 + addiw t5, t5, 88 + mul a3, a3, t5 + add a3, sp, a3 + lui t5, 63 + addiw t5, t5, -1632 + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vle32.v v8, (a0) csrr a0, vlenb - lui a4, 1 - addiw a4, a4, 80 - mul a0, a0, a4 + lui a3, 1 + addiw a3, a3, 80 + mul a0, a0, a3 add a0, sp, a0 - lui a4, 63 - addiw a4, a4, -1632 - add a0, a0, a4 + lui a3, 63 + addiw a3, a3, -1632 + add a0, a0, a3 vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (a1) csrr a0, vlenb @@ -114404,15 +114183,15 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a4, 240(sp) # 8-byte Folded Reload - addi a4, a4, 29 - andi a4, a4, 1023 - slli a4, a4, 2 + ld t5, 112(sp) # 8-byte Folded Reload + addi t5, t5, 29 + andi t5, t5, 1023 + slli t5, t5, 2 lui a0, 32 addiw a0, a0, 256 add a1, sp, a0 - add a4, a1, a4 - vle32.v v8, (t1) + add t5, a1, t5 + vle32.v v8, (a4) csrr a0, vlenb lui a2, 1 addiw a2, a2, 56 @@ -114422,7 +114201,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t2) + vle32.v v8, (a6) csrr a0, vlenb lui a2, 1 addiw a2, a2, 48 @@ -114432,10 +114211,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - li a0, 9 - slli a0, a0, 10 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (a7) csrr a0, vlenb lui a2, 1 addiw a2, a2, 40 @@ -114445,10 +114221,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 2 - addiw a0, a0, 1152 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t0) csrr a0, vlenb lui a2, 1 addiw a2, a2, 32 @@ -114458,10 +114231,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 2 - addiw a0, a0, 1280 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t1) csrr a0, vlenb lui a2, 1 addiw a2, a2, 24 @@ -114471,10 +114241,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 2 - addiw a0, a0, 1408 - add a0, sp, a0 - vle32.v v8, (a0) + vle32.v v8, (t2) csrr a0, vlenb lui a2, 1 addiw a2, a2, 16 @@ -114570,7 +114337,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a3) + vle32.v v8, (a5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -48 @@ -114590,7 +114357,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t5) + vle32.v v8, (t6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -64 @@ -114600,7 +114367,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t6) + vle32.v v8, (s2) csrr a0, vlenb lui a2, 1 addiw a2, a2, -72 @@ -114610,7 +114377,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s2) + vle32.v v8, (s3) csrr a0, vlenb lui a2, 1 addiw a2, a2, -80 @@ -114620,7 +114387,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s3) + vle32.v v8, (s4) csrr a0, vlenb lui a2, 1 addiw a2, a2, -88 @@ -114630,7 +114397,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s4) + vle32.v v8, (s5) csrr a0, vlenb lui a2, 1 addiw a2, a2, -96 @@ -114640,7 +114407,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s5) + vle32.v v8, (s6) csrr a0, vlenb lui a2, 1 addiw a2, a2, -104 @@ -114650,7 +114417,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (s9) + vle32.v v8, (s7) csrr a0, vlenb lui a2, 1 addiw a2, a2, -112 @@ -114660,7 +114427,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (ra) + vle32.v v8, (s8) csrr a0, vlenb lui a2, 1 addiw a2, a2, -120 @@ -114670,8 +114437,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 72(sp) # 8-byte Folded Reload - vle32.v v8, (a0) + vle32.v v8, (s9) csrr a0, vlenb li a2, 31 slli a2, a2, 7 @@ -114681,8 +114447,7 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 80(sp) # 8-byte Folded Reload - vle32.v v8, (a0) + vle32.v v8, (s10) csrr a0, vlenb lui a2, 1 addiw a2, a2, -136 @@ -114692,10 +114457,8 @@ addiw a2, a2, -1632 add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld a0, 88(sp) # 8-byte Folded Reload - vle32.v v24, (a0) - ld a0, 96(sp) # 8-byte Folded Reload - vle32.v v16, (a0) + vle32.v v24, (s11) + vle32.v v16, (ra) ld a0, 104(sp) # 8-byte Folded Reload vle32.v v8, (a0) csrr a0, vlenb @@ -114708,368 +114471,375 @@ add a0, a0, a2 vl8r.v v0, (a0) # Unknown-size Folded Reload vse32.v v0, (a1) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 96 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 32 addiw a0, a0, 384 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 96 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 208 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 32 addiw a0, a0, 512 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 216 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 32 addiw a0, a0, 640 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 192 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 32 addiw a0, a0, 768 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 200 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 32 addiw a0, a0, 896 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 176 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 32 addiw a0, a0, 1024 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 184 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 32 addiw a0, a0, 1152 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 160 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 32 addiw a0, a0, 1280 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 168 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 32 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 144 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 32 addiw a0, a0, 1536 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 152 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 32 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 128 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 32 addiw a0, a0, 1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 136 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 32 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 112 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 33 addiw a0, a0, -2048 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 112 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 120 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 63 + addiw a2, a2, -1632 + add a0, a0, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 33 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 63 - addiw a3, a3, -1632 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse32.v v0, (a0) - ld a0, 248(sp) # 8-byte Folded Reload - add a5, a1, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 104 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse32.v v0, (a5) - flw fa5, 0(a4) - li a1, 17 - slli a1, a1, 8 - add a4, sp, a1 - ld a1, 160(sp) # 8-byte Folded Reload - add a1, a4, a1 - sd a1, 104(sp) # 8-byte Folded Spill - vse32.v v8, (a1) - add s11, a4, s11 - sd s11, 96(sp) # 8-byte Folded Spill - vse32.v v16, (s11) - ld ra, 216(sp) # 8-byte Folded Reload - add ra, a4, ra - vse32.v v24, (ra) - ld s11, 176(sp) # 8-byte Folded Reload - add s11, a4, s11 - sd ra, 8(sp) - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -136 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (s11) - ld s10, 120(sp) # 8-byte Folded Reload - add s10, a4, s10 - csrr a1, vlenb - li a2, 31 - slli a2, a2, 7 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (s10) - add s9, a4, s7 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -120 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse32.v v8, (s9) - add s7, a4, s6 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -112 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + ld a2, 184(sp) # 8-byte Folded Reload + add a3, a1, a2 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 104 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vse32.v v0, (a3) + flw fa5, 0(t5) + li a0, 17 + slli a0, a0, 8 + add a3, sp, a0 + ld a0, 120(sp) # 8-byte Folded Reload + add a0, a3, a0 + sd a0, 104(sp) # 8-byte Folded Spill + vse32.v v8, (a0) + ld s9, 128(sp) # 8-byte Folded Reload + add s9, a3, s9 + sd s9, 96(sp) # 8-byte Folded Spill + vse32.v v16, (s9) + ld s8, 136(sp) # 8-byte Folded Reload + add s8, a3, s8 + vse32.v v24, (s8) + ld s7, 144(sp) # 8-byte Folded Reload + add s7, a3, s7 + sd s8, 8(sp) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -136 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (s7) - add s6, a4, t0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -104 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + ld s6, 152(sp) # 8-byte Folded Reload + add s6, a3, s6 + csrr a0, vlenb + li a1, 31 + slli a1, a1, 7 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (s6) - ld s5, 184(sp) # 8-byte Folded Reload - add s5, a4, s5 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -96 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + ld s5, 160(sp) # 8-byte Folded Reload + add s5, a3, s5 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -120 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (s5) - ld s4, 232(sp) # 8-byte Folded Reload - add s4, a4, s4 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -88 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + ld s4, 168(sp) # 8-byte Folded Reload + add s4, a3, s4 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -112 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (s4) - ld s3, 144(sp) # 8-byte Folded Reload - add s3, a4, s3 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -80 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + ld s3, 176(sp) # 8-byte Folded Reload + add s3, a3, s3 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -104 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (s3) - add s2, a4, a7 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -72 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + ld s2, 208(sp) # 8-byte Folded Reload + add s2, a3, s2 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -96 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (s2) - ld t6, 192(sp) # 8-byte Folded Reload - add t6, a4, t6 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -64 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + ld t6, 216(sp) # 8-byte Folded Reload + add t6, a3, t6 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -88 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t6) - add a5, a4, s8 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -56 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + ld t4, 224(sp) # 8-byte Folded Reload + add t4, a3, t4 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -80 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vse32.v v8, (t4) + ld a5, 232(sp) # 8-byte Folded Reload + add a5, a3, a5 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -72 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (a5) - add t3, a4, a6 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -48 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload + ld t3, 240(sp) # 8-byte Folded Reload + add t3, a3, t3 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -64 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (t3) - add t4, a4, a0 - mv s8, a0 + ld t5, 248(sp) # 8-byte Folded Reload + add t5, a3, t5 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -56 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vse32.v v8, (t5) + ld s10, 200(sp) # 8-byte Folded Reload + add s10, a3, s10 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -48 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vse32.v v8, (s10) + add s11, a3, a2 + mv s9, a2 csrr a0, vlenb lui a1, 1 addiw a1, a1, -40 @@ -115079,373 +114849,373 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t4) + vse32.v v8, (s11) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -32 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 2 addiw a0, a0, -1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -32 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -24 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload li a0, 3 slli a0, a0, 11 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -24 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 1 addiw a0, a0, 1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -16 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload li a0, 23 slli a0, a0, 8 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + slli a0, a0, 12 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 1 addiw a0, a0, 1664 add a0, sp, a0 - csrr a1, vlenb - slli a1, a1, 12 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload li a0, 11 slli a0, a0, 9 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 8 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 1 addiw a0, a0, 1408 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 16 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 24 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload li a0, 21 slli a0, a0, 8 add t2, sp, a0 + vse32.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 24 + addiw a1, a1, 32 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t2) lui a0, 1 addiw a0, a0, 1152 add t1, sp, a0 + vse32.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 32 + addiw a1, a1, 40 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t1) li a0, 5 slli a0, a0, 10 add t0, sp, a0 + vse32.v v8, (t0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 40 + addiw a1, a1, 48 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (t0) lui a0, 1 addiw a0, a0, 896 add a7, sp, a0 + vse32.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 48 + addiw a1, a1, 56 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a7) li a0, 19 slli a0, a0, 8 add a6, sp, a0 + vse32.v v8, (a6) + ld a0, 192(sp) # 8-byte Folded Reload + addi ra, a0, 493 + andi ra, ra, 1023 + slli ra, ra, 2 + add ra, a3, ra csrr a0, vlenb lui a1, 1 - addiw a1, a1, 56 + addiw a1, a1, 64 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a6) - ld a0, 112(sp) # 8-byte Folded Reload - addi t5, a0, 493 - andi t5, t5, 1023 - slli t5, t5, 2 - add t5, a4, t5 lui a0, 1 addiw a0, a0, 640 - add a3, sp, a0 + add a4, sp, a0 + vse32.v v8, (a4) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 64 + addiw a1, a1, 72 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a3) li a0, 9 slli a0, a0, 9 add a2, sp, a0 + vse32.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 72 + addiw a1, a1, 80 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a2) lui a0, 1 addiw a0, a0, 384 add a1, sp, a0 + vse32.v v8, (a1) csrr a0, vlenb - lui ra, 1 - addiw ra, ra, 80 - mul a0, a0, ra + lui s8, 1 + addiw s8, s8, 88 + mul a0, a0, s8 add a0, sp, a0 - lui ra, 63 - addiw ra, ra, -1632 - add a0, a0, ra + lui s8, 63 + addiw s8, s8, -1632 + add a0, a0, s8 + ld s8, 8(sp) vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) + vse32.v v8, (a3) + fsw fa5, 0(ra) + vle32.v v8, (s11) csrr a0, vlenb - lui ra, 1 - addiw ra, ra, 88 - mul a0, a0, ra + lui s11, 1 + addiw s11, s11, 88 + mul a0, a0, s11 add a0, sp, a0 - lui ra, 63 - addiw ra, ra, -1632 - add a0, a0, ra - ld ra, 8(sp) - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a4) - fsw fa5, 0(t5) - vle32.v v8, (t4) + lui s11, 63 + addiw s11, s11, -1632 + add a0, a0, s11 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (s10) csrr a0, vlenb - lui t4, 1 - addiw t4, t4, 88 - mul a0, a0, t4 + lui s10, 1 + addiw s10, s10, 80 + mul a0, a0, s10 add a0, sp, a0 - lui t4, 63 - addiw t4, t4, -1632 - add a0, a0, t4 + lui s10, 63 + addiw s10, s10, -1632 + add a0, a0, s10 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle32.v v8, (t5) + csrr a0, vlenb + lui t5, 1 + addiw t5, t5, 72 + mul a0, a0, t5 + add a0, sp, a0 + lui t5, 63 + addiw t5, t5, -1632 + add a0, a0, t5 vs8r.v v8, (a0) # Unknown-size Folded Spill vle32.v v8, (t3) csrr a0, vlenb lui t3, 1 - addiw t3, t3, 80 + addiw t3, t3, 64 mul a0, a0, t3 add a0, sp, a0 lui t3, 63 addiw t3, t3, -1632 add a0, a0, t3 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (a5) - csrr a0, vlenb - lui a5, 1 - addiw a5, a5, 72 - mul a0, a0, a5 - add a0, sp, a0 - lui a5, 63 - addiw a5, a5, -1632 - add a0, a0, a5 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle32.v v8, (t6) - csrr a0, vlenb - lui a5, 1 - addiw a5, a5, 64 - mul a0, a0, a5 - add a0, sp, a0 - lui a5, 63 - addiw a5, a5, -1632 - add a0, a0, a5 - vs8r.v v8, (a0) # Unknown-size Folded Spill lui a0, 31 addiw a0, a0, 256 add a0, sp, a0 - add a5, a0, s8 - vle32.v v8, (s2) - csrr t3, vlenb - slli t3, t3, 12 - add t3, sp, t3 - lui t4, 63 - addiw t4, t4, -1632 - add t3, t3, t4 - vs8r.v v8, (t3) # Unknown-size Folded Spill - vle32.v v8, (s3) - csrr t3, vlenb + add t3, a0, s9 + vle32.v v8, (a5) + csrr a5, vlenb + slli a5, a5, 12 + add a5, sp, a5 + lui t5, 63 + addiw t5, t5, -1632 + add a5, a5, t5 + vs8r.v v8, (a5) # Unknown-size Folded Spill + vle32.v v8, (t4) + csrr a5, vlenb lui t4, 1 addiw t4, t4, -16 - mul t3, t3, t4 - add t3, sp, t3 + mul a5, a5, t4 + add a5, sp, a5 lui t4, 63 addiw t4, t4, -1632 - add t3, t3, t4 - vs8r.v v8, (t3) # Unknown-size Folded Spill - vle32.v v8, (s4) - csrr t3, vlenb + add a5, a5, t4 + vs8r.v v8, (a5) # Unknown-size Folded Spill + vle32.v v8, (t6) + csrr a5, vlenb lui t4, 1 addiw t4, t4, -40 - mul t3, t3, t4 - add t3, sp, t3 + mul a5, a5, t4 + add a5, sp, a5 lui t4, 63 addiw t4, t4, -1632 - add t3, t3, t4 - vs8r.v v8, (t3) # Unknown-size Folded Spill - vle32.v v8, (s5) - csrr t3, vlenb + add a5, a5, t4 + vs8r.v v8, (a5) # Unknown-size Folded Spill + vle32.v v8, (s2) + csrr a5, vlenb lui t4, 1 addiw t4, t4, -56 - mul t3, t3, t4 - add t3, sp, t3 + mul a5, a5, t4 + add a5, sp, a5 lui t4, 63 addiw t4, t4, -1632 - add t3, t3, t4 - vs8r.v v8, (t3) # Unknown-size Folded Spill - vle32.v v8, (s6) - csrr t3, vlenb + add a5, a5, t4 + vs8r.v v8, (a5) # Unknown-size Folded Spill + vle32.v v8, (s3) + csrr a5, vlenb lui t4, 1 addiw t4, t4, -80 - mul t3, t3, t4 - add t3, sp, t3 + mul a5, a5, t4 + add a5, sp, a5 lui t4, 63 addiw t4, t4, -1632 - add t3, t3, t4 - vs8r.v v8, (t3) # Unknown-size Folded Spill - vle32.v v8, (s7) - csrr t3, vlenb + add a5, a5, t4 + vs8r.v v8, (a5) # Unknown-size Folded Spill + vle32.v v8, (s4) + csrr a5, vlenb lui t4, 1 addiw t4, t4, -96 - mul t3, t3, t4 - add t3, sp, t3 + mul a5, a5, t4 + add a5, sp, a5 lui t4, 63 addiw t4, t4, -1632 - add t3, t3, t4 - vs8r.v v8, (t3) # Unknown-size Folded Spill - vle32.v v8, (s9) - csrr t3, vlenb + add a5, a5, t4 + vs8r.v v8, (a5) # Unknown-size Folded Spill + vle32.v v8, (s5) + csrr a5, vlenb lui t4, 1 addiw t4, t4, -120 - mul t3, t3, t4 - add t3, sp, t3 - lui t4, 63 - addiw t4, t4, -1632 - add t3, t3, t4 - vs8r.v v8, (t3) # Unknown-size Folded Spill - vle32.v v8, (s10) - csrr t3, vlenb - lui t4, 1 - addiw t4, t4, -136 - mul t3, t3, t4 - add t3, sp, t3 + mul a5, a5, t4 + add a5, sp, a5 lui t4, 63 addiw t4, t4, -1632 - add t3, t3, t4 - vs8r.v v8, (t3) # Unknown-size Folded Spill - vle32.v v8, (s11) - csrr t3, vlenb + add a5, a5, t4 + vs8r.v v8, (a5) # Unknown-size Folded Spill + vle32.v v8, (s6) + csrr a5, vlenb li t4, 31 slli t4, t4, 7 - mul t3, t3, t4 - add t3, sp, t3 + mul a5, a5, t4 + add a5, sp, a5 lui t4, 63 addiw t4, t4, -1632 - add t3, t3, t4 - vs8r.v v8, (t3) # Unknown-size Folded Spill - vle32.v v24, (ra) - ld t3, 96(sp) # 8-byte Folded Reload - vle32.v v16, (t3) - ld t3, 104(sp) # 8-byte Folded Reload - vle32.v v8, (t3) - vle32.v v0, (a4) - csrr a4, vlenb - lui t3, 1 - addiw t3, t3, 56 - mul a4, a4, t3 - add a4, sp, a4 - lui t3, 63 - addiw t3, t3, -1632 - add a4, a4, t3 - vs8r.v v0, (a4) # Unknown-size Folded Spill + add a5, a5, t4 + vs8r.v v8, (a5) # Unknown-size Folded Spill + vle32.v v8, (s7) + csrr a5, vlenb + lui t4, 1 + addiw t4, t4, -136 + mul a5, a5, t4 + add a5, sp, a5 + lui t4, 63 + addiw t4, t4, -1632 + add a5, a5, t4 + vs8r.v v8, (a5) # Unknown-size Folded Spill + vle32.v v24, (s8) + ld a5, 96(sp) # 8-byte Folded Reload + vle32.v v16, (a5) + ld a5, 104(sp) # 8-byte Folded Reload + vle32.v v8, (a5) + vle32.v v0, (a3) + csrr a3, vlenb + lui a5, 1 + addiw a5, a5, 56 + mul a3, a3, a5 + add a3, sp, a3 + lui a5, 63 + addiw a5, a5, -1632 + add a3, a3, a5 + vs8r.v v0, (a3) # Unknown-size Folded Spill vle32.v v0, (a1) csrr a1, vlenb - lui a4, 1 - addiw a4, a4, 48 - mul a1, a1, a4 + lui a3, 1 + addiw a3, a3, 48 + mul a1, a1, a3 add a1, sp, a1 - lui a4, 63 - addiw a4, a4, -1632 - add a1, a1, a4 + lui a3, 63 + addiw a3, a3, -1632 + add a1, a1, a3 vs8r.v v0, (a1) # Unknown-size Folded Spill vle32.v v0, (a2) csrr a1, vlenb @@ -115457,7 +115227,7 @@ addiw a2, a2, -1632 add a1, a1, a2 vs8r.v v0, (a1) # Unknown-size Folded Spill - vle32.v v0, (a3) + vle32.v v0, (a4) csrr a1, vlenb lui a2, 1 addiw a2, a2, 32 @@ -115617,12 +115387,12 @@ addiw a2, a2, -1632 add a1, a1, a2 vl8r.v v0, (a1) # Unknown-size Folded Reload - vse32.v v0, (a5) - ld s10, 240(sp) # 8-byte Folded Reload - addi a4, s10, 30 - andi a4, a4, 1023 - slli a4, a4, 2 - add a4, a0, a4 + vse32.v v0, (t3) + ld s10, 112(sp) # 8-byte Folded Reload + addi a3, s10, 30 + andi a3, a3, 1023 + slli a3, a3, 2 + add a3, a0, a3 csrr a1, vlenb lui a2, 1 addiw a2, a2, 224 @@ -115633,238 +115403,238 @@ add a1, a1, a2 vl8r.v v0, (a1) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 96 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 31 addiw a0, a0, 384 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 96 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v0, (a1) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 208 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 31 addiw a0, a0, 512 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 208 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v0, (a1) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 216 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 31 addiw a0, a0, 640 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 216 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v0, (a1) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 192 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 31 addiw a0, a0, 768 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 192 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v0, (a1) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 200 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 31 addiw a0, a0, 896 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 200 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v0, (a1) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 176 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 31 addiw a0, a0, 1024 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 176 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v0, (a1) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 184 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 31 addiw a0, a0, 1152 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 184 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v0, (a1) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 160 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 31 addiw a0, a0, 1280 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 160 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v0, (a1) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 168 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 31 addiw a0, a0, 1408 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 168 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v0, (a1) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 144 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 31 addiw a0, a0, 1536 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 144 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v0, (a1) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 152 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 31 addiw a0, a0, 1664 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 152 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v0, (a1) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 128 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 31 addiw a0, a0, 1792 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 128 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v0, (a1) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 136 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 31 addiw a0, a0, 1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 136 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v0, (a1) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 112 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 32 addiw a0, a0, -2048 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 112 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v0, (a1) # Unknown-size Folded Reload vse32.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 120 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 32 addiw a0, a0, -1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 120 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v0, (a1) # Unknown-size Folded Reload vse32.v v0, (a0) - flw fa5, 0(a4) + flw fa5, 0(a3) addi s4, sp, 256 - ld a4, 160(sp) # 8-byte Folded Reload - add a4, s4, a4 - vse32.v v8, (a4) - ld a4, 168(sp) # 8-byte Folded Reload - add a4, s4, a4 - vse32.v v16, (a4) - ld a4, 216(sp) # 8-byte Folded Reload - add a4, s4, a4 - vse32.v v24, (a4) - ld a4, 176(sp) # 8-byte Folded Reload - add a4, s4, a4 + ld a3, 120(sp) # 8-byte Folded Reload + add a3, s4, a3 + vse32.v v8, (a3) + ld a3, 128(sp) # 8-byte Folded Reload + add a3, s4, a3 + vse32.v v16, (a3) + ld a3, 136(sp) # 8-byte Folded Reload + add a3, s4, a3 + vse32.v v24, (a3) + ld a3, 144(sp) # 8-byte Folded Reload + add a3, s4, a3 csrr a0, vlenb - li a1, 31 - slli a1, a1, 7 + lui a1, 1 + addiw a1, a1, -136 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a4) - ld a4, 120(sp) # 8-byte Folded Reload - add a4, s4, a4 + vse32.v v8, (a3) + ld a3, 152(sp) # 8-byte Folded Reload + add a3, s4, a3 csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -136 + li a1, 31 + slli a1, a1, 7 mul a0, a0, a1 add a0, sp, a0 lui a1, 63 addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a4) - ld a4, 128(sp) # 8-byte Folded Reload - add a4, s4, a4 + vse32.v v8, (a3) + ld a3, 160(sp) # 8-byte Folded Reload + add a3, s4, a3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -120 @@ -115874,9 +115644,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a4) - ld a4, 136(sp) # 8-byte Folded Reload - add a4, s4, a4 + vse32.v v8, (a3) + ld a3, 168(sp) # 8-byte Folded Reload + add a3, s4, a3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -96 @@ -115886,9 +115656,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a4) - ld a4, 224(sp) # 8-byte Folded Reload - add a4, s4, a4 + vse32.v v8, (a3) + ld a3, 176(sp) # 8-byte Folded Reload + add a3, s4, a3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -80 @@ -115898,9 +115668,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a4) - ld a4, 184(sp) # 8-byte Folded Reload - add a4, s4, a4 + vse32.v v8, (a3) + ld a3, 208(sp) # 8-byte Folded Reload + add a3, s4, a3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -56 @@ -115910,9 +115680,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a4) - ld a4, 232(sp) # 8-byte Folded Reload - add a4, s4, a4 + vse32.v v8, (a3) + ld a3, 216(sp) # 8-byte Folded Reload + add a3, s4, a3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -40 @@ -115922,9 +115692,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a4) - ld a4, 144(sp) # 8-byte Folded Reload - add a4, s4, a4 + vse32.v v8, (a3) + ld a3, 224(sp) # 8-byte Folded Reload + add a3, s4, a3 csrr a0, vlenb lui a1, 1 addiw a1, a1, -16 @@ -115934,9 +115704,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a4) - ld a4, 152(sp) # 8-byte Folded Reload - add a4, s4, a4 + vse32.v v8, (a3) + ld a3, 232(sp) # 8-byte Folded Reload + add a3, s4, a3 csrr a0, vlenb slli a0, a0, 12 add a0, sp, a0 @@ -115944,9 +115714,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a4) - ld a4, 192(sp) # 8-byte Folded Reload - add a4, s4, a4 + vse32.v v8, (a3) + ld a3, 240(sp) # 8-byte Folded Reload + add a3, s4, a3 csrr a0, vlenb lui a1, 1 addiw a1, a1, 64 @@ -115956,9 +115726,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a4) - ld a4, 200(sp) # 8-byte Folded Reload - add a4, s4, a4 + vse32.v v8, (a3) + ld a3, 248(sp) # 8-byte Folded Reload + add a3, s4, a3 csrr a0, vlenb lui a1, 1 addiw a1, a1, 72 @@ -115968,9 +115738,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a4) - ld a3, 208(sp) # 8-byte Folded Reload - add a3, s4, a3 + vse32.v v8, (a3) + ld a2, 200(sp) # 8-byte Folded Reload + add a2, s4, a2 csrr a0, vlenb lui a1, 1 addiw a1, a1, 80 @@ -115980,8 +115750,8 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a3) - add a3, s4, s8 + vse32.v v8, (a2) + add a2, s4, s9 csrr a0, vlenb lui a1, 1 addiw a1, a1, 88 @@ -115991,9 +115761,7 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a3) - addi s3, sp, 2047 - addi s3, s3, 129 + vse32.v v8, (a2) csrr a0, vlenb lui a1, 1 addiw a1, a1, -112 @@ -116003,9 +115771,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload + addi s3, sp, 2047 + addi s3, s3, 129 vse32.v v8, (s3) - addi s2, sp, 2047 - addi s2, s2, 1 csrr a0, vlenb lui a1, 1 addiw a1, a1, -104 @@ -116015,8 +115783,9 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload + addi s2, sp, 2047 + addi s2, s2, 1 vse32.v v8, (s2) - addi t6, sp, 1920 csrr a0, vlenb lui a1, 1 addiw a1, a1, -88 @@ -116026,8 +115795,8 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload + addi t6, sp, 1920 vse32.v v8, (t6) - addi t5, sp, 1792 csrr a0, vlenb lui a1, 1 addiw a1, a1, -72 @@ -116037,8 +115806,8 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload + addi t5, sp, 1792 vse32.v v8, (t5) - addi t4, sp, 1664 csrr a0, vlenb lui a1, 1 addiw a1, a1, -64 @@ -116048,8 +115817,8 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload + addi t4, sp, 1664 vse32.v v8, (t4) - addi t3, sp, 1536 csrr a0, vlenb lui a1, 1 addiw a1, a1, -48 @@ -116059,8 +115828,8 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload + addi t3, sp, 1536 vse32.v v8, (t3) - addi t2, sp, 1408 csrr a0, vlenb lui a1, 1 addiw a1, a1, -32 @@ -116070,8 +115839,8 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload + addi t2, sp, 1408 vse32.v v8, (t2) - addi t1, sp, 1280 csrr a0, vlenb lui a1, 1 addiw a1, a1, -24 @@ -116081,8 +115850,8 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload + addi t1, sp, 1280 vse32.v v8, (t1) - addi t0, sp, 1152 csrr a0, vlenb lui a1, 1 addiw a1, a1, -8 @@ -116092,8 +115861,8 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload + addi t0, sp, 1152 vse32.v v8, (t0) - addi a7, sp, 1024 csrr a0, vlenb lui a1, 1 addiw a1, a1, 8 @@ -116103,8 +115872,8 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload + addi a7, sp, 1024 vse32.v v8, (a7) - addi a6, sp, 896 csrr a0, vlenb lui a1, 1 addiw a1, a1, 16 @@ -116114,8 +115883,8 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload + addi a6, sp, 896 vse32.v v8, (a6) - addi a5, sp, 768 csrr a0, vlenb lui a1, 1 addiw a1, a1, 24 @@ -116125,13 +115894,13 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload + addi a5, sp, 768 vse32.v v8, (a5) - ld s5, 112(sp) # 8-byte Folded Reload - addi a4, s5, 510 - andi a4, a4, 1023 - slli a4, a4, 2 - add a4, s4, a4 - addi a2, sp, 640 + ld s5, 192(sp) # 8-byte Folded Reload + addi a3, s5, 510 + andi a3, a3, 1023 + slli a3, a3, 2 + add a3, s4, a3 csrr a0, vlenb lui a1, 1 addiw a1, a1, 32 @@ -116141,28 +115910,29 @@ addiw a1, a1, -1632 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a2) + addi a4, sp, 640 + vse32.v v8, (a4) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 40 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload addi a1, sp, 512 + vse32.v v8, (a1) csrr a0, vlenb lui s6, 1 - addiw s6, s6, 40 + addiw s6, s6, 48 mul a0, a0, s6 add a0, sp, a0 lui s6, 63 addiw s6, s6, -1632 add a0, a0, s6 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (a1) addi a0, sp, 384 - csrr s6, vlenb - lui s7, 1 - addiw s7, s7, 48 - mul s6, s6, s7 - add s6, sp, s6 - lui s7, 63 - addiw s7, s7, -1632 - add s6, s6, s7 - vl8r.v v8, (s6) # Unknown-size Folded Reload vse32.v v8, (a0) csrr s6, vlenb lui s7, 1 @@ -116174,2326 +115944,2326 @@ add s6, s6, s7 vl8r.v v8, (s6) # Unknown-size Folded Reload vse32.v v8, (s4) - fsw fa5, 0(a4) + fsw fa5, 0(a3) vle32.v v24, (s3) - vle32.v v8, (a3) - csrr a3, vlenb - lui a4, 1 - addiw a4, a4, 88 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 63 - addiw a4, a4, -1632 - add a3, a3, a4 - vs8r.v v8, (a3) # Unknown-size Folded Spill + vle32.v v8, (a2) + csrr a2, vlenb + lui a3, 1 + addiw a3, a3, 88 + mul a2, a2, a3 + add a2, sp, a2 + lui a3, 63 + addiw a3, a3, -1632 + add a2, a2, a3 + vs8r.v v8, (a2) # Unknown-size Folded Spill vsetivli zero, 1, e32, m8, ta, ma vslidedown.vi v8, v24, 31 - csrr a3, vlenb - lui a4, 1 - addiw a4, a4, -360 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 63 - addiw a4, a4, -1632 - add a3, a3, a4 - vs8r.v v8, (a3) # Unknown-size Folded Spill + csrr a2, vlenb + lui a3, 1 + addiw a3, a3, -360 + mul a2, a2, a3 + add a2, sp, a2 + lui a3, 63 + addiw a3, a3, -1632 + add a2, a2, a3 + vs8r.v v8, (a2) # Unknown-size Folded Spill vslidedown.vi v8, v24, 30 - csrr a3, vlenb - lui a4, 1 - addiw a4, a4, -344 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 63 - addiw a4, a4, -1632 - add a3, a3, a4 - vs8r.v v8, (a3) # Unknown-size Folded Spill + csrr a2, vlenb + lui a3, 1 + addiw a3, a3, -344 + mul a2, a2, a3 + add a2, sp, a2 + lui a3, 63 + addiw a3, a3, -1632 + add a2, a2, a3 + vs8r.v v8, (a2) # Unknown-size Folded Spill vslidedown.vi v8, v24, 29 - csrr a3, vlenb - lui a4, 1 - addiw a4, a4, -368 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 63 - addiw a4, a4, -1632 - add a3, a3, a4 - vs8r.v v8, (a3) # Unknown-size Folded Spill + csrr a2, vlenb + lui a3, 1 + addiw a3, a3, -368 + mul a2, a2, a3 + add a2, sp, a2 + lui a3, 63 + addiw a3, a3, -1632 + add a2, a2, a3 + vs8r.v v8, (a2) # Unknown-size Folded Spill vslidedown.vi v8, v24, 28 - csrr a3, vlenb - lui a4, 1 - addiw a4, a4, -376 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 63 - addiw a4, a4, -1632 - add a3, a3, a4 - vs8r.v v8, (a3) # Unknown-size Folded Spill + csrr a2, vlenb + lui a3, 1 + addiw a3, a3, -376 + mul a2, a2, a3 + add a2, sp, a2 + lui a3, 63 + addiw a3, a3, -1632 + add a2, a2, a3 + vs8r.v v8, (a2) # Unknown-size Folded Spill vslidedown.vi v8, v24, 27 - csrr a3, vlenb - li a4, 29 - slli a4, a4, 7 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 63 - addiw a4, a4, -1632 - add a3, a3, a4 - vs8r.v v8, (a3) # Unknown-size Folded Spill + csrr a2, vlenb + li a3, 29 + slli a3, a3, 7 + mul a2, a2, a3 + add a2, sp, a2 + lui a3, 63 + addiw a3, a3, -1632 + add a2, a2, a3 + vs8r.v v8, (a2) # Unknown-size Folded Spill vslidedown.vi v8, v24, 26 - csrr a3, vlenb - lui a4, 1 - addiw a4, a4, -392 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 63 - addiw a4, a4, -1632 - add a3, a3, a4 - vs8r.v v8, (a3) # Unknown-size Folded Spill + csrr a2, vlenb + lui a3, 1 + addiw a3, a3, -392 + mul a2, a2, a3 + add a2, sp, a2 + lui a3, 63 + addiw a3, a3, -1632 + add a2, a2, a3 + vs8r.v v8, (a2) # Unknown-size Folded Spill vslidedown.vi v8, v24, 25 - csrr a3, vlenb - lui a4, 1 - addiw a4, a4, -400 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 63 - addiw a4, a4, -1632 - add a3, a3, a4 - vs8r.v v8, (a3) # Unknown-size Folded Spill + csrr a2, vlenb + lui a3, 1 + addiw a3, a3, -400 + mul a2, a2, a3 + add a2, sp, a2 + lui a3, 63 + addiw a3, a3, -1632 + add a2, a2, a3 + vs8r.v v8, (a2) # Unknown-size Folded Spill vslidedown.vi v8, v24, 24 - csrr a3, vlenb - lui a4, 1 - addiw a4, a4, -408 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 63 - addiw a4, a4, -1632 - add a3, a3, a4 - vs8r.v v8, (a3) # Unknown-size Folded Spill + csrr a2, vlenb + lui a3, 1 + addiw a3, a3, -408 + mul a2, a2, a3 + add a2, sp, a2 + lui a3, 63 + addiw a3, a3, -1632 + add a2, a2, a3 + vs8r.v v8, (a2) # Unknown-size Folded Spill vslidedown.vi v8, v24, 23 - csrr a3, vlenb - lui a4, 1 - addiw a4, a4, -416 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 63 - addiw a4, a4, -1632 - add a3, a3, a4 - vs8r.v v8, (a3) # Unknown-size Folded Spill + csrr a2, vlenb + lui a3, 1 + addiw a3, a3, -416 + mul a2, a2, a3 + add a2, sp, a2 + lui a3, 63 + addiw a3, a3, -1632 + add a2, a2, a3 + vs8r.v v8, (a2) # Unknown-size Folded Spill vslidedown.vi v8, v24, 22 - csrr a3, vlenb - lui a4, 1 - addiw a4, a4, -424 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 63 - addiw a4, a4, -1632 - add a3, a3, a4 - vs8r.v v8, (a3) # Unknown-size Folded Spill + csrr a2, vlenb + lui a3, 1 + addiw a3, a3, -424 + mul a2, a2, a3 + add a2, sp, a2 + lui a3, 63 + addiw a3, a3, -1632 + add a2, a2, a3 + vs8r.v v8, (a2) # Unknown-size Folded Spill vslidedown.vi v8, v24, 21 - csrr a3, vlenb - lui a4, 1 - addiw a4, a4, -432 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 63 - addiw a4, a4, -1632 - add a3, a3, a4 - vs8r.v v8, (a3) # Unknown-size Folded Spill + csrr a2, vlenb + lui a3, 1 + addiw a3, a3, -432 + mul a2, a2, a3 + add a2, sp, a2 + lui a3, 63 + addiw a3, a3, -1632 + add a2, a2, a3 + vs8r.v v8, (a2) # Unknown-size Folded Spill vslidedown.vi v8, v24, 20 - csrr a3, vlenb - lui a4, 1 - addiw a4, a4, -440 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 63 - addiw a4, a4, -1632 - add a3, a3, a4 - vs8r.v v8, (a3) # Unknown-size Folded Spill + csrr a2, vlenb + lui a3, 1 + addiw a3, a3, -440 + mul a2, a2, a3 + add a2, sp, a2 + lui a3, 63 + addiw a3, a3, -1632 + add a2, a2, a3 + vs8r.v v8, (a2) # Unknown-size Folded Spill vslidedown.vi v8, v24, 19 - csrr a3, vlenb - lui a4, 1 - addiw a4, a4, -448 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 63 - addiw a4, a4, -1632 - add a3, a3, a4 - vs8r.v v8, (a3) # Unknown-size Folded Spill + csrr a2, vlenb + lui a3, 1 + addiw a3, a3, -448 + mul a2, a2, a3 + add a2, sp, a2 + lui a3, 63 + addiw a3, a3, -1632 + add a2, a2, a3 + vs8r.v v8, (a2) # Unknown-size Folded Spill vslidedown.vi v8, v24, 18 - csrr a3, vlenb - lui a4, 1 - addiw a4, a4, -456 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 63 - addiw a4, a4, -1632 - add a3, a3, a4 - vs8r.v v8, (a3) # Unknown-size Folded Spill + csrr a2, vlenb + lui a3, 1 + addiw a3, a3, -456 + mul a2, a2, a3 + add a2, sp, a2 + lui a3, 63 + addiw a3, a3, -1632 + add a2, a2, a3 + vs8r.v v8, (a2) # Unknown-size Folded Spill vslidedown.vi v8, v24, 17 - csrr a3, vlenb - lui a4, 1 - addiw a4, a4, -464 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 63 - addiw a4, a4, -1632 - add a3, a3, a4 - vs8r.v v8, (a3) # Unknown-size Folded Spill + csrr a2, vlenb + lui a3, 1 + addiw a3, a3, -464 + mul a2, a2, a3 + add a2, sp, a2 + lui a3, 63 + addiw a3, a3, -1632 + add a2, a2, a3 + vs8r.v v8, (a2) # Unknown-size Folded Spill vslidedown.vi v8, v24, 16 - csrr a3, vlenb - lui a4, 1 - addiw a4, a4, -472 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 63 - addiw a4, a4, -1632 - add a3, a3, a4 - vs8r.v v8, (a3) # Unknown-size Folded Spill - li a3, 32 - vsetvli zero, a3, e32, m8, ta, ma + csrr a2, vlenb + lui a3, 1 + addiw a3, a3, -472 + mul a2, a2, a3 + add a2, sp, a2 + lui a3, 63 + addiw a3, a3, -1632 + add a2, a2, a3 + vs8r.v v8, (a2) # Unknown-size Folded Spill + li a2, 32 + vsetvli zero, a2, e32, m8, ta, ma vle32.v v16, (s2) - csrr a4, vlenb + csrr a3, vlenb lui s2, 1 addiw s2, s2, 80 - mul a4, a4, s2 - add a4, sp, a4 + mul a3, a3, s2 + add a3, sp, a3 lui s2, 63 addiw s2, s2, -1632 - add a4, a4, s2 - vs8r.v v16, (a4) # Unknown-size Folded Spill + add a3, a3, s2 + vs8r.v v16, (a3) # Unknown-size Folded Spill vsetivli zero, 1, e32, m8, ta, ma vslidedown.vi v8, v16, 31 - csrr a4, vlenb + csrr a3, vlenb lui s2, 1 addiw s2, s2, -560 - mul a4, a4, s2 - add a4, sp, a4 + mul a3, a3, s2 + add a3, sp, a3 lui s2, 63 addiw s2, s2, -1632 - add a4, a4, s2 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, s2 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 30 - csrr a4, vlenb + csrr a3, vlenb lui s2, 1 addiw s2, s2, -576 - mul a4, a4, s2 - add a4, sp, a4 + mul a3, a3, s2 + add a3, sp, a3 lui s2, 63 addiw s2, s2, -1632 - add a4, a4, s2 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, s2 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 29 - csrr a4, vlenb + csrr a3, vlenb lui s2, 1 addiw s2, s2, -592 - mul a4, a4, s2 - add a4, sp, a4 + mul a3, a3, s2 + add a3, sp, a3 lui s2, 63 addiw s2, s2, -1632 - add a4, a4, s2 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, s2 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 28 - csrr a4, vlenb + csrr a3, vlenb lui s2, 1 addiw s2, s2, -352 - mul a4, a4, s2 - add a4, sp, a4 + mul a3, a3, s2 + add a3, sp, a3 lui s2, 63 addiw s2, s2, -1632 - add a4, a4, s2 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, s2 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 27 - csrr a4, vlenb + csrr a3, vlenb lui s2, 1 addiw s2, s2, -608 - mul a4, a4, s2 - add a4, sp, a4 + mul a3, a3, s2 + add a3, sp, a3 lui s2, 63 addiw s2, s2, -1632 - add a4, a4, s2 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, s2 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 26 - csrr a4, vlenb + csrr a3, vlenb lui s2, 1 addiw s2, s2, -624 - mul a4, a4, s2 - add a4, sp, a4 + mul a3, a3, s2 + add a3, sp, a3 lui s2, 63 addiw s2, s2, -1632 - add a4, a4, s2 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, s2 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 25 - csrr a4, vlenb + csrr a3, vlenb li s2, 27 slli s2, s2, 7 - mul a4, a4, s2 - add a4, sp, a4 + mul a3, a3, s2 + add a3, sp, a3 lui s2, 63 addiw s2, s2, -1632 - add a4, a4, s2 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, s2 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 24 - csrr a4, vlenb + csrr a3, vlenb lui s2, 1 addiw s2, s2, -656 - mul a4, a4, s2 - add a4, sp, a4 + mul a3, a3, s2 + add a3, sp, a3 lui s2, 63 addiw s2, s2, -1632 - add a4, a4, s2 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, s2 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 23 - csrr a4, vlenb + csrr a3, vlenb lui s2, 1 addiw s2, s2, -664 - mul a4, a4, s2 - add a4, sp, a4 + mul a3, a3, s2 + add a3, sp, a3 lui s2, 63 addiw s2, s2, -1632 - add a4, a4, s2 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, s2 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 22 - csrr a4, vlenb + csrr a3, vlenb lui s2, 1 addiw s2, s2, -672 - mul a4, a4, s2 - add a4, sp, a4 + mul a3, a3, s2 + add a3, sp, a3 lui s2, 63 addiw s2, s2, -1632 - add a4, a4, s2 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, s2 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 21 - csrr a4, vlenb + csrr a3, vlenb lui s2, 1 addiw s2, s2, -680 - mul a4, a4, s2 - add a4, sp, a4 + mul a3, a3, s2 + add a3, sp, a3 lui s2, 63 addiw s2, s2, -1632 - add a4, a4, s2 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, s2 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 20 - csrr a4, vlenb + csrr a3, vlenb lui s2, 1 addiw s2, s2, -688 - mul a4, a4, s2 - add a4, sp, a4 + mul a3, a3, s2 + add a3, sp, a3 lui s2, 63 addiw s2, s2, -1632 - add a4, a4, s2 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, s2 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 19 - csrr a4, vlenb + csrr a3, vlenb lui s2, 1 addiw s2, s2, -696 - mul a4, a4, s2 - add a4, sp, a4 + mul a3, a3, s2 + add a3, sp, a3 lui s2, 63 addiw s2, s2, -1632 - add a4, a4, s2 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, s2 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 18 - csrr a4, vlenb + csrr a3, vlenb lui s2, 1 addiw s2, s2, -704 - mul a4, a4, s2 - add a4, sp, a4 + mul a3, a3, s2 + add a3, sp, a3 lui s2, 63 addiw s2, s2, -1632 - add a4, a4, s2 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, s2 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 17 - csrr a4, vlenb + csrr a3, vlenb lui s2, 1 addiw s2, s2, -712 - mul a4, a4, s2 - add a4, sp, a4 + mul a3, a3, s2 + add a3, sp, a3 lui s2, 63 addiw s2, s2, -1632 - add a4, a4, s2 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, s2 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 16 - csrr a4, vlenb + csrr a3, vlenb lui s2, 1 addiw s2, s2, -720 - mul a4, a4, s2 - add a4, sp, a4 + mul a3, a3, s2 + add a3, sp, a3 lui s2, 63 addiw s2, s2, -1632 - add a4, a4, s2 - vs8r.v v8, (a4) # Unknown-size Folded Spill - vsetvli zero, a3, e32, m8, ta, ma - li a3, 32 + add a3, a3, s2 + vs8r.v v8, (a3) # Unknown-size Folded Spill + vsetvli zero, a2, e32, m8, ta, ma + li a2, 32 vle32.v v16, (t6) - csrr a4, vlenb + csrr a3, vlenb lui t6, 1 addiw t6, t6, 72 - mul a4, a4, t6 - add a4, sp, a4 + mul a3, a3, t6 + add a3, sp, a3 lui t6, 63 addiw t6, t6, -1632 - add a4, a4, t6 - vs8r.v v16, (a4) # Unknown-size Folded Spill + add a3, a3, t6 + vs8r.v v16, (a3) # Unknown-size Folded Spill vsetivli zero, 1, e32, m8, ta, ma vslidedown.vi v8, v16, 31 - csrr a4, vlenb + csrr a3, vlenb lui t6, 1 addiw t6, t6, -792 - mul a4, a4, t6 - add a4, sp, a4 + mul a3, a3, t6 + add a3, sp, a3 lui t6, 63 addiw t6, t6, -1632 - add a4, a4, t6 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t6 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 30 - csrr a4, vlenb + csrr a3, vlenb lui t6, 1 addiw t6, t6, -808 - mul a4, a4, t6 - add a4, sp, a4 + mul a3, a3, t6 + add a3, sp, a3 lui t6, 63 addiw t6, t6, -1632 - add a4, a4, t6 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t6 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 29 - csrr a4, vlenb + csrr a3, vlenb lui t6, 1 addiw t6, t6, -824 - mul a4, a4, t6 - add a4, sp, a4 + mul a3, a3, t6 + add a3, sp, a3 lui t6, 63 addiw t6, t6, -1632 - add a4, a4, t6 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t6 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 28 - csrr a4, vlenb + csrr a3, vlenb lui t6, 1 addiw t6, t6, -840 - mul a4, a4, t6 - add a4, sp, a4 + mul a3, a3, t6 + add a3, sp, a3 lui t6, 63 addiw t6, t6, -1632 - add a4, a4, t6 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t6 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 27 - csrr a4, vlenb + csrr a3, vlenb lui t6, 1 addiw t6, t6, -856 - mul a4, a4, t6 - add a4, sp, a4 + mul a3, a3, t6 + add a3, sp, a3 lui t6, 63 addiw t6, t6, -1632 - add a4, a4, t6 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t6 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 26 - csrr a4, vlenb + csrr a3, vlenb lui t6, 1 addiw t6, t6, -48 - mul a4, a4, t6 - add a4, sp, a4 + mul a3, a3, t6 + add a3, sp, a3 lui t6, 63 addiw t6, t6, -1632 - add a4, a4, t6 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t6 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 25 - csrr a4, vlenb + csrr a3, vlenb lui t6, 1 addiw t6, t6, -872 - mul a4, a4, t6 - add a4, sp, a4 + mul a3, a3, t6 + add a3, sp, a3 lui t6, 63 addiw t6, t6, -1632 - add a4, a4, t6 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t6 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 24 - csrr a4, vlenb + csrr a3, vlenb lui t6, 1 addiw t6, t6, -888 - mul a4, a4, t6 - add a4, sp, a4 + mul a3, a3, t6 + add a3, sp, a3 lui t6, 63 addiw t6, t6, -1632 - add a4, a4, t6 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t6 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 23 - csrr a4, vlenb + csrr a3, vlenb li t6, 25 slli t6, t6, 7 - mul a4, a4, t6 - add a4, sp, a4 + mul a3, a3, t6 + add a3, sp, a3 lui t6, 63 addiw t6, t6, -1632 - add a4, a4, t6 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t6 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 22 - csrr a4, vlenb + csrr a3, vlenb lui t6, 1 addiw t6, t6, -904 - mul a4, a4, t6 - add a4, sp, a4 + mul a3, a3, t6 + add a3, sp, a3 lui t6, 63 addiw t6, t6, -1632 - add a4, a4, t6 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t6 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 21 - csrr a4, vlenb + csrr a3, vlenb lui t6, 1 addiw t6, t6, -912 - mul a4, a4, t6 - add a4, sp, a4 + mul a3, a3, t6 + add a3, sp, a3 lui t6, 63 addiw t6, t6, -1632 - add a4, a4, t6 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t6 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 20 - csrr a4, vlenb + csrr a3, vlenb lui t6, 1 addiw t6, t6, -920 - mul a4, a4, t6 - add a4, sp, a4 + mul a3, a3, t6 + add a3, sp, a3 lui t6, 63 addiw t6, t6, -1632 - add a4, a4, t6 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t6 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 19 - csrr a4, vlenb + csrr a3, vlenb lui t6, 1 addiw t6, t6, -928 - mul a4, a4, t6 - add a4, sp, a4 + mul a3, a3, t6 + add a3, sp, a3 lui t6, 63 addiw t6, t6, -1632 - add a4, a4, t6 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t6 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 18 - csrr a4, vlenb + csrr a3, vlenb lui t6, 1 addiw t6, t6, -936 - mul a4, a4, t6 - add a4, sp, a4 + mul a3, a3, t6 + add a3, sp, a3 lui t6, 63 addiw t6, t6, -1632 - add a4, a4, t6 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t6 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 17 - csrr a4, vlenb + csrr a3, vlenb lui t6, 1 addiw t6, t6, -944 - mul a4, a4, t6 - add a4, sp, a4 + mul a3, a3, t6 + add a3, sp, a3 lui t6, 63 addiw t6, t6, -1632 - add a4, a4, t6 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t6 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 16 - csrr a4, vlenb + csrr a3, vlenb lui t6, 1 addiw t6, t6, -952 - mul a4, a4, t6 - add a4, sp, a4 + mul a3, a3, t6 + add a3, sp, a3 lui t6, 63 addiw t6, t6, -1632 - add a4, a4, t6 - vs8r.v v8, (a4) # Unknown-size Folded Spill - vsetvli zero, a3, e32, m8, ta, ma + add a3, a3, t6 + vs8r.v v8, (a3) # Unknown-size Folded Spill + vsetvli zero, a2, e32, m8, ta, ma vle32.v v16, (t5) - csrr a4, vlenb + csrr a3, vlenb lui t5, 1 addiw t5, t5, 64 - mul a4, a4, t5 - add a4, sp, a4 + mul a3, a3, t5 + add a3, sp, a3 lui t5, 63 addiw t5, t5, -1632 - add a4, a4, t5 - vs8r.v v16, (a4) # Unknown-size Folded Spill + add a3, a3, t5 + vs8r.v v16, (a3) # Unknown-size Folded Spill vsetivli zero, 1, e32, m8, ta, ma vslidedown.vi v8, v16, 31 - csrr a4, vlenb + csrr a3, vlenb li t5, 3 slli t5, t5, 10 - mul a4, a4, t5 - add a4, sp, a4 + mul a3, a3, t5 + add a3, sp, a3 lui t5, 63 addiw t5, t5, -1632 - add a4, a4, t5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 30 - csrr a4, vlenb + csrr a3, vlenb lui t5, 1 addiw t5, t5, -1040 - mul a4, a4, t5 - add a4, sp, a4 + mul a3, a3, t5 + add a3, sp, a3 lui t5, 63 addiw t5, t5, -1632 - add a4, a4, t5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 29 - csrr a4, vlenb + csrr a3, vlenb lui t5, 1 addiw t5, t5, -1056 - mul a4, a4, t5 - add a4, sp, a4 + mul a3, a3, t5 + add a3, sp, a3 lui t5, 63 addiw t5, t5, -1632 - add a4, a4, t5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 28 - csrr a4, vlenb + csrr a3, vlenb lui t5, 1 addiw t5, t5, -1072 - mul a4, a4, t5 - add a4, sp, a4 + mul a3, a3, t5 + add a3, sp, a3 lui t5, 63 addiw t5, t5, -1632 - add a4, a4, t5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 27 - csrr a4, vlenb + csrr a3, vlenb lui t5, 1 addiw t5, t5, -1088 - mul a4, a4, t5 - add a4, sp, a4 + mul a3, a3, t5 + add a3, sp, a3 lui t5, 63 addiw t5, t5, -1632 - add a4, a4, t5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 26 - csrr a4, vlenb + csrr a3, vlenb lui t5, 1 addiw t5, t5, -1104 - mul a4, a4, t5 - add a4, sp, a4 + mul a3, a3, t5 + add a3, sp, a3 lui t5, 63 addiw t5, t5, -1632 - add a4, a4, t5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 25 - csrr a4, vlenb + csrr a3, vlenb lui t5, 1 addiw t5, t5, -1120 - mul a4, a4, t5 - add a4, sp, a4 + mul a3, a3, t5 + add a3, sp, a3 lui t5, 63 addiw t5, t5, -1632 - add a4, a4, t5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 24 - csrr a4, vlenb + csrr a3, vlenb lui t5, 1 addiw t5, t5, -56 - mul a4, a4, t5 - add a4, sp, a4 + mul a3, a3, t5 + add a3, sp, a3 lui t5, 63 addiw t5, t5, -1632 - add a4, a4, t5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 23 - csrr a4, vlenb + csrr a3, vlenb lui t5, 1 addiw t5, t5, -1128 - mul a4, a4, t5 - add a4, sp, a4 + mul a3, a3, t5 + add a3, sp, a3 lui t5, 63 addiw t5, t5, -1632 - add a4, a4, t5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 22 - csrr a4, vlenb + csrr a3, vlenb lui t5, 1 addiw t5, t5, -1136 - mul a4, a4, t5 - add a4, sp, a4 + mul a3, a3, t5 + add a3, sp, a3 lui t5, 63 addiw t5, t5, -1632 - add a4, a4, t5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 21 - csrr a4, vlenb + csrr a3, vlenb lui t5, 1 addiw t5, t5, -1144 - mul a4, a4, t5 - add a4, sp, a4 + mul a3, a3, t5 + add a3, sp, a3 lui t5, 63 addiw t5, t5, -1632 - add a4, a4, t5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 20 - csrr a4, vlenb + csrr a3, vlenb li t5, 23 slli t5, t5, 7 - mul a4, a4, t5 - add a4, sp, a4 + mul a3, a3, t5 + add a3, sp, a3 lui t5, 63 addiw t5, t5, -1632 - add a4, a4, t5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 19 - csrr a4, vlenb + csrr a3, vlenb lui t5, 1 addiw t5, t5, -1160 - mul a4, a4, t5 - add a4, sp, a4 + mul a3, a3, t5 + add a3, sp, a3 lui t5, 63 addiw t5, t5, -1632 - add a4, a4, t5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 18 - csrr a4, vlenb + csrr a3, vlenb lui t5, 1 addiw t5, t5, -1168 - mul a4, a4, t5 - add a4, sp, a4 + mul a3, a3, t5 + add a3, sp, a3 lui t5, 63 addiw t5, t5, -1632 - add a4, a4, t5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 17 - csrr a4, vlenb + csrr a3, vlenb lui t5, 1 addiw t5, t5, -1176 - mul a4, a4, t5 - add a4, sp, a4 + mul a3, a3, t5 + add a3, sp, a3 lui t5, 63 addiw t5, t5, -1632 - add a4, a4, t5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 16 - csrr a4, vlenb + csrr a3, vlenb lui t5, 1 addiw t5, t5, -1184 - mul a4, a4, t5 - add a4, sp, a4 + mul a3, a3, t5 + add a3, sp, a3 lui t5, 63 addiw t5, t5, -1632 - add a4, a4, t5 - vs8r.v v8, (a4) # Unknown-size Folded Spill - vsetvli zero, a3, e32, m8, ta, ma + add a3, a3, t5 + vs8r.v v8, (a3) # Unknown-size Folded Spill + vsetvli zero, a2, e32, m8, ta, ma vle32.v v16, (t4) - csrr a4, vlenb + csrr a3, vlenb lui t4, 1 addiw t4, t4, 56 - mul a4, a4, t4 - add a4, sp, a4 + mul a3, a3, t4 + add a3, sp, a3 lui t4, 63 addiw t4, t4, -1632 - add a4, a4, t4 - vs8r.v v16, (a4) # Unknown-size Folded Spill + add a3, a3, t4 + vs8r.v v16, (a3) # Unknown-size Folded Spill vsetivli zero, 1, e32, m8, ta, ma vslidedown.vi v8, v16, 31 - csrr a4, vlenb + csrr a3, vlenb lui t4, 1 addiw t4, t4, -1256 - mul a4, a4, t4 - add a4, sp, a4 + mul a3, a3, t4 + add a3, sp, a3 lui t4, 63 addiw t4, t4, -1632 - add a4, a4, t4 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t4 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 30 - csrr a4, vlenb + csrr a3, vlenb lui t4, 1 addiw t4, t4, -1272 - mul a4, a4, t4 - add a4, sp, a4 + mul a3, a3, t4 + add a3, sp, a3 lui t4, 63 addiw t4, t4, -1632 - add a4, a4, t4 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t4 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 29 - csrr a4, vlenb + csrr a3, vlenb lui t4, 1 addiw t4, t4, -1288 - mul a4, a4, t4 - add a4, sp, a4 + mul a3, a3, t4 + add a3, sp, a3 lui t4, 63 addiw t4, t4, -1632 - add a4, a4, t4 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t4 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 28 - csrr a4, vlenb + csrr a3, vlenb lui t4, 1 addiw t4, t4, -1304 - mul a4, a4, t4 - add a4, sp, a4 + mul a3, a3, t4 + add a3, sp, a3 lui t4, 63 addiw t4, t4, -1632 - add a4, a4, t4 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t4 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 27 - csrr a4, vlenb + csrr a3, vlenb lui t4, 1 addiw t4, t4, -1320 - mul a4, a4, t4 - add a4, sp, a4 + mul a3, a3, t4 + add a3, sp, a3 lui t4, 63 addiw t4, t4, -1632 - add a4, a4, t4 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t4 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 26 - csrr a4, vlenb + csrr a3, vlenb lui t4, 1 addiw t4, t4, -1336 - mul a4, a4, t4 - add a4, sp, a4 + mul a3, a3, t4 + add a3, sp, a3 lui t4, 63 addiw t4, t4, -1632 - add a4, a4, t4 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t4 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 25 - csrr a4, vlenb + csrr a3, vlenb lui t4, 1 addiw t4, t4, -1352 - mul a4, a4, t4 - add a4, sp, a4 + mul a3, a3, t4 + add a3, sp, a3 lui t4, 63 addiw t4, t4, -1632 - add a4, a4, t4 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t4 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 24 - csrr a4, vlenb + csrr a3, vlenb lui t4, 1 addiw t4, t4, -1360 - mul a4, a4, t4 - add a4, sp, a4 + mul a3, a3, t4 + add a3, sp, a3 lui t4, 63 addiw t4, t4, -1632 - add a4, a4, t4 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t4 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 23 - csrr a4, vlenb + csrr a3, vlenb lui t4, 1 addiw t4, t4, -1368 - mul a4, a4, t4 - add a4, sp, a4 + mul a3, a3, t4 + add a3, sp, a3 lui t4, 63 addiw t4, t4, -1632 - add a4, a4, t4 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t4 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 22 - csrr a4, vlenb + csrr a3, vlenb lui t4, 1 addiw t4, t4, -72 - mul a4, a4, t4 - add a4, sp, a4 + mul a3, a3, t4 + add a3, sp, a3 lui t4, 63 addiw t4, t4, -1632 - add a4, a4, t4 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t4 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 21 - csrr a4, vlenb + csrr a3, vlenb lui t4, 1 addiw t4, t4, -1376 - mul a4, a4, t4 - add a4, sp, a4 + mul a3, a3, t4 + add a3, sp, a3 lui t4, 63 addiw t4, t4, -1632 - add a4, a4, t4 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t4 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 20 - csrr a4, vlenb + csrr a3, vlenb lui t4, 1 addiw t4, t4, -1384 - mul a4, a4, t4 - add a4, sp, a4 + mul a3, a3, t4 + add a3, sp, a3 lui t4, 63 addiw t4, t4, -1632 - add a4, a4, t4 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t4 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 19 - csrr a4, vlenb + csrr a3, vlenb lui t4, 1 addiw t4, t4, -1392 - mul a4, a4, t4 - add a4, sp, a4 + mul a3, a3, t4 + add a3, sp, a3 lui t4, 63 addiw t4, t4, -1632 - add a4, a4, t4 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t4 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 18 - csrr a4, vlenb + csrr a3, vlenb lui t4, 1 addiw t4, t4, -1400 - mul a4, a4, t4 - add a4, sp, a4 + mul a3, a3, t4 + add a3, sp, a3 lui t4, 63 addiw t4, t4, -1632 - add a4, a4, t4 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t4 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 17 - csrr a4, vlenb + csrr a3, vlenb li t4, 21 slli t4, t4, 7 - mul a4, a4, t4 - add a4, sp, a4 + mul a3, a3, t4 + add a3, sp, a3 lui t4, 63 addiw t4, t4, -1632 - add a4, a4, t4 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t4 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 16 - csrr a4, vlenb + csrr a3, vlenb lui t4, 1 addiw t4, t4, -1416 - mul a4, a4, t4 - add a4, sp, a4 + mul a3, a3, t4 + add a3, sp, a3 lui t4, 63 addiw t4, t4, -1632 - add a4, a4, t4 - vs8r.v v8, (a4) # Unknown-size Folded Spill - vsetvli zero, a3, e32, m8, ta, ma + add a3, a3, t4 + vs8r.v v8, (a3) # Unknown-size Folded Spill + vsetvli zero, a2, e32, m8, ta, ma vle32.v v16, (t3) - csrr a4, vlenb + csrr a3, vlenb lui t3, 1 addiw t3, t3, 40 - mul a4, a4, t3 - add a4, sp, a4 + mul a3, a3, t3 + add a3, sp, a3 lui t3, 63 addiw t3, t3, -1632 - add a4, a4, t3 - vs8r.v v16, (a4) # Unknown-size Folded Spill + add a3, a3, t3 + vs8r.v v16, (a3) # Unknown-size Folded Spill vsetivli zero, 1, e32, m8, ta, ma vslidedown.vi v8, v16, 31 - csrr a4, vlenb + csrr a3, vlenb lui t3, 1 addiw t3, t3, -1496 - mul a4, a4, t3 - add a4, sp, a4 + mul a3, a3, t3 + add a3, sp, a3 lui t3, 63 addiw t3, t3, -1632 - add a4, a4, t3 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t3 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 30 - csrr a4, vlenb + csrr a3, vlenb lui t3, 1 addiw t3, t3, -1512 - mul a4, a4, t3 - add a4, sp, a4 + mul a3, a3, t3 + add a3, sp, a3 lui t3, 63 addiw t3, t3, -1632 - add a4, a4, t3 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t3 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 29 - csrr a4, vlenb + csrr a3, vlenb lui t3, 1 addiw t3, t3, -1528 - mul a4, a4, t3 - add a4, sp, a4 + mul a3, a3, t3 + add a3, sp, a3 lui t3, 63 addiw t3, t3, -1632 - add a4, a4, t3 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t3 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 28 - csrr a4, vlenb + csrr a3, vlenb li t3, 5 slli t3, t3, 9 - mul a4, a4, t3 - add a4, sp, a4 + mul a3, a3, t3 + add a3, sp, a3 lui t3, 63 addiw t3, t3, -1632 - add a4, a4, t3 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t3 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 27 - csrr a4, vlenb + csrr a3, vlenb lui t3, 1 addiw t3, t3, -1560 - mul a4, a4, t3 - add a4, sp, a4 + mul a3, a3, t3 + add a3, sp, a3 lui t3, 63 addiw t3, t3, -1632 - add a4, a4, t3 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t3 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 26 - csrr a4, vlenb + csrr a3, vlenb lui t3, 1 addiw t3, t3, -1576 - mul a4, a4, t3 - add a4, sp, a4 + mul a3, a3, t3 + add a3, sp, a3 lui t3, 63 addiw t3, t3, -1632 - add a4, a4, t3 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t3 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 25 - csrr a4, vlenb + csrr a3, vlenb lui t3, 1 addiw t3, t3, -1584 - mul a4, a4, t3 - add a4, sp, a4 + mul a3, a3, t3 + add a3, sp, a3 lui t3, 63 addiw t3, t3, -1632 - add a4, a4, t3 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t3 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 24 - csrr a4, vlenb + csrr a3, vlenb lui t3, 1 addiw t3, t3, -1592 - mul a4, a4, t3 - add a4, sp, a4 + mul a3, a3, t3 + add a3, sp, a3 lui t3, 63 addiw t3, t3, -1632 - add a4, a4, t3 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t3 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 23 - csrr a4, vlenb + csrr a3, vlenb lui t3, 1 addiw t3, t3, -1600 - mul a4, a4, t3 - add a4, sp, a4 + mul a3, a3, t3 + add a3, sp, a3 lui t3, 63 addiw t3, t3, -1632 - add a4, a4, t3 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t3 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 22 - csrr a4, vlenb + csrr a3, vlenb lui t3, 1 addiw t3, t3, -1608 - mul a4, a4, t3 - add a4, sp, a4 + mul a3, a3, t3 + add a3, sp, a3 lui t3, 63 addiw t3, t3, -1632 - add a4, a4, t3 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t3 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 21 - csrr a4, vlenb + csrr a3, vlenb lui t3, 1 addiw t3, t3, -1616 - mul a4, a4, t3 - add a4, sp, a4 + mul a3, a3, t3 + add a3, sp, a3 lui t3, 63 addiw t3, t3, -1632 - add a4, a4, t3 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t3 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 20 - csrr a4, vlenb + csrr a3, vlenb lui t3, 1 addiw t3, t3, -88 - mul a4, a4, t3 - add a4, sp, a4 + mul a3, a3, t3 + add a3, sp, a3 lui t3, 63 addiw t3, t3, -1632 - add a4, a4, t3 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t3 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 19 - csrr a4, vlenb + csrr a3, vlenb lui t3, 1 addiw t3, t3, -1624 - mul a4, a4, t3 - add a4, sp, a4 + mul a3, a3, t3 + add a3, sp, a3 lui t3, 63 addiw t3, t3, -1632 - add a4, a4, t3 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t3 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 18 - csrr a4, vlenb + csrr a3, vlenb lui t3, 1 addiw t3, t3, -1632 - mul a4, a4, t3 - add a4, sp, a4 + mul a3, a3, t3 + add a3, sp, a3 lui t3, 63 addiw t3, t3, -1632 - add a4, a4, t3 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t3 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 17 - csrr a4, vlenb + csrr a3, vlenb lui t3, 1 addiw t3, t3, -1640 - mul a4, a4, t3 - add a4, sp, a4 + mul a3, a3, t3 + add a3, sp, a3 lui t3, 63 addiw t3, t3, -1632 - add a4, a4, t3 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t3 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 16 - csrr a4, vlenb + csrr a3, vlenb lui t3, 1 addiw t3, t3, -1648 - mul a4, a4, t3 - add a4, sp, a4 + mul a3, a3, t3 + add a3, sp, a3 lui t3, 63 addiw t3, t3, -1632 - add a4, a4, t3 - vs8r.v v8, (a4) # Unknown-size Folded Spill - vsetvli zero, a3, e32, m8, ta, ma + add a3, a3, t3 + vs8r.v v8, (a3) # Unknown-size Folded Spill + vsetvli zero, a2, e32, m8, ta, ma vle32.v v16, (t2) - csrr a4, vlenb + csrr a3, vlenb lui t2, 1 addiw t2, t2, 32 - mul a4, a4, t2 - add a4, sp, a4 + mul a3, a3, t2 + add a3, sp, a3 lui t2, 63 addiw t2, t2, -1632 - add a4, a4, t2 - vs8r.v v16, (a4) # Unknown-size Folded Spill + add a3, a3, t2 + vs8r.v v16, (a3) # Unknown-size Folded Spill vsetivli zero, 1, e32, m8, ta, ma vslidedown.vi v8, v16, 31 - csrr a4, vlenb + csrr a3, vlenb lui t2, 1 addiw t2, t2, -1744 - mul a4, a4, t2 - add a4, sp, a4 + mul a3, a3, t2 + add a3, sp, a3 lui t2, 63 addiw t2, t2, -1632 - add a4, a4, t2 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t2 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 30 - csrr a4, vlenb + csrr a3, vlenb lui t2, 1 addiw t2, t2, -1760 - mul a4, a4, t2 - add a4, sp, a4 + mul a3, a3, t2 + add a3, sp, a3 lui t2, 63 addiw t2, t2, -1632 - add a4, a4, t2 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t2 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 29 - csrr a4, vlenb + csrr a3, vlenb lui t2, 1 addiw t2, t2, -1776 - mul a4, a4, t2 - add a4, sp, a4 + mul a3, a3, t2 + add a3, sp, a3 lui t2, 63 addiw t2, t2, -1632 - add a4, a4, t2 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t2 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 28 - csrr a4, vlenb + csrr a3, vlenb lui t2, 1 addiw t2, t2, -1800 - mul a4, a4, t2 - add a4, sp, a4 + mul a3, a3, t2 + add a3, sp, a3 lui t2, 63 addiw t2, t2, -1632 - add a4, a4, t2 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t2 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 27 - csrr a4, vlenb + csrr a3, vlenb lui t2, 1 addiw t2, t2, -1824 - mul a4, a4, t2 - add a4, sp, a4 + mul a3, a3, t2 + add a3, sp, a3 lui t2, 63 addiw t2, t2, -1632 - add a4, a4, t2 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t2 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 26 - csrr a4, vlenb + csrr a3, vlenb lui t2, 1 addiw t2, t2, -1848 - mul a4, a4, t2 - add a4, sp, a4 + mul a3, a3, t2 + add a3, sp, a3 lui t2, 63 addiw t2, t2, -1632 - add a4, a4, t2 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t2 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 25 - csrr a4, vlenb + csrr a3, vlenb lui t2, 1 addiw t2, t2, -1864 - mul a4, a4, t2 - add a4, sp, a4 + mul a3, a3, t2 + add a3, sp, a3 lui t2, 63 addiw t2, t2, -1632 - add a4, a4, t2 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t2 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 24 - csrr a4, vlenb + csrr a3, vlenb lui t2, 1 addiw t2, t2, -1880 - mul a4, a4, t2 - add a4, sp, a4 + mul a3, a3, t2 + add a3, sp, a3 lui t2, 63 addiw t2, t2, -1632 - add a4, a4, t2 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t2 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 23 - csrr a4, vlenb + csrr a3, vlenb lui t2, 1 addiw t2, t2, -1896 - mul a4, a4, t2 - add a4, sp, a4 + mul a3, a3, t2 + add a3, sp, a3 lui t2, 63 addiw t2, t2, -1632 - add a4, a4, t2 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t2 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 22 - csrr a4, vlenb + csrr a3, vlenb lui t2, 1 addiw t2, t2, -1912 - mul a4, a4, t2 - add a4, sp, a4 + mul a3, a3, t2 + add a3, sp, a3 lui t2, 63 addiw t2, t2, -1632 - add a4, a4, t2 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t2 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 21 - csrr a4, vlenb + csrr a3, vlenb lui t2, 1 addiw t2, t2, -1928 - mul a4, a4, t2 - add a4, sp, a4 + mul a3, a3, t2 + add a3, sp, a3 lui t2, 63 addiw t2, t2, -1632 - add a4, a4, t2 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t2 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 20 - csrr a4, vlenb + csrr a3, vlenb lui t2, 1 addiw t2, t2, -1944 - mul a4, a4, t2 - add a4, sp, a4 + mul a3, a3, t2 + add a3, sp, a3 lui t2, 63 addiw t2, t2, -1632 - add a4, a4, t2 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t2 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 19 - csrr a4, vlenb + csrr a3, vlenb lui t2, 1 addiw t2, t2, -1960 - mul a4, a4, t2 - add a4, sp, a4 + mul a3, a3, t2 + add a3, sp, a3 lui t2, 63 addiw t2, t2, -1632 - add a4, a4, t2 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t2 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 18 - csrr a4, vlenb + csrr a3, vlenb lui t2, 1 addiw t2, t2, -96 - mul a4, a4, t2 - add a4, sp, a4 + mul a3, a3, t2 + add a3, sp, a3 lui t2, 63 addiw t2, t2, -1632 - add a4, a4, t2 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t2 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 17 - csrr a4, vlenb + csrr a3, vlenb lui t2, 1 addiw t2, t2, -1976 - mul a4, a4, t2 - add a4, sp, a4 + mul a3, a3, t2 + add a3, sp, a3 lui t2, 63 addiw t2, t2, -1632 - add a4, a4, t2 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t2 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 16 - csrr a4, vlenb + csrr a3, vlenb lui t2, 1 addiw t2, t2, -1992 - mul a4, a4, t2 - add a4, sp, a4 + mul a3, a3, t2 + add a3, sp, a3 lui t2, 63 addiw t2, t2, -1632 - add a4, a4, t2 - vs8r.v v8, (a4) # Unknown-size Folded Spill - vsetvli zero, a3, e32, m8, ta, ma + add a3, a3, t2 + vs8r.v v8, (a3) # Unknown-size Folded Spill + vsetvli zero, a2, e32, m8, ta, ma vle32.v v16, (t1) - csrr a4, vlenb + csrr a3, vlenb lui t1, 1 addiw t1, t1, 48 - mul a4, a4, t1 - add a4, sp, a4 + mul a3, a3, t1 + add a3, sp, a3 lui t1, 63 addiw t1, t1, -1632 - add a4, a4, t1 - vs8r.v v16, (a4) # Unknown-size Folded Spill + add a3, a3, t1 + vs8r.v v16, (a3) # Unknown-size Folded Spill vsetivli zero, 1, e32, m8, ta, ma vslidedown.vi v8, v16, 31 - csrr a4, vlenb + csrr a3, vlenb li t1, 1928 - mul a4, a4, t1 - add a4, sp, a4 + mul a3, a3, t1 + add a3, sp, a3 lui t1, 63 addiw t1, t1, -1632 - add a4, a4, t1 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t1 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 30 - csrr a4, vlenb + csrr a3, vlenb li t1, 1904 - mul a4, a4, t1 - add a4, sp, a4 + mul a3, a3, t1 + add a3, sp, a3 lui t1, 63 addiw t1, t1, -1632 - add a4, a4, t1 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t1 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 29 - csrr a4, vlenb + csrr a3, vlenb li t1, 1880 - mul a4, a4, t1 - add a4, sp, a4 + mul a3, a3, t1 + add a3, sp, a3 lui t1, 63 addiw t1, t1, -1632 - add a4, a4, t1 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t1 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 28 - csrr a4, vlenb + csrr a3, vlenb li t1, 1856 - mul a4, a4, t1 - add a4, sp, a4 + mul a3, a3, t1 + add a3, sp, a3 lui t1, 63 addiw t1, t1, -1632 - add a4, a4, t1 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t1 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 27 - csrr a4, vlenb + csrr a3, vlenb li t1, 1832 - mul a4, a4, t1 - add a4, sp, a4 + mul a3, a3, t1 + add a3, sp, a3 lui t1, 63 addiw t1, t1, -1632 - add a4, a4, t1 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t1 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 26 - csrr a4, vlenb + csrr a3, vlenb li t1, 1816 - mul a4, a4, t1 - add a4, sp, a4 + mul a3, a3, t1 + add a3, sp, a3 lui t1, 63 addiw t1, t1, -1632 - add a4, a4, t1 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t1 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 25 - csrr a4, vlenb + csrr a3, vlenb li t1, 1800 - mul a4, a4, t1 - add a4, sp, a4 + mul a3, a3, t1 + add a3, sp, a3 lui t1, 63 addiw t1, t1, -1632 - add a4, a4, t1 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t1 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 24 - csrr a4, vlenb + csrr a3, vlenb li t1, 1784 - mul a4, a4, t1 - add a4, sp, a4 + mul a3, a3, t1 + add a3, sp, a3 lui t1, 63 addiw t1, t1, -1632 - add a4, a4, t1 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t1 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 23 - csrr a4, vlenb + csrr a3, vlenb li t1, 1768 - mul a4, a4, t1 - add a4, sp, a4 + mul a3, a3, t1 + add a3, sp, a3 lui t1, 63 addiw t1, t1, -1632 - add a4, a4, t1 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t1 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 22 - csrr a4, vlenb + csrr a3, vlenb li t1, 1752 - mul a4, a4, t1 - add a4, sp, a4 + mul a3, a3, t1 + add a3, sp, a3 lui t1, 63 addiw t1, t1, -1632 - add a4, a4, t1 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t1 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 21 - csrr a4, vlenb + csrr a3, vlenb li t1, 1736 - mul a4, a4, t1 - add a4, sp, a4 + mul a3, a3, t1 + add a3, sp, a3 lui t1, 63 addiw t1, t1, -1632 - add a4, a4, t1 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t1 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 20 - csrr a4, vlenb + csrr a3, vlenb li t1, 1720 - mul a4, a4, t1 - add a4, sp, a4 + mul a3, a3, t1 + add a3, sp, a3 lui t1, 63 addiw t1, t1, -1632 - add a4, a4, t1 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t1 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 19 - csrr a4, vlenb + csrr a3, vlenb li t1, 1704 - mul a4, a4, t1 - add a4, sp, a4 + mul a3, a3, t1 + add a3, sp, a3 lui t1, 63 addiw t1, t1, -1632 - add a4, a4, t1 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t1 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 18 - csrr a4, vlenb + csrr a3, vlenb li t1, 1688 - mul a4, a4, t1 - add a4, sp, a4 + mul a3, a3, t1 + add a3, sp, a3 lui t1, 63 addiw t1, t1, -1632 - add a4, a4, t1 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t1 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 17 - csrr a4, vlenb + csrr a3, vlenb li t1, 1672 - mul a4, a4, t1 - add a4, sp, a4 + mul a3, a3, t1 + add a3, sp, a3 lui t1, 63 addiw t1, t1, -1632 - add a4, a4, t1 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t1 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 16 - csrr a4, vlenb + csrr a3, vlenb li t1, 31 slli t1, t1, 7 - mul a4, a4, t1 - add a4, sp, a4 + mul a3, a3, t1 + add a3, sp, a3 lui t1, 63 addiw t1, t1, -1632 - add a4, a4, t1 - vs8r.v v8, (a4) # Unknown-size Folded Spill - vsetvli zero, a3, e32, m8, ta, ma + add a3, a3, t1 + vs8r.v v8, (a3) # Unknown-size Folded Spill + vsetvli zero, a2, e32, m8, ta, ma vle32.v v16, (t0) - csrr a4, vlenb + csrr a3, vlenb lui t0, 1 addiw t0, t0, 24 - mul a4, a4, t0 - add a4, sp, a4 + mul a3, a3, t0 + add a3, sp, a3 lui t0, 63 addiw t0, t0, -1632 - add a4, a4, t0 - vs8r.v v16, (a4) # Unknown-size Folded Spill + add a3, a3, t0 + vs8r.v v16, (a3) # Unknown-size Folded Spill vsetivli zero, 1, e32, m8, ta, ma vslidedown.vi v8, v16, 31 - csrr a4, vlenb + csrr a3, vlenb lui t0, 1 addiw t0, t0, -32 - mul a4, a4, t0 - add a4, sp, a4 + mul a3, a3, t0 + add a3, sp, a3 lui t0, 63 addiw t0, t0, -1632 - add a4, a4, t0 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t0 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 30 - csrr a4, vlenb + csrr a3, vlenb lui t0, 1 addiw t0, t0, -1712 - mul a4, a4, t0 - add a4, sp, a4 + mul a3, a3, t0 + add a3, sp, a3 lui t0, 63 addiw t0, t0, -1632 - add a4, a4, t0 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t0 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 29 - csrr a4, vlenb + csrr a3, vlenb lui t0, 1 addiw t0, t0, -1728 - mul a4, a4, t0 - add a4, sp, a4 + mul a3, a3, t0 + add a3, sp, a3 lui t0, 63 addiw t0, t0, -1632 - add a4, a4, t0 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t0 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 28 - csrr a4, vlenb + csrr a3, vlenb lui t0, 1 addiw t0, t0, -1784 - mul a4, a4, t0 - add a4, sp, a4 + mul a3, a3, t0 + add a3, sp, a3 lui t0, 63 addiw t0, t0, -1632 - add a4, a4, t0 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t0 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 27 - csrr a4, vlenb + csrr a3, vlenb lui t0, 1 addiw t0, t0, -1808 - mul a4, a4, t0 - add a4, sp, a4 + mul a3, a3, t0 + add a3, sp, a3 lui t0, 63 addiw t0, t0, -1632 - add a4, a4, t0 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t0 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 26 - csrr a4, vlenb + csrr a3, vlenb lui t0, 1 addiw t0, t0, -1832 - mul a4, a4, t0 - add a4, sp, a4 + mul a3, a3, t0 + add a3, sp, a3 lui t0, 63 addiw t0, t0, -1632 - add a4, a4, t0 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t0 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 25 - csrr a4, vlenb + csrr a3, vlenb lui t0, 1 addiw t0, t0, -1856 - mul a4, a4, t0 - add a4, sp, a4 + mul a3, a3, t0 + add a3, sp, a3 lui t0, 63 addiw t0, t0, -1632 - add a4, a4, t0 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t0 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 24 - csrr a4, vlenb + csrr a3, vlenb lui t0, 1 addiw t0, t0, -1872 - mul a4, a4, t0 - add a4, sp, a4 + mul a3, a3, t0 + add a3, sp, a3 lui t0, 63 addiw t0, t0, -1632 - add a4, a4, t0 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t0 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 23 - csrr a4, vlenb + csrr a3, vlenb lui t0, 1 addiw t0, t0, -1888 - mul a4, a4, t0 - add a4, sp, a4 + mul a3, a3, t0 + add a3, sp, a3 lui t0, 63 addiw t0, t0, -1632 - add a4, a4, t0 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t0 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 22 - csrr a4, vlenb + csrr a3, vlenb lui t0, 1 addiw t0, t0, -1904 - mul a4, a4, t0 - add a4, sp, a4 + mul a3, a3, t0 + add a3, sp, a3 lui t0, 63 addiw t0, t0, -1632 - add a4, a4, t0 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t0 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 21 - csrr a4, vlenb + csrr a3, vlenb li t0, 17 slli t0, t0, 7 - mul a4, a4, t0 - add a4, sp, a4 + mul a3, a3, t0 + add a3, sp, a3 lui t0, 63 addiw t0, t0, -1632 - add a4, a4, t0 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t0 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 20 - csrr a4, vlenb + csrr a3, vlenb lui t0, 1 addiw t0, t0, -1936 - mul a4, a4, t0 - add a4, sp, a4 + mul a3, a3, t0 + add a3, sp, a3 lui t0, 63 addiw t0, t0, -1632 - add a4, a4, t0 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t0 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 19 - csrr a4, vlenb + csrr a3, vlenb lui t0, 1 addiw t0, t0, -1952 - mul a4, a4, t0 - add a4, sp, a4 + mul a3, a3, t0 + add a3, sp, a3 lui t0, 63 addiw t0, t0, -1632 - add a4, a4, t0 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t0 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 18 - csrr a4, vlenb + csrr a3, vlenb lui t0, 1 addiw t0, t0, -1968 - mul a4, a4, t0 - add a4, sp, a4 + mul a3, a3, t0 + add a3, sp, a3 lui t0, 63 addiw t0, t0, -1632 - add a4, a4, t0 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t0 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 17 - csrr a4, vlenb + csrr a3, vlenb lui t0, 1 addiw t0, t0, -1984 - mul a4, a4, t0 - add a4, sp, a4 + mul a3, a3, t0 + add a3, sp, a3 lui t0, 63 addiw t0, t0, -1632 - add a4, a4, t0 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, t0 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 16 - csrr a4, vlenb + csrr a3, vlenb lui t0, 1 addiw t0, t0, -2000 - mul a4, a4, t0 - add a4, sp, a4 + mul a3, a3, t0 + add a3, sp, a3 lui t0, 63 addiw t0, t0, -1632 - add a4, a4, t0 - vs8r.v v8, (a4) # Unknown-size Folded Spill - vsetvli zero, a3, e32, m8, ta, ma + add a3, a3, t0 + vs8r.v v8, (a3) # Unknown-size Folded Spill + vsetvli zero, a2, e32, m8, ta, ma vle32.v v16, (a7) - csrr a4, vlenb + csrr a3, vlenb lui a7, 1 addiw a7, a7, 16 - mul a4, a4, a7 - add a4, sp, a4 + mul a3, a3, a7 + add a3, sp, a3 lui a7, 63 addiw a7, a7, -1632 - add a4, a4, a7 - vs8r.v v16, (a4) # Unknown-size Folded Spill + add a3, a3, a7 + vs8r.v v16, (a3) # Unknown-size Folded Spill vsetivli zero, 1, e32, m8, ta, ma vslidedown.vi v8, v16, 31 - csrr a4, vlenb + csrr a3, vlenb li a7, 1864 - mul a4, a4, a7 - add a4, sp, a4 + mul a3, a3, a7 + add a3, sp, a3 lui a7, 63 addiw a7, a7, -1632 - add a4, a4, a7 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a7 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 30 - csrr a4, vlenb + csrr a3, vlenb li a7, 1840 - mul a4, a4, a7 - add a4, sp, a4 + mul a3, a3, a7 + add a3, sp, a3 lui a7, 63 addiw a7, a7, -1632 - add a4, a4, a7 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a7 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 29 - csrr a4, vlenb + csrr a3, vlenb lui a7, 1 addiw a7, a7, -40 - mul a4, a4, a7 - add a4, sp, a4 + mul a3, a3, a7 + add a3, sp, a3 lui a7, 63 addiw a7, a7, -1632 - add a4, a4, a7 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a7 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 28 - csrr a4, vlenb + csrr a3, vlenb li a7, 1808 - mul a4, a4, a7 - add a4, sp, a4 + mul a3, a3, a7 + add a3, sp, a3 lui a7, 63 addiw a7, a7, -1632 - add a4, a4, a7 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a7 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 27 - csrr a4, vlenb + csrr a3, vlenb li a7, 1792 - mul a4, a4, a7 - add a4, sp, a4 + mul a3, a3, a7 + add a3, sp, a3 lui a7, 63 addiw a7, a7, -1632 - add a4, a4, a7 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a7 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 26 - csrr a4, vlenb + csrr a3, vlenb li a7, 1776 - mul a4, a4, a7 - add a4, sp, a4 + mul a3, a3, a7 + add a3, sp, a3 lui a7, 63 addiw a7, a7, -1632 - add a4, a4, a7 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a7 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 25 - csrr a4, vlenb + csrr a3, vlenb li a7, 1760 - mul a4, a4, a7 - add a4, sp, a4 + mul a3, a3, a7 + add a3, sp, a3 lui a7, 63 addiw a7, a7, -1632 - add a4, a4, a7 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a7 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 24 - csrr a4, vlenb + csrr a3, vlenb li a7, 1744 - mul a4, a4, a7 - add a4, sp, a4 + mul a3, a3, a7 + add a3, sp, a3 lui a7, 63 addiw a7, a7, -1632 - add a4, a4, a7 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a7 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 23 - csrr a4, vlenb + csrr a3, vlenb li a7, 1728 - mul a4, a4, a7 - add a4, sp, a4 + mul a3, a3, a7 + add a3, sp, a3 lui a7, 63 addiw a7, a7, -1632 - add a4, a4, a7 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a7 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 22 - csrr a4, vlenb + csrr a3, vlenb li a7, 1712 - mul a4, a4, a7 - add a4, sp, a4 + mul a3, a3, a7 + add a3, sp, a3 lui a7, 63 addiw a7, a7, -1632 - add a4, a4, a7 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a7 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 21 - csrr a4, vlenb + csrr a3, vlenb li a7, 1696 - mul a4, a4, a7 - add a4, sp, a4 + mul a3, a3, a7 + add a3, sp, a3 lui a7, 63 addiw a7, a7, -1632 - add a4, a4, a7 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a7 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 20 - csrr a4, vlenb + csrr a3, vlenb li a7, 1680 - mul a4, a4, a7 - add a4, sp, a4 + mul a3, a3, a7 + add a3, sp, a3 lui a7, 63 addiw a7, a7, -1632 - add a4, a4, a7 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a7 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 19 - csrr a4, vlenb + csrr a3, vlenb li a7, 1664 - mul a4, a4, a7 - add a4, sp, a4 + mul a3, a3, a7 + add a3, sp, a3 lui a7, 63 addiw a7, a7, -1632 - add a4, a4, a7 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a7 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 18 - csrr a4, vlenb + csrr a3, vlenb li a7, 1656 - mul a4, a4, a7 - add a4, sp, a4 + mul a3, a3, a7 + add a3, sp, a3 lui a7, 63 addiw a7, a7, -1632 - add a4, a4, a7 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a7 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 17 - csrr a4, vlenb + csrr a3, vlenb li a7, 1648 - mul a4, a4, a7 - add a4, sp, a4 + mul a3, a3, a7 + add a3, sp, a3 lui a7, 63 addiw a7, a7, -1632 - add a4, a4, a7 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a7 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 16 - csrr a4, vlenb + csrr a3, vlenb li a7, 1632 - mul a4, a4, a7 - add a4, sp, a4 + mul a3, a3, a7 + add a3, sp, a3 lui a7, 63 addiw a7, a7, -1632 - add a4, a4, a7 - vs8r.v v8, (a4) # Unknown-size Folded Spill - vsetvli zero, a3, e32, m8, ta, ma + add a3, a3, a7 + vs8r.v v8, (a3) # Unknown-size Folded Spill + vsetvli zero, a2, e32, m8, ta, ma vle32.v v16, (a6) - csrr a4, vlenb + csrr a3, vlenb lui a6, 1 addiw a6, a6, 8 - mul a4, a4, a6 - add a4, sp, a4 + mul a3, a3, a6 + add a3, sp, a3 lui a6, 63 addiw a6, a6, -1632 - add a4, a4, a6 - vs8r.v v16, (a4) # Unknown-size Folded Spill + add a3, a3, a6 + vs8r.v v16, (a3) # Unknown-size Folded Spill vsetivli zero, 1, e32, m8, ta, ma vslidedown.vi v8, v16, 31 - csrr a4, vlenb + csrr a3, vlenb li a6, 1424 - mul a4, a4, a6 - add a4, sp, a4 + mul a3, a3, a6 + add a3, sp, a3 lui a6, 63 addiw a6, a6, -1632 - add a4, a4, a6 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a6 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 30 - csrr a4, vlenb + csrr a3, vlenb li a6, 1408 - mul a4, a4, a6 - add a4, sp, a4 + mul a3, a3, a6 + add a3, sp, a3 lui a6, 63 addiw a6, a6, -1632 - add a4, a4, a6 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a6 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 29 - csrr a4, vlenb + csrr a3, vlenb li a6, 1392 - mul a4, a4, a6 - add a4, sp, a4 + mul a3, a3, a6 + add a3, sp, a3 lui a6, 63 addiw a6, a6, -1632 - add a4, a4, a6 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a6 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 28 - csrr a4, vlenb + csrr a3, vlenb li a6, 1384 - mul a4, a4, a6 - add a4, sp, a4 + mul a3, a3, a6 + add a3, sp, a3 lui a6, 63 addiw a6, a6, -1632 - add a4, a4, a6 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a6 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 27 - csrr a4, vlenb + csrr a3, vlenb lui a6, 1 addiw a6, a6, -64 - mul a4, a4, a6 - add a4, sp, a4 + mul a3, a3, a6 + add a3, sp, a3 lui a6, 63 addiw a6, a6, -1632 - add a4, a4, a6 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a6 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 26 - csrr a4, vlenb + csrr a3, vlenb li a6, 1376 - mul a4, a4, a6 - add a4, sp, a4 + mul a3, a3, a6 + add a3, sp, a3 lui a6, 63 addiw a6, a6, -1632 - add a4, a4, a6 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a6 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 25 - csrr a4, vlenb + csrr a3, vlenb li a6, 1368 - mul a4, a4, a6 - add a4, sp, a4 + mul a3, a3, a6 + add a3, sp, a3 lui a6, 63 addiw a6, a6, -1632 - add a4, a4, a6 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a6 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 24 - csrr a4, vlenb + csrr a3, vlenb li a6, 1360 - mul a4, a4, a6 - add a4, sp, a4 + mul a3, a3, a6 + add a3, sp, a3 lui a6, 63 addiw a6, a6, -1632 - add a4, a4, a6 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a6 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 23 - csrr a4, vlenb + csrr a3, vlenb li a6, 1352 - mul a4, a4, a6 - add a4, sp, a4 + mul a3, a3, a6 + add a3, sp, a3 lui a6, 63 addiw a6, a6, -1632 - add a4, a4, a6 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a6 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 22 - csrr a4, vlenb + csrr a3, vlenb li a6, 1344 - mul a4, a4, a6 - add a4, sp, a4 + mul a3, a3, a6 + add a3, sp, a3 lui a6, 63 addiw a6, a6, -1632 - add a4, a4, a6 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a6 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 21 - csrr a4, vlenb + csrr a3, vlenb li a6, 1336 - mul a4, a4, a6 - add a4, sp, a4 + mul a3, a3, a6 + add a3, sp, a3 lui a6, 63 addiw a6, a6, -1632 - add a4, a4, a6 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a6 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 20 - csrr a4, vlenb + csrr a3, vlenb li a6, 1328 - mul a4, a4, a6 - add a4, sp, a4 + mul a3, a3, a6 + add a3, sp, a3 lui a6, 63 addiw a6, a6, -1632 - add a4, a4, a6 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a6 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 19 - csrr a4, vlenb + csrr a3, vlenb li a6, 1320 - mul a4, a4, a6 - add a4, sp, a4 + mul a3, a3, a6 + add a3, sp, a3 lui a6, 63 addiw a6, a6, -1632 - add a4, a4, a6 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a6 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 18 - csrr a4, vlenb + csrr a3, vlenb li a6, 1304 - mul a4, a4, a6 - add a4, sp, a4 + mul a3, a3, a6 + add a3, sp, a3 lui a6, 63 addiw a6, a6, -1632 - add a4, a4, a6 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a6 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 17 - csrr a4, vlenb + csrr a3, vlenb li a6, 1288 - mul a4, a4, a6 - add a4, sp, a4 + mul a3, a3, a6 + add a3, sp, a3 lui a6, 63 addiw a6, a6, -1632 - add a4, a4, a6 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a6 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 16 - csrr a4, vlenb + csrr a3, vlenb li a6, 1280 - mul a4, a4, a6 - add a4, sp, a4 + mul a3, a3, a6 + add a3, sp, a3 lui a6, 63 addiw a6, a6, -1632 - add a4, a4, a6 - vs8r.v v8, (a4) # Unknown-size Folded Spill - vsetvli zero, a3, e32, m8, ta, ma + add a3, a3, a6 + vs8r.v v8, (a3) # Unknown-size Folded Spill + vsetvli zero, a2, e32, m8, ta, ma vle32.v v16, (a5) - csrr a4, vlenb - slli a4, a4, 12 - add a4, sp, a4 + csrr a3, vlenb + slli a3, a3, 12 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v16, (a4) # Unknown-size Folded Spill + add a3, a3, a5 + vs8r.v v16, (a3) # Unknown-size Folded Spill vsetivli zero, 1, e32, m8, ta, ma vslidedown.vi v8, v16, 31 - csrr a4, vlenb + csrr a3, vlenb li a5, 1160 - mul a4, a4, a5 - add a4, sp, a4 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 30 - csrr a4, vlenb + csrr a3, vlenb li a5, 1152 - mul a4, a4, a5 - add a4, sp, a4 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 29 - csrr a4, vlenb + csrr a3, vlenb li a5, 1144 - mul a4, a4, a5 - add a4, sp, a4 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 28 - csrr a4, vlenb + csrr a3, vlenb li a5, 1136 - mul a4, a4, a5 - add a4, sp, a4 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 27 - csrr a4, vlenb + csrr a3, vlenb li a5, 1128 - mul a4, a4, a5 - add a4, sp, a4 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 26 - csrr a4, vlenb + csrr a3, vlenb li a5, 1120 - mul a4, a4, a5 - add a4, sp, a4 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 25 - csrr a4, vlenb + csrr a3, vlenb lui a5, 1 addiw a5, a5, -80 - mul a4, a4, a5 - add a4, sp, a4 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 24 - csrr a4, vlenb + csrr a3, vlenb li a5, 1112 - mul a4, a4, a5 - add a4, sp, a4 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 23 - csrr a4, vlenb + csrr a3, vlenb li a5, 1104 - mul a4, a4, a5 - add a4, sp, a4 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 22 - csrr a4, vlenb + csrr a3, vlenb li a5, 1096 - mul a4, a4, a5 - add a4, sp, a4 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 21 - csrr a4, vlenb + csrr a3, vlenb li a5, 1088 - mul a4, a4, a5 - add a4, sp, a4 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 20 - csrr a4, vlenb + csrr a3, vlenb li a5, 1080 - mul a4, a4, a5 - add a4, sp, a4 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 19 - csrr a4, vlenb + csrr a3, vlenb li a5, 1072 - mul a4, a4, a5 - add a4, sp, a4 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 18 - csrr a4, vlenb + csrr a3, vlenb li a5, 1064 - mul a4, a4, a5 - add a4, sp, a4 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 17 - csrr a4, vlenb + csrr a3, vlenb li a5, 1056 - mul a4, a4, a5 - add a4, sp, a4 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill + add a3, a3, a5 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 16 - csrr a4, vlenb + csrr a3, vlenb li a5, 1048 - mul a4, a4, a5 - add a4, sp, a4 + mul a3, a3, a5 + add a3, sp, a3 lui a5, 63 addiw a5, a5, -1632 - add a4, a4, a5 - vs8r.v v8, (a4) # Unknown-size Folded Spill - vsetvli zero, a3, e32, m8, ta, ma - vle32.v v16, (a2) - csrr a2, vlenb + add a3, a3, a5 + vs8r.v v8, (a3) # Unknown-size Folded Spill + vsetvli zero, a2, e32, m8, ta, ma + vle32.v v16, (a4) + csrr a3, vlenb lui a4, 1 addiw a4, a4, -8 - mul a2, a2, a4 - add a2, sp, a2 + mul a3, a3, a4 + add a3, sp, a3 lui a4, 63 addiw a4, a4, -1632 - add a2, a2, a4 - vs8r.v v16, (a2) # Unknown-size Folded Spill + add a3, a3, a4 + vs8r.v v16, (a3) # Unknown-size Folded Spill vsetivli zero, 1, e32, m8, ta, ma vslidedown.vi v8, v16, 31 - csrr a2, vlenb + csrr a3, vlenb li a4, 928 - mul a2, a2, a4 - add a2, sp, a2 + mul a3, a3, a4 + add a3, sp, a3 lui a4, 63 addiw a4, a4, -1632 - add a2, a2, a4 - vs8r.v v8, (a2) # Unknown-size Folded Spill + add a3, a3, a4 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 30 - csrr a2, vlenb + csrr a3, vlenb li a4, 920 - mul a2, a2, a4 - add a2, sp, a2 + mul a3, a3, a4 + add a3, sp, a3 lui a4, 63 addiw a4, a4, -1632 - add a2, a2, a4 - vs8r.v v8, (a2) # Unknown-size Folded Spill + add a3, a3, a4 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 29 - csrr a2, vlenb + csrr a3, vlenb li a4, 912 - mul a2, a2, a4 - add a2, sp, a2 + mul a3, a3, a4 + add a3, sp, a3 lui a4, 63 addiw a4, a4, -1632 - add a2, a2, a4 - vs8r.v v8, (a2) # Unknown-size Folded Spill + add a3, a3, a4 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 28 - csrr a2, vlenb + csrr a3, vlenb li a4, 904 - mul a2, a2, a4 - add a2, sp, a2 + mul a3, a3, a4 + add a3, sp, a3 lui a4, 63 addiw a4, a4, -1632 - add a2, a2, a4 - vs8r.v v8, (a2) # Unknown-size Folded Spill + add a3, a3, a4 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 27 - csrr a2, vlenb + csrr a3, vlenb li a4, 896 - mul a2, a2, a4 - add a2, sp, a2 + mul a3, a3, a4 + add a3, sp, a3 lui a4, 63 addiw a4, a4, -1632 - add a2, a2, a4 - vs8r.v v8, (a2) # Unknown-size Folded Spill + add a3, a3, a4 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 26 - csrr a2, vlenb + csrr a3, vlenb li a4, 888 - mul a2, a2, a4 - add a2, sp, a2 + mul a3, a3, a4 + add a3, sp, a3 lui a4, 63 addiw a4, a4, -1632 - add a2, a2, a4 - vs8r.v v8, (a2) # Unknown-size Folded Spill + add a3, a3, a4 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 25 - csrr a2, vlenb + csrr a3, vlenb li a4, 880 - mul a2, a2, a4 - add a2, sp, a2 + mul a3, a3, a4 + add a3, sp, a3 lui a4, 63 addiw a4, a4, -1632 - add a2, a2, a4 - vs8r.v v8, (a2) # Unknown-size Folded Spill + add a3, a3, a4 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 24 - csrr a2, vlenb + csrr a3, vlenb li a4, 872 - mul a2, a2, a4 - add a2, sp, a2 + mul a3, a3, a4 + add a3, sp, a3 lui a4, 63 addiw a4, a4, -1632 - add a2, a2, a4 - vs8r.v v8, (a2) # Unknown-size Folded Spill + add a3, a3, a4 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 23 - csrr a2, vlenb + csrr a3, vlenb lui a4, 1 addiw a4, a4, -104 - mul a2, a2, a4 - add a2, sp, a2 + mul a3, a3, a4 + add a3, sp, a3 lui a4, 63 addiw a4, a4, -1632 - add a2, a2, a4 - vs8r.v v8, (a2) # Unknown-size Folded Spill + add a3, a3, a4 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 22 - csrr a2, vlenb + csrr a3, vlenb li a4, 864 - mul a2, a2, a4 - add a2, sp, a2 + mul a3, a3, a4 + add a3, sp, a3 lui a4, 63 addiw a4, a4, -1632 - add a2, a2, a4 - vs8r.v v8, (a2) # Unknown-size Folded Spill + add a3, a3, a4 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 21 - csrr a2, vlenb + csrr a3, vlenb li a4, 856 - mul a2, a2, a4 - add a2, sp, a2 + mul a3, a3, a4 + add a3, sp, a3 lui a4, 63 addiw a4, a4, -1632 - add a2, a2, a4 - vs8r.v v8, (a2) # Unknown-size Folded Spill + add a3, a3, a4 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 20 - csrr a2, vlenb + csrr a3, vlenb li a4, 848 - mul a2, a2, a4 - add a2, sp, a2 + mul a3, a3, a4 + add a3, sp, a3 lui a4, 63 addiw a4, a4, -1632 - add a2, a2, a4 - vs8r.v v8, (a2) # Unknown-size Folded Spill + add a3, a3, a4 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 19 - csrr a2, vlenb + csrr a3, vlenb li a4, 840 - mul a2, a2, a4 - add a2, sp, a2 + mul a3, a3, a4 + add a3, sp, a3 lui a4, 63 addiw a4, a4, -1632 - add a2, a2, a4 - vs8r.v v8, (a2) # Unknown-size Folded Spill + add a3, a3, a4 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 18 - csrr a2, vlenb + csrr a3, vlenb li a4, 832 - mul a2, a2, a4 - add a2, sp, a2 + mul a3, a3, a4 + add a3, sp, a3 lui a4, 63 addiw a4, a4, -1632 - add a2, a2, a4 - vs8r.v v8, (a2) # Unknown-size Folded Spill + add a3, a3, a4 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 17 - csrr a2, vlenb + csrr a3, vlenb li a4, 824 - mul a2, a2, a4 - add a2, sp, a2 + mul a3, a3, a4 + add a3, sp, a3 lui a4, 63 addiw a4, a4, -1632 - add a2, a2, a4 - vs8r.v v8, (a2) # Unknown-size Folded Spill + add a3, a3, a4 + vs8r.v v8, (a3) # Unknown-size Folded Spill vslidedown.vi v8, v16, 16 - csrr a2, vlenb + csrr a3, vlenb li a4, 808 - mul a2, a2, a4 - add a2, sp, a2 + mul a3, a3, a4 + add a3, sp, a3 lui a4, 63 addiw a4, a4, -1632 - add a2, a2, a4 - vs8r.v v8, (a2) # Unknown-size Folded Spill - vsetvli zero, a3, e32, m8, ta, ma + add a3, a3, a4 + vs8r.v v8, (a3) # Unknown-size Folded Spill + vsetvli zero, a2, e32, m8, ta, ma vle32.v v0, (a1) csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -16 - mul a1, a1, a2 + lui a3, 1 + addiw a3, a3, -16 + mul a1, a1, a3 add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 + lui a3, 63 + addiw a3, a3, -1632 + add a1, a1, a3 vs8r.v v0, (a1) # Unknown-size Folded Spill vsetivli zero, 1, e32, m8, ta, ma vslidedown.vi v8, v0, 31 csrr a1, vlenb - li a2, 696 - mul a1, a1, a2 + li a3, 696 + mul a1, a1, a3 add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 + lui a3, 63 + addiw a3, a3, -1632 + add a1, a1, a3 vs8r.v v8, (a1) # Unknown-size Folded Spill vslidedown.vi v8, v0, 30 csrr a1, vlenb - li a2, 688 - mul a1, a1, a2 + li a3, 688 + mul a1, a1, a3 add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 + lui a3, 63 + addiw a3, a3, -1632 + add a1, a1, a3 vs8r.v v8, (a1) # Unknown-size Folded Spill vslidedown.vi v8, v0, 29 csrr a1, vlenb - li a2, 680 - mul a1, a1, a2 + li a3, 680 + mul a1, a1, a3 add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 + lui a3, 63 + addiw a3, a3, -1632 + add a1, a1, a3 vs8r.v v8, (a1) # Unknown-size Folded Spill vslidedown.vi v8, v0, 28 csrr a1, vlenb - li a2, 672 - mul a1, a1, a2 + li a3, 672 + mul a1, a1, a3 add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 + lui a3, 63 + addiw a3, a3, -1632 + add a1, a1, a3 vs8r.v v8, (a1) # Unknown-size Folded Spill vslidedown.vi v8, v0, 27 csrr a1, vlenb - li a2, 664 - mul a1, a1, a2 + li a3, 664 + mul a1, a1, a3 add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 + lui a3, 63 + addiw a3, a3, -1632 + add a1, a1, a3 vs8r.v v8, (a1) # Unknown-size Folded Spill vslidedown.vi v8, v0, 26 csrr a1, vlenb - li a2, 656 - mul a1, a1, a2 + li a3, 656 + mul a1, a1, a3 add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 + lui a3, 63 + addiw a3, a3, -1632 + add a1, a1, a3 vs8r.v v8, (a1) # Unknown-size Folded Spill vslidedown.vi v8, v0, 25 csrr a1, vlenb - li a2, 648 - mul a1, a1, a2 + li a3, 648 + mul a1, a1, a3 add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 + lui a3, 63 + addiw a3, a3, -1632 + add a1, a1, a3 vs8r.v v8, (a1) # Unknown-size Folded Spill vslidedown.vi v8, v0, 24 csrr a1, vlenb - li a2, 640 - mul a1, a1, a2 + li a3, 640 + mul a1, a1, a3 add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 + lui a3, 63 + addiw a3, a3, -1632 + add a1, a1, a3 vs8r.v v8, (a1) # Unknown-size Folded Spill vslidedown.vi v8, v0, 23 csrr a1, vlenb - li a2, 632 - mul a1, a1, a2 + li a3, 632 + mul a1, a1, a3 add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 + lui a3, 63 + addiw a3, a3, -1632 + add a1, a1, a3 vs8r.v v8, (a1) # Unknown-size Folded Spill vslidedown.vi v8, v0, 22 csrr a1, vlenb - li a2, 624 - mul a1, a1, a2 + li a3, 624 + mul a1, a1, a3 add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 + lui a3, 63 + addiw a3, a3, -1632 + add a1, a1, a3 vs8r.v v8, (a1) # Unknown-size Folded Spill vslidedown.vi v16, v0, 21 csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -144 - mul a1, a1, a2 + lui a3, 1 + addiw a3, a3, -144 + mul a1, a1, a3 add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 + lui a3, 63 + addiw a3, a3, -1632 + add a1, a1, a3 vs8r.v v16, (a1) # Unknown-size Folded Spill vslidedown.vi v8, v0, 20 csrr a1, vlenb - li a2, 616 - mul a1, a1, a2 + li a3, 616 + mul a1, a1, a3 add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 + lui a3, 63 + addiw a3, a3, -1632 + add a1, a1, a3 vs8r.v v8, (a1) # Unknown-size Folded Spill vslidedown.vi v8, v0, 19 csrr a1, vlenb - li a2, 608 - mul a1, a1, a2 + li a3, 608 + mul a1, a1, a3 add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 + lui a3, 63 + addiw a3, a3, -1632 + add a1, a1, a3 vs8r.v v8, (a1) # Unknown-size Folded Spill vslidedown.vi v8, v0, 18 csrr a1, vlenb - li a2, 600 - mul a1, a1, a2 + li a3, 600 + mul a1, a1, a3 add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 + lui a3, 63 + addiw a3, a3, -1632 + add a1, a1, a3 vs8r.v v8, (a1) # Unknown-size Folded Spill vslidedown.vi v8, v0, 17 csrr a1, vlenb - li a2, 592 - mul a1, a1, a2 + li a3, 592 + mul a1, a1, a3 add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 + lui a3, 63 + addiw a3, a3, -1632 + add a1, a1, a3 vs8r.v v8, (a1) # Unknown-size Folded Spill vslidedown.vi v8, v0, 16 csrr a1, vlenb - li a2, 584 - mul a1, a1, a2 + li a3, 584 + mul a1, a1, a3 add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 + lui a3, 63 + addiw a3, a3, -1632 + add a1, a1, a3 vs8r.v v8, (a1) # Unknown-size Folded Spill - vsetvli zero, a3, e32, m8, ta, ma + vsetvli zero, a2, e32, m8, ta, ma vle32.v v0, (a0) csrr a0, vlenb lui a1, 1 @@ -118650,7 +118420,7 @@ addiw a1, a1, -1632 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vsetvli zero, a3, e32, m8, ta, ma + vsetvli zero, a2, e32, m8, ta, ma vle32.v v0, (s4) vsetivli zero, 1, e32, m8, ta, ma vslidedown.vi v16, v0, 31 @@ -127328,27 +127098,27 @@ add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload vslideup.vi v8, v0, 16 - ld a0, 48(sp) # 8-byte Folded Reload - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 224 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 63 - addiw a2, a2, -1632 - add a1, a1, a2 - vl8r.v v0, (a1) # Unknown-size Folded Reload + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 224 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + ld a0, 80(sp) # 8-byte Folded Reload vse32.v v0, (a0) - ld a1, 40(sp) # 8-byte Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -208 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -208 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 63 - addiw a2, a2, -1632 - add a0, a0, a2 + lui a1, 63 + addiw a1, a1, -1632 + add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload + ld a1, 72(sp) # 8-byte Folded Reload vse32.v v0, (a1) addi a0, a1, 68 csrr a2, vlenb @@ -128079,7 +127849,7 @@ sub sp, sp, a3 csrr a3, vlenb lui a4, 1 - addiw a4, a4, 6 + addiw a4, a4, 12 mul a3, a3, a4 sub sp, sp, a3 andi sp, sp, -128 @@ -128096,7 +127866,7 @@ sd a3, 0(sp) csrr a3, vlenb lui a4, 1 - addiw a4, a4, -274 + addiw a4, a4, -276 mul a3, a3, a4 add a3, sp, a3 lui a4, 28 @@ -128106,7 +127876,7 @@ vle64.v v8, (a7) csrr a3, vlenb lui a4, 1 - addiw a4, a4, -258 + addiw a4, a4, -260 mul a3, a3, a4 add a3, sp, a3 lui a4, 28 @@ -128117,7 +127887,7 @@ vle64.v v8, (a7) csrr a3, vlenb lui a4, 1 - addiw a4, a4, -362 + addiw a4, a4, -364 mul a3, a3, a4 add a3, sp, a3 lui a4, 28 @@ -128128,7 +127898,7 @@ vle64.v v8, (a7) csrr a3, vlenb lui a4, 1 - addiw a4, a4, -370 + addiw a4, a4, -372 mul a3, a3, a4 add a3, sp, a3 lui a4, 28 @@ -128155,7 +127925,7 @@ vle64.v v8, (a7) csrr a3, vlenb lui a4, 1 - addiw a4, a4, -314 + addiw a4, a4, -316 mul a3, a3, a4 add a3, sp, a3 lui a4, 28 @@ -128165,7 +127935,7 @@ vle64.v v8, (t0) csrr a3, vlenb lui a4, 1 - addiw a4, a4, -306 + addiw a4, a4, -308 mul a3, a3, a4 add a3, sp, a3 lui a4, 28 @@ -128175,7 +127945,7 @@ vle64.v v8, (t1) csrr a3, vlenb lui a4, 1 - addiw a4, a4, -298 + addiw a4, a4, -300 mul a3, a3, a4 add a3, sp, a3 lui a4, 28 @@ -128185,7 +127955,7 @@ vle64.v v8, (t2) csrr a3, vlenb lui a4, 1 - addiw a4, a4, -290 + addiw a4, a4, -292 mul a3, a3, a4 add a3, sp, a3 lui a4, 28 @@ -128195,7 +127965,7 @@ vle64.v v8, (t3) csrr a3, vlenb lui a4, 1 - addiw a4, a4, -282 + addiw a4, a4, -284 mul a3, a3, a4 add a3, sp, a3 lui a4, 28 @@ -128205,7 +127975,7 @@ vle64.v v8, (t4) csrr a3, vlenb lui a4, 1 - addiw a4, a4, -266 + addiw a4, a4, -268 mul a3, a3, a4 add a3, sp, a3 lui a4, 28 @@ -128215,7 +127985,7 @@ vle64.v v8, (t5) csrr a3, vlenb lui a4, 1 - addiw a4, a4, -394 + addiw a4, a4, -388 mul a3, a3, a4 add a3, sp, a3 lui a4, 28 @@ -128225,7 +127995,7 @@ vle64.v v8, (t6) csrr a3, vlenb lui a4, 1 - addiw a4, a4, -378 + addiw a4, a4, -252 mul a3, a3, a4 add a3, sp, a3 lui a4, 28 @@ -128235,7 +128005,7 @@ vle64.v v8, (s2) csrr a3, vlenb lui a4, 1 - addiw a4, a4, -250 + addiw a4, a4, -244 mul a3, a3, a4 add a3, sp, a3 lui a4, 28 @@ -128245,7 +128015,7 @@ vle64.v v8, (s3) csrr a3, vlenb lui a4, 1 - addiw a4, a4, -330 + addiw a4, a4, -380 mul a3, a3, a4 add a3, sp, a3 lui a4, 28 @@ -128255,7 +128025,7 @@ vle64.v v8, (s4) csrr a3, vlenb lui a4, 1 - addiw a4, a4, -386 + addiw a4, a4, -332 mul a3, a3, a4 add a3, sp, a3 lui a4, 28 @@ -128265,7 +128035,7 @@ vle64.v v8, (s5) csrr a3, vlenb lui a4, 1 - addiw a4, a4, -338 + addiw a4, a4, -340 mul a3, a3, a4 add a3, sp, a3 lui a4, 28 @@ -128275,7 +128045,7 @@ vle64.v v8, (s6) csrr a3, vlenb lui a4, 1 - addiw a4, a4, -418 + addiw a4, a4, -404 mul a3, a3, a4 add a3, sp, a3 lui a4, 28 @@ -128285,7 +128055,7 @@ vle64.v v8, (s7) csrr a3, vlenb lui a4, 1 - addiw a4, a4, -346 + addiw a4, a4, -348 mul a3, a3, a4 add a3, sp, a3 lui a4, 28 @@ -128295,7 +128065,7 @@ vle64.v v8, (s8) csrr a3, vlenb lui a4, 1 - addiw a4, a4, -354 + addiw a4, a4, -412 mul a3, a3, a4 add a3, sp, a3 lui a4, 28 @@ -128305,7 +128075,7 @@ vle64.v v8, (s9) csrr a3, vlenb lui a4, 1 - addiw a4, a4, -322 + addiw a4, a4, -356 mul a3, a3, a4 add a3, sp, a3 lui a4, 28 @@ -128315,7 +128085,7 @@ vle64.v v8, (a1) csrr a1, vlenb lui a3, 1 - addiw a3, a3, -410 + addiw a3, a3, -324 mul a1, a1, a3 add a1, sp, a1 lui a3, 28 @@ -128327,7 +128097,7 @@ vle64.v v8, (a2) csrr a3, vlenb lui a4, 1 - addiw a4, a4, -130 + addiw a4, a4, -28 mul a3, a3, a4 add a3, sp, a3 lui a4, 28 @@ -128339,7 +128109,7 @@ vle64.v v8, (a1) csrr a1, vlenb lui a3, 1 - addiw a3, a3, -2 + addiw a3, a3, -36 mul a1, a1, a3 add a1, sp, a1 lui a3, 28 @@ -128354,7 +128124,7 @@ addi a6, a2, 336 vle64.v v24, (a1) csrr a1, vlenb - li a3, 430 + li a3, 436 mul a1, a1, a3 add a1, sp, a1 lui a3, 28 @@ -128366,7 +128136,7 @@ vle64.v v8, (a6) csrr a3, vlenb lui a4, 1 - addiw a4, a4, -730 + addiw a4, a4, -724 mul a3, a3, a4 add a3, sp, a3 lui a4, 28 @@ -128379,7 +128149,7 @@ vle64.v v0, (a1) csrr a1, vlenb lui a3, 1 - addiw a3, a3, -722 + addiw a3, a3, -716 mul a1, a1, a3 add a1, sp, a1 lui a3, 28 @@ -128391,7 +128161,7 @@ vle64.v v0, (a6) csrr a3, vlenb lui a4, 1 - addiw a4, a4, -714 + addiw a4, a4, -708 mul a3, a3, a4 add a3, sp, a3 lui a4, 28 @@ -128404,7 +128174,7 @@ vle64.v v0, (a1) csrr a1, vlenb lui a3, 1 - addiw a3, a3, -698 + addiw a3, a3, -692 mul a1, a1, a3 add a1, sp, a1 lui a3, 28 @@ -128416,7 +128186,7 @@ vle64.v v0, (a6) csrr a3, vlenb lui a4, 1 - addiw a4, a4, -402 + addiw a4, a4, -396 mul a3, a3, a4 add a3, sp, a3 lui a4, 28 @@ -128429,7 +128199,7 @@ vle64.v v0, (a1) csrr a1, vlenb lui a3, 1 - addiw a3, a3, -706 + addiw a3, a3, -700 mul a1, a1, a3 add a1, sp, a1 lui a3, 28 @@ -128441,7 +128211,7 @@ vle64.v v0, (a6) csrr a3, vlenb lui a4, 1 - addiw a4, a4, -690 + addiw a4, a4, -684 mul a3, a3, a4 add a3, sp, a3 lui a4, 28 @@ -128454,7 +128224,7 @@ vle64.v v0, (a1) csrr a1, vlenb lui a3, 1 - addiw a3, a3, -666 + addiw a3, a3, -660 mul a1, a1, a3 add a1, sp, a1 lui a3, 28 @@ -128466,7 +128236,7 @@ vle64.v v0, (a6) csrr a3, vlenb lui a4, 1 - addiw a4, a4, -682 + addiw a4, a4, -676 mul a3, a3, a4 add a3, sp, a3 lui a4, 28 @@ -128479,7 +128249,7 @@ vle64.v v0, (a1) csrr a1, vlenb lui a3, 1 - addiw a3, a3, -674 + addiw a3, a3, -668 mul a1, a1, a3 add a1, sp, a1 lui a3, 28 @@ -128491,7 +128261,7 @@ vle64.v v0, (a6) csrr a3, vlenb lui a4, 1 - addiw a4, a4, -658 + addiw a4, a4, -652 mul a3, a3, a4 add a3, sp, a3 lui a4, 28 @@ -128504,7 +128274,7 @@ vle64.v v0, (a1) csrr a1, vlenb lui a3, 1 - addiw a3, a3, -634 + addiw a3, a3, -628 mul a1, a1, a3 add a1, sp, a1 lui a3, 28 @@ -128516,7 +128286,7 @@ vle64.v v0, (a6) csrr a3, vlenb lui a4, 1 - addiw a4, a4, -650 + addiw a4, a4, -644 mul a3, a3, a4 add a3, sp, a3 lui a4, 28 @@ -128529,7 +128299,7 @@ vle64.v v0, (a1) csrr a1, vlenb lui a3, 1 - addiw a3, a3, -642 + addiw a3, a3, -636 mul a1, a1, a3 add a1, sp, a1 lui a3, 28 @@ -128541,7 +128311,7 @@ vle64.v v0, (a6) csrr a3, vlenb lui a4, 1 - addiw a4, a4, -626 + addiw a4, a4, -620 mul a3, a3, a4 add a3, sp, a3 lui a4, 28 @@ -128554,7 +128324,7 @@ vle64.v v0, (a1) csrr a1, vlenb lui a3, 1 - addiw a3, a3, -602 + addiw a3, a3, -596 mul a1, a1, a3 add a1, sp, a1 lui a3, 28 @@ -128566,7 +128336,7 @@ vle64.v v0, (a6) csrr a3, vlenb lui a4, 1 - addiw a4, a4, -618 + addiw a4, a4, -612 mul a3, a3, a4 add a3, sp, a3 lui a4, 28 @@ -128579,7 +128349,7 @@ vle64.v v0, (a1) csrr a1, vlenb lui a3, 1 - addiw a3, a3, -610 + addiw a3, a3, -604 mul a1, a1, a3 add a1, sp, a1 lui a3, 28 @@ -128591,7 +128361,7 @@ vle64.v v0, (a6) csrr a3, vlenb lui a4, 1 - addiw a4, a4, -594 + addiw a4, a4, -588 mul a3, a3, a4 add a3, sp, a3 lui a4, 28 @@ -128604,7 +128374,7 @@ vle64.v v0, (a1) csrr a1, vlenb lui a3, 1 - addiw a3, a3, -562 + addiw a3, a3, -556 mul a1, a1, a3 add a1, sp, a1 lui a3, 28 @@ -128616,7 +128386,7 @@ vle64.v v0, (a2) csrr a2, vlenb lui a3, 1 - addiw a3, a3, -586 + addiw a3, a3, -580 mul a2, a2, a3 add a2, sp, a2 lui a3, 28 @@ -128629,7 +128399,7 @@ vle64.v v0, (a1) csrr a1, vlenb lui a3, 1 - addiw a3, a3, -578 + addiw a3, a3, -572 mul a1, a1, a3 add a1, sp, a1 lui a3, 28 @@ -128641,7 +128411,7 @@ vle64.v v0, (a2) csrr a2, vlenb lui a3, 1 - addiw a3, a3, -570 + addiw a3, a3, -564 mul a2, a2, a3 add a2, sp, a2 lui a3, 28 @@ -128653,7 +128423,7 @@ vle64.v v0, (a1) csrr a1, vlenb lui a2, 1 - addiw a2, a2, -546 + addiw a2, a2, -540 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -128665,7 +128435,7 @@ vle64.v v0, (a5) csrr a2, vlenb lui a3, 1 - addiw a3, a3, -554 + addiw a3, a3, -548 mul a2, a2, a3 add a2, sp, a2 lui a3, 28 @@ -128679,7 +128449,7 @@ vle64.v v0, (a1) csrr a1, vlenb lui a3, 1 - addiw a3, a3, -538 + addiw a3, a3, -532 mul a1, a1, a3 add a1, sp, a1 lui a3, 28 @@ -128691,7 +128461,7 @@ vle64.v v0, (a2) csrr a2, vlenb lui a3, 1 - addiw a3, a3, -530 + addiw a3, a3, -524 mul a2, a2, a3 add a2, sp, a2 lui a3, 28 @@ -128705,7 +128475,7 @@ vle64.v v0, (a1) csrr a1, vlenb lui a3, 1 - addiw a3, a3, -522 + addiw a3, a3, -516 mul a1, a1, a3 add a1, sp, a1 lui a3, 28 @@ -128717,7 +128487,7 @@ vle64.v v0, (a2) csrr a2, vlenb lui a3, 1 - addiw a3, a3, -234 + addiw a3, a3, -20 mul a2, a2, a3 add a2, sp, a2 lui a3, 28 @@ -128731,7 +128501,7 @@ vle64.v v0, (a1) csrr a1, vlenb lui a3, 1 - addiw a3, a3, -218 + addiw a3, a3, -204 mul a1, a1, a3 add a1, sp, a1 lui a3, 28 @@ -128743,7 +128513,7 @@ vle64.v v0, (a2) csrr a2, vlenb lui a3, 1 - addiw a3, a3, -514 + addiw a3, a3, -508 mul a2, a2, a3 add a2, sp, a2 lui a3, 28 @@ -128757,7 +128527,7 @@ vle64.v v0, (a1) csrr a1, vlenb lui a3, 1 - addiw a3, a3, -498 + addiw a3, a3, -492 mul a1, a1, a3 add a1, sp, a1 lui a3, 28 @@ -128769,7 +128539,7 @@ vle64.v v0, (a2) csrr a2, vlenb lui a3, 1 - addiw a3, a3, -506 + addiw a3, a3, -500 mul a2, a2, a3 add a2, sp, a2 lui a3, 28 @@ -128783,7 +128553,7 @@ vle64.v v0, (a1) csrr a1, vlenb lui a3, 1 - addiw a3, a3, -490 + addiw a3, a3, -484 mul a1, a1, a3 add a1, sp, a1 lui a3, 28 @@ -128795,7 +128565,7 @@ vle64.v v0, (a2) csrr a2, vlenb lui a3, 1 - addiw a3, a3, -482 + addiw a3, a3, -476 mul a2, a2, a3 add a2, sp, a2 lui a3, 28 @@ -128809,7 +128579,7 @@ vle64.v v0, (a1) csrr a1, vlenb lui a3, 1 - addiw a3, a3, -458 + addiw a3, a3, -452 mul a1, a1, a3 add a1, sp, a1 lui a3, 28 @@ -128821,7 +128591,7 @@ vle64.v v0, (a2) csrr a1, vlenb lui a2, 1 - addiw a2, a2, -474 + addiw a2, a2, -468 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -128835,7 +128605,7 @@ vle64.v v0, (ra) csrr a1, vlenb lui a3, 1 - addiw a3, a3, -466 + addiw a3, a3, -460 mul a1, a1, a3 add a1, sp, a1 lui a3, 28 @@ -128847,7 +128617,7 @@ vle64.v v0, (a2) csrr a1, vlenb lui a2, 1 - addiw a2, a2, -450 + addiw a2, a2, -444 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -128859,7 +128629,7 @@ vle64.v v0, (ra) csrr a1, vlenb lui a3, 1 - addiw a3, a3, -434 + addiw a3, a3, -428 mul a1, a1, a3 add a1, sp, a1 lui a3, 28 @@ -128871,7 +128641,7 @@ vle64.v v0, (a2) csrr a1, vlenb lui a2, 1 - addiw a2, a2, -442 + addiw a2, a2, -436 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -128885,7 +128655,7 @@ vle64.v v0, (ra) csrr a1, vlenb lui a3, 1 - addiw a3, a3, -426 + addiw a3, a3, -420 mul a1, a1, a3 add a1, sp, a1 lui a3, 28 @@ -128894,7 +128664,7 @@ vs8r.v v0, (a1) # Unknown-size Folded Spill vsetivli zero, 16, e64, m8, ta, ma csrr a1, vlenb - li a3, 214 + li a3, 220 mul a1, a1, a3 add a1, sp, a1 lui a3, 28 @@ -128909,7 +128679,7 @@ vsetivli zero, 1, e64, m1, ta, ma vle64.v v0, (s11) csrr a0, vlenb - li a1, 502 + li a1, 508 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -128918,7 +128688,7 @@ vs8r.v v0, (a0) # Unknown-size Folded Spill vle64.v v0, (s10) csrr a0, vlenb - li a1, 278 + li a1, 284 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -128928,7 +128698,7 @@ vsetivli zero, 1, e64, m2, ta, ma vslidedown.vi v0, v24, 3 csrr a0, vlenb - li a1, 486 + li a1, 492 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -128937,7 +128707,7 @@ vs8r.v v0, (a0) # Unknown-size Folded Spill vslidedown.vi v0, v24, 2 csrr a0, vlenb - li a1, 470 + li a1, 476 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -128983,7 +128753,7 @@ add t2, sp, a3 vslidedown.vi v0, v24, 1 csrr a4, vlenb - li a3, 446 + li a3, 452 mul a4, a4, a3 add a4, sp, a4 lui a3, 28 @@ -128993,7 +128763,7 @@ vs8r.v v0, (a4) # Unknown-size Folded Spill vle64.v v24, (s10) csrr s10, vlenb - li a4, 414 + li a4, 420 mul s10, s10, a4 add s10, sp, s10 lui a4, 28 @@ -129003,7 +128773,7 @@ vs8r.v v24, (s10) # Unknown-size Folded Spill vle64.v v24, (s11) csrr s10, vlenb - li s11, 398 + li s11, 404 mul s10, s10, s11 add s10, sp, s10 lui s11, 28 @@ -129012,7 +128782,7 @@ vs8r.v v24, (s10) # Unknown-size Folded Spill vle64.v v24, (ra) csrr s10, vlenb - li s11, 382 + li s11, 388 mul s10, s10, s11 add s10, sp, s10 lui s11, 28 @@ -129021,7 +128791,7 @@ vs8r.v v24, (s10) # Unknown-size Folded Spill vle64.v v24, (a0) csrr a0, vlenb - li s10, 366 + li s10, 372 mul a0, a0, s10 add a0, sp, a0 lui s10, 28 @@ -129031,7 +128801,7 @@ vle64.v v24, (a1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -138 + addiw a1, a1, -44 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129040,7 +128810,7 @@ vs8r.v v24, (a0) # Unknown-size Folded Spill vle64.v v24, (a2) csrr a0, vlenb - li a1, 350 + li a1, 356 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129049,7 +128819,7 @@ vs8r.v v24, (a0) # Unknown-size Folded Spill vle64.v v24, (a5) csrr a0, vlenb - li a1, 334 + li a1, 340 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129058,7 +128828,7 @@ vs8r.v v24, (a0) # Unknown-size Folded Spill vle64.v v24, (a6) csrr a0, vlenb - li a1, 318 + li a1, 324 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129067,7 +128837,7 @@ vs8r.v v24, (a0) # Unknown-size Folded Spill vle64.v v24, (a7) csrr a0, vlenb - li a1, 302 + li a1, 308 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129076,7 +128846,7 @@ vs8r.v v24, (a0) # Unknown-size Folded Spill vle64.v v24, (t0) csrr a0, vlenb - li a1, 294 + li a1, 300 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129085,7 +128855,7 @@ vs8r.v v24, (a0) # Unknown-size Folded Spill vle64.v v24, (t1) csrr a0, vlenb - li a1, 270 + li a1, 276 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129094,7 +128864,7 @@ vs8r.v v24, (a0) # Unknown-size Folded Spill vle64.v v24, (t2) csrr a0, vlenb - li a1, 246 + li a1, 252 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129103,7 +128873,7 @@ vs8r.v v24, (a0) # Unknown-size Folded Spill vslidedown.vi v24, v16, 1 csrr a0, vlenb - li a1, 230 + li a1, 236 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129113,7 +128883,7 @@ vsetivli zero, 1, e64, m2, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2 + addiw a1, a1, -36 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129122,7 +128892,7 @@ vl8r.v v24, (a0) # Unknown-size Folded Reload vslidedown.vi v0, v24, 3 csrr a0, vlenb - li a1, 206 + li a1, 212 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129131,7 +128901,7 @@ vs8r.v v0, (a0) # Unknown-size Folded Spill vslidedown.vi v0, v24, 2 csrr a0, vlenb - li a1, 198 + li a1, 204 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129141,7 +128911,7 @@ vsetivli zero, 1, e64, m1, ta, ma vslidedown.vi v24, v24, 1 csrr a0, vlenb - li a1, 190 + li a1, 196 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129154,7 +128924,7 @@ add a0, sp, a0 vslidedown.vi v24, v16, 3 csrr a1, vlenb - li a2, 238 + li a2, 244 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -129163,7 +128933,7 @@ vs8r.v v24, (a1) # Unknown-size Folded Spill vslidedown.vi v24, v16, 2 csrr a1, vlenb - li a2, 222 + li a2, 228 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -129173,7 +128943,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a1, vlenb lui a2, 1 - addiw a2, a2, -714 + addiw a2, a2, -708 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -129188,7 +128958,7 @@ vsetivli zero, 1, e64, m1, ta, ma vle64.v v24, (s9) csrr a0, vlenb - li a1, 830 + li a1, 836 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129197,7 +128967,7 @@ vs8r.v v24, (a0) # Unknown-size Folded Spill vle64.v v16, (s8) csrr a0, vlenb - li a1, 614 + li a1, 620 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129207,7 +128977,7 @@ vsetivli zero, 1, e64, m2, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -698 + addiw a1, a1, -692 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129216,7 +128986,7 @@ vl8r.v v16, (a0) # Unknown-size Folded Reload vslidedown.vi v24, v16, 3 csrr a0, vlenb - li a1, 798 + li a1, 804 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129225,7 +128995,7 @@ vs8r.v v24, (a0) # Unknown-size Folded Spill vslidedown.vi v24, v16, 2 csrr a0, vlenb - li a1, 774 + li a1, 780 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129272,7 +129042,7 @@ vslidedown.vi v24, v16, 1 csrr s11, vlenb lui ra, 1 - addiw ra, ra, -26 + addiw ra, ra, -52 mul s11, s11, ra add s11, sp, s11 lui ra, 28 @@ -129281,7 +129051,7 @@ vs8r.v v24, (s11) # Unknown-size Folded Spill vle64.v v16, (a0) csrr a0, vlenb - li s11, 742 + li s11, 748 mul a0, a0, s11 add a0, sp, a0 lui s11, 28 @@ -129290,7 +129060,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (a1) csrr a0, vlenb - li a1, 734 + li a1, 740 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129299,7 +129069,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (a2) csrr a0, vlenb - li a1, 718 + li a1, 724 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129308,7 +129078,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (a5) csrr a0, vlenb - li a1, 702 + li a1, 708 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129317,7 +129087,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (a6) csrr a0, vlenb - li a1, 686 + li a1, 692 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129326,7 +129096,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (a7) csrr a0, vlenb - li a1, 670 + li a1, 676 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129335,7 +129105,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (t0) csrr a0, vlenb - li a1, 654 + li a1, 660 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129344,7 +129114,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (t1) csrr a0, vlenb - li a1, 638 + li a1, 644 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129353,7 +129123,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (t2) csrr a0, vlenb - li a1, 622 + li a1, 628 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129362,7 +129132,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (s8) csrr a0, vlenb - li a1, 598 + li a1, 604 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129371,7 +129141,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (s9) csrr a0, vlenb - li a1, 582 + li a1, 588 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129380,7 +129150,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (s10) csrr a0, vlenb - li a1, 566 + li a1, 572 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129391,7 +129161,7 @@ vslidedown.vi v16, v8, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -34 + addiw a1, a1, 4 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129401,7 +129171,7 @@ vsetivli zero, 1, e64, m2, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -722 + addiw a1, a1, -716 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129410,7 +129180,7 @@ vl8r.v v0, (a0) # Unknown-size Folded Reload vslidedown.vi v16, v0, 3 csrr a0, vlenb - li a1, 526 + li a1, 532 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129419,7 +129189,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v0, 2 csrr a0, vlenb - li a1, 510 + li a1, 516 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129465,7 +129235,7 @@ add s10, sp, s10 vslidedown.vi v16, v0, 1 csrr s11, vlenb - li ra, 478 + li ra, 484 mul s11, s11, ra add s11, sp, s11 lui ra, 28 @@ -129474,7 +129244,7 @@ vs8r.v v16, (s11) # Unknown-size Folded Spill vle64.v v16, (a0) csrr a0, vlenb - li s11, 462 + li s11, 468 mul a0, a0, s11 add a0, sp, a0 lui s11, 28 @@ -129483,7 +129253,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (a1) csrr a0, vlenb - li a1, 454 + li a1, 460 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129492,7 +129262,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (a2) csrr a0, vlenb - li a1, 438 + li a1, 444 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129501,7 +129271,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (a5) csrr a0, vlenb - li a1, 422 + li a1, 428 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129510,7 +129280,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (a6) csrr a0, vlenb - li a1, 406 + li a1, 412 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129519,7 +129289,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (a7) csrr a0, vlenb - li a1, 390 + li a1, 396 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129528,7 +129298,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (t0) csrr a0, vlenb - li a1, 374 + li a1, 380 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129537,7 +129307,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (t1) csrr a0, vlenb - li a1, 358 + li a1, 364 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129546,7 +129316,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (t2) csrr a0, vlenb - li a1, 342 + li a1, 348 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129556,7 +129326,7 @@ vle64.v v16, (s8) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -10 + addiw a1, a1, -60 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129565,7 +129335,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (s9) csrr a0, vlenb - li a1, 326 + li a1, 332 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129574,7 +129344,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (s10) csrr a0, vlenb - li a1, 310 + li a1, 316 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129583,7 +129353,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, -730 + addiw a1, a1, -724 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129592,7 +129362,7 @@ vl8r.v v16, (a0) # Unknown-size Folded Reload vslidedown.vi v24, v16, 1 csrr a0, vlenb - li a1, 262 + li a1, 268 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129605,7 +129375,7 @@ add a0, sp, a0 vslidedown.vi v24, v8, 3 csrr a1, vlenb - li a2, 518 + li a2, 524 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -129614,7 +129384,7 @@ vs8r.v v24, (a1) # Unknown-size Folded Spill vslidedown.vi v24, v8, 2 csrr a1, vlenb - li a2, 494 + li a2, 500 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -129623,7 +129393,7 @@ vs8r.v v24, (a1) # Unknown-size Folded Spill vslidedown.vi v8, v16, 3 csrr a1, vlenb - li a2, 286 + li a2, 292 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -129632,7 +129402,7 @@ vs8r.v v8, (a1) # Unknown-size Folded Spill vslidedown.vi v8, v16, 2 csrr a1, vlenb - li a2, 254 + li a2, 260 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -129642,7 +129412,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a1, vlenb lui a2, 1 - addiw a2, a2, -690 + addiw a2, a2, -684 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -129655,7 +129425,7 @@ add a0, sp, a0 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -402 + addiw a2, a2, -396 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -129666,7 +129436,7 @@ vsetivli zero, 1, e64, m1, ta, ma vle64.v v16, (s7) csrr a0, vlenb - li a1, 1118 + li a1, 1124 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129675,7 +129445,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v8, (s6) csrr a0, vlenb - li a1, 886 + li a1, 892 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129685,7 +129455,7 @@ vsetivli zero, 1, e64, m2, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -666 + addiw a1, a1, -660 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129694,7 +129464,7 @@ vl8r.v v0, (a0) # Unknown-size Folded Reload vslidedown.vi v16, v0, 3 csrr a0, vlenb - li a1, 1094 + li a1, 1100 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129703,7 +129473,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v0, 2 csrr a0, vlenb - li a1, 1070 + li a1, 1076 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129749,7 +129519,7 @@ add s8, sp, s8 vslidedown.vi v8, v0, 1 csrr s9, vlenb - li s10, 1038 + li s10, 1044 mul s9, s9, s10 add s9, sp, s9 lui s10, 28 @@ -129758,7 +129528,7 @@ vs8r.v v8, (s9) # Unknown-size Folded Spill vle64.v v8, (a0) csrr a0, vlenb - li s9, 1022 + li s9, 1028 mul a0, a0, s9 add a0, sp, a0 lui s9, 28 @@ -129767,7 +129537,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (a1) csrr a0, vlenb - li a1, 1006 + li a1, 1012 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129776,7 +129546,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (a2) csrr a0, vlenb - li a1, 990 + li a1, 996 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129785,7 +129555,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (a5) csrr a0, vlenb - li a1, 974 + li a1, 980 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129794,7 +129564,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (a6) csrr a0, vlenb - li a1, 958 + li a1, 964 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129803,7 +129573,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (a7) csrr a0, vlenb - li a1, 942 + li a1, 948 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129812,7 +129582,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (t0) csrr a0, vlenb - li a1, 926 + li a1, 932 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129821,7 +129591,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (t1) csrr a0, vlenb - li a1, 910 + li a1, 916 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129831,7 +129601,7 @@ vle64.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -146 + addiw a1, a1, -68 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129840,7 +129610,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (s6) csrr a0, vlenb - li a1, 894 + li a1, 900 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129849,7 +129619,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (s7) csrr a0, vlenb - li a1, 870 + li a1, 876 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129858,7 +129628,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (s8) csrr a0, vlenb - li a1, 854 + li a1, 860 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129868,7 +129638,7 @@ vmv2r.v v8, v24 vslidedown.vi v16, v8, 1 csrr a0, vlenb - li a1, 822 + li a1, 828 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129878,7 +129648,7 @@ vsetivli zero, 1, e64, m2, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -706 + addiw a1, a1, -700 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129887,7 +129657,7 @@ vl8r.v v0, (a0) # Unknown-size Folded Reload vslidedown.vi v16, v0, 3 csrr a0, vlenb - li a1, 782 + li a1, 788 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129896,7 +129666,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v0, 2 csrr a0, vlenb - li a1, 758 + li a1, 764 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129942,7 +129712,7 @@ add s8, sp, s8 vslidedown.vi v16, v0, 1 csrr s9, vlenb - li s10, 750 + li s10, 756 mul s9, s9, s10 add s9, sp, s9 lui s10, 28 @@ -129951,7 +129721,7 @@ vs8r.v v16, (s9) # Unknown-size Folded Spill vle64.v v16, (a0) csrr a0, vlenb - li s9, 726 + li s9, 732 mul a0, a0, s9 add a0, sp, a0 lui s9, 28 @@ -129960,7 +129730,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (a1) csrr a0, vlenb - li a1, 710 + li a1, 716 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129969,7 +129739,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (a2) csrr a0, vlenb - li a1, 694 + li a1, 700 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129979,7 +129749,7 @@ vle64.v v16, (a5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -42 + addiw a1, a1, -76 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129988,7 +129758,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (a6) csrr a0, vlenb - li a1, 678 + li a1, 684 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -129997,7 +129767,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (a7) csrr a0, vlenb - li a1, 662 + li a1, 668 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130006,7 +129776,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (t0) csrr a0, vlenb - li a1, 646 + li a1, 652 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130015,7 +129785,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (t1) csrr a0, vlenb - li a1, 630 + li a1, 636 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130024,7 +129794,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (t2) csrr a0, vlenb - li a1, 606 + li a1, 612 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130033,7 +129803,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (s6) csrr a0, vlenb - li a1, 590 + li a1, 596 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130042,7 +129812,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (s7) csrr a0, vlenb - li a1, 574 + li a1, 580 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130051,7 +129821,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (s8) csrr a0, vlenb - li a1, 558 + li a1, 564 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130060,7 +129830,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, -402 + addiw a1, a1, -396 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130069,7 +129839,7 @@ vl8r.v v16, (a0) # Unknown-size Folded Reload vslidedown.vi v24, v16, 1 csrr a0, vlenb - li a1, 542 + li a1, 548 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130082,7 +129852,7 @@ add a0, sp, a0 vslidedown.vi v0, v8, 3 csrr a1, vlenb - li a2, 790 + li a2, 796 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -130091,7 +129861,7 @@ vs8r.v v0, (a1) # Unknown-size Folded Spill vslidedown.vi v0, v8, 2 csrr a1, vlenb - li a2, 766 + li a2, 772 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -130100,7 +129870,7 @@ vs8r.v v0, (a1) # Unknown-size Folded Spill vslidedown.vi v8, v16, 3 csrr a1, vlenb - li a2, 550 + li a2, 556 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -130109,7 +129879,7 @@ vs8r.v v8, (a1) # Unknown-size Folded Spill vslidedown.vi v8, v16, 2 csrr a1, vlenb - li a2, 534 + li a2, 540 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -130119,7 +129889,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a1, vlenb lui a2, 1 - addiw a2, a2, -658 + addiw a2, a2, -652 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -130132,7 +129902,7 @@ add a0, sp, a0 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -682 + addiw a2, a2, -676 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -130143,7 +129913,7 @@ vsetivli zero, 1, e64, m1, ta, ma vle64.v v8, (s5) csrr a0, vlenb - li a1, 1398 + li a1, 1404 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130152,7 +129922,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (s4) csrr a0, vlenb - li a1, 1166 + li a1, 1172 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130162,7 +129932,7 @@ vsetivli zero, 1, e64, m2, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -634 + addiw a1, a1, -628 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130171,7 +129941,7 @@ vl8r.v v0, (a0) # Unknown-size Folded Reload vslidedown.vi v8, v0, 3 csrr a0, vlenb - li a1, 1374 + li a1, 1380 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130180,7 +129950,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vslidedown.vi v8, v0, 2 csrr a0, vlenb - li a1, 1350 + li a1, 1356 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130226,7 +129996,7 @@ add s6, sp, s6 vslidedown.vi v8, v0, 1 csrr s7, vlenb - li s8, 1318 + li s8, 1324 mul s7, s7, s8 add s7, sp, s7 lui s8, 28 @@ -130235,7 +130005,7 @@ vs8r.v v8, (s7) # Unknown-size Folded Spill vle64.v v8, (a0) csrr a0, vlenb - li s7, 1302 + li s7, 1308 mul a0, a0, s7 add a0, sp, a0 lui s7, 28 @@ -130244,7 +130014,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (a1) csrr a0, vlenb - li a1, 1286 + li a1, 1292 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130254,7 +130024,7 @@ vle64.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -50 + addiw a1, a1, -84 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130263,7 +130033,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (a5) csrr a0, vlenb - li a1, 1270 + li a1, 1276 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130272,7 +130042,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (a6) csrr a0, vlenb - li a1, 1254 + li a1, 1260 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130281,7 +130051,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (a7) csrr a0, vlenb - li a1, 1238 + li a1, 1244 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130290,7 +130060,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (t0) csrr a0, vlenb - li a1, 1222 + li a1, 1228 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130299,7 +130069,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (t1) csrr a0, vlenb - li a1, 1206 + li a1, 1212 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130308,7 +130078,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (t2) csrr a0, vlenb - li a1, 1190 + li a1, 1196 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130317,7 +130087,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (s4) csrr a0, vlenb - li a1, 1174 + li a1, 1180 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130326,7 +130096,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (s5) csrr a0, vlenb - li a1, 1150 + li a1, 1156 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130335,7 +130105,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (s6) csrr a0, vlenb - li a1, 1134 + li a1, 1140 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130345,7 +130115,7 @@ vmv2r.v v8, v16 vslidedown.vi v16, v8, 1 csrr a0, vlenb - li a1, 1102 + li a1, 1108 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130355,7 +130125,7 @@ vsetivli zero, 1, e64, m2, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -674 + addiw a1, a1, -668 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130364,7 +130134,7 @@ vl8r.v v0, (a0) # Unknown-size Folded Reload vslidedown.vi v16, v0, 3 csrr a0, vlenb - li a1, 1054 + li a1, 1060 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130374,7 +130144,7 @@ vslidedown.vi v16, v0, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -58 + addiw a1, a1, -132 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130420,7 +130190,7 @@ add s6, sp, s6 vslidedown.vi v16, v0, 1 csrr s7, vlenb - li s8, 1030 + li s8, 1036 mul s7, s7, s8 add s7, sp, s7 lui s8, 28 @@ -130429,7 +130199,7 @@ vs8r.v v16, (s7) # Unknown-size Folded Spill vle64.v v16, (a0) csrr a0, vlenb - li s7, 1014 + li s7, 1020 mul a0, a0, s7 add a0, sp, a0 lui s7, 28 @@ -130438,7 +130208,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (a1) csrr a0, vlenb - li a1, 998 + li a1, 1004 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130447,7 +130217,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (a2) csrr a0, vlenb - li a1, 982 + li a1, 988 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130456,7 +130226,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (a5) csrr a0, vlenb - li a1, 966 + li a1, 972 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130465,7 +130235,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (a6) csrr a0, vlenb - li a1, 950 + li a1, 956 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130474,7 +130244,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (a7) csrr a0, vlenb - li a1, 934 + li a1, 940 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130483,7 +130253,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (t0) csrr a0, vlenb - li a1, 918 + li a1, 924 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130492,7 +130262,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (t1) csrr a0, vlenb - li a1, 902 + li a1, 908 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130501,7 +130271,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (t2) csrr a0, vlenb - li a1, 878 + li a1, 884 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130510,7 +130280,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (s4) csrr a0, vlenb - li a1, 862 + li a1, 868 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130519,7 +130289,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (s5) csrr a0, vlenb - li a1, 846 + li a1, 852 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130528,7 +130298,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (s6) csrr a0, vlenb - li a1, 838 + li a1, 844 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130538,7 +130308,7 @@ vmv2r.v v16, v24 vslidedown.vi v0, v16, 1 csrr a0, vlenb - li a1, 814 + li a1, 820 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130551,7 +130321,7 @@ add a0, sp, a0 vslidedown.vi v0, v8, 3 csrr a1, vlenb - li a2, 1062 + li a2, 1068 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -130560,7 +130330,7 @@ vs8r.v v0, (a1) # Unknown-size Folded Spill vslidedown.vi v0, v8, 2 csrr a1, vlenb - li a2, 1046 + li a2, 1052 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -130569,7 +130339,7 @@ vs8r.v v0, (a1) # Unknown-size Folded Spill vslidedown.vi v8, v24, 3 csrr a1, vlenb - li a2, 806 + li a2, 812 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -130579,7 +130349,7 @@ vslidedown.vi v8, v24, 2 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -66 + addiw a2, a2, -140 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -130589,7 +130359,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a1, vlenb lui a2, 1 - addiw a2, a2, -626 + addiw a2, a2, -620 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -130602,7 +130372,7 @@ add a0, sp, a0 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -650 + addiw a2, a2, -644 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -130613,7 +130383,7 @@ vsetivli zero, 1, e64, m1, ta, ma vle64.v v8, (s3) csrr a0, vlenb - li a1, 1678 + li a1, 1684 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130622,7 +130392,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (s2) csrr a0, vlenb - li a1, 1462 + li a1, 1468 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130632,7 +130402,7 @@ vsetivli zero, 1, e64, m2, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -602 + addiw a1, a1, -596 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130642,7 +130412,7 @@ vslidedown.vi v8, v0, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -154 + addiw a1, a1, -92 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130651,7 +130421,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vslidedown.vi v8, v0, 2 csrr a0, vlenb - li a1, 1654 + li a1, 1660 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130697,7 +130467,7 @@ add s4, sp, s4 vslidedown.vi v8, v0, 1 csrr s5, vlenb - li s6, 1614 + li s6, 1612 mul s5, s5, s6 add s5, sp, s5 lui s6, 28 @@ -130706,7 +130476,7 @@ vs8r.v v8, (s5) # Unknown-size Folded Spill vle64.v v8, (a0) csrr a0, vlenb - li s5, 1590 + li s5, 1596 mul a0, a0, s5 add a0, sp, a0 lui s5, 28 @@ -130715,7 +130485,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (a1) csrr a0, vlenb - li a1, 1582 + li a1, 1588 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130724,7 +130494,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (a2) csrr a0, vlenb - li a1, 1566 + li a1, 1572 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130733,7 +130503,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (a5) csrr a0, vlenb - li a1, 1550 + li a1, 1556 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130742,7 +130512,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (a6) csrr a0, vlenb - li a1, 1534 + li a1, 1540 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130751,7 +130521,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (a7) csrr a0, vlenb - li a1, 1518 + li a1, 1524 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130760,7 +130530,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (t0) csrr a0, vlenb - li a1, 1502 + li a1, 1508 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130769,7 +130539,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (t1) csrr a0, vlenb - li a1, 1486 + li a1, 1492 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130778,7 +130548,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (t2) csrr a0, vlenb - li a1, 1470 + li a1, 1476 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130787,7 +130557,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (s2) csrr a0, vlenb - li a1, 1446 + li a1, 1452 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130796,7 +130566,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (s3) csrr a0, vlenb - li a1, 1430 + li a1, 1436 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130805,7 +130575,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (s4) csrr a0, vlenb - li a1, 1414 + li a1, 1420 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130815,7 +130585,7 @@ vmv2r.v v8, v16 vslidedown.vi v16, v8, 1 csrr a0, vlenb - li a1, 1390 + li a1, 1396 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130825,7 +130595,7 @@ vsetivli zero, 1, e64, m2, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -642 + addiw a1, a1, -636 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130834,7 +130604,7 @@ vl8r.v v0, (a0) # Unknown-size Folded Reload vslidedown.vi v16, v0, 3 csrr a0, vlenb - li a1, 1342 + li a1, 1348 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130843,7 +130613,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v0, 2 csrr a0, vlenb - li a1, 1326 + li a1, 1332 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130889,7 +130659,7 @@ add s4, sp, s4 vslidedown.vi v16, v0, 1 csrr s5, vlenb - li s6, 1310 + li s6, 1316 mul s5, s5, s6 add s5, sp, s5 lui s6, 28 @@ -130898,7 +130668,7 @@ vs8r.v v16, (s5) # Unknown-size Folded Spill vle64.v v16, (a0) csrr a0, vlenb - li s5, 1294 + li s5, 1300 mul a0, a0, s5 add a0, sp, a0 lui s5, 28 @@ -130907,7 +130677,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (a1) csrr a0, vlenb - li a1, 1278 + li a1, 1284 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130916,7 +130686,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (a2) csrr a0, vlenb - li a1, 1262 + li a1, 1268 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130925,7 +130695,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (a5) csrr a0, vlenb - li a1, 1246 + li a1, 1252 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130934,7 +130704,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (a6) csrr a0, vlenb - li a1, 1230 + li a1, 1236 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130943,7 +130713,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (a7) csrr a0, vlenb - li a1, 1214 + li a1, 1220 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130952,7 +130722,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (t0) csrr a0, vlenb - li a1, 1198 + li a1, 1204 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130962,7 +130732,7 @@ vle64.v v16, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -162 + addiw a1, a1, -148 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130971,7 +130741,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (t2) csrr a0, vlenb - li a1, 1182 + li a1, 1188 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130980,7 +130750,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (s2) csrr a0, vlenb - li a1, 1158 + li a1, 1164 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130989,7 +130759,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (s3) csrr a0, vlenb - li a1, 1142 + li a1, 1148 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -130998,7 +130768,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (s4) csrr a0, vlenb - li a1, 1126 + li a1, 1132 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131008,7 +130778,7 @@ vmv2r.v v0, v24 vslidedown.vi v16, v0, 1 csrr a0, vlenb - li a1, 1086 + li a1, 1092 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131022,7 +130792,7 @@ vslidedown.vi v16, v8, 3 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -170 + addiw a2, a2, -156 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -131031,7 +130801,7 @@ vs8r.v v16, (a1) # Unknown-size Folded Spill vslidedown.vi v16, v8, 2 csrr a1, vlenb - li a2, 1334 + li a2, 1340 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -131040,7 +130810,7 @@ vs8r.v v16, (a1) # Unknown-size Folded Spill vslidedown.vi v8, v24, 3 csrr a1, vlenb - li a2, 1110 + li a2, 1116 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -131049,7 +130819,7 @@ vs8r.v v8, (a1) # Unknown-size Folded Spill vslidedown.vi v8, v24, 2 csrr a1, vlenb - li a2, 1078 + li a2, 1084 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -131059,7 +130829,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a1, vlenb lui a2, 1 - addiw a2, a2, -594 + addiw a2, a2, -588 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -131072,7 +130842,7 @@ add a0, sp, a0 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -618 + addiw a2, a2, -612 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -131084,7 +130854,7 @@ vle64.v v8, (t6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1978 + addiw a1, a1, -1972 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131093,7 +130863,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (t5) csrr a0, vlenb - li a1, 1718 + li a1, 1724 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131103,7 +130873,7 @@ vsetivli zero, 1, e64, m2, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -562 + addiw a1, a1, -556 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131113,7 +130883,7 @@ vslidedown.vi v8, v0, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2010 + addiw a1, a1, -2004 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131122,7 +130892,8 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vslidedown.vi v8, v0, 2 csrr a0, vlenb - li a1, 2046 + lui a1, 1 + addiw a1, a1, -2044 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131168,7 +130939,7 @@ add s2, sp, s2 vslidedown.vi v8, v0, 1 csrr s3, vlenb - li s4, 1974 + li s4, 1980 mul s3, s3, s4 add s3, sp, s3 lui s4, 28 @@ -131177,7 +130948,7 @@ vs8r.v v8, (s3) # Unknown-size Folded Spill vle64.v v8, (a0) csrr a0, vlenb - li s3, 1918 + li s3, 1924 mul a0, a0, s3 add a0, sp, a0 lui s3, 28 @@ -131186,7 +130957,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (a1) csrr a0, vlenb - li a1, 1886 + li a1, 1892 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131195,7 +130966,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (a2) csrr a0, vlenb - li a1, 1854 + li a1, 1860 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131204,7 +130975,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (a5) csrr a0, vlenb - li a1, 1830 + li a1, 1836 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131213,7 +130984,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (a6) csrr a0, vlenb - li a1, 1806 + li a1, 1812 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131222,7 +130993,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (a7) csrr a0, vlenb - li a1, 1782 + li a1, 1788 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131232,7 +131003,7 @@ vle64.v v8, (t0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -178 + addiw a1, a1, -100 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131241,7 +131012,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (t1) csrr a0, vlenb - li a1, 1766 + li a1, 1772 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131250,7 +131021,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (t2) csrr a0, vlenb - li a1, 1742 + li a1, 1748 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131259,7 +131030,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (t5) csrr a0, vlenb - li a1, 1726 + li a1, 1732 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131268,7 +131039,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (t6) csrr a0, vlenb - li a1, 1702 + li a1, 1708 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131277,7 +131048,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (s2) csrr a0, vlenb - li a1, 1694 + li a1, 1700 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131287,7 +131058,7 @@ vmv2r.v v8, v16 vslidedown.vi v16, v8, 1 csrr a0, vlenb - li a1, 1670 + li a1, 1676 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131297,7 +131068,7 @@ vsetivli zero, 1, e64, m2, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -610 + addiw a1, a1, -604 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131306,7 +131077,7 @@ vl8r.v v0, (a0) # Unknown-size Folded Reload vslidedown.vi v16, v0, 3 csrr a0, vlenb - li a1, 1638 + li a1, 1636 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131315,7 +131086,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v0, 2 csrr a0, vlenb - li a1, 1622 + li a1, 1620 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131361,7 +131132,7 @@ add s2, sp, s2 vslidedown.vi v16, v0, 1 csrr s3, vlenb - li s4, 1598 + li s4, 1604 mul s3, s3, s4 add s3, sp, s3 lui s4, 28 @@ -131370,7 +131141,7 @@ vs8r.v v16, (s3) # Unknown-size Folded Spill vle64.v v16, (a0) csrr a0, vlenb - li s3, 1574 + li s3, 1580 mul a0, a0, s3 add a0, sp, a0 lui s3, 28 @@ -131380,7 +131151,7 @@ vle64.v v16, (a1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -242 + addiw a1, a1, -212 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131389,7 +131160,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (a2) csrr a0, vlenb - li a1, 1558 + li a1, 1564 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131398,7 +131169,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (a5) csrr a0, vlenb - li a1, 1542 + li a1, 1548 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131407,7 +131178,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (a6) csrr a0, vlenb - li a1, 1526 + li a1, 1532 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131416,7 +131187,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (a7) csrr a0, vlenb - li a1, 1510 + li a1, 1516 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131425,7 +131196,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (t0) csrr a0, vlenb - li a1, 1494 + li a1, 1500 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131434,7 +131205,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (t1) csrr a0, vlenb - li a1, 1478 + li a1, 1484 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131443,7 +131214,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (t2) csrr a0, vlenb - li a1, 1454 + li a1, 1460 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131452,7 +131223,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (t5) csrr a0, vlenb - li a1, 1438 + li a1, 1444 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131461,7 +131232,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (t6) csrr a0, vlenb - li a1, 1422 + li a1, 1428 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131470,7 +131241,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (s2) csrr a0, vlenb - li a1, 1406 + li a1, 1412 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131480,7 +131251,7 @@ vmv2r.v v0, v24 vslidedown.vi v16, v0, 1 csrr a0, vlenb - li a1, 1366 + li a1, 1372 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131493,7 +131264,7 @@ add a0, sp, a0 vslidedown.vi v16, v8, 3 csrr a1, vlenb - li a2, 1646 + li a2, 1644 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -131502,7 +131273,7 @@ vs8r.v v16, (a1) # Unknown-size Folded Spill vslidedown.vi v16, v8, 2 csrr a1, vlenb - li a2, 1630 + li a2, 1628 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -131511,7 +131282,7 @@ vs8r.v v16, (a1) # Unknown-size Folded Spill vslidedown.vi v8, v24, 3 csrr a1, vlenb - li a2, 1382 + li a2, 1388 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -131520,7 +131291,7 @@ vs8r.v v8, (a1) # Unknown-size Folded Spill vslidedown.vi v8, v24, 2 csrr a1, vlenb - li a2, 1358 + li a2, 1364 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -131530,7 +131301,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a1, vlenb lui a2, 1 - addiw a2, a2, -586 + addiw a2, a2, -580 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -131543,7 +131314,7 @@ add a0, sp, a0 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -570 + addiw a2, a2, -564 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -131591,7 +131362,7 @@ vle64.v v8, (t4) csrr t4, vlenb lui s3, 1 - addiw s3, s3, -1754 + addiw s3, s3, -1748 mul t4, t4, s3 add t4, sp, t4 lui s3, 28 @@ -131601,7 +131372,7 @@ vle64.v v8, (t3) csrr t3, vlenb lui t4, 1 - addiw t4, t4, -74 + addiw t4, t4, -164 mul t3, t3, t4 add t3, sp, t3 lui t4, 28 @@ -131611,7 +131382,7 @@ vle64.v v8, (a0) csrr a0, vlenb lui t3, 1 - addiw t3, t3, -2026 + addiw t3, t3, -2020 mul a0, a0, t3 add a0, sp, a0 lui t3, 28 @@ -131620,7 +131391,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (a1) csrr a0, vlenb - li a1, 2030 + li a1, 2036 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131629,7 +131400,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (a2) csrr a0, vlenb - li a1, 2014 + li a1, 2020 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131638,7 +131409,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (a5) csrr a0, vlenb - li a1, 1990 + li a1, 1996 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131647,7 +131418,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (a6) csrr a0, vlenb - li a1, 1950 + li a1, 1956 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131656,7 +131427,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (a7) csrr a0, vlenb - li a1, 1934 + li a1, 1940 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131665,7 +131436,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (t0) csrr a0, vlenb - li a1, 1910 + li a1, 1916 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131674,7 +131445,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (t1) csrr a0, vlenb - li a1, 1870 + li a1, 1876 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131683,7 +131454,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (t2) csrr a0, vlenb - li a1, 1838 + li a1, 1844 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131692,7 +131463,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (t5) csrr a0, vlenb - li a1, 1822 + li a1, 1828 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131701,7 +131472,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (t6) csrr a0, vlenb - li a1, 1798 + li a1, 1804 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131711,7 +131482,7 @@ vle64.v v8, (s2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -226 + addiw a1, a1, -236 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131720,7 +131491,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vslidedown.vi v8, v24, 1 csrr a0, vlenb - li a1, 1758 + li a1, 1764 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131730,7 +131501,7 @@ vsetivli zero, 1, e64, m2, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -546 + addiw a1, a1, -540 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131740,7 +131511,7 @@ vslidedown.vi v8, v0, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1794 + addiw a1, a1, -1788 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131750,7 +131521,7 @@ vslidedown.vi v8, v0, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1810 + addiw a1, a1, -1804 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131797,7 +131568,7 @@ vslidedown.vi v8, v0, 1 csrr t6, vlenb lui s2, 1 - addiw s2, s2, -1834 + addiw s2, s2, -1828 mul t6, t6, s2 add t6, sp, t6 lui s2, 28 @@ -131807,7 +131578,7 @@ vle64.v v8, (a0) csrr a0, vlenb lui t6, 1 - addiw t6, t6, -82 + addiw t6, t6, -220 mul a0, a0, t6 add a0, sp, a0 lui t6, 28 @@ -131817,7 +131588,7 @@ vle64.v v8, (a1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1858 + addiw a1, a1, -1852 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131827,7 +131598,7 @@ vle64.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1874 + addiw a1, a1, -1868 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131837,7 +131608,7 @@ vle64.v v8, (a5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1890 + addiw a1, a1, -1884 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131847,7 +131618,7 @@ vle64.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1906 + addiw a1, a1, -1900 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131857,7 +131628,7 @@ vle64.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1922 + addiw a1, a1, -1916 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131867,7 +131638,7 @@ vle64.v v8, (t0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1938 + addiw a1, a1, -1932 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131877,7 +131648,7 @@ vle64.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1954 + addiw a1, a1, -1948 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131887,7 +131658,7 @@ vle64.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1970 + addiw a1, a1, -1964 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131897,7 +131668,7 @@ vle64.v v8, (t3) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1986 + addiw a1, a1, -1980 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131907,7 +131678,7 @@ vle64.v v8, (t4) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2002 + addiw a1, a1, -1996 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131917,7 +131688,7 @@ vle64.v v8, (t5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2042 + addiw a1, a1, -2036 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131927,7 +131698,7 @@ vmv2r.v v8, v16 vslidedown.vi v0, v8, 1 csrr a0, vlenb - li a1, 1982 + li a1, 1988 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131937,7 +131708,7 @@ vsetivli zero, 1, e64, m2, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -578 + addiw a1, a1, -572 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131946,7 +131717,7 @@ vl8r.v v0, (a0) # Unknown-size Folded Reload vslidedown.vi v16, v0, 3 csrr a0, vlenb - li a1, 1926 + li a1, 1932 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131955,7 +131726,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v0, 2 csrr a0, vlenb - li a1, 1894 + li a1, 1900 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131965,7 +131736,7 @@ vsetivli zero, 1, e64, m1, ta, ma vslidedown.vi v16, v0, 1 csrr a0, vlenb - li a1, 1862 + li a1, 1868 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -131979,7 +131750,7 @@ vmv2r.v v16, v24 vslidedown.vi v0, v24, 3 csrr a1, vlenb - li a2, 1686 + li a2, 1692 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -131988,7 +131759,7 @@ vs8r.v v0, (a1) # Unknown-size Folded Spill vslidedown.vi v0, v24, 2 csrr a1, vlenb - li a2, 1662 + li a2, 1668 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -131997,7 +131768,7 @@ vs8r.v v0, (a1) # Unknown-size Folded Spill vslidedown.vi v16, v8, 3 csrr a1, vlenb - li a2, 2006 + li a2, 2012 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -132006,7 +131777,7 @@ vs8r.v v16, (a1) # Unknown-size Folded Spill vslidedown.vi v16, v8, 2 csrr a1, vlenb - li a2, 1966 + li a2, 1972 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -132016,7 +131787,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a1, vlenb lui a2, 1 - addiw a2, a2, -530 + addiw a2, a2, -524 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -132029,7 +131800,7 @@ add a0, sp, a0 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -554 + addiw a2, a2, -548 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -132042,7 +131813,7 @@ vle64.v v8, (a0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1578 + addiw a1, a1, -1572 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132053,7 +131824,7 @@ vle64.v v8, (a0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1722 + addiw a1, a1, -1716 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132063,7 +131834,7 @@ vsetivli zero, 1, e64, m2, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -522 + addiw a1, a1, -516 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132073,7 +131844,7 @@ vslidedown.vi v8, v0, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1602 + addiw a1, a1, -1596 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132083,7 +131854,7 @@ vslidedown.vi v8, v0, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1610 + addiw a1, a1, -1604 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132130,7 +131901,7 @@ vslidedown.vi v8, v0, 1 csrr t6, vlenb lui s2, 1 - addiw s2, s2, -1634 + addiw s2, s2, -1628 mul t6, t6, s2 add t6, sp, t6 lui s2, 28 @@ -132140,7 +131911,7 @@ vle64.v v8, (a0) csrr a0, vlenb lui t6, 1 - addiw t6, t6, -1650 + addiw t6, t6, -1644 mul a0, a0, t6 add a0, sp, a0 lui t6, 28 @@ -132150,7 +131921,7 @@ vle64.v v8, (a1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1658 + addiw a1, a1, -1652 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132160,7 +131931,7 @@ vle64.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1666 + addiw a1, a1, -1660 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132170,7 +131941,7 @@ vle64.v v8, (a5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1674 + addiw a1, a1, -1668 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132180,7 +131951,7 @@ vle64.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1682 + addiw a1, a1, -1676 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132190,7 +131961,7 @@ vle64.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1690 + addiw a1, a1, -1684 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132200,7 +131971,7 @@ vle64.v v8, (t0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1698 + addiw a1, a1, -1692 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132210,7 +131981,7 @@ vle64.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1706 + addiw a1, a1, -1700 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132220,7 +131991,7 @@ vle64.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1714 + addiw a1, a1, -1708 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132230,7 +132001,7 @@ vle64.v v8, (t3) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1730 + addiw a1, a1, -1724 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132240,7 +132011,7 @@ vle64.v v8, (t4) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -186 + addiw a1, a1, -172 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132250,7 +132021,7 @@ vle64.v v8, (t5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1738 + addiw a1, a1, -1732 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132261,7 +132032,7 @@ vslidedown.vi v16, v8, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1746 + addiw a1, a1, -1740 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132271,7 +132042,7 @@ vsetivli zero, 1, e64, m2, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -538 + addiw a1, a1, -532 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132281,7 +132052,7 @@ vslidedown.vi v16, v0, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1770 + addiw a1, a1, -1764 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132291,7 +132062,7 @@ vslidedown.vi v16, v0, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1786 + addiw a1, a1, -1780 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132338,7 +132109,7 @@ vslidedown.vi v16, v0, 1 csrr t6, vlenb lui s2, 1 - addiw s2, s2, -1802 + addiw s2, s2, -1796 mul t6, t6, s2 add t6, sp, t6 lui s2, 28 @@ -132348,7 +132119,7 @@ vle64.v v16, (a0) csrr a0, vlenb lui t6, 1 - addiw t6, t6, -1818 + addiw t6, t6, -1812 mul a0, a0, t6 add a0, sp, a0 lui t6, 28 @@ -132358,7 +132129,7 @@ vle64.v v16, (a1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1826 + addiw a1, a1, -1820 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132368,7 +132139,7 @@ vle64.v v16, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1842 + addiw a1, a1, -1836 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132378,7 +132149,7 @@ vle64.v v16, (a5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1850 + addiw a1, a1, -1844 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132388,7 +132159,7 @@ vle64.v v16, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1866 + addiw a1, a1, -1860 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132398,7 +132169,7 @@ vle64.v v16, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -90 + addiw a1, a1, -108 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132408,7 +132179,7 @@ vle64.v v16, (t0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1882 + addiw a1, a1, -1876 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132418,7 +132189,7 @@ vle64.v v16, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1898 + addiw a1, a1, -1892 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132428,7 +132199,7 @@ vle64.v v16, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1914 + addiw a1, a1, -1908 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132438,7 +132209,7 @@ vle64.v v16, (t3) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1930 + addiw a1, a1, -1924 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132448,7 +132219,7 @@ vle64.v v16, (t4) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1946 + addiw a1, a1, -1940 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132458,7 +132229,7 @@ vle64.v v16, (t5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1962 + addiw a1, a1, -1956 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132469,7 +132240,7 @@ vslidedown.vi v0, v16, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2018 + addiw a1, a1, -2012 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132483,7 +132254,7 @@ vslidedown.vi v0, v8, 3 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1762 + addiw a2, a2, -1756 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -132493,7 +132264,7 @@ vslidedown.vi v0, v8, 2 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1778 + addiw a2, a2, -1772 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -132503,7 +132274,7 @@ vslidedown.vi v8, v24, 3 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1994 + addiw a2, a2, -1988 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -132513,7 +132284,7 @@ vslidedown.vi v8, v24, 2 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -2034 + addiw a2, a2, -2028 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -132523,7 +132294,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a1, vlenb lui a2, 1 - addiw a2, a2, -514 + addiw a2, a2, -508 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -132536,7 +132307,7 @@ vle64.v v8, (a0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1314 + addiw a1, a1, -1308 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132547,7 +132318,7 @@ vle64.v v8, (a0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1530 + addiw a1, a1, -1524 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132557,7 +132328,7 @@ vsetivli zero, 1, e64, m2, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -498 + addiw a1, a1, -492 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132567,7 +132338,7 @@ vslidedown.vi v8, v0, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1330 + addiw a1, a1, -1324 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132577,7 +132348,7 @@ vslidedown.vi v8, v0, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1346 + addiw a1, a1, -1340 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132624,7 +132395,7 @@ vslidedown.vi v8, v0, 1 csrr t6, vlenb lui s2, 1 - addiw s2, s2, -1370 + addiw s2, s2, -1364 mul t6, t6, s2 add t6, sp, t6 lui s2, 28 @@ -132634,7 +132405,7 @@ vle64.v v8, (a0) csrr a0, vlenb lui t6, 1 - addiw t6, t6, -1394 + addiw t6, t6, -1388 mul a0, a0, t6 add a0, sp, a0 lui t6, 28 @@ -132644,7 +132415,7 @@ vle64.v v8, (a1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1410 + addiw a1, a1, -1404 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132654,7 +132425,7 @@ vle64.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1426 + addiw a1, a1, -1420 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132664,7 +132435,7 @@ vle64.v v8, (a5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1442 + addiw a1, a1, -1436 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132674,7 +132445,7 @@ vle64.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -18 + addiw a1, a1, -180 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132684,7 +132455,7 @@ vle64.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1458 + addiw a1, a1, -1452 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132694,7 +132465,7 @@ vle64.v v8, (t0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1474 + addiw a1, a1, -1468 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132704,7 +132475,7 @@ vle64.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1490 + addiw a1, a1, -1484 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132714,7 +132485,7 @@ vle64.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1506 + addiw a1, a1, -1500 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132724,7 +132495,7 @@ vle64.v v8, (t3) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1514 + addiw a1, a1, -1508 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132734,7 +132505,7 @@ vle64.v v8, (t4) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1538 + addiw a1, a1, -1532 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132744,7 +132515,7 @@ vle64.v v8, (t5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1562 + addiw a1, a1, -1556 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132755,7 +132526,7 @@ vslidedown.vi v16, v8, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1586 + addiw a1, a1, -1580 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132765,7 +132536,7 @@ vsetivli zero, 1, e64, m2, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -218 + addiw a1, a1, -204 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132775,7 +132546,7 @@ vslidedown.vi v16, v0, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1618 + addiw a1, a1, -1612 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132785,7 +132556,7 @@ vslidedown.vi v16, v0, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1626 + addiw a1, a1, -1620 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132796,7 +132567,7 @@ vslidedown.vi v16, v0, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1642 + addiw a1, a1, -1636 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132810,7 +132581,7 @@ vslidedown.vi v16, v8, 3 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1570 + addiw a2, a2, -1564 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -132820,7 +132591,7 @@ vslidedown.vi v16, v8, 2 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1594 + addiw a2, a2, -1588 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -132830,7 +132601,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a1, vlenb lui a2, 1 - addiw a2, a2, -482 + addiw a2, a2, -476 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -132843,7 +132614,7 @@ add a0, sp, a0 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -506 + addiw a2, a2, -500 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -132856,7 +132627,7 @@ vle64.v v8, (a0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1002 + addiw a1, a1, -996 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132867,7 +132638,7 @@ vle64.v v8, (a0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1202 + addiw a1, a1, -1196 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132877,7 +132648,7 @@ vsetivli zero, 1, e64, m2, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -458 + addiw a1, a1, -452 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132887,7 +132658,7 @@ vslidedown.vi v8, v0, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1018 + addiw a1, a1, -1012 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132897,7 +132668,7 @@ vslidedown.vi v8, v0, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1026 + addiw a1, a1, -1020 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132944,7 +132715,7 @@ vslidedown.vi v8, v0, 1 csrr t6, vlenb lui s2, 1 - addiw s2, s2, -194 + addiw s2, s2, -116 mul t6, t6, s2 add t6, sp, t6 lui s2, 28 @@ -132954,7 +132725,7 @@ vle64.v v8, (a0) csrr a0, vlenb lui t6, 1 - addiw t6, t6, -1074 + addiw t6, t6, -1068 mul a0, a0, t6 add a0, sp, a0 lui t6, 28 @@ -132964,7 +132735,7 @@ vle64.v v8, (a1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1082 + addiw a1, a1, -1076 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132974,7 +132745,7 @@ vle64.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1098 + addiw a1, a1, -1092 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132984,7 +132755,7 @@ vle64.v v8, (a5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1114 + addiw a1, a1, -1108 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -132994,7 +132765,7 @@ vle64.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1130 + addiw a1, a1, -1124 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133004,7 +132775,7 @@ vle64.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1146 + addiw a1, a1, -1140 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133014,7 +132785,7 @@ vle64.v v8, (t0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1162 + addiw a1, a1, -1156 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133024,7 +132795,7 @@ vle64.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1178 + addiw a1, a1, -1172 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133034,7 +132805,7 @@ vle64.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1194 + addiw a1, a1, -1188 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133044,7 +132815,7 @@ vle64.v v8, (t3) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1218 + addiw a1, a1, -1212 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133054,7 +132825,7 @@ vle64.v v8, (t4) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1234 + addiw a1, a1, -1228 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133064,7 +132835,7 @@ vle64.v v8, (t5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1250 + addiw a1, a1, -1244 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133075,7 +132846,7 @@ vslidedown.vi v16, v8, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -202 + addiw a1, a1, -124 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133085,7 +132856,7 @@ vsetivli zero, 1, e64, m2, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -490 + addiw a1, a1, -484 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133095,7 +132866,7 @@ vslidedown.vi v16, v0, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1290 + addiw a1, a1, -1284 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133105,7 +132876,7 @@ vslidedown.vi v16, v0, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1306 + addiw a1, a1, -1300 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133152,7 +132923,7 @@ vslidedown.vi v16, v0, 1 csrr t6, vlenb lui s2, 1 - addiw s2, s2, -1338 + addiw s2, s2, -1332 mul t6, t6, s2 add t6, sp, t6 lui s2, 28 @@ -133162,7 +132933,7 @@ vle64.v v16, (a0) csrr a0, vlenb lui t6, 1 - addiw t6, t6, -1354 + addiw t6, t6, -1348 mul a0, a0, t6 add a0, sp, a0 lui t6, 28 @@ -133172,7 +132943,7 @@ vle64.v v16, (a1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1362 + addiw a1, a1, -1356 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133182,7 +132953,7 @@ vle64.v v16, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1378 + addiw a1, a1, -1372 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133192,7 +132963,7 @@ vle64.v v16, (a5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1386 + addiw a1, a1, -1380 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133202,7 +132973,7 @@ vle64.v v16, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1402 + addiw a1, a1, -1396 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133212,7 +132983,7 @@ vle64.v v16, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1418 + addiw a1, a1, -1412 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133222,7 +132993,7 @@ vle64.v v16, (t0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1434 + addiw a1, a1, -1428 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133232,7 +133003,7 @@ vle64.v v16, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1450 + addiw a1, a1, -1444 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133242,7 +133013,7 @@ vle64.v v16, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1466 + addiw a1, a1, -1460 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133252,7 +133023,7 @@ vle64.v v16, (t3) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -98 + addiw a1, a1, -188 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133262,7 +133033,7 @@ vle64.v v16, (t4) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1482 + addiw a1, a1, -1476 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133272,7 +133043,7 @@ vle64.v v16, (t5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1498 + addiw a1, a1, -1492 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133283,7 +133054,7 @@ vslidedown.vi v0, v16, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1546 + addiw a1, a1, -1540 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133296,7 +133067,7 @@ vslidedown.vi v0, v8, 3 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1298 + addiw a2, a2, -1292 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -133306,7 +133077,7 @@ vslidedown.vi v0, v8, 2 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1322 + addiw a2, a2, -1316 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -133316,7 +133087,7 @@ vslidedown.vi v8, v24, 3 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1522 + addiw a2, a2, -1516 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -133326,7 +133097,7 @@ vslidedown.vi v8, v24, 2 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1554 + addiw a2, a2, -1548 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -133336,7 +133107,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a1, vlenb lui a2, 1 - addiw a2, a2, -450 + addiw a2, a2, -444 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -133349,7 +133120,7 @@ add a0, sp, a0 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -474 + addiw a2, a2, -468 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -133362,7 +133133,7 @@ vle64.v v8, (a0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -754 + addiw a1, a1, -748 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133373,7 +133144,7 @@ vle64.v v8, (a0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -978 + addiw a1, a1, -972 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133383,7 +133154,7 @@ vsetivli zero, 1, e64, m2, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -434 + addiw a1, a1, -428 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133393,7 +133164,7 @@ vslidedown.vi v8, v0, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -770 + addiw a1, a1, -764 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133403,7 +133174,7 @@ vslidedown.vi v8, v0, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -778 + addiw a1, a1, -772 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133450,7 +133221,7 @@ vslidedown.vi v8, v0, 1 csrr t6, vlenb lui s2, 1 - addiw s2, s2, -810 + addiw s2, s2, -804 mul t6, t6, s2 add t6, sp, t6 lui s2, 28 @@ -133460,7 +133231,7 @@ vle64.v v8, (a0) csrr a0, vlenb lui t6, 1 - addiw t6, t6, -834 + addiw t6, t6, -828 mul a0, a0, t6 add a0, sp, a0 lui t6, 28 @@ -133470,7 +133241,7 @@ vle64.v v8, (a1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -850 + addiw a1, a1, -844 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133480,7 +133251,7 @@ vle64.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -866 + addiw a1, a1, -860 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133490,7 +133261,7 @@ vle64.v v8, (a5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -882 + addiw a1, a1, -876 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133500,7 +133271,7 @@ vle64.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -898 + addiw a1, a1, -892 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133510,7 +133281,7 @@ vle64.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -914 + addiw a1, a1, -908 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133520,7 +133291,7 @@ vle64.v v8, (t0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -930 + addiw a1, a1, -924 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133530,7 +133301,7 @@ vle64.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -946 + addiw a1, a1, -940 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133540,7 +133311,7 @@ vle64.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -106 + addiw a1, a1, -228 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133550,7 +133321,7 @@ vle64.v v8, (t3) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -962 + addiw a1, a1, -956 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133560,7 +133331,7 @@ vle64.v v8, (t4) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -986 + addiw a1, a1, -980 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133570,7 +133341,7 @@ vle64.v v8, (t5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -994 + addiw a1, a1, -988 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133581,7 +133352,7 @@ vslidedown.vi v16, v8, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1010 + addiw a1, a1, -1004 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133591,7 +133362,7 @@ vsetivli zero, 1, e64, m2, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -466 + addiw a1, a1, -460 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133601,7 +133372,7 @@ vslidedown.vi v16, v0, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1042 + addiw a1, a1, -1036 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133611,7 +133382,7 @@ vslidedown.vi v16, v0, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1058 + addiw a1, a1, -1052 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133658,7 +133429,7 @@ vslidedown.vi v16, v0, 1 csrr t6, vlenb lui s2, 1 - addiw s2, s2, -1066 + addiw s2, s2, -1060 mul t6, t6, s2 add t6, sp, t6 lui s2, 28 @@ -133668,7 +133439,7 @@ vle64.v v16, (a0) csrr a0, vlenb lui t6, 1 - addiw t6, t6, -1090 + addiw t6, t6, -1084 mul a0, a0, t6 add a0, sp, a0 lui t6, 28 @@ -133678,7 +133449,7 @@ vle64.v v16, (a1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1106 + addiw a1, a1, -1100 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133688,7 +133459,7 @@ vle64.v v16, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1122 + addiw a1, a1, -1116 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133698,7 +133469,7 @@ vle64.v v16, (a5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -210 + addiw a1, a1, -4 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133708,7 +133479,7 @@ vle64.v v16, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1138 + addiw a1, a1, -1132 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133718,7 +133489,7 @@ vle64.v v16, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1154 + addiw a1, a1, -1148 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133728,7 +133499,7 @@ vle64.v v16, (t0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1170 + addiw a1, a1, -1164 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133738,7 +133509,7 @@ vle64.v v16, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1186 + addiw a1, a1, -1180 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133748,7 +133519,7 @@ vle64.v v16, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1210 + addiw a1, a1, -1204 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133758,7 +133529,7 @@ vle64.v v16, (t3) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1226 + addiw a1, a1, -1220 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133768,7 +133539,7 @@ vle64.v v16, (t4) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1242 + addiw a1, a1, -1236 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133778,7 +133549,7 @@ vle64.v v16, (t5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1258 + addiw a1, a1, -1252 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133789,7 +133560,7 @@ vslidedown.vi v0, v16, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1274 + addiw a1, a1, -1268 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133803,7 +133574,7 @@ vslidedown.vi v0, v8, 3 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1034 + addiw a2, a2, -1028 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -133813,7 +133584,7 @@ vslidedown.vi v0, v8, 2 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1050 + addiw a2, a2, -1044 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -133823,7 +133594,7 @@ vslidedown.vi v8, v24, 3 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1266 + addiw a2, a2, -1260 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -133833,7 +133604,7 @@ vslidedown.vi v8, v24, 2 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1282 + addiw a2, a2, -1276 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -133843,7 +133614,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a1, vlenb lui a2, 1 - addiw a2, a2, -442 + addiw a2, a2, -436 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -133856,7 +133627,7 @@ vle64.v v8, (a0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -738 + addiw a1, a1, -732 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133866,7 +133637,7 @@ vsetivli zero, 1, e64, m2, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -426 + addiw a1, a1, -420 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133876,7 +133647,7 @@ vslidedown.vi v16, v8, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -746 + addiw a1, a1, -740 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133886,7 +133657,7 @@ vslidedown.vi v16, v8, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -114 + addiw a1, a1, -12 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133933,7 +133704,7 @@ vslidedown.vi v16, v8, 1 csrr t6, vlenb lui s2, 1 - addiw s2, s2, -762 + addiw s2, s2, -756 mul t6, t6, s2 add t6, sp, t6 lui s2, 28 @@ -133943,7 +133714,7 @@ vle64.v v8, (a0) csrr a0, vlenb lui t6, 1 - addiw t6, t6, -786 + addiw t6, t6, -780 mul a0, a0, t6 add a0, sp, a0 lui t6, 28 @@ -133953,7 +133724,7 @@ vle64.v v8, (a1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -794 + addiw a1, a1, -788 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133963,7 +133734,7 @@ vle64.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -802 + addiw a1, a1, -796 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133973,7 +133744,7 @@ vle64.v v8, (a5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -818 + addiw a1, a1, -812 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133983,7 +133754,7 @@ vle64.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -826 + addiw a1, a1, -820 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -133993,7 +133764,7 @@ vle64.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -842 + addiw a1, a1, -836 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134003,7 +133774,7 @@ vle64.v v8, (t0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -858 + addiw a1, a1, -852 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134013,7 +133784,7 @@ vle64.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -874 + addiw a1, a1, -868 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134023,7 +133794,7 @@ vle64.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -890 + addiw a1, a1, -884 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134033,7 +133804,7 @@ vle64.v v8, (t3) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -906 + addiw a1, a1, -900 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134043,7 +133814,7 @@ vle64.v v8, (t4) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -922 + addiw a1, a1, -916 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134053,7 +133824,7 @@ vle64.v v8, (t5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -938 + addiw a1, a1, -932 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134064,7 +133835,7 @@ vslidedown.vi v8, v16, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -970 + addiw a1, a1, -964 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134075,7 +133846,7 @@ vslidedown.vi v8, v24, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -954 + addiw a1, a1, -948 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134085,7 +133856,7 @@ vslidedown.vi v8, v24, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -122 + addiw a1, a1, -196 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134095,7 +133866,7 @@ vsetivli zero, 1, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -130 + addiw a1, a1, -28 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134104,7 +133875,7 @@ vl8r.v v16, (a0) # Unknown-size Folded Reload vslidedown.vi v8, v16, 15 csrr a0, vlenb - li a1, 182 + li a1, 188 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134113,7 +133884,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vslidedown.vi v8, v16, 14 csrr a0, vlenb - li a1, 174 + li a1, 180 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134122,7 +133893,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vslidedown.vi v8, v16, 13 csrr a0, vlenb - li a1, 166 + li a1, 172 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134131,7 +133902,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vslidedown.vi v8, v16, 12 csrr a0, vlenb - li a1, 158 + li a1, 164 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134140,7 +133911,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vslidedown.vi v8, v16, 11 csrr a0, vlenb - li a1, 150 + li a1, 156 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134149,7 +133920,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vslidedown.vi v8, v16, 10 csrr a0, vlenb - li a1, 142 + li a1, 148 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134158,7 +133929,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vslidedown.vi v8, v16, 9 csrr a0, vlenb - li a1, 134 + li a1, 140 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134167,7 +133938,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vslidedown.vi v8, v16, 8 csrr a0, vlenb - li a1, 126 + li a1, 132 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134177,7 +133948,7 @@ vsetivli zero, 1, e64, m4, ta, ma vslidedown.vi v8, v16, 7 csrr a0, vlenb - li a1, 118 + li a1, 124 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134186,7 +133957,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vslidedown.vi v8, v16, 6 csrr a0, vlenb - li a1, 110 + li a1, 116 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134195,7 +133966,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vslidedown.vi v8, v16, 5 csrr a0, vlenb - li a1, 102 + li a1, 108 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134204,7 +133975,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vslidedown.vi v8, v16, 4 csrr a0, vlenb - li a1, 94 + li a1, 100 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134214,7 +133985,7 @@ vsetivli zero, 1, e64, m2, ta, ma vslidedown.vi v8, v16, 3 csrr a0, vlenb - li a1, 86 + li a1, 92 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134223,7 +133994,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vslidedown.vi v8, v16, 2 csrr a0, vlenb - li a1, 78 + li a1, 84 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134233,7 +134004,7 @@ vsetivli zero, 1, e64, m1, ta, ma vslidedown.vi v8, v16, 1 csrr a0, vlenb - li a1, 70 + li a1, 76 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134243,7 +134014,7 @@ vsetivli zero, 1, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -234 + addiw a1, a1, -20 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134252,7 +134023,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload vslidedown.vi v16, v8, 15 csrr a0, vlenb - li a1, 2038 + li a1, 2044 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134261,7 +134032,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v8, 14 csrr a0, vlenb - li a1, 2022 + li a1, 2028 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134270,7 +134041,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v8, 13 csrr a0, vlenb - li a1, 1998 + li a1, 2004 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134279,7 +134050,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v8, 12 csrr a0, vlenb - li a1, 1958 + li a1, 1964 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134288,7 +134059,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v8, 11 csrr a0, vlenb - li a1, 1942 + li a1, 1948 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134297,7 +134068,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v8, 10 csrr a0, vlenb - li a1, 1902 + li a1, 1908 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134306,7 +134077,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v8, 9 csrr a0, vlenb - li a1, 1878 + li a1, 1884 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134315,7 +134086,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v8, 8 csrr a0, vlenb - li a1, 1846 + li a1, 1852 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134325,7 +134096,7 @@ vsetivli zero, 1, e64, m4, ta, ma vslidedown.vi v16, v8, 7 csrr a0, vlenb - li a1, 1814 + li a1, 1820 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134334,7 +134105,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v8, 6 csrr a0, vlenb - li a1, 1790 + li a1, 1796 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134343,7 +134114,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v8, 5 csrr a0, vlenb - li a1, 1774 + li a1, 1780 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134352,7 +134123,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v8, 4 csrr a0, vlenb - li a1, 1750 + li a1, 1756 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134362,7 +134133,7 @@ vsetivli zero, 1, e64, m2, ta, ma vslidedown.vi v16, v8, 3 csrr a0, vlenb - li a1, 1734 + li a1, 1740 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134371,7 +134142,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v8, 2 csrr a0, vlenb - li a1, 1710 + li a1, 1716 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134381,7 +134152,7 @@ vsetivli zero, 1, e64, m1, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -274 + addiw a1, a1, -276 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134393,7 +134164,7 @@ fsd fa5, 1784(sp) # 8-byte Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, -258 + addiw a1, a1, -260 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134405,7 +134176,7 @@ fsd fa5, 1776(sp) # 8-byte Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, -362 + addiw a1, a1, -364 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134417,7 +134188,7 @@ fsd fa5, 1768(sp) # 8-byte Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, -370 + addiw a1, a1, -372 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134429,7 +134200,7 @@ fsd fa5, 1760(sp) # 8-byte Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, -314 + addiw a1, a1, -316 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134441,7 +134212,7 @@ fsd fa5, 1752(sp) # 8-byte Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, -306 + addiw a1, a1, -308 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134453,7 +134224,7 @@ fsd fa5, 1744(sp) # 8-byte Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, -298 + addiw a1, a1, -300 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134465,7 +134236,7 @@ fsd fa5, 1736(sp) # 8-byte Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, -290 + addiw a1, a1, -292 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134477,7 +134248,7 @@ fsd fa5, 1728(sp) # 8-byte Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, -282 + addiw a1, a1, -284 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134489,7 +134260,7 @@ fsd fa5, 1720(sp) # 8-byte Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, -266 + addiw a1, a1, -268 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134501,7 +134272,7 @@ fsd fa5, 1712(sp) # 8-byte Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, -394 + addiw a1, a1, -388 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134513,7 +134284,7 @@ fsd fa5, 1704(sp) # 8-byte Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, -274 + addiw a1, a1, -276 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134524,7 +134295,7 @@ fsd fa5, 1696(sp) # 8-byte Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, -258 + addiw a1, a1, -260 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134539,7 +134310,7 @@ fsd fa5, 1672(sp) # 8-byte Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, -314 + addiw a1, a1, -316 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134550,7 +134321,7 @@ fsd fa5, 1664(sp) # 8-byte Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, -306 + addiw a1, a1, -308 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134561,7 +134332,7 @@ fsd fa5, 1656(sp) # 8-byte Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, -298 + addiw a1, a1, -300 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134572,7 +134343,7 @@ fsd fa5, 1648(sp) # 8-byte Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, -290 + addiw a1, a1, -292 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134583,7 +134354,7 @@ fsd fa5, 1640(sp) # 8-byte Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, -282 + addiw a1, a1, -284 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134594,7 +134365,7 @@ fsd fa5, 1632(sp) # 8-byte Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, -266 + addiw a1, a1, -268 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134607,18 +134378,18 @@ fsd fa5, 1616(sp) # 8-byte Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, -378 + addiw a1, a1, -252 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vfmv.f.s fa5, v0 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vfmv.f.s fa5, v8 fsd fa5, 1608(sp) # 8-byte Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, -250 + addiw a1, a1, -244 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134629,29 +134400,29 @@ fsd fa5, 1600(sp) # 8-byte Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, -330 + addiw a1, a1, -380 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vfmv.f.s fa5, v8 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vfmv.f.s fa5, v0 fsd fa5, 1592(sp) # 8-byte Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, -386 + addiw a1, a1, -332 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vfmv.f.s fa5, v16 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vfmv.f.s fa5, v8 fsd fa5, 1584(sp) # 8-byte Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, -338 + addiw a1, a1, -340 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134662,7 +134433,7 @@ fsd fa5, 1576(sp) # 8-byte Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, -418 + addiw a1, a1, -404 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134673,7 +134444,7 @@ fsd fa5, 1568(sp) # 8-byte Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, -346 + addiw a1, a1, -348 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134684,18 +134455,18 @@ fsd fa5, 1560(sp) # 8-byte Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, -354 + addiw a1, a1, -412 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vfmv.f.s fa5, v8 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vfmv.f.s fa5, v16 fsd fa5, 1552(sp) # 8-byte Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, -322 + addiw a1, a1, -356 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134706,7 +134477,7 @@ fsd fa5, 1544(sp) # 8-byte Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, -410 + addiw a1, a1, -324 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134715,78 +134486,62 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload vfmv.f.s fa5, v8 fsd fa5, 1536(sp) # 8-byte Folded Spill - vslidedown.vi v9, v0, 1 - csrr a0, vlenb - li a1, 66 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 28 - addiw a1, a1, -960 - add a0, a0, a1 - vs1r.v v9, (a0) # Unknown-size Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, -250 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 28 - addiw a1, a1, -960 - add a0, a0, a1 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vslidedown.vi v9, v0, 1 - csrr a0, vlenb - li a1, 68 + addiw a1, a1, -252 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 - vs1r.v v9, (a0) # Unknown-size Folded Spill + vl8r.v v8, (a0) # Unknown-size Folded Reload + vslidedown.vi v1, v8, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -330 + addiw a1, a1, -244 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v0, (a0) # Unknown-size Folded Reload + vl8r.v v8, (a0) # Unknown-size Folded Reload + vslidedown.vi v2, v8, 1 vslidedown.vi v3, v0, 1 - vslidedown.vi v4, v16, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -338 + addiw a1, a1, -332 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslidedown.vi v1, v16, 1 - vslidedown.vi v2, v24, 1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vslidedown.vi v4, v8, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -346 + addiw a1, a1, -340 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vslidedown.vi v25, v24, 1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vslidedown.vi v12, v8, 1 + vslidedown.vi v13, v24, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -354 + addiw a1, a1, -348 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslidedown.vi v26, v16, 1 + vl8r.v v24, (a0) # Unknown-size Folded Reload + vslidedown.vi v14, v24, 1 + vslidedown.vi v15, v16, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -322 + addiw a1, a1, -356 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -134794,56 +134549,49 @@ add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslidedown.vi v16, v16, 1 - vslidedown.vi v17, v8, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -234 + addiw a1, a1, -324 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslidedown.vi v0, v8, 1 + vl8r.v v24, (a0) # Unknown-size Folded Reload + vslidedown.vi v17, v24, 1 csrr a0, vlenb - li a1, 1606 + lui a1, 1 + addiw a1, a1, -20 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 - vs8r.v v0, (a0) # Unknown-size Folded Spill + vl8r.v v24, (a0) # Unknown-size Folded Reload + vslidedown.vi v0, v24, 1 csrr a0, vlenb - li a1, 66 + li a1, 1652 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 - vl1r.v v8, (a0) # Unknown-size Folded Reload - vfmv.f.s fa5, v8 + vs8r.v v0, (a0) # Unknown-size Folded Spill + vfmv.f.s fa5, v1 fsd fa5, 1528(sp) # 8-byte Folded Spill - csrr a0, vlenb - li a1, 68 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 28 - addiw a1, a1, -960 - add a0, a0, a1 - vl1r.v v8, (a0) # Unknown-size Folded Reload - vfmv.f.s fa5, v8 + vfmv.f.s fa5, v2 fsd fa5, 1520(sp) # 8-byte Folded Spill vfmv.f.s fa5, v3 fsd fa5, 1512(sp) # 8-byte Folded Spill vfmv.f.s fa5, v4 fsd fa5, 1504(sp) # 8-byte Folded Spill - vfmv.f.s fa5, v1 + vfmv.f.s fa5, v12 fsd fa5, 1496(sp) # 8-byte Folded Spill - vfmv.f.s fa5, v2 + vfmv.f.s fa5, v13 fsd fa5, 1488(sp) # 8-byte Folded Spill - vfmv.f.s fa5, v25 + vfmv.f.s fa5, v14 fsd fa5, 1480(sp) # 8-byte Folded Spill - vfmv.f.s fa5, v26 + vfmv.f.s fa5, v15 fsd fa5, 1472(sp) # 8-byte Folded Spill vfmv.f.s fa5, v16 fsd fa5, 1464(sp) # 8-byte Folded Spill @@ -134855,7 +134603,7 @@ add a0, sp, a0 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -274 + addiw a2, a2, -276 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -134863,13 +134611,17 @@ add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload vslidedown.vi v8, v8, 2 - lui a1, 28 - addiw a1, a1, -960 + csrr a1, vlenb + li a2, 24 + mul a1, a1, a2 add a1, sp, a1 + lui a2, 28 + addiw a2, a2, -960 + add a1, a1, a2 vs2r.v v8, (a1) # Unknown-size Folded Spill csrr a1, vlenb lui a2, 1 - addiw a2, a2, -258 + addiw a2, a2, -260 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -134878,7 +134630,8 @@ vl8r.v v8, (a1) # Unknown-size Folded Reload vslidedown.vi v8, v8, 2 csrr a1, vlenb - slli a1, a1, 1 + li a2, 22 + mul a1, a1, a2 add a1, sp, a1 lui a2, 28 addiw a2, a2, -960 @@ -134886,7 +134639,7 @@ vs2r.v v8, (a1) # Unknown-size Folded Spill csrr a1, vlenb lui a2, 1 - addiw a2, a2, -362 + addiw a2, a2, -364 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -134895,7 +134648,8 @@ vl8r.v v8, (a1) # Unknown-size Folded Reload vslidedown.vi v8, v8, 2 csrr a1, vlenb - slli a1, a1, 2 + li a2, 20 + mul a1, a1, a2 add a1, sp, a1 lui a2, 28 addiw a2, a2, -960 @@ -134903,7 +134657,7 @@ vs2r.v v8, (a1) # Unknown-size Folded Spill csrr a1, vlenb lui a2, 1 - addiw a2, a2, -370 + addiw a2, a2, -372 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -134912,7 +134666,7 @@ vl8r.v v8, (a1) # Unknown-size Folded Reload vslidedown.vi v8, v8, 2 csrr a1, vlenb - li a2, 6 + li a2, 18 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -134921,7 +134675,7 @@ vs2r.v v8, (a1) # Unknown-size Folded Spill csrr a1, vlenb lui a2, 1 - addiw a2, a2, -314 + addiw a2, a2, -316 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -134930,7 +134684,7 @@ vl8r.v v8, (a1) # Unknown-size Folded Reload vslidedown.vi v8, v8, 2 csrr a1, vlenb - slli a1, a1, 3 + slli a1, a1, 4 add a1, sp, a1 lui a2, 28 addiw a2, a2, -960 @@ -134938,7 +134692,7 @@ vs2r.v v8, (a1) # Unknown-size Folded Spill csrr a1, vlenb lui a2, 1 - addiw a2, a2, -306 + addiw a2, a2, -308 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -134947,7 +134701,7 @@ vl8r.v v8, (a1) # Unknown-size Folded Reload vslidedown.vi v8, v8, 2 csrr a1, vlenb - li a2, 10 + li a2, 14 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -134956,7 +134710,7 @@ vs2r.v v8, (a1) # Unknown-size Folded Spill csrr a1, vlenb lui a2, 1 - addiw a2, a2, -298 + addiw a2, a2, -300 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -134965,7 +134719,7 @@ vl8r.v v8, (a1) # Unknown-size Folded Reload vslidedown.vi v8, v8, 2 csrr a1, vlenb - li a2, 68 + li a2, 74 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -134974,7 +134728,7 @@ vs2r.v v8, (a1) # Unknown-size Folded Spill csrr a1, vlenb lui a2, 1 - addiw a2, a2, -290 + addiw a2, a2, -292 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -134983,7 +134737,7 @@ vl8r.v v8, (a1) # Unknown-size Folded Reload vslidedown.vi v8, v8, 2 csrr a1, vlenb - li a2, 66 + li a2, 72 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -134992,7 +134746,7 @@ vs2r.v v8, (a1) # Unknown-size Folded Spill csrr a1, vlenb lui a2, 1 - addiw a2, a2, -282 + addiw a2, a2, -284 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -135001,7 +134755,8 @@ vl8r.v v8, (a1) # Unknown-size Folded Reload vslidedown.vi v8, v8, 2 csrr a1, vlenb - slli a1, a1, 6 + li a2, 70 + mul a1, a1, a2 add a1, sp, a1 lui a2, 28 addiw a2, a2, -960 @@ -135009,7 +134764,7 @@ vs2r.v v8, (a1) # Unknown-size Folded Spill csrr a1, vlenb lui a2, 1 - addiw a2, a2, -266 + addiw a2, a2, -268 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -135027,7 +134782,7 @@ vs2r.v v8, (a1) # Unknown-size Folded Spill csrr a1, vlenb lui a2, 1 - addiw a2, a2, -394 + addiw a2, a2, -388 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -135036,7 +134791,7 @@ vl8r.v v8, (a1) # Unknown-size Folded Reload vslidedown.vi v8, v8, 2 csrr a1, vlenb - li a2, 14 + li a2, 10 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -135045,7 +134800,7 @@ vs2r.v v8, (a1) # Unknown-size Folded Spill csrr a1, vlenb lui a2, 1 - addiw a2, a2, -378 + addiw a2, a2, -252 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -135054,7 +134809,7 @@ vl8r.v v8, (a1) # Unknown-size Folded Reload vslidedown.vi v8, v8, 2 csrr a1, vlenb - slli a1, a1, 4 + slli a1, a1, 3 add a1, sp, a1 lui a2, 28 addiw a2, a2, -960 @@ -135062,7 +134817,7 @@ vs2r.v v8, (a1) # Unknown-size Folded Spill csrr a1, vlenb lui a2, 1 - addiw a2, a2, -250 + addiw a2, a2, -244 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -135071,7 +134826,7 @@ vl8r.v v8, (a1) # Unknown-size Folded Reload vslidedown.vi v8, v8, 2 csrr a1, vlenb - li a2, 18 + li a2, 6 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -135080,7 +134835,7 @@ vs2r.v v8, (a1) # Unknown-size Folded Spill csrr a1, vlenb lui a2, 1 - addiw a2, a2, -330 + addiw a2, a2, -380 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -135089,8 +134844,7 @@ vl8r.v v8, (a1) # Unknown-size Folded Reload vslidedown.vi v8, v8, 2 csrr a1, vlenb - li a2, 20 - mul a1, a1, a2 + slli a1, a1, 2 add a1, sp, a1 lui a2, 28 addiw a2, a2, -960 @@ -135098,7 +134852,7 @@ vs2r.v v8, (a1) # Unknown-size Folded Spill csrr a1, vlenb lui a2, 1 - addiw a2, a2, -386 + addiw a2, a2, -332 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -135107,7 +134861,7 @@ vl8r.v v8, (a1) # Unknown-size Folded Reload vslidedown.vi v8, v8, 2 csrr a1, vlenb - li a2, 62 + li a2, 68 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -135116,7 +134870,7 @@ vs2r.v v8, (a1) # Unknown-size Folded Spill csrr a1, vlenb lui a2, 1 - addiw a2, a2, -338 + addiw a2, a2, -340 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -135125,8 +134879,7 @@ vl8r.v v0, (a1) # Unknown-size Folded Reload vslidedown.vi v8, v0, 2 csrr a1, vlenb - li a2, 22 - mul a1, a1, a2 + slli a1, a1, 1 add a1, sp, a1 lui a2, 28 addiw a2, a2, -960 @@ -135134,7 +134887,7 @@ vs2r.v v8, (a1) # Unknown-size Folded Spill csrr a1, vlenb lui a2, 1 - addiw a2, a2, -418 + addiw a2, a2, -404 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -135143,7 +134896,7 @@ vl8r.v v8, (a1) # Unknown-size Folded Reload vslidedown.vi v8, v8, 2 csrr a1, vlenb - li a2, 60 + li a2, 66 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -135152,37 +134905,60 @@ vs2r.v v8, (a1) # Unknown-size Folded Spill csrr a1, vlenb lui a2, 1 - addiw a2, a2, -346 + addiw a2, a2, -348 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 addiw a2, a2, -960 add a1, a1, a2 vl8r.v v24, (a1) # Unknown-size Folded Reload - vslidedown.vi v26, v24, 2 + vslidedown.vi v8, v24, 2 + csrr a1, vlenb + slli a1, a1, 6 + add a1, sp, a1 + lui a2, 28 + addiw a2, a2, -960 + add a1, a1, a2 + vs2r.v v8, (a1) # Unknown-size Folded Spill csrr a1, vlenb lui a2, 1 - addiw a2, a2, -354 + addiw a2, a2, -412 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 addiw a2, a2, -960 add a1, a1, a2 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vslidedown.vi v28, v16, 2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vslidedown.vi v8, v8, 2 + csrr a1, vlenb + li a2, 62 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 28 + addiw a2, a2, -960 + add a1, a1, a2 + vs2r.v v8, (a1) # Unknown-size Folded Spill csrr a1, vlenb lui a2, 1 - addiw a2, a2, -322 + addiw a2, a2, -356 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 addiw a2, a2, -960 add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vslidedown.vi v30, v8, 2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vslidedown.vi v8, v16, 2 + csrr a1, vlenb + li a2, 60 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 28 + addiw a2, a2, -960 + add a1, a1, a2 + vs2r.v v8, (a1) # Unknown-size Folded Spill csrr a1, vlenb lui a2, 1 - addiw a2, a2, -410 + addiw a2, a2, -324 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -135200,7 +134976,7 @@ vs2r.v v8, (a1) # Unknown-size Folded Spill csrr a1, vlenb lui a2, 1 - addiw a2, a2, -274 + addiw a2, a2, -276 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -135218,7 +134994,7 @@ vs2r.v v8, (a1) # Unknown-size Folded Spill csrr a1, vlenb lui a2, 1 - addiw a2, a2, -258 + addiw a2, a2, -260 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -135236,7 +135012,7 @@ vs2r.v v8, (a1) # Unknown-size Folded Spill csrr a1, vlenb lui a2, 1 - addiw a2, a2, -362 + addiw a2, a2, -364 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -135254,7 +135030,7 @@ vs2r.v v8, (a1) # Unknown-size Folded Spill csrr a1, vlenb lui a2, 1 - addiw a2, a2, -370 + addiw a2, a2, -372 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -135272,7 +135048,7 @@ vs2r.v v8, (a1) # Unknown-size Folded Spill csrr a1, vlenb lui a2, 1 - addiw a2, a2, -314 + addiw a2, a2, -316 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -135290,7 +135066,7 @@ vs2r.v v8, (a1) # Unknown-size Folded Spill csrr a1, vlenb lui a2, 1 - addiw a2, a2, -306 + addiw a2, a2, -308 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -135308,7 +135084,7 @@ vs2r.v v8, (a1) # Unknown-size Folded Spill csrr a1, vlenb lui a2, 1 - addiw a2, a2, -298 + addiw a2, a2, -300 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -135326,7 +135102,7 @@ vs2r.v v8, (a1) # Unknown-size Folded Spill csrr a1, vlenb lui a2, 1 - addiw a2, a2, -290 + addiw a2, a2, -292 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -135344,7 +135120,7 @@ vs2r.v v8, (a1) # Unknown-size Folded Spill csrr a1, vlenb lui a2, 1 - addiw a2, a2, -282 + addiw a2, a2, -284 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -135362,7 +135138,7 @@ vs2r.v v8, (a1) # Unknown-size Folded Spill csrr a1, vlenb lui a2, 1 - addiw a2, a2, -266 + addiw a2, a2, -268 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -135380,7 +135156,7 @@ vs2r.v v8, (a1) # Unknown-size Folded Spill csrr a1, vlenb lui a2, 1 - addiw a2, a2, -394 + addiw a2, a2, -388 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -135398,7 +135174,7 @@ vs2r.v v8, (a1) # Unknown-size Folded Spill csrr a1, vlenb lui a2, 1 - addiw a2, a2, -378 + addiw a2, a2, -252 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -135416,7 +135192,7 @@ vs2r.v v8, (a1) # Unknown-size Folded Spill csrr a1, vlenb lui a2, 1 - addiw a2, a2, -250 + addiw a2, a2, -244 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -135433,7 +135209,7 @@ vs2r.v v8, (a1) # Unknown-size Folded Spill csrr a1, vlenb lui a2, 1 - addiw a2, a2, -330 + addiw a2, a2, -380 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -135451,44 +135227,48 @@ vs2r.v v8, (a1) # Unknown-size Folded Spill csrr a1, vlenb lui a2, 1 - addiw a2, a2, -386 + addiw a2, a2, -332 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 addiw a2, a2, -960 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vslidedown.vi v10, v8, 3 - vslidedown.vi v12, v0, 3 + vslidedown.vi v12, v8, 3 + vslidedown.vi v14, v0, 3 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -418 + addiw a2, a2, -404 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 addiw a2, a2, -960 add a1, a1, a2 vl8r.v v0, (a1) # Unknown-size Folded Reload - vslidedown.vi v14, v0, 3 - vslidedown.vi v24, v24, 3 - vslidedown.vi v8, v16, 3 + vslidedown.vi v8, v0, 3 + lui a1, 28 + addiw a1, a1, -960 + add a1, sp, a1 + vs2r.v v8, (a1) # Unknown-size Folded Spill + vslidedown.vi v10, v24, 3 csrr a1, vlenb - li a2, 28 + lui a2, 1 + addiw a2, a2, -412 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 addiw a2, a2, -960 add a1, a1, a2 - vs2r.v v8, (a1) # Unknown-size Folded Spill + vl8r.v v24, (a1) # Unknown-size Folded Reload + vslidedown.vi v8, v24, 3 csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -322 + li a2, 28 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 addiw a2, a2, -960 add a1, a1, a2 - vl8r.v v16, (a1) # Unknown-size Folded Reload + vs2r.v v8, (a1) # Unknown-size Folded Spill vslidedown.vi v8, v16, 3 csrr a1, vlenb li a2, 26 @@ -135500,14 +135280,14 @@ vs2r.v v8, (a1) # Unknown-size Folded Spill csrr a1, vlenb lui a2, 1 - addiw a2, a2, -410 + addiw a2, a2, -324 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 addiw a2, a2, -960 add a1, a1, a2 vl8r.v v16, (a1) # Unknown-size Folded Reload - vslidedown.vi v8, v16, 3 + vslidedown.vi v16, v16, 3 csrr a1, vlenb li a2, 24 mul a1, a1, a2 @@ -135515,15 +135295,12 @@ lui a2, 28 addiw a2, a2, -960 add a1, a1, a2 - vs2r.v v8, (a1) # Unknown-size Folded Spill - lui a1, 28 - addiw a1, a1, -960 - add a1, sp, a1 vl2r.v v8, (a1) # Unknown-size Folded Reload vfmv.f.s fa5, v8 fsd fa5, 1448(sp) # 8-byte Folded Spill csrr a1, vlenb - slli a1, a1, 1 + li a2, 22 + mul a1, a1, a2 add a1, sp, a1 lui a2, 28 addiw a2, a2, -960 @@ -135532,7 +135309,8 @@ vfmv.f.s fa5, v8 fsd fa5, 1440(sp) # 8-byte Folded Spill csrr a1, vlenb - slli a1, a1, 2 + li a2, 20 + mul a1, a1, a2 add a1, sp, a1 lui a2, 28 addiw a2, a2, -960 @@ -135541,7 +135319,7 @@ vfmv.f.s fa5, v8 fsd fa5, 1432(sp) # 8-byte Folded Spill csrr a1, vlenb - li a2, 6 + li a2, 18 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -135551,7 +135329,7 @@ vfmv.f.s fa5, v8 fsd fa5, 1424(sp) # 8-byte Folded Spill csrr a1, vlenb - slli a1, a1, 3 + slli a1, a1, 4 add a1, sp, a1 lui a2, 28 addiw a2, a2, -960 @@ -135560,7 +135338,7 @@ vfmv.f.s fa5, v8 fsd fa5, 1416(sp) # 8-byte Folded Spill csrr a1, vlenb - li a2, 10 + li a2, 14 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -135570,7 +135348,7 @@ vfmv.f.s fa5, v8 fsd fa5, 1408(sp) # 8-byte Folded Spill csrr a1, vlenb - li a2, 68 + li a2, 74 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -135580,7 +135358,7 @@ vfmv.f.s fa5, v8 fsd fa5, 1400(sp) # 8-byte Folded Spill csrr a1, vlenb - li a2, 66 + li a2, 72 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -135590,7 +135368,8 @@ vfmv.f.s fa5, v8 fsd fa5, 1392(sp) # 8-byte Folded Spill csrr a1, vlenb - slli a1, a1, 6 + li a2, 70 + mul a1, a1, a2 add a1, sp, a1 lui a2, 28 addiw a2, a2, -960 @@ -135609,7 +135388,7 @@ vfmv.f.s fa5, v8 fsd fa5, 1376(sp) # 8-byte Folded Spill csrr a1, vlenb - li a2, 14 + li a2, 10 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -135619,7 +135398,7 @@ vfmv.f.s fa5, v8 fsd fa5, 1368(sp) # 8-byte Folded Spill csrr a1, vlenb - slli a1, a1, 4 + slli a1, a1, 3 add a1, sp, a1 lui a2, 28 addiw a2, a2, -960 @@ -135628,7 +135407,7 @@ vfmv.f.s fa5, v8 fsd fa5, 1360(sp) # 8-byte Folded Spill csrr a1, vlenb - li a2, 18 + li a2, 6 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -135638,8 +135417,7 @@ vfmv.f.s fa5, v8 fsd fa5, 1352(sp) # 8-byte Folded Spill csrr a1, vlenb - li a2, 20 - mul a1, a1, a2 + slli a1, a1, 2 add a1, sp, a1 lui a2, 28 addiw a2, a2, -960 @@ -135648,7 +135426,7 @@ vfmv.f.s fa5, v8 fsd fa5, 1344(sp) # 8-byte Folded Spill csrr a1, vlenb - li a2, 62 + li a2, 68 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -135658,8 +135436,7 @@ vfmv.f.s fa5, v8 fsd fa5, 1336(sp) # 8-byte Folded Spill csrr a1, vlenb - li a2, 22 - mul a1, a1, a2 + slli a1, a1, 1 add a1, sp, a1 lui a2, 28 addiw a2, a2, -960 @@ -135668,7 +135445,7 @@ vfmv.f.s fa5, v8 fsd fa5, 1328(sp) # 8-byte Folded Spill csrr a1, vlenb - li a2, 60 + li a2, 66 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -135677,11 +135454,34 @@ vl2r.v v8, (a1) # Unknown-size Folded Reload vfmv.f.s fa5, v8 fsd fa5, 1320(sp) # 8-byte Folded Spill - vfmv.f.s fa5, v26 + csrr a1, vlenb + slli a1, a1, 6 + add a1, sp, a1 + lui a2, 28 + addiw a2, a2, -960 + add a1, a1, a2 + vl2r.v v8, (a1) # Unknown-size Folded Reload + vfmv.f.s fa5, v8 fsd fa5, 1312(sp) # 8-byte Folded Spill - vfmv.f.s fa5, v28 + csrr a1, vlenb + li a2, 62 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 28 + addiw a2, a2, -960 + add a1, a1, a2 + vl2r.v v8, (a1) # Unknown-size Folded Reload + vfmv.f.s fa5, v8 fsd fa5, 1304(sp) # 8-byte Folded Spill - vfmv.f.s fa5, v30 + csrr a1, vlenb + li a2, 60 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 28 + addiw a2, a2, -960 + add a1, a1, a2 + vl2r.v v8, (a1) # Unknown-size Folded Reload + vfmv.f.s fa5, v8 fsd fa5, 1296(sp) # 8-byte Folded Spill csrr a1, vlenb li a2, 58 @@ -135832,13 +135632,17 @@ vl2r.v v8, (a1) # Unknown-size Folded Reload vfmv.f.s fa5, v8 fsd fa5, 1176(sp) # 8-byte Folded Spill - vfmv.f.s fa5, v10 - fsd fa5, 1168(sp) # 8-byte Folded Spill vfmv.f.s fa5, v12 - fsd fa5, 1160(sp) # 8-byte Folded Spill + fsd fa5, 1168(sp) # 8-byte Folded Spill vfmv.f.s fa5, v14 + fsd fa5, 1160(sp) # 8-byte Folded Spill + lui a1, 28 + addiw a1, a1, -960 + add a1, sp, a1 + vl2r.v v8, (a1) # Unknown-size Folded Reload + vfmv.f.s fa5, v8 fsd fa5, 1152(sp) # 8-byte Folded Spill - vfmv.f.s fa5, v24 + vfmv.f.s fa5, v10 fsd fa5, 1144(sp) # 8-byte Folded Spill csrr a1, vlenb li a2, 28 @@ -135860,20 +135664,12 @@ vl2r.v v8, (a1) # Unknown-size Folded Reload vfmv.f.s fa5, v8 fsd fa5, 1128(sp) # 8-byte Folded Spill - csrr a1, vlenb - li a2, 24 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 28 - addiw a2, a2, -960 - add a1, a1, a2 - vl2r.v v8, (a1) # Unknown-size Folded Reload - vfmv.f.s fa5, v8 + vfmv.f.s fa5, v16 fsd fa5, 1120(sp) # 8-byte Folded Spill vsetivli zero, 16, e64, m8, ta, ma csrr a1, vlenb lui a2, 1 - addiw a2, a2, -274 + addiw a2, a2, -276 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -135891,7 +135687,7 @@ fsd fa5, 1112(sp) # 8-byte Folded Spill csrr a1, vlenb lui a5, 1 - addiw a5, a5, -258 + addiw a5, a5, -260 mul a1, a1, a5 add a1, sp, a1 lui a5, 28 @@ -135909,7 +135705,7 @@ fsd fa5, 1104(sp) # 8-byte Folded Spill csrr a5, vlenb lui a6, 1 - addiw a6, a6, -362 + addiw a6, a6, -364 mul a5, a5, a6 add a5, sp, a5 lui a6, 28 @@ -135927,7 +135723,7 @@ fsd fa5, 1096(sp) # 8-byte Folded Spill csrr a6, vlenb lui a7, 1 - addiw a7, a7, -370 + addiw a7, a7, -372 mul a6, a6, a7 add a6, sp, a6 lui a7, 28 @@ -135942,7 +135738,7 @@ fsd fa5, 1088(sp) # 8-byte Folded Spill csrr a6, vlenb lui a7, 1 - addiw a7, a7, -314 + addiw a7, a7, -316 mul a6, a6, a7 add a6, sp, a6 lui a7, 28 @@ -135957,7 +135753,7 @@ fsd fa5, 1080(sp) # 8-byte Folded Spill csrr a6, vlenb lui a7, 1 - addiw a7, a7, -306 + addiw a7, a7, -308 mul a6, a6, a7 add a6, sp, a6 lui a7, 28 @@ -135972,7 +135768,7 @@ fsd fa5, 1072(sp) # 8-byte Folded Spill csrr a6, vlenb lui a7, 1 - addiw a7, a7, -298 + addiw a7, a7, -300 mul a6, a6, a7 add a6, sp, a6 lui a7, 28 @@ -135987,7 +135783,7 @@ fsd fa5, 1064(sp) # 8-byte Folded Spill csrr a6, vlenb lui a7, 1 - addiw a7, a7, -290 + addiw a7, a7, -292 mul a6, a6, a7 add a6, sp, a6 lui a7, 28 @@ -136002,7 +135798,7 @@ fsd fa5, 1056(sp) # 8-byte Folded Spill csrr a6, vlenb lui a7, 1 - addiw a7, a7, -282 + addiw a7, a7, -284 mul a6, a6, a7 add a6, sp, a6 lui a7, 28 @@ -136017,7 +135813,7 @@ fsd fa5, 1048(sp) # 8-byte Folded Spill csrr a6, vlenb lui a7, 1 - addiw a7, a7, -266 + addiw a7, a7, -268 mul a6, a6, a7 add a6, sp, a6 lui a7, 28 @@ -136032,7 +135828,7 @@ fsd fa5, 1040(sp) # 8-byte Folded Spill csrr a6, vlenb lui a7, 1 - addiw a7, a7, -394 + addiw a7, a7, -388 mul a6, a6, a7 add a6, sp, a6 lui a7, 28 @@ -136047,7 +135843,7 @@ fsd fa5, 1032(sp) # 8-byte Folded Spill csrr a6, vlenb lui a7, 1 - addiw a7, a7, -378 + addiw a7, a7, -252 mul a6, a6, a7 add a6, sp, a6 lui a7, 28 @@ -136062,7 +135858,7 @@ fsd fa5, 1024(sp) # 8-byte Folded Spill csrr a6, vlenb lui a7, 1 - addiw a7, a7, -250 + addiw a7, a7, -244 mul a6, a6, a7 add a6, sp, a6 lui a7, 28 @@ -136077,7 +135873,7 @@ fsd fa5, 1016(sp) # 8-byte Folded Spill csrr a6, vlenb lui a7, 1 - addiw a7, a7, -330 + addiw a7, a7, -380 mul a6, a6, a7 add a6, sp, a6 lui a7, 28 @@ -136092,7 +135888,7 @@ fsd fa5, 1008(sp) # 8-byte Folded Spill csrr a6, vlenb lui a7, 1 - addiw a7, a7, -386 + addiw a7, a7, -332 mul a6, a6, a7 add a6, sp, a6 lui a7, 28 @@ -136107,7 +135903,7 @@ fsd fa5, 1000(sp) # 8-byte Folded Spill csrr a6, vlenb lui a7, 1 - addiw a7, a7, -338 + addiw a7, a7, -340 mul a6, a6, a7 add a6, sp, a6 lui a7, 28 @@ -136128,7 +135924,7 @@ fsd fa5, 984(sp) # 8-byte Folded Spill csrr a6, vlenb lui a7, 1 - addiw a7, a7, -346 + addiw a7, a7, -348 mul a6, a6, a7 add a6, sp, a6 lui a7, 28 @@ -136141,9 +135937,15 @@ add a5, sp, a5 fld fa5, 1920(a1) fsd fa5, 976(sp) # 8-byte Folded Spill + vse64.v v24, (a5) + lui a5, 28 + addiw a5, a5, -1408 + add a5, sp, a5 + fld fa5, 0(a0) + fsd fa5, 968(sp) # 8-byte Folded Spill csrr a6, vlenb lui a7, 1 - addiw a7, a7, -354 + addiw a7, a7, -356 mul a6, a6, a7 add a6, sp, a6 lui a7, 28 @@ -136152,13 +135954,13 @@ vl8r.v v8, (a6) # Unknown-size Folded Reload vse64.v v8, (a5) lui a5, 28 - addiw a5, a5, -1408 + addiw a5, a5, -1280 add a5, sp, a5 - fld fa5, 0(a0) - fsd fa5, 968(sp) # 8-byte Folded Spill + fld fa5, 128(a0) + fsd fa5, 960(sp) # 8-byte Folded Spill csrr a6, vlenb lui a7, 1 - addiw a7, a7, -322 + addiw a7, a7, -324 mul a6, a6, a7 add a6, sp, a6 lui a7, 28 @@ -136166,12 +135968,6 @@ add a6, a6, a7 vl8r.v v8, (a6) # Unknown-size Folded Reload vse64.v v8, (a5) - lui a5, 28 - addiw a5, a5, -1280 - add a5, sp, a5 - fld fa5, 128(a0) - fsd fa5, 960(sp) # 8-byte Folded Spill - vse64.v v16, (a5) fld fa5, 256(a0) fsd fa5, 952(sp) # 8-byte Folded Spill fld fa5, 8(a2) @@ -136378,7 +136174,7 @@ fld ft9, 296(a0) vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - li a1, 70 + li a1, 76 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136387,7 +136183,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -130 + addiw a1, a1, -28 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136397,7 +136193,7 @@ vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - li a1, 78 + li a1, 84 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136407,7 +136203,7 @@ vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - li a1, 86 + li a1, 92 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136417,7 +136213,7 @@ vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - li a1, 94 + li a1, 100 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136427,7 +136223,7 @@ vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - li a1, 102 + li a1, 108 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136437,7 +136233,7 @@ vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - li a1, 110 + li a1, 116 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136447,7 +136243,7 @@ vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - li a1, 118 + li a1, 124 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136457,7 +136253,7 @@ vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - li a1, 126 + li a1, 132 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136467,7 +136263,7 @@ vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - li a1, 134 + li a1, 140 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136477,7 +136273,7 @@ vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - li a1, 142 + li a1, 148 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136487,7 +136283,7 @@ vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - li a1, 150 + li a1, 156 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136497,7 +136293,7 @@ vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - li a1, 158 + li a1, 164 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136507,7 +136303,7 @@ vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - li a1, 166 + li a1, 172 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136517,7 +136313,7 @@ vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a1, 174 + li a1, 180 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136527,7 +136323,7 @@ vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - li a1, 182 + li a1, 188 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136537,7 +136333,7 @@ vslideup.vi v16, v8, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -130 + addiw a1, a1, -28 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136546,7 +136342,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - li a1, 190 + li a1, 196 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136555,7 +136351,7 @@ vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2 + addiw a1, a1, -36 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136565,7 +136361,7 @@ vslideup.vi v8, v16, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - li a1, 198 + li a1, 204 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136575,7 +136371,7 @@ vslideup.vi v8, v16, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - li a1, 206 + li a1, 212 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136585,7 +136381,7 @@ vslideup.vi v8, v16, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - li a1, 278 + li a1, 284 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136595,7 +136391,7 @@ vslideup.vi v8, v16, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - li a1, 214 + li a1, 220 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136605,7 +136401,7 @@ vslideup.vi v8, v16, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - li a1, 230 + li a1, 236 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136615,7 +136411,7 @@ vslideup.vi v8, v16, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - li a1, 222 + li a1, 228 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136625,7 +136421,7 @@ vslideup.vi v8, v16, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - li a1, 238 + li a1, 244 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136635,7 +136431,7 @@ vslideup.vi v8, v16, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - li a1, 246 + li a1, 252 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136645,7 +136441,7 @@ vslideup.vi v8, v16, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - li a1, 270 + li a1, 276 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136655,7 +136451,7 @@ vslideup.vi v8, v16, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - li a1, 294 + li a1, 300 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136665,7 +136461,7 @@ vslideup.vi v8, v16, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - li a1, 302 + li a1, 308 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136675,7 +136471,7 @@ vslideup.vi v8, v16, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - li a1, 318 + li a1, 324 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136685,7 +136481,7 @@ vslideup.vi v8, v16, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a1, 334 + li a1, 340 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136695,7 +136491,7 @@ vslideup.vi v8, v16, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - li a1, 350 + li a1, 356 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136705,7 +136501,7 @@ vslideup.vi v8, v16, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2 + addiw a1, a1, -36 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136714,7 +136510,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - li a1, 366 + li a1, 372 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136723,7 +136519,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -138 + addiw a1, a1, -44 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136733,7 +136529,7 @@ vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - li a1, 382 + li a1, 388 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136743,7 +136539,7 @@ vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - li a1, 398 + li a1, 404 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136753,7 +136549,7 @@ vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - li a1, 414 + li a1, 420 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136763,7 +136559,7 @@ vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - li a1, 430 + li a1, 436 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136773,7 +136569,7 @@ vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - li a1, 446 + li a1, 452 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136783,7 +136579,7 @@ vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - li a1, 470 + li a1, 476 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136793,7 +136589,7 @@ vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - li a1, 486 + li a1, 492 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136803,7 +136599,7 @@ vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - li a1, 502 + li a1, 508 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136814,7 +136610,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -730 + addiw a1, a1, -724 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136824,7 +136620,7 @@ vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - li a1, 262 + li a1, 268 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136834,7 +136630,7 @@ vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - li a1, 254 + li a1, 260 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136844,7 +136640,7 @@ vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - li a1, 286 + li a1, 292 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136854,7 +136650,7 @@ vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a1, 310 + li a1, 316 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136864,7 +136660,7 @@ vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - li a1, 326 + li a1, 332 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136874,7 +136670,7 @@ vslideup.vi v16, v8, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -138 + addiw a1, a1, -44 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136883,7 +136679,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - li a1, 342 + li a1, 348 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136892,7 +136688,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -10 + addiw a1, a1, -60 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136902,7 +136698,7 @@ vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - li a1, 358 + li a1, 364 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136912,7 +136708,7 @@ vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - li a1, 374 + li a1, 380 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136922,7 +136718,7 @@ vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - li a1, 390 + li a1, 396 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136932,7 +136728,7 @@ vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - li a1, 406 + li a1, 412 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136942,7 +136738,7 @@ vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - li a1, 422 + li a1, 428 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136952,7 +136748,7 @@ vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - li a1, 438 + li a1, 444 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136962,7 +136758,7 @@ vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - li a1, 454 + li a1, 460 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136972,7 +136768,7 @@ vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - li a1, 462 + li a1, 468 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136983,7 +136779,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -722 + addiw a1, a1, -716 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -136993,7 +136789,7 @@ vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - li a1, 478 + li a1, 484 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137003,7 +136799,7 @@ vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - li a1, 510 + li a1, 516 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137013,7 +136809,7 @@ vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - li a1, 526 + li a1, 532 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137023,7 +136819,7 @@ vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a1, 614 + li a1, 620 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137034,7 +136830,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -714 + addiw a1, a1, -708 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137044,7 +136840,7 @@ vslideup.vi v16, v8, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -10 + addiw a1, a1, -60 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137053,7 +136849,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - li a1, 494 + li a1, 500 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137062,7 +136858,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -34 + addiw a1, a1, 4 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137072,7 +136868,7 @@ vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - li a1, 518 + li a1, 524 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137082,7 +136878,7 @@ vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - li a1, 566 + li a1, 572 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137092,7 +136888,7 @@ vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - li a1, 582 + li a1, 588 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137102,7 +136898,7 @@ vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - li a1, 598 + li a1, 604 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137112,7 +136908,7 @@ vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - li a1, 622 + li a1, 628 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137122,7 +136918,7 @@ vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - li a1, 638 + li a1, 644 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137132,7 +136928,7 @@ vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - li a1, 654 + li a1, 660 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137142,7 +136938,7 @@ vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - li a1, 670 + li a1, 676 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137152,7 +136948,7 @@ vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - li a1, 686 + li a1, 692 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137162,7 +136958,7 @@ vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - li a1, 702 + li a1, 708 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137172,7 +136968,7 @@ vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - li a1, 718 + li a1, 724 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137182,7 +136978,7 @@ vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - li a1, 734 + li a1, 740 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137192,7 +136988,7 @@ vslideup.vi v16, v24, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a1, 742 + li a1, 748 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137203,7 +136999,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -698 + addiw a1, a1, -692 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137213,7 +137009,7 @@ vslideup.vi v16, v8, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -34 + addiw a1, a1, 4 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137222,7 +137018,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - li a1, 774 + li a1, 780 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137231,7 +137027,7 @@ vl8r.v v24, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -26 + addiw a1, a1, -52 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137241,7 +137037,7 @@ vslideup.vi v16, v24, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - li a1, 798 + li a1, 804 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137251,7 +137047,7 @@ vslideup.vi v16, v24, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - li a1, 830 + li a1, 836 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137262,7 +137058,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -402 + addiw a1, a1, -396 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137272,7 +137068,7 @@ vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - li a1, 542 + li a1, 548 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137282,7 +137078,7 @@ vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - li a1, 534 + li a1, 540 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137292,7 +137088,7 @@ vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - li a1, 550 + li a1, 556 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137302,7 +137098,7 @@ vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - li a1, 558 + li a1, 564 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137312,7 +137108,7 @@ vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - li a1, 574 + li a1, 580 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137322,7 +137118,7 @@ vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - li a1, 590 + li a1, 596 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137332,7 +137128,7 @@ vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - li a1, 606 + li a1, 612 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137342,7 +137138,7 @@ vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - li a1, 630 + li a1, 636 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137352,7 +137148,7 @@ vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - li a1, 646 + li a1, 652 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137362,7 +137158,7 @@ vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a1, 662 + li a1, 668 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137372,7 +137168,7 @@ vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - li a1, 678 + li a1, 684 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137382,7 +137178,7 @@ vslideup.vi v16, v8, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -26 + addiw a1, a1, -52 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137391,7 +137187,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - li a1, 694 + li a1, 700 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137400,7 +137196,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -42 + addiw a1, a1, -76 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137410,7 +137206,7 @@ vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - li a1, 710 + li a1, 716 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137420,7 +137216,7 @@ vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - li a1, 726 + li a1, 732 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137431,7 +137227,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -706 + addiw a1, a1, -700 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137441,7 +137237,7 @@ vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - li a1, 750 + li a1, 756 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137451,7 +137247,7 @@ vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - li a1, 758 + li a1, 764 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137461,7 +137257,7 @@ vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - li a1, 782 + li a1, 788 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137471,7 +137267,7 @@ vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - li a1, 886 + li a1, 892 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137482,7 +137278,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -690 + addiw a1, a1, -684 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137492,7 +137288,7 @@ vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - li a1, 822 + li a1, 828 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137502,7 +137298,7 @@ vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - li a1, 766 + li a1, 772 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137512,7 +137308,7 @@ vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - li a1, 790 + li a1, 796 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137522,7 +137318,7 @@ vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - li a1, 854 + li a1, 860 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137532,7 +137328,7 @@ vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a1, 870 + li a1, 876 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137542,7 +137338,7 @@ vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - li a1, 894 + li a1, 900 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137552,7 +137348,7 @@ vslideup.vi v16, v8, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -42 + addiw a1, a1, -76 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137561,7 +137357,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - li a1, 910 + li a1, 916 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137570,7 +137366,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -146 + addiw a1, a1, -68 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137580,7 +137376,7 @@ vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - li a1, 926 + li a1, 932 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137590,7 +137386,7 @@ vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - li a1, 942 + li a1, 948 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137600,7 +137396,7 @@ vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - li a1, 958 + li a1, 964 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137610,7 +137406,7 @@ vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - li a1, 974 + li a1, 980 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137620,7 +137416,7 @@ vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - li a1, 990 + li a1, 996 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137630,7 +137426,7 @@ vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - li a1, 1006 + li a1, 1012 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137640,7 +137436,7 @@ vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - li a1, 1022 + li a1, 1028 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137651,7 +137447,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -666 + addiw a1, a1, -660 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137661,7 +137457,7 @@ vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - li a1, 1038 + li a1, 1044 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137671,7 +137467,7 @@ vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - li a1, 1070 + li a1, 1076 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137681,7 +137477,7 @@ vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - li a1, 1094 + li a1, 1100 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137691,7 +137487,7 @@ vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - li a1, 1118 + li a1, 1124 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137702,7 +137498,7 @@ vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -682 + addiw a1, a1, -676 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137712,7 +137508,7 @@ vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - li a1, 814 + li a1, 820 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137722,7 +137518,7 @@ vslideup.vi v16, v8, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -146 + addiw a1, a1, -68 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137731,7 +137527,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - li a1, 806 + li a1, 812 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137740,7 +137536,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -66 + addiw a1, a1, -140 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137750,7 +137546,7 @@ vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - li a1, 838 + li a1, 844 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137760,7 +137556,7 @@ vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - li a1, 846 + li a1, 852 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137770,7 +137566,7 @@ vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - li a1, 862 + li a1, 868 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137780,7 +137576,7 @@ vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - li a1, 878 + li a1, 884 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137790,7 +137586,7 @@ vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - li a1, 902 + li a1, 908 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137800,7 +137596,7 @@ vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - li a1, 918 + li a1, 924 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137810,7 +137606,7 @@ vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - li a1, 934 + li a1, 940 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137820,7 +137616,7 @@ vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - li a1, 950 + li a1, 956 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137830,7 +137626,7 @@ vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - li a1, 966 + li a1, 972 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137840,7 +137636,7 @@ vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - li a1, 982 + li a1, 988 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137850,7 +137646,7 @@ vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - li a1, 998 + li a1, 1004 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137860,7 +137656,7 @@ vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - li a1, 1014 + li a1, 1020 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137871,7 +137667,7 @@ vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -674 + addiw a1, a1, -668 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137881,7 +137677,7 @@ vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - li a1, 1030 + li a1, 1036 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137891,7 +137687,7 @@ vslideup.vi v16, v8, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -66 + addiw a1, a1, -140 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137900,7 +137696,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - li a1, 1054 + li a1, 1060 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137909,7 +137705,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -58 + addiw a1, a1, -132 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137919,7 +137715,7 @@ vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - li a1, 1166 + li a1, 1172 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137930,7 +137726,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -658 + addiw a1, a1, -652 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137940,7 +137736,7 @@ vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - li a1, 1102 + li a1, 1108 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137950,7 +137746,7 @@ vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - li a1, 1046 + li a1, 1052 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137960,7 +137756,7 @@ vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - li a1, 1062 + li a1, 1068 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137970,7 +137766,7 @@ vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - li a1, 1134 + li a1, 1140 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137980,7 +137776,7 @@ vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - li a1, 1150 + li a1, 1156 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -137990,7 +137786,7 @@ vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - li a1, 1174 + li a1, 1180 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138000,7 +137796,7 @@ vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - li a1, 1190 + li a1, 1196 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138010,7 +137806,7 @@ vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - li a1, 1206 + li a1, 1212 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138020,7 +137816,7 @@ vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - li a1, 1222 + li a1, 1228 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138030,7 +137826,7 @@ vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - li a1, 1238 + li a1, 1244 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138040,7 +137836,7 @@ vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a1, 1254 + li a1, 1260 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138050,7 +137846,7 @@ vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - li a1, 1270 + li a1, 1276 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138060,7 +137856,7 @@ vslideup.vi v16, v8, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -58 + addiw a1, a1, -132 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138069,7 +137865,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - li a1, 1286 + li a1, 1292 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138078,7 +137874,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -50 + addiw a1, a1, -84 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138088,7 +137884,7 @@ vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - li a1, 1302 + li a1, 1308 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138099,7 +137895,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -634 + addiw a1, a1, -628 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138109,7 +137905,7 @@ vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - li a1, 1318 + li a1, 1324 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138119,7 +137915,7 @@ vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - li a1, 1350 + li a1, 1356 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138129,7 +137925,7 @@ vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - li a1, 1374 + li a1, 1380 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138139,7 +137935,7 @@ vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - li a1, 1398 + li a1, 1404 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138150,7 +137946,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -650 + addiw a1, a1, -644 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138160,7 +137956,7 @@ vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - li a1, 1086 + li a1, 1092 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138170,7 +137966,7 @@ vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - li a1, 1078 + li a1, 1084 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138180,7 +137976,7 @@ vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - li a1, 1110 + li a1, 1116 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138190,7 +137986,7 @@ vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - li a1, 1126 + li a1, 1132 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138200,7 +137996,7 @@ vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - li a1, 1142 + li a1, 1148 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138210,7 +138006,7 @@ vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a1, 1158 + li a1, 1164 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138220,7 +138016,7 @@ vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - li a1, 1182 + li a1, 1188 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138230,7 +138026,7 @@ vslideup.vi v16, v8, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -50 + addiw a1, a1, -84 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138239,7 +138035,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - li a1, 1198 + li a1, 1204 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138248,7 +138044,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -162 + addiw a1, a1, -148 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138258,7 +138054,7 @@ vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - li a1, 1214 + li a1, 1220 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138268,7 +138064,7 @@ vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - li a1, 1230 + li a1, 1236 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138278,7 +138074,7 @@ vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - li a1, 1246 + li a1, 1252 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138288,7 +138084,7 @@ vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - li a1, 1262 + li a1, 1268 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138298,7 +138094,7 @@ vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - li a1, 1278 + li a1, 1284 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138308,7 +138104,7 @@ vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - li a1, 1294 + li a1, 1300 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138319,7 +138115,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -642 + addiw a1, a1, -636 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138329,7 +138125,7 @@ vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - li a1, 1310 + li a1, 1316 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138339,7 +138135,7 @@ vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - li a1, 1326 + li a1, 1332 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138349,7 +138145,7 @@ vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - li a1, 1342 + li a1, 1348 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138359,7 +138155,7 @@ vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - li a1, 1462 + li a1, 1468 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138370,7 +138166,7 @@ vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -626 + addiw a1, a1, -620 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138380,7 +138176,7 @@ vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a1, 1390 + li a1, 1396 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138390,7 +138186,7 @@ vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - li a1, 1334 + li a1, 1340 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138400,7 +138196,7 @@ vslideup.vi v16, v8, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -162 + addiw a1, a1, -148 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138409,7 +138205,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - li a1, 1414 + li a1, 1420 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138418,7 +138214,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -170 + addiw a1, a1, -156 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138428,7 +138224,7 @@ vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - li a1, 1430 + li a1, 1436 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138438,7 +138234,7 @@ vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - li a1, 1446 + li a1, 1452 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138448,7 +138244,7 @@ vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - li a1, 1470 + li a1, 1476 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138458,7 +138254,7 @@ vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - li a1, 1486 + li a1, 1492 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138468,7 +138264,7 @@ vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - li a1, 1502 + li a1, 1508 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138478,7 +138274,7 @@ vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - li a1, 1518 + li a1, 1524 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138488,7 +138284,7 @@ vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - li a1, 1534 + li a1, 1540 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138498,7 +138294,7 @@ vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - li a1, 1550 + li a1, 1556 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138508,7 +138304,7 @@ vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - li a1, 1566 + li a1, 1572 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138518,7 +138314,7 @@ vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - li a1, 1582 + li a1, 1588 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138528,7 +138324,7 @@ vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - li a1, 1590 + li a1, 1596 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138539,7 +138335,7 @@ vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -602 + addiw a1, a1, -596 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138549,7 +138345,7 @@ vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a1, 1614 + li a1, 1612 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138559,7 +138355,7 @@ vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - li a1, 1654 + li a1, 1660 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138569,7 +138365,7 @@ vslideup.vi v16, v8, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -170 + addiw a1, a1, -156 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138578,7 +138374,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - li a1, 1678 + li a1, 1684 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138587,7 +138383,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -154 + addiw a1, a1, -92 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138598,7 +138394,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -618 + addiw a1, a1, -612 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138608,7 +138404,7 @@ vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - li a1, 1366 + li a1, 1372 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138618,7 +138414,7 @@ vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - li a1, 1358 + li a1, 1364 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138628,7 +138424,7 @@ vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - li a1, 1382 + li a1, 1388 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138638,7 +138434,7 @@ vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - li a1, 1406 + li a1, 1412 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138648,7 +138444,7 @@ vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - li a1, 1422 + li a1, 1428 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138658,7 +138454,7 @@ vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - li a1, 1438 + li a1, 1444 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138668,7 +138464,7 @@ vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - li a1, 1454 + li a1, 1460 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138678,7 +138474,7 @@ vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - li a1, 1478 + li a1, 1484 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138688,7 +138484,7 @@ vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - li a1, 1494 + li a1, 1500 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138698,7 +138494,7 @@ vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - li a1, 1510 + li a1, 1516 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138708,7 +138504,7 @@ vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - li a1, 1526 + li a1, 1532 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138718,7 +138514,7 @@ vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a1, 1542 + li a1, 1548 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138728,7 +138524,7 @@ vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - li a1, 1558 + li a1, 1564 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138738,7 +138534,7 @@ vslideup.vi v16, v8, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -154 + addiw a1, a1, -92 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138747,7 +138543,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - li a1, 1574 + li a1, 1580 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138756,7 +138552,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -242 + addiw a1, a1, -212 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138767,7 +138563,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -610 + addiw a1, a1, -604 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138777,7 +138573,7 @@ vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - li a1, 1598 + li a1, 1604 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138787,7 +138583,7 @@ vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - li a1, 1622 + li a1, 1620 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138797,7 +138593,7 @@ vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - li a1, 1638 + li a1, 1636 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138807,7 +138603,7 @@ vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - li a1, 1718 + li a1, 1724 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138818,7 +138614,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -594 + addiw a1, a1, -588 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138828,7 +138624,7 @@ vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - li a1, 1670 + li a1, 1676 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138838,7 +138634,7 @@ vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - li a1, 1630 + li a1, 1628 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138848,7 +138644,7 @@ vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - li a1, 1646 + li a1, 1644 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138858,7 +138654,7 @@ vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - li a1, 1694 + li a1, 1700 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138868,7 +138664,7 @@ vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - li a1, 1702 + li a1, 1708 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138878,7 +138674,7 @@ vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - li a1, 1726 + li a1, 1732 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138888,7 +138684,7 @@ vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a1, 1742 + li a1, 1748 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138898,7 +138694,7 @@ vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - li a1, 1766 + li a1, 1772 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138908,7 +138704,7 @@ vslideup.vi v16, v8, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -242 + addiw a1, a1, -212 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138917,7 +138713,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - li a1, 1782 + li a1, 1788 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138926,7 +138722,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -178 + addiw a1, a1, -100 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138936,7 +138732,7 @@ vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - li a1, 1806 + li a1, 1812 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138946,7 +138742,7 @@ vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - li a1, 1830 + li a1, 1836 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138956,7 +138752,7 @@ vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - li a1, 1854 + li a1, 1860 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138966,7 +138762,7 @@ vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - li a1, 1886 + li a1, 1892 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138976,7 +138772,7 @@ vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - li a1, 1918 + li a1, 1924 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138987,7 +138783,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -562 + addiw a1, a1, -556 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -138997,7 +138793,7 @@ vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - li a1, 1974 + li a1, 1980 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139007,7 +138803,8 @@ vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - li a1, 2046 + lui a1, 1 + addiw a1, a1, -2044 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139018,7 +138815,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2010 + addiw a1, a1, -2004 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139029,7 +138826,7 @@ vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1978 + addiw a1, a1, -1972 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139040,7 +138837,7 @@ vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -586 + addiw a1, a1, -580 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139050,7 +138847,7 @@ vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - li a1, 1758 + li a1, 1764 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139060,7 +138857,7 @@ vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a1, 1662 + li a1, 1668 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139070,7 +138867,7 @@ vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - li a1, 1686 + li a1, 1692 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139080,7 +138877,7 @@ vslideup.vi v16, v8, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -178 + addiw a1, a1, -100 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139089,7 +138886,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - li a1, 1798 + li a1, 1804 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139098,7 +138895,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -226 + addiw a1, a1, -236 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139108,7 +138905,7 @@ vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - li a1, 1822 + li a1, 1828 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139118,7 +138915,7 @@ vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - li a1, 1838 + li a1, 1844 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139128,7 +138925,7 @@ vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - li a1, 1870 + li a1, 1876 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139138,7 +138935,7 @@ vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - li a1, 1910 + li a1, 1916 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139148,7 +138945,7 @@ vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - li a1, 1934 + li a1, 1940 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139158,7 +138955,7 @@ vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - li a1, 1950 + li a1, 1956 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139168,7 +138965,7 @@ vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - li a1, 1990 + li a1, 1996 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139178,7 +138975,7 @@ vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - li a1, 2014 + li a1, 2020 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139188,7 +138985,7 @@ vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - li a1, 2030 + li a1, 2036 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139199,7 +138996,7 @@ vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2026 + addiw a1, a1, -2020 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139210,7 +139007,7 @@ vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -578 + addiw a1, a1, -572 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139220,7 +139017,7 @@ vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - li a1, 1862 + li a1, 1868 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139230,7 +139027,7 @@ vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a1, 1894 + li a1, 1900 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139240,7 +139037,7 @@ vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - li a1, 1926 + li a1, 1932 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139250,7 +139047,7 @@ vslideup.vi v16, v8, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -226 + addiw a1, a1, -236 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139260,7 +139057,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -570 + addiw a1, a1, -564 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139269,7 +139066,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -74 + addiw a1, a1, -164 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139279,7 +139076,7 @@ vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - li a1, 1982 + li a1, 1988 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139289,7 +139086,7 @@ vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - li a1, 1966 + li a1, 1972 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139299,7 +139096,7 @@ vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - li a1, 2006 + li a1, 2012 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139310,7 +139107,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2042 + addiw a1, a1, -2036 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139321,7 +139118,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2002 + addiw a1, a1, -1996 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139332,7 +139129,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1986 + addiw a1, a1, -1980 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139343,7 +139140,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1970 + addiw a1, a1, -1964 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139354,7 +139151,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1954 + addiw a1, a1, -1948 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139365,7 +139162,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1938 + addiw a1, a1, -1932 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139376,7 +139173,7 @@ vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1922 + addiw a1, a1, -1916 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139387,7 +139184,7 @@ vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1906 + addiw a1, a1, -1900 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139398,7 +139195,7 @@ vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1890 + addiw a1, a1, -1884 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139409,7 +139206,7 @@ vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1874 + addiw a1, a1, -1868 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139420,7 +139217,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1858 + addiw a1, a1, -1852 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139430,7 +139227,7 @@ vslideup.vi v16, v8, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -74 + addiw a1, a1, -164 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139440,7 +139237,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -546 + addiw a1, a1, -540 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139449,7 +139246,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -82 + addiw a1, a1, -220 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139460,7 +139257,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1834 + addiw a1, a1, -1828 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139471,7 +139268,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1810 + addiw a1, a1, -1804 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139482,7 +139279,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1794 + addiw a1, a1, -1788 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139493,7 +139290,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1754 + addiw a1, a1, -1748 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139504,7 +139301,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -554 + addiw a1, a1, -548 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139515,7 +139312,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2018 + addiw a1, a1, -2012 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139526,7 +139323,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2034 + addiw a1, a1, -2028 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139537,7 +139334,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1994 + addiw a1, a1, -1988 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139548,7 +139345,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1962 + addiw a1, a1, -1956 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139559,7 +139356,7 @@ vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1946 + addiw a1, a1, -1940 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139570,7 +139367,7 @@ vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1930 + addiw a1, a1, -1924 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139581,7 +139378,7 @@ vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1914 + addiw a1, a1, -1908 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139592,7 +139389,7 @@ vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1898 + addiw a1, a1, -1892 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139603,7 +139400,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1882 + addiw a1, a1, -1876 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139613,7 +139410,7 @@ vslideup.vi v16, v8, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -82 + addiw a1, a1, -220 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139623,7 +139420,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1866 + addiw a1, a1, -1860 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139632,7 +139429,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -90 + addiw a1, a1, -108 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139643,7 +139440,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1850 + addiw a1, a1, -1844 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139654,7 +139451,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1842 + addiw a1, a1, -1836 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139665,7 +139462,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1826 + addiw a1, a1, -1820 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139676,7 +139473,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1818 + addiw a1, a1, -1812 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139687,7 +139484,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -538 + addiw a1, a1, -532 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139698,7 +139495,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1802 + addiw a1, a1, -1796 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139709,7 +139506,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1786 + addiw a1, a1, -1780 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139720,7 +139517,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1770 + addiw a1, a1, -1764 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139731,7 +139528,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1722 + addiw a1, a1, -1716 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139742,7 +139539,7 @@ vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -530 + addiw a1, a1, -524 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139753,7 +139550,7 @@ vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1746 + addiw a1, a1, -1740 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139764,7 +139561,7 @@ vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1778 + addiw a1, a1, -1772 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139775,7 +139572,7 @@ vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1762 + addiw a1, a1, -1756 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139786,7 +139583,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1738 + addiw a1, a1, -1732 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139796,7 +139593,7 @@ vslideup.vi v16, v8, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -90 + addiw a1, a1, -108 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139806,7 +139603,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1730 + addiw a1, a1, -1724 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139815,7 +139612,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -186 + addiw a1, a1, -172 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139826,7 +139623,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1714 + addiw a1, a1, -1708 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139837,7 +139634,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1706 + addiw a1, a1, -1700 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139848,7 +139645,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1698 + addiw a1, a1, -1692 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139859,7 +139656,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1690 + addiw a1, a1, -1684 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139870,7 +139667,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1682 + addiw a1, a1, -1676 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139881,7 +139678,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1674 + addiw a1, a1, -1668 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139892,7 +139689,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1666 + addiw a1, a1, -1660 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139903,7 +139700,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1658 + addiw a1, a1, -1652 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139914,7 +139711,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1650 + addiw a1, a1, -1644 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139925,7 +139722,7 @@ vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -522 + addiw a1, a1, -516 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139936,7 +139733,7 @@ vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1634 + addiw a1, a1, -1628 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139947,7 +139744,7 @@ vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1610 + addiw a1, a1, -1604 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139958,7 +139755,7 @@ vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1602 + addiw a1, a1, -1596 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139969,7 +139766,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1578 + addiw a1, a1, -1572 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139979,7 +139776,7 @@ vslideup.vi v16, v8, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -186 + addiw a1, a1, -172 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139988,7 +139785,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - li a1, 1606 + li a1, 1652 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -139997,7 +139794,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -234 + addiw a1, a1, -20 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140007,7 +139804,7 @@ vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - li a1, 1710 + li a1, 1716 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140017,7 +139814,7 @@ vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - li a1, 1734 + li a1, 1740 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140027,7 +139824,7 @@ vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - li a1, 1750 + li a1, 1756 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140037,7 +139834,7 @@ vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - li a1, 1774 + li a1, 1780 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140047,7 +139844,7 @@ vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - li a1, 1790 + li a1, 1796 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140057,7 +139854,7 @@ vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - li a1, 1814 + li a1, 1820 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140067,7 +139864,7 @@ vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - li a1, 1846 + li a1, 1852 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140077,7 +139874,7 @@ vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - li a1, 1878 + li a1, 1884 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140087,7 +139884,7 @@ vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - li a1, 1902 + li a1, 1908 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140097,7 +139894,7 @@ vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - li a1, 1942 + li a1, 1948 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140107,7 +139904,7 @@ vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - li a1, 1958 + li a1, 1964 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140117,7 +139914,7 @@ vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - li a1, 1998 + li a1, 2004 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140127,7 +139924,7 @@ vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a1, 2022 + li a1, 2028 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140137,7 +139934,7 @@ vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - li a1, 2038 + li a1, 2044 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140147,7 +139944,7 @@ vslideup.vi v16, v8, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -234 + addiw a1, a1, -20 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140157,7 +139954,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1642 + addiw a1, a1, -1636 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140166,7 +139963,7 @@ vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -218 + addiw a1, a1, -204 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140177,7 +139974,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1626 + addiw a1, a1, -1620 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140188,7 +139985,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1618 + addiw a1, a1, -1612 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140199,7 +139996,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1530 + addiw a1, a1, -1524 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140210,7 +140007,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -514 + addiw a1, a1, -508 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140221,7 +140018,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1586 + addiw a1, a1, -1580 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140232,7 +140029,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1594 + addiw a1, a1, -1588 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140243,7 +140040,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1570 + addiw a1, a1, -1564 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140254,7 +140051,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1562 + addiw a1, a1, -1556 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140265,7 +140062,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1538 + addiw a1, a1, -1532 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140276,7 +140073,7 @@ vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1514 + addiw a1, a1, -1508 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140287,7 +140084,7 @@ vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1506 + addiw a1, a1, -1500 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140298,7 +140095,7 @@ vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1490 + addiw a1, a1, -1484 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140309,7 +140106,7 @@ vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1474 + addiw a1, a1, -1468 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140320,7 +140117,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1458 + addiw a1, a1, -1452 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140330,7 +140127,7 @@ vslideup.vi v8, v16, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -218 + addiw a1, a1, -204 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140340,7 +140137,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1442 + addiw a1, a1, -1436 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140349,7 +140146,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -18 + addiw a1, a1, -180 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140360,7 +140157,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1426 + addiw a1, a1, -1420 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140371,7 +140168,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1410 + addiw a1, a1, -1404 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140382,7 +140179,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1394 + addiw a1, a1, -1388 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140393,7 +140190,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -498 + addiw a1, a1, -492 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140404,7 +140201,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1370 + addiw a1, a1, -1364 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140415,7 +140212,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1346 + addiw a1, a1, -1340 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140426,7 +140223,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1330 + addiw a1, a1, -1324 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140437,7 +140234,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1314 + addiw a1, a1, -1308 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140448,7 +140245,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -506 + addiw a1, a1, -500 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140459,7 +140256,7 @@ vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1546 + addiw a1, a1, -1540 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140470,7 +140267,7 @@ vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1554 + addiw a1, a1, -1548 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140481,7 +140278,7 @@ vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1522 + addiw a1, a1, -1516 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140492,7 +140289,7 @@ vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1498 + addiw a1, a1, -1492 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140503,7 +140300,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1482 + addiw a1, a1, -1476 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140513,7 +140310,7 @@ vslideup.vi v16, v8, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -18 + addiw a1, a1, -180 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140523,7 +140320,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1466 + addiw a1, a1, -1460 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140532,7 +140329,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -98 + addiw a1, a1, -188 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140543,7 +140340,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1450 + addiw a1, a1, -1444 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140554,7 +140351,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1434 + addiw a1, a1, -1428 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140565,7 +140362,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1418 + addiw a1, a1, -1412 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140576,7 +140373,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1402 + addiw a1, a1, -1396 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140587,7 +140384,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1386 + addiw a1, a1, -1380 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140598,7 +140395,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1378 + addiw a1, a1, -1372 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140609,7 +140406,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1362 + addiw a1, a1, -1356 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140620,7 +140417,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1354 + addiw a1, a1, -1348 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140631,7 +140428,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -490 + addiw a1, a1, -484 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140642,7 +140439,7 @@ vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1338 + addiw a1, a1, -1332 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140653,7 +140450,7 @@ vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1306 + addiw a1, a1, -1300 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140664,7 +140461,7 @@ vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1290 + addiw a1, a1, -1284 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140675,7 +140472,7 @@ vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1202 + addiw a1, a1, -1196 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140686,7 +140483,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -482 + addiw a1, a1, -476 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140696,7 +140493,7 @@ vslideup.vi v16, v8, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -98 + addiw a1, a1, -188 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140706,7 +140503,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1322 + addiw a1, a1, -1316 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140715,7 +140512,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -202 + addiw a1, a1, -124 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140726,7 +140523,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1298 + addiw a1, a1, -1292 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140737,7 +140534,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1250 + addiw a1, a1, -1244 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140748,7 +140545,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1234 + addiw a1, a1, -1228 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140759,7 +140556,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1218 + addiw a1, a1, -1212 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140770,7 +140567,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1194 + addiw a1, a1, -1188 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140781,7 +140578,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1178 + addiw a1, a1, -1172 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140792,7 +140589,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1162 + addiw a1, a1, -1156 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140803,7 +140600,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1146 + addiw a1, a1, -1140 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140814,7 +140611,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1130 + addiw a1, a1, -1124 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140825,7 +140622,7 @@ vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1114 + addiw a1, a1, -1108 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140836,7 +140633,7 @@ vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1098 + addiw a1, a1, -1092 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140847,7 +140644,7 @@ vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1082 + addiw a1, a1, -1076 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140858,7 +140655,7 @@ vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1074 + addiw a1, a1, -1068 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140869,7 +140666,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -458 + addiw a1, a1, -452 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140879,7 +140676,7 @@ vslideup.vi v16, v8, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -202 + addiw a1, a1, -124 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140889,7 +140686,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1026 + addiw a1, a1, -1020 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140898,7 +140695,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -194 + addiw a1, a1, -116 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140909,7 +140706,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1018 + addiw a1, a1, -1012 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140920,7 +140717,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1002 + addiw a1, a1, -996 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140931,7 +140728,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -474 + addiw a1, a1, -468 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140942,7 +140739,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1274 + addiw a1, a1, -1268 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140953,7 +140750,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1282 + addiw a1, a1, -1276 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140964,7 +140761,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1266 + addiw a1, a1, -1260 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140975,7 +140772,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1258 + addiw a1, a1, -1252 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140986,7 +140783,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1242 + addiw a1, a1, -1236 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -140997,7 +140794,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1226 + addiw a1, a1, -1220 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141008,7 +140805,7 @@ vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1210 + addiw a1, a1, -1204 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141019,7 +140816,7 @@ vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1186 + addiw a1, a1, -1180 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141030,7 +140827,7 @@ vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1170 + addiw a1, a1, -1164 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141041,7 +140838,7 @@ vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1154 + addiw a1, a1, -1148 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141052,7 +140849,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1138 + addiw a1, a1, -1132 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141062,7 +140859,7 @@ vslideup.vi v16, v8, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -194 + addiw a1, a1, -116 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141072,7 +140869,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1122 + addiw a1, a1, -1116 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141081,7 +140878,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -210 + addiw a1, a1, -4 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141092,7 +140889,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1106 + addiw a1, a1, -1100 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141103,7 +140900,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1090 + addiw a1, a1, -1084 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141114,7 +140911,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -466 + addiw a1, a1, -460 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141125,7 +140922,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1066 + addiw a1, a1, -1060 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141136,7 +140933,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1058 + addiw a1, a1, -1052 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141147,7 +140944,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1042 + addiw a1, a1, -1036 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141158,7 +140955,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -978 + addiw a1, a1, -972 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141169,7 +140966,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -450 + addiw a1, a1, -444 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141180,7 +140977,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1010 + addiw a1, a1, -1004 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141191,7 +140988,7 @@ vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1050 + addiw a1, a1, -1044 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141202,7 +140999,7 @@ vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1034 + addiw a1, a1, -1028 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141213,7 +141010,7 @@ vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -994 + addiw a1, a1, -988 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141224,7 +141021,7 @@ vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -986 + addiw a1, a1, -980 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141235,7 +141032,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -962 + addiw a1, a1, -956 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141245,7 +141042,7 @@ vslideup.vi v16, v8, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -210 + addiw a1, a1, -4 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141255,7 +141052,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -946 + addiw a1, a1, -940 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141264,7 +141061,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -106 + addiw a1, a1, -228 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141275,7 +141072,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -930 + addiw a1, a1, -924 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141286,7 +141083,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -914 + addiw a1, a1, -908 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141297,7 +141094,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -898 + addiw a1, a1, -892 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141308,7 +141105,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -882 + addiw a1, a1, -876 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141319,7 +141116,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -866 + addiw a1, a1, -860 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141330,7 +141127,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -850 + addiw a1, a1, -844 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141341,7 +141138,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -834 + addiw a1, a1, -828 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141352,7 +141149,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -434 + addiw a1, a1, -428 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141363,7 +141160,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -810 + addiw a1, a1, -804 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141374,7 +141171,7 @@ vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -778 + addiw a1, a1, -772 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141385,7 +141182,7 @@ vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -770 + addiw a1, a1, -764 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141396,7 +141193,7 @@ vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -754 + addiw a1, a1, -748 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141407,7 +141204,7 @@ vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -442 + addiw a1, a1, -436 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141418,7 +141215,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -970 + addiw a1, a1, -964 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141428,7 +141225,7 @@ vslideup.vi v16, v8, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -106 + addiw a1, a1, -228 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141438,7 +141235,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -954 + addiw a1, a1, -948 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141447,7 +141244,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -122 + addiw a1, a1, -196 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141458,7 +141255,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -938 + addiw a1, a1, -932 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141469,7 +141266,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -922 + addiw a1, a1, -916 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141480,7 +141277,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -906 + addiw a1, a1, -900 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141491,7 +141288,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -890 + addiw a1, a1, -884 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141502,7 +141299,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -874 + addiw a1, a1, -868 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141513,7 +141310,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -858 + addiw a1, a1, -852 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141524,7 +141321,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -842 + addiw a1, a1, -836 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141535,7 +141332,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -826 + addiw a1, a1, -820 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141546,7 +141343,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -818 + addiw a1, a1, -812 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141557,7 +141354,7 @@ vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -802 + addiw a1, a1, -796 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141568,7 +141365,7 @@ vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -794 + addiw a1, a1, -788 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141579,7 +141376,7 @@ vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -786 + addiw a1, a1, -780 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141590,7 +141387,7 @@ vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -426 + addiw a1, a1, -420 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141601,7 +141398,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -762 + addiw a1, a1, -756 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141611,7 +141408,7 @@ vslideup.vi v16, v8, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -122 + addiw a1, a1, -196 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141621,7 +141418,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -746 + addiw a1, a1, -740 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141630,7 +141427,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -114 + addiw a1, a1, -12 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141641,7 +141438,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -738 + addiw a1, a1, -732 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141651,7 +141448,7 @@ vslideup.vi v16, v8, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -114 + addiw a1, a1, -12 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141711,7 +141508,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -266 + addiw a1, a1, -260 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141720,7 +141517,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - li a1, 2022 + li a1, 2028 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141729,7 +141526,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - li a1, 2030 + li a1, 2036 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141738,7 +141535,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - li a1, 2038 + li a1, 2044 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141747,7 +141544,8 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - li a1, 2046 + lui a1, 1 + addiw a1, a1, -2044 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141757,7 +141555,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2042 + addiw a1, a1, -2036 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141767,7 +141565,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2034 + addiw a1, a1, -2028 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141777,7 +141575,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1978 + addiw a1, a1, -1972 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141787,7 +141585,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1962 + addiw a1, a1, -1956 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141797,7 +141595,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -466 + addiw a1, a1, -460 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141807,7 +141605,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -594 + addiw a1, a1, -588 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141817,7 +141615,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -586 + addiw a1, a1, -580 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141827,7 +141625,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -578 + addiw a1, a1, -572 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141837,7 +141635,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -570 + addiw a1, a1, -564 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141847,7 +141645,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1778 + addiw a1, a1, -1772 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141857,7 +141655,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -330 + addiw a1, a1, -324 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141867,7 +141665,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1986 + addiw a1, a1, -1980 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141877,7 +141675,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1954 + addiw a1, a1, -1948 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141887,7 +141685,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1938 + addiw a1, a1, -1932 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141897,7 +141695,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -482 + addiw a1, a1, -476 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141907,7 +141705,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1930 + addiw a1, a1, -1924 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141917,7 +141715,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1922 + addiw a1, a1, -1916 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141927,7 +141725,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1914 + addiw a1, a1, -1908 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141937,7 +141735,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1722 + addiw a1, a1, -1716 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141947,7 +141745,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1714 + addiw a1, a1, -1708 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141957,7 +141755,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1706 + addiw a1, a1, -1700 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141967,7 +141765,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1690 + addiw a1, a1, -1684 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141977,7 +141775,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1674 + addiw a1, a1, -1668 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141987,7 +141785,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1658 + addiw a1, a1, -1652 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -141997,7 +141795,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -450 + addiw a1, a1, -444 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142007,7 +141805,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1626 + addiw a1, a1, -1620 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142017,7 +141815,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -322 + addiw a1, a1, -316 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142027,7 +141825,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1906 + addiw a1, a1, -1900 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142037,7 +141835,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1898 + addiw a1, a1, -1892 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142047,7 +141845,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1890 + addiw a1, a1, -1884 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142057,7 +141855,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1882 + addiw a1, a1, -1876 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142067,7 +141865,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1874 + addiw a1, a1, -1868 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142077,7 +141875,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1866 + addiw a1, a1, -1860 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142087,7 +141885,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1858 + addiw a1, a1, -1852 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142097,7 +141895,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -434 + addiw a1, a1, -428 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142107,7 +141905,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1618 + addiw a1, a1, -1612 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142117,7 +141915,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1610 + addiw a1, a1, -1604 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142127,7 +141925,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1602 + addiw a1, a1, -1596 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142137,7 +141935,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1594 + addiw a1, a1, -1588 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142147,7 +141945,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1586 + addiw a1, a1, -1580 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142157,7 +141955,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1578 + addiw a1, a1, -1572 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142167,7 +141965,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1570 + addiw a1, a1, -1564 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142177,7 +141975,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -314 + addiw a1, a1, -308 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142187,7 +141985,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1834 + addiw a1, a1, -1828 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142197,7 +141995,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -474 + addiw a1, a1, -468 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142207,7 +142005,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1818 + addiw a1, a1, -1812 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142217,7 +142015,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1802 + addiw a1, a1, -1796 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142227,7 +142025,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1786 + addiw a1, a1, -1780 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142237,7 +142035,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1762 + addiw a1, a1, -1756 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142247,7 +142045,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1746 + addiw a1, a1, -1740 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142257,7 +142055,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1538 + addiw a1, a1, -1532 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142267,7 +142065,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1522 + addiw a1, a1, -1516 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142277,7 +142075,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1498 + addiw a1, a1, -1492 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142287,7 +142085,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1474 + addiw a1, a1, -1468 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142297,7 +142095,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -426 + addiw a1, a1, -420 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142307,7 +142105,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1466 + addiw a1, a1, -1460 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142317,7 +142115,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1458 + addiw a1, a1, -1452 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142327,7 +142125,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1450 + addiw a1, a1, -1444 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142337,7 +142135,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -306 + addiw a1, a1, -300 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142347,7 +142145,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1698 + addiw a1, a1, -1692 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142357,7 +142155,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1682 + addiw a1, a1, -1676 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142367,7 +142165,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1666 + addiw a1, a1, -1660 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142377,7 +142175,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1650 + addiw a1, a1, -1644 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142387,7 +142185,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1642 + addiw a1, a1, -1636 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142397,7 +142195,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -458 + addiw a1, a1, -452 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142407,7 +142205,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1634 + addiw a1, a1, -1628 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142417,7 +142215,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1410 + addiw a1, a1, -1404 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142427,7 +142225,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1394 + addiw a1, a1, -1388 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142437,7 +142235,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1378 + addiw a1, a1, -1372 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142447,7 +142245,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1362 + addiw a1, a1, -1356 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142457,7 +142255,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1354 + addiw a1, a1, -1348 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142467,7 +142265,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1346 + addiw a1, a1, -1340 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142477,7 +142275,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1338 + addiw a1, a1, -1332 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142487,7 +142285,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1330 + addiw a1, a1, -1324 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142497,7 +142295,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -258 + addiw a1, a1, -252 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142507,7 +142305,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2026 + addiw a1, a1, -2020 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142517,7 +142315,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2018 + addiw a1, a1, -2012 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142527,7 +142325,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2010 + addiw a1, a1, -2004 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142537,7 +142335,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2002 + addiw a1, a1, -1996 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142547,7 +142345,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1994 + addiw a1, a1, -1988 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142557,7 +142355,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1970 + addiw a1, a1, -1964 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142567,7 +142365,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1946 + addiw a1, a1, -1940 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142577,7 +142375,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1738 + addiw a1, a1, -1732 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142587,7 +142385,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1730 + addiw a1, a1, -1724 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142597,7 +142395,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -362 + addiw a1, a1, -356 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142607,7 +142405,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -562 + addiw a1, a1, -556 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142617,7 +142415,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -554 + addiw a1, a1, -548 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142627,7 +142425,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -546 + addiw a1, a1, -540 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142637,7 +142435,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -538 + addiw a1, a1, -532 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142647,7 +142445,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -530 + addiw a1, a1, -524 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142657,7 +142455,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -298 + addiw a1, a1, -292 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142667,7 +142465,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1562 + addiw a1, a1, -1556 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142677,7 +142475,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1554 + addiw a1, a1, -1548 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142687,7 +142485,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1546 + addiw a1, a1, -1540 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142697,7 +142495,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -442 + addiw a1, a1, -436 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142707,7 +142505,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1530 + addiw a1, a1, -1524 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142717,7 +142515,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1514 + addiw a1, a1, -1508 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142727,7 +142525,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1490 + addiw a1, a1, -1484 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142737,7 +142535,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1258 + addiw a1, a1, -1252 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142747,7 +142545,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1242 + addiw a1, a1, -1236 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142757,7 +142555,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1234 + addiw a1, a1, -1228 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142767,7 +142565,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1218 + addiw a1, a1, -1212 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142777,7 +142575,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1202 + addiw a1, a1, -1196 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142787,7 +142585,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1186 + addiw a1, a1, -1180 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142797,7 +142595,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -402 + addiw a1, a1, -396 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142807,7 +142605,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1178 + addiw a1, a1, -1172 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142817,7 +142615,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -290 + addiw a1, a1, -284 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142827,7 +142625,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1442 + addiw a1, a1, -1436 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142837,7 +142635,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1434 + addiw a1, a1, -1428 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142847,7 +142645,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1426 + addiw a1, a1, -1420 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142857,7 +142655,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1418 + addiw a1, a1, -1412 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142867,7 +142665,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1402 + addiw a1, a1, -1396 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142877,7 +142675,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1386 + addiw a1, a1, -1380 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142887,7 +142685,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1370 + addiw a1, a1, -1364 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142897,7 +142695,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -386 + addiw a1, a1, -380 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142907,7 +142705,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1170 + addiw a1, a1, -1164 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142917,7 +142715,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1162 + addiw a1, a1, -1156 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142927,7 +142725,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1154 + addiw a1, a1, -1148 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142937,7 +142735,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1146 + addiw a1, a1, -1140 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142947,7 +142745,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1138 + addiw a1, a1, -1132 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142957,7 +142755,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1130 + addiw a1, a1, -1124 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142967,7 +142765,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1122 + addiw a1, a1, -1116 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142977,7 +142775,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -282 + addiw a1, a1, -276 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142987,7 +142785,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1322 + addiw a1, a1, -1316 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -142997,7 +142795,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -418 + addiw a1, a1, -412 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143007,7 +142805,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1314 + addiw a1, a1, -1308 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143017,7 +142815,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1306 + addiw a1, a1, -1300 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143027,7 +142825,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1298 + addiw a1, a1, -1292 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143037,7 +142835,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1290 + addiw a1, a1, -1284 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143047,7 +142845,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1282 + addiw a1, a1, -1276 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143057,7 +142855,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1074 + addiw a1, a1, -1068 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143067,7 +142865,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1058 + addiw a1, a1, -1052 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143077,7 +142875,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1050 + addiw a1, a1, -1044 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143087,7 +142885,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1042 + addiw a1, a1, -1036 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143097,7 +142895,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -378 + addiw a1, a1, -372 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143107,7 +142905,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1034 + addiw a1, a1, -1028 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143117,7 +142915,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1026 + addiw a1, a1, -1020 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143127,7 +142925,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1010 + addiw a1, a1, -1004 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143137,7 +142935,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1274 + addiw a1, a1, -1268 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143147,7 +142945,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1266 + addiw a1, a1, -1260 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143157,7 +142955,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1250 + addiw a1, a1, -1244 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143167,7 +142965,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1226 + addiw a1, a1, -1220 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143177,7 +142975,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1210 + addiw a1, a1, -1204 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143187,7 +142985,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -410 + addiw a1, a1, -404 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143197,7 +142995,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1194 + addiw a1, a1, -1188 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143207,7 +143005,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -962 + addiw a1, a1, -956 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143217,7 +143015,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -946 + addiw a1, a1, -940 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143227,7 +143025,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -930 + addiw a1, a1, -924 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143237,7 +143035,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -922 + addiw a1, a1, -916 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143247,7 +143045,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -914 + addiw a1, a1, -908 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143257,7 +143055,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -906 + addiw a1, a1, -900 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143267,7 +143065,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -898 + addiw a1, a1, -892 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143277,7 +143075,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -890 + addiw a1, a1, -884 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143287,7 +143085,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -250 + addiw a1, a1, -244 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143297,7 +143095,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1850 + addiw a1, a1, -1844 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143307,7 +143105,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1842 + addiw a1, a1, -1836 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143317,7 +143115,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1826 + addiw a1, a1, -1820 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143327,7 +143125,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1810 + addiw a1, a1, -1804 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143337,7 +143135,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1794 + addiw a1, a1, -1788 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143347,7 +143145,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1770 + addiw a1, a1, -1764 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143357,7 +143155,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1754 + addiw a1, a1, -1748 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143367,7 +143165,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1506 + addiw a1, a1, -1500 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143377,7 +143175,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1482 + addiw a1, a1, -1476 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143387,7 +143185,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -354 + addiw a1, a1, -348 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143397,7 +143195,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -522 + addiw a1, a1, -516 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143407,7 +143205,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -514 + addiw a1, a1, -508 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143417,7 +143215,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -506 + addiw a1, a1, -500 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143427,7 +143225,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -498 + addiw a1, a1, -492 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143437,7 +143235,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -490 + addiw a1, a1, -484 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143447,7 +143245,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -274 + addiw a1, a1, -268 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143457,7 +143255,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1114 + addiw a1, a1, -1108 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143467,7 +143265,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1106 + addiw a1, a1, -1100 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143477,7 +143275,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1098 + addiw a1, a1, -1092 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143487,7 +143285,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -394 + addiw a1, a1, -388 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143497,7 +143295,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1090 + addiw a1, a1, -1084 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143507,7 +143305,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1082 + addiw a1, a1, -1076 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143517,7 +143315,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1066 + addiw a1, a1, -1060 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143527,7 +143325,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -810 + addiw a1, a1, -804 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143537,7 +143335,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -802 + addiw a1, a1, -796 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143547,7 +143345,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -794 + addiw a1, a1, -788 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143557,7 +143355,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -778 + addiw a1, a1, -772 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143567,7 +143365,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -762 + addiw a1, a1, -756 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143577,7 +143375,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -746 + addiw a1, a1, -740 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143587,7 +143385,7 @@ # implicit-def: $v0 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -370 + addiw a1, a1, -364 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143597,7 +143395,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -738 + addiw a1, a1, -732 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143607,7 +143405,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -978 + addiw a1, a1, -972 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143617,7 +143415,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1002 + addiw a1, a1, -996 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143627,7 +143425,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -994 + addiw a1, a1, -988 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143637,7 +143435,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -986 + addiw a1, a1, -980 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143647,7 +143445,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1018 + addiw a1, a1, -1012 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143656,7 +143454,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - li a1, 2014 + li a1, 2020 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143666,7 +143464,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -970 + addiw a1, a1, -964 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143676,7 +143474,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -954 + addiw a1, a1, -948 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143686,7 +143484,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -938 + addiw a1, a1, -932 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143696,7 +143494,7 @@ # implicit-def: $v0 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -658 + addiw a1, a1, -652 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143706,7 +143504,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -730 + addiw a1, a1, -724 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143716,7 +143514,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -722 + addiw a1, a1, -716 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143726,7 +143524,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -714 + addiw a1, a1, -708 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143736,7 +143534,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -706 + addiw a1, a1, -700 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143746,7 +143544,7 @@ # implicit-def: $v0 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -698 + addiw a1, a1, -692 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143756,7 +143554,7 @@ # implicit-def: $v0 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -690 + addiw a1, a1, -684 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143766,7 +143564,7 @@ # implicit-def: $v0 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -682 + addiw a1, a1, -676 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143776,7 +143574,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -882 + addiw a1, a1, -876 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143786,7 +143584,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -834 + addiw a1, a1, -828 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143796,7 +143594,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -874 + addiw a1, a1, -868 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143806,7 +143604,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -866 + addiw a1, a1, -860 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143816,7 +143614,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -858 + addiw a1, a1, -852 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143826,7 +143624,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -850 + addiw a1, a1, -844 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143836,7 +143634,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -842 + addiw a1, a1, -836 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143846,7 +143644,7 @@ # implicit-def: $v0 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -674 + addiw a1, a1, -668 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143856,7 +143654,7 @@ # implicit-def: $v0 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -666 + addiw a1, a1, -660 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143866,7 +143664,7 @@ # implicit-def: $v0 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -650 + addiw a1, a1, -644 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143876,7 +143674,7 @@ # implicit-def: $v0 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -642 + addiw a1, a1, -636 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143886,7 +143684,7 @@ # implicit-def: $v0 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -610 + addiw a1, a1, -604 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143896,7 +143694,7 @@ # implicit-def: $v0 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -634 + addiw a1, a1, -628 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143906,7 +143704,7 @@ # implicit-def: $v0 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -626 + addiw a1, a1, -620 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143916,7 +143714,7 @@ # implicit-def: $v0 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -618 + addiw a1, a1, -612 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143926,7 +143724,7 @@ # implicit-def: $v0 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -602 + addiw a1, a1, -596 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143936,7 +143734,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -338 + addiw a1, a1, -332 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143946,7 +143744,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -826 + addiw a1, a1, -820 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143956,7 +143754,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -818 + addiw a1, a1, -812 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143966,7 +143764,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -786 + addiw a1, a1, -780 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143976,7 +143774,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -770 + addiw a1, a1, -764 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143986,7 +143784,7 @@ # implicit-def: $v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -754 + addiw a1, a1, -748 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -143996,7 +143794,7 @@ # implicit-def: $v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -346 + addiw a1, a1, -340 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -144010,149 +143808,149 @@ addiw a0, a0, 1792 add a7, sp, a0 ld a6, 120(sp) # 8-byte Folded Reload - add t6, a7, a6 + add t0, a7, a6 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -90 + addiw a1, a1, -108 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t6) - ld t0, 112(sp) # 8-byte Folded Reload - add t6, a7, t0 + vse64.v v8, (t0) + ld t1, 112(sp) # 8-byte Folded Reload + add t0, a7, t1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -186 + addiw a1, a1, -172 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t6) - ld t1, 104(sp) # 8-byte Folded Reload - add t6, a7, t1 + vse64.v v8, (t0) + ld t2, 104(sp) # 8-byte Folded Reload + add t0, a7, t2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -234 + addiw a1, a1, -20 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t6) - ld t2, 96(sp) # 8-byte Folded Reload - add t6, a7, t2 + vse64.v v8, (t0) + ld t3, 96(sp) # 8-byte Folded Reload + add t0, a7, t3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -218 + addiw a1, a1, -204 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (t6) - ld t3, 88(sp) # 8-byte Folded Reload - add t6, a7, t3 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vse64.v v8, (t0) + ld t4, 88(sp) # 8-byte Folded Reload + add t0, a7, t4 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -18 + addiw a1, a1, -180 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s6 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vse64.v v0, (t0) + add t0, a7, s6 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -98 + addiw a1, a1, -188 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s7 + vse64.v v8, (t0) + add t0, a7, s7 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -202 + addiw a1, a1, -124 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s8 + vse64.v v8, (t0) + add t0, a7, s8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -194 + addiw a1, a1, -116 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s9 + vse64.v v8, (t0) + add t0, a7, s9 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -210 + addiw a1, a1, -4 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s10 + vse64.v v8, (t0) + add t0, a7, s10 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -106 + addiw a1, a1, -228 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s11 + vse64.v v8, (t0) + add t0, a7, s11 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -122 + addiw a1, a1, -196 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, ra + vse64.v v8, (t0) + add t0, a7, ra csrr a0, vlenb lui a1, 1 - addiw a1, a1, -114 + addiw a1, a1, -12 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (t6) - addi t6, a3, 20 - andi t6, t6, 511 - slli t6, t6, 3 - add t6, a7, t6 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vse64.v v8, (t0) + addi t0, a3, 20 + andi t0, t0, 511 + slli t0, t0, 3 + add t0, a7, t0 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -130 + addiw a1, a1, -28 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -144162,7 +143960,7 @@ vse64.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2 + addiw a1, a1, -36 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -144175,7 +143973,7 @@ vse64.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -138 + addiw a1, a1, -44 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -144188,7 +143986,7 @@ vse64.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -10 + addiw a1, a1, -60 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -144201,7 +143999,7 @@ vse64.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -34 + addiw a1, a1, 4 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -144214,7 +144012,7 @@ vse64.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -26 + addiw a1, a1, -52 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -144227,7 +144025,7 @@ vse64.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -42 + addiw a1, a1, -76 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -144240,7 +144038,7 @@ vse64.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -146 + addiw a1, a1, -68 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -144253,7 +144051,7 @@ vse64.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -66 + addiw a1, a1, -140 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -144266,7 +144064,7 @@ vse64.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -58 + addiw a1, a1, -132 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -144279,7 +144077,7 @@ vse64.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -50 + addiw a1, a1, -84 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -144292,7 +144090,7 @@ vse64.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -162 + addiw a1, a1, -148 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -144305,7 +144103,7 @@ vse64.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -170 + addiw a1, a1, -156 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -144318,7 +144116,7 @@ vse64.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -154 + addiw a1, a1, -92 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -144331,7 +144129,7 @@ vse64.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -242 + addiw a1, a1, -212 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -144344,7 +144142,7 @@ vse64.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -178 + addiw a1, a1, -100 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -144357,7 +144155,7 @@ vse64.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -226 + addiw a1, a1, -236 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -144368,7 +144166,7 @@ vse64.v v16, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -74 + addiw a1, a1, -164 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -144379,7 +144177,7 @@ vse64.v v24, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -82 + addiw a1, a1, -220 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -144388,7110 +144186,7127 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload ld a7, 152(sp) # 8-byte Folded Reload vse64.v v8, (a7) - fld ft10, 0(t6) + fld ft10, 0(t0) lui a0, 24 addiw a0, a0, 1792 add a7, sp, a0 ld a0, 144(sp) # 8-byte Folded Reload - add t6, a7, a0 - vse64.v v16, (t6) + add t0, a7, a0 + vse64.v v16, (t0) ld a2, 136(sp) # 8-byte Folded Reload - add t6, a7, a2 - vse64.v v24, (t6) + add t0, a7, a2 + vse64.v v24, (t0) ld a5, 128(sp) # 8-byte Folded Reload - add t6, a7, a5 - vse64.v v8, (t6) - add t6, a7, a6 + add t0, a7, a5 + vse64.v v8, (t0) + add t0, a7, a6 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -90 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -108 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, t0 + vse64.v v8, (t0) + add t0, a7, t1 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -186 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -172 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, t1 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a7, t2 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -234 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -20 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, t2 - vmv8r.v v24, v0 - vse64.v v0, (t6) - add t6, a7, t3 + vse64.v v16, (t0) + add t0, a7, t3 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -18 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -204 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a7, s6 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v24, (a1) # Unknown-size Folded Reload + vse64.v v24, (t0) + add t0, a7, t4 + vse64.v v0, (t0) + add t0, a7, s6 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -98 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -188 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a7, s7 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a7, s7 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -202 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -124 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a7, s8 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a7, s8 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -194 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -116 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a7, s9 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t0) + add t0, a7, s9 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -210 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -4 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a7, s10 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t0) + add t0, a7, s10 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -106 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -228 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a7, s11 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a7, s11 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -122 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -196 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a7, ra + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t0) + add t0, a7, ra csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -114 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -12 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (t6) - addi t6, a3, 19 - andi t6, t6, 511 - slli t6, t6, 3 - add t6, a7, t6 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t0) + addi t0, a3, 19 + andi t0, t0, 511 + slli t0, t0, 3 + add t0, a7, t0 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -130 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -28 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (a7) + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (a7) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -36 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v16, (a1) # Unknown-size Folded Reload lui a1, 24 addiw a1, a1, 1920 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -2 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -44 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v16, (a1) # Unknown-size Folded Reload lui a1, 25 addiw a1, a1, -2048 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -138 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -60 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v16, (a1) # Unknown-size Folded Reload lui a1, 25 addiw a1, a1, -1920 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -10 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, 4 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v16, (a1) # Unknown-size Folded Reload lui a1, 25 addiw a1, a1, -1792 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -34 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -52 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v16, (a1) # Unknown-size Folded Reload lui a1, 25 addiw a1, a1, -1664 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -26 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -76 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v16, (a1) # Unknown-size Folded Reload lui a1, 25 addiw a1, a1, -1536 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -42 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -68 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v16, (a1) # Unknown-size Folded Reload lui a1, 25 addiw a1, a1, -1408 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -146 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -140 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v16, (a1) # Unknown-size Folded Reload lui a1, 25 addiw a1, a1, -1280 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -66 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -132 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v16, (a1) # Unknown-size Folded Reload lui a1, 25 addiw a1, a1, -1152 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -58 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -84 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v16, (a1) # Unknown-size Folded Reload lui a1, 25 addiw a1, a1, -1024 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -50 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -148 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v16, (a1) # Unknown-size Folded Reload lui a1, 25 addiw a1, a1, -896 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -162 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -156 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v16, (a1) # Unknown-size Folded Reload lui a1, 25 addiw a1, a1, -768 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -170 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -92 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v16, (a1) # Unknown-size Folded Reload lui a1, 25 addiw a1, a1, -640 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -154 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -212 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v16, (a1) # Unknown-size Folded Reload lui a1, 25 addiw a1, a1, -512 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -242 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -100 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 25 addiw a1, a1, -384 add a7, sp, a1 - csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -178 - mul a1, a1, t4 - add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (a7) - fld ft11, 0(t6) + vse64.v v8, (a7) + fld ft11, 0(t0) lui a1, 23 addiw a1, a1, 1792 add a7, sp, a1 - add t6, a7, a0 + add t0, a7, a0 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -226 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -236 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a7, a2 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a7, a2 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -74 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -164 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a7, a5 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a7, a5 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -82 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -220 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a7, a6 - vse64.v v8, (t6) - add t6, a7, t0 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a7, a6 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -186 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -108 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, t1 - vse64.v v16, (t6) - add t6, a7, t2 - vse64.v v24, (t6) - add t6, a7, t3 + vse64.v v8, (t0) + add t0, a7, t1 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -18 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -172 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s6 + vse64.v v8, (t0) + add t0, a7, t2 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -98 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -20 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s7 + vse64.v v8, (t0) + add t0, a7, t3 + vse64.v v24, (t0) + add t0, a7, t4 + vse64.v v0, (t0) + add t0, a7, s6 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -202 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -188 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a7, s7 + csrr a1, vlenb + lui t5, 1 + addiw t5, t5, -124 + mul a1, a1, t5 + add a1, sp, a1 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a7, s8 + vse64.v v0, (t0) + add t0, a7, s8 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -194 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -116 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s9 + vse64.v v8, (t0) + add t0, a7, s9 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -210 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -4 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s10 + vse64.v v8, (t0) + add t0, a7, s10 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -106 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -228 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s11 + vse64.v v8, (t0) + add t0, a7, s11 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -122 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -196 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, ra + vse64.v v8, (t0) + add t0, a7, ra csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -114 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -12 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - addi t6, a3, 18 - andi t6, t6, 511 - slli t6, t6, 3 - add t6, a7, t6 + vse64.v v8, (t0) + addi t0, a3, 18 + andi t0, t0, 511 + slli t0, t0, 3 + add t0, a7, t0 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -130 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -28 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a7) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -36 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 23 addiw a1, a1, 1920 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -2 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -44 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 24 addiw a1, a1, -2048 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -138 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -60 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 24 addiw a1, a1, -1920 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -10 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, 4 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 24 addiw a1, a1, -1792 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -34 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -52 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 24 addiw a1, a1, -1664 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -26 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -76 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 24 addiw a1, a1, -1536 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -42 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -68 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 24 addiw a1, a1, -1408 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -146 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -140 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 24 addiw a1, a1, -1280 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -66 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -132 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 24 addiw a1, a1, -1152 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -58 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -84 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 24 addiw a1, a1, -1024 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -50 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -148 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 24 addiw a1, a1, -896 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -162 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -156 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 24 addiw a1, a1, -768 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -170 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -92 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 24 addiw a1, a1, -640 add a7, sp, a1 - csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -154 - mul a1, a1, t4 - add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a7) lui a1, 24 addiw a1, a1, -512 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -242 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -100 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 24 addiw a1, a1, -384 add a7, sp, a1 - csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -178 - mul a1, a1, t4 - add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (a7) - fld fs0, 0(t6) + vse64.v v8, (a7) + fld fs0, 0(t0) lui a1, 22 addiw a1, a1, 1792 add a7, sp, a1 - add t6, a7, a0 + add t0, a7, a0 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -226 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -236 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (t6) - add t6, a7, a2 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a7, a2 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -74 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -164 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (t6) - add t6, a7, a5 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t0) + add t0, a7, a5 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -82 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -220 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (t6) - add t6, a7, a6 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a7, a6 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -90 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -108 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (t6) - add t6, a7, t0 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a7, t1 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -186 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -172 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (t6) - add t6, a7, t1 + vse64.v v24, (t0) + add t0, a7, t2 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -234 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -20 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, t2 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a7, t3 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -218 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -204 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, t3 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a7, t4 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -18 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -180 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, s6 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a7, s6 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -98 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -188 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, s7 - vse64.v v0, (t6) - add t6, a7, s8 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a7, s7 + vse64.v v0, (t0) + add t0, a7, s8 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -194 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -116 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a7, s9 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a7, s9 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -210 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -4 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, s10 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a7, s10 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -106 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -228 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, s11 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v0, (a1) # Unknown-size Folded Reload + vse64.v v0, (t0) + add t0, a7, s11 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -122 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -196 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, ra + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a7, ra csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -114 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -12 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (t6) - addi t6, a3, 17 - andi t6, t6, 511 - slli t6, t6, 3 - add t6, a7, t6 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + addi t0, a3, 17 + andi t0, t0, 511 + slli t0, t0, 3 + add t0, a7, t0 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -130 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -28 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a7) + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (a7) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -36 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 22 addiw a1, a1, 1920 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -2 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -44 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 23 addiw a1, a1, -2048 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -138 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -60 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 23 addiw a1, a1, -1920 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -10 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, 4 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 23 addiw a1, a1, -1792 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -34 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -52 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 23 addiw a1, a1, -1664 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -26 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -76 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 23 addiw a1, a1, -1536 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -42 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -68 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 23 addiw a1, a1, -1408 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -146 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -140 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 23 addiw a1, a1, -1280 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -66 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -132 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 23 addiw a1, a1, -1152 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -58 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -84 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 23 addiw a1, a1, -1024 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -50 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -148 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 23 addiw a1, a1, -896 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -162 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -156 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 23 addiw a1, a1, -768 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -170 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -92 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 23 addiw a1, a1, -640 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -154 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -212 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 23 addiw a1, a1, -512 add a7, sp, a1 vse64.v v8, (a7) - lui a1, 23 - addiw a1, a1, -384 - add a7, sp, a1 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -178 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -100 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload + lui a1, 23 + addiw a1, a1, -384 + add a7, sp, a1 vse64.v v8, (a7) - fld fs1, 0(t6) + fld fs1, 0(t0) lui a1, 21 addiw a1, a1, 1792 add a7, sp, a1 - add t6, a7, a0 + add t0, a7, a0 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -226 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -236 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, a2 + vse64.v v8, (t0) + add t0, a7, a2 + vse64.v v16, (t0) + add t0, a7, a5 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -74 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -220 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, a5 + vse64.v v8, (t0) + add t0, a7, a6 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -82 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -108 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, a6 + vse64.v v8, (t0) + add t0, a7, t1 + vse64.v v24, (t0) + add t0, a7, t2 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -90 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -20 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, t0 - vse64.v v24, (t6) - add t6, a7, t1 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v24, (a1) # Unknown-size Folded Reload + vse64.v v24, (t0) + add t0, a7, t3 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -234 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -204 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, t2 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t0) + add t0, a7, t4 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -218 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -180 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (t6) - add t6, a7, t3 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a7, s6 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -18 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -188 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s6 + vse64.v v8, (t0) + add t0, a7, s7 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -98 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -124 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, s7 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a7, s8 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -202 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -116 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s8 - vse64.v v0, (t6) - add t6, a7, s9 + vse64.v v8, (t0) + add t0, a7, s9 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -210 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -4 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a7, s10 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a7, s10 + vse64.v v0, (t0) + add t0, a7, s11 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -106 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -196 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s11 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t0) + add t0, a7, ra csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -122 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -12 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, ra + vse64.v v8, (t0) + addi t0, a3, 16 + andi t0, t0, 511 + slli t0, t0, 3 + add t0, a7, t0 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -114 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -28 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - addi t6, a3, 16 - andi t6, t6, 511 - slli t6, t6, 3 - add t6, a7, t6 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v0, (a1) # Unknown-size Folded Reload + vse64.v v0, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -130 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -36 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 21 addiw a1, a1, 1920 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -2 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -44 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 22 addiw a1, a1, -2048 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -138 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -60 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 22 addiw a1, a1, -1920 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -10 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, 4 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 22 addiw a1, a1, -1792 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -34 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -52 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 22 addiw a1, a1, -1664 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -26 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -76 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 22 addiw a1, a1, -1536 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -42 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -68 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 22 addiw a1, a1, -1408 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -146 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -140 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 22 addiw a1, a1, -1280 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -66 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -132 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 22 addiw a1, a1, -1152 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -58 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -84 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 22 addiw a1, a1, -1024 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -50 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -148 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 22 addiw a1, a1, -896 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -162 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -156 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 22 addiw a1, a1, -768 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -170 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -92 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 22 addiw a1, a1, -640 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -154 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -212 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 22 addiw a1, a1, -512 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -242 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -100 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 22 addiw a1, a1, -384 add a7, sp, a1 - csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -178 - mul a1, a1, t4 - add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a7) - fld fs2, 0(t6) + fld fs2, 0(t0) lui a1, 20 addiw a1, a1, 1792 add a7, sp, a1 - add t6, a7, a0 + add t0, a7, a0 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -226 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -236 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, a2 + vse64.v v8, (t0) + add t0, a7, a2 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -74 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -164 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, a5 + vse64.v v8, (t0) + add t0, a7, a5 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -82 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -220 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, a6 + vse64.v v8, (t0) + add t0, a7, a6 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -90 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -108 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, t0 + vse64.v v8, (t0) + add t0, a7, t1 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -186 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -172 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, t1 + vse64.v v8, (t0) + add t0, a7, t2 + vse64.v v24, (t0) + add t0, a7, t3 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -234 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -204 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, t2 - vse64.v v24, (t6) - add t6, a7, t3 + vse64.v v8, (t0) + add t0, a7, t4 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -18 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -180 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s6 - vse64.v v16, (t6) - add t6, a7, s7 + vse64.v v8, (t0) + add t0, a7, s6 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -202 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -188 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s8 + vse64.v v8, (t0) + add t0, a7, s7 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -194 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -124 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s9 - vse64.v v0, (t6) - add t6, a7, s10 + vse64.v v8, (t0) + add t0, a7, s8 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -106 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -116 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (t6) - add t6, a7, s11 + vse64.v v24, (t0) + add t0, a7, s9 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -122 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -4 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, ra + vse64.v v8, (t0) + add t0, a7, s10 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -114 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -228 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (t6) - addi t6, a3, 15 - andi t6, t6, 511 - slli t6, t6, 3 - add t6, a7, t6 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a7, s11 + vse64.v v16, (t0) + add t0, a7, ra csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -130 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -12 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + addi t0, a3, 15 + andi t0, t0, 511 + slli t0, t0, 3 + add t0, a7, t0 + vse64.v v0, (a7) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -36 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 20 addiw a1, a1, 1920 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -2 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -44 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 21 addiw a1, a1, -2048 add a7, sp, a1 + vse64.v v0, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -138 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -60 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a7) lui a1, 21 addiw a1, a1, -1920 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -10 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, 4 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a7) lui a1, 21 addiw a1, a1, -1792 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -34 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -52 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a7) lui a1, 21 addiw a1, a1, -1664 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -26 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -76 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a7) lui a1, 21 addiw a1, a1, -1536 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -42 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -68 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a7) lui a1, 21 addiw a1, a1, -1408 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -146 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -140 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a7) lui a1, 21 addiw a1, a1, -1280 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -66 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -132 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a7) lui a1, 21 addiw a1, a1, -1152 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -58 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -84 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a7) lui a1, 21 addiw a1, a1, -1024 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -50 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -148 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a7) lui a1, 21 addiw a1, a1, -896 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -162 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -156 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a7) lui a1, 21 addiw a1, a1, -768 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -170 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -92 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a7) lui a1, 21 addiw a1, a1, -640 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -154 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -212 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a7) lui a1, 21 addiw a1, a1, -512 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -242 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -100 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a7) lui a1, 21 addiw a1, a1, -384 add a7, sp, a1 - csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -178 - mul a1, a1, t4 - add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload vse64.v v16, (a7) - fld fs3, 0(t6) + fld fs3, 0(t0) lui a1, 19 addiw a1, a1, 1792 add a7, sp, a1 - add t6, a7, a0 + add t0, a7, a0 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -226 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -236 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, a2 + vse64.v v16, (t0) + add t0, a7, a2 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -74 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -164 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, a5 + vse64.v v16, (t0) + add t0, a7, a5 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -82 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -220 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, a6 + vse64.v v16, (t0) + add t0, a7, a6 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -90 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -108 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, t0 + vse64.v v16, (t0) + add t0, a7, t1 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -186 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -172 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, t1 + vse64.v v16, (t0) + add t0, a7, t2 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -234 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -20 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, t2 + vse64.v v16, (t0) + add t0, a7, t3 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -218 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -204 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, t3 + vse64.v v16, (t0) + add t0, a7, t4 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -18 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -180 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, s6 + vse64.v v16, (t0) + add t0, a7, s6 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -98 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -188 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, s7 + vse64.v v16, (t0) + add t0, a7, s7 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -202 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -124 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, s8 + vse64.v v16, (t0) + add t0, a7, s8 + vse64.v v24, (t0) + add t0, a7, s9 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -194 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -4 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, s9 + vse64.v v16, (t0) + add t0, a7, s10 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -210 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -228 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, s10 - vse64.v v24, (t6) - add t6, a7, s11 + vse64.v v16, (t0) + add t0, a7, s11 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -122 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -196 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, ra - vse64.v v0, (t6) - addi t6, a3, 14 - andi t6, t6, 511 - slli t6, t6, 3 - add t6, a7, t6 - vse64.v v8, (a7) + vse64.v v16, (t0) + add t0, a7, ra + csrr a1, vlenb + lui t5, 1 + addiw t5, t5, -12 + mul a1, a1, t5 + add a1, sp, a1 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t0) + addi t0, a3, 14 + andi t0, t0, 511 + slli t0, t0, 3 + add t0, a7, t0 + csrr a1, vlenb + lui t5, 1 + addiw t5, t5, -28 + mul a1, a1, t5 + add a1, sp, a1 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (a7) lui a1, 19 addiw a1, a1, 1920 add a7, sp, a1 - csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -2 - mul a1, a1, t4 - add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a7) lui a1, 20 addiw a1, a1, -2048 add a7, sp, a1 + vse64.v v0, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -138 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -60 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a7) lui a1, 20 addiw a1, a1, -1920 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -10 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, 4 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 20 addiw a1, a1, -1792 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -34 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -52 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 20 addiw a1, a1, -1664 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -26 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -76 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (a7) lui a1, 20 addiw a1, a1, -1536 add a7, sp, a1 + vse64.v v24, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -42 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -68 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 20 addiw a1, a1, -1408 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -146 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -140 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 20 addiw a1, a1, -1280 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -66 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -132 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 20 addiw a1, a1, -1152 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -58 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -84 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 20 addiw a1, a1, -1024 add a7, sp, a1 + vse64.v v0, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -50 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -148 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 20 addiw a1, a1, -896 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -162 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -156 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 20 addiw a1, a1, -768 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -170 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -92 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 20 addiw a1, a1, -640 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -154 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -212 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 20 addiw a1, a1, -512 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -242 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -100 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 20 addiw a1, a1, -384 add a7, sp, a1 - csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -178 - mul a1, a1, t4 - add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a7) - fld fs4, 0(t6) + fld fs4, 0(t0) lui a1, 18 addiw a1, a1, 1792 add a7, sp, a1 - add t6, a7, a0 + add t0, a7, a0 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -226 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -236 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, a2 + vse64.v v8, (t0) + add t0, a7, a2 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -74 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -164 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, a5 + vse64.v v8, (t0) + add t0, a7, a5 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -82 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -220 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, a6 + vse64.v v8, (t0) + add t0, a7, a6 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -90 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -108 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, t0 + vse64.v v8, (t0) + add t0, a7, t1 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -186 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -172 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, t1 + vse64.v v8, (t0) + add t0, a7, t2 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -234 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -20 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, t2 + vse64.v v8, (t0) + add t0, a7, t3 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -218 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -204 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, t3 + vse64.v v8, (t0) + add t0, a7, t4 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -18 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -180 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s6 + vse64.v v8, (t0) + add t0, a7, s6 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -98 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -188 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s7 + vse64.v v8, (t0) + add t0, a7, s7 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -202 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -124 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s8 + vse64.v v8, (t0) + add t0, a7, s8 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -194 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -116 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s9 + vse64.v v8, (t0) + add t0, a7, s9 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -210 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -4 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s10 + vse64.v v8, (t0) + add t0, a7, s10 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -106 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -228 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s11 + vse64.v v8, (t0) + add t0, a7, s11 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -122 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -196 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, ra + vse64.v v8, (t0) + add t0, a7, ra csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -114 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -12 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - addi t6, a3, 13 - andi t6, t6, 511 - slli t6, t6, 3 - add t6, a7, t6 + vse64.v v8, (t0) + addi t0, a3, 13 + andi t0, t0, 511 + slli t0, t0, 3 + add t0, a7, t0 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -130 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -28 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a7) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -36 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 18 addiw a1, a1, 1920 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -2 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -44 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 19 addiw a1, a1, -2048 add a7, sp, a1 - vse64.v v16, (a7) + vse64.v v8, (a7) lui a1, 19 addiw a1, a1, -1920 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -10 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, 4 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 19 addiw a1, a1, -1792 add a7, sp, a1 - vse64.v v0, (a7) + vse64.v v8, (a7) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -52 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v16, (a1) # Unknown-size Folded Reload lui a1, 19 addiw a1, a1, -1664 add a7, sp, a1 - vse64.v v24, (a7) + vse64.v v16, (a7) lui a1, 19 addiw a1, a1, -1536 add a7, sp, a1 + vse64.v v24, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -42 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -68 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 19 addiw a1, a1, -1408 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -146 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -140 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v24, (a1) # Unknown-size Folded Reload lui a1, 19 addiw a1, a1, -1280 add a7, sp, a1 + vse64.v v24, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -66 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -132 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 19 addiw a1, a1, -1152 add a7, sp, a1 - csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -58 - mul a1, a1, t4 - add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a7) lui a1, 19 addiw a1, a1, -1024 add a7, sp, a1 + vse64.v v0, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -50 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -148 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 19 addiw a1, a1, -896 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -162 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -156 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 19 addiw a1, a1, -768 add a7, sp, a1 + vse64.v v0, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -170 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -92 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 19 addiw a1, a1, -640 add a7, sp, a1 + vse64.v v0, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -154 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -212 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 19 addiw a1, a1, -512 add a7, sp, a1 + vse64.v v0, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -242 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -100 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 19 addiw a1, a1, -384 add a7, sp, a1 - csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -178 - mul a1, a1, t4 - add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) - fld fs5, 0(t6) + vse64.v v0, (a7) + fld fs5, 0(t0) lui a1, 17 addiw a1, a1, 1792 add a7, sp, a1 - add t6, a7, a0 + add t0, a7, a0 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -226 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -236 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, a2 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v0, (a1) # Unknown-size Folded Reload + vse64.v v0, (t0) + add t0, a7, a2 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -74 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -164 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, a5 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v0, (a1) # Unknown-size Folded Reload + vse64.v v0, (t0) + add t0, a7, a5 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -82 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -220 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, a6 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v0, (a1) # Unknown-size Folded Reload + vse64.v v0, (t0) + add t0, a7, a6 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -90 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -108 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, t0 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v0, (a1) # Unknown-size Folded Reload + vse64.v v0, (t0) + add t0, a7, t1 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -186 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -172 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, t1 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v0, (a1) # Unknown-size Folded Reload + vse64.v v0, (t0) + add t0, a7, t2 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -234 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -20 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, t2 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v0, (a1) # Unknown-size Folded Reload + vse64.v v0, (t0) + add t0, a7, t3 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -218 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -204 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, t3 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v0, (a1) # Unknown-size Folded Reload + vse64.v v0, (t0) + add t0, a7, t4 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -18 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -180 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s6 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v0, (a1) # Unknown-size Folded Reload + vse64.v v0, (t0) + add t0, a7, s6 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -98 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -188 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s7 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v0, (a1) # Unknown-size Folded Reload + vse64.v v0, (t0) + add t0, a7, s7 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -202 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -124 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s8 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v0, (a1) # Unknown-size Folded Reload + vse64.v v0, (t0) + add t0, a7, s8 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -194 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -116 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s9 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v0, (a1) # Unknown-size Folded Reload + vse64.v v0, (t0) + add t0, a7, s9 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -210 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -4 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s10 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v0, (a1) # Unknown-size Folded Reload + vse64.v v0, (t0) + add t0, a7, s10 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -106 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -228 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s11 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v0, (a1) # Unknown-size Folded Reload + vse64.v v0, (t0) + add t0, a7, s11 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -122 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -196 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, ra + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v0, (a1) # Unknown-size Folded Reload + vse64.v v0, (t0) + add t0, a7, ra csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -114 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -12 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - addi t6, a3, 12 - andi t6, t6, 511 - slli t6, t6, 3 - add t6, a7, t6 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v0, (a1) # Unknown-size Folded Reload + vse64.v v0, (t0) + addi t0, a3, 12 + andi t0, t0, 511 + slli t0, t0, 3 + add t0, a7, t0 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -130 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -28 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v0, (a1) # Unknown-size Folded Reload + vse64.v v0, (a7) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -36 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 17 addiw a1, a1, 1920 add a7, sp, a1 + vse64.v v0, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -2 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -44 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 18 addiw a1, a1, -2048 add a7, sp, a1 + vse64.v v0, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -138 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -60 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 18 addiw a1, a1, -1920 add a7, sp, a1 + vse64.v v0, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -10 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, 4 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 18 addiw a1, a1, -1792 add a7, sp, a1 - csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -34 - mul a1, a1, t4 - add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) + vse64.v v0, (a7) lui a1, 18 addiw a1, a1, -1664 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -26 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -76 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v16, (a1) # Unknown-size Folded Reload lui a1, 18 addiw a1, a1, -1536 add a7, sp, a1 - vse64.v v24, (a7) + vse64.v v16, (a7) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -68 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 18 addiw a1, a1, -1408 add a7, sp, a1 - vse64.v v16, (a7) + vse64.v v0, (a7) lui a1, 18 addiw a1, a1, -1280 add a7, sp, a1 + vse64.v v24, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -66 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -132 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v16, (a1) # Unknown-size Folded Reload lui a1, 18 addiw a1, a1, -1152 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -58 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -84 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v24, (a1) # Unknown-size Folded Reload lui a1, 18 addiw a1, a1, -1024 add a7, sp, a1 - vse64.v v0, (a7) + vse64.v v24, (a7) lui a1, 18 addiw a1, a1, -896 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -162 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -156 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 18 addiw a1, a1, -768 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -170 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -92 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 18 addiw a1, a1, -640 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -154 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -212 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 18 addiw a1, a1, -512 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -242 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -100 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 18 addiw a1, a1, -384 add a7, sp, a1 - csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -178 - mul a1, a1, t4 - add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a7) - fld fs6, 0(t6) + fld fs6, 0(t0) lui a1, 16 addiw a1, a1, 1792 add a7, sp, a1 - add t6, a7, a0 + add t0, a7, a0 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -226 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -236 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, a2 + vse64.v v8, (t0) + add t0, a7, a2 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -74 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -164 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, a5 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v24, (a1) # Unknown-size Folded Reload + vse64.v v24, (t0) + add t0, a7, a5 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -82 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -220 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, a6 + vse64.v v8, (t0) + add t0, a7, a6 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -90 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -108 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, t0 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v24, (a1) # Unknown-size Folded Reload + vse64.v v24, (t0) + add t0, a7, t1 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -186 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -172 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, t1 + vse64.v v8, (t0) + add t0, a7, t2 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -234 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -20 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, t2 + vse64.v v8, (t0) + add t0, a7, t3 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -218 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -204 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, t3 + vse64.v v8, (t0) + add t0, a7, t4 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -18 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -180 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s6 + vse64.v v8, (t0) + add t0, a7, s6 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -98 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -188 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s7 + vse64.v v8, (t0) + add t0, a7, s7 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -202 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -124 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s8 + vse64.v v8, (t0) + add t0, a7, s8 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -194 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -116 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s9 + vse64.v v8, (t0) + add t0, a7, s9 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -210 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -4 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s10 + vse64.v v8, (t0) + add t0, a7, s10 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -106 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -228 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s11 + vse64.v v8, (t0) + add t0, a7, s11 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -122 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -196 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, ra + vse64.v v8, (t0) + add t0, a7, ra csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -114 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -12 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - addi t6, a3, 11 - andi t6, t6, 511 - slli t6, t6, 3 - add t6, a7, t6 + vse64.v v8, (t0) + addi t0, a3, 11 + andi t0, t0, 511 + slli t0, t0, 3 + add t0, a7, t0 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -130 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -28 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a7) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -36 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 16 addiw a1, a1, 1920 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -2 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -44 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 17 addiw a1, a1, -2048 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -138 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -60 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 17 addiw a1, a1, -1920 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -10 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, 4 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 17 addiw a1, a1, -1792 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -34 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -52 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 17 addiw a1, a1, -1664 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -26 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -76 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 17 addiw a1, a1, -1536 add a7, sp, a1 - csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -42 - mul a1, a1, t4 - add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a7) lui a1, 17 addiw a1, a1, -1408 add a7, sp, a1 - vse64.v v16, (a7) + vse64.v v0, (a7) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -140 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 17 addiw a1, a1, -1280 add a7, sp, a1 - csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -66 - mul a1, a1, t4 - add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a7) + vse64.v v8, (a7) lui a1, 17 addiw a1, a1, -1152 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -58 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -84 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v16, (a1) # Unknown-size Folded Reload lui a1, 17 addiw a1, a1, -1024 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -50 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -148 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 17 addiw a1, a1, -896 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -162 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -156 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 17 addiw a1, a1, -768 add a7, sp, a1 - vse64.v v24, (a7) + vse64.v v0, (a7) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -92 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 17 addiw a1, a1, -640 add a7, sp, a1 - vse64.v v0, (a7) + vse64.v v8, (a7) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -212 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v16, (a1) # Unknown-size Folded Reload lui a1, 17 addiw a1, a1, -512 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -242 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -100 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 17 addiw a1, a1, -384 add a7, sp, a1 - csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -178 - mul a1, a1, t4 - add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a7) - fld fs7, 0(t6) + fld fs7, 0(t0) lui a1, 15 addiw a1, a1, 1792 add a7, sp, a1 - add t6, a7, a0 + add t0, a7, a0 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -226 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -236 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a7, a2 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a7, a2 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -74 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -164 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, a5 + vse64.v v8, (t0) + add t0, a7, a5 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -82 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -220 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (t6) - add t6, a7, a6 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a7, a6 + vse64.v v24, (t0) + add t0, a7, t1 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -90 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -172 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a7, t0 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a7, t2 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -186 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -20 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a7, t1 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a7, t3 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -234 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -204 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, t2 + vse64.v v8, (t0) + add t0, a7, t4 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -218 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -180 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, t3 + vse64.v v8, (t0) + add t0, a7, s6 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -18 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -188 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s6 + vse64.v v8, (t0) + add t0, a7, s7 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -98 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -124 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s7 + vse64.v v8, (t0) + add t0, a7, s8 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -202 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -116 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s8 + vse64.v v8, (t0) + add t0, a7, s9 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -194 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -4 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s9 + vse64.v v8, (t0) + add t0, a7, s10 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -210 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -228 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s10 + vse64.v v8, (t0) + add t0, a7, s11 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -106 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -196 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (t6) - add t6, a7, s11 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a7, ra csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -122 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -12 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, ra + vse64.v v8, (t0) + addi t0, a3, 10 + andi t0, t0, 511 + slli t0, t0, 3 + add t0, a7, t0 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -114 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -28 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - addi t6, a3, 10 - andi t6, t6, 511 - slli t6, t6, 3 - add t6, a7, t6 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -130 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -36 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 15 addiw a1, a1, 1920 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -2 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -44 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) li a1, 31 slli a1, a1, 11 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -138 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -60 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 16 addiw a1, a1, -1920 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -10 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, 4 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 16 addiw a1, a1, -1792 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -34 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -52 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 16 addiw a1, a1, -1664 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -26 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -76 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 16 addiw a1, a1, -1536 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -42 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -68 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 16 addiw a1, a1, -1408 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -146 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -140 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 16 addiw a1, a1, -1280 add a7, sp, a1 - vse64.v v16, (a7) + vse64.v v8, (a7) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -132 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 16 addiw a1, a1, -1152 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -58 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -84 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 16 addiw a1, a1, -1024 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -50 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -148 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 16 addiw a1, a1, -896 add a7, sp, a1 - csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -162 - mul a1, a1, t4 - add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a7) lui a1, 16 addiw a1, a1, -768 add a7, sp, a1 + vse64.v v0, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -170 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -92 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 16 addiw a1, a1, -640 add a7, sp, a1 - csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -154 - mul a1, a1, t4 - add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a7) + vse64.v v8, (a7) lui a1, 16 addiw a1, a1, -512 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -242 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -100 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 16 addiw a1, a1, -384 add a7, sp, a1 - csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -178 - mul a1, a1, t4 - add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a7) - fld fs8, 0(t6) + vse64.v v8, (a7) + fld fs8, 0(t0) lui a1, 14 addiw a1, a1, 1792 add a7, sp, a1 - add t6, a7, a0 + add t0, a7, a0 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -226 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -236 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, a2 + vse64.v v16, (t0) + add t0, a7, a2 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -74 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -164 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, a5 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v24, (a1) # Unknown-size Folded Reload + vse64.v v24, (t0) + add t0, a7, a5 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -82 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -220 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, a6 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v24, (a1) # Unknown-size Folded Reload + vse64.v v24, (t0) + add t0, a7, a6 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -90 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -108 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, t0 - vse64.v v0, (t6) - add t6, a7, t1 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a7, t1 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -234 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -172 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, t2 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a7, t2 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -218 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -20 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (t6) - add t6, a7, t3 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a7, t3 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -18 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -204 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (t6) - add t6, a7, s6 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a7, t4 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -98 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -180 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (t6) - add t6, a7, s7 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a7, s6 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -202 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -188 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (t6) - add t6, a7, s8 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v0, (a1) # Unknown-size Folded Reload + vse64.v v0, (t0) + add t0, a7, s7 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -194 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -124 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (t6) - add t6, a7, s9 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a7, s8 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -210 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -116 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (t6) - add t6, a7, s10 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a7, s9 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -106 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -4 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (t6) - add t6, a7, s11 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a7, s10 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -122 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -228 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (t6) - add t6, a7, ra + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a7, s11 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -114 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -196 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (t6) - addi t6, a3, 9 - andi t6, t6, 511 - slli t6, t6, 3 - add t6, a7, t6 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a7, ra csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -130 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -12 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (a7) + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t0) + addi t0, a3, 9 + andi t0, t0, 511 + slli t0, t0, 3 + add t0, a7, t0 + csrr a1, vlenb + lui t5, 1 + addiw t5, t5, -28 + mul a1, a1, t5 + add a1, sp, a1 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (a7) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -36 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 14 addiw a1, a1, 1920 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -2 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -44 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload li a1, 29 slli a1, a1, 11 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -138 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -60 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 15 addiw a1, a1, -1920 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -10 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, 4 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 15 addiw a1, a1, -1792 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -34 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -52 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 15 addiw a1, a1, -1664 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -26 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -76 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 15 addiw a1, a1, -1536 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -42 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -68 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 15 addiw a1, a1, -1408 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -146 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -140 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 15 addiw a1, a1, -1280 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -66 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -132 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 15 addiw a1, a1, -1152 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -58 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -84 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 15 addiw a1, a1, -1024 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -50 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -148 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 15 addiw a1, a1, -896 add a7, sp, a1 vse64.v v8, (a7) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -156 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 15 addiw a1, a1, -768 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -170 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -92 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 15 addiw a1, a1, -640 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -154 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -212 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 15 addiw a1, a1, -512 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -242 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -100 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 15 addiw a1, a1, -384 add a7, sp, a1 - csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -178 - mul a1, a1, t4 - add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a7) - fld fs9, 0(t6) + fld fs9, 0(t0) lui a1, 13 addiw a1, a1, 1792 add a7, sp, a1 - add t6, a7, a0 - csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -226 - mul a1, a1, t4 - add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a7, a2 + add t0, a7, a0 + vse64.v v16, (t0) + add t0, a7, a2 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -74 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -164 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, a5 + vse64.v v8, (t0) + add t0, a7, a5 + vse64.v v24, (t0) + add t0, a7, a6 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -82 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -108 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, a6 + vse64.v v8, (t0) + add t0, a7, t1 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -90 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -172 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, t0 + vse64.v v8, (t0) + add t0, a7, t2 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -186 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -20 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, t1 - vse64.v v16, (t6) - add t6, a7, t2 + vse64.v v8, (t0) + add t0, a7, t3 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -218 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -204 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, t3 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t0) + add t0, a7, t4 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -18 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -180 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s6 + vse64.v v8, (t0) + add t0, a7, s6 + vse64.v v0, (t0) + add t0, a7, s7 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -98 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -124 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s7 + vse64.v v8, (t0) + add t0, a7, s8 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -202 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -116 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s8 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v24, (a1) # Unknown-size Folded Reload + vse64.v v24, (t0) + add t0, a7, s9 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -194 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -4 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s9 + vse64.v v8, (t0) + add t0, a7, s10 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -210 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -228 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s10 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 + vl8r.v v24, (a1) # Unknown-size Folded Reload + vse64.v v24, (t0) + add t0, a7, s11 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -106 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -196 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, s11 + vse64.v v8, (t0) + add t0, a7, ra csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -122 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -12 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a7, ra + vse64.v v8, (t0) + addi t0, a3, 8 + andi t0, t0, 511 + slli t0, t0, 3 + add t0, a7, t0 csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -114 - mul a1, a1, t4 + lui t5, 1 + addiw t5, t5, -28 + mul a1, a1, t5 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui t5, 28 + addiw t5, t5, -960 + add a1, a1, t5 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (t6) - addi t6, a3, 8 - andi t6, t6, 511 - slli t6, t6, 3 - add t6, a7, t6 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -130 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -36 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 13 addiw a1, a1, 1920 add a7, sp, a1 + vse64.v v0, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -2 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -44 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v0, (a1) # Unknown-size Folded Reload li a1, 27 slli a1, a1, 11 add a7, sp, a1 + vse64.v v0, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -138 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -60 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 14 addiw a1, a1, -1920 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -10 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, 4 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 14 addiw a1, a1, -1792 add a7, sp, a1 + vse64.v v0, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -34 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -52 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 14 addiw a1, a1, -1664 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -26 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -76 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 14 addiw a1, a1, -1536 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -42 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -68 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 14 addiw a1, a1, -1408 add a7, sp, a1 + vse64.v v0, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -146 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -140 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 14 addiw a1, a1, -1280 add a7, sp, a1 + vse64.v v0, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -66 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -132 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 14 addiw a1, a1, -1152 add a7, sp, a1 + vse64.v v0, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -58 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -84 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 14 addiw a1, a1, -1024 add a7, sp, a1 + vse64.v v0, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -50 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -148 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 14 addiw a1, a1, -896 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -162 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -156 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 14 addiw a1, a1, -768 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -170 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -92 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 14 addiw a1, a1, -640 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -154 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -212 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 14 addiw a1, a1, -512 add a7, sp, a1 - vse64.v v24, (a7) - lui a1, 14 - addiw a1, a1, -384 - add a7, sp, a1 + vse64.v v0, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -178 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -100 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload + lui a1, 14 + addiw a1, a1, -384 + add a7, sp, a1 vse64.v v8, (a7) - fld fs10, 0(t6) + fld fs10, 0(t0) lui a1, 12 addiw a1, a1, 1792 add a1, sp, a1 - add t6, a1, a0 - vse64.v v0, (t6) - add t6, a1, a2 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -74 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, a5 + add t0, a1, a0 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -82 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -236 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, a6 + vse64.v v8, (t0) + add t0, a1, a2 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -90 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -164 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, t0 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 + vl8r.v v0, (a7) # Unknown-size Folded Reload + vse64.v v0, (t0) + add t0, a1, a5 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -186 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -220 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, t1 + vse64.v v8, (t0) + add t0, a1, a6 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -234 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -108 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, t2 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 + vl8r.v v0, (a7) # Unknown-size Folded Reload + vse64.v v0, (t0) + add t0, a1, t1 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -218 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -172 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, t3 + vse64.v v8, (t0) + add t0, a1, t2 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -18 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -20 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, s6 + vse64.v v8, (t0) + add t0, a1, t3 + vse64.v v16, (t0) + add t0, a1, t4 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -98 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -180 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, s7 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 + vl8r.v v16, (a7) # Unknown-size Folded Reload + vse64.v v16, (t0) + add t0, a1, s6 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -202 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -188 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a1, s8 + vse64.v v0, (t0) + add t0, a1, s7 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -194 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -124 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v24, (a7) # Unknown-size Folded Reload - vse64.v v24, (t6) - add t6, a1, s9 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 + vl8r.v v8, (a7) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a1, s8 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -210 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -116 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, s10 + vse64.v v8, (t0) + add t0, a1, s9 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -106 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -4 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, s11 + vse64.v v8, (t0) + add t0, a1, s10 + vse64.v v24, (t0) + add t0, a1, s11 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -122 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -196 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, ra + vse64.v v8, (t0) + add t0, a1, ra csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -114 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -12 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - addi t6, a3, 7 - andi t6, t6, 511 - slli t6, t6, 3 - add t6, a1, t6 + vse64.v v8, (t0) + addi t0, a3, 7 + andi t0, t0, 511 + slli t0, t0, 3 + add t0, a1, t0 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -130 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -28 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -36 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v16, (a1) # Unknown-size Folded Reload lui a1, 12 addiw a1, a1, 1920 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -2 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -44 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v16, (a1) # Unknown-size Folded Reload li a1, 25 slli a1, a1, 11 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -138 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -60 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 13 addiw a1, a1, -1920 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -10 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, 4 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v16, (a1) # Unknown-size Folded Reload lui a1, 13 addiw a1, a1, -1792 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -34 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -52 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 13 addiw a1, a1, -1664 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -26 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -76 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 13 addiw a1, a1, -1536 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -42 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -68 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 13 addiw a1, a1, -1408 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -146 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -140 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 13 addiw a1, a1, -1280 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -66 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -132 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 13 addiw a1, a1, -1152 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -58 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -84 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v16, (a1) # Unknown-size Folded Reload lui a1, 13 addiw a1, a1, -1024 add a7, sp, a1 + vse64.v v16, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -50 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -148 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 13 addiw a1, a1, -896 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -162 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -156 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 13 addiw a1, a1, -768 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -170 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -92 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 13 addiw a1, a1, -640 add a7, sp, a1 - vse64.v v16, (a7) + vse64.v v8, (a7) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -212 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 13 addiw a1, a1, -512 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -242 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -100 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a7) + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 13 addiw a1, a1, -384 add a7, sp, a1 - csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -178 - mul a1, a1, t4 - add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a7) - fld fs11, 0(t6) + fld fs11, 0(t0) lui a1, 11 addiw a1, a1, 1792 add a1, sp, a1 - add t6, a1, a0 + add t0, a1, a0 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -226 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -236 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, a2 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 + vl8r.v v24, (a7) # Unknown-size Folded Reload + vse64.v v24, (t0) + add t0, a1, a2 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -74 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -164 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, a5 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 + vl8r.v v16, (a7) # Unknown-size Folded Reload + vse64.v v16, (t0) + add t0, a1, a5 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -82 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -220 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 + vl8r.v v16, (a7) # Unknown-size Folded Reload + vse64.v v16, (t0) + add t0, a1, a6 + csrr a7, vlenb + lui t5, 1 + addiw t5, t5, -108 + mul a7, a7, t5 + add a7, sp, a7 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, a6 + vse64.v v8, (t0) + add t0, a1, t1 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -90 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -172 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, t0 + vse64.v v8, (t0) + add t0, a1, t2 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -186 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -20 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, t1 + vse64.v v8, (t0) + add t0, a1, t3 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -234 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -204 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, t2 + vse64.v v8, (t0) + add t0, a1, t4 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -218 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -180 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, t3 + vse64.v v8, (t0) + add t0, a1, s6 + vse64.v v0, (t0) + add t0, a1, s7 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -18 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -124 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, s6 + vse64.v v8, (t0) + add t0, a1, s8 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -98 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -116 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, s7 - vse64.v v0, (t6) - add t6, a1, s8 - vse64.v v24, (t6) - add t6, a1, s9 + vse64.v v8, (t0) + add t0, a1, s9 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -210 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -4 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a1, s10 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 + vl8r.v v8, (a7) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a1, s10 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -106 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -228 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, s11 + vse64.v v8, (t0) + add t0, a1, s11 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -122 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -196 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, ra + vse64.v v8, (t0) + add t0, a1, ra csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -114 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -12 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - addi t6, a3, 6 - andi t6, t6, 511 - slli t6, t6, 3 - add t6, a1, t6 + vse64.v v8, (t0) + addi t0, a3, 6 + andi t0, t0, 511 + slli t0, t0, 3 + add t0, a1, t0 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -130 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -28 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -36 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 11 addiw a1, a1, 1920 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -2 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -44 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) li a1, 23 slli a1, a1, 11 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -138 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -60 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 12 addiw a1, a1, -1920 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -10 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, 4 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 12 addiw a1, a1, -1792 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -34 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -52 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 12 addiw a1, a1, -1664 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -26 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -76 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 12 addiw a1, a1, -1536 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -42 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -68 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 12 addiw a1, a1, -1408 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -146 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -140 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 12 addiw a1, a1, -1280 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -66 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -132 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 12 addiw a1, a1, -1152 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -58 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -84 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 12 addiw a1, a1, -1024 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -50 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -148 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 12 addiw a1, a1, -896 add a7, sp, a1 + vse64.v v8, (a7) csrr a1, vlenb - lui t4, 1 - addiw t4, t4, -162 - mul a1, a1, t4 + lui a7, 1 + addiw a7, a7, -156 + mul a1, a1, a7 add a1, sp, a1 - lui t4, 28 - addiw t4, t4, -960 - add a1, a1, t4 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a1, 12 addiw a1, a1, -768 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -170 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -92 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 12 addiw a1, a1, -640 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -154 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -212 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 12 addiw a1, a1, -512 add a1, sp, a1 - vse64.v v16, (a1) + vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -100 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 12 addiw a1, a1, -384 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -178 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v16, (a7) # Unknown-size Folded Reload - vse64.v v16, (a1) - fld fa5, 0(t6) + vse64.v v8, (a1) + fld fa5, 0(t0) lui a1, 10 addiw a1, a1, 1792 add a1, sp, a1 - add t6, a1, a0 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -226 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, a2 + add t0, a1, a0 + vse64.v v24, (t0) + add t0, a1, a2 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -74 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -164 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, a5 + vse64.v v8, (t0) + add t0, a1, a5 + vse64.v v16, (t0) + add t0, a1, a6 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -82 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -108 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, a6 + vse64.v v8, (t0) + add t0, a1, t1 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -90 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -172 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, t0 + vse64.v v8, (t0) + add t0, a1, t2 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -186 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -20 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, t1 + vse64.v v8, (t0) + add t0, a1, t3 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -234 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -204 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v24, (a7) # Unknown-size Folded Reload - vse64.v v24, (t6) - add t6, a1, t2 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 + vl8r.v v0, (a7) # Unknown-size Folded Reload + vse64.v v0, (t0) + add t0, a1, t4 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -218 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -180 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, t3 + vse64.v v8, (t0) + add t0, a1, s6 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -18 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -188 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, s6 + vse64.v v8, (t0) + add t0, a1, s7 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -98 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -124 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, s7 + vse64.v v8, (t0) + add t0, a1, s8 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -202 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -116 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, s8 + vse64.v v8, (t0) + add t0, a1, s9 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -194 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -4 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, s9 - vse64.v v0, (t6) - add t6, a1, s10 + vse64.v v8, (t0) + add t0, a1, s10 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -106 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -228 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a1, s11 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 + vl8r.v v16, (a7) # Unknown-size Folded Reload + vse64.v v16, (t0) + add t0, a1, s11 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -122 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -196 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a1, ra + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 + vl8r.v v8, (a7) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a1, ra csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -114 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -12 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - addi t6, a3, 5 - andi t6, t6, 511 - slli t6, t6, 3 - add t6, a1, t6 + vse64.v v8, (t0) + addi t0, a3, 5 + andi t0, t0, 511 + slli t0, t0, 3 + add t0, a1, t0 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -130 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -28 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -36 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 10 addiw a1, a1, 1920 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -2 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -44 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload li a1, 21 slli a1, a1, 11 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -138 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -60 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 11 addiw a1, a1, -1920 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -10 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, 4 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 11 addiw a1, a1, -1792 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -34 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -52 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 11 addiw a1, a1, -1664 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -26 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -76 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 11 addiw a1, a1, -1536 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -42 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -68 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v24, (a1) # Unknown-size Folded Reload lui a1, 11 addiw a1, a1, -1408 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -146 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (a1) + vse64.v v24, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -140 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v24, (a1) # Unknown-size Folded Reload lui a1, 11 addiw a1, a1, -1280 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -66 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (a1) + vse64.v v24, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -132 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v24, (a1) # Unknown-size Folded Reload lui a1, 11 addiw a1, a1, -1152 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -58 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (a1) + vse64.v v24, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -84 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v24, (a1) # Unknown-size Folded Reload lui a1, 11 addiw a1, a1, -1024 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -50 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (a1) + vse64.v v24, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -148 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v24, (a1) # Unknown-size Folded Reload lui a1, 11 addiw a1, a1, -896 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -162 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (a1) + vse64.v v24, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -156 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v24, (a1) # Unknown-size Folded Reload lui a1, 11 addiw a1, a1, -768 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -170 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (a1) + vse64.v v24, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -92 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v24, (a1) # Unknown-size Folded Reload lui a1, 11 addiw a1, a1, -640 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -154 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (a1) + vse64.v v24, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -212 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v24, (a1) # Unknown-size Folded Reload lui a1, 11 addiw a1, a1, -512 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -242 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (a1) + vse64.v v24, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -100 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v24, (a1) # Unknown-size Folded Reload lui a1, 11 addiw a1, a1, -384 add a1, sp, a1 - vse64.v v16, (a1) - fld fa4, 0(t6) + vse64.v v24, (a1) + fld fa4, 0(t0) lui a1, 9 addiw a1, a1, 1792 add a1, sp, a1 - add t6, a1, a0 + add t0, a1, a0 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -226 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -236 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, a2 + vse64.v v8, (t0) + add t0, a1, a2 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -74 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -164 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, a5 + vse64.v v8, (t0) + add t0, a1, a5 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -82 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -220 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, a6 + vse64.v v8, (t0) + add t0, a1, a6 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -90 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -108 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, t0 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 + vl8r.v v24, (a7) # Unknown-size Folded Reload + vse64.v v24, (t0) + add t0, a1, t1 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -186 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -172 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, t1 - vse64.v v24, (t6) - add t6, a1, t2 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 + vl8r.v v24, (a7) # Unknown-size Folded Reload + vse64.v v24, (t0) + add t0, a1, t2 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -218 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -20 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, t3 + vse64.v v8, (t0) + add t0, a1, t3 + vse64.v v0, (t0) + add t0, a1, t4 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -18 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -180 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, s6 + vse64.v v8, (t0) + add t0, a1, s6 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -98 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -188 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, s7 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 + vl8r.v v0, (a7) # Unknown-size Folded Reload + vse64.v v0, (t0) + add t0, a1, s7 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -202 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -124 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, s8 + vse64.v v8, (t0) + add t0, a1, s8 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -194 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -116 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, s9 + vse64.v v8, (t0) + add t0, a1, s9 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -210 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -4 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, s10 + vse64.v v8, (t0) + add t0, a1, s10 + vse64.v v16, (t0) + add t0, a1, s11 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -106 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -196 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, s11 - vse64.v v0, (t6) - add t6, a1, ra + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 + vl8r.v v0, (a7) # Unknown-size Folded Reload + vse64.v v0, (t0) + add t0, a1, ra csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -114 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -12 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - addi t6, a3, 4 - andi t6, t6, 511 - slli t6, t6, 3 - add t6, a1, t6 + vse64.v v8, (t0) + addi t0, a3, 4 + andi t0, t0, 511 + slli t0, t0, 3 + add t0, a1, t0 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -130 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -28 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (a1) + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 + vl8r.v v16, (a7) # Unknown-size Folded Reload + vse64.v v16, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -36 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 9 addiw a1, a1, 1920 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -2 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v16, (a7) # Unknown-size Folded Reload - vse64.v v16, (a1) + vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -44 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload li a1, 19 slli a1, a1, 11 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -138 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v16, (a7) # Unknown-size Folded Reload - vse64.v v16, (a1) + vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -60 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 10 addiw a1, a1, -1920 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -10 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (a1) + vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, 4 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v16, (a1) # Unknown-size Folded Reload lui a1, 10 addiw a1, a1, -1792 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -34 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (a1) + vse64.v v16, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -52 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 10 addiw a1, a1, -1664 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -26 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (a1) + vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -76 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 10 addiw a1, a1, -1536 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -42 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (a1) + vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -68 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 10 addiw a1, a1, -1408 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -146 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (a1) + vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -140 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 10 addiw a1, a1, -1280 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -66 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (a1) + vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -132 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 10 addiw a1, a1, -1152 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -58 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v24, (a7) # Unknown-size Folded Reload - vse64.v v24, (a1) + vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -84 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v16, (a1) # Unknown-size Folded Reload lui a1, 10 addiw a1, a1, -1024 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -50 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (a1) + vse64.v v16, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -148 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 10 addiw a1, a1, -896 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -162 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (a1) + vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -156 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 10 addiw a1, a1, -768 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -170 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (a1) + vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -92 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 10 addiw a1, a1, -640 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -154 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (a1) + vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -212 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 10 addiw a1, a1, -512 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -242 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (a1) + vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -100 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 10 addiw a1, a1, -384 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -178 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (a1) - fld fa3, 0(t6) + vse64.v v8, (a1) + fld fa3, 0(t0) lui a1, 8 addiw a1, a1, 1792 add a1, sp, a1 - add t6, a1, a0 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -226 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a1, a2 + add t0, a1, a0 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -74 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -236 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a1, a5 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 + vl8r.v v8, (a7) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a1, a2 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -82 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -164 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a1, a6 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 + vl8r.v v8, (a7) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a1, a5 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -90 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -220 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a1, t0 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 + vl8r.v v8, (a7) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a1, a6 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -186 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -108 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a1, t1 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 + vl8r.v v8, (a7) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a1, t1 + vse64.v v24, (t0) + add t0, a1, t2 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -234 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -20 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a1, t2 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 + vl8r.v v8, (a7) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a1, t3 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -218 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -204 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a1, t3 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 + vl8r.v v8, (a7) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a1, t4 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -18 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -180 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a1, s6 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 + vl8r.v v8, (a7) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a1, s6 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -98 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -188 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a1, s7 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 + vl8r.v v8, (a7) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a1, s7 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -202 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -124 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a1, s8 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 + vl8r.v v8, (a7) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a1, s8 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -194 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -116 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a1, s9 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 + vl8r.v v8, (a7) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a1, s9 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -210 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -4 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a1, s10 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 + vl8r.v v8, (a7) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a1, s10 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -106 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -228 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a1, s11 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 + vl8r.v v8, (a7) # Unknown-size Folded Reload + vse64.v v8, (t0) + add t0, a1, s11 + vse64.v v0, (t0) + add t0, a1, ra csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -122 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -12 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a1, ra + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 + vl8r.v v8, (a7) # Unknown-size Folded Reload + vse64.v v8, (t0) + addi t0, a3, 3 + andi t0, t0, 511 + slli t0, t0, 3 + add t0, a1, t0 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -114 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -28 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (t6) - addi t6, a3, 3 - andi t6, t6, 511 - slli t6, t6, 3 - add t6, a1, t6 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 + vl8r.v v8, (a7) # Unknown-size Folded Reload vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -36 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 8 addiw a1, a1, 1920 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -2 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -44 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload li a1, 17 slli a1, a1, 11 add a1, sp, a1 - vse64.v v16, (a1) + vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -60 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 9 addiw a1, a1, -1920 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -10 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, 4 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v16, (a1) # Unknown-size Folded Reload lui a1, 9 addiw a1, a1, -1792 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -34 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (a1) + vse64.v v16, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -52 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 9 addiw a1, a1, -1664 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -26 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -76 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 9 addiw a1, a1, -1536 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -42 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -68 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v24, (a1) # Unknown-size Folded Reload lui a1, 9 addiw a1, a1, -1408 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -146 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (a1) + vse64.v v24, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -140 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v24, (a1) # Unknown-size Folded Reload lui a1, 9 addiw a1, a1, -1280 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -66 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (a1) + vse64.v v24, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -132 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 9 addiw a1, a1, -1152 add a1, sp, a1 - vse64.v v24, (a1) + vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -84 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 9 addiw a1, a1, -1024 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -50 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v0, (a7) # Unknown-size Folded Reload vse64.v v0, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -148 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 9 addiw a1, a1, -896 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -162 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v16, (a7) # Unknown-size Folded Reload - vse64.v v16, (a1) + vse64.v v0, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -156 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 9 addiw a1, a1, -768 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -170 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -92 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 9 addiw a1, a1, -640 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -154 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -212 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 9 addiw a1, a1, -512 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -242 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -100 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 9 addiw a1, a1, -384 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -178 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (a1) - fld fa2, 0(t6) + vse64.v v8, (a1) + fld fa2, 0(t0) lui a1, 7 addiw a1, a1, 1792 add a1, sp, a1 - add t6, a1, a0 + add t0, a1, a0 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -226 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -236 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v24, (a7) # Unknown-size Folded Reload - vse64.v v24, (t6) - add t6, a1, a2 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 + vl8r.v v16, (a7) # Unknown-size Folded Reload + vse64.v v16, (t0) + add t0, a1, a2 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -74 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -164 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, a5 + vse64.v v8, (t0) + add t0, a1, a5 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -82 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -220 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, a6 + vse64.v v8, (t0) + add t0, a1, a6 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -90 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -108 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, t0 + vse64.v v8, (t0) + add t0, a1, t1 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -186 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -172 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, t1 + vse64.v v8, (t0) + add t0, a1, t2 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -234 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -20 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, t2 + vse64.v v8, (t0) + add t0, a1, t3 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -218 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -204 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, t3 + vse64.v v8, (t0) + add t0, a1, t4 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -18 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -180 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, s6 + vse64.v v8, (t0) + add t0, a1, s6 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -98 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -188 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, s7 + vse64.v v8, (t0) + add t0, a1, s7 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -202 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -124 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, s8 + vse64.v v8, (t0) + add t0, a1, s8 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -194 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -116 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, s9 + vse64.v v8, (t0) + add t0, a1, s9 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -210 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -4 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, s10 + vse64.v v8, (t0) + add t0, a1, s10 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -106 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -228 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, s11 + vse64.v v8, (t0) + add t0, a1, s11 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -122 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -196 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a1, ra + vse64.v v8, (t0) + add t0, a1, ra csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -114 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -12 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (t6) - addi t6, a3, 2 - andi t6, t6, 511 - slli t6, t6, 3 - add t6, a1, t6 + vse64.v v8, (t0) + addi t0, a3, 2 + andi t0, t0, 511 + slli t0, t0, 3 + add t0, a1, t0 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -130 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -28 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v8, (a7) # Unknown-size Folded Reload vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -36 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 7 addiw a1, a1, 1920 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -2 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -44 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload li a1, 15 slli a1, a1, 11 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -138 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -60 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 8 addiw a1, a1, -1920 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -10 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, 4 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 8 addiw a1, a1, -1792 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -34 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -52 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 8 addiw a1, a1, -1664 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -26 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -76 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 8 addiw a1, a1, -1536 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -42 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -68 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 8 addiw a1, a1, -1408 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -146 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload vse64.v v8, (a1) lui a1, 8 addiw a1, a1, -1280 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -66 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (a1) + vse64.v v24, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -132 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 8 addiw a1, a1, -1152 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -58 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -84 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v24, (a1) # Unknown-size Folded Reload li a1, 31 slli a1, a1, 10 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -50 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (a1) + vse64.v v24, (a1) lui a1, 8 addiw a1, a1, -896 add a1, sp, a1 - vse64.v v16, (a1) + vse64.v v0, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -156 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v24, (a1) # Unknown-size Folded Reload lui a1, 8 addiw a1, a1, -768 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -170 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v16, (a7) # Unknown-size Folded Reload - vse64.v v16, (a1) + vse64.v v24, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -92 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v24, (a1) # Unknown-size Folded Reload lui a1, 8 addiw a1, a1, -640 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -154 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (a1) + vse64.v v24, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -212 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 8 addiw a1, a1, -512 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -242 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v16, (a7) # Unknown-size Folded Reload - vse64.v v16, (a1) + vse64.v v0, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -100 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v0, (a1) # Unknown-size Folded Reload lui a1, 8 addiw a1, a1, -384 add a1, sp, a1 vse64.v v0, (a1) - fld fa1, 0(t6) + fld fa1, 0(t0) lui a1, 6 addiw a1, a1, 1792 add a1, sp, a1 - add t6, a1, a0 - vse64.v v24, (t6) - add t6, a1, a2 + add t0, a1, a0 + vse64.v v16, (t0) + add t0, a1, a2 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -74 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -164 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v16, (a7) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a1, a5 + vse64.v v16, (t0) + add t0, a1, a5 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -82 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -220 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v24, (a7) # Unknown-size Folded Reload - vse64.v v24, (t6) - add t6, a1, a6 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 + vl8r.v v16, (a7) # Unknown-size Folded Reload + vse64.v v16, (t0) + add t0, a1, a6 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -90 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -108 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v24, (a7) # Unknown-size Folded Reload - vse64.v v24, (t6) - add t6, a1, t0 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 + vl8r.v v0, (a7) # Unknown-size Folded Reload + vse64.v v0, (t0) + add t0, a1, t1 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -186 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -172 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v16, (a7) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a1, t1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -234 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v24, (a7) # Unknown-size Folded Reload - vse64.v v24, (t6) - add t6, a1, t2 + vse64.v v16, (t0) + add t0, a1, t2 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -218 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -20 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a1, t3 + vse64.v v0, (t0) + add t0, a1, t3 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -18 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -204 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v16, (a7) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a1, s6 + vse64.v v16, (t0) + add t0, a1, t4 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -98 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -180 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v16, (a7) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a1, s7 + vse64.v v16, (t0) + add t0, a1, s6 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -202 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -188 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a1, s8 + vse64.v v0, (t0) + add t0, a1, s7 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -194 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -124 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a1, s9 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 + vl8r.v v16, (a7) # Unknown-size Folded Reload + vse64.v v16, (t0) + add t0, a1, s8 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -210 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -116 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (t6) - add t6, a1, s10 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 + vl8r.v v16, (a7) # Unknown-size Folded Reload + vse64.v v16, (t0) + add t0, a1, s9 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -106 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -4 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v16, (a7) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a1, s11 + vse64.v v16, (t0) + add t0, a1, s10 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -122 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -228 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v16, (a7) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a1, ra + vse64.v v16, (t0) + add t0, a1, s11 csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -114 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -196 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v16, (a7) # Unknown-size Folded Reload - vse64.v v16, (t6) - addi t6, a3, 1 - andi t6, t6, 511 - slli t6, t6, 3 - add t6, a1, t6 + vse64.v v16, (t0) + add t0, a1, ra csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -130 - mul a7, a7, t4 + lui t5, 1 + addiw t5, t5, -12 + mul a7, a7, t5 add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 vl8r.v v16, (a7) # Unknown-size Folded Reload - vse64.v v16, (a1) + vse64.v v16, (t0) + addi t0, a3, 1 + andi t0, t0, 511 + slli t0, t0, 3 + add t0, a1, t0 + csrr a7, vlenb + lui t5, 1 + addiw t5, t5, -28 + mul a7, a7, t5 + add a7, sp, a7 + lui t5, 28 + addiw t5, t5, -960 + add a7, a7, t5 + vl8r.v v0, (a7) # Unknown-size Folded Reload + vse64.v v0, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -36 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v16, (a1) # Unknown-size Folded Reload lui a1, 6 addiw a1, a1, 1920 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -2 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (a1) + vse64.v v16, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -44 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v16, (a1) # Unknown-size Folded Reload li a1, 13 slli a1, a1, 11 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -138 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v16, (a7) # Unknown-size Folded Reload vse64.v v16, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -60 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v16, (a1) # Unknown-size Folded Reload lui a1, 7 addiw a1, a1, -1920 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -10 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (a1) + vse64.v v16, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, 4 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v16, (a1) # Unknown-size Folded Reload lui a1, 7 addiw a1, a1, -1792 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -34 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v16, (a7) # Unknown-size Folded Reload vse64.v v16, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -52 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v16, (a1) # Unknown-size Folded Reload lui a1, 7 addiw a1, a1, -1664 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -26 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v16, (a7) # Unknown-size Folded Reload vse64.v v16, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -76 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v16, (a1) # Unknown-size Folded Reload lui a1, 7 addiw a1, a1, -1536 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -42 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v16, (a7) # Unknown-size Folded Reload vse64.v v16, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -68 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v16, (a1) # Unknown-size Folded Reload lui a1, 7 addiw a1, a1, -1408 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -146 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (a1) + vse64.v v16, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -140 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v16, (a1) # Unknown-size Folded Reload lui a1, 7 addiw a1, a1, -1280 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -66 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (a1) + vse64.v v16, (a1) lui a1, 7 addiw a1, a1, -1152 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -58 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -84 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload li a1, 27 slli a1, a1, 10 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -50 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -148 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 7 addiw a1, a1, -896 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -162 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -156 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v16, (a1) # Unknown-size Folded Reload lui a1, 7 addiw a1, a1, -768 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -170 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v0, (a7) # Unknown-size Folded Reload - vse64.v v0, (a1) + vse64.v v16, (a1) lui a1, 7 addiw a1, a1, -640 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -154 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload - vse64.v v8, (a1) + vse64.v v24, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -212 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v8, (a1) # Unknown-size Folded Reload lui a1, 7 addiw a1, a1, -512 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -242 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v8, (a7) # Unknown-size Folded Reload vse64.v v8, (a1) + csrr a1, vlenb + lui a7, 1 + addiw a7, a7, -100 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 28 + addiw a7, a7, -960 + add a1, a1, a7 + vl8r.v v24, (a1) # Unknown-size Folded Reload lui a1, 7 addiw a1, a1, -384 add a1, sp, a1 - csrr a7, vlenb - lui t4, 1 - addiw t4, t4, -178 - mul a7, a7, t4 - add a7, sp, a7 - lui t4, 28 - addiw t4, t4, -960 - add a7, a7, t4 - vl8r.v v16, (a7) # Unknown-size Folded Reload - vse64.v v16, (a1) - fld fa0, 0(t6) + vse64.v v24, (a1) + fld fa0, 0(t0) lui a1, 5 addiw a1, a1, 1792 add a7, sp, a1 - add t6, a7, a0 + add t0, a7, a0 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -226 + addiw a1, a1, -236 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, a2 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vse64.v v0, (t0) + add t0, a7, a2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -74 + addiw a1, a1, -164 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, a5 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vse64.v v0, (t0) + add t0, a7, a5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -82 + addiw a1, a1, -220 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, a6 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vse64.v v0, (t0) + add t0, a7, a6 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -90 + addiw a1, a1, -108 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, t0 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vse64.v v0, (t0) + add t0, a7, t1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -186 + addiw a1, a1, -172 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, t1 - vse64.v v24, (t6) - add t6, a7, t2 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vse64.v v0, (t0) + add t0, a7, t2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -218 + addiw a1, a1, -20 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, t3 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vse64.v v0, (t0) + add t0, a7, t3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -18 + addiw a1, a1, -204 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, s6 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vse64.v v0, (t0) + add t0, a7, t4 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -98 + addiw a1, a1, -180 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, s7 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vse64.v v0, (t0) + add t0, a7, s6 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -202 + addiw a1, a1, -188 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, s8 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vse64.v v0, (t0) + add t0, a7, s7 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -194 + addiw a1, a1, -124 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, s9 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vse64.v v0, (t0) + add t0, a7, s8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -210 + addiw a1, a1, -116 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, s10 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vse64.v v0, (t0) + add t0, a7, s9 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -106 + addiw a1, a1, -4 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, s11 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vse64.v v0, (t0) + add t0, a7, s10 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -122 + addiw a1, a1, -228 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (t6) - add t6, a7, ra + vl8r.v v0, (a0) # Unknown-size Folded Reload + vse64.v v0, (t0) + add t0, a7, s11 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -114 + addiw a1, a1, -196 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (t6) - andi t6, a3, 511 - slli t6, t6, 3 - add t6, a7, t6 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vse64.v v0, (t0) + add t0, a7, ra csrr a0, vlenb lui a1, 1 - addiw a1, a1, -130 + addiw a1, a1, -12 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (a7) + vl8r.v v0, (a0) # Unknown-size Folded Reload + vse64.v v0, (t0) + andi t0, a3, 511 + slli t0, t0, 3 + add t0, a7, t0 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -28 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 28 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vse64.v v0, (a7) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -36 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 28 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 5 addiw a0, a0, 1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -2 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 28 - addiw a2, a2, -960 - add a1, a1, a2 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a0) + vse64.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -44 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 28 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload li a0, 11 slli a0, a0, 11 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -138 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 28 - addiw a2, a2, -960 - add a1, a1, a2 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a0) + vse64.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -60 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 28 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 6 addiw a0, a0, -1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -10 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 28 - addiw a2, a2, -960 - add a1, a1, a2 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a0) + vse64.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 4 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 28 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 6 addiw a0, a0, -1792 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -34 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 28 - addiw a2, a2, -960 - add a1, a1, a2 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a0) + vse64.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -52 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 28 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 6 addiw a0, a0, -1664 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -26 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 28 - addiw a2, a2, -960 - add a1, a1, a2 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a0) + vse64.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -76 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 28 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 6 addiw a0, a0, -1536 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -42 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 28 - addiw a2, a2, -960 - add a1, a1, a2 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a0) + vse64.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -68 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 28 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 6 addiw a0, a0, -1408 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -146 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 28 - addiw a2, a2, -960 - add a1, a1, a2 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a0) + vse64.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -140 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 28 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 6 addiw a0, a0, -1280 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -66 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 28 - addiw a2, a2, -960 - add a1, a1, a2 - vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (a0) + vse64.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -132 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 28 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 6 addiw a0, a0, -1152 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -58 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 28 - addiw a2, a2, -960 - add a1, a1, a2 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a0) + vse64.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -84 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 28 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload li a0, 23 slli a0, a0, 10 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -50 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 28 - addiw a2, a2, -960 - add a1, a1, a2 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a0) + vse64.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -148 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 28 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 6 addiw a0, a0, -896 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -162 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 28 - addiw a2, a2, -960 - add a1, a1, a2 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a0) + vse64.v v0, (a0) lui a0, 6 addiw a0, a0, -768 add a0, sp, a0 - vse64.v v0, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -92 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 28 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 6 addiw a0, a0, -640 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -154 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 28 - addiw a2, a2, -960 - add a1, a1, a2 - vl8r.v v16, (a1) # Unknown-size Folded Reload vse64.v v16, (a0) lui a0, 6 addiw a0, a0, -512 @@ -151500,21 +151315,12 @@ lui a0, 6 addiw a0, a0, -384 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -178 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 28 - addiw a2, a2, -960 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a0) - fld ft0, 0(t6) + vse64.v v24, (a0) + fld ft0, 0(t0) vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -266 + addiw a1, a1, -260 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151522,7 +151328,7 @@ add a0, a0, a1 vl8r.v v24, (a0) # Unknown-size Folded Reload csrr a0, vlenb - li a1, 2014 + li a1, 2020 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151532,7 +151338,7 @@ vslideup.vi v24, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - li a1, 2022 + li a1, 2028 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151542,7 +151348,7 @@ vslideup.vi v24, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - li a1, 2030 + li a1, 2036 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151552,7 +151358,7 @@ vslideup.vi v24, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - li a1, 2038 + li a1, 2044 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151562,7 +151368,8 @@ vslideup.vi v24, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - li a1, 2046 + lui a1, 1 + addiw a1, a1, -2044 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151573,7 +151380,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2042 + addiw a1, a1, -2036 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151584,7 +151391,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2034 + addiw a1, a1, -2028 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151595,7 +151402,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1978 + addiw a1, a1, -1972 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151606,7 +151413,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1962 + addiw a1, a1, -1956 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151617,7 +151424,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -466 + addiw a1, a1, -460 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151628,7 +151435,7 @@ vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -594 + addiw a1, a1, -588 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151639,7 +151446,7 @@ vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -586 + addiw a1, a1, -580 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151650,7 +151457,7 @@ vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -578 + addiw a1, a1, -572 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151661,7 +151468,7 @@ vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -570 + addiw a1, a1, -564 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151672,7 +151479,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1778 + addiw a1, a1, -1772 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151687,7 +151494,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -330 + addiw a1, a1, -324 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151696,7 +151503,7 @@ vl8r.v v24, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1986 + addiw a1, a1, -1980 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151707,7 +151514,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1954 + addiw a1, a1, -1948 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151718,7 +151525,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1938 + addiw a1, a1, -1932 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151729,7 +151536,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -482 + addiw a1, a1, -476 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151740,7 +151547,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1930 + addiw a1, a1, -1924 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151751,7 +151558,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1922 + addiw a1, a1, -1916 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151762,7 +151569,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1914 + addiw a1, a1, -1908 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151773,7 +151580,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1722 + addiw a1, a1, -1716 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151784,7 +151591,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1714 + addiw a1, a1, -1708 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151795,7 +151602,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1706 + addiw a1, a1, -1700 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151806,7 +151613,7 @@ vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1690 + addiw a1, a1, -1684 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151817,7 +151624,7 @@ vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1674 + addiw a1, a1, -1668 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151828,7 +151635,7 @@ vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1658 + addiw a1, a1, -1652 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151839,7 +151646,7 @@ vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -450 + addiw a1, a1, -444 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151850,7 +151657,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1626 + addiw a1, a1, -1620 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151865,7 +151672,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -322 + addiw a1, a1, -316 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151874,7 +151681,7 @@ vl8r.v v24, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1906 + addiw a1, a1, -1900 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151885,7 +151692,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1898 + addiw a1, a1, -1892 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151896,7 +151703,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1890 + addiw a1, a1, -1884 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151907,7 +151714,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1882 + addiw a1, a1, -1876 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151918,7 +151725,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1874 + addiw a1, a1, -1868 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151929,7 +151736,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1866 + addiw a1, a1, -1860 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151940,7 +151747,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1858 + addiw a1, a1, -1852 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151951,7 +151758,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -434 + addiw a1, a1, -428 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151962,7 +151769,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1618 + addiw a1, a1, -1612 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151973,7 +151780,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1610 + addiw a1, a1, -1604 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151984,7 +151791,7 @@ vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1602 + addiw a1, a1, -1596 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -151995,7 +151802,7 @@ vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1594 + addiw a1, a1, -1588 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152006,7 +151813,7 @@ vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1586 + addiw a1, a1, -1580 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152017,7 +151824,7 @@ vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1578 + addiw a1, a1, -1572 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152028,7 +151835,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1570 + addiw a1, a1, -1564 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152042,7 +151849,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -314 + addiw a1, a1, -308 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152051,7 +151858,7 @@ vl8r.v v24, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1834 + addiw a1, a1, -1828 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152062,7 +151869,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -474 + addiw a1, a1, -468 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152073,7 +151880,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1818 + addiw a1, a1, -1812 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152084,7 +151891,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1802 + addiw a1, a1, -1796 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152095,7 +151902,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1786 + addiw a1, a1, -1780 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152106,7 +151913,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1762 + addiw a1, a1, -1756 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152117,7 +151924,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1746 + addiw a1, a1, -1740 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152128,7 +151935,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1538 + addiw a1, a1, -1532 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152139,7 +151946,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1522 + addiw a1, a1, -1516 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152150,7 +151957,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1498 + addiw a1, a1, -1492 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152161,7 +151968,7 @@ vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1474 + addiw a1, a1, -1468 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152172,7 +151979,7 @@ vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -426 + addiw a1, a1, -420 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152183,7 +151990,7 @@ vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1466 + addiw a1, a1, -1460 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152194,7 +152001,7 @@ vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1458 + addiw a1, a1, -1452 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152205,7 +152012,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1450 + addiw a1, a1, -1444 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152220,7 +152027,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -306 + addiw a1, a1, -300 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152229,7 +152036,7 @@ vl8r.v v24, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1698 + addiw a1, a1, -1692 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152240,7 +152047,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1682 + addiw a1, a1, -1676 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152251,7 +152058,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1666 + addiw a1, a1, -1660 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152262,7 +152069,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1650 + addiw a1, a1, -1644 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152273,7 +152080,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1642 + addiw a1, a1, -1636 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152284,7 +152091,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -458 + addiw a1, a1, -452 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152295,7 +152102,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1634 + addiw a1, a1, -1628 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152306,7 +152113,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1410 + addiw a1, a1, -1404 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152317,7 +152124,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1394 + addiw a1, a1, -1388 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152328,7 +152135,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1378 + addiw a1, a1, -1372 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152339,7 +152146,7 @@ vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1362 + addiw a1, a1, -1356 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152350,7 +152157,7 @@ vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1354 + addiw a1, a1, -1348 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152361,7 +152168,7 @@ vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1346 + addiw a1, a1, -1340 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152372,7 +152179,7 @@ vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1338 + addiw a1, a1, -1332 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152383,7 +152190,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1330 + addiw a1, a1, -1324 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152393,12 +152200,12 @@ vslideup.vi v24, v8, 15 lui a0, 5 addiw a0, a0, 256 - add t5, sp, a0 - vse64.v v24, (t5) + add t6, sp, a0 + vse64.v v24, (t6) vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -258 + addiw a1, a1, -252 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152407,7 +152214,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2026 + addiw a1, a1, -2020 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152418,7 +152225,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2018 + addiw a1, a1, -2012 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152429,7 +152236,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2010 + addiw a1, a1, -2004 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152440,7 +152247,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2002 + addiw a1, a1, -1996 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152451,7 +152258,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1994 + addiw a1, a1, -1988 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152462,7 +152269,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1970 + addiw a1, a1, -1964 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152473,7 +152280,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1946 + addiw a1, a1, -1940 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152484,7 +152291,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1738 + addiw a1, a1, -1732 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152495,7 +152302,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1730 + addiw a1, a1, -1724 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152506,7 +152313,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -362 + addiw a1, a1, -356 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152517,7 +152324,7 @@ vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -562 + addiw a1, a1, -556 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152528,7 +152335,7 @@ vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -554 + addiw a1, a1, -548 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152539,7 +152346,7 @@ vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -546 + addiw a1, a1, -540 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152550,7 +152357,7 @@ vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -538 + addiw a1, a1, -532 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152561,7 +152368,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -530 + addiw a1, a1, -524 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152571,12 +152378,12 @@ vslideup.vi v8, v24, 15 lui a0, 5 addiw a0, a0, 384 - add t4, sp, a0 - vse64.v v8, (t4) + add t5, sp, a0 + vse64.v v8, (t5) vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -298 + addiw a1, a1, -292 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152585,7 +152392,7 @@ vl8r.v v24, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1562 + addiw a1, a1, -1556 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152596,7 +152403,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1554 + addiw a1, a1, -1548 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152607,7 +152414,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1546 + addiw a1, a1, -1540 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152618,7 +152425,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -442 + addiw a1, a1, -436 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152629,7 +152436,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1530 + addiw a1, a1, -1524 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152640,7 +152447,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1514 + addiw a1, a1, -1508 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152651,7 +152458,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1490 + addiw a1, a1, -1484 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152662,7 +152469,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1258 + addiw a1, a1, -1252 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152673,7 +152480,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1242 + addiw a1, a1, -1236 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152684,7 +152491,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1234 + addiw a1, a1, -1228 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152695,7 +152502,7 @@ vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1218 + addiw a1, a1, -1212 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152706,7 +152513,7 @@ vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1202 + addiw a1, a1, -1196 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152717,7 +152524,7 @@ vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1186 + addiw a1, a1, -1180 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152728,7 +152535,7 @@ vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -402 + addiw a1, a1, -396 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152739,7 +152546,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1178 + addiw a1, a1, -1172 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152749,12 +152556,12 @@ vslideup.vi v24, v8, 15 lui a0, 5 addiw a0, a0, 512 - add t3, sp, a0 - vse64.v v24, (t3) + add t4, sp, a0 + vse64.v v24, (t4) vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -290 + addiw a1, a1, -284 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152763,7 +152570,7 @@ vl8r.v v24, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1442 + addiw a1, a1, -1436 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152774,7 +152581,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1434 + addiw a1, a1, -1428 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152785,7 +152592,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1426 + addiw a1, a1, -1420 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152796,7 +152603,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1418 + addiw a1, a1, -1412 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152807,7 +152614,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1402 + addiw a1, a1, -1396 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152818,7 +152625,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1386 + addiw a1, a1, -1380 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152829,7 +152636,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1370 + addiw a1, a1, -1364 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152840,7 +152647,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -386 + addiw a1, a1, -380 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152851,7 +152658,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1170 + addiw a1, a1, -1164 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152862,7 +152669,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1162 + addiw a1, a1, -1156 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152873,7 +152680,7 @@ vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1154 + addiw a1, a1, -1148 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152884,7 +152691,7 @@ vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1146 + addiw a1, a1, -1140 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152895,7 +152702,7 @@ vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1138 + addiw a1, a1, -1132 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152906,7 +152713,7 @@ vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1130 + addiw a1, a1, -1124 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152917,7 +152724,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1122 + addiw a1, a1, -1116 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152927,12 +152734,12 @@ vslideup.vi v24, v8, 15 lui a0, 5 addiw a0, a0, 640 - add t2, sp, a0 - vse64.v v24, (t2) + add t3, sp, a0 + vse64.v v24, (t3) vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -282 + addiw a1, a1, -276 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152941,7 +152748,7 @@ vl8r.v v24, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1322 + addiw a1, a1, -1316 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152952,7 +152759,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -418 + addiw a1, a1, -412 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152963,7 +152770,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1314 + addiw a1, a1, -1308 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152974,7 +152781,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1306 + addiw a1, a1, -1300 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152985,7 +152792,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1298 + addiw a1, a1, -1292 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -152996,7 +152803,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1290 + addiw a1, a1, -1284 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153007,7 +152814,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1282 + addiw a1, a1, -1276 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153018,7 +152825,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1074 + addiw a1, a1, -1068 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153029,7 +152836,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1058 + addiw a1, a1, -1052 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153040,7 +152847,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1050 + addiw a1, a1, -1044 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153051,7 +152858,7 @@ vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1042 + addiw a1, a1, -1036 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153062,7 +152869,7 @@ vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -378 + addiw a1, a1, -372 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153073,7 +152880,7 @@ vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1034 + addiw a1, a1, -1028 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153084,7 +152891,7 @@ vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1026 + addiw a1, a1, -1020 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153095,7 +152902,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1010 + addiw a1, a1, -1004 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153105,12 +152912,12 @@ vslideup.vi v24, v8, 15 lui a0, 5 addiw a0, a0, 768 - add t1, sp, a0 - vse64.v v24, (t1) + add t2, sp, a0 + vse64.v v24, (t2) vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1274 + addiw a1, a1, -1268 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153119,7 +152926,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -346 + addiw a1, a1, -340 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153130,7 +152937,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1266 + addiw a1, a1, -1260 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153141,7 +152948,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1250 + addiw a1, a1, -1244 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153152,7 +152959,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1226 + addiw a1, a1, -1220 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153163,7 +152970,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1210 + addiw a1, a1, -1204 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153174,7 +152981,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -410 + addiw a1, a1, -404 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153185,7 +152992,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1194 + addiw a1, a1, -1188 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153196,7 +153003,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -962 + addiw a1, a1, -956 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153207,7 +153014,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -946 + addiw a1, a1, -940 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153218,7 +153025,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -930 + addiw a1, a1, -924 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153229,7 +153036,7 @@ vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -922 + addiw a1, a1, -916 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153240,7 +153047,7 @@ vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -914 + addiw a1, a1, -908 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153251,7 +153058,7 @@ vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -906 + addiw a1, a1, -900 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153262,7 +153069,7 @@ vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -898 + addiw a1, a1, -892 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153273,7 +153080,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -890 + addiw a1, a1, -884 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153283,12 +153090,12 @@ vslideup.vi v16, v8, 15 lui a0, 5 addiw a0, a0, 896 - add t0, sp, a0 - vse64.v v16, (t0) + add t1, sp, a0 + vse64.v v16, (t1) vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -250 + addiw a1, a1, -244 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153297,7 +153104,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1850 + addiw a1, a1, -1844 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153308,7 +153115,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1842 + addiw a1, a1, -1836 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153319,7 +153126,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1826 + addiw a1, a1, -1820 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153330,7 +153137,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1810 + addiw a1, a1, -1804 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153341,7 +153148,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1794 + addiw a1, a1, -1788 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153352,7 +153159,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1770 + addiw a1, a1, -1764 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153363,7 +153170,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1754 + addiw a1, a1, -1748 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153374,7 +153181,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1506 + addiw a1, a1, -1500 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153385,7 +153192,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1482 + addiw a1, a1, -1476 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153396,7 +153203,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -354 + addiw a1, a1, -348 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153407,7 +153214,7 @@ vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -522 + addiw a1, a1, -516 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153418,7 +153225,7 @@ vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -514 + addiw a1, a1, -508 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153429,7 +153236,7 @@ vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -506 + addiw a1, a1, -500 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153440,7 +153247,7 @@ vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -498 + addiw a1, a1, -492 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153451,7 +153258,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -490 + addiw a1, a1, -484 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153466,7 +153273,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -274 + addiw a1, a1, -268 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153475,7 +153282,7 @@ vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1114 + addiw a1, a1, -1108 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153486,7 +153293,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1106 + addiw a1, a1, -1100 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153497,7 +153304,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1098 + addiw a1, a1, -1092 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153508,7 +153315,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -394 + addiw a1, a1, -388 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153519,7 +153326,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1090 + addiw a1, a1, -1084 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153530,7 +153337,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1082 + addiw a1, a1, -1076 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153541,7 +153348,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1066 + addiw a1, a1, -1060 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153552,7 +153359,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -810 + addiw a1, a1, -804 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153563,7 +153370,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -802 + addiw a1, a1, -796 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153574,7 +153381,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -794 + addiw a1, a1, -788 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153585,7 +153392,7 @@ vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -778 + addiw a1, a1, -772 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153596,7 +153403,7 @@ vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -762 + addiw a1, a1, -756 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153607,7 +153414,7 @@ vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -746 + addiw a1, a1, -740 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153618,7 +153425,7 @@ vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -370 + addiw a1, a1, -364 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153629,7 +153436,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -738 + addiw a1, a1, -732 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153644,7 +153451,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -978 + addiw a1, a1, -972 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153653,7 +153460,7 @@ vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1002 + addiw a1, a1, -996 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153664,7 +153471,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -994 + addiw a1, a1, -988 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153675,7 +153482,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -986 + addiw a1, a1, -980 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153686,7 +153493,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1018 + addiw a1, a1, -1012 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153697,7 +153504,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -970 + addiw a1, a1, -964 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153708,7 +153515,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -954 + addiw a1, a1, -948 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153719,7 +153526,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -938 + addiw a1, a1, -932 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153730,7 +153537,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -658 + addiw a1, a1, -652 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153741,7 +153548,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -730 + addiw a1, a1, -724 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153752,7 +153559,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -722 + addiw a1, a1, -716 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153763,7 +153570,7 @@ vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -714 + addiw a1, a1, -708 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153774,7 +153581,7 @@ vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -706 + addiw a1, a1, -700 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153785,7 +153592,7 @@ vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -698 + addiw a1, a1, -692 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153796,7 +153603,7 @@ vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -690 + addiw a1, a1, -684 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153807,7 +153614,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -682 + addiw a1, a1, -676 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153822,7 +153629,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -882 + addiw a1, a1, -876 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153831,7 +153638,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -338 + addiw a1, a1, -332 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153842,7 +153649,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -834 + addiw a1, a1, -828 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153853,7 +153660,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -874 + addiw a1, a1, -868 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153864,7 +153671,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -866 + addiw a1, a1, -860 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153875,7 +153682,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -858 + addiw a1, a1, -852 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153886,7 +153693,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -850 + addiw a1, a1, -844 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153897,7 +153704,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -842 + addiw a1, a1, -836 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153908,7 +153715,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -674 + addiw a1, a1, -668 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153919,7 +153726,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -666 + addiw a1, a1, -660 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153930,7 +153737,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -650 + addiw a1, a1, -644 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153941,7 +153748,7 @@ vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -642 + addiw a1, a1, -636 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153952,7 +153759,7 @@ vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -610 + addiw a1, a1, -604 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153963,7 +153770,7 @@ vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -634 + addiw a1, a1, -628 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153974,7 +153781,7 @@ vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -626 + addiw a1, a1, -620 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -153985,7 +153792,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -618 + addiw a1, a1, -612 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -154000,7 +153807,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -602 + addiw a1, a1, -596 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -154009,7 +153816,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -826 + addiw a1, a1, -820 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -154020,7 +153827,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -818 + addiw a1, a1, -812 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -154074,7 +153881,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -786 + addiw a1, a1, -780 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -154085,7 +153892,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -770 + addiw a1, a1, -764 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -154096,7 +153903,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -754 + addiw a1, a1, -748 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -154109,104 +153916,104 @@ addiw a0, a0, 1536 add a1, sp, a0 vse64.v v8, (a1) - andi t6, a4, 255 - slli t6, t6, 3 - add t6, s5, t6 - fsd ft2, 0(t6) + andi t0, a4, 255 + slli t0, t0, 3 + add t0, s5, t0 + fsd ft2, 0(t0) vle64.v v8, (s5) csrr a0, vlenb - lui t6, 1 - addiw t6, t6, -250 - mul a0, a0, t6 + lui t0, 1 + addiw t0, t0, -244 + mul a0, a0, t0 add a0, sp, a0 - lui t6, 28 - addiw t6, t6, -960 - add a0, a0, t6 + lui t0, 28 + addiw t0, t0, -960 + add a0, a0, t0 vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (s4) csrr a0, vlenb - lui t6, 1 - addiw t6, t6, -258 - mul a0, a0, t6 + lui t0, 1 + addiw t0, t0, -252 + mul a0, a0, t0 add a0, sp, a0 - lui t6, 28 - addiw t6, t6, -960 - add a0, a0, t6 + lui t0, 28 + addiw t0, t0, -960 + add a0, a0, t0 vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (s3) csrr a0, vlenb - lui t6, 1 - addiw t6, t6, -266 - mul a0, a0, t6 + lui t0, 1 + addiw t0, t0, -260 + mul a0, a0, t0 add a0, sp, a0 - lui t6, 28 - addiw t6, t6, -960 - add a0, a0, t6 + lui t0, 28 + addiw t0, t0, -960 + add a0, a0, t0 vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (s2) csrr a0, vlenb - lui t6, 1 - addiw t6, t6, -274 - mul a0, a0, t6 + lui t0, 1 + addiw t0, t0, -268 + mul a0, a0, t0 add a0, sp, a0 - lui t6, 28 - addiw t6, t6, -960 - add a0, a0, t6 + lui t0, 28 + addiw t0, t0, -960 + add a0, a0, t0 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vle64.v v8, (t6) + csrr a0, vlenb + lui t0, 1 + addiw t0, t0, -276 + mul a0, a0, t0 + add a0, sp, a0 + lui t0, 28 + addiw t0, t0, -960 + add a0, a0, t0 vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (t5) csrr a0, vlenb - lui t5, 1 - addiw t5, t5, -282 - mul a0, a0, t5 + lui t0, 1 + addiw t0, t0, -284 + mul a0, a0, t0 add a0, sp, a0 - lui t5, 28 - addiw t5, t5, -960 - add a0, a0, t5 + lui t0, 28 + addiw t0, t0, -960 + add a0, a0, t0 vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (t4) csrr a0, vlenb - lui t4, 1 - addiw t4, t4, -290 - mul a0, a0, t4 + lui t0, 1 + addiw t0, t0, -292 + mul a0, a0, t0 add a0, sp, a0 - lui t4, 28 - addiw t4, t4, -960 - add a0, a0, t4 + lui t0, 28 + addiw t0, t0, -960 + add a0, a0, t0 vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (t3) csrr a0, vlenb - lui t3, 1 - addiw t3, t3, -298 - mul a0, a0, t3 + lui t0, 1 + addiw t0, t0, -300 + mul a0, a0, t0 add a0, sp, a0 - lui t3, 28 - addiw t3, t3, -960 - add a0, a0, t3 + lui t0, 28 + addiw t0, t0, -960 + add a0, a0, t0 vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (t2) csrr a0, vlenb - lui t2, 1 - addiw t2, t2, -306 - mul a0, a0, t2 + lui t0, 1 + addiw t0, t0, -308 + mul a0, a0, t0 add a0, sp, a0 - lui t2, 28 - addiw t2, t2, -960 - add a0, a0, t2 + lui t0, 28 + addiw t0, t0, -960 + add a0, a0, t0 vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (t1) csrr a0, vlenb - lui t1, 1 - addiw t1, t1, -314 - mul a0, a0, t1 - add a0, sp, a0 - lui t1, 28 - addiw t1, t1, -960 - add a0, a0, t1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t0) - csrr a0, vlenb lui t0, 1 - addiw t0, t0, -322 + addiw t0, t0, -316 mul a0, a0, t0 add a0, sp, a0 lui t0, 28 @@ -154216,7 +154023,7 @@ vle64.v v8, (a7) csrr a0, vlenb lui a7, 1 - addiw a7, a7, -330 + addiw a7, a7, -324 mul a0, a0, a7 add a0, sp, a0 lui a7, 28 @@ -154226,7 +154033,7 @@ vle64.v v8, (a6) csrr a0, vlenb lui a6, 1 - addiw a6, a6, -338 + addiw a6, a6, -332 mul a0, a0, a6 add a0, sp, a0 lui a6, 28 @@ -154254,111 +154061,111 @@ vse64.v v16, (s2) lui a0, 5 addiw a0, a0, -768 - add t5, sp, a0 - vse64.v v8, (t5) + add t6, sp, a0 + vse64.v v8, (t6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -332 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 28 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 5 addiw a0, a0, -896 - add t4, sp, a0 + add t5, sp, a0 + vse64.v v8, (t5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -338 + addiw a1, a1, -324 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t4) li a0, 19 slli a0, a0, 10 - add t3, sp, a0 + add t4, sp, a0 + vse64.v v8, (t4) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -330 + addiw a1, a1, -316 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t3) lui a0, 5 addiw a0, a0, -1152 - add t2, sp, a0 + add t3, sp, a0 + vse64.v v8, (t3) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -322 + addiw a1, a1, -308 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t2) lui a0, 5 addiw a0, a0, -1280 - add t1, sp, a0 + add t2, sp, a0 + vse64.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -314 + addiw a1, a1, -300 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t1) lui a0, 5 addiw a0, a0, -1408 - add t0, sp, a0 + add t1, sp, a0 + vse64.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -306 + addiw a1, a1, -292 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t0) lui a0, 5 addiw a0, a0, -1536 add a7, sp, a0 + vse64.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -298 + addiw a1, a1, -284 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a0, 5 addiw a0, a0, -1664 add a6, sp, a0 + vse64.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -290 + addiw a1, a1, -276 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a6) lui a0, 5 addiw a0, a0, -1792 add a5, sp, a0 - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -282 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 28 - addiw a1, a1, -960 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload vse64.v v8, (a5) fld ft2, 1784(sp) # 8-byte Folded Reload fmadd.d ft2, ft2, ft0, ft1 @@ -154402,57 +154209,57 @@ fmadd.d ft2, ft3, ft11, ft2 fld ft3, 1456(sp) # 8-byte Folded Reload fmadd.d ft2, ft3, ft10, ft2 - addi t6, a4, 1 - andi t6, t6, 255 - slli t6, t6, 3 + addi t0, a4, 1 + andi t0, t0, 255 + slli t0, t0, 3 sd a3, 8(sp) sd a5, 0(sp) lui a0, 4 addiw a0, a0, 1792 add s5, sp, a0 - add t6, s5, t6 + add t0, s5, t0 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -268 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 28 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 5 addiw a0, a0, -1920 add a2, sp, a0 + vse64.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -274 + addiw a1, a1, -260 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a2) li a0, 9 slli a0, a0, 11 add a1, sp, a0 + vse64.v v8, (a1) csrr a0, vlenb lui a3, 1 - addiw a3, a3, -266 + addiw a3, a3, -252 mul a0, a0, a3 add a0, sp, a0 lui a3, 28 addiw a3, a3, -960 add a0, a0, a3 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 4 addiw a0, a0, 1920 add a0, sp, a0 - csrr a3, vlenb - lui a5, 1 - addiw a5, a5, -258 - mul a3, a3, a5 - add a3, sp, a3 - lui a5, 28 - addiw a5, a5, -960 - add a3, a3, a5 - vl8r.v v8, (a3) # Unknown-size Folded Reload vse64.v v8, (a0) csrr a3, vlenb lui a5, 1 - addiw a5, a5, -250 + addiw a5, a5, -244 mul a3, a3, a5 add a3, sp, a3 lui a5, 28 @@ -154462,31 +154269,31 @@ vl8r.v v8, (a3) # Unknown-size Folded Reload ld a3, 8(sp) vse64.v v8, (s5) - fsd ft2, 0(t6) + fsd ft2, 0(t0) vle64.v v8, (s5) - csrr t6, vlenb + csrr t0, vlenb lui s5, 1 - addiw s5, s5, -250 - mul t6, t6, s5 - add t6, sp, t6 + addiw s5, s5, -244 + mul t0, t0, s5 + add t0, sp, t0 lui s5, 28 addiw s5, s5, -960 - add t6, t6, s5 - vs8r.v v8, (t6) # Unknown-size Folded Spill + add t0, t0, s5 + vs8r.v v8, (t0) # Unknown-size Folded Spill vle64.v v8, (a0) csrr a0, vlenb - lui t6, 1 - addiw t6, t6, -258 - mul a0, a0, t6 + lui t0, 1 + addiw t0, t0, -252 + mul a0, a0, t0 add a0, sp, a0 - lui t6, 28 - addiw t6, t6, -960 - add a0, a0, t6 + lui t0, 28 + addiw t0, t0, -960 + add a0, a0, t0 vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (a1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -266 + addiw a1, a1, -260 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -154496,7 +154303,7 @@ vle64.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -274 + addiw a1, a1, -268 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -154506,7 +154313,7 @@ vle64.v v8, (a5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -282 + addiw a1, a1, -276 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -154516,7 +154323,7 @@ vle64.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -290 + addiw a1, a1, -284 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -154526,57 +154333,57 @@ vle64.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -298 + addiw a1, a1, -292 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t0) + vle64.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -306 + addiw a1, a1, -300 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t1) + vle64.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -314 + addiw a1, a1, -308 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t2) + vle64.v v8, (t3) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -322 + addiw a1, a1, -316 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t3) + vle64.v v8, (t4) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -330 + addiw a1, a1, -324 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t4) + vle64.v v8, (t5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -338 + addiw a1, a1, -332 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -154586,7 +154393,7 @@ vle64.v v0, (s4) vle64.v v24, (s3) vle64.v v16, (s2) - vle64.v v8, (t5) + vle64.v v8, (t6) lui a0, 4 addiw a0, a0, 1664 add s4, sp, a0 @@ -154601,111 +154408,111 @@ vse64.v v16, (s2) lui a0, 4 addiw a0, a0, 1280 - add t5, sp, a0 - vse64.v v8, (t5) + add t6, sp, a0 + vse64.v v8, (t6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -332 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 28 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 4 addiw a0, a0, 1152 - add t4, sp, a0 + add t5, sp, a0 + vse64.v v8, (t5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -338 + addiw a1, a1, -324 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t4) li a0, 17 slli a0, a0, 10 - add t3, sp, a0 + add t4, sp, a0 + vse64.v v8, (t4) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -330 + addiw a1, a1, -316 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t3) lui a0, 4 addiw a0, a0, 896 - add t2, sp, a0 + add t3, sp, a0 + vse64.v v8, (t3) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -322 + addiw a1, a1, -308 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t2) lui a0, 4 addiw a0, a0, 768 - add t1, sp, a0 + add t2, sp, a0 + vse64.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -314 + addiw a1, a1, -300 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t1) lui a0, 4 addiw a0, a0, 640 - add t0, sp, a0 + add t1, sp, a0 + vse64.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -306 + addiw a1, a1, -292 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t0) lui a0, 4 addiw a0, a0, 512 add a7, sp, a0 + vse64.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -298 + addiw a1, a1, -284 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a0, 4 addiw a0, a0, 384 add a6, sp, a0 + vse64.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -290 + addiw a1, a1, -276 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a6) lui a0, 4 addiw a0, a0, 256 add a5, sp, a0 - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -282 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 28 - addiw a1, a1, -960 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload vse64.v v8, (a5) fld ft2, 1448(sp) # 8-byte Folded Reload fmadd.d ft2, ft2, ft0, ft1 @@ -154749,56 +154556,56 @@ fmadd.d ft2, ft3, ft11, ft2 fld ft3, 1288(sp) # 8-byte Folded Reload fmadd.d ft2, ft3, ft10, ft2 - addi t6, a4, 2 - andi t6, t6, 255 - slli t6, t6, 3 + addi t0, a4, 2 + andi t0, t0, 255 + slli t0, t0, 3 sd a3, 8(sp) sd a5, 0(sp) lui a0, 4 addiw a0, a0, -256 add s5, sp, a0 - add t6, s5, t6 + add t0, s5, t0 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -268 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 28 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 4 addiw a0, a0, 128 add a2, sp, a0 + vse64.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -274 + addiw a1, a1, -260 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a2) lui a0, 4 add a1, sp, a0 + vse64.v v8, (a1) csrr a0, vlenb lui a3, 1 - addiw a3, a3, -266 + addiw a3, a3, -252 mul a0, a0, a3 add a0, sp, a0 lui a3, 28 addiw a3, a3, -960 add a0, a0, a3 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 4 addiw a0, a0, -128 add a0, sp, a0 - csrr a3, vlenb - lui a5, 1 - addiw a5, a5, -258 - mul a3, a3, a5 - add a3, sp, a3 - lui a5, 28 - addiw a5, a5, -960 - add a3, a3, a5 - vl8r.v v8, (a3) # Unknown-size Folded Reload vse64.v v8, (a0) csrr a3, vlenb lui a5, 1 - addiw a5, a5, -250 + addiw a5, a5, -244 mul a3, a3, a5 add a3, sp, a3 lui a5, 28 @@ -154808,31 +154615,31 @@ vl8r.v v8, (a3) # Unknown-size Folded Reload ld a3, 8(sp) vse64.v v8, (s5) - fsd ft2, 0(t6) + fsd ft2, 0(t0) vle64.v v8, (s5) - csrr t6, vlenb + csrr t0, vlenb lui s5, 1 - addiw s5, s5, -250 - mul t6, t6, s5 - add t6, sp, t6 + addiw s5, s5, -244 + mul t0, t0, s5 + add t0, sp, t0 lui s5, 28 addiw s5, s5, -960 - add t6, t6, s5 - vs8r.v v8, (t6) # Unknown-size Folded Spill + add t0, t0, s5 + vs8r.v v8, (t0) # Unknown-size Folded Spill vle64.v v8, (a0) csrr a0, vlenb - lui t6, 1 - addiw t6, t6, -258 - mul a0, a0, t6 + lui t0, 1 + addiw t0, t0, -252 + mul a0, a0, t0 add a0, sp, a0 - lui t6, 28 - addiw t6, t6, -960 - add a0, a0, t6 + lui t0, 28 + addiw t0, t0, -960 + add a0, a0, t0 vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (a1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -266 + addiw a1, a1, -260 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -154842,7 +154649,7 @@ vle64.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -274 + addiw a1, a1, -268 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -154852,7 +154659,7 @@ vle64.v v8, (a5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -282 + addiw a1, a1, -276 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -154862,7 +154669,7 @@ vle64.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -290 + addiw a1, a1, -284 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -154872,57 +154679,57 @@ vle64.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -298 + addiw a1, a1, -292 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t0) + vle64.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -306 + addiw a1, a1, -300 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t1) + vle64.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -314 + addiw a1, a1, -308 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t2) + vle64.v v8, (t3) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -322 + addiw a1, a1, -316 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t3) + vle64.v v8, (t4) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -330 + addiw a1, a1, -324 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t4) + vle64.v v8, (t5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -338 + addiw a1, a1, -332 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -154932,7 +154739,7 @@ vle64.v v0, (s4) vle64.v v24, (s3) vle64.v v16, (s2) - vle64.v v8, (t5) + vle64.v v8, (t6) lui a0, 4 addiw a0, a0, -384 add s4, sp, a0 @@ -154947,111 +154754,111 @@ vse64.v v16, (s2) lui a0, 4 addiw a0, a0, -768 - add t5, sp, a0 - vse64.v v8, (t5) + add t6, sp, a0 + vse64.v v8, (t6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -332 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 28 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 4 addiw a0, a0, -896 - add t4, sp, a0 + add t5, sp, a0 + vse64.v v8, (t5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -338 + addiw a1, a1, -324 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t4) li a0, 15 slli a0, a0, 10 - add t3, sp, a0 + add t4, sp, a0 + vse64.v v8, (t4) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -330 + addiw a1, a1, -316 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t3) lui a0, 4 addiw a0, a0, -1152 - add t2, sp, a0 + add t3, sp, a0 + vse64.v v8, (t3) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -322 + addiw a1, a1, -308 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t2) lui a0, 4 addiw a0, a0, -1280 - add t1, sp, a0 + add t2, sp, a0 + vse64.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -314 + addiw a1, a1, -300 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t1) lui a0, 4 addiw a0, a0, -1408 - add t0, sp, a0 + add t1, sp, a0 + vse64.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -306 + addiw a1, a1, -292 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t0) li a0, 29 slli a0, a0, 9 add a7, sp, a0 + vse64.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -298 + addiw a1, a1, -284 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a0, 4 addiw a0, a0, -1664 add a6, sp, a0 + vse64.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -290 + addiw a1, a1, -276 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a6) lui a0, 4 addiw a0, a0, -1792 add a5, sp, a0 - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -282 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 28 - addiw a1, a1, -960 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload vse64.v v8, (a5) fld ft2, 1280(sp) # 8-byte Folded Reload fmadd.d ft2, ft2, ft0, ft1 @@ -155095,57 +154902,57 @@ fmadd.d ft2, ft3, ft11, ft2 fld ft3, 1120(sp) # 8-byte Folded Reload fmadd.d ft2, ft3, ft10, ft2 - addi t6, a4, 3 - andi t6, t6, 255 - slli t6, t6, 3 + addi t0, a4, 3 + andi t0, t0, 255 + slli t0, t0, 3 sd a3, 8(sp) sd a5, 0(sp) lui a0, 3 addiw a0, a0, 1792 add s5, sp, a0 - add t6, s5, t6 + add t0, s5, t0 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -268 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 28 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 4 addiw a0, a0, -1920 add a2, sp, a0 + vse64.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -274 + addiw a1, a1, -260 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a2) li a0, 7 slli a0, a0, 11 add a1, sp, a0 + vse64.v v8, (a1) csrr a0, vlenb lui a3, 1 - addiw a3, a3, -266 + addiw a3, a3, -252 mul a0, a0, a3 add a0, sp, a0 lui a3, 28 addiw a3, a3, -960 add a0, a0, a3 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 3 addiw a0, a0, 1920 add a0, sp, a0 - csrr a3, vlenb - lui a5, 1 - addiw a5, a5, -258 - mul a3, a3, a5 - add a3, sp, a3 - lui a5, 28 - addiw a5, a5, -960 - add a3, a3, a5 - vl8r.v v8, (a3) # Unknown-size Folded Reload vse64.v v8, (a0) csrr a3, vlenb lui a5, 1 - addiw a5, a5, -250 + addiw a5, a5, -244 mul a3, a3, a5 add a3, sp, a3 lui a5, 28 @@ -155155,31 +154962,31 @@ vl8r.v v8, (a3) # Unknown-size Folded Reload ld a3, 8(sp) vse64.v v8, (s5) - fsd ft2, 0(t6) + fsd ft2, 0(t0) vle64.v v8, (s5) - csrr t6, vlenb + csrr t0, vlenb lui s5, 1 - addiw s5, s5, -250 - mul t6, t6, s5 - add t6, sp, t6 + addiw s5, s5, -244 + mul t0, t0, s5 + add t0, sp, t0 lui s5, 28 addiw s5, s5, -960 - add t6, t6, s5 - vs8r.v v8, (t6) # Unknown-size Folded Spill + add t0, t0, s5 + vs8r.v v8, (t0) # Unknown-size Folded Spill vle64.v v8, (a0) csrr a0, vlenb - lui t6, 1 - addiw t6, t6, -258 - mul a0, a0, t6 + lui t0, 1 + addiw t0, t0, -252 + mul a0, a0, t0 add a0, sp, a0 - lui t6, 28 - addiw t6, t6, -960 - add a0, a0, t6 + lui t0, 28 + addiw t0, t0, -960 + add a0, a0, t0 vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (a1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -266 + addiw a1, a1, -260 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -155189,7 +154996,7 @@ vle64.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -274 + addiw a1, a1, -268 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -155199,7 +155006,7 @@ vle64.v v8, (a5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -282 + addiw a1, a1, -276 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -155209,7 +155016,7 @@ vle64.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -290 + addiw a1, a1, -284 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -155219,57 +155026,57 @@ vle64.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -298 + addiw a1, a1, -292 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t0) + vle64.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -306 + addiw a1, a1, -300 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t1) + vle64.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -314 + addiw a1, a1, -308 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t2) + vle64.v v8, (t3) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -322 + addiw a1, a1, -316 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t3) + vle64.v v8, (t4) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -330 + addiw a1, a1, -324 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t4) + vle64.v v8, (t5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -338 + addiw a1, a1, -332 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -155279,7 +155086,7 @@ vle64.v v0, (s4) vle64.v v24, (s3) vle64.v v16, (s2) - vle64.v v8, (t5) + vle64.v v8, (t6) lui a0, 3 addiw a0, a0, 1664 add s4, sp, a0 @@ -155294,111 +155101,111 @@ vse64.v v16, (s2) lui a0, 3 addiw a0, a0, 1280 - add t5, sp, a0 - vse64.v v8, (t5) + add t6, sp, a0 + vse64.v v8, (t6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -332 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 28 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 3 addiw a0, a0, 1152 - add t4, sp, a0 + add t5, sp, a0 + vse64.v v8, (t5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -338 + addiw a1, a1, -324 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t4) li a0, 13 slli a0, a0, 10 - add t3, sp, a0 + add t4, sp, a0 + vse64.v v8, (t4) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -330 + addiw a1, a1, -316 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t3) lui a0, 3 addiw a0, a0, 896 - add t2, sp, a0 + add t3, sp, a0 + vse64.v v8, (t3) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -322 + addiw a1, a1, -308 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t2) lui a0, 3 addiw a0, a0, 768 - add t1, sp, a0 + add t2, sp, a0 + vse64.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -314 + addiw a1, a1, -300 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t1) lui a0, 3 addiw a0, a0, 640 - add t0, sp, a0 + add t1, sp, a0 + vse64.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -306 + addiw a1, a1, -292 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t0) li a0, 25 slli a0, a0, 9 add a7, sp, a0 + vse64.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -298 + addiw a1, a1, -284 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a0, 3 addiw a0, a0, 384 add a6, sp, a0 + vse64.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -290 + addiw a1, a1, -276 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a6) lui a0, 3 addiw a0, a0, 256 add a5, sp, a0 - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -282 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 28 - addiw a1, a1, -960 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload vse64.v v8, (a5) fld ft2, 1112(sp) # 8-byte Folded Reload fmadd.d ft2, ft2, ft0, ft1 @@ -155442,56 +155249,56 @@ fmadd.d ft2, ft3, ft11, ft2 fld ft3, 952(sp) # 8-byte Folded Reload fmadd.d ft2, ft3, ft10, ft2 - addi t6, a4, 4 - andi t6, t6, 255 - slli t6, t6, 3 + addi t0, a4, 4 + andi t0, t0, 255 + slli t0, t0, 3 sd a3, 8(sp) sd a5, 0(sp) lui a0, 3 addiw a0, a0, -256 add s5, sp, a0 - add t6, s5, t6 + add t0, s5, t0 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -268 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 28 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 3 addiw a0, a0, 128 add a2, sp, a0 + vse64.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -274 + addiw a1, a1, -260 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a2) lui a0, 3 add a1, sp, a0 + vse64.v v8, (a1) csrr a0, vlenb lui a3, 1 - addiw a3, a3, -266 + addiw a3, a3, -252 mul a0, a0, a3 add a0, sp, a0 lui a3, 28 addiw a3, a3, -960 add a0, a0, a3 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 3 addiw a0, a0, -128 add a0, sp, a0 - csrr a3, vlenb - lui a5, 1 - addiw a5, a5, -258 - mul a3, a3, a5 - add a3, sp, a3 - lui a5, 28 - addiw a5, a5, -960 - add a3, a3, a5 - vl8r.v v8, (a3) # Unknown-size Folded Reload vse64.v v8, (a0) csrr a3, vlenb lui a5, 1 - addiw a5, a5, -250 + addiw a5, a5, -244 mul a3, a3, a5 add a3, sp, a3 lui a5, 28 @@ -155501,31 +155308,31 @@ vl8r.v v8, (a3) # Unknown-size Folded Reload ld a3, 8(sp) vse64.v v8, (s5) - fsd ft2, 0(t6) + fsd ft2, 0(t0) vle64.v v8, (s5) - csrr t6, vlenb + csrr t0, vlenb lui s5, 1 - addiw s5, s5, -250 - mul t6, t6, s5 - add t6, sp, t6 + addiw s5, s5, -244 + mul t0, t0, s5 + add t0, sp, t0 lui s5, 28 addiw s5, s5, -960 - add t6, t6, s5 - vs8r.v v8, (t6) # Unknown-size Folded Spill + add t0, t0, s5 + vs8r.v v8, (t0) # Unknown-size Folded Spill vle64.v v8, (a0) csrr a0, vlenb - lui t6, 1 - addiw t6, t6, -258 - mul a0, a0, t6 + lui t0, 1 + addiw t0, t0, -252 + mul a0, a0, t0 add a0, sp, a0 - lui t6, 28 - addiw t6, t6, -960 - add a0, a0, t6 + lui t0, 28 + addiw t0, t0, -960 + add a0, a0, t0 vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (a1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -266 + addiw a1, a1, -260 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -155535,7 +155342,7 @@ vle64.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -274 + addiw a1, a1, -268 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -155545,7 +155352,7 @@ vle64.v v8, (a5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -282 + addiw a1, a1, -276 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -155555,7 +155362,7 @@ vle64.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -290 + addiw a1, a1, -284 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -155565,57 +155372,57 @@ vle64.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -298 + addiw a1, a1, -292 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t0) + vle64.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -306 + addiw a1, a1, -300 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t1) + vle64.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -314 + addiw a1, a1, -308 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t2) + vle64.v v8, (t3) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -322 + addiw a1, a1, -316 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t3) + vle64.v v8, (t4) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -330 + addiw a1, a1, -324 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t4) + vle64.v v8, (t5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -338 + addiw a1, a1, -332 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -155625,7 +155432,7 @@ vle64.v v0, (s4) vle64.v v24, (s3) vle64.v v16, (s2) - vle64.v v8, (t5) + vle64.v v8, (t6) lui a0, 3 addiw a0, a0, -384 add s4, sp, a0 @@ -155640,111 +155447,111 @@ vse64.v v16, (s2) lui a0, 3 addiw a0, a0, -768 - add t5, sp, a0 - vse64.v v8, (t5) + add t6, sp, a0 + vse64.v v8, (t6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -332 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 28 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 3 addiw a0, a0, -896 - add t4, sp, a0 + add t5, sp, a0 + vse64.v v8, (t5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -338 + addiw a1, a1, -324 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t4) li a0, 11 slli a0, a0, 10 - add t3, sp, a0 + add t4, sp, a0 + vse64.v v8, (t4) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -330 + addiw a1, a1, -316 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t3) lui a0, 3 addiw a0, a0, -1152 - add t2, sp, a0 + add t3, sp, a0 + vse64.v v8, (t3) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -322 + addiw a1, a1, -308 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t2) lui a0, 3 addiw a0, a0, -1280 - add t1, sp, a0 + add t2, sp, a0 + vse64.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -314 + addiw a1, a1, -300 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t1) lui a0, 3 addiw a0, a0, -1408 - add t0, sp, a0 + add t1, sp, a0 + vse64.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -306 + addiw a1, a1, -292 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t0) li a0, 21 slli a0, a0, 9 add a7, sp, a0 + vse64.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -298 + addiw a1, a1, -284 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a0, 3 addiw a0, a0, -1664 add a6, sp, a0 + vse64.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -290 + addiw a1, a1, -276 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a6) lui a0, 3 addiw a0, a0, -1792 add a5, sp, a0 - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -282 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 28 - addiw a1, a1, -960 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload vse64.v v8, (a5) fld ft2, 944(sp) # 8-byte Folded Reload fmadd.d ft2, ft2, ft0, ft1 @@ -155788,57 +155595,57 @@ fmadd.d ft2, ft3, ft11, ft2 fld ft3, 784(sp) # 8-byte Folded Reload fmadd.d ft2, ft3, ft10, ft2 - addi t6, a4, 5 - andi t6, t6, 255 - slli t6, t6, 3 + addi t0, a4, 5 + andi t0, t0, 255 + slli t0, t0, 3 sd a3, 8(sp) sd a5, 0(sp) lui a0, 2 addiw a0, a0, 1792 add s5, sp, a0 - add t6, s5, t6 + add t0, s5, t0 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -268 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 28 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 3 addiw a0, a0, -1920 add a2, sp, a0 + vse64.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -274 + addiw a1, a1, -260 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a2) li a0, 5 slli a0, a0, 11 add a1, sp, a0 + vse64.v v8, (a1) csrr a0, vlenb lui a3, 1 - addiw a3, a3, -266 + addiw a3, a3, -252 mul a0, a0, a3 add a0, sp, a0 lui a3, 28 addiw a3, a3, -960 add a0, a0, a3 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 2 addiw a0, a0, 1920 add a0, sp, a0 - csrr a3, vlenb - lui a5, 1 - addiw a5, a5, -258 - mul a3, a3, a5 - add a3, sp, a3 - lui a5, 28 - addiw a5, a5, -960 - add a3, a3, a5 - vl8r.v v8, (a3) # Unknown-size Folded Reload vse64.v v8, (a0) csrr a3, vlenb lui a5, 1 - addiw a5, a5, -250 + addiw a5, a5, -244 mul a3, a3, a5 add a3, sp, a3 lui a5, 28 @@ -155848,31 +155655,31 @@ vl8r.v v8, (a3) # Unknown-size Folded Reload ld a3, 8(sp) vse64.v v8, (s5) - fsd ft2, 0(t6) + fsd ft2, 0(t0) vle64.v v8, (s5) - csrr t6, vlenb + csrr t0, vlenb lui s5, 1 - addiw s5, s5, -250 - mul t6, t6, s5 - add t6, sp, t6 + addiw s5, s5, -244 + mul t0, t0, s5 + add t0, sp, t0 lui s5, 28 addiw s5, s5, -960 - add t6, t6, s5 - vs8r.v v8, (t6) # Unknown-size Folded Spill + add t0, t0, s5 + vs8r.v v8, (t0) # Unknown-size Folded Spill vle64.v v8, (a0) csrr a0, vlenb - lui t6, 1 - addiw t6, t6, -258 - mul a0, a0, t6 + lui t0, 1 + addiw t0, t0, -252 + mul a0, a0, t0 add a0, sp, a0 - lui t6, 28 - addiw t6, t6, -960 - add a0, a0, t6 + lui t0, 28 + addiw t0, t0, -960 + add a0, a0, t0 vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (a1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -266 + addiw a1, a1, -260 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -155882,7 +155689,7 @@ vle64.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -274 + addiw a1, a1, -268 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -155892,7 +155699,7 @@ vle64.v v8, (a5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -282 + addiw a1, a1, -276 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -155902,7 +155709,7 @@ vle64.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -290 + addiw a1, a1, -284 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -155912,57 +155719,57 @@ vle64.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -298 + addiw a1, a1, -292 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t0) + vle64.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -306 + addiw a1, a1, -300 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t1) + vle64.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -314 + addiw a1, a1, -308 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t2) + vle64.v v8, (t3) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -322 + addiw a1, a1, -316 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t3) + vle64.v v8, (t4) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -330 + addiw a1, a1, -324 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t4) + vle64.v v8, (t5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -338 + addiw a1, a1, -332 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -155972,7 +155779,7 @@ vle64.v v0, (s4) vle64.v v24, (s3) vle64.v v16, (s2) - vle64.v v8, (t5) + vle64.v v8, (t6) lui a0, 2 addiw a0, a0, 1664 add s4, sp, a0 @@ -155987,111 +155794,111 @@ vse64.v v16, (s2) lui a0, 2 addiw a0, a0, 1280 - add t5, sp, a0 - vse64.v v8, (t5) + add t6, sp, a0 + vse64.v v8, (t6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -332 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 28 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 2 addiw a0, a0, 1152 - add t4, sp, a0 + add t5, sp, a0 + vse64.v v8, (t5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -338 + addiw a1, a1, -324 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t4) li a0, 9 slli a0, a0, 10 - add t3, sp, a0 + add t4, sp, a0 + vse64.v v8, (t4) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -330 + addiw a1, a1, -316 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t3) lui a0, 2 addiw a0, a0, 896 - add t2, sp, a0 + add t3, sp, a0 + vse64.v v8, (t3) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -322 + addiw a1, a1, -308 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t2) lui a0, 2 addiw a0, a0, 768 - add t1, sp, a0 + add t2, sp, a0 + vse64.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -314 + addiw a1, a1, -300 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t1) lui a0, 2 addiw a0, a0, 640 - add t0, sp, a0 + add t1, sp, a0 + vse64.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -306 + addiw a1, a1, -292 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t0) li a0, 17 slli a0, a0, 9 add a7, sp, a0 + vse64.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -298 + addiw a1, a1, -284 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a0, 2 addiw a0, a0, 384 add a6, sp, a0 + vse64.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -290 + addiw a1, a1, -276 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a6) lui a0, 2 addiw a0, a0, 256 add a5, sp, a0 - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -282 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 28 - addiw a1, a1, -960 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload vse64.v v8, (a5) fld ft2, 776(sp) # 8-byte Folded Reload fmadd.d ft2, ft2, ft0, ft1 @@ -156135,56 +155942,56 @@ fmadd.d ft2, ft3, ft11, ft2 fld ft3, 616(sp) # 8-byte Folded Reload fmadd.d ft2, ft3, ft10, ft2 - addi t6, a4, 6 - andi t6, t6, 255 - slli t6, t6, 3 + addi t0, a4, 6 + andi t0, t0, 255 + slli t0, t0, 3 sd a3, 8(sp) sd a5, 0(sp) li a0, 31 slli a0, a0, 8 add s5, sp, a0 - add t6, s5, t6 + add t0, s5, t0 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -268 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 28 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 2 addiw a0, a0, 128 add a2, sp, a0 + vse64.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -274 + addiw a1, a1, -260 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a2) lui a0, 2 add a1, sp, a0 + vse64.v v8, (a1) csrr a0, vlenb lui a3, 1 - addiw a3, a3, -266 + addiw a3, a3, -252 mul a0, a0, a3 add a0, sp, a0 lui a3, 28 addiw a3, a3, -960 add a0, a0, a3 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 2 addiw a0, a0, -128 add a0, sp, a0 - csrr a3, vlenb - lui a5, 1 - addiw a5, a5, -258 - mul a3, a3, a5 - add a3, sp, a3 - lui a5, 28 - addiw a5, a5, -960 - add a3, a3, a5 - vl8r.v v8, (a3) # Unknown-size Folded Reload vse64.v v8, (a0) csrr a3, vlenb lui a5, 1 - addiw a5, a5, -250 + addiw a5, a5, -244 mul a3, a3, a5 add a3, sp, a3 lui a5, 28 @@ -156194,31 +156001,31 @@ vl8r.v v8, (a3) # Unknown-size Folded Reload ld a3, 8(sp) vse64.v v8, (s5) - fsd ft2, 0(t6) + fsd ft2, 0(t0) vle64.v v8, (s5) - csrr t6, vlenb + csrr t0, vlenb lui s5, 1 - addiw s5, s5, -250 - mul t6, t6, s5 - add t6, sp, t6 + addiw s5, s5, -244 + mul t0, t0, s5 + add t0, sp, t0 lui s5, 28 addiw s5, s5, -960 - add t6, t6, s5 - vs8r.v v8, (t6) # Unknown-size Folded Spill + add t0, t0, s5 + vs8r.v v8, (t0) # Unknown-size Folded Spill vle64.v v8, (a0) csrr a0, vlenb - lui t6, 1 - addiw t6, t6, -258 - mul a0, a0, t6 + lui t0, 1 + addiw t0, t0, -252 + mul a0, a0, t0 add a0, sp, a0 - lui t6, 28 - addiw t6, t6, -960 - add a0, a0, t6 + lui t0, 28 + addiw t0, t0, -960 + add a0, a0, t0 vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (a1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -266 + addiw a1, a1, -260 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -156228,7 +156035,7 @@ vle64.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -274 + addiw a1, a1, -268 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -156238,7 +156045,7 @@ vle64.v v8, (a5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -282 + addiw a1, a1, -276 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -156248,7 +156055,7 @@ vle64.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -290 + addiw a1, a1, -284 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -156258,57 +156065,57 @@ vle64.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -298 + addiw a1, a1, -292 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t0) + vle64.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -306 + addiw a1, a1, -300 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t1) + vle64.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -314 + addiw a1, a1, -308 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t2) + vle64.v v8, (t3) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -322 + addiw a1, a1, -316 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t3) + vle64.v v8, (t4) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -330 + addiw a1, a1, -324 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t4) + vle64.v v8, (t5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -338 + addiw a1, a1, -332 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -156318,7 +156125,7 @@ vle64.v v0, (s4) vle64.v v24, (s3) vle64.v v16, (s2) - vle64.v v8, (t5) + vle64.v v8, (t6) lui a0, 2 addiw a0, a0, -384 add s4, sp, a0 @@ -156333,113 +156140,112 @@ vse64.v v16, (s2) li a0, 29 slli a0, a0, 8 - add t0, sp, a0 - vse64.v v8, (t0) + add t6, sp, a0 + vse64.v v8, (t6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -332 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 28 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 2 addiw a0, a0, -896 add t5, sp, a0 + vse64.v v8, (t5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -338 + addiw a1, a1, -324 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t5) li a0, 7 slli a0, a0, 10 add t4, sp, a0 + vse64.v v8, (t4) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -330 + addiw a1, a1, -316 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t4) + mv t3, a3 lui a0, 2 addiw a0, a0, -1152 + add a3, sp, a0 + vse64.v v8, (a3) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -308 + mul a0, a0, a1 add a0, sp, a0 - mv t3, a3 - mv a3, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -322 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 28 - addiw a2, a2, -960 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a0) + lui a1, 28 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload li a0, 27 slli a0, a0, 8 add t2, sp, a0 + vse64.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -314 + addiw a1, a1, -300 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t2) lui a0, 2 addiw a0, a0, -1408 add t1, sp, a0 + vse64.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -306 + addiw a1, a1, -292 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t1) li a0, 13 slli a0, a0, 9 add a7, sp, a0 + vse64.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -298 + addiw a1, a1, -284 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a7) lui a0, 2 addiw a0, a0, -1664 add a6, sp, a0 + vse64.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -290 + addiw a1, a1, -276 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a6) li a0, 25 slli a0, a0, 8 add a5, sp, a0 - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -282 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 28 - addiw a1, a1, -960 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload vse64.v v8, (a5) fld ft2, 608(sp) # 8-byte Folded Reload fmadd.d ft2, ft2, ft0, ft1 @@ -156483,57 +156289,57 @@ fmadd.d ft2, ft3, ft11, ft2 fld ft3, 448(sp) # 8-byte Folded Reload fmadd.d ft2, ft3, ft10, ft2 - addi t6, a4, 7 - andi t6, t6, 255 - slli t6, t6, 3 + addi t0, a4, 7 + andi t0, t0, 255 + slli t0, t0, 3 sd a3, 8(sp) sd a5, 0(sp) li a0, 23 slli a0, a0, 8 add s5, sp, a0 - add t6, s5, t6 + add t0, s5, t0 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -268 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 28 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 2 addiw a0, a0, -1920 add a2, sp, a0 + vse64.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -274 + addiw a1, a1, -260 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a2) li a0, 3 slli a0, a0, 11 add a1, sp, a0 + vse64.v v8, (a1) csrr a0, vlenb lui a3, 1 - addiw a3, a3, -266 + addiw a3, a3, -252 mul a0, a0, a3 add a0, sp, a0 lui a3, 28 addiw a3, a3, -960 add a0, a0, a3 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 1 addiw a0, a0, 1920 add a0, sp, a0 - csrr a3, vlenb - lui a5, 1 - addiw a5, a5, -258 - mul a3, a3, a5 - add a3, sp, a3 - lui a5, 28 - addiw a5, a5, -960 - add a3, a3, a5 - vl8r.v v8, (a3) # Unknown-size Folded Reload vse64.v v8, (a0) csrr a3, vlenb lui a5, 1 - addiw a5, a5, -250 + addiw a5, a5, -244 mul a3, a3, a5 add a3, sp, a3 lui a5, 28 @@ -156543,31 +156349,31 @@ vl8r.v v8, (a3) # Unknown-size Folded Reload ld a3, 8(sp) vse64.v v8, (s5) - fsd ft2, 0(t6) + fsd ft2, 0(t0) vle64.v v8, (s5) - csrr t6, vlenb + csrr t0, vlenb lui s5, 1 - addiw s5, s5, -250 - mul t6, t6, s5 - add t6, sp, t6 + addiw s5, s5, -244 + mul t0, t0, s5 + add t0, sp, t0 lui s5, 28 addiw s5, s5, -960 - add t6, t6, s5 - vs8r.v v8, (t6) # Unknown-size Folded Spill + add t0, t0, s5 + vs8r.v v8, (t0) # Unknown-size Folded Spill vle64.v v8, (a0) csrr a0, vlenb - lui t6, 1 - addiw t6, t6, -258 - mul a0, a0, t6 + lui t0, 1 + addiw t0, t0, -252 + mul a0, a0, t0 add a0, sp, a0 - lui t6, 28 - addiw t6, t6, -960 - add a0, a0, t6 + lui t0, 28 + addiw t0, t0, -960 + add a0, a0, t0 vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (a1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -266 + addiw a1, a1, -260 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -156577,7 +156383,7 @@ vle64.v v8, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -274 + addiw a1, a1, -268 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -156587,7 +156393,7 @@ vle64.v v8, (a5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -282 + addiw a1, a1, -276 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -156597,7 +156403,7 @@ vle64.v v8, (a6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -290 + addiw a1, a1, -284 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -156607,7 +156413,7 @@ vle64.v v8, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -298 + addiw a1, a1, -292 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -156617,7 +156423,7 @@ vle64.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -306 + addiw a1, a1, -300 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -156627,7 +156433,7 @@ vle64.v v8, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -314 + addiw a1, a1, -308 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -156637,7 +156443,7 @@ vle64.v v8, (a3) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -322 + addiw a1, a1, -316 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -156647,7 +156453,7 @@ vle64.v v8, (t4) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -330 + addiw a1, a1, -324 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -156657,7 +156463,7 @@ vle64.v v8, (t5) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -338 + addiw a1, a1, -332 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -156667,127 +156473,127 @@ vle64.v v0, (s4) vle64.v v24, (s3) vle64.v v16, (s2) - vle64.v v8, (t0) + vle64.v v8, (t6) lui a0, 1 addiw a0, a0, 1664 add a2, sp, a0 vse64.v v0, (a2) - mv a5, a4 li a0, 11 slli a0, a0, 9 - add a3, sp, a0 - vse64.v v24, (a3) + add a5, sp, a0 + vse64.v v24, (a5) lui a0, 1 addiw a0, a0, 1408 add a6, sp, a0 vse64.v v16, (a6) + mv t2, a4 li a0, 21 slli a0, a0, 8 - add t2, sp, a0 - vse64.v v8, (t2) + add a3, sp, a0 + vse64.v v8, (a3) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -332 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 28 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 1 addiw a0, a0, 1152 add t1, sp, a0 + vse64.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -338 + addiw a1, a1, -324 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t1) li a0, 5 slli a0, a0, 10 add a1, sp, a0 + vse64.v v8, (a1) csrr a0, vlenb lui a4, 1 - addiw a4, a4, -330 + addiw a4, a4, -316 mul a0, a0, a4 add a0, sp, a0 lui a4, 28 addiw a4, a4, -960 add a0, a0, a4 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 1 addiw a0, a0, 896 add a7, sp, a0 + vse64.v v8, (a7) csrr a0, vlenb lui a4, 1 - addiw a4, a4, -322 + addiw a4, a4, -308 mul a0, a0, a4 add a0, sp, a0 lui a4, 28 addiw a4, a4, -960 add a0, a0, a4 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a7) li a0, 19 slli a0, a0, 8 add a4, sp, a0 + vse64.v v8, (a4) csrr a0, vlenb lui t0, 1 - addiw t0, t0, -314 + addiw t0, t0, -300 mul a0, a0, t0 add a0, sp, a0 lui t0, 28 addiw t0, t0, -960 add a0, a0, t0 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a4) lui a0, 1 addiw a0, a0, 640 - add t0, sp, a0 + add t4, sp, a0 + vse64.v v8, (t4) csrr a0, vlenb - lui t4, 1 - addiw t4, t4, -306 - mul a0, a0, t4 + lui t0, 1 + addiw t0, t0, -292 + mul a0, a0, t0 add a0, sp, a0 - lui t4, 28 - addiw t4, t4, -960 - add a0, a0, t4 + lui t0, 28 + addiw t0, t0, -960 + add a0, a0, t0 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t0) li a0, 9 slli a0, a0, 9 - add t4, sp, a0 + add t5, sp, a0 + vse64.v v8, (t5) csrr a0, vlenb - lui t5, 1 - addiw t5, t5, -298 - mul a0, a0, t5 + lui t0, 1 + addiw t0, t0, -284 + mul a0, a0, t0 add a0, sp, a0 - lui t5, 28 - addiw t5, t5, -960 - add a0, a0, t5 + lui t0, 28 + addiw t0, t0, -960 + add a0, a0, t0 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t4) lui a0, 1 addiw a0, a0, 384 - add t5, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui t6, 1 - addiw t6, t6, -290 - mul a0, a0, t6 + lui t0, 1 + addiw t0, t0, -276 + mul a0, a0, t0 add a0, sp, a0 - lui t6, 28 - addiw t6, t6, -960 - add a0, a0, t6 + lui t0, 28 + addiw t0, t0, -960 + add a0, a0, t0 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t5) li a0, 17 slli a0, a0, 8 add s2, sp, a0 - csrr a0, vlenb - lui t6, 1 - addiw t6, t6, -282 - mul a0, a0, t6 - add a0, sp, a0 - lui t6, 28 - addiw t6, t6, -960 - add a0, a0, t6 - vl8r.v v8, (a0) # Unknown-size Folded Reload vse64.v v8, (s2) fld ft2, 440(sp) # 8-byte Folded Reload fmadd.d ft2, ft2, ft0, ft1 @@ -156831,54 +156637,54 @@ fmadd.d ft2, ft3, ft11, ft2 fld ft3, 280(sp) # 8-byte Folded Reload fmadd.d ft2, ft3, ft10, ft2 - addi t6, a5, 8 - andi t6, t6, 255 - slli t6, t6, 3 + addi t0, t2, 8 + andi t0, t0, 255 + slli t0, t0, 3 addi a0, sp, 2047 addi a0, a0, 1793 - add t6, a0, t6 + add t0, a0, t0 sd a1, 8(sp) sd a2, 0(sp) - lui a1, 1 - addiw a1, a1, 128 - add s3, sp, a1 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -274 + addiw a2, a2, -268 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 addiw a2, a2, -960 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (s3) lui a1, 1 - add s4, sp, a1 + addiw a1, a1, 128 + add s3, sp, a1 + vse64.v v8, (s3) csrr a1, vlenb lui a2, 1 - addiw a2, a2, -266 + addiw a2, a2, -260 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 addiw a2, a2, -960 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload + lui a1, 1 + add s4, sp, a1 vse64.v v8, (s4) - addi s5, sp, 2047 - addi s5, s5, 1921 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -258 + addiw a2, a2, -252 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 addiw a2, a2, -960 add a1, a1, a2 vl8r.v v8, (a1) # Unknown-size Folded Reload + addi s5, sp, 2047 + addi s5, s5, 1921 vse64.v v8, (s5) csrr a1, vlenb lui a2, 1 - addiw a2, a2, -250 + addiw a2, a2, -244 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -156888,81 +156694,81 @@ vl8r.v v8, (a1) # Unknown-size Folded Reload ld a1, 8(sp) vse64.v v8, (a0) - fsd ft2, 0(t6) + fsd ft2, 0(t0) vle64.v v8, (a0) csrr a0, vlenb - lui t6, 1 - addiw t6, t6, -250 - mul a0, a0, t6 + lui t0, 1 + addiw t0, t0, -244 + mul a0, a0, t0 add a0, sp, a0 - lui t6, 28 - addiw t6, t6, -960 - add a0, a0, t6 + lui t0, 28 + addiw t0, t0, -960 + add a0, a0, t0 vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (s5) csrr a0, vlenb - lui t6, 1 - addiw t6, t6, -258 - mul a0, a0, t6 + lui t0, 1 + addiw t0, t0, -252 + mul a0, a0, t0 add a0, sp, a0 - lui t6, 28 - addiw t6, t6, -960 - add a0, a0, t6 + lui t0, 28 + addiw t0, t0, -960 + add a0, a0, t0 vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (s4) csrr a0, vlenb - lui t6, 1 - addiw t6, t6, -266 - mul a0, a0, t6 + lui t0, 1 + addiw t0, t0, -260 + mul a0, a0, t0 add a0, sp, a0 - lui t6, 28 - addiw t6, t6, -960 - add a0, a0, t6 + lui t0, 28 + addiw t0, t0, -960 + add a0, a0, t0 vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (s3) csrr a0, vlenb - lui t6, 1 - addiw t6, t6, -274 - mul a0, a0, t6 + lui t0, 1 + addiw t0, t0, -268 + mul a0, a0, t0 add a0, sp, a0 - lui t6, 28 - addiw t6, t6, -960 - add a0, a0, t6 + lui t0, 28 + addiw t0, t0, -960 + add a0, a0, t0 vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (s2) csrr a0, vlenb - lui t6, 1 - addiw t6, t6, -282 - mul a0, a0, t6 + lui t0, 1 + addiw t0, t0, -276 + mul a0, a0, t0 add a0, sp, a0 - lui t6, 28 - addiw t6, t6, -960 - add a0, a0, t6 + lui t0, 28 + addiw t0, t0, -960 + add a0, a0, t0 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t5) + vle64.v v8, (t6) csrr a0, vlenb - lui t5, 1 - addiw t5, t5, -290 - mul a0, a0, t5 + lui t0, 1 + addiw t0, t0, -284 + mul a0, a0, t0 add a0, sp, a0 - lui t5, 28 - addiw t5, t5, -960 - add a0, a0, t5 + lui t0, 28 + addiw t0, t0, -960 + add a0, a0, t0 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t4) + vle64.v v8, (t5) csrr a0, vlenb - lui t4, 1 - addiw t4, t4, -298 - mul a0, a0, t4 + lui t0, 1 + addiw t0, t0, -292 + mul a0, a0, t0 add a0, sp, a0 - lui t4, 28 - addiw t4, t4, -960 - add a0, a0, t4 + lui t0, 28 + addiw t0, t0, -960 + add a0, a0, t0 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t0) + vle64.v v8, (t4) csrr a0, vlenb lui t0, 1 - addiw t0, t0, -306 + addiw t0, t0, -300 mul a0, a0, t0 add a0, sp, a0 lui t0, 28 @@ -156972,7 +156778,7 @@ vle64.v v8, (a4) csrr a0, vlenb lui a4, 1 - addiw a4, a4, -314 + addiw a4, a4, -308 mul a0, a0, a4 add a0, sp, a0 lui a4, 28 @@ -156982,7 +156788,7 @@ vle64.v v8, (a7) csrr a0, vlenb lui a4, 1 - addiw a4, a4, -322 + addiw a4, a4, -316 mul a0, a0, a4 add a0, sp, a0 lui a4, 28 @@ -156992,7 +156798,7 @@ vle64.v v8, (a1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -330 + addiw a1, a1, -324 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -157002,7 +156808,7 @@ vle64.v v8, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -338 + addiw a1, a1, -332 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -157010,10 +156816,10 @@ add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v0, (a2) - vle64.v v24, (a3) - mv a3, t3 + vle64.v v24, (a5) vle64.v v16, (a6) - vle64.v v8, (t2) + vle64.v v8, (a3) + mv a3, t3 addi a0, sp, 2047 addi a0, a0, 1665 vse64.v v0, (a0) @@ -157026,102 +156832,102 @@ addi a4, sp, 2047 addi a4, a4, 1281 vse64.v v8, (a4) + csrr a0, vlenb + lui a5, 1 + addiw a5, a5, -332 + mul a0, a0, a5 + add a0, sp, a0 + lui a5, 28 + addiw a5, a5, -960 + add a0, a0, a5 + vl8r.v v8, (a0) # Unknown-size Folded Reload + addi a5, sp, 2047 + addi a5, a5, 1153 + vse64.v v8, (a5) + csrr a0, vlenb + lui a6, 1 + addiw a6, a6, -324 + mul a0, a0, a6 + add a0, sp, a0 + lui a6, 28 + addiw a6, a6, -960 + add a0, a0, a6 + vl8r.v v8, (a0) # Unknown-size Folded Reload addi a6, sp, 2047 - addi a6, a6, 1153 + addi a6, a6, 1025 + vse64.v v8, (a6) csrr a0, vlenb lui a7, 1 - addiw a7, a7, -338 + addiw a7, a7, -316 mul a0, a0, a7 add a0, sp, a0 lui a7, 28 addiw a7, a7, -960 add a0, a0, a7 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a6) addi a7, sp, 2047 - addi a7, a7, 1025 + addi a7, a7, 897 + vse64.v v8, (a7) csrr a0, vlenb lui t0, 1 - addiw t0, t0, -330 + addiw t0, t0, -308 mul a0, a0, t0 add a0, sp, a0 lui t0, 28 addiw t0, t0, -960 add a0, a0, t0 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a7) - addi t0, sp, 2047 - addi t0, t0, 897 - csrr a0, vlenb - lui t1, 1 - addiw t1, t1, -322 - mul a0, a0, t1 - add a0, sp, a0 - lui t1, 28 - addiw t1, t1, -960 - add a0, a0, t1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t0) addi t1, sp, 2047 addi t1, t1, 769 - csrr a0, vlenb - lui t2, 1 - addiw t2, t2, -314 - mul a0, a0, t2 - add a0, sp, a0 - lui t2, 28 - addiw t2, t2, -960 - add a0, a0, t2 - vl8r.v v8, (a0) # Unknown-size Folded Reload vse64.v v8, (t1) - addi t2, sp, 2047 - addi t2, t2, 641 csrr a0, vlenb - lui t3, 1 - addiw t3, t3, -306 - mul a0, a0, t3 + lui t0, 1 + addiw t0, t0, -300 + mul a0, a0, t0 add a0, sp, a0 - lui t3, 28 - addiw t3, t3, -960 - add a0, a0, t3 + lui t0, 28 + addiw t0, t0, -960 + add a0, a0, t0 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t2) addi t3, sp, 2047 - addi t3, t3, 513 + addi t3, t3, 641 + vse64.v v8, (t3) csrr a0, vlenb - lui t4, 1 - addiw t4, t4, -298 - mul a0, a0, t4 + lui t0, 1 + addiw t0, t0, -292 + mul a0, a0, t0 add a0, sp, a0 - lui t4, 28 - addiw t4, t4, -960 - add a0, a0, t4 + lui t0, 28 + addiw t0, t0, -960 + add a0, a0, t0 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t3) addi t4, sp, 2047 - addi t4, t4, 385 + addi t4, t4, 513 + vse64.v v8, (t4) csrr a0, vlenb - lui t5, 1 - addiw t5, t5, -290 - mul a0, a0, t5 + lui t0, 1 + addiw t0, t0, -284 + mul a0, a0, t0 add a0, sp, a0 - lui t5, 28 - addiw t5, t5, -960 - add a0, a0, t5 + lui t0, 28 + addiw t0, t0, -960 + add a0, a0, t0 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t4) addi t5, sp, 2047 - addi t5, t5, 257 + addi t5, t5, 385 + vse64.v v8, (t5) csrr a0, vlenb - lui t6, 1 - addiw t6, t6, -282 - mul a0, a0, t6 + lui t0, 1 + addiw t0, t0, -276 + mul a0, a0, t0 add a0, sp, a0 - lui t6, 28 - addiw t6, t6, -960 - add a0, a0, t6 + lui t0, 28 + addiw t0, t0, -960 + add a0, a0, t0 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t5) + addi t6, sp, 2047 + addi t6, t6, 257 + vse64.v v8, (t6) fld ft2, 272(sp) # 8-byte Folded Reload fmadd.d ft0, ft2, ft0, ft1 fld ft1, 264(sp) # 8-byte Folded Reload @@ -157156,50 +156962,50 @@ fmadd.d fa5, fa7, fs0, fa5 fmadd.d fa5, ft8, ft11, fa5 fmadd.d fa5, ft9, ft10, fa5 - addi t6, a5, 9 - andi t6, t6, 255 - slli t6, t6, 3 + addi t0, t2, 9 + andi t0, t0, 255 + slli t0, t0, 3 addi a0, sp, 1792 - add t6, a0, t6 + add t0, a0, t0 + sd a1, 8(sp) + csrr a1, vlenb + lui s2, 1 + addiw s2, s2, -268 + mul a1, a1, s2 + add a1, sp, a1 + lui s2, 28 + addiw s2, s2, -960 + add a1, a1, s2 + vl8r.v v8, (a1) # Unknown-size Folded Reload addi s2, sp, 2047 addi s2, s2, 129 - sd a1, 8(sp) + vse64.v v8, (s2) csrr a1, vlenb lui s3, 1 - addiw s3, s3, -274 + addiw s3, s3, -260 mul a1, a1, s3 add a1, sp, a1 lui s3, 28 addiw s3, s3, -960 add a1, a1, s3 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (s2) addi s3, sp, 2047 addi s3, s3, 1 + vse64.v v8, (s3) csrr a1, vlenb lui s4, 1 - addiw s4, s4, -266 + addiw s4, s4, -252 mul a1, a1, s4 add a1, sp, a1 lui s4, 28 addiw s4, s4, -960 add a1, a1, s4 vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (s3) addi s4, sp, 1920 - csrr a1, vlenb - lui s5, 1 - addiw s5, s5, -258 - mul a1, a1, s5 - add a1, sp, a1 - lui s5, 28 - addiw s5, s5, -960 - add a1, a1, s5 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (s4) csrr s5, vlenb lui a1, 1 - addiw a1, a1, -250 + addiw a1, a1, -244 mul s5, s5, a1 add s5, sp, s5 lui a1, 28 @@ -157208,23 +157014,23 @@ ld a1, 8(sp) vl8r.v v8, (s5) # Unknown-size Folded Reload vse64.v v8, (a0) - fsd fa5, 0(t6) + fsd fa5, 0(t0) vle64.v v16, (a2) csrr a2, vlenb - lui t6, 1 - addiw t6, t6, -338 - mul a2, a2, t6 + lui t0, 1 + addiw t0, t0, -332 + mul a2, a2, t0 add a2, sp, a2 - lui t6, 28 - addiw t6, t6, -960 - add a2, a2, t6 + lui t0, 28 + addiw t0, t0, -960 + add a2, a2, t0 vs8r.v v16, (a2) # Unknown-size Folded Spill vle64.v v0, (a1) vsetivli zero, 1, e64, m8, ta, ma vslidedown.vi v8, v16, 15 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -618 + addiw a2, a2, -612 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157234,7 +157040,7 @@ vslidedown.vi v8, v16, 14 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -626 + addiw a2, a2, -620 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157244,7 +157050,7 @@ vslidedown.vi v8, v16, 13 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -634 + addiw a2, a2, -628 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157254,7 +157060,7 @@ vslidedown.vi v8, v16, 12 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -610 + addiw a2, a2, -604 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157264,7 +157070,7 @@ vslidedown.vi v8, v16, 11 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -642 + addiw a2, a2, -636 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157274,7 +157080,7 @@ vslidedown.vi v8, v16, 10 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -650 + addiw a2, a2, -644 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157284,7 +157090,7 @@ vslidedown.vi v8, v16, 9 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -666 + addiw a2, a2, -660 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157294,7 +157100,7 @@ vslidedown.vi v8, v16, 8 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -674 + addiw a2, a2, -668 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157305,7 +157111,7 @@ vle64.v v24, (a4) csrr a1, vlenb lui a2, 1 - addiw a2, a2, -978 + addiw a2, a2, -972 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157316,7 +157122,7 @@ vslidedown.vi v8, v24, 15 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -682 + addiw a2, a2, -676 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157326,7 +157132,7 @@ vslidedown.vi v8, v24, 14 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -690 + addiw a2, a2, -684 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157336,7 +157142,7 @@ vslidedown.vi v8, v24, 13 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -698 + addiw a2, a2, -692 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157346,7 +157152,7 @@ vslidedown.vi v8, v24, 12 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -706 + addiw a2, a2, -700 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157356,7 +157162,7 @@ vslidedown.vi v8, v24, 11 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -714 + addiw a2, a2, -708 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157366,7 +157172,7 @@ vslidedown.vi v8, v24, 10 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -722 + addiw a2, a2, -716 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157376,7 +157182,7 @@ vslidedown.vi v8, v24, 9 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -730 + addiw a2, a2, -724 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157386,7 +157192,7 @@ vslidedown.vi v8, v24, 8 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -658 + addiw a2, a2, -652 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157394,10 +157200,10 @@ add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill vsetivli zero, 16, e64, m8, ta, ma - vle64.v v16, (a6) + vle64.v v16, (a5) csrr a1, vlenb lui a2, 1 - addiw a2, a2, -274 + addiw a2, a2, -268 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157408,7 +157214,7 @@ vslidedown.vi v8, v16, 15 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -738 + addiw a2, a2, -732 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157418,7 +157224,7 @@ vslidedown.vi v8, v16, 14 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -370 + addiw a2, a2, -364 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157428,7 +157234,7 @@ vslidedown.vi v8, v16, 13 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -746 + addiw a2, a2, -740 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157438,7 +157244,7 @@ vslidedown.vi v8, v16, 12 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -762 + addiw a2, a2, -756 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157448,7 +157254,7 @@ vslidedown.vi v8, v16, 11 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -778 + addiw a2, a2, -772 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157458,7 +157264,7 @@ vslidedown.vi v8, v16, 10 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -794 + addiw a2, a2, -788 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157468,7 +157274,7 @@ vslidedown.vi v8, v16, 9 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -802 + addiw a2, a2, -796 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157478,7 +157284,7 @@ vslidedown.vi v8, v16, 8 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -810 + addiw a2, a2, -804 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157486,10 +157292,10 @@ add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill vsetivli zero, 16, e64, m8, ta, ma - vle64.v v16, (a7) + vle64.v v16, (a6) csrr a1, vlenb lui a2, 1 - addiw a2, a2, -250 + addiw a2, a2, -244 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157500,7 +157306,7 @@ vslidedown.vi v8, v16, 15 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -490 + addiw a2, a2, -484 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157510,7 +157316,7 @@ vslidedown.vi v8, v16, 14 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -498 + addiw a2, a2, -492 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157520,7 +157326,7 @@ vslidedown.vi v8, v16, 13 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -506 + addiw a2, a2, -500 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157530,7 +157336,7 @@ vslidedown.vi v8, v16, 12 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -514 + addiw a2, a2, -508 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157540,7 +157346,7 @@ vslidedown.vi v8, v16, 11 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -522 + addiw a2, a2, -516 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157550,7 +157356,7 @@ vslidedown.vi v8, v16, 10 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -354 + addiw a2, a2, -348 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157560,7 +157366,7 @@ vslidedown.vi v8, v16, 9 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1482 + addiw a2, a2, -1476 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157570,7 +157376,7 @@ vslidedown.vi v8, v16, 8 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1506 + addiw a2, a2, -1500 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157578,10 +157384,10 @@ add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill vsetivli zero, 16, e64, m8, ta, ma - vle64.v v16, (t0) + vle64.v v16, (a7) csrr a1, vlenb lui a2, 1 - addiw a2, a2, -346 + addiw a2, a2, -340 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157592,7 +157398,7 @@ vslidedown.vi v8, v16, 15 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -890 + addiw a2, a2, -884 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157602,7 +157408,7 @@ vslidedown.vi v8, v16, 14 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -898 + addiw a2, a2, -892 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157612,7 +157418,7 @@ vslidedown.vi v8, v16, 13 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -906 + addiw a2, a2, -900 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157622,7 +157428,7 @@ vslidedown.vi v8, v16, 12 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -914 + addiw a2, a2, -908 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157632,7 +157438,7 @@ vslidedown.vi v8, v16, 11 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -922 + addiw a2, a2, -916 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157642,7 +157448,7 @@ vslidedown.vi v8, v16, 10 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -930 + addiw a2, a2, -924 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157652,7 +157458,7 @@ vslidedown.vi v8, v16, 9 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -946 + addiw a2, a2, -940 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157662,7 +157468,7 @@ vslidedown.vi v8, v16, 8 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -962 + addiw a2, a2, -956 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157673,7 +157479,7 @@ vle64.v v16, (t1) csrr a1, vlenb lui a2, 1 - addiw a2, a2, -282 + addiw a2, a2, -276 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157684,7 +157490,7 @@ vslidedown.vi v8, v16, 15 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1010 + addiw a2, a2, -1004 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157694,7 +157500,7 @@ vslidedown.vi v8, v16, 14 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1026 + addiw a2, a2, -1020 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157704,7 +157510,7 @@ vslidedown.vi v8, v16, 13 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1034 + addiw a2, a2, -1028 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157714,7 +157520,7 @@ vslidedown.vi v8, v16, 12 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -378 + addiw a2, a2, -372 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157724,7 +157530,7 @@ vslidedown.vi v8, v16, 11 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1042 + addiw a2, a2, -1036 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157734,7 +157540,7 @@ vslidedown.vi v8, v16, 10 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1050 + addiw a2, a2, -1044 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157744,7 +157550,7 @@ vslidedown.vi v8, v16, 9 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1058 + addiw a2, a2, -1052 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157754,7 +157560,7 @@ vslidedown.vi v8, v16, 8 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1074 + addiw a2, a2, -1068 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157762,10 +157568,10 @@ add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill vsetivli zero, 16, e64, m8, ta, ma - vle64.v v16, (t2) + vle64.v v16, (t3) csrr a1, vlenb lui a2, 1 - addiw a2, a2, -290 + addiw a2, a2, -284 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157776,7 +157582,7 @@ vslidedown.vi v8, v16, 15 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1122 + addiw a2, a2, -1116 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157786,7 +157592,7 @@ vslidedown.vi v8, v16, 14 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1130 + addiw a2, a2, -1124 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157796,7 +157602,7 @@ vslidedown.vi v8, v16, 13 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1138 + addiw a2, a2, -1132 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157806,7 +157612,7 @@ vslidedown.vi v8, v16, 12 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1146 + addiw a2, a2, -1140 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157816,7 +157622,7 @@ vslidedown.vi v8, v16, 11 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1154 + addiw a2, a2, -1148 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157826,7 +157632,7 @@ vslidedown.vi v8, v16, 10 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1162 + addiw a2, a2, -1156 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157836,7 +157642,7 @@ vslidedown.vi v8, v16, 9 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1170 + addiw a2, a2, -1164 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157846,7 +157652,7 @@ vslidedown.vi v8, v16, 8 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -386 + addiw a2, a2, -380 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157854,10 +157660,10 @@ add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill vsetivli zero, 16, e64, m8, ta, ma - vle64.v v16, (t3) + vle64.v v16, (t4) csrr a1, vlenb lui a2, 1 - addiw a2, a2, -298 + addiw a2, a2, -292 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157868,7 +157674,7 @@ vslidedown.vi v8, v16, 15 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1178 + addiw a2, a2, -1172 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157878,7 +157684,7 @@ vslidedown.vi v8, v16, 14 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -402 + addiw a2, a2, -396 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157888,7 +157694,7 @@ vslidedown.vi v8, v16, 13 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1186 + addiw a2, a2, -1180 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157898,7 +157704,7 @@ vslidedown.vi v8, v16, 12 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1202 + addiw a2, a2, -1196 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157908,7 +157714,7 @@ vslidedown.vi v8, v16, 11 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1218 + addiw a2, a2, -1212 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157918,7 +157724,7 @@ vslidedown.vi v8, v16, 10 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1234 + addiw a2, a2, -1228 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157928,7 +157734,7 @@ vslidedown.vi v8, v16, 9 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1242 + addiw a2, a2, -1236 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157938,7 +157744,7 @@ vslidedown.vi v8, v16, 8 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1258 + addiw a2, a2, -1252 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157946,10 +157752,10 @@ add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill vsetivli zero, 16, e64, m8, ta, ma - vle64.v v16, (t4) + vle64.v v16, (t5) csrr a1, vlenb lui a2, 1 - addiw a2, a2, -258 + addiw a2, a2, -252 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157960,7 +157766,7 @@ vslidedown.vi v8, v16, 15 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -530 + addiw a2, a2, -524 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157970,7 +157776,7 @@ vslidedown.vi v8, v16, 14 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -538 + addiw a2, a2, -532 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157980,7 +157786,7 @@ vslidedown.vi v8, v16, 13 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -546 + addiw a2, a2, -540 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -157990,7 +157796,7 @@ vslidedown.vi v8, v16, 12 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -554 + addiw a2, a2, -548 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158000,7 +157806,7 @@ vslidedown.vi v8, v16, 11 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -562 + addiw a2, a2, -556 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158010,7 +157816,7 @@ vslidedown.vi v8, v16, 10 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -362 + addiw a2, a2, -356 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158020,7 +157826,7 @@ vslidedown.vi v8, v16, 9 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1730 + addiw a2, a2, -1724 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158030,7 +157836,7 @@ vslidedown.vi v8, v16, 8 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1738 + addiw a2, a2, -1732 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158038,10 +157844,10 @@ add a1, a1, a2 vs8r.v v8, (a1) # Unknown-size Folded Spill vsetivli zero, 16, e64, m8, ta, ma - vle64.v v16, (t5) + vle64.v v16, (t6) csrr a1, vlenb lui a2, 1 - addiw a2, a2, -306 + addiw a2, a2, -300 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158052,7 +157858,7 @@ vslidedown.vi v8, v16, 15 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1330 + addiw a2, a2, -1324 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158062,7 +157868,7 @@ vslidedown.vi v8, v16, 14 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1338 + addiw a2, a2, -1332 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158072,7 +157878,7 @@ vslidedown.vi v8, v16, 13 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1346 + addiw a2, a2, -1340 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158082,7 +157888,7 @@ vslidedown.vi v8, v16, 12 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1354 + addiw a2, a2, -1348 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158092,7 +157898,7 @@ vslidedown.vi v8, v16, 11 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1362 + addiw a2, a2, -1356 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158102,7 +157908,7 @@ vslidedown.vi v8, v16, 10 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1378 + addiw a2, a2, -1372 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158112,7 +157918,7 @@ vslidedown.vi v8, v16, 9 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1394 + addiw a2, a2, -1388 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158122,7 +157928,7 @@ vslidedown.vi v8, v16, 8 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1410 + addiw a2, a2, -1404 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158133,7 +157939,7 @@ vle64.v v16, (s2) csrr a1, vlenb lui a2, 1 - addiw a2, a2, -314 + addiw a2, a2, -308 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158144,7 +157950,7 @@ vslidedown.vi v8, v16, 15 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1450 + addiw a2, a2, -1444 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158154,7 +157960,7 @@ vslidedown.vi v8, v16, 14 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1458 + addiw a2, a2, -1452 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158164,7 +157970,7 @@ vslidedown.vi v8, v16, 13 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1466 + addiw a2, a2, -1460 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158174,7 +157980,7 @@ vslidedown.vi v8, v16, 12 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -426 + addiw a2, a2, -420 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158184,7 +157990,7 @@ vslidedown.vi v8, v16, 11 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1474 + addiw a2, a2, -1468 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158194,7 +158000,7 @@ vslidedown.vi v8, v16, 10 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1498 + addiw a2, a2, -1492 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158204,7 +158010,7 @@ vslidedown.vi v8, v16, 9 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1522 + addiw a2, a2, -1516 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158214,7 +158020,7 @@ vslidedown.vi v8, v16, 8 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1538 + addiw a2, a2, -1532 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158225,7 +158031,7 @@ vle64.v v16, (s3) csrr a1, vlenb lui a2, 1 - addiw a2, a2, -322 + addiw a2, a2, -316 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158236,7 +158042,7 @@ vslidedown.vi v8, v16, 15 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1570 + addiw a2, a2, -1564 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158246,7 +158052,7 @@ vslidedown.vi v8, v16, 14 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1578 + addiw a2, a2, -1572 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158256,7 +158062,7 @@ vslidedown.vi v8, v16, 13 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1586 + addiw a2, a2, -1580 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158266,7 +158072,7 @@ vslidedown.vi v8, v16, 12 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1594 + addiw a2, a2, -1588 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158276,7 +158082,7 @@ vslidedown.vi v8, v16, 11 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1602 + addiw a2, a2, -1596 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158286,7 +158092,7 @@ vslidedown.vi v8, v16, 10 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1610 + addiw a2, a2, -1604 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158296,7 +158102,7 @@ vslidedown.vi v8, v16, 9 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1618 + addiw a2, a2, -1612 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158306,7 +158112,7 @@ vslidedown.vi v8, v16, 8 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -434 + addiw a2, a2, -428 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158317,7 +158123,7 @@ vle64.v v16, (s4) csrr a1, vlenb lui a2, 1 - addiw a2, a2, -330 + addiw a2, a2, -324 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158328,7 +158134,7 @@ vslidedown.vi v8, v16, 15 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1626 + addiw a2, a2, -1620 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158338,7 +158144,7 @@ vslidedown.vi v8, v16, 14 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -450 + addiw a2, a2, -444 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158348,7 +158154,7 @@ vslidedown.vi v8, v16, 13 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1658 + addiw a2, a2, -1652 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158358,7 +158164,7 @@ vslidedown.vi v8, v16, 12 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1674 + addiw a2, a2, -1668 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158368,7 +158174,7 @@ vslidedown.vi v8, v16, 11 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1690 + addiw a2, a2, -1684 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158378,7 +158184,7 @@ vslidedown.vi v8, v16, 10 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1706 + addiw a2, a2, -1700 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158388,7 +158194,7 @@ vslidedown.vi v8, v16, 9 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1714 + addiw a2, a2, -1708 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158398,7 +158204,7 @@ vslidedown.vi v8, v16, 8 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1722 + addiw a2, a2, -1716 mul a1, a1, a2 add a1, sp, a1 lui a2, 28 @@ -158409,7 +158215,7 @@ vle64.v v16, (a0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -266 + addiw a1, a1, -260 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158420,7 +158226,7 @@ vslidedown.vi v8, v16, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1778 + addiw a1, a1, -1772 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158430,7 +158236,7 @@ vslidedown.vi v8, v16, 14 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -570 + addiw a1, a1, -564 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158440,7 +158246,7 @@ vslidedown.vi v8, v16, 13 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -578 + addiw a1, a1, -572 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158450,7 +158256,7 @@ vslidedown.vi v8, v16, 12 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -586 + addiw a1, a1, -580 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158460,7 +158266,7 @@ vslidedown.vi v8, v16, 11 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -594 + addiw a1, a1, -588 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158470,7 +158276,7 @@ vslidedown.vi v8, v16, 10 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -466 + addiw a1, a1, -460 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158480,7 +158286,7 @@ vslidedown.vi v8, v16, 9 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1962 + addiw a1, a1, -1956 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158490,7 +158296,7 @@ vslidedown.vi v8, v16, 8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1978 + addiw a1, a1, -1972 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158502,7 +158308,7 @@ vslidedown.vi v16, v0, 5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -754 + addiw a1, a1, -748 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158512,7 +158318,7 @@ vslidedown.vi v16, v0, 4 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -770 + addiw a1, a1, -764 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158523,7 +158329,7 @@ vslidedown.vi v16, v8, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -786 + addiw a1, a1, -780 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158533,7 +158339,7 @@ vslidedown.vi v16, v8, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -818 + addiw a1, a1, -812 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158544,7 +158350,7 @@ vmv1r.v v16, v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -602 + addiw a1, a1, -596 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158553,7 +158359,7 @@ vs8r.v v0, (a0) # Unknown-size Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, -338 + addiw a1, a1, -332 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158563,7 +158369,7 @@ vslidedown.vi v16, v16, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -826 + addiw a1, a1, -820 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158574,7 +158380,7 @@ vslidedown.vi v16, v8, 7 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -842 + addiw a1, a1, -836 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158584,7 +158390,7 @@ vslidedown.vi v16, v8, 6 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -850 + addiw a1, a1, -844 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158594,7 +158400,7 @@ vslidedown.vi v16, v8, 5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -858 + addiw a1, a1, -852 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158604,7 +158410,7 @@ vslidedown.vi v16, v8, 4 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -866 + addiw a1, a1, -860 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158615,7 +158421,7 @@ vslidedown.vi v16, v8, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -874 + addiw a1, a1, -868 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158625,7 +158431,7 @@ vslidedown.vi v16, v8, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -834 + addiw a1, a1, -828 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158636,7 +158442,7 @@ vslidedown.vi v16, v8, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -882 + addiw a1, a1, -876 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158647,7 +158453,7 @@ vslidedown.vi v16, v24, 7 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -938 + addiw a1, a1, -932 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158657,7 +158463,7 @@ vslidedown.vi v16, v24, 6 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -954 + addiw a1, a1, -948 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158667,7 +158473,7 @@ vslidedown.vi v16, v24, 5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -970 + addiw a1, a1, -964 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158677,7 +158483,7 @@ vslidedown.vi v8, v24, 4 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1018 + addiw a1, a1, -1012 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158688,7 +158494,7 @@ vslidedown.vi v8, v24, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -986 + addiw a1, a1, -980 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158698,7 +158504,7 @@ vslidedown.vi v8, v24, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -994 + addiw a1, a1, -988 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158709,7 +158515,7 @@ vslidedown.vi v8, v24, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1002 + addiw a1, a1, -996 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158719,7 +158525,7 @@ vsetivli zero, 1, e64, m4, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -274 + addiw a1, a1, -268 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158729,7 +158535,7 @@ vslidedown.vi v8, v24, 7 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1066 + addiw a1, a1, -1060 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158739,7 +158545,7 @@ vslidedown.vi v8, v24, 6 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1082 + addiw a1, a1, -1076 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158749,7 +158555,7 @@ vslidedown.vi v8, v24, 5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1090 + addiw a1, a1, -1084 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158759,7 +158565,7 @@ vslidedown.vi v16, v24, 4 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -394 + addiw a1, a1, -388 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158770,7 +158576,7 @@ vslidedown.vi v8, v24, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1098 + addiw a1, a1, -1092 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158780,7 +158586,7 @@ vslidedown.vi v8, v24, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1106 + addiw a1, a1, -1100 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158791,7 +158597,7 @@ vslidedown.vi v8, v24, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1114 + addiw a1, a1, -1108 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158801,7 +158607,7 @@ vsetivli zero, 1, e64, m4, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -250 + addiw a1, a1, -244 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158811,7 +158617,7 @@ vslidedown.vi v8, v24, 7 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1754 + addiw a1, a1, -1748 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158821,7 +158627,7 @@ vslidedown.vi v8, v24, 6 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1770 + addiw a1, a1, -1764 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158831,7 +158637,7 @@ vslidedown.vi v8, v24, 5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1794 + addiw a1, a1, -1788 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158841,7 +158647,7 @@ vslidedown.vi v8, v24, 4 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1810 + addiw a1, a1, -1804 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158852,7 +158658,7 @@ vslidedown.vi v8, v24, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1826 + addiw a1, a1, -1820 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158862,7 +158668,7 @@ vslidedown.vi v8, v24, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1842 + addiw a1, a1, -1836 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158872,7 +158678,7 @@ vsetivli zero, 1, e64, m1, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -346 + addiw a1, a1, -340 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158882,7 +158688,7 @@ vslidedown.vi v8, v24, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1850 + addiw a1, a1, -1844 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158893,7 +158699,7 @@ vslidedown.vi v8, v16, 7 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1194 + addiw a1, a1, -1188 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158903,7 +158709,7 @@ vslidedown.vi v8, v16, 6 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -410 + addiw a1, a1, -404 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158913,7 +158719,7 @@ vslidedown.vi v8, v16, 5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1210 + addiw a1, a1, -1204 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158923,7 +158729,7 @@ vslidedown.vi v8, v16, 4 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1226 + addiw a1, a1, -1220 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158934,7 +158740,7 @@ vslidedown.vi v8, v16, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1250 + addiw a1, a1, -1244 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158944,7 +158750,7 @@ vslidedown.vi v8, v16, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1266 + addiw a1, a1, -1260 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158955,7 +158761,7 @@ vslidedown.vi v8, v16, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1274 + addiw a1, a1, -1268 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158965,7 +158771,7 @@ vsetivli zero, 1, e64, m4, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -282 + addiw a1, a1, -276 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158975,7 +158781,7 @@ vslidedown.vi v8, v16, 7 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1282 + addiw a1, a1, -1276 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158985,7 +158791,7 @@ vslidedown.vi v8, v16, 6 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1290 + addiw a1, a1, -1284 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -158995,7 +158801,7 @@ vslidedown.vi v8, v16, 5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1298 + addiw a1, a1, -1292 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159005,7 +158811,7 @@ vslidedown.vi v8, v16, 4 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1306 + addiw a1, a1, -1300 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159016,7 +158822,7 @@ vslidedown.vi v8, v16, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1314 + addiw a1, a1, -1308 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159026,7 +158832,7 @@ vslidedown.vi v8, v16, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -418 + addiw a1, a1, -412 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159037,7 +158843,7 @@ vslidedown.vi v8, v16, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1322 + addiw a1, a1, -1316 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159047,7 +158853,7 @@ vsetivli zero, 1, e64, m4, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -290 + addiw a1, a1, -284 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159057,7 +158863,7 @@ vslidedown.vi v8, v16, 7 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1370 + addiw a1, a1, -1364 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159067,7 +158873,7 @@ vslidedown.vi v8, v16, 6 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1386 + addiw a1, a1, -1380 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159077,7 +158883,7 @@ vslidedown.vi v8, v16, 5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1402 + addiw a1, a1, -1396 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159087,7 +158893,7 @@ vslidedown.vi v8, v16, 4 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1418 + addiw a1, a1, -1412 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159098,7 +158904,7 @@ vslidedown.vi v8, v16, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1426 + addiw a1, a1, -1420 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159108,7 +158914,7 @@ vslidedown.vi v8, v16, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1434 + addiw a1, a1, -1428 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159119,7 +158925,7 @@ vslidedown.vi v8, v16, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1442 + addiw a1, a1, -1436 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159129,7 +158935,7 @@ vsetivli zero, 1, e64, m4, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -298 + addiw a1, a1, -292 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159139,7 +158945,7 @@ vslidedown.vi v8, v16, 7 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1490 + addiw a1, a1, -1484 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159149,7 +158955,7 @@ vslidedown.vi v8, v16, 6 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1514 + addiw a1, a1, -1508 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159159,7 +158965,7 @@ vslidedown.vi v8, v16, 5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1530 + addiw a1, a1, -1524 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159169,7 +158975,7 @@ vslidedown.vi v8, v16, 4 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -442 + addiw a1, a1, -436 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159180,7 +158986,7 @@ vslidedown.vi v8, v16, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1546 + addiw a1, a1, -1540 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159190,7 +158996,7 @@ vslidedown.vi v8, v16, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1554 + addiw a1, a1, -1548 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159201,7 +159007,7 @@ vslidedown.vi v8, v16, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1562 + addiw a1, a1, -1556 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159211,7 +159017,7 @@ vsetivli zero, 1, e64, m4, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -258 + addiw a1, a1, -252 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159221,7 +159027,7 @@ vslidedown.vi v8, v16, 7 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1946 + addiw a1, a1, -1940 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159231,7 +159037,7 @@ vslidedown.vi v8, v16, 6 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1970 + addiw a1, a1, -1964 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159241,7 +159047,7 @@ vslidedown.vi v8, v16, 5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1994 + addiw a1, a1, -1988 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159251,7 +159057,7 @@ vslidedown.vi v8, v16, 4 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2002 + addiw a1, a1, -1996 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159262,7 +159068,7 @@ vslidedown.vi v8, v16, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2010 + addiw a1, a1, -2004 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159272,7 +159078,7 @@ vslidedown.vi v8, v16, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2018 + addiw a1, a1, -2012 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159283,7 +159089,7 @@ vslidedown.vi v8, v16, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2026 + addiw a1, a1, -2020 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159292,7 +159098,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, -266 + addiw a1, a1, -260 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159302,7 +159108,7 @@ vsetivli zero, 1, e64, m4, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -306 + addiw a1, a1, -300 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159312,7 +159118,7 @@ vslidedown.vi v8, v16, 7 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1634 + addiw a1, a1, -1628 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159322,7 +159128,7 @@ vslidedown.vi v8, v16, 6 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -458 + addiw a1, a1, -452 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159332,7 +159138,7 @@ vslidedown.vi v8, v16, 5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1642 + addiw a1, a1, -1636 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159342,7 +159148,7 @@ vslidedown.vi v8, v16, 4 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1650 + addiw a1, a1, -1644 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159353,7 +159159,7 @@ vslidedown.vi v8, v16, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1666 + addiw a1, a1, -1660 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159363,7 +159169,7 @@ vslidedown.vi v8, v16, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1682 + addiw a1, a1, -1676 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159374,7 +159180,7 @@ vslidedown.vi v8, v16, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1698 + addiw a1, a1, -1692 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159384,7 +159190,7 @@ vsetivli zero, 1, e64, m4, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -314 + addiw a1, a1, -308 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159394,7 +159200,7 @@ vslidedown.vi v8, v16, 7 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1746 + addiw a1, a1, -1740 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159404,7 +159210,7 @@ vslidedown.vi v8, v16, 6 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1762 + addiw a1, a1, -1756 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159414,7 +159220,7 @@ vslidedown.vi v8, v16, 5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1786 + addiw a1, a1, -1780 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159424,7 +159230,7 @@ vslidedown.vi v8, v16, 4 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1802 + addiw a1, a1, -1796 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159435,7 +159241,7 @@ vslidedown.vi v8, v16, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1818 + addiw a1, a1, -1812 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159445,7 +159251,7 @@ vslidedown.vi v8, v16, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -474 + addiw a1, a1, -468 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159456,7 +159262,7 @@ vslidedown.vi v8, v16, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1834 + addiw a1, a1, -1828 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159466,7 +159272,7 @@ vsetivli zero, 1, e64, m4, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -322 + addiw a1, a1, -316 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159476,7 +159282,7 @@ vslidedown.vi v8, v16, 7 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1858 + addiw a1, a1, -1852 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159486,7 +159292,7 @@ vslidedown.vi v8, v16, 6 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1866 + addiw a1, a1, -1860 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159496,7 +159302,7 @@ vslidedown.vi v8, v16, 5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1874 + addiw a1, a1, -1868 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159506,7 +159312,7 @@ vslidedown.vi v8, v16, 4 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1882 + addiw a1, a1, -1876 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159517,7 +159323,7 @@ vslidedown.vi v8, v16, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1890 + addiw a1, a1, -1884 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159527,7 +159333,7 @@ vslidedown.vi v8, v16, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1898 + addiw a1, a1, -1892 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159538,7 +159344,7 @@ vslidedown.vi v8, v16, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1906 + addiw a1, a1, -1900 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159548,7 +159354,7 @@ vsetivli zero, 1, e64, m4, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -330 + addiw a1, a1, -324 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159558,7 +159364,7 @@ vslidedown.vi v8, v16, 7 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1914 + addiw a1, a1, -1908 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159568,7 +159374,7 @@ vslidedown.vi v8, v16, 6 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1922 + addiw a1, a1, -1916 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159578,7 +159384,7 @@ vslidedown.vi v8, v16, 5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1930 + addiw a1, a1, -1924 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159588,7 +159394,7 @@ vslidedown.vi v8, v16, 4 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -482 + addiw a1, a1, -476 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159599,7 +159405,7 @@ vslidedown.vi v8, v16, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1938 + addiw a1, a1, -1932 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159609,7 +159415,7 @@ vslidedown.vi v8, v16, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1954 + addiw a1, a1, -1948 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159620,7 +159426,7 @@ vslidedown.vi v8, v16, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1986 + addiw a1, a1, -1980 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159631,7 +159437,7 @@ vslidedown.vi v8, v24, 7 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2034 + addiw a1, a1, -2028 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159641,7 +159447,7 @@ vslidedown.vi v8, v24, 6 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2042 + addiw a1, a1, -2036 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159650,7 +159456,8 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vslidedown.vi v8, v24, 5 csrr a0, vlenb - li a1, 2046 + lui a1, 1 + addiw a1, a1, -2044 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159659,7 +159466,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vslidedown.vi v8, v24, 4 csrr a0, vlenb - li a1, 2038 + li a1, 2044 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159669,7 +159476,7 @@ vsetivli zero, 1, e64, m2, ta, ma vslidedown.vi v8, v24, 3 csrr a0, vlenb - li a1, 2030 + li a1, 2036 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159678,7 +159485,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vslidedown.vi v8, v24, 2 csrr a0, vlenb - li a1, 2022 + li a1, 2028 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159687,10 +159494,10 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vsetivli zero, 1, e64, m1, ta, ma addi a3, a3, 21 - addi a4, a5, 10 + addi a4, t2, 10 vslidedown.vi v8, v24, 1 csrr a0, vlenb - li a1, 2014 + li a1, 2020 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159704,7 +159511,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -250 + addiw a1, a1, -244 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159714,7 +159521,7 @@ vmv1r.v v24, v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1850 + addiw a1, a1, -1844 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159725,7 +159532,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1842 + addiw a1, a1, -1836 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159736,7 +159543,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1826 + addiw a1, a1, -1820 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159747,7 +159554,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1810 + addiw a1, a1, -1804 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159758,7 +159565,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1794 + addiw a1, a1, -1788 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159769,7 +159576,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1770 + addiw a1, a1, -1764 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159780,7 +159587,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1754 + addiw a1, a1, -1748 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159791,7 +159598,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1506 + addiw a1, a1, -1500 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159802,7 +159609,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1482 + addiw a1, a1, -1476 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159813,7 +159620,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -354 + addiw a1, a1, -348 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159824,7 +159631,7 @@ vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -522 + addiw a1, a1, -516 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159835,7 +159642,7 @@ vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -514 + addiw a1, a1, -508 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159846,7 +159653,7 @@ vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -506 + addiw a1, a1, -500 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159857,7 +159664,7 @@ vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -498 + addiw a1, a1, -492 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159868,7 +159675,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -490 + addiw a1, a1, -484 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159878,7 +159685,7 @@ vslideup.vi v24, v16, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -250 + addiw a1, a1, -244 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159888,7 +159695,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -258 + addiw a1, a1, -252 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159898,7 +159705,7 @@ vmv1r.v v24, v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2026 + addiw a1, a1, -2020 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159909,7 +159716,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2018 + addiw a1, a1, -2012 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159920,7 +159727,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2010 + addiw a1, a1, -2004 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159931,7 +159738,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2002 + addiw a1, a1, -1996 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159942,7 +159749,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1994 + addiw a1, a1, -1988 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159953,7 +159760,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1970 + addiw a1, a1, -1964 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159964,7 +159771,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1946 + addiw a1, a1, -1940 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159975,7 +159782,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1738 + addiw a1, a1, -1732 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159986,7 +159793,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1730 + addiw a1, a1, -1724 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -159997,7 +159804,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -362 + addiw a1, a1, -356 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160008,7 +159815,7 @@ vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -562 + addiw a1, a1, -556 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160019,7 +159826,7 @@ vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -554 + addiw a1, a1, -548 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160030,7 +159837,7 @@ vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -546 + addiw a1, a1, -540 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160041,7 +159848,7 @@ vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -538 + addiw a1, a1, -532 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160052,7 +159859,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -530 + addiw a1, a1, -524 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160062,7 +159869,7 @@ vslideup.vi v24, v16, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -258 + addiw a1, a1, -252 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160072,7 +159879,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -266 + addiw a1, a1, -260 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160080,7 +159887,7 @@ add a0, a0, a1 vl8r.v v24, (a0) # Unknown-size Folded Reload csrr a0, vlenb - li a1, 2014 + li a1, 2020 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160090,7 +159897,7 @@ vslideup.vi v24, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - li a1, 2022 + li a1, 2028 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160100,7 +159907,7 @@ vslideup.vi v24, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - li a1, 2030 + li a1, 2036 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160110,7 +159917,7 @@ vslideup.vi v24, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - li a1, 2038 + li a1, 2044 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160120,7 +159927,8 @@ vslideup.vi v24, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - li a1, 2046 + lui a1, 1 + addiw a1, a1, -2044 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160131,7 +159939,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2042 + addiw a1, a1, -2036 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160142,7 +159950,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -2034 + addiw a1, a1, -2028 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160153,7 +159961,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1978 + addiw a1, a1, -1972 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160164,7 +159972,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1962 + addiw a1, a1, -1956 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160175,7 +159983,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -466 + addiw a1, a1, -460 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160187,7 +159995,7 @@ vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -594 + addiw a1, a1, -588 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160198,7 +160006,7 @@ vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -586 + addiw a1, a1, -580 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160209,7 +160017,7 @@ vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -578 + addiw a1, a1, -572 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160220,7 +160028,7 @@ vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -570 + addiw a1, a1, -564 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160231,7 +160039,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1778 + addiw a1, a1, -1772 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160241,7 +160049,7 @@ vslideup.vi v24, v8, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -266 + addiw a1, a1, -260 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160251,7 +160059,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -594 + addiw a1, a1, -588 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160262,7 +160070,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -586 + addiw a1, a1, -580 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160273,7 +160081,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -578 + addiw a1, a1, -572 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160284,7 +160092,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -570 + addiw a1, a1, -564 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160297,7 +160105,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -330 + addiw a1, a1, -324 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160308,7 +160116,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1986 + addiw a1, a1, -1980 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160319,7 +160127,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1954 + addiw a1, a1, -1948 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160330,7 +160138,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1938 + addiw a1, a1, -1932 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160340,7 +160148,7 @@ vslideup.vi v0, v8, 9 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -466 + addiw a1, a1, -460 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160350,7 +160158,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -482 + addiw a1, a1, -476 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160360,7 +160168,7 @@ vmv1r.v v16, v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1930 + addiw a1, a1, -1924 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160371,7 +160179,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1922 + addiw a1, a1, -1916 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160382,7 +160190,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1914 + addiw a1, a1, -1908 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160393,7 +160201,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1722 + addiw a1, a1, -1716 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160404,7 +160212,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1714 + addiw a1, a1, -1708 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160415,7 +160223,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1706 + addiw a1, a1, -1700 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160426,7 +160234,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1690 + addiw a1, a1, -1684 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160437,7 +160245,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1674 + addiw a1, a1, -1668 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160448,7 +160256,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1658 + addiw a1, a1, -1652 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160458,7 +160266,7 @@ vslideup.vi v16, v8, 9 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -482 + addiw a1, a1, -476 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160468,7 +160276,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -450 + addiw a1, a1, -444 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160478,7 +160286,7 @@ vmv1r.v v16, v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1626 + addiw a1, a1, -1620 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160489,7 +160297,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -322 + addiw a1, a1, -316 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160500,7 +160308,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1906 + addiw a1, a1, -1900 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160511,7 +160319,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1898 + addiw a1, a1, -1892 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160522,7 +160330,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1890 + addiw a1, a1, -1884 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160533,7 +160341,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1882 + addiw a1, a1, -1876 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160544,7 +160352,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1874 + addiw a1, a1, -1868 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160555,7 +160363,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1866 + addiw a1, a1, -1860 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160566,7 +160374,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1858 + addiw a1, a1, -1852 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160576,7 +160384,7 @@ vslideup.vi v16, v8, 9 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -450 + addiw a1, a1, -444 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160586,7 +160394,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -434 + addiw a1, a1, -428 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160596,7 +160404,7 @@ vmv1r.v v16, v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1618 + addiw a1, a1, -1612 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160607,7 +160415,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1610 + addiw a1, a1, -1604 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160618,7 +160426,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1602 + addiw a1, a1, -1596 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160629,7 +160437,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1594 + addiw a1, a1, -1588 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160640,7 +160448,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1586 + addiw a1, a1, -1580 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160651,7 +160459,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1578 + addiw a1, a1, -1572 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160662,7 +160470,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1570 + addiw a1, a1, -1564 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160673,7 +160481,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -314 + addiw a1, a1, -308 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160684,7 +160492,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1834 + addiw a1, a1, -1828 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160694,7 +160502,7 @@ vslideup.vi v16, v8, 9 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -434 + addiw a1, a1, -428 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160704,7 +160512,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -474 + addiw a1, a1, -468 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160714,7 +160522,7 @@ vmv1r.v v16, v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1818 + addiw a1, a1, -1812 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160725,7 +160533,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1802 + addiw a1, a1, -1796 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160736,7 +160544,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1786 + addiw a1, a1, -1780 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160747,7 +160555,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1762 + addiw a1, a1, -1756 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160758,7 +160566,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1746 + addiw a1, a1, -1740 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160769,7 +160577,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1538 + addiw a1, a1, -1532 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160780,7 +160588,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1522 + addiw a1, a1, -1516 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160791,7 +160599,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1498 + addiw a1, a1, -1492 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160802,7 +160610,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1474 + addiw a1, a1, -1468 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160812,7 +160620,7 @@ vslideup.vi v16, v8, 9 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -474 + addiw a1, a1, -468 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160822,7 +160630,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -426 + addiw a1, a1, -420 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160832,7 +160640,7 @@ vmv1r.v v16, v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1466 + addiw a1, a1, -1460 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160843,7 +160651,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1458 + addiw a1, a1, -1452 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160854,7 +160662,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1450 + addiw a1, a1, -1444 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160865,7 +160673,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -306 + addiw a1, a1, -300 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160876,7 +160684,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1698 + addiw a1, a1, -1692 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160887,7 +160695,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1682 + addiw a1, a1, -1676 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160898,7 +160706,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1666 + addiw a1, a1, -1660 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160909,7 +160717,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1650 + addiw a1, a1, -1644 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160920,7 +160728,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1642 + addiw a1, a1, -1636 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160930,7 +160738,7 @@ vslideup.vi v16, v8, 9 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -426 + addiw a1, a1, -420 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160940,7 +160748,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -458 + addiw a1, a1, -452 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160950,7 +160758,7 @@ vmv1r.v v16, v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1634 + addiw a1, a1, -1628 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160961,7 +160769,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1410 + addiw a1, a1, -1404 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160972,7 +160780,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1394 + addiw a1, a1, -1388 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160983,7 +160791,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1378 + addiw a1, a1, -1372 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -160994,7 +160802,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1362 + addiw a1, a1, -1356 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161005,7 +160813,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1354 + addiw a1, a1, -1348 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161016,7 +160824,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1346 + addiw a1, a1, -1340 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161027,7 +160835,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1338 + addiw a1, a1, -1332 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161038,7 +160846,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1330 + addiw a1, a1, -1324 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161048,7 +160856,7 @@ vslideup.vi v16, v8, 9 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -458 + addiw a1, a1, -452 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161058,7 +160866,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -362 + addiw a1, a1, -356 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161068,7 +160876,7 @@ vmv1r.v v16, v0 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -562 + addiw a1, a1, -556 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161079,7 +160887,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -554 + addiw a1, a1, -548 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161090,7 +160898,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -546 + addiw a1, a1, -540 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161101,7 +160909,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -538 + addiw a1, a1, -532 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161112,7 +160920,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -530 + addiw a1, a1, -524 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161123,7 +160931,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -298 + addiw a1, a1, -292 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161134,7 +160942,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1562 + addiw a1, a1, -1556 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161145,7 +160953,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1554 + addiw a1, a1, -1548 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161156,7 +160964,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1546 + addiw a1, a1, -1540 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161166,7 +160974,7 @@ vslideup.vi v16, v8, 9 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -362 + addiw a1, a1, -356 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161176,7 +160984,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -442 + addiw a1, a1, -436 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161186,7 +160994,7 @@ vmv1r.v v16, v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1530 + addiw a1, a1, -1524 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161197,7 +161005,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1514 + addiw a1, a1, -1508 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161208,7 +161016,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1490 + addiw a1, a1, -1484 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161219,7 +161027,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1258 + addiw a1, a1, -1252 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161230,7 +161038,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1242 + addiw a1, a1, -1236 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161241,7 +161049,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1234 + addiw a1, a1, -1228 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161252,7 +161060,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1218 + addiw a1, a1, -1212 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161263,7 +161071,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1202 + addiw a1, a1, -1196 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161274,7 +161082,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1186 + addiw a1, a1, -1180 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161284,7 +161092,7 @@ vslideup.vi v16, v8, 9 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -442 + addiw a1, a1, -436 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161294,7 +161102,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -402 + addiw a1, a1, -396 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161304,7 +161112,7 @@ vmv1r.v v16, v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1178 + addiw a1, a1, -1172 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161315,7 +161123,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -290 + addiw a1, a1, -284 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161326,7 +161134,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1442 + addiw a1, a1, -1436 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161337,7 +161145,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1434 + addiw a1, a1, -1428 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161348,7 +161156,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1426 + addiw a1, a1, -1420 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161359,7 +161167,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1418 + addiw a1, a1, -1412 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161370,7 +161178,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1402 + addiw a1, a1, -1396 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161381,7 +161189,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1386 + addiw a1, a1, -1380 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161392,7 +161200,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1370 + addiw a1, a1, -1364 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161402,7 +161210,7 @@ vslideup.vi v16, v8, 9 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -402 + addiw a1, a1, -396 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161412,7 +161220,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -386 + addiw a1, a1, -380 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161422,7 +161230,7 @@ vmv1r.v v16, v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1170 + addiw a1, a1, -1164 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161433,7 +161241,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1162 + addiw a1, a1, -1156 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161444,7 +161252,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1154 + addiw a1, a1, -1148 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161455,7 +161263,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1146 + addiw a1, a1, -1140 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161466,7 +161274,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1138 + addiw a1, a1, -1132 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161477,7 +161285,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1130 + addiw a1, a1, -1124 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161488,7 +161296,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1122 + addiw a1, a1, -1116 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161499,7 +161307,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -282 + addiw a1, a1, -276 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161510,7 +161318,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1322 + addiw a1, a1, -1316 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161520,7 +161328,7 @@ vslideup.vi v16, v8, 9 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -386 + addiw a1, a1, -380 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161530,7 +161338,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -418 + addiw a1, a1, -412 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161540,7 +161348,7 @@ vmv1r.v v16, v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1314 + addiw a1, a1, -1308 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161551,7 +161359,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1306 + addiw a1, a1, -1300 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161562,7 +161370,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1298 + addiw a1, a1, -1292 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161573,7 +161381,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1290 + addiw a1, a1, -1284 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161584,7 +161392,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1282 + addiw a1, a1, -1276 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161595,7 +161403,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1074 + addiw a1, a1, -1068 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161606,7 +161414,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1058 + addiw a1, a1, -1052 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161617,7 +161425,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1050 + addiw a1, a1, -1044 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161628,7 +161436,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1042 + addiw a1, a1, -1036 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161638,7 +161446,7 @@ vslideup.vi v16, v8, 9 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -418 + addiw a1, a1, -412 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161648,7 +161456,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -378 + addiw a1, a1, -372 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161658,7 +161466,7 @@ vmv1r.v v16, v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1034 + addiw a1, a1, -1028 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161669,7 +161477,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1026 + addiw a1, a1, -1020 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161680,7 +161488,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1010 + addiw a1, a1, -1004 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161691,7 +161499,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -346 + addiw a1, a1, -340 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161702,7 +161510,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1274 + addiw a1, a1, -1268 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161713,7 +161521,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1266 + addiw a1, a1, -1260 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161724,7 +161532,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1250 + addiw a1, a1, -1244 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161735,7 +161543,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1226 + addiw a1, a1, -1220 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161746,7 +161554,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1210 + addiw a1, a1, -1204 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161756,7 +161564,7 @@ vslideup.vi v16, v8, 9 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -378 + addiw a1, a1, -372 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161766,7 +161574,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -410 + addiw a1, a1, -404 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161776,7 +161584,7 @@ vmv1r.v v16, v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1194 + addiw a1, a1, -1188 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161787,7 +161595,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -962 + addiw a1, a1, -956 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161798,7 +161606,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -946 + addiw a1, a1, -940 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161809,7 +161617,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -930 + addiw a1, a1, -924 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161820,7 +161628,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -922 + addiw a1, a1, -916 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161831,7 +161639,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -914 + addiw a1, a1, -908 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161842,7 +161650,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -906 + addiw a1, a1, -900 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161853,7 +161661,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -898 + addiw a1, a1, -892 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161864,7 +161672,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -890 + addiw a1, a1, -884 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161874,7 +161682,7 @@ vslideup.vi v16, v8, 9 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -410 + addiw a1, a1, -404 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161884,7 +161692,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -354 + addiw a1, a1, -348 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161894,7 +161702,7 @@ vmv1r.v v16, v0 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -522 + addiw a1, a1, -516 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161905,7 +161713,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -514 + addiw a1, a1, -508 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161916,7 +161724,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -506 + addiw a1, a1, -500 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161927,7 +161735,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -498 + addiw a1, a1, -492 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161938,7 +161746,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -490 + addiw a1, a1, -484 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161949,7 +161757,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -274 + addiw a1, a1, -268 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161960,7 +161768,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1114 + addiw a1, a1, -1108 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161971,7 +161779,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1106 + addiw a1, a1, -1100 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161982,7 +161790,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1098 + addiw a1, a1, -1092 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -161992,7 +161800,7 @@ vslideup.vi v16, v8, 9 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -354 + addiw a1, a1, -348 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162002,7 +161810,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -394 + addiw a1, a1, -388 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162012,7 +161820,7 @@ vmv1r.v v16, v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1090 + addiw a1, a1, -1084 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162023,7 +161831,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1082 + addiw a1, a1, -1076 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162034,7 +161842,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1066 + addiw a1, a1, -1060 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162045,7 +161853,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -810 + addiw a1, a1, -804 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162056,7 +161864,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -802 + addiw a1, a1, -796 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162067,7 +161875,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -794 + addiw a1, a1, -788 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162078,7 +161886,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -778 + addiw a1, a1, -772 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162089,7 +161897,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -762 + addiw a1, a1, -756 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162100,7 +161908,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -746 + addiw a1, a1, -740 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162110,7 +161918,7 @@ vslideup.vi v16, v8, 9 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -394 + addiw a1, a1, -388 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162120,7 +161928,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -370 + addiw a1, a1, -364 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162130,7 +161938,7 @@ vmv1r.v v16, v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -738 + addiw a1, a1, -732 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162141,7 +161949,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -978 + addiw a1, a1, -972 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162152,7 +161960,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1002 + addiw a1, a1, -996 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162163,7 +161971,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -994 + addiw a1, a1, -988 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162174,7 +161982,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -986 + addiw a1, a1, -980 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162185,7 +161993,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1018 + addiw a1, a1, -1012 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162196,7 +162004,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -970 + addiw a1, a1, -964 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162207,7 +162015,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -954 + addiw a1, a1, -948 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162218,7 +162026,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -938 + addiw a1, a1, -932 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162228,7 +162036,7 @@ vslideup.vi v16, v8, 9 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -370 + addiw a1, a1, -364 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162238,7 +162046,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -658 + addiw a1, a1, -652 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162247,7 +162055,7 @@ vl8r.v v24, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -730 + addiw a1, a1, -724 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162258,7 +162066,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -722 + addiw a1, a1, -716 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162269,7 +162077,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -714 + addiw a1, a1, -708 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162280,7 +162088,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -706 + addiw a1, a1, -700 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162291,7 +162099,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -698 + addiw a1, a1, -692 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162302,7 +162110,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -690 + addiw a1, a1, -684 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162313,7 +162121,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -682 + addiw a1, a1, -676 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162324,7 +162132,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -338 + addiw a1, a1, -332 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162335,7 +162143,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -882 + addiw a1, a1, -876 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162346,7 +162154,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -834 + addiw a1, a1, -828 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162355,7 +162163,7 @@ vl8r.v v0, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -874 + addiw a1, a1, -868 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162366,7 +162174,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -866 + addiw a1, a1, -860 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162377,7 +162185,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -858 + addiw a1, a1, -852 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162388,7 +162196,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -850 + addiw a1, a1, -844 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162399,7 +162207,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -842 + addiw a1, a1, -836 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162410,7 +162218,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -674 + addiw a1, a1, -668 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162421,7 +162229,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -666 + addiw a1, a1, -660 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162432,7 +162240,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -650 + addiw a1, a1, -644 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162443,7 +162251,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -642 + addiw a1, a1, -636 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162454,7 +162262,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -610 + addiw a1, a1, -604 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162463,7 +162271,7 @@ vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -634 + addiw a1, a1, -628 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162474,7 +162282,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -626 + addiw a1, a1, -620 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162485,7 +162293,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -618 + addiw a1, a1, -612 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162496,7 +162304,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -602 + addiw a1, a1, -596 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162507,7 +162315,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -826 + addiw a1, a1, -820 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162518,7 +162326,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -818 + addiw a1, a1, -812 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162529,7 +162337,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -786 + addiw a1, a1, -780 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162540,7 +162348,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -770 + addiw a1, a1, -764 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162551,7 +162359,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -754 + addiw a1, a1, -748 mul a0, a0, a1 add a0, sp, a0 lui a1, 28 @@ -162559,32 +162367,32 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 9 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -260 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 28 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload ld a0, 80(sp) # 8-byte Folded Reload - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -266 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 28 - addiw a2, a2, -960 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) - ld a1, 72(sp) # 8-byte Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -466 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -460 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 28 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 28 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a1, 72(sp) # 8-byte Folded Reload vse64.v v8, (a1) addi a0, a1, 80 csrr a2, vlenb lui a3, 1 - addiw a3, a3, -482 + addiw a3, a3, -476 mul a2, a2, a3 add a2, sp, a2 lui a3, 28 @@ -162595,7 +162403,7 @@ addi a0, a1, 160 csrr a2, vlenb lui a3, 1 - addiw a3, a3, -450 + addiw a3, a3, -444 mul a2, a2, a3 add a2, sp, a2 lui a3, 28 @@ -162606,7 +162414,7 @@ addi a0, a1, 240 csrr a2, vlenb lui a3, 1 - addiw a3, a3, -434 + addiw a3, a3, -428 mul a2, a2, a3 add a2, sp, a2 lui a3, 28 @@ -162617,7 +162425,7 @@ addi a0, a1, 320 csrr a2, vlenb lui a3, 1 - addiw a3, a3, -474 + addiw a3, a3, -468 mul a2, a2, a3 add a2, sp, a2 lui a3, 28 @@ -162628,7 +162436,7 @@ addi a0, a1, 400 csrr a2, vlenb lui a3, 1 - addiw a3, a3, -426 + addiw a3, a3, -420 mul a2, a2, a3 add a2, sp, a2 lui a3, 28 @@ -162639,7 +162447,7 @@ addi a0, a1, 480 csrr a2, vlenb lui a3, 1 - addiw a3, a3, -458 + addiw a3, a3, -452 mul a2, a2, a3 add a2, sp, a2 lui a3, 28 @@ -162650,7 +162458,7 @@ addi a0, a1, 560 csrr a2, vlenb lui a3, 1 - addiw a3, a3, -258 + addiw a3, a3, -252 mul a2, a2, a3 add a2, sp, a2 lui a3, 28 @@ -162661,7 +162469,7 @@ addi a0, a1, 640 csrr a2, vlenb lui a3, 1 - addiw a3, a3, -362 + addiw a3, a3, -356 mul a2, a2, a3 add a2, sp, a2 lui a3, 28 @@ -162672,7 +162480,7 @@ addi a0, a1, 720 csrr a2, vlenb lui a3, 1 - addiw a3, a3, -442 + addiw a3, a3, -436 mul a2, a2, a3 add a2, sp, a2 lui a3, 28 @@ -162683,7 +162491,7 @@ addi a0, a1, 800 csrr a2, vlenb lui a3, 1 - addiw a3, a3, -402 + addiw a3, a3, -396 mul a2, a2, a3 add a2, sp, a2 lui a3, 28 @@ -162694,7 +162502,7 @@ addi a0, a1, 880 csrr a2, vlenb lui a3, 1 - addiw a3, a3, -386 + addiw a3, a3, -380 mul a2, a2, a3 add a2, sp, a2 lui a3, 28 @@ -162705,7 +162513,7 @@ addi a0, a1, 960 csrr a2, vlenb lui a3, 1 - addiw a3, a3, -418 + addiw a3, a3, -412 mul a2, a2, a3 add a2, sp, a2 lui a3, 28 @@ -162716,7 +162524,7 @@ addi a0, a1, 1040 csrr a2, vlenb lui a3, 1 - addiw a3, a3, -378 + addiw a3, a3, -372 mul a2, a2, a3 add a2, sp, a2 lui a3, 28 @@ -162727,7 +162535,7 @@ addi a0, a1, 1120 csrr a2, vlenb lui a3, 1 - addiw a3, a3, -410 + addiw a3, a3, -404 mul a2, a2, a3 add a2, sp, a2 lui a3, 28 @@ -162738,7 +162546,7 @@ addi a0, a1, 1200 csrr a2, vlenb lui a3, 1 - addiw a3, a3, -250 + addiw a3, a3, -244 mul a2, a2, a3 add a2, sp, a2 lui a3, 28 @@ -162749,7 +162557,7 @@ addi a0, a1, 1280 csrr a2, vlenb lui a3, 1 - addiw a3, a3, -354 + addiw a3, a3, -348 mul a2, a2, a3 add a2, sp, a2 lui a3, 28 @@ -162760,7 +162568,7 @@ addi a0, a1, 1360 csrr a2, vlenb lui a3, 1 - addiw a3, a3, -394 + addiw a3, a3, -388 mul a2, a2, a3 add a2, sp, a2 lui a3, 28 @@ -162771,7 +162579,7 @@ addi a0, a1, 1440 csrr a2, vlenb lui a3, 1 - addiw a3, a3, -370 + addiw a3, a3, -364 mul a2, a2, a3 add a2, sp, a2 lui a3, 28 @@ -162897,27 +162705,27 @@ sd a0, 240(sp) # 8-byte Folded Spill addi s9, a1, 2047 addi a4, s9, 353 - addi a5, a1, 200 + addi a0, a1, 200 vsetivli zero, 16, e64, m8, ta, ma vle64.v v8, (a1) - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1224 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - addi a6, a1, 128 + csrr a2, vlenb + lui a3, 1 + addiw a3, a3, 1232 + mul a2, a2, a3 + add a2, sp, a2 + lui a3, 31 + addiw a3, a3, -960 + add a2, a2, a3 + vs8r.v v8, (a2) # Unknown-size Folded Spill + addi a2, a1, 128 vsetivli zero, 8, e64, m4, ta, ma - vle64.v v24, (a6) + vle64.v v24, (a2) addi s7, a1, 192 vsetivli zero, 16, e64, m8, ta, ma - vle64.v v16, (a5) - addi a5, a1, 328 + vle64.v v16, (a0) + addi a0, a1, 328 vsetivli zero, 8, e64, m4, ta, ma - vle64.v v8, (a5) + vle64.v v8, (a0) csrr a0, vlenb lui a2, 1 addiw a2, a2, -1296 @@ -162928,241 +162736,241 @@ add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill addi s8, a1, 392 - addi a5, a1, 400 + addi a0, a1, 400 vsetivli zero, 16, e64, m8, ta, ma - addi a6, a1, 528 - vle64.v v0, (a5) + addi a2, a1, 528 + vle64.v v0, (a0) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 992 - mul a0, a0, a2 + lui a3, 1 + addiw a3, a3, 992 + mul a0, a0, a3 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a3, 31 + addiw a3, a3, -960 + add a0, a0, a3 vs8r.v v0, (a0) # Unknown-size Folded Spill vsetivli zero, 8, e64, m4, ta, ma addi a0, a1, 592 sd a0, 88(sp) # 8-byte Folded Spill - addi a5, a1, 600 - vle64.v v0, (a6) - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1040 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill + addi a0, a1, 600 + vle64.v v0, (a2) + csrr a2, vlenb + lui a3, 1 + addiw a3, a3, 1040 + mul a2, a2, a3 + add a2, sp, a2 + lui a3, 31 + addiw a3, a3, -960 + add a2, a2, a3 + vs8r.v v0, (a2) # Unknown-size Folded Spill vsetivli zero, 16, e64, m8, ta, ma - addi a6, a1, 728 - vle64.v v0, (a5) + addi a2, a1, 728 + vle64.v v0, (a0) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 880 - mul a0, a0, a2 + lui a3, 1 + addiw a3, a3, 880 + mul a0, a0, a3 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a3, 31 + addiw a3, a3, -960 + add a0, a0, a3 vs8r.v v0, (a0) # Unknown-size Folded Spill vsetivli zero, 8, e64, m4, ta, ma - addi s3, a1, 792 - addi a5, a1, 800 - vle64.v v0, (a6) - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 920 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill + addi ra, a1, 792 + addi a0, a1, 800 + vle64.v v0, (a2) + csrr a2, vlenb + lui a3, 1 + addiw a3, a3, 920 + mul a2, a2, a3 + add a2, sp, a2 + lui a3, 31 + addiw a3, a3, -960 + add a2, a2, a3 + vs8r.v v0, (a2) # Unknown-size Folded Spill vsetivli zero, 16, e64, m8, ta, ma - addi a6, a1, 928 - vle64.v v0, (a5) + addi a2, a1, 928 + vle64.v v0, (a0) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1000 - mul a0, a0, a2 + lui a3, 1 + addiw a3, a3, 1000 + mul a0, a0, a3 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a3, 31 + addiw a3, a3, -960 + add a0, a0, a3 vs8r.v v0, (a0) # Unknown-size Folded Spill vsetivli zero, 8, e64, m4, ta, ma addi a0, a1, 992 sd a0, 104(sp) # 8-byte Folded Spill - addi a5, a1, 1000 - vle64.v v0, (a6) - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 864 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill + addi a0, a1, 1000 + vle64.v v0, (a2) + csrr a2, vlenb + lui a3, 1 + addiw a3, a3, 864 + mul a2, a2, a3 + add a2, sp, a2 + lui a3, 31 + addiw a3, a3, -960 + add a2, a2, a3 + vs8r.v v0, (a2) # Unknown-size Folded Spill vsetivli zero, 16, e64, m8, ta, ma - addi a6, a1, 1128 - vle64.v v0, (a5) + addi a2, a1, 1128 + vle64.v v0, (a0) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1112 - mul a0, a0, a2 + lui a3, 1 + addiw a3, a3, 1112 + mul a0, a0, a3 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a3, 31 + addiw a3, a3, -960 + add a0, a0, a3 vs8r.v v0, (a0) # Unknown-size Folded Spill vsetivli zero, 8, e64, m4, ta, ma addi a0, a1, 1192 sd a0, 96(sp) # 8-byte Folded Spill - addi a5, a1, 1200 - vle64.v v0, (a6) - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 928 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill + addi a0, a1, 1200 + vle64.v v0, (a2) + csrr a2, vlenb + lui a3, 1 + addiw a3, a3, 928 + mul a2, a2, a3 + add a2, sp, a2 + lui a3, 31 + addiw a3, a3, -960 + add a2, a2, a3 + vs8r.v v0, (a2) # Unknown-size Folded Spill vsetivli zero, 16, e64, m8, ta, ma - addi a6, a1, 1328 - vle64.v v0, (a5) + addi a2, a1, 1328 + vle64.v v0, (a0) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1008 - mul a0, a0, a2 + lui a3, 1 + addiw a3, a3, 1008 + mul a0, a0, a3 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a3, 31 + addiw a3, a3, -960 + add a0, a0, a3 vs8r.v v0, (a0) # Unknown-size Folded Spill vsetivli zero, 8, e64, m4, ta, ma addi a0, a1, 1392 sd a0, 120(sp) # 8-byte Folded Spill - addi a5, a1, 1400 - vle64.v v0, (a6) - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 872 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill + addi a0, a1, 1400 + vle64.v v0, (a2) + csrr a2, vlenb + lui a3, 1 + addiw a3, a3, 872 + mul a2, a2, a3 + add a2, sp, a2 + lui a3, 31 + addiw a3, a3, -960 + add a2, a2, a3 + vs8r.v v0, (a2) # Unknown-size Folded Spill vsetivli zero, 16, e64, m8, ta, ma - addi a6, a1, 1528 - vle64.v v0, (a5) + addi a2, a1, 1528 + vle64.v v0, (a0) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1048 - mul a0, a0, a2 + lui a3, 1 + addiw a3, a3, 1048 + mul a0, a0, a3 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a3, 31 + addiw a3, a3, -960 + add a0, a0, a3 vs8r.v v0, (a0) # Unknown-size Folded Spill vsetivli zero, 8, e64, m4, ta, ma addi a0, a1, 1592 sd a0, 112(sp) # 8-byte Folded Spill - addi a5, a1, 1600 - vle64.v v0, (a6) - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1088 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill + addi a0, a1, 1600 + vle64.v v0, (a2) + csrr a2, vlenb + lui a3, 1 + addiw a3, a3, 1088 + mul a2, a2, a3 + add a2, sp, a2 + lui a3, 31 + addiw a3, a3, -960 + add a2, a2, a3 + vs8r.v v0, (a2) # Unknown-size Folded Spill vsetivli zero, 16, e64, m8, ta, ma - addi a6, a1, 1728 - vle64.v v0, (a5) + addi a2, a1, 1728 + vle64.v v0, (a0) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1016 - mul a0, a0, a2 + lui a3, 1 + addiw a3, a3, 1016 + mul a0, a0, a3 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a3, 31 + addiw a3, a3, -960 + add a0, a0, a3 vs8r.v v0, (a0) # Unknown-size Folded Spill vsetivli zero, 8, e64, m4, ta, ma addi a0, a1, 1792 sd a0, 136(sp) # 8-byte Folded Spill - addi a5, a1, 1800 - vle64.v v0, (a6) - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 888 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill + addi a0, a1, 1800 + vle64.v v0, (a2) + csrr a2, vlenb + lui a3, 1 + addiw a3, a3, 888 + mul a2, a2, a3 + add a2, sp, a2 + lui a3, 31 + addiw a3, a3, -960 + add a2, a2, a3 + vs8r.v v0, (a2) # Unknown-size Folded Spill vsetivli zero, 16, e64, m8, ta, ma - addi a6, a1, 1928 - vle64.v v0, (a5) + addi a2, a1, 1928 + vle64.v v0, (a0) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1056 - mul a0, a0, a2 + lui a3, 1 + addiw a3, a3, 1056 + mul a0, a0, a3 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a3, 31 + addiw a3, a3, -960 + add a0, a0, a3 vs8r.v v0, (a0) # Unknown-size Folded Spill vsetivli zero, 8, e64, m4, ta, ma addi a0, a1, 1992 sd a0, 128(sp) # 8-byte Folded Spill - addi a1, a1, 2000 - addi a5, s9, 81 - vle64.v v0, (a6) - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 936 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vle64.v v0, (a5) - csrr a0, vlenb + addi a0, a1, 2000 + addi a1, s9, 81 + vle64.v v0, (a2) + csrr a2, vlenb + lui a3, 1 + addiw a3, a3, 936 + mul a2, a2, a3 + add a2, sp, a2 + lui a3, 31 + addiw a3, a3, -960 + add a2, a2, a3 + vs8r.v v0, (a2) # Unknown-size Folded Spill + vle64.v v0, (a1) + csrr a1, vlenb lui a2, 1 addiw a2, a2, 896 - mul a0, a0, a2 - add a0, sp, a0 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill + add a1, a1, a2 + vs8r.v v0, (a1) # Unknown-size Folded Spill vsetivli zero, 16, e64, m8, ta, ma - addi a0, s9, 145 - sd a0, 152(sp) # 8-byte Folded Spill - addi a5, s9, 153 - addi a6, s9, 281 - vle64.v v0, (a1) + addi a1, s9, 145 + sd a1, 152(sp) # 8-byte Folded Spill + addi a1, s9, 153 + addi a2, s9, 281 + vle64.v v0, (a0) csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 856 - mul a0, a0, a1 + lui a3, 1 + addiw a3, a3, 856 + mul a0, a0, a3 add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 + lui a3, 31 + addiw a3, a3, -960 + add a0, a0, a3 vs8r.v v0, (a0) # Unknown-size Folded Spill - vle64.v v0, (a5) + vle64.v v0, (a1) csrr a0, vlenb lui a1, 1 addiw a1, a1, 1064 @@ -163175,7 +162983,7 @@ vsetivli zero, 8, e64, m4, ta, ma addi a0, s9, 345 sd a0, 144(sp) # 8-byte Folded Spill - vle64.v v0, (a6) + vle64.v v0, (a2) csrr a0, vlenb lui a1, 1 addiw a1, a1, 1096 @@ -163186,512 +162994,512 @@ add a0, a0, a1 vs8r.v v0, (a0) # Unknown-size Folded Spill vsetivli zero, 16, e64, m8, ta, ma - addi a1, s9, 481 + addi a0, s9, 481 vle64.v v0, (a4) - csrr a0, vlenb + csrr a1, vlenb li a2, 5 slli a2, a2, 10 - mul a0, a0, a2 - add a0, sp, a0 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill + add a1, a1, a2 + vs8r.v v0, (a1) # Unknown-size Folded Spill vsetivli zero, 8, e64, m4, ta, ma - addi a0, s9, 545 - sd a0, 184(sp) # 8-byte Folded Spill - addi a4, s9, 553 - vle64.v v0, (a1) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 904 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vsetivli zero, 16, e64, m8, ta, ma - addi a1, s9, 681 - vle64.v v0, (a4) + addi a1, s9, 545 + sd a1, 184(sp) # 8-byte Folded Spill + addi a1, s9, 553 + vle64.v v0, (a0) csrr a0, vlenb lui a2, 1 - addiw a2, a2, 1072 + addiw a2, a2, 904 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 addiw a2, a2, -960 add a0, a0, a2 vs8r.v v0, (a0) # Unknown-size Folded Spill - vsetivli zero, 8, e64, m4, ta, ma - addi a0, s9, 745 - sd a0, 168(sp) # 8-byte Folded Spill - addi a4, s9, 753 - vle64.v v0, (a1) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 952 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v0, (a0) # Unknown-size Folded Spill vsetivli zero, 16, e64, m8, ta, ma - addi a1, s9, 881 - vle64.v v0, (a4) + addi a0, s9, 681 + vle64.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1072 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vs8r.v v0, (a1) # Unknown-size Folded Spill + vsetivli zero, 8, e64, m4, ta, ma + addi a1, s9, 745 + sd a1, 168(sp) # 8-byte Folded Spill + addi a1, s9, 753 + vle64.v v0, (a0) csrr a0, vlenb lui a2, 1 - addiw a2, a2, 1032 + addiw a2, a2, 952 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 addiw a2, a2, -960 add a0, a0, a2 vs8r.v v0, (a0) # Unknown-size Folded Spill - vsetivli zero, 8, e64, m4, ta, ma - addi a0, s9, 945 - sd a0, 200(sp) # 8-byte Folded Spill - addi a4, s9, 953 - vle64.v v0, (a1) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 912 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v0, (a0) # Unknown-size Folded Spill vsetivli zero, 16, e64, m8, ta, ma - addi a1, s9, 1081 - vle64.v v0, (a4) + addi a0, s9, 881 + vle64.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1032 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vs8r.v v0, (a1) # Unknown-size Folded Spill + vsetivli zero, 8, e64, m4, ta, ma + addi a1, s9, 945 + sd a1, 200(sp) # 8-byte Folded Spill + addi a1, s9, 953 + vle64.v v0, (a0) csrr a0, vlenb lui a2, 1 - addiw a2, a2, 1080 + addiw a2, a2, 912 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 addiw a2, a2, -960 add a0, a0, a2 vs8r.v v0, (a0) # Unknown-size Folded Spill - vsetivli zero, 8, e64, m4, ta, ma - addi a0, s9, 1145 - sd a0, 192(sp) # 8-byte Folded Spill - addi a4, s9, 1153 - vle64.v v0, (a1) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 1104 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v0, (a0) # Unknown-size Folded Spill vsetivli zero, 16, e64, m8, ta, ma - addi a1, s9, 1281 - vle64.v v0, (a4) + addi a0, s9, 1081 + vle64.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1080 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vs8r.v v0, (a1) # Unknown-size Folded Spill + vsetivli zero, 8, e64, m4, ta, ma + addi a1, s9, 1145 + sd a1, 192(sp) # 8-byte Folded Spill + addi a1, s9, 1153 + vle64.v v0, (a0) csrr a0, vlenb lui a2, 1 - addiw a2, a2, 1216 + addiw a2, a2, 1104 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 addiw a2, a2, -960 add a0, a0, a2 vs8r.v v0, (a0) # Unknown-size Folded Spill - vsetivli zero, 8, e64, m4, ta, ma - addi a0, s9, 1345 - sd a0, 216(sp) # 8-byte Folded Spill - addi a5, s9, 1353 - vle64.v v0, (a1) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 1312 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v0, (a0) # Unknown-size Folded Spill vsetivli zero, 16, e64, m8, ta, ma - addi a1, s9, 1481 - vle64.v v0, (a5) + addi a0, s9, 1281 + vle64.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1312 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vs8r.v v0, (a1) # Unknown-size Folded Spill + vsetivli zero, 8, e64, m4, ta, ma + addi a1, s9, 1345 + sd a1, 216(sp) # 8-byte Folded Spill + addi a1, s9, 1353 + vle64.v v0, (a0) csrr a0, vlenb lui a2, 1 - addiw a2, a2, 960 + addiw a2, a2, 1352 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 addiw a2, a2, -960 add a0, a0, a2 vs8r.v v0, (a0) # Unknown-size Folded Spill - vsetivli zero, 8, e64, m4, ta, ma - addi a0, s9, 1545 - sd a0, 208(sp) # 8-byte Folded Spill - addi s10, s9, 1553 + vsetivli zero, 16, e64, m8, ta, ma + addi a0, s9, 1481 vle64.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 960 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vs8r.v v0, (a1) # Unknown-size Folded Spill + vsetivli zero, 8, e64, m4, ta, ma + addi a1, s9, 1545 + sd a1, 208(sp) # 8-byte Folded Spill + addi a1, s9, 1553 + vle64.v v0, (a0) csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 976 - mul a0, a0, a1 + lui a2, 1 + addiw a2, a2, 976 + mul a0, a0, a2 add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v0, (a0) # Unknown-size Folded Spill vsetivli zero, 16, e64, m8, ta, ma - addi s11, s9, 1681 - vle64.v v0, (s10) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 944 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v0, (a0) # Unknown-size Folded Spill + addi a0, s9, 1681 + vle64.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 944 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vs8r.v v0, (a1) # Unknown-size Folded Spill vsetivli zero, 8, e64, m4, ta, ma - addi a0, s9, 1745 - sd a0, 224(sp) # 8-byte Folded Spill - lui a0, 30 - addiw a0, a0, -1536 - add s9, sp, a0 - vle64.v v0, (s11) + addi a1, s9, 1745 + sd a1, 224(sp) # 8-byte Folded Spill + lui a1, 30 + addiw a1, a1, -1536 + add a1, sp, a1 + vle64.v v0, (a0) csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 968 - mul a0, a0, a1 + lui a2, 1 + addiw a2, a2, 968 + mul a0, a0, a2 add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v0, (a0) # Unknown-size Folded Spill - vse64.v v8, (s9) + vse64.v v8, (a1) lui a0, 30 addiw a0, a0, 1536 - add s9, sp, a0 - vsetivli zero, 16, e64, m8, ta, ma - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -2008 - mul a0, a0, a1 add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vse64.v v16, (s9) + vsetivli zero, 16, e64, m8, ta, ma + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -2008 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vs8r.v v16, (a1) # Unknown-size Folded Spill + vse64.v v16, (a0) lui a0, 30 addiw a0, a0, -448 - add s9, sp, a0 + add a0, sp, a0 vsetivli zero, 8, e64, m4, ta, ma - vse64.v v24, (s9) + vse64.v v24, (a0) vsetivli zero, 1, e64, m1, ta, ma lui a0, 30 addiw a0, a0, -1480 - add s9, sp, a0 + add t0, sp, a0 lui a0, 30 addiw a0, a0, -1488 - add s10, sp, a0 + add t1, sp, a0 lui a0, 30 addiw a0, a0, -1496 - add s11, sp, a0 + add t2, sp, a0 lui a0, 30 addiw a0, a0, -1504 - add ra, sp, a0 + add t3, sp, a0 lui a0, 30 addiw a0, a0, 1656 + add t4, sp, a0 + lui a0, 30 + addiw a0, a0, 1648 + add t5, sp, a0 + lui a0, 30 + addiw a0, a0, 1640 + add t6, sp, a0 + lui a0, 30 + addiw a0, a0, 1632 + add s2, sp, a0 + lui a0, 30 + addiw a0, a0, 1624 + add s3, sp, a0 + lui a0, 30 + addiw a0, a0, 1616 + add s4, sp, a0 + lui a0, 30 + addiw a0, a0, 1608 + add s5, sp, a0 + lui a0, 30 + addiw a0, a0, 1600 + add s6, sp, a0 + lui a0, 30 + addiw a0, a0, 1592 + add a7, sp, a0 + lui a0, 30 + addiw a0, a0, 1584 + add a6, sp, a0 + lui a0, 30 + addiw a0, a0, 1576 + add a5, sp, a0 + lui a0, 30 + addiw a0, a0, 1568 + add a4, sp, a0 + lui a0, 30 + addiw a0, a0, -392 + add a3, sp, a0 + lui a0, 30 + addiw a0, a0, -400 + add a2, sp, a0 + lui a0, 30 + addiw a0, a0, -408 + add a1, sp, a0 + lui a0, 30 + addiw a0, a0, -416 add a0, sp, a0 - lui a1, 30 - addiw a1, a1, 1648 - add a1, sp, a1 - lui a2, 30 - addiw a2, a2, 1640 - add a2, sp, a2 - lui a3, 30 - addiw a3, a3, 1632 - add a3, sp, a3 - lui a4, 30 - addiw a4, a4, 1624 - add a4, sp, a4 - lui a5, 30 - addiw a5, a5, 1616 - add a5, sp, a5 - lui a6, 30 - addiw a6, a6, 1608 - add a6, sp, a6 - lui a7, 30 - addiw a7, a7, 1600 - add a7, sp, a7 - lui t0, 30 - addiw t0, t0, 1592 - add t0, sp, t0 - lui t1, 30 - addiw t1, t1, 1584 - add t1, sp, t1 - lui t2, 30 - addiw t2, t2, 1576 - add t2, sp, t2 - lui t3, 30 - addiw t3, t3, 1568 - add t3, sp, t3 - lui t4, 30 - addiw t4, t4, -392 - add t4, sp, t4 - lui t5, 30 - addiw t5, t5, -400 - add t5, sp, t5 - lui t6, 30 - addiw t6, t6, -408 - add t6, sp, t6 - lui s2, 30 - addiw s2, s2, -416 - add s2, sp, s2 vle64.v v0, (s8) - csrr s4, vlenb - li s5, 31 - slli s5, s5, 7 - mul s4, s4, s5 - add s4, sp, s4 - lui s5, 31 - addiw s5, s5, -960 - add s4, s4, s5 - vs8r.v v0, (s4) # Unknown-size Folded Spill + csrr s8, vlenb + li s9, 31 + slli s9, s9, 7 + mul s8, s8, s9 + add s8, sp, s8 + lui s9, 31 + addiw s9, s9, -960 + add s8, s8, s9 + vs8r.v v0, (s8) # Unknown-size Folded Spill vle64.v v0, (s7) - csrr s4, vlenb - lui s5, 1 - addiw s5, s5, -1392 - mul s4, s4, s5 - add s4, sp, s4 - lui s5, 31 - addiw s5, s5, -960 - add s4, s4, s5 - vs8r.v v0, (s4) # Unknown-size Folded Spill - vle64.v v0, (s9) - csrr s4, vlenb - lui s5, 1 - addiw s5, s5, 1208 - mul s4, s4, s5 - add s4, sp, s4 - lui s5, 31 - addiw s5, s5, -960 - add s4, s4, s5 - vs8r.v v0, (s4) # Unknown-size Folded Spill - vle64.v v0, (s10) - csrr s4, vlenb - lui s5, 1 - addiw s5, s5, -248 - mul s4, s4, s5 - add s4, sp, s4 - lui s5, 31 - addiw s5, s5, -960 - add s4, s4, s5 - vs8r.v v0, (s4) # Unknown-size Folded Spill - vle64.v v0, (s11) - csrr s4, vlenb - lui s5, 1 - addiw s5, s5, -360 - mul s4, s4, s5 - add s4, sp, s4 - lui s5, 31 - addiw s5, s5, -960 - add s4, s4, s5 - vs8r.v v0, (s4) # Unknown-size Folded Spill - vle64.v v0, (ra) - csrr s4, vlenb - lui s5, 1 - addiw s5, s5, -472 - mul s4, s4, s5 - add s4, sp, s4 - lui s5, 31 - addiw s5, s5, -960 - add s4, s4, s5 - vs8r.v v0, (s4) # Unknown-size Folded Spill + csrr s7, vlenb + lui s8, 1 + addiw s8, s8, -1392 + mul s7, s7, s8 + add s7, sp, s7 + lui s8, 31 + addiw s8, s8, -960 + add s7, s7, s8 + vs8r.v v0, (s7) # Unknown-size Folded Spill + vle64.v v0, (t0) + csrr t0, vlenb + lui s7, 1 + addiw s7, s7, 1224 + mul t0, t0, s7 + add t0, sp, t0 + lui s7, 31 + addiw s7, s7, -960 + add t0, t0, s7 + vs8r.v v0, (t0) # Unknown-size Folded Spill + vle64.v v0, (t1) + csrr t0, vlenb + lui t1, 1 + addiw t1, t1, -248 + mul t0, t0, t1 + add t0, sp, t0 + lui t1, 31 + addiw t1, t1, -960 + add t0, t0, t1 + vs8r.v v0, (t0) # Unknown-size Folded Spill + vle64.v v0, (t2) + csrr t0, vlenb + lui t1, 1 + addiw t1, t1, -360 + mul t0, t0, t1 + add t0, sp, t0 + lui t1, 31 + addiw t1, t1, -960 + add t0, t0, t1 + vs8r.v v0, (t0) # Unknown-size Folded Spill + vle64.v v0, (t3) + csrr t0, vlenb + lui t1, 1 + addiw t1, t1, -472 + mul t0, t0, t1 + add t0, sp, t0 + lui t1, 31 + addiw t1, t1, -960 + add t0, t0, t1 + vs8r.v v0, (t0) # Unknown-size Folded Spill vslidedown.vi v0, v8, 1 - csrr s4, vlenb - li s5, 27 - slli s5, s5, 7 - mul s4, s4, s5 - add s4, sp, s4 - lui s5, 31 - addiw s5, s5, -960 - add s4, s4, s5 - vs8r.v v0, (s4) # Unknown-size Folded Spill - vle64.v v0, (a0) - csrr a0, vlenb - lui s4, 1 - addiw s4, s4, -712 - mul a0, a0, s4 - add a0, sp, a0 - lui s4, 31 - addiw s4, s4, -960 - add a0, a0, s4 - vs8r.v v0, (a0) # Unknown-size Folded Spill + csrr t0, vlenb + li t1, 27 + slli t1, t1, 7 + mul t0, t0, t1 + add t0, sp, t0 + lui t1, 31 + addiw t1, t1, -960 + add t0, t0, t1 + vs8r.v v0, (t0) # Unknown-size Folded Spill + vle64.v v0, (t4) + csrr t0, vlenb + lui t1, 1 + addiw t1, t1, -712 + mul t0, t0, t1 + add t0, sp, t0 + lui t1, 31 + addiw t1, t1, -960 + add t0, t0, t1 + vs8r.v v0, (t0) # Unknown-size Folded Spill + vle64.v v0, (t5) + csrr t0, vlenb + lui t1, 1 + addiw t1, t1, -792 + mul t0, t0, t1 + add t0, sp, t0 + lui t1, 31 + addiw t1, t1, -960 + add t0, t0, t1 + vs8r.v v0, (t0) # Unknown-size Folded Spill + vle64.v v0, (t6) + csrr t0, vlenb + lui t1, 1 + addiw t1, t1, -864 + mul t0, t0, t1 + add t0, sp, t0 + lui t1, 31 + addiw t1, t1, -960 + add t0, t0, t1 + vs8r.v v0, (t0) # Unknown-size Folded Spill + vle64.v v0, (s2) + csrr t0, vlenb + lui t1, 1 + addiw t1, t1, -928 + mul t0, t0, t1 + add t0, sp, t0 + lui t1, 31 + addiw t1, t1, -960 + add t0, t0, t1 + vs8r.v v0, (t0) # Unknown-size Folded Spill + vle64.v v0, (s3) + csrr t0, vlenb + lui t1, 1 + addiw t1, t1, -984 + mul t0, t0, t1 + add t0, sp, t0 + lui t1, 31 + addiw t1, t1, -960 + add t0, t0, t1 + vs8r.v v0, (t0) # Unknown-size Folded Spill + vle64.v v0, (s4) + csrr t0, vlenb + lui t1, 1 + addiw t1, t1, -1064 + mul t0, t0, t1 + add t0, sp, t0 + lui t1, 31 + addiw t1, t1, -960 + add t0, t0, t1 + vs8r.v v0, (t0) # Unknown-size Folded Spill + vle64.v v0, (s5) + csrr t0, vlenb + lui t1, 1 + addiw t1, t1, -1240 + mul t0, t0, t1 + add t0, sp, t0 + lui t1, 31 + addiw t1, t1, -960 + add t0, t0, t1 + vs8r.v v0, (t0) # Unknown-size Folded Spill + vle64.v v0, (s6) + csrr t0, vlenb + lui t1, 1 + addiw t1, t1, -1320 + mul t0, t0, t1 + add t0, sp, t0 + lui t1, 31 + addiw t1, t1, -960 + add t0, t0, t1 + vs8r.v v0, (t0) # Unknown-size Folded Spill + vle64.v v0, (a7) + csrr a7, vlenb + lui t0, 1 + addiw t0, t0, 1304 + mul a7, a7, t0 + add a7, sp, a7 + lui t0, 31 + addiw t0, t0, -960 + add a7, a7, t0 + vs8r.v v0, (a7) # Unknown-size Folded Spill + vle64.v v0, (a6) + csrr a6, vlenb + lui a7, 1 + addiw a7, a7, -1424 + mul a6, a6, a7 + add a6, sp, a6 + lui a7, 31 + addiw a7, a7, -960 + add a6, a6, a7 + vs8r.v v0, (a6) # Unknown-size Folded Spill + vle64.v v0, (a5) + csrr a5, vlenb + lui a6, 1 + addiw a6, a6, -1472 + mul a5, a5, a6 + add a5, sp, a5 + lui a6, 31 + addiw a6, a6, -960 + add a5, a5, a6 + vs8r.v v0, (a5) # Unknown-size Folded Spill + vle64.v v0, (a4) + csrr a4, vlenb + lui a5, 1 + addiw a5, a5, -1544 + mul a4, a4, a5 + add a4, sp, a4 + lui a5, 31 + addiw a5, a5, -960 + add a4, a4, a5 + vs8r.v v0, (a4) # Unknown-size Folded Spill + vslidedown.vi v0, v16, 1 + csrr a4, vlenb + lui a5, 1 + addiw a5, a5, -1728 + mul a4, a4, a5 + add a4, sp, a4 + lui a5, 31 + addiw a5, a5, -960 + add a4, a4, a5 + vs8r.v v0, (a4) # Unknown-size Folded Spill + vle64.v v0, (a3) + csrr a3, vlenb + lui a4, 1 + addiw a4, a4, -1864 + mul a3, a3, a4 + add a3, sp, a3 + lui a4, 31 + addiw a4, a4, -960 + add a3, a3, a4 + vs8r.v v0, (a3) # Unknown-size Folded Spill + vle64.v v0, (a2) + csrr a2, vlenb + lui a3, 1 + addiw a3, a3, -1936 + mul a2, a2, a3 + add a2, sp, a2 + lui a3, 31 + addiw a3, a3, -960 + add a2, a2, a3 + vs8r.v v0, (a2) # Unknown-size Folded Spill vle64.v v0, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -1992 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vs8r.v v0, (a1) # Unknown-size Folded Spill + vle64.v v0, (a0) csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -792 + li a1, 2040 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v0, (a0) # Unknown-size Folded Spill - vle64.v v0, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -864 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vle64.v v0, (a3) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -928 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vle64.v v0, (a4) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -984 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vle64.v v0, (a5) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1064 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vle64.v v0, (a6) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1240 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vle64.v v0, (a7) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1320 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vle64.v v0, (t0) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 1200 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vle64.v v0, (t1) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1424 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vle64.v v0, (t2) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1472 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vle64.v v0, (t3) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1544 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v16, 1 - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1728 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vle64.v v0, (t4) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1864 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vle64.v v0, (t5) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1936 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vle64.v v0, (t6) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1992 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vle64.v v0, (s2) - csrr a0, vlenb - li a1, 2040 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v0, (a0) # Unknown-size Folded Spill - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 1144 + addiw a1, a1, 1144 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -163874,62 +163682,62 @@ add s2, sp, a0 lui a0, 30 addiw a0, a0, -456 - add s7, sp, a0 + add s3, sp, a0 lui a0, 30 addiw a0, a0, -464 - add s8, sp, a0 + add s4, sp, a0 lui a0, 30 addiw a0, a0, -472 - add s9, sp, a0 + add s5, sp, a0 lui a0, 30 addiw a0, a0, -480 - add s10, sp, a0 + add s6, sp, a0 lui a0, 30 addiw a0, a0, -264 - add s11, sp, a0 + add s7, sp, a0 lui a0, 30 addiw a0, a0, -272 - add ra, sp, a0 + add s8, sp, a0 + lui a0, 30 + addiw a0, a0, -280 + add s9, sp, a0 lui a0, 30 addiw a0, a0, -288 - add s4, sp, a0 + add s10, sp, a0 lui a0, 30 addiw a0, a0, -296 - add s5, sp, a0 - lui a0, 30 - addiw a0, a0, -304 - add s6, sp, a0 - vle64.v v16, (s3) + add s11, sp, a0 + vle64.v v16, (ra) csrr a0, vlenb - lui s3, 1 - addiw s3, s3, 224 - mul a0, a0, s3 + lui ra, 1 + addiw ra, ra, 224 + mul a0, a0, ra add a0, sp, a0 - lui s3, 31 - addiw s3, s3, -960 - add a0, a0, s3 + lui ra, 31 + addiw ra, ra, -960 + add a0, a0, ra vs8r.v v16, (a0) # Unknown-size Folded Spill - ld s3, 88(sp) # 8-byte Folded Reload - vle64.v v16, (s3) - csrr s3, vlenb + ld ra, 88(sp) # 8-byte Folded Reload + vle64.v v16, (ra) + csrr ra, vlenb lui a0, 1 addiw a0, a0, -888 - mul s3, s3, a0 - add s3, sp, s3 + mul ra, ra, a0 + add ra, sp, ra lui a0, 31 addiw a0, a0, -960 - add s3, s3, a0 + add ra, ra, a0 ld a0, 8(sp) - vs8r.v v16, (s3) # Unknown-size Folded Spill + vs8r.v v16, (ra) # Unknown-size Folded Spill vle64.v v16, (a0) csrr a0, vlenb - lui s3, 1 - addiw s3, s3, 136 - mul a0, a0, s3 + lui ra, 1 + addiw ra, ra, 136 + mul a0, a0, ra add a0, sp, a0 - lui s3, 31 - addiw s3, s3, -960 - add a0, a0, s3 + lui ra, 31 + addiw ra, ra, -960 + add a0, a0, ra vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (a1) csrr a0, vlenb @@ -163944,7 +163752,7 @@ vle64.v v16, (a2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1304 + addiw a1, a1, 1136 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -164074,7 +163882,7 @@ vle64.v v16, (t6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1192 + addiw a1, a1, 1216 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -164102,7 +163910,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill - vle64.v v24, (s7) + vle64.v v24, (s3) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1480 @@ -164112,7 +163920,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill - vle64.v v24, (s8) + vle64.v v24, (s4) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1552 @@ -164122,7 +163930,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill - vle64.v v24, (s9) + vle64.v v24, (s5) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1632 @@ -164132,7 +163940,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill - vle64.v v24, (s10) + vle64.v v24, (s6) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1704 @@ -164152,7 +163960,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill - vle64.v v24, (s11) + vle64.v v24, (s7) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1960 @@ -164162,20 +163970,17 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill - vle64.v v24, (ra) + vle64.v v24, (s8) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1184 + addiw a1, a1, 1208 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill - lui a0, 30 - addiw a0, a0, -280 - add a0, sp, a0 - vle64.v v24, (a0) + vle64.v v24, (s9) csrr a0, vlenb lui a1, 1 addiw a1, a1, -2032 @@ -164185,7 +163990,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill - vle64.v v24, (s4) + vle64.v v24, (s10) csrr a0, vlenb li a1, 2024 mul a0, a0, a1 @@ -164194,7 +163999,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill - vle64.v v24, (s5) + vle64.v v24, (s11) csrr a0, vlenb li a1, 1976 mul a0, a0, a1 @@ -164203,7 +164008,10 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill - vle64.v v24, (s6) + lui a0, 30 + addiw a0, a0, -304 + add a0, sp, a0 + vle64.v v24, (a0) csrr a0, vlenb li a1, 1912 mul a0, a0, a1 @@ -164466,40 +164274,40 @@ add a5, sp, a0 lui a0, 30 addiw a0, a0, 104 - add a6, sp, a0 + add s4, sp, a0 lui a0, 30 addiw a0, a0, 96 - add a7, sp, a0 + add s3, sp, a0 lui a0, 30 addiw a0, a0, 88 - add t0, sp, a0 + add s2, sp, a0 lui a0, 30 addiw a0, a0, 80 - add t1, sp, a0 + add t6, sp, a0 lui a0, 30 addiw a0, a0, 72 - add t2, sp, a0 + add t5, sp, a0 lui a0, 30 addiw a0, a0, 64 - add t3, sp, a0 + add t4, sp, a0 lui a0, 30 addiw a0, a0, 56 - add t4, sp, a0 + add t3, sp, a0 lui a0, 30 addiw a0, a0, 48 - add t5, sp, a0 + add t2, sp, a0 lui a0, 30 addiw a0, a0, 40 - add t6, sp, a0 + add t1, sp, a0 lui a0, 30 addiw a0, a0, 32 - add s2, sp, a0 + add t0, sp, a0 lui a0, 30 addiw a0, a0, -584 - add s3, sp, a0 + add a7, sp, a0 lui a0, 30 addiw a0, a0, -592 - add s4, sp, a0 + add a6, sp, a0 lui a0, 30 addiw a0, a0, -600 add s5, sp, a0 @@ -164507,6 +164315,9 @@ addiw a0, a0, -608 add s6, sp, a0 lui a0, 30 + addiw a0, a0, -8 + add s7, sp, a0 + lui a0, 30 addiw a0, a0, -16 add s8, sp, a0 lui a0, 30 @@ -164517,42 +164328,39 @@ add s10, sp, a0 lui a0, 30 addiw a0, a0, -40 - add s11, sp, a0 - lui a0, 30 - addiw a0, a0, -48 add ra, sp, a0 - ld s7, 96(sp) # 8-byte Folded Reload - vle64.v v16, (s7) + ld s11, 96(sp) # 8-byte Folded Reload + vle64.v v16, (s11) csrr a0, vlenb - lui s7, 1 - addiw s7, s7, 440 - mul a0, a0, s7 + lui s11, 1 + addiw s11, s11, 440 + mul a0, a0, s11 add a0, sp, a0 - lui s7, 31 - addiw s7, s7, -960 - add a0, a0, s7 + lui s11, 31 + addiw s11, s11, -960 + add a0, a0, s11 vs8r.v v16, (a0) # Unknown-size Folded Spill - ld s7, 104(sp) # 8-byte Folded Reload - vle64.v v8, (s7) - csrr s7, vlenb + ld s11, 104(sp) # 8-byte Folded Reload + vle64.v v8, (s11) + csrr s11, vlenb lui a0, 1 addiw a0, a0, -840 - mul s7, s7, a0 - add s7, sp, s7 + mul s11, s11, a0 + add s11, sp, s11 lui a0, 31 addiw a0, a0, -960 - add s7, s7, a0 + add s11, s11, a0 ld a0, 8(sp) - vs8r.v v8, (s7) # Unknown-size Folded Spill + vs8r.v v8, (s11) # Unknown-size Folded Spill vle64.v v16, (a0) csrr a0, vlenb - lui s7, 1 - addiw s7, s7, 360 - mul a0, a0, s7 + lui s11, 1 + addiw s11, s11, 360 + mul a0, a0, s11 add a0, sp, a0 - lui s7, 31 - addiw s7, s7, -960 - add a0, a0, s7 + lui s11, 31 + addiw s11, s11, -960 + add a0, a0, s11 vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (a1) csrr a0, vlenb @@ -164614,7 +164422,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (a6) + vle64.v v16, (s4) csrr a0, vlenb lui a1, 1 addiw a1, a1, -168 @@ -164624,7 +164432,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (a7) + vle64.v v16, (s3) csrr a0, vlenb lui a1, 1 addiw a1, a1, -232 @@ -164634,7 +164442,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (t0) + vle64.v v16, (s2) csrr a0, vlenb lui a1, 1 addiw a1, a1, -336 @@ -164644,7 +164452,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (t1) + vle64.v v16, (t6) csrr a0, vlenb lui a1, 1 addiw a1, a1, -456 @@ -164654,7 +164462,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (t2) + vle64.v v16, (t5) csrr a0, vlenb lui a1, 1 addiw a1, a1, -544 @@ -164664,7 +164472,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (t3) + vle64.v v16, (t4) csrr a0, vlenb lui a1, 1 addiw a1, a1, -608 @@ -164674,7 +164482,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (t4) + vle64.v v16, (t3) csrr a0, vlenb lui a1, 1 addiw a1, a1, -664 @@ -164684,7 +164492,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v8, (t5) + vle64.v v8, (t2) csrr a0, vlenb lui a1, 1 addiw a1, a1, -784 @@ -164694,7 +164502,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t6) + vle64.v v8, (t1) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1056 @@ -164704,7 +164512,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s2) + vle64.v v8, (t0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1312 @@ -164733,7 +164541,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s3) + vle64.v v8, (a7) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1448 @@ -164743,7 +164551,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s4) + vle64.v v8, (a6) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1520 @@ -164784,10 +164592,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 30 - addiw a0, a0, -8 - add a0, sp, a0 - vle64.v v8, (a0) + vle64.v v8, (s7) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1912 @@ -164820,14 +164625,14 @@ vle64.v v8, (s10) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1352 + addiw a1, a1, 1200 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s11) + vle64.v v8, (ra) csrr a0, vlenb li a1, 2008 mul a0, a0, a1 @@ -164836,7 +164641,10 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (ra) + lui a0, 30 + addiw a0, a0, -48 + add a0, sp, a0 + vle64.v v8, (a0) csrr a0, vlenb li a1, 1952 mul a0, a0, a1 @@ -164942,7 +164750,7 @@ vslidedown.vi v8, v0, 3 csrr a1, vlenb lui a2, 1 - addiw a2, a2, 1296 + addiw a2, a2, 1192 mul a1, a1, a2 add a1, sp, a1 lui a2, 31 @@ -164971,7 +164779,7 @@ vslidedown.vi v0, v8, 3 csrr a1, vlenb lui a2, 1 - addiw a2, a2, 1288 + addiw a2, a2, 1296 mul a1, a1, a2 add a1, sp, a1 lui a2, 31 @@ -165101,93 +164909,93 @@ add a5, sp, a0 lui a0, 30 addiw a0, a0, 360 - add a6, sp, a0 + add ra, sp, a0 lui a0, 30 addiw a0, a0, 352 - add a7, sp, a0 + add s11, sp, a0 lui a0, 30 addiw a0, a0, 344 - add t0, sp, a0 + add s10, sp, a0 lui a0, 30 addiw a0, a0, 336 - add t1, sp, a0 + add s2, sp, a0 lui a0, 30 addiw a0, a0, 328 - add t2, sp, a0 + add t6, sp, a0 lui a0, 30 addiw a0, a0, 320 - add t3, sp, a0 + add t5, sp, a0 lui a0, 30 addiw a0, a0, 312 add t4, sp, a0 lui a0, 30 addiw a0, a0, 304 - add t5, sp, a0 + add t3, sp, a0 lui a0, 30 addiw a0, a0, 296 - add t6, sp, a0 + add t2, sp, a0 lui a0, 30 addiw a0, a0, 288 - add s2, sp, a0 + add t1, sp, a0 lui a0, 30 addiw a0, a0, -712 - add s3, sp, a0 + add t0, sp, a0 lui a0, 30 addiw a0, a0, -720 - add s4, sp, a0 + add a7, sp, a0 lui a0, 30 addiw a0, a0, -728 - add s5, sp, a0 + add a6, sp, a0 lui a0, 30 addiw a0, a0, -736 - add s6, sp, a0 + add s3, sp, a0 + lui a0, 30 + addiw a0, a0, 248 + add s4, sp, a0 lui a0, 30 addiw a0, a0, 240 - add s8, sp, a0 + add s5, sp, a0 lui a0, 30 addiw a0, a0, 232 - add s9, sp, a0 + add s6, sp, a0 lui a0, 30 addiw a0, a0, 224 - add s10, sp, a0 + add s7, sp, a0 lui a0, 30 addiw a0, a0, 216 - add s11, sp, a0 - lui a0, 30 - addiw a0, a0, 208 - add ra, sp, a0 - ld s7, 112(sp) # 8-byte Folded Reload - vle64.v v8, (s7) + add s8, sp, a0 + ld s9, 112(sp) # 8-byte Folded Reload + vle64.v v8, (s9) csrr a0, vlenb - lui s7, 1 - addiw s7, s7, 584 - mul a0, a0, s7 + lui s9, 1 + addiw s9, s9, 584 + mul a0, a0, s9 add a0, sp, a0 - lui s7, 31 - addiw s7, s7, -960 - add a0, a0, s7 + lui s9, 31 + addiw s9, s9, -960 + add a0, a0, s9 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld s7, 120(sp) # 8-byte Folded Reload - vle64.v v8, (s7) - csrr s7, vlenb + ld s9, 120(sp) # 8-byte Folded Reload + vle64.v v8, (s9) + csrr s9, vlenb lui a0, 1 addiw a0, a0, -552 - mul s7, s7, a0 - add s7, sp, s7 + mul s9, s9, a0 + add s9, sp, s9 lui a0, 31 addiw a0, a0, -960 - add s7, s7, a0 + add s9, s9, a0 ld a0, 8(sp) - vs8r.v v8, (s7) # Unknown-size Folded Spill + vs8r.v v8, (s9) # Unknown-size Folded Spill vle64.v v8, (a0) csrr a0, vlenb - lui s7, 1 - addiw s7, s7, 528 - mul a0, a0, s7 + lui s9, 1 + addiw s9, s9, 528 + mul a0, a0, s9 add a0, sp, a0 - lui s7, 31 - addiw s7, s7, -960 - add a0, a0, s7 + lui s9, 31 + addiw s9, s9, -960 + add a0, a0, s9 vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (a1) csrr a0, vlenb @@ -165221,8 +165029,8 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill vslidedown.vi v8, v24, 1 csrr a0, vlenb - li a1, 21 - slli a1, a1, 8 + lui a1, 1 + addiw a1, a1, 1344 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -165249,7 +165057,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (a6) + vle64.v v8, (ra) csrr a0, vlenb lui a1, 1 addiw a1, a1, 64 @@ -165259,7 +165067,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (a7) + vle64.v v8, (s11) csrr a0, vlenb lui a1, 1 addiw a1, a1, 16 @@ -165269,7 +165077,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t0) + vle64.v v8, (s10) csrr a0, vlenb lui a1, 1 addiw a1, a1, -48 @@ -165279,7 +165087,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t1) + vle64.v v8, (s2) csrr a0, vlenb lui a1, 1 addiw a1, a1, -104 @@ -165289,7 +165097,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t2) + vle64.v v8, (t6) csrr a0, vlenb lui a1, 1 addiw a1, a1, -176 @@ -165299,7 +165107,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t3) + vle64.v v8, (t5) csrr a0, vlenb lui a1, 1 addiw a1, a1, -400 @@ -165319,7 +165127,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t5) + vle64.v v8, (t3) csrr a0, vlenb lui a1, 1 addiw a1, a1, -624 @@ -165329,7 +165137,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t6) + vle64.v v8, (t2) csrr a0, vlenb lui a1, 1 addiw a1, a1, -672 @@ -165339,7 +165147,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s2) + vle64.v v8, (t1) csrr a0, vlenb lui a1, 1 addiw a1, a1, -728 @@ -165352,14 +165160,14 @@ vslidedown.vi v8, v0, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1344 + addiw a1, a1, 1184 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s3) + vle64.v v8, (t0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1000 @@ -165369,7 +165177,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s4) + vle64.v v8, (a7) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1080 @@ -165379,7 +165187,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s5) + vle64.v v8, (a6) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1248 @@ -165389,7 +165197,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s6) + vle64.v v8, (s3) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1336 @@ -165409,10 +165217,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 30 - addiw a0, a0, 248 - add a0, sp, a0 - vle64.v v8, (a0) + vle64.v v8, (s4) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1616 @@ -165422,7 +165227,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s8) + vle64.v v8, (s5) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1672 @@ -165432,7 +165237,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s9) + vle64.v v8, (s6) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1888 @@ -165442,7 +165247,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s10) + vle64.v v8, (s7) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1872 @@ -165452,7 +165257,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s11) + vle64.v v8, (s8) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1944 @@ -165462,10 +165267,13 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (ra) + lui a0, 30 + addiw a0, a0, 208 + add a0, sp, a0 + vle64.v v8, (a0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1336 + addiw a1, a1, 1288 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -165739,61 +165547,61 @@ add a5, sp, a0 lui a0, 30 addiw a0, a0, 616 - add a6, sp, a0 + add ra, sp, a0 lui a0, 30 addiw a0, a0, 608 - add a7, sp, a0 + add s11, sp, a0 lui a0, 30 addiw a0, a0, 600 - add t0, sp, a0 + add s10, sp, a0 lui a0, 30 addiw a0, a0, 592 - add t1, sp, a0 + add s9, sp, a0 lui a0, 30 addiw a0, a0, 584 - add t2, sp, a0 + add s8, sp, a0 lui a0, 30 addiw a0, a0, 576 - add t3, sp, a0 + add t5, sp, a0 lui a0, 30 addiw a0, a0, 568 add t4, sp, a0 lui a0, 30 addiw a0, a0, 560 - add t5, sp, a0 + add t3, sp, a0 lui a0, 30 addiw a0, a0, 552 - add t6, sp, a0 + add t2, sp, a0 lui a0, 30 addiw a0, a0, 544 - add s2, sp, a0 + add t1, sp, a0 lui a0, 30 addiw a0, a0, -840 - add s3, sp, a0 + add t0, sp, a0 lui a0, 30 addiw a0, a0, -848 - add s4, sp, a0 + add a7, sp, a0 lui a0, 30 addiw a0, a0, -856 - add s5, sp, a0 + add a6, sp, a0 lui a0, 30 addiw a0, a0, -864 - add s6, sp, a0 + add t6, sp, a0 + lui a0, 30 + addiw a0, a0, 504 + add s2, sp, a0 lui a0, 30 addiw a0, a0, 496 - add s8, sp, a0 + add s3, sp, a0 lui a0, 30 addiw a0, a0, 488 - add s9, sp, a0 + add s4, sp, a0 lui a0, 30 addiw a0, a0, 480 - add s10, sp, a0 + add s5, sp, a0 lui a0, 30 addiw a0, a0, 472 - add s11, sp, a0 - lui a0, 30 - addiw a0, a0, 464 - add ra, sp, a0 + add s6, sp, a0 ld s7, 128(sp) # 8-byte Folded Reload vle64.v v8, (s7) csrr a0, vlenb @@ -165808,8 +165616,8 @@ ld s7, 136(sp) # 8-byte Folded Reload vle64.v v8, (s7) csrr s7, vlenb - lui a0, 1 - addiw a0, a0, 1272 + li a0, 21 + slli a0, a0, 8 mul s7, s7, a0 add s7, sp, s7 lui a0, 31 @@ -165870,7 +165678,7 @@ vle64.v v8, (a4) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1328 + addiw a1, a1, 1176 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -165887,7 +165695,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (a6) + vle64.v v8, (ra) csrr a0, vlenb lui a1, 1 addiw a1, a1, 112 @@ -165897,7 +165705,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (a7) + vle64.v v8, (s11) csrr a0, vlenb lui a1, 1 addiw a1, a1, 40 @@ -165907,7 +165715,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t0) + vle64.v v8, (s10) csrr a0, vlenb lui a1, 1 addiw a1, a1, -16 @@ -165917,7 +165725,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t1) + vle64.v v8, (s9) csrr a0, vlenb lui a1, 1 addiw a1, a1, -64 @@ -165927,7 +165735,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t2) + vle64.v v8, (s8) csrr a0, vlenb lui a1, 1 addiw a1, a1, -136 @@ -165937,7 +165745,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t3) + vle64.v v8, (t5) csrr a0, vlenb lui a1, 1 addiw a1, a1, -208 @@ -165957,7 +165765,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t5) + vle64.v v8, (t3) csrr a0, vlenb lui a1, 1 addiw a1, a1, -416 @@ -165967,7 +165775,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t6) + vle64.v v8, (t2) csrr a0, vlenb li a1, 7 slli a1, a1, 9 @@ -165977,7 +165785,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s2) + vle64.v v8, (t1) csrr a0, vlenb lui a1, 1 addiw a1, a1, -592 @@ -165997,7 +165805,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s3) + vle64.v v8, (t0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -832 @@ -166007,7 +165815,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s4) + vle64.v v8, (a7) csrr a0, vlenb lui a1, 1 addiw a1, a1, -904 @@ -166017,7 +165825,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s5) + vle64.v v8, (a6) csrr a0, vlenb lui a1, 1 addiw a1, a1, -960 @@ -166027,7 +165835,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s6) + vle64.v v8, (t6) csrr a0, vlenb li a1, 3 slli a1, a1, 10 @@ -166047,10 +165855,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 30 - addiw a0, a0, 504 - add a0, sp, a0 - vle64.v v8, (a0) + vle64.v v8, (s2) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1432 @@ -166060,7 +165865,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s8) + vle64.v v8, (s3) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1496 @@ -166070,7 +165875,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s9) + vle64.v v8, (s4) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1560 @@ -166080,7 +165885,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s10) + vle64.v v8, (s5) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1640 @@ -166090,7 +165895,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s11) + vle64.v v8, (s6) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1712 @@ -166100,7 +165905,10 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (ra) + lui a0, 30 + addiw a0, a0, 464 + add a0, sp, a0 + vle64.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1776 @@ -166129,7 +165937,7 @@ vle64.v v8, (a0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1264 + addiw a1, a1, 1128 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -166351,136 +166159,136 @@ vsetivli zero, 1, e64, m1, ta, ma lui a0, 30 addiw a0, a0, 760 - add a0, sp, a0 - sd a0, 8(sp) + add s11, sp, a0 + sd s11, 8(sp) lui a0, 30 addiw a0, a0, 752 - add a1, sp, a0 + add ra, sp, a0 lui a0, 30 addiw a0, a0, 744 - add a2, sp, a0 - lui a0, 30 - addiw a0, a0, 736 - add a3, sp, a0 - lui a0, 30 - addiw a0, a0, 728 - add a4, sp, a0 - lui a0, 30 - addiw a0, a0, 720 - add a5, sp, a0 - lui a0, 30 - addiw a0, a0, 712 - add a6, sp, a0 - lui a0, 30 - addiw a0, a0, 704 - add a7, sp, a0 - lui a0, 30 - addiw a0, a0, 696 - add t0, sp, a0 - lui a0, 30 - addiw a0, a0, 688 - add t1, sp, a0 - lui a0, 30 - addiw a0, a0, 680 - add t2, sp, a0 - lui a0, 30 - addiw a0, a0, 672 - add t3, sp, a0 - lui a0, 30 - addiw a0, a0, -1032 - add t4, sp, a0 - lui a0, 30 - addiw a0, a0, -1040 - add t5, sp, a0 - lui a0, 30 - addiw a0, a0, -1048 - add t6, sp, a0 - lui a0, 30 - addiw a0, a0, -1056 - add s2, sp, a0 - lui a0, 30 - addiw a0, a0, 880 - add s4, sp, a0 - lui a0, 30 - addiw a0, a0, 872 - add s5, sp, a0 - lui a0, 30 - addiw a0, a0, 864 - add s6, sp, a0 - lui a0, 30 - addiw a0, a0, 856 - add s7, sp, a0 - lui a0, 30 - addiw a0, a0, 848 - add s8, sp, a0 - lui a0, 30 - addiw a0, a0, 840 - add s9, sp, a0 - lui a0, 30 - addiw a0, a0, 832 - add s10, sp, a0 - lui a0, 30 - addiw a0, a0, 824 - add s11, sp, a0 - lui a0, 30 - addiw a0, a0, 816 - add ra, sp, a0 - ld s3, 144(sp) # 8-byte Folded Reload - vle64.v v16, (s3) - csrr a0, vlenb - lui s3, 1 - addiw s3, s3, 632 - mul a0, a0, s3 add a0, sp, a0 - lui s3, 31 - addiw s3, s3, -960 - add a0, a0, s3 - vs8r.v v16, (a0) # Unknown-size Folded Spill - ld s3, 152(sp) # 8-byte Folded Reload - vle64.v v16, (s3) - csrr s3, vlenb - lui a0, 1 - addiw a0, a0, -304 - mul s3, s3, a0 - add s3, sp, s3 - lui a0, 31 - addiw a0, a0, -960 - add s3, s3, a0 - ld a0, 8(sp) - vs8r.v v16, (s3) # Unknown-size Folded Spill + lui a1, 30 + addiw a1, a1, 736 + add a1, sp, a1 + lui a2, 30 + addiw a2, a2, 728 + add a2, sp, a2 + lui a3, 30 + addiw a3, a3, 720 + add a3, sp, a3 + lui a4, 30 + addiw a4, a4, 712 + add a4, sp, a4 + lui a5, 30 + addiw a5, a5, 704 + add a5, sp, a5 + lui a6, 30 + addiw a6, a6, 696 + add s10, sp, a6 + lui a6, 30 + addiw a6, a6, 688 + add s9, sp, a6 + lui a6, 30 + addiw a6, a6, 680 + add s8, sp, a6 + lui a6, 30 + addiw a6, a6, 672 + add s7, sp, a6 + lui a6, 30 + addiw a6, a6, -1032 + add s6, sp, a6 + lui a6, 30 + addiw a6, a6, -1040 + add s5, sp, a6 + lui a6, 30 + addiw a6, a6, -1048 + add t3, sp, a6 + lui a6, 30 + addiw a6, a6, -1056 + add t2, sp, a6 + lui a6, 30 + addiw a6, a6, 888 + add t1, sp, a6 + lui a6, 30 + addiw a6, a6, 880 + add t0, sp, a6 + lui a6, 30 + addiw a6, a6, 872 + add a7, sp, a6 + lui a6, 30 + addiw a6, a6, 864 + add a6, sp, a6 + lui t4, 30 + addiw t4, t4, 856 + add s4, sp, t4 + lui t4, 30 + addiw t4, t4, 848 + add s3, sp, t4 + lui t4, 30 + addiw t4, t4, 840 + add t4, sp, t4 + lui t5, 30 + addiw t5, t5, 832 + add t5, sp, t5 + lui t6, 30 + addiw t6, t6, 824 + add t6, sp, t6 + ld s2, 144(sp) # 8-byte Folded Reload + vle64.v v16, (s2) + csrr s2, vlenb + lui s11, 1 + addiw s11, s11, 632 + mul s2, s2, s11 + add s2, sp, s2 + lui s11, 31 + addiw s11, s11, -960 + add s2, s2, s11 + vs8r.v v16, (s2) # Unknown-size Folded Spill + ld s2, 152(sp) # 8-byte Folded Reload + vle64.v v16, (s2) + csrr s2, vlenb + lui s11, 1 + addiw s11, s11, -304 + mul s2, s2, s11 + add s2, sp, s2 + lui s11, 31 + addiw s11, s11, -960 + add s2, s2, s11 + ld s11, 8(sp) + vs8r.v v16, (s2) # Unknown-size Folded Spill + vle64.v v16, (s11) + csrr s2, vlenb + lui s11, 1 + addiw s11, s11, -736 + mul s2, s2, s11 + add s2, sp, s2 + lui s11, 31 + addiw s11, s11, -960 + add s2, s2, s11 + vs8r.v v16, (s2) # Unknown-size Folded Spill + vle64.v v16, (ra) + csrr s2, vlenb + lui s11, 1 + addiw s11, s11, -800 + mul s2, s2, s11 + add s2, sp, s2 + lui s11, 31 + addiw s11, s11, -960 + add s2, s2, s11 + vs8r.v v16, (s2) # Unknown-size Folded Spill vle64.v v16, (a0) csrr a0, vlenb - lui s3, 1 - addiw s3, s3, -736 - mul a0, a0, s3 + lui s2, 1 + addiw s2, s2, -872 + mul a0, a0, s2 add a0, sp, a0 - lui s3, 31 - addiw s3, s3, -960 - add a0, a0, s3 + lui s2, 31 + addiw s2, s2, -960 + add a0, a0, s2 vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (a1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -800 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (a2) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -872 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (a3) - csrr a0, vlenb - lui a1, 1 addiw a1, a1, -936 mul a0, a0, a1 add a0, sp, a0 @@ -166488,7 +166296,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (a4) + vle64.v v16, (a2) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1008 @@ -166498,7 +166306,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (a5) + vle64.v v16, (a3) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1200 @@ -166508,7 +166316,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (a6) + vle64.v v16, (a4) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1264 @@ -166518,7 +166326,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (a7) + vle64.v v16, (a5) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1352 @@ -166528,7 +166336,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (t0) + vle64.v v16, (s10) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1400 @@ -166538,17 +166346,17 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (t1) + vle64.v v16, (s9) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1176 + addiw a1, a1, 1168 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (t2) + vle64.v v16, (s8) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1504 @@ -166558,7 +166366,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (t3) + vle64.v v16, (s7) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1568 @@ -166578,7 +166386,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (t4) + vle64.v v16, (s6) csrr a0, vlenb lui a1, 1 addiw a1, a1, 384 @@ -166588,7 +166396,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (t5) + vle64.v v16, (s5) csrr a0, vlenb lui a1, 1 addiw a1, a1, 328 @@ -166598,7 +166406,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (t6) + vle64.v v16, (t3) csrr a0, vlenb lui a1, 1 addiw a1, a1, 272 @@ -166608,7 +166416,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (s2) + vle64.v v16, (t2) csrr a0, vlenb lui a1, 1 addiw a1, a1, 216 @@ -166628,10 +166436,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - lui a0, 30 - addiw a0, a0, 888 - add a0, sp, a0 - vle64.v v16, (a0) + vle64.v v16, (t1) csrr a0, vlenb lui a1, 1 addiw a1, a1, -40 @@ -166641,7 +166446,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (s4) + vle64.v v16, (t0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -96 @@ -166651,17 +166456,17 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (s5) + vle64.v v16, (a7) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1256 + addiw a1, a1, 1160 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (s6) + vle64.v v16, (a6) csrr a0, vlenb lui a1, 1 addiw a1, a1, -184 @@ -166671,7 +166476,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (s7) + vle64.v v16, (s4) csrr a0, vlenb li a1, 15 slli a1, a1, 8 @@ -166681,7 +166486,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (s8) + vle64.v v16, (s3) csrr a0, vlenb lui a1, 1 addiw a1, a1, -368 @@ -166691,7 +166496,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (s9) + vle64.v v16, (t4) csrr a0, vlenb lui a1, 1 addiw a1, a1, -488 @@ -166701,7 +166506,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (s10) + vle64.v v16, (t5) csrr a0, vlenb lui a1, 1 addiw a1, a1, -568 @@ -166711,7 +166516,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (s11) + vle64.v v16, (t6) csrr a0, vlenb lui a1, 1 addiw a1, a1, -632 @@ -166721,7 +166526,10 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (ra) + lui a0, 30 + addiw a0, a0, 816 + add a0, sp, a0 + vle64.v v16, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -680 @@ -166795,7 +166603,7 @@ vle64.v v0, (a0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1136 + addiw a1, a1, 1272 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -167006,93 +166814,93 @@ add a5, sp, a0 lui a0, 30 addiw a0, a0, 1000 - add a6, sp, a0 + add ra, sp, a0 lui a0, 30 addiw a0, a0, 992 - add a7, sp, a0 + add s11, sp, a0 lui a0, 30 addiw a0, a0, 984 - add t0, sp, a0 + add s10, sp, a0 lui a0, 30 addiw a0, a0, 976 - add t1, sp, a0 + add s9, sp, a0 lui a0, 30 addiw a0, a0, 968 - add t2, sp, a0 + add s8, sp, a0 lui a0, 30 addiw a0, a0, 960 - add t3, sp, a0 + add s7, sp, a0 lui a0, 30 addiw a0, a0, 952 - add t4, sp, a0 + add s6, sp, a0 lui a0, 30 addiw a0, a0, 944 - add t5, sp, a0 + add s5, sp, a0 lui a0, 30 addiw a0, a0, 936 - add t6, sp, a0 + add s4, sp, a0 lui a0, 30 addiw a0, a0, 928 - add s2, sp, a0 + add t1, sp, a0 lui a0, 30 addiw a0, a0, -1544 - add s3, sp, a0 + add t0, sp, a0 lui a0, 30 addiw a0, a0, -1552 - add s4, sp, a0 + add a7, sp, a0 lui a0, 30 addiw a0, a0, -1560 - add s5, sp, a0 + add a6, sp, a0 lui a0, 30 addiw a0, a0, -1568 - add s6, sp, a0 + add t2, sp, a0 + lui a0, 30 + addiw a0, a0, 1784 + add t3, sp, a0 lui a0, 30 addiw a0, a0, 1776 - add s8, sp, a0 + add t4, sp, a0 lui a0, 30 addiw a0, a0, 1768 - add s9, sp, a0 + add t5, sp, a0 lui a0, 30 addiw a0, a0, 1760 - add s10, sp, a0 + add t6, sp, a0 lui a0, 30 addiw a0, a0, 1752 - add s11, sp, a0 - lui a0, 30 - addiw a0, a0, 1744 - add ra, sp, a0 - ld s7, 168(sp) # 8-byte Folded Reload - vle64.v v8, (s7) + add s2, sp, a0 + ld s3, 168(sp) # 8-byte Folded Reload + vle64.v v8, (s3) csrr a0, vlenb - lui s7, 1 - addiw s7, s7, 648 - mul a0, a0, s7 + lui s3, 1 + addiw s3, s3, 648 + mul a0, a0, s3 add a0, sp, a0 - lui s7, 31 - addiw s7, s7, -960 - add a0, a0, s7 + lui s3, 31 + addiw s3, s3, -960 + add a0, a0, s3 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld s7, 184(sp) # 8-byte Folded Reload - vle64.v v8, (s7) - csrr s7, vlenb + ld s3, 184(sp) # 8-byte Folded Reload + vle64.v v8, (s3) + csrr s3, vlenb lui a0, 1 addiw a0, a0, -240 - mul s7, s7, a0 - add s7, sp, s7 + mul s3, s3, a0 + add s3, sp, s3 lui a0, 31 addiw a0, a0, -960 - add s7, s7, a0 + add s3, s3, a0 ld a0, 8(sp) - vs8r.v v8, (s7) # Unknown-size Folded Spill + vs8r.v v8, (s3) # Unknown-size Folded Spill vle64.v v8, (a0) csrr a0, vlenb - lui s7, 1 - addiw s7, s7, 600 - mul a0, a0, s7 + lui s3, 1 + addiw s3, s3, 600 + mul a0, a0, s3 add a0, sp, a0 - lui s7, 31 - addiw s7, s7, -960 - add a0, a0, s7 + lui s3, 31 + addiw s3, s3, -960 + add a0, a0, s3 vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (a1) csrr a0, vlenb @@ -167155,7 +166963,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (a6) + vle64.v v16, (ra) csrr a0, vlenb lui a1, 1 addiw a1, a1, 152 @@ -167165,7 +166973,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (a7) + vle64.v v16, (s11) csrr a0, vlenb lui a1, 1 addiw a1, a1, 96 @@ -167175,17 +166983,17 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (t0) + vle64.v v16, (s10) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1248 + addiw a1, a1, 1264 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (t1) + vle64.v v16, (s9) csrr a0, vlenb lui a1, 1 addiw a1, a1, 8 @@ -167195,7 +167003,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (t2) + vle64.v v16, (s8) csrr a0, vlenb lui a1, 1 addiw a1, a1, -56 @@ -167205,7 +167013,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (t3) + vle64.v v16, (s7) csrr a0, vlenb lui a1, 1 addiw a1, a1, -112 @@ -167215,7 +167023,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (t4) + vle64.v v16, (s6) csrr a0, vlenb lui a1, 1 addiw a1, a1, -192 @@ -167225,7 +167033,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (t5) + vle64.v v16, (s5) csrr a0, vlenb lui a1, 1 addiw a1, a1, -264 @@ -167235,7 +167043,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (t6) + vle64.v v16, (s4) csrr a0, vlenb lui a1, 1 addiw a1, a1, -376 @@ -167245,7 +167053,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (s2) + vle64.v v16, (t1) csrr a0, vlenb lui a1, 1 addiw a1, a1, -496 @@ -167265,7 +167073,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (s3) + vle64.v v16, (t0) csrr a0, vlenb li a1, 13 slli a1, a1, 8 @@ -167275,7 +167083,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (s4) + vle64.v v16, (a7) csrr a0, vlenb lui a1, 1 addiw a1, a1, -848 @@ -167285,7 +167093,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (s5) + vle64.v v16, (a6) csrr a0, vlenb lui a1, 1 addiw a1, a1, -920 @@ -167295,10 +167103,10 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (s6) + vle64.v v16, (t2) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1168 + addiw a1, a1, 1120 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -167316,10 +167124,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill - lui a0, 30 - addiw a0, a0, 1784 - add a0, sp, a0 - vle64.v v24, (a0) + vle64.v v24, (t3) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1376 @@ -167329,7 +167134,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill - vle64.v v24, (s8) + vle64.v v24, (t4) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1416 @@ -167339,7 +167144,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill - vle64.v v24, (s9) + vle64.v v24, (t5) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1464 @@ -167349,7 +167154,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill - vle64.v v24, (s10) + vle64.v v24, (t6) csrr a0, vlenb li a1, 5 slli a1, a1, 9 @@ -167359,7 +167164,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill - vle64.v v24, (s11) + vle64.v v24, (s2) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1624 @@ -167369,7 +167174,10 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill - vle64.v v24, (ra) + lui a0, 30 + addiw a0, a0, 1744 + add a0, sp, a0 + vle64.v v24, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1696 @@ -167450,7 +167258,7 @@ vle64.v v24, (a0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1320 + addiw a1, a1, 1256 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -167643,93 +167451,93 @@ add a5, sp, a0 lui a0, 30 addiw a0, a0, 1256 - add a6, sp, a0 + add ra, sp, a0 lui a0, 30 addiw a0, a0, 1248 - add a7, sp, a0 + add s11, sp, a0 lui a0, 30 addiw a0, a0, 1240 - add t0, sp, a0 + add s10, sp, a0 lui a0, 30 addiw a0, a0, 1232 - add t1, sp, a0 + add s9, sp, a0 lui a0, 30 addiw a0, a0, 1224 - add t2, sp, a0 + add s8, sp, a0 lui a0, 30 addiw a0, a0, 1216 - add t3, sp, a0 + add s7, sp, a0 lui a0, 30 addiw a0, a0, 1208 - add t4, sp, a0 + add s6, sp, a0 lui a0, 30 addiw a0, a0, 1200 - add t5, sp, a0 + add s5, sp, a0 lui a0, 30 addiw a0, a0, 1192 - add t6, sp, a0 + add s4, sp, a0 lui a0, 30 addiw a0, a0, 1184 - add s2, sp, a0 + add s3, sp, a0 lui a0, 30 addiw a0, a0, -1160 - add s3, sp, a0 + add s2, sp, a0 lui a0, 30 addiw a0, a0, -1168 - add s4, sp, a0 + add a7, sp, a0 lui a0, 30 addiw a0, a0, -1176 - add s5, sp, a0 + add a6, sp, a0 lui a0, 30 addiw a0, a0, -1184 - add s6, sp, a0 + add t0, sp, a0 + lui a0, 30 + addiw a0, a0, 1144 + add t1, sp, a0 lui a0, 30 addiw a0, a0, 1136 - add s8, sp, a0 + add t2, sp, a0 lui a0, 30 addiw a0, a0, 1128 - add s9, sp, a0 + add t3, sp, a0 lui a0, 30 addiw a0, a0, 1120 - add s10, sp, a0 + add t4, sp, a0 lui a0, 30 addiw a0, a0, 1112 - add s11, sp, a0 - lui a0, 30 - addiw a0, a0, 1104 - add ra, sp, a0 - ld s7, 192(sp) # 8-byte Folded Reload - vle64.v v8, (s7) + add t5, sp, a0 + ld t6, 192(sp) # 8-byte Folded Reload + vle64.v v8, (t6) csrr a0, vlenb - lui s7, 1 - addiw s7, s7, 664 - mul a0, a0, s7 + lui t6, 1 + addiw t6, t6, 664 + mul a0, a0, t6 add a0, sp, a0 - lui s7, 31 - addiw s7, s7, -960 - add a0, a0, s7 + lui t6, 31 + addiw t6, t6, -960 + add a0, a0, t6 vs8r.v v8, (a0) # Unknown-size Folded Spill - ld s7, 200(sp) # 8-byte Folded Reload - vle64.v v8, (s7) - csrr s7, vlenb + ld t6, 200(sp) # 8-byte Folded Reload + vle64.v v8, (t6) + csrr t6, vlenb lui a0, 1 addiw a0, a0, -200 - mul s7, s7, a0 - add s7, sp, s7 + mul t6, t6, a0 + add t6, sp, t6 lui a0, 31 addiw a0, a0, -960 - add s7, s7, a0 + add t6, t6, a0 ld a0, 8(sp) - vs8r.v v8, (s7) # Unknown-size Folded Spill + vs8r.v v8, (t6) # Unknown-size Folded Spill vle64.v v8, (a0) csrr a0, vlenb - lui s7, 1 - addiw s7, s7, 624 - mul a0, a0, s7 + lui t6, 1 + addiw t6, t6, 624 + mul a0, a0, t6 add a0, sp, a0 - lui s7, 31 - addiw s7, s7, -960 - add a0, a0, s7 + lui t6, 31 + addiw t6, t6, -960 + add a0, a0, t6 vs8r.v v8, (a0) # Unknown-size Folded Spill vle64.v v8, (a1) csrr a0, vlenb @@ -167791,7 +167599,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (a6) + vle64.v v8, (ra) csrr a0, vlenb lui a1, 1 addiw a1, a1, 192 @@ -167801,7 +167609,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (a7) + vle64.v v8, (s11) csrr a0, vlenb lui a1, 1 addiw a1, a1, 120 @@ -167811,7 +167619,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t0) + vle64.v v8, (s10) csrr a0, vlenb lui a1, 1 addiw a1, a1, 48 @@ -167821,7 +167629,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t1) + vle64.v v8, (s9) csrr a0, vlenb slli a0, a0, 12 add a0, sp, a0 @@ -167829,17 +167637,17 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t2) + vle64.v v8, (s8) csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1240 + addiw a1, a1, 1336 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t3) + vle64.v v8, (s7) csrr a0, vlenb lui a1, 1 addiw a1, a1, -72 @@ -167849,7 +167657,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t4) + vle64.v v8, (s6) csrr a0, vlenb lui a1, 1 addiw a1, a1, -144 @@ -167859,7 +167667,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t5) + vle64.v v8, (s5) csrr a0, vlenb lui a1, 1 addiw a1, a1, -216 @@ -167869,7 +167677,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t6) + vle64.v v8, (s4) csrr a0, vlenb lui a1, 1 addiw a1, a1, -312 @@ -167879,7 +167687,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s2) + vle64.v v8, (s3) csrr a0, vlenb lui a1, 1 addiw a1, a1, -440 @@ -167899,7 +167707,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s3) + vle64.v v8, (s2) csrr a0, vlenb lui a1, 1 addiw a1, a1, -752 @@ -167909,7 +167717,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s4) + vle64.v v8, (a7) csrr a0, vlenb lui a1, 1 addiw a1, a1, -816 @@ -167919,7 +167727,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s5) + vle64.v v8, (a6) csrr a0, vlenb lui a1, 1 addiw a1, a1, -880 @@ -167929,7 +167737,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s6) + vle64.v v8, (t0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -944 @@ -167950,10 +167758,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 30 - addiw a0, a0, 1144 - add a0, sp, a0 - vle64.v v8, (a0) + vle64.v v8, (t1) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1288 @@ -167963,7 +167768,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s8) + vle64.v v8, (t2) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1384 @@ -167973,7 +167778,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s9) + vle64.v v8, (t3) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1440 @@ -167983,7 +167788,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s10) + vle64.v v8, (t4) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1512 @@ -167993,7 +167798,7 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s11) + vle64.v v8, (t5) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1584 @@ -168003,7 +167808,10 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (ra) + lui a0, 30 + addiw a0, a0, 1104 + add a0, sp, a0 + vle64.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -1648 @@ -168184,7 +167992,7 @@ vslidedown.vi v24, v0, 2 csrr a1, vlenb lui a2, 1 - addiw a2, a2, 1128 + addiw a2, a2, 1248 mul a1, a1, a2 add a1, sp, a1 lui a2, 31 @@ -168203,7 +168011,7 @@ vslidedown.vi v8, v8, 2 csrr a1, vlenb lui a2, 1 - addiw a2, a2, 1160 + addiw a2, a2, 1152 mul a1, a1, a2 add a1, sp, a1 lui a2, 31 @@ -168241,7 +168049,7 @@ vsetivli zero, 8, e64, m4, ta, ma csrr a1, vlenb lui a2, 1 - addiw a2, a2, 1312 + addiw a2, a2, 1352 mul a1, a1, a2 add a1, sp, a1 lui a2, 31 @@ -168252,64 +168060,64 @@ vsetivli zero, 1, e64, m1, ta, ma lui a0, 30 addiw a0, a0, -1352 + add t0, sp, a0 + lui a0, 30 + addiw a0, a0, -1360 + add t1, sp, a0 + lui a0, 30 + addiw a0, a0, -1368 + add t2, sp, a0 + lui a0, 30 + addiw a0, a0, -1376 + add t3, sp, a0 + lui a0, 30 + addiw a0, a0, 1400 + add t4, sp, a0 + lui a0, 30 + addiw a0, a0, 1392 + add t5, sp, a0 + lui a0, 30 + addiw a0, a0, 1384 + add t6, sp, a0 + lui a0, 30 + addiw a0, a0, 1376 + add s2, sp, a0 + lui a0, 30 + addiw a0, a0, 1368 + add s3, sp, a0 + lui a0, 30 + addiw a0, a0, 1360 + add s4, sp, a0 + lui a0, 30 + addiw a0, a0, 1352 + add s5, sp, a0 + lui a0, 30 + addiw a0, a0, 1344 + add s6, sp, a0 + lui a0, 30 + addiw a0, a0, 1336 + add a7, sp, a0 + lui a0, 30 + addiw a0, a0, 1328 + add a6, sp, a0 + lui a0, 30 + addiw a0, a0, 1320 + add a5, sp, a0 + lui a0, 30 + addiw a0, a0, 1312 + add a4, sp, a0 + lui a0, 30 + addiw a0, a0, -1288 + add a3, sp, a0 + lui a0, 30 + addiw a0, a0, -1296 + add a2, sp, a0 + lui a0, 30 + addiw a0, a0, -1304 + add a1, sp, a0 + lui a0, 30 + addiw a0, a0, -1312 add a0, sp, a0 - lui a1, 30 - addiw a1, a1, -1360 - add a1, sp, a1 - lui a2, 30 - addiw a2, a2, -1368 - add a2, sp, a2 - lui a3, 30 - addiw a3, a3, -1376 - add a3, sp, a3 - lui a4, 30 - addiw a4, a4, 1400 - add a4, sp, a4 - lui a5, 30 - addiw a5, a5, 1392 - add a5, sp, a5 - lui a6, 30 - addiw a6, a6, 1384 - add a6, sp, a6 - lui a7, 30 - addiw a7, a7, 1376 - add a7, sp, a7 - lui t0, 30 - addiw t0, t0, 1368 - add t0, sp, t0 - lui t1, 30 - addiw t1, t1, 1360 - add t1, sp, t1 - lui t2, 30 - addiw t2, t2, 1352 - add t2, sp, t2 - lui t3, 30 - addiw t3, t3, 1344 - add t3, sp, t3 - lui t4, 30 - addiw t4, t4, 1336 - add t4, sp, t4 - lui t5, 30 - addiw t5, t5, 1328 - add t5, sp, t5 - lui t6, 30 - addiw t6, t6, 1320 - add t6, sp, t6 - lui s2, 30 - addiw s2, s2, 1312 - add s2, sp, s2 - lui s3, 30 - addiw s3, s3, -1288 - add s3, sp, s3 - lui s4, 30 - addiw s4, s4, -1296 - add s4, sp, s4 - lui s5, 30 - addiw s5, s5, -1304 - add s5, sp, s5 - lui s6, 30 - addiw s6, s6, -1312 - add s6, sp, s6 ld s7, 208(sp) # 8-byte Folded Reload vle64.v v8, (s7) csrr s7, vlenb @@ -168332,217 +168140,217 @@ addiw s8, s8, -960 add s7, s7, s8 vs8r.v v8, (s7) # Unknown-size Folded Spill - vle64.v v8, (a0) - csrr a0, vlenb + vle64.v v8, (t0) + csrr t0, vlenb lui s7, 1 - addiw s7, s7, 1120 - mul a0, a0, s7 - add a0, sp, a0 + addiw s7, s7, 1328 + mul t0, t0, s7 + add t0, sp, t0 lui s7, 31 addiw s7, s7, -960 - add a0, a0, s7 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (a1) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 712 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (a2) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 696 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (a3) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 680 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v24, 1 - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 640 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (a4) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 576 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (a5) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 544 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (a6) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 496 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (a7) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 456 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t0) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 416 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill + add t0, t0, s7 + vs8r.v v8, (t0) # Unknown-size Folded Spill vle64.v v8, (t1) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 352 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill + csrr t0, vlenb + lui t1, 1 + addiw t1, t1, 712 + mul t0, t0, t1 + add t0, sp, t0 + lui t1, 31 + addiw t1, t1, -960 + add t0, t0, t1 + vs8r.v v8, (t0) # Unknown-size Folded Spill vle64.v v8, (t2) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 288 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill + csrr t0, vlenb + lui t1, 1 + addiw t1, t1, 696 + mul t0, t0, t1 + add t0, sp, t0 + lui t1, 31 + addiw t1, t1, -960 + add t0, t0, t1 + vs8r.v v8, (t0) # Unknown-size Folded Spill vle64.v v8, (t3) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 240 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill + csrr t0, vlenb + lui t1, 1 + addiw t1, t1, 680 + mul t0, t0, t1 + add t0, sp, t0 + lui t1, 31 + addiw t1, t1, -960 + add t0, t0, t1 + vs8r.v v8, (t0) # Unknown-size Folded Spill + vslidedown.vi v8, v24, 1 + csrr t0, vlenb + lui t1, 1 + addiw t1, t1, 640 + mul t0, t0, t1 + add t0, sp, t0 + lui t1, 31 + addiw t1, t1, -960 + add t0, t0, t1 + vs8r.v v8, (t0) # Unknown-size Folded Spill vle64.v v8, (t4) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 1232 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill + csrr t0, vlenb + lui t1, 1 + addiw t1, t1, 576 + mul t0, t0, t1 + add t0, sp, t0 + lui t1, 31 + addiw t1, t1, -960 + add t0, t0, t1 + vs8r.v v8, (t0) # Unknown-size Folded Spill vle64.v v8, (t5) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 144 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill + csrr t0, vlenb + lui t1, 1 + addiw t1, t1, 544 + mul t0, t0, t1 + add t0, sp, t0 + lui t1, 31 + addiw t1, t1, -960 + add t0, t0, t1 + vs8r.v v8, (t0) # Unknown-size Folded Spill vle64.v v8, (t6) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 88 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill + csrr t0, vlenb + lui t1, 1 + addiw t1, t1, 496 + mul t0, t0, t1 + add t0, sp, t0 + lui t1, 31 + addiw t1, t1, -960 + add t0, t0, t1 + vs8r.v v8, (t0) # Unknown-size Folded Spill vle64.v v8, (s2) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 24 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v0, 1 - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -120 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill + csrr t0, vlenb + lui t1, 1 + addiw t1, t1, 456 + mul t0, t0, t1 + add t0, sp, t0 + lui t1, 31 + addiw t1, t1, -960 + add t0, t0, t1 + vs8r.v v8, (t0) # Unknown-size Folded Spill vle64.v v8, (s3) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -328 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill + csrr t0, vlenb + lui t1, 1 + addiw t1, t1, 416 + mul t0, t0, t1 + add t0, sp, t0 + lui t1, 31 + addiw t1, t1, -960 + add t0, t0, t1 + vs8r.v v8, (t0) # Unknown-size Folded Spill vle64.v v8, (s4) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -448 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill + csrr t0, vlenb + lui t1, 1 + addiw t1, t1, 352 + mul t0, t0, t1 + add t0, sp, t0 + lui t1, 31 + addiw t1, t1, -960 + add t0, t0, t1 + vs8r.v v8, (t0) # Unknown-size Folded Spill vle64.v v8, (s5) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -536 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill + csrr t0, vlenb + lui t1, 1 + addiw t1, t1, 288 + mul t0, t0, t1 + add t0, sp, t0 + lui t1, 31 + addiw t1, t1, -960 + add t0, t0, t1 + vs8r.v v8, (t0) # Unknown-size Folded Spill vle64.v v8, (s6) + csrr t0, vlenb + lui t1, 1 + addiw t1, t1, 240 + mul t0, t0, t1 + add t0, sp, t0 + lui t1, 31 + addiw t1, t1, -960 + add t0, t0, t1 + vs8r.v v8, (t0) # Unknown-size Folded Spill + vle64.v v8, (a7) + csrr a7, vlenb + lui t0, 1 + addiw t0, t0, 1240 + mul a7, a7, t0 + add a7, sp, a7 + lui t0, 31 + addiw t0, t0, -960 + add a7, a7, t0 + vs8r.v v8, (a7) # Unknown-size Folded Spill + vle64.v v8, (a6) + csrr a6, vlenb + lui a7, 1 + addiw a7, a7, 144 + mul a6, a6, a7 + add a6, sp, a6 + lui a7, 31 + addiw a7, a7, -960 + add a6, a6, a7 + vs8r.v v8, (a6) # Unknown-size Folded Spill + vle64.v v8, (a5) + csrr a5, vlenb + lui a6, 1 + addiw a6, a6, 88 + mul a5, a5, a6 + add a5, sp, a5 + lui a6, 31 + addiw a6, a6, -960 + add a5, a5, a6 + vs8r.v v8, (a5) # Unknown-size Folded Spill + vle64.v v8, (a4) + csrr a4, vlenb + lui a5, 1 + addiw a5, a5, 24 + mul a4, a4, a5 + add a4, sp, a4 + lui a5, 31 + addiw a5, a5, -960 + add a4, a4, a5 + vs8r.v v8, (a4) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 1 + csrr a4, vlenb + lui a5, 1 + addiw a5, a5, -120 + mul a4, a4, a5 + add a4, sp, a4 + lui a5, 31 + addiw a5, a5, -960 + add a4, a4, a5 + vs8r.v v8, (a4) # Unknown-size Folded Spill + vle64.v v8, (a3) + csrr a3, vlenb + lui a4, 1 + addiw a4, a4, -328 + mul a3, a3, a4 + add a3, sp, a3 + lui a4, 31 + addiw a4, a4, -960 + add a3, a3, a4 + vs8r.v v8, (a3) # Unknown-size Folded Spill + vle64.v v8, (a2) + csrr a2, vlenb + lui a3, 1 + addiw a3, a3, -448 + mul a2, a2, a3 + add a2, sp, a2 + lui a3, 31 + addiw a3, a3, -960 + add a2, a2, a3 + vs8r.v v8, (a2) # Unknown-size Folded Spill + vle64.v v8, (a1) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -536 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vs8r.v v8, (a1) # Unknown-size Folded Spill + vle64.v v8, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -600 @@ -168654,52 +168462,52 @@ vsetivli zero, 1, e64, m1, ta, ma lui a0, 30 addiw a0, a0, -1416 + add a1, sp, a0 + lui a0, 30 + addiw a0, a0, -1424 + add a2, sp, a0 + lui a0, 30 + addiw a0, a0, -1432 + add a3, sp, a0 + lui a0, 30 + addiw a0, a0, -1440 + add a4, sp, a0 + lui a0, 30 + addiw a0, a0, 1528 + add a5, sp, a0 + lui a0, 30 + addiw a0, a0, 1520 + add a6, sp, a0 + lui a0, 30 + addiw a0, a0, 1512 + add a7, sp, a0 + lui a0, 30 + addiw a0, a0, 1504 + add t0, sp, a0 + lui a0, 30 + addiw a0, a0, 1496 + add t1, sp, a0 + lui a0, 30 + addiw a0, a0, 1488 + add t2, sp, a0 + lui a0, 30 + addiw a0, a0, 1480 + add t3, sp, a0 + lui a0, 30 + addiw a0, a0, 1472 + add t4, sp, a0 + lui a0, 30 + addiw a0, a0, 1464 + add t5, sp, a0 + lui a0, 30 + addiw a0, a0, 1456 + add t6, sp, a0 + lui a0, 30 + addiw a0, a0, 1448 + add s2, sp, a0 + lui a0, 30 + addiw a0, a0, 1440 add a0, sp, a0 - lui a1, 30 - addiw a1, a1, -1424 - add a1, sp, a1 - lui a2, 30 - addiw a2, a2, -1432 - add a2, sp, a2 - lui a3, 30 - addiw a3, a3, -1440 - add a3, sp, a3 - lui a4, 30 - addiw a4, a4, 1528 - add a4, sp, a4 - lui a5, 30 - addiw a5, a5, 1520 - add a5, sp, a5 - lui a6, 30 - addiw a6, a6, 1512 - add a6, sp, a6 - lui a7, 30 - addiw a7, a7, 1504 - add a7, sp, a7 - lui t0, 30 - addiw t0, t0, 1496 - add t0, sp, t0 - lui t1, 30 - addiw t1, t1, 1488 - add t1, sp, t1 - lui t2, 30 - addiw t2, t2, 1480 - add t2, sp, t2 - lui t3, 30 - addiw t3, t3, 1472 - add t3, sp, t3 - lui t4, 30 - addiw t4, t4, 1464 - add t4, sp, t4 - lui t5, 30 - addiw t5, t5, 1456 - add t5, sp, t5 - lui t6, 30 - addiw t6, t6, 1448 - add t6, sp, t6 - lui s2, 30 - addiw s2, s2, 1440 - add s2, sp, s2 ld s3, 224(sp) # 8-byte Folded Reload vle64.v v8, (s3) csrr s3, vlenb @@ -168711,168 +168519,168 @@ addiw s4, s4, -960 add s3, s3, s4 vs8r.v v8, (s3) # Unknown-size Folded Spill - vle64.v v8, (a0) - csrr a0, vlenb + vle64.v v8, (a1) + csrr a1, vlenb lui s3, 1 addiw s3, s3, 688 - mul a0, a0, s3 - add a0, sp, a0 + mul a1, a1, s3 + add a1, sp, a1 lui s3, 31 addiw s3, s3, -960 - add a0, a0, s3 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (a1) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 672 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill + add a1, a1, s3 + vs8r.v v8, (a1) # Unknown-size Folded Spill vle64.v v8, (a2) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 656 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 672 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vs8r.v v8, (a1) # Unknown-size Folded Spill vle64.v v8, (a3) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 616 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 656 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vs8r.v v8, (a1) # Unknown-size Folded Spill + vle64.v v8, (a4) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 616 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vs8r.v v8, (a1) # Unknown-size Folded Spill vmv2r.v v8, v24 vslidedown.vi v24, v8, 1 - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 536 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vle64.v v24, (a4) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 464 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v24, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 536 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vs8r.v v24, (a1) # Unknown-size Folded Spill vle64.v v24, (a5) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 1152 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v24, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 464 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vs8r.v v24, (a1) # Unknown-size Folded Spill vle64.v v24, (a6) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 400 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v24, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1320 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vs8r.v v24, (a1) # Unknown-size Folded Spill vle64.v v24, (a7) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 336 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v24, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 400 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vs8r.v v24, (a1) # Unknown-size Folded Spill vle64.v v24, (t0) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 280 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v24, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 336 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vs8r.v v24, (a1) # Unknown-size Folded Spill vle64.v v24, (t1) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 232 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v24, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 280 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vs8r.v v24, (a1) # Unknown-size Folded Spill vle64.v v24, (t2) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 160 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v24, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 232 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vs8r.v v24, (a1) # Unknown-size Folded Spill vle64.v v24, (t3) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 104 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v24, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 160 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vs8r.v v24, (a1) # Unknown-size Folded Spill vle64.v v24, (t4) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 32 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v24, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 104 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vs8r.v v24, (a1) # Unknown-size Folded Spill vle64.v v24, (t5) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -24 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v24, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 32 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vs8r.v v24, (a1) # Unknown-size Folded Spill vle64.v v24, (t6) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -80 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v24, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -24 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vs8r.v v24, (a1) # Unknown-size Folded Spill vle64.v v24, (s2) + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, -80 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vs8r.v v24, (a1) # Unknown-size Folded Spill + vle64.v v24, (a0) csrr a0, vlenb lui a1, 1 addiw a1, a1, -152 @@ -168936,7 +168744,7 @@ vsetivli zero, 1, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1224 + addiw a1, a1, 1232 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -169084,7 +168892,7 @@ vsetivli zero, 1, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1216 + addiw a1, a1, 1312 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -169235,7 +169043,7 @@ vle64.v v0, (a0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1120 + addiw a1, a1, -1192 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -169248,7 +169056,7 @@ vle64.v v8, (a3) csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1128 + addiw a2, a2, -1136 mul a1, a1, a2 add a1, sp, a1 lui a2, 31 @@ -169408,8 +169216,8 @@ vs8r.v v24, (a0) # Unknown-size Folded Spill lui a0, 30 addiw a0, a0, 1792 - add a4, sp, a0 - fsd fa5, 240(a4) + add a2, sp, a0 + fsd fa5, 240(a2) addi a0, a3, 1192 vsetivli zero, 2, e64, m1, ta, ma lui a1, 30 @@ -169417,17 +169225,18 @@ add a1, sp, a1 vle64.v v24, (a0) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1144 - mul a0, a0, a2 + lui a4, 1 + addiw a4, a4, -1168 + mul a0, a0, a4 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a4, 31 + addiw a4, a4, -960 + add a0, a0, a4 vs8r.v v24, (a0) # Unknown-size Folded Spill vle64.v v24, (a1) csrr a0, vlenb - li a1, 1216 + lui a1, 1 + addiw a1, a1, -1176 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -169449,31 +169258,33 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill - fsd fa5, 224(a4) + fsd fa5, 224(a2) + lui a0, 30 + addiw a0, a0, 1792 + add a1, sp, a0 addi a0, a3, 1344 vsetivli zero, 2, e64, m1, ta, ma - lui a1, 30 - addiw a1, a1, 2016 - add a2, sp, a1 + lui a2, 30 + addiw a2, a2, 2016 + add a2, sp, a2 vle64.v v24, (a0) csrr a0, vlenb - li a1, 23 - slli a1, a1, 7 - mul a0, a0, a1 + lui a4, 1 + addiw a4, a4, -1128 + mul a0, a0, a4 add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 + lui a4, 31 + addiw a4, a4, -960 + add a0, a0, a4 vs8r.v v24, (a0) # Unknown-size Folded Spill vle64.v v24, (a2) csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1160 - mul a0, a0, a1 + li a2, 1232 + mul a0, a0, a2 add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v24, (a0) # Unknown-size Folded Spill vsetivli zero, 16, e64, m8, ta, ma fld fa5, 1512(a3) @@ -169481,15 +169292,15 @@ addi a2, a3, 1368 vle64.v v24, (a0) csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 752 - mul a0, a0, a1 + lui a4, 1 + addiw a4, a4, 752 + mul a0, a0, a4 add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 + lui a4, 31 + addiw a4, a4, -960 + add a0, a0, a4 vs8r.v v24, (a0) # Unknown-size Folded Spill - fsd fa5, 208(a4) + fsd fa5, 208(a1) addi a0, a3, 1496 vsetivli zero, 2, e64, m1, ta, ma lui a1, 30 @@ -169508,7 +169319,7 @@ vle64.v v24, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1104 + addiw a1, a1, -1096 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -169647,7 +169458,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (a2) csrr a0, vlenb - li a1, 264 + li a1, 272 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -169657,7 +169468,7 @@ vle64.v v16, (t1) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1088 + addiw a1, a1, -1104 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -169666,8 +169477,7 @@ vs8r.v v16, (a0) # Unknown-size Folded Spill vle64.v v16, (t2) csrr a0, vlenb - li a1, 248 - mul a0, a0, a1 + slli a0, a0, 8 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 @@ -169804,70 +169614,70 @@ vsetivli zero, 1, e64, m1, ta, ma lui a0, 31 addiw a0, a0, -1800 + add s10, sp, a0 + lui a0, 31 + addiw a0, a0, -1808 + add s11, sp, a0 + lui a0, 31 + addiw a0, a0, -1816 + add ra, sp, a0 + lui a0, 31 + addiw a0, a0, -1824 add a0, sp, a0 lui a1, 31 - addiw a1, a1, -1808 - add a2, sp, a1 - lui a1, 31 - addiw a1, a1, -1816 - add a7, sp, a1 - lui a1, 31 - addiw a1, a1, -1824 - add t0, sp, a1 - lui a1, 31 addiw a1, a1, -1832 - add t1, sp, a1 - lui a1, 31 - addiw a1, a1, -1840 - add t2, sp, a1 - lui a1, 31 - addiw a1, a1, -1848 - add t3, sp, a1 - lui a1, 31 - addiw a1, a1, -1856 - add t4, sp, a1 - lui a1, 31 - addiw a1, a1, -1864 - add t5, sp, a1 - lui a1, 31 - addiw a1, a1, -1872 - add t6, sp, a1 - lui a1, 31 - addiw a1, a1, -1880 - add s2, sp, a1 - lui a1, 31 - addiw a1, a1, -1888 - add s3, sp, a1 - lui a1, 31 - addiw a1, a1, -1928 - add s4, sp, a1 - lui a1, 31 - addiw a1, a1, -1936 - add s5, sp, a1 - lui a1, 31 - addiw a1, a1, -1944 - add s6, sp, a1 - lui a1, 31 - addiw a1, a1, -1952 - add s7, sp, a1 - lui a1, 31 - addiw a1, a1, -1960 - add s8, sp, a1 - lui a1, 31 - addiw a1, a1, -1968 - add s9, sp, a1 - lui a1, 31 - addiw a1, a1, -1976 - add s10, sp, a1 - lui a1, 31 - addiw a1, a1, -1984 - add s11, sp, a1 - lui a1, 31 - addiw a1, a1, -1992 - add ra, sp, a1 - lui a1, 31 - addiw a1, a1, -2000 add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -1840 + add a2, sp, a2 + lui a3, 31 + addiw a3, a3, -1848 + add s9, sp, a3 + lui a3, 31 + addiw a3, a3, -1856 + add s8, sp, a3 + lui a3, 31 + addiw a3, a3, -1864 + add s7, sp, a3 + lui a3, 31 + addiw a3, a3, -1872 + add s6, sp, a3 + lui a3, 31 + addiw a3, a3, -1880 + add s5, sp, a3 + lui a3, 31 + addiw a3, a3, -1888 + add s4, sp, a3 + lui a3, 31 + addiw a3, a3, -1928 + add s3, sp, a3 + lui a3, 31 + addiw a3, a3, -1936 + add s2, sp, a3 + lui a3, 31 + addiw a3, a3, -1944 + add t6, sp, a3 + lui a3, 31 + addiw a3, a3, -1952 + add t5, sp, a3 + lui a3, 31 + addiw a3, a3, -1960 + add t4, sp, a3 + lui a3, 31 + addiw a3, a3, -1968 + add t3, sp, a3 + lui a3, 31 + addiw a3, a3, -1976 + add t2, sp, a3 + lui a3, 31 + addiw a3, a3, -1984 + add t1, sp, a3 + lui a3, 31 + addiw a3, a3, -1992 + add t0, sp, a3 + lui a3, 31 + addiw a3, a3, -2000 + add a7, sp, a3 lui a3, 31 addiw a3, a3, -2008 add a3, sp, a3 @@ -169886,7 +169696,7 @@ vs8r.v v24, (a6) # Unknown-size Folded Spill vle64.v v24, (a5) csrr a5, vlenb - li a6, 400 + li a6, 416 mul a5, a5, a6 add a5, sp, a5 lui a6, 31 @@ -169929,209 +169739,210 @@ addiw a6, a6, -960 add a5, a5, a6 vs8r.v v16, (a5) # Unknown-size Folded Spill + vle64.v v16, (s10) + csrr a5, vlenb + li a6, 584 + mul a5, a5, a6 + add a5, sp, a5 + lui a6, 31 + addiw a6, a6, -960 + add a5, a5, a6 + vs8r.v v16, (a5) # Unknown-size Folded Spill + vle64.v v16, (s11) + csrr a5, vlenb + li a6, 568 + mul a5, a5, a6 + add a5, sp, a5 + lui a6, 31 + addiw a6, a6, -960 + add a5, a5, a6 + vs8r.v v16, (a5) # Unknown-size Folded Spill + vle64.v v16, (ra) + csrr a5, vlenb + li a6, 552 + mul a5, a5, a6 + add a5, sp, a5 + lui a6, 31 + addiw a6, a6, -960 + add a5, a5, a6 + vs8r.v v16, (a5) # Unknown-size Folded Spill vle64.v v16, (a0) csrr a0, vlenb - li a5, 584 + li a5, 536 mul a0, a0, a5 add a0, sp, a0 lui a5, 31 addiw a5, a5, -960 add a0, a0, a5 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (a2) - csrr a0, vlenb - li a2, 568 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (a7) - csrr a0, vlenb - li a2, 552 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (t0) - csrr a0, vlenb - li a2, 536 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (t1) + vle64.v v16, (a1) csrr a0, vlenb - li a2, 520 - mul a0, a0, a2 + li a1, 520 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (t2) + vle64.v v16, (a2) csrr a0, vlenb - li a2, 504 - mul a0, a0, a2 + li a1, 504 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (t3) + vle64.v v16, (s9) csrr a0, vlenb - li a2, 488 - mul a0, a0, a2 + li a1, 488 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (t4) + vle64.v v16, (s8) csrr a0, vlenb - li a2, 472 - mul a0, a0, a2 + li a1, 472 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (t5) + vle64.v v16, (s7) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1168 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1144 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (t6) + vle64.v v16, (s6) csrr a0, vlenb - li a2, 448 - mul a0, a0, a2 + li a1, 448 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (s2) + vle64.v v16, (s5) csrr a0, vlenb - li a2, 440 - mul a0, a0, a2 + li a1, 440 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (s3) + vle64.v v16, (s4) csrr a0, vlenb - li a2, 424 - mul a0, a0, a2 + li a1, 432 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v0, 1 csrr a0, vlenb - li a2, 376 - mul a0, a0, a2 + li a1, 376 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (s4) + vle64.v v16, (s3) csrr a0, vlenb - li a2, 360 - mul a0, a0, a2 + li a1, 360 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (s5) + vle64.v v16, (s2) csrr a0, vlenb - li a2, 352 - mul a0, a0, a2 + li a1, 352 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (s6) + vle64.v v16, (t6) csrr a0, vlenb - li a2, 344 - mul a0, a0, a2 + li a1, 344 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (s7) + vle64.v v16, (t5) csrr a0, vlenb - li a2, 336 - mul a0, a0, a2 + li a1, 336 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (s8) + vle64.v v16, (t4) csrr a0, vlenb - li a2, 320 - mul a0, a0, a2 + li a1, 320 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (s9) + vle64.v v16, (t3) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1176 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1088 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (s10) + vle64.v v16, (t2) csrr a0, vlenb - li a2, 304 - mul a0, a0, a2 + li a1, 304 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (s11) + vle64.v v16, (t1) csrr a0, vlenb - li a2, 288 - mul a0, a0, a2 + li a1, 288 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (ra) + vle64.v v16, (t0) csrr a0, vlenb - li a2, 272 - mul a0, a0, a2 + li a1, 264 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (a1) + vle64.v v16, (a7) csrr a0, vlenb - slli a0, a0, 8 + li a1, 248 + mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 @@ -170155,8 +169966,8 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vmv2r.v v16, v8 - vslidedown.vi v24, v16, 1 + vmv2r.v v24, v8 + vslidedown.vi v16, v24, 1 csrr a0, vlenb li a1, 176 mul a0, a0, a1 @@ -170164,12 +169975,12 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vs8r.v v24, (a0) # Unknown-size Folded Spill + vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 1, e64, m2, ta, ma lui a0, 31 addiw a0, a0, -1664 add a0, sp, a0 - vslidedown.vi v24, v0, 3 + vslidedown.vi v16, v0, 3 csrr a1, vlenb li a2, 384 mul a1, a1, a2 @@ -170177,8 +169988,8 @@ lui a2, 31 addiw a2, a2, -960 add a1, a1, a2 - vs8r.v v24, (a1) # Unknown-size Folded Spill - vslidedown.vi v24, v0, 2 + vs8r.v v16, (a1) # Unknown-size Folded Spill + vslidedown.vi v16, v0, 2 csrr a1, vlenb li a2, 368 mul a1, a1, a2 @@ -170186,8 +169997,8 @@ lui a2, 31 addiw a2, a2, -960 add a1, a1, a2 - vs8r.v v24, (a1) # Unknown-size Folded Spill - vslidedown.vi v24, v8, 3 + vs8r.v v16, (a1) # Unknown-size Folded Spill + vslidedown.vi v16, v8, 3 csrr a1, vlenb li a2, 192 mul a1, a1, a2 @@ -170195,7 +170006,7 @@ lui a2, 31 addiw a2, a2, -960 add a1, a1, a2 - vs8r.v v24, (a1) # Unknown-size Folded Spill + vs8r.v v16, (a1) # Unknown-size Folded Spill vslidedown.vi v16, v8, 2 csrr a1, vlenb li a2, 168 @@ -170232,76 +170043,76 @@ vsetivli zero, 1, e64, m1, ta, ma lui a0, 31 addiw a0, a0, -1544 + add a1, sp, a0 + lui a0, 31 + addiw a0, a0, -1552 + add a3, sp, a0 + lui a0, 31 + addiw a0, a0, -1560 + add a4, sp, a0 + lui a0, 31 + addiw a0, a0, -1568 + add s8, sp, a0 + lui a0, 31 + addiw a0, a0, -1576 + add s9, sp, a0 + lui a0, 31 + addiw a0, a0, -1584 + add s10, sp, a0 + lui a0, 31 + addiw a0, a0, -1592 + add s7, sp, a0 + lui a0, 31 + addiw a0, a0, -1600 + add s6, sp, a0 + lui a0, 31 + addiw a0, a0, -1608 + add s5, sp, a0 + lui a0, 31 + addiw a0, a0, -1616 + add s4, sp, a0 + lui a0, 31 + addiw a0, a0, -1624 + add s3, sp, a0 + lui a0, 31 + addiw a0, a0, -1632 + add s2, sp, a0 + lui a0, 31 + addiw a0, a0, -1672 + add t6, sp, a0 + lui a0, 31 + addiw a0, a0, -1680 + add t5, sp, a0 + lui a0, 31 + addiw a0, a0, -1688 + add t4, sp, a0 + lui a0, 31 + addiw a0, a0, -1696 + add t3, sp, a0 + lui a0, 31 + addiw a0, a0, -1704 + add t2, sp, a0 + lui a0, 31 + addiw a0, a0, -1712 + add t1, sp, a0 + lui a0, 31 + addiw a0, a0, -1720 + add t0, sp, a0 + lui a0, 31 + addiw a0, a0, -1728 + add a7, sp, a0 + lui a0, 31 + addiw a0, a0, -1736 + add a6, sp, a0 + lui a0, 31 + addiw a0, a0, -1744 + add a5, sp, a0 + lui a0, 31 + addiw a0, a0, -1752 + add a2, sp, a0 + lui a0, 31 + addiw a0, a0, -1760 add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -1552 - add a1, sp, a1 - lui a2, 31 - addiw a2, a2, -1560 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -1568 - add a3, sp, a3 - lui a4, 31 - addiw a4, a4, -1576 - add a4, sp, a4 - lui a5, 31 - addiw a5, a5, -1584 - add a5, sp, a5 - lui a6, 31 - addiw a6, a6, -1592 - add a6, sp, a6 - lui a7, 31 - addiw a7, a7, -1600 - add a7, sp, a7 - lui t0, 31 - addiw t0, t0, -1608 - add t0, sp, t0 - lui t1, 31 - addiw t1, t1, -1616 - add t1, sp, t1 - lui t2, 31 - addiw t2, t2, -1624 - add t2, sp, t2 - lui t3, 31 - addiw t3, t3, -1632 - add t3, sp, t3 - lui t4, 31 - addiw t4, t4, -1672 - add t4, sp, t4 - lui t5, 31 - addiw t5, t5, -1680 - add t5, sp, t5 - lui t6, 31 - addiw t6, t6, -1688 - add t6, sp, t6 - lui s2, 31 - addiw s2, s2, -1696 - add s2, sp, s2 - lui s3, 31 - addiw s3, s3, -1704 - add s3, sp, s3 - lui s4, 31 - addiw s4, s4, -1712 - add s4, sp, s4 - lui s5, 31 - addiw s5, s5, -1720 - add s5, sp, s5 - lui s6, 31 - addiw s6, s6, -1728 - add s6, sp, s6 - lui s7, 31 - addiw s7, s7, -1736 - add s7, sp, s7 - lui s8, 31 - addiw s8, s8, -1744 - add s8, sp, s8 - lui s9, 31 - addiw s9, s9, -1752 - add s9, sp, s9 - lui s10, 31 - addiw s10, s10, -1760 - add s10, sp, s10 ld s11, 216(sp) # 8-byte Folded Reload vle64.v v24, (s11) csrr s11, vlenb @@ -170333,8 +170144,8 @@ vl8r.v v8, (s11) # Unknown-size Folded Reload vslidedown.vi v24, v8, 1 csrr s11, vlenb - lui ra, 1 - addiw ra, ra, -1184 + li ra, 23 + slli ra, ra, 7 mul s11, s11, ra add s11, sp, s11 lui ra, 31 @@ -170359,226 +170170,226 @@ addiw ra, ra, -960 add s11, s11, ra vs8r.v v8, (s11) # Unknown-size Folded Spill - vle64.v v8, (a0) - csrr a0, vlenb + vle64.v v8, (a1) + csrr a1, vlenb li s11, 896 - mul a0, a0, s11 - add a0, sp, a0 + mul a1, a1, s11 + add a1, sp, a1 lui s11, 31 addiw s11, s11, -960 - add a0, a0, s11 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (a1) - csrr a0, vlenb - li a1, 872 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (a2) - csrr a0, vlenb - li a1, 864 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill + add a1, a1, s11 + vs8r.v v8, (a1) # Unknown-size Folded Spill vle64.v v8, (a3) - csrr a0, vlenb - li a1, 840 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + li a3, 872 + mul a1, a1, a3 + add a1, sp, a1 + lui a3, 31 + addiw a3, a3, -960 + add a1, a1, a3 + vs8r.v v8, (a1) # Unknown-size Folded Spill vle64.v v8, (a4) - csrr a0, vlenb - li a1, 824 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (a5) - csrr a0, vlenb - li a1, 808 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (a6) - csrr a0, vlenb - li a1, 776 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (a7) - csrr a0, vlenb - li a1, 752 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t0) - csrr a0, vlenb - li a1, 728 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t1) - csrr a0, vlenb - li a1, 720 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t2) - csrr a0, vlenb - li a1, 696 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t3) - csrr a0, vlenb - li a1, 656 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 1 - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1136 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t4) - csrr a0, vlenb - li a1, 600 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t5) - csrr a0, vlenb - li a1, 592 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (t6) - csrr a0, vlenb - li a1, 576 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s2) - csrr a0, vlenb - li a1, 560 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s3) - csrr a0, vlenb - li a1, 544 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s4) - csrr a0, vlenb - li a1, 528 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s5) - csrr a0, vlenb - slli a0, a0, 9 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s6) - csrr a0, vlenb - li a1, 496 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vle64.v v8, (s7) - csrr a0, vlenb - li a1, 480 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + li a3, 864 + mul a1, a1, a3 + add a1, sp, a1 + lui a3, 31 + addiw a3, a3, -960 + add a1, a1, a3 + vs8r.v v8, (a1) # Unknown-size Folded Spill vle64.v v8, (s8) - csrr a0, vlenb - li a1, 464 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + li a3, 840 + mul a1, a1, a3 + add a1, sp, a1 + lui a3, 31 + addiw a3, a3, -960 + add a1, a1, a3 + vs8r.v v8, (a1) # Unknown-size Folded Spill vle64.v v8, (s9) - csrr a0, vlenb - li a1, 456 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + li a3, 824 + mul a1, a1, a3 + add a1, sp, a1 + lui a3, 31 + addiw a3, a3, -960 + add a1, a1, a3 + vs8r.v v8, (a1) # Unknown-size Folded Spill vle64.v v8, (s10) + csrr a1, vlenb + li a3, 808 + mul a1, a1, a3 + add a1, sp, a1 + lui a3, 31 + addiw a3, a3, -960 + add a1, a1, a3 + vs8r.v v8, (a1) # Unknown-size Folded Spill + vle64.v v8, (s7) + csrr a1, vlenb + li a3, 776 + mul a1, a1, a3 + add a1, sp, a1 + lui a3, 31 + addiw a3, a3, -960 + add a1, a1, a3 + vs8r.v v8, (a1) # Unknown-size Folded Spill + vle64.v v8, (s6) + csrr a1, vlenb + li a3, 752 + mul a1, a1, a3 + add a1, sp, a1 + lui a3, 31 + addiw a3, a3, -960 + add a1, a1, a3 + vs8r.v v8, (a1) # Unknown-size Folded Spill + vle64.v v8, (s5) + csrr a1, vlenb + li a3, 728 + mul a1, a1, a3 + add a1, sp, a1 + lui a3, 31 + addiw a3, a3, -960 + add a1, a1, a3 + vs8r.v v8, (a1) # Unknown-size Folded Spill + vle64.v v8, (s4) + csrr a1, vlenb + li a3, 720 + mul a1, a1, a3 + add a1, sp, a1 + lui a3, 31 + addiw a3, a3, -960 + add a1, a1, a3 + vs8r.v v8, (a1) # Unknown-size Folded Spill + vle64.v v8, (s3) + csrr a1, vlenb + li a3, 696 + mul a1, a1, a3 + add a1, sp, a1 + lui a3, 31 + addiw a3, a3, -960 + add a1, a1, a3 + vs8r.v v8, (a1) # Unknown-size Folded Spill + vle64.v v8, (s2) + csrr a1, vlenb + li a3, 656 + mul a1, a1, a3 + add a1, sp, a1 + lui a3, 31 + addiw a3, a3, -960 + add a1, a1, a3 + vs8r.v v8, (a1) # Unknown-size Folded Spill + vslidedown.vi v8, v16, 1 + csrr a1, vlenb + lui a3, 1 + addiw a3, a3, -1112 + mul a1, a1, a3 + add a1, sp, a1 + lui a3, 31 + addiw a3, a3, -960 + add a1, a1, a3 + vs8r.v v8, (a1) # Unknown-size Folded Spill + vle64.v v8, (t6) + csrr a1, vlenb + li a3, 600 + mul a1, a1, a3 + add a1, sp, a1 + lui a3, 31 + addiw a3, a3, -960 + add a1, a1, a3 + vs8r.v v8, (a1) # Unknown-size Folded Spill + vle64.v v8, (t5) + csrr a1, vlenb + li a3, 592 + mul a1, a1, a3 + add a1, sp, a1 + lui a3, 31 + addiw a3, a3, -960 + add a1, a1, a3 + vs8r.v v8, (a1) # Unknown-size Folded Spill + vle64.v v8, (t4) + csrr a1, vlenb + li a3, 576 + mul a1, a1, a3 + add a1, sp, a1 + lui a3, 31 + addiw a3, a3, -960 + add a1, a1, a3 + vs8r.v v8, (a1) # Unknown-size Folded Spill + vle64.v v8, (t3) + csrr a1, vlenb + li a3, 560 + mul a1, a1, a3 + add a1, sp, a1 + lui a3, 31 + addiw a3, a3, -960 + add a1, a1, a3 + vs8r.v v8, (a1) # Unknown-size Folded Spill + vle64.v v8, (t2) + csrr a1, vlenb + li a3, 544 + mul a1, a1, a3 + add a1, sp, a1 + lui a3, 31 + addiw a3, a3, -960 + add a1, a1, a3 + vs8r.v v8, (a1) # Unknown-size Folded Spill + vle64.v v8, (t1) + csrr a1, vlenb + li a3, 528 + mul a1, a1, a3 + add a1, sp, a1 + lui a3, 31 + addiw a3, a3, -960 + add a1, a1, a3 + vs8r.v v8, (a1) # Unknown-size Folded Spill + vle64.v v8, (t0) + csrr a1, vlenb + slli a1, a1, 9 + add a1, sp, a1 + lui a3, 31 + addiw a3, a3, -960 + add a1, a1, a3 + vs8r.v v8, (a1) # Unknown-size Folded Spill + vle64.v v8, (a7) + csrr a1, vlenb + li a3, 496 + mul a1, a1, a3 + add a1, sp, a1 + lui a3, 31 + addiw a3, a3, -960 + add a1, a1, a3 + vs8r.v v8, (a1) # Unknown-size Folded Spill + vle64.v v8, (a6) + csrr a1, vlenb + li a3, 480 + mul a1, a1, a3 + add a1, sp, a1 + lui a3, 31 + addiw a3, a3, -960 + add a1, a1, a3 + vs8r.v v8, (a1) # Unknown-size Folded Spill + vle64.v v8, (a5) + csrr a1, vlenb + li a3, 464 + mul a1, a1, a3 + add a1, sp, a1 + lui a3, 31 + addiw a3, a3, -960 + add a1, a1, a3 + vs8r.v v8, (a1) # Unknown-size Folded Spill + vle64.v v8, (a2) + csrr a1, vlenb + li a2, 456 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vs8r.v v8, (a1) # Unknown-size Folded Spill + vle64.v v8, (a0) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1096 + addiw a1, a1, -1120 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -170588,7 +170399,7 @@ vmv2r.v v8, v0 vslidedown.vi v24, v8, 1 csrr a0, vlenb - li a1, 416 + li a1, 408 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -170619,7 +170430,7 @@ vs8r.v v24, (a1) # Unknown-size Folded Spill vslidedown.vi v16, v0, 3 csrr a1, vlenb - li a2, 432 + li a2, 424 mul a1, a1, a2 add a1, sp, a1 lui a2, 31 @@ -170628,7 +170439,7 @@ vs8r.v v16, (a1) # Unknown-size Folded Spill vslidedown.vi v8, v0, 2 csrr a1, vlenb - li a2, 408 + li a2, 400 mul a1, a1, a2 add a1, sp, a1 lui a2, 31 @@ -170662,61 +170473,61 @@ vsetivli zero, 1, e64, m1, ta, ma lui a0, 31 addiw a0, a0, -1328 + add a1, sp, a0 + lui a0, 31 + addiw a0, a0, -1336 + add t1, sp, a0 + lui a0, 31 + addiw a0, a0, -1344 + add t2, sp, a0 + lui a0, 31 + addiw a0, a0, -1352 + add t3, sp, a0 + lui a0, 31 + addiw a0, a0, -1360 + add t4, sp, a0 + lui a0, 31 + addiw a0, a0, -1368 + add t5, sp, a0 + lui a0, 31 + addiw a0, a0, -1376 + add t6, sp, a0 + lui a0, 31 + addiw a0, a0, -1416 + add s2, sp, a0 + lui a0, 31 + addiw a0, a0, -1424 + add s3, sp, a0 + lui a0, 31 + addiw a0, a0, -1432 + add s4, sp, a0 + lui a0, 31 + addiw a0, a0, -1440 + add s5, sp, a0 + lui a0, 31 + addiw a0, a0, -1448 + add t0, sp, a0 + lui a0, 31 + addiw a0, a0, -1456 + add a7, sp, a0 + lui a0, 31 + addiw a0, a0, -1464 + add a6, sp, a0 + lui a0, 31 + addiw a0, a0, -1472 + add a5, sp, a0 + lui a0, 31 + addiw a0, a0, -1480 + add a4, sp, a0 + lui a0, 31 + addiw a0, a0, -1488 + add a3, sp, a0 + lui a0, 31 + addiw a0, a0, -1496 + add a2, sp, a0 + lui a0, 31 + addiw a0, a0, -1504 add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -1336 - add a1, sp, a1 - lui a2, 31 - addiw a2, a2, -1344 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -1352 - add a3, sp, a3 - lui a4, 31 - addiw a4, a4, -1360 - add a4, sp, a4 - lui a5, 31 - addiw a5, a5, -1368 - add a5, sp, a5 - lui a6, 31 - addiw a6, a6, -1376 - add a6, sp, a6 - lui a7, 31 - addiw a7, a7, -1416 - add a7, sp, a7 - lui t0, 31 - addiw t0, t0, -1424 - add t0, sp, t0 - lui t1, 31 - addiw t1, t1, -1432 - add t1, sp, t1 - lui t2, 31 - addiw t2, t2, -1440 - add t2, sp, t2 - lui t3, 31 - addiw t3, t3, -1448 - add t3, sp, t3 - lui t4, 31 - addiw t4, t4, -1456 - add t4, sp, t4 - lui t5, 31 - addiw t5, t5, -1464 - add t5, sp, t5 - lui t6, 31 - addiw t6, t6, -1472 - add t6, sp, t6 - lui s2, 31 - addiw s2, s2, -1480 - add s2, sp, s2 - lui s3, 31 - addiw s3, s3, -1488 - add s3, sp, s3 - lui s4, 31 - addiw s4, s4, -1496 - add s4, sp, s4 - lui s5, 31 - addiw s5, s5, -1504 - add s5, sp, s5 ld s6, 240(sp) # 8-byte Folded Reload vle64.v v16, (s6) csrr s6, vlenb @@ -170744,179 +170555,179 @@ addiw s7, s7, -960 add s6, s6, s7 vs8r.v v16, (s6) # Unknown-size Folded Spill - vle64.v v16, (a0) - csrr a0, vlenb + vle64.v v16, (a1) + csrr a1, vlenb li s6, 1136 - mul a0, a0, s6 - add a0, sp, a0 + mul a1, a1, s6 + add a1, sp, a1 lui s6, 31 addiw s6, s6, -960 - add a0, a0, s6 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (a1) - csrr a0, vlenb - li a1, 1128 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (a2) - csrr a0, vlenb - li a1, 1120 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (a3) - csrr a0, vlenb - li a1, 1112 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (a4) - csrr a0, vlenb - li a1, 1104 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (a5) - csrr a0, vlenb - li a1, 1096 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (a6) - csrr a0, vlenb - li a1, 1088 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 1 - csrr a0, vlenb - li a1, 1048 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (a7) - csrr a0, vlenb - li a1, 936 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vle64.v v16, (t0) - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1112 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v16, (a0) # Unknown-size Folded Spill + add a1, a1, s6 + vs8r.v v16, (a1) # Unknown-size Folded Spill vle64.v v16, (t1) - csrr a0, vlenb - li a1, 920 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v16, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + li t1, 1128 + mul a1, a1, t1 + add a1, sp, a1 + lui t1, 31 + addiw t1, t1, -960 + add a1, a1, t1 + vs8r.v v16, (a1) # Unknown-size Folded Spill vle64.v v16, (t2) - csrr a0, vlenb - li a1, 904 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v16, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + li t1, 1120 + mul a1, a1, t1 + add a1, sp, a1 + lui t1, 31 + addiw t1, t1, -960 + add a1, a1, t1 + vs8r.v v16, (a1) # Unknown-size Folded Spill vle64.v v16, (t3) - csrr a0, vlenb - li a1, 880 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v16, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + li t1, 1112 + mul a1, a1, t1 + add a1, sp, a1 + lui t1, 31 + addiw t1, t1, -960 + add a1, a1, t1 + vs8r.v v16, (a1) # Unknown-size Folded Spill vle64.v v16, (t4) - csrr a0, vlenb - li a1, 856 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v16, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + li t1, 1104 + mul a1, a1, t1 + add a1, sp, a1 + lui t1, 31 + addiw t1, t1, -960 + add a1, a1, t1 + vs8r.v v16, (a1) # Unknown-size Folded Spill vle64.v v16, (t5) - csrr a0, vlenb - li a1, 848 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v16, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + li t1, 1096 + mul a1, a1, t1 + add a1, sp, a1 + lui t1, 31 + addiw t1, t1, -960 + add a1, a1, t1 + vs8r.v v16, (a1) # Unknown-size Folded Spill vle64.v v16, (t6) - csrr a0, vlenb - li a1, 832 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v16, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + li t1, 1088 + mul a1, a1, t1 + add a1, sp, a1 + lui t1, 31 + addiw t1, t1, -960 + add a1, a1, t1 + vs8r.v v16, (a1) # Unknown-size Folded Spill + vslidedown.vi v16, v8, 1 + csrr a1, vlenb + li t1, 1048 + mul a1, a1, t1 + add a1, sp, a1 + lui t1, 31 + addiw t1, t1, -960 + add a1, a1, t1 + vs8r.v v16, (a1) # Unknown-size Folded Spill vle64.v v16, (s2) - csrr a0, vlenb - li a1, 816 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v16, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + li t1, 936 + mul a1, a1, t1 + add a1, sp, a1 + lui t1, 31 + addiw t1, t1, -960 + add a1, a1, t1 + vs8r.v v16, (a1) # Unknown-size Folded Spill vle64.v v16, (s3) - csrr a0, vlenb - li a1, 792 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v16, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + lui t1, 1 + addiw t1, t1, -1160 + mul a1, a1, t1 + add a1, sp, a1 + lui t1, 31 + addiw t1, t1, -960 + add a1, a1, t1 + vs8r.v v16, (a1) # Unknown-size Folded Spill vle64.v v16, (s4) - csrr a0, vlenb - li a1, 768 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v16, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + li t1, 920 + mul a1, a1, t1 + add a1, sp, a1 + lui t1, 31 + addiw t1, t1, -960 + add a1, a1, t1 + vs8r.v v16, (a1) # Unknown-size Folded Spill vle64.v v16, (s5) + csrr a1, vlenb + li t1, 904 + mul a1, a1, t1 + add a1, sp, a1 + lui t1, 31 + addiw t1, t1, -960 + add a1, a1, t1 + vs8r.v v16, (a1) # Unknown-size Folded Spill + vle64.v v16, (t0) + csrr a1, vlenb + li t0, 880 + mul a1, a1, t0 + add a1, sp, a1 + lui t0, 31 + addiw t0, t0, -960 + add a1, a1, t0 + vs8r.v v16, (a1) # Unknown-size Folded Spill + vle64.v v16, (a7) + csrr a1, vlenb + li a7, 856 + mul a1, a1, a7 + add a1, sp, a1 + lui a7, 31 + addiw a7, a7, -960 + add a1, a1, a7 + vs8r.v v16, (a1) # Unknown-size Folded Spill + vle64.v v16, (a6) + csrr a1, vlenb + li a6, 848 + mul a1, a1, a6 + add a1, sp, a1 + lui a6, 31 + addiw a6, a6, -960 + add a1, a1, a6 + vs8r.v v16, (a1) # Unknown-size Folded Spill + vle64.v v16, (a5) + csrr a1, vlenb + li a5, 832 + mul a1, a1, a5 + add a1, sp, a1 + lui a5, 31 + addiw a5, a5, -960 + add a1, a1, a5 + vs8r.v v16, (a1) # Unknown-size Folded Spill + vle64.v v16, (a4) + csrr a1, vlenb + li a4, 816 + mul a1, a1, a4 + add a1, sp, a1 + lui a4, 31 + addiw a4, a4, -960 + add a1, a1, a4 + vs8r.v v16, (a1) # Unknown-size Folded Spill + vle64.v v16, (a3) + csrr a1, vlenb + li a3, 792 + mul a1, a1, a3 + add a1, sp, a1 + lui a3, 31 + addiw a3, a3, -960 + add a1, a1, a3 + vs8r.v v16, (a1) # Unknown-size Folded Spill + vle64.v v16, (a2) + csrr a1, vlenb + li a2, 768 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vs8r.v v16, (a1) # Unknown-size Folded Spill + vle64.v v16, (a0) csrr a0, vlenb li a1, 744 mul a0, a0, a1 @@ -171058,162 +170869,162 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill - ld a1, 176(sp) # 8-byte Folded Reload vle64.v v24, (a2) csrr a0, vlenb - li a2, 1376 - mul a0, a0, a2 + li a1, 1376 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill vle64.v v24, (a3) csrr a0, vlenb - li a2, 1368 - mul a0, a0, a2 + li a1, 1368 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill vle64.v v24, (a4) csrr a0, vlenb - li a2, 1360 - mul a0, a0, a2 + li a1, 1360 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill vle64.v v24, (a5) + ld a5, 176(sp) # 8-byte Folded Reload csrr a0, vlenb - li a2, 1352 - mul a0, a0, a2 + li a1, 1352 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill vle64.v v24, (a6) csrr a0, vlenb - li a2, 1344 - mul a0, a0, a2 + li a1, 1344 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill vle64.v v24, (a7) csrr a0, vlenb - li a2, 1336 - mul a0, a0, a2 + li a1, 1336 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill vle64.v v24, (t0) csrr a0, vlenb - li a2, 1328 - mul a0, a0, a2 + li a1, 1328 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill vle64.v v24, (t1) csrr a0, vlenb - li a2, 1320 - mul a0, a0, a2 + li a1, 1320 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill vle64.v v24, (t2) csrr a0, vlenb - li a2, 1312 - mul a0, a0, a2 + li a1, 1312 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill vle64.v v24, (t3) csrr a0, vlenb - li a2, 1304 - mul a0, a0, a2 + li a1, 1304 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v24, (a0) # Unknown-size Folded Spill vsetivli zero, 1, e64, m2, ta, ma lui a0, 30 addiw a0, a0, 1792 - add a2, sp, a0 - fsd fa5, 0(a2) + add a1, sp, a0 + fsd fa5, 0(a1) vslidedown.vi v24, v8, 3 csrr a0, vlenb - li a3, 1296 - mul a0, a0, a3 + li a2, 1296 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v24, (a0) # Unknown-size Folded Spill vslidedown.vi v24, v8, 2 csrr a0, vlenb - lui a3, 1 - addiw a3, a3, -1192 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, -1184 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v24, (a0) # Unknown-size Folded Spill vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - lui a3, 1 - addiw a3, a3, -1104 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, -1096 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 728 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, 728 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vl8r.v v24, (a0) # Unknown-size Folded Reload vslideup.vi v24, v8, 2 vsetivli zero, 16, e16, m2, ta, ma vid.v v16 csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 728 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, 728 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs2r.v v16, (a0) # Unknown-size Folded Spill vadd.vi v18, v16, 5 vsetvli zero, zero, e64, m8, ta, ma csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 744 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, 744 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vl8r.v v0, (a0) # Unknown-size Folded Reload vrgatherei16.vv v8, v0, v18 vsetvli zero, zero, e16, m2, ta, ma @@ -171222,140 +171033,139 @@ vadd.vi v2, v16, -14 vsetvli zero, zero, e64, m8, ta, mu csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 736 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, 736 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vl8r.v v16, (a0) # Unknown-size Folded Reload vrgatherei16.vv v8, v16, v2, v0.t vsetivli zero, 14, e64, m8, tu, ma vslideup.vi v8, v24, 11 csrr a0, vlenb - lui a3, 1 - addiw a3, a3, -1104 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, -1096 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill vsetivli zero, 1, e64, m8, ta, ma vslidedown.vi v0, v8, 15 csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 736 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, 736 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v0, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v8, 14 csrr a0, vlenb - li a3, 1288 - mul a0, a0, a3 + li a2, 1288 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v8, 13 csrr a0, vlenb - li a3, 1280 - mul a0, a0, a3 + li a2, 1280 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v8, 12 csrr a0, vlenb - li a3, 1272 - mul a0, a0, a3 + li a2, 1272 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v8, 11 csrr a0, vlenb - li a3, 1264 - mul a0, a0, a3 + li a2, 1264 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v8, 10 csrr a0, vlenb - li a3, 1256 - mul a0, a0, a3 + li a2, 1256 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v8, 9 csrr a0, vlenb - li a3, 1248 - mul a0, a0, a3 + li a2, 1248 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v8, 8 csrr a0, vlenb - li a3, 1240 - mul a0, a0, a3 + li a2, 1240 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - lui a3, 1 - addiw a3, a3, -1160 - mul a0, a0, a3 + li a2, 1232 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - li a3, 23 - slli a3, a3, 7 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, -1128 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 2 vsetivli zero, 16, e16, m2, ta, ma csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 728 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, 728 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vl2r.v v24, (a0) # Unknown-size Folded Reload vadd.vi v26, v24, 8 vsetvli zero, zero, e64, m8, ta, ma csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 752 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, 752 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vl8r.v v0, (a0) # Unknown-size Folded Reload vrgatherei16.vv v8, v0, v26 vsetvli zero, zero, e16, m2, ta, ma @@ -171364,149 +171174,150 @@ vadd.vi v2, v24, -11 vsetvli zero, zero, e64, m8, ta, mu csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 744 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, 744 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vl8r.v v24, (a0) # Unknown-size Folded Reload vrgatherei16.vv v8, v24, v2, v0.t vsetivli zero, 11, e64, m8, tu, ma vslideup.vi v8, v16, 8 csrr a0, vlenb - lui a3, 1 - addiw a3, a3, -1160 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, -1128 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill vsetivli zero, 1, e64, m8, ta, ma vslidedown.vi v0, v8, 15 csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 744 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, 744 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v0, (a0) # Unknown-size Folded Spill vslidedown.vi v0, v8, 14 csrr a0, vlenb - li a3, 1232 - mul a0, a0, a3 + li a2, 1232 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v0, (a0) # Unknown-size Folded Spill vslidedown.vi v0, v8, 13 csrr a0, vlenb - li a3, 1224 - mul a0, a0, a3 + li a2, 1224 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v0, (a0) # Unknown-size Folded Spill vslidedown.vi v0, v8, 12 csrr a0, vlenb - li a3, 1208 - mul a0, a0, a3 + li a2, 1208 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v0, (a0) # Unknown-size Folded Spill vslidedown.vi v0, v8, 11 csrr a0, vlenb - li a3, 1192 - mul a0, a0, a3 + li a2, 1192 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v0, (a0) # Unknown-size Folded Spill vslidedown.vi v0, v8, 10 csrr a0, vlenb - li a3, 1176 - mul a0, a0, a3 + li a2, 1176 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v0, (a0) # Unknown-size Folded Spill vslidedown.vi v0, v8, 9 csrr a0, vlenb - li a3, 1160 - mul a0, a0, a3 + li a2, 1160 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v0, (a0) # Unknown-size Folded Spill vslidedown.vi v0, v8, 8 csrr a0, vlenb - li a3, 1144 - mul a0, a0, a3 + li a2, 1144 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v0, (a0) # Unknown-size Folded Spill vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - li a3, 1216 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, -1176 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vl8r.v v0, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a3, 1 - addiw a3, a3, -1144 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, -1168 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v16, v0, 2 vsetivli zero, 16, e16, m2, ta, ma csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 728 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, 728 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vl2r.v v8, (a0) # Unknown-size Folded Reload vadd.vi v12, v8, 11 vsetvli zero, zero, e64, m8, ta, ma csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 984 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, 984 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vl8r.v v0, (a0) # Unknown-size Folded Reload vrgatherei16.vv v24, v0, v12 csrr a0, vlenb - li a3, 23 - slli a3, a3, 7 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, -1176 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v24, (a0) # Unknown-size Folded Spill vsetvli zero, zero, e16, m2, ta, ma vadd.vi v2, v8, -8 @@ -171514,22 +171325,22 @@ vmv.s.x v0, a0 vsetvli zero, zero, e64, m8, ta, mu csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 752 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, 752 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vl8r.v v24, (a0) # Unknown-size Folded Reload csrr a0, vlenb - li a3, 23 - slli a3, a3, 7 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, -1176 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vl8r.v v8, (a0) # Unknown-size Folded Reload vrgatherei16.vv v8, v24, v2, v0.t vsetivli zero, 8, e64, m8, tu, ma @@ -171537,419 +171348,419 @@ vsetivli zero, 1, e64, m8, ta, ma vslidedown.vi v24, v8, 15 csrr a0, vlenb - li a3, 1032 - mul a0, a0, a3 + li a2, 1032 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v24, (a0) # Unknown-size Folded Spill vslidedown.vi v24, v8, 14 csrr a0, vlenb - li a3, 1000 - mul a0, a0, a3 + li a2, 1000 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v24, (a0) # Unknown-size Folded Spill vslidedown.vi v24, v8, 13 csrr a0, vlenb - li a3, 984 - mul a0, a0, a3 + li a2, 984 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v24, (a0) # Unknown-size Folded Spill vslidedown.vi v24, v8, 12 csrr a0, vlenb - li a3, 968 - mul a0, a0, a3 + li a2, 968 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v24, (a0) # Unknown-size Folded Spill vslidedown.vi v24, v8, 11 csrr a0, vlenb - li a3, 960 - mul a0, a0, a3 + li a2, 960 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v24, (a0) # Unknown-size Folded Spill vslidedown.vi v24, v8, 10 csrr a0, vlenb - li a3, 928 - mul a0, a0, a3 + li a2, 928 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v24, (a0) # Unknown-size Folded Spill vslidedown.vi v24, v8, 9 csrr a0, vlenb - li a3, 912 - mul a0, a0, a3 + li a2, 912 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v24, (a0) # Unknown-size Folded Spill vslidedown.vi v24, v8, 8 vmv4r.v v0, v8 csrr a0, vlenb - li a3, 888 - mul a0, a0, a3 + li a2, 888 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v24, (a0) # Unknown-size Folded Spill vsetivli zero, 1, e64, m4, ta, ma csrr a0, vlenb - lui a3, 1 - addiw a3, a3, -1104 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, -1096 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vl8r.v v16, (a0) # Unknown-size Folded Reload vslidedown.vi v24, v16, 7 csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 752 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, 752 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v24, (a0) # Unknown-size Folded Spill vslidedown.vi v24, v16, 6 csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 728 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, 728 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v24, (a0) # Unknown-size Folded Spill vslidedown.vi v24, v16, 5 csrr a0, vlenb - li a3, 1216 - mul a0, a0, a3 + li a2, 1216 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v24, (a0) # Unknown-size Folded Spill vslidedown.vi v24, v16, 4 csrr a0, vlenb - li a3, 1200 - mul a0, a0, a3 + li a2, 1200 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v24, (a0) # Unknown-size Folded Spill vsetivli zero, 1, e64, m2, ta, ma vslidedown.vi v24, v16, 3 csrr a0, vlenb - li a3, 1184 - mul a0, a0, a3 + li a2, 1184 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v24, (a0) # Unknown-size Folded Spill vslidedown.vi v24, v16, 2 csrr a0, vlenb - li a3, 1168 - mul a0, a0, a3 + li a2, 1168 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v24, (a0) # Unknown-size Folded Spill vsetivli zero, 1, e64, m1, ta, ma vslidedown.vi v16, v16, 1 csrr a0, vlenb - li a3, 1152 - mul a0, a0, a3 + li a2, 1152 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 1, e64, m4, ta, ma csrr a0, vlenb - lui a3, 1 - addiw a3, a3, -1160 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, -1128 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vl8r.v v8, (a0) # Unknown-size Folded Reload vslidedown.vi v16, v8, 7 csrr a0, vlenb - li a3, 1080 - mul a0, a0, a3 + li a2, 1080 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v8, 6 csrr a0, vlenb - li a3, 1072 - mul a0, a0, a3 + li a2, 1072 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v8, 5 csrr a0, vlenb - li a3, 1056 - mul a0, a0, a3 + li a2, 1056 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v8, 4 csrr a0, vlenb - li a3, 1016 - mul a0, a0, a3 + li a2, 1016 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 1, e64, m2, ta, ma vslidedown.vi v16, v8, 3 csrr a0, vlenb - li a3, 992 - mul a0, a0, a3 + li a2, 992 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v8, 2 csrr a0, vlenb - li a3, 976 - mul a0, a0, a3 + li a2, 976 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 1, e64, m1, ta, ma vslidedown.vi v8, v8, 1 csrr a0, vlenb - li a3, 952 - mul a0, a0, a3 + li a2, 952 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill vsetivli zero, 1, e64, m4, ta, ma vmv4r.v v8, v0 csrr a0, vlenb - li a3, 23 - slli a3, a3, 7 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, -1176 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v0, 7 csrr a0, vlenb - li a3, 800 - mul a0, a0, a3 + li a2, 800 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v0, 6 csrr a0, vlenb - li a3, 784 - mul a0, a0, a3 + li a2, 784 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v0, 5 csrr a0, vlenb - li a3, 760 - mul a0, a0, a3 + li a2, 760 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v0, 4 csrr a0, vlenb - li a3, 736 - mul a0, a0, a3 + li a2, 736 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 1, e64, m2, ta, ma vslidedown.vi v16, v8, 3 csrr a0, vlenb - li a3, 712 - mul a0, a0, a3 + li a2, 712 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v8, 2 csrr a0, vlenb - li a3, 688 - mul a0, a0, a3 + li a2, 688 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 1, e64, m1, ta, ma vslidedown.vi v8, v8, 1 csrr a0, vlenb - li a3, 648 - mul a0, a0, a3 + li a2, 648 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v8, (a0) # Unknown-size Folded Spill vsetivli zero, 1, e64, m8, ta, ma csrr a0, vlenb - lui a3, 1 - addiw a3, a3, -1128 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, -1136 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vl8r.v v8, (a0) # Unknown-size Folded Reload vslidedown.vi v16, v8, 15 csrr a0, vlenb - li a3, 96 - mul a0, a0, a3 + li a2, 96 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v8, 14 csrr a0, vlenb - li a3, 88 - mul a0, a0, a3 + li a2, 88 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v8, 13 csrr a0, vlenb - li a3, 80 - mul a0, a0, a3 + li a2, 80 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v8, 12 csrr a0, vlenb - li a3, 72 - mul a0, a0, a3 + li a2, 72 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v8, 11 csrr a0, vlenb slli a0, a0, 6 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v8, 10 csrr a0, vlenb - li a3, 56 - mul a0, a0, a3 + li a2, 56 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v8, 9 csrr a0, vlenb - li a3, 48 - mul a0, a0, a3 + li a2, 48 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v8, 8 csrr a0, vlenb - li a3, 40 - mul a0, a0, a3 + li a2, 40 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 1, e64, m4, ta, ma vslidedown.vi v16, v8, 7 csrr a0, vlenb slli a0, a0, 5 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v8, 6 csrr a0, vlenb - li a3, 24 - mul a0, a0, a3 + li a2, 24 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v8, 5 csrr a0, vlenb slli a0, a0, 4 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v16, (a0) # Unknown-size Folded Spill vslidedown.vi v16, v8, 4 csrr a0, vlenb slli a0, a0, 3 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 1, e64, m2, ta, ma vslidedown.vi v16, v8, 3 @@ -171961,15 +171772,15 @@ vsetivli zero, 1, e64, m1, ta, ma vslidedown.vi v16, v8, 1 vsetivli zero, 16, e64, m8, ta, ma - vle64.v v0, (a2) + vle64.v v0, (a1) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1144 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1168 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v0, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma vslideup.vi v8, v16, 1 @@ -171985,7511 +171796,7511 @@ csrr a0, vlenb slli a0, a0, 3 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb slli a0, a0, 4 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - li a2, 24 - mul a0, a0, a2 + li a1, 24 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb slli a0, a0, 5 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - li a2, 40 - mul a0, a0, a2 + li a1, 40 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - li a2, 48 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + li a1, 48 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - li a2, 56 - mul a0, a0, a2 + li a1, 56 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb slli a0, a0, 6 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - li a2, 72 - mul a0, a0, a2 + li a1, 72 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - li a2, 80 - mul a0, a0, a2 + li a1, 80 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a2, 88 - mul a0, a0, a2 + li a1, 88 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - li a2, 96 - mul a0, a0, a2 + li a1, 96 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1128 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - li a2, 112 - mul a0, a0, a2 + li a1, 112 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1120 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1192 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb slli a0, a0, 7 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 760 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 760 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - li a2, 104 - mul a0, a0, a2 + li a1, 104 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - li a2, 120 - mul a0, a0, a2 + li a1, 120 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - li a2, 136 - mul a0, a0, a2 + li a1, 136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - li a2, 144 - mul a0, a0, a2 + li a1, 144 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - li a2, 152 - mul a0, a0, a2 + li a1, 152 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - li a2, 160 - mul a0, a0, a2 + li a1, 160 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - li a2, 184 - mul a0, a0, a2 + li a1, 184 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - li a2, 200 - mul a0, a0, a2 + li a1, 200 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - li a2, 208 - mul a0, a0, a2 + li a1, 208 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - li a2, 224 - mul a0, a0, a2 + li a1, 224 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a2, 240 - mul a0, a0, a2 + li a1, 240 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - li a2, 248 - mul a0, a0, a2 + slli a0, a0, 8 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1120 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1192 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - li a2, 264 - mul a0, a0, a2 + li a1, 272 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1088 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1104 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - li a2, 280 - mul a0, a0, a2 + li a1, 280 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - li a2, 296 - mul a0, a0, a2 + li a1, 296 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - li a2, 312 - mul a0, a0, a2 + li a1, 312 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - li a2, 328 - mul a0, a0, a2 + li a1, 328 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - li a2, 19 - slli a2, a2, 8 - mul a0, a0, a2 + li a1, 19 + slli a1, a1, 8 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - li a2, 176 - mul a0, a0, a2 + li a1, 176 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - li a2, 168 - mul a0, a0, a2 + li a1, 168 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - li a2, 192 - mul a0, a0, a2 + li a1, 192 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - li a2, 216 - mul a0, a0, a2 + li a1, 216 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - li a2, 232 - mul a0, a0, a2 + li a1, 232 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - slli a0, a0, 8 + li a1, 248 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - li a2, 272 - mul a0, a0, a2 + li a1, 264 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a2, 288 - mul a0, a0, a2 + li a1, 288 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - li a2, 304 - mul a0, a0, a2 + li a1, 304 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1088 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1104 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - li a2, 320 - mul a0, a0, a2 + li a1, 320 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1176 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1088 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - li a2, 336 - mul a0, a0, a2 + li a1, 336 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - li a2, 344 - mul a0, a0, a2 + li a1, 344 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - li a2, 352 - mul a0, a0, a2 + li a1, 352 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - li a2, 360 - mul a0, a0, a2 + li a1, 360 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 792 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 792 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - li a2, 392 - mul a0, a0, a2 + li a1, 392 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - li a2, 400 - mul a0, a0, a2 + li a1, 416 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 776 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 776 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - li a2, 376 - mul a0, a0, a2 + li a1, 376 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - li a2, 368 - mul a0, a0, a2 + li a1, 368 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - li a2, 384 - mul a0, a0, a2 + li a1, 384 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - li a2, 424 - mul a0, a0, a2 + li a1, 432 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a2, 440 - mul a0, a0, a2 + li a1, 440 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - li a2, 448 - mul a0, a0, a2 + li a1, 448 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1176 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1088 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - li a2, 472 - mul a0, a0, a2 + li a1, 472 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1168 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1144 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - li a2, 488 - mul a0, a0, a2 + li a1, 488 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - li a2, 504 - mul a0, a0, a2 + li a1, 504 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - li a2, 520 - mul a0, a0, a2 + li a1, 520 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - li a2, 536 - mul a0, a0, a2 + li a1, 536 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - li a2, 552 - mul a0, a0, a2 + li a1, 552 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - li a2, 568 - mul a0, a0, a2 + li a1, 568 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - li a2, 584 - mul a0, a0, a2 + li a1, 584 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 800 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 800 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - li a2, 608 - mul a0, a0, a2 + li a1, 608 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - li a2, 616 - mul a0, a0, a2 + li a1, 616 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 784 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 784 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - li a2, 416 - mul a0, a0, a2 + li a1, 408 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a2, 408 - mul a0, a0, a2 + li a1, 400 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - li a2, 432 - mul a0, a0, a2 + li a1, 424 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1168 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1144 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - li a2, 456 - mul a0, a0, a2 + li a1, 456 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1096 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1120 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - li a2, 464 - mul a0, a0, a2 + li a1, 464 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - li a2, 480 - mul a0, a0, a2 + li a1, 480 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - li a2, 496 - mul a0, a0, a2 + li a1, 496 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb slli a0, a0, 9 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - li a2, 528 - mul a0, a0, a2 + li a1, 528 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - li a2, 544 - mul a0, a0, a2 + li a1, 544 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - li a2, 560 - mul a0, a0, a2 + li a1, 560 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - li a2, 576 - mul a0, a0, a2 + li a1, 576 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - li a2, 592 - mul a0, a0, a2 + li a1, 592 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - li a2, 600 - mul a0, a0, a2 + li a1, 600 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 832 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 832 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - li a2, 640 - mul a0, a0, a2 + li a1, 640 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a2, 664 - mul a0, a0, a2 + li a1, 664 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 808 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 808 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1096 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1120 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - li a2, 624 - mul a0, a0, a2 + li a1, 624 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1136 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1112 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - li a2, 632 - mul a0, a0, a2 + li a1, 632 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - li a2, 656 - mul a0, a0, a2 + li a1, 656 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - li a2, 696 - mul a0, a0, a2 + li a1, 696 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - li a2, 720 - mul a0, a0, a2 + li a1, 720 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - li a2, 728 - mul a0, a0, a2 + li a1, 728 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - li a2, 752 - mul a0, a0, a2 + li a1, 752 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - li a2, 776 - mul a0, a0, a2 + li a1, 776 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - li a2, 808 - mul a0, a0, a2 + li a1, 808 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - li a2, 824 - mul a0, a0, a2 + li a1, 824 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - li a2, 840 - mul a0, a0, a2 + li a1, 840 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - li a2, 864 - mul a0, a0, a2 + li a1, 864 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - li a2, 872 - mul a0, a0, a2 + li a1, 872 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a2, 896 - mul a0, a0, a2 + li a1, 896 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 824 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 824 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1136 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1112 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - li a2, 944 - mul a0, a0, a2 + li a1, 944 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1184 - mul a0, a0, a2 + li a1, 23 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 816 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 816 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - li a2, 680 - mul a0, a0, a2 + li a1, 680 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - li a2, 672 - mul a0, a0, a2 + li a1, 672 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - li a2, 704 - mul a0, a0, a2 + li a1, 704 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - li a2, 744 - mul a0, a0, a2 + li a1, 744 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - li a2, 768 - mul a0, a0, a2 + li a1, 768 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - li a2, 792 - mul a0, a0, a2 + li a1, 792 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - li a2, 816 - mul a0, a0, a2 + li a1, 816 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - li a2, 832 - mul a0, a0, a2 + li a1, 832 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - li a2, 848 - mul a0, a0, a2 + li a1, 848 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - li a2, 856 - mul a0, a0, a2 + li a1, 856 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - li a2, 880 - mul a0, a0, a2 + li a1, 880 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a2, 904 - mul a0, a0, a2 + li a1, 904 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - li a2, 920 - mul a0, a0, a2 + li a1, 920 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1184 - mul a0, a0, a2 + li a1, 23 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - li a2, 936 - mul a0, a0, a2 + li a1, 936 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1112 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1160 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 840 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 840 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb slli a0, a0, 10 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - li a2, 1064 - mul a0, a0, a2 + li a1, 1064 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 984 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 984 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - li a2, 1048 - mul a0, a0, a2 + li a1, 1048 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - li a2, 1008 - mul a0, a0, a2 + li a1, 1008 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - li a2, 1040 - mul a0, a0, a2 + li a1, 1040 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - li a2, 1088 - mul a0, a0, a2 + li a1, 1088 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - li a2, 1096 - mul a0, a0, a2 + li a1, 1096 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - li a2, 1104 - mul a0, a0, a2 + li a1, 1104 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - li a2, 1112 - mul a0, a0, a2 + li a1, 1112 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - li a2, 1120 - mul a0, a0, a2 + li a1, 1120 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a2, 1128 - mul a0, a0, a2 + li a1, 1128 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - li a2, 1136 - mul a0, a0, a2 + li a1, 1136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1112 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1160 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - li a2, 648 - mul a0, a0, a2 + li a1, 648 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - li a2, 23 - slli a2, a2, 7 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1176 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - li a2, 688 - mul a0, a0, a2 + li a1, 688 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - li a2, 712 - mul a0, a0, a2 + li a1, 712 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - li a2, 736 - mul a0, a0, a2 + li a1, 736 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - li a2, 760 - mul a0, a0, a2 + li a1, 760 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - li a2, 784 - mul a0, a0, a2 + li a1, 784 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - li a2, 800 - mul a0, a0, a2 + li a1, 800 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - li a2, 888 - mul a0, a0, a2 + li a1, 888 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - li a2, 912 - mul a0, a0, a2 + li a1, 912 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - li a2, 928 - mul a0, a0, a2 + li a1, 928 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - li a2, 960 - mul a0, a0, a2 + li a1, 960 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - li a2, 968 - mul a0, a0, a2 + li a1, 968 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - li a2, 984 - mul a0, a0, a2 + li a1, 984 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a2, 1000 - mul a0, a0, a2 + li a1, 1000 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - li a2, 1032 - mul a0, a0, a2 + li a1, 1032 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 15 csrr a0, vlenb - li a2, 23 - slli a2, a2, 7 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1176 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - li a2, 952 - mul a0, a0, a2 + li a1, 952 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1160 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1128 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - li a2, 976 - mul a0, a0, a2 + li a1, 976 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - li a2, 992 - mul a0, a0, a2 + li a1, 992 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - li a2, 1016 - mul a0, a0, a2 + li a1, 1016 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - li a2, 1056 - mul a0, a0, a2 + li a1, 1056 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - li a2, 1072 - mul a0, a0, a2 + li a1, 1072 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - li a2, 1080 - mul a0, a0, a2 + li a1, 1080 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - li a2, 1144 - mul a0, a0, a2 + li a1, 1144 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - li a2, 1160 - mul a0, a0, a2 + li a1, 1160 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - li a2, 1176 - mul a0, a0, a2 + li a1, 1176 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - li a2, 1192 - mul a0, a0, a2 + li a1, 1192 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - li a2, 1208 - mul a0, a0, a2 + li a1, 1208 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - li a2, 1224 - mul a0, a0, a2 + li a1, 1224 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a2, 1232 - mul a0, a0, a2 + li a1, 1232 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 744 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 744 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1160 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1128 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - li a2, 1152 - mul a0, a0, a2 + li a1, 1152 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1104 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1096 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - li a2, 1168 - mul a0, a0, a2 + li a1, 1168 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - li a2, 1184 - mul a0, a0, a2 + li a1, 1184 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - li a2, 1200 - mul a0, a0, a2 + li a1, 1200 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - li a2, 1216 - mul a0, a0, a2 + li a1, 1216 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 728 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 728 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 752 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 752 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - li a2, 1240 - mul a0, a0, a2 + li a1, 1240 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - li a2, 1248 - mul a0, a0, a2 + li a1, 1248 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - li a2, 1256 - mul a0, a0, a2 + li a1, 1256 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - li a2, 1264 - mul a0, a0, a2 + li a1, 1264 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - li a2, 1272 - mul a0, a0, a2 + li a1, 1272 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - li a2, 1280 - mul a0, a0, a2 + li a1, 1280 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a2, 1288 - mul a0, a0, a2 + li a1, 1288 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 736 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 736 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1104 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1096 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - li a2, 1296 - mul a0, a0, a2 + li a1, 1296 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1192 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1184 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - li a2, 1304 - mul a0, a0, a2 + li a1, 1304 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - li a2, 1312 - mul a0, a0, a2 + li a1, 1312 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - li a2, 1320 - mul a0, a0, a2 + li a1, 1320 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - li a2, 1328 - mul a0, a0, a2 + li a1, 1328 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - li a2, 1336 - mul a0, a0, a2 + li a1, 1336 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - li a2, 1344 - mul a0, a0, a2 + li a1, 1344 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - li a2, 1352 - mul a0, a0, a2 + li a1, 1352 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - li a2, 1360 - mul a0, a0, a2 + li a1, 1360 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - li a2, 1368 - mul a0, a0, a2 + li a1, 1368 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - li a2, 1376 - mul a0, a0, a2 + li a1, 1376 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - li a2, 1384 - mul a0, a0, a2 + li a1, 1384 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - li a2, 1392 - mul a0, a0, a2 + li a1, 1392 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 848 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 848 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - li a2, 1400 - mul a0, a0, a2 + li a1, 1400 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1192 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1184 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - li a2, 1408 - mul a0, a0, a2 + li a1, 1408 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1224 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1232 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - li a2, 1416 - mul a0, a0, a2 + li a1, 1416 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - li a2, 1424 - mul a0, a0, a2 + li a1, 1424 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - li a2, 1432 - mul a0, a0, a2 + li a1, 1432 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - li a2, 1440 - mul a0, a0, a2 + li a1, 1440 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - li a2, 1448 - mul a0, a0, a2 + li a1, 1448 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - li a2, 1456 - mul a0, a0, a2 + li a1, 1456 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - li a2, 1464 - mul a0, a0, a2 + li a1, 1464 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - li a2, 1472 - mul a0, a0, a2 + li a1, 1472 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - li a2, 1480 - mul a0, a0, a2 + li a1, 1480 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - li a2, 1488 - mul a0, a0, a2 + li a1, 1488 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - li a2, 1496 - mul a0, a0, a2 + li a1, 1496 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - li a2, 1504 - mul a0, a0, a2 + li a1, 1504 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a2, 1512 - mul a0, a0, a2 + li a1, 1512 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - li a2, 1520 - mul a0, a0, a2 + li a1, 1520 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1224 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1232 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1144 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1144 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - li a2, 1936 - mul a0, a0, a2 + li a1, 1936 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - li a2, 1824 - mul a0, a0, a2 + li a1, 1824 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - li a2, 1872 - mul a0, a0, a2 + li a1, 1872 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - li a2, 2040 - mul a0, a0, a2 + li a1, 2040 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1992 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1992 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1936 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1936 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1864 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1864 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1392 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1392 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -2008 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -2008 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1728 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1728 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1904 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1904 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1840 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1840 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1544 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1544 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1472 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1472 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1424 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1424 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1144 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1144 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1200 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1304 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1320 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1320 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1240 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1240 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1064 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1064 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -984 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -984 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -928 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -928 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -864 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -864 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -792 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -792 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -712 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -712 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1296 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1296 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - li a2, 27 - slli a2, a2, 7 - mul a0, a0, a2 + li a1, 27 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1072 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1072 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -992 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -992 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -472 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -472 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -360 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -360 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -248 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -248 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1200 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1304 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1208 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1224 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - li a2, 31 - slli a2, a2, 7 - mul a0, a0, a2 + li a1, 31 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 992 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 992 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - li a2, 1648 - mul a0, a0, a2 + li a1, 1648 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - li a2, 1592 - mul a0, a0, a2 + li a1, 1592 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - li a2, 1616 - mul a0, a0, a2 + li a1, 1616 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - li a2, 1688 - mul a0, a0, a2 + li a1, 1688 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - li a2, 1720 - mul a0, a0, a2 + li a1, 1720 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - li a2, 1752 - mul a0, a0, a2 + li a1, 1752 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - li a2, 1776 - mul a0, a0, a2 + li a1, 1776 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - li a2, 1800 - mul a0, a0, a2 + li a1, 1800 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - li a2, 1840 - mul a0, a0, a2 + li a1, 1840 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - li a2, 1912 - mul a0, a0, a2 + li a1, 1912 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - li a2, 1976 - mul a0, a0, a2 + li a1, 1976 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a2, 2024 - mul a0, a0, a2 + li a1, 2024 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -2032 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -2032 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1208 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1224 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1184 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1208 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1960 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1960 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1040 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1040 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1848 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1848 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - li a2, 1904 - mul a0, a0, a2 + li a1, 1904 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - li a2, 1960 - mul a0, a0, a2 + li a1, 1960 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1704 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1704 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1632 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1632 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1552 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1552 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1480 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1480 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -888 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -888 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 880 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 880 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1328 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1328 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1816 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1816 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1768 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1768 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1032 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1032 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1184 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1208 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1192 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1216 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -952 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -952 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - li a2, 25 - slli a2, a2, 7 - mul a0, a0, a2 + li a1, 25 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -824 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -824 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -760 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -760 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -688 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -688 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -648 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -648 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -584 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -584 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -504 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -504 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -408 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -408 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -288 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -288 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 920 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 920 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -160 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -160 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -976 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -976 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -912 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -912 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -8 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -8 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1192 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1216 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1304 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 80 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 80 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 136 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 224 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 224 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1000 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1000 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - li a2, 1664 - mul a0, a0, a2 + li a1, 1664 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - li a2, 1608 - mul a0, a0, a2 + li a1, 1608 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - li a2, 1632 - mul a0, a0, a2 + li a1, 1632 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - li a2, 1712 - mul a0, a0, a2 + li a1, 1712 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - li a2, 1736 - mul a0, a0, a2 + li a1, 1736 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - li a2, 1760 - mul a0, a0, a2 + li a1, 1760 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - li a2, 1784 - mul a0, a0, a2 + li a1, 1784 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - li a2, 1832 - mul a0, a0, a2 + li a1, 1832 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - li a2, 1896 - mul a0, a0, a2 + li a1, 1896 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a2, 1952 - mul a0, a0, a2 + li a1, 1952 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - li a2, 2008 - mul a0, a0, a2 + li a1, 2008 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1304 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1352 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1200 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -2040 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -2040 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1976 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1976 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1912 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1912 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 864 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 864 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1800 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1800 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - li a2, 1928 - mul a0, a0, a2 + li a1, 1928 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - li a2, 1992 - mul a0, a0, a2 + li a1, 1992 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1656 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1656 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1592 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1592 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1520 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1520 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1448 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1448 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -840 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -840 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1112 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1112 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a2, 11 - slli a2, a2, 8 - mul a0, a0, a2 + li a1, 11 + slli a1, a1, 8 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - li a2, 9 - slli a2, a2, 8 - mul a0, a0, a2 + li a1, 9 + slli a1, a1, 8 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1352 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1200 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1312 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1312 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1288 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1296 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1056 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1056 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -784 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -784 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -664 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -664 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -608 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -608 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -544 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -544 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -456 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -456 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -336 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -336 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -232 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -232 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -168 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -168 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -88 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -88 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -32 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -32 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 928 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 928 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 72 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 72 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -720 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -720 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1288 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1296 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 184 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 184 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1296 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1192 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 248 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 248 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 304 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 304 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 360 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 360 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 440 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 440 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1008 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1008 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - li a2, 1744 - mul a0, a0, a2 + li a1, 1744 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - li a2, 1680 - mul a0, a0, a2 + li a1, 1680 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - li a2, 1704 - mul a0, a0, a2 + li a1, 1704 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - li a2, 1816 - mul a0, a0, a2 + li a1, 1816 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - li a2, 1864 - mul a0, a0, a2 + li a1, 1864 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - li a2, 1920 - mul a0, a0, a2 + li a1, 1920 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - li a2, 1984 - mul a0, a0, a2 + li a1, 1984 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a2, 2032 - mul a0, a0, a2 + li a1, 2032 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -2016 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -2016 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1296 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1192 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1336 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1288 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1944 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1944 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1872 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1872 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1888 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1888 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1672 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1672 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1616 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1616 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 872 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 872 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1488 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1488 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - li a2, 17 - slli a2, a2, 7 - mul a0, a0, a2 + li a1, 17 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1856 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1856 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1336 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1336 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1248 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1248 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1080 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1080 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1000 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1000 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -552 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -552 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1048 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1048 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1336 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1288 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1344 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1184 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1528 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1528 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1456 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1456 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -728 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -728 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -672 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -672 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -624 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -624 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -576 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -576 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -400 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -400 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -176 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -176 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -104 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -104 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -48 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -48 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 16 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 16 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 64 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 64 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 128 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 128 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 200 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 200 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1088 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1088 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1344 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1184 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - li a2, 21 - slli a2, a2, 8 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1344 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -560 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -560 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -480 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -480 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 392 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 392 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 448 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 448 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 488 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 488 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 528 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 528 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 584 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 584 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1016 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1016 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - li a2, 1888 - mul a0, a0, a2 + li a1, 1888 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - li a2, 1768 - mul a0, a0, a2 + li a1, 1768 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - li a2, 1792 - mul a0, a0, a2 + li a1, 1792 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - li a2, 2016 - mul a0, a0, a2 + li a1, 2016 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb slli a0, a0, 11 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1984 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1984 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1928 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1928 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 15 csrr a0, vlenb - li a2, 21 - slli a2, a2, 8 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1344 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1264 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1128 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1824 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1824 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1776 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1776 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1712 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1712 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1640 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1640 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1560 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1560 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1496 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1496 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1432 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1432 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 888 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 888 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1304 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1304 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1744 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1744 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1680 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1680 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - li a2, 3 - slli a2, a2, 10 - mul a0, a0, a2 + li a1, 3 + slli a1, a1, 10 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -960 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -960 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -904 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -904 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -832 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -832 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1264 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1128 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1272 - mul a0, a0, a2 + li a1, 21 + slli a1, a1, 8 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1056 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1056 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -696 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -696 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1344 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1344 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1256 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1256 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -592 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -592 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - li a2, 7 - slli a2, a2, 9 - mul a0, a0, a2 + li a1, 7 + slli a1, a1, 9 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -416 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -416 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -296 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -296 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -208 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -208 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -136 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -64 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -64 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -16 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -16 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 40 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 40 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 112 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 112 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 176 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 176 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1272 - mul a0, a0, a2 + li a1, 21 + slli a1, a1, 8 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1328 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1176 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 936 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 936 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 296 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 296 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -520 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -520 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -424 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -424 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 432 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 432 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 472 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 472 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - li a2, 9 - slli a2, a2, 9 - mul a0, a0, a2 + li a1, 9 + slli a1, a1, 9 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 560 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 560 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 608 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 608 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 856 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 856 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1736 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1736 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - li a2, 1880 - mul a0, a0, a2 + li a1, 1880 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - li a2, 1944 - mul a0, a0, a2 + li a1, 1944 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1568 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1568 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1504 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1504 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1328 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1176 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1176 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1168 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1400 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1400 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1352 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1352 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1264 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1264 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1200 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1200 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1008 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1008 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -936 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -936 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -872 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -872 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -800 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -800 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -736 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -736 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 896 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 896 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1576 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1576 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1752 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1752 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1688 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1688 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a2, 21 - slli a2, a2, 7 - mul a0, a0, a2 + li a1, 21 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1360 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1360 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1176 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1168 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1136 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1272 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1224 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1224 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -304 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -304 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1064 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1064 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -968 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -968 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1368 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1368 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1272 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1272 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -808 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -808 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -744 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -744 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -680 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -680 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -632 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -632 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -568 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -568 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -488 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -488 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -368 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -368 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a2, 15 - slli a2, a2, 8 - mul a0, a0, a2 + li a1, 15 + slli a1, a1, 8 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -184 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -184 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1136 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1272 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1256 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1160 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -96 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -96 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -40 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -40 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1096 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1096 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 56 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 56 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -528 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -528 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -432 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -432 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 216 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 216 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 272 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 272 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 328 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 328 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 384 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 384 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 632 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 632 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - li a2, 5 - slli a2, a2, 10 - mul a0, a0, a2 + li a1, 5 + slli a1, a1, 10 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - li a2, 1968 - mul a0, a0, a2 + li a1, 1968 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a2, 1808 - mul a0, a0, a2 + li a1, 1808 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - li a2, 1856 - mul a0, a0, a2 + li a1, 1856 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1256 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1160 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1320 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1256 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -2000 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -2000 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1952 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1952 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1880 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1880 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1808 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1808 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1760 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1760 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1696 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1696 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1624 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1624 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - li a2, 5 - slli a2, a2, 9 - mul a0, a0, a2 + li a1, 5 + slli a1, a1, 9 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1464 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1464 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1416 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1416 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1376 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1376 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 904 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 904 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1216 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1216 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a2, 19 - slli a2, a2, 7 - mul a0, a0, a2 + li a1, 19 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1600 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1600 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1320 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1256 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1168 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1120 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -920 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -920 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -848 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -848 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - li a2, 13 - slli a2, a2, 8 - mul a0, a0, a2 + li a1, 13 + slli a1, a1, 8 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -240 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -240 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1072 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1072 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -656 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -656 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1232 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1232 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1040 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1040 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -496 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -496 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -376 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -376 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -264 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -264 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -192 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -192 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -112 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -112 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -56 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -56 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 8 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 8 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1168 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1120 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1248 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1264 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 96 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 96 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 152 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 152 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 208 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 208 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 264 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 264 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 952 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 952 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 376 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 376 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - li a2, 29 - slli a2, a2, 7 - mul a0, a0, a2 + li a1, 29 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -272 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -272 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 480 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 480 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 520 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 520 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 568 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 568 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 600 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 600 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 648 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 648 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1032 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1032 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - li a2, 2000 - mul a0, a0, a2 + li a1, 2000 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1248 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1264 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1160 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1152 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb - li a2, 1848 - mul a0, a0, a2 + li a1, 1848 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -2024 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -2024 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1968 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1968 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1896 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1896 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1832 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1832 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1784 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1784 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1720 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1720 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1648 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1648 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1584 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1584 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1512 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1512 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1440 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1440 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1384 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1384 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1288 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1288 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 912 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 912 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1048 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1048 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1160 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1152 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1128 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1248 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1608 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1608 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -944 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -944 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -880 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -880 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -816 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -816 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -752 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -752 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -200 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -200 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1080 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1080 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -616 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -616 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1208 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1208 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1016 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1016 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -440 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -440 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -312 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -312 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -216 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -216 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -144 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -144 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -72 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -72 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1128 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1248 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1240 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1336 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb slli a0, a0, 12 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 48 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 48 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 120 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 120 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 192 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 192 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - li a2, 17 - slli a2, a2, 8 - mul a0, a0, a2 + li a1, 17 + slli a1, a1, 8 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 320 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 320 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1104 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1104 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 424 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 424 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -320 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -320 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -224 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -224 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 504 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 504 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 552 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 552 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 592 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 592 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 624 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 624 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 664 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 664 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1240 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1336 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1216 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1312 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb - li a2, 1528 - mul a0, a0, a2 + li a1, 1528 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - li a2, 1536 - mul a0, a0, a2 + li a1, 1536 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - li a2, 1544 - mul a0, a0, a2 + li a1, 1544 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - li a2, 1552 - mul a0, a0, a2 + li a1, 1552 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - li a2, 1560 - mul a0, a0, a2 + li a1, 1560 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - li a2, 1568 - mul a0, a0, a2 + li a1, 1568 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - li a2, 1576 - mul a0, a0, a2 + li a1, 1576 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - li a2, 1584 - mul a0, a0, a2 + li a1, 1584 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - li a2, 1600 - mul a0, a0, a2 + li a1, 1600 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - li a2, 1624 - mul a0, a0, a2 + li a1, 1624 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - li a2, 1640 - mul a0, a0, a2 + li a1, 1640 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - li a2, 1656 - mul a0, a0, a2 + li a1, 1656 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - li a2, 1672 - mul a0, a0, a2 + li a1, 1672 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - li a2, 1696 - mul a0, a0, a2 + li a1, 1696 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - li a2, 1728 - mul a0, a0, a2 + li a1, 1728 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1216 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1312 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1312 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1352 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -704 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -704 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -856 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -856 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -776 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -776 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -600 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -600 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -536 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -536 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -448 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -448 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -328 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -328 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 168 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 168 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 960 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 960 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -120 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -120 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -392 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -392 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -280 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -280 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 24 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 24 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 88 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 88 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 144 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 144 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1312 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1352 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1232 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1240 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 240 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 240 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 288 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 288 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 352 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 352 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 416 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 416 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 456 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 456 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 496 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 496 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 544 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 544 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 576 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 576 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 976 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 976 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 640 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 640 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 344 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 344 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 408 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 408 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 680 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 680 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 696 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 696 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 712 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 712 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1232 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1240 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1120 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1328 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 720 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 720 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 944 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 944 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -344 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -344 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -464 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -464 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -352 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -352 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -152 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -152 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -80 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -80 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -24 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -24 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 32 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 32 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 104 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 104 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 160 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 160 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 232 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 232 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 280 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 280 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 336 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 336 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 400 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 400 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 15 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1120 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1328 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1152 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1320 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 464 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 464 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 968 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 968 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 536 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 536 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 312 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 312 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 368 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 368 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 616 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 616 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 656 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 656 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 672 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 672 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 688 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 688 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 704 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 704 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload vslideup.vi v16, v8, 10 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1152 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1320 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill ld a0, 160(sp) # 8-byte Folded Reload addi a0, a0, 200 sd a0, 152(sp) # 8-byte Folded Spill - li t6, 19 + li t3, 19 li s2, 1 slli s2, s2, 11 li s3, 17 @@ -179516,2799 +179327,2799 @@ fsd fa5, 168(sp) # 8-byte Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -744 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -744 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 960 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1112 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1000 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1000 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -840 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -840 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -824 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -824 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -800 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -800 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -784 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -784 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - li a2, 13 - slli a2, a2, 8 - mul a0, a0, a2 + li a1, 13 + slli a1, a1, 8 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -976 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -976 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -968 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -968 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -856 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -856 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -848 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -848 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1008 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1008 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -992 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -992 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -984 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -984 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1032 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1032 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - li a2, 3 - slli a2, a2, 10 - mul a0, a0, a2 + li a1, 3 + slli a1, a1, 10 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1112 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1104 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill li t4, 11 slli t4, t4, 8 # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1080 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1080 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1072 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1072 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1064 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1064 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1056 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1056 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1048 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1048 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1040 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1040 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1016 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1016 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1000 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1000 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 896 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 904 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 904 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 912 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 912 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 920 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 920 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 928 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -832 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -832 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -816 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -816 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1008 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1008 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -960 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -960 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -952 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -952 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -944 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -944 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -936 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -936 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -928 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -928 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -920 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -920 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -912 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -912 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -720 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -720 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -280 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -280 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -312 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -312 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -288 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -288 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -272 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -272 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -264 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -264 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - li a2, 15 - slli a2, a2, 8 - mul a0, a0, a2 + li a1, 15 + slli a1, a1, 8 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -248 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -248 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1040 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1040 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -600 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -600 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 928 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 936 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -904 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -904 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - li a2, 25 - slli a2, a2, 7 - mul a0, a0, a2 + li a1, 25 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -888 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -888 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -880 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -880 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -872 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -872 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -688 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -688 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -680 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -680 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -672 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -672 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -664 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -664 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -656 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -656 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - li a2, 27 - slli a2, a2, 7 - mul a0, a0, a2 + li a1, 27 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -624 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -624 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -608 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -608 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1016 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1016 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -864 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -864 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -464 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -464 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -496 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -496 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -480 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -480 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -456 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -456 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -448 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -448 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -440 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -440 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -96 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -96 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -80 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -80 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -112 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -112 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 944 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 952 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -592 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -592 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -576 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -576 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -560 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -560 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -544 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -544 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - li a2, 5 - slli a2, a2, 10 - mul a0, a0, a2 + li a1, 5 + slli a1, a1, 10 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -808 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -808 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -792 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -792 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -776 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -776 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -760 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -760 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -752 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -752 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -736 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -736 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -728 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -728 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -504 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -504 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -488 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -488 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -472 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -472 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 88 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 88 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 40 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 40 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 64 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 64 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 96 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 96 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 112 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 112 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1056 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1064 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -328 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -328 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -304 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -304 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -344 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -344 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 936 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 944 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -712 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -712 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -704 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -704 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -696 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -696 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -424 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -424 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -416 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -416 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -408 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -408 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -400 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -400 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -392 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -392 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - li a2, 29 - slli a2, a2, 7 - mul a0, a0, a2 + li a1, 29 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -376 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -376 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -368 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -368 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1032 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1032 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -648 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -648 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -632 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -632 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -616 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -616 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -152 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -152 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -184 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -184 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -168 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -168 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -136 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 200 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 192 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 224 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 216 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 240 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 232 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - li a2, 17 - slli a2, a2, 8 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 248 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 216 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 208 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 968 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 968 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -240 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -240 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -232 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -232 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1048 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1048 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -584 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -584 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -568 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -568 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -552 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -552 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -536 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -536 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -528 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -528 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -520 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -520 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - li a2, 7 - slli a2, a2, 9 - mul a0, a0, a2 + li a1, 7 + slli a1, a1, 9 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -144 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -144 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - li a2, 31 - slli a2, a2, 7 - mul a0, a0, a2 + li a1, 31 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -120 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -120 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -104 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -104 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -88 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -88 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 408 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 400 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 376 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 368 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 392 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 384 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1072 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1080 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -48 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -48 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -24 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -24 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb slli a0, a0, 12 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 32 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 32 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -16 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -16 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 952 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 960 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -432 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -432 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -72 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -72 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -64 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -64 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -56 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -56 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -40 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -40 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -8 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -8 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 16 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 16 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 48 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 48 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 72 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 72 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 160 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1056 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -360 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -360 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -352 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -352 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -336 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -336 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -320 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -320 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -296 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -296 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 176 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 168 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 144 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 144 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 432 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 432 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 440 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 440 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 448 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 448 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 464 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 464 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 472 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 472 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 488 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 488 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 456 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 456 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 520 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 520 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1064 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1072 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -224 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -224 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -216 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -216 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -208 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -208 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -200 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -200 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -192 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -192 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -176 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -176 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -160 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -160 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 208 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 200 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 232 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 224 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 248 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 240 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 264 - mul a0, a0, a2 + li a1, 17 + slli a1, a1, 8 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 272 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 264 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 280 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 272 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 288 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 280 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 632 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 632 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1096 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1088 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 296 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 288 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 304 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 296 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 312 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 304 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 328 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 320 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 344 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 336 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 360 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 352 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 320 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 312 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 984 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 984 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 336 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 328 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 352 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 344 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 368 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 360 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 384 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 376 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 400 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 392 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 416 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 408 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 424 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 416 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1080 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 424 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -32 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -32 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 8 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 8 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 24 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 24 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 56 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 56 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 80 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 80 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 104 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 104 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 120 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 120 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 760 - mul a0, a0, a2 + li a1, 19 + slli a1, a1, 8 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 736 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 744 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 744 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 752 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - li a2, 19 - slli a2, a2, 8 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 776 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 776 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 784 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 784 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 792 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 792 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 800 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 800 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 808 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1104 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1096 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 976 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 976 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 128 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 128 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 136 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 152 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 152 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 168 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 160 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 184 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 176 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 192 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 184 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 480 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 480 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 496 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 496 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 504 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 504 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 528 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 528 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 536 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 536 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 552 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 552 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 568 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 568 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 592 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 592 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1088 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 672 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 576 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 576 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 544 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 544 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 560 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 560 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 584 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 584 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 600 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 600 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 608 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 608 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 616 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 616 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 816 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 824 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 808 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 816 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 992 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 992 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 624 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 624 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 640 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 640 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 648 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 648 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 656 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 656 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 664 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 664 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - li a2, 9 - slli a2, a2, 9 - mul a0, a0, a2 + li a1, 9 + slli a1, a1, 9 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 672 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 680 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 680 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 688 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 688 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 696 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 696 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 704 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 704 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 712 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 712 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 720 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 720 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 728 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 728 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 736 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 752 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 760 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 840 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 848 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 824 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 832 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 832 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 840 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 848 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 856 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 856 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 864 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 872 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 880 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 888 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 896 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 880 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 888 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill # implicit-def: $v8 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 864 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 872 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill fld ft1, 168(sp) # 8-byte Folded Reload .LBB17_1: # %for.cond2.preheader # =>This Loop Header: Depth=1 # Child Loop BB17_2 Depth 2 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 888 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 896 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 888 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 896 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - sd a1, 176(sp) # 8-byte Folded Spill - mul a5, a1, t6 + sd a5, 176(sp) # 8-byte Folded Spill + mul a5, a5, t3 andi t1, a5, 255 slli t1, t1, 3 lui a0, 29 addiw a0, a0, 384 - add a1, sp, a0 - add t1, a1, t1 + add t6, sp, a0 + add t1, t6, t1 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1128 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) + vse64.v v8, (t6) vmv8r.v v24, v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1120 + addiw a1, a1, -1192 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -182317,11 +182128,11 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 29 addiw a0, a0, 512 - add a1, sp, a0 - vse64.v v8, (a1) + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1088 + addiw a1, a1, -1104 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -182330,11 +182141,11 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 29 addiw a0, a0, 640 - add a1, sp, a0 - vse64.v v8, (a1) + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1176 + addiw a1, a1, -1088 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -182343,12 +182154,11 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 29 addiw a0, a0, 768 - add a1, sp, a0 - vse64.v v8, (a1) - vmv8r.v v0, v8 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1168 + addiw a1, a1, -1144 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -182357,11 +182167,11 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 29 addiw a0, a0, 896 - add a1, sp, a0 - vse64.v v8, (a1) + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1096 + addiw a1, a1, -1120 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -182370,11 +182180,11 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 29 addiw a0, a0, 1024 - add a1, sp, a0 - vse64.v v8, (a1) + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1136 + addiw a1, a1, -1112 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -182383,11 +182193,11 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 29 addiw a0, a0, 1152 - add a1, sp, a0 - vse64.v v8, (a1) + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1184 + li a1, 23 + slli a1, a1, 7 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -182396,11 +182206,11 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 29 addiw a0, a0, 1280 - add a1, sp, a0 - vse64.v v8, (a1) + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1112 + addiw a1, a1, -1160 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -182409,11 +182219,11 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 29 addiw a0, a0, 1408 - add a1, sp, a0 - vse64.v v8, (a1) + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - li a1, 23 - slli a1, a1, 7 + lui a1, 1 + addiw a1, a1, -1176 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -182422,11 +182232,12 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 29 addiw a0, a0, 1536 - add a1, sp, a0 - vse64.v v8, (a1) + add t6, sp, a0 + vse64.v v8, (t6) + vmv8r.v v0, v8 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1160 + addiw a1, a1, -1128 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -182435,11 +182246,11 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 29 addiw a0, a0, 1664 - add a1, sp, a0 - vse64.v v8, (a1) + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1104 + addiw a1, a1, -1096 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -182448,11 +182259,11 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 29 addiw a0, a0, 1792 - add a1, sp, a0 - vse64.v v8, (a1) + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1144 + addiw a1, a1, -1168 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -182462,11 +182273,11 @@ vmv1r.v v16, v8 lui a0, 30 addiw a0, a0, -2048 - add a1, sp, a0 - vse64.v v16, (a1) + add t6, sp, a0 + vse64.v v16, (t6) csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1192 + addiw a1, a1, -1184 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -182475,8 +182286,8 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 29 addiw a0, a0, 1920 - add a1, sp, a0 - vse64.v v8, (a1) + add t6, sp, a0 + vse64.v v8, (t6) fld fa5, 0(t1) fsd fa5, 240(sp) # 8-byte Folded Spill addi t1, a5, 1 @@ -182484,329 +182295,329 @@ slli t1, t1, 3 lui a0, 29 addiw a0, a0, -1664 - add a1, sp, a0 - add t1, a1, t1 - vse64.v v24, (a1) + add t6, sp, a0 + add t1, t6, t1 + vse64.v v24, (t6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1192 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 29 addiw a0, a0, -1536 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v24, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1120 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1104 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 29 addiw a0, a0, -1408 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1088 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1088 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 29 addiw a0, a0, -1280 - add a1, sp, a0 - vse64.v v0, (a1) + add t6, sp, a0 + vse64.v v8, (t6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1144 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 29 addiw a0, a0, -1152 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1168 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1120 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 29 addiw a0, a0, -1024 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1096 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1112 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 29 addiw a0, a0, -896 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1136 - mul a0, a0, a2 + li a1, 23 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (a1) lui a0, 29 addiw a0, a0, -768 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v16, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1184 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1160 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 29 addiw a0, a0, -640 - add a1, sp, a0 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1112 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) + add t6, sp, a0 + vse64.v v8, (t6) lui a0, 29 addiw a0, a0, -512 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v0, (t6) csrr a0, vlenb - li a2, 23 - slli a2, a2, 7 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1128 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) lui a0, 29 addiw a0, a0, -384 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v0, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1160 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1096 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 29 addiw a0, a0, -256 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1104 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1168 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 29 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1144 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1184 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 29 addiw a0, a0, -128 - add a1, sp, a0 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1192 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) + add t6, sp, a0 + vse64.v v8, (t6) fld fa5, 0(t1) - fsd fa5, 224(sp) # 8-byte Folded Spill + fsd fa5, 232(sp) # 8-byte Folded Spill addi t1, a5, 2 andi t1, t1, 255 slli t1, t1, 3 lui a0, 28 addiw a0, a0, 384 - add a1, sp, a0 - add t1, a1, t1 + add t6, sp, a0 + add t1, t6, t1 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1128 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vse64.v v8, (t6) lui a0, 28 addiw a0, a0, 512 - add a1, sp, a0 - vse64.v v24, (a1) + add t6, sp, a0 + vse64.v v24, (t6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1104 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 28 addiw a0, a0, 640 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1088 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1088 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 28 addiw a0, a0, 768 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1176 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1144 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 28 addiw a0, a0, 896 - add a1, sp, a0 - vse64.v v8, (a1) + add t6, sp, a0 + vse64.v v8, (t6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1120 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 28 addiw a0, a0, 1024 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v24, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1096 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1112 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 28 addiw a0, a0, 1152 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) + lui a0, 28 + addiw a0, a0, 1280 + add t6, sp, a0 + vse64.v v16, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1136 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1160 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) - lui a0, 28 - addiw a0, a0, 1280 - add a1, sp, a0 - vse64.v v16, (a1) lui a0, 28 addiw a0, a0, 1408 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1112 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1176 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 28 addiw a0, a0, 1536 - add a1, sp, a0 - csrr a0, vlenb - li a2, 23 - slli a2, a2, 7 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) + add t6, sp, a0 + vse64.v v8, (t6) lui a0, 28 addiw a0, a0, 1664 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v0, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1160 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1096 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 28 addiw a0, a0, 1792 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1104 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1168 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 29 addiw a0, a0, -2048 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1144 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1184 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 28 addiw a0, a0, 1920 - add a1, sp, a0 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1192 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) + add t6, sp, a0 + vse64.v v8, (t6) fld fa5, 0(t1) fsd fa5, 216(sp) # 8-byte Folded Spill addi t1, a5, 3 @@ -182814,177 +182625,177 @@ slli t1, t1, 3 lui a0, 28 addiw a0, a0, -1664 - add a1, sp, a0 - add t1, a1, t1 + add t6, sp, a0 + add t1, t6, t1 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1128 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) + vse64.v v8, (t6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1192 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 28 addiw a0, a0, -1536 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v0, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1120 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1104 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 28 addiw a0, a0, -1408 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1088 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1088 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 28 addiw a0, a0, -1280 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1176 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1144 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 28 addiw a0, a0, -1152 - add a1, sp, a0 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1168 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (a1) + add t6, sp, a0 + vse64.v v8, (t6) lui a0, 28 addiw a0, a0, -1024 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v24, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1096 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1112 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (a1) lui a0, 28 addiw a0, a0, -896 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v16, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1136 - mul a0, a0, a2 + li a1, 23 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 28 addiw a0, a0, -768 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1184 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1160 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 28 addiw a0, a0, -640 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v24, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1112 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1176 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 28 addiw a0, a0, -512 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - li a2, 23 - slli a2, a2, 7 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1128 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 28 addiw a0, a0, -384 - add a1, sp, a0 - vse64.v v24, (a1) + add t6, sp, a0 + vse64.v v8, (t6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1096 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 28 addiw a0, a0, -256 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1104 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1168 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 28 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1144 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1184 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 28 addiw a0, a0, -128 - add a1, sp, a0 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1192 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + add t6, sp, a0 + vse64.v v8, (t6) fld fa5, 0(t1) fsd fa5, 208(sp) # 8-byte Folded Spill addi t1, a5, 4 @@ -182992,160 +182803,160 @@ slli t1, t1, 3 lui a0, 27 addiw a0, a0, 384 - add a1, sp, a0 - add t1, a1, t1 + add t6, sp, a0 + add t1, t6, t1 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1128 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vse64.v v8, (t6) lui a0, 27 addiw a0, a0, 512 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v0, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1120 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1104 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 27 addiw a0, a0, 640 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1088 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1088 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 27 addiw a0, a0, 768 - add a1, sp, a0 - vse64.v v8, (a1) - lui a0, 27 - addiw a0, a0, 896 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1168 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1144 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 27 - addiw a0, a0, 1024 - add a1, sp, a0 + addiw a0, a0, 896 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1096 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1120 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 27 - addiw a0, a0, 1152 - add a1, sp, a0 - vse64.v v16, (a1) + addiw a0, a0, 1024 + add t6, sp, a0 + vse64.v v0, (t6) lui a0, 27 - addiw a0, a0, 1280 - add a1, sp, a0 + addiw a0, a0, 1152 + add t6, sp, a0 + vse64.v v16, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1184 - mul a0, a0, a2 + li a1, 23 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload + lui a0, 27 + addiw a0, a0, 1280 + add t6, sp, a0 + vse64.v v16, (t6) lui a0, 27 addiw a0, a0, 1408 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v24, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1112 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1176 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 27 addiw a0, a0, 1536 - add a1, sp, a0 - vse64.v v0, (a1) + add t6, sp, a0 + vse64.v v24, (t6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1128 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 27 addiw a0, a0, 1664 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v24, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1160 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1096 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 27 addiw a0, a0, 1792 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v24, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1104 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1168 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 28 addiw a0, a0, -2048 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v0, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1144 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1184 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 27 addiw a0, a0, 1920 - add a1, sp, a0 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1192 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) + add t6, sp, a0 + vse64.v v0, (t6) fld fa5, 0(t1) fsd fa5, 200(sp) # 8-byte Folded Spill addi t1, a5, 5 @@ -183153,2147 +182964,2146 @@ slli t1, t1, 3 lui a0, 27 addiw a0, a0, -1664 - add a1, sp, a0 - add t1, a1, t1 + add t6, sp, a0 + add t1, t6, t1 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1128 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload + vse64.v v24, (t6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1192 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 27 addiw a0, a0, -1536 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v24, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1120 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1104 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 27 addiw a0, a0, -1408 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v24, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1088 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1088 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 27 addiw a0, a0, -1280 - add a1, sp, a0 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1176 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) + add t6, sp, a0 + vse64.v v24, (t6) lui a0, 27 addiw a0, a0, -1152 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1168 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1120 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 27 addiw a0, a0, -1024 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1096 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1112 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 27 addiw a0, a0, -896 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) + lui a0, 27 + addiw a0, a0, -768 + add t6, sp, a0 + vse64.v v16, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1136 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1160 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) - lui a0, 27 - addiw a0, a0, -768 - add a1, sp, a0 - vse64.v v24, (a1) lui a0, 27 addiw a0, a0, -640 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1112 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1176 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 27 addiw a0, a0, -512 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v16, (t6) csrr a0, vlenb - li a2, 23 - slli a2, a2, 7 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1128 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 27 addiw a0, a0, -384 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1160 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1096 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 27 addiw a0, a0, -256 - add a1, sp, a0 - vse64.v v16, (a1) - lui a0, 27 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1144 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1168 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 27 + add t6, sp, a0 + vse64.v v24, (t6) addiw a0, a0, -128 - add a1, sp, a0 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1192 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (a1) + add t6, sp, a0 + vse64.v v0, (t6) fld fa5, 0(t1) - fsd fa5, 184(sp) # 8-byte Folded Spill + fsd fa5, 192(sp) # 8-byte Folded Spill addi t1, a5, 6 andi t1, t1, 255 slli t1, t1, 3 lui a0, 26 addiw a0, a0, 384 - add a1, sp, a0 - add t1, a1, t1 + add t6, sp, a0 + add t1, t6, t1 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1128 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vse64.v v8, (t6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1192 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 26 addiw a0, a0, 512 - add a1, sp, a0 - vse64.v v0, (a1) + add t6, sp, a0 + vse64.v v8, (t6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1104 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 26 addiw a0, a0, 640 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v0, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1088 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1088 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 26 addiw a0, a0, 768 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1176 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1144 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 26 addiw a0, a0, 896 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1168 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1120 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 26 addiw a0, a0, 1024 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1096 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1112 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 26 addiw a0, a0, 1152 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1136 - mul a0, a0, a2 + li a1, 23 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 26 addiw a0, a0, 1280 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1184 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1160 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 26 addiw a0, a0, 1408 - add a1, sp, a0 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1112 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) + add t6, sp, a0 + vse64.v v8, (t6) lui a0, 26 addiw a0, a0, 1536 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v16, (t6) csrr a0, vlenb - li a2, 23 - slli a2, a2, 7 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1128 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 26 addiw a0, a0, 1664 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1160 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1096 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 26 addiw a0, a0, 1792 - add a1, sp, a0 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1104 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) + add t6, sp, a0 + vse64.v v8, (t6) lui a0, 27 addiw a0, a0, -2048 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v24, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1144 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1184 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 26 addiw a0, a0, 1920 - add a1, sp, a0 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1192 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) + add t6, sp, a0 + vse64.v v8, (t6) fld fa5, 0(t1) - fsd fa5, 192(sp) # 8-byte Folded Spill + fsd fa5, 184(sp) # 8-byte Folded Spill addi t1, a5, 7 andi t1, t1, 255 slli t1, t1, 3 lui a0, 26 addiw a0, a0, -1664 - add a1, sp, a0 - add t1, a1, t1 - vse64.v v24, (a1) - lui a0, 26 - addiw a0, a0, -1536 - add a1, sp, a0 + add t6, sp, a0 + add t1, t6, t1 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1120 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vse64.v v16, (t6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1192 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload + lui a0, 26 + addiw a0, a0, -1536 + add t6, sp, a0 + vse64.v v16, (t6) lui a0, 26 addiw a0, a0, -1408 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v0, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1088 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1088 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 26 addiw a0, a0, -1280 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v16, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1176 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1144 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 26 addiw a0, a0, -1152 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v16, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1168 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1120 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 26 addiw a0, a0, -1024 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v16, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1096 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1112 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 26 addiw a0, a0, -896 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v0, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1136 - mul a0, a0, a2 + li a1, 23 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 26 addiw a0, a0, -768 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v0, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1184 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1160 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 26 addiw a0, a0, -640 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v16, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1112 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1176 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 26 addiw a0, a0, -512 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v16, (t6) csrr a0, vlenb - li a2, 23 - slli a2, a2, 7 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1128 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 26 addiw a0, a0, -384 - add a1, sp, a0 - vse64.v v16, (a1) - lui a0, 26 - addiw a0, a0, -256 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v16, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1104 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1096 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 26 - add a1, sp, a0 - vse64.v v0, (a1) + addiw a0, a0, -256 + add t6, sp, a0 + vse64.v v16, (t6) + lui a0, 26 + add t6, sp, a0 + vse64.v v24, (t6) addiw a0, a0, -128 - add a1, sp, a0 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1192 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) + add t6, sp, a0 + vse64.v v8, (t6) fld fa5, 0(t1) - fsd fa5, 232(sp) # 8-byte Folded Spill + fsd fa5, 224(sp) # 8-byte Folded Spill addi t1, a5, 8 andi t1, t1, 255 slli t1, t1, 3 lui a0, 25 addiw a0, a0, 384 - add a1, sp, a0 - add t1, a1, t1 + add t6, sp, a0 + add t1, t6, t1 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1128 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload + vse64.v v24, (t6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1192 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 25 addiw a0, a0, 512 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v0, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1120 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1104 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 25 addiw a0, a0, 640 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1088 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1088 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 25 addiw a0, a0, 768 - add a1, sp, a0 - vse64.v v24, (a1) + add t6, sp, a0 + vse64.v v8, (t6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1144 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 25 addiw a0, a0, 896 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1168 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1120 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 25 addiw a0, a0, 1024 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1096 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1112 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 25 addiw a0, a0, 1152 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1136 - mul a0, a0, a2 + li a1, 23 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (a1) lui a0, 25 addiw a0, a0, 1280 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v16, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1184 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1160 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 25 addiw a0, a0, 1408 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1112 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1176 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 25 addiw a0, a0, 1536 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - li a2, 23 - slli a2, a2, 7 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1128 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 25 addiw a0, a0, 1664 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v16, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1160 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1096 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 25 addiw a0, a0, 1792 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v16, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1104 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1168 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 26 addiw a0, a0, -2048 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v16, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1144 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1184 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 25 addiw a0, a0, 1920 - add a1, sp, a0 - vse64.v v0, (a1) + add t6, sp, a0 + vse64.v v16, (t6) fld ft3, 0(t1) addi t1, a5, 9 andi t1, t1, 255 slli t1, t1, 3 lui a0, 25 addiw a0, a0, -1664 - add a1, sp, a0 - add t1, a1, t1 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1128 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + add t6, sp, a0 + add t1, t6, t1 + vse64.v v24, (t6) lui a0, 25 addiw a0, a0, -1536 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v0, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1120 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1104 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 25 addiw a0, a0, -1408 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v16, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1088 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1088 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 25 addiw a0, a0, -1280 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v16, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1176 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1144 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 25 addiw a0, a0, -1152 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v24, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1168 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1120 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) lui a0, 25 addiw a0, a0, -1024 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v0, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1096 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1112 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 25 addiw a0, a0, -896 - add a1, sp, a0 - vse64.v v16, (a1) - lui a0, 25 - addiw a0, a0, -768 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v16, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1184 - mul a0, a0, a2 + li a1, 23 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 25 - addiw a0, a0, -640 - add a1, sp, a0 + addiw a0, a0, -768 + add t6, sp, a0 + vse64.v v16, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1112 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1160 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (a1) + lui a0, 25 + addiw a0, a0, -640 + add t6, sp, a0 + vse64.v v16, (t6) lui a0, 25 addiw a0, a0, -512 - add a1, sp, a0 - vse64.v v8, (a1) + add t6, sp, a0 + vse64.v v8, (t6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1128 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 25 addiw a0, a0, -384 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1160 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1096 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 25 addiw a0, a0, -256 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1104 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1168 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 25 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1144 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1184 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 25 addiw a0, a0, -128 - add a1, sp, a0 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1192 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) + add t6, sp, a0 + vse64.v v8, (t6) fld ft4, 0(t1) addi t1, a5, 10 andi t1, t1, 255 slli t1, t1, 3 lui a0, 24 addiw a0, a0, 384 - add a1, sp, a0 - add t1, a1, t1 - vse64.v v24, (a1) + add t6, sp, a0 + add t1, t6, t1 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1136 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vse64.v v8, (t6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1192 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 24 addiw a0, a0, 512 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1120 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1104 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 24 addiw a0, a0, 640 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v16, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1088 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1088 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 24 addiw a0, a0, 768 - add a1, sp, a0 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1176 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + add t6, sp, a0 + vse64.v v16, (t6) lui a0, 24 addiw a0, a0, 896 - add a1, sp, a0 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1168 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + add t6, sp, a0 + vse64.v v24, (t6) lui a0, 24 addiw a0, a0, 1024 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v0, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1096 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1112 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) lui a0, 24 addiw a0, a0, 1152 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v24, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1136 - mul a0, a0, a2 + li a1, 23 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 24 addiw a0, a0, 1280 - add a1, sp, a0 - vse64.v v0, (a1) + add t6, sp, a0 + vse64.v v16, (t6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1160 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 24 addiw a0, a0, 1408 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v16, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1112 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1176 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 24 addiw a0, a0, 1536 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v0, (t6) csrr a0, vlenb - li a2, 23 - slli a2, a2, 7 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1128 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 24 addiw a0, a0, 1664 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v0, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1160 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1096 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) lui a0, 24 addiw a0, a0, 1792 - add a1, sp, a0 - vse64.v v16, (a1) + add t6, sp, a0 + vse64.v v0, (t6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1168 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 25 addiw a0, a0, -2048 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v0, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1144 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1184 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 24 addiw a0, a0, 1920 - add a1, sp, a0 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1192 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + add t6, sp, a0 + vse64.v v0, (t6) fld ft5, 0(t1) addi t1, a5, 11 andi t1, t1, 255 slli t1, t1, 3 lui a0, 24 addiw a0, a0, -1664 - add a1, sp, a0 - add t1, a1, t1 + add t6, sp, a0 + add t1, t6, t1 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1128 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vse64.v v0, (t6) lui a0, 24 addiw a0, a0, -1536 - add a1, sp, a0 - vse64.v v8, (a1) + add t6, sp, a0 + vse64.v v8, (t6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1104 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 24 addiw a0, a0, -1408 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1088 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1088 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 24 addiw a0, a0, -1280 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1176 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1144 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 24 addiw a0, a0, -1152 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1168 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1120 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 24 addiw a0, a0, -1024 - add a1, sp, a0 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1096 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) + add t6, sp, a0 + vse64.v v8, (t6) lui a0, 24 addiw a0, a0, -896 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v24, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1136 - mul a0, a0, a2 + li a1, 23 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 24 addiw a0, a0, -768 - add a1, sp, a0 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1184 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) + add t6, sp, a0 + vse64.v v8, (t6) lui a0, 24 addiw a0, a0, -640 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v16, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1112 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1176 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 24 addiw a0, a0, -512 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v24, (t6) csrr a0, vlenb - li a2, 23 - slli a2, a2, 7 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1128 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 24 addiw a0, a0, -384 - add a1, sp, a0 - vse64.v v0, (a1) + add t6, sp, a0 + vse64.v v16, (t6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1096 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 24 addiw a0, a0, -256 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1104 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1168 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 24 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1144 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1184 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 24 addiw a0, a0, -128 - add a1, sp, a0 - vse64.v v24, (a1) + add t6, sp, a0 + vse64.v v8, (t6) fld ft6, 0(t1) addi t1, a5, 12 andi t1, t1, 255 slli t1, t1, 3 lui a0, 23 addiw a0, a0, 384 - add a1, sp, a0 - add t1, a1, t1 + add t6, sp, a0 + add t1, t6, t1 + vse64.v v0, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1128 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1192 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 23 addiw a0, a0, 512 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v0, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1120 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1104 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 23 addiw a0, a0, 640 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1088 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1088 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 23 addiw a0, a0, 768 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1176 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1144 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 23 addiw a0, a0, 896 - add a1, sp, a0 - vse64.v v16, (a1) + add t6, sp, a0 + vse64.v v8, (t6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1120 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 23 addiw a0, a0, 1024 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1096 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1112 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 23 addiw a0, a0, 1152 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1136 - mul a0, a0, a2 + li a1, 23 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 23 addiw a0, a0, 1280 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1184 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1160 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 23 addiw a0, a0, 1408 - add a1, sp, a0 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1112 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) + add t6, sp, a0 + vse64.v v8, (t6) lui a0, 23 addiw a0, a0, 1536 - add a1, sp, a0 - csrr a0, vlenb - li a2, 23 - slli a2, a2, 7 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) + add t6, sp, a0 + vse64.v v24, (t6) lui a0, 23 addiw a0, a0, 1664 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v16, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1160 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1096 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 23 addiw a0, a0, 1792 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1104 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1168 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 24 addiw a0, a0, -2048 - add a1, sp, a0 - vse64.v v8, (a1) - lui a0, 23 - addiw a0, a0, 1920 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1192 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1184 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) + lui a0, 23 + addiw a0, a0, 1920 + add t6, sp, a0 + vse64.v v8, (t6) fld ft7, 0(t1) addi t1, a5, 13 andi t1, t1, 255 slli t1, t1, 3 lui a0, 23 addiw a0, a0, -1664 - add a1, sp, a0 - add t1, a1, t1 + add t6, sp, a0 + add t1, t6, t1 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1128 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vse64.v v16, (t6) lui a0, 23 addiw a0, a0, -1536 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v0, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1120 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1104 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 23 addiw a0, a0, -1408 - add a1, sp, a0 - vse64.v v24, (a1) + add t6, sp, a0 + vse64.v v16, (t6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1088 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 23 addiw a0, a0, -1280 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v16, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1176 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1144 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 23 addiw a0, a0, -1152 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v0, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1168 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1120 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 23 addiw a0, a0, -1024 - add a1, sp, a0 - vse64.v v16, (a1) + add t6, sp, a0 + vse64.v v16, (t6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1112 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 23 addiw a0, a0, -896 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v16, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1136 - mul a0, a0, a2 + li a1, 23 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 23 addiw a0, a0, -768 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v16, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1184 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1160 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (a1) lui a0, 23 addiw a0, a0, -640 - add a1, sp, a0 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1112 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) + add t6, sp, a0 + vse64.v v16, (t6) lui a0, 23 addiw a0, a0, -512 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v24, (t6) csrr a0, vlenb - li a2, 23 - slli a2, a2, 7 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1128 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 23 addiw a0, a0, -384 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v24, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1160 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1096 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 23 addiw a0, a0, -256 - add a1, sp, a0 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1104 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (a1) - lui a0, 23 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v24, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1144 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1168 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 23 + add t6, sp, a0 + vse64.v v24, (t6) addiw a0, a0, -128 - add a1, sp, a0 - vse64.v v8, (a1) + add t6, sp, a0 + vse64.v v8, (t6) fld fa6, 0(t1) addi t1, a5, 14 andi t1, t1, 255 slli t1, t1, 3 lui a0, 22 addiw a0, a0, 384 - add a1, sp, a0 - add t1, a1, t1 + add t6, sp, a0 + add t1, t6, t1 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1128 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vse64.v v8, (t6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1192 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 22 addiw a0, a0, 512 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1120 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1104 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 22 addiw a0, a0, 640 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1088 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1088 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 22 addiw a0, a0, 768 - add a1, sp, a0 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1176 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) + add t6, sp, a0 + vse64.v v8, (t6) lui a0, 22 addiw a0, a0, 896 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v0, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1168 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1120 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 22 addiw a0, a0, 1024 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1096 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1112 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 22 addiw a0, a0, 1152 - add a1, sp, a0 - vse64.v v24, (a1) + add t6, sp, a0 + vse64.v v8, (t6) + csrr a0, vlenb + li a1, 23 + slli a1, a1, 7 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 22 addiw a0, a0, 1280 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v24, (t6) + lui a0, 22 + addiw a0, a0, 1408 + add t6, sp, a0 + vse64.v v16, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1184 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1176 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) - lui a0, 22 - addiw a0, a0, 1408 - add a1, sp, a0 - vse64.v v0, (a1) lui a0, 22 addiw a0, a0, 1536 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - li a2, 23 - slli a2, a2, 7 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1128 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 22 addiw a0, a0, 1664 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1160 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1096 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 22 addiw a0, a0, 1792 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1104 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1168 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 23 addiw a0, a0, -2048 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v16, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1144 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1184 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 22 addiw a0, a0, 1920 - add a1, sp, a0 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1192 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + add t6, sp, a0 + vse64.v v8, (t6) fld fa7, 0(t1) addi t1, a5, 15 andi t1, t1, 255 slli t1, t1, 3 lui a0, 22 addiw a0, a0, -1664 - add a1, sp, a0 - add t1, a1, t1 + add t6, sp, a0 + add t1, t6, t1 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1128 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vse64.v v8, (t6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1192 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 22 addiw a0, a0, -1536 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1120 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1104 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 22 addiw a0, a0, -1408 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1088 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1088 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 22 addiw a0, a0, -1280 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v0, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1176 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1144 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 22 addiw a0, a0, -1152 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v0, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1168 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1120 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 22 addiw a0, a0, -1024 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v0, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1096 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1112 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) lui a0, 22 addiw a0, a0, -896 - add a1, sp, a0 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1136 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) + add t6, sp, a0 + vse64.v v0, (t6) lui a0, 22 addiw a0, a0, -768 - add a1, sp, a0 - vse64.v v8, (a1) + add t6, sp, a0 + vse64.v v24, (t6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1160 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 22 addiw a0, a0, -640 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v24, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1112 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1176 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 22 addiw a0, a0, -512 - add a1, sp, a0 - vse64.v v16, (a1) + add t6, sp, a0 + vse64.v v24, (t6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1128 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 22 addiw a0, a0, -384 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v24, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1160 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1096 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 22 addiw a0, a0, -256 - add a1, sp, a0 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1104 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) + add t6, sp, a0 + vse64.v v24, (t6) + vmv1r.v v0, v16 lui a0, 22 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v0, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1144 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1184 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (a1) lui a0, 22 addiw a0, a0, -128 - add a1, sp, a0 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1192 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) + add t6, sp, a0 + vse64.v v16, (t6) fld ft8, 0(t1) addi t1, a5, 16 andi t1, t1, 255 slli t1, t1, 3 lui a0, 21 addiw a0, a0, 384 - add a1, sp, a0 - add t1, a1, t1 + add t6, sp, a0 + add t1, t6, t1 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1128 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) - lui a0, 21 - addiw a0, a0, 512 - add a1, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vse64.v v16, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1120 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1192 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload + lui a0, 21 + addiw a0, a0, 512 + add t6, sp, a0 + vse64.v v16, (t6) lui a0, 21 addiw a0, a0, 640 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1088 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1088 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 21 addiw a0, a0, 768 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1176 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1144 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) lui a0, 21 addiw a0, a0, 896 - add a1, sp, a0 - vse64.v v24, (a1) + add t6, sp, a0 + vse64.v v8, (t6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1120 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 21 addiw a0, a0, 1024 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1096 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1112 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 21 addiw a0, a0, 1152 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1136 - mul a0, a0, a2 + li a1, 23 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 21 addiw a0, a0, 1280 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1184 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1160 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 21 addiw a0, a0, 1408 - add a1, sp, a0 - vse64.v v0, (a1) + add t6, sp, a0 + vse64.v v16, (t6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1176 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 21 addiw a0, a0, 1536 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v8, (t6) csrr a0, vlenb - li a2, 23 - slli a2, a2, 7 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1128 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 21 addiw a0, a0, 1664 - add a1, sp, a0 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1160 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + add t6, sp, a0 + vse64.v v8, (t6) lui a0, 21 addiw a0, a0, 1792 - add a1, sp, a0 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1104 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + add t6, sp, a0 + vse64.v v24, (t6) lui a0, 22 addiw a0, a0, -2048 - add a1, sp, a0 - vse64.v v16, (a1) - lui a0, 21 - addiw a0, a0, 1920 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v0, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1192 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1184 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a0, 21 + addiw a0, a0, 1920 + add t6, sp, a0 + vse64.v v8, (t6) fld ft9, 0(t1) addi t1, a5, 17 andi t1, t1, 255 slli t1, t1, 3 lui a0, 21 addiw a0, a0, -1664 - add a1, sp, a0 - add t1, a1, t1 + add t6, sp, a0 + add t1, t6, t1 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1128 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload + vse64.v v24, (t6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1192 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 21 addiw a0, a0, -1536 - add a1, sp, a0 + add t6, sp, a0 + vse64.v v0, (t6) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1120 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1104 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (a1) + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 21 addiw a0, a0, -1408 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -1088 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 31 - addiw a2, a2, -960 - add a1, a1, a2 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a0) + vse64.v v24, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1088 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 21 addiw a0, a0, -1280 add a0, sp, a0 - vse64.v v8, (a0) + vse64.v v24, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1144 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 21 addiw a0, a0, -1152 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -1168 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 31 - addiw a2, a2, -960 - add a1, a1, a2 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vse64.v v16, (a0) + vse64.v v24, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1120 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 21 addiw a0, a0, -1024 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -1096 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 31 - addiw a2, a2, -960 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v24, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1112 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 21 addiw a0, a0, -896 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -1136 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 31 - addiw a2, a2, -960 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v24, (a0) + csrr a0, vlenb + li a1, 23 + slli a1, a1, 7 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 21 addiw a0, a0, -768 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -1184 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 31 - addiw a2, a2, -960 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v24, (a0) lui a0, 21 addiw a0, a0, -640 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -1112 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 31 - addiw a2, a2, -960 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1176 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 21 addiw a0, a0, -512 add a0, sp, a0 - vse64.v v0, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1128 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 21 addiw a0, a0, -384 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -1160 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 31 - addiw a2, a2, -960 - add a1, a1, a2 - vl8r.v v0, (a1) # Unknown-size Folded Reload - vse64.v v0, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1096 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 21 addiw a0, a0, -256 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -1104 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 31 - addiw a2, a2, -960 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v24, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1168 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 21 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -1144 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 31 - addiw a2, a2, -960 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v24, (a0) lui a0, 21 addiw a0, a0, -128 add a0, sp, a0 - vse64.v v24, (a0) + vse64.v v8, (a0) fld ft10, 0(t1) addi a5, a5, 18 andi a5, a5, 255 @@ -185304,169 +185114,178 @@ add a5, a0, a5 csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1128 + addiw a2, a2, -1136 mul a1, a1, a2 add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a0) + vl8r.v v24, (a1) # Unknown-size Folded Reload + vse64.v v24, (a0) lui a0, 20 addiw a0, a0, 512 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -1120 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 31 - addiw a2, a2, -960 - add a1, a1, a2 - vl8r.v v24, (a1) # Unknown-size Folded Reload - vse64.v v24, (a0) + vse64.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1104 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 20 addiw a0, a0, 640 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -1088 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 31 - addiw a2, a2, -960 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v24, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1088 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 20 addiw a0, a0, 768 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -1176 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 31 - addiw a2, a2, -960 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v24, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1144 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 20 addiw a0, a0, 896 add a0, sp, a0 - vse64.v v16, (a0) + vse64.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1120 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 20 addiw a0, a0, 1024 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -1096 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 31 - addiw a2, a2, -960 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1112 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 20 addiw a0, a0, 1152 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -1136 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 31 - addiw a2, a2, -960 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v24, (a0) + csrr a0, vlenb + li a1, 23 + slli a1, a1, 7 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 20 addiw a0, a0, 1280 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -1184 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 31 - addiw a2, a2, -960 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v24, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1160 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 20 addiw a0, a0, 1408 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -1112 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 31 - addiw a2, a2, -960 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v24, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1176 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 20 addiw a0, a0, 1536 add a0, sp, a0 - csrr a1, vlenb - li a2, 23 - slli a2, a2, 7 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 31 - addiw a2, a2, -960 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v24, (a0) lui a0, 20 addiw a0, a0, 1664 add a0, sp, a0 - vse64.v v0, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1096 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 20 addiw a0, a0, 1792 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -1104 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 31 - addiw a2, a2, -960 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1168 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 21 addiw a0, a0, -2048 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -1144 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 31 - addiw a2, a2, -960 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) lui a0, 20 addiw a0, a0, 1920 add a0, sp, a0 - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, -1192 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 31 - addiw a2, a2, -960 - add a1, a1, a2 - vl8r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) fld ft11, 0(a5) li a5, 0 csrr a0, vlenb lui a1, 1 + addiw a1, a1, 888 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 888 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + csrr a0, vlenb + lui a1, 1 addiw a1, a1, 880 mul a0, a0, a1 add a0, sp, a0 @@ -185593,7 +185412,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, 824 + addiw a1, a1, 992 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -185602,7 +185421,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, 824 + addiw a1, a1, 992 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -185611,7 +185430,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, 992 + addiw a1, a1, 824 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -185620,7 +185439,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, 992 + addiw a1, a1, 824 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -185647,7 +185466,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, 808 + addiw a1, a1, 1096 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -185656,7 +185475,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, 808 + addiw a1, a1, 1096 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -185664,8 +185483,8 @@ add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 1104 + li a1, 9 + slli a1, a1, 9 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -185673,8 +185492,8 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 1104 + li a1, 9 + slli a1, a1, 9 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -185682,8 +185501,8 @@ add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - li a1, 9 - slli a1, a1, 9 + lui a1, 1 + addiw a1, a1, 808 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -185691,8 +185510,8 @@ add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - li a1, 9 - slli a1, a1, 9 + lui a1, 1 + addiw a1, a1, 808 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -185935,7 +185754,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, 696 + addiw a1, a1, 1088 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -185944,7 +185763,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, 696 + addiw a1, a1, 1088 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -185953,7 +185772,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1096 + addiw a1, a1, 696 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -185962,7 +185781,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1096 + addiw a1, a1, 696 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -186007,24 +185826,6 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, 672 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 672 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - csrr a0, vlenb - lui a1, 1 addiw a1, a1, 984 mul a0, a0, a1 add a0, sp, a0 @@ -186043,7 +185844,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1088 + addiw a1, a1, 672 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -186052,7 +185853,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1088 + addiw a1, a1, 672 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -186491,9 +186292,6 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 16 - addiw a0, a0, 384 - add t5, sp, a0 csrr a0, vlenb lui a1, 1 addiw a1, a1, 464 @@ -186602,30 +186400,9 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - lui a0, 13 - addiw a0, a0, 384 - add t3, sp, a0 - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 1080 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 1080 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 31 - addiw a1, a1, -960 - add a0, a0, a1 - vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1072 + addiw a1, a1, 424 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -186634,7 +186411,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1072 + addiw a1, a1, 424 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -186643,7 +186420,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, 424 + addiw a1, a1, 1080 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -186652,7 +186429,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, 424 + addiw a1, a1, 1080 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -186985,7 +186762,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, 968 + addiw a1, a1, 272 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -186994,7 +186771,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, 968 + addiw a1, a1, 272 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -187003,7 +186780,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, 272 + addiw a1, a1, 968 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -187012,7 +186789,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, 272 + addiw a1, a1, 968 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -187021,7 +186798,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1064 + addiw a1, a1, 264 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -187030,7 +186807,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1064 + addiw a1, a1, 264 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -187039,7 +186816,7 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, 264 + addiw a1, a1, 1072 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -187048,7 +186825,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, 264 + addiw a1, a1, 1072 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -187109,5363 +186886,5353 @@ addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - li a1, 25 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 232 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 232 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 232 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 232 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 224 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 224 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 224 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 224 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 216 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 216 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 216 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 216 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 208 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 208 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 208 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 208 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 200 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 200 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 200 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 200 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 192 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 192 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 192 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 192 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1056 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 184 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1056 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 184 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 184 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1064 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 184 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1064 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 176 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 176 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 176 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 176 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 168 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 168 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 168 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 168 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 160 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 160 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 160 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 160 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 152 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1056 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 152 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1056 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 144 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 152 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 144 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 152 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 136 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 144 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 136 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 144 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 128 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 128 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 960 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 128 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 960 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 128 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 120 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1112 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 120 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1112 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 112 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 120 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 112 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 120 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 104 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 112 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 104 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 112 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 96 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 104 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 96 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 104 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 88 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 96 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 88 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 96 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 80 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 88 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 80 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 88 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 952 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 80 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 952 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 80 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 72 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 960 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 72 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 960 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 64 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 72 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 64 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 72 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 56 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 64 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 56 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 64 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 48 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 56 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 48 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 56 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 40 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 48 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 40 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 48 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 32 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 40 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 32 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 40 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 24 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 32 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 24 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 32 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 16 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 24 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 16 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 24 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 8 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 16 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 8 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 16 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - slli a0, a0, 12 + lui a1, 1 + addiw a1, a1, 8 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - slli a0, a0, 12 + lui a1, 1 + addiw a1, a1, 8 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -8 - mul a0, a0, a2 + slli a0, a0, 12 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -8 - mul a0, a0, a2 + slli a0, a0, 12 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -16 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -8 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -16 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -8 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -24 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -16 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -24 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -16 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -32 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -24 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -32 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -24 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -40 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -32 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -40 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -32 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -48 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -40 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -48 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -40 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -56 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -48 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -56 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -48 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -64 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -56 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -64 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -56 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1112 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -64 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1112 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -64 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -72 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1104 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -72 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1104 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 944 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -72 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 944 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -72 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -80 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 952 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -80 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 952 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -88 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -80 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -88 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -80 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -96 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -88 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -96 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -88 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -104 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -96 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -104 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -96 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -112 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -104 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -112 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -104 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -120 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -112 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -120 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -112 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1048 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -120 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1048 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -120 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1040 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1048 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1040 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1048 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - li a2, 31 - slli a2, a2, 7 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1040 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - li a2, 31 - slli a2, a2, 7 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1040 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -136 - mul a0, a0, a2 + li a1, 31 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -136 - mul a0, a0, a2 + li a1, 31 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -144 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -144 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -136 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -152 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -144 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -152 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -144 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -160 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -152 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -160 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -152 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -168 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -160 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -168 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -160 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v16, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -176 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -168 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -176 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -168 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -184 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -176 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -184 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -176 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v16, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -192 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -184 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -192 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -184 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -200 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -192 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -200 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -192 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v16, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -208 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -200 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -208 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -200 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v16, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -216 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -208 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -216 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -208 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v16, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1032 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -216 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1032 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -216 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v16, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -224 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1032 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -224 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1032 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v16, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -232 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -224 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -232 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -224 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -240 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -232 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -240 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -232 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -248 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -240 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -248 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -240 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill csrr a0, vlenb - li a2, 15 - slli a2, a2, 8 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -248 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - li a2, 15 - slli a2, a2, 8 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -248 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -264 - mul a0, a0, a2 + li a1, 15 + slli a1, a1, 8 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -264 - mul a0, a0, a2 + li a1, 15 + slli a1, a1, 8 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 936 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -264 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 936 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -264 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -272 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 944 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -272 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 944 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -280 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -272 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -280 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -272 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -288 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -280 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -288 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -280 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -296 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -288 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -296 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -288 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -304 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -296 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -304 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -296 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -312 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -304 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -312 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -304 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -320 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -312 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -320 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -312 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -328 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -320 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -328 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -320 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -336 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -328 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -336 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -328 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -344 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -336 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -344 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -336 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -352 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -344 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -352 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -344 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -360 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -352 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -360 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -352 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -368 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -360 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -368 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -360 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -376 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -368 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -376 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -368 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill csrr a0, vlenb - li a2, 29 - slli a2, a2, 7 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -376 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload csrr a0, vlenb - li a2, 29 - slli a2, a2, 7 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -376 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -392 - mul a0, a0, a2 + li a1, 29 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -392 - mul a0, a0, a2 + li a1, 29 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -400 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -392 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -400 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -392 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -408 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -400 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -408 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -400 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1000 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -408 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1000 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -408 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -416 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1000 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -416 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1000 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -424 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -416 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -424 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -416 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -432 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -424 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -432 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -424 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -440 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -432 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -440 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -432 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v16, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -448 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -440 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -448 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -440 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - li a2, 5 - slli a2, a2, 10 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -448 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - li a2, 5 - slli a2, a2, 10 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -448 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -456 - mul a0, a0, a2 + li a1, 5 + slli a1, a1, 10 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -456 - mul a0, a0, a2 + li a1, 5 + slli a1, a1, 10 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v16, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -464 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -456 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -464 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -456 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -472 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -464 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -472 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -464 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -480 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -472 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -480 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -472 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v16, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -488 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -480 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -488 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -480 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -496 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -488 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -496 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -488 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v16, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -504 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -496 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -504 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -496 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - li a2, 7 - slli a2, a2, 9 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -504 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb - li a2, 7 - slli a2, a2, 9 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -504 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v16, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -520 - mul a0, a0, a2 + li a1, 7 + slli a1, a1, 9 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -520 - mul a0, a0, a2 + li a1, 7 + slli a1, a1, 9 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -528 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -520 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -528 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -520 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -536 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -528 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -536 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -528 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1016 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -536 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1016 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -536 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -544 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1016 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -544 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1016 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -552 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -544 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -552 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -544 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -560 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -552 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -560 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -552 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -568 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -560 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -568 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -560 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 928 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -568 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 928 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -568 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -576 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 936 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -576 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 936 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -584 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -576 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -584 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -576 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -592 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -584 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -592 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -584 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -600 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -592 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -600 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -592 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -608 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -600 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -608 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -600 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -616 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -608 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -616 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -608 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -624 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -616 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -624 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -616 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -632 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -624 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -632 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -624 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - li a2, 27 - slli a2, a2, 7 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -632 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - li a2, 27 - slli a2, a2, 7 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -632 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -648 - mul a0, a0, a2 + li a1, 27 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -648 - mul a0, a0, a2 + li a1, 27 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -656 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -648 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -656 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -648 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -664 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -656 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -664 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -656 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -672 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -664 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -672 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -664 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -680 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -672 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -680 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -672 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -688 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -680 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -688 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -680 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -696 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -688 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -696 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -688 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -704 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -696 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -704 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -696 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -712 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -704 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -712 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -704 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1008 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -712 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1008 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -712 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -720 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1008 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -720 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1008 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -728 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -720 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -728 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -720 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v24, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -736 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -728 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -736 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -728 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -744 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -736 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -744 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -736 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -752 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -744 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -752 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -744 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -760 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -752 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -760 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -752 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill csrr a0, vlenb - li a2, 13 - slli a2, a2, 8 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -760 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload csrr a0, vlenb - li a2, 13 - slli a2, a2, 8 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -760 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -776 - mul a0, a0, a2 + li a1, 13 + slli a1, a1, 8 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -776 - mul a0, a0, a2 + li a1, 13 + slli a1, a1, 8 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -784 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -776 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -784 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -776 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -792 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -784 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -792 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -784 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -800 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -792 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -800 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -792 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -808 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -800 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -808 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -800 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -816 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -808 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -816 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -808 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -824 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -816 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -824 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -816 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -832 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -824 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -832 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -824 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -840 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -832 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -840 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -832 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 920 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -840 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 920 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -840 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 912 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 928 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 912 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 928 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -848 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 920 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -848 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 920 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 904 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -848 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 904 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -848 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -856 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 912 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -856 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 912 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 896 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -856 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 896 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -856 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -864 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 904 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -864 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 904 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -872 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -864 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -872 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -864 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -880 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -872 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -880 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -872 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -888 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -880 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -888 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -880 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill csrr a0, vlenb - li a2, 25 - slli a2, a2, 7 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -888 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload csrr a0, vlenb - li a2, 25 - slli a2, a2, 7 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -888 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -904 - mul a0, a0, a2 + li a1, 25 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -904 - mul a0, a0, a2 + li a1, 25 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -904 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -904 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -912 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -912 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -920 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -920 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -928 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -928 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -936 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -936 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -944 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -944 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -952 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -952 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -960 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -960 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -968 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -968 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -976 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -976 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -984 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -984 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -992 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -992 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1000 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1000 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1008 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1008 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1016 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1016 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill + csrr a0, vlenb + li a1, 3 + slli a1, a1, 10 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 3 + slli a1, a1, 10 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1032 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1032 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1040 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1040 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1048 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1048 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1056 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1056 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1064 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1064 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1072 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1072 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1080 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1080 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill +.LBB17_2: # %for.cond6.preheader + # Parent Loop BB17_1 Depth=1 + # => This Inner Loop Header: Depth=2 + vsetivli zero, 16, e64, m8, ta, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1232 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a0, 19 + addiw a0, a0, 384 + add a1, sp, a0 + vse64.v v8, (a1) csrr a0, vlenb lui a2, 1 - addiw a2, a2, -912 + addiw a2, a2, 1144 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 addiw a2, a2, -960 add a0, a0, a2 vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a0, 19 + addiw a0, a0, 512 + add a0, sp, a0 + vse64.v v8, (a0) csrr a0, vlenb lui a2, 1 - addiw a2, a2, -912 + addiw a2, a2, 1304 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 addiw a2, a2, -960 add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a0, 19 + addiw a0, a0, 640 + add a0, sp, a0 + vse64.v v8, (a0) csrr a0, vlenb lui a2, 1 - addiw a2, a2, -920 + addiw a2, a2, 1224 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 addiw a2, a2, -960 add a0, a0, a2 vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a0, 19 + addiw a0, a0, 768 + add a0, sp, a0 + vse64.v v8, (a0) csrr a0, vlenb lui a2, 1 - addiw a2, a2, -920 + addiw a2, a2, 1208 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 addiw a2, a2, -960 add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a0, 19 + addiw a0, a0, 896 + add a0, sp, a0 + vse64.v v8, (a0) csrr a0, vlenb lui a2, 1 - addiw a2, a2, -928 + addiw a2, a2, 1216 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 addiw a2, a2, -960 add a0, a0, a2 vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a0, 19 + addiw a0, a0, 1024 + add a0, sp, a0 + vse64.v v8, (a0) csrr a0, vlenb lui a2, 1 - addiw a2, a2, -928 + addiw a2, a2, 1136 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 addiw a2, a2, -960 add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a0, 19 + addiw a0, a0, 1152 + add a0, sp, a0 + vse64.v v8, (a0) csrr a0, vlenb lui a2, 1 - addiw a2, a2, -936 + addiw a2, a2, 1200 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 addiw a2, a2, -960 add a0, a0, a2 vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a0, 19 + addiw a0, a0, 1280 + add a0, sp, a0 + vse64.v v8, (a0) csrr a0, vlenb lui a2, 1 - addiw a2, a2, -936 + addiw a2, a2, 1296 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 addiw a2, a2, -960 add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a0, 19 + addiw a0, a0, 1408 + add a0, sp, a0 + vse64.v v8, (a0) csrr a0, vlenb lui a2, 1 - addiw a2, a2, -944 + addiw a2, a2, 1192 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 addiw a2, a2, -960 add a0, a0, a2 vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a0, 19 + addiw a0, a0, 1536 + add a0, sp, a0 + vse64.v v8, (a0) csrr a0, vlenb lui a2, 1 - addiw a2, a2, -944 + addiw a2, a2, 1288 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 addiw a2, a2, -960 add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a0, 19 + addiw a0, a0, 1664 + add a0, sp, a0 + vse64.v v8, (a0) csrr a0, vlenb lui a2, 1 - addiw a2, a2, -952 + addiw a2, a2, 1184 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 addiw a2, a2, -960 add a0, a0, a2 vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a0, 19 + addiw a0, a0, 1792 + add a0, sp, a0 + vse64.v v8, (a0) csrr a0, vlenb lui a2, 1 - addiw a2, a2, -952 + addiw a2, a2, 1344 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 addiw a2, a2, -960 add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a0, 19 + addiw a0, a0, 1920 + add a0, sp, a0 + vse64.v v8, (a0) csrr a0, vlenb lui a2, 1 - addiw a2, a2, -960 + addiw a2, a2, 1128 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 addiw a2, a2, -960 add a0, a0, a2 vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a0, 20 + addiw a0, a0, -2048 + add a0, sp, a0 + vse64.v v8, (a0) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -960 + li a2, 21 + slli a2, a2, 8 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 addiw a2, a2, -960 add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a0, 20 + addiw a0, a0, -1920 + add a0, sp, a0 + vse64.v v8, (a0) csrr a0, vlenb lui a2, 1 - addiw a2, a2, -968 + addiw a2, a2, 1176 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 addiw a2, a2, -960 add a0, a0, a2 vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a0, 20 + addiw a0, a0, -1792 + add a0, sp, a0 + vse64.v v8, (a0) + add t1, a1, s2 csrr a0, vlenb lui a2, 1 - addiw a2, a2, -968 + addiw a2, a2, 1168 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 addiw a2, a2, -960 add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + vl8r.v v24, (a0) # Unknown-size Folded Reload + vse64.v v24, (t1) + add t1, a1, s3 csrr a0, vlenb lui a2, 1 - addiw a2, a2, -976 + addiw a2, a2, 1272 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 addiw a2, a2, -960 add a0, a0, a2 vl8r.v v8, (a0) # Unknown-size Folded Reload + vse64.v v8, (t1) + add t1, a1, s4 csrr a0, vlenb lui a2, 1 - addiw a2, a2, -976 + addiw a2, a2, 1160 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 addiw a2, a2, -960 add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + vl8r.v v16, (a0) # Unknown-size Folded Reload + vse64.v v16, (t1) + slli t1, t3, 7 + add t3, a1, t1 csrr a0, vlenb lui a2, 1 - addiw a2, a2, -984 + addiw a2, a2, 1256 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 addiw a2, a2, -960 add a0, a0, a2 vl8r.v v8, (a0) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a1, s5 csrr a0, vlenb lui a2, 1 - addiw a2, a2, -984 + addiw a2, a2, 1120 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 addiw a2, a2, -960 add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + vl8r.v v8, (a0) # Unknown-size Folded Reload + vse64.v v8, (t3) + vmv8r.v v0, v8 + add t3, a1, s6 csrr a0, vlenb lui a2, 1 - addiw a2, a2, -992 + addiw a2, a2, 1264 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 addiw a2, a2, -960 add a0, a0, a2 vl8r.v v8, (a0) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a1, t4 csrr a0, vlenb lui a2, 1 - addiw a2, a2, -992 + addiw a2, a2, 1152 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 addiw a2, a2, -960 add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + vl8r.v v8, (a0) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a1, s7 csrr a0, vlenb lui a2, 1 - addiw a2, a2, -1000 + addiw a2, a2, 1248 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 addiw a2, a2, -960 add a0, a0, a2 vl8r.v v8, (a0) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a1, s8 csrr a0, vlenb lui a2, 1 - addiw a2, a2, -1000 + addiw a2, a2, 1336 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 addiw a2, a2, -960 add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + vl8r.v v8, (a0) # Unknown-size Folded Reload + vse64.v v8, (t3) + li t6, 25 + slli t6, t6, 7 + add t3, a1, t6 csrr a0, vlenb lui a2, 1 - addiw a2, a2, -1008 + addiw a2, a2, 1312 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 addiw a2, a2, -960 add a0, a0, a2 vl8r.v v8, (a0) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a1, s9 csrr a0, vlenb lui a2, 1 - addiw a2, a2, -1008 + addiw a2, a2, 1352 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 addiw a2, a2, -960 add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + vl8r.v v8, (a0) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a1, s10 csrr a0, vlenb lui a2, 1 - addiw a2, a2, -1016 + addiw a2, a2, 1240 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 addiw a2, a2, -960 add a0, a0, a2 vl8r.v v8, (a0) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a1, s11 csrr a0, vlenb lui a2, 1 - addiw a2, a2, -1016 + addiw a2, a2, 1328 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 addiw a2, a2, -960 add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + vl8r.v v8, (a0) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a1, ra csrr a0, vlenb - li a2, 3 - slli a2, a2, 10 + lui a2, 1 + addiw a2, a2, 1320 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 addiw a2, a2, -960 add a0, a0, a2 vl8r.v v8, (a0) # Unknown-size Folded Reload - csrr a0, vlenb - li a2, 3 - slli a2, a2, 10 - mul a0, a0, a2 + vse64.v v8, (t3) + andi t3, a5, 511 + slli t3, t3, 3 + add t3, a1, t3 + fld fs0, 0(t3) + lui a0, 18 + addiw a0, a0, 384 add a0, sp, a0 + add t3, a0, s2 + vse64.v v24, (t3) + add t3, a0, s3 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1272 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - csrr a0, vlenb + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s4 + vse64.v v16, (t3) + add t3, a0, t1 + csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1032 - mul a0, a0, a2 - add a0, sp, a0 + addiw a2, a2, 1256 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - csrr a0, vlenb + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s5 + vse64.v v0, (t3) + add t3, a0, s6 + csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1032 - mul a0, a0, a2 - add a0, sp, a0 + addiw a2, a2, 1264 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - csrr a0, vlenb + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, t4 + csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1040 - mul a0, a0, a2 - add a0, sp, a0 + addiw a2, a2, 1152 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vmv1r.v v0, v24 - csrr a0, vlenb + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s7 + csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1048 - mul a0, a0, a2 - add a0, sp, a0 + addiw a2, a2, 1248 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - csrr a0, vlenb + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s8 + csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1048 - mul a0, a0, a2 - add a0, sp, a0 + addiw a2, a2, 1336 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - csrr a0, vlenb + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, t6 + csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1056 - mul a0, a0, a2 - add a0, sp, a0 + addiw a2, a2, 1312 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - csrr a0, vlenb + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t3) + add t3, a0, s9 + csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1056 - mul a0, a0, a2 - add a0, sp, a0 + addiw a2, a2, 1352 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - csrr a0, vlenb + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s10 + csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1064 - mul a0, a0, a2 - add a0, sp, a0 + addiw a2, a2, 1240 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - csrr a0, vlenb + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s11 + csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1064 - mul a0, a0, a2 - add a0, sp, a0 + addiw a2, a2, 1328 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - csrr a0, vlenb + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, ra + csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1072 - mul a0, a0, a2 - add a0, sp, a0 + addiw a2, a2, 1320 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - csrr a0, vlenb + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t3) + addi t3, a5, 25 + andi t3, t3, 511 + slli t3, t3, 3 + add t3, a0, t3 + csrr a1, vlenb lui a2, 1 - addiw a2, a2, -1072 - mul a0, a0, a2 - add a0, sp, a0 + addiw a2, a2, 1232 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (a0) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1080 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1144 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload -.LBB17_2: # %for.cond6.preheader - # Parent Loop BB17_1 Depth=1 - # => This Inner Loop Header: Depth=2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload + lui a0, 18 + addiw a0, a0, 512 + add a0, sp, a0 + vse64.v v24, (a0) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1080 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1304 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + lui a0, 18 + addiw a0, a0, 640 + add a0, sp, a0 + vse64.v v0, (a0) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1040 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1224 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vsetivli zero, 16, e64, m8, ta, ma + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload + lui a0, 18 + addiw a0, a0, 768 + add a0, sp, a0 + vse64.v v16, (a0) csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1224 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1208 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - lui a0, 19 - addiw a0, a0, 384 - add a2, sp, a0 - vse64.v v8, (a2) - lui a0, 19 - addiw a0, a0, 512 + lui a0, 18 + addiw a0, a0, 896 add a0, sp, a0 - csrr a3, vlenb - lui a4, 1 - addiw a4, a4, 1144 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 31 - addiw a4, a4, -960 - add a3, a3, a4 - vl8r.v v8, (a3) # Unknown-size Folded Reload vse64.v v8, (a0) csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 1200 - mul a0, a0, a3 + lui a1, 1 + addiw a1, a1, 1216 + mul a0, a0, a1 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - lui a0, 19 - addiw a0, a0, 640 + lui a0, 18 + addiw a0, a0, 1024 add a0, sp, a0 vse64.v v8, (a0) - lui a0, 19 - addiw a0, a0, 768 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1136 + mul a0, a0, a1 add a0, sp, a0 - csrr a3, vlenb - lui a4, 1 - addiw a4, a4, 1208 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 31 - addiw a4, a4, -960 - add a3, a3, a4 - vl8r.v v8, (a3) # Unknown-size Folded Reload - vse64.v v8, (a0) - lui a0, 19 - addiw a0, a0, 896 - add a0, sp, a0 - csrr a3, vlenb - lui a4, 1 - addiw a4, a4, 1184 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 31 - addiw a4, a4, -960 - add a3, a3, a4 - vl8r.v v8, (a3) # Unknown-size Folded Reload - vse64.v v8, (a0) - csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 1192 - mul a0, a0, a3 - add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - lui a0, 19 - addiw a0, a0, 1024 - add a0, sp, a0 - vse64.v v8, (a0) - lui a0, 19 + lui a0, 18 addiw a0, a0, 1152 add a0, sp, a0 - csrr a3, vlenb - lui a4, 1 - addiw a4, a4, 1304 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 31 - addiw a4, a4, -960 - add a3, a3, a4 - vl8r.v v8, (a3) # Unknown-size Folded Reload vse64.v v8, (a0) csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 1352 - mul a0, a0, a3 + lui a1, 1 + addiw a1, a1, 1200 + mul a0, a0, a1 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - lui a0, 19 + lui a0, 18 addiw a0, a0, 1280 add a0, sp, a0 vse64.v v8, (a0) csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 1288 - mul a0, a0, a3 + lui a1, 1 + addiw a1, a1, 1296 + mul a0, a0, a1 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - lui a0, 19 + lui a0, 18 addiw a0, a0, 1408 add a0, sp, a0 vse64.v v8, (a0) - lui a0, 19 - addiw a0, a0, 1536 - add a0, sp, a0 - csrr a3, vlenb - lui a4, 1 - addiw a4, a4, 1296 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 31 - addiw a4, a4, -960 - add a3, a3, a4 - vl8r.v v8, (a3) # Unknown-size Folded Reload - vse64.v v8, (a0) - lui a0, 19 - addiw a0, a0, 1664 - add a0, sp, a0 - csrr a3, vlenb - lui a4, 1 - addiw a4, a4, 1336 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 31 - addiw a4, a4, -960 - add a3, a3, a4 - vl8r.v v8, (a3) # Unknown-size Folded Reload - vse64.v v8, (a0) csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 1344 - mul a0, a0, a3 + lui a1, 1 + addiw a1, a1, 1192 + mul a0, a0, a1 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - lui a0, 19 - addiw a0, a0, 1792 + lui a0, 18 + addiw a0, a0, 1536 add a0, sp, a0 vse64.v v8, (a0) - lui a0, 19 - addiw a0, a0, 1920 - add a0, sp, a0 - csrr a3, vlenb - li a4, 21 - slli a4, a4, 8 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 31 - addiw a4, a4, -960 - add a3, a3, a4 - vl8r.v v8, (a3) # Unknown-size Folded Reload - vse64.v v8, (a0) csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 1264 - mul a0, a0, a3 + lui a1, 1 + addiw a1, a1, 1288 + mul a0, a0, a1 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - lui a0, 20 - addiw a0, a0, -2048 + lui a0, 18 + addiw a0, a0, 1664 add a0, sp, a0 vse64.v v8, (a0) csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 1272 - mul a0, a0, a3 + lui a1, 1 + addiw a1, a1, 1184 + mul a0, a0, a1 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - lui a0, 20 - addiw a0, a0, -1920 - add a0, sp, a0 - vse64.v v8, (a0) - lui a0, 20 - addiw a0, a0, -1792 + lui a0, 18 + addiw a0, a0, 1792 add a0, sp, a0 - csrr a3, vlenb - lui a4, 1 - addiw a4, a4, 1328 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 31 - addiw a4, a4, -960 - add a3, a3, a4 - vl8r.v v8, (a3) # Unknown-size Folded Reload vse64.v v8, (a0) - add t1, a2, s2 - csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 1176 - mul a0, a0, a3 - add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t1) - add t1, a2, s3 - csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 1136 - mul a0, a0, a3 - add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t1) - add t1, a2, s4 - csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 1256 - mul a0, a0, a3 - add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t1) - slli t1, t6, 7 - add t6, a2, t1 - csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 1320 - mul a0, a0, a3 - add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a2, s5 csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 1168 - mul a0, a0, a3 - add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a2, s6 - csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 1248 - mul a0, a0, a3 - add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a2, t4 - csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 1160 - mul a0, a0, a3 - add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t6, a2, s7 - csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 1128 - mul a0, a0, a3 - add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t6) - vmv8r.v v0, v8 - add t6, a2, s8 - csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 1240 - mul a0, a0, a3 - add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t6) - slli t6, a1, 7 - add a1, a2, t6 - csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 1216 - mul a0, a0, a3 - add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a2, s9 - csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 1312 - mul a0, a0, a3 - add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a2, s10 - csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 1232 - mul a0, a0, a3 - add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a2, s11 - csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 1120 - mul a0, a0, a3 - add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) - add a1, a2, ra - csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 1152 - mul a0, a0, a3 + lui a1, 1 + addiw a1, a1, 1344 + mul a0, a0, a1 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) - andi a1, a5, 511 - slli a1, a1, 3 - add a1, a2, a1 - fld fs0, 0(a1) - lui a0, 18 - addiw a0, a0, 384 - add a0, sp, a0 - add a1, a0, s2 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v16, (a2) # Unknown-size Folded Reload - vse64.v v16, (a1) - add a1, a0, s3 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v16, (a2) # Unknown-size Folded Reload - vse64.v v16, (a1) - add a1, a0, s4 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1256 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v16, (a2) # Unknown-size Folded Reload - vse64.v v16, (a1) - add a1, a0, t1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1320 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v16, (a2) # Unknown-size Folded Reload - vse64.v v16, (a1) - add a1, a0, s5 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v16, (a2) # Unknown-size Folded Reload - vse64.v v16, (a1) - add a1, a0, s6 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1248 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v16, (a2) # Unknown-size Folded Reload - vse64.v v16, (a1) - add a1, a0, t4 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v16, (a2) # Unknown-size Folded Reload - vse64.v v16, (a1) - add a1, a0, s7 - vse64.v v0, (a1) - add a1, a0, s8 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1240 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a1) - add a1, a0, t6 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a1) - add a1, a0, s9 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1312 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a1) - add a1, a0, s10 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1232 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a1) - add a1, a0, s11 - vse64.v v24, (a1) - add a1, a0, ra - vse64.v v8, (a1) - addi a1, a5, 25 - andi a1, a1, 511 - slli a1, a1, 3 - add a1, a0, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1224 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a0) - lui a0, 18 - addiw a0, a0, 512 - add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a0) - lui a0, 18 - addiw a0, a0, 640 - add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) - lui a0, 18 - addiw a0, a0, 768 - add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) - lui a0, 18 - addiw a0, a0, 896 - add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) - lui a0, 18 - addiw a0, a0, 1024 - add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) - lui a0, 18 - addiw a0, a0, 1152 - add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1304 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) - lui a0, 18 - addiw a0, a0, 1280 - add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1352 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) - lui a0, 18 - addiw a0, a0, 1408 - add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1288 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) - lui a0, 18 - addiw a0, a0, 1536 - add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1296 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) - lui a0, 18 - addiw a0, a0, 1664 - add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1336 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) - lui a0, 18 - addiw a0, a0, 1792 - add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1344 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) lui a0, 18 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - li a3, 21 - slli a3, a3, 8 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1128 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 19 addiw a0, a0, -2048 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1264 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + li a1, 21 + slli a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 19 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1272 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1176 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 19 addiw a0, a0, -1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1328 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) - fld fs1, 0(a1) + fld fs1, 0(t3) lui a0, 1 addiw a0, a0, 384 add a0, sp, a0 - add a1, a0, s2 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s3 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s4 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1256 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, t1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1320 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s5 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s6 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1248 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, t4 - vse64.v v16, (a1) - add a1, a0, s7 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s8 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1240 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, t6 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s9 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1312 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v16, (a2) # Unknown-size Folded Reload - vse64.v v16, (a1) - add a1, a0, s10 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1232 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s11 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v16, (a2) # Unknown-size Folded Reload - vse64.v v16, (a1) - add a1, a0, ra - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - addi a1, a5, 50 - andi a1, a1, 511 - slli a1, a1, 3 - add a1, a0, a1 - vse64.v v24, (a0) + add t3, a0, s2 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1168 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s3 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1272 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s4 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1160 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, t1 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1256 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s5 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1120 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s6 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1264 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, t4 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1152 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s7 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1248 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s8 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1336 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, t6 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1312 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s9 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1352 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s10 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1240 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s11 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1328 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, ra + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1320 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + addi t3, a5, 50 + andi t3, t3, 511 + slli t3, t3, 3 + add t3, a0, t3 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1232 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (a0) li a0, 9 slli a0, a0, 9 add a0, sp, a0 - vse64.v v0, (a0) + vse64.v v24, (a0) lui a0, 1 addiw a0, a0, 640 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v0, (a0) li a0, 19 slli a0, a0, 8 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1208 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 1 addiw a0, a0, 896 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1216 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload li a0, 5 slli a0, a0, 10 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1136 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 1 addiw a0, a0, 1152 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1304 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1200 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload li a0, 21 slli a0, a0, 8 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1352 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1296 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 1 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1288 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1192 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload li a0, 11 slli a0, a0, 9 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1296 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v24, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1288 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 1 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1336 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1184 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload li a0, 23 slli a0, a0, 8 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1344 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1344 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 1 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - li a3, 21 - slli a3, a3, 8 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1128 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload li a0, 3 slli a0, a0, 11 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1264 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + li a1, 21 + slli a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 2 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1272 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1176 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload li a0, 25 slli a0, a0, 8 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1328 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) - fld fs2, 0(a1) + fld fs2, 0(t3) lui a0, 2 addiw a0, a0, 384 add a0, sp, a0 - add a1, a0, s2 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s3 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a1) - add a1, a0, s4 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1256 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, t1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1320 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s5 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s6 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1248 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, t4 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s7 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a1) - add a1, a0, s8 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1240 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, t6 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s9 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1312 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s10 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1232 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s11 - vse64.v v16, (a1) - add a1, a0, ra - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - addi a1, a5, 75 - andi a1, a1, 511 - slli a1, a1, 3 - add a1, a0, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1224 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload + add t3, a0, s2 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1168 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s3 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1272 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s4 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1160 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, t1 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1256 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s5 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1120 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s6 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1264 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, t4 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1152 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s7 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1248 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s8 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1336 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, t6 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1312 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s9 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1352 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s10 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1240 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s11 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1328 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, ra + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1320 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + addi t3, a5, 75 + andi t3, t3, 511 + slli t3, t3, 3 + add t3, a0, t3 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1232 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1144 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload li a0, 17 slli a0, a0, 9 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v16, (a2) # Unknown-size Folded Reload - vse64.v v16, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1304 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 2 addiw a0, a0, 640 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1224 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 2 addiw a0, a0, 768 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) lui a0, 2 addiw a0, a0, 896 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) li a0, 9 slli a0, a0, 10 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1136 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 2 addiw a0, a0, 1152 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1304 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1200 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 2 addiw a0, a0, 1280 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1352 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1296 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 2 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1288 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) li a0, 19 slli a0, a0, 9 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1296 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v24, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1288 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 2 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1336 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v24, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1184 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 2 addiw a0, a0, 1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1344 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1344 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 2 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - li a3, 21 - slli a3, a3, 8 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1128 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload li a0, 5 slli a0, a0, 11 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1264 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + li a1, 21 + slli a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 3 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1272 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1176 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 3 addiw a0, a0, -1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1328 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) - fld fs3, 0(a1) + fld fs3, 0(t3) lui a0, 3 addiw a0, a0, 384 add a0, sp, a0 - add a1, a0, s2 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s3 - vse64.v v0, (a1) - add a1, a0, s4 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1256 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, t1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1320 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s5 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s6 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1248 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, t4 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s7 - vse64.v v24, (a1) - add a1, a0, s8 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1240 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, t6 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s9 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1312 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s10 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1232 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s11 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, ra - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - addi a1, a5, 100 - andi a1, a1, 511 - slli a1, a1, 3 - add a1, a0, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1224 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload + add t3, a0, s2 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1168 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s3 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1272 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s4 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1160 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, t1 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1256 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s5 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1120 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s6 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1264 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, t4 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1152 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s7 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1248 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s8 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1336 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, t6 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1312 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s9 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1352 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s10 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1240 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s11 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1328 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, ra + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1320 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + addi t3, a5, 100 + andi t3, t3, 511 + slli t3, t3, 3 + add t3, a0, t3 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1232 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1144 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload li a0, 25 slli a0, a0, 9 add a0, sp, a0 - vse64.v v16, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1304 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 3 addiw a0, a0, 640 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1224 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 3 addiw a0, a0, 768 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1208 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 3 addiw a0, a0, 896 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1216 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload li a0, 13 slli a0, a0, 10 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) lui a0, 3 addiw a0, a0, 1152 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1304 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) lui a0, 3 addiw a0, a0, 1280 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1352 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1296 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 3 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1288 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1192 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload li a0, 27 slli a0, a0, 9 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1296 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) lui a0, 3 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1336 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v24, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1184 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 3 addiw a0, a0, 1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1344 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1344 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 3 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - li a3, 21 - slli a3, a3, 8 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v24, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1128 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload li a0, 7 slli a0, a0, 11 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1264 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v16, (a2) # Unknown-size Folded Reload - vse64.v v16, (a0) + vse64.v v0, (a0) + csrr a0, vlenb + li a1, 21 + slli a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 4 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1272 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload vse64.v v24, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1176 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 4 addiw a0, a0, -1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1328 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a0) - fld fs4, 0(a1) + vse64.v v24, (a0) + fld fs4, 0(t3) lui a0, 4 addiw a0, a0, 384 add a0, sp, a0 - add a1, a0, s2 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a1) - add a1, a0, s3 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a1) - add a1, a0, s4 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1256 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a1) - add a1, a0, t1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1320 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a1) - add a1, a0, s5 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a1) - add a1, a0, s6 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1248 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a1) - add a1, a0, t4 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a1) - add a1, a0, s7 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a1) - add a1, a0, s8 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1240 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a1) - add a1, a0, t6 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a1) - add a1, a0, s9 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1312 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a1) - add a1, a0, s10 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1232 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a1) - add a1, a0, s11 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a1) - add a1, a0, ra - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a1) - addi a1, a5, 125 - andi a1, a1, 511 - slli a1, a1, 3 - add a1, a0, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1224 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a0) + add t3, a0, s2 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1168 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v24, (a1) # Unknown-size Folded Reload + vse64.v v24, (t3) + add t3, a0, s3 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1272 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v24, (a1) # Unknown-size Folded Reload + vse64.v v24, (t3) + add t3, a0, s4 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1160 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v24, (a1) # Unknown-size Folded Reload + vse64.v v24, (t3) + add t3, a0, t1 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1256 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v24, (a1) # Unknown-size Folded Reload + vse64.v v24, (t3) + add t3, a0, s5 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1120 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v24, (a1) # Unknown-size Folded Reload + vse64.v v24, (t3) + add t3, a0, s6 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1264 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v24, (a1) # Unknown-size Folded Reload + vse64.v v24, (t3) + add t3, a0, t4 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1152 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v24, (a1) # Unknown-size Folded Reload + vse64.v v24, (t3) + add t3, a0, s7 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1248 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v24, (a1) # Unknown-size Folded Reload + vse64.v v24, (t3) + add t3, a0, s8 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1336 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v24, (a1) # Unknown-size Folded Reload + vse64.v v24, (t3) + add t3, a0, t6 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1312 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v24, (a1) # Unknown-size Folded Reload + vse64.v v24, (t3) + add t3, a0, s9 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1352 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v24, (a1) # Unknown-size Folded Reload + vse64.v v24, (t3) + add t3, a0, s10 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1240 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v24, (a1) # Unknown-size Folded Reload + vse64.v v24, (t3) + add t3, a0, s11 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1328 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v24, (a1) # Unknown-size Folded Reload + vse64.v v24, (t3) + add t3, a0, ra + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1320 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v24, (a1) # Unknown-size Folded Reload + vse64.v v24, (t3) + addi t3, a5, 125 + andi t3, t3, 511 + slli t3, t3, 3 + add t3, a0, t3 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1232 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v24, (a1) # Unknown-size Folded Reload + vse64.v v24, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1144 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 4 addiw a0, a0, 512 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a0) + vse64.v v24, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1304 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 4 addiw a0, a0, 640 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a0) + vse64.v v24, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1224 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 4 addiw a0, a0, 768 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a0) + vse64.v v24, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1208 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 4 addiw a0, a0, 896 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a0) + vse64.v v24, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1216 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload li a0, 17 slli a0, a0, 10 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a0) + vse64.v v24, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1136 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 4 addiw a0, a0, 1152 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1304 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a0) + vse64.v v24, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1200 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 4 addiw a0, a0, 1280 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1352 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a0) + vse64.v v24, (a0) lui a0, 4 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1288 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1192 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 4 addiw a0, a0, 1536 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1296 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1288 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 4 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1336 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a0) + vse64.v v8, (a0) lui a0, 4 addiw a0, a0, 1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1344 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1344 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 4 addiw a0, a0, 1920 add a0, sp, a0 @@ -192473,4512 +192240,4525 @@ li a0, 9 slli a0, a0, 11 add a0, sp, a0 - vse64.v v16, (a0) + vse64.v v0, (a0) + csrr a0, vlenb + li a1, 21 + slli a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 5 addiw a0, a0, -1920 add a0, sp, a0 - vse64.v v24, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1176 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 5 addiw a0, a0, -1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1328 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) - fld fs5, 0(a1) + fld fs5, 0(t3) lui a0, 5 addiw a0, a0, 384 add a0, sp, a0 - add a1, a0, s2 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v16, (a2) # Unknown-size Folded Reload - vse64.v v16, (a1) - add a1, a0, s3 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s4 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1256 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, t1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1320 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s5 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s6 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1248 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, t4 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s7 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s8 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1240 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a1) - add a1, a0, t6 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s9 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1312 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s10 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1232 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a1) - add a1, a0, s11 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, ra - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - addi a1, a5, 150 - andi a1, a1, 511 - slli a1, a1, 3 - add a1, a0, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1224 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + add t3, a0, s2 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1168 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t3) + add t3, a0, s3 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1272 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t3) + add t3, a0, s4 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1160 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t3) + add t3, a0, t1 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1256 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t3) + add t3, a0, s5 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1120 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t3) + add t3, a0, s6 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1264 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v24, (a1) # Unknown-size Folded Reload + vse64.v v24, (t3) + add t3, a0, t4 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1152 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t3) + add t3, a0, s7 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1248 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload + vse64.v v0, (t3) + add t3, a0, s8 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1336 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t3) + add t3, a0, t6 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1312 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t3) + add t3, a0, s9 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1352 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t3) + add t3, a0, s10 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1240 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t3) + add t3, a0, s11 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1328 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t3) + add t3, a0, ra + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1320 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t3) + addi t3, a5, 150 + andi t3, t3, 511 + slli t3, t3, 3 + add t3, a0, t3 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1232 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1144 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 5 addiw a0, a0, 512 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1304 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 5 addiw a0, a0, 640 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1224 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 5 addiw a0, a0, 768 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1208 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 5 addiw a0, a0, 896 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1216 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload li a0, 21 slli a0, a0, 10 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1136 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 5 addiw a0, a0, 1152 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1304 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1200 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 5 addiw a0, a0, 1280 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1352 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1296 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 5 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1288 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1192 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 5 addiw a0, a0, 1536 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1296 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1288 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 5 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1336 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1184 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 5 addiw a0, a0, 1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1344 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1344 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 5 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - li a3, 21 - slli a3, a3, 8 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1128 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload li a0, 11 slli a0, a0, 11 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1264 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + li a1, 21 + slli a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 6 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1272 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) lui a0, 6 addiw a0, a0, -1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1328 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) - fld fs6, 0(a1) + fld fs6, 0(t3) lui a0, 6 addiw a0, a0, 384 add a0, sp, a0 - add a1, a0, s2 - vse64.v v16, (a1) - add a1, a0, s3 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v16, (a2) # Unknown-size Folded Reload - vse64.v v16, (a1) - add a1, a0, s4 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1256 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, t1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1320 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s5 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s6 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1248 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, t4 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s7 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s8 - vse64.v v24, (a1) - add a1, a0, t6 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s9 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1312 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s10 - vse64.v v0, (a1) - add a1, a0, s11 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, ra - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - addi a1, a5, 175 - andi a1, a1, 511 - slli a1, a1, 3 - add a1, a0, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1224 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a0) + add t3, a0, s2 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1168 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s3 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1272 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s4 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1160 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, t1 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1256 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s5 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1120 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s6 + vse64.v v24, (t3) + add t3, a0, t4 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1152 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t3) + add t3, a0, s7 + vse64.v v0, (t3) + add t3, a0, s8 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1336 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t3) + add t3, a0, t6 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1312 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t3) + add t3, a0, s9 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1352 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t3) + add t3, a0, s10 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1240 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload + vse64.v v0, (t3) + add t3, a0, s11 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1328 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t3) + add t3, a0, ra + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1320 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t3) + addi t3, a5, 175 + andi t3, t3, 511 + slli t3, t3, 3 + add t3, a0, t3 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1232 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1144 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 6 addiw a0, a0, 512 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1304 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 6 addiw a0, a0, 640 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1224 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 6 addiw a0, a0, 768 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1208 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 6 addiw a0, a0, 896 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1216 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload li a0, 25 slli a0, a0, 10 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1136 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 6 addiw a0, a0, 1152 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1304 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1200 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 6 addiw a0, a0, 1280 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1352 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1296 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 6 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1288 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1192 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 6 addiw a0, a0, 1536 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1296 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1288 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 6 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1336 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1184 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 6 addiw a0, a0, 1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1344 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1344 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 6 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - li a3, 21 - slli a3, a3, 8 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1128 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload li a0, 13 slli a0, a0, 11 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1264 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + li a1, 21 + slli a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 7 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1272 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1176 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 7 addiw a0, a0, -1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1328 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) - fld fs7, 0(a1) + vse64.v v16, (a0) + fld fs7, 0(t3) lui a0, 7 addiw a0, a0, 384 add a0, sp, a0 - add a1, a0, s2 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s3 - vse64.v v16, (a1) - add a1, a0, s4 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1256 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, t1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1320 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s5 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s6 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1248 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, t4 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s7 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a1) - add a1, a0, s8 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1240 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, t6 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s9 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1312 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s10 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1232 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s11 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, ra - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v16, (a2) # Unknown-size Folded Reload - vse64.v v16, (a1) - addi a1, a5, 200 - andi a1, a1, 511 - slli a1, a1, 3 - add a1, a0, a1 - vse64.v v24, (a0) + add t3, a0, s2 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1168 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t3) + add t3, a0, s3 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1272 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t3) + add t3, a0, s4 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1160 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t3) + add t3, a0, t1 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1256 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v24, (a1) # Unknown-size Folded Reload + vse64.v v24, (t3) + add t3, a0, s5 + vse64.v v8, (t3) + add t3, a0, s6 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1264 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, t4 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1152 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t3) + add t3, a0, s7 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1248 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s8 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1336 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, t6 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1312 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s9 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1352 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s10 + vse64.v v0, (t3) + add t3, a0, s11 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1328 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, ra + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1320 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + addi t3, a5, 200 + andi t3, t3, 511 + slli t3, t3, 3 + add t3, a0, t3 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1232 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1144 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 7 addiw a0, a0, 512 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1304 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 7 addiw a0, a0, 640 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1224 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 7 addiw a0, a0, 768 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1208 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 7 addiw a0, a0, 896 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1216 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload li a0, 29 slli a0, a0, 10 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1136 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 7 addiw a0, a0, 1152 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1304 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1200 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 7 addiw a0, a0, 1280 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1352 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1296 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 7 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1288 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1192 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 7 addiw a0, a0, 1536 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1296 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1288 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 7 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1336 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1184 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 7 addiw a0, a0, 1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1344 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1344 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 7 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - li a3, 21 - slli a3, a3, 8 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1128 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload li a0, 15 slli a0, a0, 11 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1264 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + li a1, 21 + slli a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 8 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1272 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1176 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 8 addiw a0, a0, -1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1328 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) - fld fs8, 0(a1) + fld fs8, 0(t3) lui a0, 8 addiw a0, a0, 384 add a0, sp, a0 - add a1, a0, s2 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s3 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s4 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1256 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, t1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1320 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s5 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s6 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1248 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, t4 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s7 - vse64.v v0, (a1) - add a1, a0, s8 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1240 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, t6 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a1) - add a1, a0, s9 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1312 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s10 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1232 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s11 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, ra - vse64.v v16, (a1) - addi a1, a5, 225 - andi a1, a1, 511 - slli a1, a1, 3 - add a1, a0, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1224 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload + add t3, a0, s2 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1168 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload + vse64.v v0, (t3) + add t3, a0, s3 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1272 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s4 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1160 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, t1 + vse64.v v24, (t3) + add t3, a0, s5 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1120 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v24, (a1) # Unknown-size Folded Reload + vse64.v v24, (t3) + add t3, a0, s6 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1264 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, t4 + vse64.v v16, (t3) + add t3, a0, s7 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1248 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s8 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1336 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, t6 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1312 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t3) + add t3, a0, s9 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1352 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s10 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1240 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s11 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1328 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, ra + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1320 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + addi t3, a5, 225 + andi t3, t3, 511 + slli t3, t3, 3 + add t3, a0, t3 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1232 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1144 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 8 addiw a0, a0, 512 add a0, sp, a0 - vse64.v v24, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1304 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 8 addiw a0, a0, 640 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v16, (a2) # Unknown-size Folded Reload - vse64.v v16, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1224 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 8 addiw a0, a0, 768 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1208 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 8 addiw a0, a0, 896 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1216 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 8 addiw a0, a0, 1024 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1136 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 8 addiw a0, a0, 1152 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1304 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1200 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 8 addiw a0, a0, 1280 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1352 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v16, (a2) # Unknown-size Folded Reload - vse64.v v16, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1296 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 8 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1288 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1192 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 8 addiw a0, a0, 1536 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1296 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1288 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 8 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1336 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1184 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 8 addiw a0, a0, 1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1344 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v16, (a2) # Unknown-size Folded Reload - vse64.v v16, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1344 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 8 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - li a3, 21 - slli a3, a3, 8 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1128 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload li a0, 17 slli a0, a0, 11 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1264 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + li a1, 21 + slli a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 9 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1272 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v16, (a2) # Unknown-size Folded Reload - vse64.v v16, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1176 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 9 addiw a0, a0, -1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1328 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v16, (a2) # Unknown-size Folded Reload - vse64.v v16, (a0) - fld fs9, 0(a1) + vse64.v v8, (a0) + fld fs9, 0(t3) lui a0, 9 addiw a0, a0, 384 add a0, sp, a0 - add a1, a0, s2 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s3 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s4 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1256 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v16, (a2) # Unknown-size Folded Reload - vse64.v v16, (a1) - add a1, a0, t1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1320 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s5 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s6 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1248 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, t4 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s7 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s8 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1240 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, t6 - vse64.v v0, (a1) - add a1, a0, s9 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1312 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s10 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1232 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a1) - add a1, a0, s11 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, ra - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - addi a1, a5, 250 - andi a1, a1, 511 - slli a1, a1, 3 - add a1, a0, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1224 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload + add t3, a0, s2 + vse64.v v0, (t3) + add t3, a0, s3 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1272 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload + vse64.v v0, (t3) + add t3, a0, s4 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1160 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, t1 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1256 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s5 + vse64.v v24, (t3) + add t3, a0, s6 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1264 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, t4 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1152 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s7 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1248 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s8 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1336 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, t6 + vse64.v v16, (t3) + add t3, a0, s9 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1352 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s10 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1240 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s11 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1328 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, ra + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1320 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + addi t3, a5, 250 + andi t3, t3, 511 + slli t3, t3, 3 + add t3, a0, t3 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1232 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1144 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 9 addiw a0, a0, 512 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1304 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 9 addiw a0, a0, 640 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1224 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 9 addiw a0, a0, 768 add a0, sp, a0 vse64.v v24, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1208 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 9 addiw a0, a0, 896 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1216 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 9 addiw a0, a0, 1024 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1136 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 9 addiw a0, a0, 1152 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1304 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1200 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 9 addiw a0, a0, 1280 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1352 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1296 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 9 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1288 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1192 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 9 addiw a0, a0, 1536 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1296 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1288 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 9 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1336 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1184 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 9 addiw a0, a0, 1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1344 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1344 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 9 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - li a3, 21 - slli a3, a3, 8 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1128 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload li a0, 19 slli a0, a0, 11 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1264 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + li a1, 21 + slli a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 10 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1272 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1176 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 10 addiw a0, a0, -1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1328 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) - fld fs10, 0(a1) + fld fs10, 0(t3) lui a0, 10 addiw a0, a0, 384 add a0, sp, a0 - add a1, a0, s2 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s3 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s4 - vse64.v v16, (a1) - add a1, a0, t1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1320 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s5 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s6 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1248 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v16, (a2) # Unknown-size Folded Reload - vse64.v v16, (a1) - add a1, a0, t4 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a1) - add a1, a0, s7 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s8 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1240 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, t6 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s9 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1312 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s10 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1232 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s11 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, ra - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - addi a1, a5, 275 - andi a1, a1, 511 - slli a1, a1, 3 - add a1, a0, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1224 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + add t3, a0, s2 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1168 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s3 + vse64.v v0, (t3) + add t3, a0, s4 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1160 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, t1 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1256 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload + vse64.v v0, (t3) + add t3, a0, s5 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1120 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s6 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1264 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, t4 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1152 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s7 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1248 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s8 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1336 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, t6 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1312 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s9 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1352 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s10 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1240 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s11 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1328 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, ra + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1320 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + addi t3, a5, 275 + andi t3, t3, 511 + slli t3, t3, 3 + add t3, a0, t3 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1232 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload + vse64.v v0, (a0) lui a0, 10 addiw a0, a0, 512 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1304 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 10 addiw a0, a0, 640 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) lui a0, 10 addiw a0, a0, 768 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v24, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1208 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 10 addiw a0, a0, 896 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1216 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 10 addiw a0, a0, 1024 add a0, sp, a0 vse64.v v24, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1136 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 10 addiw a0, a0, 1152 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1304 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1200 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 10 addiw a0, a0, 1280 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1352 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1296 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 10 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1288 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload vse64.v v24, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1192 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 10 addiw a0, a0, 1536 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1296 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1288 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 10 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1336 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1184 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 10 addiw a0, a0, 1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1344 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1344 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 10 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - li a3, 21 - slli a3, a3, 8 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1128 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload li a0, 21 slli a0, a0, 11 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1264 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + li a1, 21 + slli a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 11 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1272 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1176 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 11 addiw a0, a0, -1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1328 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload vse64.v v24, (a0) - fld fs11, 0(a1) + fld fs11, 0(t3) lui a0, 11 addiw a0, a0, 384 add a0, sp, a0 - add a1, a0, s2 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a1) - add a1, a0, s3 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a1) - add a1, a0, s4 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1256 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a1) - add a1, a0, t1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1320 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a1) - add a1, a0, s5 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a1) - add a1, a0, s6 - vse64.v v16, (a1) - add a1, a0, t4 - vse64.v v0, (a1) - add a1, a0, s7 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v16, (a2) # Unknown-size Folded Reload - vse64.v v16, (a1) - add a1, a0, s8 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1240 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v16, (a2) # Unknown-size Folded Reload - vse64.v v16, (a1) - add a1, a0, t6 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v16, (a2) # Unknown-size Folded Reload - vse64.v v16, (a1) - add a1, a0, s9 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1312 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v16, (a2) # Unknown-size Folded Reload - vse64.v v16, (a1) - add a1, a0, s10 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1232 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v16, (a2) # Unknown-size Folded Reload - vse64.v v16, (a1) - add a1, a0, s11 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v16, (a2) # Unknown-size Folded Reload - vse64.v v16, (a1) - add a1, a0, ra - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v16, (a2) # Unknown-size Folded Reload - vse64.v v16, (a1) - addi a1, a5, 300 - andi a1, a1, 511 - slli a1, a1, 3 - add a1, a0, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1224 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v16, (a2) # Unknown-size Folded Reload - vse64.v v16, (a0) + add t3, a0, s2 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1168 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s3 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1272 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s4 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1160 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, t1 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1256 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s5 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1120 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s6 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1264 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, t4 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1152 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s7 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1248 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s8 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1336 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, t6 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1312 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s9 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1352 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s10 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1240 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s11 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1328 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, ra + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1320 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + addi t3, a5, 300 + andi t3, t3, 511 + slli t3, t3, 3 + add t3, a0, t3 + vse64.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1144 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 11 addiw a0, a0, 512 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v16, (a2) # Unknown-size Folded Reload - vse64.v v16, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1304 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 11 addiw a0, a0, 640 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v16, (a2) # Unknown-size Folded Reload - vse64.v v16, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1224 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 11 addiw a0, a0, 768 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a0) + vse64.v v8, (a0) lui a0, 11 addiw a0, a0, 896 add a0, sp, a0 - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1216 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 11 addiw a0, a0, 1024 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1136 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 11 addiw a0, a0, 1152 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1304 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1200 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 11 addiw a0, a0, 1280 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1352 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1296 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 11 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1288 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1192 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 11 addiw a0, a0, 1536 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1296 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1288 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 11 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1336 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1184 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 11 addiw a0, a0, 1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1344 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1344 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 11 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - li a3, 21 - slli a3, a3, 8 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1128 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload li a0, 23 slli a0, a0, 11 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1264 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + li a1, 21 + slli a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 12 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1272 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) lui a0, 12 addiw a0, a0, -1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1328 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) - fld fa5, 0(a1) + vse64.v v24, (a0) + fld fa5, 0(t3) lui a0, 12 addiw a0, a0, 384 add a0, sp, a0 - add a1, a0, s2 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a1) - add a1, a0, s3 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s4 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1256 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, t1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1320 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s5 - vse64.v v24, (a1) - add a1, a0, s6 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1248 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, t4 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s7 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s8 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1240 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, t6 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s9 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1312 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s10 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1232 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s11 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, ra - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - addi a1, a5, 325 - andi a1, a1, 511 - slli a1, a1, 3 - add a1, a0, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1224 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload + add t3, a0, s2 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1168 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s3 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1272 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s4 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1160 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v0, (a1) # Unknown-size Folded Reload + vse64.v v0, (t3) + add t3, a0, t1 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1256 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s5 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1120 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s6 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1264 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, t4 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1152 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v24, (a1) # Unknown-size Folded Reload + vse64.v v24, (t3) + add t3, a0, s7 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1248 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s8 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1336 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, t6 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1312 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s9 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1352 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s10 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1240 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s11 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1328 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, ra + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1320 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + addi t3, a5, 325 + andi t3, t3, 511 + slli t3, t3, 3 + add t3, a0, t3 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1232 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1144 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 12 addiw a0, a0, 512 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1304 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 12 addiw a0, a0, 640 add a0, sp, a0 - vse64.v v16, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1224 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 12 addiw a0, a0, 768 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1208 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 12 addiw a0, a0, 896 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1216 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 12 addiw a0, a0, 1024 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) lui a0, 12 addiw a0, a0, 1152 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1304 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1200 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 12 addiw a0, a0, 1280 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1352 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v16, (a2) # Unknown-size Folded Reload - vse64.v v16, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1296 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 12 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1288 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1192 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 12 addiw a0, a0, 1536 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1296 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1288 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 12 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1336 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1184 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 12 addiw a0, a0, 1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1344 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1344 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 12 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - li a3, 21 - slli a3, a3, 8 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1128 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload li a0, 25 slli a0, a0, 11 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1264 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + li a1, 21 + slli a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 13 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1272 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1176 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 13 addiw a0, a0, -1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1328 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) - fld fa4, 0(a1) - add a1, t3, s2 - vse64.v v0, (a1) - add a1, t3, s3 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1136 - mul a0, a0, a2 + vse64.v v16, (a0) + fld fa4, 0(t3) + lui a0, 13 + addiw a0, a0, 384 add a0, sp, a0 + add t3, a0, s2 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1168 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vse64.v v16, (a1) - add a1, t3, s4 - csrr a0, vlenb + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t3) + add t3, a0, s3 + csrr a1, vlenb lui a2, 1 - addiw a2, a2, 1256 - mul a0, a0, a2 - add a0, sp, a0 + addiw a2, a2, 1272 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, t3, t1 - csrr a0, vlenb + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t3) + add t3, a0, s4 + vse64.v v0, (t3) + add t3, a0, t1 + csrr a1, vlenb lui a2, 1 - addiw a2, a2, 1320 - mul a0, a0, a2 - add a0, sp, a0 + addiw a2, a2, 1256 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, t3, s5 - vse64.v v24, (a1) - add a1, t3, s6 - csrr a0, vlenb + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t3) + add t3, a0, s5 + csrr a1, vlenb lui a2, 1 - addiw a2, a2, 1248 - mul a0, a0, a2 - add a0, sp, a0 + addiw a2, a2, 1120 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, t3, t4 - csrr a0, vlenb + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t3) + add t3, a0, s6 + csrr a1, vlenb lui a2, 1 - addiw a2, a2, 1160 - mul a0, a0, a2 - add a0, sp, a0 + addiw a2, a2, 1264 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, t3, s7 - csrr a0, vlenb + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t3) + add t3, a0, t4 + vse64.v v24, (t3) + add t3, a0, s7 + csrr a1, vlenb lui a2, 1 - addiw a2, a2, 1128 - mul a0, a0, a2 - add a0, sp, a0 + addiw a2, a2, 1248 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, t3, s8 - csrr a0, vlenb + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t3) + add t3, a0, s8 + csrr a1, vlenb lui a2, 1 - addiw a2, a2, 1240 - mul a0, a0, a2 - add a0, sp, a0 + addiw a2, a2, 1336 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, t3, t6 - csrr a0, vlenb + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t3) + add t3, a0, t6 + csrr a1, vlenb lui a2, 1 - addiw a2, a2, 1216 - mul a0, a0, a2 - add a0, sp, a0 + addiw a2, a2, 1312 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vse64.v v24, (a1) - add a1, t3, s9 - csrr a0, vlenb + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t3) + add t3, a0, s9 + csrr a1, vlenb lui a2, 1 - addiw a2, a2, 1312 - mul a0, a0, a2 - add a0, sp, a0 + addiw a2, a2, 1352 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, t3, s10 - csrr a0, vlenb + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t3) + add t3, a0, s10 + csrr a1, vlenb lui a2, 1 - addiw a2, a2, 1232 - mul a0, a0, a2 - add a0, sp, a0 + addiw a2, a2, 1240 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, t3, s11 - csrr a0, vlenb + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t3) + add t3, a0, s11 + csrr a1, vlenb lui a2, 1 - addiw a2, a2, 1120 - mul a0, a0, a2 - add a0, sp, a0 + addiw a2, a2, 1328 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) - add a1, t3, ra - csrr a0, vlenb + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t3) + add t3, a0, ra + csrr a1, vlenb lui a2, 1 - addiw a2, a2, 1152 - mul a0, a0, a2 - add a0, sp, a0 + addiw a2, a2, 1320 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) - addi a1, a5, 350 - andi a1, a1, 511 - slli a1, a1, 3 - add a1, t3, a1 - csrr a0, vlenb + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (t3) + addi t3, a5, 350 + andi t3, t3, 511 + slli t3, t3, 3 + add t3, a0, t3 + csrr a1, vlenb lui a2, 1 - addiw a2, a2, 1224 - mul a0, a0, a2 - add a0, sp, a0 + addiw a2, a2, 1232 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t3) + add a1, a1, a2 + vl8r.v v16, (a1) # Unknown-size Folded Reload + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1144 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 13 addiw a0, a0, 512 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v24, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1304 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 13 addiw a0, a0, 640 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1224 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 13 addiw a0, a0, 768 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1208 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 13 addiw a0, a0, 896 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1216 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 13 addiw a0, a0, 1024 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1136 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 13 addiw a0, a0, 1152 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1304 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1200 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 13 addiw a0, a0, 1280 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1352 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1296 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 13 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1288 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v0, (a0) lui a0, 13 addiw a0, a0, 1536 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1296 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1288 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 13 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1336 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1184 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 13 addiw a0, a0, 1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1344 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1344 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 13 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - li a3, 21 - slli a3, a3, 8 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1128 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload li a0, 27 slli a0, a0, 11 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1264 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + li a1, 21 + slli a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 14 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1272 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1176 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 14 addiw a0, a0, -1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1328 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) - fld fa3, 0(a1) + fld fa3, 0(t3) lui a0, 14 addiw a0, a0, 384 add a0, sp, a0 - add a1, a0, s2 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s3 - vse64.v v16, (a1) - add a1, a0, s4 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1256 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, t1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1320 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s5 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s6 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1248 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, t4 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s7 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s8 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1240 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, t6 - vse64.v v24, (a1) - add a1, a0, s9 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1312 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s10 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1232 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, a0, s11 - vse64.v v0, (a1) - add a1, a0, ra - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a1) - addi a1, a5, 375 - andi a1, a1, 511 - slli a1, a1, 3 - add a1, a0, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1224 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + add t3, a0, s2 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1168 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s3 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1272 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s4 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1160 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, t1 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1256 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s5 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1120 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s6 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1264 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, t4 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1152 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s7 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1248 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s8 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1336 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, t6 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1312 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s9 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1352 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s10 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1240 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s11 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1328 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, ra + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1320 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + addi t3, a5, 375 + andi t3, t3, 511 + slli t3, t3, 3 + add t3, a0, t3 + vse64.v v16, (a0) lui a0, 14 addiw a0, a0, 512 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v24, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1304 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 14 addiw a0, a0, 640 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1224 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 14 addiw a0, a0, 768 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v16, (a2) # Unknown-size Folded Reload - vse64.v v16, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1208 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 14 addiw a0, a0, 896 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1216 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 14 addiw a0, a0, 1024 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1136 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 14 addiw a0, a0, 1152 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1304 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1200 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 14 addiw a0, a0, 1280 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1352 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1296 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 14 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1288 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1192 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 14 addiw a0, a0, 1536 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1296 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1288 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 14 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1336 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1184 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 14 addiw a0, a0, 1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1344 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload vse64.v v24, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1344 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 14 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - li a3, 21 - slli a3, a3, 8 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1128 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload li a0, 29 slli a0, a0, 11 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1264 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + li a1, 21 + slli a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 15 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1272 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1176 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 15 addiw a0, a0, -1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1328 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a0) - fld fa2, 0(a1) + vse64.v v8, (a0) + fld fa2, 0(t3) lui a0, 15 addiw a0, a0, 384 add a0, sp, a0 - add a1, a0, s2 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1176 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a1) - add a1, a0, s3 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1136 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a1) - add a1, a0, s4 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1256 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a1) - add a1, a0, t1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1320 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a1) - add a1, a0, s5 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1168 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a1) - add a1, a0, s6 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1248 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a1) - add a1, a0, t4 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1160 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a1) - add a1, a0, s7 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1128 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a1) - add a1, a0, s8 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1240 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a1) - add a1, a0, t6 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1216 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a1) - add a1, a0, s9 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1312 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a1) - add a1, a0, s10 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1232 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a1) - add a1, a0, s11 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1120 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a1) - add a1, a0, ra - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1152 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a1) - addi a1, a5, 400 - andi a1, a1, 511 - slli a1, a1, 3 - add a1, a0, a1 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1224 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a0) + add t3, a0, s2 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1168 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s3 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1272 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s4 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1160 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, t1 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1256 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s5 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1120 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s6 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1264 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, t4 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1152 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s7 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1248 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s8 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1336 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, t6 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1312 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s9 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1352 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s10 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1240 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s11 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1328 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, ra + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1320 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + addi t3, a5, 400 + andi t3, t3, 511 + slli t3, t3, 3 + add t3, a0, t3 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1232 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1144 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 15 addiw a0, a0, 512 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1304 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 15 addiw a0, a0, 640 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1224 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 15 addiw a0, a0, 768 add a0, sp, a0 - vse64.v v16, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1208 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 15 addiw a0, a0, 896 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1184 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v16, (a2) # Unknown-size Folded Reload - vse64.v v16, (a0) + vse64.v v8, (a0) lui a0, 15 addiw a0, a0, 1024 add a0, sp, a0 - vse64.v v8, (a0) + vse64.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1136 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 15 addiw a0, a0, 1152 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1304 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload - vse64.v v24, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1200 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 15 addiw a0, a0, 1280 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1352 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1296 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 15 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1288 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1192 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 15 addiw a0, a0, 1536 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1296 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1288 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 15 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1336 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) lui a0, 15 addiw a0, a0, 1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1344 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v24, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1344 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 15 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - li a3, 21 - slli a3, a3, 8 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) li a0, 31 slli a0, a0, 11 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1264 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + li a1, 21 + slli a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 16 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1272 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload - vse64.v v8, (a0) - lui a0, 16 - addiw a0, a0, -1792 + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1176 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + lui a0, 16 + addiw a0, a0, -1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1328 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) - fld fa1, 0(a1) - add a1, t5, s2 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1176 - mul a0, a0, a2 + fld fa1, 0(t3) + lui a0, 16 + addiw a0, a0, 384 add a0, sp, a0 + add t3, a0, s2 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1168 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, t5, s3 - csrr a0, vlenb + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s3 + csrr a1, vlenb lui a2, 1 - addiw a2, a2, 1136 - mul a0, a0, a2 - add a0, sp, a0 + addiw a2, a2, 1272 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, t5, s4 - csrr a0, vlenb + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s4 + csrr a1, vlenb + lui a2, 1 + addiw a2, a2, 1160 + mul a1, a1, a2 + add a1, sp, a1 + lui a2, 31 + addiw a2, a2, -960 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, t1 + csrr a1, vlenb lui a2, 1 addiw a2, a2, 1256 - mul a0, a0, a2 - add a0, sp, a0 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, t5, t1 - csrr a0, vlenb + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s5 + csrr a1, vlenb lui a2, 1 - addiw a2, a2, 1320 - mul a0, a0, a2 - add a0, sp, a0 + addiw a2, a2, 1120 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, t5, s5 - csrr a0, vlenb + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s6 + csrr a1, vlenb lui a2, 1 - addiw a2, a2, 1168 - mul a0, a0, a2 - add a0, sp, a0 + addiw a2, a2, 1264 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, t5, s6 - csrr a0, vlenb + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, t4 + csrr a1, vlenb lui a2, 1 - addiw a2, a2, 1248 - mul a0, a0, a2 - add a0, sp, a0 + addiw a2, a2, 1152 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, t5, t4 - csrr a0, vlenb + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s7 + csrr a1, vlenb lui a2, 1 - addiw a2, a2, 1160 - mul a0, a0, a2 - add a0, sp, a0 + addiw a2, a2, 1248 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, t5, s7 - csrr a0, vlenb + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s8 + csrr a1, vlenb lui a2, 1 - addiw a2, a2, 1128 - mul a0, a0, a2 - add a0, sp, a0 + addiw a2, a2, 1336 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, t5, s8 - csrr a0, vlenb + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, t6 + csrr a1, vlenb lui a2, 1 - addiw a2, a2, 1240 - mul a0, a0, a2 - add a0, sp, a0 + addiw a2, a2, 1312 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, t5, t6 - csrr a0, vlenb + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s9 + csrr a1, vlenb lui a2, 1 - addiw a2, a2, 1216 - mul a0, a0, a2 - add a0, sp, a0 + addiw a2, a2, 1352 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, t5, s9 - vse64.v v0, (a1) - add a1, t5, s10 - csrr a0, vlenb + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s10 + csrr a1, vlenb lui a2, 1 - addiw a2, a2, 1232 - mul a0, a0, a2 - add a0, sp, a0 + addiw a2, a2, 1240 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, t5, s11 - csrr a0, vlenb + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, s11 + csrr a1, vlenb lui a2, 1 - addiw a2, a2, 1120 - mul a0, a0, a2 - add a0, sp, a0 + addiw a2, a2, 1328 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) - add a1, t5, ra - csrr a0, vlenb + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (t3) + add t3, a0, ra + csrr a1, vlenb lui a2, 1 - addiw a2, a2, 1152 - mul a0, a0, a2 - add a0, sp, a0 + addiw a2, a2, 1320 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (a1) - addi a1, a5, 425 - andi a1, a1, 511 - slli a1, a1, 3 - add a1, t5, a1 - csrr a0, vlenb + add a1, a1, a2 + vl8r.v v24, (a1) # Unknown-size Folded Reload + vse64.v v24, (t3) + addi t3, a5, 425 + andi t3, t3, 511 + slli t3, t3, 3 + add t3, a0, t3 + csrr a1, vlenb lui a2, 1 - addiw a2, a2, 1224 - mul a0, a0, a2 - add a0, sp, a0 + addiw a2, a2, 1232 + mul a1, a1, a2 + add a1, sp, a1 lui a2, 31 addiw a2, a2, -960 - add a0, a0, a2 + add a1, a1, a2 + vl8r.v v8, (a1) # Unknown-size Folded Reload + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1144 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t5) lui a0, 16 addiw a0, a0, 512 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1144 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1304 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 16 addiw a0, a0, 640 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1200 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1224 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 16 addiw a0, a0, 768 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1208 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1208 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 16 addiw a0, a0, 896 add a0, sp, a0 - vse64.v v16, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1216 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 16 addiw a0, a0, 1024 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1192 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v16, (a2) # Unknown-size Folded Reload - vse64.v v16, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1136 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 16 addiw a0, a0, 1152 add a0, sp, a0 - vse64.v v24, (a0) + vse64.v v8, (a0) lui a0, 16 addiw a0, a0, 1280 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1352 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v16, (a2) # Unknown-size Folded Reload - vse64.v v16, (a0) + vse64.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1296 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 16 addiw a0, a0, 1408 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1288 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v16, (a2) # Unknown-size Folded Reload - vse64.v v16, (a0) + vse64.v v24, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1192 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 16 addiw a0, a0, 1536 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1296 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v24, (a2) # Unknown-size Folded Reload vse64.v v24, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1288 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 16 addiw a0, a0, 1664 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1336 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a0) + vse64.v v24, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1184 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 16 addiw a0, a0, 1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1344 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a0) + vse64.v v24, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1344 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload lui a0, 16 addiw a0, a0, 1920 add a0, sp, a0 - csrr a2, vlenb - li a3, 21 - slli a3, a3, 8 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a0) + vse64.v v24, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1128 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload lui a0, 17 addiw a0, a0, -2048 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1264 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload vse64.v v0, (a0) lui a0, 17 addiw a0, a0, -1920 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1272 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1176 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 17 addiw a0, a0, -1792 add a0, sp, a0 - csrr a2, vlenb - lui a3, 1 - addiw a3, a3, 1328 - mul a2, a2, a3 - add a2, sp, a2 - lui a3, 31 - addiw a3, a3, -960 - add a2, a2, a3 - vl8r.v v0, (a2) # Unknown-size Folded Reload - vse64.v v0, (a0) - fld fa0, 0(a1) + vse64.v v16, (a0) + fld fa0, 0(t3) lui a0, 17 addiw a0, a0, 384 - add a2, sp, a0 - add a1, a2, s2 + add a1, sp, a0 + add t3, a1, s2 csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 1176 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, 1168 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) - add a1, a2, s3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 + vl8r.v v24, (a0) # Unknown-size Folded Reload + vse64.v v24, (t3) + add t3, a1, s3 csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 1136 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, 1272 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) - add a1, a2, s4 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 + vl8r.v v24, (a0) # Unknown-size Folded Reload + vse64.v v24, (t3) + add t3, a1, s4 csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 1256 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, 1160 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a1) - addi a1, a5, 450 - andi a1, a1, 511 - slli a1, a1, 3 - add a1, a2, a1 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 + vl8r.v v24, (a0) # Unknown-size Folded Reload + vse64.v v24, (t3) + addi t3, a5, 450 + andi t3, t3, 511 + slli t3, t3, 3 + add t3, a1, t3 csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 1224 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, 1232 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 - vl8r.v v0, (a0) # Unknown-size Folded Reload - vse64.v v0, (a2) + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vse64.v v16, (a1) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 1144 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 17 addiw a0, a0, 512 add a0, sp, a0 - csrr a3, vlenb - lui a4, 1 - addiw a4, a4, 1144 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 31 - addiw a4, a4, -960 - add a3, a3, a4 - vl8r.v v0, (a3) # Unknown-size Folded Reload - vse64.v v0, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 1304 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 17 addiw a0, a0, 640 add a0, sp, a0 - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 1224 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 17 addiw a0, a0, 768 add a0, sp, a0 - csrr a3, vlenb - lui a4, 1 - addiw a4, a4, 1208 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 31 - addiw a4, a4, -960 - add a3, a3, a4 - vl8r.v v8, (a3) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 1208 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 17 addiw a0, a0, 896 add a0, sp, a0 - csrr a3, vlenb - lui a4, 1 - addiw a4, a4, 1184 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 31 - addiw a4, a4, -960 - add a3, a3, a4 - vl8r.v v8, (a3) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 1216 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 + vl8r.v v16, (a0) # Unknown-size Folded Reload lui a0, 17 addiw a0, a0, 1024 add a0, sp, a0 - csrr a3, vlenb - lui a4, 1 - addiw a4, a4, 1192 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 31 - addiw a4, a4, -960 - add a3, a3, a4 - vl8r.v v8, (a3) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v16, (a0) lui a0, 17 addiw a0, a0, 1152 add a0, sp, a0 - csrr a3, vlenb - lui a4, 1 - addiw a4, a4, 1304 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 31 - addiw a4, a4, -960 - add a3, a3, a4 - vl8r.v v8, (a3) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 1200 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 17 addiw a0, a0, 1280 add a0, sp, a0 - csrr a3, vlenb - lui a4, 1 - addiw a4, a4, 1352 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 31 - addiw a4, a4, -960 - add a3, a3, a4 - vl8r.v v8, (a3) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 1296 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 17 addiw a0, a0, 1408 add a0, sp, a0 - vse64.v v16, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 1192 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 17 addiw a0, a0, 1536 add a0, sp, a0 - vse64.v v24, (a0) + vse64.v v8, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 1288 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 17 addiw a0, a0, 1664 add a0, sp, a0 - csrr a3, vlenb - lui a4, 1 - addiw a4, a4, 1336 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 31 - addiw a4, a4, -960 - add a3, a3, a4 - vl8r.v v8, (a3) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 1184 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 17 addiw a0, a0, 1792 add a0, sp, a0 - csrr a3, vlenb - lui a4, 1 - addiw a4, a4, 1344 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 31 - addiw a4, a4, -960 - add a3, a3, a4 - vl8r.v v8, (a3) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 1344 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 17 addiw a0, a0, 1920 add a0, sp, a0 - csrr a3, vlenb - li a4, 21 - slli a4, a4, 8 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 31 - addiw a4, a4, -960 - add a3, a3, a4 - vl8r.v v8, (a3) # Unknown-size Folded Reload vse64.v v8, (a0) lui a0, 18 addiw a0, a0, -2048 add a0, sp, a0 - csrr a3, vlenb - lui a4, 1 - addiw a4, a4, 1264 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 31 - addiw a4, a4, -960 - add a3, a3, a4 - vl8r.v v8, (a3) # Unknown-size Folded Reload - vse64.v v8, (a0) + vse64.v v0, (a0) + csrr a0, vlenb + li a2, 21 + slli a2, a2, 8 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 18 addiw a0, a0, -1920 add a0, sp, a0 - csrr a3, vlenb - lui a4, 1 - addiw a4, a4, 1272 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 31 - addiw a4, a4, -960 - add a3, a3, a4 - vl8r.v v8, (a3) # Unknown-size Folded Reload vse64.v v8, (a0) + csrr a0, vlenb + lui a2, 1 + addiw a2, a2, 1176 + mul a0, a0, a2 + add a0, sp, a0 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 + vl8r.v v8, (a0) # Unknown-size Folded Reload lui a0, 18 addiw a0, a0, -1792 add a0, sp, a0 - csrr a3, vlenb - lui a4, 1 - addiw a4, a4, 1328 - mul a3, a3, a4 - add a3, sp, a3 - lui a4, 31 - addiw a4, a4, -960 - add a3, a3, a4 - vl8r.v v8, (a3) # Unknown-size Folded Reload vse64.v v8, (a0) - add t1, a2, t1 + add t1, a1, t1 csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 1320 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, 1256 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t1) - add t1, a2, s5 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 + vl8r.v v24, (a0) # Unknown-size Folded Reload + vse64.v v24, (t1) + add t1, a1, s5 csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 1168 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, 1120 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t1) - add t1, a2, s6 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 + vl8r.v v24, (a0) # Unknown-size Folded Reload + vse64.v v24, (t1) + add t1, a1, s6 csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 1248 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, 1264 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vl8r.v v8, (a0) # Unknown-size Folded Reload vse64.v v8, (t1) - add t1, a2, t4 + add t1, a1, t4 csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 1160 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, 1152 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vl8r.v v8, (a0) # Unknown-size Folded Reload vse64.v v8, (t1) - add t1, a2, s7 + add t1, a1, s7 csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 1128 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, 1248 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vl8r.v v8, (a0) # Unknown-size Folded Reload vse64.v v8, (t1) - add t1, a2, s8 + add t1, a1, s8 csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 1240 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, 1336 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vl8r.v v8, (a0) # Unknown-size Folded Reload vse64.v v8, (t1) - add t6, a2, t6 - csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 1216 - mul a0, a0, a3 - add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t6) - add t1, a2, s9 + add t6, a1, t6 csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 1312 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, 1312 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (t1) - add t1, a2, s10 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vse64.v v16, (t6) + add t1, a1, s9 csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 1232 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, 1352 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vl8r.v v8, (a0) # Unknown-size Folded Reload vse64.v v8, (t1) - add t1, a2, s11 + add t1, a1, s10 csrr a0, vlenb - lui a3, 1 - addiw a3, a3, 1120 - mul a0, a0, a3 + lui a2, 1 + addiw a2, a2, 1240 + mul a0, a0, a2 add a0, sp, a0 - lui a3, 31 - addiw a3, a3, -960 - add a0, a0, a3 + lui a2, 31 + addiw a2, a2, -960 + add a0, a0, a2 vl8r.v v8, (a0) # Unknown-size Folded Reload vse64.v v8, (t1) - add t1, a2, ra + add t1, a1, s11 csrr a0, vlenb lui a2, 1 - addiw a2, a2, 1152 + addiw a2, a2, 1328 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 @@ -196986,27 +196766,38 @@ add a0, a0, a2 vl8r.v v8, (a0) # Unknown-size Folded Reload vse64.v v8, (t1) - fld ft0, 0(a1) - vsetivli zero, 2, e64, m8, tu, ma + add t1, a1, ra csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1032 + addiw a1, a1, 1320 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v24, (a0) # Unknown-size Folded Reload + vl8r.v v8, (a0) # Unknown-size Folded Reload + vse64.v v8, (t1) + fld ft0, 0(t3) + vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1112 + addiw a1, a1, 1104 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v24, 1 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1032 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v0, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb li a1, 3 @@ -197016,8 +196807,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v24, 2 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v0, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197027,8 +196818,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v24, 3 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v0, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197038,8 +196829,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v24, 4 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v0, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197049,8 +196840,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v24, 5 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v0, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197060,8 +196851,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v24, 6 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v0, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197071,8 +196862,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v24, 7 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v0, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197082,8 +196873,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v24, 8 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v0, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197093,8 +196884,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v24, 9 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v0, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197104,8 +196895,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v24, 10 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v0, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197115,8 +196906,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v24, 11 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v0, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197126,8 +196917,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v24, 12 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v0, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197137,8 +196928,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v24, 13 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v0, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb li a1, 13 @@ -197148,8 +196939,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v24, 14 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v0, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 @@ -197159,14 +196950,14 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v24, 15 - addi a0, sp, 384 - vse64.v v8, (a0) + vl8r.v v0, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v0, 15 + addi t5, sp, 384 + vse64.v v8, (t5) vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 960 + addiw a1, a1, 1112 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -197181,8 +196972,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v24, 1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v8, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197274,7 +197065,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 896 + addiw a1, a1, 904 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -197285,7 +197076,7 @@ vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 904 + addiw a1, a1, 912 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -197296,7 +197087,7 @@ vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 912 + addiw a1, a1, 920 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -197307,7 +197098,7 @@ vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 920 + addiw a1, a1, 928 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -197348,7 +197139,7 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload + vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 addiw a1, a1, -960 @@ -197357,8 +197148,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 1 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197368,8 +197159,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 2 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197379,8 +197170,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 3 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197390,8 +197181,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 4 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197401,8 +197192,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 5 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197412,8 +197203,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 6 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197423,8 +197214,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 7 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197434,8 +197225,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 8 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197445,8 +197236,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 9 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197456,8 +197247,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 10 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197467,8 +197258,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 11 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197478,8 +197269,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 12 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197489,8 +197280,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 13 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb li a1, 15 @@ -197500,8 +197291,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 14 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 @@ -197511,10 +197302,10 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 15 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 15 addi a0, sp, 640 - vse64.v v16, (a0) + vse64.v v8, (a0) vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197538,7 +197329,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 928 + addiw a1, a1, 936 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -197700,7 +197491,7 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v24, (a0) # Unknown-size Folded Reload + vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 addiw a1, a1, -864 @@ -197709,8 +197500,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v24, v8, 1 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197720,8 +197511,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v24, v8, 2 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197731,8 +197522,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v24, v8, 3 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197742,8 +197533,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v24, v8, 4 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197753,8 +197544,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v24, v8, 5 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197764,8 +197555,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v24, v8, 6 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197775,8 +197566,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v24, v8, 7 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197786,8 +197577,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v24, v8, 8 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197797,8 +197588,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v24, v8, 9 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197808,19 +197599,19 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v24, v8, 10 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 944 + addiw a1, a1, 952 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v24, v8, 11 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197830,8 +197621,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v24, v8, 12 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197841,8 +197632,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v24, v8, 13 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197852,8 +197643,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v24, v8, 14 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 @@ -197863,10 +197654,10 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v24, v8, 15 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 15 addi a0, sp, 896 - vse64.v v24, (a0) + vse64.v v8, (a0) vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb li a1, 5 @@ -197962,8 +197753,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 8 + vl8r.v v24, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v24, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197973,8 +197764,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 9 + vl8r.v v24, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v24, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197984,8 +197775,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 10 + vl8r.v v24, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v24, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -197995,8 +197786,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 11 + vl8r.v v24, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v24, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -198006,8 +197797,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 12 + vl8r.v v24, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v24, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -198017,8 +197808,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 13 + vl8r.v v24, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v24, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 @@ -198028,8 +197819,8 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 14 + vl8r.v v24, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v24, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 @@ -198039,13 +197830,715 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 15 + vl8r.v v24, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v24, 15 addi a0, sp, 1024 vse64.v v16, (a0) vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 + addiw a1, a1, 1064 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -328 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vslideup.vi v24, v8, 1 + vsetivli zero, 3, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -304 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vslideup.vi v24, v8, 2 + vsetivli zero, 4, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -344 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vslideup.vi v24, v8, 3 + vsetivli zero, 5, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 944 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vslideup.vi v24, v8, 4 + vsetivli zero, 6, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -712 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vslideup.vi v24, v8, 5 + vsetivli zero, 7, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -704 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vslideup.vi v24, v8, 6 + vsetivli zero, 8, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -696 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vslideup.vi v24, v8, 7 + vsetivli zero, 9, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -424 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vslideup.vi v24, v0, 8 + vsetivli zero, 10, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -416 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vslideup.vi v24, v0, 9 + vsetivli zero, 11, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -408 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vslideup.vi v24, v0, 10 + vsetivli zero, 12, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -400 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vslideup.vi v24, v0, 11 + vsetivli zero, 13, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -392 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vslideup.vi v24, v0, 12 + vsetivli zero, 14, e64, m8, tu, ma + csrr a0, vlenb + li a1, 29 + slli a1, a1, 7 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vslideup.vi v24, v0, 13 + vsetivli zero, 15, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -376 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vslideup.vi v24, v0, 14 + vsetivli zero, 16, e64, m8, ta, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -368 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vslideup.vi v24, v0, 15 + addi a0, sp, 1152 + vse64.v v24, (a0) + vsetivli zero, 2, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1032 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -648 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v8, 1 + vsetivli zero, 3, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -632 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v8, 2 + vsetivli zero, 4, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -616 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v8, 3 + vsetivli zero, 5, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -152 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v8, 4 + vsetivli zero, 6, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -184 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v8, 5 + vsetivli zero, 7, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -168 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v8, 6 + vsetivli zero, 8, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -136 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v8, 7 + vsetivli zero, 9, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 192 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v24, 8 + vsetivli zero, 10, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 216 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v24, 9 + vsetivli zero, 11, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 232 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v24, 10 + vsetivli zero, 12, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 248 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v24, 11 + vsetivli zero, 13, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 208 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v24, 12 + vsetivli zero, 14, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 968 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v24, 13 + vsetivli zero, 15, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -240 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v24, 14 + vsetivli zero, 16, e64, m8, ta, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -232 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v24, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v24, 15 + addi t0, sp, 1280 + vse64.v v16, (t0) + vsetivli zero, 2, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1048 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -584 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 1 + vsetivli zero, 3, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -568 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 2 + vsetivli zero, 4, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -552 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 3 + vsetivli zero, 5, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -536 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 4 + vsetivli zero, 6, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -528 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 5 + vsetivli zero, 7, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -520 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 6 + vsetivli zero, 8, e64, m8, tu, ma + csrr a0, vlenb + li a1, 7 + slli a1, a1, 9 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 7 + vsetivli zero, 9, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -144 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v0, 8 + vsetivli zero, 10, e64, m8, tu, ma + csrr a0, vlenb + li a1, 31 + slli a1, a1, 7 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v0, 9 + vsetivli zero, 11, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -120 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v0, 10 + vsetivli zero, 12, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -104 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v0, 11 + vsetivli zero, 13, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -88 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v0, 12 + vsetivli zero, 14, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 400 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v0, 13 + vsetivli zero, 15, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 368 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v0, 14 + vsetivli zero, 16, e64, m8, ta, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 384 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v0, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v0, 15 + addi a7, sp, 1408 + vse64.v v8, (a7) + vsetivli zero, 2, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1080 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -48 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 1 + vsetivli zero, 3, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -24 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 2 + vsetivli zero, 4, e64, m8, tu, ma + csrr a0, vlenb + slli a0, a0, 12 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 3 + vsetivli zero, 5, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 32 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 4 + vsetivli zero, 6, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 5 + vsetivli zero, 7, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 960 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 6 + vsetivli zero, 8, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -432 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 7 + vsetivli zero, 9, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -72 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 8 + vsetivli zero, 10, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -64 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 9 + vsetivli zero, 11, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -56 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 10 + vsetivli zero, 12, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -40 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 11 + vsetivli zero, 13, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 12 + vsetivli zero, 14, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 13 + vsetivli zero, 15, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 48 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 14 + vsetivli zero, 16, e64, m8, ta, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 72 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 15 + addi a6, sp, 1536 + vse64.v v8, (a6) + vsetivli zero, 2, e64, m8, tu, ma + csrr a0, vlenb + lui a1, 1 addiw a1, a1, 1056 mul a0, a0, a1 add a0, sp, a0 @@ -198055,7 +198548,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -328 + addiw a1, a1, -360 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198066,7 +198559,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -304 + addiw a1, a1, -352 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198077,7 +198570,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -344 + addiw a1, a1, -336 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198088,7 +198581,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 936 + addiw a1, a1, -320 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198099,7 +198592,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -712 + addiw a1, a1, -296 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198110,7 +198603,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -704 + addiw a1, a1, 168 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198121,7 +198614,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -696 + addiw a1, a1, 144 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198132,7 +198625,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -424 + addiw a1, a1, 432 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198143,7 +198636,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -416 + addiw a1, a1, 440 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198154,7 +198647,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -408 + addiw a1, a1, 448 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198165,7 +198658,7 @@ vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -400 + addiw a1, a1, 464 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198176,7 +198669,7 @@ vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -392 + addiw a1, a1, 472 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198186,8 +198679,8 @@ vslideup.vi v8, v16, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb - li a1, 29 - slli a1, a1, 7 + lui a1, 1 + addiw a1, a1, 488 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198198,7 +198691,7 @@ vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -376 + addiw a1, a1, 456 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198209,7 +198702,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -368 + addiw a1, a1, 520 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198217,12 +198710,12 @@ add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 15 - addi a0, sp, 1152 - vse64.v v8, (a0) + addi a4, sp, 1664 + vse64.v v8, (a4) vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1032 + addiw a1, a1, 1072 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198231,7 +198724,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -648 + addiw a1, a1, -224 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198242,7 +198735,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -632 + addiw a1, a1, -216 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198253,7 +198746,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -616 + addiw a1, a1, -208 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198264,7 +198757,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -152 + addiw a1, a1, -200 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198275,7 +198768,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -184 + addiw a1, a1, -192 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198286,7 +198779,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -168 + addiw a1, a1, -176 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198297,7 +198790,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -136 + addiw a1, a1, -160 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198352,7 +198845,7 @@ vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 216 + addiw a1, a1, 264 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198363,7 +198856,7 @@ vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 968 + addiw a1, a1, 272 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198374,7 +198867,7 @@ vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -240 + addiw a1, a1, 280 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198385,7 +198878,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -232 + addiw a1, a1, 632 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198393,188 +198886,188 @@ add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload vslideup.vi v8, v16, 15 - addi a0, sp, 1280 - vse64.v v8, (a0) + addi a3, sp, 1792 + vse64.v v8, (a3) vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1048 + addiw a1, a1, 1088 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload + vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -584 + addiw a1, a1, 288 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 1 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 1 vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -568 + addiw a1, a1, 296 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 2 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -552 + addiw a1, a1, 304 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 3 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 3 vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -536 + addiw a1, a1, 320 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 4 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 4 vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -528 + addiw a1, a1, 336 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 5 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 5 vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -520 + addiw a1, a1, 352 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 6 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 6 vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb - li a1, 7 - slli a1, a1, 9 + lui a1, 1 + addiw a1, a1, 312 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 7 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -144 + addiw a1, a1, 984 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 8 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 8 vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb - li a1, 31 - slli a1, a1, 7 + lui a1, 1 + addiw a1, a1, 328 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 9 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 9 vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -120 + addiw a1, a1, 344 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 10 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 10 vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -104 + addiw a1, a1, 360 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 11 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -88 + addiw a1, a1, 376 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 12 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 12 vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 408 + addiw a1, a1, 392 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 13 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 13 vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 376 + addiw a1, a1, 408 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 14 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 14 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 392 + addiw a1, a1, 416 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslideup.vi v16, v8, 15 - addi a0, sp, 1408 - vse64.v v16, (a0) + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 15 + addi a2, sp, 1920 + vse64.v v8, (a2) vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1072 + addiw a1, a1, 424 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198583,7 +199076,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, -48 + addiw a1, a1, -32 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198594,7 +199087,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -24 + addiw a1, a1, 8 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198604,7 +199097,9 @@ vslideup.vi v8, v16, 2 vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb - slli a0, a0, 12 + lui a1, 1 + addiw a1, a1, 24 + mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 @@ -198614,7 +199109,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 32 + addiw a1, a1, 56 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198625,7 +199120,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -16 + addiw a1, a1, 80 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198636,7 +199131,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 952 + addiw a1, a1, 104 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198647,7 +199142,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -432 + addiw a1, a1, 120 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198657,8 +199152,8 @@ vslideup.vi v8, v16, 7 vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -72 + li a1, 19 + slli a1, a1, 8 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198669,7 +199164,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -64 + addiw a1, a1, 744 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198680,7 +199175,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -56 + addiw a1, a1, 752 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198691,7 +199186,7 @@ vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -40 + addiw a1, a1, 776 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198702,7 +199197,7 @@ vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -8 + addiw a1, a1, 784 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198713,7 +199208,7 @@ vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 16 + addiw a1, a1, 792 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -198724,92 +199219,2391 @@ vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 48 + addiw a1, a1, 800 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 14 + vsetivli zero, 16, e64, m8, ta, ma + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 808 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 15 + addi a1, sp, 2047 + addi a1, a1, 1 + vse64.v v8, (a1) + vsetivli zero, 2, e64, m8, tu, ma + csrr a0, vlenb + lui t1, 1 + addiw t1, t1, 1096 + mul a0, a0, t1 + add a0, sp, a0 + lui t1, 31 + addiw t1, t1, -960 + add a0, a0, t1 + vl8r.v v16, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + lui t1, 1 + addiw t1, t1, 976 + mul a0, a0, t1 + add a0, sp, a0 + lui t1, 31 + addiw t1, t1, -960 + add a0, a0, t1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v8, 1 + vsetivli zero, 3, e64, m8, tu, ma + csrr a0, vlenb + lui t1, 1 + addiw t1, t1, 128 + mul a0, a0, t1 + add a0, sp, a0 + lui t1, 31 + addiw t1, t1, -960 + add a0, a0, t1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v8, 2 + vsetivli zero, 4, e64, m8, tu, ma + csrr a0, vlenb + lui t1, 1 + addiw t1, t1, 136 + mul a0, a0, t1 + add a0, sp, a0 + lui t1, 31 + addiw t1, t1, -960 + add a0, a0, t1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v8, 3 + vsetivli zero, 5, e64, m8, tu, ma + csrr a0, vlenb + lui t1, 1 + addiw t1, t1, 152 + mul a0, a0, t1 + add a0, sp, a0 + lui t1, 31 + addiw t1, t1, -960 + add a0, a0, t1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v8, 4 + vsetivli zero, 6, e64, m8, tu, ma + csrr a0, vlenb + lui t1, 1 + addiw t1, t1, 160 + mul a0, a0, t1 + add a0, sp, a0 + lui t1, 31 + addiw t1, t1, -960 + add a0, a0, t1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v8, 5 + vsetivli zero, 7, e64, m8, tu, ma + csrr a0, vlenb + lui t1, 1 + addiw t1, t1, 176 + mul a0, a0, t1 + add a0, sp, a0 + lui t1, 31 + addiw t1, t1, -960 + add a0, a0, t1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v8, 6 + vsetivli zero, 8, e64, m8, tu, ma + csrr a0, vlenb + lui t1, 1 + addiw t1, t1, 184 + mul a0, a0, t1 + add a0, sp, a0 + lui t1, 31 + addiw t1, t1, -960 + add a0, a0, t1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v8, 7 + vsetivli zero, 9, e64, m8, tu, ma + csrr a0, vlenb + lui t1, 1 + addiw t1, t1, 480 + mul a0, a0, t1 + add a0, sp, a0 + lui t1, 31 + addiw t1, t1, -960 + add a0, a0, t1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v8, 8 + vsetivli zero, 10, e64, m8, tu, ma + csrr a0, vlenb + lui t1, 1 + addiw t1, t1, 496 + mul a0, a0, t1 + add a0, sp, a0 + lui t1, 31 + addiw t1, t1, -960 + add a0, a0, t1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v8, 9 + vsetivli zero, 11, e64, m8, tu, ma + csrr a0, vlenb + lui t1, 1 + addiw t1, t1, 504 + mul a0, a0, t1 + add a0, sp, a0 + lui t1, 31 + addiw t1, t1, -960 + add a0, a0, t1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v8, 10 + vsetivli zero, 12, e64, m8, tu, ma + csrr a0, vlenb + lui t1, 1 + addiw t1, t1, 528 + mul a0, a0, t1 + add a0, sp, a0 + lui t1, 31 + addiw t1, t1, -960 + add a0, a0, t1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v8, 11 + vsetivli zero, 13, e64, m8, tu, ma + csrr a0, vlenb + lui t1, 1 + addiw t1, t1, 536 + mul a0, a0, t1 + add a0, sp, a0 + lui t1, 31 + addiw t1, t1, -960 + add a0, a0, t1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v8, 12 + vsetivli zero, 14, e64, m8, tu, ma + csrr a0, vlenb + lui t1, 1 + addiw t1, t1, 552 + mul a0, a0, t1 + add a0, sp, a0 + lui t1, 31 + addiw t1, t1, -960 + add a0, a0, t1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v8, 13 + vsetivli zero, 15, e64, m8, tu, ma + csrr a0, vlenb + lui t1, 1 + addiw t1, t1, 568 + mul a0, a0, t1 + add a0, sp, a0 + lui t1, 31 + addiw t1, t1, -960 + add a0, a0, t1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v8, 14 + vsetivli zero, 16, e64, m8, ta, ma + csrr a0, vlenb + lui t1, 1 + addiw t1, t1, 592 + mul a0, a0, t1 + add a0, sp, a0 + lui t1, 31 + addiw t1, t1, -960 + add a0, a0, t1 + vl8r.v v8, (a0) # Unknown-size Folded Reload + vslideup.vi v16, v8, 15 + addi a0, sp, 2047 + addi a0, a0, 129 + vse64.v v16, (a0) + vsetivli zero, 2, e64, m8, tu, ma + csrr t1, vlenb + lui t2, 1 + addiw t2, t2, 672 + mul t1, t1, t2 + add t1, sp, t1 + lui t2, 31 + addiw t2, t2, -960 + add t1, t1, t2 + vl8r.v v8, (t1) # Unknown-size Folded Reload + csrr t1, vlenb + lui t2, 1 + addiw t2, t2, 576 + mul t1, t1, t2 + add t1, sp, t1 + lui t2, 31 + addiw t2, t2, -960 + add t1, t1, t2 + vl8r.v v16, (t1) # Unknown-size Folded Reload + vslideup.vi v8, v16, 1 + vsetivli zero, 3, e64, m8, tu, ma + csrr t1, vlenb + lui t2, 1 + addiw t2, t2, 544 + mul t1, t1, t2 + add t1, sp, t1 + lui t2, 31 + addiw t2, t2, -960 + add t1, t1, t2 + vl8r.v v16, (t1) # Unknown-size Folded Reload + vslideup.vi v8, v16, 2 + vsetivli zero, 4, e64, m8, tu, ma + csrr t1, vlenb + lui t2, 1 + addiw t2, t2, 560 + mul t1, t1, t2 + add t1, sp, t1 + lui t2, 31 + addiw t2, t2, -960 + add t1, t1, t2 + vl8r.v v16, (t1) # Unknown-size Folded Reload + vslideup.vi v8, v16, 3 + vsetivli zero, 5, e64, m8, tu, ma + csrr t1, vlenb + lui t2, 1 + addiw t2, t2, 584 + mul t1, t1, t2 + add t1, sp, t1 + lui t2, 31 + addiw t2, t2, -960 + add t1, t1, t2 + vl8r.v v16, (t1) # Unknown-size Folded Reload + vslideup.vi v8, v16, 4 + vsetivli zero, 6, e64, m8, tu, ma + csrr t1, vlenb + lui t2, 1 + addiw t2, t2, 600 + mul t1, t1, t2 + add t1, sp, t1 + lui t2, 31 + addiw t2, t2, -960 + add t1, t1, t2 + vl8r.v v16, (t1) # Unknown-size Folded Reload + vslideup.vi v8, v16, 5 + vsetivli zero, 7, e64, m8, tu, ma + csrr t1, vlenb + lui t2, 1 + addiw t2, t2, 608 + mul t1, t1, t2 + add t1, sp, t1 + lui t2, 31 + addiw t2, t2, -960 + add t1, t1, t2 + vl8r.v v16, (t1) # Unknown-size Folded Reload + vslideup.vi v8, v16, 6 + vsetivli zero, 8, e64, m8, tu, ma + csrr t1, vlenb + lui t2, 1 + addiw t2, t2, 616 + mul t1, t1, t2 + add t1, sp, t1 + lui t2, 31 + addiw t2, t2, -960 + add t1, t1, t2 + vl8r.v v16, (t1) # Unknown-size Folded Reload + vslideup.vi v8, v16, 7 + vsetivli zero, 9, e64, m8, tu, ma + csrr t1, vlenb + lui t2, 1 + addiw t2, t2, 824 + mul t1, t1, t2 + add t1, sp, t1 + lui t2, 31 + addiw t2, t2, -960 + add t1, t1, t2 + vl8r.v v16, (t1) # Unknown-size Folded Reload + vslideup.vi v8, v16, 8 + vsetivli zero, 10, e64, m8, tu, ma + csrr t1, vlenb + lui t2, 1 + addiw t2, t2, 816 + mul t1, t1, t2 + add t1, sp, t1 + lui t2, 31 + addiw t2, t2, -960 + add t1, t1, t2 + vl8r.v v16, (t1) # Unknown-size Folded Reload + vslideup.vi v8, v16, 9 + vsetivli zero, 11, e64, m8, tu, ma + csrr t1, vlenb + lui t2, 1 + addiw t2, t2, 992 + mul t1, t1, t2 + add t1, sp, t1 + lui t2, 31 + addiw t2, t2, -960 + add t1, t1, t2 + vl8r.v v16, (t1) # Unknown-size Folded Reload + vslideup.vi v8, v16, 10 + vsetivli zero, 12, e64, m8, tu, ma + csrr t1, vlenb + lui t2, 1 + addiw t2, t2, 624 + mul t1, t1, t2 + add t1, sp, t1 + lui t2, 31 + addiw t2, t2, -960 + add t1, t1, t2 + vl8r.v v16, (t1) # Unknown-size Folded Reload + vslideup.vi v8, v16, 11 + vsetivli zero, 13, e64, m8, tu, ma + csrr t1, vlenb + lui t2, 1 + addiw t2, t2, 640 + mul t1, t1, t2 + add t1, sp, t1 + lui t2, 31 + addiw t2, t2, -960 + add t1, t1, t2 + vl8r.v v16, (t1) # Unknown-size Folded Reload + vslideup.vi v8, v16, 12 + vsetivli zero, 14, e64, m8, tu, ma + csrr t1, vlenb + lui t2, 1 + addiw t2, t2, 648 + mul t1, t1, t2 + add t1, sp, t1 + lui t2, 31 + addiw t2, t2, -960 + add t1, t1, t2 + vl8r.v v16, (t1) # Unknown-size Folded Reload + vslideup.vi v8, v16, 13 + vsetivli zero, 15, e64, m8, tu, ma + csrr t1, vlenb + lui t2, 1 + addiw t2, t2, 656 + mul t1, t1, t2 + add t1, sp, t1 + lui t2, 31 + addiw t2, t2, -960 + add t1, t1, t2 + vl8r.v v16, (t1) # Unknown-size Folded Reload + vslideup.vi v8, v16, 14 + vsetivli zero, 16, e64, m8, ta, ma + csrr t1, vlenb + lui t2, 1 + addiw t2, t2, 664 + mul t1, t1, t2 + add t1, sp, t1 + lui t2, 31 + addiw t2, t2, -960 + add t1, t1, t2 + vl8r.v v16, (t1) # Unknown-size Folded Reload + vslideup.vi v8, v16, 15 + addi t2, sp, 2047 + addi t2, t2, 257 + vse64.v v8, (t2) + vsetivli zero, 2, e64, m8, tu, ma + csrr t1, vlenb + li t3, 9 + slli t3, t3, 9 + mul t1, t1, t3 + add t1, sp, t1 + lui t3, 31 + addiw t3, t3, -960 + add t1, t1, t3 + vl8r.v v8, (t1) # Unknown-size Folded Reload + csrr t1, vlenb + lui t3, 1 + addiw t3, t3, 680 + mul t1, t1, t3 + add t1, sp, t1 + lui t3, 31 + addiw t3, t3, -960 + add t1, t1, t3 + vl8r.v v16, (t1) # Unknown-size Folded Reload + vslideup.vi v8, v16, 1 + vsetivli zero, 3, e64, m8, tu, ma + csrr t1, vlenb + lui t3, 1 + addiw t3, t3, 688 + mul t1, t1, t3 + add t1, sp, t1 + lui t3, 31 + addiw t3, t3, -960 + add t1, t1, t3 + vl8r.v v16, (t1) # Unknown-size Folded Reload + vslideup.vi v8, v16, 2 + vsetivli zero, 4, e64, m8, tu, ma + csrr t1, vlenb + lui t3, 1 + addiw t3, t3, 696 + mul t1, t1, t3 + add t1, sp, t1 + lui t3, 31 + addiw t3, t3, -960 + add t1, t1, t3 + vl8r.v v16, (t1) # Unknown-size Folded Reload + vslideup.vi v8, v16, 3 + vsetivli zero, 5, e64, m8, tu, ma + csrr t1, vlenb + lui t3, 1 + addiw t3, t3, 704 + mul t1, t1, t3 + add t1, sp, t1 + lui t3, 31 + addiw t3, t3, -960 + add t1, t1, t3 + vl8r.v v16, (t1) # Unknown-size Folded Reload + vslideup.vi v8, v16, 4 + vsetivli zero, 6, e64, m8, tu, ma + csrr t1, vlenb + lui t3, 1 + addiw t3, t3, 712 + mul t1, t1, t3 + add t1, sp, t1 + lui t3, 31 + addiw t3, t3, -960 + add t1, t1, t3 + vl8r.v v16, (t1) # Unknown-size Folded Reload + vslideup.vi v8, v16, 5 + vsetivli zero, 7, e64, m8, tu, ma + csrr t1, vlenb + lui t3, 1 + addiw t3, t3, 720 + mul t1, t1, t3 + add t1, sp, t1 + lui t3, 31 + addiw t3, t3, -960 + add t1, t1, t3 + vl8r.v v16, (t1) # Unknown-size Folded Reload + vslideup.vi v8, v16, 6 + vsetivli zero, 8, e64, m8, tu, ma + csrr t1, vlenb + lui t3, 1 + addiw t3, t3, 728 + mul t1, t1, t3 + add t1, sp, t1 + lui t3, 31 + addiw t3, t3, -960 + add t1, t1, t3 + vl8r.v v16, (t1) # Unknown-size Folded Reload + vslideup.vi v8, v16, 7 + vsetivli zero, 9, e64, m8, tu, ma + csrr t1, vlenb + lui t3, 1 + addiw t3, t3, 736 + mul t1, t1, t3 + add t1, sp, t1 + lui t3, 31 + addiw t3, t3, -960 + add t1, t1, t3 + vl8r.v v16, (t1) # Unknown-size Folded Reload + vslideup.vi v8, v16, 8 + vsetivli zero, 10, e64, m8, tu, ma + csrr t1, vlenb + lui t3, 1 + addiw t3, t3, 760 + mul t1, t1, t3 + add t1, sp, t1 + lui t3, 31 + addiw t3, t3, -960 + add t1, t1, t3 + vl8r.v v16, (t1) # Unknown-size Folded Reload + vslideup.vi v8, v16, 9 + vsetivli zero, 11, e64, m8, tu, ma + csrr t1, vlenb + lui t3, 1 + addiw t3, t3, 848 + mul t1, t1, t3 + add t1, sp, t1 + lui t3, 31 + addiw t3, t3, -960 + add t1, t1, t3 + vl8r.v v16, (t1) # Unknown-size Folded Reload + vslideup.vi v8, v16, 10 + vsetivli zero, 12, e64, m8, tu, ma + csrr t1, vlenb + lui t3, 1 + addiw t3, t3, 832 + mul t1, t1, t3 + add t1, sp, t1 + lui t3, 31 + addiw t3, t3, -960 + add t1, t1, t3 + vl8r.v v16, (t1) # Unknown-size Folded Reload + vslideup.vi v8, v16, 11 + vsetivli zero, 13, e64, m8, tu, ma + csrr t1, vlenb + lui t3, 1 + addiw t3, t3, 840 + mul t1, t1, t3 + add t1, sp, t1 + lui t3, 31 + addiw t3, t3, -960 + add t1, t1, t3 + vl8r.v v16, (t1) # Unknown-size Folded Reload + vslideup.vi v8, v16, 12 + vsetivli zero, 14, e64, m8, tu, ma + csrr t1, vlenb + lui t3, 1 + addiw t3, t3, 856 + mul t1, t1, t3 + add t1, sp, t1 + lui t3, 31 + addiw t3, t3, -960 + add t1, t1, t3 + vl8r.v v16, (t1) # Unknown-size Folded Reload + vslideup.vi v8, v16, 13 + vsetivli zero, 15, e64, m8, tu, ma + csrr t1, vlenb + lui t3, 1 + addiw t3, t3, 864 + mul t1, t1, t3 + add t1, sp, t1 + lui t3, 31 + addiw t3, t3, -960 + add t1, t1, t3 + vl8r.v v16, (t1) # Unknown-size Folded Reload vslideup.vi v8, v16, 14 vsetivli zero, 16, e64, m8, ta, ma + csrr t1, vlenb + lui t3, 1 + addiw t3, t3, 880 + mul t1, t1, t3 + add t1, sp, t1 + lui t3, 31 + addiw t3, t3, -960 + add t1, t1, t3 + vl8r.v v16, (t1) # Unknown-size Folded Reload + vslideup.vi v8, v16, 15 + fld ft2, 240(sp) # 8-byte Folded Reload + fmadd.d fs0, fs0, ft2, ft1 + fld ft2, 232(sp) # 8-byte Folded Reload + fmadd.d fs0, fs1, ft2, fs0 + fld ft2, 216(sp) # 8-byte Folded Reload + fmadd.d fs0, fs2, ft2, fs0 + fld ft2, 208(sp) # 8-byte Folded Reload + fmadd.d fs0, fs3, ft2, fs0 + fld ft2, 200(sp) # 8-byte Folded Reload + fmadd.d fs0, fs4, ft2, fs0 + fld ft2, 192(sp) # 8-byte Folded Reload + fmadd.d fs0, fs5, ft2, fs0 + fld ft2, 184(sp) # 8-byte Folded Reload + fmadd.d fs0, fs6, ft2, fs0 + fld ft2, 224(sp) # 8-byte Folded Reload + fmadd.d fs0, fs7, ft2, fs0 + fmadd.d fs0, fs8, ft3, fs0 + fmadd.d fs0, fs9, ft4, fs0 + fmadd.d fs0, fs10, ft5, fs0 + fmadd.d fs0, fs11, ft6, fs0 + fmadd.d fa5, fa5, ft7, fs0 + fmadd.d fa5, fa4, fa6, fa5 + fmadd.d fa5, fa3, fa7, fa5 + fmadd.d fa5, fa2, ft8, fa5 + fmadd.d fa5, fa1, ft9, fa5 + fmadd.d fa5, fa0, ft10, fa5 + fmadd.d fa5, ft0, ft11, fa5 + ld t1, 248(sp) # 8-byte Folded Reload + add t1, t1, a5 + andi t1, t1, 511 + slli t1, t1, 3 + add t1, t5, t1 + add t3, t5, s2 + vse64.v v8, (t3) + vsetivli zero, 2, e64, m8, tu, ma + sd a0, 8(sp) + csrr a0, vlenb + lui t6, 1 + addiw t6, t6, 896 + mul a0, a0, t6 + add a0, sp, a0 + lui t6, 31 + addiw t6, t6, -960 + add a0, a0, t6 + vl8r.v v8, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + lui t6, 1 + addiw t6, t6, 888 + mul a0, a0, t6 + add a0, sp, a0 + lui t6, 31 + addiw t6, t6, -960 + add a0, a0, t6 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 1 + vsetivli zero, 3, e64, m8, tu, ma + csrr a0, vlenb + lui t6, 1 + addiw t6, t6, 872 + mul a0, a0, t6 + add a0, sp, a0 + lui t6, 31 + addiw t6, t6, -960 + add a0, a0, t6 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslideup.vi v8, v16, 2 + add t6, t5, s3 + vsetivli zero, 16, e64, m8, ta, ma + vse64.v v8, (t6) + fsd fa5, 0(t1) + vle64.v v24, (t3) + li t3, 19 + vle64.v v8, (t6) + li t1, 25 + vsetivli zero, 1, e64, m8, ta, ma + vslidedown.vi v16, v24, 15 + csrr a0, vlenb + lui t6, 1 + addiw t6, t6, 880 + mul a0, a0, t6 + add a0, sp, a0 + lui t6, 31 + addiw t6, t6, -960 + add a0, a0, t6 + vs8r.v v16, (a0) # Unknown-size Folded Spill + vslidedown.vi v16, v24, 14 + csrr a0, vlenb + lui t6, 1 + addiw t6, t6, 864 + mul a0, a0, t6 + add a0, sp, a0 + lui t6, 31 + addiw t6, t6, -960 + add a0, a0, t6 + vs8r.v v16, (a0) # Unknown-size Folded Spill + vslidedown.vi v16, v24, 13 + csrr a0, vlenb + lui t6, 1 + addiw t6, t6, 856 + mul a0, a0, t6 + add a0, sp, a0 + lui t6, 31 + addiw t6, t6, -960 + add a0, a0, t6 + vs8r.v v16, (a0) # Unknown-size Folded Spill + vslidedown.vi v16, v24, 12 + csrr a0, vlenb + lui t6, 1 + addiw t6, t6, 840 + mul a0, a0, t6 + add a0, sp, a0 + lui t6, 31 + addiw t6, t6, -960 + add a0, a0, t6 + vs8r.v v16, (a0) # Unknown-size Folded Spill + vslidedown.vi v16, v24, 11 + csrr a0, vlenb + lui t6, 1 + addiw t6, t6, 832 + mul a0, a0, t6 + add a0, sp, a0 + lui t6, 31 + addiw t6, t6, -960 + add a0, a0, t6 + vs8r.v v16, (a0) # Unknown-size Folded Spill + vslidedown.vi v16, v24, 10 + csrr a0, vlenb + lui t6, 1 + addiw t6, t6, 848 + mul a0, a0, t6 + add a0, sp, a0 + lui t6, 31 + addiw t6, t6, -960 + add a0, a0, t6 + vs8r.v v16, (a0) # Unknown-size Folded Spill + vslidedown.vi v16, v24, 9 + csrr a0, vlenb + lui t6, 1 + addiw t6, t6, 760 + mul a0, a0, t6 + add a0, sp, a0 + lui t6, 31 + addiw t6, t6, -960 + add a0, a0, t6 + vs8r.v v16, (a0) # Unknown-size Folded Spill + vslidedown.vi v16, v24, 8 + csrr a0, vlenb + lui t6, 1 + addiw t6, t6, 736 + mul a0, a0, t6 + add a0, sp, a0 + lui t6, 31 + addiw t6, t6, -960 + add a0, a0, t6 + vs8r.v v16, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m2, ta, ma + vslidedown.vi v16, v8, 2 + csrr a0, vlenb + lui t6, 1 + addiw t6, t6, 872 + mul a0, a0, t6 + add a0, sp, a0 + lui t6, 31 + addiw t6, t6, -960 + add a0, a0, t6 + vs8r.v v16, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m1, ta, ma + vmv1r.v v16, v8 + csrr a0, vlenb + lui t6, 1 + addiw t6, t6, 896 + mul a0, a0, t6 + add a0, sp, a0 + lui t6, 31 + addiw t6, t6, -960 + add a0, a0, t6 + vs8r.v v16, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v8, 1 + csrr a0, vlenb + lui t6, 1 + addiw t6, t6, 888 + mul a0, a0, t6 + add a0, sp, a0 + lui t6, 31 + addiw t6, t6, -960 + add a0, a0, t6 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m4, ta, ma + vslidedown.vi v8, v24, 7 + csrr a0, vlenb + lui t6, 1 + addiw t6, t6, 728 + mul a0, a0, t6 + add a0, sp, a0 + lui t6, 31 + addiw t6, t6, -960 + add a0, a0, t6 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v24, 6 + csrr a0, vlenb + lui t6, 1 + addiw t6, t6, 720 + mul a0, a0, t6 + add a0, sp, a0 + lui t6, 31 + addiw t6, t6, -960 + add a0, a0, t6 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v24, 5 + csrr a0, vlenb + lui t6, 1 + addiw t6, t6, 712 + mul a0, a0, t6 + add a0, sp, a0 + lui t6, 31 + addiw t6, t6, -960 + add a0, a0, t6 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v24, 4 + csrr a0, vlenb + lui t6, 1 + addiw t6, t6, 704 + mul a0, a0, t6 + add a0, sp, a0 + lui t6, 31 + addiw t6, t6, -960 + add a0, a0, t6 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m2, ta, ma + vslidedown.vi v8, v24, 3 + csrr a0, vlenb + lui t6, 1 + addiw t6, t6, 696 + mul a0, a0, t6 + add a0, sp, a0 + lui t6, 31 + addiw t6, t6, -960 + add a0, a0, t6 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v24, 2 + csrr a0, vlenb + lui t6, 1 + addiw t6, t6, 688 + mul a0, a0, t6 + add a0, sp, a0 + lui t6, 31 + addiw t6, t6, -960 + add a0, a0, t6 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m1, ta, ma + vmv1r.v v8, v24 + csrr a0, vlenb + li t6, 9 + slli t6, t6, 9 + mul a0, a0, t6 + add a0, sp, a0 + lui t6, 31 + addiw t6, t6, -960 + add a0, a0, t6 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v24, 1 + csrr t6, vlenb + lui a0, 1 + addiw a0, a0, 680 + mul t6, t6, a0 + add t6, sp, t6 + lui a0, 31 + addiw a0, a0, -960 + add t6, t6, a0 + ld a0, 8(sp) + vs8r.v v8, (t6) # Unknown-size Folded Spill + vsetivli zero, 16, e64, m8, ta, ma + vle64.v v16, (t2) + vsetivli zero, 1, e64, m8, ta, ma + vslidedown.vi v8, v16, 15 + csrr t2, vlenb + lui t6, 1 + addiw t6, t6, 664 + mul t2, t2, t6 + add t2, sp, t2 + lui t6, 31 + addiw t6, t6, -960 + add t2, t2, t6 + vs8r.v v8, (t2) # Unknown-size Folded Spill + vslidedown.vi v8, v16, 14 + csrr t2, vlenb + lui t6, 1 + addiw t6, t6, 656 + mul t2, t2, t6 + add t2, sp, t2 + lui t6, 31 + addiw t6, t6, -960 + add t2, t2, t6 + vs8r.v v8, (t2) # Unknown-size Folded Spill + vslidedown.vi v8, v16, 13 + csrr t2, vlenb + lui t6, 1 + addiw t6, t6, 648 + mul t2, t2, t6 + add t2, sp, t2 + lui t6, 31 + addiw t6, t6, -960 + add t2, t2, t6 + vs8r.v v8, (t2) # Unknown-size Folded Spill + vslidedown.vi v8, v16, 12 + csrr t2, vlenb + lui t6, 1 + addiw t6, t6, 640 + mul t2, t2, t6 + add t2, sp, t2 + lui t6, 31 + addiw t6, t6, -960 + add t2, t2, t6 + vs8r.v v8, (t2) # Unknown-size Folded Spill + vslidedown.vi v8, v16, 11 + csrr t2, vlenb + lui t6, 1 + addiw t6, t6, 624 + mul t2, t2, t6 + add t2, sp, t2 + lui t6, 31 + addiw t6, t6, -960 + add t2, t2, t6 + vs8r.v v8, (t2) # Unknown-size Folded Spill + vslidedown.vi v8, v16, 10 + csrr t2, vlenb + lui t6, 1 + addiw t6, t6, 992 + mul t2, t2, t6 + add t2, sp, t2 + lui t6, 31 + addiw t6, t6, -960 + add t2, t2, t6 + vs8r.v v8, (t2) # Unknown-size Folded Spill + vslidedown.vi v8, v16, 9 + csrr t2, vlenb + lui t6, 1 + addiw t6, t6, 816 + mul t2, t2, t6 + add t2, sp, t2 + lui t6, 31 + addiw t6, t6, -960 + add t2, t2, t6 + vs8r.v v8, (t2) # Unknown-size Folded Spill + vslidedown.vi v8, v16, 8 + csrr t2, vlenb + lui t6, 1 + addiw t6, t6, 824 + mul t2, t2, t6 + add t2, sp, t2 + lui t6, 31 + addiw t6, t6, -960 + add t2, t2, t6 + vs8r.v v8, (t2) # Unknown-size Folded Spill + vsetivli zero, 16, e64, m8, ta, ma + vle64.v v24, (a0) + csrr a0, vlenb + lui t2, 1 + addiw t2, t2, 1096 + mul a0, a0, t2 + add a0, sp, a0 + lui t2, 31 + addiw t2, t2, -960 + add a0, a0, t2 + vs8r.v v24, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m8, ta, ma + vslidedown.vi v8, v24, 15 + csrr a0, vlenb + lui t2, 1 + addiw t2, t2, 592 + mul a0, a0, t2 + add a0, sp, a0 + lui t2, 31 + addiw t2, t2, -960 + add a0, a0, t2 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v24, 14 + csrr a0, vlenb + lui t2, 1 + addiw t2, t2, 568 + mul a0, a0, t2 + add a0, sp, a0 + lui t2, 31 + addiw t2, t2, -960 + add a0, a0, t2 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v24, 13 + csrr a0, vlenb + lui t2, 1 + addiw t2, t2, 552 + mul a0, a0, t2 + add a0, sp, a0 + lui t2, 31 + addiw t2, t2, -960 + add a0, a0, t2 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v24, 12 + csrr a0, vlenb + lui t2, 1 + addiw t2, t2, 536 + mul a0, a0, t2 + add a0, sp, a0 + lui t2, 31 + addiw t2, t2, -960 + add a0, a0, t2 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v24, 11 + csrr a0, vlenb + lui t2, 1 + addiw t2, t2, 528 + mul a0, a0, t2 + add a0, sp, a0 + lui t2, 31 + addiw t2, t2, -960 + add a0, a0, t2 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v24, 10 + csrr a0, vlenb + lui t2, 1 + addiw t2, t2, 504 + mul a0, a0, t2 + add a0, sp, a0 + lui t2, 31 + addiw t2, t2, -960 + add a0, a0, t2 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v24, 9 + csrr a0, vlenb + lui t2, 1 + addiw t2, t2, 496 + mul a0, a0, t2 + add a0, sp, a0 + lui t2, 31 + addiw t2, t2, -960 + add a0, a0, t2 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v24, 8 + csrr a0, vlenb + lui t2, 1 + addiw t2, t2, 480 + mul a0, a0, t2 + add a0, sp, a0 + lui t2, 31 + addiw t2, t2, -960 + add a0, a0, t2 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 16, e64, m8, ta, ma + vle64.v v24, (a1) + vsetivli zero, 1, e64, m8, ta, ma + vslidedown.vi v8, v24, 15 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 808 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v24, 14 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 800 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v24, 13 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 792 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v24, 12 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 784 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v24, 11 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 776 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v24, 10 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 752 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v24, 9 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 744 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v24, 8 + csrr a0, vlenb + li a1, 19 + slli a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 16, e64, m8, ta, ma + vle64.v v0, (a2) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1088 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m8, ta, ma + vslidedown.vi v8, v0, 15 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 416 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 14 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 408 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 13 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 392 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 12 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 376 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 11 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 360 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 10 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 344 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 9 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 328 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 8 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 984 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 16, e64, m8, ta, ma + vle64.v v0, (a3) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1072 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m8, ta, ma + vslidedown.vi v8, v0, 15 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 632 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 14 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 280 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 13 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 272 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 12 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 264 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 11 + csrr a0, vlenb + li a1, 17 + slli a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 10 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 240 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 9 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 224 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 8 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 200 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 16, e64, m8, ta, ma + vle64.v v0, (a4) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1056 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m8, ta, ma + vslidedown.vi v8, v0, 15 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 520 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 14 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 456 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 13 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 488 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 12 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 472 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 11 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 464 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 10 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 448 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 9 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 440 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 8 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 432 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 16, e64, m8, ta, ma + vle64.v v0, (a6) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1080 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m8, ta, ma + vslidedown.vi v8, v0, 15 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 72 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 14 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 48 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 13 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 16 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 12 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 11 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -40 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 10 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -56 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 9 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -64 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 8 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -72 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 16, e64, m8, ta, ma + vle64.v v0, (a7) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1048 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m8, ta, ma + vslidedown.vi v8, v0, 15 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 384 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 14 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 368 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 13 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 400 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 12 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -88 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 11 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -104 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 10 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -120 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 9 + csrr a0, vlenb + li a1, 31 + slli a1, a1, 7 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 8 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -144 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 16, e64, m8, ta, ma + vle64.v v0, (t0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1032 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m8, ta, ma + vslidedown.vi v8, v0, 15 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -232 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 14 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -240 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 13 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 968 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 12 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 208 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 11 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 248 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 10 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 232 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 9 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 216 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 8 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 192 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 16, e64, m8, ta, ma + addi a0, sp, 1152 + vle64.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1064 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m8, ta, ma + vslidedown.vi v8, v0, 15 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -368 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 14 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -376 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 13 + csrr a0, vlenb + li a1, 29 + slli a1, a1, 7 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 12 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -392 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 11 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -400 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 10 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -408 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 9 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -416 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 8 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -424 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 16, e64, m8, ta, ma + addi a0, sp, 1024 + vle64.v v0, (a0) + csrr a0, vlenb + li a1, 5 + slli a1, a1, 10 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m8, ta, ma + vslidedown.vi v8, v0, 15 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 112 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 14 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 96 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 13 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 64 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 12 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 40 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 11 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 88 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 10 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -472 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 9 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -488 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 8 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -504 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 16, e64, m8, ta, ma + addi a0, sp, 896 + vle64.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1016 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m8, ta, ma + vslidedown.vi v8, v0, 15 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -544 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 14 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -560 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 13 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -576 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 12 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -592 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 11 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 952 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 10 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -112 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 9 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -80 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 8 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -96 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 16, e64, m8, ta, ma + addi a0, sp, 768 + vle64.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1040 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m8, ta, ma + vslidedown.vi v8, v0, 15 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -608 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 14 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -624 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 13 + csrr a0, vlenb + li a1, 27 + slli a1, a1, 7 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 12 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -656 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 11 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -664 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 10 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -672 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 9 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -680 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 8 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -688 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 16, e64, m8, ta, ma + addi a0, sp, 640 + vle64.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1008 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m8, ta, ma + vslidedown.vi v8, v0, 15 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -248 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 14 + csrr a0, vlenb + li a1, 15 + slli a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 13 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -264 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 12 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -272 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 11 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -288 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 10 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -312 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 9 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -280 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 8 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -720 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 16, e64, m8, ta, ma + addi a0, sp, 512 + vle64.v v0, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1112 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m8, ta, ma + vslidedown.vi v8, v0, 15 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -816 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 14 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -832 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 13 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 928 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 12 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 920 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 11 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 912 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 10 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 904 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 9 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1000 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 8 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -1016 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 16, e64, m8, ta, ma + vle64.v v0, (t5) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1104 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v0, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m8, ta, ma + vslidedown.vi v8, v0, 15 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -744 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 14 + csrr a0, vlenb + li a1, 13 + slli a1, a1, 8 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 13 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -784 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 12 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -800 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 11 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -824 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 10 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -840 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 9 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -848 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 8 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, -856 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m4, ta, ma + vslidedown.vi v8, v16, 7 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 616 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v16, 6 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 608 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v16, 5 + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 600 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v16, 4 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 72 + addiw a1, a1, 584 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 15 - addi t0, sp, 1536 - vse64.v v8, (t0) - vsetivli zero, 2, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m2, ta, ma + vslidedown.vi v8, v16, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 160 + addiw a1, a1, 560 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v16, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -360 + addiw a1, a1, 544 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 1 - vsetivli zero, 3, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m1, ta, ma + vmv1r.v v0, v16 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -352 + addiw a1, a1, 672 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 2 - vsetivli zero, 4, e64, m8, tu, ma + vs8r.v v0, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v16, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -336 + addiw a1, a1, 576 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 3 - vsetivli zero, 5, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, -320 + addiw a1, a1, 1096 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 4 - vsetivli zero, 6, e64, m8, tu, ma + vl8r.v v8, (a0) # Unknown-size Folded Reload + vsetivli zero, 1, e64, m4, ta, ma + vslidedown.vi v16, v8, 7 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -296 + addiw a1, a1, 184 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 5 - vsetivli zero, 7, e64, m8, tu, ma + vs8r.v v16, (a0) # Unknown-size Folded Spill + vslidedown.vi v16, v8, 6 csrr a0, vlenb lui a1, 1 addiw a1, a1, 176 @@ -198818,4232 +201612,1224 @@ lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 6 - vsetivli zero, 8, e64, m8, tu, ma + vs8r.v v16, (a0) # Unknown-size Folded Spill + vslidedown.vi v16, v8, 5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 144 + addiw a1, a1, 160 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 7 - vsetivli zero, 9, e64, m8, tu, ma + vs8r.v v16, (a0) # Unknown-size Folded Spill + vslidedown.vi v16, v8, 4 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 432 + addiw a1, a1, 152 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 8 - vsetivli zero, 10, e64, m8, tu, ma + vs8r.v v16, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m2, ta, ma + vslidedown.vi v16, v8, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 440 + addiw a1, a1, 136 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 9 - vsetivli zero, 11, e64, m8, tu, ma + vs8r.v v16, (a0) # Unknown-size Folded Spill + vslidedown.vi v16, v8, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 448 + addiw a1, a1, 128 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 10 - vsetivli zero, 12, e64, m8, tu, ma + vs8r.v v16, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m1, ta, ma + vslidedown.vi v8, v8, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 464 + addiw a1, a1, 976 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 11 - vsetivli zero, 13, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m4, ta, ma + vslidedown.vi v8, v24, 7 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 472 + addiw a1, a1, 120 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 12 - vsetivli zero, 14, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v24, 6 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 488 + addiw a1, a1, 104 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 13 - vsetivli zero, 15, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v24, 5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 456 + addiw a1, a1, 80 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 14 - vsetivli zero, 16, e64, m8, ta, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v24, 4 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 520 + addiw a1, a1, 56 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 15 - addi a7, sp, 1664 - vse64.v v8, (a7) - vsetivli zero, 2, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m2, ta, ma + vslidedown.vi v8, v24, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1064 + addiw a1, a1, 24 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v24, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -224 + addiw a1, a1, 8 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 1 - vsetivli zero, 3, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m1, ta, ma + vmv1r.v v8, v24 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -216 + addiw a1, a1, 424 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 2 - vsetivli zero, 4, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, -208 + addiw a1, a1, 1072 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 3 - vsetivli zero, 5, e64, m8, tu, ma + vslidedown.vi v8, v24, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -200 + addiw a1, a1, -32 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 4 - vsetivli zero, 6, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m4, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, -192 + addiw a1, a1, 1088 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 5 - vsetivli zero, 7, e64, m8, tu, ma + vl8r.v v24, (a0) # Unknown-size Folded Reload + vslidedown.vi v8, v24, 7 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -176 + addiw a1, a1, 312 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 6 - vsetivli zero, 8, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v24, 6 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -160 + addiw a1, a1, 352 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 7 - vsetivli zero, 9, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v24, 5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 208 + addiw a1, a1, 336 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 8 - vsetivli zero, 10, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v24, 4 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 232 + addiw a1, a1, 320 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 9 - vsetivli zero, 11, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m2, ta, ma + vslidedown.vi v8, v24, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 248 + addiw a1, a1, 304 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 10 - vsetivli zero, 12, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v24, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 264 + addiw a1, a1, 296 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 11 - vsetivli zero, 13, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m1, ta, ma + vslidedown.vi v8, v24, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 272 + addiw a1, a1, 288 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 12 - vsetivli zero, 14, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, 280 + addiw a1, a1, 1080 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 13 - vsetivli zero, 15, e64, m8, tu, ma + vl8r.v v0, (a0) # Unknown-size Folded Reload + vsetivli zero, 1, e64, m4, ta, ma + vslidedown.vi v8, v16, 7 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 288 + addiw a1, a1, -160 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 14 - vsetivli zero, 16, e64, m8, ta, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v16, 6 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 632 + addiw a1, a1, -176 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 15 - addi a6, sp, 1792 - vse64.v v8, (a6) - vsetivli zero, 2, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v16, 5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1096 + addiw a1, a1, -192 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v16, 4 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 296 + addiw a1, a1, -200 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 1 - vsetivli zero, 3, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m2, ta, ma + vslidedown.vi v8, v16, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 304 + addiw a1, a1, -208 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 2 - vsetivli zero, 4, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v16, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 312 + addiw a1, a1, -216 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 3 - vsetivli zero, 5, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m1, ta, ma + vslidedown.vi v8, v16, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 328 + addiw a1, a1, -224 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 4 - vsetivli zero, 6, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m4, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 344 + addiw a1, a1, 1056 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 5 - vsetivli zero, 7, e64, m8, tu, ma + vslidedown.vi v8, v16, 7 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 360 + addiw a1, a1, 144 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 6 - vsetivli zero, 8, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v16, 6 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 320 + addiw a1, a1, 168 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 7 - vsetivli zero, 9, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v16, 5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 984 + addiw a1, a1, -296 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 8 - vsetivli zero, 10, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v16, 4 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 336 + addiw a1, a1, -320 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 9 - vsetivli zero, 11, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m2, ta, ma + vslidedown.vi v8, v16, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 352 + addiw a1, a1, -336 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 10 - vsetivli zero, 12, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v16, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 368 + addiw a1, a1, -352 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 11 - vsetivli zero, 13, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m1, ta, ma + vslidedown.vi v8, v16, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 384 + addiw a1, a1, -360 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 12 - vsetivli zero, 14, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, 400 + addiw a1, a1, 1048 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 13 - vsetivli zero, 15, e64, m8, tu, ma + vl8r.v v8, (a0) # Unknown-size Folded Reload + vsetivli zero, 1, e64, m4, ta, ma + vslidedown.vi v16, v0, 7 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 416 + addiw a1, a1, -432 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 14 - vsetivli zero, 16, e64, m8, ta, ma + vs8r.v v16, (a0) # Unknown-size Folded Spill + vslidedown.vi v16, v0, 6 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 424 + addiw a1, a1, 960 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 15 - addi a4, sp, 1920 - vse64.v v8, (a4) - vsetivli zero, 2, e64, m8, tu, ma + vs8r.v v16, (a0) # Unknown-size Folded Spill + vslidedown.vi v16, v0, 5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1080 + addiw a1, a1, -16 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload + vs8r.v v16, (a0) # Unknown-size Folded Spill + vslidedown.vi v16, v0, 4 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -32 + addiw a1, a1, 32 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 1 - vsetivli zero, 3, e64, m8, tu, ma + vs8r.v v16, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m2, ta, ma + vslidedown.vi v16, v0, 3 csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 8 - mul a0, a0, a1 + slli a0, a0, 12 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 2 - vsetivli zero, 4, e64, m8, tu, ma + vs8r.v v16, (a0) # Unknown-size Folded Spill + vslidedown.vi v16, v0, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 24 + addiw a1, a1, -24 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 3 - vsetivli zero, 5, e64, m8, tu, ma + vs8r.v v16, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m1, ta, ma + vslidedown.vi v16, v0, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 56 + addiw a1, a1, -48 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 4 - vsetivli zero, 6, e64, m8, tu, ma + vs8r.v v16, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m4, ta, ma + vslidedown.vi v16, v8, 7 csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 80 + li a1, 7 + slli a1, a1, 9 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 5 - vsetivli zero, 7, e64, m8, tu, ma + vs8r.v v16, (a0) # Unknown-size Folded Spill + vslidedown.vi v16, v8, 6 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 104 + addiw a1, a1, -520 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 6 - vsetivli zero, 8, e64, m8, tu, ma + vs8r.v v16, (a0) # Unknown-size Folded Spill + vslidedown.vi v16, v8, 5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 120 + addiw a1, a1, -528 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 7 - vsetivli zero, 9, e64, m8, tu, ma + vs8r.v v16, (a0) # Unknown-size Folded Spill + vslidedown.vi v16, v8, 4 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 760 + addiw a1, a1, -536 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 8 - vsetivli zero, 10, e64, m8, tu, ma + vs8r.v v16, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m2, ta, ma + vslidedown.vi v16, v8, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 736 + addiw a1, a1, -552 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 9 - vsetivli zero, 11, e64, m8, tu, ma + vs8r.v v16, (a0) # Unknown-size Folded Spill + vslidedown.vi v16, v8, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 744 + addiw a1, a1, -568 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 10 - vsetivli zero, 12, e64, m8, tu, ma + vs8r.v v16, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m1, ta, ma + vslidedown.vi v8, v8, 1 csrr a0, vlenb - li a1, 19 - slli a1, a1, 8 + lui a1, 1 + addiw a1, a1, -584 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 11 - vsetivli zero, 13, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m4, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 776 + addiw a1, a1, 1032 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 12 - vsetivli zero, 14, e64, m8, tu, ma + vl8r.v v24, (a0) # Unknown-size Folded Reload + vslidedown.vi v8, v24, 7 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 784 + addiw a1, a1, -136 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 13 - vsetivli zero, 15, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v24, 6 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 792 + addiw a1, a1, -168 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 14 - vsetivli zero, 16, e64, m8, ta, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v24, 5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 800 + addiw a1, a1, -184 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 15 - addi a3, sp, 2047 - addi a3, a3, 1 - vse64.v v8, (a3) - vsetivli zero, 2, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v24, 4 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1104 + addiw a1, a1, -152 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m2, ta, ma + vslidedown.vi v8, v24, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 976 + addiw a1, a1, -616 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 1 - vsetivli zero, 3, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v24, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 128 + addiw a1, a1, -632 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 2 - vsetivli zero, 4, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m1, ta, ma + vslidedown.vi v8, v24, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 136 + addiw a1, a1, -648 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 3 - vsetivli zero, 5, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m4, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 152 + addiw a1, a1, 1064 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 4 - vsetivli zero, 6, e64, m8, tu, ma + vslidedown.vi v8, v16, 7 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 168 + addiw a1, a1, -696 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 5 - vsetivli zero, 7, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v16, 6 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 184 + addiw a1, a1, -704 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 6 - vsetivli zero, 8, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v16, 5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 192 + addiw a1, a1, -712 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 7 - vsetivli zero, 9, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v16, 4 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 480 + addiw a1, a1, 944 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 8 - vsetivli zero, 10, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m2, ta, ma + vslidedown.vi v8, v16, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 496 + addiw a1, a1, -344 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 9 - vsetivli zero, 11, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v16, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 504 + addiw a1, a1, -304 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 10 - vsetivli zero, 12, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m1, ta, ma + vslidedown.vi v8, v16, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 528 + addiw a1, a1, -328 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 11 - vsetivli zero, 13, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m4, ta, ma csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 536 + li a1, 5 + slli a1, a1, 10 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 12 - vsetivli zero, 14, e64, m8, tu, ma + vslidedown.vi v8, v16, 7 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 552 + addiw a1, a1, -728 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 13 - vsetivli zero, 15, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v16, 6 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 568 + addiw a1, a1, -736 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 14 - vsetivli zero, 16, e64, m8, ta, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v16, 5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 592 + addiw a1, a1, -752 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 15 - addi a2, sp, 2047 - addi a2, a2, 129 - vse64.v v8, (a2) - vsetivli zero, 2, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v16, 4 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1088 + addiw a1, a1, -760 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v8, (a0) # Unknown-size Folded Reload + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m2, ta, ma + vslidedown.vi v8, v16, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 576 + addiw a1, a1, -776 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 1 - vsetivli zero, 3, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v16, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 544 + addiw a1, a1, -792 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 2 - vsetivli zero, 4, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m1, ta, ma + vslidedown.vi v8, v16, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 560 + addiw a1, a1, -808 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 3 - vsetivli zero, 5, e64, m8, tu, ma + vs8r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, 584 + addiw a1, a1, 1040 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 4 - vsetivli zero, 6, e64, m8, tu, ma + vl8r.v v8, (a0) # Unknown-size Folded Reload + vsetivli zero, 1, e64, m4, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 600 + addiw a1, a1, 1016 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 5 - vsetivli zero, 7, e64, m8, tu, ma + vl8r.v v24, (a0) # Unknown-size Folded Reload + vslidedown.vi v16, v24, 7 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 608 + addiw a1, a1, -440 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 6 - vsetivli zero, 8, e64, m8, tu, ma + vs8r.v v16, (a0) # Unknown-size Folded Spill + vslidedown.vi v16, v24, 6 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 616 + addiw a1, a1, -448 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 7 - vsetivli zero, 9, e64, m8, tu, ma + vs8r.v v16, (a0) # Unknown-size Folded Spill + vslidedown.vi v16, v24, 5 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 816 + addiw a1, a1, -456 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 8 - vsetivli zero, 10, e64, m8, tu, ma + vs8r.v v16, (a0) # Unknown-size Folded Spill + vslidedown.vi v16, v24, 4 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 808 + addiw a1, a1, -480 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 9 - vsetivli zero, 11, e64, m8, tu, ma + vs8r.v v16, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m2, ta, ma + vslidedown.vi v16, v24, 3 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 992 + addiw a1, a1, -496 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 10 - vsetivli zero, 12, e64, m8, tu, ma + vs8r.v v16, (a0) # Unknown-size Folded Spill + vslidedown.vi v16, v24, 2 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 624 + addiw a1, a1, -464 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 11 - vsetivli zero, 13, e64, m8, tu, ma + vs8r.v v16, (a0) # Unknown-size Folded Spill + vsetivli zero, 1, e64, m1, ta, ma + vslidedown.vi v16, v24, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 640 + addiw a1, a1, -864 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 12 - vsetivli zero, 14, e64, m8, tu, ma + vs8r.v v16, (a0) # Unknown-size Folded Spill csrr a0, vlenb lui a1, 1 - addiw a1, a1, 648 + addiw a1, a1, 1104 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 13 - vsetivli zero, 15, e64, m8, tu, ma + vl8r.v v0, (a0) # Unknown-size Folded Reload + vsetivli zero, 1, e64, m4, ta, ma + vslidedown.vi v16, v8, 7 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 656 + addiw a1, a1, -872 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 14 - vsetivli zero, 16, e64, m8, ta, ma + vs8r.v v16, (a0) # Unknown-size Folded Spill + vslidedown.vi v16, v8, 6 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 664 + addiw a1, a1, -880 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 15 - addi a0, sp, 2047 - addi a0, a0, 257 - vse64.v v8, (a0) - vsetivli zero, 2, e64, m8, tu, ma - csrr a1, vlenb - li t1, 9 - slli t1, t1, 9 - mul a1, a1, t1 - add a1, sp, a1 - lui t1, 31 - addiw t1, t1, -960 - add a1, a1, t1 - vl8r.v v8, (a1) # Unknown-size Folded Reload - csrr a1, vlenb - lui t1, 1 - addiw t1, t1, 672 - mul a1, a1, t1 - add a1, sp, a1 - lui t1, 31 - addiw t1, t1, -960 - add a1, a1, t1 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vslideup.vi v8, v16, 1 - vsetivli zero, 3, e64, m8, tu, ma - csrr a1, vlenb - lui t1, 1 - addiw t1, t1, 680 - mul a1, a1, t1 - add a1, sp, a1 - lui t1, 31 - addiw t1, t1, -960 - add a1, a1, t1 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vslideup.vi v8, v16, 2 - vsetivli zero, 4, e64, m8, tu, ma - csrr a1, vlenb - lui t1, 1 - addiw t1, t1, 688 - mul a1, a1, t1 - add a1, sp, a1 - lui t1, 31 - addiw t1, t1, -960 - add a1, a1, t1 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vslideup.vi v8, v16, 3 - vsetivli zero, 5, e64, m8, tu, ma - csrr a1, vlenb - lui t1, 1 - addiw t1, t1, 696 - mul a1, a1, t1 - add a1, sp, a1 - lui t1, 31 - addiw t1, t1, -960 - add a1, a1, t1 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vslideup.vi v8, v16, 4 - vsetivli zero, 6, e64, m8, tu, ma - csrr a1, vlenb - lui t1, 1 - addiw t1, t1, 704 - mul a1, a1, t1 - add a1, sp, a1 - lui t1, 31 - addiw t1, t1, -960 - add a1, a1, t1 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vslideup.vi v8, v16, 5 - vsetivli zero, 7, e64, m8, tu, ma - csrr a1, vlenb - lui t1, 1 - addiw t1, t1, 712 - mul a1, a1, t1 - add a1, sp, a1 - lui t1, 31 - addiw t1, t1, -960 - add a1, a1, t1 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vslideup.vi v8, v16, 6 - vsetivli zero, 8, e64, m8, tu, ma - csrr a1, vlenb - lui t1, 1 - addiw t1, t1, 720 - mul a1, a1, t1 - add a1, sp, a1 - lui t1, 31 - addiw t1, t1, -960 - add a1, a1, t1 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vslideup.vi v8, v16, 7 - vsetivli zero, 9, e64, m8, tu, ma - csrr a1, vlenb - lui t1, 1 - addiw t1, t1, 728 - mul a1, a1, t1 - add a1, sp, a1 - lui t1, 31 - addiw t1, t1, -960 - add a1, a1, t1 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vslideup.vi v8, v16, 8 - vsetivli zero, 10, e64, m8, tu, ma - csrr a1, vlenb - lui t1, 1 - addiw t1, t1, 752 - mul a1, a1, t1 - add a1, sp, a1 - lui t1, 31 - addiw t1, t1, -960 - add a1, a1, t1 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vslideup.vi v8, v16, 9 - vsetivli zero, 11, e64, m8, tu, ma - csrr a1, vlenb - lui t1, 1 - addiw t1, t1, 840 - mul a1, a1, t1 - add a1, sp, a1 - lui t1, 31 - addiw t1, t1, -960 - add a1, a1, t1 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vslideup.vi v8, v16, 10 - vsetivli zero, 12, e64, m8, tu, ma - csrr a1, vlenb - lui t1, 1 - addiw t1, t1, 824 - mul a1, a1, t1 - add a1, sp, a1 - lui t1, 31 - addiw t1, t1, -960 - add a1, a1, t1 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vslideup.vi v8, v16, 11 - vsetivli zero, 13, e64, m8, tu, ma - csrr a1, vlenb - lui t1, 1 - addiw t1, t1, 832 - mul a1, a1, t1 - add a1, sp, a1 - lui t1, 31 - addiw t1, t1, -960 - add a1, a1, t1 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vslideup.vi v8, v16, 12 - vsetivli zero, 14, e64, m8, tu, ma - csrr a1, vlenb - lui t1, 1 - addiw t1, t1, 848 - mul a1, a1, t1 - add a1, sp, a1 - lui t1, 31 - addiw t1, t1, -960 - add a1, a1, t1 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vslideup.vi v8, v16, 13 - vsetivli zero, 15, e64, m8, tu, ma - csrr a1, vlenb - lui t1, 1 - addiw t1, t1, 856 - mul a1, a1, t1 - add a1, sp, a1 - lui t1, 31 - addiw t1, t1, -960 - add a1, a1, t1 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vslideup.vi v8, v16, 14 - vsetivli zero, 16, e64, m8, ta, ma - csrr a1, vlenb - lui t1, 1 - addiw t1, t1, 872 - mul a1, a1, t1 - add a1, sp, a1 - lui t1, 31 - addiw t1, t1, -960 - add a1, a1, t1 - vl8r.v v16, (a1) # Unknown-size Folded Reload - vslideup.vi v8, v16, 15 - fld ft2, 240(sp) # 8-byte Folded Reload - fmadd.d fs0, fs0, ft2, ft1 - fld ft2, 224(sp) # 8-byte Folded Reload - fmadd.d fs0, fs1, ft2, fs0 - fld ft2, 216(sp) # 8-byte Folded Reload - fmadd.d fs0, fs2, ft2, fs0 - fld ft2, 208(sp) # 8-byte Folded Reload - fmadd.d fs0, fs3, ft2, fs0 - fld ft2, 200(sp) # 8-byte Folded Reload - fmadd.d fs0, fs4, ft2, fs0 - fld ft2, 184(sp) # 8-byte Folded Reload - fmadd.d fs0, fs5, ft2, fs0 - fld ft2, 192(sp) # 8-byte Folded Reload - fmadd.d fs0, fs6, ft2, fs0 - fld ft2, 232(sp) # 8-byte Folded Reload - fmadd.d fs0, fs7, ft2, fs0 - fmadd.d fs0, fs8, ft3, fs0 - fmadd.d fs0, fs9, ft4, fs0 - fmadd.d fs0, fs10, ft5, fs0 - fmadd.d fs0, fs11, ft6, fs0 - fmadd.d fa5, fa5, ft7, fs0 - fmadd.d fa5, fa4, fa6, fa5 - fmadd.d fa5, fa3, fa7, fa5 - fmadd.d fa5, fa2, ft8, fa5 - fmadd.d fa5, fa1, ft9, fa5 - fmadd.d fa5, fa0, ft10, fa5 - fmadd.d fa5, ft0, ft11, fa5 - ld a1, 248(sp) # 8-byte Folded Reload - add a1, a1, a5 - andi a1, a1, 511 - slli a1, a1, 3 - addi t1, sp, 384 - add a1, t1, a1 - add t1, t1, s2 - addi t2, sp, 384 - vse64.v v8, (t1) - vsetivli zero, 2, e64, m8, tu, ma - sd a0, 8(sp) - csrr a0, vlenb - lui t6, 1 - addiw t6, t6, 888 - mul a0, a0, t6 - add a0, sp, a0 - lui t6, 31 - addiw t6, t6, -960 - add a0, a0, t6 - vl8r.v v8, (a0) # Unknown-size Folded Reload - csrr a0, vlenb - lui t6, 1 - addiw t6, t6, 880 - mul a0, a0, t6 - add a0, sp, a0 - lui t6, 31 - addiw t6, t6, -960 - add a0, a0, t6 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 1 - vsetivli zero, 3, e64, m8, tu, ma - csrr a0, vlenb - lui t6, 1 - addiw t6, t6, 864 - mul a0, a0, t6 - add a0, sp, a0 - lui t6, 31 - addiw t6, t6, -960 - add a0, a0, t6 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vslideup.vi v8, v16, 2 - add t6, t2, s3 - vsetivli zero, 16, e64, m8, ta, ma - vse64.v v8, (t6) - fsd fa5, 0(a1) - li a1, 25 - vle64.v v24, (t1) - vle64.v v8, (t6) - li t6, 19 - vsetivli zero, 1, e64, m8, ta, ma - vslidedown.vi v16, v24, 15 - csrr a0, vlenb - lui t1, 1 - addiw t1, t1, 872 - mul a0, a0, t1 - add a0, sp, a0 - lui t1, 31 - addiw t1, t1, -960 - add a0, a0, t1 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v24, 14 - csrr a0, vlenb - lui t1, 1 - addiw t1, t1, 856 - mul a0, a0, t1 - add a0, sp, a0 - lui t1, 31 - addiw t1, t1, -960 - add a0, a0, t1 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v24, 13 - csrr a0, vlenb - lui t1, 1 - addiw t1, t1, 848 - mul a0, a0, t1 - add a0, sp, a0 - lui t1, 31 - addiw t1, t1, -960 - add a0, a0, t1 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v24, 12 - csrr a0, vlenb - lui t1, 1 - addiw t1, t1, 832 - mul a0, a0, t1 - add a0, sp, a0 - lui t1, 31 - addiw t1, t1, -960 - add a0, a0, t1 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v24, 11 - csrr a0, vlenb - lui t1, 1 - addiw t1, t1, 824 - mul a0, a0, t1 - add a0, sp, a0 - lui t1, 31 - addiw t1, t1, -960 - add a0, a0, t1 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v24, 10 - csrr a0, vlenb - lui t1, 1 - addiw t1, t1, 840 - mul a0, a0, t1 - add a0, sp, a0 - lui t1, 31 - addiw t1, t1, -960 - add a0, a0, t1 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v24, 9 - csrr a0, vlenb - lui t1, 1 - addiw t1, t1, 752 - mul a0, a0, t1 - add a0, sp, a0 - lui t1, 31 - addiw t1, t1, -960 - add a0, a0, t1 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v24, 8 - csrr a0, vlenb - lui t1, 1 - addiw t1, t1, 728 - mul a0, a0, t1 - add a0, sp, a0 - lui t1, 31 - addiw t1, t1, -960 - add a0, a0, t1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m2, ta, ma - vslidedown.vi v16, v8, 2 + vslidedown.vi v16, v8, 5 csrr a0, vlenb - lui t1, 1 - addiw t1, t1, 864 - mul a0, a0, t1 + lui a1, 1 + addiw a1, a1, -888 + mul a0, a0, a1 add a0, sp, a0 - lui t1, 31 - addiw t1, t1, -960 - add a0, a0, t1 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m1, ta, ma - vmv1r.v v16, v8 + vslidedown.vi v16, v8, 4 csrr a0, vlenb - lui t1, 1 - addiw t1, t1, 888 - mul a0, a0, t1 + li a1, 25 + slli a1, a1, 7 + mul a0, a0, a1 add a0, sp, a0 - lui t1, 31 - addiw t1, t1, -960 - add a0, a0, t1 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v8, 1 - csrr a0, vlenb - lui t1, 1 - addiw t1, t1, 880 - mul a0, a0, t1 - add a0, sp, a0 - lui t1, 31 - addiw t1, t1, -960 - add a0, a0, t1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m4, ta, ma - vslidedown.vi v8, v24, 7 - csrr a0, vlenb - lui t1, 1 - addiw t1, t1, 720 - mul a0, a0, t1 - add a0, sp, a0 - lui t1, 31 - addiw t1, t1, -960 - add a0, a0, t1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v24, 6 - csrr a0, vlenb - lui t1, 1 - addiw t1, t1, 712 - mul a0, a0, t1 - add a0, sp, a0 - lui t1, 31 - addiw t1, t1, -960 - add a0, a0, t1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v24, 5 - csrr a0, vlenb - lui t1, 1 - addiw t1, t1, 704 - mul a0, a0, t1 - add a0, sp, a0 - lui t1, 31 - addiw t1, t1, -960 - add a0, a0, t1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v24, 4 - csrr a0, vlenb - lui t1, 1 - addiw t1, t1, 696 - mul a0, a0, t1 - add a0, sp, a0 - lui t1, 31 - addiw t1, t1, -960 - add a0, a0, t1 - vs8r.v v8, (a0) # Unknown-size Folded Spill vsetivli zero, 1, e64, m2, ta, ma - vslidedown.vi v8, v24, 3 - csrr a0, vlenb - lui t1, 1 - addiw t1, t1, 688 - mul a0, a0, t1 - add a0, sp, a0 - lui t1, 31 - addiw t1, t1, -960 - add a0, a0, t1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v24, 2 - csrr a0, vlenb - lui t1, 1 - addiw t1, t1, 680 - mul a0, a0, t1 - add a0, sp, a0 - lui t1, 31 - addiw t1, t1, -960 - add a0, a0, t1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m1, ta, ma - vmv1r.v v8, v24 - csrr a0, vlenb - li t1, 9 - slli t1, t1, 9 - mul a0, a0, t1 - add a0, sp, a0 - lui t1, 31 - addiw t1, t1, -960 - add a0, a0, t1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v24, 1 - csrr t1, vlenb - lui a0, 1 - addiw a0, a0, 672 - mul t1, t1, a0 - add t1, sp, t1 - lui a0, 31 - addiw a0, a0, -960 - add t1, t1, a0 - ld a0, 8(sp) - vs8r.v v8, (t1) # Unknown-size Folded Spill - vsetivli zero, 16, e64, m8, ta, ma - vle64.v v16, (a0) - csrr a0, vlenb - lui t1, 1 - addiw t1, t1, 1088 - mul a0, a0, t1 - add a0, sp, a0 - lui t1, 31 - addiw t1, t1, -960 - add a0, a0, t1 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m8, ta, ma - vslidedown.vi v8, v16, 15 - csrr a0, vlenb - lui t1, 1 - addiw t1, t1, 664 - mul a0, a0, t1 - add a0, sp, a0 - lui t1, 31 - addiw t1, t1, -960 - add a0, a0, t1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 14 - csrr a0, vlenb - lui t1, 1 - addiw t1, t1, 656 - mul a0, a0, t1 - add a0, sp, a0 - lui t1, 31 - addiw t1, t1, -960 - add a0, a0, t1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 13 - csrr a0, vlenb - lui t1, 1 - addiw t1, t1, 648 - mul a0, a0, t1 - add a0, sp, a0 - lui t1, 31 - addiw t1, t1, -960 - add a0, a0, t1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 12 - csrr a0, vlenb - lui t1, 1 - addiw t1, t1, 640 - mul a0, a0, t1 - add a0, sp, a0 - lui t1, 31 - addiw t1, t1, -960 - add a0, a0, t1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 11 - csrr a0, vlenb - lui t1, 1 - addiw t1, t1, 624 - mul a0, a0, t1 - add a0, sp, a0 - lui t1, 31 - addiw t1, t1, -960 - add a0, a0, t1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 10 - csrr a0, vlenb - lui t1, 1 - addiw t1, t1, 992 - mul a0, a0, t1 - add a0, sp, a0 - lui t1, 31 - addiw t1, t1, -960 - add a0, a0, t1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 9 - csrr a0, vlenb - lui t1, 1 - addiw t1, t1, 808 - mul a0, a0, t1 - add a0, sp, a0 - lui t1, 31 - addiw t1, t1, -960 - add a0, a0, t1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 8 - csrr a0, vlenb - lui t1, 1 - addiw t1, t1, 816 - mul a0, a0, t1 - add a0, sp, a0 - lui t1, 31 - addiw t1, t1, -960 - add a0, a0, t1 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vsetivli zero, 16, e64, m8, ta, ma - vle64.v v16, (a2) - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1104 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m8, ta, ma - vslidedown.vi v8, v16, 15 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 592 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 14 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 568 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 13 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 552 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 12 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 536 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 11 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 528 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 10 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 504 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 9 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 496 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 8 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 480 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vsetivli zero, 16, e64, m8, ta, ma - vle64.v v16, (a3) - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1080 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m8, ta, ma - vslidedown.vi v8, v16, 15 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 800 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 14 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 792 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 13 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 784 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 12 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 776 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 11 - csrr a0, vlenb - li a2, 19 - slli a2, a2, 8 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 10 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 744 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 9 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 736 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 8 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 760 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vsetivli zero, 16, e64, m8, ta, ma - vle64.v v16, (a4) - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1096 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m8, ta, ma - vslidedown.vi v8, v16, 15 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 424 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 14 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 416 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 13 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 400 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 12 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 384 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 11 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 368 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 10 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 352 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 9 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 336 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 8 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 984 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vsetivli zero, 16, e64, m8, ta, ma - vle64.v v16, (a6) - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1064 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m8, ta, ma - vslidedown.vi v8, v16, 15 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 632 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 14 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 288 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 13 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 280 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 12 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 272 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 11 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 264 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 10 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 248 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 9 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 232 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 8 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 208 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vsetivli zero, 16, e64, m8, ta, ma - vle64.v v24, (a7) - vsetivli zero, 1, e64, m8, ta, ma - vslidedown.vi v8, v24, 15 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 520 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v24, 14 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 456 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v24, 13 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 488 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v24, 12 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 472 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v24, 11 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 464 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v24, 10 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 448 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v24, 9 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 440 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v24, 8 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 432 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vsetivli zero, 16, e64, m8, ta, ma - vle64.v v8, (t0) - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1072 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m8, ta, ma - vslidedown.vi v16, v8, 15 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 72 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 14 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 48 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 13 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 16 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 12 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -8 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 11 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -40 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 10 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -56 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 9 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -64 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 8 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -72 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vsetivli zero, 16, e64, m8, ta, ma - addi a0, sp, 1408 - vle64.v v8, (a0) - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1048 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m8, ta, ma - vslidedown.vi v16, v8, 15 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 392 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 14 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 376 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 13 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 408 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 12 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -88 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 11 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -104 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 10 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -120 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 9 - csrr a0, vlenb - li a2, 31 - slli a2, a2, 7 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 8 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -144 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vsetivli zero, 16, e64, m8, ta, ma - addi a0, sp, 1280 - vle64.v v16, (a0) - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1032 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m8, ta, ma - vslidedown.vi v8, v16, 15 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -232 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 14 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -240 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 13 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 968 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 12 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 216 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 11 - csrr a0, vlenb - li a2, 17 - slli a2, a2, 8 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 10 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 240 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 9 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 224 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 8 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 200 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vsetivli zero, 16, e64, m8, ta, ma - addi a0, sp, 1152 - vle64.v v8, (a0) - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1056 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m8, ta, ma - vslidedown.vi v16, v8, 15 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -368 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 14 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -376 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 13 - csrr a0, vlenb - li a2, 29 - slli a2, a2, 7 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 12 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -392 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 11 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -400 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 10 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -408 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 9 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -416 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 8 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -424 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vsetivli zero, 16, e64, m8, ta, ma - addi a0, sp, 1024 - vle64.v v8, (a0) - csrr a0, vlenb - li a2, 5 - slli a2, a2, 10 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m8, ta, ma - vslidedown.vi v16, v8, 15 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 112 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 14 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 96 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 13 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 64 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 12 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 40 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 11 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 88 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 10 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -472 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 9 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -488 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 8 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -504 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vsetivli zero, 16, e64, m8, ta, ma - addi a0, sp, 896 - vle64.v v8, (a0) - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1016 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m8, ta, ma - vslidedown.vi v16, v8, 15 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -544 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 14 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -560 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 13 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -576 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 12 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -592 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 11 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 944 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 10 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -112 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 9 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -80 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 8 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -96 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vsetivli zero, 16, e64, m8, ta, ma - addi a0, sp, 768 - vle64.v v8, (a0) - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1040 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m8, ta, ma - vslidedown.vi v16, v8, 15 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -608 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 14 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -624 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 13 - csrr a0, vlenb - li a2, 27 - slli a2, a2, 7 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 12 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -656 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 11 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -664 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 10 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -672 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 9 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -680 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 8 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -688 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vsetivli zero, 16, e64, m8, ta, ma - addi a0, sp, 640 - vle64.v v8, (a0) - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1008 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m8, ta, ma - vslidedown.vi v16, v8, 15 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -248 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 14 - csrr a0, vlenb - li a2, 15 - slli a2, a2, 8 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 13 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -264 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 12 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -272 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 11 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -288 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 10 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -312 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 9 + vslidedown.vi v16, v8, 3 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -280 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -904 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v8, 8 + vslidedown.vi v16, v8, 2 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -720 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 936 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v16, (a0) # Unknown-size Folded Spill - vsetivli zero, 16, e64, m8, ta, ma - addi a0, sp, 512 - vle64.v v16, (a0) - vsetivli zero, 1, e64, m8, ta, ma - vslidedown.vi v0, v16, 15 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -816 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v16, 14 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -832 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v16, 13 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 920 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v16, 12 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 912 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v16, 11 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 904 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v16, 10 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 896 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v16, 9 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1000 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v16, 8 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1016 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vsetivli zero, 16, e64, m8, ta, ma - vle64.v v8, (t2) - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1112 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v8, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m8, ta, ma - vslidedown.vi v0, v8, 15 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -744 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v8, 14 - csrr a0, vlenb - li a2, 13 - slli a2, a2, 8 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v8, 13 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -784 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v8, 12 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -800 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v8, 11 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -824 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v8, 10 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -840 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v8, 9 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -848 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v8, 8 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -856 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m4, ta, ma - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1088 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslidedown.vi v0, v8, 7 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 616 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v8, 6 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 608 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v8, 5 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 600 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v8, 4 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 584 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m2, ta, ma - vslidedown.vi v0, v8, 3 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 560 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v8, 2 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 544 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m1, ta, ma - vslidedown.vi v0, v8, 1 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 576 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m4, ta, ma - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1104 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslidedown.vi v0, v8, 7 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 192 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v8, 6 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 184 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v8, 5 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 168 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v8, 4 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 152 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m2, ta, ma - vslidedown.vi v0, v8, 3 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 136 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v8, 2 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 128 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m1, ta, ma - vslidedown.vi v0, v8, 1 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 976 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m4, ta, ma - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1080 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslidedown.vi v0, v8, 7 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 120 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v8, 6 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 104 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v8, 5 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 80 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v8, 4 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 56 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m2, ta, ma - vslidedown.vi v0, v8, 3 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 24 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v8, 2 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 8 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m1, ta, ma - vslidedown.vi v0, v8, 1 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -32 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m4, ta, ma - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1096 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslidedown.vi v0, v8, 7 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 320 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v8, 6 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 360 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v8, 5 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 344 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v8, 4 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 328 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m2, ta, ma - vslidedown.vi v0, v8, 3 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 312 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v8, 2 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 304 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m1, ta, ma - vslidedown.vi v0, v8, 1 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 296 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m4, ta, ma - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1064 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslidedown.vi v0, v8, 7 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -160 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v8, 6 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -176 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v8, 5 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -192 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v8, 4 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -200 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m2, ta, ma - vslidedown.vi v0, v8, 3 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -208 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v8, 2 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -216 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m1, ta, ma - vslidedown.vi v0, v8, 1 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -224 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m4, ta, ma - vslidedown.vi v0, v24, 7 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 144 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v24, 6 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 176 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v24, 5 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -296 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v24, 4 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -320 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m2, ta, ma - vslidedown.vi v0, v24, 3 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -336 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v0, v24, 2 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -352 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m1, ta, ma - vmv1r.v v0, v24 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 160 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v0, (a0) # Unknown-size Folded Spill - vslidedown.vi v24, v24, 1 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -360 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m4, ta, ma - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1072 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslidedown.vi v24, v8, 7 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -432 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vslidedown.vi v24, v8, 6 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 952 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vslidedown.vi v24, v8, 5 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -16 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vslidedown.vi v24, v8, 4 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 32 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m2, ta, ma - vslidedown.vi v24, v8, 3 - csrr a0, vlenb - slli a0, a0, 12 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vslidedown.vi v24, v8, 2 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -24 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m1, ta, ma - vslidedown.vi v24, v8, 1 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -48 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m4, ta, ma - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1048 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslidedown.vi v24, v8, 7 - csrr a0, vlenb - li a2, 7 - slli a2, a2, 9 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vslidedown.vi v24, v8, 6 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -520 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vslidedown.vi v24, v8, 5 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -528 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vslidedown.vi v24, v8, 4 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -536 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m2, ta, ma - vslidedown.vi v24, v8, 3 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -552 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vslidedown.vi v24, v8, 2 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -568 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m1, ta, ma - vslidedown.vi v24, v8, 1 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -584 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m4, ta, ma - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1032 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslidedown.vi v24, v8, 7 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -136 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vslidedown.vi v24, v8, 6 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -168 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vslidedown.vi v24, v8, 5 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -184 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vslidedown.vi v24, v8, 4 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -152 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m2, ta, ma - vslidedown.vi v24, v8, 3 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -616 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vslidedown.vi v24, v8, 2 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -632 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m1, ta, ma - vslidedown.vi v24, v8, 1 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -648 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m4, ta, ma - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1056 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslidedown.vi v24, v8, 7 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -696 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vslidedown.vi v24, v8, 6 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -704 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vslidedown.vi v24, v8, 5 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -712 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vslidedown.vi v24, v8, 4 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 936 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m2, ta, ma - vslidedown.vi v24, v8, 3 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -344 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vslidedown.vi v24, v8, 2 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -304 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m1, ta, ma - vslidedown.vi v24, v8, 1 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -328 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m4, ta, ma - csrr a0, vlenb - li a2, 5 - slli a2, a2, 10 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslidedown.vi v24, v8, 7 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -728 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vslidedown.vi v24, v8, 6 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -736 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vslidedown.vi v24, v8, 5 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -752 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vslidedown.vi v24, v8, 4 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -760 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m2, ta, ma - vslidedown.vi v24, v8, 3 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -776 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vslidedown.vi v24, v8, 2 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -792 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m1, ta, ma - vslidedown.vi v24, v8, 1 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -808 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m4, ta, ma - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1016 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v8, (a0) # Unknown-size Folded Reload - vslidedown.vi v24, v8, 7 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -440 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vslidedown.vi v24, v8, 6 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -448 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vslidedown.vi v24, v8, 5 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -456 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vslidedown.vi v24, v8, 4 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -480 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m2, ta, ma - vslidedown.vi v24, v8, 3 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -496 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vslidedown.vi v24, v8, 2 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -464 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill vsetivli zero, 1, e64, m1, ta, ma vslidedown.vi v8, v8, 1 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -864 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -600 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill vsetivli zero, 1, e64, m4, ta, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1040 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1008 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v24, (a0) # Unknown-size Folded Reload vslidedown.vi v8, v24, 7 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -872 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -912 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill vslidedown.vi v8, v24, 6 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -880 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -920 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill vslidedown.vi v8, v24, 5 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -888 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -928 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill vslidedown.vi v8, v24, 4 csrr a0, vlenb - li a2, 25 - slli a2, a2, 7 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -936 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill vsetivli zero, 1, e64, m2, ta, ma vslidedown.vi v8, v24, 3 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -904 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -944 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill vslidedown.vi v8, v24, 2 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 928 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -952 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill vsetivli zero, 1, e64, m1, ta, ma vslidedown.vi v8, v24, 1 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -600 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -960 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill vsetivli zero, 1, e64, m4, ta, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1008 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1112 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v24, (a0) # Unknown-size Folded Reload - vslidedown.vi v8, v24, 7 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload + vslidedown.vi v8, v16, 7 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -912 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1040 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v24, 6 + vslidedown.vi v8, v16, 6 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -920 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1048 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v24, 5 + vslidedown.vi v8, v16, 5 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -928 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1056 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v24, 4 + vslidedown.vi v8, v16, 4 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -936 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1064 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill vsetivli zero, 1, e64, m2, ta, ma - vslidedown.vi v8, v24, 3 + vslidedown.vi v8, v16, 3 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -944 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1072 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v24, 2 + vslidedown.vi v8, v16, 2 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -952 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1080 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill vsetivli zero, 1, e64, m1, ta, ma - vslidedown.vi v8, v24, 1 + vslidedown.vi v8, v16, 1 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -960 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1000 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill vsetivli zero, 1, e64, m4, ta, ma - vslidedown.vi v0, v16, 7 - vslidedown.vi v8, v16, 6 + vslidedown.vi v8, v0, 7 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1048 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -968 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 5 + vslidedown.vi v8, v0, 6 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1056 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -976 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 4 + vslidedown.vi v8, v0, 5 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1064 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -984 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m2, ta, ma - vslidedown.vi v8, v16, 3 + vslidedown.vi v8, v0, 4 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1072 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -992 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vslidedown.vi v8, v16, 2 - vsetivli zero, 1, e64, m1, ta, ma - vmv1r.v v24, v16 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 960 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vslidedown.vi v16, v16, 1 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1000 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v16, (a0) # Unknown-size Folded Spill - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1112 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vl8r.v v16, (a0) # Unknown-size Folded Reload - vsetivli zero, 1, e64, m4, ta, ma - vslidedown.vi v24, v16, 7 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -968 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vslidedown.vi v24, v16, 6 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -976 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vslidedown.vi v24, v16, 5 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -984 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vslidedown.vi v24, v16, 4 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -992 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill vsetivli zero, 1, e64, m2, ta, ma - vslidedown.vi v24, v16, 3 - csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1008 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vslidedown.vi v24, v16, 2 - csrr a0, vlenb - li a2, 3 - slli a2, a2, 10 - mul a0, a0, a2 - add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - vsetivli zero, 1, e64, m1, ta, ma - addi a5, a5, 1 - vslidedown.vi v24, v16, 1 + vslidedown.vi v8, v0, 3 csrr a0, vlenb - lui a2, 1 - addiw a2, a2, -1032 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, -1008 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 - vs8r.v v24, (a0) # Unknown-size Folded Spill - beq a5, a1, .LBB17_3 - j .LBB17_2 -.LBB17_3: # %for.cond.cleanup4 - # in Loop: Header=BB17_1 Depth=1 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vs8r.v v8, (a0) # Unknown-size Folded Spill + vslidedown.vi v8, v0, 2 csrr a0, vlenb - lui a1, 1 - addiw a1, a1, -1080 + li a1, 3 + slli a1, a1, 10 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 vs8r.v v8, (a0) # Unknown-size Folded Spill - vmv1r.v v24, v0 + vsetivli zero, 1, e64, m1, ta, ma + addi a5, a5, 1 + vslidedown.vi v0, v0, 1 csrr a0, vlenb lui a1, 1 - addiw a1, a1, -1040 + addiw a1, a1, -1032 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 addiw a1, a1, -960 add a0, a0, a1 - vs8r.v v24, (a0) # Unknown-size Folded Spill - ld a1, 176(sp) # 8-byte Folded Reload - addi a1, a1, 1 + vs8r.v v0, (a0) # Unknown-size Folded Spill + beq a5, t1, .LBB17_3 + j .LBB17_2 +.LBB17_3: # %for.cond.cleanup4 + # in Loop: Header=BB17_1 Depth=1 + ld a5, 176(sp) # 8-byte Folded Reload + addi a5, a5, 1 ld a0, 248(sp) # 8-byte Folded Reload addi a0, a0, 25 sd a0, 248(sp) # 8-byte Folded Spill li a0, 11 - beq a1, a0, .LBB17_4 + beq a5, a0, .LBB17_4 j .LBB17_1 .LBB17_4: # %for.cond.cleanup vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 960 + addiw a1, a1, 1112 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -203152,7 +202938,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 896 + addiw a1, a1, 904 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -203163,7 +202949,7 @@ vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 904 + addiw a1, a1, 912 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -203174,7 +202960,7 @@ vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 912 + addiw a1, a1, 920 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -203186,7 +202972,7 @@ vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 920 + addiw a1, a1, 928 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -203220,7 +203006,7 @@ vslideup.vi v8, v24, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 960 + addiw a1, a1, 1112 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -203230,7 +203016,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1112 + addiw a1, a1, 1104 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -203404,7 +203190,7 @@ vslideup.vi v16, v8, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1112 + addiw a1, a1, 1104 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -203423,7 +203209,7 @@ vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, 896 + addiw a1, a1, 904 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -203434,7 +203220,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 904 + addiw a1, a1, 912 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -203445,7 +203231,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 912 + addiw a1, a1, 920 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -203456,7 +203242,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 920 + addiw a1, a1, 928 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -203579,7 +203365,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 928 + addiw a1, a1, 936 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -203753,7 +203539,7 @@ vslideup.vi v16, v8, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 928 + addiw a1, a1, 936 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -203763,7 +203549,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 944 + addiw a1, a1, 952 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -203937,7 +203723,7 @@ vslideup.vi v16, v8, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 944 + addiw a1, a1, 952 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -203947,7 +203733,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 936 + addiw a1, a1, 944 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -204121,7 +203907,7 @@ vslideup.vi v16, v8, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 936 + addiw a1, a1, 944 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -204315,7 +204101,7 @@ vsetivli zero, 2, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 952 + addiw a1, a1, 960 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -204424,7 +204210,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 160 + addiw a1, a1, 1056 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -204489,7 +204275,7 @@ vslideup.vi v16, v8, 15 csrr a0, vlenb lui a1, 1 - addiw a1, a1, 952 + addiw a1, a1, 960 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -204508,7 +204294,7 @@ vl8r.v v0, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1064 + addiw a1, a1, 1072 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -204596,7 +204382,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 208 + addiw a1, a1, 200 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -204607,7 +204393,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 232 + addiw a1, a1, 224 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -204618,7 +204404,7 @@ vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 248 + addiw a1, a1, 240 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -204628,8 +204414,8 @@ vslideup.vi v0, v8, 11 vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb - lui a1, 1 - addiw a1, a1, 264 + li a1, 17 + slli a1, a1, 8 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -204640,7 +204426,7 @@ vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 272 + addiw a1, a1, 264 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -204651,7 +204437,7 @@ vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 280 + addiw a1, a1, 272 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -204662,7 +204448,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 288 + addiw a1, a1, 280 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -204682,7 +204468,7 @@ vl8r.v v24, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a1, 1 - addiw a1, a1, 336 + addiw a1, a1, 328 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -204693,7 +204479,7 @@ vsetivli zero, 3, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 352 + addiw a1, a1, 344 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -204704,7 +204490,7 @@ vsetivli zero, 4, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 368 + addiw a1, a1, 360 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -204715,7 +204501,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 384 + addiw a1, a1, 376 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -204726,7 +204512,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 400 + addiw a1, a1, 392 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -204737,7 +204523,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 416 + addiw a1, a1, 408 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -204748,7 +204534,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 424 + addiw a1, a1, 416 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -204759,7 +204545,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1080 + addiw a1, a1, 424 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -204899,7 +204685,7 @@ vsetivli zero, 5, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 168 + addiw a1, a1, 160 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -204910,7 +204696,7 @@ vsetivli zero, 6, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 184 + addiw a1, a1, 176 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -204921,7 +204707,7 @@ vsetivli zero, 7, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 192 + addiw a1, a1, 184 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -205020,7 +204806,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 1088 + addiw a1, a1, 672 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -205115,7 +204901,7 @@ vsetivli zero, 8, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 672 + addiw a1, a1, 680 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -205126,7 +204912,7 @@ vsetivli zero, 9, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 680 + addiw a1, a1, 688 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -205137,7 +204923,7 @@ vsetivli zero, 10, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 688 + addiw a1, a1, 696 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -205148,7 +204934,7 @@ vsetivli zero, 11, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 696 + addiw a1, a1, 704 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -205159,7 +204945,7 @@ vsetivli zero, 12, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 704 + addiw a1, a1, 712 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -205170,7 +204956,7 @@ vsetivli zero, 13, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 712 + addiw a1, a1, 720 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -205181,7 +204967,7 @@ vsetivli zero, 14, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 720 + addiw a1, a1, 728 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -205192,7 +204978,7 @@ vsetivli zero, 15, e64, m8, tu, ma csrr a0, vlenb lui a1, 1 - addiw a1, a1, 728 + addiw a1, a1, 736 mul a0, a0, a1 add a0, sp, a0 lui a1, 31 @@ -205204,7 +204990,7 @@ addi a0, sp, 256 csrr a1, vlenb lui a2, 1 - addiw a2, a2, 960 + addiw a2, a2, 1112 mul a1, a1, a2 add a1, sp, a1 lui a2, 31 @@ -205212,21 +204998,21 @@ add a1, a1, a2 vl8r.v v24, (a1) # Unknown-size Folded Reload vse64.v v24, (a0) + csrr a0, vlenb + lui a1, 1 + addiw a1, a1, 1104 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 + vl8r.v v16, (a0) # Unknown-size Folded Reload ld a0, 160(sp) # 8-byte Folded Reload - csrr a1, vlenb - lui a2, 1 - addiw a2, a2, 1112 - mul a1, a1, a2 - add a1, sp, a1 - lui a2, 31 - addiw a2, a2, -960 - add a1, a1, a2 - vl8r.v v16, (a1) # Unknown-size Folded Reload vse64.v v16, (a0) fld fa5, 320(sp) csrr a1, vlenb lui a2, 1 - addiw a2, a2, 752 + addiw a2, a2, 760 mul a1, a1, a2 add a1, sp, a1 lui a2, 31 @@ -205248,16 +205034,16 @@ vsetivli zero, 8, e64, m4, ta, ma vse64.v v24, (a0) vsetivli zero, 16, e64, m8, ta, ma - ld a1, 152(sp) # 8-byte Folded Reload csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 1000 - mul a0, a0, a2 + lui a1, 1 + addiw a1, a1, 1000 + mul a0, a0, a1 add a0, sp, a0 - lui a2, 31 - addiw a2, a2, -960 - add a0, a0, a2 + lui a1, 31 + addiw a1, a1, -960 + add a0, a0, a1 vl8r.v v8, (a0) # Unknown-size Folded Reload + ld a1, 152(sp) # 8-byte Folded Reload vse64.v v8, (a1) addi a0, a1, 192 vsetivli zero, 1, e64, m1, ta, ma @@ -205363,7 +205149,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a2, vlenb lui a3, 1 - addiw a3, a3, 928 + addiw a3, a3, 936 mul a2, a2, a3 add a2, sp, a2 lui a3, 31 @@ -205475,7 +205261,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a2, vlenb lui a3, 1 - addiw a3, a3, 944 + addiw a3, a3, 952 mul a2, a2, a3 add a2, sp, a2 lui a3, 31 @@ -205551,7 +205337,7 @@ vsetivli zero, 6, e64, m4, tu, ma csrr a0, vlenb lui a2, 1 - addiw a2, a2, 1056 + addiw a2, a2, 1064 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 @@ -205587,7 +205373,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a2, vlenb lui a3, 1 - addiw a3, a3, 936 + addiw a3, a3, 944 mul a2, a2, a3 add a2, sp, a2 lui a3, 31 @@ -205599,7 +205385,7 @@ vsetivli zero, 1, e64, m1, ta, ma csrr a2, vlenb lui a3, 1 - addiw a3, a3, 216 + addiw a3, a3, 208 mul a2, a2, a3 add a2, sp, a2 lui a3, 31 @@ -205652,7 +205438,7 @@ vsetivli zero, 5, e64, m4, tu, ma csrr a0, vlenb lui a2, 1 - addiw a2, a2, 200 + addiw a2, a2, 192 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 @@ -205663,7 +205449,7 @@ vsetivli zero, 6, e64, m4, tu, ma csrr a0, vlenb lui a2, 1 - addiw a2, a2, 224 + addiw a2, a2, 216 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 @@ -205674,7 +205460,7 @@ vsetivli zero, 7, e64, m4, tu, ma csrr a0, vlenb lui a2, 1 - addiw a2, a2, 240 + addiw a2, a2, 232 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 @@ -205684,8 +205470,8 @@ vslideup.vi v16, v8, 6 vsetivli zero, 8, e64, m4, ta, ma csrr a0, vlenb - li a2, 17 - slli a2, a2, 8 + lui a2, 1 + addiw a2, a2, 248 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 @@ -205722,7 +205508,7 @@ vsetivli zero, 2, e64, m4, tu, ma csrr a0, vlenb lui a2, 1 - addiw a2, a2, 408 + addiw a2, a2, 400 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 @@ -205731,7 +205517,7 @@ vl8r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a2, 1 - addiw a2, a2, 376 + addiw a2, a2, 368 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 @@ -205742,7 +205528,7 @@ vsetivli zero, 3, e64, m4, tu, ma csrr a0, vlenb lui a2, 1 - addiw a2, a2, 392 + addiw a2, a2, 384 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 @@ -205753,7 +205539,7 @@ vsetivli zero, 4, e64, m4, tu, ma csrr a0, vlenb lui a2, 1 - addiw a2, a2, 1072 + addiw a2, a2, 1080 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 @@ -205809,7 +205595,7 @@ vsetivli zero, 16, e64, m8, ta, ma csrr a2, vlenb lui a3, 1 - addiw a3, a3, 952 + addiw a3, a3, 960 mul a2, a2, a3 add a2, sp, a2 lui a3, 31 @@ -205832,7 +205618,7 @@ vsetivli zero, 2, e64, m4, tu, ma csrr a0, vlenb lui a2, 1 - addiw a2, a2, 176 + addiw a2, a2, 168 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 @@ -205924,7 +205710,7 @@ vsetivli zero, 1, e64, m1, ta, ma csrr a2, vlenb lui a3, 1 - addiw a3, a3, 320 + addiw a3, a3, 312 mul a2, a2, a3 add a2, sp, a2 lui a3, 31 @@ -205935,7 +205721,7 @@ vsetivli zero, 2, e64, m4, tu, ma csrr a0, vlenb lui a2, 1 - addiw a2, a2, 1096 + addiw a2, a2, 1088 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 @@ -205955,7 +205741,7 @@ vsetivli zero, 3, e64, m4, tu, ma csrr a0, vlenb lui a2, 1 - addiw a2, a2, 296 + addiw a2, a2, 288 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 @@ -205966,7 +205752,7 @@ vsetivli zero, 4, e64, m4, tu, ma csrr a0, vlenb lui a2, 1 - addiw a2, a2, 304 + addiw a2, a2, 296 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 @@ -205977,7 +205763,7 @@ vsetivli zero, 5, e64, m4, tu, ma csrr a0, vlenb lui a2, 1 - addiw a2, a2, 312 + addiw a2, a2, 304 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 @@ -205988,7 +205774,7 @@ vsetivli zero, 6, e64, m4, tu, ma csrr a0, vlenb lui a2, 1 - addiw a2, a2, 328 + addiw a2, a2, 320 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 @@ -205999,7 +205785,7 @@ vsetivli zero, 7, e64, m4, tu, ma csrr a0, vlenb lui a2, 1 - addiw a2, a2, 344 + addiw a2, a2, 336 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 @@ -206010,7 +205796,7 @@ vsetivli zero, 8, e64, m4, ta, ma csrr a0, vlenb lui a2, 1 - addiw a2, a2, 360 + addiw a2, a2, 352 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 @@ -206036,7 +205822,7 @@ vsetivli zero, 1, e64, m1, ta, ma csrr a2, vlenb lui a3, 1 - addiw a3, a3, 1104 + addiw a3, a3, 1096 mul a2, a2, a3 add a2, sp, a2 lui a3, 31 @@ -206046,8 +205832,8 @@ vse64.v v16, (a0) vsetivli zero, 2, e64, m4, tu, ma csrr a0, vlenb - lui a2, 1 - addiw a2, a2, 760 + li a2, 19 + slli a2, a2, 8 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 @@ -206056,7 +205842,7 @@ vl8r.v v24, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a2, 1 - addiw a2, a2, 736 + addiw a2, a2, 744 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 @@ -206067,7 +205853,7 @@ vsetivli zero, 3, e64, m4, tu, ma csrr a0, vlenb lui a2, 1 - addiw a2, a2, 744 + addiw a2, a2, 752 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 @@ -206077,8 +205863,8 @@ vslideup.vi v24, v16, 2 vsetivli zero, 4, e64, m4, tu, ma csrr a0, vlenb - li a2, 19 - slli a2, a2, 8 + lui a2, 1 + addiw a2, a2, 776 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 @@ -206089,7 +205875,7 @@ vsetivli zero, 5, e64, m4, tu, ma csrr a0, vlenb lui a2, 1 - addiw a2, a2, 776 + addiw a2, a2, 784 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 @@ -206100,7 +205886,7 @@ vsetivli zero, 6, e64, m4, tu, ma csrr a0, vlenb lui a2, 1 - addiw a2, a2, 784 + addiw a2, a2, 792 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 @@ -206111,7 +205897,7 @@ vsetivli zero, 7, e64, m4, tu, ma csrr a0, vlenb lui a2, 1 - addiw a2, a2, 792 + addiw a2, a2, 800 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 @@ -206122,7 +205908,7 @@ vsetivli zero, 8, e64, m4, ta, ma csrr a0, vlenb lui a2, 1 - addiw a2, a2, 800 + addiw a2, a2, 808 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 @@ -206148,7 +205934,7 @@ vsetivli zero, 1, e64, m1, ta, ma csrr a2, vlenb lui a3, 1 - addiw a3, a3, 808 + addiw a3, a3, 816 mul a2, a2, a3 add a2, sp, a2 lui a3, 31 @@ -206234,7 +206020,7 @@ vsetivli zero, 8, e64, m4, ta, ma csrr a0, vlenb lui a2, 1 - addiw a2, a2, 816 + addiw a2, a2, 824 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 @@ -206260,7 +206046,7 @@ vsetivli zero, 1, e64, m1, ta, ma csrr a2, vlenb lui a3, 1 - addiw a3, a3, 864 + addiw a3, a3, 872 mul a2, a2, a3 add a2, sp, a2 lui a3, 31 @@ -206271,7 +206057,7 @@ vsetivli zero, 2, e64, m4, tu, ma csrr a0, vlenb lui a2, 1 - addiw a2, a2, 840 + addiw a2, a2, 848 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 @@ -206280,7 +206066,7 @@ vl8r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb lui a2, 1 - addiw a2, a2, 824 + addiw a2, a2, 832 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 @@ -206291,7 +206077,7 @@ vsetivli zero, 3, e64, m4, tu, ma csrr a0, vlenb lui a2, 1 - addiw a2, a2, 832 + addiw a2, a2, 840 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 @@ -206302,7 +206088,7 @@ vsetivli zero, 4, e64, m4, tu, ma csrr a0, vlenb lui a2, 1 - addiw a2, a2, 848 + addiw a2, a2, 856 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 @@ -206313,7 +206099,7 @@ vsetivli zero, 5, e64, m4, tu, ma csrr a0, vlenb lui a2, 1 - addiw a2, a2, 856 + addiw a2, a2, 864 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 @@ -206324,7 +206110,7 @@ vsetivli zero, 6, e64, m4, tu, ma csrr a0, vlenb lui a2, 1 - addiw a2, a2, 872 + addiw a2, a2, 880 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 @@ -206335,7 +206121,7 @@ vsetivli zero, 7, e64, m4, tu, ma csrr a0, vlenb lui a2, 1 - addiw a2, a2, 888 + addiw a2, a2, 896 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 @@ -206346,7 +206132,7 @@ vsetivli zero, 8, e64, m4, ta, ma csrr a0, vlenb lui a2, 1 - addiw a2, a2, 880 + addiw a2, a2, 888 mul a0, a0, a2 add a0, sp, a0 lui a2, 31 --- build.head//SingleSource/Benchmarks/Shootout/CMakeFiles/Shootout-matrix.dir/matrix.s 2023-11-13 08:03:22.899543023 +0000 +++ build//SingleSource/Benchmarks/Shootout/CMakeFiles/Shootout-matrix.dir/matrix.s 2023-11-13 08:03:17.967685585 +0000 @@ -514,6 +514,7 @@ vse32.v v8, (a0) li a1, 9 sw a1, 32(a0) + li s4, 9 li s9, 10 sw s9, 36(a0) li a0, 40 @@ -612,8 +613,8 @@ vse32.v v10, (a0) li a1, 59 sw a1, 32(a0) - li s4, 60 - sw s4, 36(a0) + li a1, 60 + sw a1, 36(a0) li a0, 40 call malloc@plt sd a0, 48(s0) @@ -652,7 +653,7 @@ li s6, 79 sw s6, 32(a0) sw s1, 36(a0) - li s2, 80 + li s3, 80 li a0, 40 call malloc@plt sd a0, 64(s0) @@ -684,8 +685,8 @@ addi a1, sp, 64 vs2r.v v10, (a1) # Unknown-size Folded Spill vse32.v v10, (a0) - li s3, 99 - sw s3, 32(a0) + li s2, 99 + sw s2, 32(a0) li s11, 100 sw s11, 36(a0) li a0, 80 @@ -702,8 +703,8 @@ addi a1, a1, 64 vl2r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) - li a1, 9 - sw a1, 32(a0) + sw s4, 32(a0) + li s4, 9 sw s9, 36(a0) li a0, 40 call malloc@plt @@ -775,7 +776,8 @@ vse32.v v8, (a0) li a1, 59 sw a1, 32(a0) - sw s4, 36(a0) + li a1, 60 + sw a1, 36(a0) li a0, 40 call malloc@plt sd a0, 48(s1) @@ -801,7 +803,7 @@ vl2r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) sw s6, 32(a0) - sw s2, 36(a0) + sw s3, 36(a0) li a0, 40 call malloc@plt sd a0, 64(s1) @@ -822,14 +824,14 @@ addi a1, sp, 64 vl2r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) - sw s3, 32(a0) + sw s2, 32(a0) sw s11, 36(a0) li a0, 80 call malloc@plt - mv s2, a0 + mv s3, a0 li a0, 40 call malloc@plt - sd a0, 0(s2) + sd a0, 0(s3) vsetivli zero, 8, e32, m2, ta, ma csrr a1, vlenb li a2, 18 @@ -838,12 +840,11 @@ addi a1, a1, 64 vl2r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) - li a1, 9 - sw a1, 32(a0) + sw s4, 32(a0) sw s9, 36(a0) li a0, 40 call malloc@plt - sd a0, 8(s2) + sd a0, 8(s3) vsetivli zero, 8, e32, m2, ta, ma csrr a1, vlenb slli a1, a1, 4 @@ -857,7 +858,7 @@ sw a1, 36(a0) li a0, 40 call malloc@plt - sd a0, 16(s2) + sd a0, 16(s3) vsetivli zero, 8, e32, m2, ta, ma csrr a1, vlenb li a2, 14 @@ -872,7 +873,7 @@ sw a1, 36(a0) li a0, 40 call malloc@plt - sd a0, 24(s2) + sd a0, 24(s3) vsetivli zero, 8, e32, m2, ta, ma csrr a1, vlenb li a2, 12 @@ -886,7 +887,7 @@ sw s8, 36(a0) li a0, 40 call malloc@plt - sd a0, 32(s2) + sd a0, 32(s3) vsetivli zero, 8, e32, m2, ta, ma csrr a1, vlenb li a2, 10 @@ -901,7 +902,7 @@ sw a1, 36(a0) li a0, 40 call malloc@plt - sd a0, 40(s2) + sd a0, 40(s3) vsetivli zero, 8, e32, m2, ta, ma csrr a1, vlenb slli a1, a1, 3 @@ -911,10 +912,11 @@ vse32.v v8, (a0) li a1, 59 sw a1, 32(a0) - sw s4, 36(a0) + li a1, 60 + sw a1, 36(a0) li a0, 40 call malloc@plt - sd a0, 48(s2) + sd a0, 48(s3) vsetivli zero, 8, e32, m2, ta, ma csrr a1, vlenb li a2, 6 @@ -929,7 +931,7 @@ sw s5, 36(a0) li a0, 40 call malloc@plt - sd a0, 56(s2) + sd a0, 56(s3) vsetivli zero, 8, e32, m2, ta, ma csrr a1, vlenb slli a1, a1, 2 @@ -943,7 +945,7 @@ sw a1, 36(a0) li a0, 40 call malloc@plt - sd a0, 64(s2) + sd a0, 64(s3) vsetivli zero, 8, e32, m2, ta, ma csrr a1, vlenb slli a1, a1, 1 @@ -956,12 +958,12 @@ sw s10, 36(a0) li a0, 40 call malloc@plt - sd a0, 72(s2) + sd a0, 72(s3) vsetivli zero, 8, e32, m2, ta, ma addi a1, sp, 64 vl2r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) - sw s3, 32(a0) + sw s2, 32(a0) lw s1, 40(sp) # 8-byte Folded Reload sd a0, 40(sp) # 8-byte Folded Spill sw s11, 36(a0) @@ -990,26 +992,26 @@ # Child Loop BB4_7 Depth 3 slli t5, t4, 3 add t6, s0, t5 - add t5, s2, t5 + add t5, s3, t5 ld t5, 0(t5) ld t6, 0(t6) - li s3, 0 + li s2, 0 .LBB4_7: # %for.cond4.preheader.us.us.i # Parent Loop BB4_5 Depth=1 # Parent Loop BB4_6 Depth=2 # => This Inner Loop Header: Depth=3 lw s10, 0(t6) - add s11, a1, s3 + add s11, a1, s2 lw s11, 0(s11) mul s10, s11, s10 lw s11, 4(t6) - add ra, a2, s3 + add ra, a2, s2 lw ra, 0(ra) lw s4, 8(t6) - add a3, s5, s3 + add a3, s5, s2 lw a3, 0(a3) lw s6, 12(t6) - add a4, s7, s3 + add a4, s7, s2 lw a4, 0(a4) mul s11, ra, s11 add s10, s11, s10 @@ -1018,13 +1020,13 @@ add a3, a4, a3 add a3, a3, s10 lw a4, 16(t6) - add s4, a5, s3 + add s4, a5, s2 lw s4, 0(s4) lw s6, 20(t6) - add s10, a6, s3 + add s10, a6, s2 lw s10, 0(s10) lw s11, 24(t6) - add ra, a7, s3 + add ra, a7, s2 lw ra, 0(ra) mul a4, s4, a4 mul s4, s10, s6 @@ -1033,13 +1035,13 @@ add a4, s4, a4 add a3, a4, a3 lw a4, 28(t6) - add s4, t0, s3 + add s4, t0, s2 lw s4, 0(s4) lw s6, 32(t6) - add s10, t1, s3 + add s10, t1, s2 lw s10, 0(s10) lw s11, 36(t6) - add ra, t2, s3 + add ra, t2, s2 lw ra, 0(ra) mul a4, s4, a4 mul s4, s10, s6 @@ -1047,10 +1049,10 @@ mul s4, ra, s11 add a4, s4, a4 add a3, a4, a3 - add a4, t5, s3 - addi s3, s3, 4 + add a4, t5, s2 + addi s2, s2, 4 sw a3, 0(a4) - bne s3, s8, .LBB4_7 + bne s2, s8, .LBB4_7 # %bb.8: # %for.cond1.for.inc20_crit_edge.split.us.us.i # in Loop: Header=BB4_6 Depth=2 addi t4, t4, 1 @@ -1060,11 +1062,11 @@ addiw t3, t3, 1 bne t3, s1, .LBB4_5 .LBB4_10: # %for.end - ld s3, 0(s2) - ld s8, 16(s2) - ld s9, 24(s2) - ld s10, 32(s2) - lw a1, 0(s3) + ld s2, 0(s3) + ld s8, 16(s3) + ld s9, 24(s3) + ld s10, 32(s3) + lw a1, 0(s2) lw a2, 12(s8) lw a3, 8(s9) lw a4, 16(s10) @@ -1125,7 +1127,7 @@ call free@plt ld a0, 32(sp) # 8-byte Folded Reload call free@plt - ld a0, 40(s2) + ld a0, 40(s3) call free@plt mv a0, s10 call free@plt @@ -1133,12 +1135,12 @@ call free@plt mv a0, s8 call free@plt - ld a0, 8(s2) - call free@plt - mv a0, s3 + ld a0, 8(s3) call free@plt mv a0, s2 call free@plt + mv a0, s3 + call free@plt li a0, 0 csrr a1, vlenb li a2, 20 --- build.head//MultiSource/Applications/oggenc/CMakeFiles/oggenc.dir/oggenc.s 2023-11-13 08:03:22.343559095 +0000 +++ build//MultiSource/Applications/oggenc/CMakeFiles/oggenc.dir/oggenc.s 2023-11-13 08:03:17.391702234 +0000 @@ -20201,9 +20201,9 @@ sw zero, 532(s0) sd zero, 536(s0) vsetivli zero, 2, e64, m1, ta, ma + addi a1, sp, 176 + vl1r.v v8, (a1) # Unknown-size Folded Reload ld a1, 48(sp) # 8-byte Folded Reload - addi a2, sp, 176 - vl1r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a1) ld a1, 40(sp) # 8-byte Folded Reload vse64.v v8, (a1) @@ -23439,9 +23439,9 @@ jalr a3 sd s4, 16(s0) vsetivli zero, 4, e32, m1, ta, ma + addi a0, sp, 128 + vl1r.v v8, (a0) # Unknown-size Folded Reload ld a0, 48(sp) # 8-byte Folded Reload - addi a1, sp, 128 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) sw zero, 16(a0) .LBB110_16: # %_seek_helper.exit @@ -23554,9 +23554,9 @@ jalr a3 sd s4, 16(s0) vsetivli zero, 4, e32, m1, ta, ma + addi a0, sp, 128 + vl1r.v v8, (a0) # Unknown-size Folded Reload ld a0, 48(sp) # 8-byte Folded Reload - addi a1, sp, 128 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) sw zero, 16(a0) .LBB110_35: # %if.end97 @@ -23840,9 +23840,9 @@ jalr a3 sd s3, 16(s0) vsetivli zero, 4, e32, m1, ta, ma + addi a0, sp, 128 + vl1r.v v8, (a0) # Unknown-size Folded Reload ld a0, 48(sp) # 8-byte Folded Reload - addi a1, sp, 128 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) sw zero, 16(a0) mv a1, s3 @@ -23889,9 +23889,9 @@ jalr a3 sd s7, 16(s0) vsetivli zero, 4, e32, m1, ta, ma + addi a0, sp, 128 + vl1r.v v8, (a0) # Unknown-size Folded Reload ld a0, 48(sp) # 8-byte Folded Reload - addi a1, sp, 128 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) sw zero, 16(a0) .LBB110_85: # %_seek_helper.exit24.i @@ -24440,13 +24440,13 @@ sw zero, 532(s1) sd zero, 536(s1) vsetivli zero, 2, e64, m1, ta, ma + csrr a1, vlenb + slli a2, a1, 1 + add a1, a2, a1 + add a1, sp, a1 + addi a1, a1, 208 + vl1r.v v8, (a1) # Unknown-size Folded Reload ld a1, 56(sp) # 8-byte Folded Reload - csrr a2, vlenb - slli a3, a2, 1 - add a2, a3, a2 - add a2, sp, a2 - addi a2, a2, 208 - vl1r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a1) ld a1, 48(sp) # 8-byte Folded Reload vse64.v v8, (a1) @@ -26477,9 +26477,9 @@ sw zero, 532(s0) sd zero, 536(s0) vsetivli zero, 2, e64, m1, ta, ma + addi a1, sp, 144 + vl1r.v v8, (a1) # Unknown-size Folded Reload ld a1, 40(sp) # 8-byte Folded Reload - addi a2, sp, 144 - vl1r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a1) vse64.v v8, (s10) sd zero, 16(s10) @@ -41147,8 +41147,8 @@ vluxei64.v v10, (s6), v12 li a0, 124 vluxei64.v v16, (a0), v12 - li s9, 60 - vluxei64.v v18, (s9), v12 + li s8, 60 + vluxei64.v v18, (s8), v12 vfsub.vv v20, v8, v10 csrr a0, vlenb li a1, 26 @@ -41213,12 +41213,12 @@ vfmul.vf v8, v8, fa4 li a0, 104 vluxei64.v v16, (a0), v12 - li t5, 40 - vluxei64.v v18, (t5), v12 + li a7, 40 + vluxei64.v v18, (a7), v12 li a0, 108 vluxei64.v v20, (a0), v12 - li s0, 44 - vluxei64.v v22, (s0), v12 + li t0, 44 + vluxei64.v v22, (t0), v12 vfmul.vf v10, v10, fa5 vfadd.vv v8, v8, v10 csrr a0, vlenb @@ -41290,10 +41290,10 @@ vluxei64.v v18, (s5), v12 li t6, 24 vluxei64.v v20, (t6), v12 - li t1, 28 - vluxei64.v v22, (t1), v12 - li s8, 92 - vluxei64.v v28, (s8), v12 + li s0, 28 + vluxei64.v v22, (s0), v12 + li s9, 92 + vluxei64.v v28, (s9), v12 vfadd.vv v24, v8, v16 vfsub.vv v8, v18, v20 csrr a0, vlenb @@ -41315,12 +41315,12 @@ add a0, sp, a0 addi a0, a0, 96 vs2r.v v8, (a0) # Unknown-size Folded Spill - li a7, 16 - vluxei64.v v16, (a7), v12 - li s2, 80 - vluxei64.v v18, (s2), v12 - li s1, 20 - vluxei64.v v20, (s1), v12 + li s1, 16 + vluxei64.v v16, (s1), v12 + li t5, 80 + vluxei64.v v18, (t5), v12 + li s2, 20 + vluxei64.v v20, (s2), v12 li s7, 84 vluxei64.v v2, (s7), v12 vfadd.vv v8, v22, v28 @@ -41352,8 +41352,8 @@ vfmul.vf v20, v22, fa5 li a3, 8 vluxei64.v v22, (a3), v12 - li t0, 72 - vluxei64.v v28, (t0), v12 + li t1, 72 + vluxei64.v v28, (t1), v12 li a4, 12 vluxei64.v v2, (a4), v12 li t2, 76 @@ -41500,9 +41500,9 @@ vfadd.vv v20, v10, v2 vsoxei64.v v20, (t6), v12 vfsub.vv v10, v10, v2 - vsoxei64.v v10, (a7), v12 - addi a7, sp, 96 - vl2r.v v10, (a7) # Unknown-size Folded Reload + vsoxei64.v v10, (s1), v12 + addi t6, sp, 96 + vl2r.v v10, (t6) # Unknown-size Folded Reload vfmul.vf v10, v10, fa3 vfmul.vf v20, v22, fa3 vfsub.vv v22, v20, v10 @@ -41518,9 +41518,9 @@ vfsub.vv v10, v10, v16 vsoxei64.v v10, (a1), v12 vfadd.vv v10, v20, v8 - vsoxei64.v v10, (t1), v12 + vsoxei64.v v10, (s0), v12 vfsub.vv v8, v20, v8 - vsoxei64.v v8, (s1), v12 + vsoxei64.v v8, (s2), v12 vfadd.vv v8, v18, v28 vfsub.vv v10, v18, v28 csrr a0, vlenb @@ -41543,16 +41543,16 @@ vfadd.vv v16, v10, v8 vsoxei64.v v16, (t3), v12 vfsub.vv v8, v10, v8 - vsoxei64.v v8, (t5), v12 + vsoxei64.v v8, (a7), v12 vfadd.vv v8, v26, v20 vfsub.vv v10, v4, v6 vfadd.vv v16, v4, v6 vfadd.vv v20, v10, v18 - vsoxei64.v v20, (s0), v12 + vsoxei64.v v20, (t0), v12 vfsub.vv v10, v10, v18 vsoxei64.v v10, (t4), v12 vfadd.vv v10, v16, v8 - vsoxei64.v v10, (s9), v12 + vsoxei64.v v10, (s8), v12 vfsub.vv v8, v16, v8 vsoxei64.v v8, (ra), v12 csrr a0, vlenb @@ -41696,7 +41696,7 @@ vfadd.vv v2, v10, v4 vsoxei64.v v2, (s5), v12 vfsub.vv v10, v10, v4 - vsoxei64.v v10, (s2), v12 + vsoxei64.v v10, (t5), v12 csrr a0, vlenb li a1, 34 mul a0, a0, a1 @@ -41709,7 +41709,7 @@ vfadd.vv v6, v8, v4 vsoxei64.v v6, (a5), v12 vfsub.vv v8, v8, v4 - vsoxei64.v v8, (t0), v12 + vsoxei64.v v8, (t1), v12 vfadd.vv v8, v2, v10 vfsub.vv v10, v16, v26 vfadd.vv v16, v16, v26 @@ -41718,7 +41718,7 @@ vfsub.vv v10, v10, v30 vsoxei64.v v10, (a6), v12 vfadd.vv v10, v16, v8 - vsoxei64.v v10, (s8), v12 + vsoxei64.v v10, (s9), v12 vfsub.vv v8, v16, v8 vsoxei64.v v8, (s7), v12 vfadd.vv v8, v28, v20 @@ -43877,9 +43877,6 @@ lui a1, 8 sub a1, s0, a1 sd a0, 48(a1) # 8-byte Folded Spill - lui a0, 8 - sub a0, s0, a0 - sd s5, 40(a0) # 8-byte Folded Spill csrr a0, vlenb slli a0, a0, 1 sub a0, s0, a0 @@ -43887,6 +43884,9 @@ addiw a1, a1, 128 sub a0, a0, a1 vs1r.v v30, (a0) # Unknown-size Folded Spill + lui a0, 8 + sub a0, s0, a0 + sd s5, 40(a0) # 8-byte Folded Spill j .LBB219_2 .LBB219_1: # %min_curve.exit241.6 # in Loop: Header=BB219_2 Depth=1 @@ -44130,11 +44130,11 @@ li a2, 224 mv a1, s5 call memcpy@plt - lui a0, 8 - sub a0, s0, a0 beqz s6, .LBB219_28 # %bb.8: # %for.end50.split.us # in Loop: Header=BB219_2 Depth=1 + lui a0, 8 + sub a0, s0, a0 ld a5, 40(a0) # 8-byte Folded Reload lui a0, 8 sub a0, s0, a0 @@ -44247,7 +44247,6 @@ j .LBB219_12 .LBB219_28: # %for.body74.us.preheader # in Loop: Header=BB219_2 Depth=1 - ld a6, 40(a0) # 8-byte Folded Reload csrr a0, vlenb slli a0, a0, 1 sub a0, s0, a0 @@ -44255,6 +44254,9 @@ addiw a1, a1, 128 sub a0, a0, a1 vl1r.v v16, (a0) # Unknown-size Folded Reload + lui a0, 8 + sub a0, s0, a0 + ld a6, 40(a0) # 8-byte Folded Reload li a0, 14 lui a1, 8 sub a1, s0, a1 @@ -47260,12 +47262,6 @@ lui a0, 8 sub a0, s0, a0 fsw fa5, -128(a0) # 4-byte Folded Spill - lui a0, 8 - sub a0, s0, a0 - sd s1, 64(a0) # 8-byte Folded Spill - lui a0, 8 - sub a0, s0, a0 - sd s6, -8(a0) # 8-byte Folded Spill csrr a0, vlenb slli a0, a0, 1 sub a0, s0, a0 @@ -47273,6 +47269,12 @@ addiw a1, a1, 128 sub a0, a0, a1 vs2r.v v8, (a0) # Unknown-size Folded Spill + lui a0, 8 + sub a0, s0, a0 + sd s1, 64(a0) # 8-byte Folded Spill + lui a0, 8 + sub a0, s0, a0 + sd s6, -8(a0) # 8-byte Folded Spill j .LBB219_399 .LBB219_398: # %for.end569 # in Loop: Header=BB219_399 Depth=1 @@ -55332,6 +55334,11 @@ .LBB248_23: # %call.sqrt # in Loop: Header=BB248_17 Depth=2 fmv.d fa0, fa5 + csrr a0, vlenb + slli a0, a0, 1 + sub a0, s0, a0 + addi a0, a0, -304 + vs1r.v v14, (a0) # Unknown-size Folded Spill sd a2, -208(s0) # 8-byte Folded Spill sd a1, -216(s0) # 8-byte Folded Spill sd t0, -224(s0) # 8-byte Folded Spill @@ -55340,11 +55347,6 @@ sd t3, -248(s0) # 8-byte Folded Spill sd t4, -256(s0) # 8-byte Folded Spill sd t5, -264(s0) # 8-byte Folded Spill - csrr a0, vlenb - slli a0, a0, 1 - sub a0, s0, a0 - addi a0, a0, -304 - vs1r.v v14, (a0) # Unknown-size Folded Spill sd ra, -272(s0) # 8-byte Folded Spill sd a5, -280(s0) # 8-byte Folded Spill sd a6, -288(s0) # 8-byte Folded Spill @@ -55354,11 +55356,6 @@ ld a6, -288(s0) # 8-byte Folded Reload ld a5, -280(s0) # 8-byte Folded Reload ld ra, -272(s0) # 8-byte Folded Reload - csrr a0, vlenb - slli a0, a0, 1 - sub a0, s0, a0 - addi a0, a0, -304 - vl1r.v v14, (a0) # Unknown-size Folded Reload li t6, 35 ld t5, -264(s0) # 8-byte Folded Reload ld t4, -256(s0) # 8-byte Folded Reload @@ -55368,6 +55365,11 @@ ld t0, -224(s0) # 8-byte Folded Reload ld a1, -216(s0) # 8-byte Folded Reload ld a2, -208(s0) # 8-byte Folded Reload + csrr a0, vlenb + slli a0, a0, 1 + sub a0, s0, a0 + addi a0, a0, -304 + vl1r.v v14, (a0) # Unknown-size Folded Reload flt.d a0, fs0, fs5 bnez a0, .LBB248_22 .LBB248_24: # %if.else @@ -56533,51 +56535,51 @@ .cfi_escape 0x0f, 0x0e, 0x72, 0x00, 0x11, 0xf0, 0x00, 0x22, 0x11, 0x0c, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 112 + 12 * vlenb bge a3, a2, .LBB252_5 # %bb.3: + li t6, 0 li t5, 0 li t4, 0 li t3, 0 li t2, 0 - li t1, 0 li t0, 0 li s0, 0 - li s2, 0 - li s4, 0 + li s3, 0 li s5, 0 + li s6, 0 li s1, 0 - li s3, 0 + li s4, 0 .LBB252_4: # %for.end - add s0, s0, t5 - add s2, s2, t4 - add s4, s4, t3 - add s5, s5, t2 + add s0, s0, t6 + add s3, s3, t5 + add s5, s5, t4 + add s6, s6, t3 flw fa5, 1108(a6) - add s1, s1, t1 - add s3, s3, t0 - fcvt.s.l fa4, s3 + add s1, s1, t2 + add s4, s4, t0 + fcvt.s.l fa4, s4 fmul.s fa5, fa5, fa4 addi a0, t0, 1 fcvt.s.l fa4, a0 fdiv.s fa5, fa5, fa4 fcvt.w.s a0, fa5, rtz - mul a1, t5, a0 + mul a1, t6, a0 add a1, s0, a1 sd a1, 16(a4) - mul a1, t4, a0 - add a1, s2, a1 + mul a1, t5, a0 + add a1, s3, a1 sd a1, 24(a4) - mul a1, t3, a0 - add a1, s4, a1 - sd a1, 32(a4) - mul a1, t2, a0 + mul a1, t4, a0 add a1, s5, a1 + sd a1, 32(a4) + mul a1, t3, a0 + add a1, s6, a1 sd a1, 40(a4) - mul a1, t1, a0 + mul a1, t2, a0 add a1, s1, a1 sd a1, 48(a4) mul a0, t0, a0 - add s3, a0, s3 + add s4, a0, s4 sext.w a0, t0 - sd s3, 56(a4) + sd s4, 56(a4) csrr a1, vlenb li a2, 12 mul a1, a1, a2 @@ -56595,54 +56597,54 @@ ret .LBB252_5: # %for.body.lr.ph addi a5, a6, 1112 - sub s6, a3, a2 - addi s6, s6, 1 + sub s2, a3, a2 + addi s2, s2, 1 csrr t0, vlenb - srli t1, t0, 2 + srli t2, t0, 2 .Lpcrel_hi647: - auipc t6, %pcrel_hi(.LCPI252_0) - bgeu s6, t1, .LBB252_7 + auipc t1, %pcrel_hi(.LCPI252_0) + bgeu s2, t2, .LBB252_7 # %bb.6: - li s3, 0 + li s4, 0 li s1, 0 + li s6, 0 li s5, 0 - li s4, 0 - li s2, 0 + li s3, 0 li s0, 0 li t0, 0 - li t1, 0 li t2, 0 li t3, 0 li t4, 0 li t5, 0 + li t6, 0 mv a7, a2 j .LBB252_10 .LBB252_7: # %vector.ph - neg a7, t1 - and s7, s6, a7 + neg a7, t2 + and s7, s2, a7 add a7, s7, a2 - vsetvli t2, zero, e64, m2, ta, ma + vsetvli t3, zero, e64, m2, ta, ma vid.v v8 vadd.vx v22, v8, a2 - slli t2, a2, 2 - add a2, a0, t2 - add t2, a1, t2 + slli t3, a2, 2 + add a2, a0, t3 + add t3, a1, t3 vmv.v.i v10, 0 - flw fa5, %pcrel_lo(.Lpcrel_hi647)(t6) - lui t3, 280574 - fmv.w.x fa4, t3 - li t3, 1023 - mv t4, s7 + flw fa5, %pcrel_lo(.Lpcrel_hi647)(t1) + lui t4, 280574 + fmv.w.x fa4, t4 + li t4, 1023 + mv t5, s7 vmv.v.i v12, 0 vmv.v.i v14, 0 vmv.v.i v16, 0 vmv.v.i v18, 0 vmv.v.i v20, 0 - csrr t5, vlenb - slli t5, t5, 3 - add t5, sp, t5 - addi t5, t5, 32 - vs2r.v v10, (t5) # Unknown-size Folded Spill + csrr t6, vlenb + slli t6, t6, 3 + add t6, sp, t6 + addi t6, t6, 32 + vs2r.v v10, (t6) # Unknown-size Folded Spill vmv.v.i v24, 0 vmv.v.i v30, 0 vmv.v.i v2, 0 @@ -56650,23 +56652,23 @@ vmv.v.i v6, 0 .LBB252_8: # %vector.body # =>This Inner Loop Header: Depth=1 - csrr t5, vlenb + csrr t6, vlenb li s0, 10 - mul t5, t5, s0 - add t5, sp, t5 - addi t5, t5, 32 - vs2r.v v12, (t5) # Unknown-size Folded Spill - csrr t5, vlenb - slli t5, t5, 2 - add t5, sp, t5 - addi t5, t5, 32 - vs2r.v v20, (t5) # Unknown-size Folded Spill - csrr t5, vlenb + mul t6, t6, s0 + add t6, sp, t6 + addi t6, t6, 32 + vs2r.v v12, (t6) # Unknown-size Folded Spill + csrr t6, vlenb + slli t6, t6, 2 + add t6, sp, t6 + addi t6, t6, 32 + vs2r.v v20, (t6) # Unknown-size Folded Spill + csrr t6, vlenb li s0, 6 - mul t5, t5, s0 - add t5, sp, t5 - addi t5, t5, 32 - vs2r.v v10, (t5) # Unknown-size Folded Spill + mul t6, t6, s0 + add t6, sp, t6 + addi t6, t6, 32 + vs2r.v v10, (t6) # Unknown-size Folded Spill vl1re32.v v9, (a2) vsetvli zero, zero, e32, m1, ta, ma vfmul.vf v8, v9, fa5 @@ -56674,9 +56676,9 @@ vfcvt.rtz.x.f.v v10, v8 vmsgt.vi v8, v10, 0 vmv.v.v v0, v8 - vle32.v v11, (t2), v0.t + vle32.v v11, (t3), v0.t vlse32.v v12, (a5), zero, v0.t - vmin.vx v10, v10, t3 + vmin.vx v10, v10, t4 vfadd.vv v11, v11, v12 vmfle.vv v1, v9, v11 vsetvli zero, zero, e64, m2, ta, ma @@ -56687,14 +56689,14 @@ vmul.vv v9, v10, v10 vsetvli zero, zero, e64, m2, ta, mu vzext.vf2 v10, v9 - csrr t5, vlenb - slli t5, t5, 1 - add t5, sp, t5 - addi t5, t5, 32 - vs2r.v v10, (t5) # Unknown-size Folded Spill + csrr t6, vlenb + slli t6, t6, 1 + add t6, sp, t6 + addi t6, t6, 32 + vs2r.v v10, (t6) # Unknown-size Folded Spill vmul.vv v12, v22, v18 - addi t5, sp, 32 - vs2r.v v12, (t5) # Unknown-size Folded Spill + addi t6, sp, 32 + vs2r.v v12, (t6) # Unknown-size Folded Spill vmandn.mm v9, v8, v1 vadd.vv v20, v6, v22 vmv1r.v v0, v9 @@ -56722,79 +56724,79 @@ vmand.mm v10, v8, v1 vmv1r.v v0, v8 vmerge.vvm v24, v24, v20, v0 - csrr t5, vlenb - slli t5, t5, 2 - add t5, sp, t5 - addi t5, t5, 32 - vl2r.v v20, (t5) # Unknown-size Folded Reload + csrr t6, vlenb + slli t6, t6, 2 + add t6, sp, t6 + addi t6, t6, 32 + vl2r.v v20, (t6) # Unknown-size Folded Reload vmv1r.v v0, v10 - csrr t5, vlenb + csrr t6, vlenb li s0, 6 - mul t5, t5, s0 - add t5, sp, t5 - addi t5, t5, 32 - vl2r.v v10, (t5) # Unknown-size Folded Reload - csrr t5, vlenb - slli t5, t5, 3 - add t5, sp, t5 - addi t5, t5, 32 - vl2r.v v12, (t5) # Unknown-size Folded Reload + mul t6, t6, s0 + add t6, sp, t6 + addi t6, t6, 32 + vl2r.v v10, (t6) # Unknown-size Folded Reload + csrr t6, vlenb + slli t6, t6, 3 + add t6, sp, t6 + addi t6, t6, 32 + vl2r.v v12, (t6) # Unknown-size Folded Reload vadd.vi v12, v12, 1, v0.t - csrr t5, vlenb - slli t5, t5, 3 - add t5, sp, t5 - addi t5, t5, 32 - vs2r.v v12, (t5) # Unknown-size Folded Spill + csrr t6, vlenb + slli t6, t6, 3 + add t6, sp, t6 + addi t6, t6, 32 + vs2r.v v12, (t6) # Unknown-size Folded Spill vmv1r.v v0, v9 vadd.vv v20, v20, v22, v0.t vadd.vv v26, v26, v18, v0.t vmv.v.v v18, v26 vadd.vv v16, v16, v28, v0.t - csrr t5, vlenb - slli t5, t5, 1 - add t5, sp, t5 - addi t5, t5, 32 - vl2r.v v12, (t5) # Unknown-size Folded Reload + csrr t6, vlenb + slli t6, t6, 1 + add t6, sp, t6 + addi t6, t6, 32 + vl2r.v v12, (t6) # Unknown-size Folded Reload vadd.vv v14, v14, v12, v0.t - csrr t5, vlenb + csrr t6, vlenb li s0, 10 - mul t5, t5, s0 - add t5, sp, t5 - addi t5, t5, 32 - vl2r.v v12, (t5) # Unknown-size Folded Reload - addi t5, sp, 32 - vl2r.v v26, (t5) # Unknown-size Folded Reload + mul t6, t6, s0 + add t6, sp, t6 + addi t6, t6, 32 + vl2r.v v12, (t6) # Unknown-size Folded Reload + addi t6, sp, 32 + vl2r.v v26, (t6) # Unknown-size Folded Reload vadd.vv v12, v12, v26, v0.t - csrr t5, vlenb + csrr t6, vlenb li s0, 10 - mul t5, t5, s0 - add t5, sp, t5 - addi t5, t5, 32 - vs2r.v v12, (t5) # Unknown-size Folded Spill - csrr t5, vlenb + mul t6, t6, s0 + add t6, sp, t6 + addi t6, t6, 32 + vs2r.v v12, (t6) # Unknown-size Folded Spill + csrr t6, vlenb li s0, 10 - mul t5, t5, s0 - add t5, sp, t5 - addi t5, t5, 32 - vl2r.v v12, (t5) # Unknown-size Folded Reload + mul t6, t6, s0 + add t6, sp, t6 + addi t6, t6, 32 + vl2r.v v12, (t6) # Unknown-size Folded Reload vadd.vi v10, v10, 1, v0.t - vadd.vx v22, v22, t1 - sub t4, t4, t1 + vadd.vx v22, v22, t2 + sub t5, t5, t2 add a2, a2, t0 - add t2, t2, t0 - bnez t4, .LBB252_8 + add t3, t3, t0 + bnez t5, .LBB252_8 # %bb.9: # %middle.block vmv.s.x v8, zero vredsum.vs v9, v6, v8 - vmv.x.s t5, v9 + vmv.x.s t6, v9 vredsum.vs v9, v4, v8 - vmv.x.s t4, v9 + vmv.x.s t5, v9 vredsum.vs v9, v2, v8 - vmv.x.s t3, v9 + vmv.x.s t4, v9 vredsum.vs v9, v30, v8 - vmv.x.s t2, v9 + vmv.x.s t3, v9 vredsum.vs v9, v24, v8 - vmv.x.s t1, v9 + vmv.x.s t2, v9 csrr a2, vlenb slli a2, a2, 3 add a2, sp, a2 @@ -56805,21 +56807,21 @@ vredsum.vs v9, v20, v8 vmv.x.s s0, v9 vredsum.vs v9, v18, v8 - vmv.x.s s2, v9 + vmv.x.s s3, v9 vredsum.vs v9, v16, v8 - vmv.x.s s4, v9 - vredsum.vs v9, v14, v8 vmv.x.s s5, v9 + vredsum.vs v9, v14, v8 + vmv.x.s s6, v9 vredsum.vs v9, v12, v8 vmv.x.s s1, v9 vredsum.vs v8, v10, v8 - vmv.x.s s3, v8 - beq s6, s7, .LBB252_4 + vmv.x.s s4, v8 + beq s2, s7, .LBB252_4 .LBB252_10: # %for.body.preheader addi a3, a3, 1 slli a2, a7, 2 add a1, a1, a2 - flw fa5, %pcrel_lo(.Lpcrel_hi647)(t6) + flw fa5, %pcrel_lo(.Lpcrel_hi647)(t1) add a0, a0, a2 lui a2, 280574 fmv.w.x fa4, a2 @@ -56827,11 +56829,11 @@ .LBB252_11: # %if.else # in Loop: Header=BB252_13 Depth=1 add s0, s0, a7 - add s2, s2, s6 - add s4, t6, s4 - add s5, s5, s7 + add s3, s3, s2 + add s5, t1, s5 + add s6, s6, s7 add s1, a2, s1 - addi s3, s3, 1 + addi s4, s4, 1 .LBB252_12: # %if.end37 # in Loop: Header=BB252_13 Depth=1 addi a7, a7, 1 @@ -56847,8 +56849,8 @@ blez a2, .LBB252_12 # %bb.14: # %if.then9 # in Loop: Header=BB252_13 Depth=1 - li t6, 1023 - blt a2, t6, .LBB252_16 + li t1, 1023 + blt a2, t1, .LBB252_16 # %bb.15: # %if.then9 # in Loop: Header=BB252_13 Depth=1 li a2, 1023 @@ -56858,21 +56860,21 @@ flw fa1, 0(a5) fadd.s fa2, fa2, fa1 fle.s s8, fa3, fa2 - slli t6, a2, 32 - srli s6, t6, 32 - mul t6, a7, a7 + slli t1, a2, 32 + srli s2, t1, 32 + mul t1, a7, a7 mul a2, a2, a2 slli a2, a2, 32 srli s7, a2, 32 - mul a2, a7, s6 + mul a2, a7, s2 beqz s8, .LBB252_11 # %bb.17: # %if.then13 # in Loop: Header=BB252_13 Depth=1 - add t5, t5, a7 - add t4, t4, s6 - add t3, t6, t3 - add t2, t2, s7 - add t1, a2, t1 + add t6, t6, a7 + add t5, t5, s2 + add t4, t1, t4 + add t3, t3, s7 + add t2, a2, t2 addi t0, t0, 1 j .LBB252_12 .Lfunc_end252: @@ -57611,7 +57613,7 @@ vs1r.v v8, (a0) # Unknown-size Folded Spill addi s1, sp, 160 li ra, 80 - li s5, 8 + li s6, 8 li a2, 31 vsetvli a0, zero, e32, m2, ta, ma vid.v v8 @@ -57656,19 +57658,19 @@ sd a1, 104(sp) # 8-byte Folded Spill slli a0, a1, 2 add a0, s7, a0 - lw s6, 4(a0) - slli a0, s6, 2 + lw s5, 4(a0) + slli a0, s5, 2 add a0, s7, a0 lwu a1, 128(a0) lwu a2, 192(a0) sext.w s4, a1 vsetivli zero, 2, e64, m1, ta, ma + csrr a3, vlenb + slli a3, a3, 2 + add a3, sp, a3 + addi a3, a3, 464 + vl1r.v v8, (a3) # Unknown-size Folded Reload addi a3, sp, 176 - csrr a4, vlenb - slli a4, a4, 2 - add a4, sp, a4 - addi a4, a4, 464 - vl1r.v v8, (a4) # Unknown-size Folded Reload vse64.v v8, (a3) vse64.v v8, (s1) beqz a2, .LBB255_68 @@ -57695,7 +57697,7 @@ .LBB255_48: # %for.body115.preheader # in Loop: Header=BB255_43 Depth=1 li a5, 0 - slli a4, s6, 5 + slli a4, s5, 5 ld t5, 64(sp) # 8-byte Folded Reload addi s3, sp, 192 bltu a3, t3, .LBB255_57 @@ -57720,7 +57722,7 @@ vzext.vf2 v10, v8 vsll.vi v8, v10, 3 vluxei64.v v8, (t2), v8, v0.t - vluxei64.v v8, (s5), v8, v0.t + vluxei64.v v8, (s6), v8, v0.t vsetvli zero, zero, e32, m1, ta, mu vmv1r.v v10, v12 vnsrl.wi v10, v8, 0, v0.t @@ -57874,7 +57876,7 @@ addi a0, sp, 192 add s10, a0, s10 addi s4, sp, 160 - slli s1, s6, 5 + slli s1, s5, 5 ld a0, 96(sp) # 8-byte Folded Reload add s1, a0, s1 ld s3, 112(sp) # 8-byte Folded Reload @@ -57896,7 +57898,7 @@ sw a0, 16(s0) ld a0, 0(s7) ld a0, 16(a0) - add a0, a0, s6 + add a0, a0, s5 lw a0, 0(a0) ld a1, 0(s8) add a0, a0, a1 @@ -57917,21 +57919,21 @@ bltz a0, .LBB255_71 # %bb.73: # %if.then191 # in Loop: Header=BB255_72 Depth=2 - lw s6, 0(s10) + lw s5, 0(s10) mul s7, a0, ra add s7, t4, s7 ld a0, 8(s7) - bge s6, a0, .LBB255_71 + bge s5, a0, .LBB255_71 # %bb.74: # %if.then201 # in Loop: Header=BB255_72 Depth=2 ld a0, 24(s7) ld a1, 40(s7) - slli a2, s6, 2 + slli a2, s5, 2 ld a0, 16(a0) add a1, a1, a2 - lwu s5, 0(a1) - slli s6, s6, 3 - add a0, a0, s6 + lwu s6, 0(a1) + slli s5, s5, 3 + add a0, a0, s5 ld a2, 8(s0) ld a1, 40(s0) lw s9, 0(a0) @@ -57946,14 +57948,14 @@ ld a0, 24(s0) addi a1, a1, 256 call realloc@plt + li ra, 80 + ld t4, 120(sp) # 8-byte Folded Reload csrr a1, vlenb slli a2, a1, 2 add a1, a2, a1 add a1, sp, a1 addi a1, a1, 464 vl1r.v v12, (a1) # Unknown-size Folded Reload - li ra, 80 - ld t4, 120(sp) # 8-byte Folded Reload ld a1, 40(s0) ld a2, 8(s0) addi a1, a1, 256 @@ -57971,18 +57973,18 @@ ld a0, 0(a0) lwu a3, 16(s0) lbu a4, 0(a2) - and a1, a0, s5 + and a1, a0, s6 addw a0, a3, s9 sll a3, a1, a3 or a3, a4, a3 sb a3, 0(a2) - li s5, 8 - blt a0, s5, .LBB255_70 + li s6, 8 + blt a0, s6, .LBB255_70 # %bb.78: # %if.then15.i # in Loop: Header=BB255_72 Depth=2 lw a2, 16(s0) ld a3, 32(s0) - subw a2, s5, a2 + subw a2, s6, a2 srl a2, a1, a2 sb a2, 1(a3) li a2, 16 @@ -64172,36 +64174,36 @@ li a2, 6 mul a1, a1, a2 sub sp, sp, a1 - mv t3, a0 + mv t4, a0 ld a0, 104(a0) ld s9, 8(a0) ld a1, 48(s9) sd a1, -208(s0) # 8-byte Folded Spill ld a0, 136(a0) sd a0, -200(s0) # 8-byte Folded Spill - ld a0, 184(t3) + ld a0, 184(t4) sd a0, -368(s0) # 8-byte Folded Spill lw s4, 4(s9) - lw s11, 72(t3) + lw s11, 72(t4) slli a0, s4, 2 addi a0, a0, 15 andi a0, a0, -16 sub a0, sp, a0 sd a0, -264(s0) # 8-byte Folded Spill mv sp, a0 - ld s2, 120(t3) - ld a0, 128(t3) - ld s3, 112(t3) + ld s2, 120(t4) + ld a0, 128(t4) + ld s3, 112(t4) slli s4, s4, 3 add a1, s2, s4 - mv s7, t3 + mv s7, t4 bge a0, a1, .LBB281_4 # %bb.1: # %if.then.i beqz s3, .LBB281_3 # %bb.2: # %if.then2.i li a0, 16 call malloc@plt - mv t3, s7 + mv t4, s7 ld a1, 136(s7) ld a2, 144(s7) add a1, a1, s2 @@ -64210,17 +64212,17 @@ sd s3, 0(a0) sd a0, 144(s7) .LBB281_3: # %if.end.i - sd s4, 128(t3) + sd s4, 128(t4) mv a0, s4 call malloc@plt - mv t3, s7 + mv t4, s7 mv s3, a0 li s2, 0 sd a0, 112(s7) mv a0, s4 .LBB281_4: # %_vorbis_block_alloc.exit add s1, s2, s4 - sd s1, 120(t3) + sd s1, 120(t4) lw s4, 4(s9) slli s4, s4, 3 add a1, s4, s1 @@ -64230,7 +64232,7 @@ # %bb.6: # %if.then2.i303 li a0, 16 call malloc@plt - mv t3, s7 + mv t4, s7 ld a1, 136(s7) ld a2, 144(s7) add a1, a1, s1 @@ -64239,10 +64241,10 @@ sd s3, 0(a0) sd a0, 144(s7) .LBB281_7: # %if.end.i309 - sd s4, 128(t3) + sd s4, 128(t4) mv a0, s4 call malloc@plt - mv t3, s7 + mv t4, s7 mv s6, a0 li s1, 0 sd a0, 112(s7) @@ -64253,7 +64255,7 @@ .LBB281_9: # %_vorbis_block_alloc.exit311 sd s1, -456(s0) # 8-byte Folded Spill add s1, s1, s4 - sd s1, 120(t3) + sd s1, 120(t4) lw s5, 4(s9) slli s5, s5, 3 add a1, s5, s1 @@ -64264,7 +64266,7 @@ # %bb.11: # %if.then2.i323 li a0, 16 call malloc@plt - mv t3, s7 + mv t4, s7 ld a1, 136(s7) ld a2, 144(s7) add a1, a1, s1 @@ -64273,10 +64275,10 @@ sd s6, 0(a0) sd a0, 144(s7) .LBB281_12: # %if.end.i329 - sd s5, 128(t3) + sd s5, 128(t4) mv a0, s5 call malloc@plt - mv t3, s7 + mv t4, s7 li s1, 0 sd a0, -224(s0) # 8-byte Folded Spill sd a0, 112(s7) @@ -64290,20 +64292,20 @@ add s2, s3, s2 sd s2, -288(s0) # 8-byte Folded Spill add s2, s1, s5 - sd s2, 120(t3) + sd s2, 120(t4) lw a1, 4(s9) ld a3, -368(s0) # 8-byte Folded Reload flw fs0, 8(a3) lui a2, 524288 addi a2, a2, -1 - sd a2, -320(s0) # 8-byte Folded Spill + sd a2, -328(s0) # 8-byte Folded Spill slli a1, a1, 2 addi a1, a1, 15 andi a1, a1, -16 sub a1, sp, a1 - sd a1, -328(s0) # 8-byte Folded Spill + sd a1, -336(s0) # 8-byte Folded Spill mv sp, a1 - ld a4, 56(t3) + ld a4, 56(t4) lw a6, 12(a3) sext.w a1, a4 sd a1, -376(s0) # 8-byte Folded Spill @@ -64313,8 +64315,8 @@ ld a3, 808(a1) ld a1, 104(s4) sd a1, -232(s0) # 8-byte Folded Spill - sd a4, -408(s0) # 8-byte Folded Spill - sw a4, 76(t3) + sd a4, -416(s0) # 8-byte Folded Spill + sw a4, 76(t4) lw a2, 4(s9) li a7, 88 srliw a1, s11, 31 @@ -64322,11 +64324,11 @@ auipc a4, %pcrel_hi(.LCPI281_0) .Lpcrel_hi663: auipc a5, %pcrel_hi(.LCPI281_1) - sd t3, -192(s0) # 8-byte Folded Spill + sd t4, -192(s0) # 8-byte Folded Spill sd s9, -216(s0) # 8-byte Folded Spill sd a3, -184(s0) # 8-byte Folded Spill - sd a4, -416(s0) # 8-byte Folded Spill - sd a5, -424(s0) # 8-byte Folded Spill + sd a4, -424(s0) # 8-byte Folded Spill + sd a5, -432(s0) # 8-byte Folded Spill sd s11, -344(s0) # 8-byte Folded Spill sd s1, -176(s0) # 8-byte Folded Spill blez a2, .LBB281_33 @@ -64439,7 +64441,7 @@ mv a1, s3 call drft_forward lwu a0, 0(s3) - ld a1, -320(s0) # 8-byte Folded Reload + ld a1, -328(s0) # 8-byte Folded Reload and a0, a0, a1 fcvt.s.w fa5, a0 fmul.s fa5, fa5, fs1 @@ -64447,7 +64449,7 @@ fadd.s fa4, fs3, fa5 fsw fa4, 0(s3) slli a0, s10, 2 - ld a1, -328(s0) # 8-byte Folded Reload + ld a1, -336(s0) # 8-byte Folded Reload add a0, a1, a0 fsw fa4, 0(a0) ld a1, -344(s0) # 8-byte Folded Reload @@ -64517,10 +64519,10 @@ fmv.s fa5, fs0 j .LBB281_16 .LBB281_32: # %for.end100.loopexit - ld t3, -192(s0) # 8-byte Folded Reload - ld s2, 120(t3) - ld a0, 128(t3) - ld s8, 112(t3) + ld t4, -192(s0) # 8-byte Folded Reload + ld s2, 120(t4) + ld a0, 128(t4) + ld s8, 112(t4) fmv.s fs0, fa5 ld s9, -216(s0) # 8-byte Folded Reload ld s4, -224(s0) # 8-byte Folded Reload @@ -64537,7 +64539,7 @@ ld s4, -224(s0) # 8-byte Folded Reload mv s8, s4 .LBB281_34: # %for.end100 - ld a1, -408(s0) # 8-byte Folded Reload + ld a1, -416(s0) # 8-byte Folded Reload snez s3, a1 mul s6, a6, a7 add a1, s2, a2 @@ -64549,24 +64551,24 @@ # %bb.36: # %if.then2.i373 li a0, 16 call malloc@plt - ld t3, -192(s0) # 8-byte Folded Reload - ld a1, 136(t3) - ld a2, 144(t3) + ld t4, -192(s0) # 8-byte Folded Reload + ld a1, 136(t4) + ld a2, 144(t4) add a1, a1, s2 - sd a1, 136(t3) + sd a1, 136(t4) sd a2, 8(a0) ld a2, -240(s0) # 8-byte Folded Reload sd s8, 0(a0) - sd a0, 144(t3) + sd a0, 144(t4) .LBB281_37: # %if.end.i379 - sd a2, 128(t3) + sd a2, 128(t4) mv a0, a2 call malloc@plt - ld t3, -192(s0) # 8-byte Folded Reload + ld t4, -192(s0) # 8-byte Folded Reload ld a2, -240(s0) # 8-byte Folded Reload mv s8, a0 li s2, 0 - sd a0, 112(t3) + sd a0, 112(t4) mv a0, a2 ld a3, -184(s0) # 8-byte Folded Reload .LBB281_38: # %_vorbis_block_alloc.exit381 @@ -64581,23 +64583,23 @@ # %bb.40: # %if.then2.i393 li a0, 16 call malloc@plt - ld t3, -192(s0) # 8-byte Folded Reload - ld a1, 136(t3) - ld a2, 144(t3) + ld t4, -192(s0) # 8-byte Folded Reload + ld a1, 136(t4) + ld a2, 144(t4) add a1, a1, s6 - sd a1, 136(t3) + sd a1, 136(t4) sd a2, 8(a0) ld a2, -240(s0) # 8-byte Folded Reload sd s8, 0(a0) - sd a0, 144(t3) + sd a0, 144(t4) .LBB281_41: # %if.end.i399 - sd a2, 128(t3) + sd a2, 128(t4) mv a0, a2 call malloc@plt - ld t3, -192(s0) # 8-byte Folded Reload + ld t4, -192(s0) # 8-byte Folded Reload ld a2, -240(s0) # 8-byte Folded Reload li s6, 0 - sd a0, 112(t3) + sd a0, 112(t4) ld a3, -184(s0) # 8-byte Folded Reload j .LBB281_43 .LBB281_42: @@ -64607,12 +64609,12 @@ add a1, s4, a1 sd a1, -312(s0) # 8-byte Folded Spill slli s3, s3, 1 - sd s3, -440(s0) # 8-byte Folded Spill - sd s1, -432(s0) # 8-byte Folded Spill + sd s3, -448(s0) # 8-byte Folded Spill + sd s1, -440(s0) # 8-byte Folded Spill add t0, s1, s7 li a4, 1 add a1, s6, a2 - sd a1, 120(t3) + sd a1, 120(t4) lw a1, 4(s9) slli a2, a4, 32 addi a2, a2, -4 @@ -64624,25 +64626,25 @@ sd t0, -248(s0) # 8-byte Folded Spill blez a1, .LBB281_131 # %bb.44: # %for.body113.lr.ph - li a2, 0 + li s4, 0 add s2, s8, s2 - sd s2, -352(s0) # 8-byte Folded Spill + sd s2, -360(s0) # 8-byte Folded Spill add a0, a0, s6 - sd a0, -360(s0) # 8-byte Folded Spill - lui s6, 8 - addi s7, s6, -1 + sd a0, -384(s0) # 8-byte Folded Spill + lui s7, 8 + addi s6, s7, -1 li a0, 88 - ld a1, -440(s0) # 8-byte Folded Reload + ld a1, -448(s0) # 8-byte Folded Reload mul a0, a1, a0 - ld a1, -432(s0) # 8-byte Folded Reload + ld a1, -440(s0) # 8-byte Folded Reload add a0, a1, a0 addi a1, a0, 8 - sd a1, -384(s0) # 8-byte Folded Spill + sd a1, -392(s0) # 8-byte Folded Spill addi a0, a0, 24 - sd a0, -392(s0) # 8-byte Folded Spill + sd a0, -400(s0) # 8-byte Folded Spill slli s5, s5, 32 srli a0, s5, 32 - sd a0, -400(s0) # 8-byte Folded Spill + sd a0, -408(s0) # 8-byte Folded Spill ld a0, -176(s0) # 8-byte Folded Reload slli s11, a0, 1 srli t1, a0, 1 @@ -64662,22 +64664,22 @@ addi a0, a0, -464 vs4r.v v8, (a0) # Unknown-size Folded Spill lui a0, 524288 - addi a0, a0, -1 - sd a0, -448(s0) # 8-byte Folded Spill + addi t2, a0, -1 lui a0, 149797 addi a0, a0, -1755 slli a0, a0, 32 - sd a0, -296(s0) # 8-byte Folded Spill + sd a0, -304(s0) # 8-byte Folded Spill sd t1, -280(s0) # 8-byte Folded Spill + sd t2, -296(s0) # 8-byte Folded Spill j .LBB281_46 .LBB281_45: # %for.inc248 # in Loop: Header=BB281_46 Depth=1 ld a0, -216(s0) # 8-byte Folded Reload lw a0, 4(a0) - ld a2, -336(s0) # 8-byte Folded Reload - addi a2, a2, 1 + ld s4, -352(s0) # 8-byte Folded Reload + addi s4, s4, 1 ld a3, -184(s0) # 8-byte Folded Reload - bge a2, a0, .LBB281_131 + bge s4, a0, .LBB281_131 .LBB281_46: # %for.body113 # =>This Loop Header: Depth=1 # Child Loop BB281_129 Depth 2 @@ -64686,28 +64688,28 @@ # Child Loop BB281_71 Depth 2 # Child Loop BB281_78 Depth 2 # Child Loop BB281_85 Depth 2 - # Child Loop BB281_103 Depth 3 + # Child Loop BB281_102 Depth 3 # Child Loop BB281_98 Depth 3 # Child Loop BB281_108 Depth 2 - # Child Loop BB281_126 Depth 3 + # Child Loop BB281_125 Depth 3 # Child Loop BB281_121 Depth 3 - slli s5, a2, 2 + slli s5, s4, 2 add a0, a3, s5 lw s1, 4(a0) - ld a0, 0(t3) - sd a2, -336(s0) # 8-byte Folded Spill - slli s2, a2, 3 + ld a0, 0(t4) + sd s4, -352(s0) # 8-byte Folded Spill + slli s4, s4, 3 ld a1, -288(s0) # 8-byte Folded Reload - add a1, a1, s2 - ld s4, 0(a1) - add a0, a0, s2 + add a1, a1, s4 + ld s2, 0(a1) + add a0, a0, s4 ld s9, 0(a0) - ld s8, 120(t3) - ld a0, 128(t3) - ld s3, 112(t3) + ld s8, 120(t4) + ld a0, 128(t4) + ld s3, 112(t4) addi a1, s8, 120 - ld a2, -408(s0) # 8-byte Folded Reload - sw a2, 76(t3) + ld a2, -416(s0) # 8-byte Folded Reload + sw a2, 76(t4) bge a0, a1, .LBB281_50 # %bb.47: # %if.then.i409 # in Loop: Header=BB281_46 Depth=1 @@ -64716,37 +64718,38 @@ # in Loop: Header=BB281_46 Depth=1 li a0, 16 call malloc@plt - ld t3, -192(s0) # 8-byte Folded Reload - ld a1, 136(t3) - ld a2, 144(t3) + ld t4, -192(s0) # 8-byte Folded Reload + ld a1, 136(t4) + ld a2, 144(t4) add a1, a1, s8 - sd a1, 136(t3) + sd a1, 136(t4) sd a2, 8(a0) sd s3, 0(a0) - sd a0, 144(t3) + sd a0, 144(t4) .LBB281_49: # %if.end.i417 # in Loop: Header=BB281_46 Depth=1 li a0, 120 - sd a0, 128(t3) + sd a0, 128(t4) li a0, 120 call malloc@plt - ld t3, -192(s0) # 8-byte Folded Reload + ld t4, -192(s0) # 8-byte Folded Reload mv s3, a0 li s8, 0 - sd a0, 112(t3) + sd a0, 112(t4) ld t0, -248(s0) # 8-byte Folded Reload ld t1, -280(s0) # 8-byte Folded Reload + ld t2, -296(s0) # 8-byte Folded Reload .LBB281_50: # %_vorbis_block_alloc.exit419 # in Loop: Header=BB281_46 Depth=1 ld a0, -256(s0) # 8-byte Folded Reload add a0, s9, a0 - sd a0, -304(s0) # 8-byte Folded Spill + sd a0, -320(s0) # 8-byte Folded Spill add s3, s3, s8 addi a0, s8, 120 - sd a0, 120(t3) + sd a0, 120(t4) ld a0, -312(s0) # 8-byte Folded Reload - add t2, a0, s2 - sd s3, 0(t2) + add a7, a0, s4 + sd s3, 0(a7) sd zero, 112(s3) addi a0, s3, 96 vsetivli zero, 2, e64, m1, ta, ma @@ -64768,12 +64771,13 @@ addi a0, a0, -464 vl4r.v v8, (a0) # Unknown-size Folded Reload vse64.v v8, (s3) + ld s3, -200(s0) # 8-byte Folded Reload ld a0, -344(s0) # 8-byte Folded Reload - ld a3, -320(s0) # 8-byte Folded Reload - ld a5, -416(s0) # 8-byte Folded Reload - ld a6, -424(s0) # 8-byte Folded Reload - ld s2, -352(s0) # 8-byte Folded Reload - ld s8, -392(s0) # 8-byte Folded Reload + ld a3, -328(s0) # 8-byte Folded Reload + ld a5, -424(s0) # 8-byte Folded Reload + ld a6, -432(s0) # 8-byte Folded Reload + ld s4, -360(s0) # 8-byte Folded Reload + ld s8, -400(s0) # 8-byte Folded Reload li a1, 2 blt a0, a1, .LBB281_58 # %bb.51: # %for.body135.preheader @@ -64787,13 +64791,13 @@ li a0, 8 .LBB281_53: # %for.body135.preheader # in Loop: Header=BB281_46 Depth=1 - ld a1, -400(s0) # 8-byte Folded Reload + ld a1, -408(s0) # 8-byte Folded Reload bltu a1, a0, .LBB281_55 # %bb.54: # %vector.memcheck717 # in Loop: Header=BB281_46 Depth=1 ld a0, -256(s0) # 8-byte Folded Reload add a0, s9, a0 - sub a0, a0, s4 + sub a0, a0, s2 bgeu a0, s11, .LBB281_128 .LBB281_55: # in Loop: Header=BB281_46 Depth=1 li a0, 0 @@ -64803,13 +64807,13 @@ add a1, s9, a1 slli a2, a0, 2 add a1, a1, a2 - add s4, s4, a2 - ld a2, -400(s0) # 8-byte Folded Reload + add s2, s2, a2 + ld a2, -408(s0) # 8-byte Folded Reload sub a0, a2, a0 .LBB281_57: # %for.body135 # Parent Loop BB281_46 Depth=1 # => This Inner Loop Header: Depth=2 - lwu a2, 0(s4) + lwu a2, 0(s2) flw fa5, %pcrel_lo(.Lpcrel_hi662)(a5) flw fa4, %pcrel_lo(.Lpcrel_hi663)(a6) and a2, a2, a3 @@ -64819,28 +64823,27 @@ fsw fa5, 0(a1) addi a1, a1, 4 addi a0, a0, -1 - addi s4, s4, 4 + addi s2, s2, 4 bnez a0, .LBB281_57 .LBB281_58: # %for.end143 # in Loop: Header=BB281_46 Depth=1 - sd t2, -272(s0) # 8-byte Folded Spill + sd a7, -272(s0) # 8-byte Folded Spill mv a0, t0 - ld a1, -304(s0) # 8-byte Folded Reload - mv a2, s2 + ld a1, -320(s0) # 8-byte Folded Reload + mv a2, s4 call _vp_noisemask - ld a0, -328(s0) # 8-byte Folded Reload + ld a0, -336(s0) # 8-byte Folded Reload add s5, a0, s5 flw fa1, 0(s5) ld a0, -248(s0) # 8-byte Folded Reload mv a1, s9 - ld s4, -360(s0) # 8-byte Folded Reload - mv a2, s4 + ld s2, -384(s0) # 8-byte Folded Reload + mv a2, s2 fmv.s fa0, fs0 call _vp_tonemask ld a0, -248(s0) # 8-byte Folded Reload lw a0, 0(a0) - ld s3, -200(s0) # 8-byte Folded Reload - ld a5, -384(s0) # 8-byte Folded Reload + ld a5, -392(s0) # 8-byte Folded Reload blez a0, .LBB281_65 # %bb.59: # %for.body.lr.ph.i # in Loop: Header=BB281_46 Depth=1 @@ -64860,7 +64863,7 @@ # => This Inner Loop Header: Depth=2 ld a2, 0(s8) ld a2, 8(a2) - add a3, s2, a1 + add a3, s4, a1 ld a4, 0(a5) flw fa3, 0(a3) add a2, a2, a1 @@ -64874,7 +64877,7 @@ fmv.s fa4, fa3 .LBB281_63: # %for.body.i # in Loop: Header=BB281_61 Depth=2 - add a2, s4, a1 + add a2, s2, a1 flw fa3, 0(a2) fadd.s fa3, fa5, fa3 flt.s a2, fa4, fa3 @@ -64902,18 +64905,19 @@ slli a3, a3, 3 add a1, a1, a3 ld a1, 0(a1) - ld a2, -304(s0) # 8-byte Folded Reload + ld a2, -320(s0) # 8-byte Folded Reload mv a3, s9 call floor1_fit - ld t3, -192(s0) # 8-byte Folded Reload + ld t4, -192(s0) # 8-byte Folded Reload ld t0, -248(s0) # 8-byte Folded Reload ld a2, -272(s0) # 8-byte Folded Reload ld a1, 0(a2) sd a0, 56(a1) - ld a0, 104(t3) + ld a0, 104(t4) ld a0, 136(a0) ld a0, 144(a0) ld t1, -280(s0) # 8-byte Folded Reload + ld t2, -296(s0) # 8-byte Folded Reload beqz a0, .LBB281_45 # %bb.67: # %land.lhs.true # in Loop: Header=BB281_46 Depth=1 @@ -64923,10 +64927,10 @@ # %bb.68: # %if.then169 # in Loop: Header=BB281_46 Depth=1 lw a0, 0(t0) - ld s2, -352(s0) # 8-byte Folded Reload - ld s4, -360(s0) # 8-byte Folded Reload - ld s5, -384(s0) # 8-byte Folded Reload - ld s8, -392(s0) # 8-byte Folded Reload + ld s2, -360(s0) # 8-byte Folded Reload + ld s4, -384(s0) # 8-byte Folded Reload + ld s5, -392(s0) # 8-byte Folded Reload + ld s8, -400(s0) # 8-byte Folded Reload blez a0, .LBB281_75 # %bb.69: # %for.body.lr.ph.i429 # in Loop: Header=BB281_46 Depth=1 @@ -64978,8 +64982,8 @@ slli a0, a0, 3 add a0, a1, a0 ld a1, 0(a0) - mv a0, t3 - ld a2, -304(s0) # 8-byte Folded Reload + mv a0, t4 + ld a2, -320(s0) # 8-byte Folded Reload mv a3, s9 call floor1_fit ld a1, -272(s0) # 8-byte Folded Reload @@ -65039,22 +65043,23 @@ ld a1, 0(a0) ld s1, -192(s0) # 8-byte Folded Reload mv a0, s1 - ld a2, -304(s0) # 8-byte Folded Reload + ld a2, -320(s0) # 8-byte Folded Reload mv a3, s9 call floor1_fit - mv t3, s1 - ld t2, -272(s0) # 8-byte Folded Reload - ld a1, 0(t2) + mv t4, s1 + ld t3, -272(s0) # 8-byte Folded Reload + ld a1, 0(t3) sd a0, 0(a1) li s5, 1 ld t1, -280(s0) # 8-byte Folded Reload + ld t2, -296(s0) # 8-byte Folded Reload li t0, 7 j .LBB281_85 .LBB281_83: # in Loop: Header=BB281_85 Depth=2 li a0, 0 .LBB281_84: # %floor1_interpolate_fit.exit # in Loop: Header=BB281_85 Depth=2 - ld a1, 0(t2) + ld a1, 0(t3) slli a2, s5, 3 add a1, a1, a2 addi s5, s5, 1 @@ -65063,9 +65068,9 @@ .LBB281_85: # %for.body193 # Parent Loop BB281_46 Depth=1 # => This Loop Header: Depth=2 - # Child Loop BB281_103 Depth 3 + # Child Loop BB281_102 Depth 3 # Child Loop BB281_98 Depth 3 - ld a0, 0(t2) + ld a0, 0(t3) ld s1, 0(a0) ld s8, 56(a0) seqz a0, s1 @@ -65081,13 +65086,13 @@ add a0, a1, a0 ld a0, 0(a0) lw s10, 1284(a0) - slli s4, s10, 2 - addi a0, s4, 7 - ld s2, 120(t3) - ld a1, 128(t3) - ld s9, 112(t3) + slli s2, s10, 2 + addi a0, s2, 7 + ld s4, 120(t4) + ld a1, 128(t4) + ld s9, 112(t4) andi s3, a0, -8 - add a0, s2, s3 + add a0, s4, s3 bge a1, a0, .LBB281_90 # %bb.87: # %if.then.i.i # in Loop: Header=BB281_85 Depth=2 @@ -65096,32 +65101,33 @@ # in Loop: Header=BB281_85 Depth=2 li a0, 16 call malloc@plt - ld t3, -192(s0) # 8-byte Folded Reload - ld a1, 136(t3) - ld a2, 144(t3) - add a1, a1, s2 - sd a1, 136(t3) + ld t4, -192(s0) # 8-byte Folded Reload + ld a1, 136(t4) + ld a2, 144(t4) + add a1, a1, s4 + sd a1, 136(t4) sd a2, 8(a0) sd s9, 0(a0) - sd a0, 144(t3) + sd a0, 144(t4) .LBB281_89: # %if.end.i.i # in Loop: Header=BB281_85 Depth=2 - sd s3, 128(t3) + sd s3, 128(t4) mv a0, s3 call malloc@plt - ld t3, -192(s0) # 8-byte Folded Reload + ld t4, -192(s0) # 8-byte Folded Reload mv s9, a0 - li s2, 0 - sd a0, 112(t3) + li s4, 0 + sd a0, 112(t4) ld t1, -280(s0) # 8-byte Folded Reload + ld t2, -296(s0) # 8-byte Folded Reload li t0, 7 - ld t2, -272(s0) # 8-byte Folded Reload + ld t3, -272(s0) # 8-byte Folded Reload .LBB281_90: # %_vorbis_block_alloc.exit.i # in Loop: Header=BB281_85 Depth=2 - add a0, s9, s2 - add s3, s2, s3 - sd s3, 120(t3) - blez s10, .LBB281_101 + add a0, s9, s4 + add s3, s4, s3 + sd s3, 120(t4) + blez s10, .LBB281_104 # %bb.91: # %for.body.lr.ph.i475 # in Loop: Header=BB281_85 Depth=2 ld a3, -176(s0) # 8-byte Folded Reload @@ -65135,7 +65141,7 @@ # in Loop: Header=BB281_85 Depth=2 slli a1, s5, 16 slli a2, a1, 32 - ld a4, -296(s0) # 8-byte Folded Reload + ld a4, -304(s0) # 8-byte Folded Reload mulhu a2, a2, a4 srli a2, a2, 32 subw a1, a1, a2 @@ -65147,29 +65153,29 @@ bltu s10, a3, .LBB281_95 # %bb.94: # %vector.memcheck687 # in Loop: Header=BB281_85 Depth=2 - add a3, s2, s4 + add a3, s4, s2 add a3, s9, a3 - add a4, s1, s4 - add s4, s8, s4 + add a4, s1, s2 + add s2, s8, s2 sltu a4, a0, a4 sltu a5, s1, a3 and a4, a4, a5 - sltu a5, a0, s4 + sltu a5, a0, s2 sltu a3, s8, a3 and a3, a5, a3 or a3, a4, a3 - beqz a3, .LBB281_102 + beqz a3, .LBB281_101 .LBB281_95: # in Loop: Header=BB281_85 Depth=2 li a3, 0 - ld s3, -200(s0) # 8-byte Folded Reload .LBB281_96: # %for.body.i476.preheader # in Loop: Header=BB281_85 Depth=2 sub a4, s10, a3 slli a5, a3, 2 - add a3, s9, s2 + add a3, s9, s4 add a3, a3, a5 add s8, s8, a5 add s1, s1, a5 + ld s3, -200(s0) # 8-byte Folded Reload j .LBB281_98 .LBB281_97: # %for.inc.i # in Loop: Header=BB281_98 Depth=3 @@ -65184,12 +65190,12 @@ # => This Inner Loop Header: Depth=3 lwu a5, 0(s1) lwu a6, 0(s8) - and a5, a5, s7 + and a5, a5, s6 mul a5, a5, a2 - and a6, a6, s7 + and a6, a6, s6 mul a6, a6, a1 add a5, a5, a6 - add a5, a5, s6 + add a5, a5, s7 sraiw a5, a5, 16 sw a5, 0(a3) lbu a6, 1(s1) @@ -65202,13 +65208,10 @@ beqz a6, .LBB281_97 # %bb.100: # %if.then17.i # in Loop: Header=BB281_98 Depth=3 - or a5, a5, s6 + or a5, a5, s7 sw a5, 0(a3) j .LBB281_97 -.LBB281_101: # in Loop: Header=BB281_85 Depth=2 - ld s3, -200(s0) # 8-byte Folded Reload - j .LBB281_84 -.LBB281_102: # %vector.ph701 +.LBB281_101: # %vector.ph701 # in Loop: Header=BB281_85 Depth=2 ld a3, -176(s0) # 8-byte Folded Reload srli a3, a3, 1 @@ -65219,36 +65222,37 @@ mv a5, a0 mv a6, s8 mv a7, s1 - ld s3, -200(s0) # 8-byte Folded Reload -.LBB281_103: # %vector.body706 +.LBB281_102: # %vector.body706 # Parent Loop BB281_46 Depth=1 # Parent Loop BB281_85 Depth=2 # => This Inner Loop Header: Depth=3 vl2re32.v v8, (a7) vl2re32.v v10, (a6) - vand.vx v12, v8, s7 + vand.vx v12, v8, s6 vmul.vx v12, v12, a2 - vand.vx v14, v10, s7 + vand.vx v14, v10, s6 vmadd.vx v14, a1, v12 - vadd.vx v12, v14, s6 + vadd.vx v12, v14, s7 vsra.vi v12, v12, 16 vs2r.v v12, (a5) - vand.vx v8, v8, s6 + vand.vx v8, v8, s7 vmsne.vi v14, v8, 0 - vand.vx v8, v10, s6 + vand.vx v8, v10, s7 vmsne.vi v10, v8, 0 vmand.mm v0, v14, v10 - vor.vx v8, v12, s6 + vor.vx v8, v12, s7 vse32.v v8, (a5), v0.t add a7, a7, s11 add a6, a6, s11 sub a4, a4, t1 add a5, a5, s11 - bnez a4, .LBB281_103 -# %bb.104: # %middle.block698 + bnez a4, .LBB281_102 +# %bb.103: # %middle.block698 # in Loop: Header=BB281_85 Depth=2 - beq a3, s10, .LBB281_84 - j .LBB281_96 + bne a3, s10, .LBB281_96 +.LBB281_104: # in Loop: Header=BB281_85 Depth=2 + ld s3, -200(s0) # 8-byte Folded Reload + j .LBB281_84 .LBB281_105: # %for.body219.preheader # in Loop: Header=BB281_46 Depth=1 li s5, 8 @@ -65258,7 +65262,7 @@ li a0, 0 .LBB281_107: # %floor1_interpolate_fit.exit535 # in Loop: Header=BB281_108 Depth=2 - ld a1, 0(t2) + ld a1, 0(t3) slli a2, s5, 3 add a1, a1, a2 addi s5, s5, 1 @@ -65268,9 +65272,9 @@ .LBB281_108: # %for.body219 # Parent Loop BB281_46 Depth=1 # => This Loop Header: Depth=2 - # Child Loop BB281_126 Depth 3 + # Child Loop BB281_125 Depth 3 # Child Loop BB281_121 Depth 3 - ld a0, 0(t2) + ld a0, 0(t3) ld s1, 56(a0) ld s8, 112(a0) seqz a0, s1 @@ -65286,13 +65290,13 @@ add a0, a1, a0 ld a0, 0(a0) lw s10, 1284(a0) - slli s4, s10, 2 - addi a0, s4, 7 - ld s2, 120(t3) - ld a1, 128(t3) - ld s9, 112(t3) + slli s2, s10, 2 + addi a0, s2, 7 + ld s4, 120(t4) + ld a1, 128(t4) + ld s9, 112(t4) andi s3, a0, -8 - add a0, s2, s3 + add a0, s4, s3 bge a1, a0, .LBB281_113 # %bb.110: # %if.then.i.i525 # in Loop: Header=BB281_108 Depth=2 @@ -65301,32 +65305,33 @@ # in Loop: Header=BB281_108 Depth=2 li a0, 16 call malloc@plt - ld t3, -192(s0) # 8-byte Folded Reload - ld a1, 136(t3) - ld a2, 144(t3) - add a1, a1, s2 - sd a1, 136(t3) + ld t4, -192(s0) # 8-byte Folded Reload + ld a1, 136(t4) + ld a2, 144(t4) + add a1, a1, s4 + sd a1, 136(t4) sd a2, 8(a0) sd s9, 0(a0) - sd a0, 144(t3) + sd a0, 144(t4) .LBB281_112: # %if.end.i.i533 # in Loop: Header=BB281_108 Depth=2 - sd s3, 128(t3) + sd s3, 128(t4) mv a0, s3 call malloc@plt - ld t3, -192(s0) # 8-byte Folded Reload + ld t4, -192(s0) # 8-byte Folded Reload mv s9, a0 - li s2, 0 - sd a0, 112(t3) + li s4, 0 + sd a0, 112(t4) ld t0, -248(s0) # 8-byte Folded Reload ld t1, -280(s0) # 8-byte Folded Reload - ld t2, -272(s0) # 8-byte Folded Reload + ld t2, -296(s0) # 8-byte Folded Reload + ld t3, -272(s0) # 8-byte Folded Reload .LBB281_113: # %_vorbis_block_alloc.exit.i497 # in Loop: Header=BB281_108 Depth=2 - add a0, s9, s2 - add s3, s2, s3 - sd s3, 120(t3) - blez s10, .LBB281_124 + add a0, s9, s4 + add s3, s4, s3 + sd s3, 120(t4) + blez s10, .LBB281_127 # %bb.114: # %for.body.lr.ph.i501 # in Loop: Header=BB281_108 Depth=2 li a1, 8 @@ -65341,7 +65346,7 @@ lui a2, 1048464 add a1, a1, a2 slli a2, a1, 32 - ld a4, -296(s0) # 8-byte Folded Reload + ld a4, -304(s0) # 8-byte Folded Reload mulhu a2, a2, a4 srli a2, a2, 32 subw a1, a1, a2 @@ -65353,29 +65358,29 @@ bltu s10, a3, .LBB281_118 # %bb.117: # %vector.memcheck # in Loop: Header=BB281_108 Depth=2 - add a3, s2, s4 + add a3, s4, s2 add a3, s9, a3 - add a4, s1, s4 - add s4, s8, s4 + add a4, s1, s2 + add s2, s8, s2 sltu a4, a0, a4 sltu a5, s1, a3 and a4, a4, a5 - sltu a5, a0, s4 + sltu a5, a0, s2 sltu a3, s8, a3 and a3, a5, a3 or a3, a4, a3 - beqz a3, .LBB281_125 + beqz a3, .LBB281_124 .LBB281_118: # in Loop: Header=BB281_108 Depth=2 li a3, 0 - ld s3, -200(s0) # 8-byte Folded Reload .LBB281_119: # %for.body.i503.preheader # in Loop: Header=BB281_108 Depth=2 sub a4, s10, a3 slli a5, a3, 2 - add a3, s9, s2 + add a3, s9, s4 add a3, a3, a5 add s8, s8, a5 add s1, s1, a5 + ld s3, -200(s0) # 8-byte Folded Reload j .LBB281_121 .LBB281_120: # %for.inc.i522 # in Loop: Header=BB281_121 Depth=3 @@ -65390,12 +65395,12 @@ # => This Inner Loop Header: Depth=3 lwu a5, 0(s1) lwu a6, 0(s8) - and a5, a5, s7 + and a5, a5, s6 mul a5, a5, a2 - and a6, a6, s7 + and a6, a6, s6 mul a6, a6, a1 add a5, a5, a6 - add a5, a5, s6 + add a5, a5, s7 sraiw a5, a5, 16 sw a5, 0(a3) lbu a6, 1(s1) @@ -65408,13 +65413,10 @@ beqz a6, .LBB281_120 # %bb.123: # %if.then17.i520 # in Loop: Header=BB281_121 Depth=3 - or a5, a5, s6 + or a5, a5, s7 sw a5, 0(a3) j .LBB281_120 -.LBB281_124: # in Loop: Header=BB281_108 Depth=2 - ld s3, -200(s0) # 8-byte Folded Reload - j .LBB281_107 -.LBB281_125: # %vector.ph +.LBB281_124: # %vector.ph # in Loop: Header=BB281_108 Depth=2 ld a3, -176(s0) # 8-byte Folded Reload srli a3, a3, 1 @@ -65425,48 +65427,48 @@ mv a5, a0 mv a6, s8 mv a7, s1 - ld s3, -200(s0) # 8-byte Folded Reload -.LBB281_126: # %vector.body +.LBB281_125: # %vector.body # Parent Loop BB281_46 Depth=1 # Parent Loop BB281_108 Depth=2 # => This Inner Loop Header: Depth=3 vl2re32.v v8, (a7) vl2re32.v v10, (a6) - vand.vx v12, v8, s7 + vand.vx v12, v8, s6 vmul.vx v12, v12, a2 - vand.vx v14, v10, s7 + vand.vx v14, v10, s6 vmadd.vx v14, a1, v12 - vadd.vx v12, v14, s6 + vadd.vx v12, v14, s7 vsra.vi v12, v12, 16 vs2r.v v12, (a5) - vand.vx v8, v8, s6 + vand.vx v8, v8, s7 vmsne.vi v14, v8, 0 - vand.vx v8, v10, s6 + vand.vx v8, v10, s7 vmsne.vi v10, v8, 0 vmand.mm v0, v14, v10 - vor.vx v8, v12, s6 + vor.vx v8, v12, s7 vse32.v v8, (a5), v0.t add a7, a7, s11 add a6, a6, s11 sub a4, a4, t1 add a5, a5, s11 - bnez a4, .LBB281_126 -# %bb.127: # %middle.block + bnez a4, .LBB281_125 +# %bb.126: # %middle.block # in Loop: Header=BB281_108 Depth=2 - beq a3, s10, .LBB281_107 - j .LBB281_119 + bne a3, s10, .LBB281_119 +.LBB281_127: # in Loop: Header=BB281_108 Depth=2 + ld s3, -200(s0) # 8-byte Folded Reload + j .LBB281_107 .LBB281_128: # %vector.ph721 # in Loop: Header=BB281_46 Depth=1 ld a0, -176(s0) # 8-byte Folded Reload srli a0, a0, 3 ld a1, -232(s0) # 8-byte Folded Reload mul a0, a0, a1 - ld a1, -400(s0) # 8-byte Folded Reload + ld a1, -408(s0) # 8-byte Folded Reload and a0, a0, a1 mv a1, a0 - ld a2, -304(s0) # 8-byte Folded Reload - mv a3, s4 - ld a7, -448(s0) # 8-byte Folded Reload + ld a2, -320(s0) # 8-byte Folded Reload + mv a3, s2 .LBB281_129: # %vector.body726 # Parent Loop BB281_46 Depth=1 # => This Inner Loop Header: Depth=2 @@ -65474,7 +65476,7 @@ vsetvli a4, zero, e32, m2, ta, ma flw fa5, %pcrel_lo(.Lpcrel_hi662)(a5) flw fa4, %pcrel_lo(.Lpcrel_hi663)(a6) - vand.vx v8, v8, a7 + vand.vx v8, v8, t2 vfcvt.f.x.v v8, v8 vfmul.vf v8, v8, fa5 vfadd.vf v8, v8, fa4 @@ -65485,8 +65487,8 @@ bnez a1, .LBB281_129 # %bb.130: # %middle.block718 # in Loop: Header=BB281_46 Depth=1 - ld a3, -320(s0) # 8-byte Folded Reload - ld a1, -400(s0) # 8-byte Folded Reload + ld a3, -328(s0) # 8-byte Folded Reload + ld a1, -408(s0) # 8-byte Folded Reload beq a0, a1, .LBB281_58 j .LBB281_56 .LBB281_131: # %cleanup.cont254 @@ -65516,12 +65518,12 @@ addiw a1, a0, 848 ld a0, -208(s0) # 8-byte Folded Reload add a1, a0, a1 - mv a0, t3 + mv a0, t4 mv a2, t0 mv s1, a3 ld a4, -288(s0) # 8-byte Folded Reload mv s2, t0 - mv s3, t3 + mv s3, t4 call _vp_quantize_couple_memo mv a3, a0 mv a0, s3 @@ -65546,9 +65548,9 @@ li a1, 0 call memset@plt li a0, 88 - ld a1, -440(s0) # 8-byte Folded Reload + ld a1, -448(s0) # 8-byte Folded Reload mul s1, a1, a0 - ld a0, -432(s0) # 8-byte Folded Reload + ld a0, -440(s0) # 8-byte Folded Reload add s1, a0, s1 ld a0, 8(s1) lw a0, 500(a0) --- build.head//MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/btVoronoiSimplexSolver.s 2023-11-13 08:03:22.491554817 +0000 +++ build//MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/btVoronoiSimplexSolver.s 2023-11-13 08:03:17.523698419 +0000 @@ -1228,7 +1228,7 @@ .LBB6_5: # %if.end75 vsetivli zero, 1, e32, m1, ta, ma vslidedown.vi v9, v9, 2 - vmv.x.s s8, v10 + vmv.x.s s6, v10 bnez s7, .LBB6_8 j .LBB6_10 .LBB6_6: # %if.then @@ -1240,7 +1240,7 @@ flw fs1, %pcrel_lo(.Lpcrel_hi5)(s8) vsetivli zero, 1, e32, m1, ta, ma vslidedown.vi v9, v9, 2 - vmv.x.s s8, v10 + vmv.x.s s6, v10 beqz s7, .LBB6_10 .LBB6_8: # %if.then77 addi a5, sp, 16 @@ -1297,8 +1297,8 @@ fmv.s fs1, fa5 .LBB6_10: # %if.end131 vsetivli zero, 1, e32, m1, ta, ma - vmv.x.s s6, v9 - beqz s8, .LBB6_13 + vmv.x.s s7, v9 + beqz s6, .LBB6_13 # %bb.11: # %if.then133 addi a5, sp, 16 mv a1, s1 @@ -1348,7 +1348,7 @@ fmv.s fs1, fa5 .LBB6_13: # %if.end187 li a0, 1 - beqz s6, .LBB6_17 + beqz s7, .LBB6_17 # %bb.14: # %if.then189 addi a5, sp, 16 mv a1, s1 --- build.head//MicroBenchmarks/LCALS/SubsetBLambdaLoops/CMakeFiles/lcalsBLambda.dir/__/LCALSSuite.s 2023-11-13 08:03:20.899600835 +0000 +++ build//MicroBenchmarks/LCALS/SubsetBLambdaLoops/CMakeFiles/lcalsBLambda.dir/__/LCALSSuite.s 2023-11-13 08:03:15.935744321 +0000 @@ -42765,9 +42765,9 @@ mul s0, a3, a4 sd zero, 32(s1) vmv.v.i v8, 0 - sd a6, 32(sp) # 8-byte Folded Spill addi a3, sp, 48 vs1r.v v8, (a3) # Unknown-size Folded Spill + sd a6, 32(sp) # 8-byte Folded Spill vse64.v v8, (a6) beq a1, a2, .LBB27_3 # %bb.1: # %cond.true.i.i.i.i @@ -42801,9 +42801,9 @@ sub s4, a1, a2 sd zero, 56(s1) vsetivli zero, 2, e64, m1, ta, ma - sd a0, 24(sp) # 8-byte Folded Spill addi a3, sp, 48 vl1r.v v8, (a3) # Unknown-size Folded Reload + sd a0, 24(sp) # 8-byte Folded Spill vse64.v v8, (a0) beq a1, a2, .LBB27_9 # %bb.6: # %cond.true.i.i.i.i27 --- build.head//MicroBenchmarks/LCALS/SubsetCLambdaLoops/CMakeFiles/lcalsCLambda.dir/__/LCALSSuite.s 2023-11-13 08:03:20.911600488 +0000 +++ build//MicroBenchmarks/LCALS/SubsetCLambdaLoops/CMakeFiles/lcalsCLambda.dir/__/LCALSSuite.s 2023-11-13 08:03:15.947743974 +0000 @@ -42765,9 +42765,9 @@ mul s0, a3, a4 sd zero, 32(s1) vmv.v.i v8, 0 - sd a6, 32(sp) # 8-byte Folded Spill addi a3, sp, 48 vs1r.v v8, (a3) # Unknown-size Folded Spill + sd a6, 32(sp) # 8-byte Folded Spill vse64.v v8, (a6) beq a1, a2, .LBB27_3 # %bb.1: # %cond.true.i.i.i.i @@ -42801,9 +42801,9 @@ sub s4, a1, a2 sd zero, 56(s1) vsetivli zero, 2, e64, m1, ta, ma - sd a0, 24(sp) # 8-byte Folded Spill addi a3, sp, 48 vl1r.v v8, (a3) # Unknown-size Folded Reload + sd a0, 24(sp) # 8-byte Folded Spill vse64.v v8, (a0) beq a1, a2, .LBB27_9 # %bb.6: # %cond.true.i.i.i.i27 --- build.head//MultiSource/Applications/hbd/CMakeFiles/hbd.dir/decomp.s 2023-11-13 08:03:22.223562564 +0000 +++ build//MultiSource/Applications/hbd/CMakeFiles/hbd.dir/decomp.s 2023-11-13 08:03:17.279705472 +0000 @@ -491,9 +491,9 @@ li a0, 16 call _Znwm@plt vsetivli zero, 2, e64, m1, ta, ma - sd a0, 40(sp) # 8-byte Folded Spill addi a1, sp, 80 vl1r.v v8, (a1) # Unknown-size Folded Reload + sd a0, 40(sp) # 8-byte Folded Spill vse64.v v8, (a0) li a0, 16 call _Znwm@plt --- build.head//MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/btSoftBody.s 2023-11-13 08:03:22.487554932 +0000 +++ build//MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/btSoftBody.s 2023-11-13 08:03:17.519698535 +0000 @@ -13278,7 +13278,7 @@ sd s1, 16(s7) lw a0, 820(s0) sb s6, 24(s7) - sw s5, 8(s7) + sw s9, 8(s7) vsetivli zero, 2, e32, mf2, ta, ma .LBB87_21: # %invoke.cont42 # in Loop: Header=BB87_22 Depth=1 @@ -13317,12 +13317,12 @@ bnez a1, .LBB87_25 # %bb.24: # %if.then.i # in Loop: Header=BB87_22 Depth=1 - li s5, 1 - bge a1, s5, .LBB87_21 + li s9, 1 + bge a1, s9, .LBB87_21 j .LBB87_26 .LBB87_25: # in Loop: Header=BB87_22 Depth=1 - slliw s5, a1, 1 - bge a1, s5, .LBB87_21 + slliw s9, a1, 1 + bge a1, s9, .LBB87_21 .LBB87_26: # %if.then.i.i141 # in Loop: Header=BB87_22 Depth=1 csrr a0, vlenb @@ -13336,10 +13336,10 @@ add a0, sp, a0 addi a0, a0, 112 vs1r.v v9, (a0) # Unknown-size Folded Spill - beqz s5, .LBB87_28 + beqz s9, .LBB87_28 # %bb.27: # %if.then.i.i.i143 # in Loop: Header=BB87_22 Depth=1 - slli a0, s5, 3 + slli a0, s9, 3 li a1, 16 call _Z22btAlignedAllocInternalmi@plt csrr a1, vlenb @@ -15929,9 +15929,9 @@ vs1r.v v8, (a0) # Unknown-size Folded Spill vsetivli zero, 4, e32, m1, ta, ma vmv.v.i v14, 0 - sd a7, 32(sp) # 8-byte Folded Spill addi a0, sp, 48 vs1r.v v14, (a0) # Unknown-size Folded Spill + sd a7, 32(sp) # 8-byte Folded Spill j .LBB89_3 .LBB89_2: # %for.end154 # in Loop: Header=BB89_3 Depth=1 @@ -16063,10 +16063,10 @@ li a1, 0 call memset@plt lw s0, 4(s10) - ld a7, 32(sp) # 8-byte Folded Reload - li t0, 4 addi a0, sp, 48 vl1r.v v14, (a0) # Unknown-size Folded Reload + ld a7, 32(sp) # 8-byte Folded Reload + li t0, 4 .LBB89_24: # %_ZN20btAlignedObjectArrayIfE6resizeEiRKf.exit # in Loop: Header=BB89_3 Depth=1 sw s7, 36(s10) @@ -16202,14 +16202,14 @@ # in Loop: Header=BB89_3 Depth=1 fmul.s fa1, fa5, fa2 fmul.s fa0, fa5, fa3 - fmul.s ft1, fa5, fa4 + fmul.s ft0, fa5, fa4 fmv.x.w a0, fa1 fmv.x.w a1, fa0 slli a1, a1, 32 slli a0, a0, 32 srli a0, a0, 32 or a0, a1, a0 - fmv.x.w a1, ft1 + fmv.x.w a1, ft0 slli a1, a1, 32 srli a1, a1, 32 sd a0, 264(s10) @@ -16242,7 +16242,7 @@ flw fa2, 192(s10) mv a2, s0 fmv.s ft2, fs0 - fmv.s ft0, fs0 + fmv.s ft1, fs0 .LBB89_42: # %for.body48 # Parent Loop BB89_3 Depth=1 # => This Inner Loop Header: Depth=2 @@ -16252,14 +16252,14 @@ flw ft5, 24(a3) fsub.s ft3, ft3, fa1 fsub.s ft4, ft4, fa0 - fsub.s ft5, ft5, ft1 + fsub.s ft5, ft5, ft0 fmul.s ft6, ft3, ft3 flw ft7, 0(a1) fmul.s fa6, ft4, ft4 fmul.s fa7, ft5, ft5 fadd.s ft8, fa6, fa7 - fmadd.s ft0, ft7, ft8, ft0 - fsw ft0, 168(s10) + fmadd.s ft1, ft7, ft8, ft1 + fsw ft1, 168(s10) fadd.s fa7, ft6, fa7 fmadd.s fa4, ft7, fa7, fa4 fsw fa4, 188(s10) @@ -16286,8 +16286,8 @@ flw fa3, 176(s10) flw fa2, 192(s10) flw fa4, 188(s10) - fmv.w.x ft0, zero - fmv.s ft2, ft0 + fmv.w.x ft1, zero + fmv.s ft2, ft1 .LBB89_44: # %for.end111 # in Loop: Header=BB89_3 Depth=1 addi a0, s10, 264 @@ -16295,37 +16295,37 @@ fmul.s fa1, fa2, fa1 fmadd.s fa1, fa4, ft2, fa1 fneg.s fa0, fa5 - fmul.s ft1, ft2, fa0 - fmadd.s ft1, fa2, fa3, ft1 + fmul.s ft0, ft2, fa0 + fmadd.s ft0, fa2, fa3, ft0 fneg.s ft3, fa4 fmul.s ft3, fa3, ft3 fmadd.s ft3, fa5, fa2, ft3 - fmul.s ft4, fa5, ft1 - fmadd.s ft4, ft0, fa1, ft4 + fmul.s ft4, fa5, ft0 + fmadd.s ft4, ft1, fa1, ft4 fmadd.s ft4, fa3, ft3, ft4 fdiv.s ft4, fs1, ft4 fmul.s fa1, fa1, ft4 - fmul.s ft1, ft1, ft4 + fmul.s ft0, ft0, ft4 fneg.s ft5, fa3 fmul.s ft6, fa4, ft5 fmadd.s ft6, fa5, fa2, ft6 fmul.s ft6, ft6, ft4 fmul.s ft5, fa3, ft5 - fmadd.s ft2, ft0, ft2, ft5 + fmadd.s ft2, ft1, ft2, ft5 fmul.s ft2, ft2, ft4 - fneg.s ft5, ft0 + fneg.s ft5, ft1 fmul.s fa2, fa2, ft5 fmadd.s fa3, fa3, fa5, fa2 fmul.s fa3, fa3, ft4 fmul.s fa2, ft3, ft4 fmul.s fa5, fa5, fa0 - fmadd.s fa5, ft0, fa4, fa5 + fmadd.s fa5, ft1, fa4, fa5 fmul.s fa5, fa5, ft4 fsw fa1, 168(s10) - fsw ft1, 172(s10) + fsw ft0, 172(s10) fsw ft6, 176(s10) sw zero, 180(s10) - fsw ft1, 184(s10) + fsw ft0, 184(s10) fsw ft2, 188(s10) fsw fa3, 192(s10) sw zero, 196(s10) @@ -16397,10 +16397,10 @@ sb s3, 88(s10) sd s1, 80(s10) sw s0, 72(s10) - ld a7, 32(sp) # 8-byte Folded Reload - li t0, 4 addi a0, sp, 48 vl1r.v v14, (a0) # Unknown-size Folded Reload + ld a7, 32(sp) # 8-byte Folded Reload + li t0, 4 .LBB89_54: # %_ZN20btAlignedObjectArrayI9btVector3E6resizeEiRKS0_.exit # in Loop: Header=BB89_3 Depth=1 sw s0, 68(s10) @@ -19852,14 +19852,14 @@ sw s2, 888(s0) sb t6, 904(s0) sd s1, 896(s0) + addi a0, sp, 160 + vl1r.v v10, (a0) # Unknown-size Folded Reload ld a7, 48(sp) # 8-byte Folded Reload li t0, -1 ld t1, 40(sp) # 8-byte Folded Reload li t2, 72 li t3, 3 addi ra, sp, 64 - addi a0, sp, 160 - vl1r.v v10, (a0) # Unknown-size Folded Reload .LBB93_26: # %_ZN10btSoftBody10appendFaceEiPNS_8MaterialE.exit # in Loop: Header=BB93_13 Depth=2 mul a0, a1, t2 --- build.head//MultiSource/Applications/lemon/CMakeFiles/lemon.dir/lemon.s 2023-11-13 08:03:22.307560135 +0000 +++ build//MultiSource/Applications/lemon/CMakeFiles/lemon.dir/lemon.s 2023-11-13 08:03:17.355703275 +0000 @@ -3971,13 +3971,13 @@ vid.v v8 addi a0, sp, 80 vs2r.v v8, (a0) # Unknown-size Folded Spill - sd s3, 32(sp) # 8-byte Folded Spill csrr a0, vlenb slli a2, a0, 1 add a0, a2, a0 add a0, sp, a0 addi a0, a0, 80 vs2r.v v12, (a0) # Unknown-size Folded Spill + sd s3, 32(sp) # 8-byte Folded Spill j .LBB22_3 .LBB22_2: # %for.inc54 # in Loop: Header=BB22_3 Depth=1 @@ -7293,15 +7293,15 @@ mv s7, s8 li a0, 1 sd a0, 64(sp) # 8-byte Folded Spill - sd s8, 104(sp) # 8-byte Folded Spill - sd s0, 88(sp) # 8-byte Folded Spill - sd s1, 80(sp) # 8-byte Folded Spill csrr a0, vlenb add a0, sp, a0 lui a1, 4 addiw a1, a1, -112 add a0, a0, a1 vs2r.v v10, (a0) # Unknown-size Folded Spill + sd s8, 104(sp) # 8-byte Folded Spill + sd s0, 88(sp) # 8-byte Folded Spill + sd s1, 80(sp) # 8-byte Folded Spill j .LBB37_6 .LBB37_4: # %if.end.thread.i # in Loop: Header=BB37_6 Depth=1 @@ -7431,13 +7431,13 @@ # %bb.21: # %if.then33.i # in Loop: Header=BB37_6 Depth=1 addiw s4, s4, -1 - li a6, 37 csrr a0, vlenb add a0, sp, a0 lui a1, 4 addiw a1, a1, -112 add a0, a0, a1 vl2r.v v10, (a0) # Unknown-size Folded Reload + li a6, 37 bnez s4, .LBB37_51 # %bb.22: # %for.cond37.preheader.i # in Loop: Header=BB37_6 Depth=1 @@ -8367,13 +8367,13 @@ sd zero, 0(a1) vsetivli zero, 4, e32, m1, ta, ma ld a1, 160(sp) + csrr a2, vlenb + add a2, sp, a2 + lui a3, 4 + addiw a3, a3, -112 + add a2, a2, a3 + vl1r.v v8, (a2) # Unknown-size Folded Reload ld a2, 112(sp) # 8-byte Folded Reload - csrr a3, vlenb - add a3, sp, a3 - lui a4, 4 - addiw a4, a4, -112 - add a3, a3, a4 - vl1r.v v8, (a3) # Unknown-size Folded Reload vse32.v v8, (a2) sw zero, 16(a2) sw zero, 20(a1) @@ -8714,11 +8714,11 @@ ld a1, 72(sp) # 8-byte Folded Reload sd a0, 8(a1) vsetivli zero, 2, e64, m1, ta, ma - ld s0, 120(sp) # 8-byte Folded Reload lui a1, 4 addiw a1, a1, -112 add a1, sp, a1 vl1r.v v8, (a1) # Unknown-size Folded Reload + ld s0, 120(sp) # 8-byte Folded Reload vse64.v v8, (s0) li a1, 3 sw a1, 168(sp) --- build.head//MultiSource/Benchmarks/mafft/CMakeFiles/pairlocalalign.dir/mltaln9.s 2023-11-13 08:03:22.567552620 +0000 +++ build//MultiSource/Benchmarks/mafft/CMakeFiles/pairlocalalign.dir/mltaln9.s 2023-11-13 08:03:17.595696338 +0000 @@ -3053,9 +3053,9 @@ j .LBB14_5 .LBB14_4: # %for.end46 # in Loop: Header=BB14_5 Depth=1 - ld a1, %pcrel_lo(.Lpcrel_hi57)(s10) + ld a0, %pcrel_lo(.Lpcrel_hi57)(s10) sb zero, 30(a3) - add a0, a1, a0 + add a0, a0, a1 ld a0, 0(a0) addi s2, a2, 1 addi a3, a3, 1 @@ -3068,27 +3068,27 @@ # =>This Loop Header: Depth=1 # Child Loop BB14_7 Depth 2 ld a3, %pcrel_lo(.Lpcrel_hi56)(s5) - li a1, 0 + li a0, 0 vsetivli zero, 16, e8, m1, ta, ma - addi a0, sp, 208 - vl1r.v v8, (a0) # Unknown-size Folded Reload + addi a1, sp, 208 + vl1r.v v8, (a1) # Unknown-size Folded Reload vse8.v v8, (a3) - addi a0, a3, 14 - vse8.v v8, (a0) - slli a0, a2, 3 - add a4, s6, a0 + addi a1, a3, 14 + vse8.v v8, (a1) + slli a1, a2, 3 + add a4, s6, a1 j .LBB14_7 .LBB14_6: # %for.body23 # in Loop: Header=BB14_7 Depth=2 - add a6, a3, a1 - addi a1, a1, 1 + add a6, a3, a0 + addi a0, a0, 1 sb a5, 0(a6) - beq a1, s1, .LBB14_4 + beq a0, s1, .LBB14_4 .LBB14_7: # %for.body23 # Parent Loop BB14_5 Depth=1 # => This Inner Loop Header: Depth=2 ld a5, 0(a4) - add a5, a5, a1 + add a5, a5, a0 lbu a5, 0(a5) ld a6, 0(s7) slli a7, a5, 1 @@ -4786,10 +4786,10 @@ j .LBB19_10 .LBB19_9: # %for.end58 # in Loop: Header=BB19_10 Depth=1 - ld a1, 184(sp) # 8-byte Folded Reload - ld a1, %pcrel_lo(.Lpcrel_hi122)(a1) + ld a0, 184(sp) # 8-byte Folded Reload + ld a0, %pcrel_lo(.Lpcrel_hi122)(a0) sb zero, 30(a3) - add a0, a1, a0 + add a0, a0, a1 ld a0, 0(a0) addi s3, a2, 1 addi a3, a3, 1 @@ -4802,27 +4802,27 @@ # =>This Loop Header: Depth=1 # Child Loop BB19_12 Depth 2 ld a3, %pcrel_lo(.Lpcrel_hi121)(s10) - li a1, 0 + li a0, 0 vsetivli zero, 16, e8, m1, ta, ma - addi a0, sp, 208 - vl1r.v v8, (a0) # Unknown-size Folded Reload + addi a1, sp, 208 + vl1r.v v8, (a1) # Unknown-size Folded Reload vse8.v v8, (a3) - addi a0, a3, 14 - vse8.v v8, (a0) - slli a0, a2, 3 - add a4, s6, a0 + addi a1, a3, 14 + vse8.v v8, (a1) + slli a1, a2, 3 + add a4, s6, a1 j .LBB19_12 .LBB19_11: # %for.body34 # in Loop: Header=BB19_12 Depth=2 - add a6, a3, a1 - addi a1, a1, 1 + add a6, a3, a0 + addi a0, a0, 1 sb a5, 0(a6) - beq a1, s0, .LBB19_9 + beq a0, s0, .LBB19_9 .LBB19_12: # %for.body34 # Parent Loop BB19_10 Depth=1 # => This Inner Loop Header: Depth=2 ld a5, 0(a4) - add a5, a5, a1 + add a5, a5, a0 lbu a5, 0(a5) ld a6, 0(s7) slli a7, a5, 1 @@ -8216,10 +8216,10 @@ sub sp, sp, a5 .cfi_escape 0x0f, 0x0e, 0x72, 0x00, 0x11, 0x90, 0x02, 0x22, 0x11, 0x02, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 272 + 2 * vlenb mv s4, a4 - sd a3, 80(sp) # 8-byte Folded Spill - mv s2, a2 + sd a3, 88(sp) # 8-byte Folded Spill + mv s8, a2 mv s9, a1 - mv s8, a0 + mv s7, a0 .Lpcrel_hi204: auipc a0, %pcrel_hi(sueff1_double) .Lpcrel_hi205: @@ -8247,18 +8247,19 @@ # %bb.3: # %if.then2 .Lpcrel_hi210: auipc a0, %pcrel_hi(cluster_average_double) - addi s1, a0, %pcrel_lo(.Lpcrel_hi210) + addi a0, a0, %pcrel_lo(.Lpcrel_hi210) j .LBB23_6 .LBB23_4: .Lpcrel_hi209: auipc a0, %pcrel_hi(cluster_mix_double) - addi s1, a0, %pcrel_lo(.Lpcrel_hi209) + addi a0, a0, %pcrel_lo(.Lpcrel_hi209) j .LBB23_6 .LBB23_5: # %if.then6 .Lpcrel_hi211: auipc a0, %pcrel_hi(cluster_minimum_double) - addi s1, a0, %pcrel_lo(.Lpcrel_hi211) + addi a0, a0, %pcrel_lo(.Lpcrel_hi211) .LBB23_6: # %if.end10 + sd a0, 128(sp) # 8-byte Folded Spill .Lpcrel_hi214: auipc a0, %pcrel_hi(veryfastsupg_double_outtree.hist) sd a0, 120(sp) # 8-byte Folded Spill @@ -8267,20 +8268,19 @@ auipc a1, %pcrel_hi(veryfastsupg_double_outtree.treetmp) sd a1, 104(sp) # 8-byte Folded Spill .Lpcrel_hi216: - auipc s7, %pcrel_hi(veryfastsupg_double_outtree.tree) + auipc s3, %pcrel_hi(veryfastsupg_double_outtree.tree) .Lpcrel_hi217: auipc a1, %pcrel_hi(veryfastsupg_double_outtree.tmptmplen) sd a1, 112(sp) # 8-byte Folded Spill .Lpcrel_hi218: auipc s10, %pcrel_hi(veryfastsupg_double_outtree.ac) .Lpcrel_hi219: - auipc s3, %pcrel_hi(veryfastsupg_double_outtree.nametmp) - sd s2, 88(sp) # 8-byte Folded Spill + auipc s1, %pcrel_hi(veryfastsupg_double_outtree.nametmp) beqz a0, .LBB23_17 # %bb.7: # %if.end22 - sd s7, 96(sp) # 8-byte Folded Spill - sd s3, 40(sp) # 8-byte Folded Spill - blez s8, .LBB23_18 + sd s3, 96(sp) # 8-byte Folded Spill + sd s1, 40(sp) # 8-byte Folded Spill + blez s7, .LBB23_18 .LBB23_8: # %for.cond25.preheader.lr.ph call __ctype_b_loc@plt mv s5, a0 @@ -8295,7 +8295,7 @@ j .LBB23_10 .LBB23_9: # %for.end57 # in Loop: Header=BB23_10 Depth=1 - ld a0, %pcrel_lo(.Lpcrel_hi216)(s7) + ld a0, %pcrel_lo(.Lpcrel_hi216)(s3) sb zero, 30(a3) slli a1, a2, 3 add a0, a0, a1 @@ -8307,11 +8307,11 @@ call sprintf@plt addi s4, s4, 256 mv a2, s0 - beq s0, s8, .LBB23_14 + beq s0, s7, .LBB23_14 .LBB23_10: # %for.cond25.preheader # =>This Loop Header: Depth=1 # Child Loop BB23_12 Depth 2 - ld a3, %pcrel_lo(.Lpcrel_hi219)(s3) + ld a3, %pcrel_lo(.Lpcrel_hi219)(s1) vsetivli zero, 16, e8, m1, ta, ma addi a0, sp, 144 vl1r.v v8, (a0) # Unknown-size Folded Reload @@ -8345,10 +8345,10 @@ j .LBB23_11 .LBB23_14: # %for.cond65.preheader ld a0, %pcrel_lo(.Lpcrel_hi218)(s10) - blez s8, .LBB23_19 + blez s7, .LBB23_19 # %bb.15: # %for.body68.lr.ph li a2, 16 - bgeu s8, a2, .LBB23_22 + bgeu s7, a2, .LBB23_22 # %bb.16: li a1, 0 j .LBB23_25 @@ -8364,11 +8364,10 @@ ld a1, 104(sp) # 8-byte Folded Reload sd a0, %pcrel_lo(.Lpcrel_hi215)(a1) mulw a1, a2, s2 - ld s2, 88(sp) # 8-byte Folded Reload mv a0, a2 call AllocateCharMtx@plt lw a1, 0(s0) - sd a0, %pcrel_lo(.Lpcrel_hi216)(s7) + sd a0, %pcrel_lo(.Lpcrel_hi216)(s3) mv a0, a1 call AllocateIntVec@plt lw s5, 0(s0) @@ -8384,14 +8383,14 @@ sd a0, %pcrel_lo(.Lpcrel_hi218)(s10) li a0, 30 call AllocateCharVec@plt - sd a0, %pcrel_lo(.Lpcrel_hi219)(s3) - sd s7, 96(sp) # 8-byte Folded Spill - sd s3, 40(sp) # 8-byte Folded Spill - bgtz s8, .LBB23_8 + sd a0, %pcrel_lo(.Lpcrel_hi219)(s1) + sd s3, 96(sp) # 8-byte Folded Spill + sd s1, 40(sp) # 8-byte Folded Spill + bgtz s7, .LBB23_8 .LBB23_18: # %for.cond65.preheader.thread ld a0, %pcrel_lo(.Lpcrel_hi218)(s10) .LBB23_19: # %for.end76.thread - slli a1, s8, 3 + slli a1, s7, 3 add a0, a1, a0 li a1, -1 sw a1, -8(a0) @@ -8468,7 +8467,7 @@ vsetivli zero, 8, e32, m2, ta, ma vid.v v8 vsetvli zero, zero, e64, m4, ta, ma - andi a1, s8, -16 + andi a1, s7, -16 vid.v v12 mv a3, a1 mv a4, a0 @@ -8491,13 +8490,13 @@ addi a4, a4, 128 bnez a3, .LBB23_23 # %bb.24: # %middle.block - beq a1, s8, .LBB23_27 + beq a1, s7, .LBB23_27 .LBB23_25: # %for.body68.preheader addi a2, a1, -1 slli a3, a1, 3 add a3, a3, a0 addi a3, a3, 4 - sub a1, s8, a1 + sub a1, s7, a1 .LBB23_26: # %for.body68 # =>This Inner Loop Header: Depth=1 addi a4, a2, 2 @@ -8508,21 +8507,21 @@ addi a3, a3, 8 bnez a1, .LBB23_26 .LBB23_27: # %for.end76 - addiw s0, s8, -1 + addiw s0, s7, -1 slli a1, s0, 3 add a0, a0, a1 li a1, -1 sw a1, 0(a0) - blez s8, .LBB23_20 + blez s7, .LBB23_20 # %bb.28: # %for.end98 ld a0, 112(sp) # 8-byte Folded Reload ld a0, %pcrel_lo(.Lpcrel_hi217)(a0) - slli a2, s8, 3 + slli a2, s7, 3 li a1, 0 call memset@plt ld a0, 120(sp) # 8-byte Folded Reload ld a0, %pcrel_lo(.Lpcrel_hi214)(a0) - slli a2, s8, 2 + slli a2, s7, 2 li a1, 255 call memset@plt .Lpcrel_hi223: @@ -8533,10 +8532,10 @@ li a0, 10 call fputc@plt li a0, 1 - sd s8, 32(sp) # 8-byte Folded Spill - beq s8, a0, .LBB23_21 + sd s7, 32(sp) # 8-byte Folded Spill + beq s7, a0, .LBB23_21 # %bb.29: # %for.body104.preheader - li s3, 0 + li s6, 0 slli s0, s0, 32 srli s0, s0, 32 sd s0, 72(sp) # 8-byte Folded Spill @@ -8560,11 +8559,12 @@ sd a0, 16(sp) # 8-byte Folded Spill li s11, -1 li s4, -1 + sd s8, 80(sp) # 8-byte Folded Spill j .LBB23_31 .LBB23_30: # %if.end284 # in Loop: Header=BB23_31 Depth=1 - ld s3, 96(sp) # 8-byte Folded Reload - ld a1, %pcrel_lo(.Lpcrel_hi216)(s3) + ld s1, 96(sp) # 8-byte Folded Reload + ld a1, %pcrel_lo(.Lpcrel_hi216)(s1) ld s0, 104(sp) # 8-byte Folded Reload ld a0, %pcrel_lo(.Lpcrel_hi215)(s0) add a2, a1, s2 @@ -8578,16 +8578,15 @@ auipc a1, %pcrel_hi(.L.str.16) addi a1, a1, %pcrel_lo(.Lpcrel_hi227) call sprintf@plt - ld a0, %pcrel_lo(.Lpcrel_hi216)(s3) + ld a0, %pcrel_lo(.Lpcrel_hi216)(s1) add a0, a0, s2 ld a0, 0(a0) ld a1, %pcrel_lo(.Lpcrel_hi215)(s0) call strcpy@plt - ld s3, 128(sp) # 8-byte Folded Reload - addi s3, s3, 1 - ld s2, 88(sp) # 8-byte Folded Reload + addi s6, s6, 1 + ld s8, 80(sp) # 8-byte Folded Reload ld a0, 72(sp) # 8-byte Folded Reload - beq s3, a0, .LBB23_21 + beq s6, a0, .LBB23_21 .LBB23_31: # %for.body104 # =>This Loop Header: Depth=1 # Child Loop BB23_35 Depth 2 @@ -8598,7 +8597,7 @@ # Child Loop BB23_63 Depth 2 # Child Loop BB23_77 Depth 2 ld a0, 64(sp) # 8-byte Folded Reload - mul a0, s3, a0 + mul a0, s6, a0 slliw a1, a0, 31 srliw a0, a0, 1 or a0, a0, a1 @@ -8665,7 +8664,7 @@ # in Loop: Header=BB23_31 Depth=1 ld a0, 24(sp) # 8-byte Folded Reload ld a0, 0(a0) - sext.w a2, s3 + sext.w a2, s6 ld a1, 16(sp) # 8-byte Folded Reload ld a3, 32(sp) # 8-byte Folded Reload call fprintf@plt @@ -8676,10 +8675,10 @@ fmv.d fa5, fs0 .LBB23_41: # %for.end141 # in Loop: Header=BB23_31 Depth=1 - slli a2, s3, 3 + slli a2, s6, 3 ld a1, 120(sp) # 8-byte Folded Reload ld a4, %pcrel_lo(.Lpcrel_hi214)(a1) - add a1, s2, a2 + add a1, s8, a2 ld a3, 0(a1) slli a1, s4, 2 add a1, a4, a1 @@ -8689,7 +8688,7 @@ # %bb.42: # %if.else150 # in Loop: Header=BB23_31 Depth=1 slli a6, a6, 3 - add a6, s2, a6 + add a6, s8, a6 ld a6, 0(a6) ld t2, 0(a6) ld t1, 8(a6) @@ -8767,12 +8766,11 @@ add a4, a4, a5 lw a4, 0(a4) ld a3, 8(a3) - sd s3, 128(sp) # 8-byte Folded Spill beq a4, s5, .LBB23_64 # %bb.58: # %if.else186 # in Loop: Header=BB23_31 Depth=1 slli a4, a4, 3 - add a4, s2, a4 + add a4, s8, a4 ld a4, 0(a4) ld t0, 0(a4) ld a7, 8(a4) @@ -8850,7 +8848,7 @@ slli s2, s4, 3 add a5, a3, s2 fld fa4, 0(a5) - ld s8, 80(sp) # 8-byte Folded Reload + ld s8, 88(sp) # 8-byte Folded Reload add s8, s8, a2 ld a2, 0(s8) fmul.d fa5, fa5, fs1 @@ -8864,8 +8862,7 @@ fsub.d fa4, fa5, fa4 fsd fa4, 8(a2) fsd fa5, 0(a5) - ld a2, 128(sp) # 8-byte Folded Reload - sw a2, 0(a1) + sw s6, 0(a1) j .LBB23_77 .LBB23_74: # %if.else242 # in Loop: Header=BB23_77 Depth=2 @@ -8876,19 +8873,20 @@ slli a2, a2, 3 add s3, s9, a2 ld a2, 0(s3) - slli s6, a3, 3 + slli s1, a3, 3 slli a1, a1, 3 add a1, s9, a1 ld a1, 0(a1) - add a2, a2, s6 + add a2, a2, s1 fld fa0, 0(a2) slli a0, a0, 3 add a0, a1, a0 fld fa1, 0(a0) - jalr s1 + ld a0, 128(sp) # 8-byte Folded Reload + jalr a0 ld a1, 0(s3) ld a0, %pcrel_lo(.Lpcrel_hi218)(s10) - add a1, a1, s6 + add a1, a1, s1 fsd fa0, 0(a1) .LBB23_76: # %for.inc264 # in Loop: Header=BB23_77 Depth=2 @@ -18444,12 +18442,12 @@ srli a2, a1, 30 li a1, 255 call memset@plt + ld t0, 128(sp) # 8-byte Folded Reload csrr a0, vlenb slli a0, a0, 1 add a0, sp, a0 addi a0, a0, 176 vl2r.v v14, (a0) # Unknown-size Folded Reload - ld t0, 128(sp) # 8-byte Folded Reload lw a1, 0(s0) addiw a1, a1, 1 beqz a1, .LBB66_24 @@ -18461,12 +18459,12 @@ srli a2, a1, 30 li a1, 255 call memset@plt + ld t0, 128(sp) # 8-byte Folded Reload csrr a0, vlenb slli a0, a0, 1 add a0, sp, a0 addi a0, a0, 176 vl2r.v v14, (a0) # Unknown-size Folded Reload - ld t0, 128(sp) # 8-byte Folded Reload .LBB66_24: # %while.end58.us.us # in Loop: Header=BB66_10 Depth=3 ld a0, 136(sp) # 8-byte Folded Reload @@ -18575,12 +18573,12 @@ addi a1, a1, %pcrel_lo(.Lpcrel_hi408) ld a2, 64(sp) # 8-byte Folded Reload call fprintf@plt + ld t0, 128(sp) # 8-byte Folded Reload csrr a0, vlenb slli a0, a0, 1 add a0, sp, a0 addi a0, a0, 176 vl2r.v v14, (a0) # Unknown-size Folded Reload - ld t0, 128(sp) # 8-byte Folded Reload lw a0, 52(s9) bltz a0, .LBB66_29 .LBB66_37: # %for.end.us.us @@ -18686,12 +18684,12 @@ addi a1, a1, %pcrel_lo(.Lpcrel_hi410) ld a2, 64(sp) # 8-byte Folded Reload call fprintf@plt + ld t0, 128(sp) # 8-byte Folded Reload csrr a0, vlenb slli a0, a0, 1 add a0, sp, a0 addi a0, a0, 176 vl2r.v v14, (a0) # Unknown-size Folded Reload - ld t0, 128(sp) # 8-byte Folded Reload lw a0, 52(s9) bltz a0, .LBB66_42 .LBB66_50: # %for.end117.us.us @@ -18889,13 +18887,13 @@ fsd fs0, 40(a0) sw s4, 52(a0) sw s3, 48(a0) - ld s1, 112(sp) # 8-byte Folded Reload - li s7, -1 csrr a0, vlenb slli a0, a0, 1 add a0, sp, a0 addi a0, a0, 176 vl2r.v v14, (a0) # Unknown-size Folded Reload + ld s1, 112(sp) # 8-byte Folded Reload + li s7, -1 mv s5, s2 .LBB66_74: # %if.then248.critedge.us.us # in Loop: Header=BB66_60 Depth=4 --- build.head//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/Archive/Zip/ZipHandler.s 2023-11-13 08:03:21.223591469 +0000 +++ build//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/Archive/Zip/ZipHandler.s 2023-11-13 08:03:16.255735072 +0000 @@ -6178,14 +6178,14 @@ call _ZdaPv@plt .LBB26_81: # %_ZN8NArchive4NZip5CItemD2Ev.exit # in Loop: Header=BB26_28 Depth=1 - mv s4, s8 - ld s7, 32(sp) # 8-byte Folded Reload - li s8, -1 csrr a0, vlenb slli a0, a0, 1 add a0, sp, a0 addi a0, a0, 368 vl1r.v v8, (a0) # Unknown-size Folded Reload + mv s4, s8 + ld s7, 32(sp) # 8-byte Folded Reload + li s8, -1 ld a0, 248(sp) beqz a0, .LBB26_83 .LBB26_82: # %if.then.i113 --- build.head//MultiSource/Applications/lua/CMakeFiles/lua.dir/ltable.s 2023-11-13 08:03:22.311560020 +0000 +++ build//MultiSource/Applications/lua/CMakeFiles/lua.dir/ltable.s 2023-11-13 08:03:17.359703159 +0000 @@ -1396,13 +1396,13 @@ li a0, 0 li s1, 0 vsetivli zero, 2, e64, m1, ta, ma + csrr a1, vlenb + li a2, 6 + mul a1, a1, a2 + add a1, sp, a1 + addi a1, a1, 160 + vl1r.v v8, (a1) # Unknown-size Folded Reload addi a1, sp, 128 - csrr a2, vlenb - li a3, 6 - mul a2, a2, a3 - add a2, sp, a2 - addi a2, a2, 160 - vl1r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a1) addi a1, sp, 112 vse64.v v8, (a1) @@ -1674,11 +1674,11 @@ beqz a0, .LBB10_59 # %bb.56: # %if.else.i # in Loop: Header=BB10_1 Depth=1 + addi a1, sp, 160 + vl2r.v v12, (a1) # Unknown-size Folded Reload li s1, 2 li s9, 1 ld a4, 24(sp) # 8-byte Folded Reload - addi a1, sp, 160 - vl2r.v v12, (a1) # Unknown-size Folded Reload bne a0, s8, .LBB10_1 # %bb.57: # %land.lhs.true.i # in Loop: Header=BB10_1 Depth=1 @@ -1700,9 +1700,9 @@ # in Loop: Header=BB10_1 Depth=1 mv a0, s2 call luaG_runerror - ld a4, 24(sp) # 8-byte Folded Reload addi a0, sp, 160 vl2r.v v12, (a0) # Unknown-size Folded Reload + ld a4, 24(sp) # 8-byte Folded Reload j .LBB10_1 .LBB10_61: # %if.end.i.i # in Loop: Header=BB10_1 Depth=1 --- build.head//MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/rules-inf.s 2023-11-13 08:03:22.371558285 +0000 +++ build//MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/rules-inf.s 2023-11-13 08:03:17.415701541 +0000 @@ -282,31 +282,31 @@ .LBB0_24: # %if.end58 # in Loop: Header=BB0_6 Depth=1 ld a5, 96(sp) # 8-byte Folded Reload - ld a1, 0(s1) + ld a0, 0(s1) + addi a1, sp, 128 + vl1r.v v8, (a1) # Unknown-size Folded Reload ld a4, 104(sp) # 8-byte Folded Reload - addi a0, sp, 128 - vl1r.v v8, (a0) # Unknown-size Folded Reload - beqz a1, .LBB0_4 + beqz a0, .LBB0_4 # %bb.25: # %while.body.preheader.i # in Loop: Header=BB0_6 Depth=1 - lw a0, 0(s2) - addi a0, a0, -1 + lw a1, 0(s2) + addi a1, a1, -1 vsetivli zero, 4, e32, m1, ta, ma .LBB0_26: # %while.body.i # Parent Loop BB0_6 Depth=1 # => This Inner Loop Header: Depth=2 - sd a1, 0(s11) - ld a2, 24(a1) + sd a0, 0(s11) + ld a2, 24(a0) sd a2, 0(s1) - addi a2, a1, 4 - sw zero, 20(a1) + addi a2, a0, 4 + sw zero, 20(a0) vse32.v v8, (a2) ld a2, 0(s11) - ld a1, 0(s1) + ld a0, 0(s1) sd zero, 24(a2) - sw a0, 0(s2) - addi a0, a0, -1 - bnez a1, .LBB0_26 + sw a1, 0(s2) + addi a1, a1, -1 + bnez a0, .LBB0_26 j .LBB0_4 .LBB0_27: li s10, 0 @@ -790,23 +790,24 @@ add s7, s7, a0 .Lpcrel_hi16: auipc a0, %got_pcrel_hi(fol_NOT) - ld s4, %pcrel_lo(.Lpcrel_hi16)(a0) + ld s5, %pcrel_lo(.Lpcrel_hi16)(a0) .Lpcrel_hi17: auipc a0, %got_pcrel_hi(fol_EQUALITY) - ld s5, %pcrel_lo(.Lpcrel_hi17)(a0) + ld s8, %pcrel_lo(.Lpcrel_hi17)(a0) .Lpcrel_hi18: auipc a0, %got_pcrel_hi(cont_LEFTCONTEXT) - ld s8, %pcrel_lo(.Lpcrel_hi18)(a0) + ld a0, %pcrel_lo(.Lpcrel_hi18)(a0) + sd a0, 80(sp) # 8-byte Folded Spill vsetivli zero, 4, e32, m1, ta, ma vmv.v.i v8, 0 - sd s9, 64(sp) # 8-byte Folded Spill - sd s1, 80(sp) # 8-byte Folded Spill - sd s3, 40(sp) # 8-byte Folded Spill - sd s4, 32(sp) # 8-byte Folded Spill - sd s5, 24(sp) # 8-byte Folded Spill - sd s8, 104(sp) # 8-byte Folded Spill addi a0, sp, 144 vs1r.v v8, (a0) # Unknown-size Folded Spill + sd s9, 72(sp) # 8-byte Folded Spill + sd s1, 96(sp) # 8-byte Folded Spill + sd s0, 16(sp) # 8-byte Folded Spill + sd s3, 40(sp) # 8-byte Folded Spill + sd s5, 32(sp) # 8-byte Folded Spill + sd s8, 24(sp) # 8-byte Folded Spill j .LBB3_8 .LBB3_7: # %for.inc86 # in Loop: Header=BB3_8 Depth=1 @@ -818,9 +819,9 @@ # =>This Loop Header: Depth=1 # Child Loop BB3_17 Depth 2 # Child Loop BB3_27 Depth 3 - # Child Loop BB3_34 Depth 3 - # Child Loop BB3_42 Depth 3 - # Child Loop BB3_49 Depth 3 + # Child Loop BB3_35 Depth 3 + # Child Loop BB3_43 Depth 3 + # Child Loop BB3_50 Depth 3 ld a0, 56(s0) slli a1, s7, 3 add a0, a0, a1 @@ -832,7 +833,7 @@ # in Loop: Header=BB3_8 Depth=1 ld a0, 24(a4) lw a1, 0(a0) - lw a2, 0(s4) + lw a2, 0(s5) bne a2, a1, .LBB3_11 # %bb.10: # %clause_LiteralIsEquality.exit # in Loop: Header=BB3_8 Depth=1 @@ -841,7 +842,7 @@ lw a1, 0(a0) .LBB3_11: # %clause_LiteralIsEquality.exit.thread # in Loop: Header=BB3_8 Depth=1 - lw a2, 0(s5) + lw a2, 0(s8) bne a2, a1, .LBB3_7 # %bb.12: # %clause_LiteralAtom.exit # in Loop: Header=BB3_8 Depth=1 @@ -854,27 +855,19 @@ sd a4, 56(sp) # 8-byte Folded Spill ld a0, 16(a0) ld a3, 0(a0) - ld s11, 8(a0) - ld s6, 8(a3) + ld s10, 8(a0) + ld s11, 8(a3) add a0, a1, a2 - sd s11, 96(sp) # 8-byte Folded Spill - sd s6, 88(sp) # 8-byte Folded Spill + sd s11, 104(sp) # 8-byte Folded Spill j .LBB3_17 -.LBB3_14: # %cont_Reset.exit152 - # in Loop: Header=BB3_17 Depth=2 - sw zero, 0(s5) - li a0, 1 - sw a0, 0(s11) - li a0, 2000 - sw a0, 0(s3) +.LBB3_14: # in Loop: Header=BB3_17 Depth=2 + ld s1, 96(sp) # 8-byte Folded Reload + ld s3, 40(sp) # 8-byte Folded Reload + ld s5, 32(sp) # 8-byte Folded Reload + ld s8, 24(sp) # 8-byte Folded Reload .LBB3_15: # %for.inc # in Loop: Header=BB3_17 Depth=2 - ld s1, 80(sp) # 8-byte Folded Reload - ld s3, 40(sp) # 8-byte Folded Reload - ld s4, 32(sp) # 8-byte Folded Reload - ld s5, 24(sp) # 8-byte Folded Reload - ld s8, 104(sp) # 8-byte Folded Reload - ld s11, 96(sp) # 8-byte Folded Reload + ld s11, 104(sp) # 8-byte Folded Reload .LBB3_16: # %for.inc # in Loop: Header=BB3_17 Depth=2 addi a0, s2, 1 @@ -883,9 +876,9 @@ # Parent Loop BB3_8 Depth=1 # => This Loop Header: Depth=2 # Child Loop BB3_27 Depth 3 - # Child Loop BB3_34 Depth 3 - # Child Loop BB3_42 Depth 3 - # Child Loop BB3_49 Depth 3 + # Child Loop BB3_35 Depth 3 + # Child Loop BB3_43 Depth 3 + # Child Loop BB3_50 Depth 3 mv s2, a0 beq a0, s7, .LBB3_16 # %bb.18: # %land.lhs.true25 @@ -896,7 +889,7 @@ ld a0, 0(a0) ld a0, 24(a0) lw a1, 0(a0) - lw a2, 0(s4) + lw a2, 0(s5) bne a2, a1, .LBB3_20 # %bb.19: # %clause_LiteralIsEquality.exit106 # in Loop: Header=BB3_17 Depth=2 @@ -905,22 +898,22 @@ lw a1, 0(a0) .LBB3_20: # %clause_LiteralIsEquality.exit106.thread # in Loop: Header=BB3_17 Depth=2 - lw a2, 0(s5) + lw a2, 0(s8) bne a2, a1, .LBB3_16 # %bb.21: # %clause_LiteralAtom.exit113 # in Loop: Header=BB3_17 Depth=2 ld a0, 16(a0) ld a1, 0(a0) - ld s10, 8(a0) - ld a0, 8(a1) - sd a0, 112(sp) # 8-byte Folded Spill + ld s4, 8(a0) + ld s6, 8(a1) call cont_Check@plt + ld s8, 80(sp) # 8-byte Folded Reload ld a0, 0(s8) - mv a1, s11 - sd s10, 72(sp) # 8-byte Folded Spill - mv a2, s10 + mv a1, s10 + sd s4, 88(sp) # 8-byte Folded Spill + mv a2, s4 call unify_UnifyCom@plt - sext.w s10, s7 + sext.w s4, s7 beqz a0, .LBB3_25 # %bb.22: # %if.then35 # in Loop: Header=BB3_17 Depth=2 @@ -929,9 +922,9 @@ call subst_ExtractUnifierCom@plt ld a4, 128(sp) mv a0, s0 - mv a1, s10 - mv a2, s11 - mv a3, s6 + mv a1, s4 + mv a2, s10 + mv a3, s11 mv a5, s1 mv a6, s9 call inf_EqualityFactoringApplicable @@ -941,9 +934,9 @@ ld a5, 128(sp) sext.w a4, s2 mv a0, s0 - mv a1, s6 - ld a2, 112(sp) # 8-byte Folded Reload - mv a3, s10 + mv a1, s11 + mv a2, s6 + mv a3, s4 mv a6, s1 mv a7, s9 call inf_ApplyEqualityFactoring @@ -951,7 +944,7 @@ li a0, 16 call memory_Malloc@plt sd s9, 8(a0) - ld s9, 64(sp) # 8-byte Folded Reload + ld s9, 72(sp) # 8-byte Folded Reload ld a1, 120(sp) # 8-byte Folded Reload sd a1, 0(a0) sd a0, 120(sp) # 8-byte Folded Spill @@ -964,16 +957,16 @@ .Lpcrel_hi19: auipc a0, %got_pcrel_hi(cont_LASTBINDING) ld s1, %pcrel_lo(.Lpcrel_hi19)(a0) - ld a1, 0(s1) - addi a0, sp, 144 - vl1r.v v8, (a0) # Unknown-size Folded Reload - beqz a1, .LBB3_28 + ld a0, 0(s1) + addi a1, sp, 144 + vl1r.v v8, (a1) # Unknown-size Folded Reload + beqz a0, .LBB3_28 # %bb.26: # %while.body.preheader.i # in Loop: Header=BB3_17 Depth=2 .Lpcrel_hi20: - auipc a0, %got_pcrel_hi(cont_BINDINGS) - ld a0, %pcrel_lo(.Lpcrel_hi20)(a0) - lw a2, 0(a0) + auipc a1, %got_pcrel_hi(cont_BINDINGS) + ld a1, %pcrel_lo(.Lpcrel_hi20)(a1) + lw a2, 0(a1) addi a2, a2, -1 vsetivli zero, 4, e32, m1, ta, ma .LBB3_27: # %while.body.i @@ -983,18 +976,18 @@ .Lpcrel_hi21: auipc a3, %got_pcrel_hi(cont_CURRENTBINDING) ld a3, %pcrel_lo(.Lpcrel_hi21)(a3) - sd a1, 0(a3) - ld a4, 24(a1) + sd a0, 0(a3) + ld a4, 24(a0) sd a4, 0(s1) - addi a4, a1, 4 - sw zero, 20(a1) + addi a4, a0, 4 + sw zero, 20(a0) vse32.v v8, (a4) ld a3, 0(a3) - ld a1, 0(s1) + ld a0, 0(s1) sd zero, 24(a3) - sw a2, 0(a0) + sw a2, 0(a1) addi a2, a2, -1 - bnez a1, .LBB3_27 + bnez a0, .LBB3_27 .LBB3_28: # %cont_Reset.exit # in Loop: Header=BB3_17 Depth=2 .Lpcrel_hi22: @@ -1005,45 +998,50 @@ ld s11, %pcrel_lo(.Lpcrel_hi23)(a0) .Lpcrel_hi24: auipc a0, %got_pcrel_hi(cont_INDEXVARSCANNER) - ld s3, %pcrel_lo(.Lpcrel_hi24)(a0) + ld a1, %pcrel_lo(.Lpcrel_hi24)(a0) sw zero, 0(s5) li a0, 1 sw a0, 0(s11) li a0, 2000 - sw a0, 0(s3) + sd a1, 112(sp) # 8-byte Folded Spill + sw a0, 0(a1) call cont_Check@plt - ld s8, 104(sp) # 8-byte Folded Reload ld a0, 0(s8) - ld s6, 96(sp) # 8-byte Folded Reload - mv a1, s6 - ld a2, 112(sp) # 8-byte Folded Reload + mv a1, s10 + mv a2, s6 call unify_UnifyCom@plt - beqz a0, .LBB3_32 + beqz a0, .LBB3_31 # %bb.29: # %if.then47 # in Loop: Header=BB3_17 Depth=2 - ld s4, 120(sp) # 8-byte Folded Reload + sd s11, 64(sp) # 8-byte Folded Spill + mv s3, s0 + mv s0, s6 + mv s6, s10 + ld s10, 120(sp) # 8-byte Folded Reload ld a0, 0(s8) addi a1, sp, 128 call subst_ExtractUnifierCom@plt ld a4, 128(sp) - mv a0, s0 - mv a1, s10 + mv a0, s3 + mv a1, s4 + mv s11, s6 mv a2, s6 - ld s8, 88(sp) # 8-byte Folded Reload + ld s8, 104(sp) # 8-byte Folded Reload mv a3, s8 - ld s6, 80(sp) # 8-byte Folded Reload + ld s6, 96(sp) # 8-byte Folded Reload mv a5, s6 mv a6, s9 call inf_EqualityFactoringApplicable - beqz a0, .LBB3_31 + beqz a0, .LBB3_32 # %bb.30: # %if.then51 # in Loop: Header=BB3_17 Depth=2 ld a5, 128(sp) sext.w a4, s2 - mv a0, s0 + mv a0, s3 mv a1, s8 - ld a2, 72(sp) # 8-byte Folded Reload - mv a3, s10 + ld a2, 88(sp) # 8-byte Folded Reload + mv s3, s4 + mv a3, s4 mv a6, s6 mv a7, s9 call inf_ApplyEqualityFactoring @@ -1051,87 +1049,103 @@ li a0, 16 call memory_Malloc@plt sd s9, 8(a0) - sd s4, 0(a0) + sd s10, 0(a0) sd a0, 120(sp) # 8-byte Folded Spill -.LBB3_31: # %if.end54 + j .LBB3_33 +.LBB3_31: # in Loop: Header=BB3_17 Depth=2 + mv s3, s4 + ld a0, 0(s1) + addi a1, sp, 144 + vl1r.v v8, (a1) # Unknown-size Folded Reload + bnez a0, .LBB3_34 + j .LBB3_36 +.LBB3_32: # in Loop: Header=BB3_17 Depth=2 + mv s3, s4 +.LBB3_33: # %if.end54 # in Loop: Header=BB3_17 Depth=2 ld a0, 128(sp) call subst_Delete@plt -.LBB3_32: # %if.end55 - # in Loop: Header=BB3_17 Depth=2 - ld a1, 0(s1) - addi a0, sp, 144 - vl1r.v v8, (a0) # Unknown-size Folded Reload - ld s6, 88(sp) # 8-byte Folded Reload - beqz a1, .LBB3_35 -# %bb.33: # %while.body.preheader.i117 + ld s8, 80(sp) # 8-byte Folded Reload + mv s10, s11 + mv s6, s0 + ld s0, 16(sp) # 8-byte Folded Reload + ld s11, 64(sp) # 8-byte Folded Reload + ld a0, 0(s1) + addi a1, sp, 144 + vl1r.v v8, (a1) # Unknown-size Folded Reload + beqz a0, .LBB3_36 +.LBB3_34: # %while.body.preheader.i117 # in Loop: Header=BB3_17 Depth=2 - lw a0, 0(s5) - addi a0, a0, -1 + lw a1, 0(s5) + addi a1, a1, -1 vsetivli zero, 4, e32, m1, ta, ma -.LBB3_34: # %while.body.i119 +.LBB3_35: # %while.body.i119 # Parent Loop BB3_8 Depth=1 # Parent Loop BB3_17 Depth=2 # => This Inner Loop Header: Depth=3 .Lpcrel_hi25: auipc a2, %got_pcrel_hi(cont_CURRENTBINDING) ld a2, %pcrel_lo(.Lpcrel_hi25)(a2) - sd a1, 0(a2) - ld a3, 24(a1) + sd a0, 0(a2) + ld a3, 24(a0) sd a3, 0(s1) - addi a3, a1, 4 - sw zero, 20(a1) + addi a3, a0, 4 + sw zero, 20(a0) vse32.v v8, (a3) ld a2, 0(a2) - ld a1, 0(s1) + ld a0, 0(s1) sd zero, 24(a2) - sw a0, 0(s5) - addi a0, a0, -1 - bnez a1, .LBB3_34 -.LBB3_35: # %cont_Reset.exit126 + sw a1, 0(s5) + addi a1, a1, -1 + bnez a0, .LBB3_35 +.LBB3_36: # %cont_Reset.exit126 # in Loop: Header=BB3_17 Depth=2 sw zero, 0(s5) li a0, 1 sw a0, 0(s11) li a0, 2000 - sw a0, 0(s3) + ld a1, 112(sp) # 8-byte Folded Reload + sw a0, 0(a1) ld a0, 56(sp) # 8-byte Folded Reload lw a0, 8(a0) - ld s9, 64(sp) # 8-byte Folded Reload - bnez a0, .LBB3_15 -# %bb.36: # %if.then58 + ld s9, 72(sp) # 8-byte Folded Reload + bnez a0, .LBB3_14 +# %bb.37: # %if.then58 # in Loop: Header=BB3_17 Depth=2 + mv s4, s3 + mv s3, s6 call cont_Check@plt - ld s8, 104(sp) # 8-byte Folded Reload ld a0, 0(s8) + ld s6, 104(sp) # 8-byte Folded Reload mv a1, s6 - ld a2, 72(sp) # 8-byte Folded Reload + ld a2, 88(sp) # 8-byte Folded Reload call unify_UnifyCom@plt - beqz a0, .LBB3_40 -# %bb.37: # %if.then62 + beqz a0, .LBB3_41 +# %bb.38: # %if.then62 # in Loop: Header=BB3_17 Depth=2 - ld a0, 0(s8) + mv a0, s8 + ld s8, 120(sp) # 8-byte Folded Reload + ld a0, 0(a0) addi a1, sp, 128 call subst_ExtractUnifierCom@plt ld a4, 128(sp) mv a0, s0 - mv a1, s10 + mv a1, s4 mv a2, s6 - ld s4, 96(sp) # 8-byte Folded Reload - mv a3, s4 - ld s6, 80(sp) # 8-byte Folded Reload + mv a3, s10 + ld s6, 96(sp) # 8-byte Folded Reload mv a5, s6 mv a6, s9 call inf_EqualityFactoringApplicable - beqz a0, .LBB3_39 -# %bb.38: # %if.then66 + beqz a0, .LBB3_40 +# %bb.39: # %if.then66 # in Loop: Header=BB3_17 Depth=2 ld a5, 128(sp) sext.w a4, s2 mv a0, s0 - mv a1, s4 - ld a2, 112(sp) # 8-byte Folded Reload - mv a3, s10 + mv a1, s10 + mv a2, s3 + mv a3, s4 mv a6, s6 mv a7, s9 call inf_ApplyEqualityFactoring @@ -1139,31 +1153,30 @@ li a0, 16 call memory_Malloc@plt sd s9, 8(a0) - ld s9, 64(sp) # 8-byte Folded Reload - ld a1, 120(sp) # 8-byte Folded Reload - sd a1, 0(a0) + ld s9, 72(sp) # 8-byte Folded Reload + sd s8, 0(a0) sd a0, 120(sp) # 8-byte Folded Spill -.LBB3_39: # %if.end69 +.LBB3_40: # %if.end69 # in Loop: Header=BB3_17 Depth=2 ld a0, 128(sp) call subst_Delete@plt addi a0, sp, 144 vl1r.v v8, (a0) # Unknown-size Folded Reload - ld s6, 88(sp) # 8-byte Folded Reload + ld s8, 80(sp) # 8-byte Folded Reload ld a1, 0(s1) - bnez a1, .LBB3_41 - j .LBB3_43 -.LBB3_40: # in Loop: Header=BB3_17 Depth=2 + bnez a1, .LBB3_42 + j .LBB3_44 +.LBB3_41: # in Loop: Header=BB3_17 Depth=2 addi a0, sp, 144 vl1r.v v8, (a0) # Unknown-size Folded Reload ld a1, 0(s1) - beqz a1, .LBB3_43 -.LBB3_41: # %while.body.preheader.i130 + beqz a1, .LBB3_44 +.LBB3_42: # %while.body.preheader.i130 # in Loop: Header=BB3_17 Depth=2 lw a0, 0(s5) addi a0, a0, -1 vsetivli zero, 4, e32, m1, ta, ma -.LBB3_42: # %while.body.i132 +.LBB3_43: # %while.body.i132 # Parent Loop BB3_8 Depth=1 # Parent Loop BB3_17 Depth=2 # => This Inner Loop Header: Depth=3 @@ -1181,45 +1194,47 @@ sd zero, 24(a2) sw a0, 0(s5) addi a0, a0, -1 - bnez a1, .LBB3_42 -.LBB3_43: # %cont_Reset.exit139 + bnez a1, .LBB3_43 +.LBB3_44: # %cont_Reset.exit139 # in Loop: Header=BB3_17 Depth=2 sw zero, 0(s5) li a0, 1 sw a0, 0(s11) li a0, 2000 - sw a0, 0(s3) + ld a1, 112(sp) # 8-byte Folded Reload + sw a0, 0(a1) call cont_Check@plt - ld s8, 104(sp) # 8-byte Folded Reload ld a0, 0(s8) + ld s6, 104(sp) # 8-byte Folded Reload mv a1, s6 - ld a2, 112(sp) # 8-byte Folded Reload + mv a2, s3 call unify_UnifyCom@plt - beqz a0, .LBB3_47 -# %bb.44: # %if.then74 + beqz a0, .LBB3_48 +# %bb.45: # %if.then74 # in Loop: Header=BB3_17 Depth=2 - ld a0, 0(s8) + mv a1, s8 + ld s8, 120(sp) # 8-byte Folded Reload + ld a0, 0(a1) addi a1, sp, 128 call subst_ExtractUnifierCom@plt ld a4, 128(sp) mv a0, s0 - mv a1, s10 + mv a1, s4 mv a2, s6 - ld s4, 96(sp) # 8-byte Folded Reload - mv a3, s4 - ld s6, 80(sp) # 8-byte Folded Reload + mv a3, s10 + ld s6, 96(sp) # 8-byte Folded Reload mv a5, s6 mv a6, s9 call inf_EqualityFactoringApplicable - beqz a0, .LBB3_46 -# %bb.45: # %if.then78 + beqz a0, .LBB3_47 +# %bb.46: # %if.then78 # in Loop: Header=BB3_17 Depth=2 ld a5, 128(sp) sext.w a4, s2 mv a0, s0 - mv a1, s4 - ld a2, 72(sp) # 8-byte Folded Reload - mv a3, s10 + mv a1, s10 + ld a2, 88(sp) # 8-byte Folded Reload + mv a3, s4 mv a6, s6 mv a7, s9 call inf_ApplyEqualityFactoring @@ -1227,45 +1242,60 @@ li a0, 16 call memory_Malloc@plt sd s6, 8(a0) - ld a1, 120(sp) # 8-byte Folded Reload - sd a1, 0(a0) + sd s8, 0(a0) sd a0, 120(sp) # 8-byte Folded Spill -.LBB3_46: # %if.end81 +.LBB3_47: # %if.end81 # in Loop: Header=BB3_17 Depth=2 + ld s8, 24(sp) # 8-byte Folded Reload ld a0, 128(sp) call subst_Delete@plt - ld s6, 88(sp) # 8-byte Folded Reload -.LBB3_47: # %if.end82 - # in Loop: Header=BB3_17 Depth=2 - ld a1, 0(s1) - addi a0, sp, 144 - vl1r.v v8, (a0) # Unknown-size Folded Reload - beqz a1, .LBB3_14 -# %bb.48: # %while.body.preheader.i143 + ld a0, 0(s1) + addi a1, sp, 144 + vl1r.v v8, (a1) # Unknown-size Folded Reload + bnez a0, .LBB3_49 + j .LBB3_51 +.LBB3_48: # in Loop: Header=BB3_17 Depth=2 + ld s8, 24(sp) # 8-byte Folded Reload + ld a0, 0(s1) + addi a1, sp, 144 + vl1r.v v8, (a1) # Unknown-size Folded Reload + beqz a0, .LBB3_51 +.LBB3_49: # %while.body.preheader.i143 # in Loop: Header=BB3_17 Depth=2 - lw a0, 0(s5) - addi a0, a0, -1 + lw a1, 0(s5) + addi a1, a1, -1 vsetivli zero, 4, e32, m1, ta, ma -.LBB3_49: # %while.body.i145 +.LBB3_50: # %while.body.i145 # Parent Loop BB3_8 Depth=1 # Parent Loop BB3_17 Depth=2 # => This Inner Loop Header: Depth=3 .Lpcrel_hi27: auipc a2, %got_pcrel_hi(cont_CURRENTBINDING) ld a2, %pcrel_lo(.Lpcrel_hi27)(a2) - sd a1, 0(a2) - ld a3, 24(a1) + sd a0, 0(a2) + ld a3, 24(a0) sd a3, 0(s1) - addi a3, a1, 4 - sw zero, 20(a1) + addi a3, a0, 4 + sw zero, 20(a0) vse32.v v8, (a3) ld a2, 0(a2) - ld a1, 0(s1) + ld a0, 0(s1) sd zero, 24(a2) - sw a0, 0(s5) - addi a0, a0, -1 - bnez a1, .LBB3_49 - j .LBB3_14 + sw a1, 0(s5) + addi a1, a1, -1 + bnez a0, .LBB3_50 +.LBB3_51: # %cont_Reset.exit152 + # in Loop: Header=BB3_17 Depth=2 + sw zero, 0(s5) + li a0, 1 + sw a0, 0(s11) + li a0, 2000 + ld a1, 112(sp) # 8-byte Folded Reload + sw a0, 0(a1) + ld s1, 96(sp) # 8-byte Folded Reload + ld s3, 40(sp) # 8-byte Folded Reload + ld s5, 32(sp) # 8-byte Folded Reload + j .LBB3_15 .Lfunc_end3: .size inf_EqualityFactoring, .Lfunc_end3-inf_EqualityFactoring .cfi_endproc @@ -2238,16 +2268,16 @@ .Lpcrel_hi36: auipc a0, %got_pcrel_hi(cont_LASTBINDING) ld a0, %pcrel_lo(.Lpcrel_hi36)(a0) - ld a2, 0(a0) - addi a1, sp, 208 - vl1r.v v8, (a1) # Unknown-size Folded Reload - beqz a2, .LBB6_88 + ld a1, 0(a0) + addi a2, sp, 208 + vl1r.v v8, (a2) # Unknown-size Folded Reload + beqz a1, .LBB6_88 # %bb.86: # %while.body.preheader.i.i.i # in Loop: Header=BB6_72 Depth=5 .Lpcrel_hi37: - auipc a1, %got_pcrel_hi(cont_BINDINGS) - ld a1, %pcrel_lo(.Lpcrel_hi37)(a1) - lw a3, 0(a1) + auipc a2, %got_pcrel_hi(cont_BINDINGS) + ld a2, %pcrel_lo(.Lpcrel_hi37)(a2) + lw a3, 0(a2) addi a3, a3, -1 vsetivli zero, 4, e32, m1, ta, ma .LBB6_87: # %while.body.i.i.i @@ -2260,18 +2290,18 @@ .Lpcrel_hi38: auipc a4, %got_pcrel_hi(cont_CURRENTBINDING) ld a4, %pcrel_lo(.Lpcrel_hi38)(a4) - sd a2, 0(a4) - ld a5, 24(a2) + sd a1, 0(a4) + ld a5, 24(a1) sd a5, 0(a0) - addi a5, a2, 4 - sw zero, 20(a2) + addi a5, a1, 4 + sw zero, 20(a1) vse32.v v8, (a5) ld a4, 0(a4) - ld a2, 0(a0) + ld a1, 0(a0) sd zero, 24(a4) - sw a3, 0(a1) + sw a3, 0(a2) addi a3, a3, -1 - bnez a2, .LBB6_87 + bnez a1, .LBB6_87 .LBB6_88: # %cont_Reset.exit.i.i # in Loop: Header=BB6_72 Depth=5 .Lpcrel_hi39: @@ -2508,9 +2538,9 @@ ld s11, %pcrel_lo(.Lpcrel_hi49)(a0) vsetivli zero, 4, e32, m1, ta, ma vmv.v.i v8, 0 - sd s3, 80(sp) # 8-byte Folded Spill addi a0, sp, 208 vs1r.v v8, (a0) # Unknown-size Folded Spill + sd s3, 80(sp) # 8-byte Folded Spill j .LBB7_3 .LBB7_2: # %if.end102 # in Loop: Header=BB7_3 Depth=1 @@ -2666,16 +2696,16 @@ .Lpcrel_hi50: auipc a0, %got_pcrel_hi(cont_LASTBINDING) ld a0, %pcrel_lo(.Lpcrel_hi50)(a0) - ld a2, 0(a0) - addi a1, sp, 208 - vl1r.v v8, (a1) # Unknown-size Folded Reload - beqz a2, .LBB7_25 + ld a1, 0(a0) + addi a2, sp, 208 + vl1r.v v8, (a2) # Unknown-size Folded Reload + beqz a1, .LBB7_25 # %bb.23: # %while.body.preheader.i # in Loop: Header=BB7_13 Depth=2 .Lpcrel_hi51: - auipc a1, %got_pcrel_hi(cont_BINDINGS) - ld a1, %pcrel_lo(.Lpcrel_hi51)(a1) - lw a3, 0(a1) + auipc a2, %got_pcrel_hi(cont_BINDINGS) + ld a2, %pcrel_lo(.Lpcrel_hi51)(a2) + lw a3, 0(a2) addi a3, a3, -1 vsetivli zero, 4, e32, m1, ta, ma .LBB7_24: # %while.body.i @@ -2685,18 +2715,18 @@ .Lpcrel_hi52: auipc a4, %got_pcrel_hi(cont_CURRENTBINDING) ld a4, %pcrel_lo(.Lpcrel_hi52)(a4) - sd a2, 0(a4) - ld a5, 24(a2) + sd a1, 0(a4) + ld a5, 24(a1) sd a5, 0(a0) - addi a5, a2, 4 - sw zero, 20(a2) + addi a5, a1, 4 + sw zero, 20(a1) vse32.v v8, (a5) ld a4, 0(a4) - ld a2, 0(a0) + ld a1, 0(a0) sd zero, 24(a4) - sw a3, 0(a1) + sw a3, 0(a2) addi a3, a3, -1 - bnez a2, .LBB7_24 + bnez a1, .LBB7_24 .LBB7_25: # %cont_Reset.exit # in Loop: Header=BB7_13 Depth=2 .Lpcrel_hi53: @@ -3356,10 +3386,10 @@ ld s0, %pcrel_lo(.Lpcrel_hi64)(a0) vsetivli zero, 4, e32, m1, ta, ma vmv.v.i v8, 0 - sd s8, 88(sp) # 8-byte Folded Spill - sd s5, 104(sp) # 8-byte Folded Spill addi a0, sp, 144 vs1r.v v8, (a0) # Unknown-size Folded Spill + sd s8, 88(sp) # 8-byte Folded Spill + sd s5, 104(sp) # 8-byte Folded Spill j .LBB9_6 .LBB9_5: # %if.end89 # in Loop: Header=BB9_6 Depth=1 @@ -3512,16 +3542,16 @@ .Lpcrel_hi65: auipc a0, %got_pcrel_hi(cont_LASTBINDING) ld a0, %pcrel_lo(.Lpcrel_hi65)(a0) - ld a2, 0(a0) - addi a1, sp, 144 - vl1r.v v8, (a1) # Unknown-size Folded Reload - beqz a2, .LBB9_25 + ld a1, 0(a0) + addi a2, sp, 144 + vl1r.v v8, (a2) # Unknown-size Folded Reload + beqz a1, .LBB9_25 # %bb.23: # %while.body.preheader.i # in Loop: Header=BB9_13 Depth=2 .Lpcrel_hi66: - auipc a1, %got_pcrel_hi(cont_BINDINGS) - ld a1, %pcrel_lo(.Lpcrel_hi66)(a1) - lw a3, 0(a1) + auipc a2, %got_pcrel_hi(cont_BINDINGS) + ld a2, %pcrel_lo(.Lpcrel_hi66)(a2) + lw a3, 0(a2) addi a3, a3, -1 vsetivli zero, 4, e32, m1, ta, ma .LBB9_24: # %while.body.i @@ -3531,18 +3561,18 @@ .Lpcrel_hi67: auipc a4, %got_pcrel_hi(cont_CURRENTBINDING) ld a4, %pcrel_lo(.Lpcrel_hi67)(a4) - sd a2, 0(a4) - ld a5, 24(a2) + sd a1, 0(a4) + ld a5, 24(a1) sd a5, 0(a0) - addi a5, a2, 4 - sw zero, 20(a2) + addi a5, a1, 4 + sw zero, 20(a1) vse32.v v8, (a5) ld a4, 0(a4) - ld a2, 0(a0) + ld a1, 0(a0) sd zero, 24(a4) - sw a3, 0(a1) + sw a3, 0(a2) addi a3, a3, -1 - bnez a2, .LBB9_24 + bnez a1, .LBB9_24 .LBB9_25: # %cont_Reset.exit # in Loop: Header=BB9_13 Depth=2 .Lpcrel_hi68: @@ -3836,10 +3866,10 @@ ld s8, %pcrel_lo(.Lpcrel_hi77)(a1) vsetivli zero, 4, e32, m1, ta, ma vmv.v.i v8, 0 - ld s2, 112(sp) # 8-byte Folded Reload - sd s4, 24(sp) # 8-byte Folded Spill addi a1, sp, 160 vs1r.v v8, (a1) # Unknown-size Folded Spill + ld s2, 112(sp) # 8-byte Folded Reload + sd s4, 24(sp) # 8-byte Folded Spill j .LBB10_9 .LBB10_8: # %while.cond.loopexit # in Loop: Header=BB10_9 Depth=1 @@ -4019,16 +4049,16 @@ .Lpcrel_hi79: auipc a0, %got_pcrel_hi(cont_LASTBINDING) ld a0, %pcrel_lo(.Lpcrel_hi79)(a0) - ld a2, 0(a0) - addi a1, sp, 160 - vl1r.v v8, (a1) # Unknown-size Folded Reload - beqz a2, .LBB10_32 + ld a1, 0(a0) + addi a2, sp, 160 + vl1r.v v8, (a2) # Unknown-size Folded Reload + beqz a1, .LBB10_32 # %bb.30: # %while.body.preheader.i # in Loop: Header=BB10_19 Depth=4 .Lpcrel_hi80: - auipc a1, %got_pcrel_hi(cont_BINDINGS) - ld a1, %pcrel_lo(.Lpcrel_hi80)(a1) - lw a3, 0(a1) + auipc a2, %got_pcrel_hi(cont_BINDINGS) + ld a2, %pcrel_lo(.Lpcrel_hi80)(a2) + lw a3, 0(a2) addi a3, a3, -1 vsetivli zero, 4, e32, m1, ta, ma .LBB10_31: # %while.body.i @@ -4040,18 +4070,18 @@ .Lpcrel_hi81: auipc a4, %got_pcrel_hi(cont_CURRENTBINDING) ld a4, %pcrel_lo(.Lpcrel_hi81)(a4) - sd a2, 0(a4) - ld a5, 24(a2) + sd a1, 0(a4) + ld a5, 24(a1) sd a5, 0(a0) - addi a5, a2, 4 - sw zero, 20(a2) + addi a5, a1, 4 + sw zero, 20(a1) vse32.v v8, (a5) ld a4, 0(a4) - ld a2, 0(a0) + ld a1, 0(a0) sd zero, 24(a4) - sw a3, 0(a1) + sw a3, 0(a2) addi a3, a3, -1 - bnez a2, .LBB10_31 + bnez a1, .LBB10_31 .LBB10_32: # %cont_Reset.exit # in Loop: Header=BB10_19 Depth=4 .Lpcrel_hi82: @@ -4231,8 +4261,8 @@ slli a6, a6, 1 sub sp, sp, a6 .cfi_escape 0x0f, 0x0e, 0x72, 0x00, 0x11, 0x80, 0x02, 0x22, 0x11, 0x02, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 256 + 2 * vlenb - sd a5, 96(sp) # 8-byte Folded Spill - sd a4, 88(sp) # 8-byte Folded Spill + sd a5, 104(sp) # 8-byte Folded Spill + sd a4, 96(sp) # 8-byte Folded Spill mv s0, a3 sd a2, 32(sp) # 8-byte Folded Spill sd a1, 40(sp) # 8-byte Folded Spill @@ -4242,22 +4272,22 @@ # %bb.1: # %if.end mv a0, s1 call clause_Copy@plt - mv a5, a0 + mv s6, a0 lbu a1, 48(a0) - lw a6, 64(a0) + lw a5, 64(a0) lw a0, 68(a0) andi a1, a1, 2 bnez a1, .LBB11_65 # %bb.2: # %if.else - lw a1, 72(a5) - add a0, a6, a0 + lw a1, 72(s6) + add a0, a5, a0 add a0, a0, a1 addiw a0, a0, -1 - blt a0, a6, .LBB11_66 + blt a0, a5, .LBB11_66 .LBB11_3: # %for.body.lr.ph sd s1, 72(sp) # 8-byte Folded Spill - sd zero, 104(sp) # 8-byte Folded Spill - addiw a7, a0, 1 + sd zero, 112(sp) # 8-byte Folded Spill + addiw a6, a0, 1 .Lpcrel_hi85: auipc a0, %got_pcrel_hi(fol_NOT) ld s1, %pcrel_lo(.Lpcrel_hi85)(a0) @@ -4267,28 +4297,27 @@ sd a0, 48(sp) # 8-byte Folded Spill .Lpcrel_hi87: auipc a0, %got_pcrel_hi(cont_LEFTCONTEXT) - ld s9, %pcrel_lo(.Lpcrel_hi87)(a0) + ld a0, %pcrel_lo(.Lpcrel_hi87)(a0) + sd a0, 80(sp) # 8-byte Folded Spill .Lpcrel_hi88: auipc a0, %got_pcrel_hi(cont_RIGHTCONTEXT) ld s7, %pcrel_lo(.Lpcrel_hi88)(a0) vsetivli zero, 4, e32, m1, ta, ma vmv.v.i v8, 0 - sd s0, 24(sp) # 8-byte Folded Spill - sd a5, 112(sp) # 8-byte Folded Spill - sd a7, 16(sp) # 8-byte Folded Spill addi a0, sp, 144 vs1r.v v8, (a0) # Unknown-size Folded Spill + sd s0, 24(sp) # 8-byte Folded Spill + sd a6, 16(sp) # 8-byte Folded Spill j .LBB11_6 .LBB11_4: # in Loop: Header=BB11_6 Depth=1 ld s0, 24(sp) # 8-byte Folded Reload - ld a5, 112(sp) # 8-byte Folded Reload - ld a6, 64(sp) # 8-byte Folded Reload - ld a7, 16(sp) # 8-byte Folded Reload + ld a5, 64(sp) # 8-byte Folded Reload + ld a6, 16(sp) # 8-byte Folded Reload .LBB11_5: # %for.inc135 # in Loop: Header=BB11_6 Depth=1 - addiw a0, a6, 1 - addi a6, a6, 1 - beq a7, a0, .LBB11_67 + addiw a0, a5, 1 + addi a5, a5, 1 + beq a6, a0, .LBB11_67 .LBB11_6: # %for.body # =>This Loop Header: Depth=1 # Child Loop BB11_16 Depth 2 @@ -4298,28 +4327,24 @@ # Child Loop BB11_30 Depth 5 # Child Loop BB11_37 Depth 5 # Child Loop BB11_51 Depth 5 - ld a0, 56(a5) - slli a1, a6, 3 + ld a0, 56(s6) + slli a1, a5, 3 add a0, a0, a1 ld s8, 0(a0) - ld a2, 24(s8) - lw a0, 0(a2) + ld a3, 24(s8) + lw a0, 0(a3) lw a1, 0(s1) bne a1, a0, .LBB11_8 # %bb.7: # %if.then.i # in Loop: Header=BB11_6 Depth=1 - ld a0, 16(a2) - ld a0, 8(a0) - sd a0, 80(sp) # 8-byte Folded Spill - bnez s0, .LBB11_10 - j .LBB11_9 -.LBB11_8: # in Loop: Header=BB11_6 Depth=1 - sd a2, 80(sp) # 8-byte Folded Spill + ld a0, 16(a3) + ld a3, 8(a0) +.LBB11_8: # %clause_LiteralAtom.exit + # in Loop: Header=BB11_6 Depth=1 bnez s0, .LBB11_10 -.LBB11_9: # %lor.lhs.false +# %bb.9: # %lor.lhs.false # in Loop: Header=BB11_6 Depth=1 - ld a0, 80(sp) # 8-byte Folded Reload - lw a0, 0(a0) + lw a0, 0(a3) ld a1, 48(sp) # 8-byte Folded Reload lw a1, 0(a1) beq a1, a0, .LBB11_5 @@ -4330,7 +4355,7 @@ bnez a1, .LBB11_14 # %bb.11: # %lor.lhs.false18 # in Loop: Header=BB11_6 Depth=1 - lbu a1, 48(a5) + lbu a1, 48(s6) andi a1, a1, 2 bnez a1, .LBB11_5 # %bb.12: # %land.lhs.true21 @@ -4349,40 +4374,41 @@ .LBB11_15: # %lor.lhs.false28 # in Loop: Header=BB11_6 Depth=1 ld a2, 16(s8) - ld a3, 56(a2) + ld a7, 56(a2) li a1, -1 .LBB11_16: # %while.cond.i.i # Parent Loop BB11_6 Depth=1 # => This Inner Loop Header: Depth=2 - ld a4, 0(a3) + ld a4, 0(a7) addiw a1, a1, 1 - addi a3, a3, 8 + addi a7, a7, 8 bne a4, s8, .LBB11_16 # %bb.17: # %clause_LiteralIsFromAntecedent.exit # in Loop: Header=BB11_6 Depth=1 - lw a3, 64(a2) + lw a4, 64(a2) lw a2, 68(a2) - add a2, a3, a2 + add a2, a4, a2 addiw a2, a2, -1 slt a2, a2, a1 - slt a1, a1, a3 + slt a1, a1, a4 or a1, a1, a2 andi a0, a0, 2 seqz a0, a0 and a0, a0, a1 bnez a0, .LBB11_5 # %bb.18: # in Loop: Header=BB11_6 Depth=1 - sd a6, 64(sp) # 8-byte Folded Spill - li s6, 0 + sd a5, 64(sp) # 8-byte Folded Spill + li s9, 0 j .LBB11_20 .LBB11_19: # in Loop: Header=BB11_6 Depth=1 - sd a6, 64(sp) # 8-byte Folded Spill - li s6, 1 + sd a5, 64(sp) # 8-byte Folded Spill + li s9, 1 .LBB11_20: # %if.then34 # in Loop: Header=BB11_6 Depth=1 li a0, 1 sd a0, 56(sp) # 8-byte Folded Spill ld s0, 80(sp) # 8-byte Folded Reload + sd a3, 88(sp) # 8-byte Folded Spill .LBB11_21: # %while.cond # Parent Loop BB11_6 Depth=1 # => This Loop Header: Depth=2 @@ -4391,11 +4417,10 @@ # Child Loop BB11_30 Depth 5 # Child Loop BB11_37 Depth 5 # Child Loop BB11_51 Depth 5 - ld a0, 0(s9) + ld a0, 0(s0) ld a1, 40(sp) # 8-byte Folded Reload ld a1, 0(a1) ld a2, 0(s7) - mv a3, s0 call st_GetUnifier@plt beqz a0, .LBB11_62 # %bb.22: # %for.body42.preheader @@ -4443,7 +4468,7 @@ mv s3, a0 j .LBB11_29 .LBB11_27: # in Loop: Header=BB11_29 Depth=4 - li s6, 0 + li s9, 0 .LBB11_28: # %for.inc # in Loop: Header=BB11_29 Depth=4 ld s3, 0(s3) @@ -4538,7 +4563,7 @@ bnez a3, .LBB11_28 # %bb.41: # %land.lhs.true73 # in Loop: Header=BB11_29 Depth=4 - andi a3, s6, 1 + andi a3, s9, 1 bnez a3, .LBB11_46 # %bb.42: # %lor.lhs.false75 # in Loop: Header=BB11_29 Depth=4 @@ -4557,7 +4582,7 @@ xor a3, a1, a0 seqz a3, a3 srli a2, a2, 1 - or a3, a3, s6 + or a3, a3, s9 or a2, a3, a2 andi a2, a2, 1 beqz a2, .LBB11_27 @@ -4573,18 +4598,18 @@ .LBB11_48: # %if.then93 # in Loop: Header=BB11_29 Depth=4 lw a1, 52(s4) - ld a0, 112(sp) # 8-byte Folded Reload + mv a0, s6 call clause_RenameVarsBiggerThan@plt call cont_Check@plt - ld a0, 0(s9) + ld a0, 0(s0) ld a2, 0(s7) - mv a1, s0 + ld a1, 88(sp) # 8-byte Folded Reload mv a3, s11 call unify_UnifyNoOC@plt beqz a0, .LBB11_69 # %bb.49: # %if.end103 # in Loop: Header=BB11_29 Depth=4 - ld a0, 0(s9) + ld a0, 0(s0) ld a2, 0(s7) addi a1, sp, 128 addi a3, sp, 120 @@ -4592,16 +4617,16 @@ .Lpcrel_hi96: auipc a0, %got_pcrel_hi(cont_LASTBINDING) ld a0, %pcrel_lo(.Lpcrel_hi96)(a0) - ld a2, 0(a0) - addi a1, sp, 144 - vl1r.v v8, (a1) # Unknown-size Folded Reload - beqz a2, .LBB11_52 + ld a1, 0(a0) + addi a2, sp, 144 + vl1r.v v8, (a2) # Unknown-size Folded Reload + beqz a1, .LBB11_52 # %bb.50: # %while.body.preheader.i # in Loop: Header=BB11_29 Depth=4 .Lpcrel_hi97: - auipc a1, %got_pcrel_hi(cont_BINDINGS) - ld a1, %pcrel_lo(.Lpcrel_hi97)(a1) - lw a3, 0(a1) + auipc a2, %got_pcrel_hi(cont_BINDINGS) + ld a2, %pcrel_lo(.Lpcrel_hi97)(a2) + lw a3, 0(a2) addi a3, a3, -1 vsetivli zero, 4, e32, m1, ta, ma .LBB11_51: # %while.body.i @@ -4613,18 +4638,18 @@ .Lpcrel_hi98: auipc a4, %got_pcrel_hi(cont_CURRENTBINDING) ld a4, %pcrel_lo(.Lpcrel_hi98)(a4) - sd a2, 0(a4) - ld a5, 24(a2) + sd a1, 0(a4) + ld a5, 24(a1) sd a5, 0(a0) - addi a5, a2, 4 - sw zero, 20(a2) + addi a5, a1, 4 + sw zero, 20(a1) vse32.v v8, (a5) ld a4, 0(a4) - ld a2, 0(a0) + ld a1, 0(a0) sd zero, 24(a4) - sw a3, 0(a1) + sw a3, 0(a2) addi a3, a3, -1 - bnez a2, .LBB11_51 + bnez a1, .LBB11_51 .LBB11_52: # %cont_Reset.exit # in Loop: Header=BB11_29 Depth=4 .Lpcrel_hi99: @@ -4639,31 +4664,30 @@ sw zero, 0(a0) li a0, 1 sw a0, 0(a1) - andi a0, s6, 1 + andi a0, s9, 1 li a1, 2000 sw a1, 0(a2) bnez a0, .LBB11_57 # %bb.53: # %lor.lhs.false107 # in Loop: Header=BB11_29 Depth=4 - ld a0, 112(sp) # 8-byte Folded Reload - lbu a0, 48(a0) + lbu a0, 48(s6) ld s0, 120(sp) andi a0, a0, 2 bnez a0, .LBB11_55 # %bb.54: # %land.lhs.true.i130 # in Loop: Header=BB11_29 Depth=4 - ld a0, 112(sp) # 8-byte Folded Reload - lw a2, 64(a0) - lw a1, 68(a0) + lw a0, 64(s6) + lw a1, 68(s6) ld a3, 128(sp) - add a1, a2, a1 - addiw a1, a1, -1 - ld a2, 64(sp) # 8-byte Folded Reload - slt a4, a1, a2 - sext.w a1, a2 + add a0, a0, a1 + addiw a0, a0, -1 + ld a1, 64(sp) # 8-byte Folded Reload + slt a4, a0, a1 + sext.w a1, a1 li a2, -1 - ld a5, 88(sp) # 8-byte Folded Reload - ld a6, 96(sp) # 8-byte Folded Reload + mv a0, s6 + ld a5, 96(sp) # 8-byte Folded Reload + ld a6, 104(sp) # 8-byte Folded Reload call inf_LitMax beqz a0, .LBB11_61 .LBB11_55: # %if.end.i @@ -4682,8 +4706,8 @@ mv a0, s4 mv a1, s5 mv a3, s0 - ld a5, 88(sp) # 8-byte Folded Reload - ld a6, 96(sp) # 8-byte Folded Reload + ld a5, 96(sp) # 8-byte Folded Reload + ld a6, 104(sp) # 8-byte Folded Reload call inf_LitMax beqz a0, .LBB11_61 .LBB11_57: # %if.then110 @@ -4707,16 +4731,16 @@ mv a1, s8 .LBB11_60: # %if.end120.sink.split # in Loop: Header=BB11_29 Depth=4 - ld a4, 88(sp) # 8-byte Folded Reload - ld a5, 96(sp) # 8-byte Folded Reload + ld a4, 96(sp) # 8-byte Folded Reload + ld a5, 104(sp) # 8-byte Folded Reload call inf_ApplyGenRes mv s0, a0 li a0, 16 call memory_Malloc@plt sd s0, 8(a0) - ld a1, 104(sp) # 8-byte Folded Reload + ld a1, 112(sp) # 8-byte Folded Reload sd a1, 0(a0) - sd a0, 104(sp) # 8-byte Folded Spill + sd a0, 112(sp) # 8-byte Folded Spill .LBB11_61: # %if.end120 # in Loop: Header=BB11_29 Depth=4 ld a0, 128(sp) @@ -4732,32 +4756,33 @@ beqz a0, .LBB11_4 # %bb.63: # %land.lhs.true128 # in Loop: Header=BB11_21 Depth=2 - lw a0, 0(s0) + ld a3, 88(sp) # 8-byte Folded Reload + lw a0, 0(a3) ld a1, 48(sp) # 8-byte Folded Reload lw a1, 0(a1) bne a1, a0, .LBB11_4 # %bb.64: # %if.then131 # in Loop: Header=BB11_21 Depth=2 - ld a0, 16(s0) + ld a0, 16(a3) ld a1, 0(a0) ld a1, 8(a1) ld a2, 8(a0) sd a1, 8(a0) - ld a0, 16(s0) + ld a0, 16(a3) ld a0, 0(a0) sd zero, 56(sp) # 8-byte Folded Spill sd a2, 8(a0) j .LBB11_21 .LBB11_65: # %if.then6 - add a0, a6, a0 + add a0, a5, a0 addiw a0, a0, -1 - bge a0, a6, .LBB11_3 + bge a0, a5, .LBB11_3 .LBB11_66: - sd zero, 104(sp) # 8-byte Folded Spill + sd zero, 112(sp) # 8-byte Folded Spill .LBB11_67: # %for.end136 - mv a0, a5 + mv a0, s6 call clause_Delete@plt - ld a0, 104(sp) # 8-byte Folded Reload + ld a0, 112(sp) # 8-byte Folded Reload .LBB11_68: # %cleanup csrr a1, vlenb slli a1, a1, 1 @@ -5317,9 +5342,9 @@ li s7, 1 vsetivli zero, 4, e32, m1, ta, ma vmv.v.i v8, 0 - mv a2, a5 addi a0, sp, 128 vs1r.v v8, (a0) # Unknown-size Folded Spill + mv a2, a5 j .LBB13_9 .LBB13_7: # in Loop: Header=BB13_9 Depth=1 ld a2, 40(sp) # 8-byte Folded Reload @@ -5564,16 +5589,16 @@ .Lpcrel_hi115: auipc a0, %got_pcrel_hi(cont_LASTBINDING) ld a0, %pcrel_lo(.Lpcrel_hi115)(a0) - ld a2, 0(a0) - addi a1, sp, 128 - vl1r.v v8, (a1) # Unknown-size Folded Reload - beqz a2, .LBB13_41 + ld a1, 0(a0) + addi a2, sp, 128 + vl1r.v v8, (a2) # Unknown-size Folded Reload + beqz a1, .LBB13_41 # %bb.39: # %while.body.preheader.i # in Loop: Header=BB13_25 Depth=4 .Lpcrel_hi116: - auipc a1, %got_pcrel_hi(cont_BINDINGS) - ld a1, %pcrel_lo(.Lpcrel_hi116)(a1) - lw a3, 0(a1) + auipc a2, %got_pcrel_hi(cont_BINDINGS) + ld a2, %pcrel_lo(.Lpcrel_hi116)(a2) + lw a3, 0(a2) addi a3, a3, -1 vsetivli zero, 4, e32, m1, ta, ma .LBB13_40: # %while.body.i @@ -5585,18 +5610,18 @@ .Lpcrel_hi117: auipc a4, %got_pcrel_hi(cont_CURRENTBINDING) ld a4, %pcrel_lo(.Lpcrel_hi117)(a4) - sd a2, 0(a4) - ld a5, 24(a2) + sd a1, 0(a4) + ld a5, 24(a1) sd a5, 0(a0) - addi a5, a2, 4 - sw zero, 20(a2) + addi a5, a1, 4 + sw zero, 20(a1) vse32.v v8, (a5) ld a4, 0(a4) - ld a2, 0(a0) + ld a1, 0(a0) sd zero, 24(a4) - sw a3, 0(a1) + sw a3, 0(a2) addi a3, a3, -1 - bnez a2, .LBB13_40 + bnez a1, .LBB13_40 .LBB13_41: # %cont_Reset.exit # in Loop: Header=BB13_25 Depth=4 .Lpcrel_hi118: @@ -5965,16 +5990,16 @@ .Lpcrel_hi134: auipc a0, %got_pcrel_hi(cont_LASTBINDING) ld a0, %pcrel_lo(.Lpcrel_hi134)(a0) - ld a2, 0(a0) - addi a1, sp, 128 - vl1r.v v8, (a1) # Unknown-size Folded Reload - beqz a2, .LBB14_28 + ld a1, 0(a0) + addi a2, sp, 128 + vl1r.v v8, (a2) # Unknown-size Folded Reload + beqz a1, .LBB14_28 # %bb.26: # %while.body.preheader.i # in Loop: Header=BB14_15 Depth=4 .Lpcrel_hi135: - auipc a1, %got_pcrel_hi(cont_BINDINGS) - ld a1, %pcrel_lo(.Lpcrel_hi135)(a1) - lw a3, 0(a1) + auipc a2, %got_pcrel_hi(cont_BINDINGS) + ld a2, %pcrel_lo(.Lpcrel_hi135)(a2) + lw a3, 0(a2) addi a3, a3, -1 vsetivli zero, 4, e32, m1, ta, ma .LBB14_27: # %while.body.i @@ -5986,18 +6011,18 @@ .Lpcrel_hi136: auipc a4, %got_pcrel_hi(cont_CURRENTBINDING) ld a4, %pcrel_lo(.Lpcrel_hi136)(a4) - sd a2, 0(a4) - ld a5, 24(a2) + sd a1, 0(a4) + ld a5, 24(a1) sd a5, 0(a0) - addi a5, a2, 4 - sw zero, 20(a2) + addi a5, a1, 4 + sw zero, 20(a1) vse32.v v8, (a5) ld a4, 0(a4) - ld a2, 0(a0) + ld a1, 0(a0) sd zero, 24(a4) - sw a3, 0(a1) + sw a3, 0(a2) addi a3, a3, -1 - bnez a2, .LBB14_27 + bnez a1, .LBB14_27 .LBB14_28: # %cont_Reset.exit # in Loop: Header=BB14_15 Depth=4 .Lpcrel_hi137: @@ -6417,14 +6442,14 @@ call subst_Delete@plt .LBB15_33: # %if.end49 # in Loop: Header=BB15_21 Depth=2 - ld a1, 0(s5) - addi a0, sp, 112 - vl1r.v v8, (a0) # Unknown-size Folded Reload - beqz a1, .LBB15_36 + ld a0, 0(s5) + addi a1, sp, 112 + vl1r.v v8, (a1) # Unknown-size Folded Reload + beqz a0, .LBB15_36 # %bb.34: # %while.body.preheader.i # in Loop: Header=BB15_21 Depth=2 - lw a0, 0(s6) - addi a0, a0, -1 + lw a1, 0(s6) + addi a1, a1, -1 vsetivli zero, 4, e32, m1, ta, ma .LBB15_35: # %while.body.i # Parent Loop BB15_9 Depth=1 @@ -6433,18 +6458,18 @@ .Lpcrel_hi148: auipc a2, %got_pcrel_hi(cont_CURRENTBINDING) ld a2, %pcrel_lo(.Lpcrel_hi148)(a2) - sd a1, 0(a2) - ld a3, 24(a1) + sd a0, 0(a2) + ld a3, 24(a0) sd a3, 0(s5) - addi a3, a1, 4 - sw zero, 20(a1) + addi a3, a0, 4 + sw zero, 20(a0) vse32.v v8, (a3) ld a2, 0(a2) - ld a1, 0(s5) + ld a0, 0(s5) sd zero, 24(a2) - sw a0, 0(s6) - addi a0, a0, -1 - bnez a1, .LBB15_35 + sw a1, 0(s6) + addi a1, a1, -1 + bnez a0, .LBB15_35 .LBB15_36: # %cont_Reset.exit # in Loop: Header=BB15_21 Depth=2 .Lpcrel_hi149: @@ -6763,14 +6788,14 @@ call subst_Delete@plt .LBB15_78: # %if.end150 # in Loop: Header=BB15_62 Depth=2 - ld a1, 0(s1) - addi a0, sp, 112 - vl1r.v v8, (a0) # Unknown-size Folded Reload - beqz a1, .LBB15_81 + ld a0, 0(s1) + addi a1, sp, 112 + vl1r.v v8, (a1) # Unknown-size Folded Reload + beqz a0, .LBB15_81 # %bb.79: # %while.body.preheader.i227 # in Loop: Header=BB15_62 Depth=2 - lw a0, 0(s5) - addi a0, a0, -1 + lw a1, 0(s5) + addi a1, a1, -1 vsetivli zero, 4, e32, m1, ta, ma .LBB15_80: # %while.body.i229 # Parent Loop BB15_49 Depth=1 @@ -6779,18 +6804,18 @@ .Lpcrel_hi156: auipc a2, %got_pcrel_hi(cont_CURRENTBINDING) ld a2, %pcrel_lo(.Lpcrel_hi156)(a2) - sd a1, 0(a2) - ld a3, 24(a1) + sd a0, 0(a2) + ld a3, 24(a0) sd a3, 0(s1) - addi a3, a1, 4 - sw zero, 20(a1) + addi a3, a0, 4 + sw zero, 20(a0) vse32.v v8, (a3) ld a2, 0(a2) - ld a1, 0(s1) + ld a0, 0(s1) sd zero, 24(a2) - sw a0, 0(s5) - addi a0, a0, -1 - bnez a1, .LBB15_80 + sw a1, 0(s5) + addi a1, a1, -1 + bnez a0, .LBB15_80 .LBB15_81: # %cont_Reset.exit236 # in Loop: Header=BB15_62 Depth=2 .Lpcrel_hi157: @@ -6874,14 +6899,16 @@ mv s2, s0 ld a0, 96(sp) call subst_Delete@plt + addi a0, sp, 112 + vl1r.v v8, (a0) # Unknown-size Folded Reload j .LBB15_90 .LBB15_89: # in Loop: Header=BB15_62 Depth=2 + addi a0, sp, 112 + vl1r.v v8, (a0) # Unknown-size Folded Reload mv s2, s0 .LBB15_90: # %if.end179 # in Loop: Header=BB15_62 Depth=2 li s0, 1 - addi a0, sp, 112 - vl1r.v v8, (a0) # Unknown-size Folded Reload .LBB15_91: # %if.end179 # in Loop: Header=BB15_62 Depth=2 ld a1, 0(s1) @@ -7303,10 +7330,10 @@ sd a0, 120(sp) # 8-byte Folded Spill vsetivli zero, 4, e32, m1, ta, ma vmv.v.i v8, 0 - sd s2, 56(sp) # 8-byte Folded Spill - sd s9, 96(sp) # 8-byte Folded Spill addi a0, sp, 208 vs1r.v v8, (a0) # Unknown-size Folded Spill + sd s2, 56(sp) # 8-byte Folded Spill + sd s9, 96(sp) # 8-byte Folded Spill sd s4, 104(sp) # 8-byte Folded Spill j .LBB17_34 .LBB17_32: # in Loop: Header=BB17_34 Depth=1 @@ -7659,16 +7686,16 @@ .Lpcrel_hi172: auipc a0, %got_pcrel_hi(cont_LASTBINDING) ld a0, %pcrel_lo(.Lpcrel_hi172)(a0) - ld a2, 0(a0) - addi a1, sp, 208 - vl1r.v v8, (a1) # Unknown-size Folded Reload - beqz a2, .LBB17_81 + ld a1, 0(a0) + addi a2, sp, 208 + vl1r.v v8, (a2) # Unknown-size Folded Reload + beqz a1, .LBB17_81 # %bb.79: # %while.body.preheader.i.i.i # in Loop: Header=BB17_63 Depth=5 .Lpcrel_hi173: - auipc a1, %got_pcrel_hi(cont_BINDINGS) - ld a1, %pcrel_lo(.Lpcrel_hi173)(a1) - lw a3, 0(a1) + auipc a2, %got_pcrel_hi(cont_BINDINGS) + ld a2, %pcrel_lo(.Lpcrel_hi173)(a2) + lw a3, 0(a2) addi a3, a3, -1 vsetivli zero, 4, e32, m1, ta, ma .LBB17_80: # %while.body.i.i.i @@ -7681,18 +7708,18 @@ .Lpcrel_hi174: auipc a4, %got_pcrel_hi(cont_CURRENTBINDING) ld a4, %pcrel_lo(.Lpcrel_hi174)(a4) - sd a2, 0(a4) - ld a5, 24(a2) + sd a1, 0(a4) + ld a5, 24(a1) sd a5, 0(a0) - addi a5, a2, 4 - sw zero, 20(a2) + addi a5, a1, 4 + sw zero, 20(a1) vse32.v v8, (a5) ld a4, 0(a4) - ld a2, 0(a0) + ld a1, 0(a0) sd zero, 24(a4) - sw a3, 0(a1) + sw a3, 0(a2) addi a3, a3, -1 - bnez a2, .LBB17_80 + bnez a1, .LBB17_80 .LBB17_81: # %cont_Reset.exit.i.i # in Loop: Header=BB17_63 Depth=5 .Lpcrel_hi175: @@ -7928,7 +7955,7 @@ sd a6, 176(sp) # 8-byte Folded Spill sd a5, 128(sp) # 8-byte Folded Spill mv s0, a3 - sd a2, 88(sp) # 8-byte Folded Spill + sd a2, 80(sp) # 8-byte Folded Spill mv a3, a1 mv s11, a0 mv a0, t4 @@ -7936,7 +7963,7 @@ mv a2, t1 sd a3, 160(sp) # 8-byte Folded Spill call st_GetUnifier@plt - beqz a0, .LBB18_59 + beqz a0, .LBB18_62 # %bb.1: # %for.body.lr.ph mv s9, a0 .Lpcrel_hi182: @@ -7959,9 +7986,9 @@ ld s3, %pcrel_lo(.Lpcrel_hi185)(a0) vsetivli zero, 4, e32, m1, ta, ma vmv.v.i v8, 0 - sd s11, 80(sp) # 8-byte Folded Spill addi a0, sp, 208 vs1r.v v8, (a0) # Unknown-size Folded Spill + sd s11, 88(sp) # 8-byte Folded Spill j .LBB18_3 .LBB18_2: # %if.end105 # in Loop: Header=BB18_3 Depth=1 @@ -7976,7 +8003,7 @@ ld a0, 128(s8) sd s9, 0(a0) mv s9, a3 - beqz a3, .LBB18_60 + beqz a3, .LBB18_63 .LBB18_3: # %for.body # =>This Loop Header: Depth=1 # Child Loop BB18_13 Depth 2 @@ -8007,7 +8034,7 @@ j .LBB18_13 .LBB18_8: # in Loop: Header=BB18_13 Depth=2 sd s4, 136(sp) # 8-byte Folded Spill - ld s11, 80(sp) # 8-byte Folded Reload + ld s11, 88(sp) # 8-byte Folded Reload ld s5, 152(sp) # 8-byte Folded Reload .LBB18_9: # %if.then100 # in Loop: Header=BB18_13 Depth=2 @@ -8124,16 +8151,16 @@ .Lpcrel_hi186: auipc a0, %got_pcrel_hi(cont_LASTBINDING) ld a0, %pcrel_lo(.Lpcrel_hi186)(a0) - ld a2, 0(a0) - addi a1, sp, 208 - vl1r.v v8, (a1) # Unknown-size Folded Reload - beqz a2, .LBB18_27 + ld a1, 0(a0) + addi a2, sp, 208 + vl1r.v v8, (a2) # Unknown-size Folded Reload + beqz a1, .LBB18_27 # %bb.25: # %while.body.preheader.i # in Loop: Header=BB18_13 Depth=2 .Lpcrel_hi187: - auipc a1, %got_pcrel_hi(cont_BINDINGS) - ld a1, %pcrel_lo(.Lpcrel_hi187)(a1) - lw a3, 0(a1) + auipc a2, %got_pcrel_hi(cont_BINDINGS) + ld a2, %pcrel_lo(.Lpcrel_hi187)(a2) + lw a3, 0(a2) addi a3, a3, -1 vsetivli zero, 4, e32, m1, ta, ma .LBB18_26: # %while.body.i @@ -8143,18 +8170,18 @@ .Lpcrel_hi188: auipc a4, %got_pcrel_hi(cont_CURRENTBINDING) ld a4, %pcrel_lo(.Lpcrel_hi188)(a4) - sd a2, 0(a4) - ld a5, 24(a2) + sd a1, 0(a4) + ld a5, 24(a1) sd a5, 0(a0) - addi a5, a2, 4 - sw zero, 20(a2) + addi a5, a1, 4 + sw zero, 20(a1) vse32.v v8, (a5) ld a4, 0(a4) - ld a2, 0(a0) + ld a1, 0(a0) sd zero, 24(a4) - sw a3, 0(a1) + sw a3, 0(a2) addi a3, a3, -1 - bnez a2, .LBB18_26 + bnez a1, .LBB18_26 .LBB18_27: # %cont_Reset.exit # in Loop: Header=BB18_13 Depth=2 .Lpcrel_hi189: @@ -8217,7 +8244,7 @@ .LBB18_32: # %if.then51 # in Loop: Header=BB18_13 Depth=2 ld s2, 192(sp) - ld a0, 88(sp) # 8-byte Folded Reload + ld a0, 80(sp) # 8-byte Folded Reload call term_Copy@plt mv a1, a0 mv a0, s2 @@ -8234,14 +8261,14 @@ add a0, a0, a1 ld a0, 0(a0) lw a0, 8(a0) - beqz a0, .LBB18_47 + beqz a0, .LBB18_46 .LBB18_34: # in Loop: Header=BB18_13 Depth=2 ld a0, 160(sp) # 8-byte Folded Reload .LBB18_35: # %if.then68 # in Loop: Header=BB18_13 Depth=2 sd a0, 136(sp) # 8-byte Folded Spill ld a0, 176(sp) # 8-byte Folded Reload - ld s11, 80(sp) # 8-byte Folded Reload + ld s11, 88(sp) # 8-byte Folded Reload beqz a0, .LBB18_42 # %bb.36: # %lor.lhs.false70 # in Loop: Header=BB18_13 Depth=2 @@ -8265,7 +8292,7 @@ # in Loop: Header=BB18_13 Depth=2 lw a0, 8(s5) ld s4, 184(sp) - beqz a0, .LBB18_50 + beqz a0, .LBB18_49 # %bb.40: # %if.then77 # in Loop: Header=BB18_13 Depth=2 mv a0, s1 @@ -8273,23 +8300,23 @@ mv s1, a0 ld a0, 16(a0) ld a1, 0(a0) - ld a1, 8(a1) - sd a1, 32(sp) # 8-byte Folded Spill + ld s2, 8(a1) ld a0, 8(a0) - ld s2, 168(sp) # 8-byte Folded Reload - mv a1, s2 + ld s11, 168(sp) # 8-byte Folded Reload + mv a1, s11 ld s5, 152(sp) # 8-byte Folded Reload mv a2, s5 mv a3, s4 call inf_NAllTermsRplac - beqz a0, .LBB18_45 + beqz a0, .LBB18_52 # %bb.41: # %if.end92.thread155 # in Loop: Header=BB18_13 Depth=2 - ld a0, 32(sp) # 8-byte Folded Reload - mv a1, s2 + mv a0, s2 + mv a1, s11 mv a2, s5 mv a3, s4 call inf_NAllTermsRplac + ld s11, 88(sp) # 8-byte Folded Reload j .LBB18_44 .LBB18_42: # %if.then73 # in Loop: Header=BB18_13 Depth=2 @@ -8305,7 +8332,7 @@ beqz a0, .LBB18_45 # %bb.43: # %if.end92 # in Loop: Header=BB18_13 Depth=2 - beqz s1, .LBB18_46 + beqz s1, .LBB18_61 .LBB18_44: # %if.then94 # in Loop: Header=BB18_13 Depth=2 ld a2, 192(sp) @@ -8328,17 +8355,13 @@ ld a1, 72(sp) # 8-byte Folded Reload sd a1, 0(a0) sd a0, 72(sp) # 8-byte Folded Spill - j .LBB18_46 + j .LBB18_61 .LBB18_45: # %if.then.i101 # in Loop: Header=BB18_13 Depth=2 mv a0, s1 call term_Delete@plt -.LBB18_46: # %if.end98 - # in Loop: Header=BB18_13 Depth=2 - ld a0, 144(sp) # 8-byte Folded Reload - beqz a0, .LBB18_9 - j .LBB18_10 -.LBB18_47: # %if.end + j .LBB18_61 +.LBB18_46: # %if.end # in Loop: Header=BB18_13 Depth=2 ld s2, 192(sp) ld s11, 160(sp) # 8-byte Folded Reload @@ -8350,7 +8373,7 @@ mv s4, a0 mv a0, s11 beq s4, s11, .LBB18_35 -# %bb.48: # %lor.lhs.false64 +# %bb.47: # %lor.lhs.false64 # in Loop: Header=BB18_13 Depth=2 mv a0, s4 ld a1, 152(sp) # 8-byte Folded Reload @@ -8359,11 +8382,11 @@ call ord_Compare@plt li a1, 1 beq a0, a1, .LBB18_8 -# %bb.49: # in Loop: Header=BB18_13 Depth=2 +# %bb.48: # in Loop: Header=BB18_13 Depth=2 sd zero, 144(sp) # 8-byte Folded Spill mv a0, s4 j .LBB18_35 -.LBB18_50: # %if.else79 +.LBB18_49: # %if.else79 # in Loop: Header=BB18_13 Depth=2 ld a0, 16(s1) ld a0, 8(a0) @@ -8395,42 +8418,46 @@ mv s1, a0 li a0, 3 beq s2, a0, .LBB18_53 -# %bb.51: # %if.else79 +# %bb.50: # %if.else79 # in Loop: Header=BB18_13 Depth=2 li a0, 1 bne s2, a0, .LBB18_56 -# %bb.52: # %sw.bb +# %bb.51: # %sw.bb # in Loop: Header=BB18_13 Depth=2 ld a0, 16(s1) ld a1, 0(a0) - ld a0, 8(a0) - sd a0, 16(sp) # 8-byte Folded Spill + ld s2, 8(a0) ld a0, 8(a1) j .LBB18_54 +.LBB18_52: # %if.else9.i.i + # in Loop: Header=BB18_13 Depth=2 + mv a0, s1 + call term_Delete@plt + ld s11, 88(sp) # 8-byte Folded Reload + j .LBB18_61 .LBB18_53: # %sw.bb88 # in Loop: Header=BB18_13 Depth=2 ld a0, 16(s1) ld a1, 0(a0) - ld a1, 8(a1) - sd a1, 16(sp) # 8-byte Folded Spill + ld s2, 8(a1) ld a0, 8(a0) .LBB18_54: # %sw.bb # in Loop: Header=BB18_13 Depth=2 - ld s2, 168(sp) # 8-byte Folded Reload - mv a1, s2 + ld s11, 168(sp) # 8-byte Folded Reload + mv a1, s11 ld s5, 152(sp) # 8-byte Folded Reload mv a2, s5 mv a3, s4 call inf_NAllTermsRplac - beqz a0, .LBB18_57 + beqz a0, .LBB18_58 # %bb.55: # %if.then7.i.i111 # in Loop: Header=BB18_13 Depth=2 - ld a0, 16(sp) # 8-byte Folded Reload - mv a1, s2 + mv a0, s2 + mv a1, s11 mv a2, s5 mv a3, s4 call inf_NAllTermsRplac - j .LBB18_58 + j .LBB18_59 .LBB18_56: # %sw.default # in Loop: Header=BB18_13 Depth=2 mv a0, s1 @@ -8439,13 +8466,22 @@ mv a2, s5 mv a3, s4 call inf_NAllTermsRplac - bnez a0, .LBB18_58 -.LBB18_57: # %if.then.i134 + bnez a0, .LBB18_60 +# %bb.57: # %if.then.i134 # in Loop: Header=BB18_13 Depth=2 mv a0, s1 call term_Delete@plt li s1, 0 -.LBB18_58: # %sw.epilog + j .LBB18_60 +.LBB18_58: # %if.else9.i.i114 + # in Loop: Header=BB18_13 Depth=2 + mv a0, s1 + call term_Delete@plt + li s1, 0 +.LBB18_59: # %sw.epilog + # in Loop: Header=BB18_13 Depth=2 + ld s11, 88(sp) # 8-byte Folded Reload +.LBB18_60: # %sw.epilog # in Loop: Header=BB18_13 Depth=2 ld a0, 32(sp) # 8-byte Folded Reload ld s2, 24(sp) # 8-byte Folded Reload @@ -8453,10 +8489,14 @@ mv a0, s2 call term_Delete@plt bnez s1, .LBB18_44 - j .LBB18_46 -.LBB18_59: +.LBB18_61: # %if.end98 + # in Loop: Header=BB18_13 Depth=2 + ld a0, 144(sp) # 8-byte Folded Reload + beqz a0, .LBB18_9 + j .LBB18_10 +.LBB18_62: sd zero, 72(sp) # 8-byte Folded Spill -.LBB18_60: # %for.end108 +.LBB18_63: # %for.end108 ld a0, 72(sp) # 8-byte Folded Reload csrr a1, vlenb slli a1, a1, 1 @@ -8721,10 +8761,10 @@ sd a1, 40(sp) # 8-byte Folded Spill vsetivli zero, 4, e32, m1, ta, ma vmv.v.i v8, 0 - sd s11, 72(sp) # 8-byte Folded Spill - sd s2, 64(sp) # 8-byte Folded Spill addi a1, sp, 176 vs1r.v v8, (a1) # Unknown-size Folded Spill + sd s11, 72(sp) # 8-byte Folded Spill + sd s2, 64(sp) # 8-byte Folded Spill j .LBB20_18 .LBB20_16: # in Loop: Header=BB20_18 Depth=1 mv s5, s8 @@ -8984,16 +9024,16 @@ .Lpcrel_hi206: auipc a0, %got_pcrel_hi(cont_LASTBINDING) ld a0, %pcrel_lo(.Lpcrel_hi206)(a0) - ld a2, 0(a0) - addi a1, sp, 176 - vl1r.v v8, (a1) # Unknown-size Folded Reload - beqz a2, .LBB20_50 + ld a1, 0(a0) + addi a2, sp, 176 + vl1r.v v8, (a2) # Unknown-size Folded Reload + beqz a1, .LBB20_50 # %bb.48: # %while.body.preheader.i.i # in Loop: Header=BB20_34 Depth=4 .Lpcrel_hi207: - auipc a1, %got_pcrel_hi(cont_BINDINGS) - ld a1, %pcrel_lo(.Lpcrel_hi207)(a1) - lw a3, 0(a1) + auipc a2, %got_pcrel_hi(cont_BINDINGS) + ld a2, %pcrel_lo(.Lpcrel_hi207)(a2) + lw a3, 0(a2) addi a3, a3, -1 vsetivli zero, 4, e32, m1, ta, ma .LBB20_49: # %while.body.i.i26 @@ -9005,18 +9045,18 @@ .Lpcrel_hi208: auipc a4, %got_pcrel_hi(cont_CURRENTBINDING) ld a4, %pcrel_lo(.Lpcrel_hi208)(a4) - sd a2, 0(a4) - ld a5, 24(a2) + sd a1, 0(a4) + ld a5, 24(a1) sd a5, 0(a0) - addi a5, a2, 4 - sw zero, 20(a2) + addi a5, a1, 4 + sw zero, 20(a1) vse32.v v8, (a5) ld a4, 0(a4) - ld a2, 0(a0) + ld a1, 0(a0) sd zero, 24(a4) - sw a3, 0(a1) + sw a3, 0(a2) addi a3, a3, -1 - bnez a2, .LBB20_49 + bnez a1, .LBB20_49 .LBB20_50: # %cont_Reset.exit.i # in Loop: Header=BB20_34 Depth=4 .Lpcrel_hi209: @@ -11210,12 +11250,12 @@ ld s8, %pcrel_lo(.Lpcrel_hi255)(a1) vsetivli zero, 4, e32, m1, ta, ma vmv.v.i v8, 0 + addi a1, sp, 240 + vs1r.v v8, (a1) # Unknown-size Folded Spill sd s4, 208(sp) # 8-byte Folded Spill sd s0, 96(sp) # 8-byte Folded Spill sd s1, 32(sp) # 8-byte Folded Spill sd s11, 128(sp) # 8-byte Folded Spill - addi a1, sp, 240 - vs1r.v v8, (a1) # Unknown-size Folded Spill sd s8, 120(sp) # 8-byte Folded Spill j .LBB25_9 .LBB25_8: # %if.end171 @@ -11421,16 +11461,16 @@ .Lpcrel_hi256: auipc a0, %got_pcrel_hi(cont_LASTBINDING) ld a0, %pcrel_lo(.Lpcrel_hi256)(a0) - ld a2, 0(a0) - addi a1, sp, 240 - vl1r.v v8, (a1) # Unknown-size Folded Reload - beqz a2, .LBB25_38 + ld a1, 0(a0) + addi a2, sp, 240 + vl1r.v v8, (a2) # Unknown-size Folded Reload + beqz a1, .LBB25_38 # %bb.36: # %while.body.preheader.i # in Loop: Header=BB25_22 Depth=4 .Lpcrel_hi257: - auipc a1, %got_pcrel_hi(cont_BINDINGS) - ld a1, %pcrel_lo(.Lpcrel_hi257)(a1) - lw a3, 0(a1) + auipc a2, %got_pcrel_hi(cont_BINDINGS) + ld a2, %pcrel_lo(.Lpcrel_hi257)(a2) + lw a3, 0(a2) addi a3, a3, -1 vsetivli zero, 4, e32, m1, ta, ma .LBB25_37: # %while.body.i @@ -11442,18 +11482,18 @@ .Lpcrel_hi258: auipc a4, %got_pcrel_hi(cont_CURRENTBINDING) ld a4, %pcrel_lo(.Lpcrel_hi258)(a4) - sd a2, 0(a4) - ld a5, 24(a2) + sd a1, 0(a4) + ld a5, 24(a1) sd a5, 0(a0) - addi a5, a2, 4 - sw zero, 20(a2) + addi a5, a1, 4 + sw zero, 20(a1) vse32.v v8, (a5) ld a4, 0(a4) - ld a2, 0(a0) + ld a1, 0(a0) sd zero, 24(a4) - sw a3, 0(a1) + sw a3, 0(a2) addi a3, a3, -1 - bnez a2, .LBB25_37 + bnez a1, .LBB25_37 .LBB25_38: # %cont_Reset.exit # in Loop: Header=BB25_22 Depth=4 .Lpcrel_hi259: @@ -11818,7 +11858,7 @@ ld a2, %pcrel_lo(.Lpcrel_hi262)(a0) .Lpcrel_hi263: auipc a0, %got_pcrel_hi(cont_LEFTCONTEXT) - ld s8, %pcrel_lo(.Lpcrel_hi263)(a0) + ld s7, %pcrel_lo(.Lpcrel_hi263)(a0) .Lpcrel_hi264: auipc a0, %got_pcrel_hi(cont_LASTBINDING) ld s5, %pcrel_lo(.Lpcrel_hi264)(a0) @@ -11831,11 +11871,11 @@ sd a0, 112(sp) # 8-byte Folded Spill vsetivli zero, 4, e32, m1, ta, ma vmv.v.i v8, 0 - sd s2, 40(sp) # 8-byte Folded Spill - sd s8, 72(sp) # 8-byte Folded Spill - sd a2, 64(sp) # 8-byte Folded Spill addi a0, sp, 176 vs1r.v v8, (a0) # Unknown-size Folded Spill + sd s2, 40(sp) # 8-byte Folded Spill + sd s7, 80(sp) # 8-byte Folded Spill + sd a2, 64(sp) # 8-byte Folded Spill j .LBB26_6 .LBB26_4: # %cont_Reset.exit137 # in Loop: Header=BB26_6 Depth=1 @@ -11847,7 +11887,7 @@ sw a0, 0(s11) mv a0, s4 call term_Delete@plt - mv a0, s7 + mv a0, s8 call term_Delete@plt ld a2, 64(sp) # 8-byte Folded Reload .LBB26_5: # %if.end87 @@ -11858,9 +11898,9 @@ .LBB26_6: # %for.body # =>This Loop Header: Depth=1 # Child Loop BB26_19 Depth 2 - # Child Loop BB26_29 Depth 2 - # Child Loop BB26_42 Depth 2 - # Child Loop BB26_51 Depth 2 + # Child Loop BB26_28 Depth 2 + # Child Loop BB26_41 Depth 2 + # Child Loop BB26_49 Depth 2 beq s10, s9, .LBB26_5 # %bb.7: # %land.lhs.true # in Loop: Header=BB26_6 Depth=1 @@ -11889,20 +11929,20 @@ mv a1, a0 mv a0, s3 call subst_Apply@plt - mv s7, a0 + mv s8, a0 call cont_Check@plt - ld a0, 0(s8) + ld a0, 0(s7) ld a1, 144(sp) # 8-byte Folded Reload sd s1, 104(sp) # 8-byte Folded Spill mv a2, s1 call unify_UnifyCom@plt ld s4, 136(sp) # 8-byte Folded Reload slli s4, s4, 3 - beqz a0, .LBB26_27 + beqz a0, .LBB26_26 # %bb.9: # %if.then16 # in Loop: Header=BB26_6 Depth=1 - mv s11, s7 - ld a0, 0(s8) + mv s11, s8 + ld a0, 0(s7) addi a1, sp, 160 call subst_ExtractUnifierCom@plt ld a0, 152(sp) # 8-byte Folded Reload @@ -11913,7 +11953,7 @@ beqz a0, .LBB26_11 # %bb.10: # in Loop: Header=BB26_6 Depth=1 li s7, 0 - li s1, 0 + li s8, 0 j .LBB26_12 .LBB26_11: # %if.then21 # in Loop: Header=BB26_6 Depth=1 @@ -11936,20 +11976,20 @@ mv a1, a0 mv a0, s1 call subst_Apply@plt - mv s1, a0 + mv s8, a0 mv a0, s7 - mv a1, s1 + mv a1, s8 ld a2, 120(sp) # 8-byte Folded Reload ld a3, 128(sp) # 8-byte Folded Reload call ord_Compare@plt addiw a0, a0, -1 li a1, 2 - bltu a0, a1, .LBB26_24 + bltu a0, a1, .LBB26_23 .LBB26_12: # %land.lhs.true36 # in Loop: Header=BB26_6 Depth=1 ld a0, 152(sp) # 8-byte Folded Reload lbu a0, 48(a0) - ld s8, 160(sp) + ld s1, 160(sp) andi a0, a0, 2 bnez a0, .LBB26_14 # %bb.13: # %land.lhs.true.i @@ -11961,7 +12001,7 @@ addiw a2, a1, -1 ld a1, 136(sp) # 8-byte Folded Reload slt a4, a2, a1 - mv a2, s8 + mv a2, s1 mv a3, s3 ld a5, 120(sp) # 8-byte Folded Reload ld a6, 128(sp) # 8-byte Folded Reload @@ -11981,7 +12021,7 @@ slt a4, a0, s9 mv a0, s0 mv a1, s9 - mv a2, s8 + mv a2, s1 mv a3, s3 ld a5, 120(sp) # 8-byte Folded Reload ld a6, 128(sp) # 8-byte Folded Reload @@ -11989,14 +12029,14 @@ beqz a0, .LBB26_23 .LBB26_16: # %if.then39 # in Loop: Header=BB26_6 Depth=1 - ld s2, 160(sp) + ld s1, 160(sp) mv a0, s11 call term_Copy@plt mv a1, a0 - mv a0, s2 + mv a0, s1 call subst_Apply@plt ld t5, 160(sp) - mv s8, a0 + mv s1, a0 sext.w a4, s10 ld a0, 128(sp) # 8-byte Folded Reload sd a0, 0(sp) @@ -12008,7 +12048,7 @@ ld a6, 56(sp) # 8-byte Folded Reload ld a7, 48(sp) # 8-byte Folded Reload ld t2, 88(sp) # 8-byte Folded Reload - mv t3, s8 + mv t3, s1 mv t4, s3 ld t6, 120(sp) # 8-byte Folded Reload call inf_ApplyMParamod @@ -12035,62 +12075,60 @@ ld s2, 96(sp) # 8-byte Folded Reload .LBB26_22: # %list_Nconc.exit # in Loop: Header=BB26_6 Depth=1 - mv a0, s8 + mv a0, s1 call term_Delete@plt sd s2, 96(sp) # 8-byte Folded Spill ld s2, 40(sp) # 8-byte Folded Reload .LBB26_23: # %if.end44 # in Loop: Header=BB26_6 Depth=1 - ld s8, 72(sp) # 8-byte Folded Reload -.LBB26_24: # %if.end44 - # in Loop: Header=BB26_6 Depth=1 - beqz s7, .LBB26_26 -# %bb.25: # %if.then46 + beqz s7, .LBB26_25 +# %bb.24: # %if.then46 # in Loop: Header=BB26_6 Depth=1 mv a0, s7 call term_Delete@plt - mv a0, s1 + mv a0, s8 call term_Delete@plt -.LBB26_26: # %if.end47 +.LBB26_25: # %if.end47 # in Loop: Header=BB26_6 Depth=1 ld a0, 160(sp) call subst_Delete@plt - mv s7, s11 -.LBB26_27: # %if.end48 + ld s7, 80(sp) # 8-byte Folded Reload + mv s8, s11 +.LBB26_26: # %if.end48 # in Loop: Header=BB26_6 Depth=1 - ld a1, 0(s5) - addi a0, sp, 176 - vl1r.v v8, (a0) # Unknown-size Folded Reload - beqz a1, .LBB26_30 -# %bb.28: # %while.body.preheader.i + ld a0, 0(s5) + addi a1, sp, 176 + vl1r.v v8, (a1) # Unknown-size Folded Reload + beqz a0, .LBB26_29 +# %bb.27: # %while.body.preheader.i # in Loop: Header=BB26_6 Depth=1 - lw a0, 0(s6) - addi a0, a0, -1 + lw a1, 0(s6) + addi a1, a1, -1 vsetivli zero, 4, e32, m1, ta, ma -.LBB26_29: # %while.body.i +.LBB26_28: # %while.body.i # Parent Loop BB26_6 Depth=1 # => This Inner Loop Header: Depth=2 .Lpcrel_hi267: auipc a2, %got_pcrel_hi(cont_CURRENTBINDING) ld a2, %pcrel_lo(.Lpcrel_hi267)(a2) - sd a1, 0(a2) - ld a3, 24(a1) + sd a0, 0(a2) + ld a3, 24(a0) sd a3, 0(s5) - addi a3, a1, 4 - sw zero, 20(a1) + addi a3, a0, 4 + sw zero, 20(a0) vse32.v v8, (a3) ld a2, 0(a2) - ld a1, 0(s5) + ld a0, 0(s5) sd zero, 24(a2) - sw a0, 0(s6) - addi a0, a0, -1 - bnez a1, .LBB26_29 -.LBB26_30: # %cont_Reset.exit + sw a1, 0(s6) + addi a1, a1, -1 + bnez a0, .LBB26_28 +.LBB26_29: # %cont_Reset.exit # in Loop: Header=BB26_6 Depth=1 .Lpcrel_hi268: auipc a0, %got_pcrel_hi(cont_INDEXVARSCANNER) ld s11, %pcrel_lo(.Lpcrel_hi268)(a0) - ld a0, 0(s8) + ld a0, 0(s7) sw zero, 0(s6) ld a1, 112(sp) # 8-byte Folded Reload li a2, 1 @@ -12098,13 +12136,13 @@ li a1, 2000 sw a1, 0(s11) ld a1, 144(sp) # 8-byte Folded Reload - mv a2, s7 + mv a2, s8 call unify_UnifyCom@plt - beqz a0, .LBB26_33 -# %bb.31: # %if.then52 + beqz a0, .LBB26_32 +# %bb.30: # %if.then52 # in Loop: Header=BB26_6 Depth=1 - sd s7, 80(sp) # 8-byte Folded Spill - ld a0, 0(s8) + sd s8, 72(sp) # 8-byte Folded Spill + ld a0, 0(s7) addi a1, sp, 160 call subst_ExtractUnifierCom@plt ld a0, 152(sp) # 8-byte Folded Reload @@ -12112,20 +12150,20 @@ add a0, a0, s4 ld a0, 0(a0) lw a0, 8(a0) - beqz a0, .LBB26_34 -# %bb.32: # in Loop: Header=BB26_6 Depth=1 + beqz a0, .LBB26_33 +# %bb.31: # in Loop: Header=BB26_6 Depth=1 li s7, 0 - li s1, 0 + li s8, 0 ld s4, 104(sp) # 8-byte Folded Reload - j .LBB26_35 -.LBB26_33: # in Loop: Header=BB26_6 Depth=1 + j .LBB26_34 +.LBB26_32: # in Loop: Header=BB26_6 Depth=1 ld s4, 104(sp) # 8-byte Folded Reload - ld a1, 0(s5) - addi a0, sp, 176 - vl1r.v v8, (a0) # Unknown-size Folded Reload - bnez a1, .LBB26_50 + ld a0, 0(s5) + addi a1, sp, 176 + vl1r.v v8, (a1) # Unknown-size Folded Reload + bnez a0, .LBB26_48 j .LBB26_4 -.LBB26_34: # %if.then57 +.LBB26_33: # %if.then57 # in Loop: Header=BB26_6 Depth=1 ld s1, 160(sp) ld a0, 32(sp) # 8-byte Folded Reload @@ -12146,24 +12184,24 @@ mv a1, a0 mv a0, s1 call subst_Apply@plt - mv s1, a0 + mv s8, a0 mv a0, s7 - mv a1, s1 + mv a1, s8 ld a2, 120(sp) # 8-byte Folded Reload ld a3, 128(sp) # 8-byte Folded Reload call ord_Compare@plt addiw a0, a0, -1 li a1, 2 ld s4, 104(sp) # 8-byte Folded Reload - bltu a0, a1, .LBB26_47 -.LBB26_35: # %land.lhs.true74 + bltu a0, a1, .LBB26_45 +.LBB26_34: # %land.lhs.true74 # in Loop: Header=BB26_6 Depth=1 ld a0, 152(sp) # 8-byte Folded Reload lbu a0, 48(a0) - ld s8, 160(sp) + ld s1, 160(sp) andi a0, a0, 2 - bnez a0, .LBB26_37 -# %bb.36: # %land.lhs.true.i107 + bnez a0, .LBB26_36 +# %bb.35: # %land.lhs.true.i107 # in Loop: Header=BB26_6 Depth=1 ld a0, 152(sp) # 8-byte Folded Reload lw a2, 64(a0) @@ -12172,18 +12210,18 @@ addiw a2, a1, -1 ld a1, 136(sp) # 8-byte Folded Reload slt a4, a2, a1 - mv a2, s8 + mv a2, s1 mv a3, s3 ld a5, 120(sp) # 8-byte Folded Reload ld a6, 128(sp) # 8-byte Folded Reload call inf_LitMaxWith2Subst - beqz a0, .LBB26_46 -.LBB26_37: # %if.end.i93 + beqz a0, .LBB26_45 +.LBB26_36: # %if.end.i93 # in Loop: Header=BB26_6 Depth=1 lbu a0, 48(s0) andi a0, a0, 2 - bnez a0, .LBB26_39 -# %bb.38: # %land.lhs.true6.i98 + bnez a0, .LBB26_38 +# %bb.37: # %land.lhs.true6.i98 # in Loop: Header=BB26_6 Depth=1 lw a0, 64(s0) lw a1, 68(s0) @@ -12192,22 +12230,22 @@ slt a4, a0, s9 mv a0, s0 mv a1, s9 - mv a2, s8 + mv a2, s1 mv a3, s3 ld a5, 120(sp) # 8-byte Folded Reload ld a6, 128(sp) # 8-byte Folded Reload call inf_LitMaxWith2Subst - beqz a0, .LBB26_46 -.LBB26_39: # %if.then77 + beqz a0, .LBB26_45 +.LBB26_38: # %if.then77 # in Loop: Header=BB26_6 Depth=1 - ld s2, 160(sp) + ld s1, 160(sp) mv a0, s4 call term_Copy@plt mv a1, a0 - mv a0, s2 + mv a0, s1 call subst_Apply@plt ld t5, 160(sp) - mv s8, a0 + mv s1, a0 sext.w a4, s10 ld a0, 128(sp) # 8-byte Folded Reload sd a0, 0(sp) @@ -12219,81 +12257,79 @@ ld a6, 56(sp) # 8-byte Folded Reload ld a7, 48(sp) # 8-byte Folded Reload ld t2, 88(sp) # 8-byte Folded Reload - mv t3, s8 + mv t3, s1 mv t4, s3 ld t6, 120(sp) # 8-byte Folded Reload call inf_ApplyMParamod - beqz a0, .LBB26_44 -# %bb.40: # %if.end.i118 + beqz a0, .LBB26_43 +# %bb.39: # %if.end.i118 # in Loop: Header=BB26_6 Depth=1 mv s2, a0 ld a2, 96(sp) # 8-byte Folded Reload - beqz a2, .LBB26_45 -# %bb.41: # %for.cond.i120.preheader + beqz a2, .LBB26_44 +# %bb.40: # %for.cond.i120.preheader # in Loop: Header=BB26_6 Depth=1 mv a1, s2 -.LBB26_42: # %for.cond.i120 +.LBB26_41: # %for.cond.i120 # Parent Loop BB26_6 Depth=1 # => This Inner Loop Header: Depth=2 mv a0, a1 ld a1, 0(a1) - bnez a1, .LBB26_42 -# %bb.43: # %for.end.i124 + bnez a1, .LBB26_41 +# %bb.42: # %for.end.i124 # in Loop: Header=BB26_6 Depth=1 sd a2, 0(a0) - j .LBB26_45 -.LBB26_44: # in Loop: Header=BB26_6 Depth=1 + j .LBB26_44 +.LBB26_43: # in Loop: Header=BB26_6 Depth=1 ld s2, 96(sp) # 8-byte Folded Reload -.LBB26_45: # %list_Nconc.exit126 +.LBB26_44: # %list_Nconc.exit126 # in Loop: Header=BB26_6 Depth=1 - mv a0, s8 + mv a0, s1 call term_Delete@plt sd s2, 96(sp) # 8-byte Folded Spill ld s2, 40(sp) # 8-byte Folded Reload -.LBB26_46: # %if.end82 - # in Loop: Header=BB26_6 Depth=1 - ld s8, 72(sp) # 8-byte Folded Reload -.LBB26_47: # %if.end82 +.LBB26_45: # %if.end82 # in Loop: Header=BB26_6 Depth=1 - beqz s7, .LBB26_49 -# %bb.48: # %if.then84 + beqz s7, .LBB26_47 +# %bb.46: # %if.then84 # in Loop: Header=BB26_6 Depth=1 mv a0, s7 call term_Delete@plt - mv a0, s1 + mv a0, s8 call term_Delete@plt -.LBB26_49: # %if.end85 +.LBB26_47: # %if.end85 # in Loop: Header=BB26_6 Depth=1 ld a0, 160(sp) call subst_Delete@plt ld s7, 80(sp) # 8-byte Folded Reload - ld a1, 0(s5) - addi a0, sp, 176 - vl1r.v v8, (a0) # Unknown-size Folded Reload - beqz a1, .LBB26_4 -.LBB26_50: # %while.body.preheader.i128 + ld s8, 72(sp) # 8-byte Folded Reload + ld a0, 0(s5) + addi a1, sp, 176 + vl1r.v v8, (a1) # Unknown-size Folded Reload + beqz a0, .LBB26_4 +.LBB26_48: # %while.body.preheader.i128 # in Loop: Header=BB26_6 Depth=1 - lw a0, 0(s6) - addi a0, a0, -1 + lw a1, 0(s6) + addi a1, a1, -1 vsetivli zero, 4, e32, m1, ta, ma -.LBB26_51: # %while.body.i130 +.LBB26_49: # %while.body.i130 # Parent Loop BB26_6 Depth=1 # => This Inner Loop Header: Depth=2 .Lpcrel_hi269: auipc a2, %got_pcrel_hi(cont_CURRENTBINDING) ld a2, %pcrel_lo(.Lpcrel_hi269)(a2) - sd a1, 0(a2) - ld a3, 24(a1) + sd a0, 0(a2) + ld a3, 24(a0) sd a3, 0(s5) - addi a3, a1, 4 - sw zero, 20(a1) + addi a3, a0, 4 + sw zero, 20(a0) vse32.v v8, (a3) ld a2, 0(a2) - ld a1, 0(s5) + ld a0, 0(s5) sd zero, 24(a2) - sw a0, 0(s6) - addi a0, a0, -1 - bnez a1, .LBB26_51 + sw a1, 0(s6) + addi a1, a1, -1 + bnez a0, .LBB26_49 j .LBB26_4 .Lfunc_end26: .size inf_Lit2MParamod, .Lfunc_end26-inf_Lit2MParamod @@ -13066,12 +13102,12 @@ ld s8, %pcrel_lo(.Lpcrel_hi278)(a1) vsetivli zero, 4, e32, m1, ta, ma vmv.v.i v8, 0 + addi a1, sp, 240 + vs1r.v v8, (a1) # Unknown-size Folded Spill sd s4, 208(sp) # 8-byte Folded Spill sd s0, 96(sp) # 8-byte Folded Spill sd s1, 32(sp) # 8-byte Folded Spill sd s11, 128(sp) # 8-byte Folded Spill - addi a1, sp, 240 - vs1r.v v8, (a1) # Unknown-size Folded Spill sd s8, 120(sp) # 8-byte Folded Spill j .LBB29_9 .LBB29_8: # %if.end169 @@ -13277,16 +13313,16 @@ .Lpcrel_hi279: auipc a0, %got_pcrel_hi(cont_LASTBINDING) ld a0, %pcrel_lo(.Lpcrel_hi279)(a0) - ld a2, 0(a0) - addi a1, sp, 240 - vl1r.v v8, (a1) # Unknown-size Folded Reload - beqz a2, .LBB29_38 + ld a1, 0(a0) + addi a2, sp, 240 + vl1r.v v8, (a2) # Unknown-size Folded Reload + beqz a1, .LBB29_38 # %bb.36: # %while.body.preheader.i # in Loop: Header=BB29_22 Depth=4 .Lpcrel_hi280: - auipc a1, %got_pcrel_hi(cont_BINDINGS) - ld a1, %pcrel_lo(.Lpcrel_hi280)(a1) - lw a3, 0(a1) + auipc a2, %got_pcrel_hi(cont_BINDINGS) + ld a2, %pcrel_lo(.Lpcrel_hi280)(a2) + lw a3, 0(a2) addi a3, a3, -1 vsetivli zero, 4, e32, m1, ta, ma .LBB29_37: # %while.body.i @@ -13298,18 +13334,18 @@ .Lpcrel_hi281: auipc a4, %got_pcrel_hi(cont_CURRENTBINDING) ld a4, %pcrel_lo(.Lpcrel_hi281)(a4) - sd a2, 0(a4) - ld a5, 24(a2) + sd a1, 0(a4) + ld a5, 24(a1) sd a5, 0(a0) - addi a5, a2, 4 - sw zero, 20(a2) + addi a5, a1, 4 + sw zero, 20(a1) vse32.v v8, (a5) ld a4, 0(a4) - ld a2, 0(a0) + ld a1, 0(a0) sd zero, 24(a4) - sw a3, 0(a1) + sw a3, 0(a2) addi a3, a3, -1 - bnez a2, .LBB29_37 + bnez a1, .LBB29_37 .LBB29_38: # %cont_Reset.exit # in Loop: Header=BB29_22 Depth=4 .Lpcrel_hi282: @@ -14011,16 +14047,16 @@ .Lpcrel_hi299: auipc a0, %got_pcrel_hi(cont_LASTBINDING) ld a0, %pcrel_lo(.Lpcrel_hi299)(a0) - ld a2, 0(a0) - addi a1, sp, 176 - vl1r.v v8, (a1) # Unknown-size Folded Reload - beqz a2, .LBB30_44 + ld a1, 0(a0) + addi a2, sp, 176 + vl1r.v v8, (a2) # Unknown-size Folded Reload + beqz a1, .LBB30_44 # %bb.42: # %while.body.preheader.i # in Loop: Header=BB30_32 Depth=2 .Lpcrel_hi300: - auipc a1, %got_pcrel_hi(cont_BINDINGS) - ld a1, %pcrel_lo(.Lpcrel_hi300)(a1) - lw a3, 0(a1) + auipc a2, %got_pcrel_hi(cont_BINDINGS) + ld a2, %pcrel_lo(.Lpcrel_hi300)(a2) + lw a3, 0(a2) addi a3, a3, -1 vsetivli zero, 4, e32, m1, ta, ma .LBB30_43: # %while.body.i @@ -14030,18 +14066,18 @@ .Lpcrel_hi301: auipc a4, %got_pcrel_hi(cont_CURRENTBINDING) ld a4, %pcrel_lo(.Lpcrel_hi301)(a4) - sd a2, 0(a4) - ld a5, 24(a2) + sd a1, 0(a4) + ld a5, 24(a1) sd a5, 0(a0) - addi a5, a2, 4 - sw zero, 20(a2) + addi a5, a1, 4 + sw zero, 20(a1) vse32.v v8, (a5) ld a4, 0(a4) - ld a2, 0(a0) + ld a1, 0(a0) sd zero, 24(a4) - sw a3, 0(a1) + sw a3, 0(a2) addi a3, a3, -1 - bnez a2, .LBB30_43 + bnez a1, .LBB30_43 .LBB30_44: # %cont_Reset.exit # in Loop: Header=BB30_32 Depth=2 .Lpcrel_hi302: --- build.head//MultiSource/Benchmarks/sim/CMakeFiles/sim.dir/sim.s 2023-11-13 08:03:22.727547995 +0000 +++ build//MultiSource/Benchmarks/sim/CMakeFiles/sim.dir/sim.s 2023-11-13 08:03:17.771691251 +0000 @@ -4666,8 +4666,8 @@ negw a0, a5 sd a0, 48(sp) # 8-byte Folded Spill csrr a0, vlenb - slli s2, a0, 1 - srli s4, a0, 1 + slli s4, a0, 1 + srli s3, a0, 1 .Lpcrel_hi187: auipc a0, %pcrel_hi(CC) sd a0, 80(sp) # 8-byte Folded Spill @@ -4697,19 +4697,19 @@ addi a0, a0, 240 vs1r.v v14, (a0) # Unknown-size Folded Spill sd t0, 104(sp) # 8-byte Folded Spill - sd s2, 88(sp) # 8-byte Folded Spill sd s4, 96(sp) # 8-byte Folded Spill + sd s3, 88(sp) # 8-byte Folded Spill j .LBB8_4 .LBB8_2: # %tailrecurse.backedge # in Loop: Header=BB8_4 Depth=1 sd s8, 64(sp) # 8-byte Folded Spill .LBB8_3: # %tailrecurse.backedge # in Loop: Header=BB8_4 Depth=1 - subw s11, s11, s6 - add s0, s0, s6 + subw s11, s11, s5 + add s0, s0, s5 li s10, 1 sd s3, 224(sp) # 8-byte Folded Spill - ld s2, 88(sp) # 8-byte Folded Reload + ld s3, 88(sp) # 8-byte Folded Reload blez s11, .LBB8_82 .LBB8_4: # %if.end11 # =>This Loop Header: Depth=1 @@ -4737,19 +4737,19 @@ ld a0, 72(sp) # 8-byte Folded Reload ld t4, %pcrel_lo(.Lpcrel_hi188)(a0) ld a0, 152(sp) # 8-byte Folded Reload - lw s1, %pcrel_lo(.Lpcrel_hi182)(a0) - addi s3, s11, 1 - slli s3, s3, 32 - srli a3, s3, 32 - addi t6, a3, -1 + lw s2, %pcrel_lo(.Lpcrel_hi182)(a0) + addi t2, s11, 1 + slli t2, t2, 32 + srli a3, t2, 32 + addi s1, a3, -1 li a0, 1 mv a6, t0 - bltu t6, s4, .LBB8_9 + bltu s1, s3, .LBB8_9 # %bb.6: # %vector.ph379 # in Loop: Header=BB8_4 Depth=1 - negw a5, s1 - neg a0, s4 - and a7, t6, a0 + negw a5, s2 + neg a0, s3 + and a7, s1, a0 addi a0, a7, 1 mul a6, a7, a5 subw a6, a6, s5 @@ -4761,32 +4761,32 @@ addi t1, t1, 240 vl2r.v v10, (t1) # Unknown-size Folded Reload vmacc.vx v8, a5, v10 - mul t1, s4, a5 - addi t2, a1, 4 - addi t3, t4, 4 - mv t5, a7 + mul t1, s3, a5 + addi t3, a1, 4 + addi t5, t4, 4 + mv t6, a7 .LBB8_7: # %vector.body388 # Parent Loop BB8_4 Depth=1 # => This Inner Loop Header: Depth=2 - vsub.vx v10, v8, s1 - vs2r.v v10, (t2) - vsub.vx v10, v10, s5 + vsub.vx v10, v8, s2 vs2r.v v10, (t3) + vsub.vx v10, v10, s5 + vs2r.v v10, (t5) vadd.vx v8, v8, t1 - add t2, t2, s2 - sub t5, t5, s4 - add t3, t3, s2 - bnez t5, .LBB8_7 + add t3, t3, s4 + sub t6, t6, s3 + add t5, t5, s4 + bnez t6, .LBB8_7 # %bb.8: # %middle.block376 # in Loop: Header=BB8_4 Depth=1 - beq t6, a7, .LBB8_11 + beq s1, a7, .LBB8_11 .LBB8_9: # %for.body174.preheader # in Loop: Header=BB8_4 Depth=1 slli a7, a0, 2 add t1, t4, a7 add a7, a1, a7 sub a0, a3, a0 - subw a6, a6, s1 + subw a6, a6, s2 .LBB8_10: # %for.body174 # Parent Loop BB8_4 Depth=1 # => This Inner Loop Header: Depth=2 @@ -4796,7 +4796,7 @@ addi t1, t1, 4 addi a7, a7, 4 addi a0, a0, -1 - subw a6, a6, s1 + subw a6, a6, s2 bnez a0, .LBB8_10 .LBB8_11: # %for.end183 # in Loop: Header=BB8_4 Depth=1 @@ -4805,23 +4805,23 @@ sd s10, 144(sp) # 8-byte Folded Spill srliw a5, a2, 1 .Lpcrel_hi196: - auipc t5, %pcrel_hi(v) + auipc t6, %pcrel_hi(v) .Lpcrel_hi197: - auipc t6, %pcrel_hi(qr) + auipc s1, %pcrel_hi(qr) .Lpcrel_hi198: - auipc t2, %pcrel_hi(row) + auipc t3, %pcrel_hi(row) .Lpcrel_hi199: - auipc t3, %pcrel_hi(J) + auipc t5, %pcrel_hi(J) .Lpcrel_hi200: auipc a6, %pcrel_hi(z) sd a2, 160(sp) # 8-byte Folded Spill li a0, 2 sd a5, 200(sp) # 8-byte Folded Spill sd a4, 136(sp) # 8-byte Folded Spill - sd t2, 176(sp) # 8-byte Folded Spill - sd t3, 168(sp) # 8-byte Folded Spill - sd t5, 184(sp) # 8-byte Folded Spill - sd t6, 120(sp) # 8-byte Folded Spill + sd t3, 176(sp) # 8-byte Folded Spill + sd t5, 168(sp) # 8-byte Folded Spill + sd t6, 184(sp) # 8-byte Folded Spill + sd s1, 120(sp) # 8-byte Folded Spill li a7, 0 bgeu a2, a0, .LBB8_15 .LBB8_12: # %for.end261 @@ -4848,12 +4848,12 @@ # %bb.13: # %for.body271.lr.ph # in Loop: Header=BB8_4 Depth=1 ld a2, 152(sp) # 8-byte Folded Reload - lw t3, %pcrel_lo(.Lpcrel_hi182)(a2) - srli t5, s8, 32 + lw s1, %pcrel_lo(.Lpcrel_hi182)(a2) + srli t3, s8, 32 li a2, 8 bgeu s11, a2, .LBB8_32 # %bb.14: # in Loop: Header=BB8_4 Depth=1 - mv a2, t5 + mv a2, t3 mv a4, t0 j .LBB8_35 .LBB8_15: # %for.body188.lr.ph @@ -4861,19 +4861,19 @@ negw a0, a4 ld a2, 152(sp) # 8-byte Folded Reload lw t1, %pcrel_lo(.Lpcrel_hi182)(a2) - ld a2, %pcrel_lo(.Lpcrel_hi196)(t5) + ld a2, %pcrel_lo(.Lpcrel_hi196)(t6) sd a2, 192(sp) # 8-byte Folded Spill - lw s5, %pcrel_lo(.Lpcrel_hi197)(t6) - ld s8, %pcrel_lo(.Lpcrel_hi198)(t2) + lw s5, %pcrel_lo(.Lpcrel_hi197)(s1) + ld s8, %pcrel_lo(.Lpcrel_hi198)(t3) ld a2, 112(sp) # 8-byte Folded Reload lw a2, %pcrel_lo(.Lpcrel_hi183)(a2) - lw s6, %pcrel_lo(.Lpcrel_hi199)(t3) + lw s6, %pcrel_lo(.Lpcrel_hi199)(t5) seqz a4, a5 add a4, a5, a4 addi s9, a4, 1 slli a2, a2, 3 add s8, s8, a2 - srli s3, s3, 32 + srli t2, t2, 32 li ra, 1 j .LBB8_17 .LBB8_16: # %for.inc259 @@ -4910,7 +4910,7 @@ addi t3, t3, 1 addi s2, s2, 1 mv s7, s11 - beq t3, s3, .LBB8_16 + beq t3, t2, .LBB8_16 .LBB8_19: # %for.body201 # Parent Loop BB8_4 Depth=1 # Parent Loop BB8_17 Depth=2 @@ -4929,14 +4929,14 @@ add a0, a1, a2 lw s11, 0(a0) add a2, t4, a2 - lw t2, 0(a2) + lw t5, 0(a2) subw s4, s11, s5 - subw t2, t2, t1 + subw t6, t5, t1 mv t5, s4 - blt t2, s4, .LBB8_23 + blt t6, s4, .LBB8_23 # %bb.22: # %for.body201 # in Loop: Header=BB8_19 Depth=3 - mv t5, t2 + mv t5, t6 .LBB8_23: # %for.body201 # in Loop: Header=BB8_19 Depth=3 ld t6, 0(a4) @@ -4944,14 +4944,14 @@ beqz t6, .LBB8_27 # %bb.24: # %for.body224.lr.ph # in Loop: Header=BB8_19 Depth=3 - addw t2, s6, s2 + addw s3, s6, s2 .LBB8_25: # %for.body224 # Parent Loop BB8_4 Depth=1 # Parent Loop BB8_17 Depth=2 # Parent Loop BB8_19 Depth=3 # => This Inner Loop Header: Depth=4 lw a5, 0(t6) - beq a5, t2, .LBB8_28 + beq a5, s3, .LBB8_28 # %bb.26: # %for.cond221 # in Loop: Header=BB8_25 Depth=4 ld t6, 8(t6) @@ -4980,9 +4980,9 @@ j .LBB8_18 .LBB8_32: # %vector.ph # in Loop: Header=BB8_4 Depth=1 - negw t2, t3 + negw t2, s1 andi t1, s11, -8 - sub a2, t5, t1 + sub a2, t3, t1 mul a4, t1, t2 ld s4, 216(sp) # 8-byte Folded Reload subw a4, a4, s4 @@ -4992,25 +4992,25 @@ vl2r.v v10, (a5) # Unknown-size Folded Reload vmacc.vx v8, t2, v10 slli t2, t2, 3 - slli a5, t5, 2 - add t5, a0, a5 - addi t5, t5, -28 + slli a5, t3, 2 + add t3, a0, a5 + addi t3, t3, -28 add a5, s5, a5 - addi s1, a5, -28 + addi t5, a5, -28 mv s3, t1 .LBB8_33: # %vector.body # Parent Loop BB8_4 Depth=1 # => This Inner Loop Header: Depth=2 - vsub.vx v10, v8, t3 + vsub.vx v10, v8, s1 vrgatherei16.vv v12, v10, v14 - vse32.v v12, (s1) + vse32.v v12, (t5) vsub.vx v10, v10, s4 vrgatherei16.vv v12, v10, v14 - vse32.v v12, (t5) + vse32.v v12, (t3) vadd.vx v8, v8, t2 addi s3, s3, -8 + addi t3, t3, -32 addi t5, t5, -32 - addi s1, s1, -32 bnez s3, .LBB8_33 # %bb.34: # %middle.block # in Loop: Header=BB8_4 Depth=1 @@ -5021,7 +5021,7 @@ slli t2, a2, 2 add a2, a0, t2 add t2, s5, t2 - subw a4, a4, t3 + subw a4, a4, s1 .LBB8_36: # %for.body271 # Parent Loop BB8_4 Depth=1 # => This Inner Loop Header: Depth=2 @@ -5031,7 +5031,7 @@ addi t1, t1, -1 addi a2, a2, -4 addi t2, t2, -4 - subw a4, a4, t3 + subw a4, a4, s1 bnez t1, .LBB8_36 .LBB8_37: # %for.end279 # in Loop: Header=BB8_4 Depth=1 @@ -5180,18 +5180,18 @@ addw s9, a2, a7 ld s3, 224(sp) # 8-byte Folded Reload add s3, s3, s7 - ld a4, 136(sp) # 8-byte Folded Reload + ld s4, 96(sp) # 8-byte Folded Reload bltz s11, .LBB8_75 # %bb.57: # %for.body376.preheader # in Loop: Header=BB8_4 Depth=1 li a7, 0 - li s1, 0 + li s6, 0 mv t3, t4 - ld s2, 144(sp) # 8-byte Folded Reload + ld s1, 144(sp) # 8-byte Folded Reload j .LBB8_60 .LBB8_58: # %if.then399 # in Loop: Header=BB8_60 Depth=2 - mv s1, a7 + mv s6, a7 mv s9, a2 .LBB8_59: # %for.inc402 # in Loop: Header=BB8_60 Depth=2 @@ -5223,7 +5223,7 @@ j .LBB8_59 .LBB8_64: # %for.cond405.preheader # in Loop: Header=BB8_4 Depth=1 - ld s4, 96(sp) # 8-byte Folded Reload + ld a4, 136(sp) # 8-byte Folded Reload ld a5, 216(sp) # 8-byte Folded Reload bltz s11, .LBB8_76 # %bb.65: # %for.body408.preheader @@ -5240,7 +5240,7 @@ addi a2, a2, -4 addiw a1, a1, -1 mv s9, s8 - mv s1, s6 + mv s6, s5 blez t5, .LBB8_73 .LBB8_67: # %for.body408 # Parent Loop BB8_4 Depth=1 @@ -5249,11 +5249,11 @@ lw a7, 0(a6) add a3, a3, a5 addw s8, a3, a7 - mv s6, a1 + mv s5, a1 blt s9, s8, .LBB8_70 # %bb.68: # %for.body408 # in Loop: Header=BB8_67 Depth=2 - mv s6, s1 + mv s5, s6 blt s9, s8, .LBB8_71 .LBB8_69: # %for.body408 # in Loop: Header=BB8_67 Depth=2 @@ -5276,32 +5276,32 @@ bne a0, a1, .LBB8_77 # %bb.74: # in Loop: Header=BB8_4 Depth=1 mv s9, s8 - mv s1, s6 + mv s6, s5 j .LBB8_76 .LBB8_75: # in Loop: Header=BB8_4 Depth=1 - li s1, 0 - ld s2, 144(sp) # 8-byte Folded Reload - ld s4, 96(sp) # 8-byte Folded Reload + li s6, 0 + ld s1, 144(sp) # 8-byte Folded Reload + ld a4, 136(sp) # 8-byte Folded Reload ld a5, 216(sp) # 8-byte Folded Reload .LBB8_76: # %if.then431 # in Loop: Header=BB8_4 Depth=1 ld a0, 224(sp) # 8-byte Folded Reload mv a1, s0 mv a2, s7 - mv a3, s1 + mv a3, s6 call diff ld t0, 104(sp) # 8-byte Folded Reload lw a4, %pcrel_lo(.Lpcrel_hi181)(t0) ld a2, 160(sp) # 8-byte Folded Reload subw a2, a2, s7 mv s8, s9 - mv s6, s1 + mv s5, s6 csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 240 vl1r.v v14, (a0) # Unknown-size Folded Reload - andi a0, s2, 1 + andi a0, s1, 1 bnez a0, .LBB8_3 j .LBB8_2 .LBB8_77: # %if.else438 @@ -5309,7 +5309,7 @@ addi a2, s7, -1 ld a0, 224(sp) # 8-byte Folded Reload mv a1, s0 - mv a3, s6 + mv a3, s5 li a5, 0 call diff ld a6, 112(sp) # 8-byte Folded Reload @@ -5339,20 +5339,20 @@ sw a0, -4(a1) .LBB8_80: # %if.end450 # in Loop: Header=BB8_4 Depth=1 - ld t0, 104(sp) # 8-byte Folded Reload - ld a2, 160(sp) # 8-byte Folded Reload csrr a1, vlenb slli a1, a1, 2 add a1, sp, a1 addi a1, a1, 240 vl1r.v v14, (a1) # Unknown-size Folded Reload + ld t0, 104(sp) # 8-byte Folded Reload + ld a2, 160(sp) # 8-byte Folded Reload li a4, 0 ld a1, 56(sp) # 8-byte Folded Reload sw a0, %pcrel_lo(.Lpcrel_hi185)(a1) addi s3, s3, 1 not a0, s7 addw a2, a2, a0 - andi a0, s2, 1 + andi a0, s1, 1 bnez a0, .LBB8_3 j .LBB8_2 .LBB8_81: --- build.head//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/Archive/Tar/TarUpdate.s 2023-11-13 08:03:21.219591584 +0000 +++ build//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/Archive/Tar/TarUpdate.s 2023-11-13 08:03:16.251735187 +0000 @@ -264,9 +264,9 @@ sb zero, 0(a0) sw s7, 156(sp) vsetivli zero, 2, e64, m1, ta, ma + addi a0, sp, 224 + vl1r.v v8, (a0) # Unknown-size Folded Reload addi a0, sp, 160 - addi a1, sp, 224 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) .Ltmp43: li a0, 4 @@ -279,9 +279,9 @@ sb zero, 0(a0) sw s7, 172(sp) vsetivli zero, 2, e64, m1, ta, ma + addi a0, sp, 224 + vl1r.v v8, (a0) # Unknown-size Folded Reload addi a0, sp, 176 - addi a1, sp, 224 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) .Ltmp46: li a0, 4 --- build.head//MicroBenchmarks/LCALS/SubsetALambdaLoops/CMakeFiles/lcalsALambda.dir/__/LCALSSuite.s 2023-11-13 08:03:20.887601182 +0000 +++ build//MicroBenchmarks/LCALS/SubsetALambdaLoops/CMakeFiles/lcalsALambda.dir/__/LCALSSuite.s 2023-11-13 08:03:15.923744668 +0000 @@ -42765,9 +42765,9 @@ mul s0, a3, a4 sd zero, 32(s1) vmv.v.i v8, 0 - sd a6, 32(sp) # 8-byte Folded Spill addi a3, sp, 48 vs1r.v v8, (a3) # Unknown-size Folded Spill + sd a6, 32(sp) # 8-byte Folded Spill vse64.v v8, (a6) beq a1, a2, .LBB27_3 # %bb.1: # %cond.true.i.i.i.i @@ -42801,9 +42801,9 @@ sub s4, a1, a2 sd zero, 56(s1) vsetivli zero, 2, e64, m1, ta, ma - sd a0, 24(sp) # 8-byte Folded Spill addi a3, sp, 48 vl1r.v v8, (a3) # Unknown-size Folded Reload + sd a0, 24(sp) # 8-byte Folded Spill vse64.v v8, (a0) beq a1, a2, .LBB27_9 # %bb.6: # %cond.true.i.i.i.i27 --- build.head//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/UI/Common/Update.s 2023-11-13 08:03:21.251590659 +0000 +++ build//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/UI/Common/Update.s 2023-11-13 08:03:16.283734262 +0000 @@ -175,9 +175,9 @@ # in Loop: Header=BB1_4 Depth=1 li s2, 0 vsetivli zero, 2, e64, m1, ta, ma + addi a0, sp, 224 + vl1r.v v8, (a0) # Unknown-size Folded Reload addi a0, sp, 80 - addi a1, sp, 224 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) addi a0, sp, 104 .LBB1_8: # %for.cond.i.i @@ -544,9 +544,9 @@ sw zero, 192(sp) vsetivli zero, 2, e64, m1, ta, ma ld s6, 184(sp) + addi a0, sp, 224 + vl1r.v v8, (a0) # Unknown-size Folded Reload addi a0, sp, 200 - addi a1, sp, 224 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) sw zero, 0(s6) lw a0, 72(sp) --- build.head//MicroBenchmarks/LCALS/SubsetARawLoops/CMakeFiles/lcalsARaw.dir/__/LCALSSuite.s 2023-11-13 08:03:20.891601066 +0000 +++ build//MicroBenchmarks/LCALS/SubsetARawLoops/CMakeFiles/lcalsARaw.dir/__/LCALSSuite.s 2023-11-13 08:03:15.927744552 +0000 @@ -42765,9 +42765,9 @@ mul s0, a3, a4 sd zero, 32(s1) vmv.v.i v8, 0 - sd a6, 32(sp) # 8-byte Folded Spill addi a3, sp, 48 vs1r.v v8, (a3) # Unknown-size Folded Spill + sd a6, 32(sp) # 8-byte Folded Spill vse64.v v8, (a6) beq a1, a2, .LBB27_3 # %bb.1: # %cond.true.i.i.i.i @@ -42801,9 +42801,9 @@ sub s4, a1, a2 sd zero, 56(s1) vsetivli zero, 2, e64, m1, ta, ma - sd a0, 24(sp) # 8-byte Folded Spill addi a3, sp, 48 vl1r.v v8, (a3) # Unknown-size Folded Reload + sd a0, 24(sp) # 8-byte Folded Spill vse64.v v8, (a0) beq a1, a2, .LBB27_9 # %bb.6: # %cond.true.i.i.i.i27 --- build.head//SingleSource/Benchmarks/Adobe-C++/CMakeFiles/stepanov_vector.dir/stepanov_vector.s 2023-11-13 08:03:22.875543717 +0000 +++ build//SingleSource/Benchmarks/Adobe-C++/CMakeFiles/stepanov_vector.dir/stepanov_vector.s 2023-11-13 08:03:17.939686394 +0000 @@ -1076,12 +1076,12 @@ ld s2, 168(sp) ld s4, 160(sp) li s5, 0 - sub s7, s2, s4 - addi s7, s7, -8 - srli s6, s7, 3 - addi s6, s6, 1 + sub s6, s2, s4 + addi s6, s6, -8 + srli s7, s6, 3 + addi s7, s7, 1 ld a1, 104(sp) # 8-byte Folded Reload - and s9, s6, a1 + and s9, s7, a1 slli a1, s9, 3 sub s10, s2, a1 addi s11, s2, -64 @@ -1105,7 +1105,7 @@ mv a1, s2 fmv.d fa5, fs1 li a2, 56 - bltu s7, a2, .LBB5_66 + bltu s6, a2, .LBB5_66 # %bb.63: # %vector.body1125.preheader # in Loop: Header=BB5_61 Depth=1 vsetivli zero, 4, e64, m2, ta, ma @@ -1130,7 +1130,7 @@ # %bb.65: # %middle.block1116 # in Loop: Header=BB5_61 Depth=1 mv a1, s10 - beq s6, s9, .LBB5_67 + beq s7, s9, .LBB5_67 .LBB5_66: # %while.body.i.i96 # Parent Loop BB5_61 Depth=1 # => This Inner Loop Header: Depth=2 --- build.head//MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/btOptimizedBvh.s 2023-11-13 08:03:22.475555279 +0000 +++ build//MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/btOptimizedBvh.s 2023-11-13 08:03:17.511698766 +0000 @@ -1398,6 +1398,8 @@ mv s0, a3 mv s3, a2 call _Z22btAlignedAllocInternalmi@plt + mv a2, s3 + mv a3, s0 addi a1, sp, 32 vl1r.v v12, (a1) # Unknown-size Folded Reload csrr a1, vlenb @@ -1409,8 +1411,6 @@ add a1, sp, a1 addi a1, a1, 32 vl1r.v v10, (a1) # Unknown-size Folded Reload - mv a2, s3 - mv a3, s0 lw a1, 4(s1) mv s0, a0 bgtz a1, .LBB11_7 @@ -1442,6 +1442,8 @@ mv s3, a3 mv s4, a2 call _Z21btAlignedFreeInternalPv@plt + mv a2, s4 + mv a3, s3 addi a0, sp, 32 vl1r.v v12, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -1453,8 +1455,6 @@ add a0, sp, a0 addi a0, a0, 32 vl1r.v v10, (a0) # Unknown-size Folded Reload - mv a2, s4 - mv a3, s3 .LBB11_11: # %_ZN20btAlignedObjectArrayI18btQuantizedBvhNodeE10deallocateEv.exit.i.i li a0, 1 lw a1, 4(s1) @@ -1751,6 +1751,8 @@ mv s0, a3 mv s3, a2 call _Z22btAlignedAllocInternalmi@plt + mv a2, s3 + mv a3, s0 csrr a1, vlenb slli a1, a1, 1 add a1, sp, a1 @@ -1761,8 +1763,6 @@ add a1, sp, a1 addi a1, a1, 16 vl2r.v v20, (a1) # Unknown-size Folded Reload - mv a2, s3 - mv a3, s0 lw a1, 4(s1) mv s0, a0 bgtz a1, .LBB13_7 @@ -1794,6 +1794,8 @@ mv s3, a3 mv s4, a2 call _Z21btAlignedFreeInternalPv@plt + mv a2, s4 + mv a3, s3 csrr a0, vlenb slli a0, a0, 1 add a0, sp, a0 @@ -1804,8 +1806,6 @@ add a0, sp, a0 addi a0, a0, 16 vl2r.v v20, (a0) # Unknown-size Folded Reload - mv a2, s4 - mv a3, s3 .LBB13_11: # %_ZN20btAlignedObjectArrayI18btOptimizedBvhNodeE10deallocateEv.exit.i.i li a0, 1 lw a1, 4(s1) --- build.head//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/C/Ppmd7.s 2023-11-13 08:03:21.259590428 +0000 +++ build//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/C/Ppmd7.s 2023-11-13 08:03:16.287734147 +0000 @@ -417,7 +417,7 @@ vmv.v.x v20, a0 addi a0, sp, 32 vs4r.v v20, (a0) # Unknown-size Folded Spill - li a2, 106 + li t2, 106 li t3, 122 li t4, 12 li t5, 28 @@ -444,108 +444,108 @@ vadd.vx v24, v24, a5 vsetvli zero, zero, e32, m4, ta, ma vadd.vi v4, v16, 2 - csrr t2, vlenb + csrr a2, vlenb sd a0, 8(sp) li a0, 12 - mul t2, t2, a0 + mul a2, a2, a0 ld a0, 8(sp) - add t2, sp, t2 - addi t2, t2, 32 - vl4r.v v20, (t2) # Unknown-size Folded Reload + add a2, sp, a2 + addi a2, a2, 32 + vl4r.v v20, (a2) # Unknown-size Folded Reload vdivu.vv v20, v20, v4 vsetvli zero, zero, e16, m2, ta, ma vnsrl.wi v0, v20, 0 vrsub.vx v20, v0, a6 - li t2, 128 - vsse16.v v20, (a3), t2 - vsoxei64.v v20, (t1), v24 - li t1, 32 - vsoxei64.v v20, (t1), v24 - li t1, 48 - vsoxei64.v v20, (t1), v24 - li t1, 64 - vsoxei64.v v20, (t1), v24 - li t1, 80 - vsoxei64.v v20, (t1), v24 - li t1, 96 - vsoxei64.v v20, (t1), v24 - li t1, 112 + li a2, 128 + vsse16.v v20, (a3), a2 vsoxei64.v v20, (t1), v24 + li a2, 32 + vsoxei64.v v20, (a2), v24 + li a2, 48 + vsoxei64.v v20, (a2), v24 + li a2, 64 + vsoxei64.v v20, (a2), v24 + li a2, 80 + vsoxei64.v v20, (a2), v24 + li a2, 96 + vsoxei64.v v20, (a2), v24 + li a2, 112 + vsoxei64.v v20, (a2), v24 vsetvli zero, zero, e32, m4, ta, ma - csrr t1, vlenb - slli t1, t1, 3 - add t1, sp, t1 - addi t1, t1, 32 - vl4r.v v20, (t1) # Unknown-size Folded Reload + csrr a2, vlenb + slli a2, a2, 3 + add a2, sp, a2 + addi a2, a2, 32 + vl4r.v v20, (a2) # Unknown-size Folded Reload vdivu.vv v20, v20, v4 vsetvli zero, zero, e16, m2, ta, ma vnsrl.wi v0, v20, 0 vrsub.vx v20, v0, a6 - li t1, 2 - vsoxei64.v v20, (t1), v24 - li t1, 18 - vsoxei64.v v20, (t1), v24 - li t1, 34 - vsoxei64.v v20, (t1), v24 - li t1, 50 - vsoxei64.v v20, (t1), v24 - li t1, 66 - vsoxei64.v v20, (t1), v24 - li t1, 82 - vsoxei64.v v20, (t1), v24 - li t1, 98 - vsoxei64.v v20, (t1), v24 - li t1, 114 - vsoxei64.v v20, (t1), v24 + li a2, 2 + vsoxei64.v v20, (a2), v24 + li a2, 18 + vsoxei64.v v20, (a2), v24 + li a2, 34 + vsoxei64.v v20, (a2), v24 + li a2, 50 + vsoxei64.v v20, (a2), v24 + li a2, 66 + vsoxei64.v v20, (a2), v24 + li a2, 82 + vsoxei64.v v20, (a2), v24 + li a2, 98 + vsoxei64.v v20, (a2), v24 + li a2, 114 + vsoxei64.v v20, (a2), v24 vsetvli zero, zero, e32, m4, ta, ma - csrr t1, vlenb - slli t1, t1, 2 - add t1, sp, t1 - addi t1, t1, 32 - vl4r.v v20, (t1) # Unknown-size Folded Reload + csrr a2, vlenb + slli a2, a2, 2 + add a2, sp, a2 + addi a2, a2, 32 + vl4r.v v20, (a2) # Unknown-size Folded Reload vdivu.vv v20, v20, v4 vsetvli zero, zero, e16, m2, ta, ma vnsrl.wi v0, v20, 0 vrsub.vx v20, v0, a6 - li t1, 4 - vsoxei64.v v20, (t1), v24 - li t1, 20 - vsoxei64.v v20, (t1), v24 - li t1, 36 - vsoxei64.v v20, (t1), v24 - li t1, 52 - vsoxei64.v v20, (t1), v24 - li t1, 68 - vsoxei64.v v20, (t1), v24 - li t1, 84 - vsoxei64.v v20, (t1), v24 - li t1, 100 - vsoxei64.v v20, (t1), v24 - li t1, 116 - vsoxei64.v v20, (t1), v24 + li a2, 4 + vsoxei64.v v20, (a2), v24 + li a2, 20 + vsoxei64.v v20, (a2), v24 + li a2, 36 + vsoxei64.v v20, (a2), v24 + li a2, 52 + vsoxei64.v v20, (a2), v24 + li a2, 68 + vsoxei64.v v20, (a2), v24 + li a2, 84 + vsoxei64.v v20, (a2), v24 + li a2, 100 + vsoxei64.v v20, (a2), v24 + li a2, 116 + vsoxei64.v v20, (a2), v24 vsetvli zero, zero, e32, m4, ta, ma - addi t1, sp, 32 - vl4r.v v20, (t1) # Unknown-size Folded Reload + addi a2, sp, 32 + vl4r.v v20, (a2) # Unknown-size Folded Reload vdivu.vv v20, v20, v4 vsetvli zero, zero, e16, m2, ta, ma vnsrl.wi v0, v20, 0 vrsub.vx v20, v0, a6 - li t1, 6 - vsoxei64.v v20, (t1), v24 - li t1, 22 - vsoxei64.v v20, (t1), v24 - li t1, 38 - vsoxei64.v v20, (t1), v24 - li t1, 54 - vsoxei64.v v20, (t1), v24 - li t1, 70 - vsoxei64.v v20, (t1), v24 - li t1, 86 - vsoxei64.v v20, (t1), v24 - li t1, 102 - vsoxei64.v v20, (t1), v24 - li t1, 118 - vsoxei64.v v20, (t1), v24 + li a2, 6 + vsoxei64.v v20, (a2), v24 + li a2, 22 + vsoxei64.v v20, (a2), v24 + li a2, 38 + vsoxei64.v v20, (a2), v24 + li a2, 54 + vsoxei64.v v20, (a2), v24 + li a2, 70 + vsoxei64.v v20, (a2), v24 + li a2, 86 + vsoxei64.v v20, (a2), v24 + li a2, 102 + vsoxei64.v v20, (a2), v24 + li a2, 118 + vsoxei64.v v20, (a2), v24 addi t1, s8, 1185 vsetvli zero, zero, e32, m4, ta, ma vmv.v.x v20, t1 @@ -553,22 +553,22 @@ vsetvli zero, zero, e16, m2, ta, ma vnsrl.wi v0, v20, 0 vrsub.vx v20, v0, a6 - li t1, 8 - vsoxei64.v v20, (t1), v24 - li t1, 24 - vsoxei64.v v20, (t1), v24 - li t1, 40 - vsoxei64.v v20, (t1), v24 - li t1, 56 - vsoxei64.v v20, (t1), v24 - li t1, 72 - vsoxei64.v v20, (t1), v24 - li t1, 88 - vsoxei64.v v20, (t1), v24 - li t1, 104 - vsoxei64.v v20, (t1), v24 - li t1, 120 - vsoxei64.v v20, (t1), v24 + li a2, 8 + vsoxei64.v v20, (a2), v24 + li a2, 24 + vsoxei64.v v20, (a2), v24 + li a2, 40 + vsoxei64.v v20, (a2), v24 + li a2, 56 + vsoxei64.v v20, (a2), v24 + li a2, 72 + vsoxei64.v v20, (a2), v24 + li a2, 88 + vsoxei64.v v20, (a2), v24 + li a2, 104 + vsoxei64.v v20, (a2), v24 + li a2, 120 + vsoxei64.v v20, (a2), v24 addi t1, s8, -1348 vsetvli zero, zero, e32, m4, ta, ma vmv.v.x v20, t1 @@ -576,19 +576,19 @@ vsetvli zero, zero, e16, m2, ta, ma vnsrl.wi v0, v20, 0 vrsub.vx v20, v0, a6 - li t1, 10 - vsoxei64.v v20, (t1), v24 - li t1, 26 - vsoxei64.v v20, (t1), v24 - li t1, 42 - vsoxei64.v v20, (t1), v24 - li t1, 58 - vsoxei64.v v20, (t1), v24 - li t1, 74 - vsoxei64.v v20, (t1), v24 - li t1, 90 - vsoxei64.v v20, (t1), v24 + li a2, 10 + vsoxei64.v v20, (a2), v24 + li a2, 26 + vsoxei64.v v20, (a2), v24 + li a2, 42 + vsoxei64.v v20, (a2), v24 + li a2, 58 + vsoxei64.v v20, (a2), v24 + li a2, 74 + vsoxei64.v v20, (a2), v24 + li a2, 90 vsoxei64.v v20, (a2), v24 + vsoxei64.v v20, (t2), v24 vsoxei64.v v20, (t3), v24 addi t1, s8, 1586 vsetvli zero, zero, e32, m4, ta, ma --- build.head//MicroBenchmarks/LCALS/SubsetCRawLoops/CMakeFiles/lcalsCRaw.dir/__/LCALSStats.s 2023-11-13 08:03:20.915600372 +0000 +++ build//MicroBenchmarks/LCALS/SubsetCRawLoops/CMakeFiles/lcalsCRaw.dir/__/LCALSStats.s 2023-11-13 08:03:15.951743859 +0000 @@ -1502,7 +1502,7 @@ sd a0, 80(sp) # 8-byte Folded Spill vslidedown.vi v8, v8, 1 vmv.x.s a0, v8 - sd a0, 48(sp) # 8-byte Folded Spill + sd a0, 64(sp) # 8-byte Folded Spill vsetivli zero, 2, e64, m2, ta, ma csrr a0, vlenb slli a0, a0, 2 @@ -1564,9 +1564,9 @@ vmv.x.s s11, v8 vsetivli zero, 1, e64, m1, ta, ma ld a0, 368(sp) - sd a0, 64(sp) # 8-byte Folded Spill - ld a0, 376(sp) sd a0, 56(sp) # 8-byte Folded Spill + ld a0, 376(sp) + sd a0, 48(sp) # 8-byte Folded Spill ld s9, 352(sp) ld s10, 360(sp) vslidedown.vi v8, v8, 1 @@ -1574,7 +1574,7 @@ mv a0, s4 mv a1, s3 ld a2, 72(sp) # 8-byte Folded Reload - ld a3, 48(sp) # 8-byte Folded Reload + ld a3, 64(sp) # 8-byte Folded Reload call __addtf3@plt ld a2, 104(sp) # 8-byte Folded Reload ld a3, 96(sp) # 8-byte Folded Reload @@ -1594,8 +1594,8 @@ mv a2, s9 mv a3, s10 call __addtf3@plt - ld a2, 64(sp) # 8-byte Folded Reload - ld a3, 56(sp) # 8-byte Folded Reload + ld a2, 56(sp) # 8-byte Folded Reload + ld a3, 48(sp) # 8-byte Folded Reload call __addtf3@plt mv s4, a0 mv s3, a1 --- build.head//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/Compress/BZip2Encoder.s 2023-11-13 08:03:21.231591238 +0000 +++ build//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/Compress/BZip2Encoder.s 2023-11-13 08:03:16.263734840 +0000 @@ -2973,8 +2973,6 @@ vsetvli zero, s6, e8, m2, ta, ma vmv.v.i v30, 0 li a4, 2 - sd s2, 184(sp) # 8-byte Folded Spill - sd ra, 200(sp) # 8-byte Folded Spill csrr a3, vlenb li a5, 14 mul a3, a3, a5 @@ -2986,6 +2984,8 @@ add a3, sp, a3 addi a3, a3, 1712 vs2r.v v30, (a3) # Unknown-size Folded Spill + sd s2, 184(sp) # 8-byte Folded Spill + sd ra, 200(sp) # 8-byte Folded Spill j .LBB29_72 .LBB29_71: # %for.inc493 # in Loop: Header=BB29_72 Depth=1 @@ -3312,14 +3312,14 @@ ld ra, 200(sp) # 8-byte Folded Reload li a1, 0 li a0, 0 - ld t5, 128(sp) # 8-byte Folded Reload - addi t6, sp, 208 csrr a2, vlenb li a3, 12 mul a2, a2, a3 add a2, sp, a2 addi a2, a2, 1712 vl2r.v v14, (a2) # Unknown-size Folded Reload + ld t5, 128(sp) # 8-byte Folded Reload + addi t6, sp, 208 .LBB29_109: # %do.body252 # Parent Loop BB29_72 Depth=1 # Parent Loop BB29_108 Depth=2 @@ -3569,14 +3569,14 @@ bgeu s11, a1, .LBB29_141 # %bb.140: # in Loop: Header=BB29_72 Depth=1 li a0, 0 - ld t5, 88(sp) # 8-byte Folded Reload - ld t6, 120(sp) # 8-byte Folded Reload - addi a2, sp, 208 csrr a1, vlenb slli a1, a1, 1 add a1, sp, a1 addi a1, a1, 1712 vl2r.v v30, (a1) # Unknown-size Folded Reload + ld t5, 88(sp) # 8-byte Folded Reload + ld t6, 120(sp) # 8-byte Folded Reload + addi a2, sp, 208 j .LBB29_144 .LBB29_141: # %vector.ph628 # in Loop: Header=BB29_72 Depth=1 @@ -3588,13 +3588,13 @@ mv a3, a0 addi a4, sp, 1712 vl2r.v v8, (a4) # Unknown-size Folded Reload - ld t5, 88(sp) # 8-byte Folded Reload - ld t6, 120(sp) # 8-byte Folded Reload csrr a4, vlenb slli a4, a4, 1 add a4, sp, a4 addi a4, a4, 1712 vl2r.v v30, (a4) # Unknown-size Folded Reload + ld t5, 88(sp) # 8-byte Folded Reload + ld t6, 120(sp) # 8-byte Folded Reload .LBB29_142: # %vector.body633 # Parent Loop BB29_72 Depth=1 # => This Inner Loop Header: Depth=2 --- build.head//SingleSource/Benchmarks/Misc/CMakeFiles/himenobmtxpa.dir/himenobmtxpa.s 2023-11-13 08:03:22.887543370 +0000 +++ build//SingleSource/Benchmarks/Misc/CMakeFiles/himenobmtxpa.dir/himenobmtxpa.s 2023-11-13 08:03:17.955685932 +0000 @@ -2311,12 +2311,12 @@ add t1, a0, t0 ld t3, 960(sp) # 8-byte Folded Reload add t3, t3, a4 - ld a4, 968(sp) # 8-byte Folded Reload - add s2, a4, t2 - add s6, a4, a5 - add a4, a4, s0 + ld s1, 968(sp) # 8-byte Folded Reload + add s2, s1, t2 + add s6, s1, a5 + add s1, s1, s0 ld s4, 984(sp) # 8-byte Folded Reload - add s1, s4, a6 + add a4, s4, a6 add a3, s4, a7 add s4, s4, t4 add s7, a0, t5 @@ -2366,13 +2366,13 @@ flw ft6, 0(s9) flw ft7, 4(s9) flw fa6, -4(s9) - add s9, s1, s8 + add s9, a4, s8 flw fa7, 0(s9) add s9, a1, s8 flw ft8, 8(s9) flw ft9, 4(a5) flw ft10, -4(a5) - add a5, a4, s8 + add a5, s1, s8 flw ft11, 0(a5) add a5, t0, s8 flw fs0, 8(a5) @@ -2429,8 +2429,8 @@ addi t4, t4, 4 addi s6, s6, 4 addi t0, t0, 4 - addi a4, a4, 4 addi s1, s1, 4 + addi a4, a4, 4 addi a3, a3, 4 addi s4, s4, 4 addi s7, s7, 4 --- build.head//SingleSource/Benchmarks/Adobe-C++/CMakeFiles/loop_unroll.dir/loop_unroll.s 2023-11-13 08:03:22.859544180 +0000 +++ build//SingleSource/Benchmarks/Adobe-C++/CMakeFiles/loop_unroll.dir/loop_unroll.s 2023-11-13 08:03:17.923686857 +0000 @@ -982,7 +982,7 @@ slli a3, a3, 6 sub sp, sp, a3 .cfi_escape 0x0f, 0x0f, 0x72, 0x00, 0x11, 0xa0, 0x02, 0x22, 0x11, 0xc0, 0x00, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 288 + 64 * vlenb - sd a2, 16(sp) # 8-byte Folded Spill + sd a2, 24(sp) # 8-byte Folded Spill sd a1, 152(sp) # 8-byte Folded Spill mv s2, a0 call clock@plt @@ -992,7 +992,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi42)(a1) .Lpcrel_hi41: auipc a2, %pcrel_hi(start_time) - sd a2, 24(sp) # 8-byte Folded Spill + sd a2, 32(sp) # 8-byte Folded Spill sd a0, %pcrel_lo(.Lpcrel_hi41)(a2) .Lpcrel_hi43: auipc a0, %pcrel_hi(current_test) @@ -1009,9 +1009,9 @@ ld a1, 152(sp) # 8-byte Folded Reload addi a1, a1, -31 slli a1, a1, 32 - srli s0, a1, 32 - mv a3, s0 - bltu a0, s0, .LBB6_4 + srli s3, a1, 32 + mv a3, s3 + bltu a0, s3, .LBB6_4 # %bb.3: # %for.cond1.preheader.us.preheader li a3, 32 .LBB6_4: # %for.cond1.preheader.us.preheader @@ -1114,7 +1114,6 @@ add a0, sp, a0 addi a0, a0, 176 vs4r.v v20, (a0) # Unknown-size Folded Spill - sd s0, 32(sp) # 8-byte Folded Spill j .LBB6_8 .LBB6_7: # %_Z9check_sumIiEvT_.exit.us # in Loop: Header=BB6_8 Depth=1 @@ -1140,17 +1139,16 @@ .LBB6_10: # %vector.ph241 # in Loop: Header=BB6_8 Depth=1 neg a0, s4 - li s0, 96 - li t4, 100 - li s6, 108 - li s8, 112 - li s9, 116 - li a2, 120 + li s6, 88 + li s9, 92 + li t4, 96 + li s1, 100 + li a2, 104 + li s8, 108 + li t5, 112 + li s10, 120 li t6, 124 - li s1, 104 - li s10, 76 - li s3, 80 - li t5, 60 + li s0, 116 ld a3, 120(sp) # 8-byte Folded Reload and a5, a3, a0 slli a0, a5, 5 @@ -1336,7 +1334,8 @@ addi a0, a0, 176 vs2r.v v16, (a0) # Unknown-size Folded Spill vsetvli zero, zero, e64, m4, ta, ma - vor.vx v8, v20, t5 + li a4, 60 + vor.vx v8, v20, a4 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v16, (s2), v8 csrr a0, vlenb @@ -1379,7 +1378,8 @@ addi a0, a0, 176 vs2r.v v16, (a0) # Unknown-size Folded Spill vsetvli zero, zero, e64, m4, ta, ma - vor.vx v8, v20, s10 + li a4, 76 + vor.vx v8, v20, a4 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v16, (s2), v8 csrr a0, vlenb @@ -1389,7 +1389,8 @@ addi a0, a0, 176 vs2r.v v16, (a0) # Unknown-size Folded Spill vsetvli zero, zero, e64, m4, ta, ma - vor.vx v8, v20, s3 + li a4, 80 + vor.vx v8, v20, a4 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v16, (s2), v8 csrr a4, vlenb @@ -1405,41 +1406,39 @@ vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v4, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma - li a4, 88 - vor.vx v8, v20, a4 + vor.vx v8, v20, s6 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v6, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma - li a4, 92 - vor.vx v8, v20, a4 + vor.vx v8, v20, s9 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v2, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma - vor.vx v8, v20, s0 + vor.vx v8, v20, t4 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v0, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma - vor.vx v8, v20, t4 + vor.vx v8, v20, s1 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v30, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma - vor.vx v8, v20, s1 + vor.vx v8, v20, a2 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v28, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma - vor.vx v8, v20, s6 + vor.vx v8, v20, s8 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v26, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma - vor.vx v8, v20, s8 + vor.vx v8, v20, t5 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v24, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma - vor.vx v8, v20, s9 + vor.vx v8, v20, s0 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v18, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma - vor.vx v8, v20, a2 + vor.vx v8, v20, s10 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v16, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma @@ -1648,7 +1647,6 @@ add a3, sp, a3 addi a3, a3, 176 vl4r.v v20, (a3) # Unknown-size Folded Reload - ld s0, 32(sp) # 8-byte Folded Reload j .LBB6_17 .LBB6_14: # in Loop: Header=BB6_8 Depth=1 csrr a2, vlenb @@ -1669,7 +1667,6 @@ add a2, sp, a2 addi a2, a2, 176 vl4r.v v20, (a2) # Unknown-size Folded Reload - ld s0, 32(sp) # 8-byte Folded Reload ld a2, 56(sp) # 8-byte Folded Reload .LBB6_15: # %for.body3.us.preheader # in Loop: Header=BB6_8 Depth=1 @@ -1745,7 +1742,7 @@ addi a0, a0, 32 addi a2, a2, 32 addi a3, a3, 128 - bltu a0, s0, .LBB6_16 + bltu a0, s3, .LBB6_16 .LBB6_17: # %for.cond1.for.cond4.preheader_crit_edge.us # in Loop: Header=BB6_8 Depth=1 sext.w a0, a0 @@ -1851,6 +1848,7 @@ .Lpcrel_hi48: auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi48) + mv s9, s3 call printf@plt li t3, 36 li t2, 28 @@ -2029,7 +2027,7 @@ ld s4, 96(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi43)(s4) mv s1, a0 - ld a0, 24(sp) # 8-byte Folded Reload + ld a0, 32(sp) # 8-byte Folded Reload ld s0, %pcrel_lo(.Lpcrel_hi41)(a0) snez a0, a2 slt a4, a1, a3 @@ -2059,7 +2057,7 @@ slli a0, a1, 4 add a0, a2, a0 fsd fa5, 0(a0) - ld a2, 16(sp) # 8-byte Folded Reload + ld a2, 24(sp) # 8-byte Folded Reload sd a2, 8(a0) addi a1, a1, 1 sw a1, %pcrel_lo(.Lpcrel_hi43)(s4) @@ -12196,6 +12194,8 @@ lw a1, %pcrel_lo(.Lpcrel_hi297)(a0) mv a0, s3 call printf@plt + ld t2, 56(sp) # 8-byte Folded Reload + ld t1, 64(sp) # 8-byte Folded Reload addi a0, sp, 96 vl4r.v v20, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -12203,8 +12203,6 @@ add a0, sp, a0 addi a0, a0, 96 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t2, 56(sp) # 8-byte Folded Reload - ld t1, 64(sp) # 8-byte Folded Reload ld a0, 72(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi296)(a0) j .LBB25_28 @@ -12744,6 +12742,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi311)(a0) mv a0, s3 call printf@plt + ld t1, 80(sp) # 8-byte Folded Reload csrr a0, vlenb add a0, sp, a0 addi a0, a0, 112 @@ -12754,7 +12753,6 @@ add a0, sp, a0 addi a0, a0, 112 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t1, 80(sp) # 8-byte Folded Reload ld a0, 88(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi310)(a0) j .LBB26_28 @@ -13265,6 +13263,8 @@ lw a1, %pcrel_lo(.Lpcrel_hi326)(a0) mv a0, s3 call printf@plt + ld t0, 56(sp) # 8-byte Folded Reload + ld a7, 64(sp) # 8-byte Folded Reload addi a0, sp, 96 vl4r.v v20, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -13272,8 +13272,6 @@ add a0, sp, a0 addi a0, a0, 96 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t0, 56(sp) # 8-byte Folded Reload - ld a7, 64(sp) # 8-byte Folded Reload ld a0, 72(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi325)(a0) j .LBB27_28 @@ -13807,6 +13805,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi341)(a0) mv a0, s3 call printf@plt + ld t1, 80(sp) # 8-byte Folded Reload csrr a0, vlenb add a0, sp, a0 addi a0, a0, 112 @@ -13817,7 +13816,6 @@ add a0, sp, a0 addi a0, a0, 112 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t1, 80(sp) # 8-byte Folded Reload ld a0, 88(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi340)(a0) j .LBB28_28 @@ -14389,6 +14387,8 @@ lw a1, %pcrel_lo(.Lpcrel_hi356)(a0) mv a0, s3 call printf@plt + ld t1, 56(sp) # 8-byte Folded Reload + ld t0, 64(sp) # 8-byte Folded Reload addi a0, sp, 96 vl4r.v v20, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -14396,8 +14396,6 @@ add a0, sp, a0 addi a0, a0, 96 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t1, 56(sp) # 8-byte Folded Reload - ld t0, 64(sp) # 8-byte Folded Reload ld a0, 72(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi355)(a0) j .LBB30_28 @@ -14917,6 +14915,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi371)(a0) mv a0, s3 call printf@plt + ld t1, 80(sp) # 8-byte Folded Reload csrr a0, vlenb add a0, sp, a0 addi a0, a0, 112 @@ -14927,7 +14926,6 @@ add a0, sp, a0 addi a0, a0, 112 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t1, 80(sp) # 8-byte Folded Reload ld a0, 88(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi370)(a0) j .LBB31_28 @@ -15421,10 +15419,10 @@ lw a1, %pcrel_lo(.Lpcrel_hi385)(a0) mv a0, s3 call printf@plt - addi a0, sp, 96 - vl4r.v v24, (a0) # Unknown-size Folded Reload ld t1, 56(sp) # 8-byte Folded Reload ld t0, 64(sp) # 8-byte Folded Reload + addi a0, sp, 96 + vl4r.v v24, (a0) # Unknown-size Folded Reload ld a0, 72(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi384)(a0) j .LBB32_28 @@ -15978,6 +15976,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi400)(a0) mv a0, s3 call printf@plt + ld t5, 64(sp) # 8-byte Folded Reload csrr a0, vlenb add a0, sp, a0 addi a0, a0, 96 @@ -15988,7 +15987,6 @@ add a0, sp, a0 addi a0, a0, 96 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t5, 64(sp) # 8-byte Folded Reload ld a0, 72(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi399)(a0) j .LBB33_29 @@ -16481,6 +16479,8 @@ lw a1, %pcrel_lo(.Lpcrel_hi414)(a0) mv a0, s3 call printf@plt + ld t1, 56(sp) # 8-byte Folded Reload + ld t0, 64(sp) # 8-byte Folded Reload addi a0, sp, 96 vl4r.v v20, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -16488,8 +16488,6 @@ add a0, sp, a0 addi a0, a0, 96 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t1, 56(sp) # 8-byte Folded Reload - ld t0, 64(sp) # 8-byte Folded Reload ld a0, 72(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi413)(a0) j .LBB34_28 @@ -16997,6 +16995,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi429)(a0) mv a0, s3 call printf@plt + ld t0, 80(sp) # 8-byte Folded Reload csrr a0, vlenb add a0, sp, a0 addi a0, a0, 112 @@ -17007,7 +17006,6 @@ add a0, sp, a0 addi a0, a0, 112 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t0, 80(sp) # 8-byte Folded Reload ld a0, 88(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi428)(a0) j .LBB35_28 @@ -17484,6 +17482,8 @@ lw a1, %pcrel_lo(.Lpcrel_hi443)(a0) mv a0, s3 call printf@plt + ld t1, 56(sp) # 8-byte Folded Reload + ld t0, 64(sp) # 8-byte Folded Reload addi a0, sp, 96 vl4r.v v20, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -17491,8 +17491,6 @@ add a0, sp, a0 addi a0, a0, 96 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t1, 56(sp) # 8-byte Folded Reload - ld t0, 64(sp) # 8-byte Folded Reload ld a0, 72(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi442)(a0) j .LBB36_28 @@ -18462,6 +18460,8 @@ lw a1, %pcrel_lo(.Lpcrel_hi471)(a0) mv a0, s3 call printf@plt + ld t1, 56(sp) # 8-byte Folded Reload + ld t0, 64(sp) # 8-byte Folded Reload addi a0, sp, 96 vl2r.v v14, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -18469,8 +18469,6 @@ add a0, sp, a0 addi a0, a0, 96 vl1r.v v12, (a0) # Unknown-size Folded Reload - ld t1, 56(sp) # 8-byte Folded Reload - ld t0, 64(sp) # 8-byte Folded Reload ld a0, 72(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi470)(a0) j .LBB38_28 @@ -19346,7 +19344,7 @@ slli a3, a3, 6 sub sp, sp, a3 .cfi_escape 0x0f, 0x0f, 0x72, 0x00, 0x11, 0xa0, 0x02, 0x22, 0x11, 0xc0, 0x00, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 288 + 64 * vlenb - sd a2, 16(sp) # 8-byte Folded Spill + sd a2, 24(sp) # 8-byte Folded Spill sd a1, 152(sp) # 8-byte Folded Spill mv s2, a0 call clock@plt @@ -19356,7 +19354,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi510)(a1) .Lpcrel_hi509: auipc a2, %pcrel_hi(start_time) - sd a2, 24(sp) # 8-byte Folded Spill + sd a2, 32(sp) # 8-byte Folded Spill sd a0, %pcrel_lo(.Lpcrel_hi509)(a2) .Lpcrel_hi511: auipc a0, %pcrel_hi(current_test) @@ -19373,9 +19371,9 @@ ld a1, 152(sp) # 8-byte Folded Reload addi a1, a1, -31 slli a1, a1, 32 - srli s0, a1, 32 - mv a3, s0 - bltu a0, s0, .LBB41_4 + srli s3, a1, 32 + mv a3, s3 + bltu a0, s3, .LBB41_4 # %bb.3: # %while.cond.preheader.us.preheader li a3, 32 .LBB41_4: # %while.cond.preheader.us.preheader @@ -19478,7 +19476,6 @@ add a0, sp, a0 addi a0, a0, 176 vs4r.v v0, (a0) # Unknown-size Folded Spill - sd s0, 32(sp) # 8-byte Folded Spill j .LBB41_8 .LBB41_7: # %_Z9check_sumIiEvT_.exit.us # in Loop: Header=BB41_8 Depth=1 @@ -19504,17 +19501,16 @@ .LBB41_10: # %vector.ph241 # in Loop: Header=BB41_8 Depth=1 neg a0, s4 - li t4, 108 + li s9, 88 + li ra, 92 + li a1, 96 + li t4, 100 + li s1, 104 + li t5, 108 li s8, 112 - li s9, 116 - li a1, 120 - li s1, 124 - li s10, 76 - li t6, 80 - li ra, 84 - li s3, 92 - li s0, 88 - li t5, 60 + li s10, 120 + li t6, 124 + li s0, 116 ld a2, 120(sp) # 8-byte Folded Reload and a5, a2, a0 slli a0, a5, 5 @@ -19700,7 +19696,8 @@ addi a0, a0, 176 vs2r.v v16, (a0) # Unknown-size Folded Spill vsetvli zero, zero, e64, m4, ta, ma - vor.vx v8, v20, t5 + li a4, 60 + vor.vx v8, v20, a4 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v16, (s2), v8 csrr a0, vlenb @@ -19743,7 +19740,8 @@ addi a0, a0, 176 vs2r.v v16, (a0) # Unknown-size Folded Spill vsetvli zero, zero, e64, m4, ta, ma - vor.vx v8, v20, s10 + li a4, 76 + vor.vx v8, v20, a4 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v16, (s2), v8 csrr a0, vlenb @@ -19753,7 +19751,8 @@ addi a0, a0, 176 vs2r.v v16, (a0) # Unknown-size Folded Spill vsetvli zero, zero, e64, m4, ta, ma - vor.vx v8, v20, t6 + li a4, 80 + vor.vx v8, v20, a4 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v16, (s2), v8 csrr a4, vlenb @@ -19764,34 +19763,32 @@ addi a4, a4, 176 vs2r.v v16, (a4) # Unknown-size Folded Spill vsetvli zero, zero, e64, m4, ta, ma - vor.vx v8, v20, ra + li a4, 84 + vor.vx v8, v20, a4 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v4, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma - vor.vx v8, v20, s0 + vor.vx v8, v20, s9 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v6, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma - vor.vx v8, v20, s3 + vor.vx v8, v20, ra vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v2, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma - li a4, 96 - vor.vx v8, v20, a4 + vor.vx v8, v20, a1 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v0, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma - li a4, 100 - vor.vx v8, v20, a4 + vor.vx v8, v20, t4 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v30, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma - li a4, 104 - vor.vx v8, v20, a4 + vor.vx v8, v20, s1 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v28, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma - vor.vx v8, v20, t4 + vor.vx v8, v20, t5 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v26, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma @@ -19799,15 +19796,15 @@ vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v24, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma - vor.vx v8, v20, s9 + vor.vx v8, v20, s0 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v18, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma - vor.vx v8, v20, a1 + vor.vx v8, v20, s10 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v16, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma - vor.vx v8, v20, s1 + vor.vx v8, v20, t6 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v20, (s2), v8 sd a0, 8(sp) @@ -20012,7 +20009,6 @@ add a2, sp, a2 addi a2, a2, 176 vl4r.v v0, (a2) # Unknown-size Folded Reload - ld s0, 32(sp) # 8-byte Folded Reload j .LBB41_17 .LBB41_14: # in Loop: Header=BB41_8 Depth=1 csrr a1, vlenb @@ -20033,7 +20029,6 @@ add a1, sp, a1 addi a1, a1, 176 vl4r.v v0, (a1) # Unknown-size Folded Reload - ld s0, 32(sp) # 8-byte Folded Reload ld a1, 56(sp) # 8-byte Folded Reload .LBB41_15: # %while.body.us.preheader # in Loop: Header=BB41_8 Depth=1 @@ -20103,7 +20098,7 @@ addi a0, a0, 32 addi a1, a1, 32 addi a2, a2, 128 - bltu a0, s0, .LBB41_16 + bltu a0, s3, .LBB41_16 .LBB41_17: # %while.cond.while.cond2.preheader_crit_edge.us # in Loop: Header=BB41_8 Depth=1 sext.w a0, a0 @@ -20386,7 +20381,7 @@ ld s4, 96(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi511)(s4) mv s1, a0 - ld a0, 24(sp) # 8-byte Folded Reload + ld a0, 32(sp) # 8-byte Folded Reload ld s0, %pcrel_lo(.Lpcrel_hi509)(a0) snez a0, a2 slt a4, a1, a3 @@ -20416,7 +20411,7 @@ slli a0, a1, 4 add a0, a2, a0 fsd fa5, 0(a0) - ld a2, 16(sp) # 8-byte Folded Reload + ld a2, 24(sp) # 8-byte Folded Reload sd a2, 8(a0) addi a1, a1, 1 sw a1, %pcrel_lo(.Lpcrel_hi511)(s4) @@ -30553,6 +30548,8 @@ lw a1, %pcrel_lo(.Lpcrel_hi765)(a0) mv a0, s3 call printf@plt + ld t2, 56(sp) # 8-byte Folded Reload + ld t1, 64(sp) # 8-byte Folded Reload addi a0, sp, 96 vl4r.v v20, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -30560,8 +30557,6 @@ add a0, sp, a0 addi a0, a0, 96 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t2, 56(sp) # 8-byte Folded Reload - ld t1, 64(sp) # 8-byte Folded Reload ld a0, 72(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi764)(a0) j .LBB60_28 @@ -31101,6 +31096,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi779)(a0) mv a0, s3 call printf@plt + ld t1, 80(sp) # 8-byte Folded Reload csrr a0, vlenb add a0, sp, a0 addi a0, a0, 112 @@ -31111,7 +31107,6 @@ add a0, sp, a0 addi a0, a0, 112 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t1, 80(sp) # 8-byte Folded Reload ld a0, 88(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi778)(a0) j .LBB61_28 @@ -31622,6 +31617,8 @@ lw a1, %pcrel_lo(.Lpcrel_hi794)(a0) mv a0, s3 call printf@plt + ld t0, 56(sp) # 8-byte Folded Reload + ld a7, 64(sp) # 8-byte Folded Reload addi a0, sp, 96 vl4r.v v20, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -31629,8 +31626,6 @@ add a0, sp, a0 addi a0, a0, 96 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t0, 56(sp) # 8-byte Folded Reload - ld a7, 64(sp) # 8-byte Folded Reload ld a0, 72(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi793)(a0) j .LBB62_28 @@ -32164,6 +32159,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi809)(a0) mv a0, s3 call printf@plt + ld t1, 80(sp) # 8-byte Folded Reload csrr a0, vlenb add a0, sp, a0 addi a0, a0, 112 @@ -32174,7 +32170,6 @@ add a0, sp, a0 addi a0, a0, 112 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t1, 80(sp) # 8-byte Folded Reload ld a0, 88(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi808)(a0) j .LBB63_28 @@ -32746,6 +32741,8 @@ lw a1, %pcrel_lo(.Lpcrel_hi824)(a0) mv a0, s3 call printf@plt + ld t1, 56(sp) # 8-byte Folded Reload + ld t0, 64(sp) # 8-byte Folded Reload addi a0, sp, 96 vl4r.v v20, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -32753,8 +32750,6 @@ add a0, sp, a0 addi a0, a0, 96 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t1, 56(sp) # 8-byte Folded Reload - ld t0, 64(sp) # 8-byte Folded Reload ld a0, 72(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi823)(a0) j .LBB65_28 @@ -33274,6 +33269,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi839)(a0) mv a0, s3 call printf@plt + ld t1, 80(sp) # 8-byte Folded Reload csrr a0, vlenb add a0, sp, a0 addi a0, a0, 112 @@ -33284,7 +33280,6 @@ add a0, sp, a0 addi a0, a0, 112 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t1, 80(sp) # 8-byte Folded Reload ld a0, 88(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi838)(a0) j .LBB66_28 @@ -33778,10 +33773,10 @@ lw a1, %pcrel_lo(.Lpcrel_hi853)(a0) mv a0, s3 call printf@plt - addi a0, sp, 96 - vl4r.v v24, (a0) # Unknown-size Folded Reload ld t1, 56(sp) # 8-byte Folded Reload ld t0, 64(sp) # 8-byte Folded Reload + addi a0, sp, 96 + vl4r.v v24, (a0) # Unknown-size Folded Reload ld a0, 72(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi852)(a0) j .LBB67_28 @@ -34335,6 +34330,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi868)(a0) mv a0, s3 call printf@plt + ld t5, 64(sp) # 8-byte Folded Reload csrr a0, vlenb add a0, sp, a0 addi a0, a0, 96 @@ -34345,7 +34341,6 @@ add a0, sp, a0 addi a0, a0, 96 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t5, 64(sp) # 8-byte Folded Reload ld a0, 72(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi867)(a0) j .LBB68_29 @@ -34838,6 +34833,8 @@ lw a1, %pcrel_lo(.Lpcrel_hi882)(a0) mv a0, s3 call printf@plt + ld t1, 56(sp) # 8-byte Folded Reload + ld t0, 64(sp) # 8-byte Folded Reload addi a0, sp, 96 vl4r.v v20, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -34845,8 +34842,6 @@ add a0, sp, a0 addi a0, a0, 96 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t1, 56(sp) # 8-byte Folded Reload - ld t0, 64(sp) # 8-byte Folded Reload ld a0, 72(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi881)(a0) j .LBB69_28 @@ -35354,6 +35349,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi897)(a0) mv a0, s3 call printf@plt + ld t0, 80(sp) # 8-byte Folded Reload csrr a0, vlenb add a0, sp, a0 addi a0, a0, 112 @@ -35364,7 +35360,6 @@ add a0, sp, a0 addi a0, a0, 112 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t0, 80(sp) # 8-byte Folded Reload ld a0, 88(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi896)(a0) j .LBB70_28 @@ -35841,6 +35836,8 @@ lw a1, %pcrel_lo(.Lpcrel_hi911)(a0) mv a0, s3 call printf@plt + ld t1, 56(sp) # 8-byte Folded Reload + ld t0, 64(sp) # 8-byte Folded Reload addi a0, sp, 96 vl4r.v v20, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -35848,8 +35845,6 @@ add a0, sp, a0 addi a0, a0, 96 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t1, 56(sp) # 8-byte Folded Reload - ld t0, 64(sp) # 8-byte Folded Reload ld a0, 72(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi910)(a0) j .LBB71_28 @@ -36819,6 +36814,8 @@ lw a1, %pcrel_lo(.Lpcrel_hi939)(a0) mv a0, s3 call printf@plt + ld t1, 56(sp) # 8-byte Folded Reload + ld t0, 64(sp) # 8-byte Folded Reload addi a0, sp, 96 vl2r.v v14, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -36826,8 +36823,6 @@ add a0, sp, a0 addi a0, a0, 96 vl1r.v v12, (a0) # Unknown-size Folded Reload - ld t1, 56(sp) # 8-byte Folded Reload - ld t0, 64(sp) # 8-byte Folded Reload ld a0, 72(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi938)(a0) j .LBB73_28 @@ -37703,7 +37698,7 @@ slli a3, a3, 6 sub sp, sp, a3 .cfi_escape 0x0f, 0x0f, 0x72, 0x00, 0x11, 0x90, 0x02, 0x22, 0x11, 0xc0, 0x00, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 272 + 64 * vlenb - sd a2, 16(sp) # 8-byte Folded Spill + sd a2, 24(sp) # 8-byte Folded Spill sd a1, 128(sp) # 8-byte Folded Spill mv s2, a0 call clock@plt @@ -37713,7 +37708,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi978)(a1) .Lpcrel_hi977: auipc a2, %pcrel_hi(start_time) - sd a2, 24(sp) # 8-byte Folded Spill + sd a2, 32(sp) # 8-byte Folded Spill sd a0, %pcrel_lo(.Lpcrel_hi977)(a2) .Lpcrel_hi979: auipc a0, %pcrel_hi(current_test) @@ -37740,7 +37735,7 @@ li a3, 32 .LBB76_4: # %for.body.us.preheader sd zero, 104(sp) # 8-byte Folded Spill - addi s0, a0, -1608 + addi s9, a0, -1608 addi a0, a1, 1536 sd a0, 80(sp) # 8-byte Folded Spill addi s11, a2, 1957 @@ -37824,7 +37819,6 @@ add a0, sp, a0 addi a0, a0, 160 vs4r.v v0, (a0) # Unknown-size Folded Spill - sd s0, 32(sp) # 8-byte Folded Spill j .LBB76_6 .LBB76_5: # %_Z9check_sumIiEvT_.exit.us # in Loop: Header=BB76_6 Depth=1 @@ -37850,17 +37844,16 @@ .LBB76_8: # %vector.ph236 # in Loop: Header=BB76_6 Depth=1 neg a0, s4 - li s9, 84 li t4, 88 li s5, 92 - li t5, 100 - li s8, 104 - li a1, 108 - li t6, 112 + li t5, 96 + li s8, 100 + li a1, 104 + li t6, 108 li s10, 116 - li s0, 120 - li ra, 124 - li s1, 96 + li ra, 120 + li s1, 124 + li s0, 112 ld a2, 112(sp) # 8-byte Folded Reload and a5, a2, a0 slli a0, a5, 5 @@ -38113,7 +38106,8 @@ addi a4, a4, 160 vs2r.v v16, (a4) # Unknown-size Folded Spill vsetvli zero, zero, e64, m4, ta, ma - vor.vx v8, v20, s9 + li a4, 84 + vor.vx v8, v20, a4 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v4, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma @@ -38125,23 +38119,23 @@ vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v2, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma - vor.vx v8, v20, s1 + vor.vx v8, v20, t5 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v0, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma - vor.vx v8, v20, t5 + vor.vx v8, v20, s8 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v30, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma - vor.vx v8, v20, s8 + vor.vx v8, v20, a1 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v28, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma - vor.vx v8, v20, a1 + vor.vx v8, v20, t6 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v26, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma - vor.vx v8, v20, t6 + vor.vx v8, v20, s0 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v24, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma @@ -38149,11 +38143,11 @@ vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v18, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma - vor.vx v8, v20, s0 + vor.vx v8, v20, ra vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v16, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma - vor.vx v8, v20, ra + vor.vx v8, v20, s1 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v20, (s2), v8 sd a0, 8(sp) @@ -38358,7 +38352,6 @@ add a2, sp, a2 addi a2, a2, 160 vl4r.v v0, (a2) # Unknown-size Folded Reload - ld s0, 32(sp) # 8-byte Folded Reload j .LBB76_15 .LBB76_12: # in Loop: Header=BB76_6 Depth=1 csrr a1, vlenb @@ -38379,7 +38372,6 @@ add a1, sp, a1 addi a1, a1, 160 vl4r.v v0, (a1) # Unknown-size Folded Reload - ld s0, 32(sp) # 8-byte Folded Reload ld a1, 48(sp) # 8-byte Folded Reload .LBB76_13: # %do.body.us.preheader # in Loop: Header=BB76_6 Depth=1 @@ -38508,7 +38500,7 @@ vl2re32.v v10, (a1) vsetvli a4, zero, e32, m2, ta, ma vmadd.vx v10, s11, v8 - vadd.vx v8, v10, s0 + vadd.vx v8, v10, s9 sub a3, a3, s4 ld a4, 136(sp) # 8-byte Folded Reload add a1, a1, a4 @@ -38531,7 +38523,7 @@ # => This Inner Loop Header: Depth=2 lw a2, 0(a1) mul a2, a2, s11 - add a3, a3, s0 + add a3, a3, s9 addw a3, a3, a2 addi a0, a0, -1 addi a1, a1, 4 @@ -38731,7 +38723,7 @@ ld s4, 88(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi979)(s4) mv s1, a0 - ld a0, 24(sp) # 8-byte Folded Reload + ld a0, 32(sp) # 8-byte Folded Reload ld s0, %pcrel_lo(.Lpcrel_hi977)(a0) snez a0, a2 slt a4, a1, a3 @@ -38761,7 +38753,7 @@ slli a0, a1, 4 add a0, a2, a0 fsd fa5, 0(a0) - ld a2, 16(sp) # 8-byte Folded Reload + ld a2, 24(sp) # 8-byte Folded Reload sd a2, 8(a0) addi a1, a1, 1 sw a1, %pcrel_lo(.Lpcrel_hi979)(s4) @@ -39482,13 +39474,13 @@ csrr a1, vlenb srli s10, a1, 1 li a0, 60 - mul s6, a1, a0 + mul s0, a1, a0 addi a0, s2, 104 sd a0, 56(sp) # 8-byte Folded Spill sd a1, 40(sp) # 8-byte Folded Spill slli t5, a1, 1 lui a0, 51266 - addi s0, a0, 912 + addi s6, a0, 912 vsetvli a0, zero, e32, m1, ta, ma vmv.v.i v8, 0 addi a0, sp, 96 @@ -39649,11 +39641,11 @@ vadd.vv v10, v10, v16 vadd.vv v10, v10, v22 vmadd.vx v10, s11, v8 - vadd.vx v8, v10, s0 + vadd.vx v8, v10, s6 vsetvli zero, zero, e64, m4, ta, ma vadd.vx v12, v12, a4 sub a5, a5, s10 - add a3, a3, s6 + add a3, a3, s0 bnez a5, .LBB78_9 # %bb.10: # %middle.block273 # in Loop: Header=BB78_6 Depth=1 @@ -39698,7 +39690,7 @@ add a4, a4, a5 add a4, a6, a4 mul a4, a4, s11 - add a3, a3, s0 + add a3, a3, s6 addw a3, a3, a4 addi a0, a0, 30 addi a1, a1, 30 @@ -48701,6 +48693,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi1233)(a0) mv a0, s3 call printf@plt + ld t1, 64(sp) # 8-byte Folded Reload addi a0, sp, 96 vl4r.v v20, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -48708,7 +48701,6 @@ add a0, sp, a0 addi a0, a0, 96 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t1, 64(sp) # 8-byte Folded Reload ld a0, 72(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi1232)(a0) j .LBB95_26 @@ -49241,6 +49233,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi1247)(a0) mv a0, s3 call printf@plt + ld t1, 64(sp) # 8-byte Folded Reload csrr a0, vlenb add a0, sp, a0 addi a0, a0, 96 @@ -49251,7 +49244,6 @@ add a0, sp, a0 addi a0, a0, 96 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t1, 64(sp) # 8-byte Folded Reload ld a0, 72(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi1246)(a0) j .LBB96_26 @@ -49756,6 +49748,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi1262)(a0) mv a0, s3 call printf@plt + ld a7, 64(sp) # 8-byte Folded Reload addi a0, sp, 96 vl4r.v v20, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -49763,7 +49756,6 @@ add a0, sp, a0 addi a0, a0, 96 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld a7, 64(sp) # 8-byte Folded Reload ld a0, 72(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi1261)(a0) j .LBB97_26 @@ -50290,6 +50282,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi1277)(a0) mv a0, s3 call printf@plt + ld t1, 64(sp) # 8-byte Folded Reload csrr a0, vlenb add a0, sp, a0 addi a0, a0, 96 @@ -50300,7 +50293,6 @@ add a0, sp, a0 addi a0, a0, 96 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t1, 64(sp) # 8-byte Folded Reload ld a0, 72(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi1276)(a0) j .LBB98_26 @@ -50865,6 +50857,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi1292)(a0) mv a0, s3 call printf@plt + ld t0, 48(sp) # 8-byte Folded Reload addi a0, sp, 80 vl4r.v v20, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -50872,7 +50865,6 @@ add a0, sp, a0 addi a0, a0, 80 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t0, 48(sp) # 8-byte Folded Reload ld a0, 56(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi1291)(a0) j .LBB100_26 @@ -51386,6 +51378,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi1307)(a0) mv a0, s3 call printf@plt + ld t1, 64(sp) # 8-byte Folded Reload csrr a0, vlenb add a0, sp, a0 addi a0, a0, 96 @@ -51396,7 +51389,6 @@ add a0, sp, a0 addi a0, a0, 96 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t1, 64(sp) # 8-byte Folded Reload ld a0, 72(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi1306)(a0) j .LBB101_26 @@ -51885,9 +51877,9 @@ lw a1, %pcrel_lo(.Lpcrel_hi1321)(a0) mv a0, s3 call printf@plt + ld t0, 48(sp) # 8-byte Folded Reload addi a0, sp, 80 vl4r.v v24, (a0) # Unknown-size Folded Reload - ld t0, 48(sp) # 8-byte Folded Reload ld a0, 56(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi1320)(a0) j .LBB102_26 @@ -52430,6 +52422,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi1336)(a0) mv a0, s3 call printf@plt + ld t5, 64(sp) # 8-byte Folded Reload csrr a0, vlenb add a0, sp, a0 addi a0, a0, 96 @@ -52440,7 +52433,6 @@ add a0, sp, a0 addi a0, a0, 96 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t5, 64(sp) # 8-byte Folded Reload ld a0, 72(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi1335)(a0) j .LBB103_27 @@ -52922,6 +52914,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi1350)(a0) mv a0, s3 call printf@plt + ld t0, 48(sp) # 8-byte Folded Reload addi a0, sp, 80 vl4r.v v20, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -52929,7 +52922,6 @@ add a0, sp, a0 addi a0, a0, 80 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t0, 48(sp) # 8-byte Folded Reload ld a0, 56(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi1349)(a0) j .LBB104_26 @@ -53431,6 +53423,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi1365)(a0) mv a0, s3 call printf@plt + ld t0, 64(sp) # 8-byte Folded Reload csrr a0, vlenb add a0, sp, a0 addi a0, a0, 96 @@ -53441,7 +53434,6 @@ add a0, sp, a0 addi a0, a0, 96 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t0, 64(sp) # 8-byte Folded Reload ld a0, 72(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi1364)(a0) j .LBB105_26 @@ -53913,6 +53905,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi1379)(a0) mv a0, s3 call printf@plt + ld t0, 48(sp) # 8-byte Folded Reload addi a0, sp, 80 vl4r.v v20, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -53920,7 +53913,6 @@ add a0, sp, a0 addi a0, a0, 80 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t0, 48(sp) # 8-byte Folded Reload ld a0, 56(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi1378)(a0) j .LBB106_26 @@ -54878,6 +54870,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi1407)(a0) mv a0, s3 call printf@plt + ld t0, 64(sp) # 8-byte Folded Reload addi a0, sp, 96 vl2r.v v14, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -54885,7 +54878,6 @@ add a0, sp, a0 addi a0, a0, 96 vl1r.v v12, (a0) # Unknown-size Folded Reload - ld t0, 64(sp) # 8-byte Folded Reload ld a0, 72(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi1406)(a0) j .LBB108_26 @@ -55753,7 +55745,7 @@ slli a3, a3, 6 sub sp, sp, a3 .cfi_escape 0x0f, 0x0f, 0x72, 0x00, 0x11, 0x90, 0x02, 0x22, 0x11, 0xc0, 0x00, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 272 + 64 * vlenb - sd a2, 16(sp) # 8-byte Folded Spill + sd a2, 24(sp) # 8-byte Folded Spill sd a1, 128(sp) # 8-byte Folded Spill mv s2, a0 call clock@plt @@ -55763,7 +55755,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi1445)(a1) .Lpcrel_hi1444: auipc a2, %pcrel_hi(start_time) - sd a2, 24(sp) # 8-byte Folded Spill + sd a2, 32(sp) # 8-byte Folded Spill sd a0, %pcrel_lo(.Lpcrel_hi1444)(a2) .Lpcrel_hi1446: auipc a0, %pcrel_hi(current_test) @@ -55790,7 +55782,7 @@ li a3, 32 .LBB111_4: # %for.body.us.preheader sd zero, 104(sp) # 8-byte Folded Spill - addi s0, a0, -1608 + addi s9, a0, -1608 addi a0, a1, 1536 sd a0, 80(sp) # 8-byte Folded Spill addi s11, a2, 1957 @@ -55874,7 +55866,6 @@ add a0, sp, a0 addi a0, a0, 160 vs4r.v v0, (a0) # Unknown-size Folded Spill - sd s0, 32(sp) # 8-byte Folded Spill j .LBB111_6 .LBB111_5: # %_Z9check_sumIiEvT_.exit.us # in Loop: Header=BB111_6 Depth=1 @@ -55900,17 +55891,16 @@ .LBB111_8: # %vector.ph236 # in Loop: Header=BB111_6 Depth=1 neg a0, s4 - li s9, 84 li t4, 88 li s5, 92 - li t5, 100 - li s8, 104 - li a1, 108 - li t6, 112 + li t5, 96 + li s8, 100 + li a1, 104 + li t6, 108 li s10, 116 - li s0, 120 - li ra, 124 - li s1, 96 + li ra, 120 + li s1, 124 + li s0, 112 ld a2, 112(sp) # 8-byte Folded Reload and a5, a2, a0 slli a0, a5, 5 @@ -56163,7 +56153,8 @@ addi a4, a4, 160 vs2r.v v16, (a4) # Unknown-size Folded Spill vsetvli zero, zero, e64, m4, ta, ma - vor.vx v8, v20, s9 + li a4, 84 + vor.vx v8, v20, a4 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v4, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma @@ -56175,23 +56166,23 @@ vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v2, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma - vor.vx v8, v20, s1 + vor.vx v8, v20, t5 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v0, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma - vor.vx v8, v20, t5 + vor.vx v8, v20, s8 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v30, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma - vor.vx v8, v20, s8 + vor.vx v8, v20, a1 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v28, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma - vor.vx v8, v20, a1 + vor.vx v8, v20, t6 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v26, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma - vor.vx v8, v20, t6 + vor.vx v8, v20, s0 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v24, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma @@ -56199,11 +56190,11 @@ vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v18, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma - vor.vx v8, v20, s0 + vor.vx v8, v20, ra vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v16, (s2), v8 vsetvli zero, zero, e64, m4, ta, ma - vor.vx v8, v20, ra + vor.vx v8, v20, s1 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v20, (s2), v8 sd a0, 8(sp) @@ -56408,7 +56399,6 @@ add a2, sp, a2 addi a2, a2, 160 vl4r.v v0, (a2) # Unknown-size Folded Reload - ld s0, 32(sp) # 8-byte Folded Reload j .LBB111_15 .LBB111_12: # in Loop: Header=BB111_6 Depth=1 csrr a1, vlenb @@ -56429,7 +56419,6 @@ add a1, sp, a1 addi a1, a1, 160 vl4r.v v0, (a1) # Unknown-size Folded Reload - ld s0, 32(sp) # 8-byte Folded Reload ld a1, 48(sp) # 8-byte Folded Reload .LBB111_13: # %loop2_start.us.preheader # in Loop: Header=BB111_6 Depth=1 @@ -56558,7 +56547,7 @@ vl2re32.v v10, (a1) vsetvli a4, zero, e32, m2, ta, ma vmadd.vx v10, s11, v8 - vadd.vx v8, v10, s0 + vadd.vx v8, v10, s9 sub a3, a3, s4 ld a4, 136(sp) # 8-byte Folded Reload add a1, a1, a4 @@ -56581,7 +56570,7 @@ # => This Inner Loop Header: Depth=2 lw a2, 0(a1) mul a2, a2, s11 - add a3, a3, s0 + add a3, a3, s9 addw a3, a3, a2 addi a0, a0, -1 addi a1, a1, 4 @@ -56781,7 +56770,7 @@ ld s4, 88(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi1446)(s4) mv s1, a0 - ld a0, 24(sp) # 8-byte Folded Reload + ld a0, 32(sp) # 8-byte Folded Reload ld s0, %pcrel_lo(.Lpcrel_hi1444)(a0) snez a0, a2 slt a4, a1, a3 @@ -56811,7 +56800,7 @@ slli a0, a1, 4 add a0, a2, a0 fsd fa5, 0(a0) - ld a2, 16(sp) # 8-byte Folded Reload + ld a2, 24(sp) # 8-byte Folded Reload sd a2, 8(a0) addi a1, a1, 1 sw a1, %pcrel_lo(.Lpcrel_hi1446)(s4) @@ -57532,13 +57521,13 @@ csrr a1, vlenb srli s10, a1, 1 li a0, 60 - mul s6, a1, a0 + mul s0, a1, a0 addi a0, s2, 104 sd a0, 56(sp) # 8-byte Folded Spill sd a1, 40(sp) # 8-byte Folded Spill slli t5, a1, 1 lui a0, 51266 - addi s0, a0, 912 + addi s6, a0, 912 vsetvli a0, zero, e32, m1, ta, ma vmv.v.i v8, 0 addi a0, sp, 96 @@ -57699,11 +57688,11 @@ vadd.vv v10, v10, v16 vadd.vv v10, v10, v22 vmadd.vx v10, s11, v8 - vadd.vx v8, v10, s0 + vadd.vx v8, v10, s6 vsetvli zero, zero, e64, m4, ta, ma vadd.vx v12, v12, a4 sub a5, a5, s10 - add a3, a3, s6 + add a3, a3, s0 bnez a5, .LBB113_9 # %bb.10: # %middle.block273 # in Loop: Header=BB113_6 Depth=1 @@ -57748,7 +57737,7 @@ add a4, a4, a5 add a4, a6, a4 mul a4, a4, s11 - add a3, a3, s0 + add a3, a3, s6 addw a3, a3, a4 addi a0, a0, 30 addi a1, a1, 30 @@ -66751,6 +66740,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi1700)(a0) mv a0, s3 call printf@plt + ld t1, 64(sp) # 8-byte Folded Reload addi a0, sp, 96 vl4r.v v20, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -66758,7 +66748,6 @@ add a0, sp, a0 addi a0, a0, 96 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t1, 64(sp) # 8-byte Folded Reload ld a0, 72(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi1699)(a0) j .LBB130_26 @@ -67291,6 +67280,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi1714)(a0) mv a0, s3 call printf@plt + ld t1, 64(sp) # 8-byte Folded Reload csrr a0, vlenb add a0, sp, a0 addi a0, a0, 96 @@ -67301,7 +67291,6 @@ add a0, sp, a0 addi a0, a0, 96 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t1, 64(sp) # 8-byte Folded Reload ld a0, 72(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi1713)(a0) j .LBB131_26 @@ -67806,6 +67795,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi1729)(a0) mv a0, s3 call printf@plt + ld a7, 64(sp) # 8-byte Folded Reload addi a0, sp, 96 vl4r.v v20, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -67813,7 +67803,6 @@ add a0, sp, a0 addi a0, a0, 96 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld a7, 64(sp) # 8-byte Folded Reload ld a0, 72(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi1728)(a0) j .LBB132_26 @@ -68340,6 +68329,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi1744)(a0) mv a0, s3 call printf@plt + ld t1, 64(sp) # 8-byte Folded Reload csrr a0, vlenb add a0, sp, a0 addi a0, a0, 96 @@ -68350,7 +68340,6 @@ add a0, sp, a0 addi a0, a0, 96 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t1, 64(sp) # 8-byte Folded Reload ld a0, 72(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi1743)(a0) j .LBB133_26 @@ -68915,6 +68904,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi1759)(a0) mv a0, s3 call printf@plt + ld t0, 48(sp) # 8-byte Folded Reload addi a0, sp, 80 vl4r.v v20, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -68922,7 +68912,6 @@ add a0, sp, a0 addi a0, a0, 80 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t0, 48(sp) # 8-byte Folded Reload ld a0, 56(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi1758)(a0) j .LBB135_26 @@ -69436,6 +69425,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi1774)(a0) mv a0, s3 call printf@plt + ld t1, 64(sp) # 8-byte Folded Reload csrr a0, vlenb add a0, sp, a0 addi a0, a0, 96 @@ -69446,7 +69436,6 @@ add a0, sp, a0 addi a0, a0, 96 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t1, 64(sp) # 8-byte Folded Reload ld a0, 72(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi1773)(a0) j .LBB136_26 @@ -69935,9 +69924,9 @@ lw a1, %pcrel_lo(.Lpcrel_hi1788)(a0) mv a0, s3 call printf@plt + ld t0, 48(sp) # 8-byte Folded Reload addi a0, sp, 80 vl4r.v v24, (a0) # Unknown-size Folded Reload - ld t0, 48(sp) # 8-byte Folded Reload ld a0, 56(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi1787)(a0) j .LBB137_26 @@ -70480,6 +70469,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi1803)(a0) mv a0, s3 call printf@plt + ld t5, 64(sp) # 8-byte Folded Reload csrr a0, vlenb add a0, sp, a0 addi a0, a0, 96 @@ -70490,7 +70480,6 @@ add a0, sp, a0 addi a0, a0, 96 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t5, 64(sp) # 8-byte Folded Reload ld a0, 72(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi1802)(a0) j .LBB138_27 @@ -70972,6 +70961,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi1817)(a0) mv a0, s3 call printf@plt + ld t0, 48(sp) # 8-byte Folded Reload addi a0, sp, 80 vl4r.v v20, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -70979,7 +70969,6 @@ add a0, sp, a0 addi a0, a0, 80 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t0, 48(sp) # 8-byte Folded Reload ld a0, 56(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi1816)(a0) j .LBB139_26 @@ -71481,6 +71470,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi1832)(a0) mv a0, s3 call printf@plt + ld t0, 64(sp) # 8-byte Folded Reload csrr a0, vlenb add a0, sp, a0 addi a0, a0, 96 @@ -71491,7 +71481,6 @@ add a0, sp, a0 addi a0, a0, 96 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t0, 64(sp) # 8-byte Folded Reload ld a0, 72(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi1831)(a0) j .LBB140_26 @@ -71963,6 +71952,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi1846)(a0) mv a0, s3 call printf@plt + ld t0, 48(sp) # 8-byte Folded Reload addi a0, sp, 80 vl4r.v v20, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -71970,7 +71960,6 @@ add a0, sp, a0 addi a0, a0, 80 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld t0, 48(sp) # 8-byte Folded Reload ld a0, 56(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi1845)(a0) j .LBB141_26 @@ -72928,6 +72917,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi1874)(a0) mv a0, s3 call printf@plt + ld t0, 64(sp) # 8-byte Folded Reload addi a0, sp, 96 vl2r.v v14, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -72935,7 +72925,6 @@ add a0, sp, a0 addi a0, a0, 96 vl1r.v v12, (a0) # Unknown-size Folded Reload - ld t0, 64(sp) # 8-byte Folded Reload ld a0, 72(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi1873)(a0) j .LBB143_26 @@ -74661,7 +74650,7 @@ sd a0, %pcrel_lo(.Lpcrel_hi1944)(a2) .Lpcrel_hi1946: auipc a0, %pcrel_hi(current_test) - sd a0, 96(sp) # 8-byte Folded Spill + sd a0, 88(sp) # 8-byte Folded Spill blez a1, .LBB147_40 # %bb.1: # %for.cond1.preheader.lr.ph li a0, 31 @@ -74767,7 +74756,7 @@ addi a4, a2, 192 addi t1, a2, 200 addi a0, a2, 208 - sd a0, 88(sp) # 8-byte Folded Spill + sd a0, 200(sp) # 8-byte Folded Spill addi s0, a2, 216 addi s5, a2, 224 addi s3, a2, 232 @@ -74777,18 +74766,18 @@ .Lpcrel_hi1951: auipc a0, %pcrel_hi(init_value) sd a0, 72(sp) # 8-byte Folded Spill - sd t0, 200(sp) # 8-byte Folded Spill - sd a5, 168(sp) # 8-byte Folded Spill - sd a6, 160(sp) # 8-byte Folded Spill - sd a7, 152(sp) # 8-byte Folded Spill - sd t2, 144(sp) # 8-byte Folded Spill - sd t3, 136(sp) # 8-byte Folded Spill - sd t4, 128(sp) # 8-byte Folded Spill - sd t5, 120(sp) # 8-byte Folded Spill - sd t6, 112(sp) # 8-byte Folded Spill - sd ra, 104(sp) # 8-byte Folded Spill addi a0, sp, 288 vs2r.v v12, (a0) # Unknown-size Folded Spill + sd t0, 168(sp) # 8-byte Folded Spill + sd a5, 160(sp) # 8-byte Folded Spill + sd a6, 152(sp) # 8-byte Folded Spill + sd a7, 144(sp) # 8-byte Folded Spill + sd t2, 136(sp) # 8-byte Folded Spill + sd t3, 128(sp) # 8-byte Folded Spill + sd t4, 120(sp) # 8-byte Folded Spill + sd t5, 112(sp) # 8-byte Folded Spill + sd t6, 104(sp) # 8-byte Folded Spill + sd ra, 96(sp) # 8-byte Folded Spill j .LBB147_8 .LBB147_7: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB147_8 Depth=1 @@ -74811,8 +74800,6 @@ mv t1, s4 mv s7, a3 mv s9, a4 - mv t0, s11 - ld s11, 88(sp) # 8-byte Folded Reload .LBB147_9: # %for.body3.us # Parent Loop BB147_8 Depth=1 # => This Inner Loop Header: Depth=2 @@ -74894,8 +74881,7 @@ fmadd.d fa4, fa4, fs2, fs3 fadd.d fa4, fa4, fs1 fmadd.d fa4, fa4, fs2, fs3 - ld a4, 200(sp) # 8-byte Folded Reload - add a4, a4, a3 + add a4, t0, a3 fld fa3, 0(a4) fadd.d fa4, fa4, fs1 fmadd.d fa4, fa4, fs2, fs3 @@ -75057,7 +75043,8 @@ fmadd.d fa4, fa4, fs2, fs3 fadd.d fa4, fa4, fs1 fmadd.d fa4, fa4, fs2, fs3 - add a4, s11, a3 + ld a4, 200(sp) # 8-byte Folded Reload + add a4, a4, a3 fld fa3, 0(a4) fadd.d fa4, fa4, fs1 fmadd.d fa4, fa4, fs2, fs3 @@ -75093,7 +75080,7 @@ fmadd.d fa4, fa4, fs2, fs3 fadd.d fa4, fa4, fs1 fmadd.d fa4, fa4, fs2, fs3 - add a3, t0, a3 + add a3, s11, a3 fld fa3, 0(a3) fadd.d fa4, fa4, fs1 fmadd.d fa4, fa4, fs2, fs3 @@ -75123,7 +75110,6 @@ ld a2, 64(sp) # 8-byte Folded Reload ld a6, 56(sp) # 8-byte Folded Reload mv t1, s10 - mv s11, t0 bltu a2, a6, .LBB147_15 # %bb.12: # %vector.ph328 # in Loop: Header=BB147_8 Depth=1 @@ -75176,21 +75162,21 @@ .LBB147_17: # in Loop: Header=BB147_8 Depth=1 mv s4, t1 mv t1, s10 - mv s11, t0 .LBB147_18: # %for.end9.us # in Loop: Header=BB147_8 Depth=1 fabs.d fa4, fa5 flt.d a0, fs5, fa4 fmv.d fa4, fa5 - ld a5, 168(sp) # 8-byte Folded Reload - ld a6, 160(sp) # 8-byte Folded Reload - ld a7, 152(sp) # 8-byte Folded Reload - ld t2, 144(sp) # 8-byte Folded Reload - ld t3, 136(sp) # 8-byte Folded Reload - ld t4, 128(sp) # 8-byte Folded Reload - ld t5, 120(sp) # 8-byte Folded Reload - ld t6, 112(sp) # 8-byte Folded Reload - ld ra, 104(sp) # 8-byte Folded Reload + ld t0, 168(sp) # 8-byte Folded Reload + ld a5, 160(sp) # 8-byte Folded Reload + ld a6, 152(sp) # 8-byte Folded Reload + ld a7, 144(sp) # 8-byte Folded Reload + ld t2, 136(sp) # 8-byte Folded Reload + ld t3, 128(sp) # 8-byte Folded Reload + ld t4, 120(sp) # 8-byte Folded Reload + ld t5, 112(sp) # 8-byte Folded Reload + ld t6, 104(sp) # 8-byte Folded Reload + ld ra, 96(sp) # 8-byte Folded Reload mv a3, s7 mv a4, s9 bnez a0, .LBB147_20 @@ -75215,24 +75201,25 @@ bnez a0, .LBB147_7 # %bb.21: # %if.then.i.us # in Loop: Header=BB147_8 Depth=1 - ld a0, 96(sp) # 8-byte Folded Reload + ld a0, 88(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi1946)(a0) ld a0, 48(sp) # 8-byte Folded Reload call printf@plt mv t1, s10 mv a4, s9 + mv a3, s7 + ld ra, 96(sp) # 8-byte Folded Reload + ld t6, 104(sp) # 8-byte Folded Reload + ld t5, 112(sp) # 8-byte Folded Reload + ld t4, 120(sp) # 8-byte Folded Reload + ld t3, 128(sp) # 8-byte Folded Reload + ld t2, 136(sp) # 8-byte Folded Reload + ld a7, 144(sp) # 8-byte Folded Reload + ld a6, 152(sp) # 8-byte Folded Reload + ld a5, 160(sp) # 8-byte Folded Reload + ld t0, 168(sp) # 8-byte Folded Reload addi a0, sp, 288 vl2r.v v12, (a0) # Unknown-size Folded Reload - mv a3, s7 - ld ra, 104(sp) # 8-byte Folded Reload - ld t6, 112(sp) # 8-byte Folded Reload - ld t5, 120(sp) # 8-byte Folded Reload - ld t4, 128(sp) # 8-byte Folded Reload - ld t3, 136(sp) # 8-byte Folded Reload - ld t2, 144(sp) # 8-byte Folded Reload - ld a7, 152(sp) # 8-byte Folded Reload - ld a6, 160(sp) # 8-byte Folded Reload - ld a5, 168(sp) # 8-byte Folded Reload j .LBB147_7 .LBB147_22: # %for.cond1.preheader.lr.ph.split ld a0, 192(sp) # 8-byte Folded Reload @@ -75369,7 +75356,7 @@ bnez a0, .LBB147_24 # %bb.35: # %if.then.i.us202 # in Loop: Header=BB147_25 Depth=1 - ld a0, 96(sp) # 8-byte Folded Reload + ld a0, 88(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi1946)(a0) mv a0, s3 call printf@plt @@ -75422,7 +75409,7 @@ bnez a0, .LBB147_37 # %bb.39: # %if.then.i # in Loop: Header=BB147_38 Depth=1 - ld a0, 96(sp) # 8-byte Folded Reload + ld a0, 88(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi1946)(a0) mv a0, s1 call printf@plt @@ -75438,7 +75425,7 @@ .Lpcrel_hi1975: auipc s2, %pcrel_hi(allocated_results) lw a3, %pcrel_lo(.Lpcrel_hi1975)(s2) - ld s4, 96(sp) # 8-byte Folded Reload + ld s4, 88(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi1946)(s4) mv s1, a0 ld a0, 32(sp) # 8-byte Folded Reload @@ -75709,6 +75696,8 @@ .Lpcrel_hi1984: auipc a0, %pcrel_hi(init_value) sd a0, 80(sp) # 8-byte Folded Spill + addi a0, sp, 272 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd ra, 72(sp) # 8-byte Folded Spill sd a7, 168(sp) # 8-byte Folded Spill sd a5, 160(sp) # 8-byte Folded Spill @@ -75719,8 +75708,6 @@ sd t4, 120(sp) # 8-byte Folded Spill sd t5, 112(sp) # 8-byte Folded Spill sd t6, 104(sp) # 8-byte Folded Spill - addi a0, sp, 272 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB148_8 .LBB148_7: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB148_8 Depth=1 @@ -76129,8 +76116,6 @@ lw a1, %pcrel_lo(.Lpcrel_hi1980)(a0) ld a0, 48(sp) # 8-byte Folded Reload call printf@plt - addi a0, sp, 272 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t6, 104(sp) # 8-byte Folded Reload ld t5, 112(sp) # 8-byte Folded Reload ld t4, 120(sp) # 8-byte Folded Reload @@ -76141,6 +76126,8 @@ ld a5, 160(sp) # 8-byte Folded Reload ld a7, 168(sp) # 8-byte Folded Reload ld ra, 72(sp) # 8-byte Folded Reload + addi a0, sp, 272 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB148_7 .LBB148_22: # %for.cond1.preheader.lr.ph.split ld a0, 192(sp) # 8-byte Folded Reload @@ -76690,6 +76677,8 @@ .Lpcrel_hi2019: auipc a0, %pcrel_hi(init_value) sd a0, 80(sp) # 8-byte Folded Spill + addi a0, sp, 272 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd ra, 72(sp) # 8-byte Folded Spill sd t0, 168(sp) # 8-byte Folded Spill sd a5, 160(sp) # 8-byte Folded Spill @@ -76700,8 +76689,6 @@ sd t4, 120(sp) # 8-byte Folded Spill sd t5, 112(sp) # 8-byte Folded Spill sd t6, 104(sp) # 8-byte Folded Spill - addi a0, sp, 272 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB150_8 .LBB150_7: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB150_8 Depth=1 @@ -77101,8 +77088,6 @@ lw a1, %pcrel_lo(.Lpcrel_hi2014)(a0) ld a0, 48(sp) # 8-byte Folded Reload call printf@plt - addi a0, sp, 272 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t6, 104(sp) # 8-byte Folded Reload ld t5, 112(sp) # 8-byte Folded Reload ld t4, 120(sp) # 8-byte Folded Reload @@ -77113,6 +77098,8 @@ ld a5, 160(sp) # 8-byte Folded Reload ld t0, 168(sp) # 8-byte Folded Reload ld ra, 72(sp) # 8-byte Folded Reload + addi a0, sp, 272 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB150_7 .LBB150_22: # %for.cond1.preheader.lr.ph.split ld a0, 192(sp) # 8-byte Folded Reload @@ -77583,6 +77570,8 @@ .Lpcrel_hi2053: auipc a0, %pcrel_hi(init_value) sd a0, 112(sp) # 8-byte Folded Spill + addi a0, sp, 240 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd t3, 104(sp) # 8-byte Folded Spill sd t4, 96(sp) # 8-byte Folded Spill sd t5, 88(sp) # 8-byte Folded Spill @@ -77593,8 +77582,6 @@ sd a6, 152(sp) # 8-byte Folded Spill sd t1, 144(sp) # 8-byte Folded Spill sd t2, 136(sp) # 8-byte Folded Spill - addi a0, sp, 240 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB151_8 .LBB151_7: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB151_8 Depth=1 @@ -77979,8 +77966,6 @@ lw a1, %pcrel_lo(.Lpcrel_hi2048)(a0) ld a0, 48(sp) # 8-byte Folded Reload call printf@plt - addi a0, sp, 240 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t2, 136(sp) # 8-byte Folded Reload ld t1, 144(sp) # 8-byte Folded Reload ld a6, 152(sp) # 8-byte Folded Reload @@ -77991,6 +77976,8 @@ ld t5, 88(sp) # 8-byte Folded Reload ld t4, 96(sp) # 8-byte Folded Reload ld t3, 104(sp) # 8-byte Folded Reload + addi a0, sp, 240 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB151_7 .LBB151_22: # %for.cond1.preheader.lr.ph.split ld a0, 192(sp) # 8-byte Folded Reload @@ -78463,6 +78450,8 @@ .Lpcrel_hi2087: auipc a0, %pcrel_hi(init_value) sd a0, 96(sp) # 8-byte Folded Spill + addi a0, sp, 256 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd t5, 88(sp) # 8-byte Folded Spill sd t6, 80(sp) # 8-byte Folded Spill sd ra, 72(sp) # 8-byte Folded Spill @@ -78473,8 +78462,6 @@ sd t2, 136(sp) # 8-byte Folded Spill sd t3, 128(sp) # 8-byte Folded Spill sd t4, 120(sp) # 8-byte Folded Spill - addi a0, sp, 256 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB152_8 .LBB152_7: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB152_8 Depth=1 @@ -78852,8 +78839,6 @@ lw a1, %pcrel_lo(.Lpcrel_hi2082)(a0) ld a0, 48(sp) # 8-byte Folded Reload call printf@plt - addi a0, sp, 256 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t4, 120(sp) # 8-byte Folded Reload ld t3, 128(sp) # 8-byte Folded Reload ld t2, 136(sp) # 8-byte Folded Reload @@ -78864,6 +78849,8 @@ ld ra, 72(sp) # 8-byte Folded Reload ld t6, 80(sp) # 8-byte Folded Reload ld t5, 88(sp) # 8-byte Folded Reload + addi a0, sp, 256 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB152_7 .LBB152_22: # %for.cond1.preheader.lr.ph.split ld a0, 192(sp) # 8-byte Folded Reload @@ -79333,6 +79320,8 @@ .Lpcrel_hi2121: auipc a0, %pcrel_hi(init_value) sd a0, 112(sp) # 8-byte Folded Spill + addi a0, sp, 240 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd t3, 104(sp) # 8-byte Folded Spill sd t4, 96(sp) # 8-byte Folded Spill sd t5, 88(sp) # 8-byte Folded Spill @@ -79343,8 +79332,6 @@ sd a6, 152(sp) # 8-byte Folded Spill sd t1, 144(sp) # 8-byte Folded Spill sd t2, 136(sp) # 8-byte Folded Spill - addi a0, sp, 240 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB153_8 .LBB153_7: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB153_8 Depth=1 @@ -79709,8 +79696,6 @@ lw a1, %pcrel_lo(.Lpcrel_hi2116)(a0) ld a0, 48(sp) # 8-byte Folded Reload call printf@plt - addi a0, sp, 240 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t2, 136(sp) # 8-byte Folded Reload ld t1, 144(sp) # 8-byte Folded Reload ld a6, 152(sp) # 8-byte Folded Reload @@ -79721,6 +79706,8 @@ ld t5, 88(sp) # 8-byte Folded Reload ld t4, 96(sp) # 8-byte Folded Reload ld t3, 104(sp) # 8-byte Folded Reload + addi a0, sp, 240 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB153_7 .LBB153_22: # %for.cond1.preheader.lr.ph.split ld a0, 192(sp) # 8-byte Folded Reload @@ -80192,6 +80179,8 @@ .Lpcrel_hi2155: auipc a0, %pcrel_hi(init_value) sd a0, 112(sp) # 8-byte Folded Spill + addi a0, sp, 240 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd t3, 104(sp) # 8-byte Folded Spill sd t4, 96(sp) # 8-byte Folded Spill sd t5, 88(sp) # 8-byte Folded Spill @@ -80202,8 +80191,6 @@ sd a6, 152(sp) # 8-byte Folded Spill sd a7, 144(sp) # 8-byte Folded Spill sd t2, 136(sp) # 8-byte Folded Spill - addi a0, sp, 240 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB154_8 .LBB154_7: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB154_8 Depth=1 @@ -80559,8 +80546,6 @@ lw a1, %pcrel_lo(.Lpcrel_hi2150)(a0) ld a0, 48(sp) # 8-byte Folded Reload call printf@plt - addi a0, sp, 240 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t2, 136(sp) # 8-byte Folded Reload ld a7, 144(sp) # 8-byte Folded Reload ld a6, 152(sp) # 8-byte Folded Reload @@ -80571,6 +80556,8 @@ ld t5, 88(sp) # 8-byte Folded Reload ld t4, 96(sp) # 8-byte Folded Reload ld t3, 104(sp) # 8-byte Folded Reload + addi a0, sp, 240 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB154_7 .LBB154_22: # %for.cond1.preheader.lr.ph.split ld a0, 192(sp) # 8-byte Folded Reload @@ -81022,6 +81009,8 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi2193) sd a0, 40(sp) # 8-byte Folded Spill + addi a0, sp, 176 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a6, 120(sp) # 8-byte Folded Spill sd t0, 112(sp) # 8-byte Folded Spill sd t1, 104(sp) # 8-byte Folded Spill @@ -81032,8 +81021,6 @@ sd t6, 64(sp) # 8-byte Folded Spill sd ra, 56(sp) # 8-byte Folded Spill sd a2, 48(sp) # 8-byte Folded Spill - addi a0, sp, 176 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB155_8 .LBB155_7: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB155_8 Depth=1 @@ -81367,8 +81354,6 @@ ld a0, 40(sp) # 8-byte Folded Reload sd a7, 136(sp) # 8-byte Folded Spill call printf@plt - addi a0, sp, 176 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld ra, 56(sp) # 8-byte Folded Reload ld t6, 64(sp) # 8-byte Folded Reload ld t5, 72(sp) # 8-byte Folded Reload @@ -81380,6 +81365,8 @@ ld a7, 136(sp) # 8-byte Folded Reload ld a6, 120(sp) # 8-byte Folded Reload ld a5, 128(sp) # 8-byte Folded Reload + addi a0, sp, 176 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB155_7 .LBB155_21: # %for.cond1.preheader.lr.ph.split li s0, 0 @@ -81514,9 +81501,9 @@ lw a1, %pcrel_lo(.Lpcrel_hi2184)(a0) mv a0, s3 call printf@plt + ld a5, 128(sp) # 8-byte Folded Reload addi a0, sp, 176 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld a5, 128(sp) # 8-byte Folded Reload ld a0, 160(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi2183)(a0) j .LBB155_23 @@ -81841,6 +81828,8 @@ .Lpcrel_hi2222: auipc a0, %pcrel_hi(init_value) sd a0, 136(sp) # 8-byte Folded Spill + addi a0, sp, 224 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a7, 128(sp) # 8-byte Folded Spill sd t1, 120(sp) # 8-byte Folded Spill sd t2, 112(sp) # 8-byte Folded Spill @@ -81852,8 +81841,6 @@ sd t0, 176(sp) # 8-byte Folded Spill sd a5, 168(sp) # 8-byte Folded Spill sd a6, 160(sp) # 8-byte Folded Spill - addi a0, sp, 224 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB156_8 .LBB156_7: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB156_8 Depth=1 @@ -82181,8 +82168,6 @@ lw a1, %pcrel_lo(.Lpcrel_hi2217)(a0) ld a0, 48(sp) # 8-byte Folded Reload call printf@plt - addi a0, sp, 224 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld a6, 160(sp) # 8-byte Folded Reload ld a5, 168(sp) # 8-byte Folded Reload ld t0, 176(sp) # 8-byte Folded Reload @@ -82194,6 +82179,8 @@ ld t2, 112(sp) # 8-byte Folded Reload ld t1, 120(sp) # 8-byte Folded Reload ld a7, 128(sp) # 8-byte Folded Reload + addi a0, sp, 224 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB156_7 .LBB156_21: # %for.cond1.preheader.lr.ph.split ld a0, 200(sp) # 8-byte Folded Reload @@ -82655,6 +82642,8 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi2261) sd a0, 48(sp) # 8-byte Folded Spill + addi a0, sp, 208 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a6, 136(sp) # 8-byte Folded Spill sd t0, 128(sp) # 8-byte Folded Spill sd t1, 120(sp) # 8-byte Folded Spill @@ -82665,8 +82654,6 @@ sd t6, 80(sp) # 8-byte Folded Spill sd ra, 72(sp) # 8-byte Folded Spill sd a7, 168(sp) # 8-byte Folded Spill - addi a0, sp, 208 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB157_8 .LBB157_7: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB157_8 Depth=1 @@ -82982,8 +82969,6 @@ lw a1, %pcrel_lo(.Lpcrel_hi2251)(a0) ld a0, 48(sp) # 8-byte Folded Reload call printf@plt - addi a0, sp, 208 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld a7, 168(sp) # 8-byte Folded Reload ld ra, 72(sp) # 8-byte Folded Reload ld t6, 80(sp) # 8-byte Folded Reload @@ -82994,6 +82979,8 @@ ld t1, 120(sp) # 8-byte Folded Reload ld t0, 128(sp) # 8-byte Folded Reload ld a6, 136(sp) # 8-byte Folded Reload + addi a0, sp, 208 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB157_7 .LBB157_21: # %for.cond1.preheader.lr.ph.split ld a0, 192(sp) # 8-byte Folded Reload @@ -83459,6 +83446,8 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi2295) sd a0, 48(sp) # 8-byte Folded Spill + addi a0, sp, 208 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a7, 128(sp) # 8-byte Folded Spill sd t1, 120(sp) # 8-byte Folded Spill sd t2, 112(sp) # 8-byte Folded Spill @@ -83468,8 +83457,6 @@ sd t6, 80(sp) # 8-byte Folded Spill sd ra, 72(sp) # 8-byte Folded Spill sd t0, 168(sp) # 8-byte Folded Spill - addi a0, sp, 208 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB158_8 .LBB158_7: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB158_8 Depth=1 @@ -83775,8 +83762,6 @@ lw a1, %pcrel_lo(.Lpcrel_hi2285)(a0) ld a0, 48(sp) # 8-byte Folded Reload call printf@plt - addi a0, sp, 208 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t0, 168(sp) # 8-byte Folded Reload ld ra, 72(sp) # 8-byte Folded Reload ld t6, 80(sp) # 8-byte Folded Reload @@ -83787,6 +83772,8 @@ ld t1, 120(sp) # 8-byte Folded Reload ld a7, 128(sp) # 8-byte Folded Reload ld a6, 136(sp) # 8-byte Folded Reload + addi a0, sp, 208 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB158_7 .LBB158_21: # %for.cond1.preheader.lr.ph.split ld a0, 192(sp) # 8-byte Folded Reload @@ -83926,9 +83913,9 @@ lw a1, %pcrel_lo(.Lpcrel_hi2285)(a0) mv a0, s3 call printf@plt + ld a6, 136(sp) # 8-byte Folded Reload addi a0, sp, 208 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld a6, 136(sp) # 8-byte Folded Reload ld a0, 176(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi2284)(a0) j .LBB158_23 @@ -84307,6 +84294,8 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi2329) sd a0, 40(sp) # 8-byte Folded Spill + addi a0, sp, 176 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a6, 120(sp) # 8-byte Folded Spill sd t0, 112(sp) # 8-byte Folded Spill sd t1, 104(sp) # 8-byte Folded Spill @@ -84317,8 +84306,6 @@ sd t6, 64(sp) # 8-byte Folded Spill sd ra, 56(sp) # 8-byte Folded Spill sd a2, 48(sp) # 8-byte Folded Spill - addi a0, sp, 176 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB160_8 .LBB160_7: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB160_8 Depth=1 @@ -84612,8 +84599,6 @@ ld a0, 40(sp) # 8-byte Folded Reload sd a7, 136(sp) # 8-byte Folded Spill call printf@plt - addi a0, sp, 176 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld ra, 56(sp) # 8-byte Folded Reload ld t6, 64(sp) # 8-byte Folded Reload ld t5, 72(sp) # 8-byte Folded Reload @@ -84625,6 +84610,8 @@ ld a7, 136(sp) # 8-byte Folded Reload ld a6, 120(sp) # 8-byte Folded Reload ld a5, 128(sp) # 8-byte Folded Reload + addi a0, sp, 176 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB160_7 .LBB160_21: # %for.cond1.preheader.lr.ph.split li s0, 0 @@ -84759,9 +84746,9 @@ lw a1, %pcrel_lo(.Lpcrel_hi2320)(a0) mv a0, s3 call printf@plt + ld a5, 128(sp) # 8-byte Folded Reload addi a0, sp, 176 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld a5, 128(sp) # 8-byte Folded Reload ld a0, 160(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi2319)(a0) j .LBB160_23 @@ -85078,6 +85065,8 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi2363) sd a0, 40(sp) # 8-byte Folded Spill + addi a0, sp, 192 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a7, 112(sp) # 8-byte Folded Spill sd t1, 104(sp) # 8-byte Folded Spill sd t2, 96(sp) # 8-byte Folded Spill @@ -85086,8 +85075,6 @@ sd t5, 72(sp) # 8-byte Folded Spill sd t6, 64(sp) # 8-byte Folded Spill sd a2, 56(sp) # 8-byte Folded Spill - addi a0, sp, 192 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB161_8 .LBB161_7: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB161_8 Depth=1 @@ -85373,8 +85360,6 @@ ld a0, 40(sp) # 8-byte Folded Reload sd t0, 136(sp) # 8-byte Folded Spill call printf@plt - addi a0, sp, 192 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t6, 64(sp) # 8-byte Folded Reload ld t5, 72(sp) # 8-byte Folded Reload ld t4, 80(sp) # 8-byte Folded Reload @@ -85385,6 +85370,8 @@ ld a7, 112(sp) # 8-byte Folded Reload ld a6, 120(sp) # 8-byte Folded Reload ld a5, 128(sp) # 8-byte Folded Reload + addi a0, sp, 192 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB161_7 .LBB161_21: # %for.cond1.preheader.lr.ph.split li s0, 0 @@ -85519,10 +85506,10 @@ lw a1, %pcrel_lo(.Lpcrel_hi2353)(a0) mv a0, s3 call printf@plt - addi a0, sp, 192 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld a6, 120(sp) # 8-byte Folded Reload ld a5, 128(sp) # 8-byte Folded Reload + addi a0, sp, 192 + vl2r.v v12, (a0) # Unknown-size Folded Reload ld a0, 176(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi2352)(a0) j .LBB161_23 @@ -85832,6 +85819,8 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi2397) sd a0, 40(sp) # 8-byte Folded Spill + addi a0, sp, 176 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a6, 120(sp) # 8-byte Folded Spill sd t0, 112(sp) # 8-byte Folded Spill sd t1, 104(sp) # 8-byte Folded Spill @@ -85842,8 +85831,6 @@ sd t6, 64(sp) # 8-byte Folded Spill sd ra, 56(sp) # 8-byte Folded Spill sd a2, 48(sp) # 8-byte Folded Spill - addi a0, sp, 176 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB162_8 .LBB162_7: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB162_8 Depth=1 @@ -86117,8 +86104,6 @@ ld a0, 40(sp) # 8-byte Folded Reload sd a7, 136(sp) # 8-byte Folded Spill call printf@plt - addi a0, sp, 176 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld ra, 56(sp) # 8-byte Folded Reload ld t6, 64(sp) # 8-byte Folded Reload ld t5, 72(sp) # 8-byte Folded Reload @@ -86130,6 +86115,8 @@ ld a7, 136(sp) # 8-byte Folded Reload ld a6, 120(sp) # 8-byte Folded Reload ld a5, 128(sp) # 8-byte Folded Reload + addi a0, sp, 176 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB162_7 .LBB162_21: # %for.cond1.preheader.lr.ph.split li s0, 0 @@ -86264,9 +86251,9 @@ lw a1, %pcrel_lo(.Lpcrel_hi2387)(a0) mv a0, s3 call printf@plt + ld a5, 128(sp) # 8-byte Folded Reload addi a0, sp, 176 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld a5, 128(sp) # 8-byte Folded Reload ld a0, 160(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi2386)(a0) j .LBB162_23 @@ -86578,6 +86565,8 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi2430) sd a0, 40(sp) # 8-byte Folded Spill + addi a0, sp, 176 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a7, 112(sp) # 8-byte Folded Spill sd t1, 104(sp) # 8-byte Folded Spill sd t2, 96(sp) # 8-byte Folded Spill @@ -86587,8 +86576,6 @@ sd t6, 64(sp) # 8-byte Folded Spill sd ra, 56(sp) # 8-byte Folded Spill sd a2, 48(sp) # 8-byte Folded Spill - addi a0, sp, 176 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB163_8 .LBB163_7: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB163_8 Depth=1 @@ -86852,8 +86839,6 @@ ld a0, 40(sp) # 8-byte Folded Reload sd t0, 136(sp) # 8-byte Folded Spill call printf@plt - addi a0, sp, 176 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld ra, 56(sp) # 8-byte Folded Reload ld t6, 64(sp) # 8-byte Folded Reload ld t5, 72(sp) # 8-byte Folded Reload @@ -86865,6 +86850,8 @@ ld a7, 112(sp) # 8-byte Folded Reload ld a6, 120(sp) # 8-byte Folded Reload ld a5, 128(sp) # 8-byte Folded Reload + addi a0, sp, 176 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB163_7 .LBB163_21: # %for.cond1.preheader.lr.ph.split li s0, 0 @@ -86999,10 +86986,10 @@ lw a1, %pcrel_lo(.Lpcrel_hi2421)(a0) mv a0, s3 call printf@plt - addi a0, sp, 176 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld a6, 120(sp) # 8-byte Folded Reload ld a5, 128(sp) # 8-byte Folded Reload + addi a0, sp, 176 + vl2r.v v12, (a0) # Unknown-size Folded Reload ld a0, 160(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi2420)(a0) j .LBB163_23 @@ -87994,6 +87981,11 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi2496) sd a0, 40(sp) # 8-byte Folded Spill + csrr a0, vlenb + slli a0, a0, 2 + add a0, sp, a0 + addi a0, a0, 160 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a7, 104(sp) # 8-byte Folded Spill sd t1, 96(sp) # 8-byte Folded Spill sd t2, 88(sp) # 8-byte Folded Spill @@ -88001,11 +87993,6 @@ sd t4, 72(sp) # 8-byte Folded Spill sd t5, 64(sp) # 8-byte Folded Spill sd t6, 56(sp) # 8-byte Folded Spill - csrr a0, vlenb - slli a0, a0, 2 - add a0, sp, a0 - addi a0, a0, 160 - vs2r.v v12, (a0) # Unknown-size Folded Spill sd ra, 48(sp) # 8-byte Folded Spill j .LBB165_8 .LBB165_7: # %_Z9check_sumIdEvT_.exit.us @@ -88251,11 +88238,6 @@ sd t0, 128(sp) # 8-byte Folded Spill call printf@plt ld ra, 48(sp) # 8-byte Folded Reload - csrr a0, vlenb - slli a0, a0, 2 - add a0, sp, a0 - addi a0, a0, 160 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t6, 56(sp) # 8-byte Folded Reload ld t5, 64(sp) # 8-byte Folded Reload ld t4, 72(sp) # 8-byte Folded Reload @@ -88266,6 +88248,11 @@ ld a7, 104(sp) # 8-byte Folded Reload ld a6, 112(sp) # 8-byte Folded Reload ld a5, 120(sp) # 8-byte Folded Reload + csrr a0, vlenb + slli a0, a0, 2 + add a0, sp, a0 + addi a0, a0, 160 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB165_7 .LBB165_21: # %for.cond1.preheader.lr.ph.split li s0, 0 @@ -88385,6 +88372,8 @@ lw a1, %pcrel_lo(.Lpcrel_hi2487)(a0) mv a0, s3 call printf@plt + ld a6, 112(sp) # 8-byte Folded Reload + ld a5, 120(sp) # 8-byte Folded Reload addi a0, sp, 160 vl2r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -88397,8 +88386,6 @@ add a0, sp, a0 addi a0, a0, 160 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld a6, 112(sp) # 8-byte Folded Reload - ld a5, 120(sp) # 8-byte Folded Reload ld a0, 144(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi2486)(a0) j .LBB165_23 @@ -88706,17 +88693,17 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi2530) sd a0, 40(sp) # 8-byte Folded Spill + csrr a0, vlenb + slli a0, a0, 2 + add a0, sp, a0 + addi a0, a0, 144 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a6, 96(sp) # 8-byte Folded Spill sd t0, 88(sp) # 8-byte Folded Spill sd t1, 80(sp) # 8-byte Folded Spill sd t2, 72(sp) # 8-byte Folded Spill sd t3, 64(sp) # 8-byte Folded Spill sd t4, 56(sp) # 8-byte Folded Spill - csrr a0, vlenb - slli a0, a0, 2 - add a0, sp, a0 - addi a0, a0, 144 - vs2r.v v12, (a0) # Unknown-size Folded Spill sd t5, 48(sp) # 8-byte Folded Spill j .LBB166_8 .LBB166_7: # %_Z9check_sumIdEvT_.exit.us @@ -88954,11 +88941,6 @@ sd a7, 112(sp) # 8-byte Folded Spill call printf@plt ld t5, 48(sp) # 8-byte Folded Reload - csrr a0, vlenb - slli a0, a0, 2 - add a0, sp, a0 - addi a0, a0, 144 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t4, 56(sp) # 8-byte Folded Reload ld t3, 64(sp) # 8-byte Folded Reload ld t2, 72(sp) # 8-byte Folded Reload @@ -88967,6 +88949,11 @@ ld a7, 112(sp) # 8-byte Folded Reload ld a6, 96(sp) # 8-byte Folded Reload ld a5, 104(sp) # 8-byte Folded Reload + csrr a0, vlenb + slli a0, a0, 2 + add a0, sp, a0 + addi a0, a0, 144 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB166_7 .LBB166_21: # %for.cond1.preheader.lr.ph.split li s0, 0 @@ -89086,6 +89073,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi2520)(a0) mv a0, s3 call printf@plt + ld a5, 104(sp) # 8-byte Folded Reload addi a0, sp, 144 vl2r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -89098,7 +89086,6 @@ add a0, sp, a0 addi a0, a0, 144 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld a5, 104(sp) # 8-byte Folded Reload ld a0, 128(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi2519)(a0) j .LBB166_23 @@ -89407,16 +89394,16 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi2564) sd a0, 40(sp) # 8-byte Folded Spill - sd a7, 88(sp) # 8-byte Folded Spill - sd t1, 80(sp) # 8-byte Folded Spill - sd t2, 72(sp) # 8-byte Folded Spill - sd t3, 64(sp) # 8-byte Folded Spill - sd t4, 56(sp) # 8-byte Folded Spill csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 144 vs2r.v v12, (a0) # Unknown-size Folded Spill + sd a7, 88(sp) # 8-byte Folded Spill + sd t1, 80(sp) # 8-byte Folded Spill + sd t2, 72(sp) # 8-byte Folded Spill + sd t3, 64(sp) # 8-byte Folded Spill + sd t4, 56(sp) # 8-byte Folded Spill sd t5, 48(sp) # 8-byte Folded Spill j .LBB167_8 .LBB167_7: # %_Z9check_sumIdEvT_.exit.us @@ -89644,11 +89631,6 @@ sd t0, 112(sp) # 8-byte Folded Spill call printf@plt ld t5, 48(sp) # 8-byte Folded Reload - csrr a0, vlenb - slli a0, a0, 2 - add a0, sp, a0 - addi a0, a0, 144 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t4, 56(sp) # 8-byte Folded Reload ld t3, 64(sp) # 8-byte Folded Reload ld t2, 72(sp) # 8-byte Folded Reload @@ -89657,6 +89639,11 @@ ld a7, 88(sp) # 8-byte Folded Reload ld a6, 96(sp) # 8-byte Folded Reload ld a5, 104(sp) # 8-byte Folded Reload + csrr a0, vlenb + slli a0, a0, 2 + add a0, sp, a0 + addi a0, a0, 144 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB167_7 .LBB167_21: # %for.cond1.preheader.lr.ph.split li s0, 0 @@ -89776,6 +89763,8 @@ lw a1, %pcrel_lo(.Lpcrel_hi2554)(a0) mv a0, s3 call printf@plt + ld a6, 96(sp) # 8-byte Folded Reload + ld a5, 104(sp) # 8-byte Folded Reload addi a0, sp, 144 vl2r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -89788,8 +89777,6 @@ add a0, sp, a0 addi a0, a0, 144 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld a6, 96(sp) # 8-byte Folded Reload - ld a5, 104(sp) # 8-byte Folded Reload ld a0, 128(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi2553)(a0) j .LBB167_23 @@ -90053,10 +90040,10 @@ addi s4, s2, 80 addi s6, s2, 88 sub a1, a1, a0 - addi s8, a1, -12 + addi a6, a1, -12 addi a7, s2, 96 csrr a0, vlenb - slli t0, a0, 1 + slli s8, a0, 1 srli t1, a0, 2 fmv.d.x fs0, zero .Lpcrel_hi2589: @@ -90089,14 +90076,14 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi2597) sd a0, 40(sp) # 8-byte Folded Spill - sd a7, 72(sp) # 8-byte Folded Spill - sd t0, 64(sp) # 8-byte Folded Spill - sd t1, 56(sp) # 8-byte Folded Spill csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 112 vs2r.v v12, (a0) # Unknown-size Folded Spill + sd a6, 72(sp) # 8-byte Folded Spill + sd a7, 64(sp) # 8-byte Folded Spill + sd t1, 56(sp) # 8-byte Folded Spill sd t2, 48(sp) # 8-byte Folded Spill j .LBB168_8 .LBB168_7: # %_Z9check_sumIdEvT_.exit.us @@ -90241,11 +90228,11 @@ bge a0, s1, .LBB168_17 # %bb.11: # %for.body6.us.preheader # in Loop: Header=BB168_8 Depth=1 - bltu s8, t1, .LBB168_15 + bltu a6, t1, .LBB168_15 # %bb.12: # %vector.ph130 # in Loop: Header=BB168_8 Depth=1 neg a0, t1 - and a0, s8, a0 + and a0, a6, a0 add a3, a3, a0 vsetvli a1, zero, e64, m2, ta, ma mv a1, a0 @@ -90263,11 +90250,11 @@ vfredosum.vs v8, v8, v10 vfmv.f.s fa5, v8 sub a1, a1, t1 - add a4, a4, t0 + add a4, a4, s8 bnez a1, .LBB168_13 # %bb.14: # %middle.block128 # in Loop: Header=BB168_8 Depth=1 - beq s8, a0, .LBB168_17 + beq a6, a0, .LBB168_17 .LBB168_15: # %for.body6.us.preheader140 # in Loop: Header=BB168_8 Depth=1 slli a0, a3, 3 @@ -90318,15 +90305,15 @@ sd a5, 80(sp) # 8-byte Folded Spill call printf@plt ld t2, 48(sp) # 8-byte Folded Reload + ld t1, 56(sp) # 8-byte Folded Reload + ld a7, 64(sp) # 8-byte Folded Reload + ld a6, 72(sp) # 8-byte Folded Reload + ld a5, 80(sp) # 8-byte Folded Reload csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 112 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld t1, 56(sp) # 8-byte Folded Reload - ld t0, 64(sp) # 8-byte Folded Reload - ld a7, 72(sp) # 8-byte Folded Reload - ld a5, 80(sp) # 8-byte Folded Reload j .LBB168_7 .LBB168_21: # %for.cond1.preheader.lr.ph.split li s0, 0 @@ -90834,15 +90821,15 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi2632) sd a0, 40(sp) # 8-byte Folded Spill - sd a7, 80(sp) # 8-byte Folded Spill - sd t0, 72(sp) # 8-byte Folded Spill - sd t1, 64(sp) # 8-byte Folded Spill - sd t2, 56(sp) # 8-byte Folded Spill csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 128 vs2r.v v12, (a0) # Unknown-size Folded Spill + sd a7, 80(sp) # 8-byte Folded Spill + sd t0, 72(sp) # 8-byte Folded Spill + sd t1, 64(sp) # 8-byte Folded Spill + sd t2, 56(sp) # 8-byte Folded Spill sd t3, 48(sp) # 8-byte Folded Spill j .LBB170_8 .LBB170_7: # %_Z9check_sumIdEvT_.exit.us @@ -91052,17 +91039,17 @@ sd a6, 96(sp) # 8-byte Folded Spill call printf@plt ld t3, 48(sp) # 8-byte Folded Reload - csrr a0, vlenb - slli a0, a0, 2 - add a0, sp, a0 - addi a0, a0, 128 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t2, 56(sp) # 8-byte Folded Reload ld t1, 64(sp) # 8-byte Folded Reload ld t0, 72(sp) # 8-byte Folded Reload ld a7, 80(sp) # 8-byte Folded Reload ld a6, 96(sp) # 8-byte Folded Reload ld a5, 88(sp) # 8-byte Folded Reload + csrr a0, vlenb + slli a0, a0, 2 + add a0, sp, a0 + addi a0, a0, 128 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB170_7 .LBB170_21: # %for.cond1.preheader.lr.ph.split li s0, 0 @@ -91182,6 +91169,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi2622)(a0) mv a0, s3 call printf@plt + ld a5, 88(sp) # 8-byte Folded Reload addi a0, sp, 128 vl2r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -91194,7 +91182,6 @@ add a0, sp, a0 addi a0, a0, 128 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld a5, 88(sp) # 8-byte Folded Reload ld a0, 112(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi2621)(a0) j .LBB170_23 @@ -91458,10 +91445,10 @@ addi s4, s2, 64 addi s6, s2, 72 sub a1, a1, a0 - addi s8, a1, -10 + addi a6, a1, -10 addi a7, s2, 80 csrr a0, vlenb - slli t0, a0, 1 + slli s8, a0, 1 srli t1, a0, 2 fmv.d.x fs0, zero .Lpcrel_hi2657: @@ -91494,14 +91481,14 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi2665) sd a0, 40(sp) # 8-byte Folded Spill - sd a7, 72(sp) # 8-byte Folded Spill - sd t0, 64(sp) # 8-byte Folded Spill - sd t1, 56(sp) # 8-byte Folded Spill csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 112 vs2r.v v12, (a0) # Unknown-size Folded Spill + sd a6, 72(sp) # 8-byte Folded Spill + sd a7, 64(sp) # 8-byte Folded Spill + sd t1, 56(sp) # 8-byte Folded Spill sd t2, 48(sp) # 8-byte Folded Spill j .LBB171_8 .LBB171_7: # %_Z9check_sumIdEvT_.exit.us @@ -91626,11 +91613,11 @@ bge a0, s1, .LBB171_17 # %bb.11: # %for.body6.us.preheader # in Loop: Header=BB171_8 Depth=1 - bltu s8, t1, .LBB171_15 + bltu a6, t1, .LBB171_15 # %bb.12: # %vector.ph114 # in Loop: Header=BB171_8 Depth=1 neg a0, t1 - and a0, s8, a0 + and a0, a6, a0 add a3, a3, a0 vsetvli a1, zero, e64, m2, ta, ma mv a1, a0 @@ -91648,11 +91635,11 @@ vfredosum.vs v8, v8, v10 vfmv.f.s fa5, v8 sub a1, a1, t1 - add a4, a4, t0 + add a4, a4, s8 bnez a1, .LBB171_13 # %bb.14: # %middle.block112 # in Loop: Header=BB171_8 Depth=1 - beq s8, a0, .LBB171_17 + beq a6, a0, .LBB171_17 .LBB171_15: # %for.body6.us.preheader124 # in Loop: Header=BB171_8 Depth=1 slli a0, a3, 3 @@ -91703,15 +91690,15 @@ sd a5, 80(sp) # 8-byte Folded Spill call printf@plt ld t2, 48(sp) # 8-byte Folded Reload + ld t1, 56(sp) # 8-byte Folded Reload + ld a7, 64(sp) # 8-byte Folded Reload + ld a6, 72(sp) # 8-byte Folded Reload + ld a5, 80(sp) # 8-byte Folded Reload csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 112 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld t1, 56(sp) # 8-byte Folded Reload - ld t0, 64(sp) # 8-byte Folded Reload - ld a7, 72(sp) # 8-byte Folded Reload - ld a5, 80(sp) # 8-byte Folded Reload j .LBB171_7 .LBB171_21: # %for.cond1.preheader.lr.ph.split li s0, 0 @@ -92108,10 +92095,10 @@ addi s6, s2, 56 addi s4, s2, 64 sub a2, a2, a0 - addi s8, a2, -9 + addi a7, a2, -9 addi t0, s2, 72 csrr a0, vlenb - slli t1, a0, 1 + slli s8, a0, 1 srli t2, a0, 2 fmv.d.x fs0, zero .Lpcrel_hi2691: @@ -92144,14 +92131,14 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi2699) sd a0, 40(sp) # 8-byte Folded Spill - sd t0, 72(sp) # 8-byte Folded Spill - sd t1, 64(sp) # 8-byte Folded Spill - sd t2, 56(sp) # 8-byte Folded Spill csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 112 vs2r.v v12, (a0) # Unknown-size Folded Spill + sd a7, 72(sp) # 8-byte Folded Spill + sd t0, 64(sp) # 8-byte Folded Spill + sd t2, 56(sp) # 8-byte Folded Spill sd t3, 48(sp) # 8-byte Folded Spill j .LBB172_8 .LBB172_7: # %_Z9check_sumIdEvT_.exit.us @@ -92264,11 +92251,11 @@ bge a0, s1, .LBB172_17 # %bb.11: # %for.body6.us.preheader # in Loop: Header=BB172_8 Depth=1 - bltu s8, t2, .LBB172_15 + bltu a7, t2, .LBB172_15 # %bb.12: # %vector.ph106 # in Loop: Header=BB172_8 Depth=1 neg a0, t2 - and a0, s8, a0 + and a0, a7, a0 add a4, a4, a0 vsetvli a2, zero, e64, m2, ta, ma mv a2, a0 @@ -92286,11 +92273,11 @@ vfredosum.vs v8, v8, v10 vfmv.f.s fa5, v8 sub a2, a2, t2 - add a5, a5, t1 + add a5, a5, s8 bnez a2, .LBB172_13 # %bb.14: # %middle.block104 # in Loop: Header=BB172_8 Depth=1 - beq s8, a0, .LBB172_17 + beq a7, a0, .LBB172_17 .LBB172_15: # %for.body6.us.preheader116 # in Loop: Header=BB172_8 Depth=1 slli a0, a4, 3 @@ -92341,15 +92328,15 @@ sd a6, 80(sp) # 8-byte Folded Spill call printf@plt ld t3, 48(sp) # 8-byte Folded Reload + ld t2, 56(sp) # 8-byte Folded Reload + ld t0, 64(sp) # 8-byte Folded Reload + ld a7, 72(sp) # 8-byte Folded Reload + ld a6, 80(sp) # 8-byte Folded Reload csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 112 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld t2, 56(sp) # 8-byte Folded Reload - ld t1, 64(sp) # 8-byte Folded Reload - ld t0, 72(sp) # 8-byte Folded Reload - ld a6, 80(sp) # 8-byte Folded Reload ld a0, 88(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi2688)(a0) j .LBB172_7 @@ -93343,7 +93330,7 @@ # %bb.5: # %for.cond1.preheader.us.preheader mv a2, s1 .LBB174_6: # %for.cond1.preheader.us.preheader - li s4, 0 + li a7, 0 addi s9, s2, 8 addi s10, s2, 16 addi s11, s2, 24 @@ -93351,10 +93338,10 @@ addi s5, s2, 40 addi s6, s2, 48 sub a2, a2, a0 - addi s8, a2, -7 - addi t0, s2, 56 + addi a6, a2, -7 + addi s3, s2, 56 csrr a0, vlenb - slli s3, a0, 1 + slli s8, a0, 1 srli t2, a0, 2 fmv.d.x fs0, zero .Lpcrel_hi2758: @@ -93382,24 +93369,23 @@ auipc a0, %pcrel_hi(.LCPI174_4) fld fs7, %pcrel_lo(.Lpcrel_hi2765)(a0) .Lpcrel_hi2761: - auipc t3, %pcrel_hi(init_value) + auipc s4, %pcrel_hi(init_value) .Lpcrel_hi2766: auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi2766) sd a0, 40(sp) # 8-byte Folded Spill - sd t0, 64(sp) # 8-byte Folded Spill - sd t2, 56(sp) # 8-byte Folded Spill csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 96 vs2r.v v12, (a0) # Unknown-size Folded Spill - sd t3, 48(sp) # 8-byte Folded Spill + sd a6, 56(sp) # 8-byte Folded Spill + sd t2, 48(sp) # 8-byte Folded Spill j .LBB174_8 .LBB174_7: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB174_8 Depth=1 - addiw s4, s4, 1 - bge s4, a1, .LBB174_34 + addiw a7, a7, 1 + bge a7, a1, .LBB174_34 .LBB174_8: # %for.cond1.preheader.us # =>This Loop Header: Depth=1 # Child Loop BB174_9 Depth 2 @@ -93407,7 +93393,7 @@ # Child Loop BB174_16 Depth 2 li a0, 0 li a3, 7 - mv a4, t0 + mv a4, s3 fmv.d fa5, fs0 .LBB174_9: # %for.body3.us # Parent Loop BB174_8 Depth=1 @@ -93488,11 +93474,11 @@ bge a0, s1, .LBB174_17 # %bb.11: # %for.body6.us.preheader # in Loop: Header=BB174_8 Depth=1 - bltu s8, t2, .LBB174_15 + bltu a6, t2, .LBB174_15 # %bb.12: # %vector.ph100 # in Loop: Header=BB174_8 Depth=1 neg a0, t2 - and a0, s8, a0 + and a0, a6, a0 add a2, a2, a0 vsetvli a3, zero, e64, m2, ta, ma mv a3, a0 @@ -93510,11 +93496,11 @@ vfredosum.vs v8, v8, v10 vfmv.f.s fa5, v8 sub a3, a3, t2 - add a5, a5, s3 + add a5, a5, s8 bnez a3, .LBB174_13 # %bb.14: # %middle.block98 # in Loop: Header=BB174_8 Depth=1 - beq s8, a0, .LBB174_17 + beq a6, a0, .LBB174_17 .LBB174_15: # %for.body6.us.preheader110 # in Loop: Header=BB174_8 Depth=1 slli a0, a2, 3 @@ -93544,7 +93530,7 @@ fmv.d fa4, fs6 .LBB174_19: # %for.end9.us # in Loop: Header=BB174_8 Depth=1 - fld fa3, %pcrel_lo(.Lpcrel_hi2761)(t3) + fld fa3, %pcrel_lo(.Lpcrel_hi2761)(s4) fadd.d fa3, fa3, fs1 fmadd.d fa3, fa3, fs3, fs2 fadd.d fa3, fa3, fs1 @@ -93562,15 +93548,16 @@ ld a0, 80(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi2756)(a0) ld a0, 40(sp) # 8-byte Folded Reload + sd a7, 64(sp) # 8-byte Folded Spill call printf@plt - ld t3, 48(sp) # 8-byte Folded Reload + ld t2, 48(sp) # 8-byte Folded Reload + ld a7, 64(sp) # 8-byte Folded Reload + ld a6, 56(sp) # 8-byte Folded Reload csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 96 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld t2, 56(sp) # 8-byte Folded Reload - ld t0, 64(sp) # 8-byte Folded Reload ld a0, 72(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi2755)(a0) j .LBB174_7 @@ -93963,11 +93950,11 @@ addi s11, s2, 32 addi s0, s2, 40 sub a2, a2, a0 - addi s6, a2, -6 + addi a6, a2, -6 addi s5, s2, 48 csrr a0, vlenb slli s3, a0, 1 - srli t3, a0, 2 + srli s6, a0, 2 fmv.d.x fs0, zero .Lpcrel_hi2791: auipc a0, %pcrel_hi(.LCPI175_0) @@ -94004,7 +93991,7 @@ add a0, sp, a0 addi a0, a0, 80 vs2r.v v12, (a0) # Unknown-size Folded Spill - sd t3, 48(sp) # 8-byte Folded Spill + sd a6, 48(sp) # 8-byte Folded Spill j .LBB175_8 .LBB175_7: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB175_8 Depth=1 @@ -94090,11 +94077,11 @@ bge a2, s1, .LBB175_17 # %bb.11: # %for.body6.us.preheader # in Loop: Header=BB175_8 Depth=1 - bltu s6, t3, .LBB175_15 + bltu a6, s6, .LBB175_15 # %bb.12: # %vector.ph95 # in Loop: Header=BB175_8 Depth=1 - neg a2, t3 - and a2, s6, a2 + neg a2, s6 + and a2, a6, a2 add a0, a0, a2 vsetvli a3, zero, e64, m2, ta, ma mv a3, a2 @@ -94111,12 +94098,12 @@ vfmv.s.f v10, fa5 vfredosum.vs v8, v8, v10 vfmv.f.s fa5, v8 - sub a3, a3, t3 + sub a3, a3, s6 add a5, a5, s3 bnez a3, .LBB175_13 # %bb.14: # %middle.block93 # in Loop: Header=BB175_8 Depth=1 - beq s6, a2, .LBB175_17 + beq a6, a2, .LBB175_17 .LBB175_15: # %for.body6.us.preheader105 # in Loop: Header=BB175_8 Depth=1 slli a2, a0, 3 @@ -94165,7 +94152,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi2790)(a0) ld a0, 40(sp) # 8-byte Folded Reload call printf@plt - ld t3, 48(sp) # 8-byte Folded Reload + ld a6, 48(sp) # 8-byte Folded Reload csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 @@ -94564,11 +94551,11 @@ addi s11, s2, 24 addi s0, s2, 32 sub a2, a2, a0 - addi s6, a2, -5 + addi a6, a2, -5 addi s5, s2, 40 csrr a0, vlenb slli s3, a0, 1 - srli t3, a0, 2 + srli s6, a0, 2 fmv.d.x fs0, zero .Lpcrel_hi2824: auipc a0, %pcrel_hi(.LCPI176_0) @@ -94605,7 +94592,7 @@ add a0, sp, a0 addi a0, a0, 80 vs2r.v v12, (a0) # Unknown-size Folded Spill - sd t3, 48(sp) # 8-byte Folded Spill + sd a6, 48(sp) # 8-byte Folded Spill j .LBB176_8 .LBB176_7: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB176_8 Depth=1 @@ -94681,11 +94668,11 @@ bge a2, s1, .LBB176_17 # %bb.11: # %for.body6.us.preheader # in Loop: Header=BB176_8 Depth=1 - bltu s6, t3, .LBB176_15 + bltu a6, s6, .LBB176_15 # %bb.12: # %vector.ph94 # in Loop: Header=BB176_8 Depth=1 - neg a2, t3 - and a2, s6, a2 + neg a2, s6 + and a2, a6, a2 add a0, a0, a2 vsetvli a3, zero, e64, m2, ta, ma mv a3, a2 @@ -94702,12 +94689,12 @@ vfmv.s.f v10, fa5 vfredosum.vs v8, v8, v10 vfmv.f.s fa5, v8 - sub a3, a3, t3 + sub a3, a3, s6 add a5, a5, s3 bnez a3, .LBB176_13 # %bb.14: # %middle.block92 # in Loop: Header=BB176_8 Depth=1 - beq s6, a2, .LBB176_17 + beq a6, a2, .LBB176_17 .LBB176_15: # %for.body6.us.preheader104 # in Loop: Header=BB176_8 Depth=1 slli a2, a0, 3 @@ -94756,7 +94743,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi2823)(a0) ld a0, 40(sp) # 8-byte Folded Reload call printf@plt - ld t3, 48(sp) # 8-byte Folded Reload + ld a6, 48(sp) # 8-byte Folded Reload csrr a0, vlenb slli a0, a0, 3 add a0, sp, a0 @@ -97928,7 +97915,7 @@ sd a0, %pcrel_lo(.Lpcrel_hi3010)(a2) .Lpcrel_hi3012: auipc a0, %pcrel_hi(current_test) - sd a0, 96(sp) # 8-byte Folded Spill + sd a0, 88(sp) # 8-byte Folded Spill blez a1, .LBB182_40 # %bb.1: # %while.cond.preheader.lr.ph li a0, 31 @@ -98034,7 +98021,7 @@ addi a4, a2, 192 addi t1, a2, 200 addi a0, a2, 208 - sd a0, 88(sp) # 8-byte Folded Spill + sd a0, 200(sp) # 8-byte Folded Spill addi s0, a2, 216 addi s5, a2, 224 addi s3, a2, 232 @@ -98044,18 +98031,18 @@ .Lpcrel_hi3017: auipc a0, %pcrel_hi(init_value) sd a0, 72(sp) # 8-byte Folded Spill - sd t0, 200(sp) # 8-byte Folded Spill - sd a5, 168(sp) # 8-byte Folded Spill - sd a6, 160(sp) # 8-byte Folded Spill - sd a7, 152(sp) # 8-byte Folded Spill - sd t2, 144(sp) # 8-byte Folded Spill - sd t3, 136(sp) # 8-byte Folded Spill - sd t4, 128(sp) # 8-byte Folded Spill - sd t5, 120(sp) # 8-byte Folded Spill - sd t6, 112(sp) # 8-byte Folded Spill - sd ra, 104(sp) # 8-byte Folded Spill addi a0, sp, 288 vs2r.v v12, (a0) # Unknown-size Folded Spill + sd t0, 168(sp) # 8-byte Folded Spill + sd a5, 160(sp) # 8-byte Folded Spill + sd a6, 152(sp) # 8-byte Folded Spill + sd a7, 144(sp) # 8-byte Folded Spill + sd t2, 136(sp) # 8-byte Folded Spill + sd t3, 128(sp) # 8-byte Folded Spill + sd t4, 120(sp) # 8-byte Folded Spill + sd t5, 112(sp) # 8-byte Folded Spill + sd t6, 104(sp) # 8-byte Folded Spill + sd ra, 96(sp) # 8-byte Folded Spill j .LBB182_8 .LBB182_7: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB182_8 Depth=1 @@ -98078,8 +98065,6 @@ mv t1, s4 mv s7, a3 mv s9, a4 - mv t0, s11 - ld s11, 88(sp) # 8-byte Folded Reload .LBB182_9: # %while.body.us # Parent Loop BB182_8 Depth=1 # => This Inner Loop Header: Depth=2 @@ -98161,8 +98146,7 @@ fmadd.d fa4, fa4, fs2, fs3 fadd.d fa4, fa4, fs1 fmadd.d fa4, fa4, fs2, fs3 - ld a4, 200(sp) # 8-byte Folded Reload - add a4, a4, a3 + add a4, t0, a3 fld fa3, 0(a4) fadd.d fa4, fa4, fs1 fmadd.d fa4, fa4, fs2, fs3 @@ -98324,7 +98308,8 @@ fmadd.d fa4, fa4, fs2, fs3 fadd.d fa4, fa4, fs1 fmadd.d fa4, fa4, fs2, fs3 - add a4, s11, a3 + ld a4, 200(sp) # 8-byte Folded Reload + add a4, a4, a3 fld fa3, 0(a4) fadd.d fa4, fa4, fs1 fmadd.d fa4, fa4, fs2, fs3 @@ -98360,7 +98345,7 @@ fmadd.d fa4, fa4, fs2, fs3 fadd.d fa4, fa4, fs1 fmadd.d fa4, fa4, fs2, fs3 - add a3, t0, a3 + add a3, s11, a3 fld fa3, 0(a3) fadd.d fa4, fa4, fs1 fmadd.d fa4, fa4, fs2, fs3 @@ -98390,7 +98375,6 @@ ld a2, 64(sp) # 8-byte Folded Reload ld a6, 56(sp) # 8-byte Folded Reload mv t1, s10 - mv s11, t0 bltu a2, a6, .LBB182_15 # %bb.12: # %vector.ph328 # in Loop: Header=BB182_8 Depth=1 @@ -98443,21 +98427,21 @@ .LBB182_17: # in Loop: Header=BB182_8 Depth=1 mv s4, t1 mv t1, s10 - mv s11, t0 .LBB182_18: # %while.end6.us # in Loop: Header=BB182_8 Depth=1 fabs.d fa4, fa5 flt.d a0, fs5, fa4 fmv.d fa4, fa5 - ld a5, 168(sp) # 8-byte Folded Reload - ld a6, 160(sp) # 8-byte Folded Reload - ld a7, 152(sp) # 8-byte Folded Reload - ld t2, 144(sp) # 8-byte Folded Reload - ld t3, 136(sp) # 8-byte Folded Reload - ld t4, 128(sp) # 8-byte Folded Reload - ld t5, 120(sp) # 8-byte Folded Reload - ld t6, 112(sp) # 8-byte Folded Reload - ld ra, 104(sp) # 8-byte Folded Reload + ld t0, 168(sp) # 8-byte Folded Reload + ld a5, 160(sp) # 8-byte Folded Reload + ld a6, 152(sp) # 8-byte Folded Reload + ld a7, 144(sp) # 8-byte Folded Reload + ld t2, 136(sp) # 8-byte Folded Reload + ld t3, 128(sp) # 8-byte Folded Reload + ld t4, 120(sp) # 8-byte Folded Reload + ld t5, 112(sp) # 8-byte Folded Reload + ld t6, 104(sp) # 8-byte Folded Reload + ld ra, 96(sp) # 8-byte Folded Reload mv a3, s7 mv a4, s9 bnez a0, .LBB182_20 @@ -98482,24 +98466,25 @@ bnez a0, .LBB182_7 # %bb.21: # %if.then.i.us # in Loop: Header=BB182_8 Depth=1 - ld a0, 96(sp) # 8-byte Folded Reload + ld a0, 88(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi3012)(a0) ld a0, 48(sp) # 8-byte Folded Reload call printf@plt mv t1, s10 mv a4, s9 + mv a3, s7 + ld ra, 96(sp) # 8-byte Folded Reload + ld t6, 104(sp) # 8-byte Folded Reload + ld t5, 112(sp) # 8-byte Folded Reload + ld t4, 120(sp) # 8-byte Folded Reload + ld t3, 128(sp) # 8-byte Folded Reload + ld t2, 136(sp) # 8-byte Folded Reload + ld a7, 144(sp) # 8-byte Folded Reload + ld a6, 152(sp) # 8-byte Folded Reload + ld a5, 160(sp) # 8-byte Folded Reload + ld t0, 168(sp) # 8-byte Folded Reload addi a0, sp, 288 vl2r.v v12, (a0) # Unknown-size Folded Reload - mv a3, s7 - ld ra, 104(sp) # 8-byte Folded Reload - ld t6, 112(sp) # 8-byte Folded Reload - ld t5, 120(sp) # 8-byte Folded Reload - ld t4, 128(sp) # 8-byte Folded Reload - ld t3, 136(sp) # 8-byte Folded Reload - ld t2, 144(sp) # 8-byte Folded Reload - ld a7, 152(sp) # 8-byte Folded Reload - ld a6, 160(sp) # 8-byte Folded Reload - ld a5, 168(sp) # 8-byte Folded Reload j .LBB182_7 .LBB182_22: # %while.cond.preheader.lr.ph.split ld a0, 192(sp) # 8-byte Folded Reload @@ -98636,7 +98621,7 @@ bnez a0, .LBB182_24 # %bb.35: # %if.then.i.us202 # in Loop: Header=BB182_25 Depth=1 - ld a0, 96(sp) # 8-byte Folded Reload + ld a0, 88(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi3012)(a0) mv a0, s3 call printf@plt @@ -98689,7 +98674,7 @@ bnez a0, .LBB182_37 # %bb.39: # %if.then.i # in Loop: Header=BB182_38 Depth=1 - ld a0, 96(sp) # 8-byte Folded Reload + ld a0, 88(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi3012)(a0) mv a0, s1 call printf@plt @@ -98705,7 +98690,7 @@ .Lpcrel_hi3041: auipc s2, %pcrel_hi(allocated_results) lw a3, %pcrel_lo(.Lpcrel_hi3041)(s2) - ld s4, 96(sp) # 8-byte Folded Reload + ld s4, 88(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi3012)(s4) mv s1, a0 ld a0, 32(sp) # 8-byte Folded Reload @@ -98976,6 +98961,8 @@ .Lpcrel_hi3050: auipc a0, %pcrel_hi(init_value) sd a0, 80(sp) # 8-byte Folded Spill + addi a0, sp, 272 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd ra, 72(sp) # 8-byte Folded Spill sd a7, 168(sp) # 8-byte Folded Spill sd a5, 160(sp) # 8-byte Folded Spill @@ -98986,8 +98973,6 @@ sd t4, 120(sp) # 8-byte Folded Spill sd t5, 112(sp) # 8-byte Folded Spill sd t6, 104(sp) # 8-byte Folded Spill - addi a0, sp, 272 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB183_8 .LBB183_7: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB183_8 Depth=1 @@ -99396,8 +99381,6 @@ lw a1, %pcrel_lo(.Lpcrel_hi3046)(a0) ld a0, 48(sp) # 8-byte Folded Reload call printf@plt - addi a0, sp, 272 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t6, 104(sp) # 8-byte Folded Reload ld t5, 112(sp) # 8-byte Folded Reload ld t4, 120(sp) # 8-byte Folded Reload @@ -99408,6 +99391,8 @@ ld a5, 160(sp) # 8-byte Folded Reload ld a7, 168(sp) # 8-byte Folded Reload ld ra, 72(sp) # 8-byte Folded Reload + addi a0, sp, 272 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB183_7 .LBB183_22: # %while.cond.preheader.lr.ph.split ld a0, 192(sp) # 8-byte Folded Reload @@ -99957,6 +99942,8 @@ .Lpcrel_hi3085: auipc a0, %pcrel_hi(init_value) sd a0, 80(sp) # 8-byte Folded Spill + addi a0, sp, 272 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd ra, 72(sp) # 8-byte Folded Spill sd t0, 168(sp) # 8-byte Folded Spill sd a5, 160(sp) # 8-byte Folded Spill @@ -99967,8 +99954,6 @@ sd t4, 120(sp) # 8-byte Folded Spill sd t5, 112(sp) # 8-byte Folded Spill sd t6, 104(sp) # 8-byte Folded Spill - addi a0, sp, 272 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB185_8 .LBB185_7: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB185_8 Depth=1 @@ -100368,8 +100353,6 @@ lw a1, %pcrel_lo(.Lpcrel_hi3080)(a0) ld a0, 48(sp) # 8-byte Folded Reload call printf@plt - addi a0, sp, 272 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t6, 104(sp) # 8-byte Folded Reload ld t5, 112(sp) # 8-byte Folded Reload ld t4, 120(sp) # 8-byte Folded Reload @@ -100380,6 +100363,8 @@ ld a5, 160(sp) # 8-byte Folded Reload ld t0, 168(sp) # 8-byte Folded Reload ld ra, 72(sp) # 8-byte Folded Reload + addi a0, sp, 272 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB185_7 .LBB185_22: # %while.cond.preheader.lr.ph.split ld a0, 192(sp) # 8-byte Folded Reload @@ -100850,6 +100835,8 @@ .Lpcrel_hi3119: auipc a0, %pcrel_hi(init_value) sd a0, 112(sp) # 8-byte Folded Spill + addi a0, sp, 240 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd t3, 104(sp) # 8-byte Folded Spill sd t4, 96(sp) # 8-byte Folded Spill sd t5, 88(sp) # 8-byte Folded Spill @@ -100860,8 +100847,6 @@ sd a6, 152(sp) # 8-byte Folded Spill sd t1, 144(sp) # 8-byte Folded Spill sd t2, 136(sp) # 8-byte Folded Spill - addi a0, sp, 240 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB186_8 .LBB186_7: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB186_8 Depth=1 @@ -101246,8 +101231,6 @@ lw a1, %pcrel_lo(.Lpcrel_hi3114)(a0) ld a0, 48(sp) # 8-byte Folded Reload call printf@plt - addi a0, sp, 240 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t2, 136(sp) # 8-byte Folded Reload ld t1, 144(sp) # 8-byte Folded Reload ld a6, 152(sp) # 8-byte Folded Reload @@ -101258,6 +101241,8 @@ ld t5, 88(sp) # 8-byte Folded Reload ld t4, 96(sp) # 8-byte Folded Reload ld t3, 104(sp) # 8-byte Folded Reload + addi a0, sp, 240 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB186_7 .LBB186_22: # %while.cond.preheader.lr.ph.split ld a0, 192(sp) # 8-byte Folded Reload @@ -101730,6 +101715,8 @@ .Lpcrel_hi3153: auipc a0, %pcrel_hi(init_value) sd a0, 96(sp) # 8-byte Folded Spill + addi a0, sp, 256 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd t5, 88(sp) # 8-byte Folded Spill sd t6, 80(sp) # 8-byte Folded Spill sd ra, 72(sp) # 8-byte Folded Spill @@ -101740,8 +101727,6 @@ sd t2, 136(sp) # 8-byte Folded Spill sd t3, 128(sp) # 8-byte Folded Spill sd t4, 120(sp) # 8-byte Folded Spill - addi a0, sp, 256 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB187_8 .LBB187_7: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB187_8 Depth=1 @@ -102119,8 +102104,6 @@ lw a1, %pcrel_lo(.Lpcrel_hi3148)(a0) ld a0, 48(sp) # 8-byte Folded Reload call printf@plt - addi a0, sp, 256 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t4, 120(sp) # 8-byte Folded Reload ld t3, 128(sp) # 8-byte Folded Reload ld t2, 136(sp) # 8-byte Folded Reload @@ -102131,6 +102114,8 @@ ld ra, 72(sp) # 8-byte Folded Reload ld t6, 80(sp) # 8-byte Folded Reload ld t5, 88(sp) # 8-byte Folded Reload + addi a0, sp, 256 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB187_7 .LBB187_22: # %while.cond.preheader.lr.ph.split ld a0, 192(sp) # 8-byte Folded Reload @@ -102600,6 +102585,8 @@ .Lpcrel_hi3187: auipc a0, %pcrel_hi(init_value) sd a0, 112(sp) # 8-byte Folded Spill + addi a0, sp, 240 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd t3, 104(sp) # 8-byte Folded Spill sd t4, 96(sp) # 8-byte Folded Spill sd t5, 88(sp) # 8-byte Folded Spill @@ -102610,8 +102597,6 @@ sd a6, 152(sp) # 8-byte Folded Spill sd t1, 144(sp) # 8-byte Folded Spill sd t2, 136(sp) # 8-byte Folded Spill - addi a0, sp, 240 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB188_8 .LBB188_7: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB188_8 Depth=1 @@ -102976,8 +102961,6 @@ lw a1, %pcrel_lo(.Lpcrel_hi3182)(a0) ld a0, 48(sp) # 8-byte Folded Reload call printf@plt - addi a0, sp, 240 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t2, 136(sp) # 8-byte Folded Reload ld t1, 144(sp) # 8-byte Folded Reload ld a6, 152(sp) # 8-byte Folded Reload @@ -102988,6 +102971,8 @@ ld t5, 88(sp) # 8-byte Folded Reload ld t4, 96(sp) # 8-byte Folded Reload ld t3, 104(sp) # 8-byte Folded Reload + addi a0, sp, 240 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB188_7 .LBB188_22: # %while.cond.preheader.lr.ph.split ld a0, 192(sp) # 8-byte Folded Reload @@ -103459,6 +103444,8 @@ .Lpcrel_hi3221: auipc a0, %pcrel_hi(init_value) sd a0, 112(sp) # 8-byte Folded Spill + addi a0, sp, 240 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd t3, 104(sp) # 8-byte Folded Spill sd t4, 96(sp) # 8-byte Folded Spill sd t5, 88(sp) # 8-byte Folded Spill @@ -103469,8 +103456,6 @@ sd a6, 152(sp) # 8-byte Folded Spill sd a7, 144(sp) # 8-byte Folded Spill sd t2, 136(sp) # 8-byte Folded Spill - addi a0, sp, 240 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB189_8 .LBB189_7: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB189_8 Depth=1 @@ -103826,8 +103811,6 @@ lw a1, %pcrel_lo(.Lpcrel_hi3216)(a0) ld a0, 48(sp) # 8-byte Folded Reload call printf@plt - addi a0, sp, 240 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t2, 136(sp) # 8-byte Folded Reload ld a7, 144(sp) # 8-byte Folded Reload ld a6, 152(sp) # 8-byte Folded Reload @@ -103838,6 +103821,8 @@ ld t5, 88(sp) # 8-byte Folded Reload ld t4, 96(sp) # 8-byte Folded Reload ld t3, 104(sp) # 8-byte Folded Reload + addi a0, sp, 240 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB189_7 .LBB189_22: # %while.cond.preheader.lr.ph.split ld a0, 192(sp) # 8-byte Folded Reload @@ -104289,6 +104274,8 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi3259) sd a0, 40(sp) # 8-byte Folded Spill + addi a0, sp, 176 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a6, 120(sp) # 8-byte Folded Spill sd t0, 112(sp) # 8-byte Folded Spill sd t1, 104(sp) # 8-byte Folded Spill @@ -104299,8 +104286,6 @@ sd t6, 64(sp) # 8-byte Folded Spill sd ra, 56(sp) # 8-byte Folded Spill sd a2, 48(sp) # 8-byte Folded Spill - addi a0, sp, 176 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB190_8 .LBB190_7: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB190_8 Depth=1 @@ -104634,8 +104619,6 @@ ld a0, 40(sp) # 8-byte Folded Reload sd a7, 136(sp) # 8-byte Folded Spill call printf@plt - addi a0, sp, 176 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld ra, 56(sp) # 8-byte Folded Reload ld t6, 64(sp) # 8-byte Folded Reload ld t5, 72(sp) # 8-byte Folded Reload @@ -104647,6 +104630,8 @@ ld a7, 136(sp) # 8-byte Folded Reload ld a6, 120(sp) # 8-byte Folded Reload ld a5, 128(sp) # 8-byte Folded Reload + addi a0, sp, 176 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB190_7 .LBB190_21: # %while.cond.preheader.lr.ph.split li s0, 0 @@ -104781,9 +104766,9 @@ lw a1, %pcrel_lo(.Lpcrel_hi3250)(a0) mv a0, s3 call printf@plt + ld a5, 128(sp) # 8-byte Folded Reload addi a0, sp, 176 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld a5, 128(sp) # 8-byte Folded Reload ld a0, 160(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi3249)(a0) j .LBB190_23 @@ -105108,6 +105093,8 @@ .Lpcrel_hi3288: auipc a0, %pcrel_hi(init_value) sd a0, 136(sp) # 8-byte Folded Spill + addi a0, sp, 224 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a7, 128(sp) # 8-byte Folded Spill sd t1, 120(sp) # 8-byte Folded Spill sd t2, 112(sp) # 8-byte Folded Spill @@ -105119,8 +105106,6 @@ sd t0, 176(sp) # 8-byte Folded Spill sd a5, 168(sp) # 8-byte Folded Spill sd a6, 160(sp) # 8-byte Folded Spill - addi a0, sp, 224 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB191_8 .LBB191_7: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB191_8 Depth=1 @@ -105448,8 +105433,6 @@ lw a1, %pcrel_lo(.Lpcrel_hi3283)(a0) ld a0, 48(sp) # 8-byte Folded Reload call printf@plt - addi a0, sp, 224 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld a6, 160(sp) # 8-byte Folded Reload ld a5, 168(sp) # 8-byte Folded Reload ld t0, 176(sp) # 8-byte Folded Reload @@ -105461,6 +105444,8 @@ ld t2, 112(sp) # 8-byte Folded Reload ld t1, 120(sp) # 8-byte Folded Reload ld a7, 128(sp) # 8-byte Folded Reload + addi a0, sp, 224 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB191_7 .LBB191_21: # %while.cond.preheader.lr.ph.split ld a0, 200(sp) # 8-byte Folded Reload @@ -105922,6 +105907,8 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi3327) sd a0, 48(sp) # 8-byte Folded Spill + addi a0, sp, 208 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a6, 136(sp) # 8-byte Folded Spill sd t0, 128(sp) # 8-byte Folded Spill sd t1, 120(sp) # 8-byte Folded Spill @@ -105932,8 +105919,6 @@ sd t6, 80(sp) # 8-byte Folded Spill sd ra, 72(sp) # 8-byte Folded Spill sd a7, 168(sp) # 8-byte Folded Spill - addi a0, sp, 208 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB192_8 .LBB192_7: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB192_8 Depth=1 @@ -106249,8 +106234,6 @@ lw a1, %pcrel_lo(.Lpcrel_hi3317)(a0) ld a0, 48(sp) # 8-byte Folded Reload call printf@plt - addi a0, sp, 208 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld a7, 168(sp) # 8-byte Folded Reload ld ra, 72(sp) # 8-byte Folded Reload ld t6, 80(sp) # 8-byte Folded Reload @@ -106261,6 +106244,8 @@ ld t1, 120(sp) # 8-byte Folded Reload ld t0, 128(sp) # 8-byte Folded Reload ld a6, 136(sp) # 8-byte Folded Reload + addi a0, sp, 208 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB192_7 .LBB192_21: # %while.cond.preheader.lr.ph.split ld a0, 192(sp) # 8-byte Folded Reload @@ -106726,6 +106711,8 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi3361) sd a0, 48(sp) # 8-byte Folded Spill + addi a0, sp, 208 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a7, 128(sp) # 8-byte Folded Spill sd t1, 120(sp) # 8-byte Folded Spill sd t2, 112(sp) # 8-byte Folded Spill @@ -106735,8 +106722,6 @@ sd t6, 80(sp) # 8-byte Folded Spill sd ra, 72(sp) # 8-byte Folded Spill sd t0, 168(sp) # 8-byte Folded Spill - addi a0, sp, 208 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB193_8 .LBB193_7: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB193_8 Depth=1 @@ -107042,8 +107027,6 @@ lw a1, %pcrel_lo(.Lpcrel_hi3351)(a0) ld a0, 48(sp) # 8-byte Folded Reload call printf@plt - addi a0, sp, 208 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t0, 168(sp) # 8-byte Folded Reload ld ra, 72(sp) # 8-byte Folded Reload ld t6, 80(sp) # 8-byte Folded Reload @@ -107054,6 +107037,8 @@ ld t1, 120(sp) # 8-byte Folded Reload ld a7, 128(sp) # 8-byte Folded Reload ld a6, 136(sp) # 8-byte Folded Reload + addi a0, sp, 208 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB193_7 .LBB193_21: # %while.cond.preheader.lr.ph.split ld a0, 192(sp) # 8-byte Folded Reload @@ -107193,9 +107178,9 @@ lw a1, %pcrel_lo(.Lpcrel_hi3351)(a0) mv a0, s3 call printf@plt + ld a6, 136(sp) # 8-byte Folded Reload addi a0, sp, 208 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld a6, 136(sp) # 8-byte Folded Reload ld a0, 176(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi3350)(a0) j .LBB193_23 @@ -107574,6 +107559,8 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi3395) sd a0, 40(sp) # 8-byte Folded Spill + addi a0, sp, 176 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a6, 120(sp) # 8-byte Folded Spill sd t0, 112(sp) # 8-byte Folded Spill sd t1, 104(sp) # 8-byte Folded Spill @@ -107584,8 +107571,6 @@ sd t6, 64(sp) # 8-byte Folded Spill sd ra, 56(sp) # 8-byte Folded Spill sd a2, 48(sp) # 8-byte Folded Spill - addi a0, sp, 176 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB195_8 .LBB195_7: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB195_8 Depth=1 @@ -107879,8 +107864,6 @@ ld a0, 40(sp) # 8-byte Folded Reload sd a7, 136(sp) # 8-byte Folded Spill call printf@plt - addi a0, sp, 176 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld ra, 56(sp) # 8-byte Folded Reload ld t6, 64(sp) # 8-byte Folded Reload ld t5, 72(sp) # 8-byte Folded Reload @@ -107892,6 +107875,8 @@ ld a7, 136(sp) # 8-byte Folded Reload ld a6, 120(sp) # 8-byte Folded Reload ld a5, 128(sp) # 8-byte Folded Reload + addi a0, sp, 176 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB195_7 .LBB195_21: # %while.cond.preheader.lr.ph.split li s0, 0 @@ -108026,9 +108011,9 @@ lw a1, %pcrel_lo(.Lpcrel_hi3386)(a0) mv a0, s3 call printf@plt + ld a5, 128(sp) # 8-byte Folded Reload addi a0, sp, 176 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld a5, 128(sp) # 8-byte Folded Reload ld a0, 160(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi3385)(a0) j .LBB195_23 @@ -108345,6 +108330,8 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi3429) sd a0, 40(sp) # 8-byte Folded Spill + addi a0, sp, 192 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a7, 112(sp) # 8-byte Folded Spill sd t1, 104(sp) # 8-byte Folded Spill sd t2, 96(sp) # 8-byte Folded Spill @@ -108353,8 +108340,6 @@ sd t5, 72(sp) # 8-byte Folded Spill sd t6, 64(sp) # 8-byte Folded Spill sd a2, 56(sp) # 8-byte Folded Spill - addi a0, sp, 192 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB196_8 .LBB196_7: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB196_8 Depth=1 @@ -108640,8 +108625,6 @@ ld a0, 40(sp) # 8-byte Folded Reload sd t0, 136(sp) # 8-byte Folded Spill call printf@plt - addi a0, sp, 192 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t6, 64(sp) # 8-byte Folded Reload ld t5, 72(sp) # 8-byte Folded Reload ld t4, 80(sp) # 8-byte Folded Reload @@ -108652,6 +108635,8 @@ ld a7, 112(sp) # 8-byte Folded Reload ld a6, 120(sp) # 8-byte Folded Reload ld a5, 128(sp) # 8-byte Folded Reload + addi a0, sp, 192 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB196_7 .LBB196_21: # %while.cond.preheader.lr.ph.split li s0, 0 @@ -108786,10 +108771,10 @@ lw a1, %pcrel_lo(.Lpcrel_hi3419)(a0) mv a0, s3 call printf@plt - addi a0, sp, 192 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld a6, 120(sp) # 8-byte Folded Reload ld a5, 128(sp) # 8-byte Folded Reload + addi a0, sp, 192 + vl2r.v v12, (a0) # Unknown-size Folded Reload ld a0, 176(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi3418)(a0) j .LBB196_23 @@ -109099,6 +109084,8 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi3463) sd a0, 40(sp) # 8-byte Folded Spill + addi a0, sp, 176 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a6, 120(sp) # 8-byte Folded Spill sd t0, 112(sp) # 8-byte Folded Spill sd t1, 104(sp) # 8-byte Folded Spill @@ -109109,8 +109096,6 @@ sd t6, 64(sp) # 8-byte Folded Spill sd ra, 56(sp) # 8-byte Folded Spill sd a2, 48(sp) # 8-byte Folded Spill - addi a0, sp, 176 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB197_8 .LBB197_7: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB197_8 Depth=1 @@ -109384,8 +109369,6 @@ ld a0, 40(sp) # 8-byte Folded Reload sd a7, 136(sp) # 8-byte Folded Spill call printf@plt - addi a0, sp, 176 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld ra, 56(sp) # 8-byte Folded Reload ld t6, 64(sp) # 8-byte Folded Reload ld t5, 72(sp) # 8-byte Folded Reload @@ -109397,6 +109380,8 @@ ld a7, 136(sp) # 8-byte Folded Reload ld a6, 120(sp) # 8-byte Folded Reload ld a5, 128(sp) # 8-byte Folded Reload + addi a0, sp, 176 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB197_7 .LBB197_21: # %while.cond.preheader.lr.ph.split li s0, 0 @@ -109531,9 +109516,9 @@ lw a1, %pcrel_lo(.Lpcrel_hi3453)(a0) mv a0, s3 call printf@plt + ld a5, 128(sp) # 8-byte Folded Reload addi a0, sp, 176 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld a5, 128(sp) # 8-byte Folded Reload ld a0, 160(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi3452)(a0) j .LBB197_23 @@ -109845,6 +109830,8 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi3496) sd a0, 40(sp) # 8-byte Folded Spill + addi a0, sp, 176 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a7, 112(sp) # 8-byte Folded Spill sd t1, 104(sp) # 8-byte Folded Spill sd t2, 96(sp) # 8-byte Folded Spill @@ -109854,8 +109841,6 @@ sd t6, 64(sp) # 8-byte Folded Spill sd ra, 56(sp) # 8-byte Folded Spill sd a2, 48(sp) # 8-byte Folded Spill - addi a0, sp, 176 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB198_8 .LBB198_7: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB198_8 Depth=1 @@ -110119,8 +110104,6 @@ ld a0, 40(sp) # 8-byte Folded Reload sd t0, 136(sp) # 8-byte Folded Spill call printf@plt - addi a0, sp, 176 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld ra, 56(sp) # 8-byte Folded Reload ld t6, 64(sp) # 8-byte Folded Reload ld t5, 72(sp) # 8-byte Folded Reload @@ -110132,6 +110115,8 @@ ld a7, 112(sp) # 8-byte Folded Reload ld a6, 120(sp) # 8-byte Folded Reload ld a5, 128(sp) # 8-byte Folded Reload + addi a0, sp, 176 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB198_7 .LBB198_21: # %while.cond.preheader.lr.ph.split li s0, 0 @@ -110266,10 +110251,10 @@ lw a1, %pcrel_lo(.Lpcrel_hi3487)(a0) mv a0, s3 call printf@plt - addi a0, sp, 176 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld a6, 120(sp) # 8-byte Folded Reload ld a5, 128(sp) # 8-byte Folded Reload + addi a0, sp, 176 + vl2r.v v12, (a0) # Unknown-size Folded Reload ld a0, 160(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi3486)(a0) j .LBB198_23 @@ -111261,6 +111246,11 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi3562) sd a0, 40(sp) # 8-byte Folded Spill + csrr a0, vlenb + slli a0, a0, 2 + add a0, sp, a0 + addi a0, a0, 160 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a7, 104(sp) # 8-byte Folded Spill sd t1, 96(sp) # 8-byte Folded Spill sd t2, 88(sp) # 8-byte Folded Spill @@ -111268,11 +111258,6 @@ sd t4, 72(sp) # 8-byte Folded Spill sd t5, 64(sp) # 8-byte Folded Spill sd t6, 56(sp) # 8-byte Folded Spill - csrr a0, vlenb - slli a0, a0, 2 - add a0, sp, a0 - addi a0, a0, 160 - vs2r.v v12, (a0) # Unknown-size Folded Spill sd ra, 48(sp) # 8-byte Folded Spill j .LBB200_8 .LBB200_7: # %_Z9check_sumIdEvT_.exit.us @@ -111518,11 +111503,6 @@ sd t0, 128(sp) # 8-byte Folded Spill call printf@plt ld ra, 48(sp) # 8-byte Folded Reload - csrr a0, vlenb - slli a0, a0, 2 - add a0, sp, a0 - addi a0, a0, 160 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t6, 56(sp) # 8-byte Folded Reload ld t5, 64(sp) # 8-byte Folded Reload ld t4, 72(sp) # 8-byte Folded Reload @@ -111533,6 +111513,11 @@ ld a7, 104(sp) # 8-byte Folded Reload ld a6, 112(sp) # 8-byte Folded Reload ld a5, 120(sp) # 8-byte Folded Reload + csrr a0, vlenb + slli a0, a0, 2 + add a0, sp, a0 + addi a0, a0, 160 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB200_7 .LBB200_21: # %while.cond.preheader.lr.ph.split li s0, 0 @@ -111652,6 +111637,8 @@ lw a1, %pcrel_lo(.Lpcrel_hi3553)(a0) mv a0, s3 call printf@plt + ld a6, 112(sp) # 8-byte Folded Reload + ld a5, 120(sp) # 8-byte Folded Reload addi a0, sp, 160 vl2r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -111664,8 +111651,6 @@ add a0, sp, a0 addi a0, a0, 160 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld a6, 112(sp) # 8-byte Folded Reload - ld a5, 120(sp) # 8-byte Folded Reload ld a0, 144(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi3552)(a0) j .LBB200_23 @@ -111973,17 +111958,17 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi3596) sd a0, 40(sp) # 8-byte Folded Spill + csrr a0, vlenb + slli a0, a0, 2 + add a0, sp, a0 + addi a0, a0, 144 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a6, 96(sp) # 8-byte Folded Spill sd t0, 88(sp) # 8-byte Folded Spill sd t1, 80(sp) # 8-byte Folded Spill sd t2, 72(sp) # 8-byte Folded Spill sd t3, 64(sp) # 8-byte Folded Spill sd t4, 56(sp) # 8-byte Folded Spill - csrr a0, vlenb - slli a0, a0, 2 - add a0, sp, a0 - addi a0, a0, 144 - vs2r.v v12, (a0) # Unknown-size Folded Spill sd t5, 48(sp) # 8-byte Folded Spill j .LBB201_8 .LBB201_7: # %_Z9check_sumIdEvT_.exit.us @@ -112221,11 +112206,6 @@ sd a7, 112(sp) # 8-byte Folded Spill call printf@plt ld t5, 48(sp) # 8-byte Folded Reload - csrr a0, vlenb - slli a0, a0, 2 - add a0, sp, a0 - addi a0, a0, 144 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t4, 56(sp) # 8-byte Folded Reload ld t3, 64(sp) # 8-byte Folded Reload ld t2, 72(sp) # 8-byte Folded Reload @@ -112234,6 +112214,11 @@ ld a7, 112(sp) # 8-byte Folded Reload ld a6, 96(sp) # 8-byte Folded Reload ld a5, 104(sp) # 8-byte Folded Reload + csrr a0, vlenb + slli a0, a0, 2 + add a0, sp, a0 + addi a0, a0, 144 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB201_7 .LBB201_21: # %while.cond.preheader.lr.ph.split li s0, 0 @@ -112353,6 +112338,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi3586)(a0) mv a0, s3 call printf@plt + ld a5, 104(sp) # 8-byte Folded Reload addi a0, sp, 144 vl2r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -112365,7 +112351,6 @@ add a0, sp, a0 addi a0, a0, 144 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld a5, 104(sp) # 8-byte Folded Reload ld a0, 128(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi3585)(a0) j .LBB201_23 @@ -112674,16 +112659,16 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi3630) sd a0, 40(sp) # 8-byte Folded Spill - sd a7, 88(sp) # 8-byte Folded Spill - sd t1, 80(sp) # 8-byte Folded Spill - sd t2, 72(sp) # 8-byte Folded Spill - sd t3, 64(sp) # 8-byte Folded Spill - sd t4, 56(sp) # 8-byte Folded Spill csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 144 vs2r.v v12, (a0) # Unknown-size Folded Spill + sd a7, 88(sp) # 8-byte Folded Spill + sd t1, 80(sp) # 8-byte Folded Spill + sd t2, 72(sp) # 8-byte Folded Spill + sd t3, 64(sp) # 8-byte Folded Spill + sd t4, 56(sp) # 8-byte Folded Spill sd t5, 48(sp) # 8-byte Folded Spill j .LBB202_8 .LBB202_7: # %_Z9check_sumIdEvT_.exit.us @@ -112911,11 +112896,6 @@ sd t0, 112(sp) # 8-byte Folded Spill call printf@plt ld t5, 48(sp) # 8-byte Folded Reload - csrr a0, vlenb - slli a0, a0, 2 - add a0, sp, a0 - addi a0, a0, 144 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t4, 56(sp) # 8-byte Folded Reload ld t3, 64(sp) # 8-byte Folded Reload ld t2, 72(sp) # 8-byte Folded Reload @@ -112924,6 +112904,11 @@ ld a7, 88(sp) # 8-byte Folded Reload ld a6, 96(sp) # 8-byte Folded Reload ld a5, 104(sp) # 8-byte Folded Reload + csrr a0, vlenb + slli a0, a0, 2 + add a0, sp, a0 + addi a0, a0, 144 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB202_7 .LBB202_21: # %while.cond.preheader.lr.ph.split li s0, 0 @@ -113043,6 +113028,8 @@ lw a1, %pcrel_lo(.Lpcrel_hi3620)(a0) mv a0, s3 call printf@plt + ld a6, 96(sp) # 8-byte Folded Reload + ld a5, 104(sp) # 8-byte Folded Reload addi a0, sp, 144 vl2r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -113055,8 +113042,6 @@ add a0, sp, a0 addi a0, a0, 144 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld a6, 96(sp) # 8-byte Folded Reload - ld a5, 104(sp) # 8-byte Folded Reload ld a0, 128(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi3619)(a0) j .LBB202_23 @@ -113320,10 +113305,10 @@ addi s4, s2, 80 addi s6, s2, 88 sub a1, a1, a0 - addi s8, a1, -12 + addi a6, a1, -12 addi a7, s2, 96 csrr a0, vlenb - slli t0, a0, 1 + slli s8, a0, 1 srli t1, a0, 2 fmv.d.x fs0, zero .Lpcrel_hi3655: @@ -113356,14 +113341,14 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi3663) sd a0, 40(sp) # 8-byte Folded Spill - sd a7, 72(sp) # 8-byte Folded Spill - sd t0, 64(sp) # 8-byte Folded Spill - sd t1, 56(sp) # 8-byte Folded Spill csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 112 vs2r.v v12, (a0) # Unknown-size Folded Spill + sd a6, 72(sp) # 8-byte Folded Spill + sd a7, 64(sp) # 8-byte Folded Spill + sd t1, 56(sp) # 8-byte Folded Spill sd t2, 48(sp) # 8-byte Folded Spill j .LBB203_8 .LBB203_7: # %_Z9check_sumIdEvT_.exit.us @@ -113508,11 +113493,11 @@ bge a0, s1, .LBB203_17 # %bb.11: # %while.body4.us.preheader # in Loop: Header=BB203_8 Depth=1 - bltu s8, t1, .LBB203_15 + bltu a6, t1, .LBB203_15 # %bb.12: # %vector.ph130 # in Loop: Header=BB203_8 Depth=1 neg a0, t1 - and a0, s8, a0 + and a0, a6, a0 add a3, a3, a0 vsetvli a1, zero, e64, m2, ta, ma mv a1, a0 @@ -113530,11 +113515,11 @@ vfredosum.vs v8, v8, v10 vfmv.f.s fa5, v8 sub a1, a1, t1 - add a4, a4, t0 + add a4, a4, s8 bnez a1, .LBB203_13 # %bb.14: # %middle.block128 # in Loop: Header=BB203_8 Depth=1 - beq s8, a0, .LBB203_17 + beq a6, a0, .LBB203_17 .LBB203_15: # %while.body4.us.preheader140 # in Loop: Header=BB203_8 Depth=1 slli a0, a3, 3 @@ -113585,15 +113570,15 @@ sd a5, 80(sp) # 8-byte Folded Spill call printf@plt ld t2, 48(sp) # 8-byte Folded Reload + ld t1, 56(sp) # 8-byte Folded Reload + ld a7, 64(sp) # 8-byte Folded Reload + ld a6, 72(sp) # 8-byte Folded Reload + ld a5, 80(sp) # 8-byte Folded Reload csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 112 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld t1, 56(sp) # 8-byte Folded Reload - ld t0, 64(sp) # 8-byte Folded Reload - ld a7, 72(sp) # 8-byte Folded Reload - ld a5, 80(sp) # 8-byte Folded Reload j .LBB203_7 .LBB203_21: # %while.cond.preheader.lr.ph.split li s0, 0 @@ -114101,15 +114086,15 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi3698) sd a0, 40(sp) # 8-byte Folded Spill - sd a7, 80(sp) # 8-byte Folded Spill - sd t0, 72(sp) # 8-byte Folded Spill - sd t1, 64(sp) # 8-byte Folded Spill - sd t2, 56(sp) # 8-byte Folded Spill csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 128 vs2r.v v12, (a0) # Unknown-size Folded Spill + sd a7, 80(sp) # 8-byte Folded Spill + sd t0, 72(sp) # 8-byte Folded Spill + sd t1, 64(sp) # 8-byte Folded Spill + sd t2, 56(sp) # 8-byte Folded Spill sd t3, 48(sp) # 8-byte Folded Spill j .LBB205_8 .LBB205_7: # %_Z9check_sumIdEvT_.exit.us @@ -114319,17 +114304,17 @@ sd a6, 96(sp) # 8-byte Folded Spill call printf@plt ld t3, 48(sp) # 8-byte Folded Reload - csrr a0, vlenb - slli a0, a0, 2 - add a0, sp, a0 - addi a0, a0, 128 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t2, 56(sp) # 8-byte Folded Reload ld t1, 64(sp) # 8-byte Folded Reload ld t0, 72(sp) # 8-byte Folded Reload ld a7, 80(sp) # 8-byte Folded Reload ld a6, 96(sp) # 8-byte Folded Reload ld a5, 88(sp) # 8-byte Folded Reload + csrr a0, vlenb + slli a0, a0, 2 + add a0, sp, a0 + addi a0, a0, 128 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB205_7 .LBB205_21: # %while.cond.preheader.lr.ph.split li s0, 0 @@ -114449,6 +114434,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi3688)(a0) mv a0, s3 call printf@plt + ld a5, 88(sp) # 8-byte Folded Reload addi a0, sp, 128 vl2r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -114461,7 +114447,6 @@ add a0, sp, a0 addi a0, a0, 128 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld a5, 88(sp) # 8-byte Folded Reload ld a0, 112(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi3687)(a0) j .LBB205_23 @@ -114725,10 +114710,10 @@ addi s4, s2, 64 addi s6, s2, 72 sub a1, a1, a0 - addi s8, a1, -10 + addi a6, a1, -10 addi a7, s2, 80 csrr a0, vlenb - slli t0, a0, 1 + slli s8, a0, 1 srli t1, a0, 2 fmv.d.x fs0, zero .Lpcrel_hi3723: @@ -114761,14 +114746,14 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi3731) sd a0, 40(sp) # 8-byte Folded Spill - sd a7, 72(sp) # 8-byte Folded Spill - sd t0, 64(sp) # 8-byte Folded Spill - sd t1, 56(sp) # 8-byte Folded Spill csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 112 vs2r.v v12, (a0) # Unknown-size Folded Spill + sd a6, 72(sp) # 8-byte Folded Spill + sd a7, 64(sp) # 8-byte Folded Spill + sd t1, 56(sp) # 8-byte Folded Spill sd t2, 48(sp) # 8-byte Folded Spill j .LBB206_8 .LBB206_7: # %_Z9check_sumIdEvT_.exit.us @@ -114893,11 +114878,11 @@ bge a0, s1, .LBB206_17 # %bb.11: # %while.body4.us.preheader # in Loop: Header=BB206_8 Depth=1 - bltu s8, t1, .LBB206_15 + bltu a6, t1, .LBB206_15 # %bb.12: # %vector.ph114 # in Loop: Header=BB206_8 Depth=1 neg a0, t1 - and a0, s8, a0 + and a0, a6, a0 add a3, a3, a0 vsetvli a1, zero, e64, m2, ta, ma mv a1, a0 @@ -114915,11 +114900,11 @@ vfredosum.vs v8, v8, v10 vfmv.f.s fa5, v8 sub a1, a1, t1 - add a4, a4, t0 + add a4, a4, s8 bnez a1, .LBB206_13 # %bb.14: # %middle.block112 # in Loop: Header=BB206_8 Depth=1 - beq s8, a0, .LBB206_17 + beq a6, a0, .LBB206_17 .LBB206_15: # %while.body4.us.preheader124 # in Loop: Header=BB206_8 Depth=1 slli a0, a3, 3 @@ -114970,15 +114955,15 @@ sd a5, 80(sp) # 8-byte Folded Spill call printf@plt ld t2, 48(sp) # 8-byte Folded Reload + ld t1, 56(sp) # 8-byte Folded Reload + ld a7, 64(sp) # 8-byte Folded Reload + ld a6, 72(sp) # 8-byte Folded Reload + ld a5, 80(sp) # 8-byte Folded Reload csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 112 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld t1, 56(sp) # 8-byte Folded Reload - ld t0, 64(sp) # 8-byte Folded Reload - ld a7, 72(sp) # 8-byte Folded Reload - ld a5, 80(sp) # 8-byte Folded Reload j .LBB206_7 .LBB206_21: # %while.cond.preheader.lr.ph.split li s0, 0 @@ -115375,10 +115360,10 @@ addi s6, s2, 56 addi s4, s2, 64 sub a2, a2, a0 - addi s8, a2, -9 + addi a7, a2, -9 addi t0, s2, 72 csrr a0, vlenb - slli t1, a0, 1 + slli s8, a0, 1 srli t2, a0, 2 fmv.d.x fs0, zero .Lpcrel_hi3757: @@ -115411,14 +115396,14 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi3765) sd a0, 40(sp) # 8-byte Folded Spill - sd t0, 72(sp) # 8-byte Folded Spill - sd t1, 64(sp) # 8-byte Folded Spill - sd t2, 56(sp) # 8-byte Folded Spill csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 112 vs2r.v v12, (a0) # Unknown-size Folded Spill + sd a7, 72(sp) # 8-byte Folded Spill + sd t0, 64(sp) # 8-byte Folded Spill + sd t2, 56(sp) # 8-byte Folded Spill sd t3, 48(sp) # 8-byte Folded Spill j .LBB207_8 .LBB207_7: # %_Z9check_sumIdEvT_.exit.us @@ -115531,11 +115516,11 @@ bge a0, s1, .LBB207_17 # %bb.11: # %while.body4.us.preheader # in Loop: Header=BB207_8 Depth=1 - bltu s8, t2, .LBB207_15 + bltu a7, t2, .LBB207_15 # %bb.12: # %vector.ph106 # in Loop: Header=BB207_8 Depth=1 neg a0, t2 - and a0, s8, a0 + and a0, a7, a0 add a4, a4, a0 vsetvli a2, zero, e64, m2, ta, ma mv a2, a0 @@ -115553,11 +115538,11 @@ vfredosum.vs v8, v8, v10 vfmv.f.s fa5, v8 sub a2, a2, t2 - add a5, a5, t1 + add a5, a5, s8 bnez a2, .LBB207_13 # %bb.14: # %middle.block104 # in Loop: Header=BB207_8 Depth=1 - beq s8, a0, .LBB207_17 + beq a7, a0, .LBB207_17 .LBB207_15: # %while.body4.us.preheader116 # in Loop: Header=BB207_8 Depth=1 slli a0, a4, 3 @@ -115608,15 +115593,15 @@ sd a6, 80(sp) # 8-byte Folded Spill call printf@plt ld t3, 48(sp) # 8-byte Folded Reload + ld t2, 56(sp) # 8-byte Folded Reload + ld t0, 64(sp) # 8-byte Folded Reload + ld a7, 72(sp) # 8-byte Folded Reload + ld a6, 80(sp) # 8-byte Folded Reload csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 112 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld t2, 56(sp) # 8-byte Folded Reload - ld t1, 64(sp) # 8-byte Folded Reload - ld t0, 72(sp) # 8-byte Folded Reload - ld a6, 80(sp) # 8-byte Folded Reload ld a0, 88(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi3754)(a0) j .LBB207_7 @@ -116610,7 +116595,7 @@ # %bb.5: # %while.cond.preheader.us.preheader mv a2, s1 .LBB209_6: # %while.cond.preheader.us.preheader - li s4, 0 + li a7, 0 addi s9, s2, 8 addi s10, s2, 16 addi s11, s2, 24 @@ -116618,10 +116603,10 @@ addi s5, s2, 40 addi s6, s2, 48 sub a2, a2, a0 - addi s8, a2, -7 - addi t0, s2, 56 + addi a6, a2, -7 + addi s3, s2, 56 csrr a0, vlenb - slli s3, a0, 1 + slli s8, a0, 1 srli t2, a0, 2 fmv.d.x fs0, zero .Lpcrel_hi3824: @@ -116649,24 +116634,23 @@ auipc a0, %pcrel_hi(.LCPI209_4) fld fs7, %pcrel_lo(.Lpcrel_hi3831)(a0) .Lpcrel_hi3827: - auipc t3, %pcrel_hi(init_value) + auipc s4, %pcrel_hi(init_value) .Lpcrel_hi3832: auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi3832) sd a0, 40(sp) # 8-byte Folded Spill - sd t0, 64(sp) # 8-byte Folded Spill - sd t2, 56(sp) # 8-byte Folded Spill csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 96 vs2r.v v12, (a0) # Unknown-size Folded Spill - sd t3, 48(sp) # 8-byte Folded Spill + sd a6, 56(sp) # 8-byte Folded Spill + sd t2, 48(sp) # 8-byte Folded Spill j .LBB209_8 .LBB209_7: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB209_8 Depth=1 - addiw s4, s4, 1 - bge s4, a1, .LBB209_34 + addiw a7, a7, 1 + bge a7, a1, .LBB209_34 .LBB209_8: # %while.cond.preheader.us # =>This Loop Header: Depth=1 # Child Loop BB209_9 Depth 2 @@ -116674,7 +116658,7 @@ # Child Loop BB209_16 Depth 2 li a0, 0 li a3, 7 - mv a4, t0 + mv a4, s3 fmv.d fa5, fs0 .LBB209_9: # %while.body.us # Parent Loop BB209_8 Depth=1 @@ -116755,11 +116739,11 @@ bge a0, s1, .LBB209_17 # %bb.11: # %while.body4.us.preheader # in Loop: Header=BB209_8 Depth=1 - bltu s8, t2, .LBB209_15 + bltu a6, t2, .LBB209_15 # %bb.12: # %vector.ph100 # in Loop: Header=BB209_8 Depth=1 neg a0, t2 - and a0, s8, a0 + and a0, a6, a0 add a2, a2, a0 vsetvli a3, zero, e64, m2, ta, ma mv a3, a0 @@ -116777,11 +116761,11 @@ vfredosum.vs v8, v8, v10 vfmv.f.s fa5, v8 sub a3, a3, t2 - add a5, a5, s3 + add a5, a5, s8 bnez a3, .LBB209_13 # %bb.14: # %middle.block98 # in Loop: Header=BB209_8 Depth=1 - beq s8, a0, .LBB209_17 + beq a6, a0, .LBB209_17 .LBB209_15: # %while.body4.us.preheader110 # in Loop: Header=BB209_8 Depth=1 slli a0, a2, 3 @@ -116811,7 +116795,7 @@ fmv.d fa4, fs6 .LBB209_19: # %while.end6.us # in Loop: Header=BB209_8 Depth=1 - fld fa3, %pcrel_lo(.Lpcrel_hi3827)(t3) + fld fa3, %pcrel_lo(.Lpcrel_hi3827)(s4) fadd.d fa3, fa3, fs1 fmadd.d fa3, fa3, fs3, fs2 fadd.d fa3, fa3, fs1 @@ -116829,15 +116813,16 @@ ld a0, 80(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi3822)(a0) ld a0, 40(sp) # 8-byte Folded Reload + sd a7, 64(sp) # 8-byte Folded Spill call printf@plt - ld t3, 48(sp) # 8-byte Folded Reload + ld t2, 48(sp) # 8-byte Folded Reload + ld a7, 64(sp) # 8-byte Folded Reload + ld a6, 56(sp) # 8-byte Folded Reload csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 96 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld t2, 56(sp) # 8-byte Folded Reload - ld t0, 64(sp) # 8-byte Folded Reload ld a0, 72(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi3821)(a0) j .LBB209_7 @@ -117230,11 +117215,11 @@ addi s11, s2, 32 addi s0, s2, 40 sub a2, a2, a0 - addi s6, a2, -6 + addi a6, a2, -6 addi s5, s2, 48 csrr a0, vlenb slli s3, a0, 1 - srli t3, a0, 2 + srli s6, a0, 2 fmv.d.x fs0, zero .Lpcrel_hi3857: auipc a0, %pcrel_hi(.LCPI210_0) @@ -117271,7 +117256,7 @@ add a0, sp, a0 addi a0, a0, 80 vs2r.v v12, (a0) # Unknown-size Folded Spill - sd t3, 48(sp) # 8-byte Folded Spill + sd a6, 48(sp) # 8-byte Folded Spill j .LBB210_8 .LBB210_7: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB210_8 Depth=1 @@ -117357,11 +117342,11 @@ bge a2, s1, .LBB210_17 # %bb.11: # %while.body4.us.preheader # in Loop: Header=BB210_8 Depth=1 - bltu s6, t3, .LBB210_15 + bltu a6, s6, .LBB210_15 # %bb.12: # %vector.ph95 # in Loop: Header=BB210_8 Depth=1 - neg a2, t3 - and a2, s6, a2 + neg a2, s6 + and a2, a6, a2 add a0, a0, a2 vsetvli a3, zero, e64, m2, ta, ma mv a3, a2 @@ -117378,12 +117363,12 @@ vfmv.s.f v10, fa5 vfredosum.vs v8, v8, v10 vfmv.f.s fa5, v8 - sub a3, a3, t3 + sub a3, a3, s6 add a5, a5, s3 bnez a3, .LBB210_13 # %bb.14: # %middle.block93 # in Loop: Header=BB210_8 Depth=1 - beq s6, a2, .LBB210_17 + beq a6, a2, .LBB210_17 .LBB210_15: # %while.body4.us.preheader105 # in Loop: Header=BB210_8 Depth=1 slli a2, a0, 3 @@ -117432,7 +117417,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi3856)(a0) ld a0, 40(sp) # 8-byte Folded Reload call printf@plt - ld t3, 48(sp) # 8-byte Folded Reload + ld a6, 48(sp) # 8-byte Folded Reload csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 @@ -117831,11 +117816,11 @@ addi s11, s2, 24 addi s0, s2, 32 sub a2, a2, a0 - addi s6, a2, -5 + addi a6, a2, -5 addi s5, s2, 40 csrr a0, vlenb slli s3, a0, 1 - srli t3, a0, 2 + srli s6, a0, 2 fmv.d.x fs0, zero .Lpcrel_hi3890: auipc a0, %pcrel_hi(.LCPI211_0) @@ -117872,7 +117857,7 @@ add a0, sp, a0 addi a0, a0, 80 vs2r.v v12, (a0) # Unknown-size Folded Spill - sd t3, 48(sp) # 8-byte Folded Spill + sd a6, 48(sp) # 8-byte Folded Spill j .LBB211_8 .LBB211_7: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB211_8 Depth=1 @@ -117948,11 +117933,11 @@ bge a2, s1, .LBB211_17 # %bb.11: # %while.body4.us.preheader # in Loop: Header=BB211_8 Depth=1 - bltu s6, t3, .LBB211_15 + bltu a6, s6, .LBB211_15 # %bb.12: # %vector.ph94 # in Loop: Header=BB211_8 Depth=1 - neg a2, t3 - and a2, s6, a2 + neg a2, s6 + and a2, a6, a2 add a0, a0, a2 vsetvli a3, zero, e64, m2, ta, ma mv a3, a2 @@ -117969,12 +117954,12 @@ vfmv.s.f v10, fa5 vfredosum.vs v8, v8, v10 vfmv.f.s fa5, v8 - sub a3, a3, t3 + sub a3, a3, s6 add a5, a5, s3 bnez a3, .LBB211_13 # %bb.14: # %middle.block92 # in Loop: Header=BB211_8 Depth=1 - beq s6, a2, .LBB211_17 + beq a6, a2, .LBB211_17 .LBB211_15: # %while.body4.us.preheader104 # in Loop: Header=BB211_8 Depth=1 slli a2, a0, 3 @@ -118023,7 +118008,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi3889)(a0) ld a0, 40(sp) # 8-byte Folded Reload call printf@plt - ld t3, 48(sp) # 8-byte Folded Reload + ld a6, 48(sp) # 8-byte Folded Reload csrr a0, vlenb slli a0, a0, 3 add a0, sp, a0 @@ -121286,6 +121271,8 @@ .Lpcrel_hi4083: auipc a0, %pcrel_hi(init_value) sd a0, 56(sp) # 8-byte Folded Spill + addi a0, sp, 272 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a5, 152(sp) # 8-byte Folded Spill sd t0, 144(sp) # 8-byte Folded Spill sd a6, 136(sp) # 8-byte Folded Spill @@ -121296,8 +121283,6 @@ sd t5, 96(sp) # 8-byte Folded Spill sd t6, 88(sp) # 8-byte Folded Spill sd ra, 80(sp) # 8-byte Folded Spill - addi a0, sp, 272 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB217_6 .LBB217_5: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB217_6 Depth=1 @@ -121738,8 +121723,6 @@ addi a0, a0, %pcrel_lo(.Lpcrel_hi4088) call printf@plt mv t1, s9 - addi a0, sp, 272 - vl2r.v v12, (a0) # Unknown-size Folded Reload mv a4, s8 ld ra, 80(sp) # 8-byte Folded Reload ld t6, 88(sp) # 8-byte Folded Reload @@ -121751,6 +121734,8 @@ ld a6, 136(sp) # 8-byte Folded Reload ld t0, 144(sp) # 8-byte Folded Reload ld a5, 152(sp) # 8-byte Folded Reload + addi a0, sp, 272 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB217_5 .LBB217_20: # %for.body.lr.ph.split ld a0, 176(sp) # 8-byte Folded Reload @@ -122160,9 +122145,9 @@ addi s3, s2, 128 addi s8, s2, 136 addi s4, s2, 144 - addi t1, s2, 152 - addi t2, s2, 160 - addi a4, s2, 168 + addi a4, s2, 152 + addi t1, s2, 160 + addi t2, s2, 168 addi t3, s2, 176 addi t4, s2, 184 addi t5, s2, 192 @@ -122208,6 +122193,8 @@ .Lpcrel_hi4116: auipc a0, %pcrel_hi(init_value) sd a0, 64(sp) # 8-byte Folded Spill + addi a0, sp, 256 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd ra, 56(sp) # 8-byte Folded Spill sd a5, 152(sp) # 8-byte Folded Spill sd a7, 144(sp) # 8-byte Folded Spill @@ -122218,8 +122205,6 @@ sd t4, 104(sp) # 8-byte Folded Spill sd t5, 96(sp) # 8-byte Folded Spill sd t6, 88(sp) # 8-byte Folded Spill - addi a0, sp, 256 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB218_6 .LBB218_5: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB218_6 Depth=1 @@ -122420,7 +122405,7 @@ fmadd.d fa4, fa4, fs1, fs2 fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 - add a4, t1, a3 + add a4, s9, a3 fld fa3, 0(a4) fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 @@ -122429,7 +122414,7 @@ fmadd.d fa4, fa4, fs1, fs2 fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 - add a4, t2, a3 + add a4, t1, a3 fld fa3, 0(a4) fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 @@ -122438,7 +122423,7 @@ fmadd.d fa4, fa4, fs1, fs2 fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 - add a4, s9, a3 + add a4, t2, a3 fld fa3, 0(a4) fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 @@ -122537,6 +122522,8 @@ # %bb.9: # %do.body6.us.preheader # in Loop: Header=BB218_6 Depth=1 mv s4, t0 + ld t1, 128(sp) # 8-byte Folded Reload + ld t2, 120(sp) # 8-byte Folded Reload ld t3, 112(sp) # 8-byte Folded Reload ld t4, 104(sp) # 8-byte Folded Reload ld t5, 96(sp) # 8-byte Folded Reload @@ -122594,6 +122581,8 @@ j .LBB218_16 .LBB218_15: # in Loop: Header=BB218_6 Depth=1 mv s4, t0 + ld t1, 128(sp) # 8-byte Folded Reload + ld t2, 120(sp) # 8-byte Folded Reload ld t3, 112(sp) # 8-byte Folded Reload ld t4, 104(sp) # 8-byte Folded Reload ld t5, 96(sp) # 8-byte Folded Reload @@ -122609,8 +122598,6 @@ ld a5, 152(sp) # 8-byte Folded Reload ld a7, 144(sp) # 8-byte Folded Reload ld a6, 136(sp) # 8-byte Folded Reload - ld t1, 128(sp) # 8-byte Folded Reload - ld t2, 120(sp) # 8-byte Folded Reload mv a4, s9 bnez a0, .LBB218_18 # %bb.17: # %if.end11.us @@ -122648,19 +122635,19 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi4121) call printf@plt - addi a0, sp, 256 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t6, 88(sp) # 8-byte Folded Reload ld t5, 96(sp) # 8-byte Folded Reload ld t4, 104(sp) # 8-byte Folded Reload ld t3, 112(sp) # 8-byte Folded Reload - mv a4, s9 ld t2, 120(sp) # 8-byte Folded Reload ld t1, 128(sp) # 8-byte Folded Reload + mv a4, s9 ld a6, 136(sp) # 8-byte Folded Reload ld a7, 144(sp) # 8-byte Folded Reload ld a5, 152(sp) # 8-byte Folded Reload ld ra, 56(sp) # 8-byte Folded Reload + addi a0, sp, 256 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB218_5 .LBB218_20: # %for.body.lr.ph.split ld a0, 176(sp) # 8-byte Folded Reload @@ -123150,13 +123137,13 @@ auipc a2, %pcrel_hi(.LCPI220_7) ld a2, %pcrel_lo(.Lpcrel_hi4147)(a2) addi t5, a4, 176 - addi t6, a4, 184 + addi a7, a4, 184 addi a1, a1, -1 mulhu a2, a1, a2 sub a3, a1, a2 srli a3, a3, 1 add a2, a3, a2 - addi s3, a4, 192 + addi t6, a4, 192 srli a2, a2, 4 mul a0, a2, a0 sub a1, a1, a1 @@ -123192,6 +123179,8 @@ .Lpcrel_hi4151: auipc a0, %pcrel_hi(init_value) sd a0, 64(sp) # 8-byte Folded Spill + addi a0, sp, 256 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd ra, 56(sp) # 8-byte Folded Spill sd a5, 152(sp) # 8-byte Folded Spill sd t0, 144(sp) # 8-byte Folded Spill @@ -123201,8 +123190,6 @@ sd t4, 112(sp) # 8-byte Folded Spill sd t5, 104(sp) # 8-byte Folded Spill sd t6, 96(sp) # 8-byte Folded Spill - addi a0, sp, 256 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB220_6 .LBB220_5: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB220_6 Depth=1 @@ -123221,6 +123208,7 @@ li a1, 29 ld a2, 72(sp) # 8-byte Folded Reload fmv.d fa5, fs3 + mv s3, a7 ld a7, 80(sp) # 8-byte Folded Reload mv t1, s0 .LBB220_7: # %do.body.us @@ -123438,7 +123426,7 @@ fmadd.d fa4, fa4, fs1, fs2 fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 - add a4, t6, a3 + add a4, s3, a3 fld fa3, 0(a4) fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 @@ -123447,7 +123435,7 @@ fmadd.d fa4, fa4, fs1, fs2 fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 - add a4, s3, a3 + add a4, t6, a3 fld fa3, 0(a4) fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 @@ -123514,6 +123502,7 @@ ld t3, 120(sp) # 8-byte Folded Reload ld t4, 112(sp) # 8-byte Folded Reload ld t5, 104(sp) # 8-byte Folded Reload + mv a7, s3 ld t6, 96(sp) # 8-byte Folded Reload ld a2, 48(sp) # 8-byte Folded Reload ld a6, 40(sp) # 8-byte Folded Reload @@ -123573,6 +123562,7 @@ ld t3, 120(sp) # 8-byte Folded Reload ld t4, 112(sp) # 8-byte Folded Reload ld t5, 104(sp) # 8-byte Folded Reload + mv a7, s3 ld t6, 96(sp) # 8-byte Folded Reload .LBB220_16: # %if.end11.us # in Loop: Header=BB220_6 Depth=1 @@ -123621,9 +123611,8 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi4156) call printf@plt - addi a0, sp, 256 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t6, 96(sp) # 8-byte Folded Reload + mv a7, s3 ld t5, 104(sp) # 8-byte Folded Reload ld t4, 112(sp) # 8-byte Folded Reload ld t3, 120(sp) # 8-byte Folded Reload @@ -123632,6 +123621,8 @@ ld t0, 144(sp) # 8-byte Folded Reload ld a5, 152(sp) # 8-byte Folded Reload ld ra, 56(sp) # 8-byte Folded Reload + addi a0, sp, 256 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB220_5 .LBB220_20: # %for.body.lr.ph.split ld a0, 176(sp) # 8-byte Folded Reload @@ -124041,8 +124032,8 @@ addi s1, s2, 160 addi s7, s2, 168 addi s3, s2, 176 - addi s10, s2, 184 - addi a4, s2, 192 + addi s8, s2, 184 + addi s10, s2, 192 addi t1, s2, 200 .Lpcrel_hi4181: auipc a2, %pcrel_hi(.LCPI221_7) @@ -124095,6 +124086,8 @@ .Lpcrel_hi4185: auipc a0, %pcrel_hi(init_value) sd a0, 96(sp) # 8-byte Folded Spill + addi a0, sp, 224 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd t3, 88(sp) # 8-byte Folded Spill sd t4, 80(sp) # 8-byte Folded Spill sd t5, 72(sp) # 8-byte Folded Spill @@ -124105,8 +124098,6 @@ sd a6, 136(sp) # 8-byte Folded Spill sd t1, 128(sp) # 8-byte Folded Spill sd t2, 120(sp) # 8-byte Folded Spill - addi a0, sp, 224 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB221_6 .LBB221_5: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB221_6 Depth=1 @@ -124126,7 +124117,6 @@ ld a2, 104(sp) # 8-byte Folded Reload fmv.d fa5, fs7 mv t0, s10 - mv s8, a4 .LBB221_7: # %do.body.us # Parent Loop BB221_6 Depth=1 # => This Inner Loop Header: Depth=2 @@ -124341,7 +124331,7 @@ fmadd.d fa4, fa4, fs1, fs2 fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 - add a4, t0, a3 + add a4, s8, a3 fld fa3, 0(a4) fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 @@ -124350,7 +124340,7 @@ fmadd.d fa4, fa4, fs1, fs2 fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 - add a4, s8, a3 + add a4, t0, a3 fld fa3, 0(a4) fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 @@ -124404,8 +124394,6 @@ # %bb.9: # %do.body6.us.preheader # in Loop: Header=BB221_6 Depth=1 mv s10, t0 - ld t1, 128(sp) # 8-byte Folded Reload - ld t2, 120(sp) # 8-byte Folded Reload ld a2, 48(sp) # 8-byte Folded Reload ld a6, 40(sp) # 8-byte Folded Reload bltu a2, a6, .LBB221_13 @@ -124459,8 +124447,6 @@ j .LBB221_16 .LBB221_15: # in Loop: Header=BB221_6 Depth=1 mv s10, t0 - ld t1, 128(sp) # 8-byte Folded Reload - ld t2, 120(sp) # 8-byte Folded Reload .LBB221_16: # %if.end11.us # in Loop: Header=BB221_6 Depth=1 fabs.d fa4, fa5 @@ -124469,7 +124455,8 @@ ld a5, 152(sp) # 8-byte Folded Reload ld a7, 144(sp) # 8-byte Folded Reload ld a6, 136(sp) # 8-byte Folded Reload - mv a4, s8 + ld t1, 128(sp) # 8-byte Folded Reload + ld t2, 120(sp) # 8-byte Folded Reload bnez a0, .LBB221_18 # %bb.17: # %if.end11.us # in Loop: Header=BB221_6 Depth=1 @@ -124498,11 +124485,8 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi4190) call printf@plt - addi a0, sp, 224 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t2, 120(sp) # 8-byte Folded Reload ld t1, 128(sp) # 8-byte Folded Reload - mv a4, s8 ld a6, 136(sp) # 8-byte Folded Reload ld a7, 144(sp) # 8-byte Folded Reload ld a5, 152(sp) # 8-byte Folded Reload @@ -124511,6 +124495,8 @@ ld t5, 72(sp) # 8-byte Folded Reload ld t4, 80(sp) # 8-byte Folded Reload ld t3, 88(sp) # 8-byte Folded Reload + addi a0, sp, 224 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB221_5 .LBB221_20: # %for.body.lr.ph.split ld a0, 176(sp) # 8-byte Folded Reload @@ -124922,8 +124908,8 @@ addi s7, a3, 144 addi s2, a3, 152 addi s10, a3, 160 - addi t2, a3, 168 - addi a4, a3, 176 + addi a4, a3, 168 + addi t2, a3, 176 .Lpcrel_hi4215: auipc a2, %pcrel_hi(.LCPI222_7) ld a2, %pcrel_lo(.Lpcrel_hi4215)(a2) @@ -124976,6 +124962,8 @@ .Lpcrel_hi4219: auipc a0, %pcrel_hi(init_value) sd a0, 80(sp) # 8-byte Folded Spill + addi a0, sp, 240 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd t5, 72(sp) # 8-byte Folded Spill sd t6, 64(sp) # 8-byte Folded Spill sd ra, 56(sp) # 8-byte Folded Spill @@ -124986,8 +124974,6 @@ sd t2, 120(sp) # 8-byte Folded Spill sd t3, 112(sp) # 8-byte Folded Spill sd t4, 104(sp) # 8-byte Folded Spill - addi a0, sp, 240 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB222_6 .LBB222_5: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB222_6 Depth=1 @@ -125203,7 +125189,7 @@ fmadd.d fa4, fa4, fs1, fs2 fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 - add a4, t2, a3 + add a4, s3, a3 fld fa3, 0(a4) fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 @@ -125212,7 +125198,7 @@ fmadd.d fa4, fa4, fs1, fs2 fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 - add a4, s3, a3 + add a4, t2, a3 fld fa3, 0(a4) fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 @@ -125275,6 +125261,7 @@ # %bb.9: # %do.body6.us.preheader # in Loop: Header=BB222_6 Depth=1 mv s10, t1 + ld t2, 120(sp) # 8-byte Folded Reload ld t3, 112(sp) # 8-byte Folded Reload ld t4, 104(sp) # 8-byte Folded Reload ld a2, 48(sp) # 8-byte Folded Reload @@ -125331,6 +125318,7 @@ j .LBB222_16 .LBB222_15: # in Loop: Header=BB222_6 Depth=1 mv s10, t1 + ld t2, 120(sp) # 8-byte Folded Reload ld t3, 112(sp) # 8-byte Folded Reload ld t4, 104(sp) # 8-byte Folded Reload .LBB222_16: # %if.end11.us @@ -125342,7 +125330,6 @@ ld t0, 144(sp) # 8-byte Folded Reload ld a6, 136(sp) # 8-byte Folded Reload ld a7, 128(sp) # 8-byte Folded Reload - ld t2, 120(sp) # 8-byte Folded Reload mv a4, s3 bnez a0, .LBB222_18 # %bb.17: # %if.end11.us @@ -125372,12 +125359,10 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi4224) call printf@plt - addi a0, sp, 240 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t4, 104(sp) # 8-byte Folded Reload ld t3, 112(sp) # 8-byte Folded Reload - mv a4, s3 ld t2, 120(sp) # 8-byte Folded Reload + mv a4, s3 ld a7, 128(sp) # 8-byte Folded Reload ld a6, 136(sp) # 8-byte Folded Reload ld t0, 144(sp) # 8-byte Folded Reload @@ -125385,6 +125370,8 @@ ld ra, 56(sp) # 8-byte Folded Reload ld t6, 64(sp) # 8-byte Folded Reload ld t5, 72(sp) # 8-byte Folded Reload + addi a0, sp, 240 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB222_5 .LBB222_20: # %for.body.lr.ph.split ld a0, 176(sp) # 8-byte Folded Reload @@ -125800,8 +125787,8 @@ .Lpcrel_hi4249: auipc a2, %pcrel_hi(.LCPI223_7) ld a2, %pcrel_lo(.Lpcrel_hi4249)(a2) - addi t2, s2, 192 - addi s9, s2, 200 + addi a4, s2, 192 + addi t2, s2, 200 addi a1, a1, -1 mulhu a2, a1, a2 srli a2, a2, 3 @@ -125847,6 +125834,8 @@ .Lpcrel_hi4253: auipc a0, %pcrel_hi(init_value) sd a0, 96(sp) # 8-byte Folded Spill + addi a0, sp, 224 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd t3, 88(sp) # 8-byte Folded Spill sd t4, 80(sp) # 8-byte Folded Spill sd t5, 72(sp) # 8-byte Folded Spill @@ -125857,8 +125846,6 @@ sd a6, 136(sp) # 8-byte Folded Spill sd t1, 128(sp) # 8-byte Folded Spill sd t2, 120(sp) # 8-byte Folded Spill - addi a0, sp, 224 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB223_6 .LBB223_5: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB223_6 Depth=1 @@ -125879,6 +125866,7 @@ fmv.d fa5, fs7 mv t0, s10 mv s8, a3 + mv s9, a4 .LBB223_7: # %do.body.us # Parent Loop BB223_6 Depth=1 # => This Inner Loop Header: Depth=2 @@ -126100,7 +126088,7 @@ fmadd.d fa4, fa4, fs1, fs2 fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 - add a4, t2, a3 + add a4, s9, a3 fld fa3, 0(a4) fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 @@ -126109,7 +126097,7 @@ fmadd.d fa4, fa4, fs1, fs2 fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 - add a3, s9, a3 + add a3, t2, a3 fld fa3, 0(a3) fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 @@ -126136,6 +126124,7 @@ # %bb.9: # %do.body6.us.preheader # in Loop: Header=BB223_6 Depth=1 mv s10, t0 + ld t2, 120(sp) # 8-byte Folded Reload ld a2, 48(sp) # 8-byte Folded Reload ld a6, 40(sp) # 8-byte Folded Reload bltu a2, a6, .LBB223_13 @@ -126189,6 +126178,7 @@ j .LBB223_16 .LBB223_15: # in Loop: Header=BB223_6 Depth=1 mv s10, t0 + ld t2, 120(sp) # 8-byte Folded Reload .LBB223_16: # %if.end11.us # in Loop: Header=BB223_6 Depth=1 fabs.d fa4, fa5 @@ -126199,7 +126189,7 @@ ld a6, 136(sp) # 8-byte Folded Reload mv a3, s8 ld t1, 128(sp) # 8-byte Folded Reload - ld t2, 120(sp) # 8-byte Folded Reload + mv a4, s9 bnez a0, .LBB223_18 # %bb.17: # %if.end11.us # in Loop: Header=BB223_6 Depth=1 @@ -126228,9 +126218,8 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi4258) call printf@plt - addi a0, sp, 224 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t2, 120(sp) # 8-byte Folded Reload + mv a4, s9 ld t1, 128(sp) # 8-byte Folded Reload mv a3, s8 ld a6, 136(sp) # 8-byte Folded Reload @@ -126241,6 +126230,8 @@ ld t5, 72(sp) # 8-byte Folded Reload ld t4, 80(sp) # 8-byte Folded Reload ld t3, 88(sp) # 8-byte Folded Reload + addi a0, sp, 224 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB223_5 .LBB223_20: # %for.body.lr.ph.split ld a0, 176(sp) # 8-byte Folded Reload @@ -126651,12 +126642,12 @@ addi s6, a4, 144 addi s1, a4, 152 addi s7, a4, 160 - addi s8, a4, 168 + addi s2, a4, 168 .Lpcrel_hi4283: auipc a2, %pcrel_hi(.LCPI224_7) ld a2, %pcrel_lo(.Lpcrel_hi4283)(a2) - addi t2, a4, 176 - addi s2, a4, 184 + addi s8, a4, 176 + addi t2, a4, 184 addi a1, a1, -1 mulhu a2, a1, a2 sub a3, a1, a2 @@ -126694,6 +126685,8 @@ .Lpcrel_hi4287: auipc a0, %pcrel_hi(init_value) sd a0, 96(sp) # 8-byte Folded Spill + addi a0, sp, 224 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd t3, 88(sp) # 8-byte Folded Spill sd t4, 80(sp) # 8-byte Folded Spill sd t5, 72(sp) # 8-byte Folded Spill @@ -126703,8 +126696,6 @@ sd t0, 144(sp) # 8-byte Folded Spill sd a6, 136(sp) # 8-byte Folded Spill sd t2, 128(sp) # 8-byte Folded Spill - addi a0, sp, 224 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB224_6 .LBB224_5: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB224_6 Depth=1 @@ -126918,7 +126909,7 @@ fmadd.d fa4, fa4, fs1, fs2 fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 - add a4, t1, a3 + add a4, s2, a3 fld fa3, 0(a4) fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 @@ -126927,7 +126918,7 @@ fmadd.d fa4, fa4, fs1, fs2 fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 - add a4, t2, a3 + add a4, t1, a3 fld fa3, 0(a4) fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 @@ -126936,7 +126927,7 @@ fmadd.d fa4, fa4, fs1, fs2 fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 - add a4, s2, a3 + add a4, t2, a3 fld fa3, 0(a4) fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 @@ -127075,8 +127066,6 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi4292) call printf@plt - addi a0, sp, 224 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t2, 128(sp) # 8-byte Folded Reload ld a6, 136(sp) # 8-byte Folded Reload ld t0, 144(sp) # 8-byte Folded Reload @@ -127086,6 +127075,8 @@ ld t5, 72(sp) # 8-byte Folded Reload ld t4, 80(sp) # 8-byte Folded Reload ld t3, 88(sp) # 8-byte Folded Reload + addi a0, sp, 224 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB224_5 .LBB224_20: # %for.body.lr.ph.split ld a0, 176(sp) # 8-byte Folded Reload @@ -127518,6 +127509,8 @@ .Lpcrel_hi4320: auipc a0, %pcrel_hi(init_value) sd a0, 128(sp) # 8-byte Folded Spill + addi a0, sp, 160 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a6, 104(sp) # 8-byte Folded Spill sd t0, 96(sp) # 8-byte Folded Spill sd t1, 88(sp) # 8-byte Folded Spill @@ -127527,8 +127520,6 @@ sd t5, 56(sp) # 8-byte Folded Spill sd t6, 48(sp) # 8-byte Folded Spill sd ra, 40(sp) # 8-byte Folded Spill - addi a0, sp, 160 - vs2r.v v12, (a0) # Unknown-size Folded Spill sd a2, 32(sp) # 8-byte Folded Spill j .LBB225_6 .LBB225_5: # %_Z9check_sumIdEvT_.exit.us @@ -127877,8 +127868,6 @@ addi a0, a0, %pcrel_lo(.Lpcrel_hi4325) sd a7, 120(sp) # 8-byte Folded Spill call printf@plt - addi a0, sp, 160 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld ra, 40(sp) # 8-byte Folded Reload ld t6, 48(sp) # 8-byte Folded Reload ld t5, 56(sp) # 8-byte Folded Reload @@ -127890,6 +127879,8 @@ ld a7, 120(sp) # 8-byte Folded Reload ld a6, 104(sp) # 8-byte Folded Reload ld a5, 112(sp) # 8-byte Folded Reload + addi a0, sp, 160 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB225_5 .LBB225_19: # %for.body.lr.ph.split li s0, 0 @@ -128024,9 +128015,9 @@ lw a1, %pcrel_lo(.Lpcrel_hi4316)(a0) mv a0, s3 call printf@plt + ld a5, 112(sp) # 8-byte Folded Reload addi a0, sp, 160 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld a5, 112(sp) # 8-byte Folded Reload ld a0, 144(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi4315)(a0) j .LBB225_21 @@ -128332,6 +128323,8 @@ .Lpcrel_hi4354: auipc a0, %pcrel_hi(init_value) sd a0, 120(sp) # 8-byte Folded Spill + addi a0, sp, 208 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a7, 112(sp) # 8-byte Folded Spill sd t1, 104(sp) # 8-byte Folded Spill sd t2, 96(sp) # 8-byte Folded Spill @@ -128343,8 +128336,6 @@ sd a5, 160(sp) # 8-byte Folded Spill sd t0, 152(sp) # 8-byte Folded Spill sd a6, 144(sp) # 8-byte Folded Spill - addi a0, sp, 208 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB226_6 .LBB226_5: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB226_6 Depth=1 @@ -128686,8 +128677,6 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi4359) call printf@plt - addi a0, sp, 208 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld a6, 144(sp) # 8-byte Folded Reload ld t0, 152(sp) # 8-byte Folded Reload ld a5, 160(sp) # 8-byte Folded Reload @@ -128699,6 +128688,8 @@ ld t2, 96(sp) # 8-byte Folded Reload ld t1, 104(sp) # 8-byte Folded Reload ld a7, 112(sp) # 8-byte Folded Reload + addi a0, sp, 208 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB226_5 .LBB226_19: # %for.body.lr.ph.split ld a0, 184(sp) # 8-byte Folded Reload @@ -129153,6 +129144,8 @@ .Lpcrel_hi4388: auipc a0, %pcrel_hi(init_value) sd a0, 128(sp) # 8-byte Folded Spill + addi a0, sp, 192 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a6, 120(sp) # 8-byte Folded Spill sd t0, 112(sp) # 8-byte Folded Spill sd t1, 104(sp) # 8-byte Folded Spill @@ -129163,8 +129156,6 @@ sd t6, 64(sp) # 8-byte Folded Spill sd ra, 56(sp) # 8-byte Folded Spill sd a5, 152(sp) # 8-byte Folded Spill - addi a0, sp, 192 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB227_6 .LBB227_5: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB227_6 Depth=1 @@ -129483,8 +129474,6 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi4393) call printf@plt - addi a0, sp, 192 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld a5, 152(sp) # 8-byte Folded Reload ld ra, 56(sp) # 8-byte Folded Reload ld t6, 64(sp) # 8-byte Folded Reload @@ -129495,6 +129484,8 @@ ld t1, 104(sp) # 8-byte Folded Reload ld t0, 112(sp) # 8-byte Folded Reload ld a6, 120(sp) # 8-byte Folded Reload + addi a0, sp, 192 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB227_5 .LBB227_19: # %for.body.lr.ph.split ld a0, 176(sp) # 8-byte Folded Reload @@ -129941,6 +129932,8 @@ .Lpcrel_hi4422: auipc a0, %pcrel_hi(init_value) sd a0, 128(sp) # 8-byte Folded Spill + addi a0, sp, 192 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a7, 112(sp) # 8-byte Folded Spill sd t1, 104(sp) # 8-byte Folded Spill sd t2, 96(sp) # 8-byte Folded Spill @@ -129950,8 +129943,6 @@ sd t6, 64(sp) # 8-byte Folded Spill sd ra, 56(sp) # 8-byte Folded Spill sd a5, 152(sp) # 8-byte Folded Spill - addi a0, sp, 192 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB228_6 .LBB228_5: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB228_6 Depth=1 @@ -130271,8 +130262,6 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi4427) call printf@plt - addi a0, sp, 192 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld a5, 152(sp) # 8-byte Folded Reload ld ra, 56(sp) # 8-byte Folded Reload ld t6, 64(sp) # 8-byte Folded Reload @@ -130283,6 +130272,8 @@ ld t1, 104(sp) # 8-byte Folded Reload ld a7, 112(sp) # 8-byte Folded Reload ld a6, 120(sp) # 8-byte Folded Reload + addi a0, sp, 192 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB228_5 .LBB228_19: # %for.body.lr.ph.split ld a0, 176(sp) # 8-byte Folded Reload @@ -130422,9 +130413,9 @@ lw a1, %pcrel_lo(.Lpcrel_hi4417)(a0) mv a0, s3 call printf@plt + ld a6, 120(sp) # 8-byte Folded Reload addi a0, sp, 192 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld a6, 120(sp) # 8-byte Folded Reload ld a0, 160(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi4416)(a0) j .LBB228_21 @@ -130784,6 +130775,8 @@ .Lpcrel_hi4456: auipc a0, %pcrel_hi(init_value) sd a0, 128(sp) # 8-byte Folded Spill + addi a0, sp, 160 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a6, 104(sp) # 8-byte Folded Spill sd t0, 96(sp) # 8-byte Folded Spill sd t1, 88(sp) # 8-byte Folded Spill @@ -130793,8 +130786,6 @@ sd t5, 56(sp) # 8-byte Folded Spill sd t6, 48(sp) # 8-byte Folded Spill sd ra, 40(sp) # 8-byte Folded Spill - addi a0, sp, 160 - vs2r.v v12, (a0) # Unknown-size Folded Spill sd a2, 32(sp) # 8-byte Folded Spill j .LBB230_6 .LBB230_5: # %_Z9check_sumIdEvT_.exit.us @@ -131103,8 +131094,6 @@ addi a0, a0, %pcrel_lo(.Lpcrel_hi4461) sd a7, 120(sp) # 8-byte Folded Spill call printf@plt - addi a0, sp, 160 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld ra, 40(sp) # 8-byte Folded Reload ld t6, 48(sp) # 8-byte Folded Reload ld t5, 56(sp) # 8-byte Folded Reload @@ -131116,6 +131105,8 @@ ld a7, 120(sp) # 8-byte Folded Reload ld a6, 104(sp) # 8-byte Folded Reload ld a5, 112(sp) # 8-byte Folded Reload + addi a0, sp, 160 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB230_5 .LBB230_19: # %for.body.lr.ph.split li s0, 0 @@ -131250,9 +131241,9 @@ lw a1, %pcrel_lo(.Lpcrel_hi4452)(a0) mv a0, s3 call printf@plt + ld a5, 112(sp) # 8-byte Folded Reload addi a0, sp, 160 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld a5, 112(sp) # 8-byte Folded Reload ld a0, 144(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi4451)(a0) j .LBB230_21 @@ -131563,6 +131554,8 @@ .Lpcrel_hi4490: auipc a0, %pcrel_hi(init_value) sd a0, 128(sp) # 8-byte Folded Spill + addi a0, sp, 176 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a7, 96(sp) # 8-byte Folded Spill sd t1, 88(sp) # 8-byte Folded Spill sd t2, 80(sp) # 8-byte Folded Spill @@ -131570,8 +131563,6 @@ sd t4, 64(sp) # 8-byte Folded Spill sd t5, 56(sp) # 8-byte Folded Spill sd t6, 48(sp) # 8-byte Folded Spill - addi a0, sp, 176 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB231_6 .LBB231_5: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB231_6 Depth=1 @@ -131860,8 +131851,6 @@ addi a0, a0, %pcrel_lo(.Lpcrel_hi4495) sd t0, 120(sp) # 8-byte Folded Spill call printf@plt - addi a0, sp, 176 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t6, 48(sp) # 8-byte Folded Reload ld t5, 56(sp) # 8-byte Folded Reload ld t4, 64(sp) # 8-byte Folded Reload @@ -131872,6 +131861,8 @@ ld a7, 96(sp) # 8-byte Folded Reload ld a6, 104(sp) # 8-byte Folded Reload ld a5, 112(sp) # 8-byte Folded Reload + addi a0, sp, 176 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB231_5 .LBB231_19: # %for.body.lr.ph.split li s0, 0 @@ -132006,10 +131997,10 @@ lw a1, %pcrel_lo(.Lpcrel_hi4485)(a0) mv a0, s3 call printf@plt - addi a0, sp, 176 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld a6, 104(sp) # 8-byte Folded Reload ld a5, 112(sp) # 8-byte Folded Reload + addi a0, sp, 176 + vl2r.v v12, (a0) # Unknown-size Folded Reload ld a0, 160(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi4484)(a0) j .LBB231_21 @@ -132312,6 +132303,8 @@ .Lpcrel_hi4524: auipc a0, %pcrel_hi(init_value) sd a0, 128(sp) # 8-byte Folded Spill + addi a0, sp, 160 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a6, 104(sp) # 8-byte Folded Spill sd t0, 96(sp) # 8-byte Folded Spill sd t1, 88(sp) # 8-byte Folded Spill @@ -132321,8 +132314,6 @@ sd t5, 56(sp) # 8-byte Folded Spill sd t6, 48(sp) # 8-byte Folded Spill sd ra, 40(sp) # 8-byte Folded Spill - addi a0, sp, 160 - vs2r.v v12, (a0) # Unknown-size Folded Spill sd a2, 32(sp) # 8-byte Folded Spill j .LBB232_6 .LBB232_5: # %_Z9check_sumIdEvT_.exit.us @@ -132600,8 +132591,6 @@ addi a0, a0, %pcrel_lo(.Lpcrel_hi4529) sd a7, 120(sp) # 8-byte Folded Spill call printf@plt - addi a0, sp, 160 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld ra, 40(sp) # 8-byte Folded Reload ld t6, 48(sp) # 8-byte Folded Reload ld t5, 56(sp) # 8-byte Folded Reload @@ -132613,6 +132602,8 @@ ld a7, 120(sp) # 8-byte Folded Reload ld a6, 104(sp) # 8-byte Folded Reload ld a5, 112(sp) # 8-byte Folded Reload + addi a0, sp, 160 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB232_5 .LBB232_19: # %for.body.lr.ph.split li s0, 0 @@ -132747,9 +132738,9 @@ lw a1, %pcrel_lo(.Lpcrel_hi4519)(a0) mv a0, s3 call printf@plt + ld a5, 112(sp) # 8-byte Folded Reload addi a0, sp, 160 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld a5, 112(sp) # 8-byte Folded Reload ld a0, 144(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi4518)(a0) j .LBB232_21 @@ -133042,6 +133033,8 @@ .Lpcrel_hi4557: auipc a0, %pcrel_hi(init_value) sd a0, 128(sp) # 8-byte Folded Spill + addi a0, sp, 160 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a7, 96(sp) # 8-byte Folded Spill sd t1, 88(sp) # 8-byte Folded Spill sd t2, 80(sp) # 8-byte Folded Spill @@ -133050,8 +133043,6 @@ sd t5, 56(sp) # 8-byte Folded Spill sd t6, 48(sp) # 8-byte Folded Spill sd ra, 40(sp) # 8-byte Folded Spill - addi a0, sp, 160 - vs2r.v v12, (a0) # Unknown-size Folded Spill sd a2, 32(sp) # 8-byte Folded Spill j .LBB233_6 .LBB233_5: # %_Z9check_sumIdEvT_.exit.us @@ -133330,8 +133321,6 @@ addi a0, a0, %pcrel_lo(.Lpcrel_hi4562) sd t0, 120(sp) # 8-byte Folded Spill call printf@plt - addi a0, sp, 160 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld ra, 40(sp) # 8-byte Folded Reload ld t6, 48(sp) # 8-byte Folded Reload ld t5, 56(sp) # 8-byte Folded Reload @@ -133343,6 +133332,8 @@ ld a7, 96(sp) # 8-byte Folded Reload ld a6, 104(sp) # 8-byte Folded Reload ld a5, 112(sp) # 8-byte Folded Reload + addi a0, sp, 160 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB233_5 .LBB233_19: # %for.body.lr.ph.split li s0, 0 @@ -133477,10 +133468,10 @@ lw a1, %pcrel_lo(.Lpcrel_hi4553)(a0) mv a0, s3 call printf@plt - addi a0, sp, 160 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld a6, 104(sp) # 8-byte Folded Reload ld a5, 112(sp) # 8-byte Folded Reload + addi a0, sp, 160 + vl2r.v v12, (a0) # Unknown-size Folded Reload ld a0, 144(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi4552)(a0) j .LBB233_21 @@ -134459,16 +134450,16 @@ fmv.d.x fs7, zero .Lpcrel_hi4623: auipc ra, %pcrel_hi(init_value) + slli a0, a0, 2 + add a0, sp, a0 + addi a0, a0, 144 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a7, 88(sp) # 8-byte Folded Spill sd t1, 80(sp) # 8-byte Folded Spill sd t2, 72(sp) # 8-byte Folded Spill sd t3, 64(sp) # 8-byte Folded Spill sd t4, 56(sp) # 8-byte Folded Spill sd t5, 48(sp) # 8-byte Folded Spill - slli a0, a0, 2 - add a0, sp, a0 - addi a0, a0, 144 - vs2r.v v12, (a0) # Unknown-size Folded Spill sd t6, 40(sp) # 8-byte Folded Spill sd ra, 32(sp) # 8-byte Folded Spill j .LBB235_6 @@ -134719,11 +134710,6 @@ call printf@plt ld ra, 32(sp) # 8-byte Folded Reload ld t6, 40(sp) # 8-byte Folded Reload - csrr a0, vlenb - slli a0, a0, 2 - add a0, sp, a0 - addi a0, a0, 144 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t5, 48(sp) # 8-byte Folded Reload ld t4, 56(sp) # 8-byte Folded Reload ld t3, 64(sp) # 8-byte Folded Reload @@ -134733,6 +134719,11 @@ ld a7, 88(sp) # 8-byte Folded Reload ld a6, 96(sp) # 8-byte Folded Reload ld a5, 104(sp) # 8-byte Folded Reload + csrr a0, vlenb + slli a0, a0, 2 + add a0, sp, a0 + addi a0, a0, 144 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB235_5 .LBB235_19: # %for.body.lr.ph.split li s0, 0 @@ -134852,6 +134843,8 @@ lw a1, %pcrel_lo(.Lpcrel_hi4619)(a0) mv a0, s3 call printf@plt + ld a6, 96(sp) # 8-byte Folded Reload + ld a5, 104(sp) # 8-byte Folded Reload addi a0, sp, 144 vl2r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -134864,8 +134857,6 @@ add a0, sp, a0 addi a0, a0, 144 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld a6, 96(sp) # 8-byte Folded Reload - ld a5, 104(sp) # 8-byte Folded Reload ld a0, 128(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi4618)(a0) j .LBB235_21 @@ -135166,15 +135157,15 @@ fmv.d.x fs7, zero .Lpcrel_hi4657: auipc t5, %pcrel_hi(init_value) + slli a0, a0, 2 + add a0, sp, a0 + addi a0, a0, 128 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a6, 80(sp) # 8-byte Folded Spill sd t0, 72(sp) # 8-byte Folded Spill sd t1, 64(sp) # 8-byte Folded Spill sd t2, 56(sp) # 8-byte Folded Spill sd t3, 48(sp) # 8-byte Folded Spill - slli a0, a0, 2 - add a0, sp, a0 - addi a0, a0, 128 - vs2r.v v12, (a0) # Unknown-size Folded Spill sd t4, 40(sp) # 8-byte Folded Spill sd t5, 32(sp) # 8-byte Folded Spill j .LBB236_6 @@ -135417,11 +135408,6 @@ call printf@plt ld t5, 32(sp) # 8-byte Folded Reload ld t4, 40(sp) # 8-byte Folded Reload - csrr a0, vlenb - slli a0, a0, 2 - add a0, sp, a0 - addi a0, a0, 128 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t3, 48(sp) # 8-byte Folded Reload ld t2, 56(sp) # 8-byte Folded Reload ld t1, 64(sp) # 8-byte Folded Reload @@ -135429,6 +135415,11 @@ ld a7, 96(sp) # 8-byte Folded Reload ld a6, 80(sp) # 8-byte Folded Reload ld a5, 88(sp) # 8-byte Folded Reload + csrr a0, vlenb + slli a0, a0, 2 + add a0, sp, a0 + addi a0, a0, 128 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB236_5 .LBB236_19: # %for.body.lr.ph.split li s0, 0 @@ -135548,6 +135539,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi4652)(a0) mv a0, s3 call printf@plt + ld a5, 88(sp) # 8-byte Folded Reload addi a0, sp, 128 vl2r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -135560,7 +135552,6 @@ add a0, sp, a0 addi a0, a0, 128 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld a5, 88(sp) # 8-byte Folded Reload ld a0, 112(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi4651)(a0) j .LBB236_21 @@ -135862,14 +135853,14 @@ fmv.d.x fs7, zero .Lpcrel_hi4691: auipc t5, %pcrel_hi(init_value) - sd a7, 72(sp) # 8-byte Folded Spill - sd t1, 64(sp) # 8-byte Folded Spill - sd t2, 56(sp) # 8-byte Folded Spill - sd t3, 48(sp) # 8-byte Folded Spill slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 128 vs2r.v v12, (a0) # Unknown-size Folded Spill + sd a7, 72(sp) # 8-byte Folded Spill + sd t1, 64(sp) # 8-byte Folded Spill + sd t2, 56(sp) # 8-byte Folded Spill + sd t3, 48(sp) # 8-byte Folded Spill sd t4, 40(sp) # 8-byte Folded Spill sd t5, 32(sp) # 8-byte Folded Spill j .LBB237_6 @@ -136102,11 +136093,6 @@ call printf@plt ld t5, 32(sp) # 8-byte Folded Reload ld t4, 40(sp) # 8-byte Folded Reload - csrr a0, vlenb - slli a0, a0, 2 - add a0, sp, a0 - addi a0, a0, 128 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t3, 48(sp) # 8-byte Folded Reload ld t2, 56(sp) # 8-byte Folded Reload ld t1, 64(sp) # 8-byte Folded Reload @@ -136114,6 +136100,11 @@ ld a7, 72(sp) # 8-byte Folded Reload ld a6, 80(sp) # 8-byte Folded Reload ld a5, 88(sp) # 8-byte Folded Reload + csrr a0, vlenb + slli a0, a0, 2 + add a0, sp, a0 + addi a0, a0, 128 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB237_5 .LBB237_19: # %for.body.lr.ph.split li s0, 0 @@ -136233,6 +136224,8 @@ lw a1, %pcrel_lo(.Lpcrel_hi4686)(a0) mv a0, s3 call printf@plt + ld a6, 80(sp) # 8-byte Folded Reload + ld a5, 88(sp) # 8-byte Folded Reload addi a0, sp, 128 vl2r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -136245,8 +136238,6 @@ add a0, sp, a0 addi a0, a0, 128 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld a6, 80(sp) # 8-byte Folded Reload - ld a5, 88(sp) # 8-byte Folded Reload ld a0, 112(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi4685)(a0) j .LBB237_21 @@ -136527,13 +136518,13 @@ fmv.d.x fs3, zero .Lpcrel_hi4724: auipc t2, %pcrel_hi(init_value) - sd s1, 56(sp) # 8-byte Folded Spill - sd t0, 48(sp) # 8-byte Folded Spill slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 96 vs2r.v v12, (a0) # Unknown-size Folded Spill - sd t1, 40(sp) # 8-byte Folded Spill + sd s1, 56(sp) # 8-byte Folded Spill + sd t0, 48(sp) # 8-byte Folded Spill + sd a6, 40(sp) # 8-byte Folded Spill sd t2, 32(sp) # 8-byte Folded Spill j .LBB238_6 .LBB238_5: # %_Z9check_sumIdEvT_.exit.us @@ -136767,19 +136758,19 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi4729) sd a5, 64(sp) # 8-byte Folded Spill - mv s1, a6 + mv s1, t1 call printf@plt ld t2, 32(sp) # 8-byte Folded Reload - ld t1, 40(sp) # 8-byte Folded Reload + mv t1, s1 + ld t0, 48(sp) # 8-byte Folded Reload + ld a6, 40(sp) # 8-byte Folded Reload + ld s1, 56(sp) # 8-byte Folded Reload + ld a5, 64(sp) # 8-byte Folded Reload csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 96 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld t0, 48(sp) # 8-byte Folded Reload - mv a6, s1 - ld s1, 56(sp) # 8-byte Folded Reload - ld a5, 64(sp) # 8-byte Folded Reload j .LBB238_5 .LBB238_19: # %for.body.lr.ph.split li s0, 0 @@ -137280,13 +137271,13 @@ fmv.d.x fs7, zero .Lpcrel_hi4759: auipc t3, %pcrel_hi(init_value) - sd a7, 64(sp) # 8-byte Folded Spill - sd t0, 56(sp) # 8-byte Folded Spill - sd t1, 48(sp) # 8-byte Folded Spill slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 112 vs2r.v v12, (a0) # Unknown-size Folded Spill + sd a7, 64(sp) # 8-byte Folded Spill + sd t0, 56(sp) # 8-byte Folded Spill + sd t1, 48(sp) # 8-byte Folded Spill sd t2, 40(sp) # 8-byte Folded Spill sd t3, 32(sp) # 8-byte Folded Spill j .LBB240_6 @@ -137501,16 +137492,16 @@ call printf@plt ld t3, 32(sp) # 8-byte Folded Reload ld t2, 40(sp) # 8-byte Folded Reload - csrr a0, vlenb - slli a0, a0, 2 - add a0, sp, a0 - addi a0, a0, 112 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t1, 48(sp) # 8-byte Folded Reload ld t0, 56(sp) # 8-byte Folded Reload ld a7, 64(sp) # 8-byte Folded Reload ld a6, 80(sp) # 8-byte Folded Reload ld a5, 72(sp) # 8-byte Folded Reload + csrr a0, vlenb + slli a0, a0, 2 + add a0, sp, a0 + addi a0, a0, 112 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB240_5 .LBB240_19: # %for.body.lr.ph.split li s0, 0 @@ -137630,6 +137621,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi4754)(a0) mv a0, s3 call printf@plt + ld a5, 72(sp) # 8-byte Folded Reload addi a0, sp, 112 vl2r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -137642,7 +137634,6 @@ add a0, sp, a0 addi a0, a0, 112 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld a5, 72(sp) # 8-byte Folded Reload ld a0, 96(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi4753)(a0) j .LBB240_21 @@ -137904,9 +137895,9 @@ add a1, s1, a1 sub a1, a1, a0 addi a6, a1, -10 - addi s7, s2, 80 + addi a7, s2, 80 csrr a0, vlenb - slli t0, a0, 1 + slli s7, a0, 1 .Lpcrel_hi4789: auipc a1, %pcrel_hi(.LCPI241_0) fld fs0, %pcrel_lo(.Lpcrel_hi4789)(a1) @@ -137923,14 +137914,14 @@ fmv.d.x fs3, zero .Lpcrel_hi4792: auipc t2, %pcrel_hi(init_value) - sd s1, 56(sp) # 8-byte Folded Spill - sd t0, 48(sp) # 8-byte Folded Spill slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 96 vs2r.v v12, (a0) # Unknown-size Folded Spill + sd s1, 56(sp) # 8-byte Folded Spill + sd a6, 48(sp) # 8-byte Folded Spill sd t1, 40(sp) # 8-byte Folded Spill - sd t2, 32(sp) # 8-byte Folded Spill + sd a7, 32(sp) # 8-byte Folded Spill j .LBB241_6 .LBB241_5: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB241_6 Depth=1 @@ -137945,7 +137936,7 @@ # Child Loop BB241_14 Depth 2 li a0, 0 li a1, 10 - mv a2, s7 + mv a2, a7 fmv.d fa5, fs3 .LBB241_7: # %do.body.us # Parent Loop BB241_6 Depth=1 @@ -138076,7 +138067,7 @@ vfredosum.vs v8, v8, v10 vfmv.f.s fa5, v8 sub a1, a1, t1 - add a4, a4, t0 + add a4, a4, s7 bnez a1, .LBB241_11 # %bb.12: # %middle.block107 # in Loop: Header=BB241_6 Depth=1 @@ -138143,19 +138134,19 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi4797) sd a5, 64(sp) # 8-byte Folded Spill - mv s1, a6 + mv s1, t2 call printf@plt - ld t2, 32(sp) # 8-byte Folded Reload + mv t2, s1 ld t1, 40(sp) # 8-byte Folded Reload + ld a7, 32(sp) # 8-byte Folded Reload + ld s1, 56(sp) # 8-byte Folded Reload + ld a6, 48(sp) # 8-byte Folded Reload + ld a5, 64(sp) # 8-byte Folded Reload csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 96 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld t0, 48(sp) # 8-byte Folded Reload - mv a6, s1 - ld s1, 56(sp) # 8-byte Folded Reload - ld a5, 64(sp) # 8-byte Folded Reload j .LBB241_5 .LBB241_19: # %for.body.lr.ph.split li s0, 0 @@ -138549,7 +138540,7 @@ sub a0, a0, a0 add a0, s1, a0 sub a0, a0, a2 - addi s7, a0, -9 + addi a7, a0, -9 addi t0, s2, 72 csrr a0, vlenb slli t1, a0, 1 @@ -138565,17 +138556,17 @@ fld fs2, %pcrel_lo(.Lpcrel_hi4825)(a3) vsetvli a3, zero, e64, m2, ta, ma vlse64.v v12, (a2), zero - srli t2, a0, 2 + srli s7, a0, 2 fmv.d.x fs3, zero .Lpcrel_hi4826: auipc t3, %pcrel_hi(init_value) - sd t0, 56(sp) # 8-byte Folded Spill - sd s1, 48(sp) # 8-byte Folded Spill slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 96 vs2r.v v12, (a0) # Unknown-size Folded Spill - sd t2, 40(sp) # 8-byte Folded Spill + sd a7, 56(sp) # 8-byte Folded Spill + sd s1, 48(sp) # 8-byte Folded Spill + sd t0, 40(sp) # 8-byte Folded Spill sd t3, 32(sp) # 8-byte Folded Spill j .LBB242_6 .LBB242_5: # %_Z9check_sumIdEvT_.exit.us @@ -138688,11 +138679,11 @@ bge a0, s1, .LBB242_15 # %bb.9: # %do.body6.us.preheader # in Loop: Header=BB242_6 Depth=1 - bltu s7, t2, .LBB242_13 + bltu a7, s7, .LBB242_13 # %bb.10: # %vector.ph101 # in Loop: Header=BB242_6 Depth=1 - neg a0, t2 - and a0, s7, a0 + neg a0, s7 + and a0, a7, a0 add a4, a4, a0 vsetvli a2, zero, e64, m2, ta, ma mv a2, a0 @@ -138709,12 +138700,12 @@ vfmv.s.f v10, fa5 vfredosum.vs v8, v8, v10 vfmv.f.s fa5, v8 - sub a2, a2, t2 + sub a2, a2, s7 add a5, a5, t1 bnez a2, .LBB242_11 # %bb.12: # %middle.block99 # in Loop: Header=BB242_6 Depth=1 - beq s7, a0, .LBB242_15 + beq a7, a0, .LBB242_15 .LBB242_13: # %do.body6.us.preheader112 # in Loop: Header=BB242_6 Depth=1 slli a0, a4, 3 @@ -138780,16 +138771,16 @@ mv s1, t1 call printf@plt ld t3, 32(sp) # 8-byte Folded Reload - ld t2, 40(sp) # 8-byte Folded Reload + mv t1, s1 + ld s1, 48(sp) # 8-byte Folded Reload + ld t0, 40(sp) # 8-byte Folded Reload + ld a7, 56(sp) # 8-byte Folded Reload + ld a6, 64(sp) # 8-byte Folded Reload csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 96 vl2r.v v12, (a0) # Unknown-size Folded Reload - mv t1, s1 - ld s1, 48(sp) # 8-byte Folded Reload - ld t0, 56(sp) # 8-byte Folded Reload - ld a6, 64(sp) # 8-byte Folded Reload ld a0, 72(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi4820)(a0) j .LBB242_5 @@ -139782,8 +139773,8 @@ slli a2, a0, 3 add a0, s1, a0 sub a0, a0, a2 - addi s7, a0, -7 - addi t0, s2, 56 + addi a6, a0, -7 + addi s4, s2, 56 csrr a0, vlenb .Lpcrel_hi4890: auipc a2, %pcrel_hi(.LCPI244_0) @@ -139797,15 +139788,15 @@ fld fs2, %pcrel_lo(.Lpcrel_hi4892)(a3) vsetvli a3, zero, e64, m2, ta, ma vlse64.v v12, (a2), zero - slli t1, a0, 1 - srli s4, a0, 2 + slli s7, a0, 1 + srli t2, a0, 2 fmv.d.x fs3, zero slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 80 vs2r.v v12, (a0) # Unknown-size Folded Spill - sd t1, 48(sp) # 8-byte Folded Spill - sd t0, 40(sp) # 8-byte Folded Spill + sd a6, 48(sp) # 8-byte Folded Spill + sd t2, 40(sp) # 8-byte Folded Spill j .LBB244_6 .LBB244_5: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB244_6 Depth=1 @@ -139818,7 +139809,7 @@ # Child Loop BB244_14 Depth 2 li a0, 0 li a2, 7 - mv a3, t0 + mv a3, s4 fmv.d fa5, fs3 .LBB244_7: # %do.body.us # Parent Loop BB244_6 Depth=1 @@ -139899,11 +139890,11 @@ bge a0, s1, .LBB244_15 # %bb.9: # %do.body6.us.preheader # in Loop: Header=BB244_6 Depth=1 - bltu s7, s4, .LBB244_13 + bltu a6, t2, .LBB244_13 # %bb.10: # %vector.ph95 # in Loop: Header=BB244_6 Depth=1 - neg a0, s4 - and a0, s7, a0 + neg a0, t2 + and a0, a6, a0 add a4, a4, a0 vsetvli a2, zero, e64, m2, ta, ma mv a2, a0 @@ -139920,12 +139911,12 @@ vfmv.s.f v10, fa5 vfredosum.vs v8, v8, v10 vfmv.f.s fa5, v8 - sub a2, a2, s4 - add a5, a5, t1 + sub a2, a2, t2 + add a5, a5, s7 bnez a2, .LBB244_11 # %bb.12: # %middle.block93 # in Loop: Header=BB244_6 Depth=1 - beq s7, a0, .LBB244_15 + beq a6, a0, .LBB244_15 .LBB244_13: # %do.body6.us.preheader106 # in Loop: Header=BB244_6 Depth=1 slli a0, a4, 3 @@ -139990,13 +139981,13 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi4898) call printf@plt - ld t1, 48(sp) # 8-byte Folded Reload + ld t2, 40(sp) # 8-byte Folded Reload + ld a6, 48(sp) # 8-byte Folded Reload csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 80 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld t0, 40(sp) # 8-byte Folded Reload ld a0, 56(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi4887)(a0) j .LBB244_5 @@ -144406,6 +144397,8 @@ .Lpcrel_hi5148: auipc a0, %pcrel_hi(init_value) sd a0, 56(sp) # 8-byte Folded Spill + addi a0, sp, 272 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a5, 152(sp) # 8-byte Folded Spill sd t0, 144(sp) # 8-byte Folded Spill sd a6, 136(sp) # 8-byte Folded Spill @@ -144416,8 +144409,6 @@ sd t5, 96(sp) # 8-byte Folded Spill sd t6, 88(sp) # 8-byte Folded Spill sd ra, 80(sp) # 8-byte Folded Spill - addi a0, sp, 272 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB252_6 .LBB252_5: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB252_6 Depth=1 @@ -144858,8 +144849,6 @@ addi a0, a0, %pcrel_lo(.Lpcrel_hi5153) call printf@plt mv t1, s9 - addi a0, sp, 272 - vl2r.v v12, (a0) # Unknown-size Folded Reload mv a4, s8 ld ra, 80(sp) # 8-byte Folded Reload ld t6, 88(sp) # 8-byte Folded Reload @@ -144871,6 +144860,8 @@ ld a6, 136(sp) # 8-byte Folded Reload ld t0, 144(sp) # 8-byte Folded Reload ld a5, 152(sp) # 8-byte Folded Reload + addi a0, sp, 272 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB252_5 .LBB252_20: # %for.body.lr.ph.split ld a0, 176(sp) # 8-byte Folded Reload @@ -145280,9 +145271,9 @@ addi s3, s2, 128 addi s8, s2, 136 addi s4, s2, 144 - addi t1, s2, 152 - addi t2, s2, 160 - addi a4, s2, 168 + addi a4, s2, 152 + addi t1, s2, 160 + addi t2, s2, 168 addi t3, s2, 176 addi t4, s2, 184 addi t5, s2, 192 @@ -145328,6 +145319,8 @@ .Lpcrel_hi5181: auipc a0, %pcrel_hi(init_value) sd a0, 64(sp) # 8-byte Folded Spill + addi a0, sp, 256 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd ra, 56(sp) # 8-byte Folded Spill sd a5, 152(sp) # 8-byte Folded Spill sd a7, 144(sp) # 8-byte Folded Spill @@ -145338,8 +145331,6 @@ sd t4, 104(sp) # 8-byte Folded Spill sd t5, 96(sp) # 8-byte Folded Spill sd t6, 88(sp) # 8-byte Folded Spill - addi a0, sp, 256 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB253_6 .LBB253_5: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB253_6 Depth=1 @@ -145540,7 +145531,7 @@ fmadd.d fa4, fa4, fs1, fs2 fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 - add a4, t1, a3 + add a4, s9, a3 fld fa3, 0(a4) fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 @@ -145549,7 +145540,7 @@ fmadd.d fa4, fa4, fs1, fs2 fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 - add a4, t2, a3 + add a4, t1, a3 fld fa3, 0(a4) fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 @@ -145558,7 +145549,7 @@ fmadd.d fa4, fa4, fs1, fs2 fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 - add a4, s9, a3 + add a4, t2, a3 fld fa3, 0(a4) fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 @@ -145657,6 +145648,8 @@ # %bb.9: # %loop_start.us.preheader # in Loop: Header=BB253_6 Depth=1 mv s4, t0 + ld t1, 128(sp) # 8-byte Folded Reload + ld t2, 120(sp) # 8-byte Folded Reload ld t3, 112(sp) # 8-byte Folded Reload ld t4, 104(sp) # 8-byte Folded Reload ld t5, 96(sp) # 8-byte Folded Reload @@ -145714,6 +145707,8 @@ j .LBB253_16 .LBB253_15: # in Loop: Header=BB253_6 Depth=1 mv s4, t0 + ld t1, 128(sp) # 8-byte Folded Reload + ld t2, 120(sp) # 8-byte Folded Reload ld t3, 112(sp) # 8-byte Folded Reload ld t4, 104(sp) # 8-byte Folded Reload ld t5, 96(sp) # 8-byte Folded Reload @@ -145729,8 +145724,6 @@ ld a5, 152(sp) # 8-byte Folded Reload ld a7, 144(sp) # 8-byte Folded Reload ld a6, 136(sp) # 8-byte Folded Reload - ld t1, 128(sp) # 8-byte Folded Reload - ld t2, 120(sp) # 8-byte Folded Reload mv a4, s9 bnez a0, .LBB253_18 # %bb.17: # %if.end12.us @@ -145768,19 +145761,19 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi5186) call printf@plt - addi a0, sp, 256 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t6, 88(sp) # 8-byte Folded Reload ld t5, 96(sp) # 8-byte Folded Reload ld t4, 104(sp) # 8-byte Folded Reload ld t3, 112(sp) # 8-byte Folded Reload - mv a4, s9 ld t2, 120(sp) # 8-byte Folded Reload ld t1, 128(sp) # 8-byte Folded Reload + mv a4, s9 ld a6, 136(sp) # 8-byte Folded Reload ld a7, 144(sp) # 8-byte Folded Reload ld a5, 152(sp) # 8-byte Folded Reload ld ra, 56(sp) # 8-byte Folded Reload + addi a0, sp, 256 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB253_5 .LBB253_20: # %for.body.lr.ph.split ld a0, 176(sp) # 8-byte Folded Reload @@ -146270,13 +146263,13 @@ auipc a2, %pcrel_hi(.LCPI255_7) ld a2, %pcrel_lo(.Lpcrel_hi5212)(a2) addi t5, a4, 176 - addi t6, a4, 184 + addi a7, a4, 184 addi a1, a1, -1 mulhu a2, a1, a2 sub a3, a1, a2 srli a3, a3, 1 add a2, a3, a2 - addi s3, a4, 192 + addi t6, a4, 192 srli a2, a2, 4 mul a0, a2, a0 sub a1, a1, a1 @@ -146312,6 +146305,8 @@ .Lpcrel_hi5216: auipc a0, %pcrel_hi(init_value) sd a0, 64(sp) # 8-byte Folded Spill + addi a0, sp, 256 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd ra, 56(sp) # 8-byte Folded Spill sd a5, 152(sp) # 8-byte Folded Spill sd t0, 144(sp) # 8-byte Folded Spill @@ -146321,8 +146316,6 @@ sd t4, 112(sp) # 8-byte Folded Spill sd t5, 104(sp) # 8-byte Folded Spill sd t6, 96(sp) # 8-byte Folded Spill - addi a0, sp, 256 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB255_6 .LBB255_5: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB255_6 Depth=1 @@ -146341,6 +146334,7 @@ li a1, 29 ld a2, 72(sp) # 8-byte Folded Reload fmv.d fa5, fs3 + mv s3, a7 ld a7, 80(sp) # 8-byte Folded Reload mv t1, s0 .LBB255_7: # %loop2_start.us @@ -146558,7 +146552,7 @@ fmadd.d fa4, fa4, fs1, fs2 fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 - add a4, t6, a3 + add a4, s3, a3 fld fa3, 0(a4) fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 @@ -146567,7 +146561,7 @@ fmadd.d fa4, fa4, fs1, fs2 fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 - add a4, s3, a3 + add a4, t6, a3 fld fa3, 0(a4) fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 @@ -146634,6 +146628,7 @@ ld t3, 120(sp) # 8-byte Folded Reload ld t4, 112(sp) # 8-byte Folded Reload ld t5, 104(sp) # 8-byte Folded Reload + mv a7, s3 ld t6, 96(sp) # 8-byte Folded Reload ld a2, 48(sp) # 8-byte Folded Reload ld a6, 40(sp) # 8-byte Folded Reload @@ -146693,6 +146688,7 @@ ld t3, 120(sp) # 8-byte Folded Reload ld t4, 112(sp) # 8-byte Folded Reload ld t5, 104(sp) # 8-byte Folded Reload + mv a7, s3 ld t6, 96(sp) # 8-byte Folded Reload .LBB255_16: # %if.end12.us # in Loop: Header=BB255_6 Depth=1 @@ -146741,9 +146737,8 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi5221) call printf@plt - addi a0, sp, 256 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t6, 96(sp) # 8-byte Folded Reload + mv a7, s3 ld t5, 104(sp) # 8-byte Folded Reload ld t4, 112(sp) # 8-byte Folded Reload ld t3, 120(sp) # 8-byte Folded Reload @@ -146752,6 +146747,8 @@ ld t0, 144(sp) # 8-byte Folded Reload ld a5, 152(sp) # 8-byte Folded Reload ld ra, 56(sp) # 8-byte Folded Reload + addi a0, sp, 256 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB255_5 .LBB255_20: # %for.body.lr.ph.split ld a0, 176(sp) # 8-byte Folded Reload @@ -147161,8 +147158,8 @@ addi s1, s2, 160 addi s7, s2, 168 addi s3, s2, 176 - addi s10, s2, 184 - addi a4, s2, 192 + addi s8, s2, 184 + addi s10, s2, 192 addi t1, s2, 200 .Lpcrel_hi5246: auipc a2, %pcrel_hi(.LCPI256_7) @@ -147215,6 +147212,8 @@ .Lpcrel_hi5250: auipc a0, %pcrel_hi(init_value) sd a0, 96(sp) # 8-byte Folded Spill + addi a0, sp, 224 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd t3, 88(sp) # 8-byte Folded Spill sd t4, 80(sp) # 8-byte Folded Spill sd t5, 72(sp) # 8-byte Folded Spill @@ -147225,8 +147224,6 @@ sd a6, 136(sp) # 8-byte Folded Spill sd t1, 128(sp) # 8-byte Folded Spill sd t2, 120(sp) # 8-byte Folded Spill - addi a0, sp, 224 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB256_6 .LBB256_5: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB256_6 Depth=1 @@ -147246,7 +147243,6 @@ ld a2, 104(sp) # 8-byte Folded Reload fmv.d fa5, fs7 mv t0, s10 - mv s8, a4 .LBB256_7: # %loop2_start.us # Parent Loop BB256_6 Depth=1 # => This Inner Loop Header: Depth=2 @@ -147461,7 +147457,7 @@ fmadd.d fa4, fa4, fs1, fs2 fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 - add a4, t0, a3 + add a4, s8, a3 fld fa3, 0(a4) fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 @@ -147470,7 +147466,7 @@ fmadd.d fa4, fa4, fs1, fs2 fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 - add a4, s8, a3 + add a4, t0, a3 fld fa3, 0(a4) fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 @@ -147524,8 +147520,6 @@ # %bb.9: # %loop_start.us.preheader # in Loop: Header=BB256_6 Depth=1 mv s10, t0 - ld t1, 128(sp) # 8-byte Folded Reload - ld t2, 120(sp) # 8-byte Folded Reload ld a2, 48(sp) # 8-byte Folded Reload ld a6, 40(sp) # 8-byte Folded Reload bltu a2, a6, .LBB256_13 @@ -147579,8 +147573,6 @@ j .LBB256_16 .LBB256_15: # in Loop: Header=BB256_6 Depth=1 mv s10, t0 - ld t1, 128(sp) # 8-byte Folded Reload - ld t2, 120(sp) # 8-byte Folded Reload .LBB256_16: # %if.end12.us # in Loop: Header=BB256_6 Depth=1 fabs.d fa4, fa5 @@ -147589,7 +147581,8 @@ ld a5, 152(sp) # 8-byte Folded Reload ld a7, 144(sp) # 8-byte Folded Reload ld a6, 136(sp) # 8-byte Folded Reload - mv a4, s8 + ld t1, 128(sp) # 8-byte Folded Reload + ld t2, 120(sp) # 8-byte Folded Reload bnez a0, .LBB256_18 # %bb.17: # %if.end12.us # in Loop: Header=BB256_6 Depth=1 @@ -147618,11 +147611,8 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi5255) call printf@plt - addi a0, sp, 224 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t2, 120(sp) # 8-byte Folded Reload ld t1, 128(sp) # 8-byte Folded Reload - mv a4, s8 ld a6, 136(sp) # 8-byte Folded Reload ld a7, 144(sp) # 8-byte Folded Reload ld a5, 152(sp) # 8-byte Folded Reload @@ -147631,6 +147621,8 @@ ld t5, 72(sp) # 8-byte Folded Reload ld t4, 80(sp) # 8-byte Folded Reload ld t3, 88(sp) # 8-byte Folded Reload + addi a0, sp, 224 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB256_5 .LBB256_20: # %for.body.lr.ph.split ld a0, 176(sp) # 8-byte Folded Reload @@ -148042,8 +148034,8 @@ addi s7, a3, 144 addi s2, a3, 152 addi s10, a3, 160 - addi t2, a3, 168 - addi a4, a3, 176 + addi a4, a3, 168 + addi t2, a3, 176 .Lpcrel_hi5280: auipc a2, %pcrel_hi(.LCPI257_7) ld a2, %pcrel_lo(.Lpcrel_hi5280)(a2) @@ -148096,6 +148088,8 @@ .Lpcrel_hi5284: auipc a0, %pcrel_hi(init_value) sd a0, 80(sp) # 8-byte Folded Spill + addi a0, sp, 240 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd t5, 72(sp) # 8-byte Folded Spill sd t6, 64(sp) # 8-byte Folded Spill sd ra, 56(sp) # 8-byte Folded Spill @@ -148106,8 +148100,6 @@ sd t2, 120(sp) # 8-byte Folded Spill sd t3, 112(sp) # 8-byte Folded Spill sd t4, 104(sp) # 8-byte Folded Spill - addi a0, sp, 240 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB257_6 .LBB257_5: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB257_6 Depth=1 @@ -148323,7 +148315,7 @@ fmadd.d fa4, fa4, fs1, fs2 fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 - add a4, t2, a3 + add a4, s3, a3 fld fa3, 0(a4) fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 @@ -148332,7 +148324,7 @@ fmadd.d fa4, fa4, fs1, fs2 fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 - add a4, s3, a3 + add a4, t2, a3 fld fa3, 0(a4) fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 @@ -148395,6 +148387,7 @@ # %bb.9: # %loop_start.us.preheader # in Loop: Header=BB257_6 Depth=1 mv s10, t1 + ld t2, 120(sp) # 8-byte Folded Reload ld t3, 112(sp) # 8-byte Folded Reload ld t4, 104(sp) # 8-byte Folded Reload ld a2, 48(sp) # 8-byte Folded Reload @@ -148451,6 +148444,7 @@ j .LBB257_16 .LBB257_15: # in Loop: Header=BB257_6 Depth=1 mv s10, t1 + ld t2, 120(sp) # 8-byte Folded Reload ld t3, 112(sp) # 8-byte Folded Reload ld t4, 104(sp) # 8-byte Folded Reload .LBB257_16: # %if.end12.us @@ -148462,7 +148456,6 @@ ld t0, 144(sp) # 8-byte Folded Reload ld a6, 136(sp) # 8-byte Folded Reload ld a7, 128(sp) # 8-byte Folded Reload - ld t2, 120(sp) # 8-byte Folded Reload mv a4, s3 bnez a0, .LBB257_18 # %bb.17: # %if.end12.us @@ -148492,12 +148485,10 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi5289) call printf@plt - addi a0, sp, 240 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t4, 104(sp) # 8-byte Folded Reload ld t3, 112(sp) # 8-byte Folded Reload - mv a4, s3 ld t2, 120(sp) # 8-byte Folded Reload + mv a4, s3 ld a7, 128(sp) # 8-byte Folded Reload ld a6, 136(sp) # 8-byte Folded Reload ld t0, 144(sp) # 8-byte Folded Reload @@ -148505,6 +148496,8 @@ ld ra, 56(sp) # 8-byte Folded Reload ld t6, 64(sp) # 8-byte Folded Reload ld t5, 72(sp) # 8-byte Folded Reload + addi a0, sp, 240 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB257_5 .LBB257_20: # %for.body.lr.ph.split ld a0, 176(sp) # 8-byte Folded Reload @@ -148920,8 +148913,8 @@ .Lpcrel_hi5314: auipc a2, %pcrel_hi(.LCPI258_7) ld a2, %pcrel_lo(.Lpcrel_hi5314)(a2) - addi t2, s2, 192 - addi s9, s2, 200 + addi a4, s2, 192 + addi t2, s2, 200 addi a1, a1, -1 mulhu a2, a1, a2 srli a2, a2, 3 @@ -148967,6 +148960,8 @@ .Lpcrel_hi5318: auipc a0, %pcrel_hi(init_value) sd a0, 96(sp) # 8-byte Folded Spill + addi a0, sp, 224 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd t3, 88(sp) # 8-byte Folded Spill sd t4, 80(sp) # 8-byte Folded Spill sd t5, 72(sp) # 8-byte Folded Spill @@ -148977,8 +148972,6 @@ sd a6, 136(sp) # 8-byte Folded Spill sd t1, 128(sp) # 8-byte Folded Spill sd t2, 120(sp) # 8-byte Folded Spill - addi a0, sp, 224 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB258_6 .LBB258_5: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB258_6 Depth=1 @@ -148999,6 +148992,7 @@ fmv.d fa5, fs7 mv t0, s10 mv s8, a3 + mv s9, a4 .LBB258_7: # %loop2_start.us # Parent Loop BB258_6 Depth=1 # => This Inner Loop Header: Depth=2 @@ -149220,7 +149214,7 @@ fmadd.d fa4, fa4, fs1, fs2 fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 - add a4, t2, a3 + add a4, s9, a3 fld fa3, 0(a4) fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 @@ -149229,7 +149223,7 @@ fmadd.d fa4, fa4, fs1, fs2 fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 - add a3, s9, a3 + add a3, t2, a3 fld fa3, 0(a3) fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 @@ -149256,6 +149250,7 @@ # %bb.9: # %loop_start.us.preheader # in Loop: Header=BB258_6 Depth=1 mv s10, t0 + ld t2, 120(sp) # 8-byte Folded Reload ld a2, 48(sp) # 8-byte Folded Reload ld a6, 40(sp) # 8-byte Folded Reload bltu a2, a6, .LBB258_13 @@ -149309,6 +149304,7 @@ j .LBB258_16 .LBB258_15: # in Loop: Header=BB258_6 Depth=1 mv s10, t0 + ld t2, 120(sp) # 8-byte Folded Reload .LBB258_16: # %if.end12.us # in Loop: Header=BB258_6 Depth=1 fabs.d fa4, fa5 @@ -149319,7 +149315,7 @@ ld a6, 136(sp) # 8-byte Folded Reload mv a3, s8 ld t1, 128(sp) # 8-byte Folded Reload - ld t2, 120(sp) # 8-byte Folded Reload + mv a4, s9 bnez a0, .LBB258_18 # %bb.17: # %if.end12.us # in Loop: Header=BB258_6 Depth=1 @@ -149348,9 +149344,8 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi5323) call printf@plt - addi a0, sp, 224 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t2, 120(sp) # 8-byte Folded Reload + mv a4, s9 ld t1, 128(sp) # 8-byte Folded Reload mv a3, s8 ld a6, 136(sp) # 8-byte Folded Reload @@ -149361,6 +149356,8 @@ ld t5, 72(sp) # 8-byte Folded Reload ld t4, 80(sp) # 8-byte Folded Reload ld t3, 88(sp) # 8-byte Folded Reload + addi a0, sp, 224 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB258_5 .LBB258_20: # %for.body.lr.ph.split ld a0, 176(sp) # 8-byte Folded Reload @@ -149771,12 +149768,12 @@ addi s6, a4, 144 addi s1, a4, 152 addi s7, a4, 160 - addi s8, a4, 168 + addi s2, a4, 168 .Lpcrel_hi5348: auipc a2, %pcrel_hi(.LCPI259_7) ld a2, %pcrel_lo(.Lpcrel_hi5348)(a2) - addi t2, a4, 176 - addi s2, a4, 184 + addi s8, a4, 176 + addi t2, a4, 184 addi a1, a1, -1 mulhu a2, a1, a2 sub a3, a1, a2 @@ -149814,6 +149811,8 @@ .Lpcrel_hi5352: auipc a0, %pcrel_hi(init_value) sd a0, 96(sp) # 8-byte Folded Spill + addi a0, sp, 224 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd t3, 88(sp) # 8-byte Folded Spill sd t4, 80(sp) # 8-byte Folded Spill sd t5, 72(sp) # 8-byte Folded Spill @@ -149823,8 +149822,6 @@ sd t0, 144(sp) # 8-byte Folded Spill sd a6, 136(sp) # 8-byte Folded Spill sd t2, 128(sp) # 8-byte Folded Spill - addi a0, sp, 224 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB259_6 .LBB259_5: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB259_6 Depth=1 @@ -150038,7 +150035,7 @@ fmadd.d fa4, fa4, fs1, fs2 fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 - add a4, t1, a3 + add a4, s2, a3 fld fa3, 0(a4) fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 @@ -150047,7 +150044,7 @@ fmadd.d fa4, fa4, fs1, fs2 fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 - add a4, t2, a3 + add a4, t1, a3 fld fa3, 0(a4) fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 @@ -150056,7 +150053,7 @@ fmadd.d fa4, fa4, fs1, fs2 fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 - add a4, s2, a3 + add a4, t2, a3 fld fa3, 0(a4) fadd.d fa4, fa4, fs0 fmadd.d fa4, fa4, fs1, fs2 @@ -150195,8 +150192,6 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi5357) call printf@plt - addi a0, sp, 224 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t2, 128(sp) # 8-byte Folded Reload ld a6, 136(sp) # 8-byte Folded Reload ld t0, 144(sp) # 8-byte Folded Reload @@ -150206,6 +150201,8 @@ ld t5, 72(sp) # 8-byte Folded Reload ld t4, 80(sp) # 8-byte Folded Reload ld t3, 88(sp) # 8-byte Folded Reload + addi a0, sp, 224 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB259_5 .LBB259_20: # %for.body.lr.ph.split ld a0, 176(sp) # 8-byte Folded Reload @@ -150638,6 +150635,8 @@ .Lpcrel_hi5385: auipc a0, %pcrel_hi(init_value) sd a0, 128(sp) # 8-byte Folded Spill + addi a0, sp, 160 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a6, 104(sp) # 8-byte Folded Spill sd t0, 96(sp) # 8-byte Folded Spill sd t1, 88(sp) # 8-byte Folded Spill @@ -150647,8 +150646,6 @@ sd t5, 56(sp) # 8-byte Folded Spill sd t6, 48(sp) # 8-byte Folded Spill sd ra, 40(sp) # 8-byte Folded Spill - addi a0, sp, 160 - vs2r.v v12, (a0) # Unknown-size Folded Spill sd a2, 32(sp) # 8-byte Folded Spill j .LBB260_6 .LBB260_5: # %_Z9check_sumIdEvT_.exit.us @@ -150997,8 +150994,6 @@ addi a0, a0, %pcrel_lo(.Lpcrel_hi5390) sd a7, 120(sp) # 8-byte Folded Spill call printf@plt - addi a0, sp, 160 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld ra, 40(sp) # 8-byte Folded Reload ld t6, 48(sp) # 8-byte Folded Reload ld t5, 56(sp) # 8-byte Folded Reload @@ -151010,6 +151005,8 @@ ld a7, 120(sp) # 8-byte Folded Reload ld a6, 104(sp) # 8-byte Folded Reload ld a5, 112(sp) # 8-byte Folded Reload + addi a0, sp, 160 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB260_5 .LBB260_19: # %for.body.lr.ph.split li s0, 0 @@ -151144,9 +151141,9 @@ lw a1, %pcrel_lo(.Lpcrel_hi5381)(a0) mv a0, s3 call printf@plt + ld a5, 112(sp) # 8-byte Folded Reload addi a0, sp, 160 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld a5, 112(sp) # 8-byte Folded Reload ld a0, 144(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi5380)(a0) j .LBB260_21 @@ -151452,6 +151449,8 @@ .Lpcrel_hi5419: auipc a0, %pcrel_hi(init_value) sd a0, 120(sp) # 8-byte Folded Spill + addi a0, sp, 208 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a7, 112(sp) # 8-byte Folded Spill sd t1, 104(sp) # 8-byte Folded Spill sd t2, 96(sp) # 8-byte Folded Spill @@ -151463,8 +151462,6 @@ sd a5, 160(sp) # 8-byte Folded Spill sd t0, 152(sp) # 8-byte Folded Spill sd a6, 144(sp) # 8-byte Folded Spill - addi a0, sp, 208 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB261_6 .LBB261_5: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB261_6 Depth=1 @@ -151806,8 +151803,6 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi5424) call printf@plt - addi a0, sp, 208 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld a6, 144(sp) # 8-byte Folded Reload ld t0, 152(sp) # 8-byte Folded Reload ld a5, 160(sp) # 8-byte Folded Reload @@ -151819,6 +151814,8 @@ ld t2, 96(sp) # 8-byte Folded Reload ld t1, 104(sp) # 8-byte Folded Reload ld a7, 112(sp) # 8-byte Folded Reload + addi a0, sp, 208 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB261_5 .LBB261_19: # %for.body.lr.ph.split ld a0, 184(sp) # 8-byte Folded Reload @@ -152273,6 +152270,8 @@ .Lpcrel_hi5453: auipc a0, %pcrel_hi(init_value) sd a0, 128(sp) # 8-byte Folded Spill + addi a0, sp, 192 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a6, 120(sp) # 8-byte Folded Spill sd t0, 112(sp) # 8-byte Folded Spill sd t1, 104(sp) # 8-byte Folded Spill @@ -152283,8 +152282,6 @@ sd t6, 64(sp) # 8-byte Folded Spill sd ra, 56(sp) # 8-byte Folded Spill sd a5, 152(sp) # 8-byte Folded Spill - addi a0, sp, 192 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB262_6 .LBB262_5: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB262_6 Depth=1 @@ -152603,8 +152600,6 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi5458) call printf@plt - addi a0, sp, 192 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld a5, 152(sp) # 8-byte Folded Reload ld ra, 56(sp) # 8-byte Folded Reload ld t6, 64(sp) # 8-byte Folded Reload @@ -152615,6 +152610,8 @@ ld t1, 104(sp) # 8-byte Folded Reload ld t0, 112(sp) # 8-byte Folded Reload ld a6, 120(sp) # 8-byte Folded Reload + addi a0, sp, 192 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB262_5 .LBB262_19: # %for.body.lr.ph.split ld a0, 176(sp) # 8-byte Folded Reload @@ -153061,6 +153058,8 @@ .Lpcrel_hi5487: auipc a0, %pcrel_hi(init_value) sd a0, 128(sp) # 8-byte Folded Spill + addi a0, sp, 192 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a7, 112(sp) # 8-byte Folded Spill sd t1, 104(sp) # 8-byte Folded Spill sd t2, 96(sp) # 8-byte Folded Spill @@ -153070,8 +153069,6 @@ sd t6, 64(sp) # 8-byte Folded Spill sd ra, 56(sp) # 8-byte Folded Spill sd a5, 152(sp) # 8-byte Folded Spill - addi a0, sp, 192 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB263_6 .LBB263_5: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB263_6 Depth=1 @@ -153391,8 +153388,6 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi5492) call printf@plt - addi a0, sp, 192 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld a5, 152(sp) # 8-byte Folded Reload ld ra, 56(sp) # 8-byte Folded Reload ld t6, 64(sp) # 8-byte Folded Reload @@ -153403,6 +153398,8 @@ ld t1, 104(sp) # 8-byte Folded Reload ld a7, 112(sp) # 8-byte Folded Reload ld a6, 120(sp) # 8-byte Folded Reload + addi a0, sp, 192 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB263_5 .LBB263_19: # %for.body.lr.ph.split ld a0, 176(sp) # 8-byte Folded Reload @@ -153542,9 +153539,9 @@ lw a1, %pcrel_lo(.Lpcrel_hi5482)(a0) mv a0, s3 call printf@plt + ld a6, 120(sp) # 8-byte Folded Reload addi a0, sp, 192 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld a6, 120(sp) # 8-byte Folded Reload ld a0, 160(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi5481)(a0) j .LBB263_21 @@ -153904,6 +153901,8 @@ .Lpcrel_hi5521: auipc a0, %pcrel_hi(init_value) sd a0, 128(sp) # 8-byte Folded Spill + addi a0, sp, 160 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a6, 104(sp) # 8-byte Folded Spill sd t0, 96(sp) # 8-byte Folded Spill sd t1, 88(sp) # 8-byte Folded Spill @@ -153913,8 +153912,6 @@ sd t5, 56(sp) # 8-byte Folded Spill sd t6, 48(sp) # 8-byte Folded Spill sd ra, 40(sp) # 8-byte Folded Spill - addi a0, sp, 160 - vs2r.v v12, (a0) # Unknown-size Folded Spill sd a2, 32(sp) # 8-byte Folded Spill j .LBB265_6 .LBB265_5: # %_Z9check_sumIdEvT_.exit.us @@ -154223,8 +154220,6 @@ addi a0, a0, %pcrel_lo(.Lpcrel_hi5526) sd a7, 120(sp) # 8-byte Folded Spill call printf@plt - addi a0, sp, 160 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld ra, 40(sp) # 8-byte Folded Reload ld t6, 48(sp) # 8-byte Folded Reload ld t5, 56(sp) # 8-byte Folded Reload @@ -154236,6 +154231,8 @@ ld a7, 120(sp) # 8-byte Folded Reload ld a6, 104(sp) # 8-byte Folded Reload ld a5, 112(sp) # 8-byte Folded Reload + addi a0, sp, 160 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB265_5 .LBB265_19: # %for.body.lr.ph.split li s0, 0 @@ -154370,9 +154367,9 @@ lw a1, %pcrel_lo(.Lpcrel_hi5517)(a0) mv a0, s3 call printf@plt + ld a5, 112(sp) # 8-byte Folded Reload addi a0, sp, 160 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld a5, 112(sp) # 8-byte Folded Reload ld a0, 144(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi5516)(a0) j .LBB265_21 @@ -154683,6 +154680,8 @@ .Lpcrel_hi5555: auipc a0, %pcrel_hi(init_value) sd a0, 128(sp) # 8-byte Folded Spill + addi a0, sp, 176 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a7, 96(sp) # 8-byte Folded Spill sd t1, 88(sp) # 8-byte Folded Spill sd t2, 80(sp) # 8-byte Folded Spill @@ -154690,8 +154689,6 @@ sd t4, 64(sp) # 8-byte Folded Spill sd t5, 56(sp) # 8-byte Folded Spill sd t6, 48(sp) # 8-byte Folded Spill - addi a0, sp, 176 - vs2r.v v12, (a0) # Unknown-size Folded Spill j .LBB266_6 .LBB266_5: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB266_6 Depth=1 @@ -154980,8 +154977,6 @@ addi a0, a0, %pcrel_lo(.Lpcrel_hi5560) sd t0, 120(sp) # 8-byte Folded Spill call printf@plt - addi a0, sp, 176 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t6, 48(sp) # 8-byte Folded Reload ld t5, 56(sp) # 8-byte Folded Reload ld t4, 64(sp) # 8-byte Folded Reload @@ -154992,6 +154987,8 @@ ld a7, 96(sp) # 8-byte Folded Reload ld a6, 104(sp) # 8-byte Folded Reload ld a5, 112(sp) # 8-byte Folded Reload + addi a0, sp, 176 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB266_5 .LBB266_19: # %for.body.lr.ph.split li s0, 0 @@ -155126,10 +155123,10 @@ lw a1, %pcrel_lo(.Lpcrel_hi5550)(a0) mv a0, s3 call printf@plt - addi a0, sp, 176 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld a6, 104(sp) # 8-byte Folded Reload ld a5, 112(sp) # 8-byte Folded Reload + addi a0, sp, 176 + vl2r.v v12, (a0) # Unknown-size Folded Reload ld a0, 160(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi5549)(a0) j .LBB266_21 @@ -155432,6 +155429,8 @@ .Lpcrel_hi5589: auipc a0, %pcrel_hi(init_value) sd a0, 128(sp) # 8-byte Folded Spill + addi a0, sp, 160 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a6, 104(sp) # 8-byte Folded Spill sd t0, 96(sp) # 8-byte Folded Spill sd t1, 88(sp) # 8-byte Folded Spill @@ -155441,8 +155440,6 @@ sd t5, 56(sp) # 8-byte Folded Spill sd t6, 48(sp) # 8-byte Folded Spill sd ra, 40(sp) # 8-byte Folded Spill - addi a0, sp, 160 - vs2r.v v12, (a0) # Unknown-size Folded Spill sd a2, 32(sp) # 8-byte Folded Spill j .LBB267_6 .LBB267_5: # %_Z9check_sumIdEvT_.exit.us @@ -155720,8 +155717,6 @@ addi a0, a0, %pcrel_lo(.Lpcrel_hi5594) sd a7, 120(sp) # 8-byte Folded Spill call printf@plt - addi a0, sp, 160 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld ra, 40(sp) # 8-byte Folded Reload ld t6, 48(sp) # 8-byte Folded Reload ld t5, 56(sp) # 8-byte Folded Reload @@ -155733,6 +155728,8 @@ ld a7, 120(sp) # 8-byte Folded Reload ld a6, 104(sp) # 8-byte Folded Reload ld a5, 112(sp) # 8-byte Folded Reload + addi a0, sp, 160 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB267_5 .LBB267_19: # %for.body.lr.ph.split li s0, 0 @@ -155867,9 +155864,9 @@ lw a1, %pcrel_lo(.Lpcrel_hi5584)(a0) mv a0, s3 call printf@plt + ld a5, 112(sp) # 8-byte Folded Reload addi a0, sp, 160 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld a5, 112(sp) # 8-byte Folded Reload ld a0, 144(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi5583)(a0) j .LBB267_21 @@ -156162,6 +156159,8 @@ .Lpcrel_hi5622: auipc a0, %pcrel_hi(init_value) sd a0, 128(sp) # 8-byte Folded Spill + addi a0, sp, 160 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a7, 96(sp) # 8-byte Folded Spill sd t1, 88(sp) # 8-byte Folded Spill sd t2, 80(sp) # 8-byte Folded Spill @@ -156170,8 +156169,6 @@ sd t5, 56(sp) # 8-byte Folded Spill sd t6, 48(sp) # 8-byte Folded Spill sd ra, 40(sp) # 8-byte Folded Spill - addi a0, sp, 160 - vs2r.v v12, (a0) # Unknown-size Folded Spill sd a2, 32(sp) # 8-byte Folded Spill j .LBB268_6 .LBB268_5: # %_Z9check_sumIdEvT_.exit.us @@ -156450,8 +156447,6 @@ addi a0, a0, %pcrel_lo(.Lpcrel_hi5627) sd t0, 120(sp) # 8-byte Folded Spill call printf@plt - addi a0, sp, 160 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld ra, 40(sp) # 8-byte Folded Reload ld t6, 48(sp) # 8-byte Folded Reload ld t5, 56(sp) # 8-byte Folded Reload @@ -156463,6 +156458,8 @@ ld a7, 96(sp) # 8-byte Folded Reload ld a6, 104(sp) # 8-byte Folded Reload ld a5, 112(sp) # 8-byte Folded Reload + addi a0, sp, 160 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB268_5 .LBB268_19: # %for.body.lr.ph.split li s0, 0 @@ -156597,10 +156594,10 @@ lw a1, %pcrel_lo(.Lpcrel_hi5618)(a0) mv a0, s3 call printf@plt - addi a0, sp, 160 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld a6, 104(sp) # 8-byte Folded Reload ld a5, 112(sp) # 8-byte Folded Reload + addi a0, sp, 160 + vl2r.v v12, (a0) # Unknown-size Folded Reload ld a0, 144(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi5617)(a0) j .LBB268_21 @@ -157579,16 +157576,16 @@ fmv.d.x fs7, zero .Lpcrel_hi5688: auipc ra, %pcrel_hi(init_value) + slli a0, a0, 2 + add a0, sp, a0 + addi a0, a0, 144 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a7, 88(sp) # 8-byte Folded Spill sd t1, 80(sp) # 8-byte Folded Spill sd t2, 72(sp) # 8-byte Folded Spill sd t3, 64(sp) # 8-byte Folded Spill sd t4, 56(sp) # 8-byte Folded Spill sd t5, 48(sp) # 8-byte Folded Spill - slli a0, a0, 2 - add a0, sp, a0 - addi a0, a0, 144 - vs2r.v v12, (a0) # Unknown-size Folded Spill sd t6, 40(sp) # 8-byte Folded Spill sd ra, 32(sp) # 8-byte Folded Spill j .LBB270_6 @@ -157839,11 +157836,6 @@ call printf@plt ld ra, 32(sp) # 8-byte Folded Reload ld t6, 40(sp) # 8-byte Folded Reload - csrr a0, vlenb - slli a0, a0, 2 - add a0, sp, a0 - addi a0, a0, 144 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t5, 48(sp) # 8-byte Folded Reload ld t4, 56(sp) # 8-byte Folded Reload ld t3, 64(sp) # 8-byte Folded Reload @@ -157853,6 +157845,11 @@ ld a7, 88(sp) # 8-byte Folded Reload ld a6, 96(sp) # 8-byte Folded Reload ld a5, 104(sp) # 8-byte Folded Reload + csrr a0, vlenb + slli a0, a0, 2 + add a0, sp, a0 + addi a0, a0, 144 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB270_5 .LBB270_19: # %for.body.lr.ph.split li s0, 0 @@ -157972,6 +157969,8 @@ lw a1, %pcrel_lo(.Lpcrel_hi5684)(a0) mv a0, s3 call printf@plt + ld a6, 96(sp) # 8-byte Folded Reload + ld a5, 104(sp) # 8-byte Folded Reload addi a0, sp, 144 vl2r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -157984,8 +157983,6 @@ add a0, sp, a0 addi a0, a0, 144 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld a6, 96(sp) # 8-byte Folded Reload - ld a5, 104(sp) # 8-byte Folded Reload ld a0, 128(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi5683)(a0) j .LBB270_21 @@ -158286,15 +158283,15 @@ fmv.d.x fs7, zero .Lpcrel_hi5722: auipc t5, %pcrel_hi(init_value) + slli a0, a0, 2 + add a0, sp, a0 + addi a0, a0, 128 + vs2r.v v12, (a0) # Unknown-size Folded Spill sd a6, 80(sp) # 8-byte Folded Spill sd t0, 72(sp) # 8-byte Folded Spill sd t1, 64(sp) # 8-byte Folded Spill sd t2, 56(sp) # 8-byte Folded Spill sd t3, 48(sp) # 8-byte Folded Spill - slli a0, a0, 2 - add a0, sp, a0 - addi a0, a0, 128 - vs2r.v v12, (a0) # Unknown-size Folded Spill sd t4, 40(sp) # 8-byte Folded Spill sd t5, 32(sp) # 8-byte Folded Spill j .LBB271_6 @@ -158537,11 +158534,6 @@ call printf@plt ld t5, 32(sp) # 8-byte Folded Reload ld t4, 40(sp) # 8-byte Folded Reload - csrr a0, vlenb - slli a0, a0, 2 - add a0, sp, a0 - addi a0, a0, 128 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t3, 48(sp) # 8-byte Folded Reload ld t2, 56(sp) # 8-byte Folded Reload ld t1, 64(sp) # 8-byte Folded Reload @@ -158549,6 +158541,11 @@ ld a7, 96(sp) # 8-byte Folded Reload ld a6, 80(sp) # 8-byte Folded Reload ld a5, 88(sp) # 8-byte Folded Reload + csrr a0, vlenb + slli a0, a0, 2 + add a0, sp, a0 + addi a0, a0, 128 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB271_5 .LBB271_19: # %for.body.lr.ph.split li s0, 0 @@ -158668,6 +158665,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi5717)(a0) mv a0, s3 call printf@plt + ld a5, 88(sp) # 8-byte Folded Reload addi a0, sp, 128 vl2r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -158680,7 +158678,6 @@ add a0, sp, a0 addi a0, a0, 128 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld a5, 88(sp) # 8-byte Folded Reload ld a0, 112(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi5716)(a0) j .LBB271_21 @@ -158982,14 +158979,14 @@ fmv.d.x fs7, zero .Lpcrel_hi5756: auipc t5, %pcrel_hi(init_value) - sd a7, 72(sp) # 8-byte Folded Spill - sd t1, 64(sp) # 8-byte Folded Spill - sd t2, 56(sp) # 8-byte Folded Spill - sd t3, 48(sp) # 8-byte Folded Spill slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 128 vs2r.v v12, (a0) # Unknown-size Folded Spill + sd a7, 72(sp) # 8-byte Folded Spill + sd t1, 64(sp) # 8-byte Folded Spill + sd t2, 56(sp) # 8-byte Folded Spill + sd t3, 48(sp) # 8-byte Folded Spill sd t4, 40(sp) # 8-byte Folded Spill sd t5, 32(sp) # 8-byte Folded Spill j .LBB272_6 @@ -159222,11 +159219,6 @@ call printf@plt ld t5, 32(sp) # 8-byte Folded Reload ld t4, 40(sp) # 8-byte Folded Reload - csrr a0, vlenb - slli a0, a0, 2 - add a0, sp, a0 - addi a0, a0, 128 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t3, 48(sp) # 8-byte Folded Reload ld t2, 56(sp) # 8-byte Folded Reload ld t1, 64(sp) # 8-byte Folded Reload @@ -159234,6 +159226,11 @@ ld a7, 72(sp) # 8-byte Folded Reload ld a6, 80(sp) # 8-byte Folded Reload ld a5, 88(sp) # 8-byte Folded Reload + csrr a0, vlenb + slli a0, a0, 2 + add a0, sp, a0 + addi a0, a0, 128 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB272_5 .LBB272_19: # %for.body.lr.ph.split li s0, 0 @@ -159353,6 +159350,8 @@ lw a1, %pcrel_lo(.Lpcrel_hi5751)(a0) mv a0, s3 call printf@plt + ld a6, 80(sp) # 8-byte Folded Reload + ld a5, 88(sp) # 8-byte Folded Reload addi a0, sp, 128 vl2r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -159365,8 +159364,6 @@ add a0, sp, a0 addi a0, a0, 128 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld a6, 80(sp) # 8-byte Folded Reload - ld a5, 88(sp) # 8-byte Folded Reload ld a0, 112(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi5750)(a0) j .LBB272_21 @@ -159647,13 +159644,13 @@ fmv.d.x fs3, zero .Lpcrel_hi5789: auipc t2, %pcrel_hi(init_value) - sd s1, 56(sp) # 8-byte Folded Spill - sd t0, 48(sp) # 8-byte Folded Spill slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 96 vs2r.v v12, (a0) # Unknown-size Folded Spill - sd t1, 40(sp) # 8-byte Folded Spill + sd s1, 56(sp) # 8-byte Folded Spill + sd t0, 48(sp) # 8-byte Folded Spill + sd a6, 40(sp) # 8-byte Folded Spill sd t2, 32(sp) # 8-byte Folded Spill j .LBB273_6 .LBB273_5: # %_Z9check_sumIdEvT_.exit.us @@ -159887,19 +159884,19 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi5794) sd a5, 64(sp) # 8-byte Folded Spill - mv s1, a6 + mv s1, t1 call printf@plt ld t2, 32(sp) # 8-byte Folded Reload - ld t1, 40(sp) # 8-byte Folded Reload + mv t1, s1 + ld t0, 48(sp) # 8-byte Folded Reload + ld a6, 40(sp) # 8-byte Folded Reload + ld s1, 56(sp) # 8-byte Folded Reload + ld a5, 64(sp) # 8-byte Folded Reload csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 96 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld t0, 48(sp) # 8-byte Folded Reload - mv a6, s1 - ld s1, 56(sp) # 8-byte Folded Reload - ld a5, 64(sp) # 8-byte Folded Reload j .LBB273_5 .LBB273_19: # %for.body.lr.ph.split li s0, 0 @@ -160400,13 +160397,13 @@ fmv.d.x fs7, zero .Lpcrel_hi5824: auipc t3, %pcrel_hi(init_value) - sd a7, 64(sp) # 8-byte Folded Spill - sd t0, 56(sp) # 8-byte Folded Spill - sd t1, 48(sp) # 8-byte Folded Spill slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 112 vs2r.v v12, (a0) # Unknown-size Folded Spill + sd a7, 64(sp) # 8-byte Folded Spill + sd t0, 56(sp) # 8-byte Folded Spill + sd t1, 48(sp) # 8-byte Folded Spill sd t2, 40(sp) # 8-byte Folded Spill sd t3, 32(sp) # 8-byte Folded Spill j .LBB275_6 @@ -160621,16 +160618,16 @@ call printf@plt ld t3, 32(sp) # 8-byte Folded Reload ld t2, 40(sp) # 8-byte Folded Reload - csrr a0, vlenb - slli a0, a0, 2 - add a0, sp, a0 - addi a0, a0, 112 - vl2r.v v12, (a0) # Unknown-size Folded Reload ld t1, 48(sp) # 8-byte Folded Reload ld t0, 56(sp) # 8-byte Folded Reload ld a7, 64(sp) # 8-byte Folded Reload ld a6, 80(sp) # 8-byte Folded Reload ld a5, 72(sp) # 8-byte Folded Reload + csrr a0, vlenb + slli a0, a0, 2 + add a0, sp, a0 + addi a0, a0, 112 + vl2r.v v12, (a0) # Unknown-size Folded Reload j .LBB275_5 .LBB275_19: # %for.body.lr.ph.split li s0, 0 @@ -160750,6 +160747,7 @@ lw a1, %pcrel_lo(.Lpcrel_hi5819)(a0) mv a0, s3 call printf@plt + ld a5, 72(sp) # 8-byte Folded Reload addi a0, sp, 112 vl2r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -160762,7 +160760,6 @@ add a0, sp, a0 addi a0, a0, 112 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld a5, 72(sp) # 8-byte Folded Reload ld a0, 96(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi5818)(a0) j .LBB275_21 @@ -161024,9 +161021,9 @@ add a1, s1, a1 sub a1, a1, a0 addi a6, a1, -10 - addi s7, s2, 80 + addi a7, s2, 80 csrr a0, vlenb - slli t0, a0, 1 + slli s7, a0, 1 .Lpcrel_hi5854: auipc a1, %pcrel_hi(.LCPI276_0) fld fs0, %pcrel_lo(.Lpcrel_hi5854)(a1) @@ -161043,14 +161040,14 @@ fmv.d.x fs3, zero .Lpcrel_hi5857: auipc t2, %pcrel_hi(init_value) - sd s1, 56(sp) # 8-byte Folded Spill - sd t0, 48(sp) # 8-byte Folded Spill slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 96 vs2r.v v12, (a0) # Unknown-size Folded Spill + sd s1, 56(sp) # 8-byte Folded Spill + sd a6, 48(sp) # 8-byte Folded Spill sd t1, 40(sp) # 8-byte Folded Spill - sd t2, 32(sp) # 8-byte Folded Spill + sd a7, 32(sp) # 8-byte Folded Spill j .LBB276_6 .LBB276_5: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB276_6 Depth=1 @@ -161065,7 +161062,7 @@ # Child Loop BB276_14 Depth 2 li a0, 0 li a1, 10 - mv a2, s7 + mv a2, a7 fmv.d fa5, fs3 .LBB276_7: # %loop2_start.us # Parent Loop BB276_6 Depth=1 @@ -161196,7 +161193,7 @@ vfredosum.vs v8, v8, v10 vfmv.f.s fa5, v8 sub a1, a1, t1 - add a4, a4, t0 + add a4, a4, s7 bnez a1, .LBB276_11 # %bb.12: # %middle.block107 # in Loop: Header=BB276_6 Depth=1 @@ -161263,19 +161260,19 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi5862) sd a5, 64(sp) # 8-byte Folded Spill - mv s1, a6 + mv s1, t2 call printf@plt - ld t2, 32(sp) # 8-byte Folded Reload + mv t2, s1 ld t1, 40(sp) # 8-byte Folded Reload + ld a7, 32(sp) # 8-byte Folded Reload + ld s1, 56(sp) # 8-byte Folded Reload + ld a6, 48(sp) # 8-byte Folded Reload + ld a5, 64(sp) # 8-byte Folded Reload csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 96 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld t0, 48(sp) # 8-byte Folded Reload - mv a6, s1 - ld s1, 56(sp) # 8-byte Folded Reload - ld a5, 64(sp) # 8-byte Folded Reload j .LBB276_5 .LBB276_19: # %for.body.lr.ph.split li s0, 0 @@ -161669,7 +161666,7 @@ sub a0, a0, a0 add a0, s1, a0 sub a0, a0, a2 - addi s7, a0, -9 + addi a7, a0, -9 addi t0, s2, 72 csrr a0, vlenb slli t1, a0, 1 @@ -161685,17 +161682,17 @@ fld fs2, %pcrel_lo(.Lpcrel_hi5890)(a3) vsetvli a3, zero, e64, m2, ta, ma vlse64.v v12, (a2), zero - srli t2, a0, 2 + srli s7, a0, 2 fmv.d.x fs3, zero .Lpcrel_hi5891: auipc t3, %pcrel_hi(init_value) - sd t0, 56(sp) # 8-byte Folded Spill - sd s1, 48(sp) # 8-byte Folded Spill slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 96 vs2r.v v12, (a0) # Unknown-size Folded Spill - sd t2, 40(sp) # 8-byte Folded Spill + sd a7, 56(sp) # 8-byte Folded Spill + sd s1, 48(sp) # 8-byte Folded Spill + sd t0, 40(sp) # 8-byte Folded Spill sd t3, 32(sp) # 8-byte Folded Spill j .LBB277_6 .LBB277_5: # %_Z9check_sumIdEvT_.exit.us @@ -161808,11 +161805,11 @@ bge a0, s1, .LBB277_15 # %bb.9: # %loop_start.us.preheader # in Loop: Header=BB277_6 Depth=1 - bltu s7, t2, .LBB277_13 + bltu a7, s7, .LBB277_13 # %bb.10: # %vector.ph101 # in Loop: Header=BB277_6 Depth=1 - neg a0, t2 - and a0, s7, a0 + neg a0, s7 + and a0, a7, a0 add a4, a4, a0 vsetvli a2, zero, e64, m2, ta, ma mv a2, a0 @@ -161829,12 +161826,12 @@ vfmv.s.f v10, fa5 vfredosum.vs v8, v8, v10 vfmv.f.s fa5, v8 - sub a2, a2, t2 + sub a2, a2, s7 add a5, a5, t1 bnez a2, .LBB277_11 # %bb.12: # %middle.block99 # in Loop: Header=BB277_6 Depth=1 - beq s7, a0, .LBB277_15 + beq a7, a0, .LBB277_15 .LBB277_13: # %loop_start.us.preheader112 # in Loop: Header=BB277_6 Depth=1 slli a0, a4, 3 @@ -161900,16 +161897,16 @@ mv s1, t1 call printf@plt ld t3, 32(sp) # 8-byte Folded Reload - ld t2, 40(sp) # 8-byte Folded Reload + mv t1, s1 + ld s1, 48(sp) # 8-byte Folded Reload + ld t0, 40(sp) # 8-byte Folded Reload + ld a7, 56(sp) # 8-byte Folded Reload + ld a6, 64(sp) # 8-byte Folded Reload csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 96 vl2r.v v12, (a0) # Unknown-size Folded Reload - mv t1, s1 - ld s1, 48(sp) # 8-byte Folded Reload - ld t0, 56(sp) # 8-byte Folded Reload - ld a6, 64(sp) # 8-byte Folded Reload ld a0, 72(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi5885)(a0) j .LBB277_5 @@ -162902,8 +162899,8 @@ slli a2, a0, 3 add a0, s1, a0 sub a0, a0, a2 - addi s7, a0, -7 - addi t0, s2, 56 + addi a6, a0, -7 + addi s4, s2, 56 csrr a0, vlenb .Lpcrel_hi5955: auipc a2, %pcrel_hi(.LCPI279_0) @@ -162917,15 +162914,15 @@ fld fs2, %pcrel_lo(.Lpcrel_hi5957)(a3) vsetvli a3, zero, e64, m2, ta, ma vlse64.v v12, (a2), zero - slli t1, a0, 1 - srli s4, a0, 2 + slli s7, a0, 1 + srli t2, a0, 2 fmv.d.x fs3, zero slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 80 vs2r.v v12, (a0) # Unknown-size Folded Spill - sd t1, 48(sp) # 8-byte Folded Spill - sd t0, 40(sp) # 8-byte Folded Spill + sd a6, 48(sp) # 8-byte Folded Spill + sd t2, 40(sp) # 8-byte Folded Spill j .LBB279_6 .LBB279_5: # %_Z9check_sumIdEvT_.exit.us # in Loop: Header=BB279_6 Depth=1 @@ -162938,7 +162935,7 @@ # Child Loop BB279_14 Depth 2 li a0, 0 li a2, 7 - mv a3, t0 + mv a3, s4 fmv.d fa5, fs3 .LBB279_7: # %loop2_start.us # Parent Loop BB279_6 Depth=1 @@ -163019,11 +163016,11 @@ bge a0, s1, .LBB279_15 # %bb.9: # %loop_start.us.preheader # in Loop: Header=BB279_6 Depth=1 - bltu s7, s4, .LBB279_13 + bltu a6, t2, .LBB279_13 # %bb.10: # %vector.ph95 # in Loop: Header=BB279_6 Depth=1 - neg a0, s4 - and a0, s7, a0 + neg a0, t2 + and a0, a6, a0 add a4, a4, a0 vsetvli a2, zero, e64, m2, ta, ma mv a2, a0 @@ -163040,12 +163037,12 @@ vfmv.s.f v10, fa5 vfredosum.vs v8, v8, v10 vfmv.f.s fa5, v8 - sub a2, a2, s4 - add a5, a5, t1 + sub a2, a2, t2 + add a5, a5, s7 bnez a2, .LBB279_11 # %bb.12: # %middle.block93 # in Loop: Header=BB279_6 Depth=1 - beq s7, a0, .LBB279_15 + beq a6, a0, .LBB279_15 .LBB279_13: # %loop_start.us.preheader106 # in Loop: Header=BB279_6 Depth=1 slli a0, a4, 3 @@ -163110,13 +163107,13 @@ auipc a0, %pcrel_hi(.L.str.19) addi a0, a0, %pcrel_lo(.Lpcrel_hi5963) call printf@plt - ld t1, 48(sp) # 8-byte Folded Reload + ld t2, 40(sp) # 8-byte Folded Reload + ld a6, 48(sp) # 8-byte Folded Reload csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 80 vl2r.v v12, (a0) # Unknown-size Folded Reload - ld t0, 40(sp) # 8-byte Folded Reload ld a0, 56(sp) # 8-byte Folded Reload lw a1, %pcrel_lo(.Lpcrel_hi5952)(a0) j .LBB279_5 --- build.head//MicroBenchmarks/LCALS/SubsetALambdaLoops/CMakeFiles/lcalsALambda.dir/LambdaSubsetAbenchmarks.s 2023-11-13 08:03:22.107565917 +0000 +++ build//MicroBenchmarks/LCALS/SubsetALambdaLoops/CMakeFiles/lcalsALambda.dir/LambdaSubsetAbenchmarks.s 2023-11-13 08:03:17.171708594 +0000 @@ -587,17 +587,15 @@ # %bb.18: # %call.sqrt # in Loop: Header=BB1_15 Depth=2 fmv.d fa0, fa5 + addi a0, sp, 240 + vs2r.v v18, (a0) # Unknown-size Folded Spill sd t3, 72(sp) # 8-byte Folded Spill mv s11, t4 sd t5, 64(sp) # 8-byte Folded Spill sd t6, 40(sp) # 8-byte Folded Spill sd ra, 56(sp) # 8-byte Folded Spill sd t2, 48(sp) # 8-byte Folded Spill - addi a0, sp, 240 - vs2r.v v18, (a0) # Unknown-size Folded Spill call sqrt@plt - addi a0, sp, 240 - vl2r.v v18, (a0) # Unknown-size Folded Reload ld t0, 128(sp) # 8-byte Folded Reload ld t1, 160(sp) # 8-byte Folded Reload ld t2, 48(sp) # 8-byte Folded Reload @@ -607,6 +605,8 @@ mv t4, s11 ld s11, 152(sp) # 8-byte Folded Reload ld t3, 72(sp) # 8-byte Folded Reload + addi a0, sp, 240 + vl2r.v v18, (a0) # Unknown-size Folded Reload j .LBB1_13 .LBB1_19: # %"_Z6forallI9simd_execZL21BM_ENERGY_CALC_LAMBDARN9benchmark5StateEE3$_1EviiT0_.exit" # in Loop: Header=BB1_3 Depth=1 @@ -1009,19 +1009,17 @@ .LBB1_61: # %call.sqrt449 # in Loop: Header=BB1_50 Depth=2 fmv.d fa0, fa5 + addi a0, sp, 240 + vs2r.v v18, (a0) # Unknown-size Folded Spill sd t3, 72(sp) # 8-byte Folded Spill sd t4, 32(sp) # 8-byte Folded Spill sd t5, 64(sp) # 8-byte Folded Spill sd t6, 40(sp) # 8-byte Folded Spill sd ra, 56(sp) # 8-byte Folded Spill sd t2, 48(sp) # 8-byte Folded Spill - addi a0, sp, 240 - vs2r.v v18, (a0) # Unknown-size Folded Spill sd a4, 24(sp) # 8-byte Folded Spill call sqrt@plt ld a4, 24(sp) # 8-byte Folded Reload - addi a0, sp, 240 - vl2r.v v18, (a0) # Unknown-size Folded Reload ld t0, 128(sp) # 8-byte Folded Reload ld t1, 160(sp) # 8-byte Folded Reload ld t2, 48(sp) # 8-byte Folded Reload @@ -1030,6 +1028,8 @@ ld t5, 64(sp) # 8-byte Folded Reload ld t4, 32(sp) # 8-byte Folded Reload ld t3, 72(sp) # 8-byte Folded Reload + addi a0, sp, 240 + vl2r.v v18, (a0) # Unknown-size Folded Reload j .LBB1_54 .LBB1_62: # %"_Z6forallI9simd_execZL21BM_ENERGY_CALC_LAMBDARN9benchmark5StateEE3$_4EviiT0_.exit" # in Loop: Header=BB1_3 Depth=1 @@ -1096,17 +1096,15 @@ # %bb.68: # %call.sqrt450 # in Loop: Header=BB1_65 Depth=2 fmv.d fa0, fa5 + addi a0, sp, 240 + vs2r.v v18, (a0) # Unknown-size Folded Spill sd t3, 72(sp) # 8-byte Folded Spill mv s11, t4 sd t5, 64(sp) # 8-byte Folded Spill mv s10, t6 sd ra, 56(sp) # 8-byte Folded Spill sd t2, 48(sp) # 8-byte Folded Spill - addi a0, sp, 240 - vs2r.v v18, (a0) # Unknown-size Folded Spill call sqrt@plt - addi a0, sp, 240 - vl2r.v v18, (a0) # Unknown-size Folded Reload ld t0, 128(sp) # 8-byte Folded Reload ld t1, 160(sp) # 8-byte Folded Reload ld t2, 48(sp) # 8-byte Folded Reload @@ -1116,6 +1114,8 @@ mv t4, s11 ld s11, 152(sp) # 8-byte Folded Reload ld t3, 72(sp) # 8-byte Folded Reload + addi a0, sp, 240 + vl2r.v v18, (a0) # Unknown-size Folded Reload j .LBB1_70 .LBB1_69: # in Loop: Header=BB1_65 Depth=2 .Lpcrel_hi14: @@ -1225,21 +1225,20 @@ li a0, 5 call _Z8loopInitj@plt ld a0, 8(s1) - sd a0, 128(sp) # 8-byte Folded Spill + sd a0, 224(sp) # 8-byte Folded Spill ld a0, 32(s3) ld a1, 16(s1) - sd a1, 224(sp) # 8-byte Folded Spill - ld a1, 24(s1) - sd a1, 120(sp) # 8-byte Folded Spill - ld a1, 32(s1) sd a1, 216(sp) # 8-byte Folded Spill + ld a1, 24(s1) + sd a1, 128(sp) # 8-byte Folded Spill + ld s8, 32(s1) lw a1, 0(a0) addi a0, sp, 232 li a2, 3 call _ZN7ADomainC2Eii - lw s1, 268(sp) + lw s2, 268(sp) lw s0, 272(sp) - lbu s2, 26(s3) + lbu s1, 26(s3) ld s5, 16(s3) .Ltmp0: sd s3, 64(sp) # 8-byte Folded Spill @@ -1247,15 +1246,14 @@ call _ZN9benchmark5State16StartKeepRunningEv@plt .Ltmp1: # %bb.1: # %for.cond.preheader - snez a0, s2 + snez a0, s1 seqz a1, s5 or a0, a0, a1 - ld a7, 128(sp) # 8-byte Folded Reload bnez a0, .LBB2_3 # %bb.2: # %for.body.lr.ph - lw s11, 296(sp) + lw s7, 296(sp) lw a1, 300(sp) - bge a1, s11, .LBB2_7 + bge a1, s7, .LBB2_7 .LBB2_3: # %if.end.i .Ltmp2: ld a0, 64(sp) # 8-byte Folded Reload @@ -1292,174 +1290,174 @@ addi sp, sp, 464 ret .LBB2_7: # %for.body.preheader - addi a0, a7, 8 + ld s4, 224(sp) # 8-byte Folded Reload + addi a0, s4, 8 sd a0, 192(sp) # 8-byte Folded Spill - slli a2, s1, 3 - add a0, a7, a2 + slli a2, s2, 3 + add a0, s4, a2 sd a0, 112(sp) # 8-byte Folded Spill slli a0, s0, 3 - addiw a5, a1, 1 - slli s7, s11, 3 - slli t6, a5, 3 - ld s3, 216(sp) # 8-byte Folded Reload - add a4, s3, t6 - add a6, a0, s7 - add t1, a6, a2 - add a1, a7, t1 + addiw s3, a1, 1 + slli t1, s7, 3 + slli a5, s3, 3 + add a4, s8, a5 + add t6, a0, t1 + add t2, t6, a2 + add a1, s4, t2 sd a1, 40(sp) # 8-byte Folded Spill - add s1, s1, a5 - add a1, s1, s0 + add s2, s2, s3 + add a1, s2, s0 slli a1, a1, 3 addi t3, a1, 8 - add a1, a7, t3 - add s8, a7, a6 - add s0, s0, a5 + add a3, s4, t3 + add s6, s4, t6 + add s0, s0, s3 slli s0, s0, 3 - addi s0, s0, 8 - add t2, a7, s0 - addi t6, t6, 8 - add t4, a7, t6 - add a3, a2, s7 - mv s2, a7 - add ra, a7, a3 - slli s1, s1, 3 - addi s1, s1, 8 - add t5, a7, s1 - ld s4, 224(sp) # 8-byte Folded Reload - add a7, s4, t1 - add t0, s4, t3 - add s6, s4, a6 - sd s6, 24(sp) # 8-byte Folded Spill - add s6, s4, s0 - add s9, s4, t6 - add s10, s4, a3 - sd s10, 56(sp) # 8-byte Folded Spill - add s10, s4, s1 - sd s10, 32(sp) # 8-byte Folded Spill - ld s10, 120(sp) # 8-byte Folded Reload - add t1, s10, t1 - sd t1, 72(sp) # 8-byte Folded Spill - add t3, s10, t3 + addi t4, s0, 8 + add a1, s4, t4 + addi a7, a5, 8 + add s1, s4, a7 + add t5, a2, t1 + add s9, s4, t5 + slli s2, s2, 3 + addi s11, s2, 8 + add t0, s4, s11 + ld a6, 216(sp) # 8-byte Folded Reload + add ra, a6, t2 + add s0, a6, t3 + add a5, a6, t6 + sd a5, 24(sp) # 8-byte Folded Spill + add s10, a6, t4 + add s2, a6, a7 + add a5, a6, t5 + sd a5, 56(sp) # 8-byte Folded Spill + add a5, a6, s11 + sd a5, 32(sp) # 8-byte Folded Spill + ld a5, 128(sp) # 8-byte Folded Reload + add t2, a5, t2 + sd t2, 72(sp) # 8-byte Folded Spill + add t3, a5, t3 sd t3, 48(sp) # 8-byte Folded Spill - add a6, s10, a6 - sd a6, 160(sp) # 8-byte Folded Spill - add s0, s10, s0 - sd s0, 88(sp) # 8-byte Folded Spill - add t6, s10, t6 - sd t6, 152(sp) # 8-byte Folded Spill - add a3, s10, a3 - sd a3, 144(sp) # 8-byte Folded Spill - add s1, s10, s1 - sd s1, 80(sp) # 8-byte Folded Spill - add a3, s4, a2 - sd a3, 104(sp) # 8-byte Folded Spill - addi a3, a3, 8 - sd a3, 184(sp) # 8-byte Folded Spill - addi a3, s10, 8 - add a6, s10, a2 - sd a6, 208(sp) # 8-byte Folded Spill - sd a3, 168(sp) # 8-byte Folded Spill - add a3, a3, a2 - sd a3, 136(sp) # 8-byte Folded Spill - add t3, s3, s7 - add s1, s2, s7 - add s0, s4, s7 - add a6, s10, s7 - csrr a3, vlenb - sd a3, 96(sp) # 8-byte Folded Spill - srli t1, a3, 2 - li s2, 4 - sd a5, 176(sp) # 8-byte Folded Spill - sub a3, a5, s11 - sd a3, 200(sp) # 8-byte Folded Spill - mv t6, t1 - bltu s2, t1, .LBB2_9 -# %bb.8: # %for.body.preheader + add t6, a5, t6 + sd t6, 160(sp) # 8-byte Folded Spill + add t4, a5, t4 + sd t4, 88(sp) # 8-byte Folded Spill + add a7, a5, a7 + sd a7, 152(sp) # 8-byte Folded Spill + add t5, a5, t5 + sd t5, 144(sp) # 8-byte Folded Spill + add s11, a5, s11 + sd s11, 80(sp) # 8-byte Folded Spill + add a7, a6, a2 + sd a7, 104(sp) # 8-byte Folded Spill + addi a7, a7, 8 + sd a7, 184(sp) # 8-byte Folded Spill + addi a7, a5, 8 + add t2, a5, a2 + sd t2, 208(sp) # 8-byte Folded Spill + sd a7, 168(sp) # 8-byte Folded Spill + add a7, a7, a2 + sd a7, 136(sp) # 8-byte Folded Spill + sd s8, 120(sp) # 8-byte Folded Spill + add t2, s8, t1 + add t4, s4, t1 + add t3, a6, t1 + add a5, a5, t1 + csrr a6, vlenb + sd a6, 96(sp) # 8-byte Folded Spill + srli s11, a6, 2 li t6, 4 + sd s3, 176(sp) # 8-byte Folded Spill + sub a6, s3, s7 + sd a6, 200(sp) # 8-byte Folded Spill + mv t5, s11 + bltu t6, s11, .LBB2_9 +# %bb.8: # %for.body.preheader + li t5, 4 .LBB2_9: # %for.body.preheader - sltu a1, t3, a1 - ld a3, 40(sp) # 8-byte Folded Reload - sltu s2, a3, a4 - and a1, a1, s2 - sltu t2, t3, t2 - sltu s2, s8, a4 - and t2, t2, s2 - sltu t4, t3, t4 - sltu s1, s1, a4 - and t4, t4, s1 - or t2, t2, t4 - or a1, a1, t2 - sltu t2, t3, t5 - sltu t4, ra, a4 - and t2, t2, t4 - sltu t0, t3, t0 - sltu a7, a7, a4 - and a7, t0, a7 - or a7, t2, a7 + sltu a3, t2, a3 + ld a6, 40(sp) # 8-byte Folded Reload + sltu t6, a6, a4 + and a3, a3, t6 + sltu a1, t2, a1 + sltu t6, s6, a4 + and a1, a1, t6 + sltu a7, t2, s1 + sltu t4, t4, a4 + and a7, a7, t4 or a1, a1, a7 - sltu a5, t3, s6 - ld a3, 24(sp) # 8-byte Folded Reload - sltu a7, a3, a4 - and a5, a5, a7 - sltu a7, t3, s9 - sltu t0, s0, a4 - and a7, a7, t0 - or a5, a5, a7 - ld a3, 32(sp) # 8-byte Folded Reload - sltu a7, t3, a3 - ld a3, 56(sp) # 8-byte Folded Reload - sltu t0, a3, a4 - and a7, a7, t0 - or a5, a5, a7 - ld a3, 48(sp) # 8-byte Folded Reload - sltu a7, t3, a3 - ld a3, 72(sp) # 8-byte Folded Reload - sltu t0, a3, a4 - and a7, a7, t0 - or a5, a5, a7 - or a1, a1, a5 + or a1, a3, a1 + sltu a3, t2, t0 + sltu a7, s9, a4 + and a3, a3, a7 + sltu a6, t2, s0 + sltu a7, ra, a4 + and a6, a6, a7 + or a3, a3, a6 + or a1, a1, a3 + sltu a3, t2, s10 + ld a6, 24(sp) # 8-byte Folded Reload + sltu a6, a6, a4 + and a3, a3, a6 + sltu a6, t2, s2 + sltu a7, t3, a4 + and a6, a6, a7 + or a3, a3, a6 + ld a6, 32(sp) # 8-byte Folded Reload + sltu a6, t2, a6 + ld a7, 56(sp) # 8-byte Folded Reload + sltu a7, a7, a4 + and a6, a6, a7 + or a3, a3, a6 + ld a6, 48(sp) # 8-byte Folded Reload + sltu a6, t2, a6 + ld a7, 72(sp) # 8-byte Folded Reload + sltu a7, a7, a4 + and a6, a6, a7 + or a3, a3, a6 + or a1, a1, a3 ld a3, 88(sp) # 8-byte Folded Reload - sltu a5, t3, a3 - ld a3, 160(sp) # 8-byte Folded Reload - sltu a7, a3, a4 - and a5, a5, a7 - ld a3, 152(sp) # 8-byte Folded Reload - sltu a7, t3, a3 + sltu a3, t2, a3 + ld a6, 160(sp) # 8-byte Folded Reload sltu a6, a6, a4 - and a6, a7, a6 - ld a7, 192(sp) # 8-byte Folded Reload - add a2, a7, a2 + and a3, a3, a6 + ld a6, 152(sp) # 8-byte Folded Reload + sltu a6, t2, a6 + sltu a5, a5, a4 + and a5, a6, a5 + ld a6, 192(sp) # 8-byte Folded Reload + add a2, a6, a2 sd a2, 160(sp) # 8-byte Folded Spill - or a2, a5, a6 - ld ra, 128(sp) # 8-byte Folded Reload - add a3, ra, a0 - sd a3, 88(sp) # 8-byte Folded Spill - add a3, a7, a0 - sd a3, 152(sp) # 8-byte Folded Spill - ld a3, 80(sp) # 8-byte Folded Reload - sltu a5, t3, a3 - ld s10, 112(sp) # 8-byte Folded Reload - add s10, s10, a0 - ld a3, 144(sp) # 8-byte Folded Reload - sltu a4, a3, a4 - ld s3, 224(sp) # 8-byte Folded Reload + or a3, a3, a5 + ld a2, 224(sp) # 8-byte Folded Reload + add a2, a2, a0 + sd a2, 88(sp) # 8-byte Folded Spill + add a2, a6, a0 + sd a2, 152(sp) # 8-byte Folded Spill + ld a2, 80(sp) # 8-byte Folded Reload + sltu a2, t2, a2 + ld a6, 112(sp) # 8-byte Folded Reload + add a6, a6, a0 + ld a5, 144(sp) # 8-byte Folded Reload + sltu a4, a5, a4 + ld s3, 216(sp) # 8-byte Folded Reload add s3, s3, a0 - and a4, a5, a4 - ld a3, 104(sp) # 8-byte Folded Reload - add a3, a3, a0 - sd a3, 80(sp) # 8-byte Folded Spill - or a2, a2, a4 + and a2, a2, a4 + ld a4, 104(sp) # 8-byte Folded Reload + add a4, a4, a0 + sd a4, 80(sp) # 8-byte Folded Spill + or a2, a3, a2 ld a3, 184(sp) # 8-byte Folded Reload add a3, a3, a0 sd a3, 144(sp) # 8-byte Folded Spill ld a3, 200(sp) # 8-byte Folded Reload - sltu a4, a3, t6 - or a2, a4, a2 + sltu a3, a3, t5 + or a2, a3, a2 .Lpcrel_hi15: - auipc a4, %pcrel_hi(.LCPI2_0) - fld fa5, %pcrel_lo(.Lpcrel_hi15)(a4) - ld s0, 120(sp) # 8-byte Folded Reload - add s0, s0, a0 + auipc a3, %pcrel_hi(.LCPI2_0) + fld fa5, %pcrel_lo(.Lpcrel_hi15)(a3) + ld t0, 128(sp) # 8-byte Folded Reload + add t0, t0, a0 ld a3, 136(sp) # 8-byte Folded Reload add a3, a3, a0 sd a3, 136(sp) # 8-byte Folded Spill @@ -1467,10 +1465,11 @@ add a0, a3, a0 sd a0, 72(sp) # 8-byte Folded Spill or a1, a2, a1 - ld s9, 96(sp) # 8-byte Folded Reload - slli s9, s9, 1 + ld ra, 96(sp) # 8-byte Folded Reload + slli ra, ra, 1 andi a1, a1, 1 sd a1, 192(sp) # 8-byte Folded Spill + ld s10, 120(sp) # 8-byte Folded Reload j .LBB2_11 .LBB2_10: # %invoke.cont68.loopexit # in Loop: Header=BB2_11 Depth=1 @@ -1480,7 +1479,7 @@ # =>This Loop Header: Depth=1 # Child Loop BB2_13 Depth 2 # Child Loop BB2_16 Depth 2 - mv a0, s11 + mv a0, s7 ld a1, 192(sp) # 8-byte Folded Reload bnez a1, .LBB2_15 # %bb.12: # %vector.ph @@ -1490,81 +1489,82 @@ neg a0, a0 ld a1, 200(sp) # 8-byte Folded Reload and t2, a1, a0 - add a0, t2, s11 + add a0, t2, s7 vsetvli a1, zero, e64, m2, ta, ma - ld s1, 216(sp) # 8-byte Folded Reload - mv t0, s0 + mv s1, s10 + mv s9, t0 ld a7, 208(sp) # 8-byte Folded Reload - ld a4, 120(sp) # 8-byte Folded Reload + ld s10, 128(sp) # 8-byte Folded Reload ld t4, 72(sp) # 8-byte Folded Reload mv s6, s3 ld a2, 104(sp) # 8-byte Folded Reload - ld s8, 224(sp) # 8-byte Folded Reload + ld s8, 216(sp) # 8-byte Folded Reload ld t3, 80(sp) # 8-byte Folded Reload ld t5, 88(sp) # 8-byte Folded Reload ld a5, 112(sp) # 8-byte Folded Reload - mv a6, s10 + ld s0, 224(sp) # 8-byte Folded Reload + mv t6, a6 mv a1, t2 .LBB2_13: # %vector.body # Parent Loop BB2_11 Depth=1 # => This Inner Loop Header: Depth=2 - add t6, a6, s7 - addi a3, t6, 8 - vl2re64.v v4, (a3) - add s2, ra, s7 - addi a3, s2, 8 - vl2re64.v v24, (a3) - add a3, a5, s7 - vl2re64.v v10, (a3) - addi a3, a3, 8 - vl2re64.v v16, (a3) + add a3, t6, t1 + addi a4, a3, 8 + vl2re64.v v4, (a4) + add s2, s0, t1 + addi a4, s2, 8 + vl2re64.v v24, (a4) + add a4, a5, t1 + vl2re64.v v10, (a4) + addi a4, a4, 8 + vl2re64.v v16, (a4) vl2re64.v v12, (s2) sd a0, 8(sp) csrr a0, vlenb - li a3, 14 - mul a0, a0, a3 + li a4, 14 + mul a0, a0, a4 add a0, sp, a0 addi a0, a0, 320 vs2r.v v12, (a0) # Unknown-size Folded Spill - add a3, t3, s7 - addi s2, a3, 8 + add a4, t3, t1 + addi s2, a4, 8 vl2re64.v v2, (s2) - add s4, s8, s7 + add s4, s8, t1 addi s2, s4, 8 vl2re64.v v18, (s2) vfsub.vv v14, v4, v10 vfsub.vv v26, v16, v12 - vl2re64.v v10, (t6) + vl2re64.v v10, (a3) csrr a0, vlenb - li t6, 18 - mul a0, a0, t6 + li a3, 18 + mul a0, a0, a3 add a0, sp, a0 addi a0, a0, 320 vs2r.v v10, (a0) # Unknown-size Folded Spill vfsub.vv v12, v2, v18 csrr a0, vlenb - li t6, 22 - mul a0, a0, t6 + li a3, 22 + mul a0, a0, a3 add a0, sp, a0 addi a0, a0, 320 vs2r.v v12, (a0) # Unknown-size Folded Spill vl2re64.v v20, (s4) - vl2re64.v v10, (a3) - add a3, t4, s7 - addi t6, a3, 8 - vl2re64.v v28, (t6) + vl2re64.v v10, (a4) + add a3, t4, t1 + addi a4, a3, 8 + vl2re64.v v28, (a4) csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 320 vs2r.v v28, (a0) # Unknown-size Folded Spill - add t6, a4, s7 - add s2, a7, s7 + add a4, s10, t1 + add s2, a7, t1 vl2re64.v v16, (s2) addi s2, s2, 8 vl2re64.v v18, (s2) - vl2re64.v v0, (t6) - add s2, a2, s7 + vl2re64.v v0, (a4) + add s2, a2, t1 vfsub.vv v10, v10, v20 csrr a0, vlenb li s4, 10 @@ -1637,7 +1637,7 @@ vfsub.vv v30, v10, v26 vfsub.vv v24, v2, v18 vfsub.vv v10, v6, v20 - addi t6, t6, 8 + addi a4, a4, 8 vfneg.v v6, v14 vfmul.vv v6, v10, v6 csrr s2, vlenb @@ -1647,16 +1647,16 @@ addi s2, s2, 320 vs2r.v v10, (s2) # Unknown-size Folded Spill vfmacc.vv v6, v24, v22 - vl2re64.v v18, (t6) + vl2re64.v v18, (a4) vl2re64.v v22, (a3) vfadd.vv v14, v8, v30 vfmacc.vv v28, v14, v6 - add a3, t5, s7 - csrr t6, vlenb - slli t6, t6, 2 - add t6, sp, t6 - addi t6, t6, 320 - vl2r.v v20, (t6) # Unknown-size Folded Reload + add a3, t5, t1 + csrr a4, vlenb + slli a4, a4, 2 + add a4, sp, a4 + addi a4, a4, 320 + vl2r.v v20, (a4) # Unknown-size Folded Reload vfsub.vv v6, v20, v18 vfsub.vv v18, v22, v0 vfneg.v v8, v24 @@ -1667,11 +1667,11 @@ vfmacc.vv v28, v16, v8 vfsub.vv v22, v4, v14 addi a3, a3, 8 - add t6, s6, s7 - addi s2, t6, 8 - add s4, t0, s7 + add a4, s6, t1 + addi s2, a4, 8 + add s4, s9, t1 vl2re64.v v8, (a3) - vl2re64.v v16, (t6) + vl2re64.v v16, (a4) vl2re64.v v12, (s2) vl2re64.v v14, (s4) vfsub.vv v8, v8, v26 @@ -1682,8 +1682,8 @@ vfsub.vv v4, v20, v14 vfneg.v v12, v4 csrr a3, vlenb - li t6, 10 - mul a3, a3, t6 + li a4, 10 + mul a3, a3, a4 add a3, sp, a3 addi a3, a3, 320 vl2r.v v26, (a3) # Unknown-size Folded Reload @@ -1704,8 +1704,8 @@ vfadd.vv v10, v10, v8 vfmacc.vv v18, v10, v12 csrr a3, vlenb - li t6, 6 - mul a3, a3, t6 + li a4, 6 + mul a3, a3, a4 add a3, sp, a3 addi a3, a3, 320 vl2r.v v10, (a3) # Unknown-size Folded Reload @@ -1723,8 +1723,8 @@ vfneg.v v12, v6 vfmul.vv v12, v0, v12 csrr a3, vlenb - li t6, 22 - mul a3, a3, t6 + li a4, 22 + mul a3, a3, a4 add a3, sp, a3 addi a3, a3, 320 vl2r.v v16, (a3) # Unknown-size Folded Reload @@ -1741,15 +1741,15 @@ vfmul.vv v8, v8, v14 vfmacc.vv v8, v26, v0 csrr a3, vlenb - li t6, 12 - mul a3, a3, t6 + li a4, 12 + mul a3, a3, a4 add a3, sp, a3 addi a3, a3, 320 vl2r.v v14, (a3) # Unknown-size Folded Reload vfadd.vv v14, v22, v14 csrr a3, vlenb - li t6, 18 - mul a3, a3, t6 + li a4, 18 + mul a3, a3, a4 add a3, sp, a3 addi a3, a3, 320 vl2r.v v16, (a3) # Unknown-size Folded Reload @@ -1757,8 +1757,8 @@ vfmul.vv v10, v16, v10 vfmacc.vv v10, v14, v12 csrr a3, vlenb - li t6, 20 - mul a3, a3, t6 + li a4, 20 + mul a3, a3, a4 add a3, sp, a3 addi a3, a3, 320 vl2r.v v12, (a3) # Unknown-size Folded Reload @@ -1766,27 +1766,27 @@ vfmacc.vv v10, v12, v8 vfadd.vv v8, v28, v18 vfadd.vv v8, v10, v8 - add a3, s1, s7 + add a3, s1, t1 vfmul.vf v8, v8, fa5 vs2r.v v8, (a3) - sub a1, a1, t1 - add a6, a6, s9 - add ra, ra, s9 - add a5, a5, s9 - add t5, t5, s9 - add t3, t3, s9 - add s8, s8, s9 - add a2, a2, s9 - add s6, s6, s9 - add t4, t4, s9 - add a4, a4, s9 - add a7, a7, s9 - add t0, t0, s9 - add s1, s1, s9 + sub a1, a1, s11 + add t6, t6, ra + add s0, s0, ra + add a5, a5, ra + add t5, t5, ra + add t3, t3, ra + add s8, s8, ra + add a2, a2, ra + add s6, s6, ra + add t4, t4, ra + add s10, s10, ra + add a7, a7, ra + add s9, s9, ra + add s1, s1, ra bnez a1, .LBB2_13 # %bb.14: # %middle.block # in Loop: Header=BB2_11 Depth=1 - ld ra, 128(sp) # 8-byte Folded Reload + ld s10, 120(sp) # 8-byte Folded Reload ld a1, 200(sp) # 8-byte Folded Reload beq a1, t2, .LBB2_10 .LBB2_15: # %for.body.i.i.preheader @@ -1795,34 +1795,34 @@ sub a1, a1, a0 slli a0, a0, 3 ld a2, 184(sp) # 8-byte Folded Reload - ld a4, 224(sp) # 8-byte Folded Reload + ld a4, 216(sp) # 8-byte Folded Reload mv a5, s3 ld a7, 144(sp) # 8-byte Folded Reload ld t2, 136(sp) # 8-byte Folded Reload ld t3, 168(sp) # 8-byte Folded Reload ld t4, 208(sp) # 8-byte Folded Reload - mv t5, s0 - mv t6, s10 + mv t5, t0 + mv t6, a6 ld s1, 152(sp) # 8-byte Folded Reload - mv s2, ra + ld s2, 224(sp) # 8-byte Folded Reload ld s6, 160(sp) # 8-byte Folded Reload - ld s8, 216(sp) # 8-byte Folded Reload + mv s8, s10 .LBB2_16: # %for.body.i.i # Parent Loop BB2_11 Depth=1 # => This Inner Loop Header: Depth=2 add a3, t6, a0 fld fa3, 8(a3) - add a6, s2, a0 - fld fa4, 8(a6) - add t0, s6, a0 - fld fa2, -8(t0) + add s0, s2, a0 + fld fa4, 8(s0) + add s4, s6, a0 + fld fa2, -8(s4) fsub.d fa4, fa3, fa4 fsub.d fa0, fa3, fa2 - add s4, s1, a0 - fld fa2, -8(s4) - fld fa1, 0(t0) - fld ft0, 0(a6) - fld ft1, 0(s4) + add s9, s1, a0 + fld fa2, -8(s9) + fld fa1, 0(s4) + fld ft0, 0(s0) + fld ft1, 0(s9) fld ft2, 0(a3) fsub.d fa2, fa3, fa2 fsub.d fa1, fa1, ft0 @@ -1830,35 +1830,35 @@ fsub.d ft1, ft2, ft0 add a3, a7, a0 fld ft2, 0(a3) - add a6, a4, a0 - fld ft0, 8(a6) - add t0, a2, a0 - fld ft3, -8(t0) - add s4, a5, a0 - fld ft4, 0(s4) - fld ft5, 0(t0) - fld ft6, 0(a6) + add s0, a4, a0 + fld ft0, 8(s0) + add s4, a2, a0 + fld ft3, -8(s4) + add s9, a5, a0 + fld ft4, 0(s9) + fld ft5, 0(s4) + fld ft6, 0(s0) fsub.d ft0, ft2, ft0 fsub.d ft3, ft2, ft3 fsub.d ft2, ft2, ft4 fsub.d ft4, ft5, ft6 - fld ft5, 8(s4) + fld ft5, 8(s9) fld ft7, -8(a3) add a3, t2, a0 fld fa6, 0(a3) - add a6, t3, a0 - fld fa7, 0(a6) - add t0, t4, a0 - fld ft8, 0(t0) + add s0, t3, a0 + fld fa7, 0(s0) + add s4, t4, a0 + fld ft8, 0(s4) fsub.d ft5, ft5, ft6 fsub.d ft6, ft7, ft6 fsub.d ft7, fa6, fa7 fsub.d fa7, fa6, ft8 - add s4, t5, a0 - fld ft8, 0(s4) - fld ft9, 8(t0) - fld ft10, -8(a6) - fld ft11, 8(s4) + add s9, t5, a0 + fld ft8, 0(s9) + fld ft9, 8(s4) + fld ft10, -8(s0) + fld ft11, 8(s9) fld fs0, -8(a3) fsub.d fa6, fa6, ft8 fsub.d ft8, ft9, ft10 --- build.head//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/Archive/Zip/ZipUpdate.s 2023-11-13 08:03:21.227591353 +0000 +++ build//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/Archive/Zip/ZipUpdate.s 2023-11-13 08:03:16.259734956 +0000 @@ -2611,12 +2611,12 @@ li s3, 0 li s8, 0 addi s0, sp, 400 - addi s1, sp, 440 + addi s9, sp, 440 li a0, 1 slli a0, a0, 34 sd a0, 128(sp) # 8-byte Folded Spill - ld s9, 96(sp) # 8-byte Folded Reload - addi s9, s9, 16 + ld s1, 96(sp) # 8-byte Folded Reload + addi s1, s1, 16 ld s4, 104(sp) # 8-byte Folded Reload addi s4, s4, 16 lui a0, 524292 @@ -2659,15 +2659,15 @@ vse64.v v8, (a0) li a0, 8 sd a0, 352(sp) - sd s9, 328(sp) + sd s1, 328(sp) addi a1, sp, 408 vse64.v v8, (a1) sd a0, 424(sp) - sd s9, 400(sp) + sd s1, 400(sp) sd s4, 432(sp) - sb zero, 18(s1) - sh zero, 16(s1) - vse64.v v8, (s1) + sb zero, 18(s9) + sh zero, 16(s9) + vse64.v v8, (s9) lbu a0, 1(s10) lbu a1, 0(s10) seqz a0, a0 @@ -2963,7 +2963,7 @@ call _ZdaPv@plt .LBB17_145: # %_ZN7CBufferIhED2Ev.exit.i.i.i # in Loop: Header=BB17_98 Depth=1 - sd s9, 400(sp) + sd s1, 400(sp) .Ltmp174: mv s10, s0 mv a0, s0 @@ -2973,7 +2973,7 @@ # in Loop: Header=BB17_98 Depth=1 mv a0, s10 call _ZN17CBaseRecordVectorD2Ev@plt - sd s9, 328(sp) + sd s1, 328(sp) .Ltmp177: addi s10, sp, 328 mv a0, s10 --- build.head//MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_mew.s 2023-11-13 08:03:22.195563373 +0000 +++ build//MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_mew.s 2023-11-13 08:03:17.251706281 +0000 @@ -130,14 +130,14 @@ add t2, t0, a1 li s0, 4 li t3, -1 + addi a1, sp, 240 + vs2r.v v8, (a1) # Unknown-size Folded Spill sd a3, 72(sp) # 8-byte Folded Spill sd s2, 160(sp) # 8-byte Folded Spill sd a7, 64(sp) # 8-byte Folded Spill sd a6, 192(sp) # 8-byte Folded Spill sd t0, 56(sp) # 8-byte Folded Spill sd t1, 48(sp) # 8-byte Folded Spill - addi a1, sp, 240 - vs2r.v v8, (a1) # Unknown-size Folded Spill sd t2, 40(sp) # 8-byte Folded Spill .LBB0_5: # %do.body7.us.us.us.us # =>This Loop Header: Depth=1 @@ -2197,13 +2197,13 @@ .LBB0_240: # %do.end523.us.us # in Loop: Header=BB0_5 Depth=1 mv a0, s6 + addi a1, sp, 240 + vl2r.v v8, (a1) # Unknown-size Folded Reload ld a3, 72(sp) # 8-byte Folded Reload ld s2, 160(sp) # 8-byte Folded Reload ld a7, 64(sp) # 8-byte Folded Reload ld t0, 56(sp) # 8-byte Folded Reload ld t1, 48(sp) # 8-byte Folded Reload - addi a1, sp, 240 - vl2r.v v8, (a1) # Unknown-size Folded Reload ld t2, 40(sp) # 8-byte Folded Reload li t3, -1 bnez a7, .LBB0_249 --- build.head//MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_rtf.s 2023-11-13 08:03:22.203563142 +0000 +++ build//MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_rtf.s 2023-11-13 08:03:17.259706050 +0000 @@ -326,9 +326,9 @@ mv a0, s10 sd zero, 456(sp) vsetivli zero, 2, e64, m1, ta, ma + addi a1, sp, 496 + vl1r.v v8, (a1) # Unknown-size Folded Reload addi a1, sp, 472 - addi a2, sp, 496 - vl1r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a1) .LBB0_34: # %if.end290 # in Loop: Header=BB0_15 Depth=2 --- build.head//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/Archive/7z/7zExtract.s 2023-11-13 08:03:21.203592047 +0000 +++ build//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/Archive/7z/7zExtract.s 2023-11-13 08:03:16.235735649 +0000 @@ -42,9 +42,9 @@ sub sp, sp, a5 .cfi_escape 0x0f, 0x0e, 0x72, 0x00, 0x11, 0x80, 0x04, 0x22, 0x11, 0x02, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 512 + 2 * vlenb mv s0, a4 - mv s3, a3 + mv s4, a3 mv s2, a2 - mv s4, a1 + mv s3, a1 mv s1, a0 beqz a4, .LBB0_2 # %bb.1: # %if.then.i @@ -62,7 +62,7 @@ mv a0, s2 beqz s2, .LBB0_100 .LBB0_4: # %if.end8 - sd s3, 96(sp) # 8-byte Folded Spill + sd s4, 96(sp) # 8-byte Folded Spill li s9, 0 li s6, 0 addi a1, sp, 368 @@ -80,7 +80,7 @@ sd a1, 360(sp) slli a0, a0, 32 srli s11, a0, 32 - li s3, -1 + li s4, -1 .Lpcrel_hi1: auipc a0, %pcrel_hi(_ZTV13CRecordVectorIbE+16) addi s7, a0, %pcrel_lo(.Lpcrel_hi1) @@ -105,11 +105,11 @@ # Child Loop BB0_18 Depth 2 # Child Loop BB0_20 Depth 3 # Child Loop BB0_34 Depth 2 - beq s2, s3, .LBB0_10 + beq s2, s4, .LBB0_10 # %bb.9: # %cond.false # in Loop: Header=BB0_8 Depth=1 slli a0, s9, 2 - add a0, s4, a0 + add a0, s3, a0 lw s10, 0(a0) j .LBB0_11 .LBB0_10: # in Loop: Header=BB0_8 Depth=1 @@ -121,7 +121,7 @@ slli a2, a0, 2 add a1, a1, a2 lw s5, 0(a1) - beq s5, s3, .LBB0_23 + beq s5, s4, .LBB0_23 # %bb.12: # %if.end24 # in Loop: Header=BB0_8 Depth=1 lw a0, 372(sp) @@ -136,7 +136,7 @@ beq s5, a0, .LBB0_32 .LBB0_14: # %invoke.cont33 # in Loop: Header=BB0_8 Depth=1 - sw s3, 128(sp) + sw s4, 128(sp) sw s5, 132(sp) vsetivli zero, 2, e64, m1, ta, ma addi a0, sp, 400 @@ -202,7 +202,7 @@ .LBB0_23: # %if.then18 # in Loop: Header=BB0_8 Depth=1 sw s10, 128(sp) - sw s3, 132(sp) + sw s4, 132(sp) vsetivli zero, 2, e64, m1, ta, ma addi a1, sp, 400 vl1r.v v8, (a1) # Unknown-size Folded Reload @@ -212,7 +212,7 @@ sd a1, 160(sp) sd s7, 136(sp) sd zero, 168(sp) - beq a0, s3, .LBB0_5 + beq a0, s4, .LBB0_5 # %bb.24: # %if.then.i119 # in Loop: Header=BB0_8 Depth=1 .Ltmp12: @@ -390,15 +390,15 @@ # %bb.49: # %invoke.cont135 # in Loop: Header=BB0_45 Depth=1 .Ltmp44: - mv s3, a0 + mv s4, a0 call _ZN8NArchive3N7z16CFolderOutStreamC1Ev@plt .Ltmp45: # %bb.50: # %invoke.cont138 # in Loop: Header=BB0_45 Depth=1 - ld a0, 0(s3) + ld a0, 0(s4) ld a1, 8(a0) .Ltmp47: - mv a0, s3 + mv a0, s4 jalr a1 .Ltmp48: # %bb.51: # %invoke.cont141 @@ -419,7 +419,7 @@ addi a4, s0, 8 snez a7, a0 .Ltmp50: - mv a0, s3 + mv a0, s4 mv a1, s11 li a2, 0 ld a5, 104(sp) # 8-byte Folded Reload @@ -428,11 +428,11 @@ .Ltmp51: # %bb.54: # %invoke.cont160 # in Loop: Header=BB0_45 Depth=1 - mv s4, s6 + mv s3, s6 beqz a0, .LBB0_56 # %bb.55: # %invoke.cont160 # in Loop: Header=BB0_45 Depth=1 - mv s4, a0 + mv s3, a0 .LBB0_56: # %invoke.cont160 # in Loop: Header=BB0_45 Depth=1 beqz a0, .LBB0_58 @@ -540,7 +540,7 @@ addi a4, sp, 119 sd a4, 0(sp) ld a4, 80(sp) # 8-byte Folded Reload - mv a5, s3 + mv a5, s4 mv a6, s2 call _ZN8NArchive3N7z8CDecoder6DecodeEP9IInStreamyPKyRKNS0_7CFolderEP20ISequentialOutStreamP21ICompressProgressInfoP22ICryptoGetTextPasswordRbbj@plt .Ltmp56: @@ -561,14 +561,14 @@ # in Loop: Header=BB0_45 Depth=1 .Ltmp64: li a1, 2 - mv a0, s3 + mv a0, s4 call _ZN8NArchive3N7z16CFolderOutStream14FlushCorruptedEi@plt .Ltmp65: j .LBB0_82 .LBB0_75: # %if.end246 # in Loop: Header=BB0_45 Depth=1 - ld a0, 48(s3) - lw a1, 72(s3) + ld a0, 48(s4) + lw a1, 72(s4) lw a0, 12(a0) bne a1, a0, .LBB0_81 # %bb.76: # in Loop: Header=BB0_45 Depth=1 @@ -578,7 +578,7 @@ # in Loop: Header=BB0_45 Depth=1 .Ltmp61: li a1, 1 - mv a0, s3 + mv a0, s4 call _ZN8NArchive3N7z16CFolderOutStream14FlushCorruptedEi@plt .Ltmp62: j .LBB0_82 @@ -616,7 +616,7 @@ # in Loop: Header=BB0_45 Depth=1 .Ltmp58: li a1, 2 - mv a0, s3 + mv a0, s4 call _ZN8NArchive3N7z16CFolderOutStream14FlushCorruptedEi@plt .Ltmp59: .LBB0_82: # %invoke.cont253 @@ -626,10 +626,10 @@ # %bb.83: # %invoke.cont253 # in Loop: Header=BB0_45 Depth=1 li s0, 1 - mv s4, a0 + mv s3, a0 .LBB0_84: # %invoke.cont253 # in Loop: Header=BB0_45 Depth=1 - mv s6, s4 + mv s6, s3 .LBB0_85: # %cleanup284 # in Loop: Header=BB0_45 Depth=1 ld a0, 120(sp) @@ -646,10 +646,10 @@ ld s11, 72(sp) # 8-byte Folded Reload .LBB0_88: # %if.then.i203 # in Loop: Header=BB0_45 Depth=1 - ld a0, 0(s3) + ld a0, 0(s4) ld a1, 16(a0) .Ltmp94: - mv a0, s3 + mv a0, s4 jalr a1 .Ltmp95: # %bb.89: # %_ZN9CMyComPtrI20ISequentialOutStreamED2Ev.exit @@ -680,7 +680,7 @@ call __cxa_begin_catch@plt .Ltmp67: li a1, 2 - mv a0, s3 + mv a0, s4 call _ZN8NArchive3N7z16CFolderOutStream14FlushCorruptedEi@plt .Ltmp68: # %bb.96: # %invoke.cont271 @@ -690,13 +690,13 @@ # %bb.97: # %invoke.cont271 # in Loop: Header=BB0_45 Depth=1 li s0, 1 - mv s4, a0 + mv s3, a0 .LBB0_98: # %invoke.cont271 # in Loop: Header=BB0_45 Depth=1 .Ltmp73: call __cxa_end_catch@plt .Ltmp74: - mv s6, s4 + mv s6, s3 j .LBB0_85 .LBB0_99: lw a0, 316(s1) @@ -776,7 +776,7 @@ .LBB0_111: # %lpad270 .Ltmp69: mv s1, a1 - mv s4, a0 + mv s3, a0 .Ltmp70: call __cxa_end_catch@plt .Ltmp71: @@ -796,7 +796,7 @@ .LBB0_116: # %lpad102 .Ltmp31: mv s1, a1 - mv s4, a0 + mv s3, a0 mv a0, s2 call _ZdlPv@plt j .LBB0_139 @@ -804,7 +804,7 @@ .Ltmp28: .LBB0_118: # %ehcleanup325 mv s1, a1 - mv s4, a0 + mv s3, a0 j .LBB0_139 .LBB0_119: # %lpad97 .Ltmp25: @@ -815,7 +815,7 @@ .LBB0_121: # %lpad191 .Ltmp75: mv s1, a1 - mv s4, a0 + mv s3, a0 .LBB0_122: # %ehcleanup285 ld a0, 120(sp) beqz a0, .LBB0_130 @@ -835,7 +835,7 @@ .LBB0_126: # %ehcleanup339.thread .Ltmp22: mv s1, a1 - mv s4, a0 + mv s3, a0 addi a0, sp, 360 call _ZN13CObjectVectorIN8NArchive3N7z18CExtractFolderInfoEED2Ev ld a0, 104(sp) # 8-byte Folded Reload @@ -846,17 +846,17 @@ .LBB0_128: # %lpad .Ltmp2: mv s1, a1 - mv s4, a0 + mv s3, a0 j .LBB0_150 .LBB0_129: # %lpad155 .Ltmp52: mv s1, a1 - mv s4, a0 + mv s3, a0 .LBB0_130: # %if.then.i216 - ld a0, 0(s3) + ld a0, 0(s4) ld a1, 16(a0) .Ltmp79: - mv a0, s3 + mv a0, s4 jalr a1 .Ltmp80: j .LBB0_138 @@ -872,8 +872,8 @@ .LBB0_134: # %lpad137 .Ltmp46: mv s1, a1 - mv s4, a0 - mv a0, s3 + mv s3, a0 + mv a0, s4 call _ZdlPv@plt j .LBB0_138 .LBB0_135: # %lpad140 @@ -883,7 +883,7 @@ .Ltmp40: .LBB0_137: # %if.then.i229 mv s1, a1 - mv s4, a0 + mv s3, a0 .LBB0_138: # %if.then.i229 ld a0, 0(s2) ld a1, 16(a0) @@ -911,7 +911,7 @@ .Ltmp16: .LBB0_145: # %ehcleanup mv s1, a1 - mv s4, a0 + mv s3, a0 addi a0, sp, 136 call _ZN17CBaseRecordVectorD2Ev@plt j .LBB0_148 @@ -919,7 +919,7 @@ .Ltmp11: .LBB0_147: # %ehcleanup339 mv s1, a1 - mv s4, a0 + mv s3, a0 .LBB0_148: # %ehcleanup339 addi a0, sp, 360 call _ZN13CObjectVectorIN8NArchive3N7z18CExtractFolderInfoEED2Ev @@ -933,7 +933,7 @@ .Ltmp86: .LBB0_150: # %ehcleanup349 sext.w s1, s1 - mv a0, s4 + mv a0, s3 call __cxa_begin_catch@plt li a1, 2 beq s1, a1, .LBB0_152 --- build.head//MultiSource/Benchmarks/mafft/CMakeFiles/pairlocalalign.dir/Falign.s 2023-11-13 08:03:22.559552851 +0000 +++ build//MultiSource/Benchmarks/mafft/CMakeFiles/pairlocalalign.dir/Falign.s 2023-11-13 08:03:17.591696454 +0000 @@ -5855,8 +5855,8 @@ ld s9, %pcrel_lo(.Lpcrel_hi199)(s0) addi a0, a0, 1 sw a0, 0(a1) - slli s2, s10, 2 - add a0, s9, s2 + slli s6, s10, 2 + add a0, s9, s6 lw a0, 0(a0) sd s5, 184(sp) # 8-byte Folded Spill bnez a0, .LBB3_118 @@ -5903,8 +5903,8 @@ .LBB3_119: # %if.end677 # in Loop: Header=BB3_113 Depth=1 addi s10, s10, 1 - slli s6, s10, 2 - add s9, s9, s6 + slli s2, s10, 2 + add s9, s9, s2 lw a2, 0(s9) ld a0, 144(sp) # 8-byte Folded Reload bne a2, a0, .LBB3_124 @@ -5942,7 +5942,7 @@ ld a1, %pcrel_lo(.Lpcrel_hi200)(a0) ld a0, 208(sp) # 8-byte Folded Reload ld a0, %pcrel_lo(.Lpcrel_hi284)(a0) - add a1, a1, s6 + add a1, a1, s2 lw a2, 0(a1) mv a1, s1 mv a3, s11 @@ -5962,8 +5962,8 @@ ld s8, %pcrel_lo(.Lpcrel_hi199)(a0) ld a0, 136(sp) # 8-byte Folded Reload ld s5, %pcrel_lo(.Lpcrel_hi192)(a0) - add s9, s8, s2 - add s8, s8, s6 + add s9, s8, s6 + add s8, s8, s2 ld s11, 224(sp) # 8-byte Folded Reload ld s4, 248(sp) # 8-byte Folded Reload .LBB3_127: # %for.body716 @@ -6020,9 +6020,9 @@ ld a1, 0(a1) add s0, a0, s5 ld a0, 0(s0) - add s3, s9, s2 + add s3, s9, s6 add a1, a1, a3 - add s4, s9, s6 + add s4, s9, s2 subw a2, a2, a3 call strncpy@plt lw a0, 0(s4) @@ -6036,9 +6036,9 @@ .LBB3_133: # %for.body754 # Parent Loop BB3_113 Depth=1 # => This Inner Loop Header: Depth=2 - add a0, s9, s6 - lw a2, 0(a0) add a0, s9, s2 + lw a2, 0(a0) + add a0, s9, s6 lw a3, 0(a0) blt a3, a2, .LBB3_132 # %bb.134: # %if.then763 @@ -6051,9 +6051,9 @@ call fprintf@plt ld a0, 152(sp) # 8-byte Folded Reload ld s9, %pcrel_lo(.Lpcrel_hi200)(a0) - add a0, s9, s2 - lw a3, 0(a0) add a0, s9, s6 + lw a3, 0(a0) + add a0, s9, s2 lw a2, 0(a0) j .LBB3_132 .LBB3_135: # %for.end799 --- build.head//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/C/XzDec.s 2023-11-13 08:03:21.263590313 +0000 +++ build//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/C/XzDec.s 2023-11-13 08:03:16.291734031 +0000 @@ -2278,9 +2278,9 @@ sw s7, 0(s5) vsetivli zero, 2, e64, m1, ta, ma lhu a1, 16(s5) + addi a0, sp, 208 + vl1r.v v8, (a0) # Unknown-size Folded Reload ld a0, 32(sp) # 8-byte Folded Reload - addi a2, sp, 208 - vl1r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) andi a1, a1, 15 ld a0, 112(sp) # 8-byte Folded Reload @@ -2357,9 +2357,9 @@ call Sha256_Init@plt sw zero, 4(s5) vsetivli zero, 2, e64, m1, ta, ma + addi a0, sp, 208 + vl1r.v v8, (a0) # Unknown-size Folded Reload ld a0, 72(sp) # 8-byte Folded Reload - addi a1, sp, 208 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) j .LBB16_3 .LBB16_39: # %if.else279 --- build.head//MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/btDiscreteDynamicsWorld.s 2023-11-13 08:03:22.467555510 +0000 +++ build//MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/btDiscreteDynamicsWorld.s 2023-11-13 08:03:17.503698998 +0000 @@ -5018,7 +5018,7 @@ addi a0, a0, 48 vs1r.v v12, (a0) # Unknown-size Folded Spill fmul.s fs2, fa5, fa2 - addi s5, sp, 36 + addi s4, sp, 36 addi s2, sp, 40 addi s7, sp, 20 addi s3, sp, 24 @@ -5061,9 +5061,9 @@ add a0, sp, a0 addi a0, a0, 48 vs1r.v v8, (a0) # Unknown-size Folded Spill - addi s4, sp, 16 + addi s5, sp, 16 vsetivli zero, 1, e32, mf2, ta, ma - vse32.v v8, (s4) + vse32.v v8, (s5) vsetivli zero, 2, e32, mf2, ta, ma vfadd.vv v8, v9, v10 csrr a0, vlenb @@ -5072,7 +5072,7 @@ add a0, sp, a0 addi a0, a0, 48 vs1r.v v8, (a0) # Unknown-size Folded Spill - vse32.v v8, (s5) + vse32.v v8, (s4) vse32.v v8, (s7) addi a1, sp, 32 addi a2, sp, 16 @@ -5094,9 +5094,9 @@ add a0, sp, a0 addi a0, a0, 48 vl1r.v v9, (a0) # Unknown-size Folded Reload - vse32.v v9, (s5) + vse32.v v9, (s4) sw zero, 28(sp) - vse32.v v8, (s4) + vse32.v v8, (s5) vslidedown.vi v8, v9, 1 csrr a0, vlenb slli a1, a0, 1 @@ -5134,7 +5134,7 @@ vsetivli zero, 2, e32, mf2, ta, ma ld a0, 0(s1) ld a4, 40(a0) - vse32.v v8, (s4) + vse32.v v8, (s5) fsub.s fs0, fs2, fs1 fsw fs0, 24(sp) addi a1, sp, 32 @@ -5184,7 +5184,7 @@ addi a0, a0, 48 vs1r.v v8, (a0) # Unknown-size Folded Spill vsetivli zero, 1, e32, mf2, ta, ma - vse32.v v8, (s4) + vse32.v v8, (s5) vsetivli zero, 2, e32, mf2, ta, ma csrr a0, vlenb slli a0, a0, 3 @@ -5200,7 +5200,7 @@ vfsub.vv v8, v8, v9 addi a0, sp, 48 vs1r.v v8, (a0) # Unknown-size Folded Spill - vse32.v v8, (s5) + vse32.v v8, (s4) vse32.v v8, (s7) addi a1, sp, 32 addi a2, sp, 16 @@ -5219,9 +5219,9 @@ vsetivli zero, 2, e32, mf2, ta, ma addi a0, sp, 48 vl1r.v v9, (a0) # Unknown-size Folded Reload - vse32.v v9, (s5) + vse32.v v9, (s4) sw zero, 28(sp) - vse32.v v8, (s4) + vse32.v v8, (s5) vslidedown.vi v8, v9, 1 vs1r.v v8, (a0) # Unknown-size Folded Spill vsetivli zero, 1, e32, mf2, ta, ma @@ -5250,7 +5250,7 @@ vsetivli zero, 2, e32, mf2, ta, ma ld a0, 0(s1) ld a4, 40(a0) - vse32.v v8, (s4) + vse32.v v8, (s5) fadd.s fs1, fs2, fs1 fsw fs1, 24(sp) addi a1, sp, 32 @@ -5297,7 +5297,7 @@ addi a0, a0, 48 vs1r.v v8, (a0) # Unknown-size Folded Spill vsetivli zero, 1, e32, mf2, ta, ma - vse32.v v8, (s4) + vse32.v v8, (s5) vsetivli zero, 2, e32, mf2, ta, ma csrr a0, vlenb slli a1, a0, 3 @@ -5322,7 +5322,7 @@ add a0, sp, a0 addi a0, a0, 48 vs1r.v v8, (a0) # Unknown-size Folded Spill - vse32.v v8, (s5) + vse32.v v8, (s4) vse32.v v8, (s7) addi a1, sp, 32 addi a2, sp, 16 @@ -5344,9 +5344,9 @@ add a0, sp, a0 addi a0, a0, 48 vl1r.v v9, (a0) # Unknown-size Folded Reload - vse32.v v9, (s5) + vse32.v v9, (s4) sw zero, 28(sp) - vse32.v v8, (s4) + vse32.v v8, (s5) vslidedown.vi v8, v9, 1 csrr a0, vlenb slli a0, a0, 2 @@ -5382,7 +5382,7 @@ vsetivli zero, 2, e32, mf2, ta, ma ld a0, 0(s1) ld a4, 40(a0) - vse32.v v8, (s4) + vse32.v v8, (s5) fsw fs1, 24(sp) addi a1, sp, 32 addi a2, sp, 16 @@ -5407,7 +5407,7 @@ add a0, sp, a0 addi a0, a0, 48 vl1r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s4) + vse32.v v8, (s5) vsetivli zero, 2, e32, mf2, ta, ma csrr a0, vlenb slli a1, a0, 3 @@ -5433,7 +5433,7 @@ add a0, sp, a0 addi a0, a0, 48 vs1r.v v8, (a0) # Unknown-size Folded Spill - vse32.v v8, (s5) + vse32.v v8, (s4) vse32.v v8, (s7) addi a1, sp, 32 addi a2, sp, 16 @@ -5455,9 +5455,9 @@ add a0, sp, a0 addi a0, a0, 48 vl1r.v v9, (a0) # Unknown-size Folded Reload - vse32.v v9, (s5) + vse32.v v9, (s4) sw zero, 28(sp) - vse32.v v8, (s4) + vse32.v v8, (s5) vslidedown.vi v8, v9, 1 csrr a0, vlenb slli a0, a0, 3 @@ -5493,7 +5493,7 @@ vsetivli zero, 2, e32, mf2, ta, ma ld a0, 0(s1) ld a4, 40(a0) - vse32.v v8, (s4) + vse32.v v8, (s5) fsw fs0, 24(sp) addi a1, sp, 32 addi a2, sp, 16 --- build.head//MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/rules-red.s 2023-11-13 08:03:22.375558170 +0000 +++ build//MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/rules-red.s 2023-11-13 08:03:17.415701541 +0000 @@ -4031,12 +4031,12 @@ vmv.v.i v9, 0 addi a0, sp, 160 vs1r.v v9, (a0) # Unknown-size Folded Spill - ld s2, 64(sp) # 8-byte Folded Reload - sd s10, 32(sp) # 8-byte Folded Spill csrr a0, vlenb add a0, sp, a0 addi a0, a0, 160 vs1r.v v8, (a0) # Unknown-size Folded Spill + ld s2, 64(sp) # 8-byte Folded Reload + sd s10, 32(sp) # 8-byte Folded Spill j .LBB9_25 .LBB9_24: # %for.inc83.i # in Loop: Header=BB9_25 Depth=1 @@ -4227,11 +4227,11 @@ call cont_ApplyBindingsModuloMatching@plt lw a1, 0(s2) mv s3, a0 - li a5, 1 csrr a0, vlenb add a0, sp, a0 addi a0, a0, 160 vl1r.v v8, (a0) # Unknown-size Folded Reload + li a5, 1 blez a1, .LBB9_46 # %bb.44: # %while.body.i72.i.preheader # in Loop: Header=BB9_32 Depth=2 @@ -10116,11 +10116,11 @@ call cont_ApplyBindingsModuloMatching@plt lw a1, 0(s3) mv s0, a0 - li a5, 1 csrr a0, vlenb add a0, sp, a0 addi a0, a0, 240 vl1r.v v8, (a0) # Unknown-size Folded Reload + li a5, 1 blez a1, .LBB21_89 # %bb.87: # %while.body.i.preheader # in Loop: Header=BB21_25 Depth=5 --- build.head//MultiSource/Applications/SIBsim4/CMakeFiles/SIBsim4.dir/sim4b1.s 2023-11-13 08:03:22.347558979 +0000 +++ build//MultiSource/Applications/SIBsim4/CMakeFiles/SIBsim4.dir/sim4b1.s 2023-11-13 08:03:17.395702119 +0000 @@ -73,31 +73,30 @@ bnez a0, .LBB0_2 j .LBB0_641 .LBB0_2: # %if.end - mv s6, a2 + mv s0, a2 li a0, 5 slli a0, a0, 32 sd a0, 592(sp) li a0, 40 - mv s0, a1 + mv s1, a1 call xmalloc@plt .Lpcrel_hi0: auipc a1, %got_pcrel_hi(options) - ld a3, %pcrel_lo(.Lpcrel_hi0)(a1) + ld s6, %pcrel_lo(.Lpcrel_hi0)(a1) ld a1, 16(s10) - sd s0, 192(sp) # 8-byte Folded Spill - lw a2, 0(s0) - sd a3, 480(sp) # 8-byte Folded Spill - lw a5, 40(a3) + sd s1, 192(sp) # 8-byte Folded Spill + lw a2, 0(s1) + lw a5, 40(s6) sd a0, 584(sp) li a3, 1 li a4, 1 addi a6, sp, 584 mv a0, s7 - mv a7, s6 + mv a7, s0 li t2, 0 call exon_cores vsetivli zero, 2, e64, m1, ta, ma - lw a0, 8(s6) + lw a0, 8(s0) vmv.v.i v8, 0 addi a1, sp, 560 vse64.v v8, (a1) @@ -120,10 +119,10 @@ sd a0, 320(sp) # 8-byte Folded Spill csrr a0, vlenb slli a2, a0, 1 - sd a2, 96(sp) # 8-byte Folded Spill + sd a2, 80(sp) # 8-byte Folded Spill sd a0, 280(sp) # 8-byte Folded Spill srli a0, a0, 1 - sd a0, 208(sp) # 8-byte Folded Spill + sd a0, 272(sp) # 8-byte Folded Spill .Lpcrel_hi1: auipc a0, %got_pcrel_hi(free) ld s11, %pcrel_lo(.Lpcrel_hi1)(a0) @@ -159,10 +158,11 @@ li a0, -3 slli a0, a0, 32 addi a0, a0, -1 - sd a0, 120(sp) # 8-byte Folded Spill + sd a0, 112(sp) # 8-byte Folded Spill sd s7, 296(sp) # 8-byte Folded Spill - sd s6, 72(sp) # 8-byte Folded Spill sd s10, 176(sp) # 8-byte Folded Spill + sd s6, 480(sp) # 8-byte Folded Spill + sd s0, 136(sp) # 8-byte Folded Spill sd s11, 144(sp) # 8-byte Folded Spill j .LBB0_6 .LBB0_4: # %free_align.exit @@ -170,7 +170,8 @@ sd zero, 0(s9) .LBB0_5: # %cleanup599 # in Loop: Header=BB0_6 Depth=1 - lwu a0, 8(s6) + ld s0, 136(sp) # 8-byte Folded Reload + lwu a0, 8(s0) ld a1, 184(sp) # 8-byte Folded Reload addi a1, a1, 1 bltu a1, a0, .LBB0_6 @@ -198,7 +199,7 @@ # Child Loop BB0_125 Depth 2 # Child Loop BB0_128 Depth 2 # Child Loop BB0_133 Depth 2 - # Child Loop BB0_140 Depth 2 + # Child Loop BB0_139 Depth 2 # Child Loop BB0_152 Depth 2 # Child Loop BB0_163 Depth 2 # Child Loop BB0_178 Depth 3 @@ -254,7 +255,7 @@ # Child Loop BB0_618 Depth 4 # Child Loop BB0_621 Depth 4 # Child Loop BB0_633 Depth 2 - ld a0, 0(s6) + ld a0, 0(s0) sd a1, 184(sp) # 8-byte Folded Spill slli a1, a1, 3 add a0, a0, a1 @@ -333,8 +334,7 @@ lw a0, 0(s4) ld a1, 8(s7) not a2, a4 - ld a3, 480(sp) # 8-byte Folded Reload - lw a5, 24(a3) + lw a5, 24(s6) addw a2, a0, a2 add a1, a1, a4 addiw a4, a4, 1 @@ -518,8 +518,8 @@ ld s4, 0(a0) .LBB0_36: # %if.end88 # in Loop: Header=BB0_6 Depth=1 - lwu t1, 4(s4) - addiw s11, t1, -1 + lwu t2, 4(s4) + addiw s11, t2, -1 beqz s11, .LBB0_115 # %bb.37: # %if.then93 # in Loop: Header=BB0_6 Depth=1 @@ -530,11 +530,10 @@ li s11, 250 .LBB0_39: # %if.then93 # in Loop: Header=BB0_6 Depth=1 - sd s4, 456(sp) # 8-byte Folded Spill + sd s4, 448(sp) # 8-byte Folded Spill lw s7, 0(s4) slli s8, s11, 2 addi a0, s7, -1 - ld s4, 280(sp) # 8-byte Folded Reload blt s8, s7, .LBB0_41 # %bb.40: # %if.then93 # in Loop: Header=BB0_6 Depth=1 @@ -542,25 +541,26 @@ .LBB0_41: # %if.then93 # in Loop: Header=BB0_6 Depth=1 li a2, 0 - ld t3, 16(s10) + ld t4, 16(s10) ld a3, 296(sp) # 8-byte Folded Reload - ld t4, 8(a3) + ld t6, 8(a3) slli a1, s7, 32 srli s5, a1, 32 - sext.w s6, s8 - not t2, s11 - add t6, t1, t2 + sext.w a4, s8 + not t3, s11 + add t0, t2, t3 not a1, s8 - add t0, s7, a1 + add t1, s7, a1 lw s10, 36(a3) addi s9, s11, 1 slli a1, s8, 32 srli a1, a1, 32 - sub a3, s5, s6 + sd a4, 488(sp) # 8-byte Folded Spill + sub a3, s5, a4 add a1, a1, a3 - add a1, t4, a1 + add a1, t6, a1 addi a3, a1, -2 - add a4, t3, t1 + add a4, t4, t2 addi a4, a4, -2 .LBB0_42: # %for.cond.i # Parent Loop BB0_6 Depth=1 @@ -585,27 +585,26 @@ snez a2, s2 snez a3, a5 and a2, a3, a2 - ld s1, 480(sp) # 8-byte Folded Reload bnez a2, .LBB0_46 # %bb.45: # %if.then.i # in Loop: Header=BB0_6 Depth=1 li s2, 0 - add a2, t1, a1 + add a2, t2, a1 add a4, a0, a1 - addi s4, a2, -1 + addi s3, a2, -1 ld s7, 296(sp) # 8-byte Folded Reload ld s10, 176(sp) # 8-byte Folded Reload ld s9, 304(sp) # 8-byte Folded Reload - ld s3, 456(sp) # 8-byte Folded Reload + ld s1, 448(sp) # 8-byte Folded Reload j .LBB0_113 .LBB0_46: # %if.end.i # in Loop: Header=BB0_6 Depth=1 - sd t6, 384(sp) # 8-byte Folded Spill - sd t4, 400(sp) # 8-byte Folded Spill - sd t3, 464(sp) # 8-byte Folded Spill - sd t2, 352(sp) # 8-byte Folded Spill - sd t1, 408(sp) # 8-byte Folded Spill - sd t0, 376(sp) # 8-byte Folded Spill + mv s6, t6 + sd t4, 456(sp) # 8-byte Folded Spill + sd t3, 352(sp) # 8-byte Folded Spill + sd t2, 400(sp) # 8-byte Folded Spill + sd t1, 376(sp) # 8-byte Folded Spill + sd t0, 384(sp) # 8-byte Folded Spill addw s3, s8, s11 addiw s1, s3, 1 slli s0, s1, 2 @@ -614,8 +613,9 @@ sd a0, 512(sp) # 8-byte Folded Spill mv a0, s0 call xmalloc@plt - mv a6, s6 mv s0, a0 + ld s4, 280(sp) # 8-byte Folded Reload + ld a6, 488(sp) # 8-byte Folded Reload bltz s3, .LBB0_54 # %bb.47: # %for.body28.preheader.i # in Loop: Header=BB0_6 Depth=1 @@ -636,8 +636,8 @@ vmv.v.x v8, s9 mv a2, a1 ld a3, 512(sp) # 8-byte Folded Reload - ld a4, 96(sp) # 8-byte Folded Reload - ld a5, 208(sp) # 8-byte Folded Reload + ld a4, 80(sp) # 8-byte Folded Reload + ld a5, 272(sp) # 8-byte Folded Reload .LBB0_50: # %vector.body1159 # Parent Loop BB0_6 Depth=1 # => This Inner Loop Header: Depth=2 @@ -666,7 +666,7 @@ slli a0, a6, 2 ld a1, 512(sp) # 8-byte Folded Reload add a0, a1, a0 - sd a0, 448(sp) # 8-byte Folded Spill + sd a0, 440(sp) # 8-byte Folded Spill sw s2, 0(a0) slli s3, s9, 32 srli s2, s3, 30 @@ -676,12 +676,12 @@ mv a0, s2 call xmalloc@plt mv t1, s1 - mv t0, a0 + mv t3, a0 srli a1, s4, 1 li a0, 1 - ld a4, 96(sp) # 8-byte Folded Reload + ld a4, 80(sp) # 8-byte Folded Reload sd a1, 368(sp) # 8-byte Folded Spill - ld t4, 400(sp) # 8-byte Folded Reload + mv t4, s6 bltu s11, a1, .LBB0_58 # %bb.55: # %vector.ph1139 # in Loop: Header=BB0_6 Depth=1 @@ -694,7 +694,7 @@ vmv.v.x v8, s9 addi a2, t1, 4 mv a3, a1 - ld a5, 208(sp) # 8-byte Folded Reload + ld a5, 272(sp) # 8-byte Folded Reload .LBB0_56: # %vector.body1145 # Parent Loop BB0_6 Depth=1 # => This Inner Loop Header: Depth=2 @@ -720,44 +720,44 @@ bnez a1, .LBB0_59 .LBB0_60: # %for.end58.i # in Loop: Header=BB0_6 Depth=1 - ld a0, 448(sp) # 8-byte Folded Reload + ld a0, 440(sp) # 8-byte Folded Reload lw a0, 0(a0) li a2, 0 srli t2, s3, 32 sw a0, 0(t1) - sw s8, 0(t0) + sw s8, 0(t3) srliw a0, s10, 31 add a0, s10, a0 sraiw a7, a0, 1 slliw a0, s10, 1 - sd a0, 440(sp) # 8-byte Folded Spill + sd a0, 432(sp) # 8-byte Folded Spill addiw a6, s8, -1 subw a4, a6, s11 addi a0, s8, 2 - sd a0, 488(sp) # 8-byte Folded Spill + sd a0, 464(sp) # 8-byte Folded Spill addi a1, s11, 2 ld a0, 512(sp) # 8-byte Folded Reload addi a3, a0, 4 sd a3, 504(sp) # 8-byte Folded Spill addi a0, a0, -4 sd a0, 496(sp) # 8-byte Folded Spill - mv t3, s6 - sub a0, s5, s6 + ld t0, 488(sp) # 8-byte Folded Reload + sub a0, s5, t0 add a0, t4, a0 addi s6, a0, -2 subw t4, a1, s7 - ld a0, 408(sp) # 8-byte Folded Reload + ld a0, 400(sp) # 8-byte Folded Reload sub a0, a0, s11 - ld a3, 464(sp) # 8-byte Folded Reload + ld a3, 456(sp) # 8-byte Folded Reload add a0, a3, a0 addi s1, a0, -2 li s2, 1 li t6, 3 - mv s5, t3 + mv s5, t0 ld s7, 296(sp) # 8-byte Folded Reload ld s10, 176(sp) # 8-byte Folded Reload ld s9, 304(sp) # 8-byte Folded Reload - sd t0, 432(sp) # 8-byte Folded Spill + sd t3, 408(sp) # 8-byte Folded Spill sd t1, 424(sp) # 8-byte Folded Spill sd t2, 360(sp) # 8-byte Folded Spill sd a7, 416(sp) # 8-byte Folded Spill @@ -777,7 +777,7 @@ bge a7, a0, .LBB0_64 # %bb.62: # %if.else.i.i # in Loop: Header=BB0_61 Depth=2 - ld a3, 440(sp) # 8-byte Folded Reload + ld a3, 432(sp) # 8-byte Folded Reload bge a0, a3, .LBB0_69 # %bb.63: # %if.then2.i.i # in Loop: Header=BB0_61 Depth=2 @@ -802,7 +802,7 @@ bge a7, a3, .LBB0_71 # %bb.67: # %if.else.i199.i # in Loop: Header=BB0_61 Depth=2 - ld a5, 440(sp) # 8-byte Folded Reload + ld a5, 432(sp) # 8-byte Folded Reload bge a3, a5, .LBB0_70 # %bb.68: # %if.then2.i205.i # in Loop: Header=BB0_61 Depth=2 @@ -839,24 +839,24 @@ .LBB0_72: # %while.body.i296 # in Loop: Header=BB0_61 Depth=2 addi a0, s5, 1 - addi t3, t3, -1 - sd a0, 464(sp) # 8-byte Folded Spill - bge a0, t3, .LBB0_74 + addi t0, t0, -1 + sd a0, 456(sp) # 8-byte Folded Spill + bge a0, t0, .LBB0_74 # %bb.73: # %for.end216.thread.i # in Loop: Header=BB0_61 Depth=2 - ld a0, 448(sp) # 8-byte Folded Reload + ld a0, 440(sp) # 8-byte Folded Reload lw a0, 0(a0) slli a3, s2, 2 add a5, t1, a3 sw a0, 0(a5) - add a3, t0, a3 + add a3, t3, a3 sw s8, 0(a3) - ld t5, 488(sp) # 8-byte Folded Reload - ld s5, 464(sp) # 8-byte Folded Reload + ld t5, 464(sp) # 8-byte Folded Reload + ld s5, 456(sp) # 8-byte Folded Reload j .LBB0_103 .LBB0_74: # %for.body93.lr.ph.i # in Loop: Header=BB0_61 Depth=2 - sd t3, 400(sp) # 8-byte Folded Spill + sd t0, 488(sp) # 8-byte Folded Spill slli s10, a6, 2 add s7, s0, s10 ld a0, 512(sp) # 8-byte Folded Reload @@ -982,22 +982,21 @@ j .LBB0_106 .LBB0_91: # %for.end216.i # in Loop: Header=BB0_61 Depth=2 - ld a0, 448(sp) # 8-byte Folded Reload + ld a0, 440(sp) # 8-byte Folded Reload lw a3, 0(a0) slli a5, s2, 2 ld a0, 424(sp) # 8-byte Folded Reload add a0, a0, a5 sw a3, 0(a0) - ld a3, 432(sp) # 8-byte Folded Reload - add a3, a3, a5 + ld t3, 408(sp) # 8-byte Folded Reload + add a3, t3, a5 sw s8, 0(a3) mv a5, s7 mv a7, t6 mv t1, a6 ld s9, 304(sp) # 8-byte Folded Reload - ld t3, 400(sp) # 8-byte Folded Reload - ld t5, 488(sp) # 8-byte Folded Reload - ld s5, 464(sp) # 8-byte Folded Reload + ld t5, 464(sp) # 8-byte Folded Reload + ld s5, 456(sp) # 8-byte Folded Reload j .LBB0_93 .LBB0_92: # %for.inc243.i # in Loop: Header=BB0_93 Depth=3 @@ -1029,8 +1028,8 @@ .LBB0_97: # %for.body249.i.preheader # in Loop: Header=BB0_61 Depth=2 mv a0, a6 - ld a5, 96(sp) # 8-byte Folded Reload - ld t0, 432(sp) # 8-byte Folded Reload + ld a5, 80(sp) # 8-byte Folded Reload + ld t0, 488(sp) # 8-byte Folded Reload ld t1, 424(sp) # 8-byte Folded Reload ld t2, 360(sp) # 8-byte Folded Reload ld a7, 392(sp) # 8-byte Folded Reload @@ -1047,7 +1046,7 @@ neg a0, a0 and a3, a7, a0 add a0, a3, a6 - ld a7, 208(sp) # 8-byte Folded Reload + ld a7, 272(sp) # 8-byte Folded Reload .LBB0_100: # %vector.body1131 # Parent Loop BB0_6 Depth=1 # Parent Loop BB0_61 Depth=2 @@ -1083,7 +1082,7 @@ addi a4, a4, -1 addiw a6, a6, -1 addi t5, t5, 1 - sd t5, 488(sp) # 8-byte Folded Spill + sd t5, 464(sp) # 8-byte Folded Spill addi a2, a2, 1 addi t4, t4, 1 addi t6, t6, 2 @@ -1098,15 +1097,15 @@ call free@plt ld a0, 424(sp) # 8-byte Folded Reload call free@plt - ld a0, 432(sp) # 8-byte Folded Reload + ld a0, 408(sp) # 8-byte Folded Reload call free@plt ld s7, 296(sp) # 8-byte Folded Reload ld s10, 176(sp) # 8-byte Folded Reload - ld s1, 480(sp) # 8-byte Folded Reload + ld s6, 480(sp) # 8-byte Folded Reload ld s9, 304(sp) # 8-byte Folded Reload ld t5, 472(sp) # 8-byte Folded Reload - ld s3, 456(sp) # 8-byte Folded Reload - ld s4, 384(sp) # 8-byte Folded Reload + ld s1, 448(sp) # 8-byte Folded Reload + ld s3, 384(sp) # 8-byte Folded Reload ld a4, 376(sp) # 8-byte Folded Reload j .LBB0_113 .LBB0_105: # %if.then204.i @@ -1117,16 +1116,16 @@ call free@plt ld a0, 424(sp) # 8-byte Folded Reload call free@plt - ld a0, 432(sp) # 8-byte Folded Reload + ld a0, 408(sp) # 8-byte Folded Reload call free@plt subw a4, s3, s9 ld s7, 296(sp) # 8-byte Folded Reload ld s10, 176(sp) # 8-byte Folded Reload - ld s1, 480(sp) # 8-byte Folded Reload + ld s6, 480(sp) # 8-byte Folded Reload ld s9, 304(sp) # 8-byte Folded Reload ld t5, 472(sp) # 8-byte Folded Reload - ld s3, 456(sp) # 8-byte Folded Reload - ld s4, 384(sp) # 8-byte Folded Reload + ld s1, 448(sp) # 8-byte Folded Reload + ld s3, 384(sp) # 8-byte Folded Reload j .LBB0_113 .LBB0_106: # %if.then210.i # in Loop: Header=BB0_6 Depth=1 @@ -1136,18 +1135,18 @@ call free@plt ld a0, 424(sp) # 8-byte Folded Reload call free@plt - ld a0, 432(sp) # 8-byte Folded Reload - call free@plt ld a0, 408(sp) # 8-byte Folded Reload + call free@plt + ld a0, 400(sp) # 8-byte Folded Reload ld a1, 352(sp) # 8-byte Folded Reload add a0, a0, a1 - add s4, a0, s3 + add s3, a0, s3 ld s7, 296(sp) # 8-byte Folded Reload ld s10, 176(sp) # 8-byte Folded Reload - ld s1, 480(sp) # 8-byte Folded Reload + ld s6, 480(sp) # 8-byte Folded Reload ld s9, 304(sp) # 8-byte Folded Reload ld t5, 472(sp) # 8-byte Folded Reload - ld s3, 456(sp) # 8-byte Folded Reload + ld s1, 448(sp) # 8-byte Folded Reload ld a4, 376(sp) # 8-byte Folded Reload j .LBB0_113 .LBB0_107: # %while.end259.loopexit.split.loop.exit324.i @@ -1161,10 +1160,10 @@ slli a0, a1, 32 srli a0, a0, 30 add a0, t1, a0 - ld s1, 480(sp) # 8-byte Folded Reload - ld s3, 456(sp) # 8-byte Folded Reload - ld s4, 384(sp) # 8-byte Folded Reload - ld a4, 376(sp) # 8-byte Folded Reload + ld s6, 480(sp) # 8-byte Folded Reload + ld s1, 448(sp) # 8-byte Folded Reload + ld a4, 384(sp) # 8-byte Folded Reload + ld a5, 376(sp) # 8-byte Folded Reload .LBB0_109: # %while.cond260.i # Parent Loop BB0_6 Depth=1 # => This Inner Loop Header: Depth=2 @@ -1190,29 +1189,29 @@ slli a0, s2, 2 add a1, t1, a0 lw a1, 0(a1) - add a0, t0, a0 + add a0, t3, a0 lw a0, 0(a0) - add s4, a1, s4 - subw a2, a4, s11 + add s3, a1, a4 + subw a2, a5, s11 add a1, a2, a1 - add s5, a1, a0 + add s4, a1, a0 mv a0, t1 - mv s6, t0 + mv s5, t3 call free@plt - mv a0, s6 + mv a0, s5 call free@plt ld a0, 512(sp) # 8-byte Folded Reload call free@plt mv a0, s0 call free@plt - mv a4, s5 + mv a4, s4 ld t5, 472(sp) # 8-byte Folded Reload .LBB0_113: # %extend_bw.exit # in Loop: Header=BB0_6 Depth=1 - lw a0, 4(s3) - lw a1, 56(s1) - lw a2, 48(s1) - not a3, s4 + lw a0, 4(s1) + lw a1, 56(s6) + lw a2, 48(s6) + not a3, s3 add a0, a0, a3 mul a0, a0, a1 mul a1, a2, s2 @@ -1220,10 +1219,10 @@ bltz a0, .LBB0_115 # %bb.114: # %if.then147 # in Loop: Header=BB0_6 Depth=1 - addi a0, s4, 1 - sw a0, 4(s3) + addi a0, s3, 1 + sw a0, 4(s1) addi a0, a4, 1 - sw a0, 0(s3) + sw a0, 0(s1) .LBB0_115: # %if.end158 # in Loop: Header=BB0_6 Depth=1 mv s8, s7 @@ -1441,26 +1440,19 @@ .LBB0_136: # %while.end253 # in Loop: Header=BB0_6 Depth=1 ld a0, 192(sp) # 8-byte Folded Reload + ld s6, 480(sp) # 8-byte Folded Reload ld t5, 472(sp) # 8-byte Folded Reload beqz s2, .LBB0_143 # %bb.137: # %if.then256 # in Loop: Header=BB0_6 Depth=1 subw a0, s1, s2 - bgeu s1, s2, .LBB0_139 -# %bb.138: # in Loop: Header=BB0_6 Depth=1 - ld s6, 72(sp) # 8-byte Folded Reload - mv s7, s8 - sext.w s1, s1 - sw a0, 16(s9) - beq s1, s2, .LBB0_5 - j .LBB0_142 -.LBB0_139: # %for.body264.preheader + bltu s1, s2, .LBB0_141 +# %bb.138: # %for.body264.preheader # in Loop: Header=BB0_6 Depth=1 slli a0, a0, 32 srli s0, a0, 32 srli s3, a0, 29 - ld s6, 72(sp) # 8-byte Folded Reload -.LBB0_140: # %for.body264 +.LBB0_139: # %for.body264 # Parent Loop BB0_6 Depth=1 # => This Inner Loop Header: Depth=2 ld a0, 8(s9) @@ -1470,16 +1462,18 @@ lwu s1, 16(s9) addi s0, s0, 1 addi s3, s3, 8 - bltu s0, s1, .LBB0_140 -# %bb.141: # %for.end270.loopexit + bltu s0, s1, .LBB0_139 +# %bb.140: # %for.end270.loopexit # in Loop: Header=BB0_6 Depth=1 subw a0, s1, s2 ld t5, 472(sp) # 8-byte Folded Reload +.LBB0_141: # %for.end270 + # in Loop: Header=BB0_6 Depth=1 mv s7, s8 sext.w s1, s1 sw a0, 16(s9) beq s1, s2, .LBB0_5 -.LBB0_142: # %cleanup283 +# %bb.142: # %cleanup283 # in Loop: Header=BB0_6 Depth=1 ld a1, 0(t5) addi a0, a0, -1 @@ -1776,7 +1770,7 @@ ld a5, 312(sp) # 8-byte Folded Reload addi a5, a5, -1 and a2, a2, a5 - sd a2, 272(sp) # 8-byte Folded Spill + sd a2, 264(sp) # 8-byte Folded Spill addi a2, a2, 1 sd a2, 376(sp) # 8-byte Folded Spill sub a2, t0, a4 @@ -1963,7 +1957,7 @@ .LBB0_204: # %for.body236.i.preheader # in Loop: Header=BB0_163 Depth=2 mv a4, s3 - ld a7, 96(sp) # 8-byte Folded Reload + ld a7, 80(sp) # 8-byte Folded Reload ld t2, 336(sp) # 8-byte Folded Reload ld t0, 368(sp) # 8-byte Folded Reload ld a5, 376(sp) # 8-byte Folded Reload @@ -1980,12 +1974,12 @@ ld a2, 280(sp) # 8-byte Folded Reload srli a2, a2, 1 neg a2, a2 - ld a4, 272(sp) # 8-byte Folded Reload + ld a4, 264(sp) # 8-byte Folded Reload and a2, a4, a2 add a4, s3, a2 mv a5, t5 mv a6, t6 - ld t0, 208(sp) # 8-byte Folded Reload + ld t0, 272(sp) # 8-byte Folded Reload .LBB0_207: # %vector.body1113 # Parent Loop BB0_6 Depth=1 # Parent Loop BB0_163 Depth=2 @@ -2095,8 +2089,9 @@ lw a0, 16(s9) .Lpcrel_hi9: auipc a1, %pcrel_hi(.LCPI0_2) - sd a1, 264(sp) # 8-byte Folded Spill + sd a1, 256(sp) # 8-byte Folded Spill ld s6, 480(sp) # 8-byte Folded Reload + ld s2, 272(sp) # 8-byte Folded Reload li a1, 2 mv s7, s8 bgeu a0, a1, .LBB0_220 @@ -2106,6 +2101,7 @@ li s4, 1 j .LBB0_224 .LBB0_221: # in Loop: Header=BB0_224 Depth=2 + ld s2, 272(sp) # 8-byte Folded Reload ld t5, 472(sp) # 8-byte Folded Reload .LBB0_222: # %cleanup492 # in Loop: Header=BB0_224 Depth=2 @@ -2164,7 +2160,7 @@ bgeu a2, a6, .LBB0_223 # %bb.226: # %if.then382 # in Loop: Header=BB0_224 Depth=2 - sd a3, 256(sp) # 8-byte Folded Spill + sd a3, 248(sp) # 8-byte Folded Spill lw a3, 36(s7) ld s8, 8(s7) li a0, 500 @@ -2186,7 +2182,7 @@ # in Loop: Header=BB0_224 Depth=2 ld a0, 200(sp) # 8-byte Folded Reload fld fs0, %pcrel_lo(.Lpcrel_hi6)(a0) - ld a0, 264(sp) # 8-byte Folded Reload + ld a0, 256(sp) # 8-byte Folded Reload fld fs1, %pcrel_lo(.Lpcrel_hi9)(a0) fcvt.d.wu fa5, a4 fmadd.d fa4, fa5, fs1, fs0 @@ -2201,16 +2197,17 @@ bltz t1, .LBB0_235 # %bb.232: # %if.end45.i # in Loop: Header=BB0_224 Depth=2 - sd a5, 112(sp) # 8-byte Folded Spill + sd a5, 104(sp) # 8-byte Folded Spill + sd s4, 96(sp) # 8-byte Folded Spill ld t3, 16(s10) add s11, t3, t0 add s9, s8, s1 slli a0, a4, 32 srli s10, a0, 32 slli a0, t2, 32 - srli s2, a0, 32 + srli s4, a0, 32 add a0, s8, s1 - add a0, a0, s2 + add a0, a0, s4 addi a0, a0, -1 add a1, t3, t0 add a1, a1, s10 @@ -2267,11 +2264,10 @@ # in Loop: Header=BB0_224 Depth=2 sd t3, 456(sp) # 8-byte Folded Spill sd t1, 56(sp) # 8-byte Folded Spill - sd s1, 104(sp) # 8-byte Folded Spill - sd t0, 128(sp) # 8-byte Folded Spill - sd a7, 136(sp) # 8-byte Folded Spill + sd s1, 88(sp) # 8-byte Folded Spill + sd t0, 120(sp) # 8-byte Folded Spill + sd a7, 128(sp) # 8-byte Folded Spill sd a6, 64(sp) # 8-byte Folded Spill - sd s4, 88(sp) # 8-byte Folded Spill sd s6, 504(sp) # 8-byte Folded Spill sd t2, 488(sp) # 8-byte Folded Spill add s1, s6, t2 @@ -2285,9 +2281,8 @@ call xmalloc@plt li a1, 16 mv s5, a0 - ld a2, 208(sp) # 8-byte Folded Reload - mv a0, a2 - bltu a1, a2, .LBB0_242 + mv a0, s2 + bltu a1, s2, .LBB0_242 # %bb.241: # %if.end70.i # in Loop: Header=BB0_224 Depth=2 li a0, 16 @@ -2296,13 +2291,13 @@ slli s1, s1, 32 srli s1, s1, 32 addi s6, s1, 1 - ld a6, 136(sp) # 8-byte Folded Reload - ld a7, 128(sp) # 8-byte Folded Reload - subw s4, a6, a7 - ld a4, 96(sp) # 8-byte Folded Reload + ld a6, 128(sp) # 8-byte Folded Reload + ld a7, 120(sp) # 8-byte Folded Reload + subw s2, a6, a7 + ld a4, 80(sp) # 8-byte Folded Reload ld t1, 504(sp) # 8-byte Folded Reload ld t2, 488(sp) # 8-byte Folded Reload - sd s3, 80(sp) # 8-byte Folded Spill + sd s3, 72(sp) # 8-byte Folded Spill bgeu s6, a0, .LBB0_244 # %bb.243: # in Loop: Header=BB0_224 Depth=2 li a0, 0 @@ -2361,6 +2356,7 @@ fmadd.d fa5, fs2, fs1, fs0 fcvt.wu.d a0, fa5, rtz add s6, s6, a0 + ld s2, 272(sp) # 8-byte Folded Reload ld s10, 176(sp) # 8-byte Folded Reload lw a0, 568(sp) lw a3, 36(s7) @@ -2376,11 +2372,11 @@ neg a0, a0 and a0, s6, a0 vsetvli a1, zero, e32, m2, ta, ma - vmv.v.x v8, s4 + vmv.v.x v8, s2 mv a1, a0 mv a2, s5 mv a3, t0 - ld a5, 208(sp) # 8-byte Folded Reload + ld a5, 272(sp) # 8-byte Folded Reload .LBB0_251: # %vector.body1095 # Parent Loop BB0_6 Depth=1 # Parent Loop BB0_224 Depth=2 @@ -2405,8 +2401,8 @@ # Parent Loop BB0_6 Depth=1 # Parent Loop BB0_224 Depth=2 # => This Inner Loop Header: Depth=3 - sw s4, 0(a2) - sw s4, 0(a0) + sw s2, 0(a2) + sw s2, 0(a0) addi a1, a1, -1 addi a0, a0, 4 addi a2, a2, 4 @@ -2453,7 +2449,7 @@ bne s7, s3, .LBB0_266 # %bb.263: # %if.then123.i # in Loop: Header=BB0_224 Depth=2 - ld a0, 104(sp) # 8-byte Folded Reload + ld a0, 88(sp) # 8-byte Folded Reload addi s1, a0, 1 addi s2, a7, 1 add s3, a0, s3 @@ -2483,8 +2479,9 @@ # in Loop: Header=BB0_224 Depth=2 ld s7, 296(sp) # 8-byte Folded Reload ld s10, 176(sp) # 8-byte Folded Reload - ld s4, 88(sp) # 8-byte Folded Reload - ld s3, 80(sp) # 8-byte Folded Reload + ld s2, 272(sp) # 8-byte Folded Reload + ld s4, 96(sp) # 8-byte Folded Reload + ld s3, 72(sp) # 8-byte Folded Reload ld a3, 408(sp) # 8-byte Folded Reload addi a2, a1, 1 sw a2, 568(sp) @@ -2519,7 +2516,7 @@ li a1, 16 .LBB0_268: # %if.end129.i # in Loop: Header=BB0_224 Depth=2 - ld a4, 96(sp) # 8-byte Folded Reload + ld a4, 80(sp) # 8-byte Folded Reload ld a6, 504(sp) # 8-byte Folded Reload bltu s6, a1, .LBB0_270 # %bb.269: # %vector.memcheck1068 @@ -2568,10 +2565,10 @@ ld t6, 504(sp) # 8-byte Folded Reload mv s11, s5 sd s8, 512(sp) # 8-byte Folded Spill - sd s7, 232(sp) # 8-byte Folded Spill + sd s7, 224(sp) # 8-byte Folded Spill sd s3, 400(sp) # 8-byte Folded Spill - sd s6, 272(sp) # 8-byte Folded Spill - sd a0, 240(sp) # 8-byte Folded Spill + sd s6, 264(sp) # 8-byte Folded Spill + sd a0, 232(sp) # 8-byte Folded Spill beqz t6, .LBB0_348 # %bb.274: # %for.body175.lr.ph.i # in Loop: Header=BB0_224 Depth=2 @@ -2587,11 +2584,11 @@ ld a4, 280(sp) # 8-byte Folded Reload srli a3, a4, 1 li a1, 24 - li a7, -1 - ld t0, 96(sp) # 8-byte Folded Reload addi a5, sp, 624 vl2r.v v10, (a5) # Unknown-size Folded Reload - ld t3, 128(sp) # 8-byte Folded Reload + li a7, -1 + ld t0, 80(sp) # 8-byte Folded Reload + ld t3, 120(sp) # 8-byte Folded Reload ld t2, 408(sp) # 8-byte Folded Reload bltu a1, a3, .LBB0_278 # %bb.277: # %for.body175.lr.ph.i @@ -2615,11 +2612,11 @@ and a3, a2, a3 addi a1, a3, 1 vsetvli a4, zero, e32, m2, ta, ma - vmv.v.x v8, s4 + vmv.v.x v8, s2 addi a4, s0, 4 addi a5, s6, 4 mv a6, a3 - ld t1, 208(sp) # 8-byte Folded Reload + ld t1, 272(sp) # 8-byte Folded Reload .LBB0_281: # %vector.body1065 # Parent Loop BB0_6 Depth=1 # Parent Loop BB0_224 Depth=2 @@ -2643,7 +2640,7 @@ # Parent Loop BB0_6 Depth=1 # Parent Loop BB0_224 Depth=2 # => This Inner Loop Header: Depth=3 - sw s4, 0(a2) + sw s2, 0(a2) sw a7, 0(a1) addi a3, a3, -1 addi a1, a1, 4 @@ -2661,10 +2658,10 @@ sw t6, 0(s7) ld a1, 464(sp) # 8-byte Folded Reload add a0, s5, a1 - sd a0, 224(sp) # 8-byte Folded Spill - add a0, s8, a1 sd a0, 216(sp) # 8-byte Folded Spill - ld a0, 136(sp) # 8-byte Folded Reload + add a0, s8, a1 + sd a0, 208(sp) # 8-byte Folded Spill + ld a0, 128(sp) # 8-byte Folded Reload subw a0, t3, a0 ld a1, 488(sp) # 8-byte Folded Reload add a0, a0, a1 @@ -2678,7 +2675,7 @@ sd a0, 424(sp) # 8-byte Folded Spill addi a0, s3, -4 sd a0, 416(sp) # 8-byte Folded Spill - ld a0, 104(sp) # 8-byte Folded Reload + ld a0, 88(sp) # 8-byte Folded Reload ld a1, 384(sp) # 8-byte Folded Reload add a0, a1, a0 mv a1, t2 @@ -2707,12 +2704,12 @@ sd a2, 448(sp) # 8-byte Folded Spill li a7, -1 li a0, -1 - sd a0, 248(sp) # 8-byte Folded Spill + sd a0, 240(sp) # 8-byte Folded Spill mv s7, t6 j .LBB0_288 .LBB0_286: # in Loop: Header=BB0_288 Depth=3 mv s7, t3 - ld s1, 248(sp) # 8-byte Folded Reload + ld s1, 240(sp) # 8-byte Folded Reload .LBB0_287: # %for.end527.i # in Loop: Header=BB0_288 Depth=3 addiw s6, s6, 1 @@ -2764,13 +2761,13 @@ bge a1, a2, .LBB0_295 # %bb.289: # %for.end299.thread.i # in Loop: Header=BB0_288 Depth=3 - ld a1, 224(sp) # 8-byte Folded Reload + ld a1, 216(sp) # 8-byte Folded Reload lw a1, 0(a1) srli a2, a0, 32 srli a3, a0, 30 add a0, s0, a3 sw a1, 0(a0) - ld a1, 240(sp) # 8-byte Folded Reload + ld a1, 232(sp) # 8-byte Folded Reload add a3, a1, a3 sw t6, 0(a3) beqz s6, .LBB0_315 @@ -2779,7 +2776,7 @@ lw a0, 0(a0) li s9, 0 subw t6, s6, s7 - ld a1, 272(sp) # 8-byte Folded Reload + ld a1, 264(sp) # 8-byte Folded Reload mv t5, a2 j .LBB0_292 .LBB0_291: # %for.inc359.i @@ -2807,7 +2804,7 @@ beqz a3, .LBB0_291 # %bb.294: # %land.lhs.true346.i.for.end361.i.loopexit_crit_edge # in Loop: Header=BB0_288 Depth=3 - sd s6, 248(sp) # 8-byte Folded Spill + sd s6, 240(sp) # 8-byte Folded Spill j .LBB0_338 .LBB0_295: # %for.body199.lr.ph.i # in Loop: Header=BB0_288 Depth=3 @@ -2913,13 +2910,13 @@ j .LBB0_296 .LBB0_310: # %for.end299.i # in Loop: Header=BB0_288 Depth=3 - ld a1, 224(sp) # 8-byte Folded Reload + ld a1, 216(sp) # 8-byte Folded Reload lw a1, 0(a1) srli a2, a0, 32 srli t3, a0, 30 add a0, s0, t3 sw a1, 0(a0) - ld a1, 240(sp) # 8-byte Folded Reload + ld a1, 232(sp) # 8-byte Folded Reload add t3, a1, t3 ld a1, 504(sp) # 8-byte Folded Reload sw a1, 0(t3) @@ -2942,7 +2939,7 @@ # => This Inner Loop Header: Depth=4 lw a3, 0(t6) sw a3, 0(s1) - sw s4, 0(t6) + sw s2, 0(t6) lw a3, 0(s1) lw a6, 0(a0) bge a3, a6, .LBB0_311 @@ -3080,7 +3077,7 @@ add a6, a1, ra add t5, a3, ra sltu a6, a6, s10 - sltu t5, t5, s2 + sltu t5, t5, s4 and a6, a6, t5 addi ra, ra, 1 bnez a6, .LBB0_331 @@ -3088,12 +3085,12 @@ .LBB0_333: # %for.end467.i # in Loop: Header=BB0_288 Depth=3 mv s5, s11 - ld a0, 216(sp) # 8-byte Folded Reload + ld a0, 208(sp) # 8-byte Folded Reload lw a1, 0(a0) - ld a0, 272(sp) # 8-byte Folded Reload + ld a0, 264(sp) # 8-byte Folded Reload add a0, a0, a7 sw a1, 0(a0) - ld a1, 232(sp) # 8-byte Folded Reload + ld a1, 224(sp) # 8-byte Folded Reload add a7, a1, a7 ld t6, 504(sp) # 8-byte Folded Reload sw t6, 0(a7) @@ -3139,12 +3136,12 @@ bge s3, a0, .LBB0_316 .LBB0_339: # %for.end467.thread.i # in Loop: Header=BB0_288 Depth=3 - ld a0, 216(sp) # 8-byte Folded Reload + ld a0, 208(sp) # 8-byte Folded Reload lw a1, 0(a0) - ld a0, 272(sp) # 8-byte Folded Reload + ld a0, 264(sp) # 8-byte Folded Reload add a0, a0, a7 sw a1, 0(a0) - ld a1, 232(sp) # 8-byte Folded Reload + ld a1, 224(sp) # 8-byte Folded Reload add a7, a1, a7 sw t6, 0(a7) .LBB0_340: # %for.cond501.preheader.i @@ -3185,7 +3182,7 @@ # %bb.344: # %land.lhs.true511.i.for.end527.i_crit_edge # in Loop: Header=BB0_288 Depth=3 mv s9, s6 - sd s1, 248(sp) # 8-byte Folded Spill + sd s1, 240(sp) # 8-byte Folded Spill j .LBB0_287 .LBB0_345: # %if.then62.i # in Loop: Header=BB0_224 Depth=2 @@ -3195,12 +3192,12 @@ addi s2, t0, 1 addi s3, a7, -1 li a0, 32 - mv s6, a6 + mv s4, a6 call xmalloc@plt mv s0, a0 sw s1, 0(a0) sw s2, 4(a0) - sw s6, 8(a0) + sw s4, 8(a0) sw s3, 12(a0) lw a2, 572(sp) lw a1, 568(sp) @@ -3222,8 +3219,9 @@ ld s10, 176(sp) # 8-byte Folded Reload ld s9, 304(sp) # 8-byte Folded Reload ld t5, 472(sp) # 8-byte Folded Reload + ld s4, 96(sp) # 8-byte Folded Reload mv s3, s5 - ld a5, 112(sp) # 8-byte Folded Reload + ld a5, 104(sp) # 8-byte Folded Reload li s6, 0 slli a2, a1, 32 srli a2, a2, 29 @@ -3231,6 +3229,7 @@ addiw a0, a1, 1 sw a0, 568(sp) sd s0, 0(a2) + ld s2, 272(sp) # 8-byte Folded Reload ld a4, 496(sp) # 8-byte Folded Reload lw a3, 36(s7) bnez a0, .LBB0_364 @@ -3262,14 +3261,15 @@ call free@plt mv a0, s0 call free@plt - ld a0, 240(sp) # 8-byte Folded Reload + ld a0, 232(sp) # 8-byte Folded Reload call free@plt - ld a0, 272(sp) # 8-byte Folded Reload + ld a0, 264(sp) # 8-byte Folded Reload call free@plt - ld a0, 232(sp) # 8-byte Folded Reload + ld a0, 224(sp) # 8-byte Folded Reload call free@plt ld s7, 296(sp) # 8-byte Folded Reload ld s10, 176(sp) # 8-byte Folded Reload + ld s2, 272(sp) # 8-byte Folded Reload j .LBB0_362 .LBB0_351: # %if.end535.i # in Loop: Header=BB0_224 Depth=2 @@ -3277,13 +3277,14 @@ add a0, s0, a1 lw a2, 0(a0) slli a5, s9, 2 - ld s6, 272(sp) # 8-byte Folded Reload + ld s6, 264(sp) # 8-byte Folded Reload add a3, s6, a5 lw s3, 0(a3) ld a4, 496(sp) # 8-byte Folded Reload subw a3, a4, a2 ld s7, 296(sp) # 8-byte Folded Reload ld s10, 176(sp) # 8-byte Folded Reload + ld s2, 272(sp) # 8-byte Folded Reload ld a0, 408(sp) # 8-byte Folded Reload blt a3, s3, .LBB0_353 # %bb.352: # %if.end535.i @@ -3291,18 +3292,18 @@ mv s3, a2 .LBB0_353: # %if.end535.i # in Loop: Header=BB0_224 Depth=2 - ld a2, 240(sp) # 8-byte Folded Reload + ld a2, 232(sp) # 8-byte Folded Reload add a1, a2, a1 lw s4, 0(a1) - ld s5, 136(sp) # 8-byte Folded Reload - ld s8, 128(sp) # 8-byte Folded Reload + ld s5, 128(sp) # 8-byte Folded Reload + ld s8, 120(sp) # 8-byte Folded Reload beqz s3, .LBB0_357 # %bb.354: # %if.then580.i # in Loop: Header=BB0_224 Depth=2 - ld a0, 232(sp) # 8-byte Folded Reload + ld a0, 224(sp) # 8-byte Folded Reload add a0, a0, a5 lw a0, 0(a0) - ld a1, 104(sp) # 8-byte Folded Reload + ld a1, 88(sp) # 8-byte Folded Reload addi s5, a1, 1 addi s6, s8, 1 subw a1, a1, t6 @@ -3338,18 +3339,19 @@ add a0, a0, a1 sd s2, 0(a0) ld s7, 296(sp) # 8-byte Folded Reload + ld s2, 272(sp) # 8-byte Folded Reload ld a4, 496(sp) # 8-byte Folded Reload - ld s5, 136(sp) # 8-byte Folded Reload - ld s8, 128(sp) # 8-byte Folded Reload + ld s5, 128(sp) # 8-byte Folded Reload + ld s8, 120(sp) # 8-byte Folded Reload ld a0, 408(sp) # 8-byte Folded Reload ld t6, 504(sp) # 8-byte Folded Reload - ld s6, 272(sp) # 8-byte Folded Reload + ld s6, 264(sp) # 8-byte Folded Reload .LBB0_357: # %if.end586.i # in Loop: Header=BB0_224 Depth=2 bgeu s3, a4, .LBB0_361 # %bb.358: # %if.then589.i # in Loop: Header=BB0_224 Depth=2 - ld a0, 104(sp) # 8-byte Folded Reload + ld a0, 88(sp) # 8-byte Folded Reload ld a1, 56(sp) # 8-byte Folded Reload add a0, a0, a1 subw a0, a0, t6 @@ -3388,6 +3390,7 @@ srli a1, a1, 29 add a0, a0, a1 sd s2, 0(a0) + ld s2, 272(sp) # 8-byte Folded Reload ld a0, 408(sp) # 8-byte Folded Reload .LBB0_361: # %if.end597.i # in Loop: Header=BB0_224 Depth=2 @@ -3400,11 +3403,11 @@ call free@plt mv a0, s0 call free@plt - ld a0, 240(sp) # 8-byte Folded Reload + ld a0, 232(sp) # 8-byte Folded Reload call free@plt mv a0, s6 call free@plt - ld a0, 232(sp) # 8-byte Folded Reload + ld a0, 224(sp) # 8-byte Folded Reload call free@plt add s6, s9, s1 .LBB0_362: # %greedy.exitthread-pre-split @@ -3412,12 +3415,12 @@ ld s11, 144(sp) # 8-byte Folded Reload ld s9, 304(sp) # 8-byte Folded Reload ld t5, 472(sp) # 8-byte Folded Reload - ld s4, 88(sp) # 8-byte Folded Reload + ld s4, 96(sp) # 8-byte Folded Reload ld a4, 496(sp) # 8-byte Folded Reload - ld s3, 80(sp) # 8-byte Folded Reload + ld s3, 72(sp) # 8-byte Folded Reload .LBB0_363: # %greedy.exitthread-pre-split # in Loop: Header=BB0_224 Depth=2 - ld a5, 112(sp) # 8-byte Folded Reload + ld a5, 104(sp) # 8-byte Folded Reload lw a0, 568(sp) lw a3, 36(s7) beqz a0, .LBB0_249 @@ -3425,7 +3428,7 @@ # in Loop: Header=BB0_224 Depth=2 ld a1, 200(sp) # 8-byte Folded Reload fld fa5, %pcrel_lo(.Lpcrel_hi6)(a1) - ld a1, 264(sp) # 8-byte Folded Reload + ld a1, 256(sp) # 8-byte Folded Reload fld fa3, %pcrel_lo(.Lpcrel_hi9)(a1) fcvt.d.wu fa4, a3 fcvt.d.w fa2, a4 @@ -3529,6 +3532,7 @@ sltu t1, t1, a0 sltu t2, t2, a1 or t1, t1, t2 + ld s2, 272(sp) # 8-byte Folded Reload ld t5, 472(sp) # 8-byte Folded Reload bnez t1, .LBB0_378 # %bb.374: # %land.rhs.i501.preheader @@ -3625,7 +3629,7 @@ call merge ld t5, 472(sp) # 8-byte Folded Reload sw zero, 568(sp) - ld s4, 256(sp) # 8-byte Folded Reload + ld s4, 248(sp) # 8-byte Folded Reload j .LBB0_222 .LBB0_387: # %if.then425 # in Loop: Header=BB0_224 Depth=2 @@ -3736,9 +3740,9 @@ mv a1, a0 mv a2, s8 mv a3, s3 - ld a5, 208(sp) # 8-byte Folded Reload - addi a7, sp, 624 - vl2r.v v8, (a7) # Unknown-size Folded Reload + addi a5, sp, 624 + vl2r.v v8, (a5) # Unknown-size Folded Reload + ld a5, 272(sp) # 8-byte Folded Reload .LBB0_400: # %vector.body1080 # Parent Loop BB0_6 Depth=1 # Parent Loop BB0_224 Depth=2 @@ -4773,7 +4777,7 @@ ld s5, 296(sp) # 8-byte Folded Reload li a2, 1 ld a6, 152(sp) # 8-byte Folded Reload - ld a7, 120(sp) # 8-byte Folded Reload + ld a7, 112(sp) # 8-byte Folded Reload ld s9, 304(sp) # 8-byte Folded Reload ld s10, 416(sp) # 8-byte Folded Reload ld t0, 432(sp) # 8-byte Folded Reload @@ -5257,11 +5261,11 @@ ld a0, 176(sp) # 8-byte Folded Reload ld s1, 16(a0) ld a0, 192(sp) # 8-byte Folded Reload - lw s6, 0(a0) + lw s7, 0(a0) sd zero, 0(s9) addi a0, s3, 1 sw a0, 520(sp) - addi a0, s6, 1 + addi a0, s7, 1 sw a0, 524(sp) sw zero, 528(sp) addiw a2, a2, -1 @@ -5271,15 +5275,15 @@ # in Loop: Header=BB0_6 Depth=1 li a0, 0 li s4, 0 - li s7, 0 + li s6, 0 li s10, 0 addi a1, s0, -1 sd a1, 496(sp) # 8-byte Folded Spill addi a1, s1, -1 sd a1, 488(sp) # 8-byte Folded Spill addi s5, sp, 520 - mv s8, s3 - sd s6, 512(sp) # 8-byte Folded Spill + mv s9, s3 + sd s7, 512(sp) # 8-byte Folded Spill sd s3, 504(sp) # 8-byte Folded Spill j .LBB0_582 .LBB0_580: # in Loop: Header=BB0_582 Depth=2 @@ -5307,11 +5311,11 @@ mul a2, a2, a4 divw a1, a2, a1 sw a1, 16(s11) - sd s7, 0(a3) - ld s7, 616(sp) - addi a2, s9, -1 + sd s6, 0(a3) + ld s6, 616(sp) + addi a2, s8, -1 mv s5, s11 - blez s9, .LBB0_625 + blez s8, .LBB0_625 .LBB0_582: # %for.body.i599 # Parent Loop BB0_6 Depth=1 # => This Loop Header: Depth=2 @@ -5319,7 +5323,7 @@ # Child Loop BB0_618 Depth 4 # Child Loop BB0_621 Depth 4 ld a1, 0(ra) - mv s9, a2 + mv s8, a2 slli a2, a2, 3 add a1, a1, a2 ld s11, 0(a1) @@ -5344,10 +5348,10 @@ li a1, 1 sb a1, 12(a0) sw s2, 8(a0) - sd s7, 0(a0) + sd s6, 0(a0) lw a4, 8(s11) lw a5, 12(s11) - mv s7, a0 + mv s6, a0 j .LBB0_590 .LBB0_586: # %if.then.i603 # in Loop: Header=BB0_582 Depth=2 @@ -5360,12 +5364,12 @@ ld a1, 0(a2) sd a1, 0(a0) sd a0, 0(a2) - sd s7, 8(a0) + sd s6, 8(a0) lw a1, 0(s5) sw a1, 16(a0) lw a2, 4(s5) sw a2, 20(a0) - subw a1, s8, a1 + subw a1, s9, a1 addi a1, a1, 1 sw a1, 24(a0) ld a1, 512(sp) # 8-byte Folded Reload @@ -5374,7 +5378,7 @@ sw a1, 28(a0) sw s4, 32(a0) lw a5, 12(s11) - li s7, 0 + li s6, 0 li s4, 0 .LBB0_588: # %if.end.i610 # in Loop: Header=BB0_582 Depth=2 @@ -5382,14 +5386,14 @@ sd a5, 512(sp) # 8-byte Folded Spill .LBB0_589: # %if.end34.i # in Loop: Header=BB0_582 Depth=2 - mv s8, a4 + mv s9, a4 .LBB0_590: # %if.end34.i # in Loop: Header=BB0_582 Depth=2 lw a3, 4(s11) lw a2, 0(s11) subw a0, a5, a3 addi a0, a0, 1 - ld a1, 264(sp) # 8-byte Folded Reload + ld a1, 256(sp) # 8-byte Folded Reload fld fa5, %pcrel_lo(.Lpcrel_hi9)(a1) fcvt.d.wu fa4, a0 .Lpcrel_hi11: @@ -5413,7 +5417,7 @@ lw a5, 12(s11) addiw a2, a2, -1 addiw a3, a3, -1 - sd s6, 16(sp) + sd s7, 16(sp) sd s3, 8(sp) addi a7, sp, 616 addi a0, sp, 608 @@ -5436,12 +5440,12 @@ # in Loop: Header=BB0_582 Depth=2 ld a0, 608(sp) lbu a1, 12(a0) + csrr a2, vlenb + slli a2, a2, 1 + add a2, sp, a2 + addi a2, a2, 624 + vl2r.v v16, (a2) # Unknown-size Folded Reload li a2, 1 - csrr a3, vlenb - slli a3, a3, 1 - add a3, sp, a3 - addi a3, a3, 624 - vl2r.v v16, (a3) # Unknown-size Folded Reload ld ra, 472(sp) # 8-byte Folded Reload bne a1, a2, .LBB0_599 # %bb.594: # %if.then76.i @@ -5450,21 +5454,21 @@ lw a2, 8(s11) subw a2, a2, a1 sw a2, 8(s11) - beqz s7, .LBB0_597 + beqz s6, .LBB0_597 # %bb.595: # %land.lhs.true86.i # in Loop: Header=BB0_582 Depth=2 - lbu a2, 12(s7) + lbu a2, 12(s6) li a3, 1 bne a2, a3, .LBB0_597 # %bb.596: # %if.then91.i630 # in Loop: Header=BB0_582 Depth=2 - lw a2, 8(s7) + lw a2, 8(s6) add a2, a2, a1 - sw a2, 8(s7) + sw a2, 8(s6) .LBB0_597: # %if.end95.i # in Loop: Header=BB0_582 Depth=2 subw s2, s2, a1 - subw s8, s8, a1 + subw s9, s9, a1 call free@plt ld a0, 600(sp) sd zero, 0(a0) @@ -5481,7 +5485,7 @@ .LBB0_599: # %if.end97.i # in Loop: Header=BB0_582 Depth=2 ld a0, 616(sp) - seqz a1, s9 + seqz a1, s8 snez a2, a0 and a1, a1, a2 beqz a1, .LBB0_604 @@ -5526,7 +5530,7 @@ beqz a0, .LBB0_580 .LBB0_605: # in Loop: Header=BB0_582 Depth=2 mv a0, s3 - ld t6, 208(sp) # 8-byte Folded Reload + ld t6, 272(sp) # 8-byte Folded Reload li s2, 3 ld s3, 504(sp) # 8-byte Folded Reload j .LBB0_607 @@ -5535,7 +5539,7 @@ lw a1, 0(s11) lw a2, 4(s11) add s4, s2, s4 - ld t6, 208(sp) # 8-byte Folded Reload + ld t6, 272(sp) # 8-byte Folded Reload li s2, 3 .LBB0_607: # %while.body.preheader.i # in Loop: Header=BB0_582 Depth=2 @@ -5681,77 +5685,74 @@ .LBB0_623: # %pluri_align.exit.thread # in Loop: Header=BB0_6 Depth=1 ld s7, 296(sp) # 8-byte Folded Reload - ld s6, 72(sp) # 8-byte Folded Reload ld s10, 176(sp) # 8-byte Folded Reload + ld s6, 480(sp) # 8-byte Folded Reload ld s9, 304(sp) # 8-byte Folded Reload j .LBB0_632 .LBB0_624: # in Loop: Header=BB0_6 Depth=1 li s10, 0 - ld s6, 72(sp) # 8-byte Folded Reload + ld s7, 296(sp) # 8-byte Folded Reload j .LBB0_631 .LBB0_625: # %for.end189.i # in Loop: Header=BB0_6 Depth=1 lw a0, 4(s11) addiw a0, a0, -1 seqz a1, a0 - xor a2, a0, s6 + xor a2, a0, s7 seqz a2, a2 or a1, a1, a2 beqz a1, .LBB0_628 # %bb.626: # %if.else215.i # in Loop: Header=BB0_6 Depth=1 - ld s9, 304(sp) # 8-byte Folded Reload - bne a0, s6, .LBB0_629 -# %bb.627: # in Loop: Header=BB0_6 Depth=1 - ld s7, 296(sp) # 8-byte Folded Reload - ld s6, 72(sp) # 8-byte Folded Reload - j .LBB0_631 -.LBB0_628: # %if.then197.i + beq a0, s7, .LBB0_630 +# %bb.627: # %if.then218.i # in Loop: Header=BB0_6 Depth=1 li a0, 40 call xmalloc@plt - ld s9, 304(sp) # 8-byte Folded Reload - ld a1, 0(s9) + ld a2, 304(sp) # 8-byte Folded Reload + ld a1, 0(a2) sd a1, 0(a0) - sd a0, 0(s9) + sd a0, 0(a2) lw a1, 0(s11) sw a1, 16(a0) - lw a2, 4(s11) + li a2, 1 sw a2, 20(a0) - subw a1, s8, a1 + subw a1, s9, a1 addi a1, a1, 1 sw a1, 24(a0) ld a1, 512(sp) # 8-byte Folded Reload - subw a1, a1, a2 - addi a1, a1, 1 - ld s6, 72(sp) # 8-byte Folded Reload - j .LBB0_630 -.LBB0_629: # %if.then218.i + j .LBB0_629 +.LBB0_628: # %if.then197.i # in Loop: Header=BB0_6 Depth=1 li a0, 40 call xmalloc@plt - ld a1, 0(s9) + ld a2, 304(sp) # 8-byte Folded Reload + ld a1, 0(a2) sd a1, 0(a0) - sd a0, 0(s9) + sd a0, 0(a2) lw a1, 0(s11) sw a1, 16(a0) - li a2, 1 + lw a2, 4(s11) sw a2, 20(a0) - subw a1, s8, a1 + subw a1, s9, a1 addi a1, a1, 1 sw a1, 24(a0) - ld s6, 72(sp) # 8-byte Folded Reload ld a1, 512(sp) # 8-byte Folded Reload -.LBB0_630: # %if.end236.sink.split.i + subw a1, a1, a2 + addi a1, a1, 1 +.LBB0_629: # %if.end236.sink.split.i # in Loop: Header=BB0_6 Depth=1 sw a1, 28(a0) - sd s7, 8(a0) + sd s6, 8(a0) sw s4, 32(a0) +.LBB0_630: # %pluri_align.exit + # in Loop: Header=BB0_6 Depth=1 ld s7, 296(sp) # 8-byte Folded Reload + ld s9, 304(sp) # 8-byte Folded Reload .LBB0_631: # %pluri_align.exit # in Loop: Header=BB0_6 Depth=1 - ld a0, 480(sp) # 8-byte Folded Reload - lw a0, 20(a0) + ld s6, 480(sp) # 8-byte Folded Reload + lw a0, 20(s6) sw s10, 36(s9) ld s10, 176(sp) # 8-byte Folded Reload beqz a0, .LBB0_632 --- build.head//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/Archive/Zip/ZipIn.s 2023-11-13 08:03:21.223591469 +0000 +++ build//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/Archive/Zip/ZipIn.s 2023-11-13 08:03:16.255735072 +0000 @@ -1484,9 +1484,9 @@ # Child Loop BB16_52 Depth 2 sd s11, 64(sp) vsetivli zero, 2, e64, m1, ta, ma + addi a0, sp, 112 + vl1r.v v8, (a0) # Unknown-size Folded Reload addi a0, sp, 72 - addi a1, sp, 112 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) .Ltmp6: addi a1, sp, 94 @@ -3865,9 +3865,9 @@ li a0, 4 sw a0, 116(sp) vsetivli zero, 2, e64, m1, ta, ma + addi a0, sp, 272 + vl1r.v v8, (a0) # Unknown-size Folded Reload addi a0, sp, 128 - addi a1, sp, 272 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) li a1, 8 sd a1, 144(sp) @@ -4313,9 +4313,9 @@ li a0, 4 sw a0, 156(sp) vsetivli zero, 2, e64, m1, ta, ma + addi a0, sp, 320 + vl1r.v v8, (a0) # Unknown-size Folded Reload addi a0, sp, 168 - addi a1, sp, 320 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) li a1, 8 sd a1, 184(sp) @@ -4560,9 +4560,9 @@ li a0, 4 sw a0, 156(sp) vsetivli zero, 2, e64, m1, ta, ma + addi a0, sp, 320 + vl1r.v v8, (a0) # Unknown-size Folded Reload addi a0, sp, 168 - addi a1, sp, 320 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) li a1, 8 sd a1, 184(sp) --- build.head//MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/btCompoundCollisionAlgorithm.s 2023-11-13 08:03:22.459555742 +0000 +++ build//MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/btCompoundCollisionAlgorithm.s 2023-11-13 08:03:17.495699229 +0000 @@ -2740,7 +2740,7 @@ addi a0, a0, 48 vs1r.v v12, (a0) # Unknown-size Folded Spill fmul.s fs2, fa5, fa2 - addi s5, sp, 36 + addi s4, sp, 36 addi s2, sp, 40 addi s7, sp, 20 addi s3, sp, 24 @@ -2783,9 +2783,9 @@ add a0, sp, a0 addi a0, a0, 48 vs1r.v v8, (a0) # Unknown-size Folded Spill - addi s4, sp, 16 + addi s5, sp, 16 vsetivli zero, 1, e32, mf2, ta, ma - vse32.v v8, (s4) + vse32.v v8, (s5) vsetivli zero, 2, e32, mf2, ta, ma vfadd.vv v8, v9, v10 csrr a0, vlenb @@ -2794,7 +2794,7 @@ add a0, sp, a0 addi a0, a0, 48 vs1r.v v8, (a0) # Unknown-size Folded Spill - vse32.v v8, (s5) + vse32.v v8, (s4) vse32.v v8, (s7) addi a1, sp, 32 addi a2, sp, 16 @@ -2816,9 +2816,9 @@ add a0, sp, a0 addi a0, a0, 48 vl1r.v v9, (a0) # Unknown-size Folded Reload - vse32.v v9, (s5) + vse32.v v9, (s4) sw zero, 28(sp) - vse32.v v8, (s4) + vse32.v v8, (s5) vslidedown.vi v8, v9, 1 csrr a0, vlenb slli a1, a0, 1 @@ -2856,7 +2856,7 @@ vsetivli zero, 2, e32, mf2, ta, ma ld a0, 0(s1) ld a4, 40(a0) - vse32.v v8, (s4) + vse32.v v8, (s5) fsub.s fs0, fs2, fs1 fsw fs0, 24(sp) addi a1, sp, 32 @@ -2906,7 +2906,7 @@ addi a0, a0, 48 vs1r.v v8, (a0) # Unknown-size Folded Spill vsetivli zero, 1, e32, mf2, ta, ma - vse32.v v8, (s4) + vse32.v v8, (s5) vsetivli zero, 2, e32, mf2, ta, ma csrr a0, vlenb slli a0, a0, 3 @@ -2922,7 +2922,7 @@ vfsub.vv v8, v8, v9 addi a0, sp, 48 vs1r.v v8, (a0) # Unknown-size Folded Spill - vse32.v v8, (s5) + vse32.v v8, (s4) vse32.v v8, (s7) addi a1, sp, 32 addi a2, sp, 16 @@ -2941,9 +2941,9 @@ vsetivli zero, 2, e32, mf2, ta, ma addi a0, sp, 48 vl1r.v v9, (a0) # Unknown-size Folded Reload - vse32.v v9, (s5) + vse32.v v9, (s4) sw zero, 28(sp) - vse32.v v8, (s4) + vse32.v v8, (s5) vslidedown.vi v8, v9, 1 vs1r.v v8, (a0) # Unknown-size Folded Spill vsetivli zero, 1, e32, mf2, ta, ma @@ -2972,7 +2972,7 @@ vsetivli zero, 2, e32, mf2, ta, ma ld a0, 0(s1) ld a4, 40(a0) - vse32.v v8, (s4) + vse32.v v8, (s5) fadd.s fs1, fs2, fs1 fsw fs1, 24(sp) addi a1, sp, 32 @@ -3019,7 +3019,7 @@ addi a0, a0, 48 vs1r.v v8, (a0) # Unknown-size Folded Spill vsetivli zero, 1, e32, mf2, ta, ma - vse32.v v8, (s4) + vse32.v v8, (s5) vsetivli zero, 2, e32, mf2, ta, ma csrr a0, vlenb slli a1, a0, 3 @@ -3044,7 +3044,7 @@ add a0, sp, a0 addi a0, a0, 48 vs1r.v v8, (a0) # Unknown-size Folded Spill - vse32.v v8, (s5) + vse32.v v8, (s4) vse32.v v8, (s7) addi a1, sp, 32 addi a2, sp, 16 @@ -3066,9 +3066,9 @@ add a0, sp, a0 addi a0, a0, 48 vl1r.v v9, (a0) # Unknown-size Folded Reload - vse32.v v9, (s5) + vse32.v v9, (s4) sw zero, 28(sp) - vse32.v v8, (s4) + vse32.v v8, (s5) vslidedown.vi v8, v9, 1 csrr a0, vlenb slli a0, a0, 2 @@ -3104,7 +3104,7 @@ vsetivli zero, 2, e32, mf2, ta, ma ld a0, 0(s1) ld a4, 40(a0) - vse32.v v8, (s4) + vse32.v v8, (s5) fsw fs1, 24(sp) addi a1, sp, 32 addi a2, sp, 16 @@ -3129,7 +3129,7 @@ add a0, sp, a0 addi a0, a0, 48 vl1r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s4) + vse32.v v8, (s5) vsetivli zero, 2, e32, mf2, ta, ma csrr a0, vlenb slli a1, a0, 3 @@ -3155,7 +3155,7 @@ add a0, sp, a0 addi a0, a0, 48 vs1r.v v8, (a0) # Unknown-size Folded Spill - vse32.v v8, (s5) + vse32.v v8, (s4) vse32.v v8, (s7) addi a1, sp, 32 addi a2, sp, 16 @@ -3177,9 +3177,9 @@ add a0, sp, a0 addi a0, a0, 48 vl1r.v v9, (a0) # Unknown-size Folded Reload - vse32.v v9, (s5) + vse32.v v9, (s4) sw zero, 28(sp) - vse32.v v8, (s4) + vse32.v v8, (s5) vslidedown.vi v8, v9, 1 csrr a0, vlenb slli a0, a0, 3 @@ -3215,7 +3215,7 @@ vsetivli zero, 2, e32, mf2, ta, ma ld a0, 0(s1) ld a4, 40(a0) - vse32.v v8, (s4) + vse32.v v8, (s5) fsw fs0, 24(sp) addi a1, sp, 32 addi a2, sp, 16 --- build.head//MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/BenchmarkDemo.s 2023-11-13 08:03:22.451555973 +0000 +++ build//MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/BenchmarkDemo.s 2023-11-13 08:03:17.487699460 +0000 @@ -4365,14 +4365,13 @@ beqz s1, .LBB14_13 # %bb.5: # %for.cond.preheader.lr.ph flw fa3, 0(s4) - flw fa2, 8(s4) + flw fs3, 8(s4) lui a0, 262144 fmv.w.x fa5, a0 fmv.w.x fa4, zero fsw fa3, 28(sp) # 4-byte Folded Spill fmadd.s fs4, fa3, fa5, fa4 - fmv.s fs3, fa2 - fmadd.s fs5, fa2, fa5, fa4 + fmadd.s fs5, fs3, fa5, fa4 negw a0, s1 fcvt.s.w fa3, a0 fmul.s fa2, fs5, fa3 @@ -6293,8 +6292,8 @@ auipc a0, %pcrel_hi(.LCPI17_32) ld a0, %pcrel_lo(.Lpcrel_hi65)(a0) lui a1, 259217 - addiw s2, a1, -37 - sw s2, 492(s1) + addiw s7, a1, -37 + sw s7, 492(s1) sd a0, 496(s1) .Lpcrel_hi66: auipc a0, %pcrel_hi(.LCPI17_33) @@ -6332,8 +6331,8 @@ vl1r.v v10, (a0) # Unknown-size Folded Reload vse32.v v10, (s8) fmul.s fa5, fs1, fa5 - fmv.x.w s7, fa5 - sw s7, 172(sp) + fmv.x.w s2, fa5 + sw s2, 172(sp) sd s3, 48(sp) # 8-byte Folded Spill sw s3, 168(sp) sw zero, 180(sp) @@ -6365,8 +6364,8 @@ .Ltmp298: flw fs5, 36(sp) # 4-byte Folded Reload # %bb.14: # %invoke.cont315 - sw s2, 492(s1) - sd s2, 496(s1) + sw s7, 492(s1) + sd s7, 496(s1) ld a0, 8(s0) sw s10, 476(s1) sd s6, 480(s1) @@ -6409,8 +6408,8 @@ addi a0, sp, 88 vse32.v v10, (a0) fmul.s fa5, fs1, fa5 - fmv.x.w s2, fa5 - sw s2, 108(sp) + fmv.x.w s7, fa5 + sw s7, 108(sp) sw s5, 104(sp) sw zero, 116(sp) sw s5, 112(sp) @@ -6445,7 +6444,7 @@ slli a2, a2, 32 srli s10, a2, 32 ld a3, 80(a1) - slli s7, s7, 32 + slli s3, s2, 32 slli s9, s9, 32 or s4, s9, s5 li a2, 1 @@ -6465,9 +6464,9 @@ vfmv.s.f v10, fa4 vsetivli zero, 2, e32, m1, tu, ma vslideup.vi v8, v10, 1 - addi s3, sp, 120 + addi s2, sp, 120 vsetivli zero, 8, e32, m2, ta, ma - vse32.v v8, (s3) + vse32.v v8, (s2) vsetivli zero, 4, e32, m1, ta, ma csrr a0, vlenb li a1, 6 @@ -6476,15 +6475,15 @@ addi a0, a0, 192 vl1r.v v10, (a0) # Unknown-size Folded Reload vse32.v v10, (s8) - or a0, s7, s10 - srli a1, s7, 32 + or a0, s3, s10 + srli a1, s3, 32 sw a1, 172(sp) sw a0, 168(sp) sw zero, 180(sp) sw s5, 176(sp) - addi s7, sp, 56 + addi s3, sp, 56 vsetivli zero, 8, e32, m2, ta, ma - vse32.v v8, (s7) + vse32.v v8, (s3) vsetivli zero, 4, e32, m1, ta, ma addi a0, sp, 88 vse32.v v10, (a0) @@ -6517,8 +6516,8 @@ slli s11, s11, 32 ld a3, 80(a1) or s4, s11, s5 - slli s2, s2, 32 - or s2, s2, s5 + slli s7, s7, 32 + or s7, s7, s5 li a2, 1 mv a1, s1 jalr a3 @@ -6528,7 +6527,7 @@ add a0, sp, a0 addi a0, a0, 192 vl2r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s3) + vse32.v v8, (s2) vsetivli zero, 4, e32, m1, ta, ma csrr a0, vlenb slli a1, a0, 1 @@ -6543,13 +6542,13 @@ sw zero, 180(sp) sw s5, 176(sp) vsetivli zero, 8, e32, m2, ta, ma - vse32.v v8, (s7) + vse32.v v8, (s3) vsetivli zero, 4, e32, m1, ta, ma addi a0, sp, 88 vse32.v v10, (a0) - srli a0, s2, 32 + srli a0, s7, 32 sw a0, 108(sp) - sw s2, 104(sp) + sw s7, 104(sp) sw zero, 116(sp) sw s5, 112(sp) li a0, 792 @@ -6718,13 +6717,13 @@ auipc a0, %pcrel_hi(.LCPI17_45) addi a0, a0, %pcrel_lo(.Lpcrel_hi78) vle32.v v8, (a0) + csrr a0, vlenb + slli a1, a0, 3 + sub a0, a1, a0 + add a0, sp, a0 + addi a0, a0, 192 + vl1r.v v9, (a0) # Unknown-size Folded Reload addi a0, sp, 124 - csrr a1, vlenb - slli a2, a1, 3 - sub a1, a2, a1 - add a1, sp, a1 - addi a1, a1, 192 - vl1r.v v9, (a1) # Unknown-size Folded Reload vse32.v v9, (a0) addi a0, sp, 140 vse32.v v8, (a0) @@ -6793,13 +6792,13 @@ vl2r.v v8, (a0) # Unknown-size Folded Reload vse32.v v8, (s3) vsetivli zero, 4, e32, m1, ta, ma + csrr a0, vlenb + slli a1, a0, 1 + add a0, a1, a0 + add a0, sp, a0 + addi a0, a0, 192 + vl1r.v v10, (a0) # Unknown-size Folded Reload addi a0, sp, 152 - csrr a1, vlenb - slli a2, a1, 1 - add a1, a2, a1 - add a1, sp, a1 - addi a1, a1, 192 - vl1r.v v10, (a1) # Unknown-size Folded Reload vse32.v v10, (a0) srli a0, s4, 32 sw a0, 172(sp) --- build.head//MultiSource/Benchmarks/mafft/CMakeFiles/pairlocalalign.dir/Lalignmm.s 2023-11-13 08:03:22.563552735 +0000 +++ build//MultiSource/Benchmarks/mafft/CMakeFiles/pairlocalalign.dir/Lalignmm.s 2023-11-13 08:03:17.595696338 +0000 @@ -5486,16 +5486,15 @@ flw fs8, 8(a1) flw fs9, 12(a1) flw ft6, 16(a1) - flw ft10, 20(a1) - flw fs3, 24(a1) - flw fa5, 28(a1) - fsw fa5, 140(sp) # 4-byte Folded Spill + flw fa4, 20(a1) + flw ft10, 24(a1) + flw fa2, 28(a1) flw ft7, 32(a1) flw fa6, 36(a1) flw fa7, 40(a1) flw fs10, 44(a1) flw ft8, 48(a1) - flw fa2, 52(a1) + flw ft9, 52(a1) flw ft11, 56(a1) flw fs0, 60(a1) flw fs1, 64(a1) @@ -5510,13 +5509,14 @@ flw fs7, 88(a1) flw fa5, 92(a1) fsw fa5, 24(sp) # 4-byte Folded Spill - flw ft9, 96(a1) + flw fa5, 96(a1) + fsw fa5, 20(sp) # 4-byte Folded Spill flw fa5, 100(a1) flw fs2, 104(a1) flw fa3, 108(a1) flw fs4, 112(a1) flw fa1, 116(a1) - flw fa4, 120(a1) + flw fs3, 120(a1) flw fs11, 124(a1) csrr a7, vlenb flw fa0, 128(a1) @@ -5528,34 +5528,34 @@ li a2, 10 fsw ft6, 104(sp) # 4-byte Folded Spill fsw ft7, 100(sp) # 4-byte Folded Spill - fsw fa6, 136(sp) # 4-byte Folded Spill + fsw fa6, 140(sp) # 4-byte Folded Spill fsw fa7, 96(sp) # 4-byte Folded Spill fsw ft11, 92(sp) # 4-byte Folded Spill - fsw fs0, 132(sp) # 4-byte Folded Spill + fsw fs0, 136(sp) # 4-byte Folded Spill fsw fs1, 88(sp) # 4-byte Folded Spill fsw fs5, 84(sp) # 4-byte Folded Spill fsw fs6, 80(sp) # 4-byte Folded Spill - fsw fs7, 128(sp) # 4-byte Folded Spill + fsw fs7, 132(sp) # 4-byte Folded Spill fsw fa5, 76(sp) # 4-byte Folded Spill fsw fa3, 72(sp) # 4-byte Folded Spill fsw fa1, 68(sp) # 4-byte Folded Spill - fsw fa4, 64(sp) # 4-byte Folded Spill + fsw fs3, 64(sp) # 4-byte Folded Spill fsw fs11, 60(sp) # 4-byte Folded Spill fsw fa0, 56(sp) # 4-byte Folded Spill fsw ft4, 52(sp) # 4-byte Folded Spill fsw ft0, 48(sp) # 4-byte Folded Spill fsw ft2, 44(sp) # 4-byte Folded Spill fsw ft5, 40(sp) # 4-byte Folded Spill - fsw ft3, 124(sp) # 4-byte Folded Spill + fsw ft3, 128(sp) # 4-byte Folded Spill bltu a1, a2, .LBB3_9 # %bb.8: fmv.s fa1, fs4 fmv.s fa3, fs2 + flw fa5, 20(sp) # 4-byte Folded Reload flw fs11, 24(sp) # 4-byte Folded Reload flw fs7, 28(sp) # 4-byte Folded Reload flw fs6, 32(sp) # 4-byte Folded Reload flw fs5, 36(sp) # 4-byte Folded Reload - fmv.s ft5, fa2 li a1, 0 j .LBB3_12 .LBB3_9: # %vector.ph @@ -5599,22 +5599,22 @@ add a3, sp, a3 addi a3, a3, 304 vs2r.v v8, (a3) # Unknown-size Folded Spill - vfmv.v.f v8, ft10 + vfmv.v.f v8, fa4 csrr a3, vlenb li t0, 40 mul a3, a3, t0 add a3, sp, a3 addi a3, a3, 304 vs2r.v v8, (a3) # Unknown-size Folded Spill - vfmv.v.f v8, fs3 + vfmv.v.f v8, ft10 csrr a3, vlenb li t0, 38 mul a3, a3, t0 add a3, sp, a3 addi a3, a3, 304 vs2r.v v8, (a3) # Unknown-size Folded Spill - flw ft3, 140(sp) # 4-byte Folded Reload - vfmv.v.f v8, ft3 + fmv.s ft3, fa2 + vfmv.v.f v8, fa2 csrr a3, vlenb li t0, 36 mul a3, a3, t0 @@ -5655,7 +5655,7 @@ add a3, sp, a3 addi a3, a3, 304 vs2r.v v8, (a3) # Unknown-size Folded Spill - vfmv.v.f v8, fa2 + vfmv.v.f v8, ft9 csrr a3, vlenb li t0, 24 mul a3, a3, t0 @@ -5700,23 +5700,23 @@ add s5, sp, s5 addi s5, s5, 304 vs2r.v v8, (s5) # Unknown-size Folded Spill - flw ft6, 36(sp) # 4-byte Folded Reload - vfmv.v.f v8, ft6 + flw fa2, 36(sp) # 4-byte Folded Reload + vfmv.v.f v8, fa2 csrr s5, vlenb slli s5, s5, 4 add s5, sp, s5 addi s5, s5, 304 vs2r.v v8, (s5) # Unknown-size Folded Spill - flw ft7, 32(sp) # 4-byte Folded Reload - vfmv.v.f v8, ft7 + flw ft6, 32(sp) # 4-byte Folded Reload + vfmv.v.f v8, ft6 csrr s5, vlenb li s6, 14 mul s5, s5, s6 add s5, sp, s5 addi s5, s5, 304 vs2r.v v8, (s5) # Unknown-size Folded Spill - flw fa7, 28(sp) # 4-byte Folded Reload - vfmv.v.f v8, fa7 + flw ft7, 28(sp) # 4-byte Folded Reload + vfmv.v.f v8, ft7 csrr s5, vlenb li s6, 12 mul s5, s5, s6 @@ -5743,14 +5743,15 @@ add s5, sp, s5 addi s5, s5, 304 vs2r.v v8, (s5) # Unknown-size Folded Spill - flw ft11, 24(sp) # 4-byte Folded Reload - vfmv.v.f v8, ft11 + flw fa7, 24(sp) # 4-byte Folded Reload + vfmv.v.f v8, fa7 csrr s5, vlenb slli s5, s5, 2 add s5, sp, s5 addi s5, s5, 304 vs2r.v v8, (s5) # Unknown-size Folded Spill - vfmv.v.f v8, ft9 + flw ft11, 20(sp) # 4-byte Folded Reload + vfmv.v.f v8, ft11 csrr s5, vlenb slli s5, s5, 1 add s5, sp, s5 @@ -5763,17 +5764,18 @@ vfmv.v.f v30, fa3 vfmv.v.f v0, fs4 vfmv.v.f v2, fa1 - vfmv.v.f v4, fa4 + vfmv.v.f v4, fs3 vfmv.v.f v6, fs11 vfmv.v.f v8, fa0 vfmv.v.f v10, ft4 vfmv.v.f v12, ft0 vfmv.v.f v14, ft2 vfmv.v.f v16, ft5 - fmv.s fs5, ft6 - fmv.s fs6, ft7 - fmv.s fs7, fa7 - fmv.s fs11, ft11 + fmv.s fs5, fa2 + fmv.s fs6, ft6 + fmv.s fs7, ft7 + fmv.s fs11, fa7 + fmv.s fa5, ft11 .LBB3_10: # %vector.body # =>This Inner Loop Header: Depth=1 add s5, t1, a2 @@ -6083,12 +6085,13 @@ # %bb.11: fmv.s fa1, fs4 fmv.s fa3, fs2 - fmv.s ft5, fa2 + fmv.s fa2, ft3 .LBB3_12: # %for.body31.preheader - fsw ft5, 108(sp) # 4-byte Folded Spill + fsw ft9, 108(sp) # 4-byte Folded Spill fsw fs10, 112(sp) # 4-byte Folded Spill - fsw fs8, 116(sp) # 4-byte Folded Spill - fsw ft10, 120(sp) # 4-byte Folded Spill + fsw fa2, 116(sp) # 4-byte Folded Spill + fsw fs8, 120(sp) # 4-byte Folded Spill + fsw fa4, 124(sp) # 4-byte Folded Spill fmv.w.x fa0, zero .Lpcrel_hi45: auipc a2, %got_pcrel_hi(ribosumdis) @@ -6100,7 +6103,7 @@ addi a1, a1, -37 fmv.s ft11, fs9 flw ft6, 104(sp) # 4-byte Folded Reload - fmv.s fa6, fs3 + fmv.s fa6, ft10 flw fs1, 100(sp) # 4-byte Folded Reload flw ft10, 96(sp) # 4-byte Folded Reload fmv.s fs0, ft8 @@ -6108,7 +6111,6 @@ flw fs4, 88(sp) # 4-byte Folded Reload flw fs8, 84(sp) # 4-byte Folded Reload flw fs9, 80(sp) # 4-byte Folded Reload - fmv.s fa5, ft9 flw fa4, 76(sp) # 4-byte Folded Reload flw fa2, 72(sp) # 4-byte Folded Reload flw ft4, 68(sp) # 4-byte Folded Reload @@ -6128,11 +6130,11 @@ lw a7, 296(a3) fmv.s ft2, ft1 fcvt.s.w ft1, t0 - flw ft8, 124(sp) # 4-byte Folded Reload + flw ft8, 128(sp) # 4-byte Folded Reload fmadd.s ft0, ft1, ft8, ft0 lw t0, 444(a3) fcvt.s.w ft1, a7 - flw ft8, 116(sp) # 4-byte Folded Reload + flw ft8, 120(sp) # 4-byte Folded Reload fmadd.s ft0, ft1, ft8, ft0 lw a7, 592(a3) fcvt.s.w ft1, t0 @@ -6142,21 +6144,21 @@ fmadd.s ft0, ft1, ft6, ft0 lw a7, 888(a3) fcvt.s.w ft1, t0 - flw ft8, 120(sp) # 4-byte Folded Reload + flw ft8, 124(sp) # 4-byte Folded Reload fmadd.s ft0, ft1, ft8, ft0 lw t0, 1036(a3) fcvt.s.w ft1, a7 fmadd.s ft0, ft1, fa6, ft0 lw a7, 1184(a3) fcvt.s.w ft1, t0 - flw ft8, 140(sp) # 4-byte Folded Reload + flw ft8, 116(sp) # 4-byte Folded Reload fmadd.s ft0, ft1, ft8, ft0 lw t0, 1332(a3) fcvt.s.w ft1, a7 fmadd.s ft0, ft1, fs1, ft0 lw a7, 1480(a3) fcvt.s.w ft1, t0 - flw ft8, 136(sp) # 4-byte Folded Reload + flw ft8, 140(sp) # 4-byte Folded Reload fmadd.s ft0, ft1, ft8, ft0 lw t0, 1628(a3) fcvt.s.w ft1, a7 @@ -6179,7 +6181,7 @@ fmadd.s ft0, ft1, fs2, ft0 lw t2, -1332(a7) fcvt.s.w ft1, t1 - flw ft8, 132(sp) # 4-byte Folded Reload + flw ft8, 136(sp) # 4-byte Folded Reload fmadd.s ft0, ft1, ft8, ft0 lw t1, -1184(a7) fcvt.s.w ft1, t2 @@ -6201,7 +6203,7 @@ fmadd.s ft0, ft1, fs9, ft0 lw t1, -296(a7) fcvt.s.w ft1, t2 - flw ft8, 128(sp) # 4-byte Folded Reload + flw ft8, 132(sp) # 4-byte Folded Reload fmadd.s ft0, ft1, ft8, ft0 lw t2, -148(a7) fcvt.s.w ft1, t1 --- build.head//MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/terminator.s 2023-11-13 08:03:22.379558054 +0000 +++ build//MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/terminator.s 2023-11-13 08:03:17.423701310 +0000 @@ -718,16 +718,16 @@ .Lpcrel_hi26: auipc a0, %got_pcrel_hi(cont_LASTBINDING) ld a0, %pcrel_lo(.Lpcrel_hi26)(a0) - ld a2, 0(a0) - addi a1, sp, 176 - vl1r.v v8, (a1) # Unknown-size Folded Reload - beqz a2, .LBB1_63 + ld a1, 0(a0) + addi a2, sp, 176 + vl1r.v v8, (a2) # Unknown-size Folded Reload + beqz a1, .LBB1_63 # %bb.61: # %while.body.preheader.i # in Loop: Header=BB1_41 Depth=2 .Lpcrel_hi27: - auipc a1, %got_pcrel_hi(cont_BINDINGS) - ld a1, %pcrel_lo(.Lpcrel_hi27)(a1) - lw a3, 0(a1) + auipc a2, %got_pcrel_hi(cont_BINDINGS) + ld a2, %pcrel_lo(.Lpcrel_hi27)(a2) + lw a3, 0(a2) addi a3, a3, -1 vsetivli zero, 4, e32, m1, ta, ma .LBB1_62: # %while.body.i @@ -737,18 +737,18 @@ .Lpcrel_hi28: auipc a4, %got_pcrel_hi(cont_CURRENTBINDING) ld a4, %pcrel_lo(.Lpcrel_hi28)(a4) - sd a2, 0(a4) - ld a5, 24(a2) + sd a1, 0(a4) + ld a5, 24(a1) sd a5, 0(a0) - addi a5, a2, 4 - sw zero, 20(a2) + addi a5, a1, 4 + sw zero, 20(a1) vse32.v v8, (a5) ld a4, 0(a4) - ld a2, 0(a0) + ld a1, 0(a0) sd zero, 24(a4) - sw a3, 0(a1) + sw a3, 0(a2) addi a3, a3, -1 - bnez a2, .LBB1_62 + bnez a1, .LBB1_62 .LBB1_63: # %cont_Reset.exit # in Loop: Header=BB1_41 Depth=2 .Lpcrel_hi29: --- build.head//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/Archive/7z/7zIn.s 2023-11-13 08:03:21.207591931 +0000 +++ build//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/Archive/7z/7zIn.s 2023-11-13 08:03:16.239735533 +0000 @@ -2289,52 +2289,52 @@ vse64.v v8, (a0) mv a0, s0 call _ZN17CBaseRecordVector18ReserveOnePositionEv@plt - lw a4, 12(s0) + lw a3, 12(s0) ld a0, 16(s0) - slli a1, a4, 3 + slli a1, a3, 3 add a0, a0, a1 sd s3, 0(a0) ld a0, 40(s1) ld a2, 16(a0) - ld a3, 8(a0) - addi a4, a4, 1 - sw a4, 12(s0) - bgeu a2, a3, .LBB20_60 + ld a4, 8(a0) + addi a3, a3, 1 + sw a3, 12(s0) + bgeu a2, a4, .LBB20_60 # %bb.4: # %_ZN8NArchive3N7z10CInArchive8ReadByteEv.exit # in Loop: Header=BB20_3 Depth=1 - ld a4, 0(a0) + ld a3, 0(a0) ld a5, 16(s0) addi a6, a2, 1 sd a6, 16(a0) - add a7, a4, a2 + add a7, a3, a2 lbu s11, 0(a7) add a1, a5, a1 ld s9, 0(a1) andi a1, s11, 15 - sub a3, a3, a6 - bltu a3, a1, .LBB20_63 + sub a4, a4, a6 + bltu a4, a1, .LBB20_63 # %bb.5: # %for.cond.preheader.i.i # in Loop: Header=BB20_3 Depth=1 - csrr a3, vlenb - slli a3, a3, 2 - add a3, sp, a3 - addi a3, a3, 48 - vl2r.v v18, (a3) # Unknown-size Folded Reload - csrr a3, vlenb - slli a5, a3, 1 - add a3, a5, a3 - add a3, sp, a3 - addi a3, a3, 48 - vl1r.v v20, (a3) # Unknown-size Folded Reload - csrr a3, vlenb - slli a3, a3, 1 - add a3, sp, a3 - addi a3, a3, 48 - vl1r.v v21, (a3) # Unknown-size Folded Reload + csrr a4, vlenb + slli a4, a4, 2 + add a4, sp, a4 + addi a4, a4, 48 + vl2r.v v18, (a4) # Unknown-size Folded Reload + csrr a4, vlenb + slli a5, a4, 1 + add a4, a5, a4 + add a4, sp, a4 + addi a4, a4, 48 + vl1r.v v20, (a4) # Unknown-size Folded Reload + csrr a4, vlenb + slli a4, a4, 1 + add a4, sp, a4 + addi a4, a4, 48 + vl1r.v v21, (a4) # Unknown-size Folded Reload beqz a1, .LBB20_13 # %bb.6: # %for.body.i.i.preheader # in Loop: Header=BB20_3 Depth=1 - addi a3, a4, 1 + addi a3, a3, 1 addi a4, sp, 25 mv a5, a1 .LBB20_7: # %for.body.i.i @@ -4340,9 +4340,9 @@ .LBB28_50: # %if.then78 # in Loop: Header=BB28_46 Depth=1 vsetivli zero, 2, e64, m1, ta, ma + addi a0, sp, 128 + vl1r.v v8, (a0) # Unknown-size Folded Reload addi a0, sp, 96 - addi a1, sp, 128 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) sd s11, 112(sp) ld a0, 48(sp) # 8-byte Folded Reload @@ -5265,7 +5265,7 @@ ld a0, 488(sp) slli a1, s10, 3 add a0, a0, a1 - ld s6, 0(a0) + ld s7, 0(a0) .Ltmp100: li a0, 24 call _Znwm@plt @@ -5299,16 +5299,16 @@ addi a0, a0, 1 sw a0, 12(s2) add a1, a1, a2 - lw a0, 108(s6) + lw a0, 108(s7) ld s1, 0(a1) beqz a0, .LBB32_14 # %bb.7: # %for.cond.preheader.i # in Loop: Header=BB32_4 Depth=1 - lw a1, 44(s6) + lw a1, 44(s7) blez a1, .LBB32_15 # %bb.8: # %for.cond.us.i.preheader # in Loop: Header=BB32_4 Depth=1 - ld a2, 48(s6) + ld a2, 48(s7) slli a1, a1, 32 srli a1, a1, 32 addi a2, a2, 4 @@ -5353,12 +5353,12 @@ addiw a0, a0, -1 .LBB32_17: # %if.end # in Loop: Header=BB32_4 Depth=1 - ld a1, 112(s6) + ld a1, 112(s7) slli a0, a0, 3 add a0, a1, a0 ld s8, 0(a0) - ld s7, 8(s1) - beq s7, s8, .LBB32_27 + ld s6, 8(s1) + beq s6, s8, .LBB32_27 # %bb.18: # %if.end.i # in Loop: Header=BB32_4 Depth=1 beqz s8, .LBB32_39 @@ -5371,18 +5371,18 @@ # %bb.20: # %call.i.noexc67 # in Loop: Header=BB32_4 Depth=1 mv s5, a0 - beqz s7, .LBB32_24 + beqz s6, .LBB32_24 # %bb.21: # %if.then6.i # in Loop: Header=BB32_4 Depth=1 - bltu s7, s8, .LBB32_23 + bltu s6, s8, .LBB32_23 # %bb.22: # %if.then6.i # in Loop: Header=BB32_4 Depth=1 - mv s7, s8 + mv s6, s8 .LBB32_23: # %if.then6.i # in Loop: Header=BB32_4 Depth=1 ld a1, 16(s1) mv a0, s5 - mv a2, s7 + mv a2, s6 call memmove@plt .LBB32_24: # %if.end10.i # in Loop: Header=BB32_4 Depth=1 @@ -5431,7 +5431,7 @@ ld a2, 96(sp) # 8-byte Folded Reload sd a2, 0(sp) mv a2, s4 - mv a4, s6 + mv a4, s7 mv a5, s5 li a6, 0 ld a7, 88(sp) # 8-byte Folded Reload @@ -5439,11 +5439,11 @@ .Ltmp118: # %bb.30: # %invoke.cont57 # in Loop: Header=BB32_4 Depth=1 - mv s7, a0 + mv s6, a0 bnez a0, .LBB32_50 # %bb.31: # %cleanup.cont # in Loop: Header=BB32_4 Depth=1 - lbu a0, 132(s6) + lbu a0, 132(s7) beqz a0, .LBB32_34 # %bb.32: # %if.then62 # in Loop: Header=BB32_4 Depth=1 @@ -5454,11 +5454,11 @@ .Ltmp120: # %bb.33: # %invoke.cont65 # in Loop: Header=BB32_4 Depth=1 - lw a1, 128(s6) + lw a1, 128(s7) bne a0, a1, .LBB32_58 .LBB32_34: # %if.end71 # in Loop: Header=BB32_4 Depth=1 - lw a2, 76(s6) + lw a2, 76(s7) blez a2, .LBB32_50 # %bb.35: # %for.body78.lr.ph # in Loop: Header=BB32_4 Depth=1 @@ -5578,14 +5578,14 @@ .Ltmp129: # %bb.51: # %_ZN9CMyComPtrI20ISequentialOutStreamED2Ev.exit91 # in Loop: Header=BB32_4 Depth=1 - bnez s7, .LBB32_54 + bnez s6, .LBB32_54 # %bb.52: # %for.cond # in Loop: Header=BB32_4 Depth=1 lw a0, 484(sp) addi s10, s10, 1 blt s10, a0, .LBB32_4 .LBB32_53: - li s7, 0 + li s6, 0 .LBB32_54: # %cleanup108 addi a0, sp, 112 call _ZN8NArchive3N7z8CDecoderD2Ev @@ -5612,7 +5612,7 @@ call _ZN17CBaseRecordVectorD2Ev@plt addi a0, sp, 568 call _ZN17CBaseRecordVectorD2Ev@plt - mv a0, s7 + mv a0, s6 csrr a1, vlenb slli a1, a1, 2 add sp, sp, a1 @@ -6106,8 +6106,8 @@ sd a0, 304(sp) .Lpcrel_hi73: auipc a0, %pcrel_hi(_ZTV13CRecordVectorIbE+16) - addi s11, a0, %pcrel_lo(.Lpcrel_hi73) - sd s11, 280(sp) + addi s10, a0, %pcrel_lo(.Lpcrel_hi73) + sd s10, 280(sp) addi a0, sp, 256 vse64.v v8, (a0) li a0, 4 @@ -6437,7 +6437,7 @@ vse64.v v8, (a0) li a0, 1 sd a0, 240(sp) - sd s11, 216(sp) + sd s10, 216(sp) .Ltmp189: addi a0, sp, 216 call _ZN17CBaseRecordVector5ClearEv@plt @@ -6468,7 +6468,7 @@ bnez s4, .LBB35_58 .LBB35_60: # %invoke.cont114 sd s9, 88(sp) # 8-byte Folded Spill - li s10, 0 + li s9, 0 addi a0, sp, 192 vsetivli zero, 2, e64, m1, ta, ma csrr a1, vlenb @@ -6480,12 +6480,12 @@ vse64.v v8, (a0) li a1, 1 sd a1, 208(sp) - sd s11, 184(sp) + sd s10, 184(sp) addi a0, sp, 160 vse64.v v8, (a0) sd a1, 176(sp) - sd s11, 72(sp) # 8-byte Folded Spill - sd s11, 152(sp) + sd s10, 72(sp) # 8-byte Folded Spill + sd s10, 152(sp) addi a0, s0, 320 sd a0, 64(sp) # 8-byte Folded Spill addi a0, s0, 256 @@ -6493,7 +6493,7 @@ addi a0, s0, 192 sd a0, 48(sp) # 8-byte Folded Spill addi s11, s0, 384 - lui s9, 262144 + lui s10, 262144 .Lpcrel_hi78: auipc a0, %pcrel_hi(.LJTI35_0) addi s8, a0, %pcrel_lo(.Lpcrel_hi78) @@ -6543,7 +6543,7 @@ mv s5, a0 ld a0, 40(s1) ld s7, 16(a0) - bgeu s9, s4, .LBB35_68 + bgeu s10, s4, .LBB35_68 .LBB35_66: # %if.else260 # in Loop: Header=BB35_62 Depth=1 ld a1, 8(a0) @@ -6607,7 +6607,7 @@ .LBB35_77: # %sw.bb220.invoke # in Loop: Header=BB35_62 Depth=1 .Ltmp208: - sext.w a1, s10 + sext.w a1, s9 mv a0, s1 mv a2, a3 call _ZN8NArchive3N7z10CInArchive14ReadBoolVectorEiR13CRecordVectorIbE @@ -6863,7 +6863,7 @@ vsetvli a5, zero, e32, m1, tu, ma addi a5, sp, 384 vl1r.v v10, (a5) # Unknown-size Folded Reload - vmv.s.x v10, s10 + vmv.s.x v10, s9 csrr a5, vlenb add a5, sp, a5 addi a5, a5, 384 @@ -6884,7 +6884,7 @@ # in Loop: Header=BB35_62 Depth=1 vmv.s.x v10, zero vredsum.vs v8, v8, v10 - vmv.x.s s10, v8 + vmv.x.s s9, v8 beq a0, a2, .LBB35_117 .LBB35_116: # %for.body208 # Parent Loop BB35_62 Depth=1 @@ -6893,7 +6893,7 @@ add a3, a1, a3 lbu a3, 0(a3) addiw a2, a2, 1 - add s10, s10, a3 + add s9, s9, a3 bne a0, a2, .LBB35_116 .LBB35_117: # %for.end217 # in Loop: Header=BB35_62 Depth=1 @@ -6904,7 +6904,7 @@ # %bb.118: # %.noexc288 # in Loop: Header=BB35_62 Depth=1 .Ltmp214: - sext.w s6, s10 + sext.w s6, s9 addi a0, sp, 184 mv a1, s6 call _ZN17CBaseRecordVector7ReserveEi@plt @@ -6914,7 +6914,7 @@ blez s6, .LBB35_123 # %bb.120: # %for.body.i281.preheader # in Loop: Header=BB35_62 Depth=1 - mv s3, s10 + mv s3, s9 .LBB35_121: # %for.body.i281 # Parent Loop BB35_62 Depth=1 # => This Inner Loop Header: Depth=2 @@ -6950,7 +6950,7 @@ blez s6, .LBB35_82 # %bb.126: # %for.body.i296.preheader # in Loop: Header=BB35_62 Depth=1 - mv s3, s10 + mv s3, s9 .LBB35_127: # %for.body.i296 # Parent Loop BB35_62 Depth=1 # => This Inner Loop Header: Depth=2 @@ -6970,7 +6970,7 @@ bnez s3, .LBB35_127 j .LBB35_82 .LBB35_129: # %for.cond290.preheader - sext.w a0, s10 + sext.w a0, s9 beqz a0, .LBB35_134 # %bb.130: # %for.body292.lr.ph ld a5, 80(sp) # 8-byte Folded Reload @@ -6982,7 +6982,7 @@ .LBB35_132: # %for.body292.lr.ph ld a1, 168(sp) sltu a2, a0, a2 - addiw a3, s10, -1 + addiw a3, s9, -1 slti a3, a3, 0 or a2, a2, a3 beqz a2, .LBB35_135 @@ -7000,7 +7000,7 @@ li a3, 0 srli a5, a5, 1 neg a2, a5 - and a2, s10, a2 + and a2, s9, a2 sext.w a4, a2 vsetvli a6, zero, e32, m2, ta, ma csrr a6, vlenb --- build.head//MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_mspack.s 2023-11-13 08:03:22.195563373 +0000 +++ build//MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_mspack.s 2023-11-13 08:03:17.251706281 +0000 @@ -7736,15 +7736,15 @@ .LBB7_582: # %do.body441 # in Loop: Header=BB7_64 Depth=2 vsetivli zero, 2, e64, m1, ta, ma + csrr a0, vlenb + add a0, sp, a0 + addi a0, a0, 208 + vl1r.v v8, (a0) # Unknown-size Folded Reload ld a0, 96(sp) # 8-byte Folded Reload - csrr a1, vlenb - add a1, sp, a1 - addi a1, a1, 208 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) + addi a0, sp, 208 + vl1r.v v8, (a0) # Unknown-size Folded Reload ld a0, 88(sp) # 8-byte Folded Reload - addi a1, sp, 208 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) li a3, 249 mv a0, s0 @@ -8758,16 +8758,16 @@ ld s8, 112(s0) ld s6, 120(s0) lw s4, 144(s0) - lw s3, 148(s0) + lw s2, 148(s0) li s9, 3 li s1, -12 - li s2, 1 + li s3, 1 j .LBB10_2 .LBB10_1: # %while.end # in Loop: Header=BB10_2 Depth=1 srliw a0, s4, 28 slliw s4, s4, 4 - addiw s3, s3, -4 + addiw s2, s2, -4 add a1, s0, s7 addi s7, s7, 1 sb a0, 156(a1) @@ -8776,11 +8776,11 @@ .LBB10_2: # %while.cond.preheader # =>This Loop Header: Depth=1 # Child Loop BB10_6 Depth 2 - blt s9, s3, .LBB10_1 + blt s9, s2, .LBB10_1 # %bb.3: # %while.body.preheader # in Loop: Header=BB10_2 Depth=1 li a0, 16 - subw s11, a0, s3 + subw s11, a0, s2 j .LBB10_6 .LBB10_4: # %if.end # in Loop: Header=BB10_6 Depth=2 @@ -8798,7 +8798,7 @@ or a0, a0, a1 sllw a0, a0, s11 or s4, a0, s4 - addiw s3, s10, 16 + addiw s2, s10, 16 addi s8, s8, 2 addi s11, s11, -16 bge s10, s1, .LBB10_1 @@ -8806,7 +8806,7 @@ # Parent Loop BB10_2 Depth=1 # => This Inner Loop Header: Depth=2 addi a0, s8, 1 - mv s10, s3 + mv s10, s2 bltu a0, s6, .LBB10_5 # %bb.7: # %if.then # in Loop: Header=BB10_6 Depth=2 @@ -8838,7 +8838,7 @@ sb zero, 1(a0) ld a0, 104(s0) sb zero, 0(a0) - sb s2, 92(s0) + sb s3, 92(s0) li a0, 2 j .LBB10_4 .LBB10_13: # %if.then9.i @@ -8890,13 +8890,14 @@ j .LBB10_16 .LBB10_21: # %for.cond32.preheader ld s10, 48(sp) # 8-byte Folded Reload - ld a6, 40(sp) # 8-byte Folded Reload - bgeu a6, s10, .LBB10_126 + ld s3, 40(sp) # 8-byte Folded Reload + bgeu s3, s10, .LBB10_123 # %bb.22: # %while.cond37.preheader.preheader csrr a0, vlenb sd a0, 16(sp) # 8-byte Folded Spill - slli a7, a0, 1 - li t0, 15 + slli a0, a0, 1 + sd a0, 24(sp) # 8-byte Folded Spill + li t1, 15 li s9, 104 li s11, 19 vsetivli zero, 16, e8, m1, ta, ma @@ -8909,26 +8910,25 @@ add a0, sp, a0 addi a0, a0, 64 vs2r.v v10, (a0) # Unknown-size Folded Spill - sd a7, 24(sp) # 8-byte Folded Spill .LBB10_23: # %while.cond37.preheader # =>This Loop Header: Depth=1 # Child Loop BB10_28 Depth 2 # Child Loop BB10_36 Depth 2 - # Child Loop BB10_100 Depth 2 - # Child Loop BB10_49 Depth 2 - # Child Loop BB10_111 Depth 2 + # Child Loop BB10_97 Depth 2 + # Child Loop BB10_48 Depth 2 + # Child Loop BB10_108 Depth 2 + # Child Loop BB10_112 Depth 2 + # Child Loop BB10_60 Depth 2 # Child Loop BB10_115 Depth 2 - # Child Loop BB10_61 Depth 2 - # Child Loop BB10_118 Depth 2 - # Child Loop BB10_89 Depth 2 - # Child Loop BB10_73 Depth 2 - # Child Loop BB10_123 Depth 2 - mv s7, a6 - blt t0, s3, .LBB10_34 + # Child Loop BB10_87 Depth 2 + # Child Loop BB10_72 Depth 2 + # Child Loop BB10_120 Depth 2 + mv s7, s3 + blt t1, s2, .LBB10_34 # %bb.24: # %while.body40.preheader # in Loop: Header=BB10_23 Depth=1 li a0, 16 - subw s1, a0, s3 + subw s1, a0, s2 j .LBB10_28 .LBB10_25: # %if.else.i200 # in Loop: Header=BB10_28 Depth=2 @@ -8955,15 +8955,15 @@ or a0, a0, a1 sllw a0, a0, s1 or s4, a0, s4 - addiw s3, s2, 16 + addiw s2, s3, 16 addi s8, s8, 2 addi s1, s1, -16 - bgez s2, .LBB10_34 + bgez s3, .LBB10_34 .LBB10_28: # %while.body40 # Parent Loop BB10_23 Depth=1 # => This Inner Loop Header: Depth=2 addi a0, s8, 1 - mv s2, s3 + mv s3, s2 bltu a0, s6, .LBB10_27 # %bb.29: # %if.then44 # in Loop: Header=BB10_28 Depth=2 @@ -8993,7 +8993,7 @@ # in Loop: Header=BB10_28 Depth=2 lbu a0, 92(s0) beqz a0, .LBB10_25 - j .LBB10_131 + j .LBB10_128 .LBB10_34: # %while.end66 # in Loop: Header=BB10_23 Depth=1 srliw a0, s4, 26 @@ -9005,18 +9005,20 @@ # %bb.35: # %do.body75.preheader # in Loop: Header=BB10_23 Depth=1 lui a1, 16384 - mv a6, s7 + mv s3, s7 + li t1, 15 + li s7, -12 .LBB10_36: # %do.body75 # Parent Loop BB10_23 Depth=1 # => This Inner Loop Header: Depth=2 srliw a1, a1, 1 - beqz a1, .LBB10_128 + beqz a1, .LBB10_125 # %bb.37: # %if.end81 # in Loop: Header=BB10_36 Depth=2 slli a0, a0, 1 slli a2, a0, 48 srli a2, a2, 48 - bgeu a2, s9, .LBB10_129 + bgeu a2, s9, .LBB10_126 # %bb.38: # %if.end94 # in Loop: Header=BB10_36 Depth=2 and a2, a1, s4 @@ -9030,49 +9032,48 @@ bltu s11, a0, .LBB10_36 j .LBB10_40 .LBB10_39: # in Loop: Header=BB10_23 Depth=1 - mv a6, s7 + mv s3, s7 + li t1, 15 + li s7, -12 .LBB10_40: # %if.end103 # in Loop: Header=BB10_23 Depth=1 add a1, s0, a0 lbu a2, 156(a1) sllw s4, s4, a2 - subw a1, s3, a2 + subw a1, s2, a2 li a3, 17 - beq a0, a3, .LBB10_69 + beq a0, a3, .LBB10_68 # %bb.41: # %if.end103 # in Loop: Header=BB10_23 Depth=1 - li t0, 15 li a3, 18 - beq a0, a3, .LBB10_57 + beq a0, a3, .LBB10_56 # %bb.42: # %if.end103 # in Loop: Header=BB10_23 Depth=1 - bne a0, s11, .LBB10_81 + bne a0, s11, .LBB10_80 # %bb.43: # %while.cond213.preheader # in Loop: Header=BB10_23 Depth=1 - blez a1, .LBB10_97 -# %bb.44: # in Loop: Header=BB10_23 Depth=1 - ld s3, 32(sp) # 8-byte Folded Reload -.LBB10_45: # %while.end242 + blez a1, .LBB10_94 +.LBB10_44: # %while.end242 # in Loop: Header=BB10_23 Depth=1 slliw s10, s4, 1 li a0, 16 - bltu a0, a1, .LBB10_94 -# %bb.46: # %while.body253.preheader + bltu a0, a1, .LBB10_91 +# %bb.45: # %while.body253.preheader # in Loop: Header=BB10_23 Depth=1 addi s1, a1, -17 li a0, 17 subw s2, a0, a1 - j .LBB10_49 -.LBB10_47: # %if.end262 - # in Loop: Header=BB10_49 Depth=2 + j .LBB10_48 +.LBB10_46: # %if.end262 + # in Loop: Header=BB10_48 Depth=2 ld s8, 104(s0) sd s8, 112(s0) slli a0, a0, 32 srli a0, a0, 32 add s6, s8, a0 sd s6, 120(s0) -.LBB10_48: # %if.end265 - # in Loop: Header=BB10_49 Depth=2 +.LBB10_47: # %if.end265 + # in Loop: Header=BB10_48 Depth=2 lbu a0, 1(s8) lbu a1, 0(s8) slli a0, a0, 8 @@ -9082,43 +9083,43 @@ addi s8, s8, 2 addiw s1, s1, 16 addi s2, s2, -16 - bgez s1, .LBB10_108 -.LBB10_49: # %while.body253 + bgez s1, .LBB10_105 +.LBB10_48: # %while.body253 # Parent Loop BB10_23 Depth=1 # => This Inner Loop Header: Depth=2 addi a0, s8, 1 - bltu a0, s6, .LBB10_48 -# %bb.50: # %if.then257 - # in Loop: Header=BB10_49 Depth=2 + bltu a0, s6, .LBB10_47 +# %bb.49: # %if.then257 + # in Loop: Header=BB10_48 Depth=2 ld a3, 8(s5) ld a1, 104(s0) lw a2, 152(s0) - beqz a3, .LBB10_52 -# %bb.51: # %cond.true.i317 - # in Loop: Header=BB10_49 Depth=2 + beqz a3, .LBB10_51 +# %bb.50: # %cond.true.i317 + # in Loop: Header=BB10_48 Depth=2 ld a0, 0(s5) jalr a3 - j .LBB10_53 -.LBB10_52: # %cond.false.i345 - # in Loop: Header=BB10_49 Depth=2 + j .LBB10_52 +.LBB10_51: # %cond.false.i345 + # in Loop: Header=BB10_48 Depth=2 lw a0, 0(s0) call cli_readn@plt -.LBB10_53: # %cond.end.i322 - # in Loop: Header=BB10_49 Depth=2 +.LBB10_52: # %cond.end.i322 + # in Loop: Header=BB10_48 Depth=2 bltz a0, .LBB10_15 -# %bb.54: # %if.end.i325 - # in Loop: Header=BB10_49 Depth=2 +# %bb.53: # %if.end.i325 + # in Loop: Header=BB10_48 Depth=2 csrr a1, vlenb add a1, sp, a1 addi a1, a1, 64 vl2r.v v10, (a1) # Unknown-size Folded Reload - bnez a0, .LBB10_47 -# %bb.55: # %if.then7.i335 - # in Loop: Header=BB10_49 Depth=2 + bnez a0, .LBB10_46 +# %bb.54: # %if.then7.i335 + # in Loop: Header=BB10_48 Depth=2 lbu a0, 92(s0) - bnez a0, .LBB10_136 -# %bb.56: # %if.else.i340 - # in Loop: Header=BB10_49 Depth=2 + bnez a0, .LBB10_133 +# %bb.55: # %if.else.i340 + # in Loop: Header=BB10_48 Depth=2 ld a0, 104(s0) sb zero, 1(a0) ld a0, 104(s0) @@ -9126,27 +9127,27 @@ li a0, 1 sb a0, 92(s0) li a0, 2 - j .LBB10_47 -.LBB10_57: # %while.cond164.preheader + j .LBB10_46 +.LBB10_56: # %while.cond164.preheader # in Loop: Header=BB10_23 Depth=1 li a0, 4 - blt a0, a1, .LBB10_82 -# %bb.58: # %while.body167.preheader + li s7, -11 + blt a0, a1, .LBB10_81 +# %bb.57: # %while.body167.preheader # in Loop: Header=BB10_23 Depth=1 - subw s1, a2, s3 + subw s1, a2, s2 addi s1, s1, 16 - ld s3, 32(sp) # 8-byte Folded Reload - j .LBB10_61 -.LBB10_59: # %if.end176 - # in Loop: Header=BB10_61 Depth=2 + j .LBB10_60 +.LBB10_58: # %if.end176 + # in Loop: Header=BB10_60 Depth=2 ld s8, 104(s0) sd s8, 112(s0) slli a0, a0, 32 srli a0, a0, 32 add s6, s8, a0 sd s6, 120(s0) -.LBB10_60: # %if.end179 - # in Loop: Header=BB10_61 Depth=2 +.LBB10_59: # %if.end179 + # in Loop: Header=BB10_60 Depth=2 lbu a0, 1(s8) lbu a1, 0(s8) slli a0, a0, 8 @@ -9156,45 +9157,44 @@ addiw a1, s2, 16 addi s8, s8, 2 addi s1, s1, -16 - li a0, -11 - bge s2, a0, .LBB10_83 -.LBB10_61: # %while.body167 + bge s2, s7, .LBB10_81 +.LBB10_60: # %while.body167 # Parent Loop BB10_23 Depth=1 # => This Inner Loop Header: Depth=2 addi a0, s8, 1 mv s2, a1 - bltu a0, s6, .LBB10_60 -# %bb.62: # %if.then171 - # in Loop: Header=BB10_61 Depth=2 + bltu a0, s6, .LBB10_59 +# %bb.61: # %if.then171 + # in Loop: Header=BB10_60 Depth=2 ld a3, 8(s5) ld a1, 104(s0) lw a2, 152(s0) - beqz a3, .LBB10_64 -# %bb.63: # %cond.true.i247 - # in Loop: Header=BB10_61 Depth=2 + beqz a3, .LBB10_63 +# %bb.62: # %cond.true.i247 + # in Loop: Header=BB10_60 Depth=2 ld a0, 0(s5) jalr a3 - j .LBB10_65 -.LBB10_64: # %cond.false.i275 - # in Loop: Header=BB10_61 Depth=2 + j .LBB10_64 +.LBB10_63: # %cond.false.i275 + # in Loop: Header=BB10_60 Depth=2 lw a0, 0(s0) call cli_readn@plt -.LBB10_65: # %cond.end.i252 - # in Loop: Header=BB10_61 Depth=2 +.LBB10_64: # %cond.end.i252 + # in Loop: Header=BB10_60 Depth=2 bltz a0, .LBB10_15 -# %bb.66: # %if.end.i255 - # in Loop: Header=BB10_61 Depth=2 +# %bb.65: # %if.end.i255 + # in Loop: Header=BB10_60 Depth=2 csrr a1, vlenb add a1, sp, a1 addi a1, a1, 64 vl2r.v v10, (a1) # Unknown-size Folded Reload - bnez a0, .LBB10_59 -# %bb.67: # %if.then7.i265 - # in Loop: Header=BB10_61 Depth=2 + bnez a0, .LBB10_58 +# %bb.66: # %if.then7.i265 + # in Loop: Header=BB10_60 Depth=2 lbu a0, 92(s0) - bnez a0, .LBB10_135 -# %bb.68: # %if.else.i270 - # in Loop: Header=BB10_61 Depth=2 + bnez a0, .LBB10_132 +# %bb.67: # %if.else.i270 + # in Loop: Header=BB10_60 Depth=2 ld a0, 104(s0) sb zero, 1(a0) ld a0, 104(s0) @@ -9202,27 +9202,26 @@ li a0, 1 sb a0, 92(s0) li a0, 2 - j .LBB10_59 -.LBB10_69: # %while.cond117.preheader + j .LBB10_58 +.LBB10_68: # %while.cond117.preheader # in Loop: Header=BB10_23 Depth=1 li a0, 3 - blt a0, a1, .LBB10_91 -# %bb.70: # %while.body120.preheader + blt a0, a1, .LBB10_89 +# %bb.69: # %while.body120.preheader # in Loop: Header=BB10_23 Depth=1 - subw s1, a2, s3 + subw s1, a2, s2 addi s1, s1, 16 - ld s3, 32(sp) # 8-byte Folded Reload - j .LBB10_73 -.LBB10_71: # %if.end129 - # in Loop: Header=BB10_73 Depth=2 + j .LBB10_72 +.LBB10_70: # %if.end129 + # in Loop: Header=BB10_72 Depth=2 ld s8, 104(s0) sd s8, 112(s0) slli a0, a0, 32 srli a0, a0, 32 add s6, s8, a0 sd s6, 120(s0) -.LBB10_72: # %if.end132 - # in Loop: Header=BB10_73 Depth=2 +.LBB10_71: # %if.end132 + # in Loop: Header=BB10_72 Depth=2 lbu a0, 1(s8) lbu a1, 0(s8) slli a0, a0, 8 @@ -9232,45 +9231,44 @@ addiw a1, s2, 16 addi s8, s8, 2 addi s1, s1, -16 - li a0, -12 - bge s2, a0, .LBB10_92 -.LBB10_73: # %while.body120 + bge s2, s7, .LBB10_89 +.LBB10_72: # %while.body120 # Parent Loop BB10_23 Depth=1 # => This Inner Loop Header: Depth=2 addi a0, s8, 1 mv s2, a1 - bltu a0, s6, .LBB10_72 -# %bb.74: # %if.then124 - # in Loop: Header=BB10_73 Depth=2 + bltu a0, s6, .LBB10_71 +# %bb.73: # %if.then124 + # in Loop: Header=BB10_72 Depth=2 ld a3, 8(s5) ld a1, 104(s0) lw a2, 152(s0) - beqz a3, .LBB10_76 -# %bb.75: # %cond.true.i212 - # in Loop: Header=BB10_73 Depth=2 + beqz a3, .LBB10_75 +# %bb.74: # %cond.true.i212 + # in Loop: Header=BB10_72 Depth=2 ld a0, 0(s5) jalr a3 - j .LBB10_77 -.LBB10_76: # %cond.false.i240 - # in Loop: Header=BB10_73 Depth=2 + j .LBB10_76 +.LBB10_75: # %cond.false.i240 + # in Loop: Header=BB10_72 Depth=2 lw a0, 0(s0) call cli_readn@plt -.LBB10_77: # %cond.end.i217 - # in Loop: Header=BB10_73 Depth=2 +.LBB10_76: # %cond.end.i217 + # in Loop: Header=BB10_72 Depth=2 bltz a0, .LBB10_15 -# %bb.78: # %if.end.i220 - # in Loop: Header=BB10_73 Depth=2 +# %bb.77: # %if.end.i220 + # in Loop: Header=BB10_72 Depth=2 csrr a1, vlenb add a1, sp, a1 addi a1, a1, 64 vl2r.v v10, (a1) # Unknown-size Folded Reload - bnez a0, .LBB10_71 -# %bb.79: # %if.then7.i230 - # in Loop: Header=BB10_73 Depth=2 + bnez a0, .LBB10_70 +# %bb.78: # %if.then7.i230 + # in Loop: Header=BB10_72 Depth=2 lbu a0, 92(s0) - bnez a0, .LBB10_134 -# %bb.80: # %if.else.i235 - # in Loop: Header=BB10_73 Depth=2 + bnez a0, .LBB10_131 +# %bb.79: # %if.else.i235 + # in Loop: Header=BB10_72 Depth=2 ld a0, 104(s0) sb zero, 1(a0) ld a0, 104(s0) @@ -9278,10 +9276,10 @@ li a0, 1 sb a0, 92(s0) li a0, 2 - j .LBB10_71 -.LBB10_81: # %if.else346 + j .LBB10_70 +.LBB10_80: # %if.else346 # in Loop: Header=BB10_23 Depth=1 - slli a2, a6, 32 + slli a2, s3, 32 srli a2, a2, 32 ld a3, 32(sp) # 8-byte Folded Reload add a2, a3, a2 @@ -9290,96 +9288,94 @@ srli a0, a3, 31 andi a0, a0, 17 add a0, a3, a0 - addiw a6, a6, 1 + addiw s3, s3, 1 sb a0, 0(a2) - j .LBB10_125 -.LBB10_82: # in Loop: Header=BB10_23 Depth=1 - ld s3, 32(sp) # 8-byte Folded Reload -.LBB10_83: # %while.end193 + j .LBB10_122 +.LBB10_81: # %while.end193 # in Loop: Header=BB10_23 Depth=1 li a2, 32 - ld a7, 24(sp) # 8-byte Folded Reload - mv a0, a7 - bltu a2, a7, .LBB10_85 -# %bb.84: # %while.end193 + ld t0, 24(sp) # 8-byte Folded Reload + mv a0, t0 + li t1, 15 + bltu a2, t0, .LBB10_83 +# %bb.82: # %while.end193 # in Loop: Header=BB10_23 Depth=1 li a0, 32 -.LBB10_85: # %while.end193 +.LBB10_83: # %while.end193 # in Loop: Header=BB10_23 Depth=1 srliw a2, s4, 27 addi a3, a2, 20 - li t0, 15 - bltu a3, a0, .LBB10_87 -# %bb.86: # %vector.scevcheck558 + ld a7, 32(sp) # 8-byte Folded Reload + bltu a3, a0, .LBB10_85 +# %bb.84: # %vector.scevcheck558 # in Loop: Header=BB10_23 Depth=1 addi a2, a2, 19 - not a0, s7 - bgeu a0, a2, .LBB10_117 -.LBB10_87: # in Loop: Header=BB10_23 Depth=1 + not a0, s3 + bgeu a0, a2, .LBB10_114 +.LBB10_85: # in Loop: Header=BB10_23 Depth=1 mv a2, a3 - mv a0, s7 -.LBB10_88: # %while.body203.preheader + mv a0, s3 +.LBB10_86: # %while.body203.preheader # in Loop: Header=BB10_23 Depth=1 mv a3, a0 -.LBB10_89: # %while.body203 +.LBB10_87: # %while.body203 # Parent Loop BB10_23 Depth=1 # => This Inner Loop Header: Depth=2 addiw a2, a2, -1 addiw a0, a3, 1 slli a3, a3, 32 srli a3, a3, 32 - add a3, s3, a3 + add a3, a7, a3 sb zero, 0(a3) mv a3, a0 - bnez a2, .LBB10_89 -.LBB10_90: # %if.end362.loopexit551 + bnez a2, .LBB10_87 +.LBB10_88: # %if.end362.loopexit551 # in Loop: Header=BB10_23 Depth=1 slliw s4, s4, 5 addiw a1, a1, -5 - mv a6, a0 - j .LBB10_125 -.LBB10_91: # in Loop: Header=BB10_23 Depth=1 - ld s3, 32(sp) # 8-byte Folded Reload -.LBB10_92: # %while.end146 + mv s3, a0 + j .LBB10_122 +.LBB10_89: # %while.end146 # in Loop: Header=BB10_23 Depth=1 srliw a2, s4, 28 srliw a3, s4, 30 addi a0, a2, 4 li a4, 3 - bgeu a3, a4, .LBB10_95 -# %bb.93: # in Loop: Header=BB10_23 Depth=1 - mv a2, s7 - li t0, 15 - j .LBB10_122 -.LBB10_94: # in Loop: Header=BB10_23 Depth=1 + bgeu a3, a4, .LBB10_92 +# %bb.90: # in Loop: Header=BB10_23 Depth=1 + mv a2, s3 + ld a5, 32(sp) # 8-byte Folded Reload + li t1, 15 + j .LBB10_119 +.LBB10_91: # in Loop: Header=BB10_23 Depth=1 addi a1, a1, -1 - j .LBB10_109 -.LBB10_95: # %vector.scevcheck + j .LBB10_106 +.LBB10_92: # %vector.scevcheck # in Loop: Header=BB10_23 Depth=1 addi a2, a2, 3 - not a3, s7 - li t0, 15 - bgeu a3, a2, .LBB10_120 -# %bb.96: # in Loop: Header=BB10_23 Depth=1 - mv a2, s7 - j .LBB10_122 -.LBB10_97: # %while.body216.preheader + not a3, s3 + ld a5, 32(sp) # 8-byte Folded Reload + li t1, 15 + bgeu a3, a2, .LBB10_117 +# %bb.93: # in Loop: Header=BB10_23 Depth=1 + mv a2, s3 + j .LBB10_119 +.LBB10_94: # %while.body216.preheader # in Loop: Header=BB10_23 Depth=1 - subw s1, a2, s3 + subw s1, a2, s2 addi s1, s1, 16 - ld s3, 32(sp) # 8-byte Folded Reload - li s10, -15 - j .LBB10_100 -.LBB10_98: # %if.end225 - # in Loop: Header=BB10_100 Depth=2 + li s7, -15 + j .LBB10_97 +.LBB10_95: # %if.end225 + # in Loop: Header=BB10_97 Depth=2 ld s8, 104(s0) sd s8, 112(s0) slli a0, a0, 32 srli a0, a0, 32 add s6, s8, a0 sd s6, 120(s0) -.LBB10_99: # %if.end228 - # in Loop: Header=BB10_100 Depth=2 +.LBB10_96: # %if.end228 + # in Loop: Header=BB10_97 Depth=2 lbu a0, 1(s8) lbu a1, 0(s8) slli a0, a0, 8 @@ -9389,44 +9385,44 @@ addiw a1, s2, 16 addi s8, s8, 2 addi s1, s1, -16 - bge s2, s10, .LBB10_45 -.LBB10_100: # %while.body216 + bge s2, s7, .LBB10_44 +.LBB10_97: # %while.body216 # Parent Loop BB10_23 Depth=1 # => This Inner Loop Header: Depth=2 addi a0, s8, 1 mv s2, a1 - bltu a0, s6, .LBB10_99 -# %bb.101: # %if.then220 - # in Loop: Header=BB10_100 Depth=2 + bltu a0, s6, .LBB10_96 +# %bb.98: # %if.then220 + # in Loop: Header=BB10_97 Depth=2 ld a3, 8(s5) ld a1, 104(s0) lw a2, 152(s0) - beqz a3, .LBB10_103 -# %bb.102: # %cond.true.i282 - # in Loop: Header=BB10_100 Depth=2 + beqz a3, .LBB10_100 +# %bb.99: # %cond.true.i282 + # in Loop: Header=BB10_97 Depth=2 ld a0, 0(s5) jalr a3 - j .LBB10_104 -.LBB10_103: # %cond.false.i310 - # in Loop: Header=BB10_100 Depth=2 + j .LBB10_101 +.LBB10_100: # %cond.false.i310 + # in Loop: Header=BB10_97 Depth=2 lw a0, 0(s0) call cli_readn@plt -.LBB10_104: # %cond.end.i287 - # in Loop: Header=BB10_100 Depth=2 +.LBB10_101: # %cond.end.i287 + # in Loop: Header=BB10_97 Depth=2 bltz a0, .LBB10_15 -# %bb.105: # %if.end.i290 - # in Loop: Header=BB10_100 Depth=2 +# %bb.102: # %if.end.i290 + # in Loop: Header=BB10_97 Depth=2 csrr a1, vlenb add a1, sp, a1 addi a1, a1, 64 vl2r.v v10, (a1) # Unknown-size Folded Reload - bnez a0, .LBB10_98 -# %bb.106: # %if.then7.i300 - # in Loop: Header=BB10_100 Depth=2 + bnez a0, .LBB10_95 +# %bb.103: # %if.then7.i300 + # in Loop: Header=BB10_97 Depth=2 lbu a0, 92(s0) - bnez a0, .LBB10_137 -# %bb.107: # %if.else.i305 - # in Loop: Header=BB10_100 Depth=2 + bnez a0, .LBB10_134 +# %bb.104: # %if.else.i305 + # in Loop: Header=BB10_97 Depth=2 ld a0, 104(s0) sb zero, 1(a0) ld a0, 104(s0) @@ -9434,36 +9430,36 @@ li a0, 1 sb a0, 92(s0) li a0, 2 - j .LBB10_98 -.LBB10_108: # %while.end279.loopexit + j .LBB10_95 +.LBB10_105: # %while.end279.loopexit # in Loop: Header=BB10_23 Depth=1 addi a1, s1, 16 -.LBB10_109: # %while.end279 +.LBB10_106: # %while.end279 # in Loop: Header=BB10_23 Depth=1 - li t0, 15 srliw a0, s10, 26 slli a0, a0, 1 add a0, s0, a0 lhu a0, 1346(a0) - mv a6, s7 + ld a6, 32(sp) # 8-byte Folded Reload + li t1, 15 li a2, 20 - bltu a0, a2, .LBB10_114 -# %bb.110: # %do.body288.preheader + bltu a0, a2, .LBB10_111 +# %bb.107: # %do.body288.preheader # in Loop: Header=BB10_23 Depth=1 lui a2, 16384 -.LBB10_111: # %do.body288 +.LBB10_108: # %do.body288 # Parent Loop BB10_23 Depth=1 # => This Inner Loop Header: Depth=2 srliw a2, a2, 1 - beqz a2, .LBB10_132 -# %bb.112: # %if.end294 - # in Loop: Header=BB10_111 Depth=2 + beqz a2, .LBB10_129 +# %bb.109: # %if.end294 + # in Loop: Header=BB10_108 Depth=2 slli a0, a0, 1 slli a3, a0, 48 srli a3, a3, 48 - bgeu a3, s9, .LBB10_133 -# %bb.113: # %if.end309 - # in Loop: Header=BB10_111 Depth=2 + bgeu a3, s9, .LBB10_130 +# %bb.110: # %if.end309 + # in Loop: Header=BB10_108 Depth=2 and a3, a2, s10 snez a3, a3 or a0, a0, a3 @@ -9472,14 +9468,14 @@ slli a0, a0, 1 add a0, s0, a0 lhu a0, 1346(a0) - bltu s11, a0, .LBB10_111 -.LBB10_114: # %if.end318 + bltu s11, a0, .LBB10_108 +.LBB10_111: # %if.end318 # in Loop: Header=BB10_23 Depth=1 add a2, s0, a0 lbu a2, 156(a2) - slli a3, a6, 32 + slli a3, s3, 32 srli a3, a3, 32 - add a3, s3, a3 + add a3, a6, a3 lbu a4, 0(a3) srliw a3, s4, 31 addi a3, a3, 4 @@ -9488,135 +9484,135 @@ srli a4, a0, 31 andi a4, a4, 17 add a0, a0, a4 -.LBB10_115: # %while.body340 +.LBB10_112: # %while.body340 # Parent Loop BB10_23 Depth=1 # => This Inner Loop Header: Depth=2 - mv a4, a6 + mv a4, s3 addiw a3, a3, -1 - slli a5, a6, 32 - addiw a6, a6, 1 + slli a5, s3, 32 + addiw s3, s3, 1 srli a5, a5, 32 - add a5, s3, a5 + add a5, a6, a5 sb a0, 0(a5) - bnez a3, .LBB10_115 -# %bb.116: # %if.end362.loopexit552 + bnez a3, .LBB10_112 +# %bb.113: # %if.end362.loopexit552 # in Loop: Header=BB10_23 Depth=1 subw a1, a1, a2 ld s10, 48(sp) # 8-byte Folded Reload - j .LBB10_125 -.LBB10_117: # %vector.ph562 + j .LBB10_122 +.LBB10_114: # %vector.ph562 # in Loop: Header=BB10_23 Depth=1 ld a0, 16(sp) # 8-byte Folded Reload slli a0, a0, 1 neg a4, a0 and a4, a3, a4 sub a2, a3, a4 - addw a0, s7, a4 + addw a0, s3, a4 mv a5, a4 -.LBB10_118: # %vector.body570 +.LBB10_115: # %vector.body570 # Parent Loop BB10_23 Depth=1 # => This Inner Loop Header: Depth=2 - slli a6, s7, 32 + slli a6, s3, 32 srli a6, a6, 32 - add a6, s3, a6 + add a6, a7, a6 vs2r.v v10, (a6) - subw a5, a5, a7 - add s7, s7, a7 - bnez a5, .LBB10_118 -# %bb.119: # %middle.block559 - # in Loop: Header=BB10_23 Depth=1 - bne a3, a4, .LBB10_88 - j .LBB10_90 -.LBB10_120: # %vector.body + subw a5, a5, t0 + add s3, s3, t0 + bnez a5, .LBB10_115 +# %bb.116: # %middle.block559 + # in Loop: Header=BB10_23 Depth=1 + bne a3, a4, .LBB10_86 + j .LBB10_88 +.LBB10_117: # %vector.body # in Loop: Header=BB10_23 Depth=1 andi a3, a0, 16 - addw a2, s7, a3 - slli a4, s7, 32 + addw a2, s3, a3 + slli a4, s3, 32 srli a4, a4, 32 - add a4, s3, a4 + add a4, a5, a4 vsetivli zero, 16, e8, m1, ta, ma - addi a5, sp, 64 - vl1r.v v8, (a5) # Unknown-size Folded Reload + addi a6, sp, 64 + vl1r.v v8, (a6) # Unknown-size Folded Reload vse8.v v8, (a4) - beq a0, a3, .LBB10_124 -# %bb.121: # in Loop: Header=BB10_23 Depth=1 + beq a0, a3, .LBB10_121 +# %bb.118: # in Loop: Header=BB10_23 Depth=1 andi a0, a0, 15 -.LBB10_122: # %while.body155.preheader +.LBB10_119: # %while.body155.preheader # in Loop: Header=BB10_23 Depth=1 mv a3, a2 -.LBB10_123: # %while.body155 +.LBB10_120: # %while.body155 # Parent Loop BB10_23 Depth=1 # => This Inner Loop Header: Depth=2 addiw a0, a0, -1 addiw a2, a3, 1 slli a3, a3, 32 srli a3, a3, 32 - add a3, s3, a3 + add a3, a5, a3 sb zero, 0(a3) mv a3, a2 - bnez a0, .LBB10_123 -.LBB10_124: # %if.end362.loopexit + bnez a0, .LBB10_120 +.LBB10_121: # %if.end362.loopexit # in Loop: Header=BB10_23 Depth=1 slliw s4, s4, 4 addiw a1, a1, -4 - mv a6, a2 -.LBB10_125: # %if.end362 + mv s3, a2 +.LBB10_122: # %if.end362 # in Loop: Header=BB10_23 Depth=1 - mv s3, a1 - bltu a6, s10, .LBB10_23 - j .LBB10_127 -.LBB10_126: - mv a1, s3 -.LBB10_127: # %do.body364 + mv s2, a1 + bltu s3, s10, .LBB10_23 + j .LBB10_124 +.LBB10_123: + mv a1, s2 +.LBB10_124: # %do.body364 li a0, 0 sd s8, 112(s0) sd s6, 120(s0) sw s4, 144(s0) sw a1, 148(s0) j .LBB10_17 -.LBB10_128: # %if.then79 +.LBB10_125: # %if.then79 .Lpcrel_hi79: auipc a0, %pcrel_hi(.L.str.9) addi a0, a0, %pcrel_lo(.Lpcrel_hi79) - j .LBB10_130 -.LBB10_129: # %if.then92 + j .LBB10_127 +.LBB10_126: # %if.then92 .Lpcrel_hi80: auipc a0, %pcrel_hi(.L.str.10) addi a0, a0, %pcrel_lo(.Lpcrel_hi80) -.LBB10_130: # %cleanup +.LBB10_127: # %cleanup call cli_dbgmsg@plt j .LBB10_20 -.LBB10_131: # %if.then9.i198 +.LBB10_128: # %if.then9.i198 .Lpcrel_hi78: auipc a0, %pcrel_hi(.L.str.24) addi a0, a0, %pcrel_lo(.Lpcrel_hi78) j .LBB10_14 -.LBB10_132: # %if.then292 +.LBB10_129: # %if.then292 .Lpcrel_hi85: auipc a0, %pcrel_hi(.L.str.9) addi a0, a0, %pcrel_lo(.Lpcrel_hi85) - j .LBB10_130 -.LBB10_133: # %if.then307 + j .LBB10_127 +.LBB10_130: # %if.then307 .Lpcrel_hi86: auipc a0, %pcrel_hi(.L.str.10) addi a0, a0, %pcrel_lo(.Lpcrel_hi86) - j .LBB10_130 -.LBB10_134: # %if.then9.i233 + j .LBB10_127 +.LBB10_131: # %if.then9.i233 .Lpcrel_hi81: auipc a0, %pcrel_hi(.L.str.24) addi a0, a0, %pcrel_lo(.Lpcrel_hi81) j .LBB10_14 -.LBB10_135: # %if.then9.i268 +.LBB10_132: # %if.then9.i268 .Lpcrel_hi82: auipc a0, %pcrel_hi(.L.str.24) addi a0, a0, %pcrel_lo(.Lpcrel_hi82) j .LBB10_14 -.LBB10_136: # %if.then9.i338 +.LBB10_133: # %if.then9.i338 .Lpcrel_hi84: auipc a0, %pcrel_hi(.L.str.24) addi a0, a0, %pcrel_lo(.Lpcrel_hi84) j .LBB10_14 -.LBB10_137: # %if.then9.i303 +.LBB10_134: # %if.then9.i303 .Lpcrel_hi83: auipc a0, %pcrel_hi(.L.str.24) addi a0, a0, %pcrel_lo(.Lpcrel_hi83) --- build.head//MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/btDbvt.s 2023-11-13 08:03:22.467555510 +0000 +++ build//MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/btDbvt.s 2023-11-13 08:03:17.503698998 +0000 @@ -1921,9 +1921,9 @@ # %bb.142: # %if.then.i.i224 sd zero, 8(s1) vsetivli zero, 2, e64, m1, ta, ma - ld s0, 40(sp) # 8-byte Folded Reload addi a0, sp, 144 vl1r.v v8, (a0) # Unknown-size Folded Reload + ld s0, 40(sp) # 8-byte Folded Reload j .LBB11_145 .LBB11_143: # %if.else.i.i .Ltmp65: @@ -3850,10 +3850,10 @@ slli s10, s4, 32 srli a0, s10, 28 add a0, s2, a0 - ld s9, 0(a0) - ld s8, 8(a0) + ld s8, 0(a0) + ld s9, 8(a0) ld s3, 8(s0) - ld s11, 40(s9) + ld s11, 40(s8) beqz s3, .LBB25_14 # %bb.13: # %if.then.i.i42 # in Loop: Header=BB25_12 Depth=1 @@ -3880,42 +3880,42 @@ vse64.v v8, (a0) .LBB25_16: # %invoke.cont13 # in Loop: Header=BB25_12 Depth=1 - sd s8, 32(s3) + sd s9, 32(s3) sd s11, 40(s3) sd zero, 48(s3) vsetivli zero, 8, e32, m2, ta, ma - vle32.v v8, (s9) + vle32.v v8, (s8) vse32.v v8, (s3) mv a0, s0 - beqz s8, .LBB25_18 + beqz s9, .LBB25_18 # %bb.17: # %invoke.cont13 # in Loop: Header=BB25_12 Depth=1 andi a0, s4, 1 slli a0, a0, 3 - add a0, s8, a0 + add a0, s9, a0 addi a0, a0, 40 .LBB25_18: # %invoke.cont13 # in Loop: Header=BB25_12 Depth=1 sd s3, 0(a0) - ld a0, 48(s9) + ld a0, 48(s8) beqz a0, .LBB25_10 # %bb.19: # %if.then24 # in Loop: Header=BB25_12 Depth=1 - ld s11, 40(s9) + ld s11, 40(s8) bne s4, s7, .LBB25_26 # %bb.20: # %if.then.i57 # in Loop: Header=BB25_12 Depth=1 bnez s7, .LBB25_25 # %bb.21: # %if.then.i57 # in Loop: Header=BB25_12 Depth=1 - li s8, 1 - blt s8, s6, .LBB25_26 + li s9, 1 + blt s9, s6, .LBB25_26 .LBB25_22: # %if.then.i.i62 # in Loop: Header=BB25_12 Depth=1 - beqz s8, .LBB25_27 + beqz s9, .LBB25_27 # %bb.23: # %if.then.i.i.i64 # in Loop: Header=BB25_12 Depth=1 - slli a0, s8, 4 + slli a0, s9, 4 .Ltmp103: li a1, 16 call _Z22btAlignedAllocInternalmi@plt @@ -3925,10 +3925,10 @@ bgeu s6, s5, .LBB25_28 j .LBB25_30 .LBB25_25: # in Loop: Header=BB25_12 Depth=1 - slliw s8, s7, 1 - bge s8, s6, .LBB25_22 + slliw s9, s7, 1 + bge s9, s6, .LBB25_22 .LBB25_26: # in Loop: Header=BB25_12 Depth=1 - mv s8, s7 + mv s9, s7 mv s4, s2 j .LBB25_31 .LBB25_27: # in Loop: Header=BB25_12 Depth=1 @@ -3963,12 +3963,12 @@ add a0, s4, a0 sd s11, 0(a0) sd s3, 8(a0) - ld s7, 48(s9) - bne s6, s8, .LBB25_36 + ld s7, 48(s8) + bne s6, s9, .LBB25_36 # %bb.32: # %if.then.i102 # in Loop: Header=BB25_12 Depth=1 - slliw s8, s6, 1 - slli a0, s8, 32 + slliw s9, s6, 1 + slli a0, s9, 32 srli a0, a0, 28 .Ltmp108: li a1, 16 @@ -3978,11 +3978,11 @@ # in Loop: Header=BB25_12 Depth=1 mv s2, a0 slli a0, s6, 32 - srli s9, a0, 32 + srli s8, a0, 32 vsetivli zero, 2, e64, m1, ta, ma mv a0, s2 mv a1, s4 - mv a2, s9 + mv a2, s8 .LBB25_34: # %for.body.i.i.i128 # Parent Loop BB25_12 Depth=1 # => This Inner Loop Header: Depth=2 @@ -4002,16 +4002,16 @@ .LBB25_36: # %invoke.cont30.invoke.cont36_crit_edge # in Loop: Header=BB25_12 Depth=1 slli a0, s6, 32 - srli s9, a0, 32 + srli s8, a0, 32 mv s2, s4 .LBB25_37: # %invoke.cont36 # in Loop: Header=BB25_12 Depth=1 - slli s9, s9, 4 - add s9, s2, s9 - sd s7, 0(s9) - sd s3, 8(s9) + slli s8, s8, 4 + add s8, s2, s8 + sd s7, 0(s8) + sd s3, 8(s8) addiw s4, s6, 1 - mv s7, s8 + mv s7, s9 mv s6, s4 bgtz s4, .LBB25_12 .LBB25_38: # %if.then3.i.i.i144 --- build.head//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/C/LzmaEnc.s 2023-11-13 08:03:21.203592047 +0000 +++ build//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/C/LzmaEnc.s 2023-11-13 08:03:16.231735765 +0000 @@ -6273,10 +6273,10 @@ ld a5, 544(sp) # 8-byte Folded Reload and a1, a1, a5 lw a2, 84(s11) - slli a6, a1, 32 + slli s4, a1, 32 slli a1, s2, 5 add a3, s0, a1 - srli a1, a6, 31 + srli a1, s4, 31 sd a3, 496(sp) # 8-byte Folded Spill add a3, a3, ra add a1, a3, a1 @@ -6363,25 +6363,23 @@ ld s8, 536(sp) # 8-byte Folded Reload mv a3, s8 sd t3, 472(sp) # 8-byte Folded Spill - mv s4, t0 - sd t1, 480(sp) # 8-byte Folded Spill + sd t0, 480(sp) # 8-byte Folded Spill + sd t1, 424(sp) # 8-byte Folded Spill sd t2, 440(sp) # 8-byte Folded Spill - sd a6, 424(sp) # 8-byte Folded Spill sd t4, 416(sp) # 8-byte Folded Spill sd a7, 408(sp) # 8-byte Folded Spill call LitEnc_GetPriceMatched ld a7, 408(sp) # 8-byte Folded Reload ld t4, 416(sp) # 8-byte Folded Reload - ld a6, 424(sp) # 8-byte Folded Reload ld t2, 440(sp) # 8-byte Folded Reload - ld t1, 480(sp) # 8-byte Folded Reload - mv t0, s4 + ld t1, 424(sp) # 8-byte Folded Reload + ld t0, 480(sp) # 8-byte Folded Reload ld t3, 472(sp) # 8-byte Folded Reload lui ra, 52 mv a1, a0 .LBB24_334: # %cond.end.i # in Loop: Header=BB24_27 Depth=1 - srli a6, a6, 32 + srli a6, s4, 32 addw a1, a1, a7 ld a7, 520(sp) # 8-byte Folded Reload sw a1, 68(a7) @@ -6765,15 +6763,15 @@ li t2, -1 vmacc.vx v8, t2, v12 mv t2, t0 - li t4, 1 - lui t5, 51 - ld s2, 512(sp) # 8-byte Folded Reload - ld s4, 240(sp) # 8-byte Folded Reload csrr t3, vlenb slli t3, t3, 2 add t3, sp, t3 addi t3, t3, 624 vl2r.v v16, (t3) # Unknown-size Folded Reload + li t4, 1 + lui t5, 51 + ld s2, 512(sp) # 8-byte Folded Reload + ld s4, 240(sp) # 8-byte Folded Reload li t3, 48 .LBB24_383: # %vector.body955 # Parent Loop BB24_27 Depth=1 --- build.head//MultiSource/Applications/d/CMakeFiles/make_dparser.dir/lex.s 2023-11-13 08:03:22.219562679 +0000 +++ build//MultiSource/Applications/d/CMakeFiles/make_dparser.dir/lex.s 2023-11-13 08:03:17.275705587 +0000 @@ -1905,11 +1905,11 @@ mv s6, a0 li s1, 0 vsetivli zero, 2, e64, m1, ta, ma + csrr a0, vlenb + add a0, sp, a0 + addi a0, a0, 224 + vl1r.v v8, (a0) # Unknown-size Folded Reload addi a0, sp, 192 - csrr a1, vlenb - add a1, sp, a1 - addi a1, a1, 224 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) addi a0, sp, 176 vse64.v v8, (a0) @@ -3813,9 +3813,9 @@ li a1, 0 call memset@plt li a0, 255 - li t1, 92 addi a1, sp, 352 vl2r.v v8, (a1) # Unknown-size Folded Reload + li t1, 92 j .LBB1_29 .LBB1_26: # %while.cond113 # in Loop: Header=BB1_29 Depth=2 --- build.head//SingleSource/Benchmarks/BenchmarkGame/CMakeFiles/fannkuch.dir/fannkuch.s 2023-11-13 08:03:22.875543717 +0000 +++ build//SingleSource/Benchmarks/BenchmarkGame/CMakeFiles/fannkuch.dir/fannkuch.s 2023-11-13 08:03:17.939686394 +0000 @@ -163,6 +163,7 @@ call printf@plt li a0, 10 call putchar@plt + li t2, 29 addi a0, sp, 48 vl1r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -180,7 +181,6 @@ add a0, sp, a0 addi a0, a0, 48 vl2r.v v12, (a0) # Unknown-size Folded Reload - li t2, 29 addiw s5, s5, 1 .LBB0_3: # %if.end23.i # in Loop: Header=BB0_1 Depth=1 --- build.head//SingleSource/Benchmarks/SmallPT/CMakeFiles/smallpt.dir/smallpt.s 2023-11-13 08:03:22.899543023 +0000 +++ build//SingleSource/Benchmarks/SmallPT/CMakeFiles/smallpt.dir/smallpt.s 2023-11-13 08:03:17.967685585 +0000 @@ -258,14 +258,14 @@ li a0, 5 blt a2, a0, .LBB0_22 # %bb.17: # %if.then24 + mv s3, a1 + mv s6, a2 addi a0, sp, 208 vs1r.v v10, (a0) # Unknown-size Folded Spill csrr a0, vlenb add a0, sp, a0 addi a0, a0, 208 vs1r.v v12, (a0) # Unknown-size Folded Spill - mv s3, a1 - mv s6, a2 mv s1, a3 mv a0, a3 call erand48@plt --- build.head//MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/btQuantizedBvh.s 2023-11-13 08:03:22.475555279 +0000 +++ build//MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/btQuantizedBvh.s 2023-11-13 08:03:17.511698766 +0000 @@ -3520,9 +3520,9 @@ flw fa2, 0(a2) flt.s a2, fa3, fa2 mv s2, a6 - mv s10, a4 + mv s11, a4 sd a1, 72(sp) # 8-byte Folded Spill - mv t3, a0 + mv s10, a0 fmv.s fa4, fa3 bnez a2, .LBB21_2 # %bb.1: # %entry @@ -3534,8 +3534,8 @@ # %bb.3: # %entry fmv.s ft4, fa2 .LBB21_4: # %entry - flw fa1, 0(s10) - flw fa5, 8(t3) + flw fa1, 0(s11) + flw fa5, 8(s10) fadd.s fa4, fa4, fa1 flt.s a0, fa4, fa5 fmv.s fa1, fa5 @@ -3543,7 +3543,7 @@ # %bb.5: # %entry fmv.s fa1, fa4 .LBB21_6: # %entry - flw fa4, 24(t3) + flw fa4, 24(s10) fsub.s fa3, fa3, fa2 addi a3, a3, 4 flt.s a1, fa4, fa1 @@ -3588,11 +3588,11 @@ # %bb.11: # %entry fdiv.s fs3, fa2, ft2 .LBB21_12: # %entry - addi a2, s10, 4 + addi a2, s11, 4 fadd.s ft4, ft4, ft5 - addi a1, t3, 12 + addi a1, s10, 12 feq.s a3, ft3, fs1 - addi a0, t3, 28 + addi a0, s10, 28 bnez a3, .LBB21_14 # %bb.13: # %entry fdiv.s fs0, fa2, ft3 @@ -3630,9 +3630,9 @@ li s7, 0 bge s2, a7, .LBB21_37 # %bb.19: # %while.body.lr.ph - addi a0, t3, 44 + addi a0, s10, 44 vle32.v v11, (a0) - flw ft4, 40(t3) + flw ft4, 40(s10) vfsub.vv v9, v9, v8 fsub.s fa0, fa0, fa5 vfmul.vv v9, v9, v11 @@ -3643,9 +3643,9 @@ fcvt.lu.s a0, fa0, rtz fmadd.s fa3, ft1, fa3, ft0 vand.vi v12, v12, -2 - addi s9, t3, 8 - addi t0, t3, 40 - andi s11, a0, -2 + addi s9, s10, 8 + addi t0, s10, 40 + andi t4, a0, -2 fmadd.s fs4, ft3, fa1, fa3 fsub.s fa5, fa4, fa5 fmul.s fa5, fa5, ft4 @@ -3663,15 +3663,15 @@ xori a1, a0, 1 flt.s a2, fs3, fs1 xori a3, a2, 1 - ld s5, 184(t3) - flt.s t4, fs2, fs1 - xori t1, t4, 1 + ld s5, 184(s10) + flt.s t5, fs2, fs1 + xori t1, t5, 1 slli a6, s2, 4 add s5, s5, a6 addi s0, sp, 96 - slli t4, t4, 4 + slli t5, t5, 4 addi a6, sp, 80 - add t4, a6, t4 + add t5, a6, t5 slli t1, t1, 4 add t1, a6, t1 slli a2, a2, 4 @@ -3699,14 +3699,14 @@ add a0, sp, a0 addi a0, a0, 112 vs1r.v v13, (a0) # Unknown-size Folded Spill - sd a5, 64(sp) # 8-byte Folded Spill - sd t1, 56(sp) # 8-byte Folded Spill + addi a0, sp, 112 + vs1r.v v14, (a0) # Unknown-size Folded Spill + sd s9, 64(sp) # 8-byte Folded Spill + sd t0, 56(sp) # 8-byte Folded Spill sd s1, 48(sp) # 8-byte Folded Spill sd s3, 40(sp) # 8-byte Folded Spill sd s4, 32(sp) # 8-byte Folded Spill sd s6, 24(sp) # 8-byte Folded Spill - addi a0, sp, 112 - vs1r.v v14, (a0) # Unknown-size Folded Spill sd s8, 16(sp) # 8-byte Folded Spill j .LBB21_22 .LBB21_20: # %if.end86.thread @@ -3718,33 +3718,35 @@ srai a1, a2, 21 slli a2, a2, 43 srli a2, a2, 43 - mv s1, t0 mv s3, a7 + mv s0, a5 mv s6, t2 - mv s4, t3 + mv s4, t4 mv s8, t6 - mv s0, t4 + mv s1, t5 + mv s9, t1 jalr a3 - addi a0, sp, 112 - vl1r.v v14, (a0) # Unknown-size Folded Reload - ld t1, 56(sp) # 8-byte Folded Reload - mv t4, s0 - csrr a0, vlenb - add a0, sp, a0 - addi a0, a0, 112 - vl1r.v v13, (a0) # Unknown-size Folded Reload + mv t1, s9 + mv t5, s1 + ld s1, 48(sp) # 8-byte Folded Reload mv t6, s8 ld s8, 16(sp) # 8-byte Folded Reload - mv t3, s4 + mv t4, s4 ld s4, 32(sp) # 8-byte Folded Reload mv t2, s6 ld s6, 24(sp) # 8-byte Folded Reload - ld a5, 64(sp) # 8-byte Folded Reload + mv a5, s0 addi s0, sp, 96 mv a7, s3 ld s3, 40(sp) # 8-byte Folded Reload - mv t0, s1 - ld s1, 48(sp) # 8-byte Folded Reload + ld t0, 56(sp) # 8-byte Folded Reload + ld s9, 64(sp) # 8-byte Folded Reload + addi a0, sp, 112 + vl1r.v v14, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + add a0, sp, a0 + addi a0, a0, 112 + vl1r.v v13, (a0) # Unknown-size Folded Reload csrr a0, vlenb slli a0, a0, 1 add a0, sp, a0 @@ -3760,7 +3762,7 @@ # =>This Inner Loop Header: Depth=1 lhu a0, 6(s5) addi a1, s5, 2 - sltu a0, a0, s11 + sltu a0, a0, t4 not a0, a0 lhu a2, 0(s5) addi a3, s5, 8 @@ -3800,8 +3802,8 @@ vmv.x.s a2, v8 vslidedown.vi v8, v8, 1 vmv.x.s a3, v8 - flw fa4, 48(t3) - flw fa3, 16(t3) + flw fa4, 48(s10) + flw fa3, 16(s10) and a3, a3, s8 fcvt.s.wu fa2, a3 fdiv.s fa2, fa2, fa4 @@ -3811,14 +3813,14 @@ srli a3, a3, 32 sd a3, 88(sp) lhu a3, 10(s5) - flw fa1, 8(s10) + flw fa1, 8(s11) and a2, a2, s8 fcvt.s.wu fa0, a2 fcvt.s.wu ft0, a3 fadd.s fa2, fa1, fa2 - flw fa1, 0(s10) + flw fa1, 0(s11) fsw fa2, 88(sp) - flw fa2, 4(s10) + flw fa2, 4(s11) vsetivli zero, 2, e32, mf2, ta, ma vle32.v v8, (t0) fdiv.s fa4, ft0, fa4 @@ -3857,7 +3859,7 @@ vfadd.vv v8, v9, v8 vse32.v v8, (s0) flw fa5, 8(a5) - flw fa1, 0(t4) + flw fa1, 0(t5) flw fa0, 0(t2) fadd.s fa3, fa2, fa3 fsw fa3, 84(sp) --- build.head//MultiSource/Applications/lua/CMakeFiles/lua.dir/lparser.s 2023-11-13 08:03:22.311560020 +0000 +++ build//MultiSource/Applications/lua/CMakeFiles/lua.dir/lparser.s 2023-11-13 08:03:17.359703159 +0000 @@ -953,9 +953,9 @@ not a5, a2 add a5, a4, a5 andi a6, a5, 255 + addi a5, sp, 736 + vl1r.v v16, (a5) # Unknown-size Folded Reload li a5, 15 - addi a7, sp, 736 - vl1r.v v16, (a7) # Unknown-size Folded Reload bgeu a6, a5, .LBB2_104 # %bb.55: # in Loop: Header=BB2_5 Depth=1 mv a5, a4 @@ -1322,9 +1322,9 @@ not a5, a2 add a5, a4, a5 andi a6, a5, 255 + addi a5, sp, 736 + vl1r.v v16, (a5) # Unknown-size Folded Reload li a5, 15 - addi a7, sp, 736 - vl1r.v v16, (a7) # Unknown-size Folded Reload bgeu a6, a5, .LBB2_159 # %bb.92: # in Loop: Header=BB2_5 Depth=1 mv a5, a4 @@ -1507,9 +1507,9 @@ not a5, a2 add a5, a4, a5 andi a6, a5, 255 + addi a5, sp, 736 + vl1r.v v16, (a5) # Unknown-size Folded Reload li a5, 15 - addi a7, sp, 736 - vl1r.v v16, (a7) # Unknown-size Folded Reload bgeu a6, a5, .LBB2_114 # %bb.113: # in Loop: Header=BB2_5 Depth=1 mv a5, a4 @@ -1883,9 +1883,9 @@ not a5, a2 add a5, a4, a5 andi a6, a5, 255 + addi a5, sp, 736 + vl1r.v v16, (a5) # Unknown-size Folded Reload li a5, 15 - addi a7, sp, 736 - vl1r.v v16, (a7) # Unknown-size Folded Reload bgeu a6, a5, .LBB2_155 # %bb.154: # in Loop: Header=BB2_5 Depth=1 mv a5, a4 @@ -2021,9 +2021,9 @@ ld a0, 48(a1) lbu a2, 12(s1) lbu a4, 74(a0) - li s7, 59 addi a1, sp, 736 vl1r.v v16, (a1) # Unknown-size Folded Reload + li s7, 59 bgeu a2, a4, .LBB2_175 # %bb.168: # %while.body.lr.ph.i.i82.i # in Loop: Header=BB2_5 Depth=1 --- build.head//MultiSource/Applications/sqlite3/CMakeFiles/sqlite3.dir/shell.s 2023-11-13 08:03:22.387557823 +0000 +++ build//MultiSource/Applications/sqlite3/CMakeFiles/sqlite3.dir/shell.s 2023-11-13 08:03:17.427701194 +0000 @@ -5730,7 +5730,7 @@ slli a3, a3, 2 sub sp, sp, a3 .cfi_escape 0x0f, 0x0e, 0x72, 0x00, 0x11, 0xa0, 0x01, 0x22, 0x11, 0x04, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 160 + 4 * vlenb - mv s7, a0 + mv s0, a0 li a3, 3 li a0, 1 bne a1, a3, .LBB14_118 @@ -5768,7 +5768,7 @@ call strncmp@plt beqz a0, .LBB14_17 # %bb.5: # %if.else27 - ld a0, 16(s7) + ld a0, 16(s0) .Lpcrel_hi286: auipc a1, %pcrel_hi(.L.str.129) addi a1, a1, %pcrel_lo(.Lpcrel_hi286) @@ -5776,14 +5776,14 @@ call fprintf@plt j .LBB14_9 .LBB14_6: # %if.then4 - ld a3, 16(s7) + ld a3, 16(s0) .Lpcrel_hi278: auipc a0, %pcrel_hi(.L.str.122) addi a0, a0, %pcrel_lo(.Lpcrel_hi278) li a1, 29 j .LBB14_8 .LBB14_7: # %if.then8 - ld a3, 16(s7) + ld a3, 16(s0) .Lpcrel_hi280: auipc a0, %pcrel_hi(.L.str.124) addi a0, a0, %pcrel_lo(.Lpcrel_hi280) @@ -5834,11 +5834,11 @@ .LBB14_14: # %cond.end.i li a0, -1 srli s6, a0, 32 - sext.w s0, s3 + sext.w s5, s3 add a1, s3, s4 addiw a1, a1, 3 csrr s9, vlenb - blez s0, .LBB14_25 + blez s5, .LBB14_25 # %bb.15: # %for.body.preheader.i and a0, s3, s6 srli a3, s9, 1 @@ -5847,18 +5847,18 @@ li a2, 0 j .LBB14_23 .LBB14_17: # %if.then18 - lw a0, 28(s7) + lw a0, 28(s0) bnez a0, .LBB14_19 # %bb.18: # %if.then19 - ld a3, 16(s7) + ld a3, 16(s0) .Lpcrel_hi283: auipc a0, %pcrel_hi(.L.str.127) addi a0, a0, %pcrel_lo(.Lpcrel_hi283) li a1, 27 li a2, 1 - li s0, 1 + li s2, 1 call fwrite@plt - sw s0, 28(s7) + sw s2, 28(s0) .LBB14_19: # %if.end23 .Lpcrel_hi284: auipc a0, %pcrel_hi(.L.str.128) @@ -5867,7 +5867,7 @@ mv a2, s1 mv a3, s3 call sqlite3_mprintf@plt - ld a2, 16(s7) + ld a2, 16(s0) mv s0, a0 .Lpcrel_hi285: auipc a0, %pcrel_hi(.L.str.16) @@ -5930,7 +5930,7 @@ addi a1, s4, 1 li a2, 34 sb a2, 0(s4) - blez s0, .LBB14_31 + blez s5, .LBB14_31 # %bb.27: # %for.body26.preheader.i and a3, s3, s6 mv a4, s1 @@ -5970,7 +5970,7 @@ sb a2, 1(a1) li a2, 41 sb a2, 0(a1) - ld a1, 0(s7) + ld a1, 0(s0) addiw s2, s2, 2 add s2, a0, s2 sb zero, 0(s2) @@ -5991,7 +5991,7 @@ call realloc@plt bnez a0, .LBB14_32 .LBB14_34: # %appendText.exit72.thread - ld a0, 0(s7) + ld a0, 0(s0) li a2, -1 addi a3, sp, 32 li a1, 0 @@ -6025,9 +6025,9 @@ mv a0, s1 call strlen@plt mv s4, a0 - sext.w s0, a0 + sext.w s5, a0 addiw a0, a0, 3 - blez s0, .LBB14_46 + blez s5, .LBB14_46 # %bb.39: # %for.body.preheader.i125 and a1, s4, s6 srli a3, s9, 1 @@ -6085,7 +6085,7 @@ addi a0, a0, 1 li a1, 34 sb a1, 0(s3) - blez s0, .LBB14_53 + blez s5, .LBB14_53 # %bb.48: # %for.body26.preheader.i111 and a2, s4, s6 mv a3, s1 @@ -6129,10 +6129,10 @@ .LBB14_56: li s5, 0 .LBB14_57: # %cond.end.i142 - sext.w s0, s4 + sext.w s7, s4 add a1, s4, s5 addiw a1, a1, 3 - blez s0, .LBB14_65 + blez s7, .LBB14_65 # %bb.58: # %for.body.preheader.i174 and a0, s4, s6 srli a3, s9, 1 @@ -6193,7 +6193,7 @@ addi a0, s5, 1 li a1, 39 sb a1, 0(s5) - blez s0, .LBB14_71 + blez s7, .LBB14_71 # %bb.67: # %for.body26.preheader.i160 and a2, s4, s6 j .LBB14_69 @@ -6257,8 +6257,7 @@ li s8, 100 bne a0, s8, .LBB14_114 # %bb.79: # %while.body.preheader - sd s7, 24(sp) # 8-byte Folded Spill - sd s9, 16(sp) # 8-byte Folded Spill + sd s9, 24(sp) # 8-byte Folded Spill srli s9, s9, 1 vsetvli a0, zero, e32, m1, ta, ma vmv.v.i v8, 0 @@ -6271,8 +6270,7 @@ addi a0, a0, 48 vs2r.v v8, (a0) # Unknown-size Folded Spill li s10, 34 - li s11, 117 - li s0, 113 + li s7, 113 .LBB14_80: # %while.body # =>This Loop Header: Depth=1 # Child Loop BB14_90 Depth 2 @@ -6311,8 +6309,9 @@ sb a1, 3(s4) li a1, 111 sb a1, 2(s4) - sb s11, 1(s4) - sb s0, 0(s4) + li a1, 117 + sb a1, 1(s4) + sb s7, 0(s4) add a0, s3, a0 sb zero, 0(a0) mv a0, s2 @@ -6330,14 +6329,14 @@ li s5, 0 .LBB14_86: # %cond.end.i233 # in Loop: Header=BB14_80 Depth=1 - sext.w s7, s4 + sext.w s11, s4 add a1, s4, s5 addiw a1, a1, 3 csrr a0, vlenb add a0, sp, a0 addi a0, a0, 48 vl2r.v v12, (a0) # Unknown-size Folded Reload - blez s7, .LBB14_94 + blez s11, .LBB14_94 # %bb.87: # %for.body.preheader.i265 # in Loop: Header=BB14_80 Depth=1 and a0, s4, s6 @@ -6401,7 +6400,7 @@ add s5, s3, s5 addi a1, s5, 1 sb s10, 0(s5) - blez s7, .LBB14_100 + blez s11, .LBB14_100 # %bb.96: # %for.body26.preheader.i251 # in Loop: Header=BB14_80 Depth=1 and a0, s4, s6 @@ -6500,8 +6499,7 @@ .LBB14_112: li s3, 0 .LBB14_113: # %while.end - ld s7, 24(sp) # 8-byte Folded Reload - ld s9, 16(sp) # 8-byte Folded Reload + ld s9, 24(sp) # 8-byte Folded Reload .LBB14_114: # %while.end ld a0, 32(sp) call sqlite3_finalize@plt @@ -6548,7 +6546,7 @@ mv s2, a0 beqz a0, .LBB14_124 # %bb.123: # %cond.true.i343 - addiw s0, s4, 13 + addiw s3, s4, 13 sext.w a0, s4 add a0, s2, a0 .Lpcrel_hi292: @@ -6556,8 +6554,8 @@ addi a1, a1, %pcrel_lo(.Lpcrel_hi292) li a2, 13 call memcpy@plt - add s0, s2, s0 - sb zero, 0(s0) + add s3, s2, s3 + sb zero, 0(s3) mv a0, s1 call strlen@plt mv s3, a0 @@ -6571,10 +6569,10 @@ mv s3, a0 li s4, 0 .LBB14_125: # %cond.end.i345 - sext.w s0, s3 + sext.w s5, s3 add a1, s3, s4 addiw a1, a1, 3 - blez s0, .LBB14_133 + blez s5, .LBB14_133 # %bb.126: # %for.body.preheader.i377 and a0, s3, s6 srli a3, s9, 1 @@ -6635,7 +6633,7 @@ addi a0, s4, 1 li a1, 34 sb a1, 0(s4) - blez s0, .LBB14_139 + blez s5, .LBB14_139 # %bb.135: # %for.body26.preheader.i363 and a2, s3, s6 j .LBB14_137 @@ -6661,8 +6659,8 @@ sb a1, 0(a0) sb zero, 1(a0) .LBB14_140: # %appendText.exit388 - ld a0, 16(s7) - ld a1, 0(s7) + ld a0, 16(s0) + ld a1, 0(s0) mv a2, s2 call run_table_dump_query li a1, 11 @@ -6674,8 +6672,8 @@ mv a0, s2 li a2, 0 call appendText - ld a2, 16(s7) - ld a1, 0(s7) + ld a2, 16(s0) + ld a1, 0(s0) mv s2, a0 mv a0, a2 mv a2, s2 --- build.head//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/Compress/DeflateEncoder.s 2023-11-13 08:03:21.235591122 +0000 +++ build//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/Compress/DeflateEncoder.s 2023-11-13 08:03:16.267734725 +0000 @@ -2681,7 +2681,7 @@ lw t6, 1216(s9) lw s0, 1220(s9) lw t3, 1224(s9) - lw t4, 1228(s9) + lw t5, 1228(s9) lw s1, 1264(s9) lw s2, 1268(s9) lw s3, 1272(s9) @@ -2693,7 +2693,7 @@ lw t0, 1296(s9) lw t1, 1300(s9) lw t2, 1304(s9) - lw t5, 1308(s9) + lw t4, 1308(s9) lw a0, 1200(s9) sd a0, 224(sp) # 8-byte Folded Spill lw a0, 1204(s9) @@ -2764,7 +2764,7 @@ vmv.s.x v0, t2 vsetivli zero, 19, e32, m8, tu, ma vslideup.vi v8, v0, 18 - vmv.s.x v24, t5 + vmv.s.x v24, t4 vsetivli zero, 20, e32, m8, tu, ma vslideup.vi v8, v24, 19 vsetivli zero, 28, e32, m8, tu, ma @@ -2785,7 +2785,7 @@ vmv.s.x v8, t3 vsetivli zero, 31, e32, m8, tu, ma vslideup.vi v16, v8, 30 - vmv.s.x v8, t4 + vmv.s.x v8, t5 vsetvli zero, s5, e32, m8, ta, ma vslideup.vi v16, v8, 31 csrr a0, vlenb @@ -2975,7 +2975,7 @@ ld a5, 200(sp) # 8-byte Folded Reload ld t0, 192(sp) # 8-byte Folded Reload add a5, a5, t0 - add a6, t3, t4 + add a6, t3, t5 ld a7, 176(sp) # 8-byte Folded Reload ld t0, 168(sp) # 8-byte Folded Reload add a7, a7, t0 --- build.head//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/C/LzmaDec.s 2023-11-13 08:03:21.199592163 +0000 +++ build//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/C/LzmaDec.s 2023-11-13 08:03:16.231735765 +0000 @@ -327,9 +327,9 @@ # %bb.38: # %LzmaDec_InitStateReal.exit # in Loop: Header=BB2_16 Depth=1 vsetivli zero, 4, e32, m1, ta, ma + addi a0, sp, 48 + vl1r.v v8, (a0) # Unknown-size Folded Reload ld a0, 24(sp) # 8-byte Folded Reload - addi a2, sp, 48 - vl1r.v v8, (a2) # Unknown-size Folded Reload vse32.v v8, (a0) sw zero, 72(s1) sw zero, 100(s1) --- build.head//MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_unsp.s 2023-11-13 08:03:22.207563026 +0000 +++ build//MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_unsp.s 2023-11-13 08:03:17.263705934 +0000 @@ -221,7 +221,7 @@ sub sp, sp, t0 .cfi_escape 0x0f, 0x0e, 0x72, 0x00, 0x11, 0xb0, 0x02, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 304 + 8 * vlenb mv s0, a7 - mv s8, a6 + mv s11, a6 mv s2, a0 add a0, a3, a2 li a6, 768 @@ -309,7 +309,7 @@ sd a5, 136(sp) li a0, -1 sw a0, 152(sp) - slli a0, s8, 32 + slli a0, s11, 32 srli a0, a0, 32 add a0, a5, a0 addi a0, a0, -13 @@ -423,9 +423,9 @@ sd a3, 40(sp) # 8-byte Folded Spill addi a1, a1, 71 sd a1, 32(sp) # 8-byte Folded Spill - csrr s11, vlenb - sd s11, 88(sp) # 8-byte Folded Spill - slli s11, s11, 1 + csrr s8, vlenb + sd s8, 88(sp) # 8-byte Folded Spill + slli s8, s8, 1 li t6, 2 vsetvli a1, zero, e32, m8, ta, ma vid.v v8 @@ -451,12 +451,12 @@ # in Loop: Header=BB1_15 Depth=1 mv s7, t4 mv s10, s9 - mv s9, s8 + mv s9, s11 sw ra, 160(sp) .LBB1_17: # %if.end229 # in Loop: Header=BB1_15 Depth=1 mv s6, s5 - mv s8, t3 + mv s11, t3 mv s5, a6 .LBB1_18: # %if.end229 # in Loop: Header=BB1_15 Depth=1 @@ -473,8 +473,8 @@ # in Loop: Header=BB1_15 Depth=1 mv a1, s5 mv s5, s6 - mv t3, s8 - mv s8, s9 + mv t3, s11 + mv s11, s9 mv s9, s10 li ra, 1 ld s10, 112(sp) # 8-byte Folded Reload @@ -545,8 +545,8 @@ # in Loop: Header=BB1_15 Depth=1 mv a2, t0 li t1, 32 - mv t0, s11 - bgeu t1, s11, .LBB1_33 + mv t0, s8 + bgeu t1, s8, .LBB1_33 .LBB1_30: # %do.body.preheader # in Loop: Header=BB1_15 Depth=1 addiw a2, a2, 1 @@ -557,8 +557,8 @@ .LBB1_32: # %do.body.preheader # in Loop: Header=BB1_15 Depth=1 li t1, 32 - mv t0, s11 - bltu t1, s11, .LBB1_30 + mv t0, s8 + bltu t1, s8, .LBB1_30 .LBB1_33: # %do.body.preheader # in Loop: Header=BB1_15 Depth=1 li t0, 32 @@ -620,8 +620,8 @@ add t0, s0, t0 vs2r.v v16, (t0) vadd.vx v24, v24, a0 - subw a7, a7, s11 - add s4, s4, s11 + subw a7, a7, s8 + add s4, s4, s8 bnez a7, .LBB1_41 # %bb.42: # %middle.block1088 # in Loop: Header=BB1_15 Depth=1 @@ -739,7 +739,7 @@ # %bb.56: # %if.end.i.i521 # in Loop: Header=BB1_15 Depth=1 mv s7, t4 - mv s9, s8 + mv s9, s11 lbu a3, 0(a4) addi a4, a4, 1 sd a4, 136(sp) @@ -874,7 +874,7 @@ ld a1, 144(sp) ld a4, 104(sp) # 8-byte Folded Reload mv s7, t4 - mv s9, s8 + mv s9, s11 bgeu a3, a1, .LBB1_206 # %bb.75: # %if.end.i.i461 # in Loop: Header=BB1_15 Depth=1 @@ -1012,7 +1012,7 @@ # %bb.93: # %if.end.i45.i503 # in Loop: Header=BB1_15 Depth=1 mv s7, t4 - mv s9, s8 + mv s9, s11 lbu a0, 0(a4) addi a4, a4, 1 sd a4, 136(sp) @@ -1085,14 +1085,14 @@ # %bb.106: # %if.end100.thread # in Loop: Header=BB1_15 Depth=1 lbu a1, 0(a1) - andi a2, s8, -256 - or s8, a2, a1 + andi a2, s11, -256 + or s11, a2, a1 addi a0, a0, 1846 slli a0, a0, 32 srli a0, a0, 31 add a0, s2, a0 addi a1, sp, 136 - mv a2, s8 + mv a2, s11 mv s1, t4 mv s6, t3 call get_100_bits_from_tablesize @@ -1237,9 +1237,9 @@ .LBB1_128: # in Loop: Header=BB1_15 Depth=1 mv s7, t4 mv s10, s9 - mv s9, s8 + mv s9, s11 mv s6, t3 - ld s8, 104(sp) # 8-byte Folded Reload + ld s11, 104(sp) # 8-byte Folded Reload j .LBB1_18 .LBB1_129: # %if.then.i.i275 # in Loop: Header=BB1_15 Depth=1 @@ -1597,12 +1597,12 @@ .LBB1_188: # in Loop: Header=BB1_15 Depth=1 mv s7, t4 mv s10, s9 - mv s9, s8 + mv s9, s11 j .LBB1_214 .LBB1_189: # in Loop: Header=BB1_15 Depth=1 mv s7, t4 mv s10, s9 - mv s9, s8 + mv s9, s11 j .LBB1_17 .LBB1_190: # %if.then.i.i335 # in Loop: Header=BB1_15 Depth=1 @@ -1727,7 +1727,7 @@ slli a0, a0, 8 sw a0, 152(sp) mv s6, t3 - mv s8, a4 + mv s11, a4 j .LBB1_18 .LBB1_208: # %if.then.i42.i437 # in Loop: Header=BB1_15 Depth=1 @@ -1758,7 +1758,7 @@ .LBB1_212: # %if.then.i.i515 # in Loop: Header=BB1_15 Depth=1 mv s7, t4 - mv s9, s8 + mv s9, s11 sw ra, 160(sp) li a3, 255 .LBB1_213: # %get_byte.exit.i517 @@ -1771,13 +1771,13 @@ .LBB1_214: # %if.end229 # in Loop: Header=BB1_15 Depth=1 mv s6, s5 - mv s8, a6 + mv s11, a6 mv s5, t3 j .LBB1_18 .LBB1_215: # %if.then.i42.i497 # in Loop: Header=BB1_15 Depth=1 mv s7, t4 - mv s9, s8 + mv s9, s11 sw ra, 160(sp) li a0, 255 .LBB1_216: # %get_byte.exit48.i499 --- build.head//MicroBenchmarks/libs/benchmark/src/CMakeFiles/benchmark.dir/sysinfo.s 2023-11-13 08:03:22.127565339 +0000 +++ build//MicroBenchmarks/libs/benchmark/src/CMakeFiles/benchmark.dir/sysinfo.s 2023-11-13 08:03:17.187708131 +0000 @@ -1360,9 +1360,9 @@ sd zero, 32(s11) vsetivli zero, 2, e64, m1, ta, ma vmv.v.i v8, 0 - sd a0, 24(sp) # 8-byte Folded Spill addi a1, sp, 1440 vs1r.v v8, (a1) # Unknown-size Folded Spill + sd a0, 24(sp) # 8-byte Folded Spill vse64.v v8, (a0) addi a0, sp, 824 sd a0, 808(sp) --- build.head//MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/st.s 2023-11-13 08:03:22.379558054 +0000 +++ build//MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/st.s 2023-11-13 08:03:17.419701426 +0000 @@ -1357,18 +1357,18 @@ beqz s1, .LBB6_17 # %bb.14: # %for.cond.i.i.preheader # in Loop: Header=BB6_1 Depth=1 - mv a2, a0 - addi a1, sp, 32 - vl1r.v v8, (a1) # Unknown-size Folded Reload + mv a1, a0 + addi a2, sp, 32 + vl1r.v v8, (a2) # Unknown-size Folded Reload .LBB6_15: # %for.cond.i.i # Parent Loop BB6_1 Depth=1 # => This Inner Loop Header: Depth=2 - mv a1, a2 - ld a2, 0(a2) - bnez a2, .LBB6_15 + mv a2, a1 + ld a1, 0(a1) + bnez a1, .LBB6_15 # %bb.16: # %for.end.i.i # in Loop: Header=BB6_1 Depth=1 - sd s1, 0(a1) + sd s1, 0(a2) mv s1, a0 j .LBB6_19 .LBB6_17: # in Loop: Header=BB6_1 Depth=1 @@ -1662,18 +1662,18 @@ beqz s1, .LBB7_17 # %bb.14: # %for.cond.i.i.preheader # in Loop: Header=BB7_1 Depth=1 - mv a2, a0 - addi a1, sp, 32 - vl1r.v v8, (a1) # Unknown-size Folded Reload + mv a1, a0 + addi a2, sp, 32 + vl1r.v v8, (a2) # Unknown-size Folded Reload .LBB7_15: # %for.cond.i.i # Parent Loop BB7_1 Depth=1 # => This Inner Loop Header: Depth=2 - mv a1, a2 - ld a2, 0(a2) - bnez a2, .LBB7_15 + mv a2, a1 + ld a1, 0(a1) + bnez a1, .LBB7_15 # %bb.16: # %for.end.i.i # in Loop: Header=BB7_1 Depth=1 - sd s1, 0(a1) + sd s1, 0(a2) mv s1, a0 j .LBB7_19 .LBB7_17: # in Loop: Header=BB7_1 Depth=1 @@ -1972,19 +1972,19 @@ beqz a1, .LBB8_18 # %bb.15: # %for.cond.i.i.preheader # in Loop: Header=BB8_1 Depth=1 - mv a2, a0 - addi a1, sp, 48 - vl1r.v v8, (a1) # Unknown-size Folded Reload + mv a1, a0 + addi a2, sp, 48 + vl1r.v v8, (a2) # Unknown-size Folded Reload .LBB8_16: # %for.cond.i.i # Parent Loop BB8_1 Depth=1 # => This Inner Loop Header: Depth=2 - mv a1, a2 - ld a2, 0(a2) - bnez a2, .LBB8_16 + mv a2, a1 + ld a1, 0(a1) + bnez a1, .LBB8_16 # %bb.17: # %for.end.i.i # in Loop: Header=BB8_1 Depth=1 - ld a2, 32(sp) # 8-byte Folded Reload - sd a2, 0(a1) + ld a1, 32(sp) # 8-byte Folded Reload + sd a1, 0(a2) sd a0, 32(sp) # 8-byte Folded Spill j .LBB8_20 .LBB8_18: # in Loop: Header=BB8_1 Depth=1 @@ -2274,18 +2274,18 @@ beqz s1, .LBB9_17 # %bb.14: # %for.cond.i.i.preheader # in Loop: Header=BB9_1 Depth=1 - mv a2, a0 - addi a1, sp, 32 - vl1r.v v8, (a1) # Unknown-size Folded Reload + mv a1, a0 + addi a2, sp, 32 + vl1r.v v8, (a2) # Unknown-size Folded Reload .LBB9_15: # %for.cond.i.i # Parent Loop BB9_1 Depth=1 # => This Inner Loop Header: Depth=2 - mv a1, a2 - ld a2, 0(a2) - bnez a2, .LBB9_15 + mv a2, a1 + ld a1, 0(a1) + bnez a1, .LBB9_15 # %bb.16: # %for.end.i.i # in Loop: Header=BB9_1 Depth=1 - sd s1, 0(a1) + sd s1, 0(a2) mv s1, a0 j .LBB9_19 .LBB9_17: # in Loop: Header=BB9_1 Depth=1 @@ -2580,19 +2580,19 @@ beqz a1, .LBB10_18 # %bb.15: # %for.cond.i.i.preheader # in Loop: Header=BB10_1 Depth=1 - mv a2, a0 - addi a1, sp, 48 - vl1r.v v8, (a1) # Unknown-size Folded Reload + mv a1, a0 + addi a2, sp, 48 + vl1r.v v8, (a2) # Unknown-size Folded Reload .LBB10_16: # %for.cond.i.i # Parent Loop BB10_1 Depth=1 # => This Inner Loop Header: Depth=2 - mv a1, a2 - ld a2, 0(a2) - bnez a2, .LBB10_16 + mv a2, a1 + ld a1, 0(a1) + bnez a1, .LBB10_16 # %bb.17: # %for.end.i.i # in Loop: Header=BB10_1 Depth=1 - ld a2, 32(sp) # 8-byte Folded Reload - sd a2, 0(a1) + ld a1, 32(sp) # 8-byte Folded Reload + sd a1, 0(a2) sd a0, 32(sp) # 8-byte Folded Spill j .LBB10_20 .LBB10_18: # in Loop: Header=BB10_1 Depth=1 --- build.head//MicroBenchmarks/LCALS/SubsetCLambdaLoops/CMakeFiles/lcalsCLambda.dir/__/LCALSStats.s 2023-11-13 08:03:20.907600603 +0000 +++ build//MicroBenchmarks/LCALS/SubsetCLambdaLoops/CMakeFiles/lcalsCLambda.dir/__/LCALSStats.s 2023-11-13 08:03:15.943744090 +0000 @@ -1502,7 +1502,7 @@ sd a0, 80(sp) # 8-byte Folded Spill vslidedown.vi v8, v8, 1 vmv.x.s a0, v8 - sd a0, 48(sp) # 8-byte Folded Spill + sd a0, 64(sp) # 8-byte Folded Spill vsetivli zero, 2, e64, m2, ta, ma csrr a0, vlenb slli a0, a0, 2 @@ -1564,9 +1564,9 @@ vmv.x.s s11, v8 vsetivli zero, 1, e64, m1, ta, ma ld a0, 368(sp) - sd a0, 64(sp) # 8-byte Folded Spill - ld a0, 376(sp) sd a0, 56(sp) # 8-byte Folded Spill + ld a0, 376(sp) + sd a0, 48(sp) # 8-byte Folded Spill ld s9, 352(sp) ld s10, 360(sp) vslidedown.vi v8, v8, 1 @@ -1574,7 +1574,7 @@ mv a0, s4 mv a1, s3 ld a2, 72(sp) # 8-byte Folded Reload - ld a3, 48(sp) # 8-byte Folded Reload + ld a3, 64(sp) # 8-byte Folded Reload call __addtf3@plt ld a2, 104(sp) # 8-byte Folded Reload ld a3, 96(sp) # 8-byte Folded Reload @@ -1594,8 +1594,8 @@ mv a2, s9 mv a3, s10 call __addtf3@plt - ld a2, 64(sp) # 8-byte Folded Reload - ld a3, 56(sp) # 8-byte Folded Reload + ld a2, 56(sp) # 8-byte Folded Reload + ld a3, 48(sp) # 8-byte Folded Reload call __addtf3@plt mv s4, a0 mv s3, a1 --- build.head//MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/btConvexConvexAlgorithm.s 2023-11-13 08:03:22.463555626 +0000 +++ build//MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/btConvexConvexAlgorithm.s 2023-11-13 08:03:17.499699113 +0000 @@ -1580,7 +1580,7 @@ srli a1, a1, 32 flw fs3, 48(s3) flw fs4, 32(s0) - flw fs8, 52(s3) + flw fs7, 52(s3) flw fs9, 36(s0) flw fs1, 56(s3) flw fs2, 40(s0) @@ -1600,7 +1600,7 @@ vmv.x.s a0, v8 andi a0, a0, 15 fmv.s fs5, fs0 - fmv.s fs7, fs0 + fmv.s fs8, fs0 fmv.s fs6, fs0 beqz a0, .LBB9_3 # %bb.2: # %if.then.i @@ -1618,11 +1618,11 @@ flw fa3, 68(sp) flw fa2, 72(sp) fmul.s fs6, fa5, fa4 - fmul.s fs7, fa4, fa3 + fmul.s fs8, fa4, fa3 fmul.s fs5, fa4, fa2 .LBB9_3: # %_ZN15btTransformUtil27calculateVelocityQuaternionERK9btVector3S2_RK12btQuaternionS5_fRS0_S6_.exit fsub.s fs3, fs3, fs4 - fsub.s fs4, fs8, fs9 + fsub.s fs4, fs7, fs9 flw fa5, 48(s2) flw fa4, 48(s0) flw fa3, 52(s2) @@ -1632,7 +1632,7 @@ vsetivli zero, 4, e32, m1, ta, ma vle32.v v8, (s1) fsub.s fs1, fs1, fs2 - fsub.s fs8, fa5, fa4 + fsub.s fs7, fa5, fa4 fsub.s fs9, fa3, fa2 vmfne.vv v8, v8, v14 vsetivli zero, 1, e8, mf8, ta, ma @@ -1657,7 +1657,7 @@ fmul.s fa3, fa4, fa3 fmul.s fa4, fa4, fa2 .LBB9_5: # %_ZN15btTransformUtil27calculateVelocityQuaternionERK9btVector3S2_RK12btQuaternionS5_fRS0_S6_.exit54 - fmul.s fa2, fs7, fs7 + fmul.s fa2, fs8, fs8 fmadd.s fa2, fs6, fs6, fa2 fmadd.s fa2, fs5, fs5, fa2 fsqrt.s fa2, fa2 @@ -1668,7 +1668,7 @@ fmadd.s fa5, fa4, fa4, fa5 fsqrt.s fa5, fa5 fmul.s fa5, fa5, fa0 - fsub.s fa4, fs8, fs3 + fsub.s fa4, fs7, fs3 fsub.s fa3, fs9, fs4 flw fa0, 68(s0) flw ft0, 64(s0) --- build.head//MultiSource/Applications/sqlite3/CMakeFiles/sqlite3.dir/sqlite3.s 2023-11-13 08:03:22.403557360 +0000 +++ build//MultiSource/Applications/sqlite3/CMakeFiles/sqlite3.dir/sqlite3.s 2023-11-13 08:03:17.443700732 +0000 @@ -95667,9 +95667,9 @@ # in Loop: Header=BB444_28 Depth=1 sd s8, 0(s3) vsetivli zero, 2, e64, m1, ta, ma + addi a0, sp, 192 + vl1r.v v8, (a0) # Unknown-size Folded Reload addi a0, sp, 160 - addi a1, sp, 192 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) addi a0, sp, 144 vse64.v v8, (a0) @@ -111178,17 +111178,17 @@ mul a5, a5, a6 sub sp, sp, a5 .cfi_escape 0x0f, 0x0e, 0x72, 0x00, 0x11, 0xa0, 0x0b, 0x22, 0x11, 0x0a, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 1440 + 10 * vlenb - sd a1, 280(sp) # 8-byte Folded Spill + mv s1, a1 lhu a1, 0(a1) li a5, 65 - mv s1, a0 + mv s8, a0 bltu a1, a5, .LBB496_2 # %bb.1: # %if.then .Lpcrel_hi1268: auipc a0, %pcrel_hi(.L.str.391) addi a1, a0, %pcrel_lo(.Lpcrel_hi1268) li a2, 64 - mv a0, s1 + mv a0, s8 call sqlite3ErrorMsg j .LBB496_49 .LBB496_2: # %if.end @@ -111203,13 +111203,13 @@ .LBB496_4: sd zero, 40(sp) # 8-byte Folded Spill .LBB496_5: # %if.end3 - ld s4, 24(s1) + ld s9, 24(s8) addi a0, sp, 1016 li a2, 260 addi s0, sp, 1016 li a1, 0 call memset@plt - sd s1, 504(sp) + sd s8, 504(sp) sd s0, 512(sp) li a0, 5 slli a0, a0, 33 @@ -111220,10 +111220,8 @@ li a2, 61 mv a1, s3 call whereSplit - ld a0, 280(sp) # 8-byte Folded Reload - lh a0, 0(a0) - sd s1, 344(sp) # 8-byte Folded Spill - ld a2, 0(s1) + lh a0, 0(s1) + ld a2, 0(s8) li a1, 96 mul a0, a0, a1 addi s5, a0, 136 @@ -111231,15 +111229,14 @@ beqz a2, .LBB496_9 # %bb.6: # %lor.lhs.false.i.i lbu a0, 42(a2) - ld s1, 280(sp) # 8-byte Folded Reload bnez a0, .LBB496_11 # %bb.7: # %if.then.i.i mv a0, s5 call sqlite3_malloc - mv s10, a0 + mv s7, a0 bnez a0, .LBB496_10 # %bb.8: # %if.then4.i.i - li s10, 0 + li s7, 0 li a0, 1 ld a1, 72(sp) # 8-byte Folded Reload sb a0, 42(a1) @@ -111247,47 +111244,46 @@ .LBB496_9: # %sqlite3DbMallocRaw.exit.i mv a0, s5 call sqlite3_malloc - mv s10, a0 - ld s1, 280(sp) # 8-byte Folded Reload + mv s7, a0 beqz a0, .LBB496_11 .LBB496_10: # %if.then.i slli a2, s5, 32 srli a2, a2, 32 - mv a0, s10 + mv a0, s7 li a1, 0 call memset@plt j .LBB496_12 .LBB496_11: - li s10, 0 + li s7, 0 .LBB496_12: # %sqlite3DbMallocZero.exit ld a0, 72(sp) # 8-byte Folded Reload lbu a0, 42(a0) .Lpcrel_hi1269: auipc a1, %pcrel_hi(mem.5) sd a1, 96(sp) # 8-byte Folded Spill - ld a4, 344(sp) # 8-byte Folded Reload bnez a0, .LBB496_34 # %bb.13: # %if.end10 lh a0, 0(s1) - sw a0, 28(s10) - sd a4, 0(s10) - sd s1, 8(s10) - lw s0, 40(s4) - lw a0, 44(s4) + sw a0, 28(s7) + sd s8, 0(s7) + sd s1, 8(s7) + lw s0, 40(s9) + lw a0, 44(s9) addi a1, s0, 1 - sw a1, 40(s4) + sw a1, 40(s9) + sd s1, 216(sp) # 8-byte Folded Spill bge s0, a0, .LBB496_15 # %bb.14: # %entry.if.end_crit_edge.i - ld a0, 48(s4) + ld a0, 48(s9) bnez a0, .LBB496_21 j .LBB496_22 .LBB496_15: # %if.then.i561 - ld s1, 0(s4) + ld s1, 0(s9) slli a0, a0, 1 addi a0, a0, 10 - sw a0, 44(s4) + sw a0, 44(s9) lbu a1, 42(s1) - ld s5, 48(s4) + ld s5, 48(s9) beqz a1, .LBB496_19 # %bb.16: # %if.then.i.i562 beqz s5, .LBB496_18 @@ -111307,11 +111303,10 @@ mv a0, s5 call sqlite3_realloc bnez a0, .LBB496_20 - j .LBB496_1180 + j .LBB496_1176 .LBB496_20: # %sqlite3DbReallocOrFree.exit.i - sd a0, 48(s4) - ld a4, 344(sp) # 8-byte Folded Reload - ld s1, 280(sp) # 8-byte Folded Reload + sd a0, 48(s9) + ld s1, 216(sp) # 8-byte Folded Reload beqz a0, .LBB496_22 .LBB496_21: # %if.then8.i slli a1, s0, 2 @@ -111320,8 +111315,7 @@ sw a1, 0(a0) .LBB496_22: # %sqlite3VdbeMakeLabel.exit not a2, s0 - sw a2, 24(s10) - mv s2, a4 + sw a2, 24(s7) beqz s3, .LBB496_27 # %bb.23: # %land.lhs.true lhu a0, 0(s1) @@ -111338,11 +111332,10 @@ lw a0, 1276(sp) beqz a0, .LBB496_27 # %bb.25: # %lor.lhs.false.if.then23_crit_edge - mv a4, s2 - lw a2, 24(s10) + lw a2, 24(s7) .LBB496_26: # %if.then23 li a3, 8 - mv a0, a4 + mv a0, s8 mv a1, s3 call sqlite3ExprIfFalse .LBB496_27: # %if.end25 @@ -111381,7 +111374,7 @@ .LBB496_33: # %exprAnalyzeAll.exit ld a0, 72(sp) # 8-byte Folded Reload lbu a0, 42(a0) - ld s1, 280(sp) # 8-byte Folded Reload + ld s1, 216(sp) # 8-byte Folded Reload beqz a0, .LBB496_51 .LBB496_34: # %whereBeginNoMem lw s0, 520(sp) @@ -111425,15 +111418,15 @@ sd a2, %pcrel_lo(.Lpcrel_hi1269)(a3) call free@plt .LBB496_42: # %whereClauseClear.exit2356 - beqz s10, .LBB496_50 + beqz s7, .LBB496_49 # %bb.43: # %for.cond.preheader.i2358 - lw a0, 28(s10) + lw a0, 28(s7) ld a1, 96(sp) # 8-byte Folded Reload ld s0, %pcrel_lo(.Lpcrel_hi1269)(a1) blez a0, .LBB496_48 # %bb.44: # %for.body.i2359.preheader li s1, 0 - addi s2, s10, 128 + addi s2, s7, 128 j .LBB496_46 .LBB496_45: # %if.end.i2367 # in Loop: Header=BB496_46 Depth=1 @@ -111450,19 +111443,18 @@ addi a0, a1, -8 sub s0, s0, a2 call free@plt - lw a0, 28(s10) + lw a0, 28(s7) j .LBB496_45 .LBB496_48: # %sqlite3_free.exit13.i - lw a1, -8(s10) - addi a0, s10, -8 + lw a1, -8(s7) + addi a0, s7, -8 sub s0, s0, a1 ld a1, 96(sp) # 8-byte Folded Reload sd s0, %pcrel_lo(.Lpcrel_hi1269)(a1) call free@plt .LBB496_49: # %cleanup832 - li s10, 0 + li a0, 0 .LBB496_50: # %cleanup832 - mv a0, s10 csrr a1, vlenb li a2, 10 mul a1, a1, a2 @@ -111490,17 +111482,17 @@ addi sp, sp, 1440 ret .LBB496_51: # %if.end33 - mv t3, s2 lh a0, 0(s1) - addi s0, s10, 40 - sd s10, 144(sp) # 8-byte Folded Spill - sd s4, 240(sp) # 8-byte Folded Spill - sd s0, 272(sp) # 8-byte Folded Spill + addi s0, s7, 40 + sd s7, 192(sp) # 8-byte Folded Spill + sd s8, 328(sp) # 8-byte Folded Spill + sd s9, 256(sp) # 8-byte Folded Spill + sd s0, 288(sp) # 8-byte Folded Spill bgtz a0, .LBB496_52 - j .LBB496_1169 + j .LBB496_1164 .LBB496_52: # %for.body44.lr.ph sd zero, 136(sp) # 8-byte Folded Spill - li a5, 0 + li s10, 0 li a1, -1 srli a1, a1, 32 sd a1, 160(sp) # 8-byte Folded Spill @@ -111509,7 +111501,7 @@ sd a1, 376(sp) # 8-byte Folded Spill csrr a2, vlenb sd a2, 320(sp) # 8-byte Folded Spill - srli s11, a2, 2 + srli s6, a2, 2 li a1, 6 mul a1, a2, a1 sd a1, 32(sp) # 8-byte Folded Spill @@ -111522,7 +111514,7 @@ auipc a1, %pcrel_hi(.LCPI496_0) sd a1, 64(sp) # 8-byte Folded Spill fld fs0, %pcrel_lo(.Lpcrel_hi1271)(a1) - li s6, 1 + li s11, 1 fmv.d.x fs1, zero lui a1, 16 addiw a1, a1, -1 @@ -111587,10 +111579,9 @@ lui a1, 407239 addiw t5, a1, -159 li t6, -1 - sd s0, 200(sp) # 8-byte Folded Spill + sd s0, 208(sp) # 8-byte Folded Spill li a1, -1 sd a1, 104(sp) # 8-byte Folded Spill - sd s11, 328(sp) # 8-byte Folded Spill csrr a1, vlenb li a2, 6 mul a1, a1, a2 @@ -111602,6 +111593,7 @@ add a1, sp, a1 addi a1, a1, 1280 vs1r.v v16, (a1) # Unknown-size Folded Spill + sd s6, 360(sp) # 8-byte Folded Spill sd t5, 464(sp) # 8-byte Folded Spill j .LBB496_55 .LBB496_53: # in Loop: Header=BB496_55 Depth=1 @@ -111609,9 +111601,9 @@ .LBB496_54: # %getMask.exit638 # in Loop: Header=BB496_55 Depth=1 ld a0, 104(sp) # 8-byte Folded Reload - and a0, a6, a0 + and a0, a5, a0 sd a0, 104(sp) # 8-byte Folded Spill - ld a3, 200(sp) # 8-byte Folded Reload + ld a3, 208(sp) # 8-byte Folded Reload ld a0, 176(sp) # 8-byte Folded Reload sw a0, 0(a3) lhu a0, 0(s1) @@ -111622,160 +111614,160 @@ slli a1, a0, 48 srai a1, a1, 48 addi a3, a3, 96 - sd a3, 200(sp) # 8-byte Folded Spill + sd a3, 208(sp) # 8-byte Folded Spill sd a2, 136(sp) # 8-byte Folded Spill blt a2, a1, .LBB496_55 - j .LBB496_487 + j .LBB496_486 .LBB496_55: # %for.body44 # =>This Loop Header: Depth=1 # Child Loop BB496_59 Depth 2 # Child Loop BB496_62 Depth 3 # Child Loop BB496_83 Depth 3 # Child Loop BB496_163 Depth 3 - # Child Loop BB496_179 Depth 3 - # Child Loop BB496_199 Depth 3 - # Child Loop BB496_203 Depth 3 + # Child Loop BB496_178 Depth 3 + # Child Loop BB496_198 Depth 3 + # Child Loop BB496_202 Depth 3 # Child Loop BB496_78 Depth 3 # Child Loop BB496_103 Depth 3 # Child Loop BB496_112 Depth 3 # Child Loop BB496_123 Depth 3 - # Child Loop BB496_216 Depth 3 - # Child Loop BB496_470 Depth 3 + # Child Loop BB496_215 Depth 3 + # Child Loop BB496_469 Depth 3 # Child Loop BB496_91 Depth 3 # Child Loop BB496_99 Depth 3 # Child Loop BB496_139 Depth 3 # Child Loop BB496_145 Depth 3 - # Child Loop BB496_209 Depth 3 + # Child Loop BB496_208 Depth 3 # Child Loop BB496_156 Depth 3 - # Child Loop BB496_223 Depth 3 - # Child Loop BB496_227 Depth 3 - # Child Loop BB496_237 Depth 3 - # Child Loop BB496_239 Depth 4 - # Child Loop BB496_251 Depth 5 - # Child Loop BB496_257 Depth 6 - # Child Loop BB496_262 Depth 6 - # Child Loop BB496_275 Depth 6 - # Child Loop BB496_280 Depth 6 - # Child Loop BB496_293 Depth 6 - # Child Loop BB496_299 Depth 6 - # Child Loop BB496_328 Depth 6 - # Child Loop BB496_336 Depth 6 - # Child Loop BB496_343 Depth 6 - # Child Loop BB496_349 Depth 6 - # Child Loop BB496_242 Depth 5 - # Child Loop BB496_368 Depth 4 - # Child Loop BB496_383 Depth 4 - # Child Loop BB496_387 Depth 5 - # Child Loop BB496_400 Depth 5 - # Child Loop BB496_412 Depth 5 - # Child Loop BB496_417 Depth 5 - # Child Loop BB496_430 Depth 4 - # Child Loop BB496_435 Depth 4 - # Child Loop BB496_439 Depth 4 - # Child Loop BB496_449 Depth 4 - # Child Loop BB496_452 Depth 4 - # Child Loop BB496_484 Depth 2 + # Child Loop BB496_222 Depth 3 + # Child Loop BB496_226 Depth 3 + # Child Loop BB496_236 Depth 3 + # Child Loop BB496_238 Depth 4 + # Child Loop BB496_250 Depth 5 + # Child Loop BB496_256 Depth 6 + # Child Loop BB496_261 Depth 6 + # Child Loop BB496_274 Depth 6 + # Child Loop BB496_279 Depth 6 + # Child Loop BB496_292 Depth 6 + # Child Loop BB496_298 Depth 6 + # Child Loop BB496_327 Depth 6 + # Child Loop BB496_335 Depth 6 + # Child Loop BB496_342 Depth 6 + # Child Loop BB496_348 Depth 6 + # Child Loop BB496_241 Depth 5 + # Child Loop BB496_367 Depth 4 + # Child Loop BB496_382 Depth 4 + # Child Loop BB496_386 Depth 5 + # Child Loop BB496_399 Depth 5 + # Child Loop BB496_411 Depth 5 + # Child Loop BB496_416 Depth 5 + # Child Loop BB496_429 Depth 4 + # Child Loop BB496_434 Depth 4 + # Child Loop BB496_438 Depth 4 + # Child Loop BB496_448 Depth 4 + # Child Loop BB496_451 Depth 4 + # Child Loop BB496_483 Depth 2 slli a1, a0, 48 - li a7, 0 + li a6, 0 srai a1, a1, 48 - blt a5, a1, .LBB496_56 - j .LBB496_476 + blt s10, a1, .LBB496_56 + j .LBB496_475 .LBB496_56: # %for.body53.lr.ph # in Loop: Header=BB496_55 Depth=1 sd zero, 152(sp) # 8-byte Folded Spill - li t0, 0 + li a7, 0 sd zero, 176(sp) # 8-byte Folded Spill - li a6, 0 + li a5, 0 li a1, 72 - mul a1, a5, a1 + mul a1, s10, a1 add a1, s1, a1 - addi t1, a1, 8 + addi t0, a1, 8 ld a1, 136(sp) # 8-byte Folded Reload seqz a2, a1 ld a1, 56(sp) # 8-byte Folded Reload sd a2, 112(sp) # 8-byte Folded Spill and a1, a1, a2 sd a1, 88(sp) # 8-byte Folded Spill - sd a5, 192(sp) # 8-byte Folded Spill + sd s10, 200(sp) # 8-byte Folded Spill fmv.d fs2, fs0 sd t6, 488(sp) # 8-byte Folded Spill j .LBB496_59 .LBB496_57: # %cleanup.thread2704 # in Loop: Header=BB496_59 Depth=2 - sext.w a1, a5 - ld a2, 192(sp) # 8-byte Folded Reload + sext.w a1, s10 + ld a2, 200(sp) # 8-byte Folded Reload xor a1, a2, a1 seqz a1, a1 addw a2, a2, a1 - sd a2, 192(sp) # 8-byte Folded Spill - ld s4, 240(sp) # 8-byte Folded Reload + sd a2, 200(sp) # 8-byte Folded Spill + ld s9, 256(sp) # 8-byte Folded Reload .LBB496_58: # %for.inc109 # in Loop: Header=BB496_59 Depth=2 - addi a5, a5, 1 + addi s10, s10, 1 slli a1, a0, 48 srai a1, a1, 48 - addi t1, t1, 72 - blt a5, a1, .LBB496_59 - j .LBB496_477 + addi t0, t0, 72 + blt s10, a1, .LBB496_59 + j .LBB496_476 .LBB496_59: # %for.body53 # Parent Loop BB496_55 Depth=1 # => This Loop Header: Depth=2 # Child Loop BB496_62 Depth 3 # Child Loop BB496_83 Depth 3 # Child Loop BB496_163 Depth 3 - # Child Loop BB496_179 Depth 3 - # Child Loop BB496_199 Depth 3 - # Child Loop BB496_203 Depth 3 + # Child Loop BB496_178 Depth 3 + # Child Loop BB496_198 Depth 3 + # Child Loop BB496_202 Depth 3 # Child Loop BB496_78 Depth 3 # Child Loop BB496_103 Depth 3 # Child Loop BB496_112 Depth 3 # Child Loop BB496_123 Depth 3 - # Child Loop BB496_216 Depth 3 - # Child Loop BB496_470 Depth 3 + # Child Loop BB496_215 Depth 3 + # Child Loop BB496_469 Depth 3 # Child Loop BB496_91 Depth 3 # Child Loop BB496_99 Depth 3 # Child Loop BB496_139 Depth 3 # Child Loop BB496_145 Depth 3 - # Child Loop BB496_209 Depth 3 + # Child Loop BB496_208 Depth 3 # Child Loop BB496_156 Depth 3 - # Child Loop BB496_223 Depth 3 - # Child Loop BB496_227 Depth 3 - # Child Loop BB496_237 Depth 3 - # Child Loop BB496_239 Depth 4 - # Child Loop BB496_251 Depth 5 - # Child Loop BB496_257 Depth 6 - # Child Loop BB496_262 Depth 6 - # Child Loop BB496_275 Depth 6 - # Child Loop BB496_280 Depth 6 - # Child Loop BB496_293 Depth 6 - # Child Loop BB496_299 Depth 6 - # Child Loop BB496_328 Depth 6 - # Child Loop BB496_336 Depth 6 - # Child Loop BB496_343 Depth 6 - # Child Loop BB496_349 Depth 6 - # Child Loop BB496_242 Depth 5 - # Child Loop BB496_368 Depth 4 - # Child Loop BB496_383 Depth 4 - # Child Loop BB496_387 Depth 5 - # Child Loop BB496_400 Depth 5 - # Child Loop BB496_412 Depth 5 - # Child Loop BB496_417 Depth 5 - # Child Loop BB496_430 Depth 4 - # Child Loop BB496_435 Depth 4 - # Child Loop BB496_439 Depth 4 - # Child Loop BB496_449 Depth 4 - # Child Loop BB496_452 Depth 4 - lbu s0, 41(t1) - andi t2, s0, 10 - snez a1, t2 - snez a2, a6 + # Child Loop BB496_222 Depth 3 + # Child Loop BB496_226 Depth 3 + # Child Loop BB496_236 Depth 3 + # Child Loop BB496_238 Depth 4 + # Child Loop BB496_250 Depth 5 + # Child Loop BB496_256 Depth 6 + # Child Loop BB496_261 Depth 6 + # Child Loop BB496_274 Depth 6 + # Child Loop BB496_279 Depth 6 + # Child Loop BB496_292 Depth 6 + # Child Loop BB496_298 Depth 6 + # Child Loop BB496_327 Depth 6 + # Child Loop BB496_335 Depth 6 + # Child Loop BB496_342 Depth 6 + # Child Loop BB496_348 Depth 6 + # Child Loop BB496_241 Depth 5 + # Child Loop BB496_367 Depth 4 + # Child Loop BB496_382 Depth 4 + # Child Loop BB496_386 Depth 5 + # Child Loop BB496_399 Depth 5 + # Child Loop BB496_411 Depth 5 + # Child Loop BB496_416 Depth 5 + # Child Loop BB496_429 Depth 4 + # Child Loop BB496_434 Depth 4 + # Child Loop BB496_438 Depth 4 + # Child Loop BB496_448 Depth 4 + # Child Loop BB496_451 Depth 4 + lbu s0, 41(t0) + andi t1, s0, 10 + snez a1, t1 + snez a2, a5 and a1, a2, a1 beqz a1, .LBB496_60 - j .LBB496_477 + j .LBB496_476 .LBB496_60: # %if.end61 # in Loop: Header=BB496_59 Depth=2 lw a1, 1016(sp) - lw s9, 44(t1) + lw s9, 44(t0) blez a1, .LBB496_64 # %bb.61: # %for.body.preheader.i # in Loop: Header=BB496_59 Depth=2 @@ -111799,23 +111791,21 @@ j .LBB496_57 .LBB496_65: # %if.then.i572 # in Loop: Header=BB496_59 Depth=2 - sll a1, s6, a2 + sll a1, s11, a2 and a1, a1, t6 beqz a1, .LBB496_57 .LBB496_66: # %if.end73 # in Loop: Header=BB496_59 Depth=2 - ld s4, 24(t1) + ld s4, 24(t0) lbu a0, 105(s4) - sd a5, 296(sp) # 8-byte Folded Spill - sd a7, 232(sp) # 8-byte Folded Spill - sd t0, 224(sp) # 8-byte Folded Spill - sd a6, 216(sp) # 8-byte Folded Spill - sd t1, 336(sp) # 8-byte Folded Spill - sd t2, 208(sp) # 8-byte Folded Spill + sd a6, 248(sp) # 8-byte Folded Spill + sd a7, 240(sp) # 8-byte Folded Spill + sd a5, 232(sp) # 8-byte Folded Spill + sd t0, 336(sp) # 8-byte Folded Spill + sd t1, 224(sp) # 8-byte Folded Spill beqz a0, .LBB496_69 # %bb.67: # %if.then75 # in Loop: Header=BB496_59 Depth=2 - mv s1, t3 ld a0, 168(sp) # 8-byte Folded Reload beqz a0, .LBB496_71 # %bb.68: # %cond.true @@ -111825,6 +111815,7 @@ .LBB496_69: # %if.else # in Loop: Header=BB496_59 Depth=2 ld a0, 88(sp) # 8-byte Folded Reload + sd s10, 144(sp) # 8-byte Folded Spill beqz a0, .LBB496_87 # %bb.70: # %cond.true96 # in Loop: Header=BB496_59 Depth=2 @@ -111847,11 +111838,10 @@ li t0, 48 li t3, 5 li a0, 96 - ld a1, 296(sp) # 8-byte Folded Reload - mul a0, a1, a0 - add a0, s10, a0 - addi s8, a0, 128 - ld s3, 0(s8) + mul a0, s10, a0 + add a0, s7, a0 + addi s1, a0, 128 + ld s3, 0(s1) .Lpcrel_hi1272: auipc s0, %pcrel_hi(.LCPI496_1) beqz s3, .LBB496_80 @@ -111867,13 +111857,13 @@ # in Loop: Header=BB496_59 Depth=2 ld a1, 8(s3) ld a0, 528(sp) - bgeu s11, s7, .LBB496_101 + bgeu s6, s7, .LBB496_101 # %bb.75: # %vector.ph3183 # in Loop: Header=BB496_59 Depth=2 ld a2, 160(sp) # 8-byte Folded Reload - add a2, s11, a2 + add a2, s6, a2 and a3, a2, s7 - mv a2, s11 + mv a2, s6 beqz a3, .LBB496_77 # %bb.76: # %vector.ph3183 # in Loop: Header=BB496_59 Depth=2 @@ -111904,7 +111894,7 @@ vsetvli zero, zero, e8, mf4, ta, ma vmerge.vim v10, v16, 1, v0 vsoxei64.v v10, (t3), v8 - sub a5, a5, s11 + sub a5, a5, s6 add a1, a1, a4 bnez a5, .LBB496_78 # %bb.79: # in Loop: Header=BB496_59 Depth=2 @@ -111934,7 +111924,7 @@ # %bb.84: # %if.end.i594 # in Loop: Header=BB496_83 Depth=3 lhu a2, 0(a1) - beq a2, s6, .LBB496_82 + beq a2, s11, .LBB496_82 # %bb.85: # %if.end.i594 # in Loop: Header=BB496_83 Depth=3 li a3, 128 @@ -111993,14 +111983,14 @@ # %bb.95: # %if.then7.i # in Loop: Header=BB496_59 Depth=2 andi a2, a2, 2 - bnez a2, .LBB496_218 + bnez a2, .LBB496_217 # %bb.96: # %if.else.i619 # in Loop: Header=BB496_59 Depth=2 ld a0, 0(a0) ld a0, 32(a0) li s1, 256 bnez a0, .LBB496_97 - j .LBB496_475 + j .LBB496_474 .LBB496_97: # %if.then13.i # in Loop: Header=BB496_59 Depth=2 lw a0, 0(a0) @@ -112082,6 +112072,7 @@ ld a2, 112(sp) # 8-byte Folded Reload or a0, a2, a0 sd a1, 64(s3) + ld s7, 192(sp) # 8-byte Folded Reload bnez a0, .LBB496_109 # %bb.108: # %if.then156.i # in Loop: Header=BB496_59 Depth=2 @@ -112108,7 +112099,6 @@ li t4, 110 ld t5, 464(sp) # 8-byte Folded Reload ld t6, 488(sp) # 8-byte Folded Reload - mv t3, s1 blez a1, .LBB496_115 # %bb.110: # %for.body165.lr.ph.i # in Loop: Header=BB496_59 Depth=2 @@ -112137,9 +112127,8 @@ .Lpcrel_hi1274: auipc a0, %pcrel_hi(.L.str.399) addi a1, a0, %pcrel_lo(.Lpcrel_hi1274) - mv a0, t3 + mv a0, s8 call sqlite3ErrorMsg - mv t3, s1 ld t6, 488(sp) # 8-byte Folded Reload ld t5, 464(sp) # 8-byte Folded Reload li t4, 110 @@ -112155,11 +112144,11 @@ addi a0, a0, 1280 vl2r.v v14, (a0) # Unknown-size Folded Reload fmv.d.x fa5, zero - ld s4, 240(sp) # 8-byte Folded Reload - j .LBB496_184 + ld s9, 256(sp) # 8-byte Folded Reload + j .LBB496_183 .LBB496_115: # %for.end180.i # in Loop: Header=BB496_59 Depth=2 - ld s4, 240(sp) # 8-byte Folded Reload + ld s9, 256(sp) # 8-byte Folded Reload beqz a0, .LBB496_127 # %bb.116: # %for.end180.i # in Loop: Header=BB496_59 Depth=2 @@ -112167,8 +112156,8 @@ bne a0, a1, .LBB496_126 # %bb.117: # %if.then186.i # in Loop: Header=BB496_59 Depth=2 - ld a0, 0(t3) - sb s6, 42(a0) + ld a0, 0(s8) + sb s11, 42(a0) j .LBB496_127 .LBB496_118: # in Loop: Header=BB496_59 Depth=2 li s1, 0 @@ -112216,9 +112205,8 @@ .Lpcrel_hi1275: auipc a0, %pcrel_hi(.L.str) addi a1, a0, %pcrel_lo(.Lpcrel_hi1275) - mv a0, s1 + mv a0, s8 call sqlite3ErrorMsg - mv t3, s1 ld t6, 488(sp) # 8-byte Folded Reload ld t5, 464(sp) # 8-byte Folded Reload li t4, 110 @@ -112237,17 +112225,17 @@ # in Loop: Header=BB496_59 Depth=2 fld fa5, 64(s3) sw s2, 16(s3) - j .LBB496_184 + j .LBB496_183 .LBB496_128: # %land.lhs.true2.i # in Loop: Header=BB496_59 Depth=2 bnez ra, .LBB496_129 - j .LBB496_472 + j .LBB496_471 .LBB496_129: # %lor.lhs.false.i621 # in Loop: Header=BB496_59 Depth=2 ld a0, 16(ra) ld a1, 0(a0) lbu a2, 0(a1) - ld s1, 280(sp) # 8-byte Folded Reload + ld s1, 216(sp) # 8-byte Folded Reload li a3, 149 bne a2, a3, .LBB496_132 # %bb.130: # %land.lhs.true.i.i @@ -112258,15 +112246,15 @@ # in Loop: Header=BB496_59 Depth=2 lw a1, 76(a1) li a2, -1 - beq a1, a2, .LBB496_214 + beq a1, a2, .LBB496_213 .LBB496_132: # in Loop: Header=BB496_59 Depth=2 li a0, 0 li a4, 0 - li t2, 0 + li t1, 0 li a1, 0 fmv.d fs3, fs1 - ld s10, 144(sp) # 8-byte Folded Reload - j .LBB496_474 + ld s7, 192(sp) # 8-byte Folded Reload + j .LBB496_473 .LBB496_133: # in Loop: Header=BB496_59 Depth=2 li s1, 0 .LBB496_134: # %if.end20.i @@ -112281,7 +112269,7 @@ # in Loop: Header=BB496_59 Depth=2 .Lpcrel_hi1280: auipc a0, %pcrel_hi(.LCPI496_6) - sd a0, 248(sp) # 8-byte Folded Spill + sd a0, 264(sp) # 8-byte Folded Spill beqz s2, .LBB496_149 # %bb.137: # %for.body.lr.ph.i167.i # in Loop: Header=BB496_59 Depth=2 @@ -112323,7 +112311,7 @@ # in Loop: Header=BB496_145 Depth=3 addiw a2, a2, -1 addi a1, a1, 48 - beqz a2, .LBB496_205 + beqz a2, .LBB496_204 .LBB496_145: # %for.body.us.i199.i # Parent Loop BB496_55 Depth=1 # Parent Loop BB496_59 Depth=2 @@ -112345,9 +112333,9 @@ lbu a3, 14(a1) andi a3, a3, 24 beqz a3, .LBB496_144 - j .LBB496_206 + j .LBB496_205 .LBB496_149: # in Loop: Header=BB496_59 Depth=2 - sd zero, 288(sp) # 8-byte Folded Spill + sd zero, 296(sp) # 8-byte Folded Spill .LBB496_150: # %if.end37.i # in Loop: Header=BB496_59 Depth=2 sd a7, 408(sp) # 8-byte Folded Spill @@ -112358,22 +112346,22 @@ ld a0, 0(s2) lbu a1, 0(a0) li a2, 149 - bne a1, a2, .LBB496_225 + bne a1, a2, .LBB496_224 # %bb.152: # %land.lhs.true.i255.i # in Loop: Header=BB496_59 Depth=2 lw a1, 72(a0) - bne a1, s9, .LBB496_225 + bne a1, s9, .LBB496_224 # %bb.153: # %land.lhs.true4.i258.i # in Loop: Header=BB496_59 Depth=2 lw a0, 76(a0) li a1, -1 - bne a0, a1, .LBB496_225 + bne a0, a1, .LBB496_224 # %bb.154: # %land.lhs.true7.i261.i # in Loop: Header=BB496_59 Depth=2 ld s3, 512(sp) lw a0, 0(s3) li s4, -1 - blez a0, .LBB496_220 + blez a0, .LBB496_219 # %bb.155: # %for.body.preheader.i.i.i279.i # in Loop: Header=BB496_59 Depth=2 li a1, 0 @@ -112383,18 +112371,18 @@ # Parent Loop BB496_59 Depth=2 # => This Inner Loop Header: Depth=3 lw a3, 0(a2) - beq a3, s9, .LBB496_219 + beq a3, s9, .LBB496_218 # %bb.157: # %for.cond.i.i.i285.i # in Loop: Header=BB496_156 Depth=3 addi a1, a1, 1 addi a2, a2, 4 bne a0, a1, .LBB496_156 - j .LBB496_220 + j .LBB496_219 .LBB496_158: # in Loop: Header=BB496_59 Depth=2 ld s2, 320(sp) # 8-byte Folded Reload flt.d a0, fs3, fs4 - beqz a0, .LBB496_229 - j .LBB496_230 + beqz a0, .LBB496_228 + j .LBB496_229 .LBB496_159: # in Loop: Header=BB496_59 Depth=2 li s7, 0 .LBB496_160: # %for.end.i @@ -112403,7 +112391,7 @@ # %bb.161: # %for.cond21.preheader.i # in Loop: Header=BB496_59 Depth=2 lw a0, 0(s2) - blez a0, .LBB496_169 + blez a0, .LBB496_168 # %bb.162: # %for.body24.lr.ph.i # in Loop: Header=BB496_59 Depth=2 ld a2, 16(s2) @@ -112416,11 +112404,11 @@ ld a4, 0(a2) lbu a5, 0(a4) li a6, 149 - bne a5, a6, .LBB496_168 + bne a5, a6, .LBB496_169 # %bb.164: # %lor.lhs.false.i # in Loop: Header=BB496_163 Depth=3 lw a4, 72(a4) - bne a4, s9, .LBB496_168 + bne a4, s9, .LBB496_169 # %bb.165: # %for.inc35.i # in Loop: Header=BB496_163 Depth=3 addiw a1, a1, 1 @@ -112428,70 +112416,57 @@ addi a2, a2, 24 bnez a3, .LBB496_163 # %bb.166: # in Loop: Header=BB496_59 Depth=2 - mv s9, s8 - mv s1, s0 mv a1, a0 - j .LBB496_170 + j .LBB496_169 .LBB496_167: # in Loop: Header=BB496_59 Depth=2 - mv s9, s8 - mv s1, s0 li s5, 0 - j .LBB496_171 -.LBB496_168: # in Loop: Header=BB496_59 Depth=2 - mv s9, s8 - mv s1, s0 j .LBB496_170 -.LBB496_169: # in Loop: Header=BB496_59 Depth=2 - mv s9, s8 - mv s1, s0 +.LBB496_168: # in Loop: Header=BB496_59 Depth=2 li a1, 0 -.LBB496_170: # %for.end37.i +.LBB496_169: # %for.end37.i # in Loop: Header=BB496_59 Depth=2 xor a1, a1, a0 snez a1, a1 addi a1, a1, -1 and s5, a1, a0 -.LBB496_171: # %if.end44.i +.LBB496_170: # %if.end44.i # in Loop: Header=BB496_59 Depth=2 - ld s0, 240(sp) # 8-byte Folded Reload - ld a0, 344(sp) # 8-byte Folded Reload - ld s8, 0(a0) + ld s9, 256(sp) # 8-byte Folded Reload + ld s8, 0(s8) li a0, 20 mul a0, s7, a0 slli a1, s5, 3 add a0, a0, a1 addiw s6, a0, 72 - beqz s8, .LBB496_175 -# %bb.172: # %lor.lhs.false.i.i.i + beqz s8, .LBB496_174 +# %bb.171: # %lor.lhs.false.i.i.i # in Loop: Header=BB496_59 Depth=2 lbu a0, 42(s8) - bnez a0, .LBB496_183 -# %bb.173: # %if.then.i.i.i584 + bnez a0, .LBB496_182 +# %bb.172: # %if.then.i.i.i584 # in Loop: Header=BB496_59 Depth=2 mv a0, s6 call sqlite3_malloc mv s3, a0 - bnez a0, .LBB496_176 -# %bb.174: # %if.then4.i.i.i + bnez a0, .LBB496_175 +# %bb.173: # %if.then4.i.i.i # in Loop: Header=BB496_59 Depth=2 - li a0, 1 - sb a0, 42(s8) - j .LBB496_183 -.LBB496_175: # %sqlite3DbMallocRaw.exit.i.i + sb s11, 42(s8) + j .LBB496_182 +.LBB496_174: # %sqlite3DbMallocRaw.exit.i.i # in Loop: Header=BB496_59 Depth=2 mv a0, s6 call sqlite3_malloc mv s3, a0 - beqz a0, .LBB496_183 -.LBB496_176: # %if.end53.i + beqz a0, .LBB496_182 +.LBB496_175: # %if.end53.i # in Loop: Header=BB496_59 Depth=2 slli a2, s6, 32 srli a2, a2, 32 mv a0, s3 li a1, 0 call memset@plt - mv s8, s9 - sd s3, 0(s9) + sd s3, 0(s1) addi a2, s3, 72 li t3, 12 mul a0, s7, t3 @@ -112504,7 +112479,6 @@ add s9, a1, s9 sd a1, 24(s3) sd s9, 32(s3) - li s6, 1 csrr a4, vlenb slli a4, a4, 2 add a4, sp, a4 @@ -112515,12 +112489,12 @@ add a4, sp, a4 addi a4, a4, 1280 vl1r.v v16, (a4) # Unknown-size Folded Reload + ld s6, 360(sp) # 8-byte Folded Reload li t4, 24 li t5, 76 ld t6, 488(sp) # 8-byte Folded Reload - mv s0, s1 - blez a3, .LBB496_194 -# %bb.177: # %for.body65.lr.ph.i + blez a3, .LBB496_193 +# %bb.176: # %for.body65.lr.ph.i # in Loop: Header=BB496_59 Depth=2 ld a7, 528(sp) ld a4, 336(sp) # 8-byte Folded Reload @@ -112528,28 +112502,28 @@ li a5, 0 li a6, 0 addi a7, a7, 14 - j .LBB496_179 -.LBB496_178: # %for.inc96.i - # in Loop: Header=BB496_179 Depth=3 + j .LBB496_178 +.LBB496_177: # %for.inc96.i + # in Loop: Header=BB496_178 Depth=3 addiw a6, a6, 1 addi a7, a7, 48 - beq a3, a6, .LBB496_194 -.LBB496_179: # %for.body65.i + beq a3, a6, .LBB496_193 +.LBB496_178: # %for.body65.i # Parent Loop BB496_55 Depth=1 # Parent Loop BB496_59 Depth=2 # => This Inner Loop Header: Depth=3 lh t0, -4(a7) - bne a4, t0, .LBB496_178 -# %bb.180: # %if.end72.i - # in Loop: Header=BB496_179 Depth=3 + bne a4, t0, .LBB496_177 +# %bb.179: # %if.end72.i + # in Loop: Header=BB496_178 Depth=3 lhu t0, 0(a7) - beq t0, s6, .LBB496_178 -# %bb.181: # %if.end72.i - # in Loop: Header=BB496_179 Depth=3 + beq t0, s11, .LBB496_177 +# %bb.180: # %if.end72.i + # in Loop: Header=BB496_178 Depth=3 li t1, 128 - beq t0, t1, .LBB496_178 -# %bb.182: # %if.end84.i - # in Loop: Header=BB496_179 Depth=3 + beq t0, t1, .LBB496_177 +# %bb.181: # %if.end84.i + # in Loop: Header=BB496_178 Depth=3 lh t1, -2(a7) mul t2, a5, t3 add t2, a2, t2 @@ -112557,18 +112531,16 @@ sw a6, 8(t2) sb t0, 4(t2) addiw a5, a5, 1 - j .LBB496_178 -.LBB496_183: # %cleanup121.thread.i + j .LBB496_177 +.LBB496_182: # %cleanup121.thread.i # in Loop: Header=BB496_59 Depth=2 .Lpcrel_hi1273: auipc a0, %pcrel_hi(.L.str.203) addi a1, a0, %pcrel_lo(.Lpcrel_hi1273) - ld s2, 344(sp) # 8-byte Folded Reload - mv a0, s2 + ld s8, 328(sp) # 8-byte Folded Reload + mv a0, s8 call sqlite3ErrorMsg - mv t3, s2 fmv.d.x fa5, zero - li s6, 1 csrr a0, vlenb li a1, 6 mul a0, a0, a1 @@ -112580,80 +112552,78 @@ add a0, sp, a0 addi a0, a0, 1280 vl1r.v v16, (a0) # Unknown-size Folded Reload + ld s6, 360(sp) # 8-byte Folded Reload + ld s7, 192(sp) # 8-byte Folded Reload li t4, 110 ld t5, 464(sp) # 8-byte Folded Reload ld t6, 488(sp) # 8-byte Folded Reload - mv s4, s0 - mv s0, s1 - mv s8, s9 -.LBB496_184: # %bestVirtualIndex.exit +.LBB496_183: # %bestVirtualIndex.exit # in Loop: Header=BB496_59 Depth=2 - ld a1, 0(s8) - ld a5, 296(sp) # 8-byte Folded Reload - ld a7, 232(sp) # 8-byte Folded Reload - ld t0, 224(sp) # 8-byte Folded Reload - ld a6, 216(sp) # 8-byte Folded Reload - ld t1, 336(sp) # 8-byte Folded Reload - ld a3, 208(sp) # 8-byte Folded Reload - beqz a1, .LBB496_193 -# %bb.185: # %land.lhs.true84 + ld a1, 0(s1) + ld a6, 248(sp) # 8-byte Folded Reload + ld a7, 240(sp) # 8-byte Folded Reload + ld a5, 232(sp) # 8-byte Folded Reload + ld t0, 336(sp) # 8-byte Folded Reload + ld a3, 224(sp) # 8-byte Folded Reload + beqz a1, .LBB496_192 +# %bb.184: # %land.lhs.true84 # in Loop: Header=BB496_59 Depth=2 lw a2, 60(a1) lui a0, 2048 - ld s1, 280(sp) # 8-byte Folded Reload - beqz a2, .LBB496_187 -# %bb.186: # %land.lhs.true84 + ld s1, 216(sp) # 8-byte Folded Reload + beqz a2, .LBB496_186 +# %bb.185: # %land.lhs.true84 # in Loop: Header=BB496_59 Depth=2 lui a0, 2304 -.LBB496_187: # %if.end87 +.LBB496_186: # %if.end87 # in Loop: Header=BB496_59 Depth=2 fld fs3, %pcrel_lo(.Lpcrel_hi1272)(s0) flt.d a2, fs3, fa5 - bnez a2, .LBB496_189 -.LBB496_188: # %if.end87 + bnez a2, .LBB496_188 +.LBB496_187: # %if.end87 # in Loop: Header=BB496_59 Depth=2 fmv.d fs3, fa5 -.LBB496_189: # %if.end87 +.LBB496_188: # %if.end87 # in Loop: Header=BB496_59 Depth=2 li a4, 0 - li t2, 0 + li t1, 0 flt.d a2, fs3, fs2 - beqz a2, .LBB496_191 -.LBB496_190: # %if.then104 + beqz a2, .LBB496_190 +.LBB496_189: # %if.then104 # in Loop: Header=BB496_59 Depth=2 - ld a2, 200(sp) # 8-byte Folded Reload + ld a2, 208(sp) # 8-byte Folded Reload sd a1, 80(a2) - li a6, 1 - sd a5, 176(sp) # 8-byte Folded Spill + li a5, 1 + sd s10, 176(sp) # 8-byte Folded Spill fmv.d fs2, fs3 - mv t0, a4 + mv a7, a4 sd a0, 152(sp) # 8-byte Folded Spill - mv a7, t2 -.LBB496_191: # %cleanup + mv a6, t1 +.LBB496_190: # %cleanup # in Loop: Header=BB496_59 Depth=2 - beqz a3, .LBB496_192 - j .LBB496_477 -.LBB496_192: # %cleanup.for.inc109_crit_edge + beqz a3, .LBB496_191 + j .LBB496_476 +.LBB496_191: # %cleanup.for.inc109_crit_edge # in Loop: Header=BB496_59 Depth=2 lhu a0, 0(s1) j .LBB496_58 -.LBB496_193: # in Loop: Header=BB496_59 Depth=2 +.LBB496_192: # in Loop: Header=BB496_59 Depth=2 lui a0, 2048 - ld s1, 280(sp) # 8-byte Folded Reload + ld s1, 216(sp) # 8-byte Folded Reload fld fs3, %pcrel_lo(.Lpcrel_hi1272)(s0) flt.d a2, fs3, fa5 - beqz a2, .LBB496_188 - j .LBB496_189 -.LBB496_194: # %for.cond100.preheader.i + beqz a2, .LBB496_187 + j .LBB496_188 +.LBB496_193: # %for.cond100.preheader.i # in Loop: Header=BB496_59 Depth=2 - blez s5, .LBB496_200 -# %bb.195: # %for.body103.lr.ph.i + blez s5, .LBB496_199 +# %bb.194: # %for.body103.lr.ph.i # in Loop: Header=BB496_59 Depth=2 ld a2, 16(s2) ld a7, 320(sp) # 8-byte Folded Reload srli a3, a7, 2 - bgeu a3, s5, .LBB496_201 -# %bb.196: # %vector.ph3196 + bgeu a3, s5, .LBB496_200 +# %bb.195: # %vector.ph3196 # in Loop: Header=BB496_59 Depth=2 ld a4, 160(sp) # 8-byte Folded Reload add a4, a3, a4 @@ -112661,17 +112631,18 @@ ld t0, 32(sp) # 8-byte Folded Reload ld t1, 80(sp) # 8-byte Folded Reload li t2, 8 - beqz a4, .LBB496_198 -# %bb.197: # %vector.ph3196 + beqz a4, .LBB496_197 +# %bb.196: # %vector.ph3196 # in Loop: Header=BB496_59 Depth=2 mv a3, a4 -.LBB496_198: # %vector.ph3196 +.LBB496_197: # %vector.ph3196 # in Loop: Header=BB496_59 Depth=2 sub a3, s5, a3 vsetvli a4, zero, e32, m1, ta, ma mv a4, a2 mv a5, a3 -.LBB496_199: # %vector.body3200 + ld s8, 328(sp) # 8-byte Folded Reload +.LBB496_198: # %vector.body3200 # Parent Loop BB496_55 Depth=1 # Parent Loop BB496_59 Depth=2 # => This Inner Loop Header: Depth=3 @@ -112682,25 +112653,23 @@ vlse8.v v8, (a6), t4 addi a6, a1, 4 vsse8.v v8, (a6), t2 - sub a5, a5, s11 + sub a5, a5, s6 add a4, a4, t0 add a1, a1, t1 - bnez a5, .LBB496_199 - j .LBB496_202 -.LBB496_200: # in Loop: Header=BB496_59 Depth=2 - ld s1, 344(sp) # 8-byte Folded Reload + bnez a5, .LBB496_198 + j .LBB496_201 +.LBB496_199: # in Loop: Header=BB496_59 Depth=2 + ld s8, 328(sp) # 8-byte Folded Reload ld a7, 320(sp) # 8-byte Folded Reload ld t1, 80(sp) # 8-byte Folded Reload li t2, 8 - li t0, 48 - li t3, 5 - bgtz s7, .LBB496_74 - j .LBB496_104 -.LBB496_201: # in Loop: Header=BB496_59 Depth=2 + j .LBB496_203 +.LBB496_200: # in Loop: Header=BB496_59 Depth=2 li a3, 0 + ld s8, 328(sp) # 8-byte Folded Reload ld t1, 80(sp) # 8-byte Folded Reload li t2, 8 -.LBB496_202: # %for.body103.i.preheader +.LBB496_201: # %for.body103.i.preheader # in Loop: Header=BB496_59 Depth=2 sub a1, s5, a3 slli a4, a3, 3 @@ -112710,7 +112679,7 @@ mul a3, a3, t4 add a2, a2, a3 addi a2, a2, 16 -.LBB496_203: # %for.body103.i +.LBB496_202: # %for.body103.i # Parent Loop BB496_55 Depth=1 # Parent Loop BB496_59 Depth=2 # => This Inner Loop Header: Depth=3 @@ -112722,116 +112691,115 @@ addi a1, a1, -1 addi a0, a0, 8 addi a2, a2, 24 - bnez a1, .LBB496_203 -# %bb.204: # in Loop: Header=BB496_59 Depth=2 - ld s1, 344(sp) # 8-byte Folded Reload + bnez a1, .LBB496_202 +.LBB496_203: # in Loop: Header=BB496_59 Depth=2 li t0, 48 li t3, 5 bgtz s7, .LBB496_74 j .LBB496_104 -.LBB496_205: # in Loop: Header=BB496_59 Depth=2 +.LBB496_204: # in Loop: Header=BB496_59 Depth=2 li a1, 0 -.LBB496_206: # %findTerm.exit222.i +.LBB496_205: # %findTerm.exit222.i # in Loop: Header=BB496_59 Depth=2 - ld a2, 248(sp) # 8-byte Folded Reload + ld a2, 264(sp) # 8-byte Folded Reload fld fa5, %pcrel_lo(.Lpcrel_hi1280)(a2) li a2, 512 - sd a2, 288(sp) # 8-byte Folded Spill - beqz a1, .LBB496_209 -# %bb.207: # %findTerm.exit222.i + sd a2, 296(sp) # 8-byte Folded Spill + beqz a1, .LBB496_208 +# %bb.206: # %findTerm.exit222.i # in Loop: Header=BB496_59 Depth=2 fdiv.d fs3, fs3, fa5 lui a1, 16 addi a1, a1, 512 - sd a1, 288(sp) # 8-byte Folded Spill - j .LBB496_209 -.LBB496_208: # %for.inc51.us.i234.i - # in Loop: Header=BB496_209 Depth=3 + sd a1, 296(sp) # 8-byte Folded Spill + j .LBB496_208 +.LBB496_207: # %for.inc51.us.i234.i + # in Loop: Header=BB496_208 Depth=3 addiw s2, s2, -1 addi a0, a0, 48 beqz s2, .LBB496_150 -.LBB496_209: # %for.body.us.i228.i +.LBB496_208: # %for.body.us.i228.i # Parent Loop BB496_55 Depth=1 # Parent Loop BB496_59 Depth=2 # => This Inner Loop Header: Depth=3 lh a1, -22(a0) - bne s9, a1, .LBB496_208 -# %bb.210: # %land.lhs.true.us.i239.i - # in Loop: Header=BB496_209 Depth=3 + bne s9, a1, .LBB496_207 +# %bb.209: # %land.lhs.true.us.i239.i + # in Loop: Header=BB496_208 Depth=3 ld a1, 0(a0) and a1, a1, t6 - bnez a1, .LBB496_208 -# %bb.211: # %land.lhs.true4.us.i243.i - # in Loop: Header=BB496_209 Depth=3 + bnez a1, .LBB496_207 +# %bb.210: # %land.lhs.true4.us.i243.i + # in Loop: Header=BB496_208 Depth=3 lhu a1, -20(a0) ld a2, 312(sp) # 8-byte Folded Reload - bne a1, a2, .LBB496_208 -# %bb.212: # %land.lhs.true8.us.i247.i - # in Loop: Header=BB496_209 Depth=3 + bne a1, a2, .LBB496_207 +# %bb.211: # %land.lhs.true8.us.i247.i + # in Loop: Header=BB496_208 Depth=3 lbu a1, -18(a0) andi a1, a1, 36 - beqz a1, .LBB496_208 -# %bb.213: # %if.then32.i + beqz a1, .LBB496_207 +# %bb.212: # %if.then32.i # in Loop: Header=BB496_59 Depth=2 lui a0, 32 - ld a1, 288(sp) # 8-byte Folded Reload + ld a1, 296(sp) # 8-byte Folded Reload or a1, a1, a0 - sd a1, 288(sp) # 8-byte Folded Spill + sd a1, 296(sp) # 8-byte Folded Spill fdiv.d fs3, fs3, fa5 j .LBB496_150 -.LBB496_214: # %land.lhs.true7.i.i +.LBB496_213: # %land.lhs.true7.i.i # in Loop: Header=BB496_59 Depth=2 ld s3, 512(sp) lw a1, 0(s3) li s1, -1 - bgtz a1, .LBB496_215 - j .LBB496_467 -.LBB496_215: # %for.body.preheader.i.i.i.i + bgtz a1, .LBB496_214 + j .LBB496_466 +.LBB496_214: # %for.body.preheader.i.i.i.i # in Loop: Header=BB496_59 Depth=2 li a2, 0 addi a3, s3, 4 -.LBB496_216: # %for.body.i.i.i.i +.LBB496_215: # %for.body.i.i.i.i # Parent Loop BB496_55 Depth=1 # Parent Loop BB496_59 Depth=2 # => This Inner Loop Header: Depth=3 lw a4, 0(a3) - bne a4, s9, .LBB496_217 - j .LBB496_466 -.LBB496_217: # %for.cond.i.i.i.i - # in Loop: Header=BB496_216 Depth=3 + bne a4, s9, .LBB496_216 + j .LBB496_465 +.LBB496_216: # %for.cond.i.i.i.i + # in Loop: Header=BB496_215 Depth=3 addi a2, a2, 1 addi a3, a3, 4 - bne a1, a2, .LBB496_216 - j .LBB496_467 -.LBB496_218: # in Loop: Header=BB496_59 Depth=2 - li t2, 0 + bne a1, a2, .LBB496_215 + j .LBB496_466 +.LBB496_217: # in Loop: Header=BB496_59 Depth=2 + li t1, 0 li a1, 0 li a4, 1 ld a0, 24(sp) # 8-byte Folded Reload - j .LBB496_473 -.LBB496_219: # %if.then.i.i.i288.i + j .LBB496_472 +.LBB496_218: # %if.then.i.i.i288.i # in Loop: Header=BB496_59 Depth=2 - sll a0, s6, a1 + sll a0, s11, a1 not s4, a0 -.LBB496_220: # %getMask.exit.i.i263.i +.LBB496_219: # %getMask.exit.i.i263.i # in Loop: Header=BB496_59 Depth=2 lw s5, 0(ra) - bgtz s5, .LBB496_222 -# %bb.221: # %getMask.exit.i.i263.i + bgtz s5, .LBB496_221 +# %bb.220: # %getMask.exit.i.i263.i # in Loop: Header=BB496_59 Depth=2 li s5, 1 -.LBB496_222: # %getMask.exit.i.i263.i +.LBB496_221: # %getMask.exit.i.i263.i # in Loop: Header=BB496_59 Depth=2 addi a0, s2, 24 -.LBB496_223: # %while.cond.i.i267.i +.LBB496_222: # %while.cond.i.i267.i # Parent Loop BB496_55 Depth=1 # Parent Loop BB496_59 Depth=2 # => This Inner Loop Header: Depth=3 addi s5, s5, -1 - bnez s5, .LBB496_224 - j .LBB496_462 -.LBB496_224: # %while.body.i.i270.i - # in Loop: Header=BB496_223 Depth=3 + bnez s5, .LBB496_223 + j .LBB496_461 +.LBB496_223: # %while.body.i.i270.i + # in Loop: Header=BB496_222 Depth=3 ld a1, 0(a0) addi s6, a0, 24 mv a0, s3 @@ -112853,255 +112821,253 @@ vl2r.v v14, (a1) # Unknown-size Folded Reload and a1, a0, s4 mv a0, s6 - li s6, 1 - beqz a1, .LBB496_223 -.LBB496_225: # %if.else49.i + ld s6, 360(sp) # 8-byte Folded Reload + beqz a1, .LBB496_222 +.LBB496_224: # %if.else49.i # in Loop: Header=BB496_59 Depth=2 ld a0, 392(sp) # 8-byte Folded Reload fld fa5, %pcrel_lo(.Lpcrel_hi1277)(a0) flt.d a0, fa5, fs3 - bnez a0, .LBB496_226 - j .LBB496_461 -.LBB496_226: # %while.body.i293.i.preheader + bnez a0, .LBB496_225 + j .LBB496_460 +.LBB496_225: # %while.body.i293.i.preheader # in Loop: Header=BB496_59 Depth=2 ld a7, 408(sp) # 8-byte Folded Reload fld fa3, %pcrel_lo(.Lpcrel_hi1276)(a7) fmv.d fa2, fa5 fmv.d fa4, fa3 - ld t3, 344(sp) # 8-byte Folded Reload ld s2, 320(sp) # 8-byte Folded Reload -.LBB496_227: # %while.body.i293.i +.LBB496_226: # %while.body.i293.i # Parent Loop BB496_55 Depth=1 # Parent Loop BB496_59 Depth=2 # => This Inner Loop Header: Depth=3 fmul.d fa2, fa2, fa5 flt.d a0, fa2, fs3 fadd.d fa4, fa4, fa3 - bnez a0, .LBB496_227 -# %bb.228: # %estLog.exit299.i + bnez a0, .LBB496_226 +# %bb.227: # %estLog.exit299.i # in Loop: Header=BB496_59 Depth=2 fmadd.d fs3, fs3, fa4, fs3 flt.d a0, fs3, fs4 - bnez a0, .LBB496_230 -.LBB496_229: # %if.end53.i599 + bnez a0, .LBB496_229 +.LBB496_228: # %if.end53.i599 # in Loop: Header=BB496_59 Depth=2 - sd s1, 288(sp) # 8-byte Folded Spill + sd s1, 296(sp) # 8-byte Folded Spill fmv.d fs3, fs4 -.LBB496_230: # %if.end53.i599 +.LBB496_229: # %if.end53.i599 # in Loop: Header=BB496_59 Depth=2 andi s0, s0, 8 li a0, 131 sd a0, 416(sp) # 8-byte Folded Spill - beqz s0, .LBB496_234 -# %bb.231: # %if.end53.i599 + beqz s0, .LBB496_233 +# %bb.230: # %if.end53.i599 # in Loop: Header=BB496_59 Depth=2 li a0, 3 sd a0, 416(sp) # 8-byte Folded Spill - bnez s10, .LBB496_235 -.LBB496_232: # in Loop: Header=BB496_59 Depth=2 - sd zero, 264(sp) # 8-byte Folded Spill - sd zero, 256(sp) # 8-byte Folded Spill -.LBB496_233: # %for.end214.i + bnez s10, .LBB496_234 +.LBB496_231: # in Loop: Header=BB496_59 Depth=2 + sd zero, 280(sp) # 8-byte Folded Spill + sd zero, 272(sp) # 8-byte Folded Spill +.LBB496_232: # %for.end214.i # in Loop: Header=BB496_59 Depth=2 li a1, 0 - ld a0, 288(sp) # 8-byte Folded Reload + ld a0, 296(sp) # 8-byte Folded Reload ld a2, 416(sp) # 8-byte Folded Reload or a0, a0, a2 + ld s7, 192(sp) # 8-byte Folded Reload + ld s1, 216(sp) # 8-byte Folded Reload + ld s9, 256(sp) # 8-byte Folded Reload ld s10, 144(sp) # 8-byte Folded Reload - ld s1, 280(sp) # 8-byte Folded Reload - ld s4, 240(sp) # 8-byte Folded Reload - ld a5, 296(sp) # 8-byte Folded Reload - ld a7, 232(sp) # 8-byte Folded Reload - ld t0, 224(sp) # 8-byte Folded Reload - ld a6, 216(sp) # 8-byte Folded Reload - ld t1, 336(sp) # 8-byte Folded Reload - ld a3, 208(sp) # 8-byte Folded Reload - ld a4, 264(sp) # 8-byte Folded Reload - ld t2, 256(sp) # 8-byte Folded Reload + ld a6, 248(sp) # 8-byte Folded Reload + ld a7, 240(sp) # 8-byte Folded Reload + ld a5, 232(sp) # 8-byte Folded Reload + ld t0, 336(sp) # 8-byte Folded Reload + ld a3, 224(sp) # 8-byte Folded Reload + ld a4, 280(sp) # 8-byte Folded Reload + ld t1, 272(sp) # 8-byte Folded Reload + ld s8, 328(sp) # 8-byte Folded Reload flt.d a2, fs3, fs2 - beqz a2, .LBB496_191 - j .LBB496_190 -.LBB496_234: # %if.end53.i599 + beqz a2, .LBB496_190 + j .LBB496_189 +.LBB496_233: # %if.end53.i599 # in Loop: Header=BB496_59 Depth=2 - beqz s10, .LBB496_232 -.LBB496_235: # %for.cond66.preheader.lr.ph.i + beqz s10, .LBB496_231 +.LBB496_234: # %for.cond66.preheader.lr.ph.i # in Loop: Header=BB496_59 Depth=2 - sd zero, 256(sp) # 8-byte Folded Spill - sd zero, 264(sp) # 8-byte Folded Spill - j .LBB496_237 -.LBB496_236: # %if.end212.i - # in Loop: Header=BB496_237 Depth=3 + sd zero, 272(sp) # 8-byte Folded Spill + sd zero, 280(sp) # 8-byte Folded Spill + j .LBB496_236 +.LBB496_235: # %if.end212.i + # in Loop: Header=BB496_236 Depth=3 ld s10, 56(s10) - beqz s10, .LBB496_233 -.LBB496_237: # %for.cond66.preheader.i + beqz s10, .LBB496_232 +.LBB496_236: # %for.cond66.preheader.i # Parent Loop BB496_55 Depth=1 # Parent Loop BB496_59 Depth=2 # => This Loop Header: Depth=3 - # Child Loop BB496_239 Depth 4 - # Child Loop BB496_251 Depth 5 - # Child Loop BB496_257 Depth 6 - # Child Loop BB496_262 Depth 6 - # Child Loop BB496_275 Depth 6 - # Child Loop BB496_280 Depth 6 - # Child Loop BB496_293 Depth 6 - # Child Loop BB496_299 Depth 6 - # Child Loop BB496_328 Depth 6 - # Child Loop BB496_336 Depth 6 - # Child Loop BB496_343 Depth 6 - # Child Loop BB496_349 Depth 6 - # Child Loop BB496_242 Depth 5 - # Child Loop BB496_368 Depth 4 - # Child Loop BB496_383 Depth 4 - # Child Loop BB496_387 Depth 5 - # Child Loop BB496_400 Depth 5 - # Child Loop BB496_412 Depth 5 - # Child Loop BB496_417 Depth 5 - # Child Loop BB496_430 Depth 4 - # Child Loop BB496_435 Depth 4 - # Child Loop BB496_439 Depth 4 - # Child Loop BB496_449 Depth 4 - # Child Loop BB496_452 Depth 4 + # Child Loop BB496_238 Depth 4 + # Child Loop BB496_250 Depth 5 + # Child Loop BB496_256 Depth 6 + # Child Loop BB496_261 Depth 6 + # Child Loop BB496_274 Depth 6 + # Child Loop BB496_279 Depth 6 + # Child Loop BB496_292 Depth 6 + # Child Loop BB496_298 Depth 6 + # Child Loop BB496_327 Depth 6 + # Child Loop BB496_335 Depth 6 + # Child Loop BB496_342 Depth 6 + # Child Loop BB496_348 Depth 6 + # Child Loop BB496_241 Depth 5 + # Child Loop BB496_367 Depth 4 + # Child Loop BB496_382 Depth 4 + # Child Loop BB496_386 Depth 5 + # Child Loop BB496_399 Depth 5 + # Child Loop BB496_411 Depth 5 + # Child Loop BB496_416 Depth 5 + # Child Loop BB496_429 Depth 4 + # Child Loop BB496_434 Depth 4 + # Child Loop BB496_438 Depth 4 + # Child Loop BB496_448 Depth 4 + # Child Loop BB496_451 Depth 4 lw a0, 8(s10) fld fs4, %pcrel_lo(.Lpcrel_hi1276)(a7) .Lpcrel_hi1281: auipc a1, %pcrel_hi(sqlite3UpperToLower) addi s0, a1, %pcrel_lo(.Lpcrel_hi1281) - blez a0, .LBB496_365 -# %bb.238: # %for.body69.i.preheader - # in Loop: Header=BB496_237 Depth=3 + blez a0, .LBB496_364 +# %bb.237: # %for.body69.i.preheader + # in Loop: Header=BB496_236 Depth=3 fld fs5, %pcrel_lo(.Lpcrel_hi1276)(a7) li a2, 0 li s8, 0 li s1, 0 -.LBB496_239: # %for.body69.i +.LBB496_238: # %for.body69.i # Parent Loop BB496_55 Depth=1 # Parent Loop BB496_59 Depth=2 - # Parent Loop BB496_237 Depth=3 + # Parent Loop BB496_236 Depth=3 # => This Loop Header: Depth=4 - # Child Loop BB496_251 Depth 5 - # Child Loop BB496_257 Depth 6 - # Child Loop BB496_262 Depth 6 - # Child Loop BB496_275 Depth 6 - # Child Loop BB496_280 Depth 6 - # Child Loop BB496_293 Depth 6 - # Child Loop BB496_299 Depth 6 - # Child Loop BB496_328 Depth 6 - # Child Loop BB496_336 Depth 6 - # Child Loop BB496_343 Depth 6 - # Child Loop BB496_349 Depth 6 - # Child Loop BB496_242 Depth 5 - mv s5, t3 + # Child Loop BB496_250 Depth 5 + # Child Loop BB496_256 Depth 6 + # Child Loop BB496_261 Depth 6 + # Child Loop BB496_274 Depth 6 + # Child Loop BB496_279 Depth 6 + # Child Loop BB496_292 Depth 6 + # Child Loop BB496_298 Depth 6 + # Child Loop BB496_327 Depth 6 + # Child Loop BB496_335 Depth 6 + # Child Loop BB496_342 Depth 6 + # Child Loop BB496_348 Depth 6 + # Child Loop BB496_241 Depth 5 lw s6, 520(sp) sd a2, 400(sp) # 8-byte Folded Spill - beqz s6, .LBB496_364 -# %bb.240: # %for.body.lr.ph.i2372 - # in Loop: Header=BB496_239 Depth=4 + beqz s6, .LBB496_363 +# %bb.239: # %for.body.lr.ph.i2372 + # in Loop: Header=BB496_238 Depth=4 sd s8, 424(sp) # 8-byte Folded Spill ld a1, 16(s10) slli a2, a2, 2 add a1, a1, a2 lw s4, 0(a1) ld s3, 528(sp) - bgez s9, .LBB496_251 - j .LBB496_242 -.LBB496_241: # %for.inc51.us.i2416 - # in Loop: Header=BB496_242 Depth=5 + bgez s9, .LBB496_250 + j .LBB496_241 +.LBB496_240: # %for.inc51.us.i2416 + # in Loop: Header=BB496_241 Depth=5 addiw s6, s6, -1 addi s3, s3, 48 - beqz s6, .LBB496_364 -.LBB496_242: # %for.body.us.i2410 + beqz s6, .LBB496_363 +.LBB496_241: # %for.body.us.i2410 # Parent Loop BB496_55 Depth=1 # Parent Loop BB496_59 Depth=2 - # Parent Loop BB496_237 Depth=3 - # Parent Loop BB496_239 Depth=4 + # Parent Loop BB496_236 Depth=3 + # Parent Loop BB496_238 Depth=4 # => This Inner Loop Header: Depth=5 lh a1, 10(s3) - bne s9, a1, .LBB496_241 -# %bb.243: # %land.lhs.true.us.i2420 - # in Loop: Header=BB496_242 Depth=5 + bne s9, a1, .LBB496_240 +# %bb.242: # %land.lhs.true.us.i2420 + # in Loop: Header=BB496_241 Depth=5 ld a1, 32(s3) and a1, a1, t6 - bnez a1, .LBB496_241 -# %bb.244: # %land.lhs.true4.us.i2424 - # in Loop: Header=BB496_242 Depth=5 + bnez a1, .LBB496_240 +# %bb.243: # %land.lhs.true4.us.i2424 + # in Loop: Header=BB496_241 Depth=5 lh a1, 12(s3) - bne s4, a1, .LBB496_241 -# %bb.245: # %land.lhs.true8.us.i2428 - # in Loop: Header=BB496_242 Depth=5 + bne s4, a1, .LBB496_240 +# %bb.244: # %land.lhs.true8.us.i2428 + # in Loop: Header=BB496_241 Depth=5 lhu a1, 14(s3) ld a2, 416(sp) # 8-byte Folded Reload and a2, a1, a2 - beqz a2, .LBB496_241 -# %bb.246: # %if.end76.i - # in Loop: Header=BB496_239 Depth=4 + beqz a2, .LBB496_240 +# %bb.245: # %if.end76.i + # in Loop: Header=BB496_238 Depth=4 andi a1, a1, 1 - li s6, 1 - bnez a1, .LBB496_358 -.LBB496_247: # in Loop: Header=BB496_239 Depth=4 + ld s6, 360(sp) # 8-byte Folded Reload + bnez a1, .LBB496_357 +.LBB496_246: # in Loop: Header=BB496_238 Depth=4 lui a1, 1 or s1, s1, a1 - j .LBB496_360 -.LBB496_248: # %while.end.loopexit.i.i - # in Loop: Header=BB496_251 Depth=5 + j .LBB496_359 +.LBB496_247: # %while.end.loopexit.i.i + # in Loop: Header=BB496_250 Depth=5 andi a2, a2, 255 -.LBB496_249: # %sqlite3StrICmp.exit.i - # in Loop: Header=BB496_251 Depth=5 - ld s11, 328(sp) # 8-byte Folded Reload +.LBB496_248: # %sqlite3StrICmp.exit.i + # in Loop: Header=BB496_250 Depth=5 + li s11, 1 lbu a1, 0(a1) add a2, s0, a2 lbu a2, 0(a2) add a1, s0, a1 lbu a1, 0(a1) - beq a2, a1, .LBB496_357 -.LBB496_250: # %for.inc51.i - # in Loop: Header=BB496_251 Depth=5 + beq a2, a1, .LBB496_356 +.LBB496_249: # %for.inc51.i + # in Loop: Header=BB496_250 Depth=5 addiw s6, s6, -1 addi s3, s3, 48 - beqz s6, .LBB496_364 -.LBB496_251: # %for.body.i2378 + beqz s6, .LBB496_363 +.LBB496_250: # %for.body.i2378 # Parent Loop BB496_55 Depth=1 # Parent Loop BB496_59 Depth=2 - # Parent Loop BB496_237 Depth=3 - # Parent Loop BB496_239 Depth=4 + # Parent Loop BB496_236 Depth=3 + # Parent Loop BB496_238 Depth=4 # => This Loop Header: Depth=5 - # Child Loop BB496_257 Depth 6 - # Child Loop BB496_262 Depth 6 - # Child Loop BB496_275 Depth 6 - # Child Loop BB496_280 Depth 6 - # Child Loop BB496_293 Depth 6 - # Child Loop BB496_299 Depth 6 - # Child Loop BB496_328 Depth 6 - # Child Loop BB496_336 Depth 6 - # Child Loop BB496_343 Depth 6 - # Child Loop BB496_349 Depth 6 + # Child Loop BB496_256 Depth 6 + # Child Loop BB496_261 Depth 6 + # Child Loop BB496_274 Depth 6 + # Child Loop BB496_279 Depth 6 + # Child Loop BB496_292 Depth 6 + # Child Loop BB496_298 Depth 6 + # Child Loop BB496_327 Depth 6 + # Child Loop BB496_335 Depth 6 + # Child Loop BB496_342 Depth 6 + # Child Loop BB496_348 Depth 6 lh a1, 10(s3) - bne s9, a1, .LBB496_250 -# %bb.252: # %land.lhs.true.i2386 - # in Loop: Header=BB496_251 Depth=5 + bne s9, a1, .LBB496_249 +# %bb.251: # %land.lhs.true.i2386 + # in Loop: Header=BB496_250 Depth=5 ld a1, 32(s3) and a1, a1, t6 - bnez a1, .LBB496_250 -# %bb.253: # %land.lhs.true4.i - # in Loop: Header=BB496_251 Depth=5 + bnez a1, .LBB496_249 +# %bb.252: # %land.lhs.true4.i + # in Loop: Header=BB496_250 Depth=5 lh a1, 12(s3) - bne s4, a1, .LBB496_250 -# %bb.254: # %land.lhs.true8.i - # in Loop: Header=BB496_251 Depth=5 + bne s4, a1, .LBB496_249 +# %bb.253: # %land.lhs.true8.i + # in Loop: Header=BB496_250 Depth=5 lhu a1, 14(s3) ld a2, 416(sp) # 8-byte Folded Reload and a2, a1, a2 - beqz a2, .LBB496_250 -# %bb.255: # %if.then.i2393 - # in Loop: Header=BB496_251 Depth=5 + beqz a2, .LBB496_249 +# %bb.254: # %if.then.i2393 + # in Loop: Header=BB496_250 Depth=5 li a2, 128 - beq a1, a2, .LBB496_356 -# %bb.256: # %if.then23.i - # in Loop: Header=BB496_251 Depth=5 + beq a1, a2, .LBB496_355 +# %bb.255: # %if.then23.i + # in Loop: Header=BB496_250 Depth=5 ld a1, 32(s10) ld a1, 16(a1) ld a5, 0(s3) - ld a2, 504(sp) - sd a2, 384(sp) # 8-byte Folded Spill + ld s8, 504(sp) li a2, 40 mul a2, s4, a2 add a1, a1, a2 @@ -113110,49 +113076,49 @@ mv a3, a1 ld a3, 0(a1) lbu a6, 0(a3) - bne a6, t4, .LBB496_258 -.LBB496_257: # %if.then.i.i2565 + bne a6, t4, .LBB496_257 +.LBB496_256: # %if.then.i.i2565 # Parent Loop BB496_55 Depth=1 # Parent Loop BB496_59 Depth=2 - # Parent Loop BB496_237 Depth=3 - # Parent Loop BB496_239 Depth=4 - # Parent Loop BB496_251 Depth=5 + # Parent Loop BB496_236 Depth=3 + # Parent Loop BB496_238 Depth=4 + # Parent Loop BB496_250 Depth=5 # => This Inner Loop Header: Depth=6 ld a3, 96(a3) ld a3, 0(a3) ld a3, 16(a3) ld a3, 0(a3) lbu a6, 0(a3) - beq a6, t4, .LBB496_257 -.LBB496_258: # %tailrecurse.i.i - # in Loop: Header=BB496_251 Depth=5 + beq a6, t4, .LBB496_256 +.LBB496_257: # %tailrecurse.i.i + # in Loop: Header=BB496_250 Depth=5 lui a4, 407239 addiw a4, a4, -158 li a7, 31 - bne a6, a7, .LBB496_272 -# %bb.259: # %if.then6.i.i - # in Loop: Header=BB496_251 Depth=5 + bne a6, a7, .LBB496_271 +# %bb.258: # %if.then6.i.i + # in Loop: Header=BB496_250 Depth=5 lwu a6, 48(a3) srli a6, a6, 1 - beqz a6, .LBB496_291 -# %bb.260: # %while.body.i.i.i2554.preheader - # in Loop: Header=BB496_251 Depth=5 + beqz a6, .LBB496_290 +# %bb.259: # %while.body.i.i.i2554.preheader + # in Loop: Header=BB496_250 Depth=5 ld a7, 40(a3) li t0, 0 li t1, 99 - j .LBB496_262 -.LBB496_261: # %if.end57.i.i.i - # in Loop: Header=BB496_262 Depth=6 + j .LBB496_261 +.LBB496_260: # %if.end57.i.i.i + # in Loop: Header=BB496_261 Depth=6 addi a6, a6, -1 addi a7, a7, 1 mv t1, a3 - beqz a6, .LBB496_273 -.LBB496_262: # %while.body.i.i.i2554 + beqz a6, .LBB496_272 +.LBB496_261: # %while.body.i.i.i2554 # Parent Loop BB496_55 Depth=1 # Parent Loop BB496_59 Depth=2 - # Parent Loop BB496_237 Depth=3 - # Parent Loop BB496_239 Depth=4 - # Parent Loop BB496_251 Depth=5 + # Parent Loop BB496_236 Depth=3 + # Parent Loop BB496_238 Depth=4 + # Parent Loop BB496_250 Depth=5 # => This Inner Loop Header: Depth=6 lbu a3, 0(a7) add a3, s0, a3 @@ -113160,36 +113126,36 @@ slliw t0, t0, 8 or t0, t0, a3 li a3, 97 - blt t5, t0, .LBB496_265 -# %bb.263: # %while.body.i.i.i2554 - # in Loop: Header=BB496_262 Depth=6 + blt t5, t0, .LBB496_264 +# %bb.262: # %while.body.i.i.i2554 + # in Loop: Header=BB496_261 Depth=6 ld t2, 496(sp) # 8-byte Folded Reload - beq t0, t2, .LBB496_267 -# %bb.264: # %while.body.i.i.i2554 - # in Loop: Header=BB496_262 Depth=6 + beq t0, t2, .LBB496_266 +# %bb.263: # %while.body.i.i.i2554 + # in Loop: Header=BB496_261 Depth=6 ld t2, 480(sp) # 8-byte Folded Reload - beq t0, t2, .LBB496_261 - j .LBB496_269 -.LBB496_265: # %while.body.i.i.i2554 - # in Loop: Header=BB496_262 Depth=6 - beq t0, a4, .LBB496_261 -# %bb.266: # %while.body.i.i.i2554 - # in Loop: Header=BB496_262 Depth=6 + beq t0, t2, .LBB496_260 + j .LBB496_268 +.LBB496_264: # %while.body.i.i.i2554 + # in Loop: Header=BB496_261 Depth=6 + beq t0, a4, .LBB496_260 +# %bb.265: # %while.body.i.i.i2554 + # in Loop: Header=BB496_261 Depth=6 ld t2, 472(sp) # 8-byte Folded Reload - beq t0, t2, .LBB496_261 - j .LBB496_269 -.LBB496_267: # %land.lhs.true.i.i.i - # in Loop: Header=BB496_262 Depth=6 + beq t0, t2, .LBB496_260 + j .LBB496_268 +.LBB496_266: # %land.lhs.true.i.i.i + # in Loop: Header=BB496_261 Depth=6 andi t2, t1, 255 li a3, 98 li t3, 99 - beq t2, t3, .LBB496_261 -# %bb.268: # %land.lhs.true.i.i.i - # in Loop: Header=BB496_262 Depth=6 + beq t2, t3, .LBB496_260 +# %bb.267: # %land.lhs.true.i.i.i + # in Loop: Header=BB496_261 Depth=6 li t3, 101 - beq t2, t3, .LBB496_261 -.LBB496_269: # %if.else23.i.i.i - # in Loop: Header=BB496_262 Depth=6 + beq t2, t3, .LBB496_260 +.LBB496_268: # %if.else23.i.i.i + # in Loop: Header=BB496_261 Depth=6 ld a3, 448(sp) # 8-byte Folded Reload xor a3, t0, a3 seqz a3, a3 @@ -113206,71 +113172,71 @@ or a3, t3, a3 and t2, a3, t2 li a3, 101 - bnez t2, .LBB496_261 -# %bb.270: # %if.else47.i.i.i - # in Loop: Header=BB496_262 Depth=6 + bnez t2, .LBB496_260 +# %bb.269: # %if.else47.i.i.i + # in Loop: Header=BB496_261 Depth=6 ld a3, 376(sp) # 8-byte Folded Reload and t2, t0, a3 mv a3, t1 ld t1, 368(sp) # 8-byte Folded Reload - bne t2, t1, .LBB496_261 -# %bb.271: # in Loop: Header=BB496_251 Depth=5 + bne t2, t1, .LBB496_260 +# %bb.270: # in Loop: Header=BB496_250 Depth=5 li a3, 100 ld s7, 24(a5) - bnez s7, .LBB496_274 - j .LBB496_292 -.LBB496_272: # %if.end8.i.i2567 - # in Loop: Header=BB496_251 Depth=5 + bnez s7, .LBB496_273 + j .LBB496_291 +.LBB496_271: # %if.end8.i.i2567 + # in Loop: Header=BB496_250 Depth=5 lbu a3, 1(a3) -.LBB496_273: # %sqlite3ExprAffinity.exit.i - # in Loop: Header=BB496_251 Depth=5 +.LBB496_272: # %sqlite3ExprAffinity.exit.i + # in Loop: Header=BB496_250 Depth=5 ld s7, 24(a5) - beqz s7, .LBB496_292 -.LBB496_274: # %tailrecurse.i.i2618.preheader - # in Loop: Header=BB496_251 Depth=5 + beqz s7, .LBB496_291 +.LBB496_273: # %tailrecurse.i.i2618.preheader + # in Loop: Header=BB496_250 Depth=5 mv a6, s7 lbu a5, 0(s7) - bne a5, t4, .LBB496_276 -.LBB496_275: # %if.then.i.i2667 + bne a5, t4, .LBB496_275 +.LBB496_274: # %if.then.i.i2667 # Parent Loop BB496_55 Depth=1 # Parent Loop BB496_59 Depth=2 - # Parent Loop BB496_237 Depth=3 - # Parent Loop BB496_239 Depth=4 - # Parent Loop BB496_251 Depth=5 + # Parent Loop BB496_236 Depth=3 + # Parent Loop BB496_238 Depth=4 + # Parent Loop BB496_250 Depth=5 # => This Inner Loop Header: Depth=6 ld a5, 96(a6) ld a5, 0(a5) ld a5, 16(a5) ld a6, 0(a5) lbu a5, 0(a6) - beq a5, t4, .LBB496_275 -.LBB496_276: # %tailrecurse.i.i2618 - # in Loop: Header=BB496_251 Depth=5 + beq a5, t4, .LBB496_274 +.LBB496_275: # %tailrecurse.i.i2618 + # in Loop: Header=BB496_250 Depth=5 li a7, 31 - bne a5, a7, .LBB496_290 -# %bb.277: # %if.then6.i.i2620 - # in Loop: Header=BB496_251 Depth=5 + bne a5, a7, .LBB496_289 +# %bb.276: # %if.then6.i.i2620 + # in Loop: Header=BB496_250 Depth=5 lwu a5, 48(a6) srli a5, a5, 1 - beqz a5, .LBB496_311 -# %bb.278: # %while.body.i.i.i2628.preheader - # in Loop: Header=BB496_251 Depth=5 + beqz a5, .LBB496_310 +# %bb.277: # %while.body.i.i.i2628.preheader + # in Loop: Header=BB496_250 Depth=5 ld a6, 40(a6) li a7, 0 li t1, 99 - j .LBB496_280 -.LBB496_279: # %if.end57.i.i.i2639 - # in Loop: Header=BB496_280 Depth=6 + j .LBB496_279 +.LBB496_278: # %if.end57.i.i.i2639 + # in Loop: Header=BB496_279 Depth=6 addi a5, a5, -1 addi a6, a6, 1 mv t1, t0 - beqz a5, .LBB496_312 -.LBB496_280: # %while.body.i.i.i2628 + beqz a5, .LBB496_311 +.LBB496_279: # %while.body.i.i.i2628 # Parent Loop BB496_55 Depth=1 # Parent Loop BB496_59 Depth=2 - # Parent Loop BB496_237 Depth=3 - # Parent Loop BB496_239 Depth=4 - # Parent Loop BB496_251 Depth=5 + # Parent Loop BB496_236 Depth=3 + # Parent Loop BB496_238 Depth=4 + # Parent Loop BB496_250 Depth=5 # => This Inner Loop Header: Depth=6 lbu t0, 0(a6) add t0, s0, t0 @@ -113278,36 +113244,36 @@ slliw a7, a7, 8 or a7, a7, t0 li t0, 97 - blt t5, a7, .LBB496_283 -# %bb.281: # %while.body.i.i.i2628 - # in Loop: Header=BB496_280 Depth=6 + blt t5, a7, .LBB496_282 +# %bb.280: # %while.body.i.i.i2628 + # in Loop: Header=BB496_279 Depth=6 ld t2, 496(sp) # 8-byte Folded Reload - beq a7, t2, .LBB496_285 -# %bb.282: # %while.body.i.i.i2628 - # in Loop: Header=BB496_280 Depth=6 + beq a7, t2, .LBB496_284 +# %bb.281: # %while.body.i.i.i2628 + # in Loop: Header=BB496_279 Depth=6 ld t2, 480(sp) # 8-byte Folded Reload - beq a7, t2, .LBB496_279 - j .LBB496_287 -.LBB496_283: # %while.body.i.i.i2628 - # in Loop: Header=BB496_280 Depth=6 - beq a7, a4, .LBB496_279 -# %bb.284: # %while.body.i.i.i2628 - # in Loop: Header=BB496_280 Depth=6 + beq a7, t2, .LBB496_278 + j .LBB496_286 +.LBB496_282: # %while.body.i.i.i2628 + # in Loop: Header=BB496_279 Depth=6 + beq a7, a4, .LBB496_278 +# %bb.283: # %while.body.i.i.i2628 + # in Loop: Header=BB496_279 Depth=6 ld t2, 472(sp) # 8-byte Folded Reload - beq a7, t2, .LBB496_279 - j .LBB496_287 -.LBB496_285: # %land.lhs.true.i.i.i2638 - # in Loop: Header=BB496_280 Depth=6 + beq a7, t2, .LBB496_278 + j .LBB496_286 +.LBB496_284: # %land.lhs.true.i.i.i2638 + # in Loop: Header=BB496_279 Depth=6 andi t2, t1, 255 li t0, 98 li t3, 99 - beq t2, t3, .LBB496_279 -# %bb.286: # %land.lhs.true.i.i.i2638 - # in Loop: Header=BB496_280 Depth=6 + beq t2, t3, .LBB496_278 +# %bb.285: # %land.lhs.true.i.i.i2638 + # in Loop: Header=BB496_279 Depth=6 li t3, 101 - beq t2, t3, .LBB496_279 -.LBB496_287: # %if.else23.i.i.i2658 - # in Loop: Header=BB496_280 Depth=6 + beq t2, t3, .LBB496_278 +.LBB496_286: # %if.else23.i.i.i2658 + # in Loop: Header=BB496_279 Depth=6 ld t0, 448(sp) # 8-byte Folded Reload xor t0, a7, t0 seqz t0, t0 @@ -113324,72 +113290,72 @@ or t0, t3, t0 and t2, t0, t2 li t0, 101 - bnez t2, .LBB496_279 -# %bb.288: # %if.else47.i.i.i2664 - # in Loop: Header=BB496_280 Depth=6 + bnez t2, .LBB496_278 +# %bb.287: # %if.else47.i.i.i2664 + # in Loop: Header=BB496_279 Depth=6 ld t0, 376(sp) # 8-byte Folded Reload and t2, a7, t0 mv t0, t1 ld t1, 368(sp) # 8-byte Folded Reload - bne t2, t1, .LBB496_279 -# %bb.289: # in Loop: Header=BB496_251 Depth=5 + bne t2, t1, .LBB496_278 +# %bb.288: # in Loop: Header=BB496_250 Depth=5 li t0, 100 - j .LBB496_312 -.LBB496_290: # %if.end8.i.i2670 - # in Loop: Header=BB496_251 Depth=5 + j .LBB496_311 +.LBB496_289: # %if.end8.i.i2670 + # in Loop: Header=BB496_250 Depth=5 lbu t0, 1(a6) - j .LBB496_312 -.LBB496_291: # in Loop: Header=BB496_251 Depth=5 + j .LBB496_311 +.LBB496_290: # in Loop: Header=BB496_250 Depth=5 li a3, 99 ld s7, 24(a5) - bnez s7, .LBB496_274 -.LBB496_292: # %if.else.i2561 - # in Loop: Header=BB496_251 Depth=5 + bnez s7, .LBB496_273 +.LBB496_291: # %if.else.i2561 + # in Loop: Header=BB496_250 Depth=5 ld a5, 96(a5) - beqz a5, .LBB496_309 -.LBB496_293: # %tailrecurse.i.i2568 + beqz a5, .LBB496_308 +.LBB496_292: # %tailrecurse.i.i2568 # Parent Loop BB496_55 Depth=1 # Parent Loop BB496_59 Depth=2 - # Parent Loop BB496_237 Depth=3 - # Parent Loop BB496_239 Depth=4 - # Parent Loop BB496_251 Depth=5 + # Parent Loop BB496_236 Depth=3 + # Parent Loop BB496_238 Depth=4 + # Parent Loop BB496_250 Depth=5 # => This Inner Loop Header: Depth=6 ld a5, 0(a5) ld a5, 16(a5) ld a6, 0(a5) lbu a5, 0(a6) - bne a5, t4, .LBB496_295 -# %bb.294: # %if.then.i.i2613 - # in Loop: Header=BB496_293 Depth=6 + bne a5, t4, .LBB496_294 +# %bb.293: # %if.then.i.i2613 + # in Loop: Header=BB496_292 Depth=6 ld a5, 96(a6) - j .LBB496_293 -.LBB496_295: # %tailrecurse.i.i2568 - # in Loop: Header=BB496_251 Depth=5 + j .LBB496_292 +.LBB496_294: # %tailrecurse.i.i2568 + # in Loop: Header=BB496_250 Depth=5 li a7, 31 - bne a5, a7, .LBB496_318 -# %bb.296: # %if.then6.i.i2570 - # in Loop: Header=BB496_251 Depth=5 + bne a5, a7, .LBB496_317 +# %bb.295: # %if.then6.i.i2570 + # in Loop: Header=BB496_250 Depth=5 lwu a5, 48(a6) srli a5, a5, 1 - beqz a5, .LBB496_319 -# %bb.297: # %while.body.i.i.i2578.preheader - # in Loop: Header=BB496_251 Depth=5 + beqz a5, .LBB496_318 +# %bb.296: # %while.body.i.i.i2578.preheader + # in Loop: Header=BB496_250 Depth=5 ld a6, 40(a6) li a7, 0 li t1, 99 - j .LBB496_299 -.LBB496_298: # %if.end57.i.i.i2589 - # in Loop: Header=BB496_299 Depth=6 + j .LBB496_298 +.LBB496_297: # %if.end57.i.i.i2589 + # in Loop: Header=BB496_298 Depth=6 addi a5, a5, -1 addi a6, a6, 1 mv t1, t0 - beqz a5, .LBB496_320 -.LBB496_299: # %while.body.i.i.i2578 + beqz a5, .LBB496_319 +.LBB496_298: # %while.body.i.i.i2578 # Parent Loop BB496_55 Depth=1 # Parent Loop BB496_59 Depth=2 - # Parent Loop BB496_237 Depth=3 - # Parent Loop BB496_239 Depth=4 - # Parent Loop BB496_251 Depth=5 + # Parent Loop BB496_236 Depth=3 + # Parent Loop BB496_238 Depth=4 + # Parent Loop BB496_250 Depth=5 # => This Inner Loop Header: Depth=6 lbu t0, 0(a6) add t0, s0, t0 @@ -113397,36 +113363,36 @@ slliw a7, a7, 8 or a7, a7, t0 li t0, 97 - blt t5, a7, .LBB496_302 -# %bb.300: # %while.body.i.i.i2578 - # in Loop: Header=BB496_299 Depth=6 + blt t5, a7, .LBB496_301 +# %bb.299: # %while.body.i.i.i2578 + # in Loop: Header=BB496_298 Depth=6 ld t2, 496(sp) # 8-byte Folded Reload - beq a7, t2, .LBB496_304 -# %bb.301: # %while.body.i.i.i2578 - # in Loop: Header=BB496_299 Depth=6 + beq a7, t2, .LBB496_303 +# %bb.300: # %while.body.i.i.i2578 + # in Loop: Header=BB496_298 Depth=6 ld t2, 480(sp) # 8-byte Folded Reload - beq a7, t2, .LBB496_298 - j .LBB496_306 -.LBB496_302: # %while.body.i.i.i2578 - # in Loop: Header=BB496_299 Depth=6 - beq a7, a4, .LBB496_298 -# %bb.303: # %while.body.i.i.i2578 - # in Loop: Header=BB496_299 Depth=6 + beq a7, t2, .LBB496_297 + j .LBB496_305 +.LBB496_301: # %while.body.i.i.i2578 + # in Loop: Header=BB496_298 Depth=6 + beq a7, a4, .LBB496_297 +# %bb.302: # %while.body.i.i.i2578 + # in Loop: Header=BB496_298 Depth=6 ld t2, 472(sp) # 8-byte Folded Reload - beq a7, t2, .LBB496_298 - j .LBB496_306 -.LBB496_304: # %land.lhs.true.i.i.i2588 - # in Loop: Header=BB496_299 Depth=6 + beq a7, t2, .LBB496_297 + j .LBB496_305 +.LBB496_303: # %land.lhs.true.i.i.i2588 + # in Loop: Header=BB496_298 Depth=6 andi t2, t1, 255 li t0, 98 li t3, 99 - beq t2, t3, .LBB496_298 -# %bb.305: # %land.lhs.true.i.i.i2588 - # in Loop: Header=BB496_299 Depth=6 + beq t2, t3, .LBB496_297 +# %bb.304: # %land.lhs.true.i.i.i2588 + # in Loop: Header=BB496_298 Depth=6 li t3, 101 - beq t2, t3, .LBB496_298 -.LBB496_306: # %if.else23.i.i.i2604 - # in Loop: Header=BB496_299 Depth=6 + beq t2, t3, .LBB496_297 +.LBB496_305: # %if.else23.i.i.i2604 + # in Loop: Header=BB496_298 Depth=6 ld t0, 448(sp) # 8-byte Folded Reload xor t0, a7, t0 seqz t0, t0 @@ -113443,117 +113409,117 @@ or t0, t3, t0 and t2, t0, t2 li t0, 101 - bnez t2, .LBB496_298 -# %bb.307: # %if.else47.i.i.i2610 - # in Loop: Header=BB496_299 Depth=6 + bnez t2, .LBB496_297 +# %bb.306: # %if.else47.i.i.i2610 + # in Loop: Header=BB496_298 Depth=6 ld t0, 376(sp) # 8-byte Folded Reload and t2, a7, t0 mv t0, t1 ld t1, 368(sp) # 8-byte Folded Reload - bne t2, t1, .LBB496_298 -# %bb.308: # in Loop: Header=BB496_251 Depth=5 + bne t2, t1, .LBB496_297 +# %bb.307: # in Loop: Header=BB496_250 Depth=5 li t0, 100 - j .LBB496_320 -.LBB496_309: # %if.else8.i - # in Loop: Header=BB496_251 Depth=5 + j .LBB496_319 +.LBB496_308: # %if.else8.i + # in Loop: Header=BB496_250 Depth=5 andi a4, a3, 255 - bnez a4, .LBB496_315 -# %bb.310: # %if.end.i2396.thread - # in Loop: Header=BB496_251 Depth=5 + bnez a4, .LBB496_314 +# %bb.309: # %if.end.i2396.thread + # in Loop: Header=BB496_250 Depth=5 ld a0, 0(a1) lbu a1, 3(a0) andi a1, a1, 1 - beqz a1, .LBB496_328 - j .LBB496_339 -.LBB496_311: # in Loop: Header=BB496_251 Depth=5 + beqz a1, .LBB496_327 + j .LBB496_338 +.LBB496_310: # in Loop: Header=BB496_250 Depth=5 li t0, 99 -.LBB496_312: # %sqlite3ExprAffinity.exit.i2642 - # in Loop: Header=BB496_251 Depth=5 +.LBB496_311: # %sqlite3ExprAffinity.exit.i2642 + # in Loop: Header=BB496_250 Depth=5 andi a4, t0, 255 seqz a6, a4 andi a5, a3, 255 seqz a7, a5 or a6, a7, a6 - beqz a6, .LBB496_321 -# %bb.313: # %if.else9.i2647 - # in Loop: Header=BB496_251 Depth=5 + beqz a6, .LBB496_320 +# %bb.312: # %if.else9.i2647 + # in Loop: Header=BB496_250 Depth=5 or a4, t0, a3 andi a4, a4, 255 - beqz a4, .LBB496_325 -# %bb.314: # in Loop: Header=BB496_251 Depth=5 + beqz a4, .LBB496_324 +# %bb.313: # in Loop: Header=BB496_250 Depth=5 add a3, t0, a3 -.LBB496_315: # %comparisonAffinity.exit - # in Loop: Header=BB496_251 Depth=5 +.LBB496_314: # %comparisonAffinity.exit + # in Loop: Header=BB496_250 Depth=5 andi a3, a3, 255 li a4, 97 - beq a3, a4, .LBB496_324 -.LBB496_316: # %comparisonAffinity.exit - # in Loop: Header=BB496_251 Depth=5 + beq a3, a4, .LBB496_323 +.LBB496_315: # %comparisonAffinity.exit + # in Loop: Header=BB496_250 Depth=5 li a4, 98 - beq a3, a4, .LBB496_325 -# %bb.317: # %sw.default.i.i - # in Loop: Header=BB496_251 Depth=5 + beq a3, a4, .LBB496_324 +# %bb.316: # %sw.default.i.i + # in Loop: Header=BB496_250 Depth=5 li a3, 98 - bgeu a3, a2, .LBB496_250 - j .LBB496_325 -.LBB496_318: # %if.end8.i.i2616 - # in Loop: Header=BB496_251 Depth=5 + bgeu a3, a2, .LBB496_249 + j .LBB496_324 +.LBB496_317: # %if.end8.i.i2616 + # in Loop: Header=BB496_250 Depth=5 lbu t0, 1(a6) - j .LBB496_320 -.LBB496_319: # in Loop: Header=BB496_251 Depth=5 + j .LBB496_319 +.LBB496_318: # in Loop: Header=BB496_250 Depth=5 li t0, 99 -.LBB496_320: # %sqlite3ExprAffinity.exit.i2592 - # in Loop: Header=BB496_251 Depth=5 +.LBB496_319: # %sqlite3ExprAffinity.exit.i2592 + # in Loop: Header=BB496_250 Depth=5 andi a4, t0, 255 seqz a6, a4 andi a5, a3, 255 seqz a7, a5 or a6, a7, a6 - bnez a6, .LBB496_322 -.LBB496_321: # %if.then.i2653 - # in Loop: Header=BB496_251 Depth=5 + bnez a6, .LBB496_321 +.LBB496_320: # %if.then.i2653 + # in Loop: Header=BB496_250 Depth=5 sltiu a3, a4, 99 sltiu a4, a5, 99 and a3, a4, a3 sltiu a2, a2, 99 xori a2, a2, 1 or a2, a3, a2 - beqz a2, .LBB496_250 - j .LBB496_325 -.LBB496_322: # %if.else9.i2596 - # in Loop: Header=BB496_251 Depth=5 + beqz a2, .LBB496_249 + j .LBB496_324 +.LBB496_321: # %if.else9.i2596 + # in Loop: Header=BB496_250 Depth=5 or a4, t0, a3 andi a4, a4, 255 - beqz a4, .LBB496_325 -# %bb.323: # in Loop: Header=BB496_251 Depth=5 + beqz a4, .LBB496_324 +# %bb.322: # in Loop: Header=BB496_250 Depth=5 add a3, t0, a3 andi a3, a3, 255 li a4, 97 - bne a3, a4, .LBB496_316 -.LBB496_324: # %sqlite3IndexAffinityOk.exit.i - # in Loop: Header=BB496_251 Depth=5 + bne a3, a4, .LBB496_315 +.LBB496_323: # %sqlite3IndexAffinityOk.exit.i + # in Loop: Header=BB496_250 Depth=5 li a3, 97 - bne a2, a3, .LBB496_250 -.LBB496_325: # %if.end.i2396 - # in Loop: Header=BB496_251 Depth=5 + bne a2, a3, .LBB496_249 +.LBB496_324: # %if.end.i2396 + # in Loop: Header=BB496_250 Depth=5 ld a0, 0(a1) lbu a1, 3(a0) andi a1, a1, 1 - bnez a1, .LBB496_339 -# %bb.326: # %if.else.i2540 - # in Loop: Header=BB496_251 Depth=5 - beqz s7, .LBB496_328 -# %bb.327: # %land.lhs.true.i2541 - # in Loop: Header=BB496_251 Depth=5 + bnez a1, .LBB496_338 +# %bb.325: # %if.else.i2540 + # in Loop: Header=BB496_250 Depth=5 + beqz s7, .LBB496_327 +# %bb.326: # %land.lhs.true.i2541 + # in Loop: Header=BB496_250 Depth=5 lbu a1, 3(s7) andi a1, a1, 1 - bnez a1, .LBB496_338 -.LBB496_328: # %if.then.i.i2543 + bnez a1, .LBB496_337 +.LBB496_327: # %if.then.i.i2543 # Parent Loop BB496_55 Depth=1 # Parent Loop BB496_59 Depth=2 - # Parent Loop BB496_237 Depth=3 - # Parent Loop BB496_239 Depth=4 - # Parent Loop BB496_251 Depth=5 + # Parent Loop BB496_236 Depth=3 + # Parent Loop BB496_238 Depth=4 + # Parent Loop BB496_250 Depth=5 # => This Inner Loop Header: Depth=6 lbu a1, 0(a0) ld s11, 8(a0) @@ -113564,22 +113530,21 @@ and a1, a2, a1 snez a2, s11 or a1, a1, a2 - bnez a1, .LBB496_330 -# %bb.329: # %cleanup.i.i - # in Loop: Header=BB496_328 Depth=6 + bnez a1, .LBB496_329 +# %bb.328: # %cleanup.i.i + # in Loop: Header=BB496_327 Depth=6 ld a0, 16(a0) - bnez a0, .LBB496_328 - j .LBB496_335 -.LBB496_330: # %if.end8.i.i - # in Loop: Header=BB496_251 Depth=5 - beqz s11, .LBB496_335 -# %bb.331: # %if.then.i.i.i2547 - # in Loop: Header=BB496_251 Depth=5 - ld s8, 0(s11) - ld a0, 384(sp) # 8-byte Folded Reload - ld a0, 0(a0) + bnez a0, .LBB496_327 + j .LBB496_334 +.LBB496_329: # %if.end8.i.i + # in Loop: Header=BB496_250 Depth=5 + beqz s11, .LBB496_334 +# %bb.330: # %if.then.i.i.i2547 + # in Loop: Header=BB496_250 Depth=5 + ld s5, 0(s11) + ld a0, 0(s8) mv a1, s11 - mv a2, s8 + mv a2, s5 call sqlite3GetCollSeq ld ra, 456(sp) # 8-byte Folded Reload ld t6, 488(sp) # 8-byte Folded Reload @@ -113596,19 +113561,19 @@ add a1, sp, a1 addi a1, a1, 1280 vl2r.v v14, (a1) # Unknown-size Folded Reload - bnez a0, .LBB496_341 -# %bb.332: # %if.then3.i.i.i - # in Loop: Header=BB496_251 Depth=5 - ld s11, 384(sp) # 8-byte Folded Reload - lw a0, 80(s11) - bnez a0, .LBB496_334 -# %bb.333: # %if.then4.i.i.i2550 - # in Loop: Header=BB496_251 Depth=5 + bnez a0, .LBB496_340 +# %bb.331: # %if.then3.i.i.i + # in Loop: Header=BB496_250 Depth=5 + mv s11, s8 + lw a0, 80(s8) + bnez a0, .LBB496_333 +# %bb.332: # %if.then4.i.i.i2550 + # in Loop: Header=BB496_250 Depth=5 .Lpcrel_hi1282: auipc a0, %pcrel_hi(.L.str.340) addi a1, a0, %pcrel_lo(.Lpcrel_hi1282) mv a0, s11 - mv a2, s8 + mv a2, s5 call sqlite3ErrorMsg ld ra, 456(sp) # 8-byte Folded Reload ld t6, 488(sp) # 8-byte Folded Reload @@ -113626,19 +113591,19 @@ addi a0, a0, 1280 vl2r.v v14, (a0) # Unknown-size Folded Reload lw a0, 80(s11) -.LBB496_334: # %sqlite3CheckCollSeq.exit.i.i - # in Loop: Header=BB496_251 Depth=5 +.LBB496_333: # %sqlite3CheckCollSeq.exit.i.i + # in Loop: Header=BB496_250 Depth=5 addi a0, a0, 1 sw a0, 80(s11) -.LBB496_335: # %if.then11.i - # in Loop: Header=BB496_251 Depth=5 - beqz s7, .LBB496_340 -.LBB496_336: # %if.then.i9.i +.LBB496_334: # %if.then11.i + # in Loop: Header=BB496_250 Depth=5 + beqz s7, .LBB496_339 +.LBB496_335: # %if.then.i9.i # Parent Loop BB496_55 Depth=1 # Parent Loop BB496_59 Depth=2 - # Parent Loop BB496_237 Depth=3 - # Parent Loop BB496_239 Depth=4 - # Parent Loop BB496_251 Depth=5 + # Parent Loop BB496_236 Depth=3 + # Parent Loop BB496_238 Depth=4 + # Parent Loop BB496_250 Depth=5 # => This Inner Loop Header: Depth=6 lbu a0, 0(s7) ld s11, 8(s7) @@ -113649,54 +113614,53 @@ and a0, a1, a0 snez a1, s11 or a0, a0, a1 - bnez a0, .LBB496_351 -# %bb.337: # %cleanup.i17.i - # in Loop: Header=BB496_336 Depth=6 + bnez a0, .LBB496_350 +# %bb.336: # %cleanup.i17.i + # in Loop: Header=BB496_335 Depth=6 ld s7, 16(s7) - bnez s7, .LBB496_336 - j .LBB496_340 -.LBB496_338: # in Loop: Header=BB496_251 Depth=5 + bnez s7, .LBB496_335 + j .LBB496_339 +.LBB496_337: # in Loop: Header=BB496_250 Depth=5 mv a0, s7 -.LBB496_339: # %sqlite3BinaryCompareCollSeq.exit - # in Loop: Header=BB496_251 Depth=5 +.LBB496_338: # %sqlite3BinaryCompareCollSeq.exit + # in Loop: Header=BB496_250 Depth=5 ld s11, 8(a0) - bnez s11, .LBB496_341 -.LBB496_340: # %if.then29.i - # in Loop: Header=BB496_251 Depth=5 - ld a0, 384(sp) # 8-byte Folded Reload - ld a0, 0(a0) + bnez s11, .LBB496_340 +.LBB496_339: # %if.then29.i + # in Loop: Header=BB496_250 Depth=5 + ld a0, 0(s8) ld s11, 48(a0) -.LBB496_341: # %if.end30.i - # in Loop: Header=BB496_251 Depth=5 +.LBB496_340: # %if.end30.i + # in Loop: Header=BB496_250 Depth=5 lw a0, 8(s10) - blez a0, .LBB496_346 -# %bb.342: # %land.rhs.lr.ph.i - # in Loop: Header=BB496_251 Depth=5 + blez a0, .LBB496_345 +# %bb.341: # %land.rhs.lr.ph.i + # in Loop: Header=BB496_250 Depth=5 ld a2, 16(s10) li a1, 0 mv a3, a0 -.LBB496_343: # %land.rhs.i +.LBB496_342: # %land.rhs.i # Parent Loop BB496_55 Depth=1 # Parent Loop BB496_59 Depth=2 - # Parent Loop BB496_237 Depth=3 - # Parent Loop BB496_239 Depth=4 - # Parent Loop BB496_251 Depth=5 + # Parent Loop BB496_236 Depth=3 + # Parent Loop BB496_238 Depth=4 + # Parent Loop BB496_250 Depth=5 # => This Inner Loop Header: Depth=6 lw a4, 0(a2) - beq a4, s4, .LBB496_347 -# %bb.344: # %for.inc.i2406 - # in Loop: Header=BB496_343 Depth=6 + beq a4, s4, .LBB496_346 +# %bb.343: # %for.inc.i2406 + # in Loop: Header=BB496_342 Depth=6 addi a1, a1, 1 addi a3, a3, -1 addi a2, a2, 4 - bnez a3, .LBB496_343 -# %bb.345: # in Loop: Header=BB496_251 Depth=5 + bnez a3, .LBB496_342 +# %bb.344: # in Loop: Header=BB496_250 Depth=5 mv a1, a0 - j .LBB496_347 -.LBB496_346: # in Loop: Header=BB496_251 Depth=5 + j .LBB496_346 +.LBB496_345: # in Loop: Header=BB496_250 Depth=5 li a1, 0 -.LBB496_347: # %for.end.i2397 - # in Loop: Header=BB496_251 Depth=5 +.LBB496_346: # %for.end.i2397 + # in Loop: Header=BB496_250 Depth=5 ld a2, 80(s10) ld a3, 0(s11) slli a1, a1, 32 @@ -113704,16 +113668,16 @@ add a1, a2, a1 lbu a2, 0(a3) ld a1, 0(a1) - beqz a2, .LBB496_249 -# %bb.348: # %land.rhs.i.i2398.preheader - # in Loop: Header=BB496_251 Depth=5 + beqz a2, .LBB496_248 +# %bb.347: # %land.rhs.i.i2398.preheader + # in Loop: Header=BB496_250 Depth=5 addi a3, a3, 1 -.LBB496_349: # %land.rhs.i.i2398 +.LBB496_348: # %land.rhs.i.i2398 # Parent Loop BB496_55 Depth=1 # Parent Loop BB496_59 Depth=2 - # Parent Loop BB496_237 Depth=3 - # Parent Loop BB496_239 Depth=4 - # Parent Loop BB496_251 Depth=5 + # Parent Loop BB496_236 Depth=3 + # Parent Loop BB496_238 Depth=4 + # Parent Loop BB496_250 Depth=5 # => This Inner Loop Header: Depth=6 lbu a4, 0(a1) andi a5, a2, 255 @@ -113721,24 +113685,23 @@ lbu a5, 0(a5) add a4, s0, a4 lbu a4, 0(a4) - bne a5, a4, .LBB496_248 -# %bb.350: # %while.body.i.i2401 - # in Loop: Header=BB496_349 Depth=6 + bne a5, a4, .LBB496_247 +# %bb.349: # %while.body.i.i2401 + # in Loop: Header=BB496_348 Depth=6 lbu a2, 0(a3) addi a1, a1, 1 addi a3, a3, 1 - bnez a2, .LBB496_349 - j .LBB496_248 -.LBB496_351: # %if.end8.i21.i - # in Loop: Header=BB496_251 Depth=5 - beqz s11, .LBB496_340 -# %bb.352: # %if.then.i.i23.i - # in Loop: Header=BB496_251 Depth=5 - ld s8, 0(s11) - ld a0, 384(sp) # 8-byte Folded Reload - ld a0, 0(a0) + bnez a2, .LBB496_348 + j .LBB496_247 +.LBB496_350: # %if.end8.i21.i + # in Loop: Header=BB496_250 Depth=5 + beqz s11, .LBB496_339 +# %bb.351: # %if.then.i.i23.i + # in Loop: Header=BB496_250 Depth=5 + ld s5, 0(s11) + ld a0, 0(s8) mv a1, s11 - mv a2, s8 + mv a2, s5 call sqlite3GetCollSeq ld ra, 456(sp) # 8-byte Folded Reload ld t6, 488(sp) # 8-byte Folded Reload @@ -113755,19 +113718,19 @@ add a1, sp, a1 addi a1, a1, 1280 vl2r.v v14, (a1) # Unknown-size Folded Reload - bnez a0, .LBB496_341 -# %bb.353: # %if.then3.i.i26.i - # in Loop: Header=BB496_251 Depth=5 - ld s7, 384(sp) # 8-byte Folded Reload - lw a0, 80(s7) - bnez a0, .LBB496_355 -# %bb.354: # %if.then4.i.i31.i - # in Loop: Header=BB496_251 Depth=5 + bnez a0, .LBB496_340 +# %bb.352: # %if.then3.i.i26.i + # in Loop: Header=BB496_250 Depth=5 + mv s7, s8 + lw a0, 80(s8) + bnez a0, .LBB496_354 +# %bb.353: # %if.then4.i.i31.i + # in Loop: Header=BB496_250 Depth=5 .Lpcrel_hi1283: auipc a0, %pcrel_hi(.L.str.340) addi a1, a0, %pcrel_lo(.Lpcrel_hi1283) mv a0, s7 - mv a2, s8 + mv a2, s5 call sqlite3ErrorMsg ld ra, 456(sp) # 8-byte Folded Reload ld t6, 488(sp) # 8-byte Folded Reload @@ -113785,75 +113748,73 @@ addi a0, a0, 1280 vl2r.v v14, (a0) # Unknown-size Folded Reload lw a0, 80(s7) -.LBB496_355: # %sqlite3CheckCollSeq.exit.i29.i - # in Loop: Header=BB496_251 Depth=5 +.LBB496_354: # %sqlite3CheckCollSeq.exit.i29.i + # in Loop: Header=BB496_250 Depth=5 addi a0, a0, 1 sw a0, 80(s7) - j .LBB496_340 -.LBB496_356: # %if.end76.i.thread - # in Loop: Header=BB496_239 Depth=4 + j .LBB496_339 +.LBB496_355: # %if.end76.i.thread + # in Loop: Header=BB496_238 Depth=4 lui a1, 1 or s1, s1, a1 - li s6, 1 - j .LBB496_360 -.LBB496_357: # %sqlite3StrICmp.exit.i.if.end76.i.loopexit2912_crit_edge - # in Loop: Header=BB496_239 Depth=4 + ld s6, 360(sp) # 8-byte Folded Reload + j .LBB496_359 +.LBB496_356: # %sqlite3StrICmp.exit.i.if.end76.i.loopexit2912_crit_edge + # in Loop: Header=BB496_238 Depth=4 lhu a1, 14(s3) andi a1, a1, 1 - li s6, 1 - beqz a1, .LBB496_247 -.LBB496_358: # %if.then82.i - # in Loop: Header=BB496_239 Depth=4 + ld s6, 360(sp) # 8-byte Folded Reload + beqz a1, .LBB496_246 +.LBB496_357: # %if.then82.i + # in Loop: Header=BB496_238 Depth=4 ld a1, 0(s3) ld a2, 96(a1) lui a3, 5 or s1, s1, a3 - beqz a2, .LBB496_362 -# %bb.359: # %if.then88.i - # in Loop: Header=BB496_239 Depth=4 + beqz a2, .LBB496_361 +# %bb.358: # %if.then88.i + # in Loop: Header=BB496_238 Depth=4 .Lpcrel_hi1284: auipc a1, %pcrel_hi(.LCPI496_7) fld fa5, %pcrel_lo(.Lpcrel_hi1284)(a1) fmul.d fs5, fs5, fa5 -.LBB496_360: # %for.inc.i614 - # in Loop: Header=BB496_239 Depth=4 +.LBB496_359: # %for.inc.i614 + # in Loop: Header=BB496_238 Depth=4 ld a7, 408(sp) # 8-byte Folded Reload ld s8, 424(sp) # 8-byte Folded Reload ld a2, 400(sp) # 8-byte Folded Reload -.LBB496_361: # %for.inc.i614 - # in Loop: Header=BB496_239 Depth=4 - mv t3, s5 +.LBB496_360: # %for.inc.i614 + # in Loop: Header=BB496_238 Depth=4 addi a2, a2, 1 addi s8, s8, 1 - blt a2, a0, .LBB496_239 - j .LBB496_366 -.LBB496_362: # %if.else90.i - # in Loop: Header=BB496_239 Depth=4 + blt a2, a0, .LBB496_238 + j .LBB496_365 +.LBB496_361: # %if.else90.i + # in Loop: Header=BB496_238 Depth=4 ld a1, 32(a1) ld a7, 408(sp) # 8-byte Folded Reload ld s8, 424(sp) # 8-byte Folded Reload ld a2, 400(sp) # 8-byte Folded Reload - beqz a1, .LBB496_361 -# %bb.363: # %if.then94.i - # in Loop: Header=BB496_239 Depth=4 + beqz a1, .LBB496_360 +# %bb.362: # %if.then94.i + # in Loop: Header=BB496_238 Depth=4 lw a1, 0(a1) addi a1, a1, 1 fcvt.d.w fa5, a1 fmul.d fs5, fs5, fa5 - j .LBB496_361 -.LBB496_364: # %for.end.loopexit.split.loop.exit.i - # in Loop: Header=BB496_237 Depth=3 + j .LBB496_360 +.LBB496_363: # %for.end.loopexit.split.loop.exit.i + # in Loop: Header=BB496_236 Depth=3 ld s8, 400(sp) # 8-byte Folded Reload - li s6, 1 + ld s6, 360(sp) # 8-byte Folded Reload ld a7, 408(sp) # 8-byte Folded Reload - mv t3, s5 - j .LBB496_366 -.LBB496_365: # in Loop: Header=BB496_237 Depth=3 + j .LBB496_365 +.LBB496_364: # in Loop: Header=BB496_236 Depth=3 li s1, 0 li s8, 0 fmv.d fs5, fs4 -.LBB496_366: # %for.end.i600 - # in Loop: Header=BB496_237 Depth=3 +.LBB496_365: # %for.end.i600 + # in Loop: Header=BB496_236 Depth=3 ld a2, 24(s10) slli a1, s8, 32 srli a3, a1, 30 @@ -113862,26 +113823,26 @@ add a2, a2, a3 lwu a2, 0(a2) flt.d a3, fs6, fs5 - beqz a3, .LBB496_369 -# %bb.367: # %while.body.i302.i.preheader - # in Loop: Header=BB496_237 Depth=3 + beqz a3, .LBB496_368 +# %bb.366: # %while.body.i302.i.preheader + # in Loop: Header=BB496_236 Depth=3 fld fa5, %pcrel_lo(.Lpcrel_hi1276)(a7) ld a3, 392(sp) # 8-byte Folded Reload fld fa4, %pcrel_lo(.Lpcrel_hi1277)(a3) fmv.d fa3, fa4 fmv.d fs4, fa5 -.LBB496_368: # %while.body.i302.i +.LBB496_367: # %while.body.i302.i # Parent Loop BB496_55 Depth=1 # Parent Loop BB496_59 Depth=2 - # Parent Loop BB496_237 Depth=3 + # Parent Loop BB496_236 Depth=3 # => This Inner Loop Header: Depth=4 fmul.d fa3, fa3, fa4 flt.d a3, fa3, fs5 fadd.d fs4, fs4, fa5 - bnez a3, .LBB496_368 -.LBB496_369: # %estLog.exit308.i - # in Loop: Header=BB496_237 Depth=3 - srli s7, a1, 32 + bnez a3, .LBB496_367 +.LBB496_368: # %estLog.exit308.i + # in Loop: Header=BB496_236 Depth=3 + srli s5, a1, 32 lbu a1, 44(s10) fcvt.d.wu fa5, a2 fmul.d fa5, fs5, fa5 @@ -113897,12 +113858,11 @@ and a1, a2, a1 slliw a1, a1, 22 or s1, s1, a1 - bge a3, a0, .LBB496_379 -# %bb.370: # %if.then129.i - # in Loop: Header=BB496_237 Depth=3 - mv s5, t3 + bge a3, a0, .LBB496_378 +# %bb.369: # %if.then129.i + # in Loop: Header=BB496_236 Depth=3 ld a0, 16(s10) - slli a1, s7, 2 + slli a1, s5, 2 add a0, a0, a1 lw s3, 0(a0) addi a0, sp, 504 @@ -113913,9 +113873,9 @@ mv a5, s10 mv s4, t6 call findTerm - beqz a0, .LBB496_373 -# %bb.371: # %if.then136.i - # in Loop: Header=BB496_237 Depth=3 + beqz a0, .LBB496_372 +# %bb.370: # %if.then136.i + # in Loop: Header=BB496_236 Depth=3 addi a0, sp, 504 li a4, 24 mv a1, s9 @@ -113923,16 +113883,16 @@ mv a3, s4 mv a5, s10 call findTerm - beqz a0, .LBB496_374 -# %bb.372: # %if.then140.i - # in Loop: Header=BB496_237 Depth=3 - ld a0, 248(sp) # 8-byte Folded Reload + beqz a0, .LBB496_373 +# %bb.371: # %if.then140.i + # in Loop: Header=BB496_236 Depth=3 + ld a0, 264(sp) # 8-byte Folded Reload fld fa5, %pcrel_lo(.Lpcrel_hi1280)(a0) lui a0, 18 or s1, s1, a0 fdiv.d fs4, fs4, fa5 - j .LBB496_375 -.LBB496_373: # in Loop: Header=BB496_237 Depth=3 + j .LBB496_374 +.LBB496_372: # in Loop: Header=BB496_236 Depth=3 csrr a0, vlenb li a1, 6 mul a0, a0, a1 @@ -113947,12 +113907,12 @@ li t4, 110 ld t5, 464(sp) # 8-byte Folded Reload mv t6, s4 - j .LBB496_378 -.LBB496_374: # in Loop: Header=BB496_237 Depth=3 + j .LBB496_377 +.LBB496_373: # in Loop: Header=BB496_236 Depth=3 lui a0, 2 or s1, s1, a0 -.LBB496_375: # %if.end143.i - # in Loop: Header=BB496_237 Depth=3 +.LBB496_374: # %if.end143.i + # in Loop: Header=BB496_236 Depth=3 addi a0, sp, 504 li a4, 36 mv a1, s9 @@ -113960,16 +113920,16 @@ ld a3, 488(sp) # 8-byte Folded Reload mv a5, s10 call findTerm - beqz a0, .LBB496_377 -# %bb.376: # %if.then146.i - # in Loop: Header=BB496_237 Depth=3 - ld a0, 248(sp) # 8-byte Folded Reload + beqz a0, .LBB496_376 +# %bb.375: # %if.then146.i + # in Loop: Header=BB496_236 Depth=3 + ld a0, 264(sp) # 8-byte Folded Reload fld fa5, %pcrel_lo(.Lpcrel_hi1280)(a0) lui a0, 32 or s1, s1, a0 fdiv.d fs4, fs4, fa5 -.LBB496_377: # %if.end151.i - # in Loop: Header=BB496_237 Depth=3 +.LBB496_376: # %if.end151.i + # in Loop: Header=BB496_236 Depth=3 csrr a0, vlenb li a1, 6 mul a0, a0, a1 @@ -113984,99 +113944,99 @@ li t4, 110 ld t5, 464(sp) # 8-byte Folded Reload ld t6, 488(sp) # 8-byte Folded Reload -.LBB496_378: # %if.end151.i - # in Loop: Header=BB496_237 Depth=3 +.LBB496_377: # %if.end151.i + # in Loop: Header=BB496_236 Depth=3 ld ra, 456(sp) # 8-byte Folded Reload ld a7, 408(sp) # 8-byte Folded Reload - mv t3, s5 -.LBB496_379: # %if.end151.i - # in Loop: Header=BB496_237 Depth=3 - beqz ra, .LBB496_421 -# %bb.380: # %if.then153.i - # in Loop: Header=BB496_237 Depth=3 - sd s7, 400(sp) # 8-byte Folded Spill +.LBB496_378: # %if.end151.i + # in Loop: Header=BB496_236 Depth=3 + beqz ra, .LBB496_420 +# %bb.379: # %if.then153.i + # in Loop: Header=BB496_236 Depth=3 + sd s5, 400(sp) # 8-byte Folded Spill sd s8, 424(sp) # 8-byte Folded Spill + sd s1, 352(sp) # 8-byte Folded Spill slli a0, s1, 49 - bltz a0, .LBB496_437 -# %bb.381: # %land.lhs.true157.i - # in Loop: Header=BB496_237 Depth=3 + ld t0, 328(sp) # 8-byte Folded Reload + bltz a0, .LBB496_436 +# %bb.380: # %land.lhs.true157.i + # in Loop: Header=BB496_236 Depth=3 lw a0, 0(ra) ld s3, 512(sp) sd a0, 384(sp) # 8-byte Folded Spill - blez a0, .LBB496_422 -# %bb.382: # %land.rhs.lr.ph.i.i - # in Loop: Header=BB496_237 Depth=3 + blez a0, .LBB496_421 +# %bb.381: # %land.rhs.lr.ph.i.i + # in Loop: Header=BB496_236 Depth=3 ld a7, 16(ra) - ld t0, 0(t3) - lw s11, 8(s10) + ld t1, 0(t0) + lw s6, 8(s10) li s2, 0 - li s8, 0 + li s5, 0 li s7, 0 sd zero, 304(sp) # 8-byte Folded Spill addi a0, s3, 4 sd a0, 184(sp) # 8-byte Folded Spill - sd s3, 360(sp) # 8-byte Folded Spill - sd s1, 352(sp) # 8-byte Folded Spill -.LBB496_383: # %land.rhs.i.i + sd s3, 344(sp) # 8-byte Folded Spill +.LBB496_382: # %land.rhs.i.i # Parent Loop BB496_55 Depth=1 # Parent Loop BB496_59 Depth=2 - # Parent Loop BB496_237 Depth=3 + # Parent Loop BB496_236 Depth=3 # => This Loop Header: Depth=4 - # Child Loop BB496_387 Depth 5 - # Child Loop BB496_400 Depth 5 - # Child Loop BB496_412 Depth 5 - # Child Loop BB496_417 Depth 5 - blt s11, s2, .LBB496_423 -# %bb.384: # %for.body.i.i - # in Loop: Header=BB496_383 Depth=4 + # Child Loop BB496_386 Depth 5 + # Child Loop BB496_399 Depth 5 + # Child Loop BB496_411 Depth 5 + # Child Loop BB496_416 Depth 5 + blt s6, s2, .LBB496_422 +# %bb.383: # %for.body.i.i + # in Loop: Header=BB496_382 Depth=4 ld s4, 0(a7) lbu a0, 0(s4) li a1, 149 - bne a0, a1, .LBB496_423 -# %bb.385: # %lor.lhs.false.i.i607 - # in Loop: Header=BB496_383 Depth=4 + bne a0, a1, .LBB496_422 +# %bb.384: # %lor.lhs.false.i.i607 + # in Loop: Header=BB496_382 Depth=4 lw a0, 72(s4) - bne a0, s9, .LBB496_423 -# %bb.386: # %if.then.i.i.i608.preheader - # in Loop: Header=BB496_383 Depth=4 + bne a0, s9, .LBB496_422 +# %bb.385: # %if.then.i.i.i608.preheader + # in Loop: Header=BB496_382 Depth=4 mv a0, s4 -.LBB496_387: # %if.then.i.i.i608 +.LBB496_386: # %if.then.i.i.i608 # Parent Loop BB496_55 Depth=1 # Parent Loop BB496_59 Depth=2 - # Parent Loop BB496_237 Depth=3 - # Parent Loop BB496_383 Depth=4 + # Parent Loop BB496_236 Depth=3 + # Parent Loop BB496_382 Depth=4 # => This Inner Loop Header: Depth=5 lbu a1, 0(a0) - ld s6, 8(a0) + ld s11, 8(a0) addi a2, a1, -31 snez a2, a2 addi a1, a1, -86 snez a1, a1 and a1, a2, a1 - snez a2, s6 + snez a2, s11 or a1, a1, a2 - bnez a1, .LBB496_389 -# %bb.388: # %cleanup.i.i.i - # in Loop: Header=BB496_387 Depth=5 + bnez a1, .LBB496_388 +# %bb.387: # %cleanup.i.i.i + # in Loop: Header=BB496_386 Depth=5 ld a0, 16(a0) - bnez a0, .LBB496_387 - j .LBB496_396 -.LBB496_389: # %if.end8.i.i.i - # in Loop: Header=BB496_383 Depth=4 - beqz s6, .LBB496_396 -# %bb.390: # %if.then.i.i.i338.i - # in Loop: Header=BB496_383 Depth=4 - ld s11, 0(s6) - ld a0, 0(t3) - mv a1, s6 - mv a2, s11 - mv s5, a7 - mv s3, t3 - mv s1, t0 + bnez a0, .LBB496_386 + j .LBB496_395 +.LBB496_388: # %if.end8.i.i.i + # in Loop: Header=BB496_382 Depth=4 + beqz s11, .LBB496_395 +# %bb.389: # %if.then.i.i.i338.i + # in Loop: Header=BB496_382 Depth=4 + ld s6, 0(s11) + ld a0, 0(t0) + mv a1, s11 + mv a2, s6 + mv s8, a7 + mv s3, t0 + mv s1, t1 call sqlite3GetCollSeq - mv t0, s1 - mv t3, s3 - mv a7, s5 + mv t1, s1 + mv t0, s3 + mv a7, s8 ld ra, 456(sp) # 8-byte Folded Reload ld t6, 488(sp) # 8-byte Folded Reload ld t5, 464(sp) # 8-byte Folded Reload @@ -114092,14 +114052,13 @@ add a1, sp, a1 addi a1, a1, 1280 vl2r.v v14, (a1) # Unknown-size Folded Reload - beqz a0, .LBB496_393 -# %bb.391: # %if.end9.i.i - # in Loop: Header=BB496_383 Depth=4 - lw s11, 8(s10) - ld s1, 352(sp) # 8-byte Folded Reload - bge s2, s11, .LBB496_397 -.LBB496_392: # %if.then13.i.i - # in Loop: Header=BB496_383 Depth=4 + beqz a0, .LBB496_392 +# %bb.390: # %if.end9.i.i + # in Loop: Header=BB496_382 Depth=4 + lw s6, 8(s10) + bge s2, s6, .LBB496_396 +.LBB496_391: # %if.then13.i.i + # in Loop: Header=BB496_382 Depth=4 ld a0, 16(s10) ld a1, 32(s10) slli a2, s2, 2 @@ -114116,25 +114075,25 @@ or a0, a3, a0 slli a2, s2, 3 add a2, a4, a2 - ld s3, 360(sp) # 8-byte Folded Reload + ld s3, 344(sp) # 8-byte Folded Reload lw a3, 76(s4) - beq a3, a0, .LBB496_398 - j .LBB496_407 -.LBB496_393: # %if.then3.i.i.i.i - # in Loop: Header=BB496_383 Depth=4 - lw a0, 80(t3) - bnez a0, .LBB496_395 -# %bb.394: # %if.then4.i.i.i.i - # in Loop: Header=BB496_383 Depth=4 + beq a3, a0, .LBB496_397 + j .LBB496_406 +.LBB496_392: # %if.then3.i.i.i.i + # in Loop: Header=BB496_382 Depth=4 + lw a0, 80(t0) + bnez a0, .LBB496_394 +# %bb.393: # %if.then4.i.i.i.i + # in Loop: Header=BB496_382 Depth=4 .Lpcrel_hi1285: auipc a0, %pcrel_hi(.L.str.340) addi a1, a0, %pcrel_lo(.Lpcrel_hi1285) - mv a0, t3 - mv a2, s11 + mv a0, t0 + mv a2, s6 call sqlite3ErrorMsg - mv t0, s1 - mv t3, s3 - mv a7, s5 + mv t1, s1 + mv t0, s3 + mv a7, s8 ld ra, 456(sp) # 8-byte Folded Reload ld t6, 488(sp) # 8-byte Folded Reload ld t5, 464(sp) # 8-byte Folded Reload @@ -114151,37 +114110,36 @@ addi a0, a0, 1280 vl2r.v v14, (a0) # Unknown-size Folded Reload lw a0, 80(s3) -.LBB496_395: # %sqlite3CheckCollSeq.exit.i.i.i - # in Loop: Header=BB496_383 Depth=4 +.LBB496_394: # %sqlite3CheckCollSeq.exit.i.i.i + # in Loop: Header=BB496_382 Depth=4 addi a0, a0, 1 - sw a0, 80(t3) -.LBB496_396: # %if.then8.i.i - # in Loop: Header=BB496_383 Depth=4 - ld s6, 48(t0) - lw s11, 8(s10) - ld s1, 352(sp) # 8-byte Folded Reload - blt s2, s11, .LBB496_392 -.LBB496_397: # in Loop: Header=BB496_383 Depth=4 + sw a0, 80(t0) +.LBB496_395: # %if.then8.i.i + # in Loop: Header=BB496_382 Depth=4 + ld s11, 48(t1) + lw s6, 8(s10) + blt s2, s6, .LBB496_391 +.LBB496_396: # in Loop: Header=BB496_382 Depth=4 li a1, 0 li a0, -1 - mv a2, s6 - ld s3, 360(sp) # 8-byte Folded Reload + mv a2, s11 + ld s3, 344(sp) # 8-byte Folded Reload lw a3, 76(s4) - bne a3, a0, .LBB496_407 -.LBB496_398: # %lor.lhs.false27.i.i - # in Loop: Header=BB496_383 Depth=4 - ld a4, 0(s6) + bne a3, a0, .LBB496_406 +.LBB496_397: # %lor.lhs.false27.i.i + # in Loop: Header=BB496_382 Depth=4 + ld a4, 0(s11) lbu a3, 0(a4) ld a2, 0(a2) - beqz a3, .LBB496_403 -# %bb.399: # %land.rhs.i.i.i.preheader - # in Loop: Header=BB496_383 Depth=4 + beqz a3, .LBB496_402 +# %bb.398: # %land.rhs.i.i.i.preheader + # in Loop: Header=BB496_382 Depth=4 addi a4, a4, 1 -.LBB496_400: # %land.rhs.i.i.i +.LBB496_399: # %land.rhs.i.i.i # Parent Loop BB496_55 Depth=1 # Parent Loop BB496_59 Depth=2 - # Parent Loop BB496_237 Depth=3 - # Parent Loop BB496_383 Depth=4 + # Parent Loop BB496_236 Depth=3 + # Parent Loop BB496_382 Depth=4 # => This Inner Loop Header: Depth=5 lbu a5, 0(a2) andi a6, a3, 255 @@ -114189,110 +114147,110 @@ lbu a6, 0(a6) add a5, s0, a5 lbu a5, 0(a5) - bne a6, a5, .LBB496_402 -# %bb.401: # %while.body.i.i336.i - # in Loop: Header=BB496_400 Depth=5 + bne a6, a5, .LBB496_401 +# %bb.400: # %while.body.i.i336.i + # in Loop: Header=BB496_399 Depth=5 lbu a3, 0(a4) addi a2, a2, 1 addi a4, a4, 1 - bnez a3, .LBB496_400 -.LBB496_402: # %while.end.loopexit.i.i.i - # in Loop: Header=BB496_383 Depth=4 + bnez a3, .LBB496_399 +.LBB496_401: # %while.end.loopexit.i.i.i + # in Loop: Header=BB496_382 Depth=4 andi a3, a3, 255 -.LBB496_403: # %sqlite3StrICmp.exit.i.i - # in Loop: Header=BB496_383 Depth=4 +.LBB496_402: # %sqlite3StrICmp.exit.i.i + # in Loop: Header=BB496_382 Depth=4 lbu a2, 0(a2) add a3, s0, a3 lbu a3, 0(a3) add a2, s0, a2 lbu a2, 0(a2) - bne a3, a2, .LBB496_407 -# %bb.404: # %if.end36.i.i - # in Loop: Header=BB496_383 Depth=4 + bne a3, a2, .LBB496_406 +# %bb.403: # %if.end36.i.i + # in Loop: Header=BB496_382 Depth=4 lbu a2, 16(a7) xor a1, a1, a2 ld a2, 400(sp) # 8-byte Folded Reload - bgeu a2, s2, .LBB496_409 -# %bb.405: # %if.then41.i.i - # in Loop: Header=BB496_383 Depth=4 - li s6, 1 + bgeu a2, s2, .LBB496_408 +# %bb.404: # %if.then41.i.i + # in Loop: Header=BB496_382 Depth=4 + li s11, 1 ld a2, 304(sp) # 8-byte Folded Reload - bne a1, a2, .LBB496_437 -# %bb.406: # %if.end47.i.i - # in Loop: Header=BB496_383 Depth=4 + bne a1, a2, .LBB496_436 +# %bb.405: # %if.end47.i.i + # in Loop: Header=BB496_382 Depth=4 addiw s7, s7, 1 addi a7, a7, 24 - bgez a0, .LBB496_408 - j .LBB496_410 -.LBB496_407: # %if.then31.i.i - # in Loop: Header=BB496_383 Depth=4 - li s6, 1 + bgez a0, .LBB496_407 + j .LBB496_409 +.LBB496_406: # %if.then31.i.i + # in Loop: Header=BB496_382 Depth=4 + li s11, 1 ld a0, 400(sp) # 8-byte Folded Reload - bgeu s2, a0, .LBB496_437 -.LBB496_408: # %for.inc.i.i - # in Loop: Header=BB496_383 Depth=4 + bgeu s2, a0, .LBB496_436 +.LBB496_407: # %for.inc.i.i + # in Loop: Header=BB496_382 Depth=4 addi s2, s2, 1 - addi s8, s8, 1 + addi s5, s5, 1 ld a0, 384(sp) # 8-byte Folded Reload - blt s7, a0, .LBB496_383 - j .LBB496_424 -.LBB496_409: # in Loop: Header=BB496_383 Depth=4 + blt s7, a0, .LBB496_382 + j .LBB496_423 +.LBB496_408: # in Loop: Header=BB496_382 Depth=4 sd a1, 304(sp) # 8-byte Folded Spill - li s6, 1 + li s11, 1 addiw s7, s7, 1 addi a7, a7, 24 - bgez a0, .LBB496_408 -.LBB496_410: # %land.lhs.true.i313.i - # in Loop: Header=BB496_383 Depth=4 + bgez a0, .LBB496_407 +.LBB496_409: # %land.lhs.true.i313.i + # in Loop: Header=BB496_382 Depth=4 lw a0, 0(s3) li s4, -1 - sd t0, 120(sp) # 8-byte Folded Spill - blez a0, .LBB496_414 -# %bb.411: # %for.body.preheader.i.i.i326.i - # in Loop: Header=BB496_383 Depth=4 + sd t1, 120(sp) # 8-byte Folded Spill + blez a0, .LBB496_413 +# %bb.410: # %for.body.preheader.i.i.i326.i + # in Loop: Header=BB496_382 Depth=4 li a1, 0 ld a2, 184(sp) # 8-byte Folded Reload -.LBB496_412: # %for.body.i.i.i328.i +.LBB496_411: # %for.body.i.i.i328.i # Parent Loop BB496_55 Depth=1 # Parent Loop BB496_59 Depth=2 - # Parent Loop BB496_237 Depth=3 - # Parent Loop BB496_383 Depth=4 + # Parent Loop BB496_236 Depth=3 + # Parent Loop BB496_382 Depth=4 # => This Inner Loop Header: Depth=5 lw a3, 0(a2) - beq a3, s9, .LBB496_420 -# %bb.413: # %for.cond.i.i.i332.i - # in Loop: Header=BB496_412 Depth=5 + beq a3, s9, .LBB496_419 +# %bb.412: # %for.cond.i.i.i332.i + # in Loop: Header=BB496_411 Depth=5 addi a1, a1, 1 addi a2, a2, 4 - bne a0, a1, .LBB496_412 -.LBB496_414: # %getMask.exit.i.i315.i - # in Loop: Header=BB496_383 Depth=4 + bne a0, a1, .LBB496_411 +.LBB496_413: # %getMask.exit.i.i315.i + # in Loop: Header=BB496_382 Depth=4 sd a7, 128(sp) # 8-byte Folded Spill lw a1, 0(ra) - blt s7, a1, .LBB496_416 -.LBB496_415: # %getMask.exit.i.i315.i - # in Loop: Header=BB496_383 Depth=4 + blt s7, a1, .LBB496_415 +.LBB496_414: # %getMask.exit.i.i315.i + # in Loop: Header=BB496_382 Depth=4 mv a1, s7 -.LBB496_416: # %getMask.exit.i.i315.i - # in Loop: Header=BB496_383 Depth=4 +.LBB496_415: # %getMask.exit.i.i315.i + # in Loop: Header=BB496_382 Depth=4 li a0, 24 - mul s5, s7, a0 - sub s6, a1, s7 - addi s6, s6, 1 -.LBB496_417: # %while.cond.i.i319.i + mul s8, s7, a0 + sub s11, a1, s7 + addi s11, s11, 1 +.LBB496_416: # %while.cond.i.i319.i # Parent Loop BB496_55 Depth=1 # Parent Loop BB496_59 Depth=2 - # Parent Loop BB496_237 Depth=3 - # Parent Loop BB496_383 Depth=4 + # Parent Loop BB496_236 Depth=3 + # Parent Loop BB496_382 Depth=4 # => This Inner Loop Header: Depth=5 - addi s6, s6, -1 - beqz s6, .LBB496_425 -# %bb.418: # %while.body.i41.i.i - # in Loop: Header=BB496_417 Depth=5 + addi s11, s11, -1 + beqz s11, .LBB496_424 +# %bb.417: # %while.body.i41.i.i + # in Loop: Header=BB496_416 Depth=5 ld a1, 16(ra) - add a1, a1, s5 + add a1, a1, s8 ld a1, 0(a1) - addi s5, s5, 24 + addi s8, s8, 24 mv a0, s3 call exprTableUsage ld ra, 456(sp) # 8-byte Folded Reload @@ -114311,110 +114269,112 @@ addi a1, a1, 1280 vl2r.v v14, (a1) # Unknown-size Folded Reload and a1, a0, s4 - beqz a1, .LBB496_417 -# %bb.419: # in Loop: Header=BB496_383 Depth=4 - ld t3, 344(sp) # 8-byte Folded Reload - li s6, 1 + beqz a1, .LBB496_416 +# %bb.418: # in Loop: Header=BB496_382 Depth=4 + ld t0, 328(sp) # 8-byte Folded Reload + li s11, 1 ld a7, 128(sp) # 8-byte Folded Reload - ld t0, 120(sp) # 8-byte Folded Reload - j .LBB496_408 -.LBB496_420: # %if.then.i.i44.i.i - # in Loop: Header=BB496_383 Depth=4 - sll a0, s6, a1 + ld t1, 120(sp) # 8-byte Folded Reload + j .LBB496_407 +.LBB496_419: # %if.then.i.i44.i.i + # in Loop: Header=BB496_382 Depth=4 + sll a0, s11, a1 not s4, a0 sd a7, 128(sp) # 8-byte Folded Spill lw a1, 0(ra) - bge s7, a1, .LBB496_415 - j .LBB496_416 -.LBB496_421: # in Loop: Header=BB496_237 Depth=3 + bge s7, a1, .LBB496_414 + j .LBB496_415 +.LBB496_420: # in Loop: Header=BB496_236 Depth=3 li a6, 63 - bnez s1, .LBB496_442 - j .LBB496_236 -.LBB496_422: # in Loop: Header=BB496_237 Depth=3 + bnez s1, .LBB496_441 + j .LBB496_235 +.LBB496_421: # in Loop: Header=BB496_236 Depth=3 li s0, 0 li s7, 0 - li s8, 0 + li s5, 0 ld a0, 384(sp) # 8-byte Folded Reload - bgtz a0, .LBB496_426 - j .LBB496_446 -.LBB496_423: # %for.end.loopexit.loopexit.split.loop.exit140.i.i - # in Loop: Header=BB496_237 Depth=3 - mv s8, s2 -.LBB496_424: # %for.end.loopexit.i.i - # in Loop: Header=BB496_237 Depth=3 + bgtz a0, .LBB496_425 + j .LBB496_445 +.LBB496_422: # %for.end.loopexit.loopexit.split.loop.exit140.i.i + # in Loop: Header=BB496_236 Depth=3 + mv s5, s2 +.LBB496_423: # %for.end.loopexit.i.i + # in Loop: Header=BB496_236 Depth=3 ld a0, 304(sp) # 8-byte Folded Reload snez s0, a0 ld a0, 384(sp) # 8-byte Folded Reload - bge s7, a0, .LBB496_446 - j .LBB496_426 -.LBB496_425: # %for.inc.thread.i.i - # in Loop: Header=BB496_237 Depth=3 - addi s8, s8, 1 + bge s7, a0, .LBB496_445 + j .LBB496_425 +.LBB496_424: # %for.inc.thread.i.i + # in Loop: Header=BB496_236 Depth=3 + addi s5, s5, 1 ld s7, 384(sp) # 8-byte Folded Reload - ld t3, 344(sp) # 8-byte Folded Reload - li s6, 1 + ld t0, 328(sp) # 8-byte Folded Reload + li s11, 1 ld a0, 304(sp) # 8-byte Folded Reload snez s0, a0 ld a0, 384(sp) # 8-byte Folded Reload - bge s7, a0, .LBB496_446 -.LBB496_426: # %if.end65.i.i - # in Loop: Header=BB496_237 Depth=3 + bge s7, a0, .LBB496_445 +.LBB496_425: # %if.end65.i.i + # in Loop: Header=BB496_236 Depth=3 lbu a0, 44(s10) - beqz a0, .LBB496_437 -# %bb.427: # %land.lhs.true69.i.i - # in Loop: Header=BB496_237 Depth=3 + beqz a0, .LBB496_436 +# %bb.426: # %land.lhs.true69.i.i + # in Loop: Header=BB496_236 Depth=3 lw a0, 8(s10) - sext.w s8, s8 - bne s8, a0, .LBB496_437 -# %bb.428: # %land.lhs.true73.i.i - # in Loop: Header=BB496_237 Depth=3 + sext.w s5, s5 + bne s5, a0, .LBB496_436 +# %bb.427: # %land.lhs.true73.i.i + # in Loop: Header=BB496_236 Depth=3 lw a0, 0(s3) li s2, -1 - blez a0, .LBB496_432 -# %bb.429: # %for.body.preheader.i.i62.i.i - # in Loop: Header=BB496_237 Depth=3 + blez a0, .LBB496_431 +# %bb.428: # %for.body.preheader.i.i62.i.i + # in Loop: Header=BB496_236 Depth=3 li a1, 0 addi a2, s3, 4 -.LBB496_430: # %for.body.i.i64.i.i +.LBB496_429: # %for.body.i.i64.i.i # Parent Loop BB496_55 Depth=1 # Parent Loop BB496_59 Depth=2 - # Parent Loop BB496_237 Depth=3 + # Parent Loop BB496_236 Depth=3 # => This Inner Loop Header: Depth=4 lw a3, 0(a2) - beq a3, s9, .LBB496_460 -# %bb.431: # %for.cond.i.i68.i.i - # in Loop: Header=BB496_430 Depth=4 + beq a3, s9, .LBB496_459 +# %bb.430: # %for.cond.i.i68.i.i + # in Loop: Header=BB496_429 Depth=4 addi a1, a1, 1 addi a2, a2, 4 - bne a0, a1, .LBB496_430 -.LBB496_432: # %getMask.exit.i46.i.i - # in Loop: Header=BB496_237 Depth=3 + bne a0, a1, .LBB496_429 +.LBB496_431: # %getMask.exit.i46.i.i + # in Loop: Header=BB496_236 Depth=3 lw a1, 0(ra) - blt s7, a1, .LBB496_434 -.LBB496_433: # %getMask.exit.i46.i.i - # in Loop: Header=BB496_237 Depth=3 + blt s7, a1, .LBB496_433 +.LBB496_432: # %getMask.exit.i46.i.i + # in Loop: Header=BB496_236 Depth=3 mv a1, s7 -.LBB496_434: # %getMask.exit.i46.i.i - # in Loop: Header=BB496_237 Depth=3 +.LBB496_433: # %getMask.exit.i46.i.i + # in Loop: Header=BB496_236 Depth=3 li a0, 24 mul a0, s7, a0 sub s4, a1, s7 addi s4, s4, 1 -.LBB496_435: # %while.cond.i51.i.i +.LBB496_434: # %while.cond.i51.i.i # Parent Loop BB496_55 Depth=1 # Parent Loop BB496_59 Depth=2 - # Parent Loop BB496_237 Depth=3 + # Parent Loop BB496_236 Depth=3 # => This Inner Loop Header: Depth=4 addi s4, s4, -1 - beqz s4, .LBB496_446 -# %bb.436: # %while.body.i54.i.i - # in Loop: Header=BB496_435 Depth=4 + beqz s4, .LBB496_445 +# %bb.435: # %while.body.i54.i.i + # in Loop: Header=BB496_434 Depth=4 ld a1, 16(ra) add a1, a1, a0 ld a1, 0(a1) addi s5, a0, 24 mv a0, s3 + mv s6, t0 call exprTableUsage + mv t0, s6 ld ra, 456(sp) # 8-byte Folded Reload ld t6, 488(sp) # 8-byte Folded Reload ld t5, 464(sp) # 8-byte Folded Reload @@ -114432,71 +114392,69 @@ vl2r.v v14, (a1) # Unknown-size Folded Reload and a1, a0, s2 mv a0, s5 - ld t3, 344(sp) # 8-byte Folded Reload - beqz a1, .LBB496_435 -.LBB496_437: # %if.else171.i - # in Loop: Header=BB496_237 Depth=3 + beqz a1, .LBB496_434 +.LBB496_436: # %if.else171.i + # in Loop: Header=BB496_236 Depth=3 flt.d a0, fs6, fs4 - beqz a0, .LBB496_441 -# %bb.438: # %while.body.i341.i.preheader - # in Loop: Header=BB496_237 Depth=3 + beqz a0, .LBB496_439 +# %bb.437: # %while.body.i341.i.preheader + # in Loop: Header=BB496_236 Depth=3 ld a7, 408(sp) # 8-byte Folded Reload fld fa4, %pcrel_lo(.Lpcrel_hi1276)(a7) fmv.d fa3, fs6 fmv.d fa5, fa4 ld s2, 320(sp) # 8-byte Folded Reload - ld s11, 328(sp) # 8-byte Folded Reload + ld s6, 360(sp) # 8-byte Folded Reload li a6, 63 -.LBB496_439: # %while.body.i341.i +.LBB496_438: # %while.body.i341.i # Parent Loop BB496_55 Depth=1 # Parent Loop BB496_59 Depth=2 - # Parent Loop BB496_237 Depth=3 + # Parent Loop BB496_236 Depth=3 # => This Inner Loop Header: Depth=4 fmul.d fa3, fa3, fs6 flt.d a0, fa3, fs4 fadd.d fa5, fa5, fa4 - bnez a0, .LBB496_439 -# %bb.440: # %estLog.exit347.i - # in Loop: Header=BB496_237 Depth=3 - fmadd.d fs4, fs4, fa5, fs4 - ld s8, 424(sp) # 8-byte Folded Reload - bnez s1, .LBB496_442 - j .LBB496_236 -.LBB496_441: # in Loop: Header=BB496_237 Depth=3 + bnez a0, .LBB496_438 + j .LBB496_440 +.LBB496_439: # in Loop: Header=BB496_236 Depth=3 ld a7, 408(sp) # 8-byte Folded Reload fld fa5, %pcrel_lo(.Lpcrel_hi1276)(a7) ld s2, 320(sp) # 8-byte Folded Reload - ld s11, 328(sp) # 8-byte Folded Reload + ld s6, 360(sp) # 8-byte Folded Reload li a6, 63 +.LBB496_440: # %estLog.exit347.i + # in Loop: Header=BB496_236 Depth=3 fmadd.d fs4, fs4, fa5, fs4 ld s8, 424(sp) # 8-byte Folded Reload - beqz s1, .LBB496_236 -.LBB496_442: # %land.lhs.true177.i - # in Loop: Header=BB496_237 Depth=3 + ld s1, 352(sp) # 8-byte Folded Reload + beqz s1, .LBB496_235 +.LBB496_441: # %land.lhs.true177.i + # in Loop: Header=BB496_236 Depth=3 ld a0, 336(sp) # 8-byte Folded Reload ld a0, 64(a0) - bltz a0, .LBB496_456 -.LBB496_443: # %for.cond183.preheader.i - # in Loop: Header=BB496_237 Depth=3 + bltz a0, .LBB496_455 +.LBB496_442: # %for.cond183.preheader.i + # in Loop: Header=BB496_236 Depth=3 lw a1, 8(s10) - blez a1, .LBB496_453 -# %bb.444: # %for.body187.lr.ph.i - # in Loop: Header=BB496_237 Depth=3 + blez a1, .LBB496_452 +# %bb.443: # %for.body187.lr.ph.i + # in Loop: Header=BB496_236 Depth=3 ld a2, 16(s10) srli a3, s2, 2 - bgeu a1, a3, .LBB496_448 -# %bb.445: # in Loop: Header=BB496_237 Depth=3 + bgeu a1, a3, .LBB496_447 +# %bb.444: # in Loop: Header=BB496_236 Depth=3 li a3, 0 - j .LBB496_451 -.LBB496_446: # %if.end175.thread.i - # in Loop: Header=BB496_237 Depth=3 - bnez s1, .LBB496_458 -# %bb.447: # %if.end175.thread.i - # in Loop: Header=BB496_237 Depth=3 + j .LBB496_450 +.LBB496_445: # %if.end175.thread.i + # in Loop: Header=BB496_236 Depth=3 + ld a1, 352(sp) # 8-byte Folded Reload + bnez a1, .LBB496_457 +# %bb.446: # %if.end175.thread.i + # in Loop: Header=BB496_236 Depth=3 lui a0, 258 - j .LBB496_459 -.LBB496_448: # %vector.ph - # in Loop: Header=BB496_237 Depth=3 + j .LBB496_458 +.LBB496_447: # %vector.ph + # in Loop: Header=BB496_236 Depth=3 srli a3, s2, 3 ld a4, 160(sp) # 8-byte Folded Reload addi a4, a4, -1 @@ -114517,10 +114475,10 @@ vmv1r.v v8, v10 mv a0, a3 mv a4, a2 -.LBB496_449: # %vector.body +.LBB496_448: # %vector.body # Parent Loop BB496_55 Depth=1 # Parent Loop BB496_59 Depth=2 - # Parent Loop BB496_237 Depth=3 + # Parent Loop BB496_236 Depth=3 # => This Inner Loop Header: Depth=4 vl1re32.v v10, (a4) vsetvli a5, zero, e32, m1, ta, ma @@ -114530,68 +114488,68 @@ vsll.vv v10, v14, v12 vnot.v v10, v10 vand.vv v8, v8, v10, v0.t - sub a0, a0, s11 + sub a0, a0, s6 add a4, a4, s2 - bnez a0, .LBB496_449 -# %bb.450: # %middle.block - # in Loop: Header=BB496_237 Depth=3 + bnez a0, .LBB496_448 +# %bb.449: # %middle.block + # in Loop: Header=BB496_236 Depth=3 vredand.vs v8, v8, v8 vmv.x.s a0, v8 - beq a3, a1, .LBB496_453 -.LBB496_451: # %for.body187.i.preheader - # in Loop: Header=BB496_237 Depth=3 + beq a3, a1, .LBB496_452 +.LBB496_450: # %for.body187.i.preheader + # in Loop: Header=BB496_236 Depth=3 sub a1, a1, a3 slli a3, a3, 2 add a2, a2, a3 -.LBB496_452: # %for.body187.i +.LBB496_451: # %for.body187.i # Parent Loop BB496_55 Depth=1 # Parent Loop BB496_59 Depth=2 - # Parent Loop BB496_237 Depth=3 + # Parent Loop BB496_236 Depth=3 # => This Inner Loop Header: Depth=4 lwu a3, 0(a2) sltiu a4, a3, 63 - sll a3, s6, a3 + sll a3, s11, a3 not a3, a3 addi a4, a4, -1 or a3, a4, a3 and a0, a3, a0 addi a1, a1, -1 addi a2, a2, 4 - bnez a1, .LBB496_452 -.LBB496_453: # %for.end199.i - # in Loop: Header=BB496_237 Depth=3 - bnez a0, .LBB496_455 -# %bb.454: # in Loop: Header=BB496_237 Depth=3 + bnez a1, .LBB496_451 +.LBB496_452: # %for.end199.i + # in Loop: Header=BB496_236 Depth=3 + bnez a0, .LBB496_454 +# %bb.453: # in Loop: Header=BB496_236 Depth=3 .Lpcrel_hi1286: auipc a1, %pcrel_hi(.LCPI496_8) fld fa5, %pcrel_lo(.Lpcrel_hi1286)(a1) fmul.d fs4, fs4, fa5 -.LBB496_455: # %for.end199.i - # in Loop: Header=BB496_237 Depth=3 +.LBB496_454: # %for.end199.i + # in Loop: Header=BB496_236 Depth=3 seqz a0, a0 slliw a0, a0, 19 or s1, s1, a0 -.LBB496_456: # %if.end206.i - # in Loop: Header=BB496_237 Depth=3 +.LBB496_455: # %if.end206.i + # in Loop: Header=BB496_236 Depth=3 snez a0, s1 flt.d a1, fs4, fs3 and a0, a0, a1 - bnez a0, .LBB496_457 - j .LBB496_236 -.LBB496_457: # %if.then211.i - # in Loop: Header=BB496_237 Depth=3 - sd s8, 264(sp) # 8-byte Folded Spill - sd s1, 288(sp) # 8-byte Folded Spill + bnez a0, .LBB496_456 + j .LBB496_235 +.LBB496_456: # %if.then211.i + # in Loop: Header=BB496_236 Depth=3 + sd s8, 280(sp) # 8-byte Folded Spill + sd s1, 296(sp) # 8-byte Folded Spill fmv.d fs3, fs4 - sd s10, 256(sp) # 8-byte Folded Spill - j .LBB496_236 -.LBB496_458: # in Loop: Header=BB496_237 Depth=3 + sd s10, 272(sp) # 8-byte Folded Spill + j .LBB496_235 +.LBB496_457: # in Loop: Header=BB496_236 Depth=3 lui a0, 256 - or a0, s1, a0 -.LBB496_459: # %if.end175.thread.i - # in Loop: Header=BB496_237 Depth=3 + or a0, a1, a0 +.LBB496_458: # %if.end175.thread.i + # in Loop: Header=BB496_236 Depth=3 ld s2, 320(sp) # 8-byte Folded Reload - ld s11, 328(sp) # 8-byte Folded Reload + ld s6, 360(sp) # 8-byte Folded Reload ld a7, 408(sp) # 8-byte Folded Reload ld s8, 424(sp) # 8-byte Folded Reload slliw s1, s0, 21 @@ -114599,74 +114557,72 @@ li a6, 63 ld a0, 336(sp) # 8-byte Folded Reload ld a0, 64(a0) - bgez a0, .LBB496_443 - j .LBB496_456 -.LBB496_460: # %if.then.i.i71.i.i - # in Loop: Header=BB496_237 Depth=3 - sll a0, s6, a1 + bgez a0, .LBB496_442 + j .LBB496_455 +.LBB496_459: # %if.then.i.i71.i.i + # in Loop: Header=BB496_236 Depth=3 + sll a0, s11, a1 not s2, a0 lw a1, 0(ra) - bge s7, a1, .LBB496_433 - j .LBB496_434 -.LBB496_461: # in Loop: Header=BB496_59 Depth=2 + bge s7, a1, .LBB496_432 + j .LBB496_433 +.LBB496_460: # in Loop: Header=BB496_59 Depth=2 ld a7, 408(sp) # 8-byte Folded Reload fld fa4, %pcrel_lo(.Lpcrel_hi1276)(a7) - ld t3, 344(sp) # 8-byte Folded Reload ld s2, 320(sp) # 8-byte Folded Reload fmadd.d fs3, fs3, fa4, fs3 flt.d a0, fs3, fs4 - beqz a0, .LBB496_1181 - j .LBB496_230 -.LBB496_1181: # in Loop: Header=BB496_59 Depth=2 + beqz a0, .LBB496_1177 j .LBB496_229 -.LBB496_462: # %if.then43.i +.LBB496_1177: # in Loop: Header=BB496_59 Depth=2 + j .LBB496_228 +.LBB496_461: # %if.then43.i # in Loop: Header=BB496_59 Depth=2 lbu a0, 16(s2) - ld t3, 344(sp) # 8-byte Folded Reload - beqz a0, .LBB496_464 -# %bb.463: # %if.then43.i + beqz a0, .LBB496_463 +# %bb.462: # %if.then43.i # in Loop: Header=BB496_59 Depth=2 ld a0, 16(sp) # 8-byte Folded Reload - j .LBB496_465 -.LBB496_464: # in Loop: Header=BB496_59 Depth=2 + j .LBB496_464 +.LBB496_463: # in Loop: Header=BB496_59 Depth=2 lui a0, 256 addi a0, a0, 512 -.LBB496_465: # %if.then43.i +.LBB496_464: # %if.then43.i # in Loop: Header=BB496_59 Depth=2 ld s2, 320(sp) # 8-byte Folded Reload ld a7, 408(sp) # 8-byte Folded Reload - ld a1, 288(sp) # 8-byte Folded Reload + ld a1, 296(sp) # 8-byte Folded Reload or a1, a0, a1 - sd a1, 288(sp) # 8-byte Folded Spill + sd a1, 296(sp) # 8-byte Folded Spill flt.d a0, fs3, fs4 - bnez a0, .LBB496_1182 - j .LBB496_229 -.LBB496_1182: # %if.then43.i + bnez a0, .LBB496_1178 + j .LBB496_228 +.LBB496_1178: # %if.then43.i # in Loop: Header=BB496_59 Depth=2 - j .LBB496_230 -.LBB496_466: # %if.then.i.i.i.i + j .LBB496_229 +.LBB496_465: # %if.then.i.i.i.i # in Loop: Header=BB496_59 Depth=2 - sll a1, s6, a2 + sll a1, s11, a2 not s1, a1 -.LBB496_467: # %getMask.exit.i.i.i +.LBB496_466: # %getMask.exit.i.i.i # in Loop: Header=BB496_59 Depth=2 lw s4, 0(ra) - bgtz s4, .LBB496_469 -# %bb.468: # %getMask.exit.i.i.i + bgtz s4, .LBB496_468 +# %bb.467: # %getMask.exit.i.i.i # in Loop: Header=BB496_59 Depth=2 li s4, 1 -.LBB496_469: # %getMask.exit.i.i.i +.LBB496_468: # %getMask.exit.i.i.i # in Loop: Header=BB496_59 Depth=2 addi a0, a0, 24 -.LBB496_470: # %while.cond.i.i.i +.LBB496_469: # %while.cond.i.i.i # Parent Loop BB496_55 Depth=1 # Parent Loop BB496_59 Depth=2 # => This Inner Loop Header: Depth=3 addi s4, s4, -1 - bnez s4, .LBB496_471 + bnez s4, .LBB496_470 j .LBB496_88 -.LBB496_471: # %while.body.i.i.i - # in Loop: Header=BB496_470 Depth=3 +.LBB496_470: # %while.body.i.i.i + # in Loop: Header=BB496_469 Depth=3 ld a1, 0(a0) addi s5, a0, 24 mv a0, s3 @@ -114688,87 +114644,86 @@ vl2r.v v14, (a1) # Unknown-size Folded Reload and a1, a0, s1 mv a0, s5 - ld t3, 344(sp) # 8-byte Folded Reload - beqz a1, .LBB496_470 -.LBB496_472: # in Loop: Header=BB496_59 Depth=2 + beqz a1, .LBB496_469 +.LBB496_471: # in Loop: Header=BB496_59 Depth=2 li a0, 0 li a4, 0 - li t2, 0 + li t1, 0 li a1, 0 -.LBB496_473: # %if.end101 +.LBB496_472: # %if.end101 # in Loop: Header=BB496_59 Depth=2 fmv.d fs3, fs1 - ld s10, 144(sp) # 8-byte Folded Reload - ld s1, 280(sp) # 8-byte Folded Reload -.LBB496_474: # %if.end101 + ld s7, 192(sp) # 8-byte Folded Reload + ld s1, 216(sp) # 8-byte Folded Reload +.LBB496_473: # %if.end101 # in Loop: Header=BB496_59 Depth=2 - ld s4, 240(sp) # 8-byte Folded Reload - ld a5, 296(sp) # 8-byte Folded Reload - ld a7, 232(sp) # 8-byte Folded Reload - ld t0, 224(sp) # 8-byte Folded Reload - ld a6, 216(sp) # 8-byte Folded Reload - ld t1, 336(sp) # 8-byte Folded Reload - ld a3, 208(sp) # 8-byte Folded Reload + ld s9, 256(sp) # 8-byte Folded Reload + ld s10, 144(sp) # 8-byte Folded Reload + ld a6, 248(sp) # 8-byte Folded Reload + ld a7, 240(sp) # 8-byte Folded Reload + ld a5, 232(sp) # 8-byte Folded Reload + ld t0, 336(sp) # 8-byte Folded Reload + ld a3, 224(sp) # 8-byte Folded Reload flt.d a2, fs3, fs2 - beqz a2, .LBB496_1183 - j .LBB496_190 -.LBB496_1183: # %if.end101 + beqz a2, .LBB496_1179 + j .LBB496_189 +.LBB496_1179: # %if.end101 # in Loop: Header=BB496_59 Depth=2 - j .LBB496_191 -.LBB496_475: # in Loop: Header=BB496_59 Depth=2 + j .LBB496_190 +.LBB496_474: # in Loop: Header=BB496_59 Depth=2 .Lpcrel_hi1278: auipc a0, %pcrel_hi(.LCPI496_2) fld fs4, %pcrel_lo(.Lpcrel_hi1278)(a0) - beqz s10, .LBB496_1184 + beqz s10, .LBB496_1180 j .LBB496_135 -.LBB496_1184: # in Loop: Header=BB496_59 Depth=2 +.LBB496_1180: # in Loop: Header=BB496_59 Depth=2 j .LBB496_119 -.LBB496_476: # in Loop: Header=BB496_55 Depth=1 +.LBB496_475: # in Loop: Header=BB496_55 Depth=1 li a1, 0 - li t0, 0 + li a7, 0 sd zero, 176(sp) # 8-byte Folded Spill - j .LBB496_480 -.LBB496_477: # %for.end111 + j .LBB496_479 +.LBB496_476: # %for.end111 # in Loop: Header=BB496_55 Depth=1 ld a1, 152(sp) # 8-byte Folded Reload slli a0, a1, 43 - bgez a0, .LBB496_479 -# %bb.478: # %if.then115 + bgez a0, .LBB496_478 +# %bb.477: # %if.then115 # in Loop: Header=BB496_55 Depth=1 ld a0, 168(sp) # 8-byte Folded Reload sd zero, 0(a0) -.LBB496_479: # %if.end116 +.LBB496_478: # %if.end116 # in Loop: Header=BB496_55 Depth=1 - ld a5, 192(sp) # 8-byte Folded Reload - ld s0, 272(sp) # 8-byte Folded Reload -.LBB496_480: # %if.end116 + ld s10, 200(sp) # 8-byte Folded Reload + ld s0, 288(sp) # 8-byte Folded Reload +.LBB496_479: # %if.end116 # in Loop: Header=BB496_55 Depth=1 - ld a0, 200(sp) # 8-byte Folded Reload - mv a6, a1 + ld a0, 208(sp) # 8-byte Folded Reload + mv a5, a1 sw a1, 4(a0) - sd a7, 16(a0) - sw t0, 60(a0) + sd a6, 16(a0) + sw a7, 60(a0) sd zero, 72(a0) sw zero, 64(a0) - beqz a7, .LBB496_482 -# %bb.481: # %if.then122 + beqz a6, .LBB496_481 +# %bb.480: # %if.then122 # in Loop: Header=BB496_55 Depth=1 - lw a1, 84(t3) + lw a1, 84(s8) addi a0, a1, 1 - sw a0, 84(t3) + sw a0, 84(s8) lw a0, 1016(sp) - ld a2, 200(sp) # 8-byte Folded Reload + ld a2, 208(sp) # 8-byte Folded Reload sw a1, 28(a2) - bgtz a0, .LBB496_483 + bgtz a0, .LBB496_482 j .LBB496_53 -.LBB496_482: # in Loop: Header=BB496_55 Depth=1 +.LBB496_481: # in Loop: Header=BB496_55 Depth=1 li a1, -1 lw a0, 1016(sp) - ld a2, 200(sp) # 8-byte Folded Reload + ld a2, 208(sp) # 8-byte Folded Reload sw a1, 28(a2) - bgtz a0, .LBB496_483 + bgtz a0, .LBB496_482 j .LBB496_53 -.LBB496_483: # %for.body.preheader.i627 +.LBB496_482: # %for.body.preheader.i627 # in Loop: Header=BB496_55 Depth=1 lw a1, 176(sp) # 8-byte Folded Reload li a2, 72 @@ -114777,45 +114732,45 @@ lw a1, 52(a1) li a2, 0 addi a3, sp, 1020 -.LBB496_484: # %for.body.i629 +.LBB496_483: # %for.body.i629 # Parent Loop BB496_55 Depth=1 # => This Inner Loop Header: Depth=2 lw a4, 0(a3) - beq a4, a1, .LBB496_486 -# %bb.485: # %for.cond.i633 - # in Loop: Header=BB496_484 Depth=2 + beq a4, a1, .LBB496_485 +# %bb.484: # %for.cond.i633 + # in Loop: Header=BB496_483 Depth=2 addi a2, a2, 1 addi a3, a3, 4 - bne a0, a2, .LBB496_484 + bne a0, a2, .LBB496_483 j .LBB496_53 -.LBB496_486: # %if.then.i636 +.LBB496_485: # %if.then.i636 # in Loop: Header=BB496_55 Depth=1 - sll a1, s6, a2 + sll a1, s11, a2 j .LBB496_54 -.LBB496_487: # %for.end137.loopexit +.LBB496_486: # %for.end137.loopexit ld a0, 104(sp) # 8-byte Folded Reload slli a0, a0, 41 srli a0, a0, 63 ld a2, 168(sp) # 8-byte Folded Reload snez a1, a2 and a0, a1, a0 - beqz a0, .LBB496_489 -.LBB496_488: # %if.then143 + beqz a0, .LBB496_488 +.LBB496_487: # %if.then143 sd zero, 0(a2) -.LBB496_489: # %if.end144 +.LBB496_488: # %if.end144 li a1, -1 - mv a0, t3 + mv a0, s8 call sqlite3CodeVerifySchema lh a0, 0(s1) - bgtz a0, .LBB496_490 - j .LBB496_1170 -.LBB496_490: # %for.body152.lr.ph + bgtz a0, .LBB496_489 + j .LBB496_1165 +.LBB496_489: # %for.body152.lr.ph li s3, 0 li s7, 2 li s1, 72 .Lpcrel_hi1287: auipc a0, %pcrel_hi(.L.str.392) - addi s8, a0, %pcrel_lo(.Lpcrel_hi1287) + addi s11, a0, %pcrel_lo(.Lpcrel_hi1287) .Lpcrel_hi1288: auipc a0, %pcrel_hi(.L.str.396) addi a0, a0, %pcrel_lo(.Lpcrel_hi1288) @@ -114823,10 +114778,11 @@ .Lpcrel_hi1289: auipc a0, %pcrel_hi(.L.str.395) addi a0, a0, %pcrel_lo(.Lpcrel_hi1289) - sd a0, 480(sp) # 8-byte Folded Spill + sd a0, 472(sp) # 8-byte Folded Spill .Lpcrel_hi1290: auipc a0, %pcrel_hi(.L.str.397) - addi s11, a0, %pcrel_lo(.Lpcrel_hi1290) + addi a0, a0, %pcrel_lo(.Lpcrel_hi1290) + sd a0, 480(sp) # 8-byte Folded Spill .Lpcrel_hi1291: auipc a0, %pcrel_hi(.L.str.394) addi a0, a0, %pcrel_lo(.Lpcrel_hi1291) @@ -114837,228 +114793,225 @@ sd a0, 488(sp) # 8-byte Folded Spill lui a0, 1048332 addiw s2, a0, -576 - seqz a0, s4 + seqz a0, s9 sd a0, 448(sp) # 8-byte Folded Spill li a0, 3 slli a0, a0, 35 sd a0, 440(sp) # 8-byte Folded Spill mv s5, s0 - sd s8, 464(sp) # 8-byte Folded Spill - sd s11, 472(sp) # 8-byte Folded Spill - j .LBB496_494 -.LBB496_491: # in Loop: Header=BB496_494 Depth=1 + sd s11, 464(sp) # 8-byte Folded Spill + j .LBB496_493 +.LBB496_490: # in Loop: Header=BB496_493 Depth=1 li s10, 0 -.LBB496_492: # %sqlite3SchemaToIndex.exit - # in Loop: Header=BB496_494 Depth=1 +.LBB496_491: # %sqlite3SchemaToIndex.exit + # in Loop: Header=BB496_493 Depth=1 lbu a0, 101(s6) - beqz a0, .LBB496_499 -.LBB496_493: # %cleanup253 - # in Loop: Header=BB496_494 Depth=1 - ld a0, 280(sp) # 8-byte Folded Reload + beqz a0, .LBB496_498 +.LBB496_492: # %cleanup253 + # in Loop: Header=BB496_493 Depth=1 + ld a0, 216(sp) # 8-byte Folded Reload lh a0, 0(a0) addiw s3, s3, 1 addi s5, s5, 96 - ld s10, 144(sp) # 8-byte Folded Reload - bge s3, a0, .LBB496_539 -.LBB496_494: # %for.body152 + ld a2, 192(sp) # 8-byte Folded Reload + bge s3, a0, .LBB496_538 +.LBB496_493: # %for.body152 # =>This Loop Header: Depth=1 - # Child Loop BB496_513 Depth 2 - # Child Loop BB496_520 Depth 2 - ld a0, 344(sp) # 8-byte Folded Reload - lbu a0, 208(a0) + # Child Loop BB496_512 Depth 2 + # Child Loop BB496_519 Depth 2 + lbu a0, 208(s8) lw s9, 28(s5) - bne a0, s7, .LBB496_510 -# %bb.495: # %if.then159 - # in Loop: Header=BB496_494 Depth=1 + bne a0, s7, .LBB496_509 +# %bb.494: # %if.then159 + # in Loop: Header=BB496_493 Depth=1 lw a0, 0(s5) mul a0, a0, s1 - ld s0, 280(sp) # 8-byte Folded Reload + ld s0, 216(sp) # 8-byte Folded Reload add s0, s0, a0 ld a2, 16(s0) ld s4, 72(sp) # 8-byte Folded Reload mv a0, s4 - mv a1, s8 + mv a1, s11 call sqlite3MPrintf ld a3, 24(s0) mv a5, a0 - beqz a3, .LBB496_497 -# %bb.496: # %if.then166 - # in Loop: Header=BB496_494 Depth=1 + beqz a3, .LBB496_496 +# %bb.495: # %if.then166 + # in Loop: Header=BB496_493 Depth=1 mv a0, s4 ld a1, 488(sp) # 8-byte Folded Reload mv a2, a5 call sqlite3MPrintf mv a5, a0 -.LBB496_497: # %if.end169 - # in Loop: Header=BB496_494 Depth=1 +.LBB496_496: # %if.end169 + # in Loop: Header=BB496_493 Depth=1 ld a0, 16(s5) - ld s0, 272(sp) # 8-byte Folded Reload - beqz a0, .LBB496_502 -# %bb.498: # %if.then173 - # in Loop: Header=BB496_494 Depth=1 + ld s0, 288(sp) # 8-byte Folded Reload + beqz a0, .LBB496_501 +# %bb.497: # %if.then173 + # in Loop: Header=BB496_493 Depth=1 ld a3, 0(a0) mv a0, s4 ld a1, 496(sp) # 8-byte Folded Reload mv a2, a5 call sqlite3MPrintf - j .LBB496_506 -.LBB496_499: # %lor.lhs.false210 - # in Loop: Header=BB496_494 Depth=1 + j .LBB496_505 +.LBB496_498: # %lor.lhs.false210 + # in Loop: Header=BB496_493 Depth=1 ld a0, 48(s6) - bnez a0, .LBB496_493 -# %bb.500: # %if.end213 - # in Loop: Header=BB496_494 Depth=1 + bnez a0, .LBB496_492 +# %bb.499: # %if.end213 + # in Loop: Header=BB496_493 Depth=1 ld a0, 80(s5) - beqz a0, .LBB496_516 -# %bb.501: # %if.then216 - # in Loop: Header=BB496_494 Depth=1 + beqz a0, .LBB496_515 +# %bb.500: # %if.then216 + # in Loop: Header=BB496_493 Depth=1 lw a2, 52(s4) ld a5, 120(s6) li a1, 30 li a6, -10 - ld a0, 240(sp) # 8-byte Folded Reload + ld a0, 256(sp) # 8-byte Folded Reload li a3, 0 li a4, 0 call sqlite3VdbeAddOp4 - j .LBB496_522 -.LBB496_502: # %if.else176 - # in Loop: Header=BB496_494 Depth=1 + j .LBB496_521 +.LBB496_501: # %if.else176 + # in Loop: Header=BB496_493 Depth=1 lbu a0, 5(s5) andi a0, a0, 3 - beqz a0, .LBB496_504 -# %bb.503: # %if.then180 - # in Loop: Header=BB496_494 Depth=1 + beqz a0, .LBB496_503 +# %bb.502: # %if.then180 + # in Loop: Header=BB496_493 Depth=1 mv a0, s4 - ld a1, 480(sp) # 8-byte Folded Reload + ld a1, 472(sp) # 8-byte Folded Reload mv a2, a5 call sqlite3MPrintf - j .LBB496_506 -.LBB496_504: # %if.else182 - # in Loop: Header=BB496_494 Depth=1 + j .LBB496_505 +.LBB496_503: # %if.else182 + # in Loop: Header=BB496_493 Depth=1 ld a0, 80(s5) - beqz a0, .LBB496_507 -# %bb.505: # %if.then185 - # in Loop: Header=BB496_494 Depth=1 + beqz a0, .LBB496_506 +# %bb.504: # %if.then185 + # in Loop: Header=BB496_493 Depth=1 lw a3, 40(a0) ld a4, 48(a0) mv a0, s4 ld a1, 456(sp) # 8-byte Folded Reload mv a2, a5 call sqlite3MPrintf -.LBB496_506: # %if.end191 - # in Loop: Header=BB496_494 Depth=1 +.LBB496_505: # %if.end191 + # in Loop: Header=BB496_493 Depth=1 mv a5, a0 -.LBB496_507: # %if.end191 - # in Loop: Header=BB496_494 Depth=1 +.LBB496_506: # %if.end191 + # in Loop: Header=BB496_493 Depth=1 lbu a0, 6(s5) andi a0, a0, 16 - beqz a0, .LBB496_509 -# %bb.508: # %if.then195 - # in Loop: Header=BB496_494 Depth=1 + beqz a0, .LBB496_508 +# %bb.507: # %if.then195 + # in Loop: Header=BB496_493 Depth=1 mv a0, s4 - mv a1, s11 + ld a1, 480(sp) # 8-byte Folded Reload mv a2, a5 call sqlite3MPrintf mv a5, a0 -.LBB496_509: # %if.end197 - # in Loop: Header=BB496_494 Depth=1 +.LBB496_508: # %if.end197 + # in Loop: Header=BB496_493 Depth=1 lw a3, 0(s5) li a1, 109 li a6, -1 - ld a0, 240(sp) # 8-byte Folded Reload + ld a0, 256(sp) # 8-byte Folded Reload mv a2, s3 li a4, 0 call sqlite3VdbeAddOp4 -.LBB496_510: # %if.end200 - # in Loop: Header=BB496_494 Depth=1 +.LBB496_509: # %if.end200 + # in Loop: Header=BB496_493 Depth=1 lw a0, 0(s5) mul s4, a0, s1 - ld a0, 280(sp) # 8-byte Folded Reload + ld a0, 216(sp) # 8-byte Folded Reload add s4, a0, s4 ld s6, 32(s4) ld a0, 144(s6) mv s10, s2 - beqz a0, .LBB496_492 -# %bb.511: # %for.cond.preheader.i - # in Loop: Header=BB496_494 Depth=1 - ld a1, 344(sp) # 8-byte Folded Reload - ld a2, 0(a1) + beqz a0, .LBB496_491 +# %bb.510: # %for.cond.preheader.i + # in Loop: Header=BB496_493 Depth=1 + ld a2, 0(s8) lw a1, 8(a2) - blez a1, .LBB496_491 -# %bb.512: # %for.body.lr.ph.i640 - # in Loop: Header=BB496_494 Depth=1 + blez a1, .LBB496_490 +# %bb.511: # %for.body.lr.ph.i640 + # in Loop: Header=BB496_493 Depth=1 ld a2, 16(a2) li s10, 0 addi a2, a2, 40 mv a3, a1 -.LBB496_513: # %for.body.i642 - # Parent Loop BB496_494 Depth=1 +.LBB496_512: # %for.body.i642 + # Parent Loop BB496_493 Depth=1 # => This Inner Loop Header: Depth=2 ld a4, 0(a2) - beq a4, a0, .LBB496_492 -# %bb.514: # %for.inc.i644 - # in Loop: Header=BB496_513 Depth=2 + beq a4, a0, .LBB496_491 +# %bb.513: # %for.inc.i644 + # in Loop: Header=BB496_512 Depth=2 addiw s10, s10, 1 addi a3, a3, -1 addi a2, a2, 48 - bnez a3, .LBB496_513 -# %bb.515: # in Loop: Header=BB496_494 Depth=1 + bnez a3, .LBB496_512 +# %bb.514: # in Loop: Header=BB496_493 Depth=1 mv s10, a1 - j .LBB496_492 -.LBB496_516: # %if.else219 - # in Loop: Header=BB496_494 Depth=1 + j .LBB496_491 +.LBB496_515: # %if.else219 + # in Loop: Header=BB496_493 Depth=1 lbu a0, 6(s5) andi a0, a0, 8 - bnez a0, .LBB496_521 -# %bb.517: # %if.then224 - # in Loop: Header=BB496_494 Depth=1 + bnez a0, .LBB496_520 +# %bb.516: # %if.then224 + # in Loop: Header=BB496_493 Depth=1 lw a1, 52(s4) li a4, 12 - ld a0, 344(sp) # 8-byte Folded Reload + mv a0, s8 mv a2, s10 mv a3, s6 call sqlite3OpenTable lw a0, 8(s6) li a1, 63 - bltu a1, a0, .LBB496_522 -# %bb.518: # %if.then229 - # in Loop: Header=BB496_494 Depth=1 + bltu a1, a0, .LBB496_521 +# %bb.517: # %if.then229 + # in Loop: Header=BB496_493 Depth=1 ld a1, 72(s4) - beqz a1, .LBB496_535 -# %bb.519: # %for.inc233.preheader - # in Loop: Header=BB496_494 Depth=1 + beqz a1, .LBB496_534 +# %bb.518: # %for.inc233.preheader + # in Loop: Header=BB496_493 Depth=1 li a0, 0 -.LBB496_520: # %for.inc233 - # Parent Loop BB496_494 Depth=1 +.LBB496_519: # %for.inc233 + # Parent Loop BB496_493 Depth=1 # => This Inner Loop Header: Depth=2 srli a1, a1, 1 addi a0, a0, 1 - bnez a1, .LBB496_520 - j .LBB496_536 -.LBB496_521: # %if.else238 - # in Loop: Header=BB496_494 Depth=1 + bnez a1, .LBB496_519 + j .LBB496_535 +.LBB496_520: # %if.else238 + # in Loop: Header=BB496_493 Depth=1 lw a2, 40(s6) ld a4, 0(s6) - ld a0, 344(sp) # 8-byte Folded Reload + mv a0, s8 mv a1, s10 li a3, 0 call sqlite3TableLock -.LBB496_522: # %if.end241 - # in Loop: Header=BB496_494 Depth=1 +.LBB496_521: # %if.end241 + # in Loop: Header=BB496_493 Depth=1 lw a0, 52(s4) ld s6, 16(s5) sw a0, 24(s5) - beqz s6, .LBB496_534 -# %bb.523: # %if.then246 - # in Loop: Header=BB496_494 Depth=1 - ld a0, 344(sp) # 8-byte Folded Reload + beqz s6, .LBB496_533 +# %bb.522: # %if.then246 + # in Loop: Header=BB496_493 Depth=1 + mv a0, s8 mv a1, s6 call sqlite3IndexKeyinfo lw a3, 40(s6) mv a5, a0 li a1, 12 li a6, -9 - ld s0, 240(sp) # 8-byte Folded Reload + ld s0, 256(sp) # 8-byte Folded Reload mv a0, s0 mv a2, s9 mv a4, s10 @@ -115067,38 +115020,38 @@ lw s11, 28(s0) lw s6, 8(s6) mv a0, s4 - blt s4, s11, .LBB496_533 + blt s4, s11, .LBB496_532 +# %bb.523: # %if.then.i.i653 + # in Loop: Header=BB496_493 Depth=1 + bnez s11, .LBB496_525 # %bb.524: # %if.then.i.i653 - # in Loop: Header=BB496_494 Depth=1 - bnez s11, .LBB496_526 -# %bb.525: # %if.then.i.i653 - # in Loop: Header=BB496_494 Depth=1 + # in Loop: Header=BB496_493 Depth=1 li s8, 42 - ld s7, 240(sp) # 8-byte Folded Reload + ld s7, 256(sp) # 8-byte Folded Reload ld s0, 0(s7) lbu a0, 42(s0) - bnez a0, .LBB496_531 - j .LBB496_527 -.LBB496_526: # in Loop: Header=BB496_494 Depth=1 + bnez a0, .LBB496_530 + j .LBB496_526 +.LBB496_525: # in Loop: Header=BB496_493 Depth=1 slliw s8, s11, 1 - ld s7, 240(sp) # 8-byte Folded Reload + ld s7, 256(sp) # 8-byte Folded Reload ld s0, 0(s7) lbu a0, 42(s0) - bnez a0, .LBB496_531 -.LBB496_527: # %if.then.i.i.i.i661 - # in Loop: Header=BB496_494 Depth=1 + bnez a0, .LBB496_530 +.LBB496_526: # %if.then.i.i.i.i661 + # in Loop: Header=BB496_493 Depth=1 ld a0, 32(s7) li a1, 24 mulw a1, s8, a1 call sqlite3_realloc - beqz a0, .LBB496_530 -# %bb.528: # %if.then.i.i.i664 - # in Loop: Header=BB496_494 Depth=1 + beqz a0, .LBB496_529 +# %bb.527: # %if.then.i.i.i664 + # in Loop: Header=BB496_493 Depth=1 sw s8, 28(s7) sd a0, 32(s7) - bge s11, s8, .LBB496_531 -# %bb.529: # %if.then5.i.i.i - # in Loop: Header=BB496_494 Depth=1 + bge s11, s8, .LBB496_530 +# %bb.528: # %if.then5.i.i.i + # in Loop: Header=BB496_493 Depth=1 li a2, 24 mul a1, s11, a2 add a0, a0, a1 @@ -115106,26 +115059,26 @@ mul a2, a1, a2 li a1, 0 call memset@plt - j .LBB496_531 -.LBB496_530: # %if.then2.i.i.i.i - # in Loop: Header=BB496_494 Depth=1 + j .LBB496_530 +.LBB496_529: # %if.then2.i.i.i.i + # in Loop: Header=BB496_493 Depth=1 li a0, 1 sb a0, 42(s0) -.LBB496_531: # %resizeOpArray.exit.i.i - # in Loop: Header=BB496_494 Depth=1 +.LBB496_530: # %resizeOpArray.exit.i.i + # in Loop: Header=BB496_493 Depth=1 ld a0, 0(s7) lbu a0, 42(a0) - ld s0, 272(sp) # 8-byte Folded Reload + ld s8, 328(sp) # 8-byte Folded Reload + ld s0, 288(sp) # 8-byte Folded Reload li s7, 2 - ld s8, 464(sp) # 8-byte Folded Reload - ld s11, 472(sp) # 8-byte Folded Reload - bnez a0, .LBB496_534 -# %bb.532: # %resizeOpArray.exit.if.end6_crit_edge.i.i - # in Loop: Header=BB496_494 Depth=1 - ld s0, 240(sp) # 8-byte Folded Reload + ld s11, 464(sp) # 8-byte Folded Reload + bnez a0, .LBB496_533 +# %bb.531: # %resizeOpArray.exit.if.end6_crit_edge.i.i + # in Loop: Header=BB496_493 Depth=1 + ld s0, 256(sp) # 8-byte Folded Reload lw a0, 24(s0) -.LBB496_533: # %if.end6.i.i - # in Loop: Header=BB496_494 Depth=1 +.LBB496_532: # %if.end6.i.i + # in Loop: Header=BB496_493 Depth=1 addi a0, a0, 1 ld a1, 32(s0) sw a0, 24(s0) @@ -115140,81 +115093,79 @@ sw zero, 12(a0) sd zero, 16(a0) sb zero, 339(s0) - ld s0, 272(sp) # 8-byte Folded Reload - ld s11, 472(sp) # 8-byte Folded Reload -.LBB496_534: # %if.end252 - # in Loop: Header=BB496_494 Depth=1 - ld a0, 344(sp) # 8-byte Folded Reload + ld s0, 288(sp) # 8-byte Folded Reload + ld s11, 464(sp) # 8-byte Folded Reload +.LBB496_533: # %if.end252 + # in Loop: Header=BB496_493 Depth=1 + mv a0, s8 mv a1, s10 call sqlite3CodeVerifySchema - j .LBB496_493 -.LBB496_535: # in Loop: Header=BB496_494 Depth=1 + j .LBB496_492 +.LBB496_534: # in Loop: Header=BB496_493 Depth=1 li a0, 0 -.LBB496_536: # %for.end235 - # in Loop: Header=BB496_494 Depth=1 - ld a1, 240(sp) # 8-byte Folded Reload +.LBB496_535: # %for.end235 + # in Loop: Header=BB496_493 Depth=1 + ld a1, 256(sp) # 8-byte Folded Reload lw a1, 24(a1) slti a2, a1, 1 ld a3, 448(sp) # 8-byte Folded Reload or a2, a3, a2 - bnez a2, .LBB496_522 -# %bb.537: # %land.lhs.true3.i - # in Loop: Header=BB496_494 Depth=1 - ld a2, 240(sp) # 8-byte Folded Reload + bnez a2, .LBB496_521 +# %bb.536: # %land.lhs.true3.i + # in Loop: Header=BB496_493 Depth=1 + ld a2, 256(sp) # 8-byte Folded Reload ld a2, 32(a2) - beqz a2, .LBB496_522 -# %bb.538: # %if.then.i651 - # in Loop: Header=BB496_494 Depth=1 + beqz a2, .LBB496_521 +# %bb.537: # %if.then.i651 + # in Loop: Header=BB496_493 Depth=1 addi a1, a1, -1 slli a1, a1, 32 ld a3, 440(sp) # 8-byte Folded Reload mulhu a1, a1, a3 add a1, a2, a1 sw a0, 8(a1) - j .LBB496_522 -.LBB496_539: # %for.end262 - ld s9, 240(sp) # 8-byte Folded Reload + j .LBB496_521 +.LBB496_538: # %for.end262 + ld s9, 256(sp) # 8-byte Folded Reload lw a1, 24(s9) - sw a1, 16(s10) - bgtz a0, .LBB496_540 - j .LBB496_1171 -.LBB496_540: # %for.body271.lr.ph + sw a1, 16(a2) + bgtz a0, .LBB496_539 + j .LBB496_1166 +.LBB496_539: # %for.body271.lr.ph li s11, 0 li s6, 1 - li s8, 48 + li s7, 48 lui a0, 16 addiw a0, a0, -1 - sd a0, 440(sp) # 8-byte Folded Spill - li s7, -1 - ld s5, 344(sp) # 8-byte Folded Reload - ld a1, 280(sp) # 8-byte Folded Reload - j .LBB496_542 -.LBB496_541: # %if.end827 - # in Loop: Header=BB496_542 Depth=1 - ld a1, 280(sp) # 8-byte Folded Reload + sd a0, 448(sp) # 8-byte Folded Spill + li s5, -1 + ld a1, 216(sp) # 8-byte Folded Reload + j .LBB496_541 +.LBB496_540: # %if.end827 + # in Loop: Header=BB496_541 Depth=1 + ld a1, 216(sp) # 8-byte Folded Reload lh a0, 0(a1) addiw s11, s11, 1 - ld s0, 272(sp) # 8-byte Folded Reload + ld s0, 288(sp) # 8-byte Folded Reload addi s0, s0, 96 - blt s11, a0, .LBB496_542 - j .LBB496_1172 -.LBB496_542: # %for.body271 + blt s11, a0, .LBB496_541 + j .LBB496_1167 +.LBB496_541: # %for.body271 # =>This Loop Header: Depth=1 - # Child Loop BB496_579 Depth 2 - # Child Loop BB496_580 Depth 3 - # Child Loop BB496_668 Depth 2 - # Child Loop BB496_670 Depth 3 - # Child Loop BB496_613 Depth 2 - # Child Loop BB496_627 Depth 2 - # Child Loop BB496_637 Depth 2 - # Child Loop BB496_849 Depth 2 - # Child Loop BB496_1114 Depth 2 - # Child Loop BB496_799 Depth 2 - # Child Loop BB496_970 Depth 2 - # Child Loop BB496_753 Depth 2 - # Child Loop BB496_760 Depth 2 - # Child Loop BB496_779 Depth 2 - sd s7, 480(sp) # 8-byte Folded Spill + # Child Loop BB496_578 Depth 2 + # Child Loop BB496_579 Depth 3 + # Child Loop BB496_669 Depth 2 + # Child Loop BB496_671 Depth 3 + # Child Loop BB496_612 Depth 2 + # Child Loop BB496_626 Depth 2 + # Child Loop BB496_636 Depth 2 + # Child Loop BB496_745 Depth 2 + # Child Loop BB496_1003 Depth 2 + # Child Loop BB496_834 Depth 2 + # Child Loop BB496_962 Depth 2 + # Child Loop BB496_771 Depth 2 + # Child Loop BB496_778 Depth 2 + # Child Loop BB496_797 Depth 2 lw a0, 0(s0) mv a2, s0 li a3, 72 @@ -115222,36 +115173,35 @@ add s0, a1, s0 lw a0, 52(s0) sd a0, 496(sp) # 8-byte Folded Spill - ld a0, 16(a2) - sd a0, 456(sp) # 8-byte Folded Spill + ld s10, 16(a2) lw a0, 28(a2) sd a0, 464(sp) # 8-byte Folded Spill lw s1, 40(s9) lw a0, 44(s9) - sd a2, 272(sp) # 8-byte Folded Spill + sd a2, 288(sp) # 8-byte Folded Spill lw s2, 4(a2) addi a1, s1, 1 sw a1, 40(s9) - bge s1, a0, .LBB496_544 -# %bb.543: # %entry.if.end_crit_edge.i699 - # in Loop: Header=BB496_542 Depth=1 + bge s1, a0, .LBB496_543 +# %bb.542: # %entry.if.end_crit_edge.i699 + # in Loop: Header=BB496_541 Depth=1 ld s3, 48(s9) - bnez s3, .LBB496_550 - j .LBB496_551 -.LBB496_544: # %if.then.i673 - # in Loop: Header=BB496_542 Depth=1 + bnez s3, .LBB496_549 + j .LBB496_550 +.LBB496_543: # %if.then.i673 + # in Loop: Header=BB496_541 Depth=1 ld s4, 0(s9) slli a0, a0, 1 addi a0, a0, 10 sw a0, 44(s9) lbu a1, 42(s4) ld s7, 48(s9) - beqz a1, .LBB496_548 -# %bb.545: # %if.then.i.i679 - # in Loop: Header=BB496_542 Depth=1 - beqz s7, .LBB496_547 -.LBB496_546: # %if.end.i.i.i681 - # in Loop: Header=BB496_542 Depth=1 + beqz a1, .LBB496_547 +# %bb.544: # %if.then.i.i679 + # in Loop: Header=BB496_541 Depth=1 + beqz s7, .LBB496_546 +.LBB496_545: # %if.end.i.i.i681 + # in Loop: Header=BB496_541 Depth=1 lw a1, -8(s7) ld a3, 96(sp) # 8-byte Folded Reload ld a2, %pcrel_lo(.Lpcrel_hi1269)(a3) @@ -115259,51 +115209,53 @@ sub a2, a2, a1 sd a2, %pcrel_lo(.Lpcrel_hi1269)(a3) call free@plt -.LBB496_547: # %sqlite3DbReallocOrFree.exit.i686 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_546: # %sqlite3DbReallocOrFree.exit.i686 + # in Loop: Header=BB496_541 Depth=1 li s3, 0 - j .LBB496_549 -.LBB496_548: # %if.then.i.i.i694 - # in Loop: Header=BB496_542 Depth=1 + j .LBB496_548 +.LBB496_547: # %if.then.i.i.i694 + # in Loop: Header=BB496_541 Depth=1 slliw a1, a0, 2 mv a0, s7 call sqlite3_realloc mv s3, a0 - beqz a0, .LBB496_569 -.LBB496_549: # %sqlite3DbReallocOrFree.exit.i686 - # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_568 +.LBB496_548: # %sqlite3DbReallocOrFree.exit.i686 + # in Loop: Header=BB496_541 Depth=1 sd s3, 48(s9) - beqz s3, .LBB496_551 -.LBB496_550: # %if.then8.i690 - # in Loop: Header=BB496_542 Depth=1 + li s7, 48 + beqz s3, .LBB496_550 +.LBB496_549: # %if.then8.i690 + # in Loop: Header=BB496_541 Depth=1 slli a0, s1, 2 add a0, s3, a0 li a1, -1 sw a1, 0(a0) -.LBB496_551: # %sqlite3VdbeMakeLabel.exit702 - # in Loop: Header=BB496_542 Depth=1 - not s7, s1 - ld a0, 272(sp) # 8-byte Folded Reload - sw s7, 36(a0) - sw s7, 32(a0) +.LBB496_550: # %sqlite3VdbeMakeLabel.exit702 + # in Loop: Header=BB496_541 Depth=1 + not a1, s1 + ld a0, 288(sp) # 8-byte Folded Reload + sw a1, 36(a0) + sd a1, 472(sp) # 8-byte Folded Spill + sw a1, 32(a0) lw s1, 40(s9) lw a0, 44(s9) addi a1, s1, 1 sw a1, 40(s9) - blt s1, a0, .LBB496_558 -# %bb.552: # %if.then.i707 - # in Loop: Header=BB496_542 Depth=1 + blt s1, a0, .LBB496_557 +# %bb.551: # %if.then.i707 + # in Loop: Header=BB496_541 Depth=1 ld s4, 0(s9) slli a0, a0, 1 addi a0, a0, 10 sw a0, 44(s9) lbu a1, 42(s4) - beqz a1, .LBB496_556 -# %bb.553: # %if.then.i.i713 - # in Loop: Header=BB496_542 Depth=1 - beqz s3, .LBB496_555 -.LBB496_554: # %if.end.i.i.i715 - # in Loop: Header=BB496_542 Depth=1 + beqz a1, .LBB496_555 +# %bb.552: # %if.then.i.i713 + # in Loop: Header=BB496_541 Depth=1 + beqz s3, .LBB496_554 +.LBB496_553: # %if.end.i.i.i715 + # in Loop: Header=BB496_541 Depth=1 lw a1, -8(s3) ld a3, 96(sp) # 8-byte Folded Reload ld a2, %pcrel_lo(.Lpcrel_hi1269)(a3) @@ -115311,82 +115263,83 @@ sub a2, a2, a1 sd a2, %pcrel_lo(.Lpcrel_hi1269)(a3) call free@plt -.LBB496_555: # %sqlite3DbReallocOrFree.exit.i720 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_554: # %sqlite3DbReallocOrFree.exit.i720 + # in Loop: Header=BB496_541 Depth=1 li a0, 0 - j .LBB496_557 -.LBB496_556: # %if.then.i.i.i728 - # in Loop: Header=BB496_542 Depth=1 + j .LBB496_556 +.LBB496_555: # %if.then.i.i.i728 + # in Loop: Header=BB496_541 Depth=1 slliw a1, a0, 2 mv a0, s3 call sqlite3_realloc - beqz a0, .LBB496_570 -.LBB496_557: # %sqlite3DbReallocOrFree.exit.i720 - # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_569 +.LBB496_556: # %sqlite3DbReallocOrFree.exit.i720 + # in Loop: Header=BB496_541 Depth=1 sd a0, 48(s9) mv s3, a0 -.LBB496_558: # %if.end.i722 - # in Loop: Header=BB496_542 Depth=1 - beqz s3, .LBB496_560 -# %bb.559: # %if.then8.i724 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_557: # %if.end.i722 + # in Loop: Header=BB496_541 Depth=1 + beqz s3, .LBB496_559 +# %bb.558: # %if.then8.i724 + # in Loop: Header=BB496_541 Depth=1 slli a0, s1, 2 add a0, s3, a0 li a1, -1 sw a1, 0(a0) -.LBB496_560: # %sqlite3VdbeMakeLabel.exit736 - # in Loop: Header=BB496_542 Depth=1 - ld a1, 272(sp) # 8-byte Folded Reload +.LBB496_559: # %sqlite3VdbeMakeLabel.exit736 + # in Loop: Header=BB496_541 Depth=1 + ld a1, 288(sp) # 8-byte Folded Reload lw a0, 0(a1) - not s3, s1 - sw s3, 40(a1) - sd s3, 488(sp) # 8-byte Folded Spill - blez a0, .LBB496_575 -# %bb.561: # %land.lhs.true300 - # in Loop: Header=BB496_542 Depth=1 + not a2, s1 + sd a2, 488(sp) # 8-byte Folded Spill + sw a2, 40(a1) + sd s5, 480(sp) # 8-byte Folded Spill + blez a0, .LBB496_574 +# %bb.560: # %land.lhs.true300 + # in Loop: Header=BB496_541 Depth=1 lbu a0, 49(s0) andi a0, a0, 8 - beqz a0, .LBB496_575 -# %bb.562: # %if.then307 - # in Loop: Header=BB496_542 Depth=1 - lw s0, 88(s5) + beqz a0, .LBB496_574 +# %bb.561: # %if.then307 + # in Loop: Header=BB496_541 Depth=1 + lw s0, 88(s8) addi s0, s0, 1 - sw s0, 88(s5) - ld a0, 272(sp) # 8-byte Folded Reload + sw s0, 88(s8) + ld a0, 288(sp) # 8-byte Folded Reload sw s0, 12(a0) lw s1, 24(s9) lw s3, 28(s9) mv a0, s1 - blt s1, s3, .LBB496_574 + blt s1, s3, .LBB496_573 +# %bb.562: # %if.then.i.i740 + # in Loop: Header=BB496_541 Depth=1 + bnez s3, .LBB496_564 # %bb.563: # %if.then.i.i740 - # in Loop: Header=BB496_542 Depth=1 - bnez s3, .LBB496_565 -# %bb.564: # %if.then.i.i740 - # in Loop: Header=BB496_542 Depth=1 + # in Loop: Header=BB496_541 Depth=1 li s4, 42 ld s5, 0(s9) lbu a0, 42(s5) - bnez a0, .LBB496_572 - j .LBB496_566 -.LBB496_565: # in Loop: Header=BB496_542 Depth=1 + bnez a0, .LBB496_571 + j .LBB496_565 +.LBB496_564: # in Loop: Header=BB496_541 Depth=1 slliw s4, s3, 1 ld s5, 0(s9) lbu a0, 42(s5) - bnez a0, .LBB496_572 -.LBB496_566: # %if.then.i.i.i.i764 - # in Loop: Header=BB496_542 Depth=1 + bnez a0, .LBB496_571 +.LBB496_565: # %if.then.i.i.i.i764 + # in Loop: Header=BB496_541 Depth=1 ld a0, 32(s9) li a1, 24 mulw a1, s4, a1 call sqlite3_realloc - beqz a0, .LBB496_571 -# %bb.567: # %if.then.i.i.i768 - # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_570 +# %bb.566: # %if.then.i.i.i768 + # in Loop: Header=BB496_541 Depth=1 sw s4, 28(s9) sd a0, 32(s9) - bge s3, s4, .LBB496_572 -# %bb.568: # %if.then5.i.i.i770 - # in Loop: Header=BB496_542 Depth=1 + bge s3, s4, .LBB496_571 +# %bb.567: # %if.then5.i.i.i770 + # in Loop: Header=BB496_541 Depth=1 li a2, 24 mul a1, s3, a2 add a0, a0, a1 @@ -115394,32 +115347,31 @@ mul a2, a1, a2 li a1, 0 call memset@plt - j .LBB496_572 -.LBB496_569: # %if.then2.i.i.i698 - # in Loop: Header=BB496_542 Depth=1 + j .LBB496_571 +.LBB496_568: # %if.then2.i.i.i698 + # in Loop: Header=BB496_541 Depth=1 sb s6, 42(s4) - bnez s7, .LBB496_546 - j .LBB496_547 -.LBB496_570: # %if.then2.i.i.i732 - # in Loop: Header=BB496_542 Depth=1 + bnez s7, .LBB496_545 + j .LBB496_546 +.LBB496_569: # %if.then2.i.i.i732 + # in Loop: Header=BB496_541 Depth=1 sb s6, 42(s4) - bnez s3, .LBB496_554 - j .LBB496_555 -.LBB496_571: # %if.then2.i.i.i.i776 - # in Loop: Header=BB496_542 Depth=1 + bnez s3, .LBB496_553 + j .LBB496_554 +.LBB496_570: # %if.then2.i.i.i.i776 + # in Loop: Header=BB496_541 Depth=1 sb s6, 42(s5) -.LBB496_572: # %resizeOpArray.exit.i.i747 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_571: # %resizeOpArray.exit.i.i747 + # in Loop: Header=BB496_541 Depth=1 ld a0, 0(s9) lbu a0, 42(a0) - ld s5, 344(sp) # 8-byte Folded Reload - ld s3, 488(sp) # 8-byte Folded Reload - bnez a0, .LBB496_575 -# %bb.573: # %resizeOpArray.exit.if.end6_crit_edge.i.i751 - # in Loop: Header=BB496_542 Depth=1 + ld s5, 480(sp) # 8-byte Folded Reload + bnez a0, .LBB496_574 +# %bb.572: # %resizeOpArray.exit.if.end6_crit_edge.i.i751 + # in Loop: Header=BB496_541 Depth=1 lw a0, 24(s9) -.LBB496_574: # %if.end6.i.i753 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_573: # %if.end6.i.i753 + # in Loop: Header=BB496_541 Depth=1 ld a1, 32(s9) addi a0, a0, 1 sw a0, 24(s9) @@ -115433,110 +115385,108 @@ sw zero, 12(a0) sd zero, 16(a0) sb zero, 339(s9) - ld s3, 488(sp) # 8-byte Folded Reload -.LBB496_575: # %if.end311 - # in Loop: Header=BB496_542 Depth=1 - ld s0, 272(sp) # 8-byte Folded Reload +.LBB496_574: # %if.end311 + # in Loop: Header=BB496_541 Depth=1 + ld s0, 288(sp) # 8-byte Folded Reload ld s4, 80(s0) - beqz s4, .LBB496_598 -# %bb.576: # %if.then314 - # in Loop: Header=BB496_542 Depth=1 - sd s7, 472(sp) # 8-byte Folded Spill + beqz s4, .LBB496_597 +# %bb.575: # %if.then314 + # in Loop: Header=BB496_541 Depth=1 lw s0, 0(s4) ld s1, 32(s4) - lw a0, 72(s5) + lw a0, 72(s8) ld s2, 8(s4) addiw s7, s0, 2 - bge a0, s7, .LBB496_605 -# %bb.577: # %if.else.i784 - # in Loop: Header=BB496_542 Depth=1 - lw a0, 88(s5) - addiw a4, a0, 1 + bge a0, s7, .LBB496_604 +# %bb.576: # %if.else.i784 + # in Loop: Header=BB496_541 Depth=1 + lw a0, 88(s8) + addiw a2, a0, 1 add a0, a0, s7 - sw a0, 88(s5) - addi a5, a4, 1 - sd a5, 464(sp) # 8-byte Folded Spill - blez s0, .LBB496_606 -.LBB496_578: # %for.cond326.preheader.lr.ph - # in Loop: Header=BB496_542 Depth=1 + sw a0, 88(s8) + sd a2, 464(sp) # 8-byte Folded Spill + addi a4, a2, 1 + blez s0, .LBB496_605 +.LBB496_577: # %for.cond326.preheader.lr.ph + # in Loop: Header=BB496_541 Depth=1 addi a0, s0, 1 - sd a0, 448(sp) # 8-byte Folded Spill + sd a0, 456(sp) # 8-byte Folded Spill addi s6, s2, 8 li a0, 1 -.LBB496_579: # %for.body329.preheader - # Parent Loop BB496_542 Depth=1 +.LBB496_578: # %for.body329.preheader + # Parent Loop BB496_541 Depth=1 # => This Loop Header: Depth=2 - # Child Loop BB496_580 Depth 3 + # Child Loop BB496_579 Depth 3 mv s10, a0 mv a0, s0 mv a2, s1 mv a1, s6 mv s5, s0 -.LBB496_580: # %for.body329 - # Parent Loop BB496_542 Depth=1 - # Parent Loop BB496_579 Depth=2 +.LBB496_579: # %for.body329 + # Parent Loop BB496_541 Depth=1 + # Parent Loop BB496_578 Depth=2 # => This Inner Loop Header: Depth=3 lw a3, 0(a2) - beq a3, s10, .LBB496_582 -# %bb.581: # %for.inc345 - # in Loop: Header=BB496_580 Depth=3 + beq a3, s10, .LBB496_581 +# %bb.580: # %for.inc345 + # in Loop: Header=BB496_579 Depth=3 addiw s5, s5, -1 addi a1, a1, 12 addi a0, a0, -1 addi a2, a2, 8 - bnez a0, .LBB496_580 - j .LBB496_607 -.LBB496_582: # %if.then334 - # in Loop: Header=BB496_579 Depth=2 - sd s11, 456(sp) # 8-byte Folded Spill + bnez a0, .LBB496_579 + j .LBB496_606 +.LBB496_581: # %if.then334 + # in Loop: Header=BB496_578 Depth=2 + mv s3, s11 lw a0, 0(a1) ld a1, 528(sp) - mul a0, a0, s8 + li a2, 48 + mul a0, a0, a2 add a0, a1, a0 ld a0, 0(a0) ld a1, 24(a0) - addw s9, a5, s10 - ld a0, 344(sp) # 8-byte Folded Reload - mv a2, s9 mv s11, a4 + addw s9, a4, s10 + mv a0, s8 + mv a2, s9 call sqlite3ExprCodeTarget - mv a4, s11 - beq a0, s9, .LBB496_592 -# %bb.583: # %land.lhs.true.i787 - # in Loop: Header=BB496_579 Depth=2 - ld a1, 344(sp) # 8-byte Folded Reload + beq a0, s9, .LBB496_591 +# %bb.582: # %land.lhs.true.i787 + # in Loop: Header=BB496_578 Depth=2 + ld a1, 328(sp) # 8-byte Folded Reload ld s8, 24(a1) - beqz s8, .LBB496_592 -# %bb.584: # %if.then.i789 - # in Loop: Header=BB496_579 Depth=2 + beqz s8, .LBB496_591 +# %bb.583: # %if.then.i789 + # in Loop: Header=BB496_578 Depth=2 lw a3, 24(s8) lw a2, 28(s8) mv a1, a3 - blt a3, a2, .LBB496_591 + blt a3, a2, .LBB496_590 +# %bb.584: # %if.then.i.i2436 + # in Loop: Header=BB496_578 Depth=2 + bnez a2, .LBB496_586 # %bb.585: # %if.then.i.i2436 - # in Loop: Header=BB496_579 Depth=2 - bnez a2, .LBB496_587 -# %bb.586: # %if.then.i.i2436 - # in Loop: Header=BB496_579 Depth=2 - li a5, 42 - j .LBB496_588 -.LBB496_587: # in Loop: Header=BB496_579 Depth=2 - slliw a5, a2, 1 -.LBB496_588: # %if.then.i.i2436 - # in Loop: Header=BB496_579 Depth=2 - ld a6, 0(s8) - lbu a1, 42(a6) - beqz a1, .LBB496_594 -.LBB496_589: # %resizeOpArray.exit.i.i2443 - # in Loop: Header=BB496_579 Depth=2 + # in Loop: Header=BB496_578 Depth=2 + li a4, 42 + j .LBB496_587 +.LBB496_586: # in Loop: Header=BB496_578 Depth=2 + slliw a4, a2, 1 +.LBB496_587: # %if.then.i.i2436 + # in Loop: Header=BB496_578 Depth=2 + ld a5, 0(s8) + lbu a1, 42(a5) + beqz a1, .LBB496_593 +.LBB496_588: # %resizeOpArray.exit.i.i2443 + # in Loop: Header=BB496_578 Depth=2 ld a1, 0(s8) lbu a1, 42(a1) - bnez a1, .LBB496_592 -# %bb.590: # %resizeOpArray.exit.if.end6_crit_edge.i.i2447 - # in Loop: Header=BB496_579 Depth=2 + bnez a1, .LBB496_591 +# %bb.589: # %resizeOpArray.exit.if.end6_crit_edge.i.i2447 + # in Loop: Header=BB496_578 Depth=2 lw a1, 24(s8) -.LBB496_591: # %if.end6.i.i2449 - # in Loop: Header=BB496_579 Depth=2 +.LBB496_590: # %if.end6.i.i2449 + # in Loop: Header=BB496_578 Depth=2 ld a2, 32(s8) addi a1, a1, 1 sw a1, 24(s8) @@ -115550,211 +115500,206 @@ sw zero, 12(a1) sd zero, 16(a1) sb zero, 339(s8) -.LBB496_592: # %for.end347 - # in Loop: Header=BB496_579 Depth=2 - beqz s5, .LBB496_782 -# %bb.593: # %for.inc355 - # in Loop: Header=BB496_579 Depth=2 +.LBB496_591: # %for.end347 + # in Loop: Header=BB496_578 Depth=2 + beqz s5, .LBB496_800 +# %bb.592: # %for.inc355 + # in Loop: Header=BB496_578 Depth=2 addiw a0, s10, 1 - ld s9, 240(sp) # 8-byte Folded Reload - li s8, 48 - ld s11, 456(sp) # 8-byte Folded Reload - ld a5, 464(sp) # 8-byte Folded Reload - bne s10, s0, .LBB496_579 - j .LBB496_783 -.LBB496_594: # %if.then.i.i.i.i2460 - # in Loop: Header=BB496_579 Depth=2 - sd a6, 400(sp) # 8-byte Folded Spill - sd a2, 416(sp) # 8-byte Folded Spill - sd a3, 424(sp) # 8-byte Folded Spill - sd a0, 432(sp) # 8-byte Folded Spill + ld s8, 328(sp) # 8-byte Folded Reload + ld s9, 256(sp) # 8-byte Folded Reload + mv a4, s11 + mv s11, s3 + bne s10, s0, .LBB496_578 + j .LBB496_801 +.LBB496_593: # %if.then.i.i.i.i2460 + # in Loop: Header=BB496_578 Depth=2 + sd a5, 408(sp) # 8-byte Folded Spill + sd a2, 424(sp) # 8-byte Folded Spill + sd a3, 432(sp) # 8-byte Folded Spill + sd a0, 440(sp) # 8-byte Folded Spill ld a0, 32(s8) li a1, 24 - mulw a1, a5, a1 - sd a5, 408(sp) # 8-byte Folded Spill + mulw a1, a4, a1 + sd a4, 416(sp) # 8-byte Folded Spill call sqlite3_realloc - beqz a0, .LBB496_597 -# %bb.595: # %if.then.i.i.i2464 - # in Loop: Header=BB496_579 Depth=2 + beqz a0, .LBB496_596 +# %bb.594: # %if.then.i.i.i2464 + # in Loop: Header=BB496_578 Depth=2 mv a1, a0 - ld a6, 408(sp) # 8-byte Folded Reload - sw a6, 28(s8) - sd a0, 32(s8) - ld a0, 432(sp) # 8-byte Folded Reload - mv a4, s11 - ld a3, 424(sp) # 8-byte Folded Reload ld a5, 416(sp) # 8-byte Folded Reload - bge a5, a6, .LBB496_589 -# %bb.596: # %if.then5.i.i.i2466 - # in Loop: Header=BB496_579 Depth=2 + sw a5, 28(s8) + sd a0, 32(s8) + ld a0, 440(sp) # 8-byte Folded Reload + ld a3, 432(sp) # 8-byte Folded Reload + ld a4, 424(sp) # 8-byte Folded Reload + bge a4, a5, .LBB496_588 +# %bb.595: # %if.then5.i.i.i2466 + # in Loop: Header=BB496_578 Depth=2 li a2, 24 - mul a0, a5, a2 + mul a0, a4, a2 add a0, a1, a0 - subw a1, a6, a5 + subw a1, a5, a4 mul a2, a1, a2 li a1, 0 call memset@plt - ld a3, 424(sp) # 8-byte Folded Reload - mv a4, s11 - ld a0, 432(sp) # 8-byte Folded Reload - j .LBB496_589 -.LBB496_597: # %if.then2.i.i.i.i2472 - # in Loop: Header=BB496_579 Depth=2 + ld a3, 432(sp) # 8-byte Folded Reload + ld a0, 440(sp) # 8-byte Folded Reload + j .LBB496_588 +.LBB496_596: # %if.then2.i.i.i.i2472 + # in Loop: Header=BB496_578 Depth=2 li a0, 1 - ld a1, 400(sp) # 8-byte Folded Reload + ld a1, 408(sp) # 8-byte Folded Reload sb a0, 42(a1) - ld a0, 432(sp) # 8-byte Folded Reload - mv a4, s11 - ld a3, 424(sp) # 8-byte Folded Reload - j .LBB496_589 -.LBB496_598: # %if.else390 - # in Loop: Header=BB496_542 Depth=1 + ld a0, 440(sp) # 8-byte Folded Reload + ld a3, 432(sp) # 8-byte Folded Reload + j .LBB496_588 +.LBB496_597: # %if.else390 + # in Loop: Header=BB496_541 Depth=1 lwu a0, 4(s0) andi a1, a0, 256 - bnez a1, .LBB496_610 -# %bb.599: # %if.else401 - # in Loop: Header=BB496_542 Depth=1 - sd s7, 472(sp) # 8-byte Folded Spill + bnez a1, .LBB496_609 +# %bb.598: # %if.else401 + # in Loop: Header=BB496_541 Depth=1 andi a1, a0, 512 lui a2, 512 - and a5, s2, a2 - ld a4, 440(sp) # 8-byte Folded Reload - ld s7, 480(sp) # 8-byte Folded Reload - ld s1, 496(sp) # 8-byte Folded Reload - sd a5, 448(sp) # 8-byte Folded Spill - bnez a1, .LBB496_624 -# %bb.600: # %if.else475 - # in Loop: Header=BB496_542 Depth=1 + and s1, s2, a2 + ld a4, 448(sp) # 8-byte Folded Reload + ld s3, 496(sp) # 8-byte Folded Reload + sd s1, 456(sp) # 8-byte Folded Spill + bnez a1, .LBB496_623 +# %bb.599: # %if.else475 + # in Loop: Header=BB496_541 Depth=1 slli a1, a0, 50 lui a2, 128 - and s4, s2, a2 - bltz a1, .LBB496_641 -# %bb.601: # %if.else669 - # in Loop: Header=BB496_542 Depth=1 + and a2, s2, a2 + sd a2, 432(sp) # 8-byte Folded Spill + bltz a1, .LBB496_640 +# %bb.600: # %if.else669 + # in Loop: Header=BB496_541 Depth=1 slli a0, a0, 51 - ld s2, 456(sp) # 8-byte Folded Reload - bltz a0, .LBB496_686 -# %bb.602: # %if.else743 - # in Loop: Header=BB496_542 Depth=1 + ld s2, 488(sp) # 8-byte Folded Reload + bltz a0, .LBB496_687 +# %bb.601: # %if.else743 + # in Loop: Header=BB496_541 Depth=1 li a0, 102 sw a0, 48(s0) - sw s1, 52(s0) + sw s3, 52(s0) lw s0, 24(s9) - mv a2, s1 lw s1, 28(s9) mv a0, s0 - bge s0, s1, .LBB496_603 - j .LBB496_824 + bge s0, s1, .LBB496_602 + j .LBB496_869 +.LBB496_602: # %if.then.i.i2219 + # in Loop: Header=BB496_541 Depth=1 + beqz s1, .LBB496_603 + j .LBB496_848 .LBB496_603: # %if.then.i.i2219 - # in Loop: Header=BB496_542 Depth=1 - bnez s1, .LBB496_808 -# %bb.604: # %if.then.i.i2219 - # in Loop: Header=BB496_542 Depth=1 + # in Loop: Header=BB496_541 Depth=1 li s2, 42 - j .LBB496_809 -.LBB496_605: # %if.then.i779 - # in Loop: Header=BB496_542 Depth=1 - lw a4, 76(s5) - add a1, a4, s7 - sw a1, 76(s5) + j .LBB496_849 +.LBB496_604: # %if.then.i779 + # in Loop: Header=BB496_541 Depth=1 + lw a2, 76(s8) + add a1, a2, s7 + sw a1, 76(s8) subw a0, a0, s7 - sw a0, 72(s5) - addi a5, a4, 1 - sd a5, 464(sp) # 8-byte Folded Spill - bgtz s0, .LBB496_578 -.LBB496_606: # in Loop: Header=BB496_542 Depth=1 + sw a0, 72(s8) + sd a2, 464(sp) # 8-byte Folded Spill + addi a4, a2, 1 + bgtz s0, .LBB496_577 +.LBB496_605: # in Loop: Header=BB496_541 Depth=1 li s10, 1 -.LBB496_607: # %for.end357 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_606: # %for.end357 + # in Loop: Header=BB496_541 Depth=1 lw s6, 24(s9) lw s8, 28(s9) lw s5, 40(s4) mv s0, s6 + ld s3, 496(sp) # 8-byte Folded Reload blt s6, s8, .LBB496_650 -# %bb.608: # %if.then.i.i794 - # in Loop: Header=BB496_542 Depth=1 +# %bb.607: # %if.then.i.i794 + # in Loop: Header=BB496_541 Depth=1 mv s3, s11 - bnez s8, .LBB496_620 -# %bb.609: # %if.then.i.i794 - # in Loop: Header=BB496_542 Depth=1 + bnez s8, .LBB496_619 +# %bb.608: # %if.then.i.i794 + # in Loop: Header=BB496_541 Depth=1 li s0, 42 ld s11, 0(s9) lbu a0, 42(s11) bnez a0, .LBB496_648 - j .LBB496_621 -.LBB496_610: # %if.then394 - # in Loop: Header=BB496_542 Depth=1 + j .LBB496_620 +.LBB496_609: # %if.then394 + # in Loop: Header=BB496_541 Depth=1 lw a0, 520(sp) - ld a3, 440(sp) # 8-byte Folded Reload - ld s7, 480(sp) # 8-byte Folded Reload + ld a3, 448(sp) # 8-byte Folded Reload ld a4, 496(sp) # 8-byte Folded Reload - beqz a0, .LBB496_617 -# %bb.611: # %for.body.lr.ph.i890 - # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_616 +# %bb.610: # %for.body.lr.ph.i890 + # in Loop: Header=BB496_541 Depth=1 ld a1, 528(sp) - j .LBB496_613 -.LBB496_612: # %for.inc51.us.i - # in Loop: Header=BB496_613 Depth=2 + j .LBB496_612 +.LBB496_611: # %for.inc51.us.i + # in Loop: Header=BB496_612 Depth=2 addiw a0, a0, -1 addi a1, a1, 48 - beqz a0, .LBB496_617 -.LBB496_613: # %for.body.us.i - # Parent Loop BB496_542 Depth=1 + beqz a0, .LBB496_616 +.LBB496_612: # %for.body.us.i + # Parent Loop BB496_541 Depth=1 # => This Inner Loop Header: Depth=2 lh a2, 10(a1) - bne a4, a2, .LBB496_612 -# %bb.614: # %land.lhs.true.us.i - # in Loop: Header=BB496_613 Depth=2 + bne a4, a2, .LBB496_611 +# %bb.613: # %land.lhs.true.us.i + # in Loop: Header=BB496_612 Depth=2 ld a2, 32(a1) - and a2, a2, s7 - bnez a2, .LBB496_612 -# %bb.615: # %land.lhs.true4.us.i - # in Loop: Header=BB496_613 Depth=2 + and a2, a2, s5 + bnez a2, .LBB496_611 +# %bb.614: # %land.lhs.true4.us.i + # in Loop: Header=BB496_612 Depth=2 lhu a2, 12(a1) - bne a2, a3, .LBB496_612 -# %bb.616: # %land.lhs.true8.us.i - # in Loop: Header=BB496_613 Depth=2 + bne a2, a3, .LBB496_611 +# %bb.615: # %land.lhs.true8.us.i + # in Loop: Header=BB496_612 Depth=2 lbu a2, 14(a1) andi a2, a2, 3 - beqz a2, .LBB496_612 - j .LBB496_618 -.LBB496_617: # in Loop: Header=BB496_542 Depth=1 - li a1, 0 -.LBB496_618: # %findTerm.exit - # in Loop: Header=BB496_542 Depth=1 - lbu a0, 37(s5) - beqz a0, .LBB496_631 -# %bb.619: # %if.then.i895 - # in Loop: Header=BB496_542 Depth=1 + beqz a2, .LBB496_611 + j .LBB496_617 +.LBB496_616: # in Loop: Header=BB496_541 Depth=1 + li a1, 0 +.LBB496_617: # %findTerm.exit + # in Loop: Header=BB496_541 Depth=1 + lbu a0, 37(s8) + beqz a0, .LBB496_630 +# %bb.618: # %if.then.i895 + # in Loop: Header=BB496_541 Depth=1 addi a0, a0, -1 andi a2, a0, 255 slli a2, a2, 2 - add a2, s5, a2 + add a2, s8, a2 lw s3, 40(a2) - sb a0, 37(s5) - j .LBB496_632 -.LBB496_620: # in Loop: Header=BB496_542 Depth=1 + sb a0, 37(s8) + j .LBB496_631 +.LBB496_619: # in Loop: Header=BB496_541 Depth=1 slliw s0, s8, 1 ld s11, 0(s9) lbu a0, 42(s11) bnez a0, .LBB496_648 -.LBB496_621: # %if.then.i.i.i.i818 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_620: # %if.then.i.i.i.i818 + # in Loop: Header=BB496_541 Depth=1 sd a4, 456(sp) # 8-byte Folded Spill ld a0, 32(s9) li a1, 24 mulw a1, s0, a1 call sqlite3_realloc - beqz a0, .LBB496_647 -# %bb.622: # %if.then.i.i.i822 - # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_646 +# %bb.621: # %if.then.i.i.i822 + # in Loop: Header=BB496_541 Depth=1 sw s0, 28(s9) sd a0, 32(s9) ld a4, 456(sp) # 8-byte Folded Reload - ld a5, 464(sp) # 8-byte Folded Reload bge s8, s0, .LBB496_648 -# %bb.623: # %if.then5.i.i.i824 - # in Loop: Header=BB496_542 Depth=1 +# %bb.622: # %if.then5.i.i.i824 + # in Loop: Header=BB496_541 Depth=1 li a2, 24 mul a1, s8, a2 add a0, a0, a1 @@ -115762,52 +115707,50 @@ mul a2, a1, a2 li a1, 0 call memset@plt - ld a5, 464(sp) # 8-byte Folded Reload - ld a4, 456(sp) # 8-byte Folded Reload - j .LBB496_648 -.LBB496_624: # %if.then405 - # in Loop: Header=BB496_542 Depth=1 + j .LBB496_647 +.LBB496_623: # %if.then405 + # in Loop: Header=BB496_541 Depth=1 lw a1, 520(sp) - beqz a1, .LBB496_676 -# %bb.625: # %for.body.lr.ph.i984 - # in Loop: Header=BB496_542 Depth=1 + beqz a1, .LBB496_677 +# %bb.624: # %for.body.lr.ph.i984 + # in Loop: Header=BB496_541 Depth=1 ld s2, 528(sp) mv a0, s2 mv a2, a1 - j .LBB496_627 -.LBB496_626: # %for.inc51.us.i993 - # in Loop: Header=BB496_627 Depth=2 + j .LBB496_626 +.LBB496_625: # %for.inc51.us.i993 + # in Loop: Header=BB496_626 Depth=2 addiw a2, a2, -1 addi a0, a0, 48 - beqz a2, .LBB496_635 -.LBB496_627: # %for.body.us.i987 - # Parent Loop BB496_542 Depth=1 + beqz a2, .LBB496_634 +.LBB496_626: # %for.body.us.i987 + # Parent Loop BB496_541 Depth=1 # => This Inner Loop Header: Depth=2 lh a3, 10(a0) - bne s1, a3, .LBB496_626 -# %bb.628: # %land.lhs.true.us.i998 - # in Loop: Header=BB496_627 Depth=2 + bne s3, a3, .LBB496_625 +# %bb.627: # %land.lhs.true.us.i998 + # in Loop: Header=BB496_626 Depth=2 ld a3, 32(a0) - and a3, a3, s7 - bnez a3, .LBB496_626 -# %bb.629: # %land.lhs.true4.us.i1002 - # in Loop: Header=BB496_627 Depth=2 + and a3, a3, s5 + bnez a3, .LBB496_625 +# %bb.628: # %land.lhs.true4.us.i1002 + # in Loop: Header=BB496_626 Depth=2 lhu a3, 12(a0) - bne a3, a4, .LBB496_626 -# %bb.630: # %land.lhs.true8.us.i1006 - # in Loop: Header=BB496_627 Depth=2 + bne a3, a4, .LBB496_625 +# %bb.629: # %land.lhs.true8.us.i1006 + # in Loop: Header=BB496_626 Depth=2 lbu a3, 14(a0) andi a3, a3, 36 - beqz a3, .LBB496_626 - j .LBB496_637 -.LBB496_631: # %if.else.i900 - # in Loop: Header=BB496_542 Depth=1 - lw s3, 88(s5) + beqz a3, .LBB496_625 + j .LBB496_636 +.LBB496_630: # %if.else.i900 + # in Loop: Header=BB496_541 Depth=1 + lw s3, 88(s8) addiw s3, s3, 1 - sw s3, 88(s5) -.LBB496_632: # %sqlite3GetTempReg.exit - # in Loop: Header=BB496_542 Depth=1 - mv a0, s5 + sw s3, 88(s8) +.LBB496_631: # %sqlite3GetTempReg.exit + # in Loop: Header=BB496_541 Depth=1 + mv a0, s8 mv a2, s0 mv a3, s3 call codeEqualityTerm @@ -115815,90 +115758,90 @@ lw s4, 28(s9) lw s0, 36(s0) mv s1, s2 - blt s2, s4, .LBB496_735 + blt s2, s4, .LBB496_753 +# %bb.632: # %if.then.i905 + # in Loop: Header=BB496_541 Depth=1 + bnez s4, .LBB496_642 # %bb.633: # %if.then.i905 - # in Loop: Header=BB496_542 Depth=1 - bnez s4, .LBB496_643 -# %bb.634: # %if.then.i905 - # in Loop: Header=BB496_542 Depth=1 + # in Loop: Header=BB496_541 Depth=1 li s1, 42 ld s5, 0(s9) lbu a0, 42(s5) - bnez a0, .LBB496_733 - j .LBB496_644 -.LBB496_635: # in Loop: Header=BB496_542 Depth=1 + bnez a0, .LBB496_751 + j .LBB496_643 +.LBB496_634: # in Loop: Header=BB496_541 Depth=1 li a0, 0 - j .LBB496_637 -.LBB496_636: # %for.inc51.us.i1022 - # in Loop: Header=BB496_637 Depth=2 + j .LBB496_636 +.LBB496_635: # %for.inc51.us.i1022 + # in Loop: Header=BB496_636 Depth=2 addiw a1, a1, -1 addi s2, s2, 48 - beqz a1, .LBB496_677 -.LBB496_637: # %for.body.us.i1016 - # Parent Loop BB496_542 Depth=1 + beqz a1, .LBB496_678 +.LBB496_636: # %for.body.us.i1016 + # Parent Loop BB496_541 Depth=1 # => This Inner Loop Header: Depth=2 lh a2, 10(s2) - bne s1, a2, .LBB496_636 -# %bb.638: # %land.lhs.true.us.i1027 - # in Loop: Header=BB496_637 Depth=2 + bne s3, a2, .LBB496_635 +# %bb.637: # %land.lhs.true.us.i1027 + # in Loop: Header=BB496_636 Depth=2 ld a2, 32(s2) - and a2, a2, s7 - bnez a2, .LBB496_636 -# %bb.639: # %land.lhs.true4.us.i1031 - # in Loop: Header=BB496_637 Depth=2 + and a2, a2, s5 + bnez a2, .LBB496_635 +# %bb.638: # %land.lhs.true4.us.i1031 + # in Loop: Header=BB496_636 Depth=2 lhu a2, 12(s2) - bne a2, a4, .LBB496_636 -# %bb.640: # %land.lhs.true8.us.i1035 - # in Loop: Header=BB496_637 Depth=2 + bne a2, a4, .LBB496_635 +# %bb.639: # %land.lhs.true8.us.i1035 + # in Loop: Header=BB496_636 Depth=2 lbu a2, 14(s2) andi a2, a2, 24 - beqz a2, .LBB496_636 - j .LBB496_678 -.LBB496_641: # %if.then479 - # in Loop: Header=BB496_542 Depth=1 - sd s4, 392(sp) # 8-byte Folded Spill + beqz a2, .LBB496_635 + j .LBB496_679 +.LBB496_640: # %if.then479 + # in Loop: Header=BB496_541 Depth=1 lw s4, 60(s0) slli a1, a0, 47 - srli s6, a1, 63 + mv s2, s10 + srli s10, a1, 63 slli a0, a0, 46 mv a1, s0 srli s0, a0, 63 addi a2, sp, 504 li a4, 2 - mv a0, s5 - mv a3, s7 + mv a0, s8 + mv a3, s5 call codeAllEqualityTerms - ld a5, 456(sp) # 8-byte Folded Reload - ld a1, 72(a5) + sd s2, 440(sp) # 8-byte Folded Spill + ld a1, 72(s2) add a1, a1, s4 lbu a1, 0(a1) - sd a0, 432(sp) # 8-byte Folded Spill - li a3, 24 - beqz a1, .LBB496_692 -# %bb.642: # %if.then479 - # in Loop: Header=BB496_542 Depth=1 + mv s6, a0 + li a5, 24 + beqz a1, .LBB496_693 +# %bb.641: # %if.then479 + # in Loop: Header=BB496_541 Depth=1 li a4, 36 mv a2, s0 - j .LBB496_693 -.LBB496_643: # in Loop: Header=BB496_542 Depth=1 + j .LBB496_694 +.LBB496_642: # in Loop: Header=BB496_541 Depth=1 slliw s1, s4, 1 ld s5, 0(s9) lbu a0, 42(s5) - bnez a0, .LBB496_733 -.LBB496_644: # %if.then.i.i.i921 - # in Loop: Header=BB496_542 Depth=1 + bnez a0, .LBB496_751 +.LBB496_643: # %if.then.i.i.i921 + # in Loop: Header=BB496_541 Depth=1 ld a0, 32(s9) li a1, 24 mulw a1, s1, a1 call sqlite3_realloc - beqz a0, .LBB496_732 -# %bb.645: # %if.then.i.i925 - # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_750 +# %bb.644: # %if.then.i.i925 + # in Loop: Header=BB496_541 Depth=1 sw s1, 28(s9) sd a0, 32(s9) - bge s4, s1, .LBB496_733 -# %bb.646: # %if.then5.i.i - # in Loop: Header=BB496_542 Depth=1 + bge s4, s1, .LBB496_751 +# %bb.645: # %if.then5.i.i + # in Loop: Header=BB496_541 Depth=1 li a2, 24 mul a1, s4, a2 add a0, a0, a1 @@ -115906,30 +115849,31 @@ mul a2, a1, a2 li a1, 0 call memset@plt - j .LBB496_733 -.LBB496_647: # %if.then2.i.i.i.i830 - # in Loop: Header=BB496_542 Depth=1 + j .LBB496_751 +.LBB496_646: # %if.then2.i.i.i.i830 + # in Loop: Header=BB496_541 Depth=1 li a0, 1 sb a0, 42(s11) +.LBB496_647: # %resizeOpArray.exit.i.i801 + # in Loop: Header=BB496_541 Depth=1 ld a4, 456(sp) # 8-byte Folded Reload - ld a5, 464(sp) # 8-byte Folded Reload .LBB496_648: # %resizeOpArray.exit.i.i801 - # in Loop: Header=BB496_542 Depth=1 + # in Loop: Header=BB496_541 Depth=1 ld a0, 0(s9) lbu a0, 42(a0) lw s0, 24(s9) mv s11, s3 - ld s3, 488(sp) # 8-byte Folded Reload + ld s3, 496(sp) # 8-byte Folded Reload beqz a0, .LBB496_650 # %bb.649: # %sqlite3VdbeAddOp2.exit831 - # in Loop: Header=BB496_542 Depth=1 + # in Loop: Header=BB496_541 Depth=1 lw s5, 28(s9) mv a0, s0 - li s8, 48 + ld s8, 328(sp) # 8-byte Folded Reload bge s0, s5, .LBB496_651 - j .LBB496_660 + j .LBB496_661 .LBB496_650: # %if.end6.i.i807 - # in Loop: Header=BB496_542 Depth=1 + # in Loop: Header=BB496_541 Depth=1 ld a0, 32(s9) addi s0, s0, 1 sw s0, 24(s9) @@ -115939,32 +115883,33 @@ li a1, 46 sh a1, 0(a0) sw s5, 4(a0) - sw a4, 8(a0) + ld a1, 464(sp) # 8-byte Folded Reload + sw a1, 8(a0) sw zero, 12(a0) sd zero, 16(a0) lw s0, 24(s9) sb zero, 339(s9) lw s5, 28(s9) mv a0, s0 - li s8, 48 - blt s0, s5, .LBB496_660 + ld s8, 328(sp) # 8-byte Folded Reload + blt s0, s5, .LBB496_661 .LBB496_651: # %if.then.i.i835 - # in Loop: Header=BB496_542 Depth=1 + # in Loop: Header=BB496_541 Depth=1 bnez s5, .LBB496_653 # %bb.652: # %if.then.i.i835 - # in Loop: Header=BB496_542 Depth=1 + # in Loop: Header=BB496_541 Depth=1 li s6, 42 ld s8, 0(s9) lbu a0, 42(s8) - bnez a0, .LBB496_658 + bnez a0, .LBB496_659 j .LBB496_654 -.LBB496_653: # in Loop: Header=BB496_542 Depth=1 +.LBB496_653: # in Loop: Header=BB496_541 Depth=1 slliw s6, s5, 1 ld s8, 0(s9) lbu a0, 42(s8) - bnez a0, .LBB496_658 + bnez a0, .LBB496_659 .LBB496_654: # %if.then.i.i.i.i859 - # in Loop: Header=BB496_542 Depth=1 + # in Loop: Header=BB496_541 Depth=1 sd a4, 456(sp) # 8-byte Folded Spill ld a0, 32(s9) li a1, 24 @@ -115972,14 +115917,13 @@ call sqlite3_realloc beqz a0, .LBB496_657 # %bb.655: # %if.then.i.i.i863 - # in Loop: Header=BB496_542 Depth=1 + # in Loop: Header=BB496_541 Depth=1 sw s6, 28(s9) sd a0, 32(s9) ld a4, 456(sp) # 8-byte Folded Reload - ld a5, 464(sp) # 8-byte Folded Reload - bge s5, s6, .LBB496_658 + bge s5, s6, .LBB496_659 # %bb.656: # %if.then5.i.i.i865 - # in Loop: Header=BB496_542 Depth=1 + # in Loop: Header=BB496_541 Depth=1 li a2, 24 mul a1, s5, a2 add a0, a0, a1 @@ -115987,26 +115931,25 @@ mul a2, a1, a2 li a1, 0 call memset@plt - ld a5, 464(sp) # 8-byte Folded Reload - ld a4, 456(sp) # 8-byte Folded Reload j .LBB496_658 .LBB496_657: # %if.then2.i.i.i.i871 - # in Loop: Header=BB496_542 Depth=1 + # in Loop: Header=BB496_541 Depth=1 li a0, 1 sb a0, 42(s8) - ld a4, 456(sp) # 8-byte Folded Reload - ld a5, 464(sp) # 8-byte Folded Reload .LBB496_658: # %resizeOpArray.exit.i.i842 - # in Loop: Header=BB496_542 Depth=1 + # in Loop: Header=BB496_541 Depth=1 + ld a4, 456(sp) # 8-byte Folded Reload +.LBB496_659: # %resizeOpArray.exit.i.i842 + # in Loop: Header=BB496_541 Depth=1 ld a0, 0(s9) lbu a0, 42(a0) - li s8, 48 - bnez a0, .LBB496_661 -# %bb.659: # %resizeOpArray.exit.if.end6_crit_edge.i.i846 - # in Loop: Header=BB496_542 Depth=1 + ld s8, 328(sp) # 8-byte Folded Reload + bnez a0, .LBB496_662 +# %bb.660: # %resizeOpArray.exit.if.end6_crit_edge.i.i846 + # in Loop: Header=BB496_541 Depth=1 lw a0, 24(s9) -.LBB496_660: # %if.end6.i.i848 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_661: # %if.end6.i.i848 + # in Loop: Header=BB496_541 Depth=1 addi a0, a0, 1 ld a1, 32(s9) sw a0, 24(s9) @@ -116017,100 +115960,100 @@ li a1, 46 sh a1, 0(a0) sw s10, 4(a0) - sw a5, 8(a0) + sw a4, 8(a0) sw zero, 12(a0) sd zero, 16(a0) sb zero, 339(s9) -.LBB496_661: # %sqlite3VdbeAddOp2.exit872 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_662: # %sqlite3VdbeAddOp2.exit872 + # in Loop: Header=BB496_541 Depth=1 lw a0, 56(s4) ld a5, 48(s4) li a6, -2 - beqz a0, .LBB496_663 -# %bb.662: # %sqlite3VdbeAddOp2.exit872 - # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_664 +# %bb.663: # %sqlite3VdbeAddOp2.exit872 + # in Loop: Header=BB496_541 Depth=1 li a6, -11 -.LBB496_663: # %sqlite3VdbeAddOp2.exit872 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_664: # %sqlite3VdbeAddOp2.exit872 + # in Loop: Header=BB496_541 Depth=1 li a1, 99 mv a0, s9 - ld a2, 496(sp) # 8-byte Folded Reload + mv a2, s3 ld a3, 472(sp) # 8-byte Folded Reload - mv s0, a4 + ld s0, 464(sp) # 8-byte Folded Reload + mv a4, s0 call sqlite3VdbeAddOp4 - ld s5, 344(sp) # 8-byte Folded Reload - lw a0, 72(s5) - ld s10, 144(sp) # 8-byte Folded Reload - ld a7, 272(sp) # 8-byte Folded Reload + lw a0, 72(s8) + ld a7, 288(sp) # 8-byte Folded Reload li s6, 1 li t0, 12 - bge a0, s7, .LBB496_665 -# %bb.664: # %if.then.i876 - # in Loop: Header=BB496_542 Depth=1 - sw s7, 72(s5) - sw s0, 76(s5) -.LBB496_665: # %sqlite3ReleaseTempRange.exit - # in Loop: Header=BB496_542 Depth=1 + ld s5, 480(sp) # 8-byte Folded Reload + bge a0, s7, .LBB496_666 +# %bb.665: # %if.then.i876 + # in Loop: Header=BB496_541 Depth=1 + sw s7, 72(s8) + sw s0, 76(s8) +.LBB496_666: # %sqlite3ReleaseTempRange.exit + # in Loop: Header=BB496_541 Depth=1 lw a0, 0(s4) sw zero, 56(s4) - ld s7, 480(sp) # 8-byte Folded Reload - blez a0, .LBB496_675 -# %bb.666: # %for.body373.lr.ph - # in Loop: Header=BB496_542 Depth=1 + li s7, 48 + blez a0, .LBB496_676 +# %bb.667: # %for.body373.lr.ph + # in Loop: Header=BB496_541 Depth=1 ld a1, 528(sp) li a2, 0 - j .LBB496_668 -.LBB496_667: # %for.inc386 - # in Loop: Header=BB496_668 Depth=2 + j .LBB496_669 +.LBB496_668: # %for.inc386 + # in Loop: Header=BB496_669 Depth=2 addi a2, a2, 1 - beq a2, a0, .LBB496_675 -.LBB496_668: # %for.body373 - # Parent Loop BB496_542 Depth=1 + beq a2, a0, .LBB496_676 +.LBB496_669: # %for.body373 + # Parent Loop BB496_541 Depth=1 # => This Loop Header: Depth=2 - # Child Loop BB496_670 Depth 3 + # Child Loop BB496_671 Depth 3 slli a3, a2, 3 add a3, s1, a3 lbu a3, 4(a3) seqz a4, a1 seqz a3, a3 or a3, a3, a4 - bnez a3, .LBB496_667 -# %bb.669: # %land.lhs.true.lr.ph.i - # in Loop: Header=BB496_668 Depth=2 + bnez a3, .LBB496_668 +# %bb.670: # %land.lhs.true.lr.ph.i + # in Loop: Header=BB496_669 Depth=2 mul a3, a2, t0 add a3, s2, a3 lw a3, 8(a3) - mul a3, a3, s8 + mul a3, a3, s7 add a3, a1, a3 -.LBB496_670: # %land.lhs.true.i878 - # Parent Loop BB496_542 Depth=1 - # Parent Loop BB496_668 Depth=2 +.LBB496_671: # %land.lhs.true.i878 + # Parent Loop BB496_541 Depth=1 + # Parent Loop BB496_669 Depth=2 # => This Inner Loop Header: Depth=3 lbu a4, 16(a3) andi a5, a4, 4 - bnez a5, .LBB496_667 -# %bb.671: # %land.lhs.true2.i880 - # in Loop: Header=BB496_670 Depth=3 + bnez a5, .LBB496_668 +# %bb.672: # %land.lhs.true2.i880 + # in Loop: Header=BB496_671 Depth=3 lw a5, 12(a7) - beqz a5, .LBB496_673 -# %bb.672: # %lor.lhs.false.i882 - # in Loop: Header=BB496_670 Depth=3 + beqz a5, .LBB496_674 +# %bb.673: # %lor.lhs.false.i882 + # in Loop: Header=BB496_671 Depth=3 ld a5, 0(a3) lbu a5, 2(a5) andi a5, a5, 1 - beqz a5, .LBB496_667 -.LBB496_673: # %if.then.i883 - # in Loop: Header=BB496_670 Depth=3 + beqz a5, .LBB496_668 +.LBB496_674: # %if.then.i883 + # in Loop: Header=BB496_671 Depth=3 lhu a5, 8(a3) ori a4, a4, 4 slli a6, a5, 48 sb a4, 16(a3) - bltz a6, .LBB496_667 -# %bb.674: # %if.then16.i - # in Loop: Header=BB496_670 Depth=3 + bltz a6, .LBB496_668 +# %bb.675: # %if.then16.i + # in Loop: Header=BB496_671 Depth=3 ld a3, 24(a3) ld a4, 24(a3) - mul a3, a5, s8 + mul a3, a5, s7 add a3, a4, a3 lbu a5, 17(a3) addi a5, a5, -1 @@ -116119,84 +116062,84 @@ snez a4, a4 and a4, a4, a6 sb a5, 17(a3) - bnez a4, .LBB496_670 - j .LBB496_667 -.LBB496_675: # %for.end388 - # in Loop: Header=BB496_542 Depth=1 + bnez a4, .LBB496_671 + j .LBB496_668 +.LBB496_676: # %for.end388 + # in Loop: Header=BB496_541 Depth=1 sw s6, 48(a7) - ld a0, 496(sp) # 8-byte Folded Reload - sw a0, 52(a7) + sw s3, 52(a7) lw a0, 24(s9) sw a0, 56(a7) - j .LBB496_751 -.LBB496_676: # in Loop: Header=BB496_542 Depth=1 + ld s2, 488(sp) # 8-byte Folded Reload + j .LBB496_769 +.LBB496_677: # in Loop: Header=BB496_541 Depth=1 li a0, 0 -.LBB496_677: # in Loop: Header=BB496_542 Depth=1 +.LBB496_678: # in Loop: Header=BB496_541 Depth=1 li s2, 0 -.LBB496_678: # %findTerm.exit1039 - # in Loop: Header=BB496_542 Depth=1 - bnez a5, .LBB496_682 -# %bb.679: # %findTerm.exit1039 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_679: # %findTerm.exit1039 + # in Loop: Header=BB496_541 Depth=1 + bnez s1, .LBB496_683 +# %bb.680: # %findTerm.exit1039 + # in Loop: Header=BB496_541 Depth=1 mv s4, a0 - beqz a0, .LBB496_683 -.LBB496_680: # %if.then412 - # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_684 +.LBB496_681: # %if.then412 + # in Loop: Header=BB496_541 Depth=1 ld s0, 0(s4) - lbu a0, 37(s5) + lbu a0, 37(s8) ld a1, 24(s0) - beqz a0, .LBB496_705 -# %bb.681: # %if.then.i2486 - # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_706 +# %bb.682: # %if.then.i2486 + # in Loop: Header=BB496_541 Depth=1 addi a0, a0, -1 andi a2, a0, 255 slli a2, a2, 2 - add a2, s5, a2 + add a2, s8, a2 lw s3, 40(a2) - sb a0, 37(s5) - j .LBB496_706 -.LBB496_682: # in Loop: Header=BB496_542 Depth=1 + sb a0, 37(s8) + j .LBB496_707 +.LBB496_683: # in Loop: Header=BB496_541 Depth=1 mv s4, s2 mv s2, a0 - bnez s4, .LBB496_680 -.LBB496_683: # %if.else429 - # in Loop: Header=BB496_542 Depth=1 + bnez s4, .LBB496_681 +.LBB496_684: # %if.else429 + # in Loop: Header=BB496_541 Depth=1 lw s0, 24(s9) lw s3, 28(s9) mv a0, s0 - blt s0, s3, .LBB496_866 -# %bb.684: # %if.then.i.i1167 - # in Loop: Header=BB496_542 Depth=1 - bnez s3, .LBB496_788 + blt s0, s3, .LBB496_816 # %bb.685: # %if.then.i.i1167 - # in Loop: Header=BB496_542 Depth=1 + # in Loop: Header=BB496_541 Depth=1 + bnez s3, .LBB496_812 +# %bb.686: # %if.then.i.i1167 + # in Loop: Header=BB496_541 Depth=1 li s4, 42 - j .LBB496_789 -.LBB496_686: # %if.then673 - # in Loop: Header=BB496_542 Depth=1 + j .LBB496_813 +.LBB496_687: # %if.then673 + # in Loop: Header=BB496_541 Depth=1 + mv s2, s10 lw s10, 60(s0) addi a2, sp, 504 li a4, 1 - mv a0, s5 + mv a0, s8 mv a1, s0 - mv a3, s7 + mv a3, s5 call codeAllEqualityTerms - lw s1, 36(s0) + lw s4, 36(s0) mv s3, a0 ld a0, 48(sp) # 8-byte Folded Reload - sd s1, 472(sp) # 8-byte Folded Spill bne a0, s6, .LBB496_715 -# %bb.687: # %land.lhs.true685 - # in Loop: Header=BB496_542 Depth=1 +# %bb.688: # %land.lhs.true685 + # in Loop: Header=BB496_541 Depth=1 lbu a0, 6(s0) andi a0, a0, 16 beqz a0, .LBB496_715 -# %bb.688: # %land.lhs.true689 - # in Loop: Header=BB496_542 Depth=1 +# %bb.689: # %land.lhs.true689 + # in Loop: Header=BB496_541 Depth=1 lw a0, 8(s2) bge s10, a0, .LBB496_715 -# %bb.689: # %land.lhs.true693 - # in Loop: Header=BB496_542 Depth=1 +# %bb.690: # %land.lhs.true693 + # in Loop: Header=BB496_541 Depth=1 ld a0, 40(sp) # 8-byte Folded Reload ld a0, 16(a0) ld a0, 0(a0) @@ -116206,8 +116149,8 @@ add a1, a1, a2 lw a1, 0(a1) bne a0, a1, .LBB496_715 -# %bb.690: # %if.end712.thread - # in Loop: Header=BB496_542 Depth=1 +# %bb.691: # %if.end712.thread + # in Loop: Header=BB496_541 Depth=1 lw a4, 8(s0) mv a0, s9 mv a1, s10 @@ -116219,9 +116162,9 @@ mv a0, s9 li a2, 0 call sqlite3VdbeAddOp2 - lw a0, 88(s5) + lw a0, 88(s8) addiw a3, a0, 1 - sw a3, 88(s5) + sw a3, 88(s8) addiw a1, s10, 1 mv a0, s9 mv a2, s2 @@ -116229,160 +116172,159 @@ mv a3, s3 mv a4, s2 call buildIndexProbe - ld a0, 448(sp) # 8-byte Folded Reload - bnez a0, .LBB496_691 - j .LBB496_1163 -.LBB496_691: # %if.then717.split - # in Loop: Header=BB496_542 Depth=1 + bnez s1, .LBB496_692 + j .LBB496_1162 +.LBB496_692: # %if.then717.split + # in Loop: Header=BB496_541 Depth=1 li a1, 94 mv a0, s9 ld a2, 464(sp) # 8-byte Folded Reload - mv a3, s1 + mv a3, s4 mv a4, s2 call sqlite3VdbeAddOp3 j .LBB496_717 -.LBB496_692: # in Loop: Header=BB496_542 Depth=1 +.LBB496_693: # in Loop: Header=BB496_541 Depth=1 li a4, 24 - li a3, 36 - mv a2, s6 - mv s6, s0 -.LBB496_693: # %if.then479 - # in Loop: Header=BB496_542 Depth=1 - li s9, 1 - slli a0, s4, 2 - sd a0, 376(sp) # 8-byte Folded Spill + li a5, 36 + mv a2, s10 + mv s10, s0 +.LBB496_694: # %if.then479 + # in Loop: Header=BB496_541 Depth=1 + li a3, 1 + slli a6, s4, 2 ld a0, 48(sp) # 8-byte Folded Reload - ld s0, 272(sp) # 8-byte Folded Reload - sd a3, 368(sp) # 8-byte Folded Spill - bne a0, s9, .LBB496_697 -# %bb.694: # %land.lhs.true505 - # in Loop: Header=BB496_542 Depth=1 + ld s0, 288(sp) # 8-byte Folded Reload + li a1, 1 + sd a1, 424(sp) # 8-byte Folded Spill + sd a5, 376(sp) # 8-byte Folded Spill + bne a0, a3, .LBB496_698 +# %bb.695: # %land.lhs.true505 + # in Loop: Header=BB496_541 Depth=1 lbu a0, 6(s0) andi a0, a0, 16 - beqz a0, .LBB496_698 -# %bb.695: # %land.lhs.true509 - # in Loop: Header=BB496_542 Depth=1 - lw a0, 8(a5) - bge s4, a0, .LBB496_697 -# %bb.696: # %land.lhs.true513 - # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_699 +# %bb.696: # %land.lhs.true509 + # in Loop: Header=BB496_541 Depth=1 + ld a1, 440(sp) # 8-byte Folded Reload + lw a0, 8(a1) + bge s4, a0, .LBB496_698 +# %bb.697: # %land.lhs.true513 + # in Loop: Header=BB496_541 Depth=1 ld a0, 40(sp) # 8-byte Folded Reload ld a0, 16(a0) ld a0, 0(a0) - ld a1, 16(a5) + ld a1, 16(a1) lw a0, 76(a0) - ld a3, 376(sp) # 8-byte Folded Reload - add a1, a1, a3 + add a1, a1, a6 lw a1, 0(a1) xor a1, a0, a1 seqz a0, a1 - snez s9, a1 - j .LBB496_698 -.LBB496_697: # in Loop: Header=BB496_542 Depth=1 + snez a1, a1 + sd a1, 424(sp) # 8-byte Folded Spill + j .LBB496_699 +.LBB496_698: # in Loop: Header=BB496_541 Depth=1 li a0, 0 -.LBB496_698: # %if.end522 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_699: # %if.end522 + # in Loop: Header=BB496_541 Depth=1 lw a1, 36(s0) - sd a1, 400(sp) # 8-byte Folded Spill - ld a1, 432(sp) # 8-byte Folded Reload - addw s2, a1, s4 - sd s6, 424(sp) # 8-byte Folded Spill + sd a1, 408(sp) # 8-byte Folded Spill + addw s9, s6, s4 sd a2, 416(sp) # 8-byte Folded Spill - sd s2, 408(sp) # 8-byte Folded Spill + sd s6, 392(sp) # 8-byte Folded Spill + sd s9, 384(sp) # 8-byte Folded Spill + sd a6, 368(sp) # 8-byte Folded Spill beqz a2, .LBB496_720 -# %bb.699: # %if.then525 - # in Loop: Header=BB496_542 Depth=1 +# %bb.700: # %if.then525 + # in Loop: Header=BB496_541 Depth=1 + ld a5, 440(sp) # 8-byte Folded Reload ld a0, 16(a5) - ld a1, 376(sp) # 8-byte Folded Reload - add a0, a0, a1 + add a0, a0, a6 lw a2, 0(a0) addi a0, sp, 504 - mv a1, s1 - mv a3, s7 + mv a1, s3 + mv a3, s5 call findTerm mv s3, a0 ld a0, 0(a0) ld a1, 24(a0) - mv a0, s5 - mv a2, s2 + mv a0, s8 + mv a2, s9 call sqlite3ExprCodeTarget - beq a0, s2, .LBB496_702 -# %bb.700: # %land.lhs.true.i1355 - # in Loop: Header=BB496_542 Depth=1 + beq a0, s9, .LBB496_703 +# %bb.701: # %land.lhs.true.i1355 + # in Loop: Header=BB496_541 Depth=1 mv a2, a0 - ld a0, 24(s5) - beqz a0, .LBB496_702 -# %bb.701: # %if.then.i1358 - # in Loop: Header=BB496_542 Depth=1 + ld a0, 24(s8) + beqz a0, .LBB496_703 +# %bb.702: # %if.then.i1358 + # in Loop: Header=BB496_541 Depth=1 li a1, 7 - mv a3, s2 + mv a3, s9 call sqlite3VdbeAddOp2 -.LBB496_702: # %sqlite3ExprCode.exit1361 - # in Loop: Header=BB496_542 Depth=1 - ld a2, 240(sp) # 8-byte Folded Reload +.LBB496_703: # %sqlite3ExprCode.exit1361 + # in Loop: Header=BB496_541 Depth=1 + ld a2, 256(sp) # 8-byte Folded Reload lw s0, 24(a2) lw s2, 28(a2) mv a0, s0 - blt s0, s2, .LBB496_797 -# %bb.703: # %if.then.i.i1365 - # in Loop: Header=BB496_542 Depth=1 - li s7, 1 - bnez s2, .LBB496_793 + blt s0, s2, .LBB496_832 # %bb.704: # %if.then.i.i1365 - # in Loop: Header=BB496_542 Depth=1 + # in Loop: Header=BB496_541 Depth=1 + mv s9, s10 + mv s10, s4 + li s4, 1 + bnez s2, .LBB496_828 +# %bb.705: # %if.then.i.i1365 + # in Loop: Header=BB496_541 Depth=1 li s5, 42 - j .LBB496_794 -.LBB496_705: # %if.else.i2491 - # in Loop: Header=BB496_542 Depth=1 - lw s3, 88(s5) + j .LBB496_829 +.LBB496_706: # %if.else.i2491 + # in Loop: Header=BB496_541 Depth=1 + lw s3, 88(s8) addiw s3, s3, 1 - sw s3, 88(s5) -.LBB496_706: # %sqlite3GetTempReg.exit2494 - # in Loop: Header=BB496_542 Depth=1 - mv a0, s5 + sw s3, 88(s8) +.LBB496_707: # %sqlite3GetTempReg.exit2494 + # in Loop: Header=BB496_541 Depth=1 + mv a0, s8 mv a2, s3 call sqlite3ExprCodeTarget mv s9, a0 - bne a0, s3, .LBB496_708 -# %bb.707: # in Loop: Header=BB496_542 Depth=1 - ld a5, 448(sp) # 8-byte Folded Reload - j .LBB496_712 -.LBB496_708: # %if.else.i1042 - # in Loop: Header=BB496_542 Depth=1 - ld a5, 448(sp) # 8-byte Folded Reload + beq a0, s3, .LBB496_712 +# %bb.708: # %if.else.i1042 + # in Loop: Header=BB496_541 Depth=1 beqz s3, .LBB496_712 # %bb.709: # %land.lhs.true.i2475 - # in Loop: Header=BB496_542 Depth=1 - lbu a0, 37(s5) + # in Loop: Header=BB496_541 Depth=1 + lbu a0, 37(s8) li a1, 7 bltu a1, a0, .LBB496_711 # %bb.710: # %if.then.i2479 - # in Loop: Header=BB496_542 Depth=1 + # in Loop: Header=BB496_541 Depth=1 addi a1, a0, 1 - sb a1, 37(s5) + sb a1, 37(s8) slli a0, a0, 2 - add a0, s5, a0 + add a0, s8, a0 sw s3, 40(a0) .LBB496_711: # %sqlite3ExprCodeTemp.exit - # in Loop: Header=BB496_542 Depth=1 + # in Loop: Header=BB496_541 Depth=1 li s3, 0 .LBB496_712: # %sqlite3ExprCodeTemp.exit - # in Loop: Header=BB496_542 Depth=1 - ld s1, 240(sp) # 8-byte Folded Reload + # in Loop: Header=BB496_541 Depth=1 + ld s1, 256(sp) # 8-byte Folded Reload lw s5, 24(s1) lw s7, 28(s1) lbu s6, 0(s0) mv s0, s5 - blt s5, s7, .LBB496_829 + blt s5, s7, .LBB496_730 # %bb.713: # %if.then.i1047 - # in Loop: Header=BB496_542 Depth=1 + # in Loop: Header=BB496_541 Depth=1 bnez s7, .LBB496_727 # %bb.714: # %if.then.i1047 - # in Loop: Header=BB496_542 Depth=1 + # in Loop: Header=BB496_541 Depth=1 li s0, 42 j .LBB496_728 .LBB496_715: # %if.end712 - # in Loop: Header=BB496_542 Depth=1 + # in Loop: Header=BB496_541 Depth=1 mv a0, s0 mv s0, s9 lw s9, 8(a0) @@ -116392,124 +116334,244 @@ mv a3, s3 mv a4, s9 call buildIndexProbe - ld a0, 448(sp) # 8-byte Folded Reload - beqz a0, .LBB496_784 + beqz s1, .LBB496_802 # %bb.716: # %if.else718.split - # in Loop: Header=BB496_542 Depth=1 + # in Loop: Header=BB496_541 Depth=1 li a1, 63 mv a0, s0 ld a2, 464(sp) # 8-byte Folded Reload - mv a3, s1 + mv a3, s4 mv a4, s9 call sqlite3VdbeAddOp3 mv s9, s0 - ld s0, 272(sp) # 8-byte Folded Reload + ld s0, 288(sp) # 8-byte Folded Reload .LBB496_717: # %if.end719 - # in Loop: Header=BB496_542 Depth=1 + # in Loop: Header=BB496_541 Depth=1 lw s1, 24(s9) lw s2, 28(s9) lw s0, 8(s0) mv a0, s1 - ld s10, 144(sp) # 8-byte Folded Reload - ld s3, 488(sp) # 8-byte Folded Reload - blt s1, s2, .LBB496_887 + ld s3, 496(sp) # 8-byte Folded Reload + blt s1, s2, .LBB496_886 # %bb.718: # %if.then.i2020 - # in Loop: Header=BB496_542 Depth=1 - sd s4, 392(sp) # 8-byte Folded Spill - bnez s2, .LBB496_854 + # in Loop: Header=BB496_541 Depth=1 + mv s10, s4 + bnez s2, .LBB496_873 # %bb.719: # %if.then.i2020 - # in Loop: Header=BB496_542 Depth=1 + # in Loop: Header=BB496_541 Depth=1 li s3, 42 - j .LBB496_855 + j .LBB496_874 .LBB496_720: # %if.end545 - # in Loop: Header=BB496_542 Depth=1 + # in Loop: Header=BB496_541 Depth=1 li s2, 58 bgtz s4, .LBB496_722 # %bb.721: # %if.end545 - # in Loop: Header=BB496_542 Depth=1 + # in Loop: Header=BB496_541 Depth=1 li s2, 22 .LBB496_722: # %if.end545 - # in Loop: Header=BB496_542 Depth=1 - ld a4, 448(sp) # 8-byte Folded Reload - snez a1, a4 + # in Loop: Header=BB496_541 Depth=1 + snez a1, s1 sgtz a2, s4 and a0, a0, a1 or a0, a2, a0 li a1, 1 - sd a1, 384(sp) # 8-byte Folded Spill - bnez a0, .LBB496_804 + sd a1, 400(sp) # 8-byte Folded Spill + bnez a0, .LBB496_840 # %bb.723: # %if.else572 - # in Loop: Header=BB496_542 Depth=1 + # in Loop: Header=BB496_541 Depth=1 li a0, 1 - sd a0, 384(sp) # 8-byte Folded Spill + sd a0, 400(sp) # 8-byte Folded Spill li s2, 22 - bnez a4, .LBB496_724 - j .LBB496_951 + bnez s1, .LBB496_724 + j .LBB496_948 .LBB496_724: # %if.then574 - # in Loop: Header=BB496_542 Depth=1 - ld a3, 240(sp) # 8-byte Folded Reload + # in Loop: Header=BB496_541 Depth=1 + ld a3, 256(sp) # 8-byte Folded Reload lw s0, 24(a3) lw s3, 28(a3) mv a0, s0 bge s0, s3, .LBB496_725 - j .LBB496_1168 + j .LBB496_1044 .LBB496_725: # %if.then.i.i1516 - # in Loop: Header=BB496_542 Depth=1 + # in Loop: Header=BB496_541 Depth=1 beqz s3, .LBB496_726 - j .LBB496_1151 + j .LBB496_1040 .LBB496_726: # %if.then.i.i1516 - # in Loop: Header=BB496_542 Depth=1 + # in Loop: Header=BB496_541 Depth=1 li s5, 42 - j .LBB496_1152 -.LBB496_727: # in Loop: Header=BB496_542 Depth=1 + j .LBB496_1041 +.LBB496_727: # in Loop: Header=BB496_541 Depth=1 slliw s0, s7, 1 .LBB496_728: # %if.then.i1047 - # in Loop: Header=BB496_542 Depth=1 - ld s1, 240(sp) # 8-byte Folded Reload + # in Loop: Header=BB496_541 Depth=1 + ld s1, 256(sp) # 8-byte Folded Reload ld s8, 0(s1) lbu a0, 42(s8) - bnez a0, .LBB496_828 -# %bb.729: # %if.then.i.i.i1072 - # in Loop: Header=BB496_542 Depth=1 - ld a0, 32(s1) - li a1, 24 - mulw a1, s0, a1 - call sqlite3_realloc - beqz a0, .LBB496_826 -# %bb.730: # %if.then.i.i1076 - # in Loop: Header=BB496_542 Depth=1 - sw s0, 28(s1) - sd a0, 32(s1) - ld a5, 448(sp) # 8-byte Folded Reload - bge s7, s0, .LBB496_828 -# %bb.731: # %if.then5.i.i1078 - # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_806 +.LBB496_729: # %resizeOpArray.exit.i1054 + # in Loop: Header=BB496_541 Depth=1 + ld a0, 0(s1) + lbu a0, 42(a0) + lw s0, 24(s1) + ld s8, 328(sp) # 8-byte Folded Reload + bnez a0, .LBB496_731 +.LBB496_730: # %if.end6.i1061 + # in Loop: Header=BB496_541 Depth=1 + addi a0, s6, -69 + addi s0, s0, 1 + sw s0, 24(s1) + ld a1, 32(s1) + andi a0, a0, 255 + sltiu a0, a0, 2 li a2, 24 - mul a1, s7, a2 - add a0, a0, a1 - subw a1, s0, s7 - mul a2, a1, a2 - li a1, 0 - call memset@plt - j .LBB496_827 -.LBB496_732: # %if.then2.i.i.i930 - # in Loop: Header=BB496_542 Depth=1 + mul a2, s5, a2 + add a1, a1, a2 + li a2, 107 + sh a2, 0(a1) + sw s9, 4(a1) + ld a2, 472(sp) # 8-byte Folded Reload + sw a2, 8(a1) + sw a0, 12(a1) + sd zero, 16(a1) + lw s0, 24(s1) + sb zero, 339(s1) +.LBB496_731: # %sqlite3VdbeAddOp3.exit1085 + # in Loop: Header=BB496_541 Depth=1 + lw s5, 28(s1) + mv a0, s0 + li s7, 48 + blt s0, s5, .LBB496_738 +# %bb.732: # %if.then.i1089 + # in Loop: Header=BB496_541 Depth=1 + bnez s5, .LBB496_734 +# %bb.733: # %if.then.i1089 + # in Loop: Header=BB496_541 Depth=1 + li s6, 42 + j .LBB496_735 +.LBB496_734: # in Loop: Header=BB496_541 Depth=1 + slliw s6, s5, 1 +.LBB496_735: # %if.then.i1089 + # in Loop: Header=BB496_541 Depth=1 + ld s1, 256(sp) # 8-byte Folded Reload + ld s7, 0(s1) + lbu a0, 42(s7) + beqz a0, .LBB496_809 +.LBB496_736: # %resizeOpArray.exit.i1096 + # in Loop: Header=BB496_541 Depth=1 + ld a0, 0(s1) + lbu a0, 42(a0) + li s7, 48 + ld s5, 480(sp) # 8-byte Folded Reload + ld s1, 456(sp) # 8-byte Folded Reload + bnez a0, .LBB496_741 +# %bb.737: # %resizeOpArray.exit.if.end6_crit_edge.i1101 + # in Loop: Header=BB496_541 Depth=1 + ld s1, 256(sp) # 8-byte Folded Reload + lw a0, 24(s1) +.LBB496_738: # %if.end6.i1103 + # in Loop: Header=BB496_541 Depth=1 + addi a0, a0, 1 + sw a0, 24(s1) + li a0, 94 + ld s1, 456(sp) # 8-byte Folded Reload + bnez s1, .LBB496_740 +# %bb.739: # %if.end6.i1103 + # in Loop: Header=BB496_541 Depth=1 + li a0, 116 +.LBB496_740: # %if.end6.i1103 + # in Loop: Header=BB496_541 Depth=1 + ld a3, 256(sp) # 8-byte Folded Reload + ld a1, 32(a3) + li a2, 24 + mul a2, s0, a2 + add a1, a1, a2 + sb a0, 0(a1) + ld a0, 496(sp) # 8-byte Folded Reload + sw a0, 4(a1) + ld a0, 472(sp) # 8-byte Folded Reload + sw a0, 8(a1) + sw s9, 12(a1) + sd zero, 16(a1) + sb zero, 1(a1) + sb zero, 339(a3) + ld s5, 480(sp) # 8-byte Folded Reload +.LBB496_741: # %sqlite3VdbeAddOp3.exit1127 + # in Loop: Header=BB496_541 Depth=1 + beqz s3, .LBB496_744 +# %bb.742: # %land.lhs.true.i1129 + # in Loop: Header=BB496_541 Depth=1 + lbu a0, 37(s8) + li a1, 7 + bltu a1, a0, .LBB496_744 +# %bb.743: # %if.then.i1133 + # in Loop: Header=BB496_541 Depth=1 + addi a1, a0, 1 + sb a1, 37(s8) + slli a0, a0, 2 + add a0, s8, a0 + sw s3, 40(a0) +.LBB496_744: # %land.lhs.true.lr.ph.i1139 + # in Loop: Header=BB496_541 Depth=1 + ld s9, 256(sp) # 8-byte Folded Reload + li s6, 1 + ld s3, 496(sp) # 8-byte Folded Reload +.LBB496_745: # %land.lhs.true.i1141 + # Parent Loop BB496_541 Depth=1 + # => This Inner Loop Header: Depth=2 + lbu a0, 16(s4) + andi a1, a0, 4 + bnez a1, .LBB496_819 +# %bb.746: # %land.lhs.true2.i1145 + # in Loop: Header=BB496_745 Depth=2 + ld a1, 288(sp) # 8-byte Folded Reload + lw a1, 12(a1) + beqz a1, .LBB496_748 +# %bb.747: # %lor.lhs.false.i1147 + # in Loop: Header=BB496_745 Depth=2 + ld a1, 0(s4) + lbu a1, 2(a1) + andi a1, a1, 1 + beqz a1, .LBB496_819 +.LBB496_748: # %if.then.i1150 + # in Loop: Header=BB496_745 Depth=2 + lhu a1, 8(s4) + ori a0, a0, 4 + slli a2, a1, 48 + sb a0, 16(s4) + bltz a2, .LBB496_819 +# %bb.749: # %if.then16.i1153 + # in Loop: Header=BB496_745 Depth=2 + ld a0, 24(s4) + ld a0, 24(a0) + mul s4, a1, s7 + add s4, a0, s4 + lbu a1, 17(s4) + addi a1, a1, -1 + andi a2, a1, 255 + snez a2, a2 + seqz a0, a0 + or a0, a0, a2 + sb a1, 17(s4) + beqz a0, .LBB496_745 + j .LBB496_819 +.LBB496_750: # %if.then2.i.i.i930 + # in Loop: Header=BB496_541 Depth=1 sb s6, 42(s5) -.LBB496_733: # %resizeOpArray.exit.i - # in Loop: Header=BB496_542 Depth=1 +.LBB496_751: # %resizeOpArray.exit.i + # in Loop: Header=BB496_541 Depth=1 ld a0, 0(s9) lbu a0, 42(a0) lw s1, 24(s9) - ld s5, 344(sp) # 8-byte Folded Reload - beqz a0, .LBB496_735 -# %bb.734: # %sqlite3VdbeAddOp3.exit - # in Loop: Header=BB496_542 Depth=1 + ld s5, 480(sp) # 8-byte Folded Reload + beqz a0, .LBB496_753 +# %bb.752: # %sqlite3VdbeAddOp3.exit + # in Loop: Header=BB496_541 Depth=1 lw s2, 28(s9) mv a0, s1 - bge s1, s2, .LBB496_736 - j .LBB496_745 -.LBB496_735: # %if.end6.i - # in Loop: Header=BB496_542 Depth=1 + bge s1, s2, .LBB496_754 + j .LBB496_763 +.LBB496_753: # %if.end6.i + # in Loop: Header=BB496_541 Depth=1 ld a0, 32(s9) addi s1, s1, 1 sw s1, 24(s9) @@ -116526,36 +116588,36 @@ sb zero, 339(s9) lw s2, 28(s9) mv a0, s1 - blt s1, s2, .LBB496_745 -.LBB496_736: # %if.then.i934 - # in Loop: Header=BB496_542 Depth=1 - bnez s2, .LBB496_738 -# %bb.737: # %if.then.i934 - # in Loop: Header=BB496_542 Depth=1 + blt s1, s2, .LBB496_763 +.LBB496_754: # %if.then.i934 + # in Loop: Header=BB496_541 Depth=1 + bnez s2, .LBB496_756 +# %bb.755: # %if.then.i934 + # in Loop: Header=BB496_541 Depth=1 li s4, 42 ld s5, 0(s9) lbu a0, 42(s5) - bnez a0, .LBB496_743 - j .LBB496_739 -.LBB496_738: # in Loop: Header=BB496_542 Depth=1 + bnez a0, .LBB496_761 + j .LBB496_757 +.LBB496_756: # in Loop: Header=BB496_541 Depth=1 slliw s4, s2, 1 ld s5, 0(s9) lbu a0, 42(s5) - bnez a0, .LBB496_743 -.LBB496_739: # %if.then.i.i.i959 - # in Loop: Header=BB496_542 Depth=1 + bnez a0, .LBB496_761 +.LBB496_757: # %if.then.i.i.i959 + # in Loop: Header=BB496_541 Depth=1 ld a0, 32(s9) li a1, 24 mulw a1, s4, a1 call sqlite3_realloc - beqz a0, .LBB496_742 -# %bb.740: # %if.then.i.i963 - # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_760 +# %bb.758: # %if.then.i.i963 + # in Loop: Header=BB496_541 Depth=1 sw s4, 28(s9) sd a0, 32(s9) - bge s2, s4, .LBB496_743 -# %bb.741: # %if.then5.i.i965 - # in Loop: Header=BB496_542 Depth=1 + bge s2, s4, .LBB496_761 +# %bb.759: # %if.then5.i.i965 + # in Loop: Header=BB496_541 Depth=1 li a2, 24 mul a1, s2, a2 add a0, a0, a1 @@ -116563,21 +116625,21 @@ mul a2, a1, a2 li a1, 0 call memset@plt - j .LBB496_743 -.LBB496_742: # %if.then2.i.i.i971 - # in Loop: Header=BB496_542 Depth=1 + j .LBB496_761 +.LBB496_760: # %if.then2.i.i.i971 + # in Loop: Header=BB496_541 Depth=1 sb s6, 42(s5) -.LBB496_743: # %resizeOpArray.exit.i941 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_761: # %resizeOpArray.exit.i941 + # in Loop: Header=BB496_541 Depth=1 ld a0, 0(s9) lbu a0, 42(a0) - ld s5, 344(sp) # 8-byte Folded Reload - bnez a0, .LBB496_746 -# %bb.744: # %resizeOpArray.exit.if.end6_crit_edge.i946 - # in Loop: Header=BB496_542 Depth=1 + ld s5, 480(sp) # 8-byte Folded Reload + bnez a0, .LBB496_764 +# %bb.762: # %resizeOpArray.exit.if.end6_crit_edge.i946 + # in Loop: Header=BB496_541 Depth=1 lw a0, 24(s9) -.LBB496_745: # %if.end6.i948 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_763: # %if.end6.i948 + # in Loop: Header=BB496_541 Depth=1 ld a1, 32(s9) addi a0, a0, 1 sw a0, 24(s9) @@ -116592,147 +116654,147 @@ sw s3, 12(a0) sd zero, 16(a0) sb zero, 339(s9) -.LBB496_746: # %sqlite3VdbeAddOp3.exit972 - # in Loop: Header=BB496_542 Depth=1 - beqz s3, .LBB496_749 -# %bb.747: # %land.lhs.true.i974 - # in Loop: Header=BB496_542 Depth=1 - lbu a0, 37(s5) +.LBB496_764: # %sqlite3VdbeAddOp3.exit972 + # in Loop: Header=BB496_541 Depth=1 + beqz s3, .LBB496_767 +# %bb.765: # %land.lhs.true.i974 + # in Loop: Header=BB496_541 Depth=1 + lbu a0, 37(s8) li a1, 7 - bltu a1, a0, .LBB496_749 -# %bb.748: # %if.then.i978 - # in Loop: Header=BB496_542 Depth=1 + bltu a1, a0, .LBB496_767 +# %bb.766: # %if.then.i978 + # in Loop: Header=BB496_541 Depth=1 addi a1, a0, 1 - sb a1, 37(s5) + sb a1, 37(s8) slli a0, a0, 2 - add a0, s5, a0 + add a0, s8, a0 sw s3, 40(a0) -.LBB496_749: # %sqlite3ReleaseTempReg.exit - # in Loop: Header=BB496_542 Depth=1 - ld a0, 272(sp) # 8-byte Folded Reload +.LBB496_767: # %sqlite3ReleaseTempReg.exit + # in Loop: Header=BB496_541 Depth=1 + ld a0, 288(sp) # 8-byte Folded Reload li a1, 22 sw a1, 48(a0) -.LBB496_750: # %if.end753 - # in Loop: Header=BB496_542 Depth=1 - ld s3, 488(sp) # 8-byte Folded Reload -.LBB496_751: # %if.end753 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_768: # %if.end753 + # in Loop: Header=BB496_541 Depth=1 + ld s2, 488(sp) # 8-byte Folded Reload + ld s3, 496(sp) # 8-byte Folded Reload +.LBB496_769: # %if.end753 + # in Loop: Header=BB496_541 Depth=1 lw a0, 1016(sp) - blez a0, .LBB496_755 -# %bb.752: # %for.body.preheader.i2260 - # in Loop: Header=BB496_542 Depth=1 + blez a0, .LBB496_773 +# %bb.770: # %for.body.preheader.i2260 + # in Loop: Header=BB496_541 Depth=1 li a1, 0 addi a2, sp, 1020 - ld a4, 496(sp) # 8-byte Folded Reload -.LBB496_753: # %for.body.i2262 - # Parent Loop BB496_542 Depth=1 +.LBB496_771: # %for.body.i2262 + # Parent Loop BB496_541 Depth=1 # => This Inner Loop Header: Depth=2 lw a3, 0(a2) - beq a3, a4, .LBB496_756 -# %bb.754: # %for.cond.i2266 - # in Loop: Header=BB496_753 Depth=2 + beq a3, s3, .LBB496_774 +# %bb.772: # %for.cond.i2266 + # in Loop: Header=BB496_771 Depth=2 addi a1, a1, 1 addi a2, a2, 4 - bne a0, a1, .LBB496_753 -.LBB496_755: # in Loop: Header=BB496_542 Depth=1 + bne a0, a1, .LBB496_771 +.LBB496_773: # in Loop: Header=BB496_541 Depth=1 li a0, 0 lw s1, 520(sp) not a0, zero - and s7, s7, a0 - bgtz s1, .LBB496_757 - j .LBB496_764 -.LBB496_756: # %if.then.i2269 - # in Loop: Header=BB496_542 Depth=1 + and s5, s5, a0 + bgtz s1, .LBB496_775 + j .LBB496_782 +.LBB496_774: # %if.then.i2269 + # in Loop: Header=BB496_541 Depth=1 sll a0, s6, a1 lw s1, 520(sp) not a0, a0 - and s7, s7, a0 - blez s1, .LBB496_764 -.LBB496_757: # %for.body761.lr.ph - # in Loop: Header=BB496_542 Depth=1 + and s5, s5, a0 + blez s1, .LBB496_782 +.LBB496_775: # %for.body761.lr.ph + # in Loop: Header=BB496_541 Depth=1 ld s0, 528(sp) addi s1, s1, 1 - j .LBB496_760 -.LBB496_758: # %if.end783 - # in Loop: Header=BB496_760 Depth=2 + j .LBB496_778 +.LBB496_776: # %if.end783 + # in Loop: Header=BB496_778 Depth=2 li a3, 8 - mv a0, s5 - mv a2, s3 + mv a0, s8 + mv a2, s2 call sqlite3ExprIfFalse lbu a0, 16(s0) ori a0, a0, 4 sb a0, 16(s0) -.LBB496_759: # %cleanup788 - # in Loop: Header=BB496_760 Depth=2 +.LBB496_777: # %cleanup788 + # in Loop: Header=BB496_778 Depth=2 addiw s1, s1, -1 addi s0, s0, 48 - bge s6, s1, .LBB496_764 -.LBB496_760: # %for.body761 - # Parent Loop BB496_542 Depth=1 + bge s6, s1, .LBB496_782 +.LBB496_778: # %for.body761 + # Parent Loop BB496_541 Depth=1 # => This Inner Loop Header: Depth=2 lbu a0, 16(s0) andi a0, a0, 6 - bnez a0, .LBB496_759 -# %bb.761: # %if.end767 - # in Loop: Header=BB496_760 Depth=2 + bnez a0, .LBB496_777 +# %bb.779: # %if.end767 + # in Loop: Header=BB496_778 Depth=2 ld a0, 40(s0) - and a0, a0, s7 - bnez a0, .LBB496_759 -# %bb.762: # %if.end772 - # in Loop: Header=BB496_760 Depth=2 - ld a0, 272(sp) # 8-byte Folded Reload + and a0, a0, s5 + bnez a0, .LBB496_777 +# %bb.780: # %if.end772 + # in Loop: Header=BB496_778 Depth=2 + ld a0, 288(sp) # 8-byte Folded Reload lw a0, 12(a0) ld a1, 0(s0) - beqz a0, .LBB496_758 -# %bb.763: # %land.lhs.true776 - # in Loop: Header=BB496_760 Depth=2 + beqz a0, .LBB496_776 +# %bb.781: # %land.lhs.true776 + # in Loop: Header=BB496_778 Depth=2 lbu a0, 2(a1) andi a0, a0, 1 - bnez a0, .LBB496_758 - j .LBB496_759 -.LBB496_764: # %for.end793 - # in Loop: Header=BB496_542 Depth=1 - ld a0, 272(sp) # 8-byte Folded Reload + bnez a0, .LBB496_776 + j .LBB496_777 +.LBB496_782: # %for.end793 + # in Loop: Header=BB496_541 Depth=1 + ld a0, 288(sp) # 8-byte Folded Reload lw s0, 12(a0) - bnez s0, .LBB496_765 - j .LBB496_541 -.LBB496_765: # %if.then796 - # in Loop: Header=BB496_542 Depth=1 + bnez s0, .LBB496_783 + j .LBB496_540 +.LBB496_783: # %if.then796 + # in Loop: Header=BB496_541 Depth=1 lw s1, 24(s9) - ld a0, 272(sp) # 8-byte Folded Reload + ld a0, 288(sp) # 8-byte Folded Reload sw s1, 44(a0) lw s2, 28(s9) mv a0, s1 - blt s1, s2, .LBB496_775 -# %bb.766: # %if.then.i.i2275 - # in Loop: Header=BB496_542 Depth=1 - bnez s2, .LBB496_768 -# %bb.767: # %if.then.i.i2275 - # in Loop: Header=BB496_542 Depth=1 + blt s1, s2, .LBB496_793 +# %bb.784: # %if.then.i.i2275 + # in Loop: Header=BB496_541 Depth=1 + bnez s2, .LBB496_786 +# %bb.785: # %if.then.i.i2275 + # in Loop: Header=BB496_541 Depth=1 li s3, 42 ld s4, 0(s9) lbu a0, 42(s4) - bnez a0, .LBB496_773 - j .LBB496_769 -.LBB496_768: # in Loop: Header=BB496_542 Depth=1 + bnez a0, .LBB496_791 + j .LBB496_787 +.LBB496_786: # in Loop: Header=BB496_541 Depth=1 slliw s3, s2, 1 ld s4, 0(s9) lbu a0, 42(s4) - bnez a0, .LBB496_773 -.LBB496_769: # %if.then.i.i.i.i2299 - # in Loop: Header=BB496_542 Depth=1 + bnez a0, .LBB496_791 +.LBB496_787: # %if.then.i.i.i.i2299 + # in Loop: Header=BB496_541 Depth=1 ld a0, 32(s9) li a1, 24 mulw a1, s3, a1 call sqlite3_realloc - beqz a0, .LBB496_772 -# %bb.770: # %if.then.i.i.i2303 - # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_790 +# %bb.788: # %if.then.i.i.i2303 + # in Loop: Header=BB496_541 Depth=1 sw s3, 28(s9) sd a0, 32(s9) - bge s2, s3, .LBB496_773 -# %bb.771: # %if.then5.i.i.i2305 - # in Loop: Header=BB496_542 Depth=1 + bge s2, s3, .LBB496_791 +# %bb.789: # %if.then5.i.i.i2305 + # in Loop: Header=BB496_541 Depth=1 li a2, 24 mul a1, s2, a2 add a0, a0, a1 @@ -116740,21 +116802,20 @@ mul a2, a1, a2 li a1, 0 call memset@plt - j .LBB496_773 -.LBB496_772: # %if.then2.i.i.i.i2311 - # in Loop: Header=BB496_542 Depth=1 + j .LBB496_791 +.LBB496_790: # %if.then2.i.i.i.i2311 + # in Loop: Header=BB496_541 Depth=1 sb s6, 42(s4) -.LBB496_773: # %resizeOpArray.exit.i.i2282 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_791: # %resizeOpArray.exit.i.i2282 + # in Loop: Header=BB496_541 Depth=1 ld a0, 0(s9) lbu a0, 42(a0) - ld s3, 488(sp) # 8-byte Folded Reload - bnez a0, .LBB496_776 -# %bb.774: # %resizeOpArray.exit.if.end6_crit_edge.i.i2286 - # in Loop: Header=BB496_542 Depth=1 + bnez a0, .LBB496_794 +# %bb.792: # %resizeOpArray.exit.if.end6_crit_edge.i.i2286 + # in Loop: Header=BB496_541 Depth=1 lw a0, 24(s9) -.LBB496_775: # %if.end6.i.i2288 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_793: # %if.end6.i.i2288 + # in Loop: Header=BB496_541 Depth=1 ld a1, 32(s9) addi a0, a0, 1 sw a0, 24(s9) @@ -116768,133 +116829,240 @@ sw zero, 12(a0) sd zero, 16(a0) sb zero, 339(s9) -.LBB496_776: # %sqlite3VdbeAddOp2.exit2312 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_794: # %sqlite3VdbeAddOp2.exit2312 + # in Loop: Header=BB496_541 Depth=1 lw a0, 520(sp) - bgtz a0, .LBB496_777 - j .LBB496_541 -.LBB496_777: # %for.body805.preheader - # in Loop: Header=BB496_542 Depth=1 + ld s2, 488(sp) # 8-byte Folded Reload + bgtz a0, .LBB496_795 + j .LBB496_540 +.LBB496_795: # %for.body805.preheader + # in Loop: Header=BB496_541 Depth=1 ld s0, 528(sp) li s1, 0 - j .LBB496_779 -.LBB496_778: # %for.inc823 - # in Loop: Header=BB496_779 Depth=2 + j .LBB496_797 +.LBB496_796: # %for.inc823 + # in Loop: Header=BB496_797 Depth=2 addiw s1, s1, 1 addi s0, s0, 48 - blt s1, a0, .LBB496_779 - j .LBB496_541 -.LBB496_779: # %for.body805 - # Parent Loop BB496_542 Depth=1 + blt s1, a0, .LBB496_797 + j .LBB496_540 +.LBB496_797: # %for.body805 + # Parent Loop BB496_541 Depth=1 # => This Inner Loop Header: Depth=2 lbu a1, 16(s0) andi a1, a1, 6 - bnez a1, .LBB496_778 -# %bb.780: # %if.end811 - # in Loop: Header=BB496_779 Depth=2 + bnez a1, .LBB496_796 +# %bb.798: # %if.end811 + # in Loop: Header=BB496_797 Depth=2 ld a1, 40(s0) - and a1, a1, s7 - bnez a1, .LBB496_778 -# %bb.781: # %if.end817 - # in Loop: Header=BB496_779 Depth=2 + and a1, a1, s5 + bnez a1, .LBB496_796 +# %bb.799: # %if.end817 + # in Loop: Header=BB496_797 Depth=2 ld a1, 0(s0) li a3, 8 - mv a0, s5 - mv a2, s3 + mv a0, s8 + mv a2, s2 call sqlite3ExprIfFalse lbu a0, 16(s0) ori a0, a0, 4 sb a0, 16(s0) lw a0, 520(sp) - j .LBB496_778 -.LBB496_782: # in Loop: Header=BB496_542 Depth=1 - ld s9, 240(sp) # 8-byte Folded Reload - ld s11, 456(sp) # 8-byte Folded Reload - ld a5, 464(sp) # 8-byte Folded Reload - j .LBB496_607 -.LBB496_783: # in Loop: Header=BB496_542 Depth=1 - ld s10, 448(sp) # 8-byte Folded Reload - j .LBB496_607 -.LBB496_784: # %if.else728.split - # in Loop: Header=BB496_542 Depth=1 + j .LBB496_796 +.LBB496_800: # in Loop: Header=BB496_541 Depth=1 + ld s9, 256(sp) # 8-byte Folded Reload + mv a4, s11 + mv s11, s3 + j .LBB496_606 +.LBB496_801: # in Loop: Header=BB496_541 Depth=1 + ld s10, 456(sp) # 8-byte Folded Reload + j .LBB496_606 +.LBB496_802: # %if.else728.split + # in Loop: Header=BB496_541 Depth=1 li a1, 116 mv a0, s0 ld a2, 464(sp) # 8-byte Folded Reload - mv a3, s1 + mv a3, s4 mv a4, s9 call sqlite3VdbeAddOp3 mv s9, s0 - ld s0, 272(sp) # 8-byte Folded Reload -.LBB496_785: # %if.end729 - # in Loop: Header=BB496_542 Depth=1 + ld s0, 288(sp) # 8-byte Folded Reload +.LBB496_803: # %if.end729 + # in Loop: Header=BB496_541 Depth=1 lw s1, 24(s9) lw s2, 28(s9) lw s0, 8(s0) mv a0, s1 - ld s10, 144(sp) # 8-byte Folded Reload - ld s3, 488(sp) # 8-byte Folded Reload - blt s1, s2, .LBB496_892 -# %bb.786: # %if.then.i2062 - # in Loop: Header=BB496_542 Depth=1 - sd s4, 392(sp) # 8-byte Folded Spill - bnez s2, .LBB496_858 -# %bb.787: # %if.then.i2062 - # in Loop: Header=BB496_542 Depth=1 + ld s3, 496(sp) # 8-byte Folded Reload + blt s1, s2, .LBB496_891 +# %bb.804: # %if.then.i2062 + # in Loop: Header=BB496_541 Depth=1 + mv s10, s4 + bnez s2, .LBB496_877 +# %bb.805: # %if.then.i2062 + # in Loop: Header=BB496_541 Depth=1 li s3, 42 - j .LBB496_859 -.LBB496_788: # in Loop: Header=BB496_542 Depth=1 - slliw s4, s3, 1 -.LBB496_789: # %if.then.i.i1167 - # in Loop: Header=BB496_542 Depth=1 - ld s5, 0(s9) - lbu a0, 42(s5) - bnez a0, .LBB496_864 -# %bb.790: # %if.then.i.i.i.i1191 - # in Loop: Header=BB496_542 Depth=1 - ld a0, 32(s9) + j .LBB496_878 +.LBB496_806: # %if.then.i.i.i1072 + # in Loop: Header=BB496_541 Depth=1 + ld a0, 32(s1) li a1, 24 - mulw a1, s4, a1 + mulw a1, s0, a1 call sqlite3_realloc - beqz a0, .LBB496_862 -# %bb.791: # %if.then.i.i.i1195 - # in Loop: Header=BB496_542 Depth=1 - sw s4, 28(s9) - sd a0, 32(s9) - ld a5, 448(sp) # 8-byte Folded Reload - bge s3, s4, .LBB496_864 -# %bb.792: # %if.then5.i.i.i1197 - # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_871 +# %bb.807: # %if.then.i.i1076 + # in Loop: Header=BB496_541 Depth=1 + sw s0, 28(s1) + sd a0, 32(s1) + bge s7, s0, .LBB496_729 +# %bb.808: # %if.then5.i.i1078 + # in Loop: Header=BB496_541 Depth=1 li a2, 24 - mul a1, s3, a2 + mul a1, s7, a2 add a0, a0, a1 - subw a1, s4, s3 + subw a1, s0, s7 + mul a2, a1, a2 + li a1, 0 + call memset@plt + j .LBB496_729 +.LBB496_809: # %if.then.i.i.i1114 + # in Loop: Header=BB496_541 Depth=1 + ld a0, 32(s1) + li a1, 24 + mulw a1, s6, a1 + call sqlite3_realloc + beqz a0, .LBB496_872 +# %bb.810: # %if.then.i.i1118 + # in Loop: Header=BB496_541 Depth=1 + sw s6, 28(s1) + sd a0, 32(s1) + bge s5, s6, .LBB496_736 +# %bb.811: # %if.then5.i.i1120 + # in Loop: Header=BB496_541 Depth=1 + li a2, 24 + mul a1, s5, a2 + add a0, a0, a1 + subw a1, s6, s5 mul a2, a1, a2 li a1, 0 call memset@plt - j .LBB496_863 -.LBB496_793: # in Loop: Header=BB496_542 Depth=1 + j .LBB496_736 +.LBB496_812: # in Loop: Header=BB496_541 Depth=1 + slliw s4, s3, 1 +.LBB496_813: # %if.then.i.i1167 + # in Loop: Header=BB496_541 Depth=1 + ld s5, 0(s9) + lbu a0, 42(s5) + beqz a0, .LBB496_845 +.LBB496_814: # %resizeOpArray.exit.i.i1174 + # in Loop: Header=BB496_541 Depth=1 + ld a0, 0(s9) + lbu a0, 42(a0) + ld s5, 480(sp) # 8-byte Folded Reload + ld s3, 496(sp) # 8-byte Folded Reload + bnez a0, .LBB496_819 +# %bb.815: # %resizeOpArray.exit.if.end6_crit_edge.i.i1178 + # in Loop: Header=BB496_541 Depth=1 + lw a0, 24(s9) +.LBB496_816: # %if.end6.i.i1180 + # in Loop: Header=BB496_541 Depth=1 + addi a0, a0, 1 + sw a0, 24(s9) + li a0, 50 + bnez s1, .LBB496_818 +# %bb.817: # %if.end6.i.i1180 + # in Loop: Header=BB496_541 Depth=1 + li a0, 115 +.LBB496_818: # %if.end6.i.i1180 + # in Loop: Header=BB496_541 Depth=1 + ld a1, 32(s9) + li a2, 24 + mul a2, s0, a2 + add a1, a1, a2 + sb a0, 0(a1) + ld s3, 496(sp) # 8-byte Folded Reload + sw s3, 4(a1) + ld a0, 472(sp) # 8-byte Folded Reload + sw a0, 8(a1) + sw zero, 12(a1) + sd zero, 16(a1) + sb zero, 1(a1) + sb zero, 339(s9) +.LBB496_819: # %if.end433 + # in Loop: Header=BB496_541 Depth=1 + beqz s2, .LBB496_825 +# %bb.820: # %if.then435 + # in Loop: Header=BB496_541 Depth=1 + li s1, 1 + lw s3, 88(s8) + ld s0, 0(s2) + addiw s3, s3, 1 + sw s3, 88(s8) + ld a0, 288(sp) # 8-byte Folded Reload + sw s3, 8(a0) + ld a1, 24(s0) + mv a0, s8 + mv a2, s3 + call sqlite3ExprCodeTarget + beq a0, s3, .LBB496_997 +# %bb.821: # %land.lhs.true.i1207 + # in Loop: Header=BB496_541 Depth=1 + ld s4, 24(s8) + beqz s4, .LBB496_997 +# %bb.822: # %if.then.i1210 + # in Loop: Header=BB496_541 Depth=1 + lw s5, 24(s4) + lw s6, 28(s4) + mv a1, s5 + blt s5, s6, .LBB496_996 +# %bb.823: # %if.then.i.i2498 + # in Loop: Header=BB496_541 Depth=1 + bnez s6, .LBB496_860 +# %bb.824: # %if.then.i.i2498 + # in Loop: Header=BB496_541 Depth=1 + li s7, 42 + j .LBB496_861 +.LBB496_825: # %if.end459 + # in Loop: Header=BB496_541 Depth=1 + li a0, 47 + bnez s1, .LBB496_827 +# %bb.826: # %if.end459 + # in Loop: Header=BB496_541 Depth=1 + li a0, 102 +.LBB496_827: # %if.end459 + # in Loop: Header=BB496_541 Depth=1 + lw a1, 24(s9) + ld a2, 288(sp) # 8-byte Folded Reload + sw a0, 48(a2) + sw s3, 52(a2) + sw a1, 56(a2) + ld s2, 488(sp) # 8-byte Folded Reload + j .LBB496_769 +.LBB496_828: # in Loop: Header=BB496_541 Depth=1 slliw s5, s2, 1 -.LBB496_794: # %if.then.i.i1365 - # in Loop: Header=BB496_542 Depth=1 - ld s1, 240(sp) # 8-byte Folded Reload +.LBB496_829: # %if.then.i.i1365 + # in Loop: Header=BB496_541 Depth=1 + ld s1, 256(sp) # 8-byte Folded Reload ld s6, 0(s1) lbu a0, 42(s6) - beqz a0, .LBB496_812 -.LBB496_795: # %resizeOpArray.exit.i.i1372 - # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_852 +.LBB496_830: # %resizeOpArray.exit.i.i1372 + # in Loop: Header=BB496_541 Depth=1 ld a0, 0(s1) lbu a0, 42(a0) - ld s5, 344(sp) # 8-byte Folded Reload - ld s7, 480(sp) # 8-byte Folded Reload - ld s1, 496(sp) # 8-byte Folded Reload - ld s6, 424(sp) # 8-byte Folded Reload - bnez a0, .LBB496_798 -# %bb.796: # %resizeOpArray.exit.if.end6_crit_edge.i.i1376 - # in Loop: Header=BB496_542 Depth=1 - ld a2, 240(sp) # 8-byte Folded Reload + ld s5, 480(sp) # 8-byte Folded Reload + ld s1, 456(sp) # 8-byte Folded Reload + mv s4, s10 + mv s10, s9 + ld s6, 392(sp) # 8-byte Folded Reload + ld s9, 384(sp) # 8-byte Folded Reload + bnez a0, .LBB496_833 +# %bb.831: # %resizeOpArray.exit.if.end6_crit_edge.i.i1376 + # in Loop: Header=BB496_541 Depth=1 + ld a2, 256(sp) # 8-byte Folded Reload lw a0, 24(a2) -.LBB496_797: # %if.end6.i.i1378 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_832: # %if.end6.i.i1378 + # in Loop: Header=BB496_541 Depth=1 ld a1, 32(a2) addi a0, a0, 1 sw a0, 24(a2) @@ -116903,48 +117071,47 @@ add a0, a1, a0 li a1, 65 sh a1, 0(a0) + sw s9, 4(a0) ld a1, 408(sp) # 8-byte Folded Reload - sw a1, 4(a0) - ld a1, 400(sp) # 8-byte Folded Reload sw a1, 8(a0) sw zero, 12(a0) sd zero, 16(a0) sb zero, 339(a2) -.LBB496_798: # %land.lhs.true.lr.ph.i1404 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_833: # %land.lhs.true.lr.ph.i1404 + # in Loop: Header=BB496_541 Depth=1 lhu a0, 14(s3) andi a0, a0, 40 - sd a0, 384(sp) # 8-byte Folded Spill - ld s0, 272(sp) # 8-byte Folded Reload -.LBB496_799: # %land.lhs.true.i1406 - # Parent Loop BB496_542 Depth=1 + sd a0, 400(sp) # 8-byte Folded Spill + ld s0, 288(sp) # 8-byte Folded Reload +.LBB496_834: # %land.lhs.true.i1406 + # Parent Loop BB496_541 Depth=1 # => This Inner Loop Header: Depth=2 lbu a0, 16(s3) andi a1, a0, 4 li s2, 58 - bnez a1, .LBB496_804 -# %bb.800: # %land.lhs.true2.i1410 - # in Loop: Header=BB496_799 Depth=2 + bnez a1, .LBB496_839 +# %bb.835: # %land.lhs.true2.i1410 + # in Loop: Header=BB496_834 Depth=2 lw a1, 12(s0) - beqz a1, .LBB496_802 -# %bb.801: # %lor.lhs.false.i1412 - # in Loop: Header=BB496_799 Depth=2 + beqz a1, .LBB496_837 +# %bb.836: # %lor.lhs.false.i1412 + # in Loop: Header=BB496_834 Depth=2 ld a1, 0(s3) lbu a1, 2(a1) andi a1, a1, 1 - beqz a1, .LBB496_804 -.LBB496_802: # %if.then.i1415 - # in Loop: Header=BB496_799 Depth=2 + beqz a1, .LBB496_839 +.LBB496_837: # %if.then.i1415 + # in Loop: Header=BB496_834 Depth=2 lhu a1, 8(s3) ori a0, a0, 4 slli a2, a1, 48 sb a0, 16(s3) - bltz a2, .LBB496_804 -# %bb.803: # %if.then16.i1418 - # in Loop: Header=BB496_799 Depth=2 + bltz a2, .LBB496_839 +# %bb.838: # %if.then16.i1418 + # in Loop: Header=BB496_834 Depth=2 ld a0, 24(s3) ld a0, 24(a0) - mul s3, a1, s8 + mul s3, a1, s7 add s3, a0, s3 lbu a1, 17(s3) addi a1, a1, -1 @@ -116953,59 +117120,90 @@ seqz a0, a0 or a0, a0, a2 sb a1, 17(s3) - beqz a0, .LBB496_799 -.LBB496_804: # %if.then552 - # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_834 +.LBB496_839: # in Loop: Header=BB496_541 Depth=1 + ld s3, 496(sp) # 8-byte Folded Reload +.LBB496_840: # %if.then552 + # in Loop: Header=BB496_541 Depth=1 + mv s9, s10 ld a1, 416(sp) # 8-byte Folded Reload snez a0, a1 - or a0, a0, s9 + ld a2, 424(sp) # 8-byte Folded Reload + or a0, a0, a2 addw a1, a1, s4 - bnez a0, .LBB496_932 -# %bb.805: # %if.then558 - # in Loop: Header=BB496_542 Depth=1 - ld a4, 240(sp) # 8-byte Folded Reload + beqz a0, .LBB496_842 +# %bb.841: # in Loop: Header=BB496_541 Depth=1 + mv s10, s4 + j .LBB496_931 +.LBB496_842: # %if.then558 + # in Loop: Header=BB496_541 Depth=1 + ld a4, 256(sp) # 8-byte Folded Reload lw s0, 24(a4) lw s3, 28(a4) mv a0, s0 - blt s0, s3, .LBB496_930 -# %bb.806: # %if.then.i.i1432 - # in Loop: Header=BB496_542 Depth=1 - li s8, 1 - bnez s3, .LBB496_815 -# %bb.807: # %if.then.i.i1432 - # in Loop: Header=BB496_542 Depth=1 + blt s0, s3, .LBB496_929 +# %bb.843: # %if.then.i.i1432 + # in Loop: Header=BB496_541 Depth=1 + mv s10, s4 + li s4, 1 + bnez s3, .LBB496_855 +# %bb.844: # %if.then.i.i1432 + # in Loop: Header=BB496_541 Depth=1 li s5, 42 - j .LBB496_816 -.LBB496_808: # in Loop: Header=BB496_542 Depth=1 + j .LBB496_856 +.LBB496_845: # %if.then.i.i.i.i1191 + # in Loop: Header=BB496_541 Depth=1 + ld a0, 32(s9) + li a1, 24 + mulw a1, s4, a1 + call sqlite3_realloc + beqz a0, .LBB496_881 +# %bb.846: # %if.then.i.i.i1195 + # in Loop: Header=BB496_541 Depth=1 + sw s4, 28(s9) + sd a0, 32(s9) + bge s3, s4, .LBB496_814 +# %bb.847: # %if.then5.i.i.i1197 + # in Loop: Header=BB496_541 Depth=1 + li a2, 24 + mul a1, s3, a2 + add a0, a0, a1 + subw a1, s4, s3 + mul a2, a1, a2 + li a1, 0 + call memset@plt + j .LBB496_814 +.LBB496_848: # in Loop: Header=BB496_541 Depth=1 slliw s2, s1, 1 -.LBB496_809: # %if.then.i.i2219 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_849: # %if.then.i.i2219 + # in Loop: Header=BB496_541 Depth=1 ld s3, 0(s9) lbu a0, 42(s3) - beqz a0, .LBB496_820 -.LBB496_810: # %resizeOpArray.exit.i.i2226 - # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_865 +.LBB496_850: # %resizeOpArray.exit.i.i2226 + # in Loop: Header=BB496_541 Depth=1 ld a0, 0(s9) lbu a0, 42(a0) - beqz a0, .LBB496_823 -# %bb.811: # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_868 +# %bb.851: # in Loop: Header=BB496_541 Depth=1 li s0, 0 - ld s3, 488(sp) # 8-byte Folded Reload - j .LBB496_825 -.LBB496_812: # %if.then.i.i.i.i1389 - # in Loop: Header=BB496_542 Depth=1 + ld s2, 488(sp) # 8-byte Folded Reload + ld s3, 496(sp) # 8-byte Folded Reload + j .LBB496_870 +.LBB496_852: # %if.then.i.i.i.i1389 + # in Loop: Header=BB496_541 Depth=1 ld a0, 32(s1) li a1, 24 mulw a1, s5, a1 call sqlite3_realloc - beqz a0, .LBB496_924 -# %bb.813: # %if.then.i.i.i1393 - # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_923 +# %bb.853: # %if.then.i.i.i1393 + # in Loop: Header=BB496_541 Depth=1 sw s5, 28(s1) sd a0, 32(s1) - bge s2, s5, .LBB496_795 -# %bb.814: # %if.then5.i.i.i1395 - # in Loop: Header=BB496_542 Depth=1 + bge s2, s5, .LBB496_830 +# %bb.854: # %if.then5.i.i.i1395 + # in Loop: Header=BB496_541 Depth=1 li a2, 24 mul a1, s2, a2 add a0, a0, a1 @@ -117013,31 +117211,31 @@ mul a2, a1, a2 li a1, 0 call memset@plt - j .LBB496_795 -.LBB496_815: # in Loop: Header=BB496_542 Depth=1 + j .LBB496_830 +.LBB496_855: # in Loop: Header=BB496_541 Depth=1 slliw s5, s3, 1 -.LBB496_816: # %if.then.i.i1432 - # in Loop: Header=BB496_542 Depth=1 - ld s1, 240(sp) # 8-byte Folded Reload +.LBB496_856: # %if.then.i.i1432 + # in Loop: Header=BB496_541 Depth=1 + ld s1, 256(sp) # 8-byte Folded Reload ld s7, 0(s1) lbu a0, 42(s7) - bnez a0, .LBB496_928 -# %bb.817: # %if.then.i.i.i.i1456 - # in Loop: Header=BB496_542 Depth=1 + bnez a0, .LBB496_927 +# %bb.857: # %if.then.i.i.i.i1456 + # in Loop: Header=BB496_541 Depth=1 mv s6, a1 ld a0, 32(s1) li a1, 24 mulw a1, s5, a1 call sqlite3_realloc - beqz a0, .LBB496_926 -# %bb.818: # %if.then.i.i.i1460 - # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_925 +# %bb.858: # %if.then.i.i.i1460 + # in Loop: Header=BB496_541 Depth=1 sw s5, 28(s1) sd a0, 32(s1) mv a1, s6 - bge s3, s5, .LBB496_928 -# %bb.819: # %if.then5.i.i.i1462 - # in Loop: Header=BB496_542 Depth=1 + bge s3, s5, .LBB496_927 +# %bb.859: # %if.then5.i.i.i1462 + # in Loop: Header=BB496_541 Depth=1 li a2, 24 mul a1, s3, a2 add a0, a0, a1 @@ -117045,21 +117243,53 @@ mul a2, a1, a2 li a1, 0 call memset@plt - j .LBB496_927 -.LBB496_820: # %if.then.i.i.i.i2243 - # in Loop: Header=BB496_542 Depth=1 + j .LBB496_926 +.LBB496_860: # in Loop: Header=BB496_541 Depth=1 + slliw s7, s6, 1 +.LBB496_861: # %if.then.i.i2498 + # in Loop: Header=BB496_541 Depth=1 + ld s9, 0(s4) + lbu a1, 42(s9) + bnez a1, .LBB496_994 +# %bb.862: # %if.then.i.i.i.i2522 + # in Loop: Header=BB496_541 Depth=1 + mv s8, a0 + ld a0, 32(s4) + li a1, 24 + mulw a1, s7, a1 + call sqlite3_realloc + beqz a0, .LBB496_992 +# %bb.863: # %if.then.i.i.i2526 + # in Loop: Header=BB496_541 Depth=1 + mv a1, a0 + sw s7, 28(s4) + sd a0, 32(s4) + mv a0, s8 + bge s6, s7, .LBB496_994 +# %bb.864: # %if.then5.i.i.i2528 + # in Loop: Header=BB496_541 Depth=1 + li a2, 24 + mul a0, s6, a2 + add a0, a1, a0 + subw a1, s7, s6 + mul a2, a1, a2 + li a1, 0 + call memset@plt + j .LBB496_993 +.LBB496_865: # %if.then.i.i.i.i2243 + # in Loop: Header=BB496_541 Depth=1 ld a0, 32(s9) li a1, 24 mulw a1, s2, a1 call sqlite3_realloc - beqz a0, .LBB496_925 -# %bb.821: # %if.then.i.i.i2247 - # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_924 +# %bb.866: # %if.then.i.i.i2247 + # in Loop: Header=BB496_541 Depth=1 sw s2, 28(s9) sd a0, 32(s9) - bge s1, s2, .LBB496_810 -# %bb.822: # %if.then5.i.i.i2249 - # in Loop: Header=BB496_542 Depth=1 + bge s1, s2, .LBB496_850 +# %bb.867: # %if.then5.i.i.i2249 + # in Loop: Header=BB496_541 Depth=1 li a2, 24 mul a1, s1, a2 add a0, a0, a1 @@ -117067,14 +117297,14 @@ mul a2, a1, a2 li a1, 0 call memset@plt - j .LBB496_810 -.LBB496_823: # %resizeOpArray.exit.if.end6_crit_edge.i.i2230 - # in Loop: Header=BB496_542 Depth=1 + j .LBB496_850 +.LBB496_868: # %resizeOpArray.exit.if.end6_crit_edge.i.i2230 + # in Loop: Header=BB496_541 Depth=1 lw a0, 24(s9) - ld s3, 488(sp) # 8-byte Folded Reload - ld a2, 496(sp) # 8-byte Folded Reload -.LBB496_824: # %if.end6.i.i2232 - # in Loop: Header=BB496_542 Depth=1 + ld s2, 488(sp) # 8-byte Folded Reload + ld s3, 496(sp) # 8-byte Folded Reload +.LBB496_869: # %if.end6.i.i2232 + # in Loop: Header=BB496_541 Depth=1 ld a1, 32(s9) addi a0, a0, 1 sw a0, 24(s9) @@ -117083,376 +117313,81 @@ add a0, a1, a0 li a1, 115 sh a1, 0(a0) - sw a2, 4(a0) + sw s3, 4(a0) ld a1, 472(sp) # 8-byte Folded Reload sw a1, 8(a0) sw zero, 12(a0) sd zero, 16(a0) sb zero, 339(s9) -.LBB496_825: # %sqlite3VdbeAddOp2.exit2256 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_870: # %sqlite3VdbeAddOp2.exit2256 + # in Loop: Header=BB496_541 Depth=1 addi s0, s0, 1 - ld a0, 272(sp) # 8-byte Folded Reload + ld a0, 288(sp) # 8-byte Folded Reload sw s0, 56(a0) - j .LBB496_751 -.LBB496_826: # %if.then2.i.i.i1084 - # in Loop: Header=BB496_542 Depth=1 + j .LBB496_769 +.LBB496_871: # %if.then2.i.i.i1084 + # in Loop: Header=BB496_541 Depth=1 li a0, 1 sb a0, 42(s8) -.LBB496_827: # %resizeOpArray.exit.i1054 - # in Loop: Header=BB496_542 Depth=1 - ld a5, 448(sp) # 8-byte Folded Reload -.LBB496_828: # %resizeOpArray.exit.i1054 - # in Loop: Header=BB496_542 Depth=1 - ld a0, 0(s1) - lbu a0, 42(a0) - lw s0, 24(s1) - li s8, 48 - bnez a0, .LBB496_830 -.LBB496_829: # %if.end6.i1061 - # in Loop: Header=BB496_542 Depth=1 - addi a0, s6, -69 - addi s0, s0, 1 - sw s0, 24(s1) - ld a1, 32(s1) - andi a0, a0, 255 - sltiu a0, a0, 2 - li a2, 24 - mul a2, s5, a2 - add a1, a1, a2 - li a2, 107 - sh a2, 0(a1) - sw s9, 4(a1) - ld a2, 472(sp) # 8-byte Folded Reload - sw a2, 8(a1) - sw a0, 12(a1) - sd zero, 16(a1) - lw s0, 24(s1) - sb zero, 339(s1) -.LBB496_830: # %sqlite3VdbeAddOp3.exit1085 - # in Loop: Header=BB496_542 Depth=1 - lw s5, 28(s1) - mv a0, s0 - ld s7, 480(sp) # 8-byte Folded Reload - blt s0, s5, .LBB496_842 -# %bb.831: # %if.then.i1089 - # in Loop: Header=BB496_542 Depth=1 - bnez s5, .LBB496_833 -# %bb.832: # %if.then.i1089 - # in Loop: Header=BB496_542 Depth=1 - li s6, 42 - j .LBB496_834 -.LBB496_833: # in Loop: Header=BB496_542 Depth=1 - slliw s6, s5, 1 -.LBB496_834: # %if.then.i1089 - # in Loop: Header=BB496_542 Depth=1 - ld s1, 240(sp) # 8-byte Folded Reload - ld s7, 0(s1) - lbu a0, 42(s7) - bnez a0, .LBB496_840 -# %bb.835: # %if.then.i.i.i1114 - # in Loop: Header=BB496_542 Depth=1 - ld a0, 32(s1) - li a1, 24 - mulw a1, s6, a1 - call sqlite3_realloc - beqz a0, .LBB496_838 -# %bb.836: # %if.then.i.i1118 - # in Loop: Header=BB496_542 Depth=1 - sw s6, 28(s1) - sd a0, 32(s1) - ld a5, 448(sp) # 8-byte Folded Reload - bge s5, s6, .LBB496_840 -# %bb.837: # %if.then5.i.i1120 - # in Loop: Header=BB496_542 Depth=1 - li a2, 24 - mul a1, s5, a2 - add a0, a0, a1 - subw a1, s6, s5 - mul a2, a1, a2 - li a1, 0 - call memset@plt - j .LBB496_839 -.LBB496_838: # %if.then2.i.i.i1126 - # in Loop: Header=BB496_542 Depth=1 + j .LBB496_729 +.LBB496_872: # %if.then2.i.i.i1126 + # in Loop: Header=BB496_541 Depth=1 li a0, 1 sb a0, 42(s7) -.LBB496_839: # %resizeOpArray.exit.i1096 - # in Loop: Header=BB496_542 Depth=1 - ld a5, 448(sp) # 8-byte Folded Reload -.LBB496_840: # %resizeOpArray.exit.i1096 - # in Loop: Header=BB496_542 Depth=1 - ld a0, 0(s1) - lbu a0, 42(a0) - ld s5, 344(sp) # 8-byte Folded Reload - ld s7, 480(sp) # 8-byte Folded Reload - ld s1, 496(sp) # 8-byte Folded Reload - bnez a0, .LBB496_845 -# %bb.841: # %resizeOpArray.exit.if.end6_crit_edge.i1101 - # in Loop: Header=BB496_542 Depth=1 - ld s1, 240(sp) # 8-byte Folded Reload - lw a0, 24(s1) -.LBB496_842: # %if.end6.i1103 - # in Loop: Header=BB496_542 Depth=1 - addi a0, a0, 1 - sw a0, 24(s1) - li a0, 94 - bnez a5, .LBB496_844 -# %bb.843: # %if.end6.i1103 - # in Loop: Header=BB496_542 Depth=1 - li a0, 116 -.LBB496_844: # %if.end6.i1103 - # in Loop: Header=BB496_542 Depth=1 - ld a3, 240(sp) # 8-byte Folded Reload - ld a1, 32(a3) - li a2, 24 - mul a2, s0, a2 - add a1, a1, a2 - sb a0, 0(a1) - ld s1, 496(sp) # 8-byte Folded Reload - sw s1, 4(a1) - ld a0, 472(sp) # 8-byte Folded Reload - sw a0, 8(a1) - sw s9, 12(a1) - sd zero, 16(a1) - sb zero, 1(a1) - sb zero, 339(a3) - ld s5, 344(sp) # 8-byte Folded Reload -.LBB496_845: # %sqlite3VdbeAddOp3.exit1127 - # in Loop: Header=BB496_542 Depth=1 - beqz s3, .LBB496_848 -# %bb.846: # %land.lhs.true.i1129 - # in Loop: Header=BB496_542 Depth=1 - lbu a0, 37(s5) - li a1, 7 - bltu a1, a0, .LBB496_848 -# %bb.847: # %if.then.i1133 - # in Loop: Header=BB496_542 Depth=1 - addi a1, a0, 1 - sb a1, 37(s5) - slli a0, a0, 2 - add a0, s5, a0 - sw s3, 40(a0) -.LBB496_848: # %land.lhs.true.lr.ph.i1139 - # in Loop: Header=BB496_542 Depth=1 - ld s9, 240(sp) # 8-byte Folded Reload - li s6, 1 -.LBB496_849: # %land.lhs.true.i1141 - # Parent Loop BB496_542 Depth=1 - # => This Inner Loop Header: Depth=2 - lbu a0, 16(s4) - andi a1, a0, 4 - bnez a1, .LBB496_869 -# %bb.850: # %land.lhs.true2.i1145 - # in Loop: Header=BB496_849 Depth=2 - ld a1, 272(sp) # 8-byte Folded Reload - lw a1, 12(a1) - beqz a1, .LBB496_852 -# %bb.851: # %lor.lhs.false.i1147 - # in Loop: Header=BB496_849 Depth=2 - ld a1, 0(s4) - lbu a1, 2(a1) - andi a1, a1, 1 - beqz a1, .LBB496_869 -.LBB496_852: # %if.then.i1150 - # in Loop: Header=BB496_849 Depth=2 - lhu a1, 8(s4) - ori a0, a0, 4 - slli a2, a1, 48 - sb a0, 16(s4) - bltz a2, .LBB496_869 -# %bb.853: # %if.then16.i1153 - # in Loop: Header=BB496_849 Depth=2 - ld a0, 24(s4) - ld a0, 24(a0) - mul s4, a1, s8 - add s4, a0, s4 - lbu a1, 17(s4) - addi a1, a1, -1 - andi a2, a1, 255 - snez a2, a2 - seqz a0, a0 - or a0, a0, a2 - sb a1, 17(s4) - beqz a0, .LBB496_849 - j .LBB496_869 -.LBB496_854: # in Loop: Header=BB496_542 Depth=1 + j .LBB496_736 +.LBB496_873: # in Loop: Header=BB496_541 Depth=1 slliw s3, s2, 1 -.LBB496_855: # %if.then.i2020 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_874: # %if.then.i2020 + # in Loop: Header=BB496_541 Depth=1 ld s4, 0(s9) lbu a0, 42(s4) - beqz a0, .LBB496_883 -.LBB496_856: # %resizeOpArray.exit.i2027 - # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_882 +.LBB496_875: # %resizeOpArray.exit.i2027 + # in Loop: Header=BB496_541 Depth=1 ld a0, 0(s9) lbu a0, 42(a0) - beqz a0, .LBB496_886 -# %bb.857: # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_885 +# %bb.876: # in Loop: Header=BB496_541 Depth=1 li s1, 0 li a0, 47 - ld a3, 272(sp) # 8-byte Folded Reload - ld s3, 488(sp) # 8-byte Folded Reload - ld s4, 392(sp) # 8-byte Folded Reload - j .LBB496_895 -.LBB496_858: # in Loop: Header=BB496_542 Depth=1 + ld a3, 288(sp) # 8-byte Folded Reload + ld s3, 496(sp) # 8-byte Folded Reload + ld a5, 432(sp) # 8-byte Folded Reload + j .LBB496_894 +.LBB496_877: # in Loop: Header=BB496_541 Depth=1 slliw s3, s2, 1 -.LBB496_859: # %if.then.i2062 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_878: # %if.then.i2062 + # in Loop: Header=BB496_541 Depth=1 ld s4, 0(s9) lbu a0, 42(s4) - beqz a0, .LBB496_888 -.LBB496_860: # %resizeOpArray.exit.i2069 - # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_887 +.LBB496_879: # %resizeOpArray.exit.i2069 + # in Loop: Header=BB496_541 Depth=1 ld a0, 0(s9) lbu a0, 42(a0) - beqz a0, .LBB496_891 -# %bb.861: # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_890 +# %bb.880: # in Loop: Header=BB496_541 Depth=1 li s1, 0 - ld s3, 488(sp) # 8-byte Folded Reload - ld s4, 392(sp) # 8-byte Folded Reload - j .LBB496_893 -.LBB496_862: # %if.then2.i.i.i.i1203 - # in Loop: Header=BB496_542 Depth=1 + ld s3, 496(sp) # 8-byte Folded Reload + j .LBB496_892 +.LBB496_881: # %if.then2.i.i.i.i1203 + # in Loop: Header=BB496_541 Depth=1 sb s6, 42(s5) -.LBB496_863: # %resizeOpArray.exit.i.i1174 - # in Loop: Header=BB496_542 Depth=1 - ld a5, 448(sp) # 8-byte Folded Reload -.LBB496_864: # %resizeOpArray.exit.i.i1174 - # in Loop: Header=BB496_542 Depth=1 - ld a0, 0(s9) - lbu a0, 42(a0) - ld s5, 344(sp) # 8-byte Folded Reload - bnez a0, .LBB496_869 -# %bb.865: # %resizeOpArray.exit.if.end6_crit_edge.i.i1178 - # in Loop: Header=BB496_542 Depth=1 - lw a0, 24(s9) -.LBB496_866: # %if.end6.i.i1180 - # in Loop: Header=BB496_542 Depth=1 - addi a0, a0, 1 - sw a0, 24(s9) - li a0, 50 - bnez a5, .LBB496_868 -# %bb.867: # %if.end6.i.i1180 - # in Loop: Header=BB496_542 Depth=1 - li a0, 115 -.LBB496_868: # %if.end6.i.i1180 - # in Loop: Header=BB496_542 Depth=1 - ld a1, 32(s9) - li a2, 24 - mul a2, s0, a2 - add a1, a1, a2 - sb a0, 0(a1) - sw s1, 4(a1) - ld a0, 472(sp) # 8-byte Folded Reload - sw a0, 8(a1) - sw zero, 12(a1) - sd zero, 16(a1) - sb zero, 1(a1) - sb zero, 339(s9) -.LBB496_869: # %if.end433 - # in Loop: Header=BB496_542 Depth=1 - beqz s2, .LBB496_875 -# %bb.870: # %if.then435 - # in Loop: Header=BB496_542 Depth=1 - li s1, 1 - lw s3, 88(s5) - ld s0, 0(s2) - addiw s3, s3, 1 - sw s3, 88(s5) - ld a0, 272(sp) # 8-byte Folded Reload - sw s3, 8(a0) - ld a1, 24(s0) - mv a0, s5 - mv a2, s3 - call sqlite3ExprCodeTarget - bne a0, s3, .LBB496_871 - j .LBB496_1108 -.LBB496_871: # %land.lhs.true.i1207 - # in Loop: Header=BB496_542 Depth=1 - ld a1, 344(sp) # 8-byte Folded Reload - ld s4, 24(a1) - bnez s4, .LBB496_872 - j .LBB496_1108 -.LBB496_872: # %if.then.i1210 - # in Loop: Header=BB496_542 Depth=1 - lw s5, 24(s4) - lw s6, 28(s4) - mv a1, s5 - bge s5, s6, .LBB496_873 - j .LBB496_1107 -.LBB496_873: # %if.then.i.i2498 - # in Loop: Header=BB496_542 Depth=1 - bnez s6, .LBB496_878 -# %bb.874: # %if.then.i.i2498 - # in Loop: Header=BB496_542 Depth=1 - li s7, 42 - j .LBB496_879 -.LBB496_875: # %if.end459 - # in Loop: Header=BB496_542 Depth=1 - li a0, 47 - bnez a5, .LBB496_877 -# %bb.876: # %if.end459 - # in Loop: Header=BB496_542 Depth=1 - li a0, 102 -.LBB496_877: # %if.end459 - # in Loop: Header=BB496_542 Depth=1 - lw a1, 24(s9) - ld a2, 272(sp) # 8-byte Folded Reload - sw a0, 48(a2) - sw s1, 52(a2) - sw a1, 56(a2) - j .LBB496_750 -.LBB496_878: # in Loop: Header=BB496_542 Depth=1 - slliw s7, s6, 1 -.LBB496_879: # %if.then.i.i2498 - # in Loop: Header=BB496_542 Depth=1 - ld s9, 0(s4) - lbu a1, 42(s9) - beqz a1, .LBB496_880 - j .LBB496_1105 -.LBB496_880: # %if.then.i.i.i.i2522 - # in Loop: Header=BB496_542 Depth=1 - mv s8, a0 - ld a0, 32(s4) - li a1, 24 - mulw a1, s7, a1 - call sqlite3_realloc - bnez a0, .LBB496_881 - j .LBB496_1103 -.LBB496_881: # %if.then.i.i.i2526 - # in Loop: Header=BB496_542 Depth=1 - mv a1, a0 - sw s7, 28(s4) - sd a0, 32(s4) - mv a0, s8 - blt s6, s7, .LBB496_882 - j .LBB496_1105 -.LBB496_882: # %if.then5.i.i.i2528 - # in Loop: Header=BB496_542 Depth=1 - li a2, 24 - mul a0, s6, a2 - add a0, a1, a0 - subw a1, s7, s6 - mul a2, a1, a2 - li a1, 0 - call memset@plt - j .LBB496_1104 -.LBB496_883: # %if.then.i.i.i2045 - # in Loop: Header=BB496_542 Depth=1 + j .LBB496_814 +.LBB496_882: # %if.then.i.i.i2045 + # in Loop: Header=BB496_541 Depth=1 ld a0, 32(s9) li a1, 24 mulw a1, s3, a1 call sqlite3_realloc - bnez a0, .LBB496_884 - j .LBB496_1156 -.LBB496_884: # %if.then.i.i2049 - # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_1045 +# %bb.883: # %if.then.i.i2049 + # in Loop: Header=BB496_541 Depth=1 sw s3, 28(s9) sd a0, 32(s9) - bge s2, s3, .LBB496_856 -# %bb.885: # %if.then5.i.i2051 - # in Loop: Header=BB496_542 Depth=1 + bge s2, s3, .LBB496_875 +# %bb.884: # %if.then5.i.i2051 + # in Loop: Header=BB496_541 Depth=1 li a2, 24 mul a1, s2, a2 add a0, a0, a1 @@ -117460,14 +117395,14 @@ mul a2, a1, a2 li a1, 0 call memset@plt - j .LBB496_856 -.LBB496_886: # %resizeOpArray.exit.if.end6_crit_edge.i2032 - # in Loop: Header=BB496_542 Depth=1 + j .LBB496_875 +.LBB496_885: # %resizeOpArray.exit.if.end6_crit_edge.i2032 + # in Loop: Header=BB496_541 Depth=1 lw a0, 24(s9) - ld s3, 488(sp) # 8-byte Folded Reload - ld s4, 392(sp) # 8-byte Folded Reload -.LBB496_887: # %if.end6.i2034 - # in Loop: Header=BB496_542 Depth=1 + ld s3, 496(sp) # 8-byte Folded Reload + mv s4, s10 +.LBB496_886: # %if.end6.i2034 + # in Loop: Header=BB496_541 Depth=1 ld a1, 32(s9) addi a0, a0, 1 sw a0, 24(s9) @@ -117478,29 +117413,28 @@ sh a1, 0(a0) ld a1, 464(sp) # 8-byte Folded Reload sw a1, 4(a0) - ld a1, 472(sp) # 8-byte Folded Reload - sw a1, 8(a0) + sw s4, 8(a0) sw s0, 12(a0) sd zero, 16(a0) sb zero, 339(s9) li a0, 47 - ld a3, 272(sp) # 8-byte Folded Reload - j .LBB496_895 -.LBB496_888: # %if.then.i.i.i2087 - # in Loop: Header=BB496_542 Depth=1 + ld a3, 288(sp) # 8-byte Folded Reload + ld a5, 432(sp) # 8-byte Folded Reload + j .LBB496_894 +.LBB496_887: # %if.then.i.i.i2087 + # in Loop: Header=BB496_541 Depth=1 ld a0, 32(s9) li a1, 24 mulw a1, s3, a1 call sqlite3_realloc - bnez a0, .LBB496_889 - j .LBB496_1157 -.LBB496_889: # %if.then.i.i2091 - # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_1046 +# %bb.888: # %if.then.i.i2091 + # in Loop: Header=BB496_541 Depth=1 sw s3, 28(s9) sd a0, 32(s9) - bge s2, s3, .LBB496_860 -# %bb.890: # %if.then5.i.i2093 - # in Loop: Header=BB496_542 Depth=1 + bge s2, s3, .LBB496_879 +# %bb.889: # %if.then5.i.i2093 + # in Loop: Header=BB496_541 Depth=1 li a2, 24 mul a1, s2, a2 add a0, a0, a1 @@ -117508,14 +117442,14 @@ mul a2, a1, a2 li a1, 0 call memset@plt - j .LBB496_860 -.LBB496_891: # %resizeOpArray.exit.if.end6_crit_edge.i2074 - # in Loop: Header=BB496_542 Depth=1 + j .LBB496_879 +.LBB496_890: # %resizeOpArray.exit.if.end6_crit_edge.i2074 + # in Loop: Header=BB496_541 Depth=1 lw a0, 24(s9) - ld s3, 488(sp) # 8-byte Folded Reload - ld s4, 392(sp) # 8-byte Folded Reload -.LBB496_892: # %if.end6.i2076 - # in Loop: Header=BB496_542 Depth=1 + ld s3, 496(sp) # 8-byte Folded Reload + mv s4, s10 +.LBB496_891: # %if.end6.i2076 + # in Loop: Header=BB496_541 Depth=1 ld a1, 32(s9) addi a0, a0, 1 sw a0, 24(s9) @@ -117526,76 +117460,76 @@ sh a1, 0(a0) ld a1, 464(sp) # 8-byte Folded Reload sw a1, 4(a0) - ld a1, 472(sp) # 8-byte Folded Reload - sw a1, 8(a0) + sw s4, 8(a0) sw s0, 12(a0) sd zero, 16(a0) sb zero, 339(s9) -.LBB496_893: # %land.lhs.true.i2102 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_892: # %land.lhs.true.i2102 + # in Loop: Header=BB496_541 Depth=1 ld a1, 32(s9) li a0, 102 - ld a3, 272(sp) # 8-byte Folded Reload - beqz a1, .LBB496_895 -# %bb.894: # %if.then.i2105 - # in Loop: Header=BB496_542 Depth=1 + ld a3, 288(sp) # 8-byte Folded Reload + ld a5, 432(sp) # 8-byte Folded Reload + beqz a1, .LBB496_894 +# %bb.893: # %if.then.i2105 + # in Loop: Header=BB496_541 Depth=1 lw a2, 24(s9) addiw a2, a2, -1 li a4, 24 mul a2, a2, a4 add a1, a1, a2 sb s6, 3(a1) -.LBB496_895: # %if.end734 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_894: # %if.end734 + # in Loop: Header=BB496_541 Depth=1 sw a0, 48(a3) - bnez s4, .LBB496_917 -# %bb.896: # %if.then736 - # in Loop: Header=BB496_542 Depth=1 - lbu a0, 37(s5) - beqz a0, .LBB496_898 -# %bb.897: # %if.then.i2114 - # in Loop: Header=BB496_542 Depth=1 + bnez a5, .LBB496_916 +# %bb.895: # %if.then736 + # in Loop: Header=BB496_541 Depth=1 + lbu a0, 37(s8) + beqz a0, .LBB496_897 +# %bb.896: # %if.then.i2114 + # in Loop: Header=BB496_541 Depth=1 addi a0, a0, -1 andi a1, a0, 255 slli a1, a1, 2 - add a1, s5, a1 + add a1, s8, a1 lw s2, 40(a1) - sb a0, 37(s5) - j .LBB496_899 -.LBB496_898: # %if.else.i2119 - # in Loop: Header=BB496_542 Depth=1 - lw s2, 88(s5) + sb a0, 37(s8) + j .LBB496_898 +.LBB496_897: # %if.else.i2119 + # in Loop: Header=BB496_541 Depth=1 + lw s2, 88(s8) addiw s2, s2, 1 - sw s2, 88(s5) -.LBB496_899: # %sqlite3GetTempReg.exit2122 - # in Loop: Header=BB496_542 Depth=1 + sw s2, 88(s8) +.LBB496_898: # %sqlite3GetTempReg.exit2122 + # in Loop: Header=BB496_541 Depth=1 lw s3, 24(s9) lw s4, 28(s9) mv s0, s3 - blt s3, s4, .LBB496_905 + blt s3, s4, .LBB496_904 +# %bb.899: # %if.then.i.i2126 + # in Loop: Header=BB496_541 Depth=1 + bnez s4, .LBB496_901 # %bb.900: # %if.then.i.i2126 - # in Loop: Header=BB496_542 Depth=1 - bnez s4, .LBB496_902 -# %bb.901: # %if.then.i.i2126 - # in Loop: Header=BB496_542 Depth=1 + # in Loop: Header=BB496_541 Depth=1 li s0, 42 - j .LBB496_903 -.LBB496_902: # in Loop: Header=BB496_542 Depth=1 + j .LBB496_902 +.LBB496_901: # in Loop: Header=BB496_541 Depth=1 slliw s0, s4, 1 -.LBB496_903: # %if.then.i.i2126 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_902: # %if.then.i.i2126 + # in Loop: Header=BB496_541 Depth=1 ld s5, 0(s9) lbu a0, 42(s5) - beqz a0, .LBB496_918 -.LBB496_904: # %resizeOpArray.exit.i.i2133 - # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_917 +.LBB496_903: # %resizeOpArray.exit.i.i2133 + # in Loop: Header=BB496_541 Depth=1 ld a0, 0(s9) lbu a0, 42(a0) lw s0, 24(s9) - ld s5, 344(sp) # 8-byte Folded Reload - bnez a0, .LBB496_906 -.LBB496_905: # %if.end6.i.i2139 - # in Loop: Header=BB496_542 Depth=1 + ld s5, 480(sp) # 8-byte Folded Reload + bnez a0, .LBB496_905 +.LBB496_904: # %if.end6.i.i2139 + # in Loop: Header=BB496_541 Depth=1 ld a0, 32(s9) addi s0, s0, 1 sw s0, 24(s9) @@ -117611,36 +117545,37 @@ sd zero, 16(a0) lw s0, 24(s9) sb zero, 339(s9) -.LBB496_906: # %sqlite3VdbeAddOp2.exit2163 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_905: # %sqlite3VdbeAddOp2.exit2163 + # in Loop: Header=BB496_541 Depth=1 lw s3, 28(s9) mv a0, s0 - blt s0, s3, .LBB496_913 + blt s0, s3, .LBB496_912 +# %bb.906: # %if.then.i2167 + # in Loop: Header=BB496_541 Depth=1 + bnez s3, .LBB496_908 # %bb.907: # %if.then.i2167 - # in Loop: Header=BB496_542 Depth=1 - bnez s3, .LBB496_909 -# %bb.908: # %if.then.i2167 - # in Loop: Header=BB496_542 Depth=1 + # in Loop: Header=BB496_541 Depth=1 li s4, 42 - j .LBB496_910 -.LBB496_909: # in Loop: Header=BB496_542 Depth=1 + j .LBB496_909 +.LBB496_908: # in Loop: Header=BB496_541 Depth=1 slliw s4, s3, 1 -.LBB496_910: # %if.then.i2167 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_909: # %if.then.i2167 + # in Loop: Header=BB496_541 Depth=1 ld s5, 0(s9) lbu a0, 42(s5) - beqz a0, .LBB496_921 -.LBB496_911: # %resizeOpArray.exit.i2174 - # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_920 +.LBB496_910: # %resizeOpArray.exit.i2174 + # in Loop: Header=BB496_541 Depth=1 ld a0, 0(s9) lbu a0, 42(a0) - ld s5, 344(sp) # 8-byte Folded Reload - bnez a0, .LBB496_914 -# %bb.912: # %resizeOpArray.exit.if.end6_crit_edge.i2179 - # in Loop: Header=BB496_542 Depth=1 + ld s5, 480(sp) # 8-byte Folded Reload + ld s3, 496(sp) # 8-byte Folded Reload + bnez a0, .LBB496_913 +# %bb.911: # %resizeOpArray.exit.if.end6_crit_edge.i2179 + # in Loop: Header=BB496_541 Depth=1 lw a0, 24(s9) -.LBB496_913: # %if.end6.i2181 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_912: # %if.end6.i2181 + # in Loop: Header=BB496_541 Depth=1 ld a1, 32(s9) addi a0, a0, 1 sw a0, 24(s9) @@ -117649,50 +117584,49 @@ add a0, a1, a0 li a1, 116 sh a1, 0(a0) - ld a1, 496(sp) # 8-byte Folded Reload - sw a1, 4(a0) + ld s3, 496(sp) # 8-byte Folded Reload + sw s3, 4(a0) sw zero, 8(a0) sw s2, 12(a0) sd zero, 16(a0) sb zero, 339(s9) -.LBB496_914: # %sqlite3VdbeAddOp3.exit2205 - # in Loop: Header=BB496_542 Depth=1 - ld a3, 272(sp) # 8-byte Folded Reload - ld s3, 488(sp) # 8-byte Folded Reload - beqz s2, .LBB496_917 -# %bb.915: # %land.lhs.true.i2207 - # in Loop: Header=BB496_542 Depth=1 - lbu a0, 37(s5) +.LBB496_913: # %sqlite3VdbeAddOp3.exit2205 + # in Loop: Header=BB496_541 Depth=1 + ld a3, 288(sp) # 8-byte Folded Reload + beqz s2, .LBB496_916 +# %bb.914: # %land.lhs.true.i2207 + # in Loop: Header=BB496_541 Depth=1 + lbu a0, 37(s8) li a1, 7 - bltu a1, a0, .LBB496_917 -# %bb.916: # %if.then.i2211 - # in Loop: Header=BB496_542 Depth=1 + bltu a1, a0, .LBB496_916 +# %bb.915: # %if.then.i2211 + # in Loop: Header=BB496_541 Depth=1 addi a1, a0, 1 - sb a1, 37(s5) + sb a1, 37(s8) slli a0, a0, 2 - add a0, s5, a0 + add a0, s8, a0 sw s2, 40(a0) -.LBB496_917: # %if.end740 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_916: # %if.end740 + # in Loop: Header=BB496_541 Depth=1 ld a0, 464(sp) # 8-byte Folded Reload sw a0, 52(a3) sw s1, 56(a3) - j .LBB496_751 -.LBB496_918: # %if.then.i.i.i.i2150 - # in Loop: Header=BB496_542 Depth=1 + ld s2, 488(sp) # 8-byte Folded Reload + j .LBB496_769 +.LBB496_917: # %if.then.i.i.i.i2150 + # in Loop: Header=BB496_541 Depth=1 ld a0, 32(s9) li a1, 24 mulw a1, s0, a1 call sqlite3_realloc - bnez a0, .LBB496_919 - j .LBB496_1158 -.LBB496_919: # %if.then.i.i.i2154 - # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_1047 +# %bb.918: # %if.then.i.i.i2154 + # in Loop: Header=BB496_541 Depth=1 sw s0, 28(s9) sd a0, 32(s9) - bge s4, s0, .LBB496_904 -# %bb.920: # %if.then5.i.i.i2156 - # in Loop: Header=BB496_542 Depth=1 + bge s4, s0, .LBB496_903 +# %bb.919: # %if.then5.i.i.i2156 + # in Loop: Header=BB496_541 Depth=1 li a2, 24 mul a1, s4, a2 add a0, a0, a1 @@ -117700,22 +117634,21 @@ mul a2, a1, a2 li a1, 0 call memset@plt - j .LBB496_904 -.LBB496_921: # %if.then.i.i.i2192 - # in Loop: Header=BB496_542 Depth=1 + j .LBB496_903 +.LBB496_920: # %if.then.i.i.i2192 + # in Loop: Header=BB496_541 Depth=1 ld a0, 32(s9) li a1, 24 mulw a1, s4, a1 call sqlite3_realloc - bnez a0, .LBB496_922 - j .LBB496_1159 -.LBB496_922: # %if.then.i.i2196 - # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_1048 +# %bb.921: # %if.then.i.i2196 + # in Loop: Header=BB496_541 Depth=1 sw s4, 28(s9) sd a0, 32(s9) - bge s3, s4, .LBB496_911 -# %bb.923: # %if.then5.i.i2198 - # in Loop: Header=BB496_542 Depth=1 + bge s3, s4, .LBB496_910 +# %bb.922: # %if.then5.i.i2198 + # in Loop: Header=BB496_541 Depth=1 li a2, 24 mul a1, s3, a2 add a0, a0, a1 @@ -117723,41 +117656,42 @@ mul a2, a1, a2 li a1, 0 call memset@plt - j .LBB496_911 -.LBB496_924: # %if.then2.i.i.i.i1401 - # in Loop: Header=BB496_542 Depth=1 - sb s7, 42(s6) - j .LBB496_795 -.LBB496_925: # %if.then2.i.i.i.i2255 - # in Loop: Header=BB496_542 Depth=1 + j .LBB496_910 +.LBB496_923: # %if.then2.i.i.i.i1401 + # in Loop: Header=BB496_541 Depth=1 + sb s4, 42(s6) + j .LBB496_830 +.LBB496_924: # %if.then2.i.i.i.i2255 + # in Loop: Header=BB496_541 Depth=1 sb s6, 42(s3) - j .LBB496_810 -.LBB496_926: # %if.then2.i.i.i.i1468 - # in Loop: Header=BB496_542 Depth=1 - sb s8, 42(s7) -.LBB496_927: # %resizeOpArray.exit.i.i1439 - # in Loop: Header=BB496_542 Depth=1 + j .LBB496_850 +.LBB496_925: # %if.then2.i.i.i.i1468 + # in Loop: Header=BB496_541 Depth=1 + sb s4, 42(s7) +.LBB496_926: # %resizeOpArray.exit.i.i1439 + # in Loop: Header=BB496_541 Depth=1 mv a1, s6 -.LBB496_928: # %resizeOpArray.exit.i.i1439 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_927: # %resizeOpArray.exit.i.i1439 + # in Loop: Header=BB496_541 Depth=1 ld a0, 0(s1) lbu a0, 42(a0) - ld s5, 344(sp) # 8-byte Folded Reload - ld s7, 480(sp) # 8-byte Folded Reload - ld s1, 496(sp) # 8-byte Folded Reload - ld s6, 424(sp) # 8-byte Folded Reload - bnez a0, .LBB496_931 -# %bb.929: # %resizeOpArray.exit.if.end6_crit_edge.i.i1443 - # in Loop: Header=BB496_542 Depth=1 - ld a4, 240(sp) # 8-byte Folded Reload + li s7, 48 + ld s5, 480(sp) # 8-byte Folded Reload + ld s1, 456(sp) # 8-byte Folded Reload + ld s6, 392(sp) # 8-byte Folded Reload + bnez a0, .LBB496_930 +# %bb.928: # %resizeOpArray.exit.if.end6_crit_edge.i.i1443 + # in Loop: Header=BB496_541 Depth=1 + ld a4, 256(sp) # 8-byte Folded Reload lw a0, 24(a4) -.LBB496_930: # %if.end6.i.i1445 - # in Loop: Header=BB496_542 Depth=1 + mv s4, s10 +.LBB496_929: # %if.end6.i.i1445 + # in Loop: Header=BB496_541 Depth=1 + mv s10, s4 addi a0, a0, 1 ld a2, 32(a4) sw a0, 24(a4) - ld a0, 432(sp) # 8-byte Folded Reload - add a0, a1, a0 + add a0, a1, s6 li a3, 24 mul a3, s0, a3 add a2, a2, a3 @@ -117768,61 +117702,76 @@ sw zero, 12(a2) sd zero, 16(a2) sb zero, 339(a4) -.LBB496_931: # %sqlite3VdbeAddOp2.exit1469 - # in Loop: Header=BB496_542 Depth=1 - sd zero, 384(sp) # 8-byte Folded Spill +.LBB496_930: # %sqlite3VdbeAddOp2.exit1469 + # in Loop: Header=BB496_541 Depth=1 + sd zero, 400(sp) # 8-byte Folded Spill addiw a1, a1, 1 - ld s0, 272(sp) # 8-byte Folded Reload -.LBB496_932: # %if.end562 - # in Loop: Header=BB496_542 Depth=1 + ld s0, 288(sp) # 8-byte Folded Reload + ld s3, 496(sp) # 8-byte Folded Reload +.LBB496_931: # %if.end562 + # in Loop: Header=BB496_541 Depth=1 lw a4, 8(s0) - ld s8, 240(sp) # 8-byte Folded Reload - mv a0, s8 - ld a2, 456(sp) # 8-byte Folded Reload - ld a3, 432(sp) # 8-byte Folded Reload + ld s4, 256(sp) # 8-byte Folded Reload + mv a0, s4 + ld a2, 440(sp) # 8-byte Folded Reload + mv a3, s6 call buildIndexProbe - ld a4, 448(sp) # 8-byte Folded Reload - beqz a4, .LBB496_936 -# %bb.933: # %if.then565 - # in Loop: Header=BB496_542 Depth=1 - lw s3, 24(s8) - lw s5, 28(s8) + beqz s1, .LBB496_935 +# %bb.932: # %if.then565 + # in Loop: Header=BB496_541 Depth=1 + lw s3, 24(s4) + lw s5, 28(s4) lw s0, 8(s0) mv a0, s3 - blt s3, s5, .LBB496_947 + blt s3, s5, .LBB496_944 +# %bb.933: # %if.then.i1473 + # in Loop: Header=BB496_541 Depth=1 + bnez s5, .LBB496_936 # %bb.934: # %if.then.i1473 - # in Loop: Header=BB496_542 Depth=1 - bnez s5, .LBB496_937 -# %bb.935: # %if.then.i1473 - # in Loop: Header=BB496_542 Depth=1 + # in Loop: Header=BB496_541 Depth=1 li s6, 42 - j .LBB496_938 -.LBB496_936: # in Loop: Header=BB496_542 Depth=1 - li s8, 48 - j .LBB496_951 -.LBB496_937: # in Loop: Header=BB496_542 Depth=1 + j .LBB496_937 +.LBB496_935: # in Loop: Header=BB496_541 Depth=1 + mv s4, s10 + mv s10, s9 + ld s9, 384(sp) # 8-byte Folded Reload + j .LBB496_948 +.LBB496_936: # in Loop: Header=BB496_541 Depth=1 slliw s6, s5, 1 -.LBB496_938: # %if.then.i1473 - # in Loop: Header=BB496_542 Depth=1 - ld s8, 240(sp) # 8-byte Folded Reload - ld s7, 0(s8) +.LBB496_937: # %if.then.i1473 + # in Loop: Header=BB496_541 Depth=1 + ld s4, 256(sp) # 8-byte Folded Reload + ld s7, 0(s4) lbu a0, 42(s7) - bnez a0, .LBB496_944 -# %bb.939: # %if.then.i.i.i1499 - # in Loop: Header=BB496_542 Depth=1 - ld a0, 32(s8) + beqz a0, .LBB496_940 +.LBB496_938: # %resizeOpArray.exit.i1480 + # in Loop: Header=BB496_541 Depth=1 + ld a0, 0(s4) + lbu a0, 42(a0) + beqz a0, .LBB496_943 +# %bb.939: # in Loop: Header=BB496_541 Depth=1 + li s7, 48 + ld s5, 480(sp) # 8-byte Folded Reload + ld s3, 496(sp) # 8-byte Folded Reload + mv s4, s10 + mv s10, s9 + ld s6, 392(sp) # 8-byte Folded Reload + ld s9, 384(sp) # 8-byte Folded Reload + j .LBB496_948 +.LBB496_940: # %if.then.i.i.i1499 + # in Loop: Header=BB496_541 Depth=1 + ld a0, 32(s4) li a1, 24 mulw a1, s6, a1 call sqlite3_realloc - beqz a0, .LBB496_942 -# %bb.940: # %if.then.i.i1503 - # in Loop: Header=BB496_542 Depth=1 - sw s6, 28(s8) - sd a0, 32(s8) - ld a4, 448(sp) # 8-byte Folded Reload - bge s5, s6, .LBB496_944 -# %bb.941: # %if.then5.i.i1505 - # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_991 +# %bb.941: # %if.then.i.i1503 + # in Loop: Header=BB496_541 Depth=1 + sw s6, 28(s4) + sd a0, 32(s4) + bge s5, s6, .LBB496_938 +# %bb.942: # %if.then5.i.i1505 + # in Loop: Header=BB496_541 Depth=1 li a2, 24 mul a1, s5, a2 add a0, a0, a1 @@ -117830,43 +117779,25 @@ mul a2, a1, a2 li a1, 0 call memset@plt - j .LBB496_943 -.LBB496_942: # %if.then2.i.i.i1511 - # in Loop: Header=BB496_542 Depth=1 - li a0, 1 - sb a0, 42(s7) -.LBB496_943: # %resizeOpArray.exit.i1480 - # in Loop: Header=BB496_542 Depth=1 - ld a4, 448(sp) # 8-byte Folded Reload -.LBB496_944: # %resizeOpArray.exit.i1480 - # in Loop: Header=BB496_542 Depth=1 - ld a0, 0(s8) - lbu a0, 42(a0) - beqz a0, .LBB496_946 -# %bb.945: # in Loop: Header=BB496_542 Depth=1 - ld s5, 344(sp) # 8-byte Folded Reload - li s8, 48 - ld s7, 480(sp) # 8-byte Folded Reload - ld s6, 424(sp) # 8-byte Folded Reload - j .LBB496_951 -.LBB496_946: # %resizeOpArray.exit.if.end6_crit_edge.i1485 - # in Loop: Header=BB496_542 Depth=1 - lw a0, 24(s8) - ld s7, 480(sp) # 8-byte Folded Reload - ld s6, 424(sp) # 8-byte Folded Reload -.LBB496_947: # %if.end6.i1487 - # in Loop: Header=BB496_542 Depth=1 + j .LBB496_938 +.LBB496_943: # %resizeOpArray.exit.if.end6_crit_edge.i1485 + # in Loop: Header=BB496_541 Depth=1 + lw a0, 24(s4) + li s7, 48 + ld s6, 392(sp) # 8-byte Folded Reload +.LBB496_944: # %if.end6.i1487 + # in Loop: Header=BB496_541 Depth=1 addi a0, a0, 1 - sw a0, 24(s8) + sw a0, 24(s4) li a0, 94 - ld a1, 384(sp) # 8-byte Folded Reload - beqz a1, .LBB496_949 -# %bb.948: # %if.end6.i1487 - # in Loop: Header=BB496_542 Depth=1 + ld a1, 400(sp) # 8-byte Folded Reload + beqz a1, .LBB496_946 +# %bb.945: # %if.end6.i1487 + # in Loop: Header=BB496_541 Depth=1 li a0, 63 -.LBB496_949: # %if.end6.i1487 - # in Loop: Header=BB496_542 Depth=1 - ld a3, 240(sp) # 8-byte Folded Reload +.LBB496_946: # %if.end6.i1487 + # in Loop: Header=BB496_541 Depth=1 + ld a3, 256(sp) # 8-byte Folded Reload ld a1, 32(a3) li a2, 24 mul a2, s3, a2 @@ -117874,120 +117805,92 @@ sb a0, 0(a1) ld a0, 464(sp) # 8-byte Folded Reload sw a0, 4(a1) - ld a0, 400(sp) # 8-byte Folded Reload + ld a0, 408(sp) # 8-byte Folded Reload sw a0, 8(a1) sw s0, 12(a1) sd zero, 16(a1) addi a0, a1, 1 - ld s5, 344(sp) # 8-byte Folded Reload - li s8, 48 -.LBB496_950: # %if.end577.sink.split - # in Loop: Header=BB496_542 Depth=1 + ld s5, 480(sp) # 8-byte Folded Reload + mv s4, s10 + mv s10, s9 + ld s9, 384(sp) # 8-byte Folded Reload +.LBB496_947: # %if.end577.sink.split + # in Loop: Header=BB496_541 Depth=1 sb zero, 0(a0) sb zero, 339(a3) -.LBB496_951: # %if.end577 - # in Loop: Header=BB496_542 Depth=1 - beqz s6, .LBB496_958 -# %bb.952: # %if.then579 - # in Loop: Header=BB496_542 Depth=1 - ld a5, 456(sp) # 8-byte Folded Reload + ld s3, 496(sp) # 8-byte Folded Reload +.LBB496_948: # %if.end577 + # in Loop: Header=BB496_541 Depth=1 + beqz s10, .LBB496_955 +# %bb.949: # %if.then579 + # in Loop: Header=BB496_541 Depth=1 + ld a5, 440(sp) # 8-byte Folded Reload ld a0, 16(a5) - ld a1, 376(sp) # 8-byte Folded Reload + ld a1, 368(sp) # 8-byte Folded Reload add a0, a0, a1 lw a2, 0(a0) addi a0, sp, 504 - mv a1, s1 - mv a3, s7 - ld a4, 368(sp) # 8-byte Folded Reload + mv a1, s3 + mv a3, s5 + ld a4, 376(sp) # 8-byte Folded Reload call findTerm mv s3, a0 ld a0, 0(a0) ld a1, 24(a0) - mv a0, s5 - ld s0, 408(sp) # 8-byte Folded Reload - mv a2, s0 + mv a0, s8 + mv a2, s9 call sqlite3ExprCodeTarget - beq a0, s0, .LBB496_955 -# %bb.953: # %land.lhs.true.i1556 - # in Loop: Header=BB496_542 Depth=1 + beq a0, s9, .LBB496_952 +# %bb.950: # %land.lhs.true.i1556 + # in Loop: Header=BB496_541 Depth=1 mv a2, a0 - ld a0, 24(s5) - beqz a0, .LBB496_955 -# %bb.954: # %if.then.i1559 - # in Loop: Header=BB496_542 Depth=1 + ld a0, 24(s8) + beqz a0, .LBB496_952 +# %bb.951: # %if.then.i1559 + # in Loop: Header=BB496_541 Depth=1 li a1, 7 - ld a3, 408(sp) # 8-byte Folded Reload + mv a3, s9 call sqlite3VdbeAddOp2 -.LBB496_955: # %sqlite3ExprCode.exit1562 - # in Loop: Header=BB496_542 Depth=1 - ld a2, 240(sp) # 8-byte Folded Reload +.LBB496_952: # %sqlite3ExprCode.exit1562 + # in Loop: Header=BB496_541 Depth=1 + ld a2, 256(sp) # 8-byte Folded Reload lw s0, 24(a2) lw s5, 28(a2) mv a0, s0 - ld a4, 448(sp) # 8-byte Folded Reload - blt s0, s5, .LBB496_968 -# %bb.956: # %if.then.i.i1566 - # in Loop: Header=BB496_542 Depth=1 - bnez s5, .LBB496_959 -# %bb.957: # %if.then.i.i1566 - # in Loop: Header=BB496_542 Depth=1 + blt s0, s5, .LBB496_960 +# %bb.953: # %if.then.i.i1566 + # in Loop: Header=BB496_541 Depth=1 + bnez s5, .LBB496_956 +# %bb.954: # %if.then.i.i1566 + # in Loop: Header=BB496_541 Depth=1 li s6, 42 - j .LBB496_960 -.LBB496_958: # in Loop: Header=BB496_542 Depth=1 - li a5, 1 - ld s0, 272(sp) # 8-byte Folded Reload - j .LBB496_975 -.LBB496_959: # in Loop: Header=BB496_542 Depth=1 + j .LBB496_957 +.LBB496_955: # in Loop: Header=BB496_541 Depth=1 + li a3, 1 + ld s0, 288(sp) # 8-byte Folded Reload + j .LBB496_967 +.LBB496_956: # in Loop: Header=BB496_541 Depth=1 slliw s6, s5, 1 -.LBB496_960: # %if.then.i.i1566 - # in Loop: Header=BB496_542 Depth=1 - ld s1, 240(sp) # 8-byte Folded Reload +.LBB496_957: # %if.then.i.i1566 + # in Loop: Header=BB496_541 Depth=1 + ld s1, 256(sp) # 8-byte Folded Reload ld s7, 0(s1) lbu a0, 42(s7) - bnez a0, .LBB496_966 -# %bb.961: # %if.then.i.i.i.i1590 - # in Loop: Header=BB496_542 Depth=1 - ld a0, 32(s1) - li a1, 24 - mulw a1, s6, a1 - call sqlite3_realloc - beqz a0, .LBB496_964 -# %bb.962: # %if.then.i.i.i1594 - # in Loop: Header=BB496_542 Depth=1 - sw s6, 28(s1) - sd a0, 32(s1) - ld a4, 448(sp) # 8-byte Folded Reload - bge s5, s6, .LBB496_966 -# %bb.963: # %if.then5.i.i.i1596 - # in Loop: Header=BB496_542 Depth=1 - li a2, 24 - mul a1, s5, a2 - add a0, a0, a1 - subw a1, s6, s5 - mul a2, a1, a2 - li a1, 0 - call memset@plt - j .LBB496_965 -.LBB496_964: # %if.then2.i.i.i.i1602 - # in Loop: Header=BB496_542 Depth=1 - li a0, 1 - sb a0, 42(s7) -.LBB496_965: # %resizeOpArray.exit.i.i1573 - # in Loop: Header=BB496_542 Depth=1 - ld a4, 448(sp) # 8-byte Folded Reload -.LBB496_966: # %resizeOpArray.exit.i.i1573 - # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_977 +.LBB496_958: # %resizeOpArray.exit.i.i1573 + # in Loop: Header=BB496_541 Depth=1 ld a0, 0(s1) lbu a0, 42(a0) - ld s7, 480(sp) # 8-byte Folded Reload - ld s6, 424(sp) # 8-byte Folded Reload - bnez a0, .LBB496_969 -# %bb.967: # %resizeOpArray.exit.if.end6_crit_edge.i.i1577 - # in Loop: Header=BB496_542 Depth=1 - ld a2, 240(sp) # 8-byte Folded Reload + li s7, 48 + ld s1, 456(sp) # 8-byte Folded Reload + ld s6, 392(sp) # 8-byte Folded Reload + bnez a0, .LBB496_961 +# %bb.959: # %resizeOpArray.exit.if.end6_crit_edge.i.i1577 + # in Loop: Header=BB496_541 Depth=1 + ld a2, 256(sp) # 8-byte Folded Reload lw a0, 24(a2) -.LBB496_968: # %if.end6.i.i1579 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_960: # %if.end6.i.i1579 + # in Loop: Header=BB496_541 Depth=1 ld a1, 32(a2) addi a0, a0, 1 sw a0, 24(a2) @@ -117996,46 +117899,45 @@ add a0, a1, a0 li a1, 65 sh a1, 0(a0) + sw s9, 4(a0) ld a1, 408(sp) # 8-byte Folded Reload - sw a1, 4(a0) - ld a1, 400(sp) # 8-byte Folded Reload sw a1, 8(a0) sw zero, 12(a0) sd zero, 16(a0) sb zero, 339(a2) -.LBB496_969: # %land.lhs.true.lr.ph.i1605 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_961: # %land.lhs.true.lr.ph.i1605 + # in Loop: Header=BB496_541 Depth=1 lhu a0, 14(s3) - andi a5, a0, 40 - ld s0, 272(sp) # 8-byte Folded Reload -.LBB496_970: # %land.lhs.true.i1607 - # Parent Loop BB496_542 Depth=1 + andi a3, a0, 40 + ld s0, 288(sp) # 8-byte Folded Reload +.LBB496_962: # %land.lhs.true.i1607 + # Parent Loop BB496_541 Depth=1 # => This Inner Loop Header: Depth=2 lbu a0, 16(s3) andi a1, a0, 4 - bnez a1, .LBB496_975 -# %bb.971: # %land.lhs.true2.i1611 - # in Loop: Header=BB496_970 Depth=2 + bnez a1, .LBB496_967 +# %bb.963: # %land.lhs.true2.i1611 + # in Loop: Header=BB496_962 Depth=2 lw a1, 12(s0) - beqz a1, .LBB496_973 -# %bb.972: # %lor.lhs.false.i1613 - # in Loop: Header=BB496_970 Depth=2 + beqz a1, .LBB496_965 +# %bb.964: # %lor.lhs.false.i1613 + # in Loop: Header=BB496_962 Depth=2 ld a1, 0(s3) lbu a1, 2(a1) andi a1, a1, 1 - beqz a1, .LBB496_975 -.LBB496_973: # %if.then.i1616 - # in Loop: Header=BB496_970 Depth=2 + beqz a1, .LBB496_967 +.LBB496_965: # %if.then.i1616 + # in Loop: Header=BB496_962 Depth=2 lhu a1, 8(s3) ori a0, a0, 4 slli a2, a1, 48 sb a0, 16(s3) - bltz a2, .LBB496_975 -# %bb.974: # %if.then16.i1619 - # in Loop: Header=BB496_970 Depth=2 + bltz a2, .LBB496_967 +# %bb.966: # %if.then16.i1619 + # in Loop: Header=BB496_962 Depth=2 ld a0, 24(s3) ld a0, 24(a0) - mul s3, a1, s8 + mul s3, a1, s7 add s3, a0, s3 lbu a1, 17(s3) addi a1, a1, -1 @@ -118044,98 +117946,579 @@ snez a0, a0 and a0, a0, a2 sb a1, 17(s3) - bnez a0, .LBB496_970 -.LBB496_975: # %if.end597 - # in Loop: Header=BB496_542 Depth=1 - seqz a0, s6 - snez s5, a4 + bnez a0, .LBB496_962 +.LBB496_967: # %if.end597 + # in Loop: Header=BB496_541 Depth=1 + seqz a0, s10 + snez s5, s1 slti a1, s4, 1 and a0, a1, a0 - or a1, s9, s5 + ld a2, 424(sp) # 8-byte Folded Reload + or a1, a2, s5 and a0, a0, a1 - beqz a0, .LBB496_980 -# %bb.976: # %if.else630 - # in Loop: Header=BB496_542 Depth=1 - ld s9, 240(sp) # 8-byte Folded Reload + beqz a0, .LBB496_972 +# %bb.968: # %if.else630 + # in Loop: Header=BB496_541 Depth=1 + ld s9, 256(sp) # 8-byte Folded Reload lw s3, 24(s9) - bnez a4, .LBB496_1032 -# %bb.977: # %if.else633 - # in Loop: Header=BB496_542 Depth=1 + bnez s1, .LBB496_1105 +# %bb.969: # %if.else633 + # in Loop: Header=BB496_541 Depth=1 lw s0, 28(s9) mv a0, s3 - blt s3, s0, .LBB496_1017 -# %bb.978: # %if.then.i.i1738 - # in Loop: Header=BB496_542 Depth=1 - bnez s0, .LBB496_985 -# %bb.979: # %if.then.i.i1738 - # in Loop: Header=BB496_542 Depth=1 + blt s3, s0, .LBB496_1054 +# %bb.970: # %if.then.i.i1738 + # in Loop: Header=BB496_541 Depth=1 + bnez s0, .LBB496_980 +# %bb.971: # %if.then.i.i1738 + # in Loop: Header=BB496_541 Depth=1 li s6, 42 - j .LBB496_986 -.LBB496_980: # %if.then606 - # in Loop: Header=BB496_542 Depth=1 - snez a0, s6 - or a0, a0, s9 - addw a1, s6, s4 - beqz a0, .LBB496_982 -# %bb.981: # in Loop: Header=BB496_542 Depth=1 - ld s9, 240(sp) # 8-byte Folded Reload - j .LBB496_995 -.LBB496_982: # %if.then612 - # in Loop: Header=BB496_542 Depth=1 - ld s9, 240(sp) # 8-byte Folded Reload + j .LBB496_981 +.LBB496_972: # %if.then606 + # in Loop: Header=BB496_541 Depth=1 + snez a0, s10 + or a0, a0, a2 + addw a1, s10, s4 + beqz a0, .LBB496_974 +# %bb.973: # in Loop: Header=BB496_541 Depth=1 + ld s9, 256(sp) # 8-byte Folded Reload + j .LBB496_1061 +.LBB496_974: # %if.then612 + # in Loop: Header=BB496_541 Depth=1 + ld s9, 256(sp) # 8-byte Folded Reload lw s0, 24(s9) lw s3, 28(s9) mv a0, s0 - blt s0, s3, .LBB496_993 -# %bb.983: # %if.then.i.i1633 - # in Loop: Header=BB496_542 Depth=1 + blt s0, s3, .LBB496_1059 +# %bb.975: # %if.then.i.i1633 + # in Loop: Header=BB496_541 Depth=1 li s1, 1 - bnez s3, .LBB496_989 -# %bb.984: # %if.then.i.i1633 - # in Loop: Header=BB496_542 Depth=1 + bnez s3, .LBB496_985 +# %bb.976: # %if.then.i.i1633 + # in Loop: Header=BB496_541 Depth=1 li s6, 42 - j .LBB496_990 -.LBB496_985: # in Loop: Header=BB496_542 Depth=1 + j .LBB496_986 +.LBB496_977: # %if.then.i.i.i.i1590 + # in Loop: Header=BB496_541 Depth=1 + ld a0, 32(s1) + li a1, 24 + mulw a1, s6, a1 + call sqlite3_realloc + beqz a0, .LBB496_990 +# %bb.978: # %if.then.i.i.i1594 + # in Loop: Header=BB496_541 Depth=1 + sw s6, 28(s1) + sd a0, 32(s1) + bge s5, s6, .LBB496_958 +# %bb.979: # %if.then5.i.i.i1596 + # in Loop: Header=BB496_541 Depth=1 + li a2, 24 + mul a1, s5, a2 + add a0, a0, a1 + subw a1, s6, s5 + mul a2, a1, a2 + li a1, 0 + call memset@plt + j .LBB496_958 +.LBB496_980: # in Loop: Header=BB496_541 Depth=1 slliw s6, s0, 1 -.LBB496_986: # %if.then.i.i1738 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_981: # %if.then.i.i1738 + # in Loop: Header=BB496_541 Depth=1 ld s7, 0(s9) lbu a0, 42(s7) - beqz a0, .LBB496_1013 -.LBB496_987: # %resizeOpArray.exit.i.i1745 - # in Loop: Header=BB496_542 Depth=1 - ld a0, 0(s9) - lbu a0, 42(a0) - beqz a0, .LBB496_1016 -# %bb.988: # in Loop: Header=BB496_542 Depth=1 - ld s0, 272(sp) # 8-byte Folded Reload - ld s7, 480(sp) # 8-byte Folded Reload - ld s6, 424(sp) # 8-byte Folded Reload - j .LBB496_1019 -.LBB496_989: # in Loop: Header=BB496_542 Depth=1 + bnez a0, .LBB496_1051 +# %bb.982: # %if.then.i.i.i.i1762 + # in Loop: Header=BB496_541 Depth=1 + mv s1, a3 + ld a0, 32(s9) + li a1, 24 + mulw a1, s6, a1 + call sqlite3_realloc + beqz a0, .LBB496_1049 +# %bb.983: # %if.then.i.i.i1766 + # in Loop: Header=BB496_541 Depth=1 + sw s6, 28(s9) + sd a0, 32(s9) + mv a3, s1 + bge s0, s6, .LBB496_1051 +# %bb.984: # %if.then5.i.i.i1768 + # in Loop: Header=BB496_541 Depth=1 + li a2, 24 + mul a1, s0, a2 + add a0, a0, a1 + subw a1, s6, s0 + mul a2, a1, a2 + li a1, 0 + call memset@plt + j .LBB496_1050 +.LBB496_985: # in Loop: Header=BB496_541 Depth=1 slliw s6, s3, 1 -.LBB496_990: # %if.then.i.i1633 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_986: # %if.then.i.i1633 + # in Loop: Header=BB496_541 Depth=1 ld s8, 0(s9) lbu a0, 42(s8) - beqz a0, .LBB496_1047 -.LBB496_991: # %resizeOpArray.exit.i.i1640 - # in Loop: Header=BB496_542 Depth=1 + bnez a0, .LBB496_1057 +# %bb.987: # %if.then.i.i.i.i1657 + # in Loop: Header=BB496_541 Depth=1 + mv s7, a1 + ld a0, 32(s9) + li a1, 24 + mulw a1, s6, a1 + call sqlite3_realloc + beqz a0, .LBB496_1055 +# %bb.988: # %if.then.i.i.i1661 + # in Loop: Header=BB496_541 Depth=1 + sw s6, 28(s9) + sd a0, 32(s9) + mv a1, s7 + bge s3, s6, .LBB496_1057 +# %bb.989: # %if.then5.i.i.i1663 + # in Loop: Header=BB496_541 Depth=1 + li a2, 24 + mul a1, s3, a2 + add a0, a0, a1 + subw a1, s6, s3 + mul a2, a1, a2 + li a1, 0 + call memset@plt + j .LBB496_1056 +.LBB496_990: # %if.then2.i.i.i.i1602 + # in Loop: Header=BB496_541 Depth=1 + li a0, 1 + sb a0, 42(s7) + j .LBB496_958 +.LBB496_991: # %if.then2.i.i.i1511 + # in Loop: Header=BB496_541 Depth=1 + li a0, 1 + sb a0, 42(s7) + j .LBB496_938 +.LBB496_992: # %if.then2.i.i.i.i2534 + # in Loop: Header=BB496_541 Depth=1 + sb s1, 42(s9) +.LBB496_993: # %resizeOpArray.exit.i.i2505 + # in Loop: Header=BB496_541 Depth=1 + mv a0, s8 +.LBB496_994: # %resizeOpArray.exit.i.i2505 + # in Loop: Header=BB496_541 Depth=1 + ld a1, 0(s4) + lbu a1, 42(a1) + ld s8, 328(sp) # 8-byte Folded Reload + ld s9, 256(sp) # 8-byte Folded Reload + li s7, 48 + bnez a1, .LBB496_997 +# %bb.995: # %resizeOpArray.exit.if.end6_crit_edge.i.i2509 + # in Loop: Header=BB496_541 Depth=1 + lw a1, 24(s4) +.LBB496_996: # %if.end6.i.i2511 + # in Loop: Header=BB496_541 Depth=1 + ld a2, 32(s4) + addi a1, a1, 1 + sw a1, 24(s4) + li a1, 24 + mul a1, s5, a1 + add a1, a2, a1 + li a2, 7 + sh a2, 0(a1) + sw a0, 4(a1) + sw s3, 8(a1) + sw zero, 12(a1) + sd zero, 16(a1) + sb zero, 339(s4) +.LBB496_997: # %sqlite3ExprCode.exit1213 + # in Loop: Header=BB496_541 Depth=1 + lbu a0, 0(s0) + ori a0, a0, 2 + li a1, 71 + bne a0, a1, .LBB496_1000 +# %bb.998: # %if.then452 + # in Loop: Header=BB496_541 Depth=1 + li s3, 70 + ld a3, 288(sp) # 8-byte Folded Reload + ld a4, 456(sp) # 8-byte Folded Reload + bnez a4, .LBB496_1002 +# %bb.999: # %if.then452 + # in Loop: Header=BB496_541 Depth=1 + li s3, 72 + j .LBB496_1002 +.LBB496_1000: # %if.else455 + # in Loop: Header=BB496_541 Depth=1 + li s3, 71 + ld a3, 288(sp) # 8-byte Folded Reload + ld a4, 456(sp) # 8-byte Folded Reload + bnez a4, .LBB496_1002 +# %bb.1001: # %if.else455 + # in Loop: Header=BB496_541 Depth=1 + li s3, 69 +.LBB496_1002: # %if.else455 + # in Loop: Header=BB496_541 Depth=1 + li s6, 1 + ld s5, 480(sp) # 8-byte Folded Reload +.LBB496_1003: # %land.lhs.true.i1217 + # Parent Loop BB496_541 Depth=1 + # => This Inner Loop Header: Depth=2 + lbu a0, 16(s2) + andi a1, a0, 4 + bnez a1, .LBB496_1008 +# %bb.1004: # %land.lhs.true2.i1221 + # in Loop: Header=BB496_1003 Depth=2 + lw a1, 12(a3) + beqz a1, .LBB496_1006 +# %bb.1005: # %lor.lhs.false.i1223 + # in Loop: Header=BB496_1003 Depth=2 + ld a1, 0(s2) + lbu a1, 2(a1) + andi a1, a1, 1 + beqz a1, .LBB496_1008 +.LBB496_1006: # %if.then.i1226 + # in Loop: Header=BB496_1003 Depth=2 + lhu a1, 8(s2) + ori a0, a0, 4 + slli a2, a1, 48 + sb a0, 16(s2) + bltz a2, .LBB496_1008 +# %bb.1007: # %if.then16.i1229 + # in Loop: Header=BB496_1003 Depth=2 + ld a0, 24(s2) + ld a0, 24(a0) + mul s2, a1, s7 + add s2, a0, s2 + lbu a1, 17(s2) + addi a1, a1, -1 + andi a2, a1, 255 + snez a2, a2 + seqz a0, a0 + or a0, a0, a2 + sb a1, 17(s2) + beqz a0, .LBB496_1003 +.LBB496_1008: # %if.then468 + # in Loop: Header=BB496_541 Depth=1 + lw s0, 24(s9) + li a0, 47 + bnez a4, .LBB496_1010 +# %bb.1009: # %if.then468 + # in Loop: Header=BB496_541 Depth=1 + li a0, 102 +.LBB496_1010: # %if.then468 + # in Loop: Header=BB496_541 Depth=1 + ld a1, 288(sp) # 8-byte Folded Reload + sw a0, 48(a1) + ld a0, 496(sp) # 8-byte Folded Reload + sw a0, 52(a1) + sw s0, 56(a1) + lbu a0, 37(s8) + beqz a0, .LBB496_1012 +# %bb.1011: # %if.then.i1242 + # in Loop: Header=BB496_541 Depth=1 + addi a0, a0, -1 + andi a1, a0, 255 + slli a1, a1, 2 + add a1, s8, a1 + lw s1, 40(a1) + sb a0, 37(s8) + lw s4, 28(s9) + mv s2, s0 + bge s0, s4, .LBB496_1013 + j .LBB496_1018 +.LBB496_1012: # %if.else.i1247 + # in Loop: Header=BB496_541 Depth=1 + lw s1, 88(s8) + addiw s1, s1, 1 + sw s1, 88(s8) + lw s4, 28(s9) + mv s2, s0 + blt s0, s4, .LBB496_1018 +.LBB496_1013: # %if.then.i.i1254 + # in Loop: Header=BB496_541 Depth=1 + bnez s4, .LBB496_1015 +# %bb.1014: # %if.then.i.i1254 + # in Loop: Header=BB496_541 Depth=1 + li s2, 42 + j .LBB496_1016 +.LBB496_1015: # in Loop: Header=BB496_541 Depth=1 + slliw s2, s4, 1 +.LBB496_1016: # %if.then.i.i1254 + # in Loop: Header=BB496_541 Depth=1 + ld s5, 0(s9) + lbu a0, 42(s5) + beqz a0, .LBB496_1032 +.LBB496_1017: # %resizeOpArray.exit.i.i1261 + # in Loop: Header=BB496_541 Depth=1 ld a0, 0(s9) lbu a0, 42(a0) - li s8, 48 - ld s7, 480(sp) # 8-byte Folded Reload - bnez a0, .LBB496_994 -# %bb.992: # %resizeOpArray.exit.if.end6_crit_edge.i.i1644 - # in Loop: Header=BB496_542 Depth=1 + lw s2, 24(s9) + ld s5, 480(sp) # 8-byte Folded Reload + bnez a0, .LBB496_1019 +.LBB496_1018: # %if.end6.i.i1267 + # in Loop: Header=BB496_541 Depth=1 + ld a0, 32(s9) + addi s2, s2, 1 + sw s2, 24(s9) + li a1, 24 + mul a1, s0, a1 + add a0, a0, a1 + li a1, 38 + sh a1, 0(a0) + ld a1, 496(sp) # 8-byte Folded Reload + sw a1, 4(a0) + sw s1, 8(a0) + sw zero, 12(a0) + sd zero, 16(a0) + lw s2, 24(s9) + sb zero, 339(s9) +.LBB496_1019: # %sqlite3VdbeAddOp2.exit1291 + # in Loop: Header=BB496_541 Depth=1 + lw s4, 28(s9) + ld a0, 288(sp) # 8-byte Folded Reload + lw s0, 8(a0) + mv a0, s2 + blt s2, s4, .LBB496_1026 +# %bb.1020: # %if.then.i1295 + # in Loop: Header=BB496_541 Depth=1 + li s7, 1 + bnez s4, .LBB496_1022 +# %bb.1021: # %if.then.i1295 + # in Loop: Header=BB496_541 Depth=1 + li s5, 42 + j .LBB496_1023 +.LBB496_1022: # in Loop: Header=BB496_541 Depth=1 + slliw s5, s4, 1 +.LBB496_1023: # %if.then.i1295 + # in Loop: Header=BB496_541 Depth=1 + ld s6, 0(s9) + lbu a0, 42(s6) + beqz a0, .LBB496_1035 +.LBB496_1024: # %resizeOpArray.exit.i1302 + # in Loop: Header=BB496_541 Depth=1 + ld a0, 0(s9) + lbu a0, 42(a0) + li s6, 1 + li s7, 48 + ld s5, 480(sp) # 8-byte Folded Reload + bnez a0, .LBB496_1027 +# %bb.1025: # %resizeOpArray.exit.if.end6_crit_edge.i1307 + # in Loop: Header=BB496_541 Depth=1 lw a0, 24(s9) -.LBB496_993: # %if.end6.i.i1646 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_1026: # %if.end6.i1309 + # in Loop: Header=BB496_541 Depth=1 + ld a1, 32(s9) addi a0, a0, 1 - ld a2, 32(s9) sw a0, 24(s9) - ld a0, 432(sp) # 8-byte Folded Reload + li a0, 24 + mul a0, s2, a0 + add a0, a1, a0 + sb s3, 0(a0) + sw s0, 4(a0) + ld a1, 472(sp) # 8-byte Folded Reload + sw a1, 8(a0) + sw s1, 12(a0) + sd zero, 16(a0) + sb zero, 1(a0) + sb zero, 339(s9) +.LBB496_1027: # %land.lhs.true.i1336 + # in Loop: Header=BB496_541 Depth=1 + ld a0, 32(s9) + beqz a0, .LBB496_1029 +# %bb.1028: # %if.then.i1338 + # in Loop: Header=BB496_541 Depth=1 + lw a1, 24(s9) + addiw a1, a1, -1 + li a2, 24 + mul a1, a1, a2 + add a0, a0, a1 + li a1, 107 + sb a1, 3(a0) +.LBB496_1029: # %sqlite3VdbeChangeP5.exit + # in Loop: Header=BB496_541 Depth=1 + ld s2, 488(sp) # 8-byte Folded Reload + ld s3, 496(sp) # 8-byte Folded Reload + bnez s1, .LBB496_1030 + j .LBB496_769 +.LBB496_1030: # %land.lhs.true.i1344 + # in Loop: Header=BB496_541 Depth=1 + lbu a0, 37(s8) + li a1, 7 + bgeu a1, a0, .LBB496_1031 + j .LBB496_769 +.LBB496_1031: # %if.then.i1348 + # in Loop: Header=BB496_541 Depth=1 + addi a1, a0, 1 + sb a1, 37(s8) + slli a0, a0, 2 + add a0, s8, a0 + sw s1, 40(a0) + j .LBB496_769 +.LBB496_1032: # %if.then.i.i.i.i1278 + # in Loop: Header=BB496_541 Depth=1 + ld a0, 32(s9) + li a1, 24 + mulw a1, s2, a1 + call sqlite3_realloc + beqz a0, .LBB496_1038 +# %bb.1033: # %if.then.i.i.i1282 + # in Loop: Header=BB496_541 Depth=1 + sw s2, 28(s9) + sd a0, 32(s9) + bge s4, s2, .LBB496_1017 +# %bb.1034: # %if.then5.i.i.i1284 + # in Loop: Header=BB496_541 Depth=1 + li a2, 24 + mul a1, s4, a2 + add a0, a0, a1 + subw a1, s2, s4 + mul a2, a1, a2 + li a1, 0 + call memset@plt + j .LBB496_1017 +.LBB496_1035: # %if.then.i.i.i1321 + # in Loop: Header=BB496_541 Depth=1 + ld a0, 32(s9) + li a1, 24 + mulw a1, s5, a1 + call sqlite3_realloc + beqz a0, .LBB496_1039 +# %bb.1036: # %if.then.i.i1325 + # in Loop: Header=BB496_541 Depth=1 + sw s5, 28(s9) + sd a0, 32(s9) + bge s4, s5, .LBB496_1024 +# %bb.1037: # %if.then5.i.i1327 + # in Loop: Header=BB496_541 Depth=1 + li a2, 24 + mul a1, s4, a2 + add a0, a0, a1 + subw a1, s5, s4 + mul a2, a1, a2 + li a1, 0 + call memset@plt + j .LBB496_1024 +.LBB496_1038: # %if.then2.i.i.i.i1290 + # in Loop: Header=BB496_541 Depth=1 + sb s6, 42(s5) + j .LBB496_1017 +.LBB496_1039: # %if.then2.i.i.i1333 + # in Loop: Header=BB496_541 Depth=1 + sb s7, 42(s6) + j .LBB496_1024 +.LBB496_1040: # in Loop: Header=BB496_541 Depth=1 + slliw s5, s3, 1 +.LBB496_1041: # %if.then.i.i1516 + # in Loop: Header=BB496_541 Depth=1 + ld s1, 256(sp) # 8-byte Folded Reload + ld s6, 0(s1) + lbu a0, 42(s6) + beqz a0, .LBB496_1074 +.LBB496_1042: # %resizeOpArray.exit.i.i1523 + # in Loop: Header=BB496_541 Depth=1 + ld a0, 0(s1) + lbu a0, 42(a0) + ld s5, 480(sp) # 8-byte Folded Reload + ld s3, 496(sp) # 8-byte Folded Reload + ld s1, 456(sp) # 8-byte Folded Reload + ld s6, 392(sp) # 8-byte Folded Reload + bnez a0, .LBB496_948 +# %bb.1043: # %resizeOpArray.exit.if.end6_crit_edge.i.i1527 + # in Loop: Header=BB496_541 Depth=1 + ld a3, 256(sp) # 8-byte Folded Reload + lw a0, 24(a3) +.LBB496_1044: # %if.end6.i.i1529 + # in Loop: Header=BB496_541 Depth=1 + ld a1, 32(a3) + addi a0, a0, 1 + sw a0, 24(a3) + li a0, 24 + mul a0, s0, a0 + add a0, a1, a0 + li a1, 50 + sb a1, 0(a0) + ld a1, 464(sp) # 8-byte Folded Reload + sw a1, 4(a0) + ld a1, 472(sp) # 8-byte Folded Reload + sw a1, 8(a0) + sw zero, 12(a0) + sd zero, 16(a0) + addi a0, a0, 1 + li a1, 1 + sd a1, 400(sp) # 8-byte Folded Spill + li s2, 22 + j .LBB496_947 +.LBB496_1045: # %if.then2.i.i.i2057 + # in Loop: Header=BB496_541 Depth=1 + sb s6, 42(s4) + j .LBB496_875 +.LBB496_1046: # %if.then2.i.i.i2099 + # in Loop: Header=BB496_541 Depth=1 + sb s6, 42(s4) + j .LBB496_879 +.LBB496_1047: # %if.then2.i.i.i.i2162 + # in Loop: Header=BB496_541 Depth=1 + sb s6, 42(s5) + j .LBB496_903 +.LBB496_1048: # %if.then2.i.i.i2204 + # in Loop: Header=BB496_541 Depth=1 + sb s6, 42(s5) + j .LBB496_910 +.LBB496_1049: # %if.then2.i.i.i.i1774 + # in Loop: Header=BB496_541 Depth=1 + li a0, 1 + sb a0, 42(s7) +.LBB496_1050: # %resizeOpArray.exit.i.i1745 + # in Loop: Header=BB496_541 Depth=1 + mv a3, s1 +.LBB496_1051: # %resizeOpArray.exit.i.i1745 + # in Loop: Header=BB496_541 Depth=1 + ld a0, 0(s9) + lbu a0, 42(a0) + beqz a0, .LBB496_1053 +# %bb.1052: # in Loop: Header=BB496_541 Depth=1 + ld s0, 288(sp) # 8-byte Folded Reload + li s7, 48 + j .LBB496_1088 +.LBB496_1053: # %resizeOpArray.exit.if.end6_crit_edge.i.i1749 + # in Loop: Header=BB496_541 Depth=1 + lw a0, 24(s9) + li s7, 48 +.LBB496_1054: # %if.end6.i.i1751 + # in Loop: Header=BB496_541 Depth=1 + ld a1, 32(s9) + addi a0, a0, 1 + sw a0, 24(s9) + li a0, 24 + mul a0, s3, a0 add a0, a1, a0 + li a1, 115 + sh a1, 0(a0) + ld a1, 464(sp) # 8-byte Folded Reload + sw a1, 4(a0) + ld a1, 472(sp) # 8-byte Folded Reload + sw a1, 8(a0) + sw zero, 12(a0) + sd zero, 16(a0) + sb zero, 339(s9) + j .LBB496_1087 +.LBB496_1055: # %if.then2.i.i.i.i1669 + # in Loop: Header=BB496_541 Depth=1 + sb s1, 42(s8) +.LBB496_1056: # %resizeOpArray.exit.i.i1640 + # in Loop: Header=BB496_541 Depth=1 + mv a1, s7 +.LBB496_1057: # %resizeOpArray.exit.i.i1640 + # in Loop: Header=BB496_541 Depth=1 + ld a0, 0(s9) + lbu a0, 42(a0) + ld s8, 328(sp) # 8-byte Folded Reload + li s7, 48 + ld s1, 456(sp) # 8-byte Folded Reload + ld s6, 392(sp) # 8-byte Folded Reload + bnez a0, .LBB496_1060 +# %bb.1058: # %resizeOpArray.exit.if.end6_crit_edge.i.i1644 + # in Loop: Header=BB496_541 Depth=1 + lw a0, 24(s9) +.LBB496_1059: # %if.end6.i.i1646 + # in Loop: Header=BB496_541 Depth=1 + addi a0, a0, 1 + ld a2, 32(s9) + sw a0, 24(s9) + add a0, a1, s6 li a3, 24 mul a3, s0, a3 add a2, a2, a3 @@ -118146,97 +118529,146 @@ sw zero, 12(a2) sd zero, 16(a2) sb zero, 339(s9) -.LBB496_994: # %sqlite3VdbeAddOp2.exit1670 - # in Loop: Header=BB496_542 Depth=1 - li a5, 0 +.LBB496_1060: # %sqlite3VdbeAddOp2.exit1670 + # in Loop: Header=BB496_541 Depth=1 + li a3, 0 addiw a1, a1, 1 - ld s0, 272(sp) # 8-byte Folded Reload -.LBB496_995: # %if.end616 - # in Loop: Header=BB496_542 Depth=1 - beqz a4, .LBB496_997 -# %bb.996: # %if.end636.thread2750 - # in Loop: Header=BB496_542 Depth=1 + ld s0, 288(sp) # 8-byte Folded Reload +.LBB496_1061: # %if.end616 + # in Loop: Header=BB496_541 Depth=1 + beqz s1, .LBB496_1063 +# %bb.1062: # %if.end636.thread2750 + # in Loop: Header=BB496_541 Depth=1 lw a4, 8(s0) mv a0, s9 - ld a2, 456(sp) # 8-byte Folded Reload - ld a3, 432(sp) # 8-byte Folded Reload - mv s1, a5 + ld a2, 440(sp) # 8-byte Folded Reload + mv s1, a3 + mv a3, s6 call buildIndexProbe - mv a5, s1 - ld a4, 448(sp) # 8-byte Folded Reload + mv a3, s1 lw s3, 24(s9) li s2, 39 - j .LBB496_1020 -.LBB496_997: # %if.else620 - # in Loop: Header=BB496_542 Depth=1 - ld a3, 344(sp) # 8-byte Folded Reload - lbu a0, 37(a3) - beqz a0, .LBB496_999 -# %bb.998: # %if.then.i1673 - # in Loop: Header=BB496_542 Depth=1 - mv s1, a5 + j .LBB496_1089 +.LBB496_1063: # %if.else620 + # in Loop: Header=BB496_541 Depth=1 + lbu a0, 37(s8) + beqz a0, .LBB496_1065 +# %bb.1064: # %if.then.i1673 + # in Loop: Header=BB496_541 Depth=1 + mv s1, a3 addi a0, a0, -1 andi a2, a0, 255 slli a2, a2, 2 - add a2, a3, a2 + add a2, s8, a2 lw s3, 40(a2) - sb a0, 37(a3) - j .LBB496_1000 -.LBB496_999: # %if.else.i1678 - # in Loop: Header=BB496_542 Depth=1 - mv s1, a5 - lw s3, 88(a3) + sb a0, 37(s8) + j .LBB496_1066 +.LBB496_1065: # %if.else.i1678 + # in Loop: Header=BB496_541 Depth=1 + mv s1, a3 + lw s3, 88(s8) addiw s3, s3, 1 - sw s3, 88(a3) -.LBB496_1000: # %if.then624 - # in Loop: Header=BB496_542 Depth=1 + sw s3, 88(s8) +.LBB496_1066: # %if.then624 + # in Loop: Header=BB496_541 Depth=1 mv a0, s9 - ld a2, 456(sp) # 8-byte Folded Reload - ld a3, 432(sp) # 8-byte Folded Reload + ld a2, 440(sp) # 8-byte Folded Reload + mv a3, s6 mv a4, s3 call buildIndexProbe lw s0, 24(s9) lw s6, 28(s9) mv a0, s0 - mv a5, s1 - blt s0, s6, .LBB496_1007 -# %bb.1001: # %if.then.i1685 - # in Loop: Header=BB496_542 Depth=1 - bnez s6, .LBB496_1003 -# %bb.1002: # %if.then.i1685 - # in Loop: Header=BB496_542 Depth=1 + mv a3, s1 + blt s0, s6, .LBB496_1081 +# %bb.1067: # %if.then.i1685 + # in Loop: Header=BB496_541 Depth=1 + bnez s6, .LBB496_1069 +# %bb.1068: # %if.then.i1685 + # in Loop: Header=BB496_541 Depth=1 li s7, 42 - j .LBB496_1004 -.LBB496_1003: # in Loop: Header=BB496_542 Depth=1 + j .LBB496_1070 +.LBB496_1069: # in Loop: Header=BB496_541 Depth=1 slliw s7, s6, 1 -.LBB496_1004: # %if.then.i1685 - # in Loop: Header=BB496_542 Depth=1 - ld a4, 448(sp) # 8-byte Folded Reload +.LBB496_1070: # %if.then.i1685 + # in Loop: Header=BB496_541 Depth=1 ld s8, 0(s9) lbu a0, 42(s8) - beqz a0, .LBB496_1050 -.LBB496_1005: # %resizeOpArray.exit.i1692 - # in Loop: Header=BB496_542 Depth=1 + bnez a0, .LBB496_1079 +# %bb.1071: # %if.then.i.i.i1711 + # in Loop: Header=BB496_541 Depth=1 + sd a3, 472(sp) # 8-byte Folded Spill + ld a0, 32(s9) + li a1, 24 + mulw a1, s7, a1 + call sqlite3_realloc + beqz a0, .LBB496_1077 +# %bb.1072: # %if.then.i.i1715 + # in Loop: Header=BB496_541 Depth=1 + sw s7, 28(s9) + sd a0, 32(s9) + ld a3, 472(sp) # 8-byte Folded Reload + bge s6, s7, .LBB496_1079 +# %bb.1073: # %if.then5.i.i1717 + # in Loop: Header=BB496_541 Depth=1 + li a2, 24 + mul a1, s6, a2 + add a0, a0, a1 + subw a1, s7, s6 + mul a2, a1, a2 + li a1, 0 + call memset@plt + j .LBB496_1078 +.LBB496_1074: # %if.then.i.i.i.i1540 + # in Loop: Header=BB496_541 Depth=1 + ld a0, 32(s1) + li a1, 24 + mulw a1, s5, a1 + call sqlite3_realloc + beqz a0, .LBB496_1163 +# %bb.1075: # %if.then.i.i.i1544 + # in Loop: Header=BB496_541 Depth=1 + sw s5, 28(s1) + sd a0, 32(s1) + bge s3, s5, .LBB496_1042 +# %bb.1076: # %if.then5.i.i.i1546 + # in Loop: Header=BB496_541 Depth=1 + li a2, 24 + mul a1, s3, a2 + add a0, a0, a1 + subw a1, s5, s3 + mul a2, a1, a2 + li a1, 0 + call memset@plt + j .LBB496_1042 +.LBB496_1077: # %if.then2.i.i.i1723 + # in Loop: Header=BB496_541 Depth=1 + li a0, 1 + sb a0, 42(s8) +.LBB496_1078: # %resizeOpArray.exit.i1692 + # in Loop: Header=BB496_541 Depth=1 + ld a3, 472(sp) # 8-byte Folded Reload +.LBB496_1079: # %resizeOpArray.exit.i1692 + # in Loop: Header=BB496_541 Depth=1 ld a0, 0(s9) lbu a0, 42(a0) - li s8, 48 - ld s7, 480(sp) # 8-byte Folded Reload - ld s6, 424(sp) # 8-byte Folded Reload - bnez a0, .LBB496_1010 -# %bb.1006: # %resizeOpArray.exit.if.end6_crit_edge.i1697 - # in Loop: Header=BB496_542 Depth=1 + ld s8, 328(sp) # 8-byte Folded Reload + li s7, 48 + bnez a0, .LBB496_1084 +# %bb.1080: # %resizeOpArray.exit.if.end6_crit_edge.i1697 + # in Loop: Header=BB496_541 Depth=1 lw a0, 24(s9) -.LBB496_1007: # %if.end6.i1699 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_1081: # %if.end6.i1699 + # in Loop: Header=BB496_541 Depth=1 addi a0, a0, 1 sw a0, 24(s9) li a0, 5 - beqz a5, .LBB496_1009 -# %bb.1008: # %if.end6.i1699 - # in Loop: Header=BB496_542 Depth=1 + beqz a3, .LBB496_1083 +# %bb.1082: # %if.end6.i1699 + # in Loop: Header=BB496_541 Depth=1 li a0, 116 -.LBB496_1009: # %if.end6.i1699 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_1083: # %if.end6.i1699 + # in Loop: Header=BB496_541 Depth=1 ld a1, 32(s9) li a2, 24 mul a2, s0, a2 @@ -118244,122 +118676,100 @@ sb a0, 0(a1) ld a0, 464(sp) # 8-byte Folded Reload sw a0, 4(a1) - ld a0, 400(sp) # 8-byte Folded Reload + ld a0, 408(sp) # 8-byte Folded Reload sw a0, 8(a1) sw s3, 12(a1) sd zero, 16(a1) sb zero, 1(a1) sb zero, 339(s9) - ld a4, 448(sp) # 8-byte Folded Reload - ld s6, 424(sp) # 8-byte Folded Reload -.LBB496_1010: # %sqlite3VdbeAddOp3.exit1724 - # in Loop: Header=BB496_542 Depth=1 - beqz s3, .LBB496_1018 -# %bb.1011: # %land.lhs.true.i1726 - # in Loop: Header=BB496_542 Depth=1 - ld a2, 344(sp) # 8-byte Folded Reload - lbu a0, 37(a2) - ld s0, 272(sp) # 8-byte Folded Reload +.LBB496_1084: # %sqlite3VdbeAddOp3.exit1724 + # in Loop: Header=BB496_541 Depth=1 + beqz s3, .LBB496_1087 +# %bb.1085: # %land.lhs.true.i1726 + # in Loop: Header=BB496_541 Depth=1 + lbu a0, 37(s8) + ld s0, 288(sp) # 8-byte Folded Reload li a1, 7 - bltu a1, a0, .LBB496_1019 -# %bb.1012: # %if.then.i1730 - # in Loop: Header=BB496_542 Depth=1 + bltu a1, a0, .LBB496_1088 +# %bb.1086: # %if.then.i1730 + # in Loop: Header=BB496_541 Depth=1 addi a1, a0, 1 - sb a1, 37(a2) + sb a1, 37(s8) slli a0, a0, 2 - add a0, a2, a0 + add a0, s8, a0 sw s3, 40(a0) - j .LBB496_1019 -.LBB496_1013: # %if.then.i.i.i.i1762 - # in Loop: Header=BB496_542 Depth=1 - mv s1, a5 - ld a0, 32(s9) - li a1, 24 - mulw a1, s6, a1 - call sqlite3_realloc - beqz a0, .LBB496_1160 -# %bb.1014: # %if.then.i.i.i1766 - # in Loop: Header=BB496_542 Depth=1 - sw s6, 28(s9) - sd a0, 32(s9) - ld a4, 448(sp) # 8-byte Folded Reload - mv a5, s1 - bge s0, s6, .LBB496_987 -# %bb.1015: # %if.then5.i.i.i1768 - # in Loop: Header=BB496_542 Depth=1 - li a2, 24 - mul a1, s0, a2 - add a0, a0, a1 - subw a1, s6, s0 - mul a2, a1, a2 - li a1, 0 - call memset@plt - mv a5, s1 - ld a4, 448(sp) # 8-byte Folded Reload - j .LBB496_987 -.LBB496_1016: # %resizeOpArray.exit.if.end6_crit_edge.i.i1749 - # in Loop: Header=BB496_542 Depth=1 - lw a0, 24(s9) - ld s7, 480(sp) # 8-byte Folded Reload - ld s6, 424(sp) # 8-byte Folded Reload -.LBB496_1017: # %if.end6.i.i1751 - # in Loop: Header=BB496_542 Depth=1 - ld a1, 32(s9) - addi a0, a0, 1 - sw a0, 24(s9) - li a0, 24 - mul a0, s3, a0 - add a0, a1, a0 - li a1, 115 - sh a1, 0(a0) - ld a1, 464(sp) # 8-byte Folded Reload - sw a1, 4(a0) - ld a1, 472(sp) # 8-byte Folded Reload - sw a1, 8(a0) - sw zero, 12(a0) - sd zero, 16(a0) - sb zero, 339(s9) -.LBB496_1018: # %if.end636 - # in Loop: Header=BB496_542 Depth=1 - ld s0, 272(sp) # 8-byte Folded Reload -.LBB496_1019: # %if.end636 - # in Loop: Header=BB496_542 Depth=1 + j .LBB496_1088 +.LBB496_1087: # %if.end636 + # in Loop: Header=BB496_541 Depth=1 + ld s0, 288(sp) # 8-byte Folded Reload +.LBB496_1088: # %if.end636 + # in Loop: Header=BB496_541 Depth=1 lw s3, 24(s9) li a0, 22 - beq s2, a0, .LBB496_1032 -.LBB496_1020: # %if.then640 - # in Loop: Header=BB496_542 Depth=1 + beq s2, a0, .LBB496_1105 +.LBB496_1089: # %if.then640 + # in Loop: Header=BB496_541 Depth=1 li s1, 1 lw s6, 28(s9) lw s0, 8(s0) mv a0, s3 - blt s3, s6, .LBB496_1027 -# %bb.1021: # %if.then.i1779 - # in Loop: Header=BB496_542 Depth=1 - bnez s6, .LBB496_1023 -# %bb.1022: # %if.then.i1779 - # in Loop: Header=BB496_542 Depth=1 + blt s3, s6, .LBB496_1101 +# %bb.1090: # %if.then.i1779 + # in Loop: Header=BB496_541 Depth=1 + bnez s6, .LBB496_1092 +# %bb.1091: # %if.then.i1779 + # in Loop: Header=BB496_541 Depth=1 li s7, 42 - j .LBB496_1024 -.LBB496_1023: # in Loop: Header=BB496_542 Depth=1 + j .LBB496_1093 +.LBB496_1092: # in Loop: Header=BB496_541 Depth=1 slliw s7, s6, 1 -.LBB496_1024: # %if.then.i1779 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_1093: # %if.then.i1779 + # in Loop: Header=BB496_541 Depth=1 ld s8, 0(s9) lbu a0, 42(s8) - beqz a0, .LBB496_1044 -.LBB496_1025: # %resizeOpArray.exit.i1786 - # in Loop: Header=BB496_542 Depth=1 + bnez a0, .LBB496_1099 +# %bb.1094: # %if.then.i.i.i1805 + # in Loop: Header=BB496_541 Depth=1 + sd a3, 472(sp) # 8-byte Folded Spill + ld a0, 32(s9) + li a1, 24 + mulw a1, s7, a1 + call sqlite3_realloc + beqz a0, .LBB496_1097 +# %bb.1095: # %if.then.i.i1809 + # in Loop: Header=BB496_541 Depth=1 + sw s7, 28(s9) + sd a0, 32(s9) + ld a3, 472(sp) # 8-byte Folded Reload + bge s6, s7, .LBB496_1099 +# %bb.1096: # %if.then5.i.i1811 + # in Loop: Header=BB496_541 Depth=1 + li a2, 24 + mul a1, s6, a2 + add a0, a0, a1 + subw a1, s7, s6 + mul a2, a1, a2 + li a1, 0 + call memset@plt + j .LBB496_1098 +.LBB496_1097: # %if.then2.i.i.i1817 + # in Loop: Header=BB496_541 Depth=1 + sb s1, 42(s8) +.LBB496_1098: # %resizeOpArray.exit.i1786 + # in Loop: Header=BB496_541 Depth=1 + ld a3, 472(sp) # 8-byte Folded Reload +.LBB496_1099: # %resizeOpArray.exit.i1786 + # in Loop: Header=BB496_541 Depth=1 ld a0, 0(s9) lbu a0, 42(a0) - li s8, 48 - ld s7, 480(sp) # 8-byte Folded Reload - bnez a0, .LBB496_1028 -# %bb.1026: # %resizeOpArray.exit.if.end6_crit_edge.i1791 - # in Loop: Header=BB496_542 Depth=1 + ld s8, 328(sp) # 8-byte Folded Reload + li s7, 48 + bnez a0, .LBB496_1102 +# %bb.1100: # %resizeOpArray.exit.if.end6_crit_edge.i1791 + # in Loop: Header=BB496_541 Depth=1 lw a0, 24(s9) -.LBB496_1027: # %if.end6.i1793 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_1101: # %if.end6.i1793 + # in Loop: Header=BB496_541 Depth=1 ld a1, 32(s9) addi a0, a0, 1 sw a0, 24(s9) @@ -118369,204 +118779,91 @@ sb s2, 0(a0) ld a1, 464(sp) # 8-byte Folded Reload sw a1, 4(a0) - ld a1, 400(sp) # 8-byte Folded Reload + ld a1, 408(sp) # 8-byte Folded Reload sw a1, 8(a0) sw s0, 12(a0) sd zero, 16(a0) sb zero, 1(a0) sb zero, 339(s9) -.LBB496_1028: # %sqlite3VdbeAddOp3.exit1818 - # in Loop: Header=BB496_542 Depth=1 - seqz a0, a4 - ld a1, 384(sp) # 8-byte Folded Reload +.LBB496_1102: # %sqlite3VdbeAddOp3.exit1818 + # in Loop: Header=BB496_541 Depth=1 + ld a0, 456(sp) # 8-byte Folded Reload + seqz a0, a0 + ld a1, 400(sp) # 8-byte Folded Reload snez a1, a1 and a0, a1, a0 - seqz a1, a5 + seqz a1, a3 and a1, a1, s5 or a0, a0, a1 - beqz a0, .LBB496_1031 -# %bb.1029: # %land.lhs.true.i1820 - # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_1105 +# %bb.1103: # %land.lhs.true.i1820 + # in Loop: Header=BB496_541 Depth=1 ld a0, 32(s9) li a3, 1 - ld s6, 424(sp) # 8-byte Folded Reload - beqz a0, .LBB496_1032 -# %bb.1030: # %if.then.i1823 - # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_1105 +# %bb.1104: # %if.then.i1823 + # in Loop: Header=BB496_541 Depth=1 lw a1, 24(s9) addiw a1, a1, -1 li a2, 24 mul a1, a1, a2 add a0, a0, a1 sb a3, 3(a0) - j .LBB496_1032 -.LBB496_1031: # in Loop: Header=BB496_542 Depth=1 - ld s6, 424(sp) # 8-byte Folded Reload -.LBB496_1032: # %if.end652 - # in Loop: Header=BB496_542 Depth=1 - ld s5, 344(sp) # 8-byte Folded Reload - lbu a0, 37(s5) - beqz a0, .LBB496_1034 -# %bb.1033: # %if.then.i1832 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_1105: # %if.end652 + # in Loop: Header=BB496_541 Depth=1 + lbu a0, 37(s8) + beqz a0, .LBB496_1107 +# %bb.1106: # %if.then.i1832 + # in Loop: Header=BB496_541 Depth=1 li s1, 1 addi a0, a0, -1 andi a1, a0, 255 slli a1, a1, 2 - add a1, s5, a1 + add a1, s8, a1 lw s2, 40(a1) - sb a0, 37(s5) - j .LBB496_1035 -.LBB496_1034: # %if.else.i1837 - # in Loop: Header=BB496_542 Depth=1 + sb a0, 37(s8) + j .LBB496_1108 +.LBB496_1107: # %if.else.i1837 + # in Loop: Header=BB496_541 Depth=1 li s1, 1 - lw s2, 88(s5) + lw s2, 88(s8) addiw s2, s2, 1 - sw s2, 88(s5) -.LBB496_1035: # %sqlite3GetTempReg.exit1840 - # in Loop: Header=BB496_542 Depth=1 + sw s2, 88(s8) +.LBB496_1108: # %sqlite3GetTempReg.exit1840 + # in Loop: Header=BB496_541 Depth=1 + ld s5, 480(sp) # 8-byte Folded Reload ld a0, 416(sp) # 8-byte Folded Reload - or a0, a0, s6 - beqz a0, .LBB496_1070 -# %bb.1036: # %if.then655 - # in Loop: Header=BB496_542 Depth=1 + or a0, a0, s10 + beqz a0, .LBB496_1124 +# %bb.1109: # %if.then655 + # in Loop: Header=BB496_541 Depth=1 lw s5, 24(s9) lw s6, 28(s9) mv s0, s5 - blt s5, s6, .LBB496_1056 -# %bb.1037: # %if.then.i1844 - # in Loop: Header=BB496_542 Depth=1 - bnez s6, .LBB496_1039 -# %bb.1038: # %if.then.i1844 - # in Loop: Header=BB496_542 Depth=1 + blt s5, s6, .LBB496_1115 +# %bb.1110: # %if.then.i1844 + # in Loop: Header=BB496_541 Depth=1 + bnez s6, .LBB496_1112 +# %bb.1111: # %if.then.i1844 + # in Loop: Header=BB496_541 Depth=1 li s0, 42 - j .LBB496_1040 -.LBB496_1039: # in Loop: Header=BB496_542 Depth=1 + j .LBB496_1113 +.LBB496_1112: # in Loop: Header=BB496_541 Depth=1 slliw s0, s6, 1 -.LBB496_1040: # %if.then.i1844 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_1113: # %if.then.i1844 + # in Loop: Header=BB496_541 Depth=1 ld s7, 0(s9) lbu a0, 42(s7) - bnez a0, .LBB496_1055 -# %bb.1041: # %if.then.i.i.i1869 - # in Loop: Header=BB496_542 Depth=1 - ld a0, 32(s9) - li a1, 24 - mulw a1, s0, a1 - call sqlite3_realloc - beqz a0, .LBB496_1053 -# %bb.1042: # %if.then.i.i1873 - # in Loop: Header=BB496_542 Depth=1 - sw s0, 28(s9) - sd a0, 32(s9) - ld a4, 448(sp) # 8-byte Folded Reload - bge s6, s0, .LBB496_1055 -# %bb.1043: # %if.then5.i.i1875 - # in Loop: Header=BB496_542 Depth=1 - li a2, 24 - mul a1, s6, a2 - add a0, a0, a1 - subw a1, s0, s6 - mul a2, a1, a2 - li a1, 0 - call memset@plt - j .LBB496_1054 -.LBB496_1044: # %if.then.i.i.i1805 - # in Loop: Header=BB496_542 Depth=1 - sd a5, 472(sp) # 8-byte Folded Spill - ld a0, 32(s9) - li a1, 24 - mulw a1, s7, a1 - call sqlite3_realloc - beqz a0, .LBB496_1079 -# %bb.1045: # %if.then.i.i1809 - # in Loop: Header=BB496_542 Depth=1 - sw s7, 28(s9) - sd a0, 32(s9) - ld a4, 448(sp) # 8-byte Folded Reload - ld a5, 472(sp) # 8-byte Folded Reload - bge s6, s7, .LBB496_1025 -# %bb.1046: # %if.then5.i.i1811 - # in Loop: Header=BB496_542 Depth=1 - li a2, 24 - mul a1, s6, a2 - add a0, a0, a1 - subw a1, s7, s6 - mul a2, a1, a2 - li a1, 0 - call memset@plt - ld a5, 472(sp) # 8-byte Folded Reload - ld a4, 448(sp) # 8-byte Folded Reload - j .LBB496_1025 -.LBB496_1047: # %if.then.i.i.i.i1657 - # in Loop: Header=BB496_542 Depth=1 - mv s7, a1 - ld a0, 32(s9) - li a1, 24 - mulw a1, s6, a1 - call sqlite3_realloc - beqz a0, .LBB496_1161 -# %bb.1048: # %if.then.i.i.i1661 - # in Loop: Header=BB496_542 Depth=1 - sw s6, 28(s9) - sd a0, 32(s9) - mv a1, s7 - ld a4, 448(sp) # 8-byte Folded Reload - bge s3, s6, .LBB496_991 -# %bb.1049: # %if.then5.i.i.i1663 - # in Loop: Header=BB496_542 Depth=1 - li a2, 24 - mul a1, s3, a2 - add a0, a0, a1 - subw a1, s6, s3 - mul a2, a1, a2 - li a1, 0 - call memset@plt - ld a4, 448(sp) # 8-byte Folded Reload - mv a1, s7 - j .LBB496_991 -.LBB496_1050: # %if.then.i.i.i1711 - # in Loop: Header=BB496_542 Depth=1 - sd a5, 472(sp) # 8-byte Folded Spill - ld a0, 32(s9) - li a1, 24 - mulw a1, s7, a1 - call sqlite3_realloc - beqz a0, .LBB496_1162 -# %bb.1051: # %if.then.i.i1715 - # in Loop: Header=BB496_542 Depth=1 - sw s7, 28(s9) - sd a0, 32(s9) - ld a4, 448(sp) # 8-byte Folded Reload - ld a5, 472(sp) # 8-byte Folded Reload - bge s6, s7, .LBB496_1005 -# %bb.1052: # %if.then5.i.i1717 - # in Loop: Header=BB496_542 Depth=1 - li a2, 24 - mul a1, s6, a2 - add a0, a0, a1 - subw a1, s7, s6 - mul a2, a1, a2 - li a1, 0 - call memset@plt - ld a5, 472(sp) # 8-byte Folded Reload - ld a4, 448(sp) # 8-byte Folded Reload - j .LBB496_1005 -.LBB496_1053: # %if.then2.i.i.i1881 - # in Loop: Header=BB496_542 Depth=1 - sb s1, 42(s7) -.LBB496_1054: # %resizeOpArray.exit.i1851 - # in Loop: Header=BB496_542 Depth=1 - ld a4, 448(sp) # 8-byte Folded Reload -.LBB496_1055: # %resizeOpArray.exit.i1851 - # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_1146 +.LBB496_1114: # %resizeOpArray.exit.i1851 + # in Loop: Header=BB496_541 Depth=1 ld a0, 0(s9) lbu a0, 42(a0) lw s0, 24(s9) - ld s7, 480(sp) # 8-byte Folded Reload - bnez a0, .LBB496_1057 -.LBB496_1056: # %if.end6.i1858 - # in Loop: Header=BB496_542 Depth=1 + li s7, 48 + bnez a0, .LBB496_1116 +.LBB496_1115: # %if.end6.i1858 + # in Loop: Header=BB496_541 Depth=1 ld a0, 32(s9) addi s0, s0, 1 sw s0, 24(s9) @@ -118582,65 +118879,36 @@ sd zero, 16(a0) lw s0, 24(s9) sb zero, 339(s9) -.LBB496_1057: # %sqlite3VdbeAddOp3.exit1882 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_1116: # %sqlite3VdbeAddOp3.exit1882 + # in Loop: Header=BB496_541 Depth=1 lw s4, 28(s9) mv a0, s0 - blt s0, s4, .LBB496_1069 -# %bb.1058: # %if.then.i.i1886 - # in Loop: Header=BB496_542 Depth=1 - bnez s4, .LBB496_1060 -# %bb.1059: # %if.then.i.i1886 - # in Loop: Header=BB496_542 Depth=1 + blt s0, s4, .LBB496_1123 +# %bb.1117: # %if.then.i.i1886 + # in Loop: Header=BB496_541 Depth=1 + bnez s4, .LBB496_1119 +# %bb.1118: # %if.then.i.i1886 + # in Loop: Header=BB496_541 Depth=1 li s5, 42 - j .LBB496_1061 -.LBB496_1060: # in Loop: Header=BB496_542 Depth=1 + j .LBB496_1120 +.LBB496_1119: # in Loop: Header=BB496_541 Depth=1 slliw s5, s4, 1 -.LBB496_1061: # %if.then.i.i1886 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_1120: # %if.then.i.i1886 + # in Loop: Header=BB496_541 Depth=1 ld s6, 0(s9) lbu a0, 42(s6) - bnez a0, .LBB496_1067 -# %bb.1062: # %if.then.i.i.i.i1910 - # in Loop: Header=BB496_542 Depth=1 - ld a0, 32(s9) - li a1, 24 - mulw a1, s5, a1 - call sqlite3_realloc - beqz a0, .LBB496_1065 -# %bb.1063: # %if.then.i.i.i1914 - # in Loop: Header=BB496_542 Depth=1 - sw s5, 28(s9) - sd a0, 32(s9) - ld a4, 448(sp) # 8-byte Folded Reload - bge s4, s5, .LBB496_1067 -# %bb.1064: # %if.then5.i.i.i1916 - # in Loop: Header=BB496_542 Depth=1 - li a2, 24 - mul a1, s4, a2 - add a0, a0, a1 - subw a1, s5, s4 - mul a2, a1, a2 - li a1, 0 - call memset@plt - j .LBB496_1066 -.LBB496_1065: # %if.then2.i.i.i.i1922 - # in Loop: Header=BB496_542 Depth=1 - sb s1, 42(s6) -.LBB496_1066: # %resizeOpArray.exit.i.i1893 - # in Loop: Header=BB496_542 Depth=1 - ld a4, 448(sp) # 8-byte Folded Reload -.LBB496_1067: # %resizeOpArray.exit.i.i1893 - # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_1149 +.LBB496_1121: # %resizeOpArray.exit.i.i1893 + # in Loop: Header=BB496_541 Depth=1 ld a0, 0(s9) lbu a0, 42(a0) - ld s5, 344(sp) # 8-byte Folded Reload - bnez a0, .LBB496_1070 -# %bb.1068: # %resizeOpArray.exit.if.end6_crit_edge.i.i1897 - # in Loop: Header=BB496_542 Depth=1 + ld s5, 480(sp) # 8-byte Folded Reload + bnez a0, .LBB496_1124 +# %bb.1122: # %resizeOpArray.exit.if.end6_crit_edge.i.i1897 + # in Loop: Header=BB496_541 Depth=1 lw a0, 24(s9) -.LBB496_1069: # %if.end6.i.i1899 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_1123: # %if.end6.i.i1899 + # in Loop: Header=BB496_541 Depth=1 ld a1, 32(s9) addi a0, a0, 1 sw a0, 24(s9) @@ -118655,74 +118923,39 @@ sw zero, 12(a0) sd zero, 16(a0) sb zero, 339(s9) - ld s5, 344(sp) # 8-byte Folded Reload -.LBB496_1070: # %if.end658 - # in Loop: Header=BB496_542 Depth=1 - ld a0, 392(sp) # 8-byte Folded Reload - bnez a0, .LBB496_1097 -# %bb.1071: # %if.then660 - # in Loop: Header=BB496_542 Depth=1 + ld s5, 480(sp) # 8-byte Folded Reload +.LBB496_1124: # %if.end658 + # in Loop: Header=BB496_541 Depth=1 + ld a0, 432(sp) # 8-byte Folded Reload + bnez a0, .LBB496_1140 +# %bb.1125: # %if.then660 + # in Loop: Header=BB496_541 Depth=1 lw s4, 24(s9) lw s5, 28(s9) mv s0, s4 - blt s4, s5, .LBB496_1083 -# %bb.1072: # %if.then.i.i1927 - # in Loop: Header=BB496_542 Depth=1 - bnez s5, .LBB496_1074 -# %bb.1073: # %if.then.i.i1927 - # in Loop: Header=BB496_542 Depth=1 + blt s4, s5, .LBB496_1131 +# %bb.1126: # %if.then.i.i1927 + # in Loop: Header=BB496_541 Depth=1 + bnez s5, .LBB496_1128 +# %bb.1127: # %if.then.i.i1927 + # in Loop: Header=BB496_541 Depth=1 li s0, 42 - j .LBB496_1075 -.LBB496_1074: # in Loop: Header=BB496_542 Depth=1 + j .LBB496_1129 +.LBB496_1128: # in Loop: Header=BB496_541 Depth=1 slliw s0, s5, 1 -.LBB496_1075: # %if.then.i.i1927 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_1129: # %if.then.i.i1927 + # in Loop: Header=BB496_541 Depth=1 ld s6, 0(s9) lbu a0, 42(s6) - bnez a0, .LBB496_1082 -# %bb.1076: # %if.then.i.i.i.i1951 - # in Loop: Header=BB496_542 Depth=1 - ld a0, 32(s9) - li a1, 24 - mulw a1, s0, a1 - call sqlite3_realloc - beqz a0, .LBB496_1080 -# %bb.1077: # %if.then.i.i.i1955 - # in Loop: Header=BB496_542 Depth=1 - sw s0, 28(s9) - sd a0, 32(s9) - ld a4, 448(sp) # 8-byte Folded Reload - bge s5, s0, .LBB496_1082 -# %bb.1078: # %if.then5.i.i.i1957 - # in Loop: Header=BB496_542 Depth=1 - li a2, 24 - mul a1, s5, a2 - add a0, a0, a1 - subw a1, s0, s5 - mul a2, a1, a2 - li a1, 0 - call memset@plt - j .LBB496_1081 -.LBB496_1079: # %if.then2.i.i.i1817 - # in Loop: Header=BB496_542 Depth=1 - sb s1, 42(s8) - ld a4, 448(sp) # 8-byte Folded Reload - ld a5, 472(sp) # 8-byte Folded Reload - j .LBB496_1025 -.LBB496_1080: # %if.then2.i.i.i.i1963 - # in Loop: Header=BB496_542 Depth=1 - sb s1, 42(s6) -.LBB496_1081: # %resizeOpArray.exit.i.i1934 - # in Loop: Header=BB496_542 Depth=1 - ld a4, 448(sp) # 8-byte Folded Reload -.LBB496_1082: # %resizeOpArray.exit.i.i1934 - # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_1152 +.LBB496_1130: # %resizeOpArray.exit.i.i1934 + # in Loop: Header=BB496_541 Depth=1 ld a0, 0(s9) lbu a0, 42(a0) lw s0, 24(s9) - bnez a0, .LBB496_1084 -.LBB496_1083: # %if.end6.i.i1940 - # in Loop: Header=BB496_542 Depth=1 + bnez a0, .LBB496_1132 +.LBB496_1131: # %if.end6.i.i1940 + # in Loop: Header=BB496_541 Depth=1 ld a0, 32(s9) addi s0, s0, 1 sw s0, 24(s9) @@ -118738,65 +118971,36 @@ sd zero, 16(a0) lw s0, 24(s9) sb zero, 339(s9) -.LBB496_1084: # %sqlite3VdbeAddOp2.exit1964 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_1132: # %sqlite3VdbeAddOp2.exit1964 + # in Loop: Header=BB496_541 Depth=1 lw s4, 28(s9) mv a0, s0 - blt s0, s4, .LBB496_1096 -# %bb.1085: # %if.then.i1968 - # in Loop: Header=BB496_542 Depth=1 - bnez s4, .LBB496_1087 -# %bb.1086: # %if.then.i1968 - # in Loop: Header=BB496_542 Depth=1 + blt s0, s4, .LBB496_1139 +# %bb.1133: # %if.then.i1968 + # in Loop: Header=BB496_541 Depth=1 + bnez s4, .LBB496_1135 +# %bb.1134: # %if.then.i1968 + # in Loop: Header=BB496_541 Depth=1 li s5, 42 - j .LBB496_1088 -.LBB496_1087: # in Loop: Header=BB496_542 Depth=1 + j .LBB496_1136 +.LBB496_1135: # in Loop: Header=BB496_541 Depth=1 slliw s5, s4, 1 -.LBB496_1088: # %if.then.i1968 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_1136: # %if.then.i1968 + # in Loop: Header=BB496_541 Depth=1 ld s6, 0(s9) lbu a0, 42(s6) - bnez a0, .LBB496_1094 -# %bb.1089: # %if.then.i.i.i1993 - # in Loop: Header=BB496_542 Depth=1 - ld a0, 32(s9) - li a1, 24 - mulw a1, s5, a1 - call sqlite3_realloc - beqz a0, .LBB496_1092 -# %bb.1090: # %if.then.i.i1997 - # in Loop: Header=BB496_542 Depth=1 - sw s5, 28(s9) - sd a0, 32(s9) - ld a4, 448(sp) # 8-byte Folded Reload - bge s4, s5, .LBB496_1094 -# %bb.1091: # %if.then5.i.i1999 - # in Loop: Header=BB496_542 Depth=1 - li a2, 24 - mul a1, s4, a2 - add a0, a0, a1 - subw a1, s5, s4 - mul a2, a1, a2 - li a1, 0 - call memset@plt - j .LBB496_1093 -.LBB496_1092: # %if.then2.i.i.i2005 - # in Loop: Header=BB496_542 Depth=1 - sb s1, 42(s6) -.LBB496_1093: # %resizeOpArray.exit.i1975 - # in Loop: Header=BB496_542 Depth=1 - ld a4, 448(sp) # 8-byte Folded Reload -.LBB496_1094: # %resizeOpArray.exit.i1975 - # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_1155 +.LBB496_1137: # %resizeOpArray.exit.i1975 + # in Loop: Header=BB496_541 Depth=1 ld a0, 0(s9) lbu a0, 42(a0) - ld s5, 344(sp) # 8-byte Folded Reload - bnez a0, .LBB496_1097 -# %bb.1095: # %resizeOpArray.exit.if.end6_crit_edge.i1980 - # in Loop: Header=BB496_542 Depth=1 + ld s5, 480(sp) # 8-byte Folded Reload + bnez a0, .LBB496_1140 +# %bb.1138: # %resizeOpArray.exit.if.end6_crit_edge.i1980 + # in Loop: Header=BB496_541 Depth=1 lw a0, 24(s9) -.LBB496_1096: # %if.end6.i1982 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_1139: # %if.end6.i1982 + # in Loop: Header=BB496_541 Depth=1 ld a1, 32(s9) addi a0, a0, 1 sw a0, 24(s9) @@ -118811,512 +119015,213 @@ sw s2, 12(a0) sd zero, 16(a0) sb zero, 339(s9) - ld s5, 344(sp) # 8-byte Folded Reload -.LBB496_1097: # %if.end663 - # in Loop: Header=BB496_542 Depth=1 - beqz s2, .LBB496_1100 -# %bb.1098: # %land.lhs.true.i2008 - # in Loop: Header=BB496_542 Depth=1 - lbu a0, 37(s5) + ld s5, 480(sp) # 8-byte Folded Reload +.LBB496_1140: # %if.end663 + # in Loop: Header=BB496_541 Depth=1 + beqz s2, .LBB496_1143 +# %bb.1141: # %land.lhs.true.i2008 + # in Loop: Header=BB496_541 Depth=1 + lbu a0, 37(s8) li a1, 7 - bltu a1, a0, .LBB496_1100 -# %bb.1099: # %if.then.i2012 - # in Loop: Header=BB496_542 Depth=1 + bltu a1, a0, .LBB496_1143 +# %bb.1142: # %if.then.i2012 + # in Loop: Header=BB496_541 Depth=1 addi a1, a0, 1 - sb a1, 37(s5) + sb a1, 37(s8) slli a0, a0, 2 - add a0, s5, a0 + add a0, s8, a0 sw s2, 40(a0) -.LBB496_1100: # %sqlite3ReleaseTempReg.exit2016 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_1143: # %sqlite3ReleaseTempReg.exit2016 + # in Loop: Header=BB496_541 Depth=1 li a0, 47 - ld a1, 272(sp) # 8-byte Folded Reload + ld a1, 288(sp) # 8-byte Folded Reload li s6, 1 - bnez a4, .LBB496_1102 -# %bb.1101: # %sqlite3ReleaseTempReg.exit2016 - # in Loop: Header=BB496_542 Depth=1 + ld a2, 456(sp) # 8-byte Folded Reload + bnez a2, .LBB496_1145 +# %bb.1144: # %sqlite3ReleaseTempReg.exit2016 + # in Loop: Header=BB496_541 Depth=1 li a0, 102 -.LBB496_1102: # %sqlite3ReleaseTempReg.exit2016 - # in Loop: Header=BB496_542 Depth=1 +.LBB496_1145: # %sqlite3ReleaseTempReg.exit2016 + # in Loop: Header=BB496_541 Depth=1 sw a0, 48(a1) ld a0, 464(sp) # 8-byte Folded Reload sw a0, 52(a1) sw s3, 56(a1) - j .LBB496_750 -.LBB496_1103: # %if.then2.i.i.i.i2534 - # in Loop: Header=BB496_542 Depth=1 - sb s1, 42(s9) -.LBB496_1104: # %resizeOpArray.exit.i.i2505 - # in Loop: Header=BB496_542 Depth=1 - mv a0, s8 -.LBB496_1105: # %resizeOpArray.exit.i.i2505 - # in Loop: Header=BB496_542 Depth=1 - ld a1, 0(s4) - lbu a1, 42(a1) - ld s9, 240(sp) # 8-byte Folded Reload - li s8, 48 - ld s7, 480(sp) # 8-byte Folded Reload - bnez a1, .LBB496_1108 -# %bb.1106: # %resizeOpArray.exit.if.end6_crit_edge.i.i2509 - # in Loop: Header=BB496_542 Depth=1 - lw a1, 24(s4) -.LBB496_1107: # %if.end6.i.i2511 - # in Loop: Header=BB496_542 Depth=1 - ld a2, 32(s4) - addi a1, a1, 1 - sw a1, 24(s4) - li a1, 24 - mul a1, s5, a1 - add a1, a2, a1 - li a2, 7 - sh a2, 0(a1) - sw a0, 4(a1) - sw s3, 8(a1) - sw zero, 12(a1) - sd zero, 16(a1) - sb zero, 339(s4) -.LBB496_1108: # %sqlite3ExprCode.exit1213 - # in Loop: Header=BB496_542 Depth=1 - lbu a0, 0(s0) - ori a0, a0, 2 - li a1, 71 - ld a5, 448(sp) # 8-byte Folded Reload - bne a0, a1, .LBB496_1111 -# %bb.1109: # %if.then452 - # in Loop: Header=BB496_542 Depth=1 - li s3, 70 - ld a3, 272(sp) # 8-byte Folded Reload - ld a4, 496(sp) # 8-byte Folded Reload - bnez a5, .LBB496_1113 -# %bb.1110: # %if.then452 - # in Loop: Header=BB496_542 Depth=1 - li s3, 72 - j .LBB496_1113 -.LBB496_1111: # %if.else455 - # in Loop: Header=BB496_542 Depth=1 - li s3, 71 - ld a3, 272(sp) # 8-byte Folded Reload - ld a4, 496(sp) # 8-byte Folded Reload - bnez a5, .LBB496_1113 -# %bb.1112: # %if.else455 - # in Loop: Header=BB496_542 Depth=1 - li s3, 69 -.LBB496_1113: # %if.else455 - # in Loop: Header=BB496_542 Depth=1 - ld s5, 344(sp) # 8-byte Folded Reload - li s6, 1 -.LBB496_1114: # %land.lhs.true.i1217 - # Parent Loop BB496_542 Depth=1 - # => This Inner Loop Header: Depth=2 - lbu a0, 16(s2) - andi a1, a0, 4 - bnez a1, .LBB496_1119 -# %bb.1115: # %land.lhs.true2.i1221 - # in Loop: Header=BB496_1114 Depth=2 - lw a1, 12(a3) - beqz a1, .LBB496_1117 -# %bb.1116: # %lor.lhs.false.i1223 - # in Loop: Header=BB496_1114 Depth=2 - ld a1, 0(s2) - lbu a1, 2(a1) - andi a1, a1, 1 - beqz a1, .LBB496_1119 -.LBB496_1117: # %if.then.i1226 - # in Loop: Header=BB496_1114 Depth=2 - lhu a1, 8(s2) - ori a0, a0, 4 - slli a2, a1, 48 - sb a0, 16(s2) - bltz a2, .LBB496_1119 -# %bb.1118: # %if.then16.i1229 - # in Loop: Header=BB496_1114 Depth=2 - ld a0, 24(s2) - ld a0, 24(a0) - mul s2, a1, s8 - add s2, a0, s2 - lbu a1, 17(s2) - addi a1, a1, -1 - andi a2, a1, 255 - snez a2, a2 - seqz a0, a0 - or a0, a0, a2 - sb a1, 17(s2) - beqz a0, .LBB496_1114 -.LBB496_1119: # %if.then468 - # in Loop: Header=BB496_542 Depth=1 - lw s0, 24(s9) - li a0, 47 - bnez a5, .LBB496_1121 -# %bb.1120: # %if.then468 - # in Loop: Header=BB496_542 Depth=1 - li a0, 102 -.LBB496_1121: # %if.then468 - # in Loop: Header=BB496_542 Depth=1 - ld a1, 272(sp) # 8-byte Folded Reload - sw a0, 48(a1) - sw a4, 52(a1) - sw s0, 56(a1) - lbu a0, 37(s5) - beqz a0, .LBB496_1123 -# %bb.1122: # %if.then.i1242 - # in Loop: Header=BB496_542 Depth=1 - addi a0, a0, -1 - andi a1, a0, 255 - slli a1, a1, 2 - add a1, s5, a1 - lw s1, 40(a1) - sb a0, 37(s5) - lw s4, 28(s9) - mv s2, s0 - bge s0, s4, .LBB496_1124 - j .LBB496_1129 -.LBB496_1123: # %if.else.i1247 - # in Loop: Header=BB496_542 Depth=1 - lw s1, 88(s5) - addiw s1, s1, 1 - sw s1, 88(s5) - lw s4, 28(s9) - mv s2, s0 - blt s0, s4, .LBB496_1129 -.LBB496_1124: # %if.then.i.i1254 - # in Loop: Header=BB496_542 Depth=1 - bnez s4, .LBB496_1126 -# %bb.1125: # %if.then.i.i1254 - # in Loop: Header=BB496_542 Depth=1 - li s2, 42 - j .LBB496_1127 -.LBB496_1126: # in Loop: Header=BB496_542 Depth=1 - slliw s2, s4, 1 -.LBB496_1127: # %if.then.i.i1254 - # in Loop: Header=BB496_542 Depth=1 - ld s5, 0(s9) - lbu a0, 42(s5) - beqz a0, .LBB496_1143 -.LBB496_1128: # %resizeOpArray.exit.i.i1261 - # in Loop: Header=BB496_542 Depth=1 - ld a0, 0(s9) - lbu a0, 42(a0) - lw s2, 24(s9) - ld s5, 344(sp) # 8-byte Folded Reload - bnez a0, .LBB496_1130 -.LBB496_1129: # %if.end6.i.i1267 - # in Loop: Header=BB496_542 Depth=1 + j .LBB496_768 +.LBB496_1146: # %if.then.i.i.i1869 + # in Loop: Header=BB496_541 Depth=1 ld a0, 32(s9) - addi s2, s2, 1 - sw s2, 24(s9) li a1, 24 - mul a1, s0, a1 - add a0, a0, a1 - li a1, 38 - sh a1, 0(a0) - ld a1, 496(sp) # 8-byte Folded Reload - sw a1, 4(a0) - sw s1, 8(a0) - sw zero, 12(a0) - sd zero, 16(a0) - lw s2, 24(s9) - sb zero, 339(s9) -.LBB496_1130: # %sqlite3VdbeAddOp2.exit1291 - # in Loop: Header=BB496_542 Depth=1 - lw s4, 28(s9) - ld a0, 272(sp) # 8-byte Folded Reload - lw s0, 8(a0) - mv a0, s2 - blt s2, s4, .LBB496_1137 -# %bb.1131: # %if.then.i1295 - # in Loop: Header=BB496_542 Depth=1 - li s7, 1 - bnez s4, .LBB496_1133 -# %bb.1132: # %if.then.i1295 - # in Loop: Header=BB496_542 Depth=1 - li s5, 42 - j .LBB496_1134 -.LBB496_1133: # in Loop: Header=BB496_542 Depth=1 - slliw s5, s4, 1 -.LBB496_1134: # %if.then.i1295 - # in Loop: Header=BB496_542 Depth=1 - ld s6, 0(s9) - lbu a0, 42(s6) - beqz a0, .LBB496_1146 -.LBB496_1135: # %resizeOpArray.exit.i1302 - # in Loop: Header=BB496_542 Depth=1 - ld a0, 0(s9) - lbu a0, 42(a0) - ld s5, 344(sp) # 8-byte Folded Reload - li s6, 1 - ld s7, 480(sp) # 8-byte Folded Reload - bnez a0, .LBB496_1138 -# %bb.1136: # %resizeOpArray.exit.if.end6_crit_edge.i1307 - # in Loop: Header=BB496_542 Depth=1 - lw a0, 24(s9) -.LBB496_1137: # %if.end6.i1309 - # in Loop: Header=BB496_542 Depth=1 - ld a1, 32(s9) - addi a0, a0, 1 - sw a0, 24(s9) - li a0, 24 - mul a0, s2, a0 - add a0, a1, a0 - sb s3, 0(a0) - sw s0, 4(a0) - ld a1, 472(sp) # 8-byte Folded Reload - sw a1, 8(a0) - sw s1, 12(a0) - sd zero, 16(a0) - sb zero, 1(a0) - sb zero, 339(s9) -.LBB496_1138: # %land.lhs.true.i1336 - # in Loop: Header=BB496_542 Depth=1 - ld a0, 32(s9) - beqz a0, .LBB496_1140 -# %bb.1139: # %if.then.i1338 - # in Loop: Header=BB496_542 Depth=1 - lw a1, 24(s9) - addiw a1, a1, -1 + mulw a1, s0, a1 + call sqlite3_realloc + beqz a0, .LBB496_1158 +# %bb.1147: # %if.then.i.i1873 + # in Loop: Header=BB496_541 Depth=1 + sw s0, 28(s9) + sd a0, 32(s9) + bge s6, s0, .LBB496_1114 +# %bb.1148: # %if.then5.i.i1875 + # in Loop: Header=BB496_541 Depth=1 li a2, 24 - mul a1, a1, a2 + mul a1, s6, a2 add a0, a0, a1 - li a1, 107 - sb a1, 3(a0) -.LBB496_1140: # %sqlite3VdbeChangeP5.exit - # in Loop: Header=BB496_542 Depth=1 - ld s3, 488(sp) # 8-byte Folded Reload - bnez s1, .LBB496_1141 - j .LBB496_751 -.LBB496_1141: # %land.lhs.true.i1344 - # in Loop: Header=BB496_542 Depth=1 - lbu a0, 37(s5) - li a1, 7 - bgeu a1, a0, .LBB496_1142 - j .LBB496_751 -.LBB496_1142: # %if.then.i1348 - # in Loop: Header=BB496_542 Depth=1 - addi a1, a0, 1 - sb a1, 37(s5) - slli a0, a0, 2 - add a0, s5, a0 - sw s1, 40(a0) - j .LBB496_751 -.LBB496_1143: # %if.then.i.i.i.i1278 - # in Loop: Header=BB496_542 Depth=1 + subw a1, s0, s6 + mul a2, a1, a2 + li a1, 0 + call memset@plt + j .LBB496_1114 +.LBB496_1149: # %if.then.i.i.i.i1910 + # in Loop: Header=BB496_541 Depth=1 ld a0, 32(s9) li a1, 24 - mulw a1, s2, a1 + mulw a1, s5, a1 call sqlite3_realloc - beqz a0, .LBB496_1149 -# %bb.1144: # %if.then.i.i.i1282 - # in Loop: Header=BB496_542 Depth=1 - sw s2, 28(s9) + beqz a0, .LBB496_1159 +# %bb.1150: # %if.then.i.i.i1914 + # in Loop: Header=BB496_541 Depth=1 + sw s5, 28(s9) sd a0, 32(s9) - bge s4, s2, .LBB496_1128 -# %bb.1145: # %if.then5.i.i.i1284 - # in Loop: Header=BB496_542 Depth=1 + bge s4, s5, .LBB496_1121 +# %bb.1151: # %if.then5.i.i.i1916 + # in Loop: Header=BB496_541 Depth=1 li a2, 24 mul a1, s4, a2 add a0, a0, a1 - subw a1, s2, s4 + subw a1, s5, s4 mul a2, a1, a2 li a1, 0 call memset@plt - j .LBB496_1128 -.LBB496_1146: # %if.then.i.i.i1321 - # in Loop: Header=BB496_542 Depth=1 + j .LBB496_1121 +.LBB496_1152: # %if.then.i.i.i.i1951 + # in Loop: Header=BB496_541 Depth=1 ld a0, 32(s9) li a1, 24 - mulw a1, s5, a1 + mulw a1, s0, a1 call sqlite3_realloc - beqz a0, .LBB496_1150 -# %bb.1147: # %if.then.i.i1325 - # in Loop: Header=BB496_542 Depth=1 - sw s5, 28(s9) + beqz a0, .LBB496_1160 +# %bb.1153: # %if.then.i.i.i1955 + # in Loop: Header=BB496_541 Depth=1 + sw s0, 28(s9) sd a0, 32(s9) - bge s4, s5, .LBB496_1135 -# %bb.1148: # %if.then5.i.i1327 - # in Loop: Header=BB496_542 Depth=1 + bge s5, s0, .LBB496_1130 +# %bb.1154: # %if.then5.i.i.i1957 + # in Loop: Header=BB496_541 Depth=1 li a2, 24 - mul a1, s4, a2 + mul a1, s5, a2 add a0, a0, a1 - subw a1, s5, s4 + subw a1, s0, s5 mul a2, a1, a2 li a1, 0 call memset@plt - j .LBB496_1135 -.LBB496_1149: # %if.then2.i.i.i.i1290 - # in Loop: Header=BB496_542 Depth=1 - sb s6, 42(s5) - j .LBB496_1128 -.LBB496_1150: # %if.then2.i.i.i1333 - # in Loop: Header=BB496_542 Depth=1 - sb s7, 42(s6) - j .LBB496_1135 -.LBB496_1151: # in Loop: Header=BB496_542 Depth=1 - slliw s5, s3, 1 -.LBB496_1152: # %if.then.i.i1516 - # in Loop: Header=BB496_542 Depth=1 - ld s1, 240(sp) # 8-byte Folded Reload - ld s6, 0(s1) - lbu a0, 42(s6) - bnez a0, .LBB496_1166 -# %bb.1153: # %if.then.i.i.i.i1540 - # in Loop: Header=BB496_542 Depth=1 - ld a0, 32(s1) + j .LBB496_1130 +.LBB496_1155: # %if.then.i.i.i1993 + # in Loop: Header=BB496_541 Depth=1 + ld a0, 32(s9) li a1, 24 mulw a1, s5, a1 call sqlite3_realloc - beqz a0, .LBB496_1164 -# %bb.1154: # %if.then.i.i.i1544 - # in Loop: Header=BB496_542 Depth=1 - sw s5, 28(s1) - sd a0, 32(s1) - ld a4, 448(sp) # 8-byte Folded Reload - bge s3, s5, .LBB496_1166 -# %bb.1155: # %if.then5.i.i.i1546 - # in Loop: Header=BB496_542 Depth=1 + beqz a0, .LBB496_1161 +# %bb.1156: # %if.then.i.i1997 + # in Loop: Header=BB496_541 Depth=1 + sw s5, 28(s9) + sd a0, 32(s9) + bge s4, s5, .LBB496_1137 +# %bb.1157: # %if.then5.i.i1999 + # in Loop: Header=BB496_541 Depth=1 li a2, 24 - mul a1, s3, a2 + mul a1, s4, a2 add a0, a0, a1 - subw a1, s5, s3 + subw a1, s5, s4 mul a2, a1, a2 li a1, 0 call memset@plt - j .LBB496_1165 -.LBB496_1156: # %if.then2.i.i.i2057 - # in Loop: Header=BB496_542 Depth=1 - sb s6, 42(s4) - j .LBB496_856 -.LBB496_1157: # %if.then2.i.i.i2099 - # in Loop: Header=BB496_542 Depth=1 - sb s6, 42(s4) - j .LBB496_860 -.LBB496_1158: # %if.then2.i.i.i.i2162 - # in Loop: Header=BB496_542 Depth=1 - sb s6, 42(s5) - j .LBB496_904 -.LBB496_1159: # %if.then2.i.i.i2204 - # in Loop: Header=BB496_542 Depth=1 - sb s6, 42(s5) - j .LBB496_911 -.LBB496_1160: # %if.then2.i.i.i.i1774 - # in Loop: Header=BB496_542 Depth=1 - li a0, 1 - sb a0, 42(s7) - ld a4, 448(sp) # 8-byte Folded Reload - mv a5, s1 - j .LBB496_987 -.LBB496_1161: # %if.then2.i.i.i.i1669 - # in Loop: Header=BB496_542 Depth=1 - sb s1, 42(s8) - mv a1, s7 - ld a4, 448(sp) # 8-byte Folded Reload - j .LBB496_991 -.LBB496_1162: # %if.then2.i.i.i1723 - # in Loop: Header=BB496_542 Depth=1 - li a0, 1 - sb a0, 42(s8) - ld a4, 448(sp) # 8-byte Folded Reload - ld a5, 472(sp) # 8-byte Folded Reload - j .LBB496_1005 -.LBB496_1163: # %if.then727.split - # in Loop: Header=BB496_542 Depth=1 + j .LBB496_1137 +.LBB496_1158: # %if.then2.i.i.i1881 + # in Loop: Header=BB496_541 Depth=1 + sb s1, 42(s7) + j .LBB496_1114 +.LBB496_1159: # %if.then2.i.i.i.i1922 + # in Loop: Header=BB496_541 Depth=1 + sb s1, 42(s6) + j .LBB496_1121 +.LBB496_1160: # %if.then2.i.i.i.i1963 + # in Loop: Header=BB496_541 Depth=1 + sb s1, 42(s6) + j .LBB496_1130 +.LBB496_1161: # %if.then2.i.i.i2005 + # in Loop: Header=BB496_541 Depth=1 + sb s1, 42(s6) + j .LBB496_1137 +.LBB496_1162: # %if.then727.split + # in Loop: Header=BB496_541 Depth=1 li a1, 5 mv a0, s9 ld a2, 464(sp) # 8-byte Folded Reload - mv a3, s1 + mv a3, s4 mv a4, s2 call sqlite3VdbeAddOp3 - j .LBB496_785 -.LBB496_1164: # %if.then2.i.i.i.i1552 - # in Loop: Header=BB496_542 Depth=1 + j .LBB496_803 +.LBB496_1163: # %if.then2.i.i.i.i1552 + # in Loop: Header=BB496_541 Depth=1 li a0, 1 sb a0, 42(s6) -.LBB496_1165: # %resizeOpArray.exit.i.i1523 - # in Loop: Header=BB496_542 Depth=1 - ld a4, 448(sp) # 8-byte Folded Reload -.LBB496_1166: # %resizeOpArray.exit.i.i1523 - # in Loop: Header=BB496_542 Depth=1 - ld a0, 0(s1) - lbu a0, 42(a0) - ld s5, 344(sp) # 8-byte Folded Reload - ld s1, 496(sp) # 8-byte Folded Reload - ld s6, 424(sp) # 8-byte Folded Reload - bnez a0, .LBB496_951 -# %bb.1167: # %resizeOpArray.exit.if.end6_crit_edge.i.i1527 - # in Loop: Header=BB496_542 Depth=1 - ld a3, 240(sp) # 8-byte Folded Reload - lw a0, 24(a3) -.LBB496_1168: # %if.end6.i.i1529 - # in Loop: Header=BB496_542 Depth=1 - ld a1, 32(a3) - addi a0, a0, 1 - sw a0, 24(a3) - li a0, 24 - mul a0, s0, a0 - add a0, a1, a0 - li a1, 50 - sb a1, 0(a0) - ld a1, 464(sp) # 8-byte Folded Reload - sw a1, 4(a0) - ld a1, 472(sp) # 8-byte Folded Reload - sw a1, 8(a0) - sw zero, 12(a0) - sd zero, 16(a0) - addi a0, a0, 1 - li a1, 1 - sd a1, 384(sp) # 8-byte Folded Spill - li s2, 22 - j .LBB496_950 -.LBB496_1169: + j .LBB496_1042 +.LBB496_1164: li a0, 1 ld a2, 168(sp) # 8-byte Folded Reload snez a1, a2 and a0, a1, a0 - beqz a0, .LBB496_1185 + beqz a0, .LBB496_1181 + j .LBB496_487 +.LBB496_1181: j .LBB496_488 -.LBB496_1185: - j .LBB496_489 -.LBB496_1170: # %for.end262.thread - lw a0, 24(s4) - li s3, 0 - sw a0, 16(s10) - j .LBB496_1172 -.LBB496_1171: - li s3, 0 -.LBB496_1172: # %for.end831 - sw s3, 20(s10) +.LBB496_1165: # %for.end262.thread + lw a0, 24(s9) + li s2, 0 + sw a0, 16(s7) + j .LBB496_1167 +.LBB496_1166: + li s2, 0 +.LBB496_1167: # %for.end831 + ld s10, 192(sp) # 8-byte Folded Reload + mv s3, s10 + sw s2, 20(s10) lw s0, 520(sp) ld a0, 528(sp) - blez s0, .LBB496_1178 -# %bb.1173: # %for.body.i2323.preheader + blez s0, .LBB496_1173 +# %bb.1168: # %for.body.i2323.preheader addi s0, s0, 1 addi s1, a0, 16 li s2, 1 - j .LBB496_1175 -.LBB496_1174: # %for.inc.i2327 - # in Loop: Header=BB496_1175 Depth=1 + j .LBB496_1170 +.LBB496_1169: # %for.inc.i2327 + # in Loop: Header=BB496_1170 Depth=1 addiw s0, s0, -1 addi s1, s1, 48 - bgeu s2, s0, .LBB496_1177 -.LBB496_1175: # %for.body.i2323 + bgeu s2, s0, .LBB496_1172 +.LBB496_1170: # %for.body.i2323 # =>This Inner Loop Header: Depth=1 lbu a0, 0(s1) andi a0, a0, 1 - beqz a0, .LBB496_1174 -# %bb.1176: # %if.then.i2326 - # in Loop: Header=BB496_1175 Depth=1 + beqz a0, .LBB496_1169 +# %bb.1171: # %if.then.i2326 + # in Loop: Header=BB496_1170 Depth=1 ld a0, -16(s1) call sqlite3ExprDelete - j .LBB496_1174 -.LBB496_1177: # %for.end.loopexit.i + j .LBB496_1169 +.LBB496_1172: # %for.end.loopexit.i ld a0, 528(sp) -.LBB496_1178: # %for.end.i2314 +.LBB496_1173: # %for.end.i2314 addi a1, sp, 536 xor a1, a0, a1 seqz a1, a1 seqz a2, a0 or a1, a1, a2 - beqz a1, .LBB496_1179 + beqz a1, .LBB496_1175 +# %bb.1174: + mv a0, s3 j .LBB496_50 -.LBB496_1179: # %if.end.i.i2318 +.LBB496_1175: # %if.end.i.i2318 lw a1, -8(a0) ld a3, 96(sp) # 8-byte Folded Reload ld a2, %pcrel_lo(.Lpcrel_hi1269)(a3) @@ -119324,13 +119229,14 @@ sub a2, a2, a1 sd a2, %pcrel_lo(.Lpcrel_hi1269)(a3) call free@plt + mv a0, s3 j .LBB496_50 -.LBB496_1180: # %if.then2.i.i.i +.LBB496_1176: # %if.then2.i.i.i li a0, 1 sb a0, 42(s1) - beqz s5, .LBB496_1186 + beqz s5, .LBB496_1182 j .LBB496_17 -.LBB496_1186: # %if.then2.i.i.i +.LBB496_1182: # %if.then2.i.i.i j .LBB496_18 .Lfunc_end496: .size sqlite3WhereBegin, .Lfunc_end496-sqlite3WhereBegin @@ -120918,11 +120824,11 @@ # in Loop: Header=BB498_3 Depth=1 sw s3, 28(s7) sd a0, 32(s7) + addi a1, sp, 112 + vl1r.v v8, (a1) # Unknown-size Folded Reload li a4, 1 li a5, 24 ld a2, 96(sp) # 8-byte Folded Reload - addi a1, sp, 112 - vl1r.v v8, (a1) # Unknown-size Folded Reload bge s2, s3, .LBB498_13 # %bb.12: # %if.then5.i.i.i # in Loop: Header=BB498_3 Depth=1 @@ -120932,11 +120838,11 @@ mul a2, a1, a5 li a1, 0 call memset@plt - addi a0, sp, 112 - vl1r.v v8, (a0) # Unknown-size Folded Reload ld a2, 96(sp) # 8-byte Folded Reload li a5, 24 li a4, 1 + addi a0, sp, 112 + vl1r.v v8, (a0) # Unknown-size Folded Reload .LBB498_13: # %resizeOpArray.exit.i.i # in Loop: Header=BB498_3 Depth=1 ld a0, 0(s7) @@ -121620,10 +121526,10 @@ # in Loop: Header=BB498_3 Depth=1 li a4, 1 sb a4, 42(s4) - li a5, 24 - ld a2, 96(sp) # 8-byte Folded Reload addi a0, sp, 112 vl1r.v v8, (a0) # Unknown-size Folded Reload + li a5, 24 + ld a2, 96(sp) # 8-byte Folded Reload ld a0, 0(s7) lbu a0, 42(a0) li s3, 102 @@ -121732,12 +121638,12 @@ # in Loop: Header=BB498_108 Depth=1 sw s10, 28(s7) sd a0, 32(s7) - li t3, 24 - li t4, 31 csrr a1, vlenb add a1, sp, a1 addi a1, a1, 112 vl1r.v v8, (a1) # Unknown-size Folded Reload + li t3, 24 + li t4, 31 li t5, 52 li t6, 22 bge s4, s10, .LBB498_118 @@ -121751,12 +121657,12 @@ call memset@plt li t6, 22 li t5, 52 + li t4, 31 + li t3, 24 csrr a0, vlenb add a0, sp, a0 addi a0, a0, 112 vl1r.v v8, (a0) # Unknown-size Folded Reload - li t4, 31 - li t3, 24 .LBB498_118: # %resizeOpArray.exit.i.i350 # in Loop: Header=BB498_108 Depth=1 ld a0, 0(s7) @@ -121815,12 +121721,12 @@ # in Loop: Header=BB498_108 Depth=1 sw s10, 28(s7) sd a0, 32(s7) - li t3, 24 - li t4, 31 csrr a1, vlenb add a1, sp, a1 addi a1, a1, 112 vl1r.v v8, (a1) # Unknown-size Folded Reload + li t3, 24 + li t4, 31 li t5, 52 li t6, 22 bge s4, s10, .LBB498_129 @@ -121834,12 +121740,12 @@ call memset@plt li t6, 22 li t5, 52 + li t4, 31 + li t3, 24 csrr a0, vlenb add a0, sp, a0 addi a0, a0, 112 vl1r.v v8, (a0) # Unknown-size Folded Reload - li t4, 31 - li t3, 24 .LBB498_129: # %resizeOpArray.exit.i.i389 # in Loop: Header=BB498_108 Depth=1 ld a0, 0(s7) @@ -122005,12 +121911,12 @@ # in Loop: Header=BB498_108 Depth=1 li a0, 1 sb a0, 42(s3) - li t3, 24 - li t4, 31 csrr a0, vlenb add a0, sp, a0 addi a0, a0, 112 vl1r.v v8, (a0) # Unknown-size Folded Reload + li t3, 24 + li t4, 31 li t5, 52 li t6, 22 ld a0, 0(s7) @@ -122021,12 +121927,12 @@ # in Loop: Header=BB498_108 Depth=1 li a0, 1 sb a0, 42(s3) - li t3, 24 - li t4, 31 csrr a0, vlenb add a0, sp, a0 addi a0, a0, 112 vl1r.v v8, (a0) # Unknown-size Folded Reload + li t3, 24 + li t4, 31 li t5, 52 li t6, 22 ld a0, 0(s7) @@ -137783,9 +137689,9 @@ li a4, 0 call sqlite3VdbeAddOp4 vsetivli zero, 2, e64, m1, ta, ma - addi a1, sp, 152 addi a0, sp, 272 vl1r.v v8, (a0) # Unknown-size Folded Reload + addi a1, sp, 152 vse64.v v8, (a1) addi a0, a1, 16 vse64.v v8, (a0) --- build.head//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/UI/Console/List.s 2023-11-13 08:03:21.251590659 +0000 +++ build//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/UI/Console/List.s 2023-11-13 08:03:16.283734262 +0000 @@ -3245,21 +3245,21 @@ .cfi_personality 155, DW.ref.__gxx_personality_v0 .cfi_lsda 27, .Lexception6 # %bb.0: # %entry - addi sp, sp, -608 - .cfi_def_cfa_offset 608 - sd ra, 600(sp) # 8-byte Folded Spill - sd s0, 592(sp) # 8-byte Folded Spill - sd s1, 584(sp) # 8-byte Folded Spill - sd s2, 576(sp) # 8-byte Folded Spill - sd s3, 568(sp) # 8-byte Folded Spill - sd s4, 560(sp) # 8-byte Folded Spill - sd s5, 552(sp) # 8-byte Folded Spill - sd s6, 544(sp) # 8-byte Folded Spill - sd s7, 536(sp) # 8-byte Folded Spill - sd s8, 528(sp) # 8-byte Folded Spill - sd s9, 520(sp) # 8-byte Folded Spill - sd s10, 512(sp) # 8-byte Folded Spill - sd s11, 504(sp) # 8-byte Folded Spill + addi sp, sp, -592 + .cfi_def_cfa_offset 592 + sd ra, 584(sp) # 8-byte Folded Spill + sd s0, 576(sp) # 8-byte Folded Spill + sd s1, 568(sp) # 8-byte Folded Spill + sd s2, 560(sp) # 8-byte Folded Spill + sd s3, 552(sp) # 8-byte Folded Spill + sd s4, 544(sp) # 8-byte Folded Spill + sd s5, 536(sp) # 8-byte Folded Spill + sd s6, 528(sp) # 8-byte Folded Spill + sd s7, 520(sp) # 8-byte Folded Spill + sd s8, 512(sp) # 8-byte Folded Spill + sd s9, 504(sp) # 8-byte Folded Spill + sd s10, 496(sp) # 8-byte Folded Spill + sd s11, 488(sp) # 8-byte Folded Spill .cfi_offset ra, -8 .cfi_offset s0, -16 .cfi_offset s1, -24 @@ -3276,144 +3276,145 @@ csrr t0, vlenb slli t0, t0, 1 sub sp, sp, t0 - .cfi_escape 0x0f, 0x0e, 0x72, 0x00, 0x11, 0xe0, 0x04, 0x22, 0x11, 0x02, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 608 + 2 * vlenb + .cfi_escape 0x0f, 0x0e, 0x72, 0x00, 0x11, 0xd0, 0x04, 0x22, 0x11, 0x02, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 592 + 2 * vlenb csrr t0, vlenb slli t0, t0, 1 add t0, sp, t0 - ld t0, 624(t0) - sd a6, 120(sp) # 8-byte Folded Spill + ld t0, 608(t0) + sd a6, 104(sp) # 8-byte Folded Spill mv s0, a5 mv s8, a4 - sd a3, 224(sp) # 8-byte Folded Spill - mv s9, a2 - sd a1, 176(sp) # 8-byte Folded Spill - sd a0, 192(sp) # 8-byte Folded Spill - sd t0, 136(sp) # 8-byte Folded Spill + sd a3, 200(sp) # 8-byte Folded Spill + mv s6, a2 + sd a1, 160(sp) # 8-byte Folded Spill + sd a0, 176(sp) # 8-byte Folded Spill + sd t0, 120(sp) # 8-byte Folded Spill sd zero, 0(t0) - addi a0, sp, 464 + addi a0, sp, 448 vsetivli zero, 2, e64, m1, ta, ma vmv.v.i v8, 0 - addi a1, sp, 496 + addi a1, sp, 480 vs1r.v v8, (a1) # Unknown-size Folded Spill vse64.v v8, (a0) li a0, 8 - sd a0, 480(sp) + sd a0, 464(sp) .Lpcrel_hi22: auipc a0, %pcrel_hi(_ZTV13CObjectVectorI10CFieldInfoE+16) addi s4, a0, %pcrel_lo(.Lpcrel_hi22) - sd s4, 456(sp) - sd a7, 112(sp) # 8-byte Folded Spill + sd s4, 440(sp) + sd a7, 96(sp) # 8-byte Folded Spill bnez a7, .LBB10_2 # %bb.1: # %if.then .Ltmp186: .Lpcrel_hi23: auipc a0, %pcrel_hi(_ZL19kStandardFieldTable) addi a1, a0, %pcrel_lo(.Lpcrel_hi23) - addi a0, sp, 456 + addi a0, sp, 440 li a2, 5 call _ZN13CFieldPrinter4InitEPK14CFieldInfoIniti .Ltmp187: .LBB10_2: # %if.end - ld a0, 224(sp) # 8-byte Folded Reload + ld a0, 200(sp) # 8-byte Folded Reload lw a0, 12(a0) - sd zero, 448(sp) - sd zero, 440(sp) - sd a0, 216(sp) # 8-byte Folded Spill + sd zero, 432(sp) + sd zero, 424(sp) + sd a0, 192(sp) # 8-byte Folded Spill bgtz a0, .LBB10_3 - j .LBB10_261 + j .LBB10_262 .LBB10_3: # %for.body.lr.ph - sd s0, 32(sp) # 8-byte Folded Spill - sd s4, 80(sp) # 8-byte Folded Spill - li s3, 0 - sd zero, 96(sp) # 8-byte Folded Spill - sd zero, 88(sp) # 8-byte Folded Spill + sd s0, 24(sp) # 8-byte Folded Spill + sd s4, 56(sp) # 8-byte Folded Spill + li a2, 0 sd zero, 72(sp) # 8-byte Folded Spill sd zero, 64(sp) # 8-byte Folded Spill + sd zero, 48(sp) # 8-byte Folded Spill + sd zero, 40(sp) # 8-byte Folded Spill csrr a0, vlenb slli a0, a0, 1 add a0, sp, a0 - ld a0, 616(a0) - sd a0, 200(sp) # 8-byte Folded Spill + ld s9, 600(a0) csrr a0, vlenb slli a0, a0, 1 add a0, sp, a0 - ld a0, 608(a0) - sd a0, 144(sp) # 8-byte Folded Spill - ld a0, 120(sp) # 8-byte Folded Reload + ld a0, 592(a0) + sd a0, 128(sp) # 8-byte Folded Spill + ld a0, 104(sp) # 8-byte Folded Reload xori a0, a0, 1 - ld a1, 112(sp) # 8-byte Folded Reload + ld a1, 96(sp) # 8-byte Folded Reload or a0, a0, a1 - sd a0, 104(sp) # 8-byte Folded Spill + sd a0, 80(sp) # 8-byte Folded Spill .Lpcrel_hi24: auipc a0, %pcrel_hi(_ZTV13CObjectVectorI4CArcE+16) .Lpcrel_hi26: auipc a1, %got_pcrel_hi(_ZTV20COpenCallbackConsole) ld a1, %pcrel_lo(.Lpcrel_hi26)(a1) addi a0, a0, %pcrel_lo(.Lpcrel_hi24) - sd a0, 160(sp) # 8-byte Folded Spill + sd a0, 144(sp) # 8-byte Folded Spill .Lpcrel_hi25: auipc a0, %pcrel_hi(_ZTV13CObjectVectorI11CStringBaseIwEE+16) addi a0, a0, %pcrel_lo(.Lpcrel_hi25) - sd a0, 152(sp) # 8-byte Folded Spill + sd a0, 136(sp) # 8-byte Folded Spill addi a1, a1, 16 - sd a1, 208(sp) # 8-byte Folded Spill + sd a1, 184(sp) # 8-byte Folded Spill + li a1, 0 .Lpcrel_hi27: auipc a0, %got_pcrel_hi(g_StdOut) ld s4, %pcrel_lo(.Lpcrel_hi27)(a0) lui a0, 524292 addiw a0, a0, 4 - sd a0, 168(sp) # 8-byte Folded Spill + sd a0, 152(sp) # 8-byte Folded Spill lui a0, 524400 addiw a0, a0, 87 - sd a0, 40(sp) # 8-byte Folded Spill + sd a0, 88(sp) # 8-byte Folded Spill # implicit-def: $x9 - sd s9, 128(sp) # 8-byte Folded Spill + sd s6, 112(sp) # 8-byte Folded Spill j .LBB10_5 .LBB10_4: # %for.inc599 # in Loop: Header=BB10_5 Depth=1 - addi s3, s3, 1 - ld a0, 216(sp) # 8-byte Folded Reload - bge s3, a0, .LBB10_241 + addi a1, a1, 1 + ld a0, 192(sp) # 8-byte Folded Reload + bge a1, a0, .LBB10_242 .LBB10_5: # %for.body # =>This Loop Header: Depth=1 # Child Loop BB10_26 Depth 2 # Child Loop BB10_53 Depth 2 # Child Loop BB10_56 Depth 3 - # Child Loop BB10_74 Depth 2 - # Child Loop BB10_91 Depth 3 - # Child Loop BB10_123 Depth 3 - # Child Loop BB10_203 Depth 2 - # Child Loop BB10_204 Depth 3 - # Child Loop BB10_208 Depth 3 - # Child Loop BB10_161 Depth 2 - # Child Loop BB10_223 Depth 2 - # Child Loop BB10_224 Depth 3 - # Child Loop BB10_228 Depth 3 - ld a0, 224(sp) # 8-byte Folded Reload + # Child Loop BB10_75 Depth 2 + # Child Loop BB10_92 Depth 3 + # Child Loop BB10_124 Depth 3 + # Child Loop BB10_204 Depth 2 + # Child Loop BB10_205 Depth 3 + # Child Loop BB10_209 Depth 3 + # Child Loop BB10_162 Depth 2 + # Child Loop BB10_224 Depth 2 + # Child Loop BB10_225 Depth 3 + # Child Loop BB10_229 Depth 3 + ld a0, 200(sp) # 8-byte Folded Reload ld a0, 16(a0) - slli a1, s3, 3 + sd a1, 216(sp) # 8-byte Folded Spill + slli a1, a1, 3 add a0, a0, a1 - ld s2, 0(a0) - beqz s9, .LBB10_7 + ld s7, 0(a0) + beqz s6, .LBB10_7 # %bb.6: # in Loop: Header=BB10_5 Depth=1 - sd zero, 184(sp) # 8-byte Folded Spill + sd zero, 168(sp) # 8-byte Folded Spill j .LBB10_20 .LBB10_7: # %if.then9 # in Loop: Header=BB10_5 Depth=1 - sd zero, 408(sp) + sd zero, 392(sp) .Ltmp189: li a0, 16 call _Znam@plt .Ltmp190: # %bb.8: # %invoke.cont11 # in Loop: Header=BB10_5 Depth=1 - sd a0, 400(sp) + sd a0, 384(sp) sw zero, 0(a0) li a0, 4 - sw a0, 412(sp) - ld a1, 0(s2) + sw a0, 396(sp) + ld a1, 0(s7) .Ltmp192: - addi a0, sp, 360 + addi a0, sp, 344 call _ZN8NWindows5NFile5NFind10CFileInfoW4FindEPKw@plt .Ltmp193: # %bb.9: # %invoke.cont15 @@ -3421,16 +3422,16 @@ beqz a0, .LBB10_12 # %bb.10: # %invoke.cont17 # in Loop: Header=BB10_5 Depth=1 - lbu a0, 392(sp) + lbu a0, 376(sp) andi a0, a0, 16 bnez a0, .LBB10_12 # %bb.11: # %if.end32 # in Loop: Header=BB10_5 Depth=1 - ld a0, 360(sp) - sd a0, 184(sp) # 8-byte Folded Spill - sd zero, 232(sp) # 8-byte Folded Spill + ld a0, 344(sp) + sd a0, 168(sp) # 8-byte Folded Spill + sd zero, 208(sp) # 8-byte Folded Spill li s0, 1 - ld a0, 400(sp) + ld a0, 384(sp) bnez a0, .LBB10_18 j .LBB10_19 .LBB10_12: # %if.then19 @@ -3452,7 +3453,7 @@ .Ltmp197: # %bb.14: # %invoke.cont22 # in Loop: Header=BB10_5 Depth=1 - ld a1, 0(s2) + ld a1, 0(s7) .Ltmp198: call _ZN13CStdOutStreamlsEPKw@plt .Ltmp199: @@ -3474,72 +3475,71 @@ .Ltmp203: # %bb.17: # %invoke.cont30 # in Loop: Header=BB10_5 Depth=1 - ld a1, 136(sp) # 8-byte Folded Reload + ld a1, 120(sp) # 8-byte Folded Reload ld a0, 0(a1) - sd zero, 184(sp) # 8-byte Folded Spill + sd zero, 168(sp) # 8-byte Folded Spill li s0, 0 addi a0, a0, 1 sd a0, 0(a1) li a0, 4 - sd a0, 232(sp) # 8-byte Folded Spill - ld a0, 400(sp) + sd a0, 208(sp) # 8-byte Folded Spill + ld a0, 384(sp) beqz a0, .LBB10_19 .LBB10_18: # %delete.notnull.i.i175 # in Loop: Header=BB10_5 Depth=1 call _ZdaPv@plt .LBB10_19: # %_ZN8NWindows5NFile5NFind10CFileInfoWD2Ev.exit176 # in Loop: Header=BB10_5 Depth=1 - beqz s0, .LBB10_195 + beqz s0, .LBB10_196 .LBB10_20: # %invoke.cont36 # in Loop: Header=BB10_5 Depth=1 vsetivli zero, 2, e64, m1, ta, ma - addi a0, sp, 496 + addi a0, sp, 480 vl1r.v v8, (a0) # Unknown-size Folded Reload - addi a0, sp, 368 + addi a0, sp, 352 vse64.v v8, (a0) li a1, 8 - sd a1, 384(sp) - ld a0, 160(sp) # 8-byte Folded Reload - sd a0, 360(sp) - addi a0, sp, 400 + sd a1, 368(sp) + ld a0, 144(sp) # 8-byte Folded Reload + sd a0, 344(sp) + addi a0, sp, 384 vse64.v v8, (a0) - sd a1, 416(sp) - ld a0, 152(sp) # 8-byte Folded Reload - sd a0, 392(sp) - sd zero, 424(sp) - sb zero, 432(sp) - ld a0, 208(sp) # 8-byte Folded Reload - sd a0, 320(sp) - sb zero, 337(sp) - sd zero, 352(sp) + sd a1, 400(sp) + ld a0, 136(sp) # 8-byte Folded Reload + sd a0, 376(sp) + sd zero, 408(sp) + sb zero, 416(sp) + ld a0, 184(sp) # 8-byte Folded Reload + sd a0, 304(sp) + sb zero, 321(sp) + sd zero, 336(sp) .Ltmp205: li a0, 16 call _Znam@plt .Ltmp206: # %bb.21: # %invoke.cont38 # in Loop: Header=BB10_5 Depth=1 - sd a0, 344(sp) - ld a1, 144(sp) # 8-byte Folded Reload + sd a0, 328(sp) + ld a1, 128(sp) # 8-byte Folded Reload lbu a1, 0(a1) sw zero, 0(a0) li a2, 4 - sw a2, 356(sp) - sd s4, 328(sp) - sb a1, 336(sp) - ld a1, 200(sp) # 8-byte Folded Reload - addi a2, sp, 344 - beq a2, a1, .LBB10_28 + sw a2, 340(sp) + sd s4, 312(sp) + sb a1, 320(sp) + addi a1, sp, 328 + beq a1, s9, .LBB10_28 # %bb.22: # %if.end.i # in Loop: Header=BB10_5 Depth=1 - lw a1, 8(a1) - sw zero, 352(sp) + lw a1, 8(s9) + sw zero, 336(sp) addiw s0, a1, 1 sw zero, 0(a0) li a2, 4 beq s0, a2, .LBB10_25 # %bb.23: # %if.end.i.i # in Loop: Header=BB10_5 Depth=1 - mv s5, a0 + mv s2, a0 slti a0, a1, -1 slli a1, s0, 32 srli a1, a1, 30 @@ -3550,20 +3550,19 @@ .Ltmp209: # %bb.24: # %if.end9.i.i # in Loop: Header=BB10_5 Depth=1 - mv s6, a0 - mv a0, s5 + mv s5, a0 + mv a0, s2 call _ZdaPv@plt - lw a0, 352(sp) - sd s6, 344(sp) + lw a0, 336(sp) + sd s5, 328(sp) slli a0, a0, 2 - add a0, s6, a0 + add a0, s5, a0 sw zero, 0(a0) - sw s0, 356(sp) - mv a0, s6 + sw s0, 340(sp) + mv a0, s5 .LBB10_25: # %_ZN11CStringBaseIwE11SetCapacityEi.exit.i # in Loop: Header=BB10_5 Depth=1 - ld a4, 200(sp) # 8-byte Folded Reload - ld a1, 0(a4) + ld a1, 0(s9) .LBB10_26: # %while.cond.i.i # Parent Loop BB10_5 Depth=1 # => This Inner Loop Header: Depth=2 @@ -3575,40 +3574,40 @@ bnez a2, .LBB10_26 # %bb.27: # %_Z12MyStringCopyIwEPT_S1_PKS0_.exit.i # in Loop: Header=BB10_5 Depth=1 - lw a0, 8(a4) - sw a0, 352(sp) + lw a0, 8(s9) + sw a0, 336(sp) .LBB10_28: # %invoke.cont42 # in Loop: Header=BB10_5 Depth=1 .Ltmp211: - addi a0, sp, 360 - addi a6, sp, 320 - ld a1, 192(sp) # 8-byte Folded Reload - ld a2, 176(sp) # 8-byte Folded Reload - mv a3, s9 + addi a0, sp, 344 + addi a6, sp, 304 + ld a1, 176(sp) # 8-byte Folded Reload + ld a2, 160(sp) # 8-byte Folded Reload + mv a3, s6 li a4, 0 - mv a5, s2 + mv a5, s7 call _ZN12CArchiveLink5Open2EP7CCodecsRK13CRecordVectorIiEbP9IInStreamRK11CStringBaseIwEP15IOpenCallbackUI@plt .Ltmp212: # %bb.29: # %invoke.cont46 # in Loop: Header=BB10_5 Depth=1 - mv s5, a0 + mv s2, a0 li a0, 1 - sd a0, 232(sp) # 8-byte Folded Spill - ld a0, 168(sp) # 8-byte Folded Reload - beq s5, a0, .LBB10_40 + sd a0, 208(sp) # 8-byte Folded Spill + ld a0, 152(sp) # 8-byte Folded Reload + beq s2, a0, .LBB10_40 # %bb.30: # %invoke.cont46 # in Loop: Header=BB10_5 Depth=1 - bnez s5, .LBB10_41 + bnez s2, .LBB10_41 # %bb.31: # %if.end93 # in Loop: Header=BB10_5 Depth=1 - lw a0, 404(sp) + lw a0, 388(sp) slti a0, a0, 1 - or a0, s9, a0 + or a0, s6, a0 beqz a0, .LBB10_50 .LBB10_32: # %if.end123 # in Loop: Header=BB10_5 Depth=1 - ld a0, 120(sp) # 8-byte Folded Reload - beqz a0, .LBB10_66 + ld a0, 104(sp) # 8-byte Folded Reload + beqz a0, .LBB10_67 # %bb.33: # %if.then125 # in Loop: Header=BB10_5 Depth=1 .Ltmp223: @@ -3628,7 +3627,7 @@ .Ltmp226: # %bb.35: # %invoke.cont128 # in Loop: Header=BB10_5 Depth=1 - ld a1, 0(s2) + ld a1, 0(s7) .Ltmp227: call _ZN13CStdOutStreamlsEPKw@plt .Ltmp228: @@ -3650,19 +3649,19 @@ .Ltmp232: # %bb.38: # %for.cond139.preheader # in Loop: Header=BB10_5 Depth=1 - lw a0, 372(sp) - blez a0, .LBB10_154 + lw a0, 356(sp) + blez a0, .LBB10_155 # %bb.39: # %for.body145.preheader # in Loop: Header=BB10_5 Depth=1 li s10, 0 - j .LBB10_74 + j .LBB10_75 .LBB10_40: # in Loop: Header=BB10_5 Depth=1 - mv s1, s5 - ld a0, 344(sp) - ld a1, 208(sp) # 8-byte Folded Reload - sd a1, 320(sp) - bnez a0, .LBB10_193 - j .LBB10_194 + mv s1, s2 + ld a0, 328(sp) + ld a1, 184(sp) # 8-byte Folded Reload + sd a1, 304(sp) + bnez a0, .LBB10_194 + j .LBB10_195 .LBB10_41: # %if.end52 # in Loop: Header=BB10_5 Depth=1 .Ltmp393: @@ -3682,7 +3681,7 @@ .Ltmp396: # %bb.43: # %invoke.cont55 # in Loop: Header=BB10_5 Depth=1 - ld a1, 0(s2) + ld a1, 0(s7) .Ltmp397: call _ZN13CStdOutStreamlsEPKw@plt .Ltmp398: @@ -3698,40 +3697,37 @@ # in Loop: Header=BB10_5 Depth=1 lui a0, 524400 addiw a0, a0, 14 - beq s5, a0, .LBB10_146 + beq s2, a0, .LBB10_147 # %bb.46: # %invoke.cont61 # in Loop: Header=BB10_5 Depth=1 li a0, 1 - bne s5, a0, .LBB10_147 + bne s2, a0, .LBB10_148 # %bb.47: # %if.then64 # in Loop: Header=BB10_5 Depth=1 .Ltmp401: - addi a0, sp, 320 + addi a0, sp, 304 call _ZN20COpenCallbackConsole21Open_WasPasswordAskedEv@plt .Ltmp402: # %bb.48: # %invoke.cont65 # in Loop: Header=BB10_5 Depth=1 - bnez a0, .LBB10_188 + bnez a0, .LBB10_189 # %bb.49: # %invoke.cont65 # in Loop: Header=BB10_5 Depth=1 .Lpcrel_hi37: auipc a0, %pcrel_hi(.L.str.9) addi a1, a0, %pcrel_lo(.Lpcrel_hi37) - j .LBB10_189 + j .LBB10_190 .LBB10_50: # %for.body102.preheader # in Loop: Header=BB10_5 Depth=1 - li s6, 0 + li s5, 0 j .LBB10_53 -.LBB10_51: # %invoke.cont115 - # in Loop: Header=BB10_53 Depth=2 - ld a0, 224(sp) # 8-byte Folded Reload - lw a0, 12(a0) - sd a0, 216(sp) # 8-byte Folded Spill +.LBB10_51: # in Loop: Header=BB10_53 Depth=2 + mv s9, s3 .LBB10_52: # %if.end118 # in Loop: Header=BB10_53 Depth=2 - lw a0, 404(sp) - addi s6, s6, 1 - bge s6, a0, .LBB10_32 + lw a0, 388(sp) + addi s5, s5, 1 + bge s5, a0, .LBB10_32 .LBB10_53: # %for.body102 # Parent Loop BB10_5 Depth=1 # => This Loop Header: Depth=2 @@ -3740,26 +3736,27 @@ beqz s10, .LBB10_52 # %bb.54: # %while.body.i.preheader # in Loop: Header=BB10_53 Depth=2 - ld a0, 408(sp) - slli a1, s6, 3 + mv s3, s9 + ld a0, 392(sp) + slli a1, s5, 3 add a0, a0, a1 ld s0, 0(a0) - li s7, 0 + li s6, 0 j .LBB10_56 .LBB10_55: # %call.i.i8.i.noexc # in Loop: Header=BB10_56 Depth=3 mv s10, a1 - beq s7, a1, .LBB10_52 + beq s6, a1, .LBB10_51 .LBB10_56: # %while.body.i # Parent Loop BB10_5 Depth=1 # Parent Loop BB10_53 Depth=2 # => This Inner Loop Header: Depth=3 - addw s11, s10, s7 + addw s11, s10, s6 srliw a0, s11, 31 ld a1, 16(s8) add a0, s11, a0 - sraiw s5, a0, 1 - slli a0, s5, 3 + sraiw s2, a0, 1 + slli a0, s2, 3 add a0, a1, a0 ld s9, 0(a0) ld a0, 0(s0) @@ -3779,7 +3776,7 @@ .Ltmp216: # %bb.59: # %call.i.i8.i.noexc # in Loop: Header=BB10_56 Depth=3 - mv a1, s5 + mv a1, s2 bltz a0, .LBB10_61 # %bb.60: # %call.i.i8.i.noexc # in Loop: Header=BB10_56 Depth=3 @@ -3791,23 +3788,25 @@ bltz a0, .LBB10_55 .LBB10_62: # %call.i.i8.i.noexc # in Loop: Header=BB10_56 Depth=3 - addiw s7, s5, 1 + addiw s6, s2, 1 j .LBB10_55 .LBB10_63: # %invoke.cont107 # in Loop: Header=BB10_53 Depth=2 slti a0, s11, -1 - slt a1, s3, s5 + ld a1, 216(sp) # 8-byte Folded Reload + slt a1, a1, s2 xori a1, a1, 1 or a0, a0, a1 + mv s9, s3 bnez a0, .LBB10_52 # %bb.64: # %if.then111 # in Loop: Header=BB10_53 Depth=2 - ld a0, 224(sp) # 8-byte Folded Reload + ld a0, 200(sp) # 8-byte Folded Reload ld a1, 0(a0) ld a3, 16(a1) .Ltmp218: li a2, 1 - mv a1, s5 + mv a1, s2 jalr a3 .Ltmp219: # %bb.65: # %invoke.cont112 @@ -3817,69 +3816,74 @@ .Ltmp220: li a2, 1 mv a0, s8 - mv a1, s5 + mv a1, s2 jalr a3 .Ltmp221: - j .LBB10_51 -.LBB10_66: # in Loop: Header=BB10_5 Depth=1 - ld s0, 104(sp) # 8-byte Folded Reload +# %bb.66: # %invoke.cont115 + # in Loop: Header=BB10_53 Depth=2 + ld a0, 200(sp) # 8-byte Folded Reload + lw a0, 12(a0) + sd a0, 192(sp) # 8-byte Folded Spill + j .LBB10_52 +.LBB10_67: # in Loop: Header=BB10_5 Depth=1 + ld s0, 80(sp) # 8-byte Folded Reload mv s7, s1 - ld s9, 128(sp) # 8-byte Folded Reload -.LBB10_67: # %if.end400 + ld s6, 112(sp) # 8-byte Folded Reload +.LBB10_68: # %if.end400 # in Loop: Header=BB10_5 Depth=1 - lw a0, 372(sp) - ld a1, 376(sp) + lw a0, 356(sp) + ld a1, 360(sp) slli a0, a0, 3 add a0, a0, a1 ld s2, -8(a0) ld s11, 0(s2) - ld a0, 112(sp) # 8-byte Folded Reload - beqz a0, .LBB10_70 -# %bb.68: # %if.then412 + ld a0, 96(sp) # 8-byte Folded Reload + beqz a0, .LBB10_71 +# %bb.69: # %if.then412 # in Loop: Header=BB10_5 Depth=1 .Ltmp350: - addi a0, sp, 456 + addi a0, sp, 440 mv a1, s11 call _ZN13CFieldPrinter4InitEP10IInArchive .Ltmp351: -# %bb.69: # %invoke.cont415 +# %bb.70: # %invoke.cont415 # in Loop: Header=BB10_5 Depth=1 mv s1, a0 - bnez a0, .LBB10_192 -.LBB10_70: # %if.end424 + bnez a0, .LBB10_193 +.LBB10_71: # %if.end424 # in Loop: Header=BB10_5 Depth=1 - sd zero, 272(sp) sd zero, 256(sp) + sd zero, 240(sp) ld a0, 0(s11) ld a2, 56(a0) .Ltmp353: - addi a1, sp, 292 + addi a1, sp, 276 mv a0, s11 jalr a2 .Ltmp354: -# %bb.71: # %invoke.cont429 +# %bb.72: # %invoke.cont429 # in Loop: Header=BB10_5 Depth=1 - beqz a0, .LBB10_158 -# %bb.72: # in Loop: Header=BB10_5 Depth=1 + beqz a0, .LBB10_159 +# %bb.73: # in Loop: Header=BB10_5 Depth=1 li a1, 1 - sd a1, 232(sp) # 8-byte Folded Spill + sd a1, 208(sp) # 8-byte Folded Spill mv s7, a0 mv s1, a0 - ld a0, 344(sp) - ld a1, 208(sp) # 8-byte Folded Reload - sd a1, 320(sp) - bnez a0, .LBB10_193 - j .LBB10_194 -.LBB10_73: # in Loop: Header=BB10_74 Depth=2 + ld a0, 328(sp) + ld a1, 184(sp) # 8-byte Folded Reload + sd a1, 304(sp) + bnez a0, .LBB10_194 + j .LBB10_195 +.LBB10_74: # in Loop: Header=BB10_75 Depth=2 mv s1, s7 addi s10, s10, 1 - bge s10, a0, .LBB10_155 -.LBB10_74: # %for.body145 + bge s10, a0, .LBB10_156 +.LBB10_75: # %for.body145 # Parent Loop BB10_5 Depth=1 # => This Loop Header: Depth=2 - # Child Loop BB10_91 Depth 3 - # Child Loop BB10_123 Depth 3 - ld a0, 376(sp) + # Child Loop BB10_92 Depth 3 + # Child Loop BB10_124 Depth 3 + ld a0, 360(sp) slli s11, s10, 3 add a0, a0, s11 ld s5, 0(a0) @@ -3890,8 +3894,8 @@ mv a0, s4 call _ZN13CStdOutStreamlsEPKc@plt .Ltmp234: -# %bb.75: # %invoke.cont150 - # in Loop: Header=BB10_74 Depth=2 +# %bb.76: # %invoke.cont150 + # in Loop: Header=BB10_75 Depth=2 ld s2, 8(s5) .Ltmp235: .Lpcrel_hi44: @@ -3900,32 +3904,32 @@ mv a0, s4 call _ZN13CStdOutStreamlsEPKw@plt .Ltmp236: -# %bb.76: # %call.i205.noexc - # in Loop: Header=BB10_74 Depth=2 +# %bb.77: # %call.i205.noexc + # in Loop: Header=BB10_75 Depth=2 .Ltmp237: .Lpcrel_hi45: auipc a1, %pcrel_hi(.L.str) addi a1, a1, %pcrel_lo(.Lpcrel_hi45) call _ZN13CStdOutStreamlsEPKc@plt .Ltmp238: -# %bb.77: # %call1.i.noexc - # in Loop: Header=BB10_74 Depth=2 +# %bb.78: # %call1.i.noexc + # in Loop: Header=BB10_75 Depth=2 .Ltmp239: mv a1, s2 call _ZN13CStdOutStreamlsEPKw@plt .Ltmp240: -# %bb.78: # %call2.i.noexc - # in Loop: Header=BB10_74 Depth=2 +# %bb.79: # %call2.i.noexc + # in Loop: Header=BB10_75 Depth=2 .Ltmp241: .Lpcrel_hi46: auipc a1, %got_pcrel_hi(_Z4endlR13CStdOutStream) ld a1, %pcrel_lo(.Lpcrel_hi46)(a1) call _ZN13CStdOutStreamlsEPFRS_S0_E@plt .Ltmp242: -# %bb.79: # %invoke.cont154 - # in Loop: Header=BB10_74 Depth=2 +# %bb.80: # %invoke.cont154 + # in Loop: Header=BB10_75 Depth=2 lw a0, 40(s5) - ld a1, 192(sp) # 8-byte Folded Reload + ld a1, 176(sp) # 8-byte Folded Reload ld a1, 32(a1) slli a0, a0, 3 add a0, a1, a0 @@ -3938,34 +3942,34 @@ mv a0, s4 call _ZN13CStdOutStreamlsEPKw@plt .Ltmp244: -# %bb.80: # %call.i213.noexc - # in Loop: Header=BB10_74 Depth=2 +# %bb.81: # %call.i213.noexc + # in Loop: Header=BB10_75 Depth=2 .Ltmp245: .Lpcrel_hi48: auipc a1, %pcrel_hi(.L.str) addi a1, a1, %pcrel_lo(.Lpcrel_hi48) call _ZN13CStdOutStreamlsEPKc@plt .Ltmp246: -# %bb.81: # %call1.i.noexc215 - # in Loop: Header=BB10_74 Depth=2 +# %bb.82: # %call1.i.noexc215 + # in Loop: Header=BB10_75 Depth=2 .Ltmp247: mv a1, s2 call _ZN13CStdOutStreamlsEPKw@plt .Ltmp248: -# %bb.82: # %call2.i.noexc217 - # in Loop: Header=BB10_74 Depth=2 +# %bb.83: # %call2.i.noexc217 + # in Loop: Header=BB10_75 Depth=2 .Ltmp249: .Lpcrel_hi49: auipc a1, %got_pcrel_hi(_Z4endlR13CStdOutStream) ld a1, %pcrel_lo(.Lpcrel_hi49)(a1) call _ZN13CStdOutStreamlsEPFRS_S0_E@plt .Ltmp250: -# %bb.83: # %invoke.cont159 - # in Loop: Header=BB10_74 Depth=2 +# %bb.84: # %invoke.cont159 + # in Loop: Header=BB10_75 Depth=2 lw a0, 72(s5) - beqz a0, .LBB10_88 -# %bb.84: # %if.then162 - # in Loop: Header=BB10_74 Depth=2 + beqz a0, .LBB10_89 +# %bb.85: # %if.then162 + # in Loop: Header=BB10_75 Depth=2 ld s2, 64(s5) .Ltmp251: .Lpcrel_hi50: @@ -3974,194 +3978,194 @@ mv a0, s4 call _ZN13CStdOutStreamlsEPKw@plt .Ltmp252: -# %bb.85: # %call.i223.noexc - # in Loop: Header=BB10_74 Depth=2 +# %bb.86: # %call.i223.noexc + # in Loop: Header=BB10_75 Depth=2 .Ltmp253: .Lpcrel_hi51: auipc a1, %pcrel_hi(.L.str) addi a1, a1, %pcrel_lo(.Lpcrel_hi51) call _ZN13CStdOutStreamlsEPKc@plt .Ltmp254: -# %bb.86: # %call1.i.noexc225 - # in Loop: Header=BB10_74 Depth=2 +# %bb.87: # %call1.i.noexc225 + # in Loop: Header=BB10_75 Depth=2 .Ltmp255: mv a1, s2 call _ZN13CStdOutStreamlsEPKw@plt .Ltmp256: -# %bb.87: # %call2.i.noexc227 - # in Loop: Header=BB10_74 Depth=2 +# %bb.88: # %call2.i.noexc227 + # in Loop: Header=BB10_75 Depth=2 .Ltmp257: .Lpcrel_hi52: auipc a1, %got_pcrel_hi(_Z4endlR13CStdOutStream) ld a1, %pcrel_lo(.Lpcrel_hi52)(a1) call _ZN13CStdOutStreamlsEPFRS_S0_E@plt .Ltmp258: -.LBB10_88: # %if.end167 - # in Loop: Header=BB10_74 Depth=2 +.LBB10_89: # %if.end167 + # in Loop: Header=BB10_75 Depth=2 ld s2, 0(s5) ld a0, 0(s2) ld a2, 104(a0) .Ltmp260: - addi a1, sp, 240 + addi a1, sp, 224 mv a0, s2 jalr a2 .Ltmp261: -# %bb.89: # %invoke.cont173 - # in Loop: Header=BB10_74 Depth=2 - lw a1, 240(sp) +# %bb.90: # %invoke.cont173 + # in Loop: Header=BB10_75 Depth=2 + lw a1, 224(sp) seqz a0, a0 snez a1, a1 and a0, a0, a1 - beqz a0, .LBB10_114 -# %bb.90: # %for.body180.preheader - # in Loop: Header=BB10_74 Depth=2 + beqz a0, .LBB10_115 +# %bb.91: # %for.body180.preheader + # in Loop: Header=BB10_75 Depth=2 li s5, 0 -.LBB10_91: # %for.body180 +.LBB10_92: # %for.body180 # Parent Loop BB10_5 Depth=1 - # Parent Loop BB10_74 Depth=2 + # Parent Loop BB10_75 Depth=2 # => This Inner Loop Header: Depth=3 - sd zero, 296(sp) + sd zero, 280(sp) ld a0, 0(s2) ld a5, 112(a0) .Ltmp263: - addi a2, sp, 296 - addi a3, sp, 292 - addi a4, sp, 252 + addi a2, sp, 280 + addi a3, sp, 276 + addi a4, sp, 236 mv a0, s2 mv a1, s5 jalr a5 .Ltmp264: -# %bb.92: # %invoke.cont188 - # in Loop: Header=BB10_91 Depth=3 +# %bb.93: # %invoke.cont188 + # in Loop: Header=BB10_92 Depth=3 mv s7, a0 li s0, 1 - bnez a0, .LBB10_111 -# %bb.93: # %cleanup.cont195 - # in Loop: Header=BB10_91 Depth=3 - sw zero, 304(sp) + bnez a0, .LBB10_112 +# %bb.94: # %cleanup.cont195 + # in Loop: Header=BB10_92 Depth=3 + sw zero, 288(sp) ld a0, 0(s2) - lw a1, 292(sp) + lw a1, 276(sp) ld a3, 80(a0) .Ltmp266: - addi a2, sp, 304 + addi a2, sp, 288 mv a0, s2 jalr a3 .Ltmp267: -# %bb.94: # %invoke.cont203 - # in Loop: Header=BB10_91 Depth=3 - beqz a0, .LBB10_96 # %bb.95: # %invoke.cont203 - # in Loop: Header=BB10_91 Depth=3 + # in Loop: Header=BB10_92 Depth=3 + beqz a0, .LBB10_97 +# %bb.96: # %invoke.cont203 + # in Loop: Header=BB10_92 Depth=3 mv s1, a0 -.LBB10_96: # %invoke.cont203 - # in Loop: Header=BB10_91 Depth=3 +.LBB10_97: # %invoke.cont203 + # in Loop: Header=BB10_92 Depth=3 li s0, 1 - bnez a0, .LBB10_109 -# %bb.97: # %cleanup.cont210 - # in Loop: Header=BB10_91 Depth=3 - lw a2, 292(sp) + bnez a0, .LBB10_110 +# %bb.98: # %cleanup.cont210 + # in Loop: Header=BB10_92 Depth=3 + lw a2, 276(sp) .Ltmp269: - addi a0, sp, 272 - addi a1, sp, 304 + addi a0, sp, 256 + addi a1, sp, 288 li a3, 1 call _Z23ConvertPropertyToStringRK14tagPROPVARIANTjb@plt .Ltmp270: -# %bb.98: # %invoke.cont213 - # in Loop: Header=BB10_91 Depth=3 - lw a0, 280(sp) - beqz a0, .LBB10_106 -# %bb.99: # %if.then217 - # in Loop: Header=BB10_91 Depth=3 - lw a1, 292(sp) - ld a2, 296(sp) +# %bb.99: # %invoke.cont213 + # in Loop: Header=BB10_92 Depth=3 + lw a0, 264(sp) + beqz a0, .LBB10_107 +# %bb.100: # %if.then217 + # in Loop: Header=BB10_92 Depth=3 + lw a1, 276(sp) + ld a2, 280(sp) .Ltmp272: - addi a0, sp, 256 + addi a0, sp, 240 call _ZL11GetPropNamejPw .Ltmp273: -# %bb.100: # %invoke.cont222 - # in Loop: Header=BB10_91 Depth=3 - ld s6, 256(sp) - ld s7, 272(sp) +# %bb.101: # %invoke.cont222 + # in Loop: Header=BB10_92 Depth=3 + ld s6, 240(sp) + ld s7, 256(sp) .Ltmp275: mv a0, s4 mv a1, s6 call _ZN13CStdOutStreamlsEPKw@plt .Ltmp276: -# %bb.101: # %call.i233.noexc - # in Loop: Header=BB10_91 Depth=3 +# %bb.102: # %call.i233.noexc + # in Loop: Header=BB10_92 Depth=3 .Ltmp277: .Lpcrel_hi53: auipc a1, %pcrel_hi(.L.str) addi a1, a1, %pcrel_lo(.Lpcrel_hi53) call _ZN13CStdOutStreamlsEPKc@plt .Ltmp278: -# %bb.102: # %call1.i.noexc235 - # in Loop: Header=BB10_91 Depth=3 +# %bb.103: # %call1.i.noexc235 + # in Loop: Header=BB10_92 Depth=3 .Ltmp279: mv a1, s7 call _ZN13CStdOutStreamlsEPKw@plt .Ltmp280: -# %bb.103: # %call2.i.noexc237 - # in Loop: Header=BB10_91 Depth=3 +# %bb.104: # %call2.i.noexc237 + # in Loop: Header=BB10_92 Depth=3 .Ltmp281: .Lpcrel_hi54: auipc a1, %got_pcrel_hi(_Z4endlR13CStdOutStream) ld a1, %pcrel_lo(.Lpcrel_hi54)(a1) call _ZN13CStdOutStreamlsEPFRS_S0_E@plt .Ltmp282: -# %bb.104: # %invoke.cont228 - # in Loop: Header=BB10_91 Depth=3 - beqz s6, .LBB10_106 -# %bb.105: # %delete.notnull.i242 - # in Loop: Header=BB10_91 Depth=3 +# %bb.105: # %invoke.cont228 + # in Loop: Header=BB10_92 Depth=3 + beqz s6, .LBB10_107 +# %bb.106: # %delete.notnull.i242 + # in Loop: Header=BB10_92 Depth=3 mv a0, s6 call _ZdaPv@plt -.LBB10_106: # %if.end231 - # in Loop: Header=BB10_91 Depth=3 - ld a0, 272(sp) - beqz a0, .LBB10_108 -# %bb.107: # %delete.notnull.i251 - # in Loop: Header=BB10_91 Depth=3 +.LBB10_107: # %if.end231 + # in Loop: Header=BB10_92 Depth=3 + ld a0, 256(sp) + beqz a0, .LBB10_109 +# %bb.108: # %delete.notnull.i251 + # in Loop: Header=BB10_92 Depth=3 call _ZdaPv@plt -.LBB10_108: # %_ZN11CStringBaseIwED2Ev.exit252 - # in Loop: Header=BB10_91 Depth=3 +.LBB10_109: # %_ZN11CStringBaseIwED2Ev.exit252 + # in Loop: Header=BB10_92 Depth=3 li s0, 0 -.LBB10_109: # %cleanup234 - # in Loop: Header=BB10_91 Depth=3 +.LBB10_110: # %cleanup234 + # in Loop: Header=BB10_92 Depth=3 .Ltmp290: - addi a0, sp, 304 + addi a0, sp, 288 call _ZN8NWindows4NCOM12CPropVariant5ClearEv@plt .Ltmp291: -# %bb.110: # %_ZN8NWindows4NCOM12CPropVariantD2Ev.exit - # in Loop: Header=BB10_91 Depth=3 +# %bb.111: # %_ZN8NWindows4NCOM12CPropVariantD2Ev.exit + # in Loop: Header=BB10_92 Depth=3 mv s7, s1 -.LBB10_111: # %cleanup238 - # in Loop: Header=BB10_91 Depth=3 - ld a0, 296(sp) +.LBB10_112: # %cleanup238 + # in Loop: Header=BB10_92 Depth=3 + ld a0, 280(sp) .Ltmp293: call SysFreeString@plt .Ltmp294: -# %bb.112: # %_ZN10CMyComBSTRD2Ev.exit - # in Loop: Header=BB10_91 Depth=3 - bnez s0, .LBB10_152 -# %bb.113: # %for.cond177 - # in Loop: Header=BB10_91 Depth=3 - lw a0, 240(sp) +# %bb.113: # %_ZN10CMyComBSTRD2Ev.exit + # in Loop: Header=BB10_92 Depth=3 + bnez s0, .LBB10_153 +# %bb.114: # %for.cond177 + # in Loop: Header=BB10_92 Depth=3 + lw a0, 224(sp) addiw s5, s5, 1 mv s1, s7 - bltu s5, a0, .LBB10_91 - j .LBB10_115 -.LBB10_114: # in Loop: Header=BB10_74 Depth=2 + bltu s5, a0, .LBB10_92 + j .LBB10_116 +.LBB10_115: # in Loop: Header=BB10_75 Depth=2 mv s7, s1 -.LBB10_115: # %if.end254 - # in Loop: Header=BB10_74 Depth=2 - lw a0, 372(sp) +.LBB10_116: # %if.end254 + # in Loop: Header=BB10_75 Depth=2 + lw a0, 356(sp) addi a1, a0, -1 slli a1, a1, 32 srli a1, a1, 32 - beq s10, a1, .LBB10_73 -# %bb.116: # %if.then259 - # in Loop: Header=BB10_74 Depth=2 + beq s10, a1, .LBB10_74 +# %bb.117: # %if.then259 + # in Loop: Header=BB10_75 Depth=2 .Ltmp296: .Lpcrel_hi55: auipc a0, %pcrel_hi(.L.str.15) @@ -4169,225 +4173,225 @@ mv a0, s4 call _ZN13CStdOutStreamlsEPKc@plt .Ltmp297: -# %bb.117: # %invoke.cont262 - # in Loop: Header=BB10_74 Depth=2 +# %bb.118: # %invoke.cont262 + # in Loop: Header=BB10_75 Depth=2 ld a0, 0(s2) ld a2, 88(a0) .Ltmp298: - addi a1, sp, 292 + addi a1, sp, 276 mv a0, s2 jalr a2 .Ltmp299: -# %bb.118: # %invoke.cont266 - # in Loop: Header=BB10_74 Depth=2 - beqz a0, .LBB10_121 -.LBB10_119: # in Loop: Header=BB10_74 Depth=2 +# %bb.119: # %invoke.cont266 + # in Loop: Header=BB10_75 Depth=2 + beqz a0, .LBB10_122 +.LBB10_120: # in Loop: Header=BB10_75 Depth=2 mv s1, s7 -.LBB10_120: # %cleanup363.thread - # in Loop: Header=BB10_74 Depth=2 - lw a0, 372(sp) +.LBB10_121: # %cleanup363.thread + # in Loop: Header=BB10_75 Depth=2 + lw a0, 356(sp) mv s7, s1 addi s10, s10, 1 - blt s10, a0, .LBB10_74 - j .LBB10_155 -.LBB10_121: # %if.then269 - # in Loop: Header=BB10_74 Depth=2 - lw a0, 292(sp) - beqz a0, .LBB10_119 -# %bb.122: # %for.body278.preheader - # in Loop: Header=BB10_74 Depth=2 - ld a0, 376(sp) + blt s10, a0, .LBB10_75 + j .LBB10_156 +.LBB10_122: # %if.then269 + # in Loop: Header=BB10_75 Depth=2 + lw a0, 276(sp) + beqz a0, .LBB10_120 +# %bb.123: # %for.body278.preheader + # in Loop: Header=BB10_75 Depth=2 + ld a0, 360(sp) add a0, a0, s11 ld a0, 8(a0) lw s5, 44(a0) li s6, 0 -.LBB10_123: # %for.body278 +.LBB10_124: # %for.body278 # Parent Loop BB10_5 Depth=1 - # Parent Loop BB10_74 Depth=2 + # Parent Loop BB10_75 Depth=2 # => This Inner Loop Header: Depth=3 - sd zero, 296(sp) + sd zero, 280(sp) ld a0, 0(s2) ld a5, 96(a0) .Ltmp301: - addi a2, sp, 296 - addi a3, sp, 252 - addi a4, sp, 250 + addi a2, sp, 280 + addi a3, sp, 236 + addi a4, sp, 234 mv a0, s2 mv a1, s6 jalr a5 .Ltmp302: -# %bb.124: # %invoke.cont290 - # in Loop: Header=BB10_123 Depth=3 +# %bb.125: # %invoke.cont290 + # in Loop: Header=BB10_124 Depth=3 mv s1, a0 li s0, 1 - bnez a0, .LBB10_143 -# %bb.125: # %cleanup.cont297 - # in Loop: Header=BB10_123 Depth=3 - sw zero, 304(sp) + bnez a0, .LBB10_144 +# %bb.126: # %cleanup.cont297 + # in Loop: Header=BB10_124 Depth=3 + sw zero, 288(sp) ld a0, 0(s2) - lw a2, 252(sp) + lw a2, 236(sp) ld a4, 64(a0) .Ltmp304: - addi a3, sp, 304 + addi a3, sp, 288 mv a0, s2 mv a1, s5 jalr a4 .Ltmp305: -# %bb.126: # %invoke.cont306 - # in Loop: Header=BB10_123 Depth=3 - beqz a0, .LBB10_128 # %bb.127: # %invoke.cont306 - # in Loop: Header=BB10_123 Depth=3 + # in Loop: Header=BB10_124 Depth=3 + beqz a0, .LBB10_129 +# %bb.128: # %invoke.cont306 + # in Loop: Header=BB10_124 Depth=3 mv s7, a0 -.LBB10_128: # %invoke.cont306 - # in Loop: Header=BB10_123 Depth=3 +.LBB10_129: # %invoke.cont306 + # in Loop: Header=BB10_124 Depth=3 li s0, 1 - bnez a0, .LBB10_141 -# %bb.129: # %cleanup.cont313 - # in Loop: Header=BB10_123 Depth=3 - lw a2, 252(sp) + bnez a0, .LBB10_142 +# %bb.130: # %cleanup.cont313 + # in Loop: Header=BB10_124 Depth=3 + lw a2, 236(sp) .Ltmp307: - addi a0, sp, 272 - addi a1, sp, 304 + addi a0, sp, 256 + addi a1, sp, 288 li a3, 1 call _Z23ConvertPropertyToStringRK14tagPROPVARIANTjb@plt .Ltmp308: -# %bb.130: # %invoke.cont317 - # in Loop: Header=BB10_123 Depth=3 - lw a0, 280(sp) - beqz a0, .LBB10_138 -# %bb.131: # %if.then321 - # in Loop: Header=BB10_123 Depth=3 - lw a1, 252(sp) - ld a2, 296(sp) +# %bb.131: # %invoke.cont317 + # in Loop: Header=BB10_124 Depth=3 + lw a0, 264(sp) + beqz a0, .LBB10_139 +# %bb.132: # %if.then321 + # in Loop: Header=BB10_124 Depth=3 + lw a1, 236(sp) + ld a2, 280(sp) .Ltmp310: - addi a0, sp, 256 + addi a0, sp, 240 call _ZL11GetPropNamejPw .Ltmp311: -# %bb.132: # %invoke.cont326 - # in Loop: Header=BB10_123 Depth=3 - ld s1, 256(sp) - ld s11, 272(sp) +# %bb.133: # %invoke.cont326 + # in Loop: Header=BB10_124 Depth=3 + ld s1, 240(sp) + ld s11, 256(sp) .Ltmp313: mv a0, s4 mv a1, s1 call _ZN13CStdOutStreamlsEPKw@plt .Ltmp314: -# %bb.133: # %call.i267.noexc - # in Loop: Header=BB10_123 Depth=3 +# %bb.134: # %call.i267.noexc + # in Loop: Header=BB10_124 Depth=3 .Ltmp315: .Lpcrel_hi56: auipc a1, %pcrel_hi(.L.str) addi a1, a1, %pcrel_lo(.Lpcrel_hi56) call _ZN13CStdOutStreamlsEPKc@plt .Ltmp316: -# %bb.134: # %call1.i.noexc269 - # in Loop: Header=BB10_123 Depth=3 +# %bb.135: # %call1.i.noexc269 + # in Loop: Header=BB10_124 Depth=3 .Ltmp317: mv a1, s11 call _ZN13CStdOutStreamlsEPKw@plt .Ltmp318: -# %bb.135: # %call2.i.noexc271 - # in Loop: Header=BB10_123 Depth=3 +# %bb.136: # %call2.i.noexc271 + # in Loop: Header=BB10_124 Depth=3 .Ltmp319: .Lpcrel_hi57: auipc a1, %got_pcrel_hi(_Z4endlR13CStdOutStream) ld a1, %pcrel_lo(.Lpcrel_hi57)(a1) call _ZN13CStdOutStreamlsEPFRS_S0_E@plt .Ltmp320: -# %bb.136: # %invoke.cont332 - # in Loop: Header=BB10_123 Depth=3 - beqz s1, .LBB10_138 -# %bb.137: # %delete.notnull.i276 - # in Loop: Header=BB10_123 Depth=3 +# %bb.137: # %invoke.cont332 + # in Loop: Header=BB10_124 Depth=3 + beqz s1, .LBB10_139 +# %bb.138: # %delete.notnull.i276 + # in Loop: Header=BB10_124 Depth=3 mv a0, s1 call _ZdaPv@plt -.LBB10_138: # %if.end335 - # in Loop: Header=BB10_123 Depth=3 - ld a0, 272(sp) - beqz a0, .LBB10_140 -# %bb.139: # %delete.notnull.i285 - # in Loop: Header=BB10_123 Depth=3 +.LBB10_139: # %if.end335 + # in Loop: Header=BB10_124 Depth=3 + ld a0, 256(sp) + beqz a0, .LBB10_141 +# %bb.140: # %delete.notnull.i285 + # in Loop: Header=BB10_124 Depth=3 call _ZdaPv@plt -.LBB10_140: # %_ZN11CStringBaseIwED2Ev.exit286 - # in Loop: Header=BB10_123 Depth=3 +.LBB10_141: # %_ZN11CStringBaseIwED2Ev.exit286 + # in Loop: Header=BB10_124 Depth=3 li s0, 0 -.LBB10_141: # %cleanup338 - # in Loop: Header=BB10_123 Depth=3 +.LBB10_142: # %cleanup338 + # in Loop: Header=BB10_124 Depth=3 .Ltmp328: - addi a0, sp, 304 + addi a0, sp, 288 call _ZN8NWindows4NCOM12CPropVariant5ClearEv@plt .Ltmp329: -# %bb.142: # %_ZN8NWindows4NCOM12CPropVariantD2Ev.exit289 - # in Loop: Header=BB10_123 Depth=3 +# %bb.143: # %_ZN8NWindows4NCOM12CPropVariantD2Ev.exit289 + # in Loop: Header=BB10_124 Depth=3 mv s1, s7 -.LBB10_143: # %cleanup342 - # in Loop: Header=BB10_123 Depth=3 - ld a0, 296(sp) +.LBB10_144: # %cleanup342 + # in Loop: Header=BB10_124 Depth=3 + ld a0, 280(sp) .Ltmp331: call SysFreeString@plt .Ltmp332: -# %bb.144: # %_ZN10CMyComBSTRD2Ev.exit291 - # in Loop: Header=BB10_123 Depth=3 - bnez s0, .LBB10_153 -# %bb.145: # %for.cond275 - # in Loop: Header=BB10_123 Depth=3 - lw a0, 292(sp) +# %bb.145: # %_ZN10CMyComBSTRD2Ev.exit291 + # in Loop: Header=BB10_124 Depth=3 + bnez s0, .LBB10_154 +# %bb.146: # %for.cond275 + # in Loop: Header=BB10_124 Depth=3 + lw a0, 276(sp) addiw s6, s6, 1 mv s7, s1 - bltu s6, a0, .LBB10_123 - j .LBB10_120 -.LBB10_146: # in Loop: Header=BB10_5 Depth=1 + bltu s6, a0, .LBB10_124 + j .LBB10_121 +.LBB10_147: # in Loop: Header=BB10_5 Depth=1 .Lpcrel_hi35: auipc a0, %pcrel_hi(.L.str.10) addi a1, a0, %pcrel_lo(.Lpcrel_hi35) - j .LBB10_189 -.LBB10_147: # %if.else78 + j .LBB10_190 +.LBB10_148: # %if.else78 # in Loop: Header=BB10_5 Depth=1 - sd zero, 312(sp) + sd zero, 296(sp) .Ltmp405: li a0, 16 call _Znam@plt .Ltmp406: -# %bb.148: # %call.i.i.i.noexc +# %bb.149: # %call.i.i.i.noexc # in Loop: Header=BB10_5 Depth=1 - sd a0, 304(sp) + sd a0, 288(sp) sw zero, 0(a0) li a0, 4 - sw a0, 316(sp) + sw a0, 300(sp) .Ltmp408: - addi a1, sp, 304 - mv a0, s5 + addi a1, sp, 288 + mv a0, s2 call _ZN8NWindows6NError15MyFormatMessageEjR11CStringBaseIwE@plt .Ltmp409: -# %bb.149: # %invoke.cont80 +# %bb.150: # %invoke.cont80 # in Loop: Header=BB10_5 Depth=1 - ld a1, 304(sp) + ld a1, 288(sp) .Ltmp411: mv a0, s4 call _ZN13CStdOutStreamlsEPKw@plt .Ltmp412: -# %bb.150: # %invoke.cont84 +# %bb.151: # %invoke.cont84 # in Loop: Header=BB10_5 Depth=1 - ld a0, 304(sp) - beqz a0, .LBB10_190 -# %bb.151: # %delete.notnull.i + ld a0, 288(sp) + beqz a0, .LBB10_191 +# %bb.152: # %delete.notnull.i # in Loop: Header=BB10_5 Depth=1 call _ZdaPv@plt - j .LBB10_190 -.LBB10_152: # in Loop: Header=BB10_5 Depth=1 + j .LBB10_191 +.LBB10_153: # in Loop: Header=BB10_5 Depth=1 mv s1, s7 -.LBB10_153: # %cleanup378 +.LBB10_154: # %cleanup378 # in Loop: Header=BB10_5 Depth=1 - ld s9, 128(sp) # 8-byte Folded Reload - ld a0, 344(sp) - ld a1, 208(sp) # 8-byte Folded Reload - sd a1, 320(sp) - bnez a0, .LBB10_193 - j .LBB10_194 -.LBB10_154: # in Loop: Header=BB10_5 Depth=1 + ld s6, 112(sp) # 8-byte Folded Reload + ld a0, 328(sp) + ld a1, 184(sp) # 8-byte Folded Reload + sd a1, 304(sp) + bnez a0, .LBB10_194 + j .LBB10_195 +.LBB10_155: # in Loop: Header=BB10_5 Depth=1 mv s7, s1 -.LBB10_155: # %for.end381 +.LBB10_156: # %for.end381 # in Loop: Header=BB10_5 Depth=1 .Ltmp334: .Lpcrel_hi58: @@ -4396,12 +4400,12 @@ mv a0, s4 call _ZN13CStdOutStreamlsEPFRS_S0_E@plt .Ltmp335: - ld s9, 128(sp) # 8-byte Folded Reload -# %bb.156: # %invoke.cont382 + ld s6, 112(sp) # 8-byte Folded Reload +# %bb.157: # %invoke.cont382 # in Loop: Header=BB10_5 Depth=1 - ld a0, 112(sp) # 8-byte Folded Reload - beqz a0, .LBB10_197 -# %bb.157: # %if.then385 + ld a0, 96(sp) # 8-byte Folded Reload + beqz a0, .LBB10_198 +# %bb.158: # %if.then385 # in Loop: Header=BB10_5 Depth=1 li s0, 1 .Ltmp348: @@ -4411,162 +4415,162 @@ mv a0, s4 call _ZN13CStdOutStreamlsEPKc@plt .Ltmp349: - j .LBB10_67 -.LBB10_158: # %for.cond439.preheader + j .LBB10_68 +.LBB10_159: # %for.cond439.preheader # in Loop: Header=BB10_5 Depth=1 - sd s0, 24(sp) # 8-byte Folded Spill - lw a0, 292(sp) - beqz a0, .LBB10_210 -# %bb.159: # %for.body442.preheader + sd s0, 16(sp) # 8-byte Folded Spill + lw a0, 276(sp) + beqz a0, .LBB10_211 +# %bb.160: # %for.body442.preheader # in Loop: Header=BB10_5 Depth=1 li a0, 1 - sd a0, 232(sp) # 8-byte Folded Spill + sd a0, 208(sp) # 8-byte Folded Spill li s1, 0 li s10, 0 li s6, 0 - sd zero, 56(sp) # 8-byte Folded Spill - sd zero, 48(sp) # 8-byte Folded Spill - ld s9, 40(sp) # 8-byte Folded Reload - j .LBB10_161 -.LBB10_160: # %for.inc518 - # in Loop: Header=BB10_161 Depth=2 - lw a0, 292(sp) + sd zero, 32(sp) # 8-byte Folded Spill + li s3, 0 + j .LBB10_162 +.LBB10_161: # %for.inc518 + # in Loop: Header=BB10_162 Depth=2 + lw a0, 276(sp) addiw s1, s1, 1 - bgeu s1, a0, .LBB10_215 -.LBB10_161: # %for.body442 + bgeu s1, a0, .LBB10_216 +.LBB10_162: # %for.body442 # Parent Loop BB10_5 Depth=1 # => This Inner Loop Header: Depth=2 .Ltmp356: call _ZN13NConsoleClose15TestBreakSignalEv@plt .Ltmp357: -# %bb.162: # %invoke.cont444 - # in Loop: Header=BB10_161 Depth=2 - bnez a0, .LBB10_213 -# %bb.163: # %if.end447 - # in Loop: Header=BB10_161 Depth=2 - sd zero, 312(sp) +# %bb.163: # %invoke.cont444 + # in Loop: Header=BB10_162 Depth=2 + bnez a0, .LBB10_214 +# %bb.164: # %if.end447 + # in Loop: Header=BB10_162 Depth=2 + sd zero, 296(sp) .Ltmp359: li a0, 16 call _Znam@plt .Ltmp360: -# %bb.164: # %invoke.cont449 - # in Loop: Header=BB10_161 Depth=2 - sd a0, 304(sp) +# %bb.165: # %invoke.cont449 + # in Loop: Header=BB10_162 Depth=2 + sd a0, 288(sp) sw zero, 0(a0) li a0, 4 - sw a0, 316(sp) + sw a0, 300(sp) .Ltmp362: - addi a2, sp, 304 + addi a2, sp, 288 mv a0, s2 mv a1, s1 call _ZNK4CArc11GetItemPathEjR11CStringBaseIwE@plt .Ltmp363: -# %bb.165: # %invoke.cont451 - # in Loop: Header=BB10_161 Depth=2 - xor a1, a0, s9 +# %bb.166: # %invoke.cont451 + # in Loop: Header=BB10_162 Depth=2 + ld a1, 88(sp) # 8-byte Folded Reload + xor a1, a0, a1 seqz a1, a1 - ld a2, 128(sp) # 8-byte Folded Reload + ld a2, 112(sp) # 8-byte Folded Reload and a1, a1, a2 li s0, 17 - bnez a1, .LBB10_168 -# %bb.166: # %if.end457 - # in Loop: Header=BB10_161 Depth=2 + bnez a1, .LBB10_169 +# %bb.167: # %if.end457 + # in Loop: Header=BB10_162 Depth=2 li s0, 1 - beqz a0, .LBB10_172 -# %bb.167: # in Loop: Header=BB10_161 Depth=2 + beqz a0, .LBB10_173 +# %bb.168: # in Loop: Header=BB10_162 Depth=2 mv s7, a0 -.LBB10_168: # %cleanup510 - # in Loop: Header=BB10_161 Depth=2 - ld a0, 304(sp) - beqz a0, .LBB10_170 -.LBB10_169: # %delete.notnull.i312 - # in Loop: Header=BB10_161 Depth=2 +.LBB10_169: # %cleanup510 + # in Loop: Header=BB10_162 Depth=2 + ld a0, 288(sp) + beqz a0, .LBB10_171 +.LBB10_170: # %delete.notnull.i312 + # in Loop: Header=BB10_162 Depth=2 call _ZdaPv@plt -.LBB10_170: # %_ZN11CStringBaseIwED2Ev.exit313 - # in Loop: Header=BB10_161 Depth=2 - beqz s0, .LBB10_160 -# %bb.171: # %_ZN11CStringBaseIwED2Ev.exit313 - # in Loop: Header=BB10_161 Depth=2 +.LBB10_171: # %_ZN11CStringBaseIwED2Ev.exit313 + # in Loop: Header=BB10_162 Depth=2 + beqz s0, .LBB10_161 +# %bb.172: # %_ZN11CStringBaseIwED2Ev.exit313 + # in Loop: Header=BB10_162 Depth=2 li a0, 19 - beq s0, a0, .LBB10_160 - j .LBB10_214 -.LBB10_172: # %cleanup.cont464 - # in Loop: Header=BB10_161 Depth=2 + beq s0, a0, .LBB10_161 + j .LBB10_215 +.LBB10_173: # %cleanup.cont464 + # in Loop: Header=BB10_162 Depth=2 .Ltmp365: - addi a2, sp, 252 + addi a2, sp, 236 mv a0, s11 mv a1, s1 call _Z19IsArchiveItemFolderP10IInArchivejRb@plt .Ltmp366: -# %bb.173: # %invoke.cont467 - # in Loop: Header=BB10_161 Depth=2 - beqz a0, .LBB10_175 # %bb.174: # %invoke.cont467 - # in Loop: Header=BB10_161 Depth=2 + # in Loop: Header=BB10_162 Depth=2 + beqz a0, .LBB10_176 +# %bb.175: # %invoke.cont467 + # in Loop: Header=BB10_162 Depth=2 mv s7, a0 -.LBB10_175: # %invoke.cont467 - # in Loop: Header=BB10_161 Depth=2 +.LBB10_176: # %invoke.cont467 + # in Loop: Header=BB10_162 Depth=2 li s0, 1 - bnez a0, .LBB10_187 -# %bb.176: # %cleanup.cont474 - # in Loop: Header=BB10_161 Depth=2 - lbu a0, 252(sp) + bnez a0, .LBB10_188 +# %bb.177: # %cleanup.cont474 + # in Loop: Header=BB10_162 Depth=2 + lbu a0, 236(sp) seqz a2, a0 .Ltmp368: - addi a1, sp, 304 - ld a0, 32(sp) # 8-byte Folded Reload + addi a1, sp, 288 + ld a0, 24(sp) # 8-byte Folded Reload call _ZNK9NWildcard11CCensorNode9CheckPathERK11CStringBaseIwEb@plt .Ltmp369: -# %bb.177: # %invoke.cont478 - # in Loop: Header=BB10_161 Depth=2 +# %bb.178: # %invoke.cont478 + # in Loop: Header=BB10_162 Depth=2 li s0, 19 - beqz a0, .LBB10_187 -# %bb.178: # %if.end481 - # in Loop: Header=BB10_161 Depth=2 + beqz a0, .LBB10_188 +# %bb.179: # %if.end481 + # in Loop: Header=BB10_162 Depth=2 .Ltmp370: - addi a0, sp, 456 + addi a0, sp, 440 mv a1, s2 mv a2, s1 - ld a3, 112(sp) # 8-byte Folded Reload + ld a3, 96(sp) # 8-byte Folded Reload call _ZN13CFieldPrinter13PrintItemInfoERK4CArcjb .Ltmp371: -# %bb.179: # %invoke.cont483 - # in Loop: Header=BB10_161 Depth=2 +# %bb.180: # %invoke.cont483 + # in Loop: Header=BB10_162 Depth=2 .Ltmp373: mv s0, s6 li a2, 7 - addi a3, sp, 240 + addi a3, sp, 224 mv a0, s11 mv a1, s1 call _Z14GetUInt64ValueP10IInArchivejjRy .Ltmp374: -# %bb.180: # %invoke.cont486 - # in Loop: Header=BB10_161 Depth=2 - addi s5, sp, 256 - bnez a0, .LBB10_182 -# %bb.181: # %if.then488 - # in Loop: Header=BB10_161 Depth=2 - sd zero, 240(sp) +# %bb.181: # %invoke.cont486 + # in Loop: Header=BB10_162 Depth=2 + addi s5, sp, 240 + bnez a0, .LBB10_183 +# %bb.182: # %if.then488 + # in Loop: Header=BB10_162 Depth=2 + sd zero, 224(sp) mv s5, s10 -.LBB10_182: # %if.end490 - # in Loop: Header=BB10_161 Depth=2 +.LBB10_183: # %if.end490 + # in Loop: Header=BB10_162 Depth=2 .Ltmp375: li a2, 8 - addi a3, sp, 296 + addi a3, sp, 280 mv a0, s11 mv a1, s1 call _Z14GetUInt64ValueP10IInArchivejjRy .Ltmp376: -# %bb.183: # %invoke.cont491 - # in Loop: Header=BB10_161 Depth=2 - addi s6, sp, 272 - bnez a0, .LBB10_185 -# %bb.184: # %if.then493 - # in Loop: Header=BB10_161 Depth=2 - sd zero, 296(sp) +# %bb.184: # %invoke.cont491 + # in Loop: Header=BB10_162 Depth=2 + addi s6, sp, 256 + bnez a0, .LBB10_186 +# %bb.185: # %if.then493 + # in Loop: Header=BB10_162 Depth=2 + sd zero, 280(sp) mv s6, s0 -.LBB10_185: # %if.end495 - # in Loop: Header=BB10_161 Depth=2 +.LBB10_186: # %if.end495 + # in Loop: Header=BB10_162 Depth=2 .Ltmp377: .Lpcrel_hi62: auipc a0, %got_pcrel_hi(_Z4endlR13CStdOutStream) @@ -4574,45 +4578,43 @@ mv a0, s4 call _ZN13CStdOutStreamlsEPFRS_S0_E@plt .Ltmp378: -# %bb.186: # %invoke.cont496 - # in Loop: Header=BB10_161 Depth=2 - lbu a0, 252(sp) +# %bb.187: # %invoke.cont496 + # in Loop: Header=BB10_162 Depth=2 + lbu a0, 236(sp) li s0, 0 xori a1, a0, 1 - ld a2, 48(sp) # 8-byte Folded Reload - add a2, a2, a1 - sd a2, 48(sp) # 8-byte Folded Spill - ld a1, 296(sp) - ld a2, 272(sp) - ld a3, 240(sp) - ld a4, 256(sp) - ld a5, 56(sp) # 8-byte Folded Reload + add s3, s3, a1 + ld a1, 280(sp) + ld a2, 256(sp) + ld a3, 224(sp) + ld a4, 240(sp) + ld a5, 32(sp) # 8-byte Folded Reload add a5, a5, a0 - sd a5, 56(sp) # 8-byte Folded Spill + sd a5, 32(sp) # 8-byte Folded Spill add a1, a2, a1 - sd a1, 272(sp) + sd a1, 256(sp) add a3, a4, a3 - sd a3, 256(sp) + sd a3, 240(sp) mv s10, s5 - ld a0, 304(sp) - bnez a0, .LBB10_169 - j .LBB10_170 -.LBB10_187: # in Loop: Header=BB10_161 Depth=2 + ld a0, 288(sp) + bnez a0, .LBB10_170 + j .LBB10_171 +.LBB10_188: # in Loop: Header=BB10_162 Depth=2 mv s5, s10 - ld a0, 304(sp) - bnez a0, .LBB10_169 - j .LBB10_170 -.LBB10_188: # in Loop: Header=BB10_5 Depth=1 + ld a0, 288(sp) + bnez a0, .LBB10_170 + j .LBB10_171 +.LBB10_189: # in Loop: Header=BB10_5 Depth=1 .Lpcrel_hi36: auipc a0, %pcrel_hi(.L.str.8) addi a1, a0, %pcrel_lo(.Lpcrel_hi36) -.LBB10_189: # %if.then75.invoke +.LBB10_190: # %if.then75.invoke # in Loop: Header=BB10_5 Depth=1 .Ltmp403: mv a0, s4 call _ZN13CStdOutStreamlsEPKc@plt .Ltmp404: -.LBB10_190: # %if.end89 +.LBB10_191: # %if.end89 # in Loop: Header=BB10_5 Depth=1 .Ltmp414: .Lpcrel_hi38: @@ -4621,48 +4623,49 @@ mv a0, s4 call _ZN13CStdOutStreamlsEPFRS_S0_E@plt .Ltmp415: -# %bb.191: # %invoke.cont90 +# %bb.192: # %invoke.cont90 # in Loop: Header=BB10_5 Depth=1 - ld a1, 136(sp) # 8-byte Folded Reload + ld a1, 120(sp) # 8-byte Folded Reload ld a0, 0(a1) addi a0, a0, 1 sd a0, 0(a1) li a0, 4 - sd a0, 232(sp) # 8-byte Folded Spill -.LBB10_192: # %cleanup583 + sd a0, 208(sp) # 8-byte Folded Spill +.LBB10_193: # %cleanup583 # in Loop: Header=BB10_5 Depth=1 - ld a0, 344(sp) - ld a1, 208(sp) # 8-byte Folded Reload - sd a1, 320(sp) - beqz a0, .LBB10_194 -.LBB10_193: # %delete.notnull.i.i348 + ld a0, 328(sp) + ld a1, 184(sp) # 8-byte Folded Reload + sd a1, 304(sp) + beqz a0, .LBB10_195 +.LBB10_194: # %delete.notnull.i.i348 # in Loop: Header=BB10_5 Depth=1 call _ZdaPv@plt -.LBB10_194: # %_ZN20COpenCallbackConsoleD2Ev.exit +.LBB10_195: # %_ZN20COpenCallbackConsoleD2Ev.exit # in Loop: Header=BB10_5 Depth=1 - addi a0, sp, 360 + addi a0, sp, 344 call _ZN12CArchiveLinkD2Ev -.LBB10_195: # %cleanup593 +.LBB10_196: # %cleanup593 # in Loop: Header=BB10_5 Depth=1 - ld a1, 232(sp) # 8-byte Folded Reload - beqz a1, .LBB10_4 -# %bb.196: # %cleanup593 + ld a1, 216(sp) # 8-byte Folded Reload + ld a2, 208(sp) # 8-byte Folded Reload + beqz a2, .LBB10_4 +# %bb.197: # %cleanup593 # in Loop: Header=BB10_5 Depth=1 li a0, 4 - beq a1, a0, .LBB10_4 - j .LBB10_240 -.LBB10_197: # %if.end389 + beq a2, a0, .LBB10_4 + j .LBB10_241 +.LBB10_198: # %if.end389 # in Loop: Header=BB10_5 Depth=1 li s0, 1 - ld a0, 104(sp) # 8-byte Folded Reload - bnez a0, .LBB10_67 -# %bb.198: # %if.then393 + ld a0, 80(sp) # 8-byte Folded Reload + bnez a0, .LBB10_68 +# %bb.199: # %if.then393 # in Loop: Header=BB10_5 Depth=1 .Ltmp336: - addi a0, sp, 456 + addi a0, sp, 440 call _ZN13CFieldPrinter10PrintTitleEv .Ltmp337: -# %bb.199: # %invoke.cont394 +# %bb.200: # %invoke.cont394 # in Loop: Header=BB10_5 Depth=1 .Ltmp338: .Lpcrel_hi60: @@ -4671,72 +4674,72 @@ mv a0, s4 call _ZN13CStdOutStreamlsEPFRS_S0_E@plt .Ltmp339: -# %bb.200: # %invoke.cont395 +# %bb.201: # %invoke.cont395 # in Loop: Header=BB10_5 Depth=1 - lw a0, 468(sp) - blez a0, .LBB10_211 -# %bb.201: # %for.body.i.preheader + lw a0, 452(sp) + blez a0, .LBB10_212 +# %bb.202: # %for.body.i.preheader # in Loop: Header=BB10_5 Depth=1 li s0, 0 - j .LBB10_203 -.LBB10_202: # %for.cond.cleanup7.i - # in Loop: Header=BB10_203 Depth=2 - lw a0, 468(sp) + j .LBB10_204 +.LBB10_203: # %for.cond.cleanup7.i + # in Loop: Header=BB10_204 Depth=2 + lw a0, 452(sp) addi s0, s0, 1 - bge s0, a0, .LBB10_211 -.LBB10_203: # %for.body.i + bge s0, a0, .LBB10_212 +.LBB10_204: # %for.body.i # Parent Loop BB10_5 Depth=1 # => This Loop Header: Depth=2 - # Child Loop BB10_204 Depth 3 - # Child Loop BB10_208 Depth 3 - ld a0, 472(sp) + # Child Loop BB10_205 Depth 3 + # Child Loop BB10_209 Depth 3 + ld a0, 456(sp) slli a1, s0, 3 add a0, a0, a1 ld s1, 0(a0) lw s2, 32(s1) - blez s2, .LBB10_206 -.LBB10_204: # %for.body.i.i + blez s2, .LBB10_207 +.LBB10_205: # %for.body.i.i # Parent Loop BB10_5 Depth=1 - # Parent Loop BB10_203 Depth=2 + # Parent Loop BB10_204 Depth=2 # => This Inner Loop Header: Depth=3 .Ltmp340: li a1, 32 mv a0, s4 call _ZN13CStdOutStreamlsEc@plt .Ltmp341: -# %bb.205: # %call.i.i.noexc301 - # in Loop: Header=BB10_204 Depth=3 +# %bb.206: # %call.i.i.noexc301 + # in Loop: Header=BB10_205 Depth=3 addiw s2, s2, -1 - bnez s2, .LBB10_204 -.LBB10_206: # %_ZL11PrintSpacesi.exit.i - # in Loop: Header=BB10_203 Depth=2 + bnez s2, .LBB10_205 +.LBB10_207: # %_ZL11PrintSpacesi.exit.i + # in Loop: Header=BB10_204 Depth=2 lw a0, 36(s1) - blez a0, .LBB10_202 -# %bb.207: # %for.body8.i.preheader - # in Loop: Header=BB10_203 Depth=2 + blez a0, .LBB10_203 +# %bb.208: # %for.body8.i.preheader + # in Loop: Header=BB10_204 Depth=2 li s2, 0 -.LBB10_208: # %for.body8.i +.LBB10_209: # %for.body8.i # Parent Loop BB10_5 Depth=1 - # Parent Loop BB10_203 Depth=2 + # Parent Loop BB10_204 Depth=2 # => This Inner Loop Header: Depth=3 .Ltmp343: li a1, 45 mv a0, s4 call _ZN13CStdOutStreamlsEc@plt .Ltmp344: -# %bb.209: # %call9.i.noexc - # in Loop: Header=BB10_208 Depth=3 +# %bb.210: # %call9.i.noexc + # in Loop: Header=BB10_209 Depth=3 lw a0, 36(s1) addiw s2, s2, 1 - blt s2, a0, .LBB10_208 - j .LBB10_202 -.LBB10_210: # in Loop: Header=BB10_5 Depth=1 + blt s2, a0, .LBB10_209 + j .LBB10_203 +.LBB10_211: # in Loop: Header=BB10_5 Depth=1 li s10, 0 li s6, 0 - sd zero, 56(sp) # 8-byte Folded Spill - sd zero, 48(sp) # 8-byte Folded Spill - j .LBB10_215 -.LBB10_211: # %invoke.cont397 + sd zero, 32(sp) # 8-byte Folded Spill + li s3, 0 + j .LBB10_216 +.LBB10_212: # %invoke.cont397 # in Loop: Header=BB10_5 Depth=1 .Ltmp346: .Lpcrel_hi61: @@ -4745,117 +4748,116 @@ mv a0, s4 call _ZN13CStdOutStreamlsEPFRS_S0_E@plt .Ltmp347: -# %bb.212: # in Loop: Header=BB10_5 Depth=1 +# %bb.213: # in Loop: Header=BB10_5 Depth=1 li s0, 0 - j .LBB10_67 -.LBB10_213: # in Loop: Header=BB10_5 Depth=1 - ld s7, 168(sp) # 8-byte Folded Reload - j .LBB10_238 -.LBB10_214: # %_ZN11CStringBaseIwED2Ev.exit313 + j .LBB10_68 +.LBB10_214: # in Loop: Header=BB10_5 Depth=1 + ld s7, 152(sp) # 8-byte Folded Reload + j .LBB10_239 +.LBB10_215: # %_ZN11CStringBaseIwED2Ev.exit313 # in Loop: Header=BB10_5 Depth=1 li a0, 17 - bne s0, a0, .LBB10_239 -.LBB10_215: # %for.end523 + bne s0, a0, .LBB10_240 +.LBB10_216: # %for.end523 # in Loop: Header=BB10_5 Depth=1 - mv s9, s6 snez a0, s6 - ld a1, 128(sp) # 8-byte Folded Reload + ld a1, 112(sp) # 8-byte Folded Reload or a0, a1, a0 - ld s6, 48(sp) # 8-byte Folded Reload - beqz a0, .LBB10_218 -# %bb.216: # %if.end537 + mv s5, s3 + beqz a0, .LBB10_219 +# %bb.217: # %if.end537 + # in Loop: Header=BB10_5 Depth=1 + or a0, s10, s5 + ld s3, 32(sp) # 8-byte Folded Reload + ld a1, 16(sp) # 8-byte Folded Reload + bnez a0, .LBB10_220 +.LBB10_218: # %if.then541 # in Loop: Header=BB10_5 Depth=1 - or a0, s10, s6 - ld s5, 56(sp) # 8-byte Folded Reload - ld a1, 24(sp) # 8-byte Folded Reload - bnez a0, .LBB10_219 -.LBB10_217: # %if.then541 - # in Loop: Header=BB10_5 Depth=1 - sd zero, 256(sp) - addi s10, sp, 256 - bnez a1, .LBB10_233 - j .LBB10_220 -.LBB10_218: # %if.then527 + sd zero, 240(sp) + addi s10, sp, 240 + bnez a1, .LBB10_234 + j .LBB10_221 +.LBB10_219: # %if.then527 # in Loop: Header=BB10_5 Depth=1 - lw a0, 404(sp) - ld a1, 424(sp) + lw a0, 388(sp) + ld a1, 408(sp) seqz a0, a0 addi a0, a0, -1 and a0, a0, a1 - ld a1, 184(sp) # 8-byte Folded Reload + ld a1, 168(sp) # 8-byte Folded Reload add a0, a0, a1 - seqz a1, s6 + seqz a1, s5 addi a1, a1, -1 and a0, a1, a0 - sd a0, 272(sp) - addi s9, sp, 272 - or a0, s10, s6 - ld s5, 56(sp) # 8-byte Folded Reload - ld a1, 24(sp) # 8-byte Folded Reload - beqz a0, .LBB10_217 -.LBB10_219: # %if.end542 - # in Loop: Header=BB10_5 Depth=1 - bnez a1, .LBB10_233 -.LBB10_220: # %if.then546 - # in Loop: Header=BB10_5 Depth=1 - lw a0, 468(sp) - blez a0, .LBB10_230 -# %bb.221: # %for.body.i322.preheader + sd a0, 256(sp) + addi s6, sp, 256 + or a0, s10, s5 + ld s3, 32(sp) # 8-byte Folded Reload + ld a1, 16(sp) # 8-byte Folded Reload + beqz a0, .LBB10_218 +.LBB10_220: # %if.end542 + # in Loop: Header=BB10_5 Depth=1 + bnez a1, .LBB10_234 +.LBB10_221: # %if.then546 + # in Loop: Header=BB10_5 Depth=1 + lw a0, 452(sp) + blez a0, .LBB10_231 +# %bb.222: # %for.body.i322.preheader # in Loop: Header=BB10_5 Depth=1 li s0, 0 - j .LBB10_223 -.LBB10_222: # %for.cond.cleanup7.i330 - # in Loop: Header=BB10_223 Depth=2 - lw a0, 468(sp) + j .LBB10_224 +.LBB10_223: # %for.cond.cleanup7.i330 + # in Loop: Header=BB10_224 Depth=2 + lw a0, 452(sp) addi s0, s0, 1 - bge s0, a0, .LBB10_230 -.LBB10_223: # %for.body.i322 + bge s0, a0, .LBB10_231 +.LBB10_224: # %for.body.i322 # Parent Loop BB10_5 Depth=1 # => This Loop Header: Depth=2 - # Child Loop BB10_224 Depth 3 - # Child Loop BB10_228 Depth 3 - ld a0, 472(sp) + # Child Loop BB10_225 Depth 3 + # Child Loop BB10_229 Depth 3 + ld a0, 456(sp) slli a1, s0, 3 add a0, a0, a1 ld s1, 0(a0) lw s2, 32(s1) - blez s2, .LBB10_226 -.LBB10_224: # %for.body.i.i337 + blez s2, .LBB10_227 +.LBB10_225: # %for.body.i.i337 # Parent Loop BB10_5 Depth=1 - # Parent Loop BB10_223 Depth=2 + # Parent Loop BB10_224 Depth=2 # => This Inner Loop Header: Depth=3 .Ltmp380: li a1, 32 mv a0, s4 call _ZN13CStdOutStreamlsEc@plt .Ltmp381: -# %bb.225: # %call.i.i.noexc341 - # in Loop: Header=BB10_224 Depth=3 +# %bb.226: # %call.i.i.noexc341 + # in Loop: Header=BB10_225 Depth=3 addiw s2, s2, -1 - bnez s2, .LBB10_224 -.LBB10_226: # %_ZL11PrintSpacesi.exit.i327 - # in Loop: Header=BB10_223 Depth=2 + bnez s2, .LBB10_225 +.LBB10_227: # %_ZL11PrintSpacesi.exit.i327 + # in Loop: Header=BB10_224 Depth=2 lw a0, 36(s1) - blez a0, .LBB10_222 -# %bb.227: # %for.body8.i333.preheader - # in Loop: Header=BB10_223 Depth=2 + blez a0, .LBB10_223 +# %bb.228: # %for.body8.i333.preheader + # in Loop: Header=BB10_224 Depth=2 li s2, 0 -.LBB10_228: # %for.body8.i333 +.LBB10_229: # %for.body8.i333 # Parent Loop BB10_5 Depth=1 - # Parent Loop BB10_223 Depth=2 + # Parent Loop BB10_224 Depth=2 # => This Inner Loop Header: Depth=3 .Ltmp383: li a1, 45 mv a0, s4 call _ZN13CStdOutStreamlsEc@plt .Ltmp384: -# %bb.229: # %call9.i.noexc343 - # in Loop: Header=BB10_228 Depth=3 +# %bb.230: # %call9.i.noexc343 + # in Loop: Header=BB10_229 Depth=3 lw a0, 36(s1) addiw s2, s2, 1 - blt s2, a0, .LBB10_228 - j .LBB10_222 -.LBB10_230: # %invoke.cont547 + blt s2, a0, .LBB10_229 + j .LBB10_223 +.LBB10_231: # %invoke.cont547 # in Loop: Header=BB10_5 Depth=1 .Ltmp386: .Lpcrel_hi63: @@ -4864,17 +4866,17 @@ mv a0, s4 call _ZN13CStdOutStreamlsEPFRS_S0_E@plt .Ltmp387: -# %bb.231: # %invoke.cont548 +# %bb.232: # %invoke.cont548 # in Loop: Header=BB10_5 Depth=1 .Ltmp388: - addi a0, sp, 456 - mv a1, s6 - mv a2, s5 + addi a0, sp, 440 + mv a1, s5 + mv a2, s3 mv a3, s10 - mv a4, s9 + mv a4, s6 call _ZN13CFieldPrinter16PrintSummaryInfoEyyPKyS1_ .Ltmp389: -# %bb.232: # %invoke.cont550 +# %bb.233: # %invoke.cont550 # in Loop: Header=BB10_5 Depth=1 .Ltmp390: .Lpcrel_hi64: @@ -4883,64 +4885,64 @@ mv a0, s4 call _ZN13CStdOutStreamlsEPFRS_S0_E@plt .Ltmp391: -.LBB10_233: # %if.end554 +.LBB10_234: # %if.end554 # in Loop: Header=BB10_5 Depth=1 - beqz s9, .LBB10_235 -# %bb.234: # %if.then556 + beqz s6, .LBB10_236 +# %bb.235: # %if.then556 # in Loop: Header=BB10_5 Depth=1 - ld a0, 272(sp) - ld a1, 448(sp) + ld a0, 256(sp) + ld a1, 432(sp) add a0, a1, a0 - sd a0, 448(sp) - addi a0, sp, 448 - sd a0, 72(sp) # 8-byte Folded Spill -.LBB10_235: # %if.end558 + sd a0, 432(sp) + addi a0, sp, 432 + sd a0, 48(sp) # 8-byte Folded Spill +.LBB10_236: # %if.end558 # in Loop: Header=BB10_5 Depth=1 - beqz s10, .LBB10_237 -# %bb.236: # %if.then560 + beqz s10, .LBB10_238 +# %bb.237: # %if.then560 # in Loop: Header=BB10_5 Depth=1 - ld a0, 256(sp) - ld a1, 440(sp) + ld a0, 240(sp) + ld a1, 424(sp) add a0, a1, a0 - sd a0, 440(sp) - addi a0, sp, 440 - sd a0, 64(sp) # 8-byte Folded Spill -.LBB10_237: # %if.end562 + sd a0, 424(sp) + addi a0, sp, 424 + sd a0, 40(sp) # 8-byte Folded Spill +.LBB10_238: # %if.end562 # in Loop: Header=BB10_5 Depth=1 - sd zero, 232(sp) # 8-byte Folded Spill - ld a0, 96(sp) # 8-byte Folded Reload - add a0, s6, a0 - sd a0, 96(sp) # 8-byte Folded Spill - ld a0, 88(sp) # 8-byte Folded Reload + sd zero, 208(sp) # 8-byte Folded Spill + ld a0, 72(sp) # 8-byte Folded Reload add a0, s5, a0 - sd a0, 88(sp) # 8-byte Folded Spill -.LBB10_238: # %cleanup565 + sd a0, 72(sp) # 8-byte Folded Spill + ld a0, 64(sp) # 8-byte Folded Reload + add a0, s3, a0 + sd a0, 64(sp) # 8-byte Folded Spill +.LBB10_239: # %cleanup565 # in Loop: Header=BB10_5 Depth=1 - ld s9, 128(sp) # 8-byte Folded Reload + ld s6, 112(sp) # 8-byte Folded Reload mv s1, s7 - ld a0, 344(sp) - ld a1, 208(sp) # 8-byte Folded Reload - sd a1, 320(sp) - bnez a0, .LBB10_193 - j .LBB10_194 -.LBB10_239: # in Loop: Header=BB10_5 Depth=1 - sd s0, 232(sp) # 8-byte Folded Spill - j .LBB10_238 -.LBB10_240: # %cleanup593 + ld a0, 328(sp) + ld a1, 184(sp) # 8-byte Folded Reload + sd a1, 304(sp) + bnez a0, .LBB10_194 + j .LBB10_195 +.LBB10_240: # in Loop: Header=BB10_5 Depth=1 + sd s0, 208(sp) # 8-byte Folded Spill + j .LBB10_239 +.LBB10_241: # %cleanup593 li a0, 2 - bne a1, a0, .LBB10_243 -.LBB10_241: # %for.end604 - ld a0, 216(sp) # 8-byte Folded Reload + bne a2, a0, .LBB10_244 +.LBB10_242: # %for.end604 + ld a0, 192(sp) # 8-byte Folded Reload slti a0, a0, 2 - ld a1, 104(sp) # 8-byte Folded Reload + ld a1, 80(sp) # 8-byte Folded Reload or a0, a1, a0 - beqz a0, .LBB10_244 -# %bb.242: + beqz a0, .LBB10_245 +# %bb.243: li s1, 0 -.LBB10_243: # %cleanup627.loopexit - ld s4, 80(sp) # 8-byte Folded Reload - j .LBB10_262 -.LBB10_244: # %if.then610 +.LBB10_244: # %cleanup627.loopexit + ld s4, 56(sp) # 8-byte Folded Reload + j .LBB10_263 +.LBB10_245: # %if.then610 .Ltmp417: .Lpcrel_hi65: auipc a0, %got_pcrel_hi(g_StdOut) @@ -4950,65 +4952,65 @@ ld a1, %pcrel_lo(.Lpcrel_hi66)(a1) call _ZN13CStdOutStreamlsEPFRS_S0_E@plt .Ltmp418: - ld s4, 80(sp) # 8-byte Folded Reload -# %bb.245: # %invoke.cont611 - lw a0, 468(sp) - blez a0, .LBB10_255 -# %bb.246: # %for.body.lr.ph.i357 + ld s4, 56(sp) # 8-byte Folded Reload +# %bb.246: # %invoke.cont611 + lw a0, 452(sp) + blez a0, .LBB10_256 +# %bb.247: # %for.body.lr.ph.i357 .Lpcrel_hi67: auipc a0, %got_pcrel_hi(g_StdOut) ld s1, %pcrel_lo(.Lpcrel_hi67)(a0) li s0, 0 - j .LBB10_248 -.LBB10_247: # %for.cond.cleanup7.i367 - # in Loop: Header=BB10_248 Depth=1 - lw a0, 468(sp) + j .LBB10_249 +.LBB10_248: # %for.cond.cleanup7.i367 + # in Loop: Header=BB10_249 Depth=1 + lw a0, 452(sp) addi s0, s0, 1 - bge s0, a0, .LBB10_255 -.LBB10_248: # %for.body.i359 + bge s0, a0, .LBB10_256 +.LBB10_249: # %for.body.i359 # =>This Loop Header: Depth=1 - # Child Loop BB10_249 Depth 2 - # Child Loop BB10_253 Depth 2 - ld a0, 472(sp) + # Child Loop BB10_250 Depth 2 + # Child Loop BB10_254 Depth 2 + ld a0, 456(sp) slli a1, s0, 3 add a0, a0, a1 ld s2, 0(a0) lw s3, 32(s2) - blez s3, .LBB10_251 -.LBB10_249: # %for.body.i.i374 - # Parent Loop BB10_248 Depth=1 + blez s3, .LBB10_252 +.LBB10_250: # %for.body.i.i374 + # Parent Loop BB10_249 Depth=1 # => This Inner Loop Header: Depth=2 .Ltmp419: li a1, 32 mv a0, s1 call _ZN13CStdOutStreamlsEc@plt .Ltmp420: -# %bb.250: # %call.i.i.noexc378 - # in Loop: Header=BB10_249 Depth=2 +# %bb.251: # %call.i.i.noexc378 + # in Loop: Header=BB10_250 Depth=2 addiw s3, s3, -1 - bnez s3, .LBB10_249 -.LBB10_251: # %_ZL11PrintSpacesi.exit.i364 - # in Loop: Header=BB10_248 Depth=1 + bnez s3, .LBB10_250 +.LBB10_252: # %_ZL11PrintSpacesi.exit.i364 + # in Loop: Header=BB10_249 Depth=1 lw a0, 36(s2) - blez a0, .LBB10_247 -# %bb.252: # %for.body8.i370.preheader - # in Loop: Header=BB10_248 Depth=1 + blez a0, .LBB10_248 +# %bb.253: # %for.body8.i370.preheader + # in Loop: Header=BB10_249 Depth=1 li s3, 0 -.LBB10_253: # %for.body8.i370 - # Parent Loop BB10_248 Depth=1 +.LBB10_254: # %for.body8.i370 + # Parent Loop BB10_249 Depth=1 # => This Inner Loop Header: Depth=2 .Ltmp422: li a1, 45 mv a0, s1 call _ZN13CStdOutStreamlsEc@plt .Ltmp423: -# %bb.254: # %call9.i.noexc380 - # in Loop: Header=BB10_253 Depth=2 +# %bb.255: # %call9.i.noexc380 + # in Loop: Header=BB10_254 Depth=2 lw a0, 36(s2) addiw s3, s3, 1 - blt s3, a0, .LBB10_253 - j .LBB10_247 -.LBB10_255: # %invoke.cont613 + blt s3, a0, .LBB10_254 + j .LBB10_248 +.LBB10_256: # %invoke.cont613 .Ltmp425: .Lpcrel_hi68: auipc a0, %got_pcrel_hi(g_StdOut) @@ -5018,16 +5020,16 @@ ld a1, %pcrel_lo(.Lpcrel_hi69)(a1) call _ZN13CStdOutStreamlsEPFRS_S0_E@plt .Ltmp426: -# %bb.256: # %invoke.cont614 +# %bb.257: # %invoke.cont614 .Ltmp427: - addi a0, sp, 456 - ld a1, 96(sp) # 8-byte Folded Reload - ld a2, 88(sp) # 8-byte Folded Reload - ld a3, 64(sp) # 8-byte Folded Reload - ld a4, 72(sp) # 8-byte Folded Reload + addi a0, sp, 440 + ld a1, 72(sp) # 8-byte Folded Reload + ld a2, 64(sp) # 8-byte Folded Reload + ld a3, 40(sp) # 8-byte Folded Reload + ld a4, 48(sp) # 8-byte Folded Reload call _ZN13CFieldPrinter16PrintSummaryInfoEyyPKyS1_ .Ltmp428: -# %bb.257: # %invoke.cont616 +# %bb.258: # %invoke.cont616 .Ltmp429: .Lpcrel_hi70: auipc a0, %got_pcrel_hi(g_StdOut) @@ -5037,7 +5039,7 @@ ld a1, %pcrel_lo(.Lpcrel_hi71)(a1) call _ZN13CStdOutStreamlsEPFRS_S0_E@plt .Ltmp430: -# %bb.258: # %invoke.cont618 +# %bb.259: # %invoke.cont618 .Ltmp431: .Lpcrel_hi72: auipc a0, %got_pcrel_hi(g_StdOut) @@ -5047,284 +5049,284 @@ addi a1, a1, %pcrel_lo(.Lpcrel_hi73) call _ZN13CStdOutStreamlsEPKc@plt .Ltmp432: -# %bb.259: # %invoke.cont620 +# %bb.260: # %invoke.cont620 .Ltmp433: - ld a1, 216(sp) # 8-byte Folded Reload + ld a1, 192(sp) # 8-byte Folded Reload call _ZN13CStdOutStreamlsEi@plt .Ltmp434: -# %bb.260: # %invoke.cont622 +# %bb.261: # %invoke.cont622 .Ltmp435: .Lpcrel_hi74: auipc a1, %got_pcrel_hi(_Z4endlR13CStdOutStream) ld a1, %pcrel_lo(.Lpcrel_hi74)(a1) call _ZN13CStdOutStreamlsEPFRS_S0_E@plt .Ltmp436: -.LBB10_261: +.LBB10_262: li s1, 0 -.LBB10_262: # %cleanup627 - sd s4, 456(sp) +.LBB10_263: # %cleanup627 + sd s4, 440(sp) .Ltmp438: - addi a0, sp, 456 + addi a0, sp, 440 call _ZN17CBaseRecordVector5ClearEv@plt .Ltmp439: -# %bb.263: # %_ZN13CFieldPrinterD2Ev.exit - addi a0, sp, 456 +# %bb.264: # %_ZN13CFieldPrinterD2Ev.exit + addi a0, sp, 440 call _ZN17CBaseRecordVectorD2Ev@plt sext.w a0, s1 csrr a1, vlenb slli a1, a1, 1 add sp, sp, a1 - ld ra, 600(sp) # 8-byte Folded Reload - ld s0, 592(sp) # 8-byte Folded Reload - ld s1, 584(sp) # 8-byte Folded Reload - ld s2, 576(sp) # 8-byte Folded Reload - ld s3, 568(sp) # 8-byte Folded Reload - ld s4, 560(sp) # 8-byte Folded Reload - ld s5, 552(sp) # 8-byte Folded Reload - ld s6, 544(sp) # 8-byte Folded Reload - ld s7, 536(sp) # 8-byte Folded Reload - ld s8, 528(sp) # 8-byte Folded Reload - ld s9, 520(sp) # 8-byte Folded Reload - ld s10, 512(sp) # 8-byte Folded Reload - ld s11, 504(sp) # 8-byte Folded Reload - addi sp, sp, 608 + ld ra, 584(sp) # 8-byte Folded Reload + ld s0, 576(sp) # 8-byte Folded Reload + ld s1, 568(sp) # 8-byte Folded Reload + ld s2, 560(sp) # 8-byte Folded Reload + ld s3, 552(sp) # 8-byte Folded Reload + ld s4, 544(sp) # 8-byte Folded Reload + ld s5, 536(sp) # 8-byte Folded Reload + ld s6, 528(sp) # 8-byte Folded Reload + ld s7, 520(sp) # 8-byte Folded Reload + ld s8, 512(sp) # 8-byte Folded Reload + ld s9, 504(sp) # 8-byte Folded Reload + ld s10, 496(sp) # 8-byte Folded Reload + ld s11, 488(sp) # 8-byte Folded Reload + addi sp, sp, 592 ret -.LBB10_264: # %lpad323 +.LBB10_265: # %lpad323 .Ltmp312: mv s0, a0 - j .LBB10_280 -.LBB10_265: # %lpad485 + j .LBB10_281 +.LBB10_266: # %lpad485 .Ltmp379: - j .LBB10_295 -.LBB10_266: # %lpad477 + j .LBB10_296 +.LBB10_267: # %lpad477 .Ltmp372: - j .LBB10_295 -.LBB10_267: # %lpad529.loopexit.split-lp.loopexit.split-lp + j .LBB10_296 +.LBB10_268: # %lpad529.loopexit.split-lp.loopexit.split-lp .Ltmp392: - j .LBB10_331 -.LBB10_268: # %lpad316 + j .LBB10_332 +.LBB10_269: # %lpad316 .Ltmp309: - j .LBB10_285 -.LBB10_269: # %lpad + j .LBB10_286 +.LBB10_270: # %lpad .Ltmp188: - j .LBB10_329 -.LBB10_270: # %lpad466 + j .LBB10_330 +.LBB10_271: # %lpad466 .Ltmp367: - j .LBB10_295 -.LBB10_271: # %lpad81 + j .LBB10_296 +.LBB10_272: # %lpad81 .Ltmp413: - j .LBB10_273 -.LBB10_272: # %lpad.i + j .LBB10_274 +.LBB10_273: # %lpad.i .Ltmp410: -.LBB10_273: # %lpad81 - ld a1, 304(sp) +.LBB10_274: # %lpad81 + ld a1, 288(sp) mv s0, a0 - beqz a1, .LBB10_332 -# %bb.274: # %delete.notnull.i190 + beqz a1, .LBB10_333 +# %bb.275: # %delete.notnull.i190 mv a0, a1 call _ZdaPv@plt - j .LBB10_332 -.LBB10_275: # %lpad79 + j .LBB10_333 +.LBB10_276: # %lpad79 .Ltmp407: - j .LBB10_331 -.LBB10_276: # %lpad414 + j .LBB10_332 +.LBB10_277: # %lpad414 .Ltmp352: - j .LBB10_331 -.LBB10_277: # %terminate.lpad.i.i + j .LBB10_332 +.LBB10_278: # %terminate.lpad.i.i .Ltmp440: call __clang_call_terminate -.LBB10_278: # %lpad327 +.LBB10_279: # %lpad327 .Ltmp321: mv s0, a0 - beqz s1, .LBB10_280 -# %bb.279: # %delete.notnull.i279 + beqz s1, .LBB10_281 +# %bb.280: # %delete.notnull.i279 mv a0, s1 call _ZdaPv@plt -.LBB10_280: # %ehcleanup334 - ld a0, 272(sp) - beqz a0, .LBB10_286 -# %bb.281: # %delete.notnull.i282 +.LBB10_281: # %ehcleanup334 + ld a0, 256(sp) + beqz a0, .LBB10_287 +# %bb.282: # %delete.notnull.i282 call _ZdaPv@plt - j .LBB10_286 -.LBB10_282: # %lpad428 + j .LBB10_287 +.LBB10_283: # %lpad428 .Ltmp355: - j .LBB10_331 -.LBB10_283: # %terminate.lpad.i288 + j .LBB10_332 +.LBB10_284: # %terminate.lpad.i288 .Ltmp330: call __clang_call_terminate -.LBB10_284: # %lpad305 +.LBB10_285: # %lpad305 .Ltmp306: -.LBB10_285: # %ehcleanup339 - mv s0, a0 .LBB10_286: # %ehcleanup339 + mv s0, a0 +.LBB10_287: # %ehcleanup339 .Ltmp322: - addi a0, sp, 304 + addi a0, sp, 288 call _ZN8NWindows4NCOM12CPropVariant5ClearEv@plt .Ltmp323: - j .LBB10_300 -.LBB10_287: # %lpad3.loopexit.split-lp.loopexit.split-lp + j .LBB10_301 +.LBB10_288: # %lpad3.loopexit.split-lp.loopexit.split-lp .Ltmp437: - j .LBB10_329 -.LBB10_288: # %terminate.lpad.i293 + j .LBB10_330 +.LBB10_289: # %terminate.lpad.i293 .Ltmp324: call __clang_call_terminate -.LBB10_289: # %lpad219 +.LBB10_290: # %lpad219 .Ltmp274: mv s0, a0 - j .LBB10_306 -.LBB10_290: # %lpad261 + j .LBB10_307 +.LBB10_291: # %lpad261 .Ltmp300: - j .LBB10_331 -.LBB10_291: # %lpad41 + j .LBB10_332 +.LBB10_292: # %lpad41 .Ltmp210: - j .LBB10_331 -.LBB10_292: # %lpad168 + j .LBB10_332 +.LBB10_293: # %lpad168 .Ltmp262: - j .LBB10_331 -.LBB10_293: # %lpad212 + j .LBB10_332 +.LBB10_294: # %lpad212 .Ltmp271: - j .LBB10_310 -.LBB10_294: # %lpad450 + j .LBB10_311 +.LBB10_295: # %lpad450 .Ltmp364: -.LBB10_295: # %ehcleanup511 +.LBB10_296: # %ehcleanup511 mv s0, a0 - ld a0, 304(sp) - beqz a0, .LBB10_332 -# %bb.296: # %delete.notnull.i315 + ld a0, 288(sp) + beqz a0, .LBB10_333 +# %bb.297: # %delete.notnull.i315 call _ZdaPv@plt - j .LBB10_332 -.LBB10_297: # %lpad448 + j .LBB10_333 +.LBB10_298: # %lpad448 .Ltmp361: - j .LBB10_331 -.LBB10_298: # %lpad443 + j .LBB10_332 +.LBB10_299: # %lpad443 .Ltmp358: - j .LBB10_331 -.LBB10_299: # %lpad285 + j .LBB10_332 +.LBB10_300: # %lpad285 .Ltmp303: mv s0, a0 -.LBB10_300: # %ehcleanup343 - ld a0, 296(sp) +.LBB10_301: # %ehcleanup343 + ld a0, 280(sp) .Ltmp325: call SysFreeString@plt .Ltmp326: - j .LBB10_332 -.LBB10_301: # %terminate.lpad.i295 + j .LBB10_333 +.LBB10_302: # %terminate.lpad.i295 .Ltmp327: call __clang_call_terminate -.LBB10_302: # %terminate.lpad.i290 +.LBB10_303: # %terminate.lpad.i290 .Ltmp333: call __clang_call_terminate -.LBB10_303: # %lpad10 +.LBB10_304: # %lpad10 .Ltmp191: - j .LBB10_329 -.LBB10_304: # %lpad223 + j .LBB10_330 +.LBB10_305: # %lpad223 .Ltmp283: mv s0, a0 - beqz s6, .LBB10_306 -# %bb.305: # %delete.notnull.i245 + beqz s6, .LBB10_307 +# %bb.306: # %delete.notnull.i245 mv a0, s6 call _ZdaPv@plt -.LBB10_306: # %ehcleanup230 - ld a0, 272(sp) - beqz a0, .LBB10_311 -# %bb.307: # %delete.notnull.i248 +.LBB10_307: # %ehcleanup230 + ld a0, 256(sp) + beqz a0, .LBB10_312 +# %bb.308: # %delete.notnull.i248 call _ZdaPv@plt - j .LBB10_311 -.LBB10_308: # %terminate.lpad.i + j .LBB10_312 +.LBB10_309: # %terminate.lpad.i .Ltmp292: call __clang_call_terminate -.LBB10_309: # %lpad202 +.LBB10_310: # %lpad202 .Ltmp268: -.LBB10_310: # %ehcleanup235 - mv s0, a0 .LBB10_311: # %ehcleanup235 + mv s0, a0 +.LBB10_312: # %ehcleanup235 .Ltmp284: - addi a0, sp, 304 + addi a0, sp, 288 call _ZN8NWindows4NCOM12CPropVariant5ClearEv@plt .Ltmp285: - j .LBB10_317 -.LBB10_312: # %lpad37 + j .LBB10_318 +.LBB10_313: # %lpad37 .Ltmp207: mv s0, a0 - j .LBB10_334 -.LBB10_313: # %terminate.lpad.i256 + j .LBB10_335 +.LBB10_314: # %terminate.lpad.i256 .Ltmp286: call __clang_call_terminate -.LBB10_314: # %lpad104.loopexit.split-lp +.LBB10_315: # %lpad104.loopexit.split-lp .Ltmp222: - j .LBB10_331 -.LBB10_315: # %terminate.lpad.i254 + j .LBB10_332 +.LBB10_316: # %terminate.lpad.i254 .Ltmp295: call __clang_call_terminate -.LBB10_316: # %lpad183 +.LBB10_317: # %lpad183 .Ltmp265: mv s0, a0 -.LBB10_317: # %ehcleanup239 - ld a0, 296(sp) +.LBB10_318: # %ehcleanup239 + ld a0, 280(sp) .Ltmp287: call SysFreeString@plt .Ltmp288: - j .LBB10_332 -.LBB10_318: # %terminate.lpad.i258 + j .LBB10_333 +.LBB10_319: # %terminate.lpad.i258 .Ltmp289: call __clang_call_terminate -.LBB10_319: # %lpad12 +.LBB10_320: # %lpad12 .Ltmp204: - ld a1, 400(sp) + ld a1, 384(sp) mv s0, a0 - beqz a1, .LBB10_335 -# %bb.320: # %delete.notnull.i.i + beqz a1, .LBB10_336 +# %bb.321: # %delete.notnull.i.i mv a0, a1 call _ZdaPv@plt - addi a0, sp, 456 + addi a0, sp, 440 call _ZN13CFieldPrinterD2Ev mv a0, s0 call _Unwind_Resume@plt -.LBB10_321: # %lpad147 +.LBB10_322: # %lpad147 .Ltmp259: - j .LBB10_331 -.LBB10_322: # %lpad45.loopexit.split-lp.loopexit.split-lp + j .LBB10_332 +.LBB10_323: # %lpad45.loopexit.split-lp.loopexit.split-lp .Ltmp416: - j .LBB10_331 -.LBB10_323: # %lpad45.loopexit + j .LBB10_332 +.LBB10_324: # %lpad45.loopexit .Ltmp345: - j .LBB10_331 -.LBB10_324: # %lpad45.loopexit.split-lp.loopexit + j .LBB10_332 +.LBB10_325: # %lpad45.loopexit.split-lp.loopexit .Ltmp342: - j .LBB10_331 -.LBB10_325: # %lpad529.loopexit + j .LBB10_332 +.LBB10_326: # %lpad529.loopexit .Ltmp385: - j .LBB10_331 -.LBB10_326: # %lpad529.loopexit.split-lp.loopexit + j .LBB10_332 +.LBB10_327: # %lpad529.loopexit.split-lp.loopexit .Ltmp382: - j .LBB10_331 -.LBB10_327: # %lpad3.loopexit + j .LBB10_332 +.LBB10_328: # %lpad3.loopexit .Ltmp424: - j .LBB10_329 -.LBB10_328: # %lpad3.loopexit.split-lp.loopexit + j .LBB10_330 +.LBB10_329: # %lpad3.loopexit.split-lp.loopexit .Ltmp421: -.LBB10_329: # %ehcleanup642 +.LBB10_330: # %ehcleanup642 mv s0, a0 - addi a0, sp, 456 + addi a0, sp, 440 call _ZN13CFieldPrinterD2Ev mv a0, s0 call _Unwind_Resume@plt -.LBB10_330: # %lpad104.loopexit +.LBB10_331: # %lpad104.loopexit .Ltmp217: -.LBB10_331: # %ehcleanup586 - mv s0, a0 .LBB10_332: # %ehcleanup586 - ld a0, 344(sp) - ld a1, 208(sp) # 8-byte Folded Reload - sd a1, 320(sp) - beqz a0, .LBB10_334 -# %bb.333: # %delete.notnull.i.i352 + mv s0, a0 +.LBB10_333: # %ehcleanup586 + ld a0, 328(sp) + ld a1, 184(sp) # 8-byte Folded Reload + sd a1, 304(sp) + beqz a0, .LBB10_335 +# %bb.334: # %delete.notnull.i.i352 call _ZdaPv@plt -.LBB10_334: # %ehcleanup588 - addi a0, sp, 360 +.LBB10_335: # %ehcleanup588 + addi a0, sp, 344 call _ZN12CArchiveLinkD2Ev -.LBB10_335: # %ehcleanup642 - addi a0, sp, 456 +.LBB10_336: # %ehcleanup642 + addi a0, sp, 440 call _ZN13CFieldPrinterD2Ev mv a0, s0 call _Unwind_Resume@plt --- build.head//MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/subsumption.s 2023-11-13 08:03:22.379558054 +0000 +++ build//MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/subsumption.s 2023-11-13 08:03:17.423701310 +0000 @@ -1136,10 +1136,10 @@ vsetivli zero, 4, e32, m1, ta, ma vmv.v.i v8, 0 li s5, 1 - sd s3, 24(sp) # 8-byte Folded Spill - sd a5, 88(sp) # 8-byte Folded Spill addi a0, sp, 128 vs1r.v v8, (a0) # Unknown-size Folded Spill + sd s3, 24(sp) # 8-byte Folded Spill + sd a5, 88(sp) # 8-byte Folded Spill sd s2, 80(sp) # 8-byte Folded Spill .LBB3_10: # %while.body5.i # =>This Loop Header: Depth=1 @@ -1205,12 +1205,12 @@ li s6, 1 beqz a0, .LBB3_16 # %bb.15: # in Loop: Header=BB3_13 Depth=2 + addi a0, sp, 128 + vl1r.v v8, (a0) # Unknown-size Folded Reload mv s4, s7 mv s7, s2 ld s2, 80(sp) # 8-byte Folded Reload ld a5, 88(sp) # 8-byte Folded Reload - addi a0, sp, 128 - vl1r.v v8, (a0) # Unknown-size Folded Reload lw a0, 0(s10) bgtz a0, .LBB3_24 j .LBB3_26 @@ -1218,9 +1218,9 @@ # in Loop: Header=BB3_13 Depth=2 lw a1, 0(s11) lw a0, 0(s3) - ld a5, 88(sp) # 8-byte Folded Reload addi a2, sp, 128 vl1r.v v8, (a2) # Unknown-size Folded Reload + ld a5, 88(sp) # 8-byte Folded Reload bne a1, a0, .LBB3_23 # %bb.17: # %land.lhs.true.i # in Loop: Header=BB3_13 Depth=2 @@ -1404,9 +1404,9 @@ li s6, 0 addiw s9, s9, 1 .LBB3_43: # in Loop: Header=BB3_13 Depth=2 - ld a5, 88(sp) # 8-byte Folded Reload addi a0, sp, 128 vl1r.v v8, (a0) # Unknown-size Folded Reload + ld a5, 88(sp) # 8-byte Folded Reload ld s11, 32(sp) # 8-byte Folded Reload lw a0, 0(s10) bgtz a0, .LBB3_24 @@ -1623,7 +1623,7 @@ ld s7, %pcrel_lo(.Lpcrel_hi44)(a0) .Lpcrel_hi45: auipc a0, %got_pcrel_hi(cont_STACKPOINTER) - ld s10, %pcrel_lo(.Lpcrel_hi45)(a0) + ld s9, %pcrel_lo(.Lpcrel_hi45)(a0) .Lpcrel_hi46: auipc a0, %got_pcrel_hi(cont_STACK) ld a0, %pcrel_lo(.Lpcrel_hi46)(a0) @@ -1634,7 +1634,7 @@ sd a0, 48(sp) # 8-byte Folded Spill .Lpcrel_hi48: auipc a0, %got_pcrel_hi(cont_LASTBINDING) - ld s9, %pcrel_lo(.Lpcrel_hi48)(a0) + ld s10, %pcrel_lo(.Lpcrel_hi48)(a0) .Lpcrel_hi49: auipc a0, %got_pcrel_hi(cont_CURRENTBINDING) ld s8, %pcrel_lo(.Lpcrel_hi49)(a0) @@ -1645,9 +1645,9 @@ vsetivli zero, 4, e32, m1, ta, ma vmv.v.i v8, 0 li s1, 1 - sd a5, 40(sp) # 8-byte Folded Spill addi a0, sp, 96 vs1r.v v8, (a0) # Unknown-size Folded Spill + sd a5, 40(sp) # 8-byte Folded Spill j .LBB4_17 .LBB4_16: # %if.end88 # in Loop: Header=BB4_17 Depth=1 @@ -1671,11 +1671,11 @@ slli s2, s4, 3 add a0, a0, s2 ld a0, 0(a0) - lw a1, 0(s10) + lw a1, 0(s9) ld s3, 24(a0) lw a2, 0(s7) addi a0, a1, 1 - sw a0, 0(s10) + sw a0, 0(s9) slli a1, a1, 2 ld a0, 48(sp) # 8-byte Folded Reload ld a0, 0(a0) @@ -1706,16 +1706,16 @@ # in Loop: Header=BB4_17 Depth=1 addi a0, a0, 1 vsetivli zero, 4, e32, m1, ta, ma - ld a5, 40(sp) # 8-byte Folded Reload addi a1, sp, 96 vl1r.v v8, (a1) # Unknown-size Folded Reload + ld a5, 40(sp) # 8-byte Folded Reload .LBB4_23: # %while.body.i76 # Parent Loop BB4_17 Depth=1 # => This Inner Loop Header: Depth=2 - ld a1, 0(s9) + ld a1, 0(s10) sd a1, 0(s8) ld a2, 24(a1) - sd a2, 0(s9) + sd a2, 0(s10) addi a2, a1, 4 sw zero, 20(a1) vse32.v v8, (a2) @@ -1727,7 +1727,7 @@ bltu s1, a0, .LBB4_23 # %bb.24: # in Loop: Header=BB4_17 Depth=1 li a0, 0 - lw a1, 0(s10) + lw a1, 0(s9) beqz a1, .LBB4_26 .LBB4_25: # %if.then.i72 # in Loop: Header=BB4_17 Depth=1 @@ -1736,7 +1736,7 @@ ld a2, 56(sp) # 8-byte Folded Reload add a0, a2, a0 lw a0, 0(a0) - sw a1, 0(s10) + sw a1, 0(s9) sw a0, 0(s7) .LBB4_26: # %cont_BackTrack.exit82 # in Loop: Header=BB4_17 Depth=1 @@ -1764,7 +1764,7 @@ j .LBB4_32 .LBB4_30: # in Loop: Header=BB4_17 Depth=1 ld a5, 40(sp) # 8-byte Folded Reload - lw a1, 0(s10) + lw a1, 0(s9) bnez a1, .LBB4_25 j .LBB4_26 .LBB4_31: # %fol_Atom.exit.thread @@ -1791,7 +1791,7 @@ .LBB4_34: # %if.then59 # in Loop: Header=BB4_17 Depth=1 addi a3, a1, 1 - sw a3, 0(s10) + sw a3, 0(s9) slli a1, a1, 2 ld a3, 56(sp) # 8-byte Folded Reload add a1, a3, a1 @@ -1878,10 +1878,10 @@ .LBB4_48: # %while.body.i140 # Parent Loop BB4_17 Depth=1 # => This Inner Loop Header: Depth=2 - ld a1, 0(s9) + ld a1, 0(s10) sd a1, 0(s8) ld a2, 24(a1) - sd a2, 0(s9) + sd a2, 0(s10) addi a2, a1, 4 sw zero, 20(a1) vse32.v v8, (a2) @@ -1893,7 +1893,7 @@ bltu s1, a0, .LBB4_48 .LBB4_49: # %while.end.i134 # in Loop: Header=BB4_17 Depth=1 - lw a0, 0(s10) + lw a0, 0(s9) ld a5, 40(sp) # 8-byte Folded Reload beqz a0, .LBB4_16 # %bb.50: # %if.then.i136 @@ -1903,7 +1903,7 @@ ld a2, 56(sp) # 8-byte Folded Reload add a1, a2, a1 lw a1, 0(a1) - sw a0, 0(s10) + sw a0, 0(s9) sw a1, 0(s7) j .LBB4_16 .LBB4_51: # %while.end90 @@ -1941,10 +1941,10 @@ vsetivli zero, 4, e32, m1, ta, ma .LBB4_55: # %while.body.i # =>This Inner Loop Header: Depth=1 - ld a2, 0(s9) + ld a2, 0(s10) sd a2, 0(s8) ld a3, 24(a2) - sd a3, 0(s9) + sd a3, 0(s10) addi a3, a2, 4 sw zero, 20(a2) vse32.v v8, (a3) @@ -1955,7 +1955,7 @@ sw a2, 0(s7) bltu a1, a0, .LBB4_55 .LBB4_56: # %while.end.i - lw a0, 0(s10) + lw a0, 0(s9) li s2, 1 beqz a0, .LBB4_52 # %bb.57: # %if.then.i @@ -1964,7 +1964,7 @@ ld a2, 56(sp) # 8-byte Folded Reload add a1, a2, a1 lw a1, 0(a1) - sw a0, 0(s10) + sw a0, 0(s9) sw a1, 0(s7) j .LBB4_52 .LBB4_58: # %if.then80 @@ -2278,10 +2278,10 @@ vsetivli zero, 4, e32, m1, ta, ma vmv.v.i v8, 0 li s1, 1 - sd a2, 16(sp) # 8-byte Folded Spill - sd a5, 88(sp) # 8-byte Folded Spill addi a0, sp, 128 vs1r.v v8, (a0) # Unknown-size Folded Spill + sd a2, 16(sp) # 8-byte Folded Spill + sd a5, 88(sp) # 8-byte Folded Spill sd s3, 80(sp) # 8-byte Folded Spill .LBB6_7: # %do.body # =>This Loop Header: Depth=1 @@ -2346,12 +2346,12 @@ li s7, 1 beqz a0, .LBB6_13 # %bb.12: # in Loop: Header=BB6_10 Depth=2 + addi a0, sp, 128 + vl1r.v v8, (a0) # Unknown-size Folded Reload mv s10, s5 mv s5, s3 ld s3, 80(sp) # 8-byte Folded Reload ld a5, 88(sp) # 8-byte Folded Reload - addi a0, sp, 128 - vl1r.v v8, (a0) # Unknown-size Folded Reload lw a0, 0(s11) bgtz a0, .LBB6_21 j .LBB6_23 @@ -2359,9 +2359,9 @@ # in Loop: Header=BB6_10 Depth=2 lw a1, 0(s8) lw a0, 0(s6) - ld a5, 88(sp) # 8-byte Folded Reload addi a2, sp, 128 vl1r.v v8, (a2) # Unknown-size Folded Reload + ld a5, 88(sp) # 8-byte Folded Reload bne a1, a0, .LBB6_20 # %bb.14: # %land.lhs.true # in Loop: Header=BB6_10 Depth=2 @@ -2545,9 +2545,9 @@ li s7, 0 addiw s0, s0, 1 .LBB6_40: # in Loop: Header=BB6_10 Depth=2 - ld a5, 88(sp) # 8-byte Folded Reload addi a0, sp, 128 vl1r.v v8, (a0) # Unknown-size Folded Reload + ld a5, 88(sp) # 8-byte Folded Reload ld s8, 40(sp) # 8-byte Folded Reload lw a0, 0(s11) bgtz a0, .LBB6_21 @@ -2787,10 +2787,10 @@ vsetivli zero, 4, e32, m1, ta, ma vmv.v.i v8, 0 li s1, 1 - sd a5, 64(sp) # 8-byte Folded Spill - sd a6, 48(sp) # 8-byte Folded Spill addi a0, sp, 144 vs1r.v v8, (a0) # Unknown-size Folded Spill + sd a5, 64(sp) # 8-byte Folded Spill + sd a6, 48(sp) # 8-byte Folded Spill j .LBB7_21 .LBB7_20: # %if.end96 # in Loop: Header=BB7_21 Depth=1 @@ -2855,10 +2855,10 @@ # in Loop: Header=BB7_21 Depth=1 addi a0, a0, 1 vsetivli zero, 4, e32, m1, ta, ma - ld a5, 64(sp) # 8-byte Folded Reload - ld a6, 48(sp) # 8-byte Folded Reload addi a1, sp, 144 vl1r.v v8, (a1) # Unknown-size Folded Reload + ld a5, 64(sp) # 8-byte Folded Reload + ld a6, 48(sp) # 8-byte Folded Reload .LBB7_27: # %while.body.i85 # Parent Loop BB7_21 Depth=1 # => This Inner Loop Header: Depth=2 @@ -4111,10 +4111,10 @@ vsetivli zero, 4, e32, m1, ta, ma vmv.v.i v8, 0 li s0, 1 - sd a5, 64(sp) # 8-byte Folded Spill - sd a6, 48(sp) # 8-byte Folded Spill addi a0, sp, 128 vs1r.v v8, (a0) # Unknown-size Folded Spill + sd a5, 64(sp) # 8-byte Folded Spill + sd a6, 48(sp) # 8-byte Folded Spill j .LBB12_19 .LBB12_18: # %if.end92 # in Loop: Header=BB12_19 Depth=1 @@ -4177,10 +4177,10 @@ # in Loop: Header=BB12_19 Depth=1 addi a0, a0, 1 vsetivli zero, 4, e32, m1, ta, ma - ld a5, 64(sp) # 8-byte Folded Reload - ld a6, 48(sp) # 8-byte Folded Reload addi a1, sp, 128 vl1r.v v8, (a1) # Unknown-size Folded Reload + ld a5, 64(sp) # 8-byte Folded Reload + ld a6, 48(sp) # 8-byte Folded Reload .LBB12_25: # %while.body.i79 # Parent Loop BB12_19 Depth=1 # => This Inner Loop Header: Depth=2 @@ -5653,16 +5653,16 @@ # %bb.16: # %for.body.lr.ph.i .Lpcrel_hi160: auipc a0, %got_pcrel_hi(vec_VECTOR) - ld s2, %pcrel_lo(.Lpcrel_hi160)(a0) + ld s9, %pcrel_lo(.Lpcrel_hi160)(a0) .Lpcrel_hi161: auipc a0, %got_pcrel_hi(cont_LEFTCONTEXT) ld s10, %pcrel_lo(.Lpcrel_hi161)(a0) .Lpcrel_hi162: auipc a0, %got_pcrel_hi(memory_ARRAY) - ld s8, %pcrel_lo(.Lpcrel_hi162)(a0) + ld s2, %pcrel_lo(.Lpcrel_hi162)(a0) .Lpcrel_hi163: auipc a0, %got_pcrel_hi(memory_FREEDBYTES) - ld s9, %pcrel_lo(.Lpcrel_hi163)(a0) + ld s8, %pcrel_lo(.Lpcrel_hi163)(a0) li s4, 0 li s3, 0 j .LBB18_19 @@ -5692,7 +5692,7 @@ # Child Loop BB18_25 Depth 2 slli a0, s11, 32 srli a0, a0, 29 - add s6, s2, a0 + add s6, s9, a0 lw a0, 0(s6) ld a1, 56(s1) slli a0, a0, 3 @@ -5736,15 +5736,15 @@ .LBB18_25: # %while.body.i.i16.i # Parent Loop BB18_19 Depth=1 # => This Inner Loop Header: Depth=2 - ld a2, 128(s8) + ld a2, 128(s2) lw a3, 32(a2) - ld a4, 0(s9) + ld a4, 0(s8) ld a5, 0(a1) add a3, a4, a3 - sd a3, 0(s9) + sd a3, 0(s8) ld a2, 0(a2) sd a2, 0(a1) - ld a2, 128(s8) + ld a2, 128(s2) sd a1, 0(a2) mv a1, a5 bnez a5, .LBB18_25 @@ -5759,25 +5759,25 @@ li a0, 0 li a1, 0 call litptr_Create@plt - mv s2, a0 + mv s6, a0 j .LBB18_33 .LBB18_29: # %for.end.i mv a0, s3 mv a1, s4 call litptr_Create@plt - mv s2, a0 + mv s6, a0 beqz s4, .LBB18_31 .LBB18_30: # %while.body.i.i # =>This Inner Loop Header: Depth=1 - ld a0, 128(s8) + ld a0, 128(s2) lw a1, 32(a0) - ld a2, 0(s9) + ld a2, 0(s8) ld a3, 0(s4) add a1, a2, a1 - sd a1, 0(s9) + sd a1, 0(s8) ld a0, 0(a0) sd a0, 0(s4) - ld a0, 128(s8) + ld a0, 128(s2) sd s4, 0(a0) mv s4, a3 bnez a3, .LBB18_30 @@ -5785,15 +5785,15 @@ beqz s3, .LBB18_33 .LBB18_32: # %while.body.i26.i # =>This Inner Loop Header: Depth=1 - ld a0, 128(s8) + ld a0, 128(s2) lw a1, 32(a0) - ld a2, 0(s9) + ld a2, 0(s8) ld a3, 0(s3) add a1, a2, a1 - sd a1, 0(s9) + sd a1, 0(s8) ld a0, 0(a0) sd a0, 0(s3) - ld a0, 128(s8) + ld a0, 128(s2) sd s3, 0(a0) mv s3, a3 bnez a3, .LBB18_32 @@ -5824,16 +5824,16 @@ addi a0, sp, 48 vs1r.v v8, (a0) # Unknown-size Folded Spill li s11, 1 - sd s2, 16(sp) # 8-byte Folded Spill + sd s6, 16(sp) # 8-byte Folded Spill j .LBB18_36 .LBB18_34: # %if.else # in Loop: Header=BB18_36 Depth=1 ld a0, 32(sp) # 8-byte Folded Reload sw s3, 0(a0) - ld s2, 16(sp) # 8-byte Folded Reload + ld s6, 16(sp) # 8-byte Folded Reload .LBB18_35: # %do.cond # in Loop: Header=BB18_36 Depth=1 - mv a0, s2 + mv a0, s6 call litptr_AllUsed@plt bnez a0, .LBB18_66 .LBB18_36: # %do.body @@ -5842,7 +5842,7 @@ # Child Loop BB18_42 Depth 3 # Child Loop BB18_45 Depth 4 # Child Loop BB18_53 Depth 3 - mv a0, s2 + mv a0, s6 call subs_CompVec ld a0, 32(sp) # 8-byte Folded Reload lw a0, 0(a0) @@ -6064,9 +6064,9 @@ li s0, 0 ld a0, 32(sp) # 8-byte Folded Reload sw s3, 0(a0) - ld s2, 16(sp) # 8-byte Folded Reload + ld s6, 16(sp) # 8-byte Folded Reload .LBB18_63: # %cleanup.sink.split - mv a0, s2 + mv a0, s6 call litptr_Delete@plt j .LBB18_65 .LBB18_64: --- build.head//MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/rules-ur.s 2023-11-13 08:03:22.375558170 +0000 +++ build//MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/rules-ur.s 2023-11-13 08:03:17.419701426 +0000 @@ -208,14 +208,14 @@ addi a1, sp, 144 addi a3, sp, 136 call subst_ExtractUnifier@plt - ld a1, 0(s7) - addi a0, sp, 160 - vl1r.v v8, (a0) # Unknown-size Folded Reload - beqz a1, .LBB0_17 + ld a0, 0(s7) + addi a1, sp, 160 + vl1r.v v8, (a1) # Unknown-size Folded Reload + beqz a0, .LBB0_17 # %bb.15: # %while.body.preheader.i # in Loop: Header=BB0_8 Depth=2 - lw a0, 0(s10) - addi a0, a0, -1 + lw a1, 0(s10) + addi a1, a1, -1 vsetivli zero, 4, e32, m1, ta, ma .LBB0_16: # %while.body.i # Parent Loop BB0_4 Depth=1 @@ -224,18 +224,18 @@ .Lpcrel_hi7: auipc a2, %got_pcrel_hi(cont_CURRENTBINDING) ld a2, %pcrel_lo(.Lpcrel_hi7)(a2) - sd a1, 0(a2) - ld a3, 24(a1) + sd a0, 0(a2) + ld a3, 24(a0) sd a3, 0(s7) - addi a3, a1, 4 - sw zero, 20(a1) + addi a3, a0, 4 + sw zero, 20(a0) vse32.v v8, (a3) ld a2, 0(a2) - ld a1, 0(s7) + ld a0, 0(s7) sd zero, 24(a2) - sw a0, 0(s10) - addi a0, a0, -1 - bnez a1, .LBB0_16 + sw a1, 0(s10) + addi a1, a1, -1 + bnez a0, .LBB0_16 .LBB0_17: # %cont_Reset.exit # in Loop: Header=BB0_8 Depth=2 .Lpcrel_hi8: @@ -1204,14 +1204,14 @@ addi a1, sp, 176 addi a3, sp, 168 call subst_ExtractUnifier@plt - ld a1, 0(s8) - addi a0, sp, 192 - vl1r.v v8, (a0) # Unknown-size Folded Reload - beqz a1, .LBB3_16 + ld a0, 0(s8) + addi a1, sp, 192 + vl1r.v v8, (a1) # Unknown-size Folded Reload + beqz a0, .LBB3_16 # %bb.14: # %while.body.preheader.i # in Loop: Header=BB3_8 Depth=2 - lw a0, 0(s10) - addi a0, a0, -1 + lw a1, 0(s10) + addi a1, a1, -1 vsetivli zero, 4, e32, m1, ta, ma .LBB3_15: # %while.body.i # Parent Loop BB3_4 Depth=1 @@ -1220,18 +1220,18 @@ .Lpcrel_hi50: auipc a2, %got_pcrel_hi(cont_CURRENTBINDING) ld a2, %pcrel_lo(.Lpcrel_hi50)(a2) - sd a1, 0(a2) - ld a3, 24(a1) + sd a0, 0(a2) + ld a3, 24(a0) sd a3, 0(s8) - addi a3, a1, 4 - sw zero, 20(a1) + addi a3, a0, 4 + sw zero, 20(a0) vse32.v v8, (a3) ld a2, 0(a2) - ld a1, 0(s8) + ld a0, 0(s8) sd zero, 24(a2) - sw a0, 0(s10) - addi a0, a0, -1 - bnez a1, .LBB3_15 + sw a1, 0(s10) + addi a1, a1, -1 + bnez a0, .LBB3_15 .LBB3_16: # %cont_Reset.exit # in Loop: Header=BB3_8 Depth=2 ld a0, 168(sp) --- build.head//MicroBenchmarks/LCALS/SubsetBRawLoops/CMakeFiles/lcalsBRaw.dir/__/LCALSStats.s 2023-11-13 08:03:20.903600719 +0000 +++ build//MicroBenchmarks/LCALS/SubsetBRawLoops/CMakeFiles/lcalsBRaw.dir/__/LCALSStats.s 2023-11-13 08:03:15.939744205 +0000 @@ -1502,7 +1502,7 @@ sd a0, 80(sp) # 8-byte Folded Spill vslidedown.vi v8, v8, 1 vmv.x.s a0, v8 - sd a0, 48(sp) # 8-byte Folded Spill + sd a0, 64(sp) # 8-byte Folded Spill vsetivli zero, 2, e64, m2, ta, ma csrr a0, vlenb slli a0, a0, 2 @@ -1564,9 +1564,9 @@ vmv.x.s s11, v8 vsetivli zero, 1, e64, m1, ta, ma ld a0, 368(sp) - sd a0, 64(sp) # 8-byte Folded Spill - ld a0, 376(sp) sd a0, 56(sp) # 8-byte Folded Spill + ld a0, 376(sp) + sd a0, 48(sp) # 8-byte Folded Spill ld s9, 352(sp) ld s10, 360(sp) vslidedown.vi v8, v8, 1 @@ -1574,7 +1574,7 @@ mv a0, s4 mv a1, s3 ld a2, 72(sp) # 8-byte Folded Reload - ld a3, 48(sp) # 8-byte Folded Reload + ld a3, 64(sp) # 8-byte Folded Reload call __addtf3@plt ld a2, 104(sp) # 8-byte Folded Reload ld a3, 96(sp) # 8-byte Folded Reload @@ -1594,8 +1594,8 @@ mv a2, s9 mv a3, s10 call __addtf3@plt - ld a2, 64(sp) # 8-byte Folded Reload - ld a3, 56(sp) # 8-byte Folded Reload + ld a2, 56(sp) # 8-byte Folded Reload + ld a3, 48(sp) # 8-byte Folded Reload call __addtf3@plt mv s4, a0 mv s3, a1 --- build.head//SingleSource/Benchmarks/Shootout-C++/CMakeFiles/Shootout-C++-matrix.dir/matrix.s 2023-11-13 08:03:22.895543139 +0000 +++ build//SingleSource/Benchmarks/Shootout-C++/CMakeFiles/Shootout-C++-matrix.dir/matrix.s 2023-11-13 08:03:17.963685700 +0000 @@ -744,20 +744,20 @@ ld a0, 224(sp) # 8-byte Folded Reload add a5, a0, a5 ld a5, 0(a5) - ld t0, 0(a6) + ld a6, 0(a6) ld a0, 232(sp) # 8-byte Folded Reload li a4, 7 bltu a4, a0, .LBB4_14 # %bb.13: # %vector.memcheck # in Loop: Header=BB4_12 Depth=2 - addi a6, a5, 120 - addi t1, t0, 120 + addi t0, a5, 120 + addi t1, a6, 120 sltu t1, a5, t1 - sltu t2, t0, a6 + sltu t2, a6, t0 and a4, t1, t2 ld a0, 208(sp) # 8-byte Folded Reload sltu t2, a5, a0 - sltu t1, t3, a6 + sltu t1, t3, t0 and a7, t2, t1 vsetivli zero, 16, e64, m8, ta, ma csrr a0, vlenb @@ -767,38 +767,38 @@ addi a0, a0, 1056 vl8r.v v8, (a0) # Unknown-size Folded Reload vmsgtu.vx v0, v8, a5 - vmsltu.vx v1, v24, a6 + vmsltu.vx v1, v24, t0 vmand.mm v0, v0, v1 vsetivli zero, 8, e64, m4, ta, ma vmsgtu.vx v1, v20, a5 - vmsltu.vx v2, v16, a6 + vmsltu.vx v2, v16, t0 vmand.mm v1, v1, v2 ld a0, 200(sp) # 8-byte Folded Reload sltu t2, a5, a0 - sltu t1, s3, a6 + sltu t1, s3, t0 and a0, t2, t1 sd a0, 656(sp) # 8-byte Folded Spill ld a0, 192(sp) # 8-byte Folded Reload sltu t2, a5, a0 - sltu t1, a1, a6 + sltu t1, a1, t0 and a0, t2, t1 sd a0, 496(sp) # 8-byte Folded Spill ld a0, 184(sp) # 8-byte Folded Reload sltu t2, a5, a0 - sltu t1, a2, a6 + sltu t1, a2, t0 and a0, t2, t1 sd a0, 488(sp) # 8-byte Folded Spill ld a0, 176(sp) # 8-byte Folded Reload sltu t2, a5, a0 - sltu t1, a3, a6 + sltu t1, a3, t0 and a0, t2, t1 sd a0, 480(sp) # 8-byte Folded Spill ld a0, 168(sp) # 8-byte Folded Reload sltu t2, a5, a0 ld a0, 648(sp) # 8-byte Folded Reload - sltu a6, a0, a6 - and a6, t2, a6 - sd a6, 472(sp) # 8-byte Folded Spill + sltu t0, a0, t0 + and t0, t2, t0 + sd t0, 472(sp) # 8-byte Folded Spill vsetivli zero, 1, e16, mf4, ta, ma vmv.x.s t2, v0 slli t2, t2, 48 @@ -807,86 +807,86 @@ vmv.x.s t1, v1 andi t1, t1, 255 or t1, t2, t1 - snez a6, t1 - sd a6, 464(sp) # 8-byte Folded Spill - ld a6, 656(sp) # 8-byte Folded Reload - or t2, a4, a6 + snez t0, t1 + sd t0, 464(sp) # 8-byte Folded Spill + ld t0, 656(sp) # 8-byte Folded Reload + or t2, a4, t0 ld a4, 496(sp) # 8-byte Folded Reload - ld a6, 488(sp) # 8-byte Folded Reload - or t1, a4, a6 + ld t0, 488(sp) # 8-byte Folded Reload + or t1, a4, t0 ld a4, 480(sp) # 8-byte Folded Reload - ld a6, 472(sp) # 8-byte Folded Reload - or a6, a4, a6 + ld t0, 472(sp) # 8-byte Folded Reload + or t0, a4, t0 or t2, a7, t2 - or a6, t1, a6 - or a6, t2, a6 + or t0, t1, t0 + or t0, t2, t0 ld a4, 464(sp) # 8-byte Folded Reload - or a6, a4, a6 - beqz a6, .LBB4_15 + or t0, a4, t0 + beqz t0, .LBB4_15 .LBB4_14: # in Loop: Header=BB4_12 Depth=2 li a0, 0 j .LBB4_18 .LBB4_15: # %vector.ph # in Loop: Header=BB4_12 Depth=2 - lw a4, 0(t0) + lw a4, 0(a6) sd a4, 496(sp) # 8-byte Folded Spill - lw a4, 4(t0) + lw a4, 4(a6) sd a4, 488(sp) # 8-byte Folded Spill - lw a4, 8(t0) + lw a4, 8(a6) sd a4, 480(sp) # 8-byte Folded Spill - lw a4, 12(t0) + lw a4, 12(a6) sd a4, 472(sp) # 8-byte Folded Spill - lw a4, 16(t0) + lw a4, 16(a6) sd a4, 464(sp) # 8-byte Folded Spill - lw a4, 20(t0) + lw a4, 20(a6) sd a4, 456(sp) # 8-byte Folded Spill - lw a4, 24(t0) + lw a4, 24(a6) sd a4, 448(sp) # 8-byte Folded Spill - lw a4, 28(t0) + lw a4, 28(a6) sd a4, 440(sp) # 8-byte Folded Spill - lw a4, 32(t0) + lw a4, 32(a6) sd a4, 432(sp) # 8-byte Folded Spill - lw a4, 36(t0) + lw a4, 36(a6) sd a4, 424(sp) # 8-byte Folded Spill - lw a4, 40(t0) + lw a4, 40(a6) sd a4, 416(sp) # 8-byte Folded Spill - lw a4, 44(t0) + lw a4, 44(a6) sd a4, 408(sp) # 8-byte Folded Spill - lw a4, 48(t0) + lw a4, 48(a6) sd a4, 400(sp) # 8-byte Folded Spill - lw a4, 52(t0) + lw a4, 52(a6) sd a4, 392(sp) # 8-byte Folded Spill - lw a4, 56(t0) + lw a4, 56(a6) sd a4, 384(sp) # 8-byte Folded Spill - lw a4, 60(t0) + lw a4, 60(a6) sd a4, 376(sp) # 8-byte Folded Spill - lw a4, 64(t0) + lw a4, 64(a6) sd a4, 368(sp) # 8-byte Folded Spill - lw a4, 68(t0) + lw a4, 68(a6) sd a4, 360(sp) # 8-byte Folded Spill - lw a4, 72(t0) + lw a4, 72(a6) sd a4, 352(sp) # 8-byte Folded Spill - lw a4, 76(t0) + lw a4, 76(a6) sd a4, 344(sp) # 8-byte Folded Spill - lw a4, 80(t0) + lw a4, 80(a6) sd a4, 336(sp) # 8-byte Folded Spill - lw a4, 84(t0) + lw a4, 84(a6) sd a4, 328(sp) # 8-byte Folded Spill - lw a4, 88(t0) + lw a4, 88(a6) sd a4, 320(sp) # 8-byte Folded Spill - lw a4, 92(t0) + lw a4, 92(a6) sd a4, 312(sp) # 8-byte Folded Spill - lw a4, 96(t0) + lw a4, 96(a6) sd a4, 304(sp) # 8-byte Folded Spill - lw a4, 100(t0) + lw a4, 100(a6) sd a4, 296(sp) # 8-byte Folded Spill - lw a4, 104(t0) + lw a4, 104(a6) sd a4, 288(sp) # 8-byte Folded Spill - lw a4, 108(t0) + lw a4, 108(a6) sd a4, 280(sp) # 8-byte Folded Spill - lw a4, 112(t0) + lw a4, 112(a6) sd a4, 272(sp) # 8-byte Folded Spill - lw a4, 116(t0) + lw a4, 116(a6) sd a4, 264(sp) # 8-byte Folded Spill ld a0, 232(sp) # 8-byte Folded Reload li a4, 28 @@ -903,22 +903,22 @@ # Parent Loop BB4_11 Depth=1 # Parent Loop BB4_12 Depth=2 # => This Inner Loop Header: Depth=3 - add t2, t4, a6 + add t2, t4, t0 vl2re32.v v0, (t2) - add t2, t3, a6 + add t2, t3, t0 vl2re32.v v2, (t2) vsetvli t2, zero, e32, m2, ta, ma ld t2, 488(sp) # 8-byte Folded Reload vmul.vx v0, v0, t2 ld t2, 496(sp) # 8-byte Folded Reload vmacc.vx v0, t2, v2 - add t2, t5, a6 + add t2, t5, t0 vl2re32.v v2, (t2) - add t2, t6, a6 + add t2, t6, t0 vl2re32.v v4, (t2) - add t2, s2, a6 + add t2, s2, t0 vl2re32.v v6, (t2) - add t2, s4, a6 + add t2, s4, t0 vl2re32.v v8, (t2) ld t2, 480(sp) # 8-byte Folded Reload vmadd.vx v2, t2, v0 @@ -928,13 +928,13 @@ vmadd.vx v6, t2, v4 ld t2, 456(sp) # 8-byte Folded Reload vmadd.vx v8, t2, v6 - add t2, s5, a6 + add t2, s5, t0 vl2re32.v v10, (t2) - add t2, s6, a6 + add t2, s6, t0 vl2re32.v v12, (t2) - add t2, s7, a6 + add t2, s7, t0 vl2re32.v v14, (t2) - add t2, s8, a6 + add t2, s8, t0 vl2re32.v v0, (t2) ld t2, 448(sp) # 8-byte Folded Reload vmadd.vx v10, t2, v8 @@ -944,13 +944,13 @@ vmadd.vx v14, t2, v12 ld t2, 424(sp) # 8-byte Folded Reload vmadd.vx v0, t2, v14 - add t2, s9, a6 + add t2, s9, t0 vl2re32.v v8, (t2) - add t2, s10, a6 + add t2, s10, t0 vl2re32.v v10, (t2) - add t2, s11, a6 + add t2, s11, t0 vl2re32.v v12, (t2) - add t2, ra, a6 + add t2, ra, t0 vl2re32.v v14, (t2) ld t2, 416(sp) # 8-byte Folded Reload vmadd.vx v8, t2, v0 @@ -961,16 +961,16 @@ ld t2, 392(sp) # 8-byte Folded Reload vmadd.vx v14, t2, v12 ld t2, 640(sp) # 8-byte Folded Reload - add t2, t2, a6 + add t2, t2, t0 vl2re32.v v8, (t2) ld t2, 632(sp) # 8-byte Folded Reload - add t2, t2, a6 + add t2, t2, t0 vl2re32.v v10, (t2) ld t2, 624(sp) # 8-byte Folded Reload - add t2, t2, a6 + add t2, t2, t0 vl2re32.v v12, (t2) ld t2, 616(sp) # 8-byte Folded Reload - add t2, t2, a6 + add t2, t2, t0 vl2re32.v v0, (t2) ld t2, 384(sp) # 8-byte Folded Reload vmadd.vx v8, t2, v14 @@ -981,15 +981,15 @@ ld t2, 360(sp) # 8-byte Folded Reload vmadd.vx v0, t2, v12 ld t2, 608(sp) # 8-byte Folded Reload - add t2, t2, a6 + add t2, t2, t0 vl2re32.v v8, (t2) ld t2, 600(sp) # 8-byte Folded Reload - add t2, t2, a6 + add t2, t2, t0 vl2re32.v v10, (t2) ld t2, 592(sp) # 8-byte Folded Reload - add t2, t2, a6 + add t2, t2, t0 vl2re32.v v12, (t2) - add t2, a5, a6 + add t2, a5, t0 vl2re32.v v14, (t2) ld t2, 352(sp) # 8-byte Folded Reload vmadd.vx v8, t2, v0 @@ -999,13 +999,13 @@ vmadd.vx v12, t2, v10 ld t2, 328(sp) # 8-byte Folded Reload vmadd.vx v14, t2, v12 - add t2, a7, a6 + add t2, a7, t0 vl2re32.v v8, (t2) - add t2, a0, a6 + add t2, a0, t0 vl2re32.v v10, (t2) - add t2, a4, a6 + add t2, a4, t0 vl2re32.v v12, (t2) - add t2, s3, a6 + add t2, s3, t0 vl2re32.v v0, (t2) ld t2, 320(sp) # 8-byte Folded Reload vmadd.vx v8, t2, v14 @@ -1015,14 +1015,14 @@ vmadd.vx v12, t2, v10 ld t2, 296(sp) # 8-byte Folded Reload vmadd.vx v0, t2, v12 - add t2, a1, a6 + add t2, a1, t0 vl2re32.v v8, (t2) - add t2, a2, a6 + add t2, a2, t0 vl2re32.v v10, (t2) - add t2, a3, a6 + add t2, a3, t0 vl2re32.v v12, (t2) ld t2, 648(sp) # 8-byte Folded Reload - add t2, t2, a6 + add t2, t2, t0 vl2re32.v v14, (t2) ld t2, 288(sp) # 8-byte Folded Reload vmadd.vx v8, t2, v0 @@ -1033,12 +1033,12 @@ ld t2, 264(sp) # 8-byte Folded Reload vmadd.vx v14, t2, v12 ld t2, 656(sp) # 8-byte Folded Reload - add t2, t2, a6 + add t2, t2, t0 vs2r.v v14, (t2) ld t2, 248(sp) # 8-byte Folded Reload sub t1, t1, t2 ld t2, 256(sp) # 8-byte Folded Reload - add a6, a6, t2 + add t0, t0, t2 bnez t1, .LBB4_16 # %bb.17: # in Loop: Header=BB4_12 Depth=2 ld a5, 656(sp) # 8-byte Folded Reload @@ -1055,8 +1055,8 @@ lw t1, 0(t1) add t2, t4, a0 lw t2, 0(t2) - add a6, t5, a0 - lw a6, 0(a6) + add t0, t5, a0 + lw t0, 0(t0) add t3, t6, a0 lw t3, 0(t3) add t4, s2, a0 @@ -1091,7 +1091,7 @@ lw ra, 0(ra) lw s5, 0(s5) lw s2, 0(s2) - vle32.v v0, (t0) + vle32.v v0, (a6) sw ra, 764(sp) sw s5, 760(sp) sw s2, 756(sp) @@ -1105,71 +1105,71 @@ sw t5, 724(sp) sw t4, 720(sp) sw t3, 716(sp) - sw a6, 712(sp) + sw t0, 712(sp) sw t2, 708(sp) sw t1, 704(sp) - lw t4, 64(t0) - ld a6, 624(sp) # 8-byte Folded Reload - add a6, a6, a0 - lw a6, 0(a6) - lw t1, 68(t0) + lw t4, 64(a6) + ld t0, 624(sp) # 8-byte Folded Reload + add t0, t0, a0 + lw t0, 0(t0) + lw t1, 68(a6) ld t2, 616(sp) # 8-byte Folded Reload add t2, t2, a0 lw t3, 0(t2) - mul a4, a6, t4 + mul a4, t0, t4 sd a4, 656(sp) # 8-byte Folded Spill mul t1, t3, t1 - lw s2, 72(t0) - ld a6, 608(sp) # 8-byte Folded Reload - add a6, a6, a0 - lw a6, 0(a6) - lw t3, 76(t0) + lw s2, 72(a6) + ld t0, 608(sp) # 8-byte Folded Reload + add t0, t0, a0 + lw t0, 0(t0) + lw t3, 76(a6) ld t4, 600(sp) # 8-byte Folded Reload add t4, t4, a0 lw t4, 0(t4) - lw t5, 80(t0) + lw t5, 80(a6) ld t6, 592(sp) # 8-byte Folded Reload add t6, t6, a0 lw t6, 0(t6) - lw s5, 84(t0) + lw s5, 84(a6) ld s6, 584(sp) # 8-byte Folded Reload add s6, s6, a0 lw s6, 0(s6) mv t2, a5 mv a5, s4 - mul s4, a6, s2 - mul a6, t4, t3 + mul s4, t0, s2 + mul t0, t4, t3 mul t3, t6, t5 mul t4, s6, s5 - lw t5, 88(t0) + lw t5, 88(a6) ld t6, 576(sp) # 8-byte Folded Reload add t6, t6, a0 lw t6, 0(t6) - lw s5, 92(t0) + lw s5, 92(a6) ld s6, 568(sp) # 8-byte Folded Reload add s6, s6, a0 lw s6, 0(s6) - lw s7, 96(t0) + lw s7, 96(a6) ld s8, 560(sp) # 8-byte Folded Reload add s8, s8, a0 lw s8, 0(s8) - lw s9, 100(t0) + lw s9, 100(a6) add s10, s3, a0 lw s10, 0(s10) mul t5, t6, t5 mul t6, s6, s5 mul s5, s8, s7 mul s6, s10, s9 - lw s7, 104(t0) + lw s7, 104(a6) add s8, a1, a0 lw s8, 0(s8) - lw s9, 108(t0) + lw s9, 108(a6) add s10, a2, a0 lw s10, 0(s10) - lw s11, 112(t0) + lw s11, 112(a6) add ra, a3, a0 lw ra, 0(ra) - lw s2, 116(t0) + lw s2, 116(a6) mv a4, a3 mv a3, a2 mv a2, a1 @@ -1194,7 +1194,7 @@ add t1, t1, s4 mv s4, a5 mv a5, t2 - add a6, a6, t3 + add t0, t0, t3 ld t3, 536(sp) # 8-byte Folded Reload add t4, t4, t5 ld t5, 528(sp) # 8-byte Folded Reload @@ -1205,7 +1205,7 @@ add s8, s8, s9 ld s9, 672(sp) # 8-byte Folded Reload vle32.v v12, (a7) - add a6, a6, t4 + add t0, t0, t4 ld t4, 552(sp) # 8-byte Folded Reload li a4, 120 add t6, t6, s6 @@ -1214,16 +1214,16 @@ ld s8, 688(sp) # 8-byte Folded Reload vmul.vv v12, v12, v0 vredsum.vs v8, v12, v8 - add a6, t1, a6 + add t0, t1, t0 vmv.x.s t1, v8 - add a6, t1, a6 + add t0, t1, t0 add t6, t6, s2 ld s2, 520(sp) # 8-byte Folded Reload - add a6, a6, t6 + add t0, t0, t6 ld t6, 544(sp) # 8-byte Folded Reload add t1, t2, a0 addi a0, a0, 4 - sw a6, 0(t1) + sw t0, 0(t1) bne a0, a4, .LBB4_19 # %bb.20: # %for.cond1.for.inc20_crit_edge.split.us.us.i # in Loop: Header=BB4_12 Depth=2 --- build.head//MicroBenchmarks/LCALS/SubsetARawLoops/CMakeFiles/lcalsARaw.dir/RawSubsetAbenchmarks.s 2023-11-13 08:03:22.111565801 +0000 +++ build//MicroBenchmarks/LCALS/SubsetARawLoops/CMakeFiles/lcalsARaw.dir/RawSubsetAbenchmarks.s 2023-11-13 08:03:17.171708594 +0000 @@ -592,17 +592,15 @@ .LBB1_22: # %call.sqrt # in Loop: Header=BB1_16 Depth=2 fmv.d fa0, fa5 + addi a0, sp, 224 + vs2r.v v18, (a0) # Unknown-size Folded Spill sd t3, 64(sp) # 8-byte Folded Spill mv s11, t4 sd t5, 56(sp) # 8-byte Folded Spill sd t6, 32(sp) # 8-byte Folded Spill sd ra, 48(sp) # 8-byte Folded Spill sd t2, 40(sp) # 8-byte Folded Spill - addi a0, sp, 224 - vs2r.v v18, (a0) # Unknown-size Folded Spill call sqrt@plt - addi a0, sp, 224 - vl2r.v v18, (a0) # Unknown-size Folded Reload ld a2, 216(sp) # 8-byte Folded Reload ld t1, 136(sp) # 8-byte Folded Reload ld t2, 40(sp) # 8-byte Folded Reload @@ -612,6 +610,8 @@ mv t4, s11 ld s11, 128(sp) # 8-byte Folded Reload ld t3, 64(sp) # 8-byte Folded Reload + addi a0, sp, 224 + vl2r.v v18, (a0) # Unknown-size Folded Reload j .LBB1_19 .LBB1_23: # %for.cond100.preheader # in Loop: Header=BB1_4 Depth=1 @@ -1016,19 +1016,17 @@ .LBB1_67: # %call.sqrt546 # in Loop: Header=BB1_56 Depth=2 fmv.d fa0, fa5 + addi a0, sp, 224 + vs2r.v v18, (a0) # Unknown-size Folded Spill sd t3, 64(sp) # 8-byte Folded Spill sd t4, 24(sp) # 8-byte Folded Spill sd t5, 56(sp) # 8-byte Folded Spill sd t6, 32(sp) # 8-byte Folded Spill sd ra, 48(sp) # 8-byte Folded Spill sd t2, 40(sp) # 8-byte Folded Spill - addi a0, sp, 224 - vs2r.v v18, (a0) # Unknown-size Folded Spill sd a3, 16(sp) # 8-byte Folded Spill call sqrt@plt ld a3, 16(sp) # 8-byte Folded Reload - addi a0, sp, 224 - vl2r.v v18, (a0) # Unknown-size Folded Reload ld a2, 216(sp) # 8-byte Folded Reload ld t1, 136(sp) # 8-byte Folded Reload ld t2, 40(sp) # 8-byte Folded Reload @@ -1037,6 +1035,8 @@ ld t5, 56(sp) # 8-byte Folded Reload ld t4, 24(sp) # 8-byte Folded Reload ld t3, 64(sp) # 8-byte Folded Reload + addi a0, sp, 224 + vl2r.v v18, (a0) # Unknown-size Folded Reload j .LBB1_60 .LBB1_68: # in Loop: Header=BB1_4 Depth=1 ld a2, 216(sp) # 8-byte Folded Reload @@ -1127,17 +1127,15 @@ .LBB1_80: # %call.sqrt547 # in Loop: Header=BB1_73 Depth=2 fmv.d fa0, fa5 + addi a0, sp, 224 + vs2r.v v18, (a0) # Unknown-size Folded Spill sd t3, 64(sp) # 8-byte Folded Spill mv s11, t4 sd t5, 56(sp) # 8-byte Folded Spill mv s10, t6 sd ra, 48(sp) # 8-byte Folded Spill sd t2, 40(sp) # 8-byte Folded Spill - addi a0, sp, 224 - vs2r.v v18, (a0) # Unknown-size Folded Spill call sqrt@plt - addi a0, sp, 224 - vl2r.v v18, (a0) # Unknown-size Folded Reload ld a2, 216(sp) # 8-byte Folded Reload ld t1, 136(sp) # 8-byte Folded Reload ld t2, 40(sp) # 8-byte Folded Reload @@ -1148,6 +1146,8 @@ mv t4, s11 ld s11, 128(sp) # 8-byte Folded Reload ld t3, 64(sp) # 8-byte Folded Reload + addi a0, sp, 224 + vl2r.v v18, (a0) # Unknown-size Folded Reload j .LBB1_76 .LBB1_81: # in Loop: Header=BB1_4 Depth=1 ld s11, 128(sp) # 8-byte Folded Reload @@ -1244,12 +1244,11 @@ li a0, 5 call _Z8loopInitj@plt ld a0, 8(s1) - sd a0, 112(sp) # 8-byte Folded Spill + sd a0, 208(sp) # 8-byte Folded Spill ld a0, 32(s3) - ld a1, 16(s1) - sd a1, 208(sp) # 8-byte Folded Spill + ld s9, 16(s1) ld a1, 24(s1) - sd a1, 104(sp) # 8-byte Folded Spill + sd a1, 112(sp) # 8-byte Folded Spill ld a1, 32(s1) sd a1, 200(sp) # 8-byte Folded Spill lw a1, 0(a0) @@ -1269,7 +1268,6 @@ snez a0, s2 seqz a1, s5 or a0, a0, a1 - ld a1, 112(sp) # 8-byte Folded Reload bnez a0, .LBB2_3 # %bb.2: # %for.body.lr.ph lw s10, 280(sp) @@ -1311,188 +1309,189 @@ addi sp, sp, 448 ret .LBB2_7: # %for.body.preheader - addi a2, a1, 8 - sd a2, 176(sp) # 8-byte Folded Spill - slli s1, s1, 3 + ld t1, 208(sp) # 8-byte Folded Reload + addi a1, t1, 8 + sd a1, 176(sp) # 8-byte Folded Spill + slli s6, s1, 3 slli a2, s0, 3 slli s4, s10, 3 ld a6, 200(sp) # 8-byte Folded Reload add a6, a6, s4 - subw a4, a0, s10 - slli a4, a4, 32 - srli t0, a4, 32 - srli a4, a4, 29 - add a7, a6, a4 + subw a1, a0, s10 + slli a1, a1, 32 + srli a4, a1, 32 + srli a1, a1, 29 + add a7, a6, a1 addi a7, a7, 8 - add t3, a2, s4 - add t6, t3, s1 - add a3, a1, t6 + add t0, a2, s4 + add t4, t0, s6 + add a3, t1, t4 sd a3, 32(sp) # 8-byte Folded Spill - add a5, t6, a4 - addi t5, a5, 16 - add s11, a1, t5 - add a3, a1, t3 + add a5, t4, a1 + addi t3, a5, 16 + add s8, t1, t3 + add a3, t1, t0 sd a3, 24(sp) # 8-byte Folded Spill - add a5, t3, a4 - addi s8, a5, 16 - add t1, a1, s8 - add a5, s4, a4 - addi s9, a5, 16 - add s2, a1, s9 - add a3, s1, s4 - add t4, a1, a3 - add a4, a3, a4 - addi a4, a4, 16 - add s3, a1, a4 - ld s6, 208(sp) # 8-byte Folded Reload - add t2, s6, t6 - add s0, s6, t5 - add ra, s6, t3 - add a5, s6, s8 - add s7, s6, s9 - sd s7, 16(sp) # 8-byte Folded Spill - add s7, s6, a3 - sd s7, 64(sp) # 8-byte Folded Spill - add s7, s6, a4 - sd s7, 40(sp) # 8-byte Folded Spill - ld s7, 104(sp) # 8-byte Folded Reload - add t6, s7, t6 - sd t6, 120(sp) # 8-byte Folded Spill - add t5, s7, t5 - sd t5, 56(sp) # 8-byte Folded Spill - add t3, s7, t3 - sd t3, 160(sp) # 8-byte Folded Spill - add s8, s7, s8 - sd s8, 72(sp) # 8-byte Folded Spill - add s9, s7, s9 - sd s9, 152(sp) # 8-byte Folded Spill - add a3, s7, a3 + add a5, t0, a1 + addi s2, a5, 16 + add t5, t1, s2 + add a5, s4, a1 + addi s3, a5, 16 + add t6, t1, s3 + add a3, s6, s4 + add s7, t1, a3 + add a1, a3, a1 + addi a1, a1, 16 + add s0, t1, a1 + add ra, s9, t4 + add a5, s9, t3 + add t2, s9, t0 + sd t2, 16(sp) # 8-byte Folded Spill + add t2, s9, s2 + add s11, s9, s3 + add s1, s9, a3 + sd s1, 64(sp) # 8-byte Folded Spill + add s1, s9, a1 + sd s1, 40(sp) # 8-byte Folded Spill + ld s1, 112(sp) # 8-byte Folded Reload + add t4, s1, t4 + sd t4, 120(sp) # 8-byte Folded Spill + add t3, s1, t3 + sd t3, 56(sp) # 8-byte Folded Spill + add t0, s1, t0 + sd t0, 160(sp) # 8-byte Folded Spill + add s2, s1, s2 + sd s2, 72(sp) # 8-byte Folded Spill + add s3, s1, s3 + sd s3, 152(sp) # 8-byte Folded Spill + add a3, s1, a3 sd a3, 136(sp) # 8-byte Folded Spill - add a4, s7, a4 - sd a4, 144(sp) # 8-byte Folded Spill - addi t0, t0, 1 - sd t0, 184(sp) # 8-byte Folded Spill - add a3, a1, s1 - sd a3, 96(sp) # 8-byte Folded Spill - addi t3, s6, 8 - add a3, s6, s1 + add a1, s1, a1 + sd a1, 144(sp) # 8-byte Folded Spill + addi a4, a4, 1 + sd a4, 184(sp) # 8-byte Folded Spill + add a1, t1, s6 + sd a1, 96(sp) # 8-byte Folded Spill + addi a1, s9, 8 + add a3, s9, s6 sd a3, 88(sp) # 8-byte Folded Spill - addi a3, s7, 8 - add a4, s7, s1 + addi a3, s1, 8 + add a4, s1, s6 sd a4, 192(sp) # 8-byte Folded Spill sd a3, 168(sp) # 8-byte Folded Spill - add a3, a3, s1 + add a3, a3, s6 sd a3, 128(sp) # 8-byte Folded Spill - add s9, a1, s4 - add s8, s6, s4 - csrr a1, vlenb - sd a1, 80(sp) # 8-byte Folded Spill - srli t0, a1, 2 + add s3, t1, s4 + sd s9, 104(sp) # 8-byte Folded Spill + add s2, s9, s4 + csrr a3, vlenb + sd a3, 80(sp) # 8-byte Folded Spill + srli t0, a3, 2 li a3, 4 - add s7, s7, s4 - mv t6, t0 + add s1, s1, s4 + mv t4, t0 bltu a3, t0, .LBB2_9 # %bb.8: # %for.body.preheader - li t6, 4 + li t4, 4 .LBB2_9: # %for.body.preheader - sltu a3, a6, s11 - ld a1, 32(sp) # 8-byte Folded Reload - sltu t5, a1, a7 - and a3, a3, t5 - sltu t1, a6, t1 - ld a1, 24(sp) # 8-byte Folded Reload - sltu t5, a1, a7 - and t1, t1, t5 - or a3, a3, t1 - sltu t1, a6, s2 - sltu t5, s9, a7 - and t1, t1, t5 - sltu t5, a6, s3 - sltu t4, t4, a7 - and t4, t5, t4 - or t1, t1, t4 + sltu a3, a6, s8 + ld a4, 32(sp) # 8-byte Folded Reload + sltu t3, a4, a7 + and a3, a3, t3 + sltu t3, a6, t5 + ld a4, 24(sp) # 8-byte Folded Reload + sltu t5, a4, a7 + and t3, t3, t5 + or a3, a3, t3 + sltu t3, a6, t6 + sltu t5, s3, a7 + and t3, t3, t5 + sltu t5, a6, s0 + sltu t1, s7, a7 + and t1, t5, t1 + or t1, t3, t1 or a3, a3, t1 - sltu t1, a6, s0 - sltu t2, t2, a7 - and t1, t1, t2 sltu a5, a6, a5 - sltu t2, ra, a7 - and a5, a5, t2 - or a5, t1, a5 - ld a1, 16(sp) # 8-byte Folded Reload - sltu t1, a6, a1 - sltu t2, s8, a7 + sltu t1, ra, a7 + and a5, a5, t1 + sltu t1, a6, t2 + ld a4, 16(sp) # 8-byte Folded Reload + sltu t2, a4, a7 + and t1, t1, t2 + or a5, a5, t1 + sltu t1, a6, s11 + sltu t2, s2, a7 and t1, t1, t2 or a5, a5, t1 or a3, a3, a5 - ld a1, 40(sp) # 8-byte Folded Reload - sltu a5, a6, a1 - ld a1, 64(sp) # 8-byte Folded Reload - sltu t1, a1, a7 + ld a4, 40(sp) # 8-byte Folded Reload + sltu a5, a6, a4 + ld a4, 64(sp) # 8-byte Folded Reload + sltu t1, a4, a7 and a5, a5, t1 - ld a1, 56(sp) # 8-byte Folded Reload - sltu t1, a6, a1 - ld a1, 120(sp) # 8-byte Folded Reload - sltu t2, a1, a7 + ld a4, 56(sp) # 8-byte Folded Reload + sltu t1, a6, a4 + ld a4, 120(sp) # 8-byte Folded Reload + sltu t2, a4, a7 and t1, t1, t2 or a5, a5, t1 - ld a1, 72(sp) # 8-byte Folded Reload - sltu t1, a6, a1 - ld a1, 160(sp) # 8-byte Folded Reload - sltu t2, a1, a7 + ld a4, 72(sp) # 8-byte Folded Reload + sltu t1, a6, a4 + ld a4, 160(sp) # 8-byte Folded Reload + sltu t2, a4, a7 and t1, t1, t2 or a5, a5, t1 - ld a1, 152(sp) # 8-byte Folded Reload - sltu t1, a6, a1 - sltu t2, s7, a7 + ld a4, 152(sp) # 8-byte Folded Reload + sltu t1, a6, a4 + sltu t2, s1, a7 and t1, t1, t2 or a5, a5, t1 - ld a4, 176(sp) # 8-byte Folded Reload - add a1, a4, s1 - sd a1, 160(sp) # 8-byte Folded Spill + ld t1, 176(sp) # 8-byte Folded Reload + add a4, t1, s6 + sd a4, 160(sp) # 8-byte Folded Spill or a3, a3, a5 - ld ra, 112(sp) # 8-byte Folded Reload - add a1, ra, a2 - sd a1, 72(sp) # 8-byte Folded Spill - add a1, a4, a2 - sd a1, 152(sp) # 8-byte Folded Spill - ld a1, 144(sp) # 8-byte Folded Reload - sltu a5, a6, a1 - ld s6, 96(sp) # 8-byte Folded Reload - add s6, s6, a2 - add s1, t3, s1 - sd s1, 144(sp) # 8-byte Folded Spill - ld a1, 136(sp) # 8-byte Folded Reload - sltu a6, a1, a7 - ld a1, 208(sp) # 8-byte Folded Reload + ld a4, 208(sp) # 8-byte Folded Reload + add a4, a4, a2 + sd a4, 72(sp) # 8-byte Folded Spill + add a4, t1, a2 + sd a4, 152(sp) # 8-byte Folded Spill + ld a4, 144(sp) # 8-byte Folded Reload + sltu a5, a6, a4 + ld ra, 96(sp) # 8-byte Folded Reload + add ra, ra, a2 + add s6, a1, s6 + sd s6, 144(sp) # 8-byte Folded Spill + ld a4, 136(sp) # 8-byte Folded Reload + sltu a6, a4, a7 + ld s9, 104(sp) # 8-byte Folded Reload + add a4, s9, a2 + sd a4, 64(sp) # 8-byte Folded Spill add a1, a1, a2 - sd a1, 64(sp) # 8-byte Folded Spill - add t3, t3, a2 - sd t3, 136(sp) # 8-byte Folded Spill - and a5, a5, a6 + sd a1, 136(sp) # 8-byte Folded Spill + and a1, a5, a6 ld t5, 88(sp) # 8-byte Folded Reload add t5, t5, a2 - ld a1, 184(sp) # 8-byte Folded Reload - sltu a6, a1, t6 - or a5, a6, a5 - ld a7, 104(sp) # 8-byte Folded Reload + ld a4, 184(sp) # 8-byte Folded Reload + sltu a5, a4, t4 + or a1, a5, a1 + ld a7, 112(sp) # 8-byte Folded Reload add a7, a7, a2 - ld a1, 128(sp) # 8-byte Folded Reload - add a1, a1, a2 - sd a1, 128(sp) # 8-byte Folded Spill - ld a1, 192(sp) # 8-byte Folded Reload - add a1, a1, a2 - sd a1, 56(sp) # 8-byte Folded Spill - or a3, a5, a3 + ld a4, 128(sp) # 8-byte Folded Reload + add a4, a4, a2 + sd a4, 128(sp) # 8-byte Folded Spill + ld a4, 192(sp) # 8-byte Folded Reload + add a2, a4, a2 + sd a2, 56(sp) # 8-byte Folded Spill + or a1, a1, a3 .Lpcrel_hi15: auipc a2, %pcrel_hi(.LCPI2_0) fld fa5, %pcrel_lo(.Lpcrel_hi15)(a2) - ld s0, 80(sp) # 8-byte Folded Reload - slli s0, s0, 1 + ld s11, 80(sp) # 8-byte Folded Reload + slli s11, s11, 1 addi a0, a0, 1 sd a0, 120(sp) # 8-byte Folded Spill - andi a3, a3, 1 - sd a3, 176(sp) # 8-byte Folded Spill + andi a1, a1, 1 + sd a1, 176(sp) # 8-byte Folded Spill j .LBB2_11 .LBB2_10: # %for.cond67.for.cond.cleanup68_crit_edge # in Loop: Header=BB2_11 Depth=1 @@ -1513,80 +1512,80 @@ ld a2, 184(sp) # 8-byte Folded Reload and a2, a2, a0 add a0, a2, s10 - vsetvli a3, zero, e64, m2, ta, ma + vsetvli a1, zero, e64, m2, ta, ma ld s1, 200(sp) # 8-byte Folded Reload mv s8, a7 ld a6, 192(sp) # 8-byte Folded Reload - ld t6, 104(sp) # 8-byte Folded Reload + ld s6, 112(sp) # 8-byte Folded Reload ld t2, 56(sp) # 8-byte Folded Reload - ld s9, 64(sp) # 8-byte Folded Reload + ld a5, 64(sp) # 8-byte Folded Reload ld t1, 88(sp) # 8-byte Folded Reload - ld a4, 208(sp) # 8-byte Folded Reload + mv a4, s9 mv s7, t5 ld t3, 72(sp) # 8-byte Folded Reload - ld s11, 96(sp) # 8-byte Folded Reload - mv a5, ra - mv ra, s6 + ld s9, 96(sp) # 8-byte Folded Reload + ld s0, 208(sp) # 8-byte Folded Reload + mv t4, ra mv a3, a2 .LBB2_13: # %vector.body # Parent Loop BB2_11 Depth=1 # => This Inner Loop Header: Depth=2 - add t4, ra, s4 - addi a1, t4, 8 - vl2re64.v v4, (a1) - add s2, a5, s4 - addi a1, s2, 8 - vl2re64.v v24, (a1) - add a1, s11, s4 - vl2re64.v v10, (a1) - addi a1, a1, 8 - vl2re64.v v16, (a1) + add a1, t4, s4 + addi t6, a1, 8 + vl2re64.v v4, (t6) + add s2, s0, s4 + addi t6, s2, 8 + vl2re64.v v24, (t6) + add t6, s9, s4 + vl2re64.v v10, (t6) + addi t6, t6, 8 + vl2re64.v v16, (t6) vl2re64.v v12, (s2) sd a0, 8(sp) csrr a0, vlenb - li a1, 14 - mul a0, a0, a1 + li t6, 14 + mul a0, a0, t6 add a0, sp, a0 addi a0, a0, 304 vs2r.v v12, (a0) # Unknown-size Folded Spill - add a1, s7, s4 - addi s2, a1, 8 + add t6, s7, s4 + addi s2, t6, 8 vl2re64.v v2, (s2) add s3, a4, s4 addi s2, s3, 8 vl2re64.v v18, (s2) vfsub.vv v14, v4, v10 vfsub.vv v26, v16, v12 - vl2re64.v v10, (t4) + vl2re64.v v10, (a1) csrr a0, vlenb - li t4, 18 - mul a0, a0, t4 + li a1, 18 + mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 304 vs2r.v v10, (a0) # Unknown-size Folded Spill vfsub.vv v12, v2, v18 csrr a0, vlenb - li t4, 22 - mul a0, a0, t4 + li a1, 22 + mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 304 vs2r.v v12, (a0) # Unknown-size Folded Spill vl2re64.v v20, (s3) - vl2re64.v v10, (a1) + vl2re64.v v10, (t6) add a1, t2, s4 - addi t4, a1, 8 - vl2re64.v v28, (t4) + addi t6, a1, 8 + vl2re64.v v28, (t6) csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 304 vs2r.v v28, (a0) # Unknown-size Folded Spill - add t4, t6, s4 + add t6, s6, s4 add s2, a6, s4 vl2re64.v v16, (s2) addi s2, s2, 8 vl2re64.v v18, (s2) - vl2re64.v v0, (t4) + vl2re64.v v0, (t6) add s2, t1, s4 vfsub.vv v10, v10, v20 csrr a0, vlenb @@ -1660,7 +1659,7 @@ vfsub.vv v30, v10, v26 vfsub.vv v24, v2, v18 vfsub.vv v10, v6, v20 - addi t4, t4, 8 + addi t6, t6, 8 vfneg.v v6, v14 vfmul.vv v6, v10, v6 csrr s2, vlenb @@ -1670,16 +1669,16 @@ addi s2, s2, 304 vs2r.v v10, (s2) # Unknown-size Folded Spill vfmacc.vv v6, v24, v22 - vl2re64.v v18, (t4) + vl2re64.v v18, (t6) vl2re64.v v22, (a1) vfadd.vv v14, v8, v30 vfmacc.vv v28, v14, v6 add a1, t3, s4 - csrr t4, vlenb - slli t4, t4, 2 - add t4, sp, t4 - addi t4, t4, 304 - vl2r.v v20, (t4) # Unknown-size Folded Reload + csrr t6, vlenb + slli t6, t6, 2 + add t6, sp, t6 + addi t6, t6, 304 + vl2r.v v20, (t6) # Unknown-size Folded Reload vfsub.vv v6, v20, v18 vfsub.vv v18, v22, v0 vfneg.v v8, v24 @@ -1690,11 +1689,11 @@ vfmacc.vv v28, v16, v8 vfsub.vv v22, v4, v14 addi a1, a1, 8 - add t4, s9, s4 - addi s2, t4, 8 + add t6, a5, s4 + addi s2, t6, 8 add s3, s8, s4 vl2re64.v v8, (a1) - vl2re64.v v16, (t4) + vl2re64.v v16, (t6) vl2re64.v v12, (s2) vl2re64.v v14, (s3) vfsub.vv v8, v8, v26 @@ -1705,8 +1704,8 @@ vfsub.vv v4, v20, v14 vfneg.v v12, v4 csrr a1, vlenb - li t4, 10 - mul a1, a1, t4 + li t6, 10 + mul a1, a1, t6 add a1, sp, a1 addi a1, a1, 304 vl2r.v v26, (a1) # Unknown-size Folded Reload @@ -1727,8 +1726,8 @@ vfadd.vv v10, v10, v8 vfmacc.vv v18, v10, v12 csrr a1, vlenb - li t4, 6 - mul a1, a1, t4 + li t6, 6 + mul a1, a1, t6 add a1, sp, a1 addi a1, a1, 304 vl2r.v v10, (a1) # Unknown-size Folded Reload @@ -1746,8 +1745,8 @@ vfneg.v v12, v6 vfmul.vv v12, v0, v12 csrr a1, vlenb - li t4, 22 - mul a1, a1, t4 + li t6, 22 + mul a1, a1, t6 add a1, sp, a1 addi a1, a1, 304 vl2r.v v16, (a1) # Unknown-size Folded Reload @@ -1764,15 +1763,15 @@ vfmul.vv v8, v8, v14 vfmacc.vv v8, v26, v0 csrr a1, vlenb - li t4, 12 - mul a1, a1, t4 + li t6, 12 + mul a1, a1, t6 add a1, sp, a1 addi a1, a1, 304 vl2r.v v14, (a1) # Unknown-size Folded Reload vfadd.vv v14, v22, v14 csrr a1, vlenb - li t4, 18 - mul a1, a1, t4 + li t6, 18 + mul a1, a1, t6 add a1, sp, a1 addi a1, a1, 304 vl2r.v v16, (a1) # Unknown-size Folded Reload @@ -1780,8 +1779,8 @@ vfmul.vv v10, v16, v10 vfmacc.vv v10, v14, v12 csrr a1, vlenb - li t4, 20 - mul a1, a1, t4 + li t6, 20 + mul a1, a1, t6 add a1, sp, a1 addi a1, a1, 304 vl2r.v v12, (a1) # Unknown-size Folded Reload @@ -1793,23 +1792,23 @@ vfmul.vf v8, v8, fa5 vs2r.v v8, (a1) sub a3, a3, t0 - add ra, ra, s0 - add a5, a5, s0 - add s11, s11, s0 - add t3, t3, s0 - add s7, s7, s0 - add a4, a4, s0 - add t1, t1, s0 - add s9, s9, s0 - add t2, t2, s0 - add t6, t6, s0 - add a6, a6, s0 - add s8, s8, s0 - add s1, s1, s0 + add t4, t4, s11 + add s0, s0, s11 + add s9, s9, s11 + add t3, t3, s11 + add s7, s7, s11 + add a4, a4, s11 + add t1, t1, s11 + add a5, a5, s11 + add t2, t2, s11 + add s6, s6, s11 + add a6, a6, s11 + add s8, s8, s11 + add s1, s1, s11 bnez a3, .LBB2_13 # %bb.14: # %middle.block # in Loop: Header=BB2_11 Depth=1 - ld ra, 112(sp) # 8-byte Folded Reload + ld s9, 104(sp) # 8-byte Folded Reload ld a1, 184(sp) # 8-byte Folded Reload beq a1, a2, .LBB2_10 .LBB2_15: # %for.body69.preheader @@ -1817,71 +1816,71 @@ ld a2, 120(sp) # 8-byte Folded Reload subw a2, a2, a0 slli a0, a0, 3 - ld a3, 208(sp) # 8-byte Folded Reload - ld a6, 144(sp) # 8-byte Folded Reload - ld t1, 136(sp) # 8-byte Folded Reload - mv t2, t5 - ld t3, 128(sp) # 8-byte Folded Reload - ld t4, 168(sp) # 8-byte Folded Reload - mv t6, s6 - ld s1, 152(sp) # 8-byte Folded Reload - mv s2, ra - ld s3, 160(sp) # 8-byte Folded Reload - ld s7, 192(sp) # 8-byte Folded Reload - mv s8, a7 - ld s9, 200(sp) # 8-byte Folded Reload + mv a3, s9 + ld a5, 144(sp) # 8-byte Folded Reload + ld a6, 136(sp) # 8-byte Folded Reload + mv t1, t5 + ld t2, 128(sp) # 8-byte Folded Reload + ld t3, 168(sp) # 8-byte Folded Reload + mv t4, ra + ld t6, 152(sp) # 8-byte Folded Reload + ld s1, 208(sp) # 8-byte Folded Reload + ld s2, 160(sp) # 8-byte Folded Reload + ld s3, 192(sp) # 8-byte Folded Reload + mv s7, a7 + ld s8, 200(sp) # 8-byte Folded Reload .LBB2_16: # %for.body69 # Parent Loop BB2_11 Depth=1 # => This Inner Loop Header: Depth=2 - add a1, t6, a0 + add a1, t4, a0 fld fa3, 8(a1) - add a4, s2, a0 + add a4, s1, a0 fld fa4, 8(a4) - add a5, s3, a0 - fld fa2, -8(a5) + add s0, s2, a0 + fld fa2, -8(s0) fsub.d fa4, fa3, fa4 fsub.d fa0, fa3, fa2 - add s11, s1, a0 - fld fa2, -8(s11) - fld fa1, 0(a5) + add s6, t6, a0 + fld fa2, -8(s6) + fld fa1, 0(s0) fld ft0, 0(a4) - fld ft1, 0(s11) + fld ft1, 0(s6) fld ft2, 0(a1) fsub.d fa2, fa3, fa2 fsub.d fa1, fa1, ft0 fsub.d fa3, ft1, ft0 fsub.d ft1, ft2, ft0 - add a1, t2, a0 + add a1, t1, a0 fld ft2, 8(a1) add a4, a3, a0 fld ft0, 8(a4) - add a5, a6, a0 - fld ft3, -8(a5) - add s11, t1, a0 - fld ft4, -8(s11) - fld ft5, 0(a5) + add s0, a5, a0 + fld ft3, -8(s0) + add s6, a6, a0 + fld ft4, -8(s6) + fld ft5, 0(s0) fld ft6, 0(a4) fsub.d ft0, ft2, ft0 fsub.d ft3, ft2, ft3 fsub.d ft2, ft2, ft4 fsub.d ft4, ft5, ft6 - fld ft5, 0(s11) + fld ft5, 0(s6) fld ft7, 0(a1) - add a1, t3, a0 + add a1, t2, a0 fld fa6, 0(a1) - add a4, t4, a0 + add a4, t3, a0 fld fa7, 0(a4) - add a5, s7, a0 - fld ft8, 0(a5) + add s0, s3, a0 + fld ft8, 0(s0) fsub.d ft5, ft5, ft6 fsub.d ft6, ft7, ft6 fsub.d ft7, fa6, fa7 fsub.d fa7, fa6, ft8 - add s11, s8, a0 - fld ft8, 0(s11) - fld ft9, 8(a5) + add s6, s7, a0 + fld ft8, 0(s6) + fld ft9, 8(s0) fld ft10, -8(a4) - fld ft11, 8(s11) + fld ft11, 8(s6) fld fs0, -8(a1) fsub.d fa6, fa6, ft8 fsub.d ft8, ft9, ft10 @@ -1902,7 +1901,7 @@ fmul.d fs0, fs0, fs3 fmadd.d ft11, ft11, fs2, fs0 fmadd.d ft11, fs1, fs4, ft11 - add a1, s9, a0 + add a1, s8, a0 fadd.d fa0, fa0, fa3 fadd.d ft3, ft3, ft5 fadd.d fa7, fa7, ft9 @@ -1938,7 +1937,6 @@ fmul.d fa4, fa4, fa5 fsd fa4, 0(a1) addiw a2, a2, -1 - addi s9, s9, 8 addi s8, s8, 8 addi s7, s7, 8 addi s3, s3, 8 @@ -1950,6 +1948,7 @@ addi t2, t2, 8 addi t1, t1, 8 addi a6, a6, 8 + addi a5, a5, 8 addi a3, a3, 8 bnez a2, .LBB2_16 j .LBB2_10 --- build.head//MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_unarj.s 2023-11-13 08:03:22.207563026 +0000 +++ build//MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_unarj.s 2023-11-13 08:03:17.263705934 +0000 @@ -835,7 +835,7 @@ lw a0, 4(s0) beqz a0, .LBB2_92 # %bb.9: # %while.body.lr.ph.i - li s2, 0 + li s3, 0 li s10, 0 lui s6, 1 addiw a0, s6, 16 @@ -845,14 +845,14 @@ addi s7, sp, 1104 add a1, s7, a1 sd a1, 48(sp) # 8-byte Folded Spill - csrr s3, vlenb - slli s9, s3, 1 + csrr s2, vlenb + slli s9, s2, 1 add a0, s7, a0 sd a0, 56(sp) # 8-byte Folded Spill - neg a0, s3 + neg a0, s2 and a0, a0, s6 sd a0, 24(sp) # 8-byte Folded Spill - srli a0, s3, 3 + srli a0, s2, 3 sd a0, 32(sp) # 8-byte Folded Spill li s1, 1019 vsetvli a0, zero, e8, m2, ta, ma @@ -865,7 +865,7 @@ lui a0, 6 addiw a0, a0, 1791 sd a0, 64(sp) # 8-byte Folded Spill - sd s3, 72(sp) # 8-byte Folded Spill + sd s2, 72(sp) # 8-byte Folded Spill j .LBB2_17 .LBB2_10: li a0, -115 @@ -896,12 +896,12 @@ .LBB2_15: # %if.then11.i # in Loop: Header=BB2_17 Depth=1 ld a0, 1112(sp) - slli a1, s2, 32 + slli a1, s3, 32 srli a1, a1, 32 add a0, a0, a1 sb s8, 0(a0) - addiw s2, s2, 1 - srliw a0, s2, 11 + addiw s3, s3, 1 + srliw a0, s3, 11 addiw s10, s10, 1 li a2, 13 bgeu a0, a2, .LBB2_51 @@ -1007,7 +1007,7 @@ # in Loop: Header=BB2_20 Depth=2 slli s5, s5, 48 srli a0, s5, 48 - mv s3, s10 + mv s2, s10 li a1, 1 bne a0, a1, .LBB2_33 # %bb.29: # in Loop: Header=BB2_20 Depth=2 @@ -1044,12 +1044,12 @@ addi a0, sp, 1104 call fill_buf add a0, s10, s5 - mv s10, s3 - ld s3, 72(sp) # 8-byte Folded Reload lui a1, 4 addiw a1, a1, -1920 add a1, sp, a1 vl2r.v v8, (a1) # Unknown-size Folded Reload + mv s10, s2 + ld s2, 72(sp) # 8-byte Folded Reload .LBB2_35: # %while.body79.preheader.i.i.i # in Loop: Header=BB2_20 Depth=2 slli a2, s8, 48 @@ -1150,7 +1150,7 @@ ld a1, 1112(sp) slli a2, a2, 11 call cli_writen@plt - li s2, 0 + li s3, 0 j .LBB2_16 .LBB2_52: # %if.then.i.i.i # in Loop: Header=BB2_17 Depth=1 @@ -1169,7 +1169,7 @@ bltu a3, a2, .LBB2_56 # %bb.53: # %vector.ph # in Loop: Header=BB2_17 Depth=1 - neg a1, s3 + neg a1, s2 and a1, a1, s6 vsetvli a2, zero, e16, m2, ta, ma vmv.v.x v8, a0 @@ -1179,7 +1179,7 @@ # Parent Loop BB2_17 Depth=1 # => This Inner Loop Header: Depth=2 vs2r.v v8, (a3) - sub a2, a2, s3 + sub a2, a2, s2 add a3, a3, s9 bnez a2, .LBB2_54 # %bb.55: # %middle.block @@ -1316,7 +1316,7 @@ lbu a1, 526(a0) addi a0, sp, 1104 call fill_buf - mv s3, s10 + mv s2, s10 beqz s4, .LBB2_78 # %bb.76: # %if.then29.i.i # in Loop: Header=BB2_17 Depth=1 @@ -1335,7 +1335,7 @@ j .LBB2_79 .LBB2_77: # %if.then6.i.i # in Loop: Header=BB2_17 Depth=1 - mv s3, s10 + mv s2, s10 .Lpcrel_hi46: auipc a0, %pcrel_hi(.L.str.30) addi a0, a0, %pcrel_lo(.Lpcrel_hi46) @@ -1346,7 +1346,7 @@ .LBB2_79: # %decode_p.exit.i # in Loop: Header=BB2_17 Depth=1 not a0, a0 - add a0, a0, s2 + add a0, a0, s3 slli a1, a0, 48 srai a1, a1, 48 srli a1, a1, 15 @@ -1362,11 +1362,11 @@ addi a1, s8, -253 slli a1, a1, 48 srli a1, a1, 48 - addw s3, s3, a1 + addw s2, s2, a1 srli a0, a0, 48 - sltu a1, a0, s2 + sltu a1, a0, s3 ld a2, 64(sp) # 8-byte Folded Reload - sltu a2, s2, a2 + sltu a2, s3, a2 and a1, a2, a1 addi s5, s8, -254 lui a2, 6 @@ -1374,7 +1374,7 @@ beqz a1, .LBB2_85 # %bb.81: # %while.cond51.preheader.i # in Loop: Header=BB2_17 Depth=1 - mv a1, s2 + mv a1, s3 .LBB2_82: # %while.body61.i # Parent Loop BB2_17 Depth=1 # => This Inner Loop Header: Depth=2 @@ -1394,11 +1394,11 @@ xori a2, a2, 1 and a4, a4, a5 and a2, a4, a2 - addiw s2, s2, 1 + addiw s3, s3, 1 bnez a2, .LBB2_82 .LBB2_83: # in Loop: Header=BB2_17 Depth=1 - mv s10, s3 - ld s3, 72(sp) # 8-byte Folded Reload + mv s10, s2 + ld s2, 72(sp) # 8-byte Folded Reload j .LBB2_16 .LBB2_84: # %if.end90.i # in Loop: Header=BB2_85 Depth=2 @@ -1420,11 +1420,11 @@ srai a1, a1, 48 add a1, a0, a1 lbu a1, 0(a1) - slli a2, s2, 32 + slli a2, s3, 32 srli a2, a2, 32 add a0, a0, a2 - addiw s2, s2, 1 - srliw a2, s2, 11 + addiw s3, s3, 1 + srliw a2, s3, 11 sb a1, 0(a0) bltu a2, a3, .LBB2_84 # %bb.86: # %if.then86.i @@ -1434,7 +1434,7 @@ mv a2, s4 call cli_writen@plt li a3, 13 - li s2, 0 + li s3, 0 j .LBB2_84 .LBB2_87: # %if.then93.i.i.i # in Loop: Header=BB2_17 Depth=1 @@ -1453,11 +1453,11 @@ addi a0, a0, %pcrel_lo(.Lpcrel_hi47) call cli_warnmsg@plt .LBB2_90: # %while.end100.i - beqz s2, .LBB2_92 + beqz s3, .LBB2_92 # %bb.91: # %if.then103.i lw a0, 28(s0) ld a1, 1112(sp) - mv a2, s2 + mv a2, s3 call cli_writen@plt .LBB2_92: # %if.end107.i ld a0, 1112(sp) --- build.head//MultiSource/Benchmarks/mafft/CMakeFiles/pairlocalalign.dir/Calignm1.s 2023-11-13 08:03:22.559552851 +0000 +++ build//MultiSource/Benchmarks/mafft/CMakeFiles/pairlocalalign.dir/Calignm1.s 2023-11-13 08:03:17.587696569 +0000 @@ -1161,92 +1161,92 @@ add a4, a6, a1 addi t0, t0, -26 add a1, t3, a1 - addi t2, a1, 1352 + addi a1, a1, 1352 .LBB1_46: # %for.body142 # Parent Loop BB1_41 Depth=1 # => This Inner Loop Header: Depth=2 - lw a1, -1352(t2) - lw t4, -1248(t2) - fcvt.s.w fs8, a1 + lw t2, -1352(a1) + lw t4, -1248(a1) + fcvt.s.w fs8, t2 fmadd.s fs8, fs8, fa4, fa5 - lw a1, -1144(t2) + lw t2, -1144(a1) fcvt.s.w fs9, t4 fmadd.s fs8, fs9, fa3, fs8 - lw t4, -1040(t2) - fcvt.s.w fs9, a1 + lw t4, -1040(a1) + fcvt.s.w fs9, t2 fmadd.s fs8, fs9, fa2, fs8 - lw a1, -936(t2) + lw t2, -936(a1) fcvt.s.w fs9, t4 fmadd.s fs8, fs9, fa1, fs8 - lw t4, -832(t2) - fcvt.s.w fs9, a1 + lw t4, -832(a1) + fcvt.s.w fs9, t2 fmadd.s fs8, fs9, fa0, fs8 - lw a1, -728(t2) + lw t2, -728(a1) fcvt.s.w fs9, t4 fmadd.s fs8, fs9, ft0, fs8 - lw t4, -624(t2) - fcvt.s.w fs9, a1 + lw t4, -624(a1) + fcvt.s.w fs9, t2 fmadd.s fs8, fs9, ft1, fs8 - lw a1, -520(t2) + lw t2, -520(a1) fcvt.s.w fs9, t4 fmadd.s fs8, fs9, ft2, fs8 - lw t4, -416(t2) - fcvt.s.w fs9, a1 + lw t4, -416(a1) + fcvt.s.w fs9, t2 fmadd.s fs8, fs9, ft3, fs8 - lw a1, -312(t2) + lw t2, -312(a1) fcvt.s.w fs9, t4 fmadd.s fs8, fs9, ft4, fs8 - lw t4, -208(t2) - fcvt.s.w fs9, a1 + lw t4, -208(a1) + fcvt.s.w fs9, t2 fmadd.s fs8, fs9, ft5, fs8 - lw a1, -104(t2) + lw t2, -104(a1) fcvt.s.w fs9, t4 fmadd.s fs8, fs9, ft6, fs8 - lw t4, 0(t2) - fcvt.s.w fs9, a1 + lw t4, 0(a1) + fcvt.s.w fs9, t2 fmadd.s fs8, fs9, ft7, fs8 - lw a1, 104(t2) + lw t2, 104(a1) fcvt.s.w fs9, t4 fmadd.s fs8, fs9, fa6, fs8 - lw t4, 208(t2) - fcvt.s.w fs9, a1 + lw t4, 208(a1) + fcvt.s.w fs9, t2 fmadd.s fs8, fs9, fa7, fs8 - lw a1, 312(t2) + lw t2, 312(a1) fcvt.s.w fs9, t4 fmadd.s fs8, fs9, ft8, fs8 - lw t4, 416(t2) - fcvt.s.w fs9, a1 + lw t4, 416(a1) + fcvt.s.w fs9, t2 fmadd.s fs8, fs9, ft9, fs8 - lw a1, 520(t2) + lw t2, 520(a1) fcvt.s.w fs9, t4 fmadd.s fs8, fs9, ft10, fs8 - lw t4, 624(t2) - fcvt.s.w fs9, a1 + lw t4, 624(a1) + fcvt.s.w fs9, t2 fmadd.s fs8, fs9, ft11, fs8 - lw a1, 728(t2) + lw t2, 728(a1) fcvt.s.w fs9, t4 fmadd.s fs8, fs9, fs1, fs8 - lw t4, 832(t2) - fcvt.s.w fs9, a1 + lw t4, 832(a1) + fcvt.s.w fs9, t2 fmadd.s fs8, fs9, fs2, fs8 - lw a1, 936(t2) + lw t2, 936(a1) fcvt.s.w fs9, t4 fmadd.s fs8, fs9, fs3, fs8 - lw t4, 1040(t2) - fcvt.s.w fs9, a1 + lw t4, 1040(a1) + fcvt.s.w fs9, t2 fmadd.s fs8, fs9, fs4, fs8 - lw a1, 1144(t2) + lw t2, 1144(a1) fcvt.s.w fs9, t4 - lw t4, 1248(t2) + lw t4, 1248(a1) fmadd.s fs8, fs9, fs5, fs8 - fcvt.s.w fs9, a1 + fcvt.s.w fs9, t2 fmadd.s fs8, fs9, fs6, fs8 fcvt.s.w fs9, t4 fmadd.s fs8, fs9, fs7, fs8 fsw fs8, 0(a4) addi a4, a4, 4 addi t0, t0, 1 - addi t2, t2, 4 + addi a1, a1, 4 bnez t0, .LBB1_46 # %bb.47: # %for.cond167.preheader # in Loop: Header=BB1_41 Depth=1 --- build.head//MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/top.s 2023-11-13 08:03:22.383557938 +0000 +++ build//MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/top.s 2023-11-13 08:03:17.423701310 +0000 @@ -262,9 +262,9 @@ li a0, 2 call clock_StartCounter@plt vsetivli zero, 8, e32, m2, ta, ma - ld s4, 168(sp) # 8-byte Folded Reload addi a0, sp, 496 vl2r.v v8, (a0) # Unknown-size Folded Reload + ld s4, 168(sp) # 8-byte Folded Reload vse32.v v8, (s4) ld a0, 296(sp) # 8-byte Folded Reload vse32.v v8, (a0) --- build.head//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/UI/Common/EnumDirItems.s 2023-11-13 08:03:21.247590775 +0000 +++ build//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/UI/Common/EnumDirItems.s 2023-11-13 08:03:16.279734378 +0000 @@ -1510,18 +1510,18 @@ li a0, 4 sw a0, 180(sp) vsetivli zero, 2, e64, m1, ta, ma - lw s6, 8(s1) + lw s9, 8(s1) li a0, 0 - addiw s9, s6, 1 + addiw s6, s9, 1 addi a1, sp, 192 vl1r.v v8, (a1) # Unknown-size Folded Reload addi a1, sp, 112 vse64.v v8, (a1) - beqz s9, .LBB10_10 + beqz s6, .LBB10_10 # %bb.8: # %if.end9.i.i.i # in Loop: Header=BB10_7 Depth=1 - slti a0, s6, -1 - slli a1, s9, 32 + slti a0, s9, -1 + slli a1, s6, 32 srli a1, a1, 30 neg a0, a0 or a0, a0, a1 @@ -1532,7 +1532,7 @@ # in Loop: Header=BB10_7 Depth=1 sd a0, 112(sp) sw zero, 0(a0) - sw s9, 124(sp) + sw s6, 124(sp) .LBB10_10: # %_ZN11CStringBaseIwE11SetCapacityEi.exit.i.i # in Loop: Header=BB10_7 Depth=1 ld a1, 0(s1) @@ -1547,7 +1547,7 @@ bnez a2, .LBB10_11 # %bb.12: # %_ZN11CStringBaseIwEC2ERKS0_.exit.i # in Loop: Header=BB10_7 Depth=1 - sw s6, 120(sp) + sw s9, 120(sp) .Ltmp73: addi a0, sp, 112 mv a1, s8 @@ -2656,9 +2656,9 @@ # %bb.28: # %if.end85 # in Loop: Header=BB12_16 Depth=1 vsetivli zero, 2, e64, m1, ta, ma + addi a0, sp, 304 + vl1r.v v8, (a0) # Unknown-size Folded Reload addi a0, sp, 216 - addi a1, sp, 304 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) li a0, 8 sd a0, 232(sp) @@ -2932,9 +2932,9 @@ # %bb.66: # %if.end104 # in Loop: Header=BB12_16 Depth=1 vsetivli zero, 2, e64, m1, ta, ma + addi a0, sp, 304 + vl1r.v v8, (a0) # Unknown-size Folded Reload addi a0, sp, 216 - addi a1, sp, 304 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) li a0, 8 sd a0, 232(sp) @@ -3214,9 +3214,9 @@ .LBB12_108: # %if.end309 # in Loop: Header=BB12_101 Depth=1 vsetivli zero, 2, e64, m1, ta, ma + addi a0, sp, 304 + vl1r.v v8, (a0) # Unknown-size Folded Reload addi a0, sp, 216 - addi a1, sp, 304 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) li a0, 8 sd a0, 232(sp) @@ -3840,9 +3840,9 @@ .LBB12_203: # %if.end220 # in Loop: Header=BB12_180 Depth=1 vsetivli zero, 2, e64, m1, ta, ma + addi a0, sp, 304 + vl1r.v v8, (a0) # Unknown-size Folded Reload addi a0, sp, 216 - addi a1, sp, 304 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) li a0, 8 sd a0, 232(sp) --- build.head//SingleSource/Benchmarks/McGill/CMakeFiles/misr.dir/misr.s 2023-11-13 08:03:22.879543601 +0000 +++ build//SingleSource/Benchmarks/McGill/CMakeFiles/misr.dir/misr.s 2023-11-13 08:03:17.943686279 +0000 @@ -450,7 +450,7 @@ blt a3, a0, .LBB3_13 # %bb.7: # %for.body5.preheader # in Loop: Header=BB3_6 Depth=1 - li s7, 0 + li s5, 0 ld s4, 72(sp) # 8-byte Folded Reload mv s2, s8 addi a0, sp, 96 @@ -462,14 +462,14 @@ j .LBB3_9 .LBB3_8: # %for.inc34 # in Loop: Header=BB3_9 Depth=2 - addi s7, s7, 1 + addi s5, s5, 1 addi s4, s4, 31 - beq s7, s6, .LBB3_14 + beq s5, s6, .LBB3_14 .LBB3_9: # %for.body5 # Parent Loop BB3_6 Depth=1 # => This Loop Header: Depth=2 # Child Loop BB3_11 Depth 3 - li s5, 31 + li s7, 31 call lrand48@plt mv s3, a0 mv s1, s4 @@ -499,10 +499,10 @@ andi a0, a0, 1 sw a0, 4(s0) srai s3, s3, 1 - addi s5, s5, -1 + addi s7, s7, -1 addi s1, s1, 1 mv s0, s2 - beqz s5, .LBB3_8 + beqz s7, .LBB3_8 .LBB3_11: # %for.body8 # Parent Loop BB3_6 Depth=1 # Parent Loop BB3_9 Depth=2 --- build.head//MicroBenchmarks/LCALS/SubsetALambdaLoops/CMakeFiles/lcalsALambda.dir/__/LCALSStats.s 2023-11-13 08:03:20.883601296 +0000 +++ build//MicroBenchmarks/LCALS/SubsetALambdaLoops/CMakeFiles/lcalsALambda.dir/__/LCALSStats.s 2023-11-13 08:03:15.919744784 +0000 @@ -1502,7 +1502,7 @@ sd a0, 80(sp) # 8-byte Folded Spill vslidedown.vi v8, v8, 1 vmv.x.s a0, v8 - sd a0, 48(sp) # 8-byte Folded Spill + sd a0, 64(sp) # 8-byte Folded Spill vsetivli zero, 2, e64, m2, ta, ma csrr a0, vlenb slli a0, a0, 2 @@ -1564,9 +1564,9 @@ vmv.x.s s11, v8 vsetivli zero, 1, e64, m1, ta, ma ld a0, 368(sp) - sd a0, 64(sp) # 8-byte Folded Spill - ld a0, 376(sp) sd a0, 56(sp) # 8-byte Folded Spill + ld a0, 376(sp) + sd a0, 48(sp) # 8-byte Folded Spill ld s9, 352(sp) ld s10, 360(sp) vslidedown.vi v8, v8, 1 @@ -1574,7 +1574,7 @@ mv a0, s4 mv a1, s3 ld a2, 72(sp) # 8-byte Folded Reload - ld a3, 48(sp) # 8-byte Folded Reload + ld a3, 64(sp) # 8-byte Folded Reload call __addtf3@plt ld a2, 104(sp) # 8-byte Folded Reload ld a3, 96(sp) # 8-byte Folded Reload @@ -1594,8 +1594,8 @@ mv a2, s9 mv a3, s10 call __addtf3@plt - ld a2, 64(sp) # 8-byte Folded Reload - ld a3, 56(sp) # 8-byte Folded Reload + ld a2, 56(sp) # 8-byte Folded Reload + ld a3, 48(sp) # 8-byte Folded Reload call __addtf3@plt mv s4, a0 mv s3, a1 --- build.head//MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/btSequentialImpulseConstraintSolver.s 2023-11-13 08:03:22.479555163 +0000 +++ build//MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/btSequentialImpulseConstraintSolver.s 2023-11-13 08:03:17.515698651 +0000 @@ -4671,8 +4671,8 @@ slli s3, s6, 3 add s3, s4, s3 ld a0, 0(s3) - ld s2, 24(a0) - lw s7, 224(s2) + ld s5, 24(a0) + lw s7, 224(s5) bltz s7, .LBB22_31 # %bb.25: # %invoke.cont207 # in Loop: Header=BB22_24 Depth=2 @@ -4705,11 +4705,11 @@ j .LBB22_63 .LBB22_31: # %if.else.i300 # in Loop: Header=BB22_24 Depth=2 - lw a1, 256(s2) + lw a1, 256(s5) bne a1, s10, .LBB22_37 # %bb.32: # %land.lhs.true.i304 # in Loop: Header=BB22_24 Depth=2 - flw fa5, 360(s2) + flw fa5, 360(s5) feq.s a1, fa5, fs0 bnez a1, .LBB22_38 # %bb.33: # %if.then6.i307 @@ -4723,9 +4723,9 @@ bnez s7, .LBB22_39 # %bb.35: # %if.then.i.i344 # in Loop: Header=BB22_24 Depth=2 - li s5, 1 + li s2, 1 mv a0, s7 - blt s7, s5, .LBB22_40 + blt s7, s2, .LBB22_40 j .LBB22_53 .LBB22_36: # in Loop: Header=BB22_24 Depth=2 li s5, 0 @@ -4743,15 +4743,15 @@ bgez s5, .LBB22_67 j .LBB22_26 .LBB22_39: # in Loop: Header=BB22_24 Depth=2 - slliw s5, s7, 1 + slliw s2, s7, 1 mv a0, s7 - bge s7, s5, .LBB22_53 + bge s7, s2, .LBB22_53 .LBB22_40: # %if.then.i.i.i349 # in Loop: Header=BB22_24 Depth=2 - beqz s5, .LBB22_47 + beqz s2, .LBB22_47 # %bb.41: # %if.then.i.i.i.i351 # in Loop: Header=BB22_24 Depth=2 - mul a0, s5, s11 + mul a0, s2, s11 .Ltmp93: li a1, 16 call _Z22btAlignedAllocInternalmi@plt @@ -4831,7 +4831,7 @@ sd s4, 24(s1) li a1, 1 sb a1, 32(s1) - sw s5, 16(s1) + sw s2, 16(s1) ld s4, 96(sp) # 8-byte Folded Reload .LBB22_53: # %_ZN20btAlignedObjectArrayI12btSolverBodyE6expandERKS0_.exit.i311 # in Loop: Header=BB22_24 Depth=2 @@ -4862,7 +4862,7 @@ vse64.v v8, (a1) ld a1, 24(s1) add a0, a1, a0 - lw a1, 256(s2) + lw a1, 256(s5) addi a2, a0, 80 vsetivli zero, 4, e32, m1, ta, ma csrr a3, vlenb @@ -4878,10 +4878,10 @@ bne a1, s10, .LBB22_55 # %bb.54: # %if.then.i10.i327 # in Loop: Header=BB22_24 Depth=2 - flw fa5, 360(s2) - flw fa4, 380(s2) - flw fa3, 384(s2) - flw fa2, 388(s2) + flw fa5, 360(s5) + flw fa4, 380(s5) + flw fa3, 384(s5) + flw fa2, 388(s5) fmul.s fa4, fa5, fa4 fmul.s fa3, fa5, fa3 fmul.s fa5, fa5, fa2 @@ -4896,8 +4896,8 @@ srli a2, a2, 32 sd a1, 48(a0) sd a2, 56(a0) - sd s2, 72(a0) - addi a1, s2, 364 + sd s5, 72(a0) + addi a1, s5, 364 vle32.v v8, (a1) addi a0, a0, 32 j .LBB22_56 @@ -4913,7 +4913,7 @@ # in Loop: Header=BB22_24 Depth=2 vse32.v v8, (a0) ld a0, 0(s3) - sw s7, 224(s2) + sw s7, 224(s5) ld s2, 32(a0) lw s5, 224(s2) bgez s5, .LBB22_67 --- build.head//MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_nsis_bzlib.s 2023-11-13 08:03:22.199563257 +0000 +++ build//MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_nsis_bzlib.s 2023-11-13 08:03:17.255706166 +0000 @@ -157,55 +157,55 @@ mv a1, a0 li a0, -2 bnez a1, .LBB3_1 - j .LBB3_517 + j .LBB3_514 .LBB3_1: # %if.end - ld s10, 48(a1) - bnez s10, .LBB3_2 - j .LBB3_517 + ld s4, 48(a1) + bnez s4, .LBB3_2 + j .LBB3_514 .LBB3_2: # %if.end3 - ld a2, 0(s10) + ld a2, 0(s4) beq a2, a1, .LBB3_3 - j .LBB3_517 + j .LBB3_514 .LBB3_3: # %while.cond.preheader - addi s5, s10, 1096 + addi s5, s4, 1096 lui a0, 2 addiw a1, a0, -372 - add a1, s10, a1 + add a1, s4, a1 sd a1, 168(sp) # 8-byte Folded Spill lui a1, 11 addiw a1, a1, -1168 - add a1, s10, a1 + add a1, s4, a1 sd a1, 160(sp) # 8-byte Folded Spill addiw a0, a0, -373 - add a4, s10, a0 - addi a0, s10, 2047 + add a4, s4, a0 + addi a0, s4, 2047 addi a5, a0, 1145 lui a1, 16 addiw a2, a1, -1500 - add s11, s10, a2 + add s11, s4, a2 addiw a1, a1, -1456 - add a1, s10, a1 + add a1, s4, a1 sd a1, 472(sp) # 8-byte Folded Spill addi a1, a0, 1105 sd a1, 464(sp) # 8-byte Folded Spill addi a1, a0, 1149 sd a1, 208(sp) # 8-byte Folded Spill - addi a1, s10, 68 + addi a1, s4, 68 sd a1, 184(sp) # 8-byte Folded Spill - lw a3, 8(s10) + lw a3, 8(s4) addi a1, a0, 1677 sd a1, 112(sp) # 8-byte Folded Spill addi a1, a0, 1678 sd a1, 80(sp) # 8-byte Folded Spill - addi a1, s10, -31 + addi a1, s4, -31 sd a1, 72(sp) # 8-byte Folded Spill csrr a2, vlenb srli a1, a2, 3 - slli s3, a2, 1 - sd a5, 304(sp) # 8-byte Folded Spill + slli s7, a2, 1 + sd a5, 264(sp) # 8-byte Folded Spill addi a5, a5, 4 sd a5, 224(sp) # 8-byte Folded Spill - srli s7, a2, 1 + srli s8, a2, 1 lui a5, 11 negw a1, a1 slli a1, a1, 2 @@ -225,7 +225,7 @@ vmv.v.i v20, 0 lui a0, 14 addiw a0, a0, 476 - sd a0, 328(sp) # 8-byte Folded Spill + sd a0, 304(sp) # 8-byte Folded Spill vsetvli a0, zero, e32, m2, ta, ma vmv.v.x v18, a1 vmv.v.i v24, 0 @@ -248,15 +248,15 @@ sd a0, 232(sp) # 8-byte Folded Spill lui a0, 439 addiw a0, a0, 1856 - sd a0, 312(sp) # 8-byte Folded Spill + sd a0, 272(sp) # 8-byte Folded Spill addiw a0, a5, 380 sd a0, 360(sp) # 8-byte Folded Spill - add a0, s10, a0 + add a0, s4, a0 sd a0, 152(sp) # 8-byte Folded Spill lui a0, 13 addiw a0, a0, -1616 - sd a0, 336(sp) # 8-byte Folded Spill - add a0, s10, a0 + sd a0, 312(sp) # 8-byte Folded Spill + add a0, s4, a0 sd a0, 144(sp) # 8-byte Folded Spill sd a4, 200(sp) # 8-byte Folded Spill addi a0, a4, 61 @@ -266,8 +266,8 @@ sd a2, 88(sp) # 8-byte Folded Spill addi a0, s5, 4 sd a0, 136(sp) # 8-byte Folded Spill - li ra, 1 - li s9, 2 + li s1, 1 + li t4, 2 li t3, -1 lui a0, 1 addi a0, a0, -16 @@ -288,8 +288,8 @@ # Child Loop BB3_117 Depth 2 # Child Loop BB3_152 Depth 2 # Child Loop BB3_147 Depth 2 - # Child Loop BB3_300 Depth 2 - # Child Loop BB3_310 Depth 2 + # Child Loop BB3_301 Depth 2 + # Child Loop BB3_311 Depth 2 # Child Loop BB3_161 Depth 2 # Child Loop BB3_127 Depth 2 # Child Loop BB3_133 Depth 3 @@ -298,57 +298,57 @@ # Child Loop BB3_175 Depth 2 # Child Loop BB3_184 Depth 3 # Child Loop BB3_182 Depth 3 - # Child Loop BB3_226 Depth 2 - # Child Loop BB3_231 Depth 3 - # Child Loop BB3_250 Depth 3 - # Child Loop BB3_235 Depth 3 - # Child Loop BB3_237 Depth 4 - # Child Loop BB3_240 Depth 3 - # Child Loop BB3_244 Depth 3 - # Child Loop BB3_255 Depth 3 + # Child Loop BB3_240 Depth 2 + # Child Loop BB3_245 Depth 3 + # Child Loop BB3_264 Depth 3 + # Child Loop BB3_249 Depth 3 + # Child Loop BB3_251 Depth 4 + # Child Loop BB3_254 Depth 3 # Child Loop BB3_258 Depth 3 - # Child Loop BB3_262 Depth 2 - # Child Loop BB3_268 Depth 2 + # Child Loop BB3_269 Depth 3 + # Child Loop BB3_272 Depth 3 + # Child Loop BB3_276 Depth 2 + # Child Loop BB3_282 Depth 2 + # Child Loop BB3_398 Depth 2 # Child Loop BB3_400 Depth 2 - # Child Loop BB3_402 Depth 2 - # Child Loop BB3_440 Depth 2 - # Child Loop BB3_514 Depth 2 - # Child Loop BB3_469 Depth 2 - # Child Loop BB3_511 Depth 2 + # Child Loop BB3_438 Depth 2 # Child Loop BB3_477 Depth 2 - # Child Loop BB3_489 Depth 2 - # Child Loop BB3_292 Depth 2 - # Child Loop BB3_376 Depth 2 - # Child Loop BB3_458 Depth 2 - # Child Loop BB3_461 Depth 2 + # Child Loop BB3_480 Depth 2 + # Child Loop BB3_511 Depth 2 + # Child Loop BB3_488 Depth 2 # Child Loop BB3_501 Depth 2 - # Child Loop BB3_504 Depth 2 - # Child Loop BB3_284 Depth 2 + # Child Loop BB3_217 Depth 2 + # Child Loop BB3_374 Depth 2 + # Child Loop BB3_455 Depth 2 + # Child Loop BB3_458 Depth 2 + # Child Loop BB3_467 Depth 2 + # Child Loop BB3_470 Depth 2 + # Child Loop BB3_225 Depth 2 + # Child Loop BB3_351 Depth 2 # Child Loop BB3_354 Depth 2 - # Child Loop BB3_357 Depth 2 - # Child Loop BB3_359 Depth 2 - # Child Loop BB3_361 Depth 2 + # Child Loop BB3_356 Depth 2 + # Child Loop BB3_358 Depth 2 + # Child Loop BB3_418 Depth 2 # Child Loop BB3_420 Depth 2 - # Child Loop BB3_423 Depth 2 - # Child Loop BB3_427 Depth 2 - # Child Loop BB3_432 Depth 2 - # Child Loop BB3_436 Depth 2 - # Child Loop BB3_416 Depth 2 - # Child Loop BB3_208 Depth 2 - # Child Loop BB3_220 Depth 2 - # Child Loop BB3_327 Depth 2 + # Child Loop BB3_424 Depth 2 + # Child Loop BB3_429 Depth 2 + # Child Loop BB3_433 Depth 2 + # Child Loop BB3_414 Depth 2 + # Child Loop BB3_209 Depth 2 + # Child Loop BB3_234 Depth 2 + # Child Loop BB3_336 Depth 2 # Child Loop BB3_341 Depth 2 - # Child Loop BB3_322 Depth 2 - # Child Loop BB3_200 Depth 2 + # Child Loop BB3_323 Depth 2 + # Child Loop BB3_201 Depth 2 li a0, 10 .LBB3_5: # %while.cond # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 - bne a3, ra, .LBB3_6 - j .LBB3_516 + bne a3, s1, .LBB3_6 + j .LBB3_513 .LBB3_6: # %while.cond # in Loop: Header=BB3_5 Depth=2 - beq a3, s9, .LBB3_11 + beq a3, t4, .LBB3_11 # %bb.7: # %if.end27 # in Loop: Header=BB3_5 Depth=2 blt a3, a0, .LBB3_5 @@ -398,7 +398,7 @@ add a0, sp, a0 addi a0, a0, 496 vs2r.v v16, (a0) # Unknown-size Folded Spill - ld s0, 0(s10) + ld s0, 0(s4) vsetivli zero, 4, e32, m1, ta, ma vse32.v v13, (s11) addi a0, s11, 16 @@ -420,18 +420,18 @@ addi a1, a1, 496 vs1r.v v13, (a1) # Unknown-size Folded Spill vse32.v v13, (a0) - lbu a1, 44(s10) + lbu a1, 44(s4) ld a3, 56(s0) ld a0, 72(s0) li a2, 9 - sw a2, 40(s10) + sw a2, 40(s4) li a2, 1 beqz a1, .LBB3_85 # %bb.10: # %if.then27.i # in Loop: Header=BB3_4 Depth=1 - ld a1, 312(sp) # 8-byte Folded Reload + ld a1, 272(sp) # 8-byte Folded Reload jalr a3 - lw a1, 40(s10) + lw a1, 40(s4) ld a4, 56(s0) ld a3, 72(s0) ld s0, 464(sp) # 8-byte Folded Reload @@ -451,20 +451,20 @@ j .LBB3_93 .LBB3_11: # %if.then14 # in Loop: Header=BB3_4 Depth=1 - lbu a0, 44(s10) + lbu a0, 44(s4) beqz a0, .LBB3_52 # %bb.12: # %if.then15 # in Loop: Header=BB3_4 Depth=1 - ld a0, 0(s10) + ld a0, 0(s4) lw a1, 32(a0) beqz a1, .LBB3_106 # %bb.13: # %if.end.lr.ph.lr.ph.i # in Loop: Header=BB3_4 Depth=1 - lw a1, 16(s10) + lw a1, 16(s4) j .LBB3_16 .LBB3_14: # %if.then57.i # in Loop: Header=BB3_16 Depth=2 - sw t0, 64(s10) + sw t0, 64(s4) .LBB3_15: # %while.cond.backedge.i # in Loop: Header=BB3_16 Depth=2 lw a2, 32(a0) @@ -483,20 +483,20 @@ # in Loop: Header=BB3_16 Depth=2 ld a1, 472(sp) # 8-byte Folded Reload lw a4, 0(a1) - lw a1, 1092(s10) + lw a1, 1092(s4) addiw a2, a4, 1 beq a1, a2, .LBB3_106 # %bb.18: # %if.end23.i # in Loop: Header=BB3_16 Depth=2 bge a2, a1, .LBB3_19 - j .LBB3_518 + j .LBB3_515 .LBB3_19: # %if.end29.i # in Loop: Header=BB3_16 Depth=2 - lw a5, 64(s10) - lwu a6, 60(s10) + lw a5, 64(s4) + lwu a6, 60(s4) li t0, 0 - sw ra, 16(s10) - sb a5, 12(s10) + sw s1, 16(s4) + sb a5, 12(s4) sext.w t1, a6 li a2, 256 j .LBB3_21 @@ -504,7 +504,7 @@ # in Loop: Header=BB3_21 Depth=3 mv t0, a3 subw a3, a2, a3 - beq a3, ra, .LBB3_23 + beq a3, s1, .LBB3_23 .LBB3_21: # %do.body.i.i # Parent Loop BB3_4 Depth=1 # Parent Loop BB3_16 Depth=2 @@ -518,7 +518,7 @@ # %bb.22: # in Loop: Header=BB3_21 Depth=3 mv a2, a3 subw a3, a3, t0 - bne a3, ra, .LBB3_21 + bne a3, s1, .LBB3_21 .LBB3_23: # %indexIntoF.exit.i # in Loop: Header=BB3_16 Depth=2 ld a3, 464(sp) # 8-byte Folded Reload @@ -536,9 +536,9 @@ slli a6, a6, 60 srli a6, a6, 44 or t1, a6, a7 - sw t1, 60(s10) + sw t1, 60(s4) addiw a6, a1, 1 - sw a6, 1092(s10) + sw a6, 1092(s4) beq a1, a4, .LBB3_15 # %bb.24: # %if.end52.i # in Loop: Header=BB3_16 Depth=2 @@ -547,14 +547,14 @@ # %bb.25: # %if.end60.i # in Loop: Header=BB3_16 Depth=2 li t2, 0 - sw s9, 16(s10) + sw t4, 16(s4) li t0, 256 j .LBB3_27 .LBB3_26: # %do.body.i84.i # in Loop: Header=BB3_27 Depth=3 mv t2, t3 subw t3, t0, t3 - beq t3, ra, .LBB3_29 + beq t3, s1, .LBB3_29 .LBB3_27: # %do.body.i84.i # Parent Loop BB3_4 Depth=1 # Parent Loop BB3_16 Depth=2 @@ -568,7 +568,7 @@ # %bb.28: # in Loop: Header=BB3_27 Depth=3 mv t0, t3 subw t3, t3, t2 - bne t3, ra, .LBB3_27 + bne t3, s1, .LBB3_27 .LBB3_29: # %indexIntoF.exit96.i # in Loop: Header=BB3_16 Depth=2 slli t0, t1, 1 @@ -583,10 +583,10 @@ slli a7, a7, 60 srli a7, a7, 44 or a7, a7, t1 - sw a7, 60(s10) + sw a7, 60(s4) addiw t0, a1, 2 - sw t0, 1092(s10) - li t4, 3 + sw t0, 1092(s4) + li t4, 2 li t3, -1 beq a6, a4, .LBB3_15 # %bb.30: # %if.end94.i @@ -596,14 +596,15 @@ # %bb.31: # %if.end102.i # in Loop: Header=BB3_16 Depth=2 li t2, 0 - sw t4, 16(s10) + li a6, 3 + sw a6, 16(s4) li a6, 256 j .LBB3_33 .LBB3_32: # %do.body.i97.i # in Loop: Header=BB3_33 Depth=3 mv t2, t3 subw t3, a6, t3 - beq t3, ra, .LBB3_35 + beq t3, s1, .LBB3_35 .LBB3_33: # %do.body.i97.i # Parent Loop BB3_4 Depth=1 # Parent Loop BB3_16 Depth=2 @@ -617,7 +618,7 @@ # %bb.34: # in Loop: Header=BB3_33 Depth=3 mv a6, t3 subw t3, t3, t2 - bne t3, ra, .LBB3_33 + bne t3, s1, .LBB3_33 .LBB3_35: # %indexIntoF.exit109.i # in Loop: Header=BB3_16 Depth=2 slli a6, a7, 1 @@ -632,9 +633,10 @@ slli a7, a7, 60 srli a7, a7, 44 or a7, a7, a6 - sw a7, 60(s10) + sw a7, 60(s4) addi t1, a1, 3 - sw t1, 1092(s10) + sw t1, 1092(s4) + li t4, 2 li t3, -1 beq t0, a4, .LBB3_15 # %bb.36: # %if.end136.i @@ -650,7 +652,7 @@ # in Loop: Header=BB3_39 Depth=3 mv a4, t0 subw t0, a5, t0 - beq t0, ra, .LBB3_41 + beq t0, s1, .LBB3_41 .LBB3_39: # %do.body.i110.i # Parent Loop BB3_4 Depth=1 # Parent Loop BB3_16 Depth=2 @@ -664,7 +666,7 @@ # %bb.40: # in Loop: Header=BB3_39 Depth=3 mv a5, t0 subw t0, t0, a4 - bne t0, ra, .LBB3_39 + bne t0, s1, .LBB3_39 .LBB3_41: # %indexIntoF.exit122.i # in Loop: Header=BB3_16 Depth=2 li t0, 0 @@ -678,21 +680,21 @@ andi a6, a6, 4 srlw a6, a7, a6 addi a7, a1, 4 - sw a7, 1092(s10) + sw a7, 1092(s4) slli a6, a6, 60 srli a6, a6, 44 or a6, a6, a5 - sw a6, 60(s10) + sw a6, 60(s4) andi a4, a4, 255 addi a4, a4, 4 - sw a4, 16(s10) + sw a4, 16(s4) li a4, 256 j .LBB3_43 .LBB3_42: # %do.body.i123.i # in Loop: Header=BB3_43 Depth=3 mv t0, a7 subw a7, a4, a7 - beq a7, ra, .LBB3_45 + beq a7, s1, .LBB3_45 .LBB3_43: # %do.body.i123.i # Parent Loop BB3_4 Depth=1 # Parent Loop BB3_16 Depth=2 @@ -706,10 +708,10 @@ # %bb.44: # in Loop: Header=BB3_43 Depth=3 mv a4, a7 subw a7, a7, t0 - bne a7, ra, .LBB3_43 + bne a7, s1, .LBB3_43 .LBB3_45: # %indexIntoF.exit135.i # in Loop: Header=BB3_16 Depth=2 - sw t0, 64(s10) + sw t0, 64(s4) slli a4, a6, 1 add a2, a2, a4 srli a4, a6, 1 @@ -722,28 +724,28 @@ slli a3, a3, 60 srli a3, a3, 44 or a2, a3, a2 - sw a2, 60(s10) + sw a2, 60(s4) addi a1, a1, 5 - sw a1, 1092(s10) + sw a1, 1092(s4) j .LBB3_15 .LBB3_46: # %if.then99.i # in Loop: Header=BB3_16 Depth=2 - sw a6, 64(s10) + sw a6, 64(s4) j .LBB3_15 .LBB3_47: # %if.end5.i # in Loop: Header=BB3_16 Depth=2 - lbu a1, 12(s10) + lbu a1, 12(s4) ld a0, 24(a0) sb a1, 0(a0) - ld a0, 0(s10) - lw a1, 16(s10) + ld a0, 0(s4) + lw a1, 16(s4) ld a2, 24(a0) addiw a1, a1, -1 addi a2, a2, 1 lw a3, 32(a0) sd a2, 24(a0) lw a4, 36(a0) - sw a1, 16(s10) + sw a1, 16(s4) addiw a2, a3, -1 sw a2, 32(a0) addiw a4, a4, 1 @@ -760,26 +762,24 @@ j .LBB3_106 .LBB3_50: # %if.then141.i # in Loop: Header=BB3_16 Depth=2 - sw a4, 64(s10) + sw a4, 64(s4) j .LBB3_15 .LBB3_51: # %if.then30.entry.if.end_crit_edge.i_crit_edge # in Loop: Header=BB3_4 Depth=1 - li t4, 3 ld a0, 472(sp) # 8-byte Folded Reload - lw a0, 0(a0) - sd a0, 448(sp) # 8-byte Folded Spill + lw s2, 0(a0) j .LBB3_109 .LBB3_52: # %if.else # in Loop: Header=BB3_4 Depth=1 ld a2, 464(sp) # 8-byte Folded Reload lw a1, 32(a2) - lbu t2, 12(s10) - lw t3, 16(s10) - lw t4, 1092(s10) - ld a0, 0(s10) - lw t1, 64(s10) + lbu t2, 12(s4) + lw t3, 16(s4) + lw t4, 1092(s4) + ld a0, 0(s4) + lw t1, 64(s4) ld a2, 0(a2) - lw a5, 60(s10) + lw a5, 60(s4) lw a4, 32(a0) ld a3, 472(sp) # 8-byte Folded Reload lw t0, 0(a3) @@ -809,7 +809,7 @@ srli t5, a0, 32 csrr a0, vlenb slli a0, a0, 1 - li s9, 2 + li s1, 1 bltu t5, a0, .LBB3_63 # %bb.58: # %vector.ph555 # in Loop: Header=BB3_53 Depth=2 @@ -833,8 +833,8 @@ # Parent Loop BB3_53 Depth=2 # => This Inner Loop Header: Depth=3 vs2r.v v8, (a3) - sub a0, a0, s3 - add a3, a3, s3 + sub a0, a0, s7 + add a3, a3, s7 bnez a0, .LBB3_61 # %bb.62: # in Loop: Header=BB3_53 Depth=2 mv a3, t5 @@ -854,7 +854,7 @@ .LBB3_65: # in Loop: Header=BB3_53 Depth=2 mv t5, t4 mv t6, t1 - li s9, 2 + li s1, 1 j .LBB3_69 .LBB3_66: # in Loop: Header=BB3_53 Depth=2 mv t5, t4 @@ -871,18 +871,18 @@ # in Loop: Header=BB3_53 Depth=2 li a0, -4 bge a7, t5, .LBB3_70 - j .LBB3_517 + j .LBB3_514 .LBB3_70: # %if.end18.i # in Loop: Header=BB3_53 Depth=2 beq t5, a7, .LBB3_101 # %bb.71: # %if.end21.i # in Loop: Header=BB3_53 Depth=2 - lw t1, 40(s10) + lw t1, 40(s4) ld t2, 368(sp) # 8-byte Folded Reload mulw s0, t1, t2 sext.w t1, a5 bltu t1, s0, .LBB3_72 - j .LBB3_517 + j .LBB3_514 .LBB3_72: # %if.end25.i # in Loop: Header=BB3_53 Depth=2 slli a5, a5, 32 @@ -908,7 +908,7 @@ .LBB3_76: # %if.end36.i # in Loop: Header=BB3_53 Depth=2 bltu a5, s0, .LBB3_77 - j .LBB3_517 + j .LBB3_514 .LBB3_77: # %if.end42.i # in Loop: Header=BB3_53 Depth=2 slli a5, a5, 2 @@ -930,7 +930,7 @@ # %bb.79: # %if.end58.i # in Loop: Header=BB3_53 Depth=2 bltu a5, s0, .LBB3_80 - j .LBB3_517 + j .LBB3_514 .LBB3_80: # %if.end64.i # in Loop: Header=BB3_53 Depth=2 slli a5, a5, 2 @@ -952,7 +952,7 @@ # %bb.82: # %if.end80.i # in Loop: Header=BB3_53 Depth=2 bltu a5, s0, .LBB3_83 - j .LBB3_517 + j .LBB3_514 .LBB3_83: # %if.end86.i # in Loop: Header=BB3_53 Depth=2 slli a5, a5, 2 @@ -960,7 +960,7 @@ lwu a5, 0(a5) srli t1, a5, 8 bltu t1, s0, .LBB3_84 - j .LBB3_517 + j .LBB3_514 .LBB3_84: # %if.end100.i # in Loop: Header=BB3_53 Depth=2 slli t1, t1, 2 @@ -983,29 +983,29 @@ # %bb.86: # in Loop: Header=BB3_4 Depth=1 li a1, 0 .LBB3_87: # in Loop: Header=BB3_4 Depth=1 - li s6, 0 - sd zero, 432(sp) # 8-byte Folded Spill - li t6, 0 + li t1, 0 + li s10, 0 + li a7, 0 li t0, 0 li t2, 0 - sd zero, 400(sp) # 8-byte Folded Spill - li t5, 0 - sd zero, 424(sp) # 8-byte Folded Spill - li a7, 0 + sd zero, 408(sp) # 8-byte Folded Spill + li s3, 0 + li ra, 0 sd zero, 416(sp) # 8-byte Folded Spill - sd zero, 448(sp) # 8-byte Folded Spill - li s4, 0 + li t5, 0 + li s2, 0 + sd zero, 400(sp) # 8-byte Folded Spill sd zero, 392(sp) # 8-byte Folded Spill - li t1, 0 - sd zero, 376(sp) # 8-byte Folded Spill - sd zero, 456(sp) # 8-byte Folded Spill + sd zero, 424(sp) # 8-byte Folded Spill + sd zero, 384(sp) # 8-byte Folded Spill li s0, 0 + li s9, 0 + li t6, 0 + sd zero, 432(sp) # 8-byte Folded Spill + sd zero, 456(sp) # 8-byte Folded Spill + li s6, 0 + sd zero, 448(sp) # 8-byte Folded Spill sd zero, 440(sp) # 8-byte Folded Spill - sd zero, 384(sp) # 8-byte Folded Spill - sd zero, 408(sp) # 8-byte Folded Spill - li s1, 0 - li s8, 0 - li s2, 0 csrr a0, vlenb li a2, 26 mul a0, a0, a2 @@ -1058,59 +1058,59 @@ add a0, sp, a0 addi a0, a0, 496 vl4r.v v28, (a0) # Unknown-size Folded Reload - li ra, 1 + li t4, 2 li t3, -1 .LBB3_88: # %sw.bb61.i # in Loop: Header=BB3_4 Depth=1 - lw a0, 36(s10) + lw a0, 36(s4) li a2, 14 - sw a2, 8(s10) + sw a2, 8(s4) li a2, 8 blt a0, a2, .LBB3_94 # %bb.89: # %sw.bb61.if.then65_crit_edge.i # in Loop: Header=BB3_4 Depth=1 - lw a4, 32(s10) + lw a4, 32(s4) .LBB3_90: # %if.then65.i # in Loop: Header=BB3_4 Depth=1 addiw a0, a0, -8 srlw a2, a4, a0 andi a2, a2, 255 - sw a0, 36(s10) + sw a0, 36(s4) li a3, 23 beq a2, a3, .LBB3_99 # %bb.91: # %if.then65.i # in Loop: Header=BB3_4 Depth=1 li a3, 49 beq a2, a3, .LBB3_92 - j .LBB3_334 + j .LBB3_327 .LBB3_92: # %if.end105.i # in Loop: Header=BB3_4 Depth=1 - sw zero, 56(s10) + sw zero, 56(s4) j .LBB3_112 .LBB3_93: # in Loop: Header=BB3_4 Depth=1 - sd zero, 376(sp) # 8-byte Folded Spill - sd zero, 440(sp) # 8-byte Folded Spill sd zero, 384(sp) # 8-byte Folded Spill - sd zero, 408(sp) # 8-byte Folded Spill - li s1, 0 - li s8, 0 - li s2, 0 - li s0, 0 + li t6, 0 + sd zero, 432(sp) # 8-byte Folded Spill sd zero, 456(sp) # 8-byte Folded Spill - li t1, 0 - sd zero, 392(sp) # 8-byte Folded Spill - li s4, 0 + li s6, 0 sd zero, 448(sp) # 8-byte Folded Spill - sd zero, 416(sp) # 8-byte Folded Spill - li a7, 0 + sd zero, 440(sp) # 8-byte Folded Spill + li s9, 0 + li s0, 0 sd zero, 424(sp) # 8-byte Folded Spill - li t5, 0 + sd zero, 392(sp) # 8-byte Folded Spill sd zero, 400(sp) # 8-byte Folded Spill + li s2, 0 + li t5, 0 + sd zero, 416(sp) # 8-byte Folded Spill + li ra, 0 + li s3, 0 + sd zero, 408(sp) # 8-byte Folded Spill li t2, 0 li t0, 0 - li t6, 0 - sd zero, 432(sp) # 8-byte Folded Spill - li s6, 0 + li a7, 0 + li s10, 0 + li t1, 0 li a1, 0 li a2, 0 li a0, -3 @@ -1166,12 +1166,12 @@ add a3, sp, a3 addi a3, a3, 496 vl4r.v v28, (a3) # Unknown-size Folded Reload - li ra, 1 + li t4, 2 li t3, -1 - j .LBB3_346 + j .LBB3_294 .LBB3_94: # %if.end71.lr.ph.i # in Loop: Header=BB3_4 Depth=1 - ld a2, 0(s10) + ld a2, 0(s4) lw a3, 8(a2) addiw a3, a3, -1 j .LBB3_96 @@ -1183,17 +1183,18 @@ .LBB3_96: # %if.end71.i # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 - beq a3, t3, .LBB3_212 -# %bb.97: # %if.end76.i + bne a3, t3, .LBB3_97 + j .LBB3_293 +.LBB3_97: # %if.end76.i # in Loop: Header=BB3_96 Depth=2 ld a5, 0(a2) - lw a4, 32(s10) + lw a4, 32(s4) lbu a6, 0(a5) slli a4, a4, 8 or a4, a4, a6 - sw a4, 32(s10) + sw a4, 32(s4) addi a0, a0, 8 - sw a0, 36(s10) + sw a0, 36(s4) lw a6, 12(a2) addi a5, a5, 1 sd a5, 0(a2) @@ -1210,9 +1211,9 @@ .LBB3_99: # %endhdr_2.i # in Loop: Header=BB3_4 Depth=1 li a2, 1 - sw a2, 8(s10) + sw a2, 8(s4) li a0, 4 - j .LBB3_346 + j .LBB3_294 .LBB3_100: # in Loop: Header=BB3_4 Depth=1 li t3, 1 mv t4, t5 @@ -1223,10 +1224,10 @@ mv t1, t6 j .LBB3_103 .LBB3_102: # in Loop: Header=BB3_4 Depth=1 - li s9, 2 + li s1, 1 .LBB3_103: # %return_notr.i # in Loop: Header=BB3_4 Depth=1 - ld a0, 0(s10) + ld a0, 0(s4) lw a7, 36(a0) subw a4, a4, a6 addw a4, a7, a4 @@ -1240,75 +1241,74 @@ .LBB3_105: # in Loop: Header=BB3_4 Depth=1 ld a4, 464(sp) # 8-byte Folded Reload sw a1, 32(a4) - sb t2, 12(s10) - sw t3, 16(s10) - sw t4, 1092(s10) - sw t1, 64(s10) + sb t2, 12(s4) + sw t3, 16(s4) + sw t4, 1092(s4) + sw t1, 64(s4) sd a2, 0(a4) - sw a5, 60(s10) + sw a5, 60(s4) sd a3, 24(a0) sw a6, 32(a0) + li t4, 2 li t3, -1 .LBB3_106: # %if.end20 # in Loop: Header=BB3_4 Depth=1 ld a0, 472(sp) # 8-byte Folded Reload - lw a2, 0(a0) - lw a0, 1092(s10) - addiw a1, a2, 1 + lw s2, 0(a0) + lw a0, 1092(s4) + addiw a1, s2, 1 beq a0, a1, .LBB3_107 - j .LBB3_520 + j .LBB3_517 .LBB3_107: # %land.lhs.true # in Loop: Header=BB3_4 Depth=1 - lw a0, 16(s10) + lw a0, 16(s4) beqz a0, .LBB3_108 - j .LBB3_520 + j .LBB3_517 .LBB3_108: # %if.then30.thread # in Loop: Header=BB3_4 Depth=1 - li t4, 3 - sd a2, 448(sp) # 8-byte Folded Spill li a3, 14 - sw a3, 8(s10) + sw a3, 8(s4) .LBB3_109: # %if.end.i46 # in Loop: Header=BB3_4 Depth=1 lw a1, 0(s11) - lw s6, 4(s11) - lw a0, 8(s11) - sd a0, 432(sp) # 8-byte Folded Spill - lw t6, 12(s11) + lw t1, 4(s11) + lw s10, 8(s11) + lw a7, 12(s11) lw t0, 16(s11) lw t2, 20(s11) lw a0, 24(s11) - sd a0, 400(sp) # 8-byte Folded Spill - lw t5, 28(s11) - lw a0, 32(s11) - sd a0, 424(sp) # 8-byte Folded Spill - lw a7, 36(s11) - lw a0, 40(s11) + sd a0, 408(sp) # 8-byte Folded Spill + lw s3, 28(s11) + lw ra, 32(s11) + lw a0, 36(s11) sd a0, 416(sp) # 8-byte Folded Spill - lw s4, 48(s11) + lw t5, 40(s11) + lw a0, 48(s11) + sd a0, 400(sp) # 8-byte Folded Spill lw a0, 52(s11) sd a0, 392(sp) # 8-byte Folded Spill - lw t1, 56(s11) + lw a0, 56(s11) + sd a0, 424(sp) # 8-byte Folded Spill lw a0, 60(s11) - sd a0, 376(sp) # 8-byte Folded Spill - lw a0, 64(s11) - sd a0, 456(sp) # 8-byte Folded Spill - lw s0, 68(s11) - lw a0, 72(s11) - sd a0, 440(sp) # 8-byte Folded Spill - lw a0, 76(s11) sd a0, 384(sp) # 8-byte Folded Spill + lw s0, 64(s11) + lw s9, 68(s11) + lw t6, 72(s11) + lw a0, 76(s11) + sd a0, 432(sp) # 8-byte Folded Spill lw a0, 80(s11) - sd a0, 408(sp) # 8-byte Folded Spill - ld s1, 84(s11) - ld s8, 92(s11) - ld s2, 100(s11) + sd a0, 456(sp) # 8-byte Folded Spill + ld s6, 84(s11) + ld a0, 92(s11) + sd a0, 448(sp) # 8-byte Folded Spill + ld a0, 100(s11) + sd a0, 440(sp) # 8-byte Folded Spill li a2, 0 addi a3, a3, -14 li a0, -4 li a4, 27 bgeu a4, a3, .LBB3_110 - j .LBB3_346 + j .LBB3_294 .LBB3_110: # %if.end.i46 # in Loop: Header=BB3_4 Depth=1 slli a3, a3, 2 @@ -1321,30 +1321,30 @@ jr a3 .LBB3_111: # %if.end.sw.bb106_crit_edge.i # in Loop: Header=BB3_4 Depth=1 - lw a0, 36(s10) + lw a0, 36(s4) .LBB3_112: # %sw.bb106.i # in Loop: Header=BB3_4 Depth=1 li a2, 25 - sw a2, 8(s10) + sw a2, 8(s4) li a2, 8 blt a0, a2, .LBB3_115 # %bb.113: # %sw.bb106.if.then113_crit_edge.i # in Loop: Header=BB3_4 Depth=1 - lw a4, 32(s10) + lw a4, 32(s4) .LBB3_114: # %if.then113.i # in Loop: Header=BB3_4 Depth=1 - lw a2, 56(s10) + lw a2, 56(s4) addiw a0, a0, -8 srlw a3, a4, a0 - sw a0, 36(s10) + sw a0, 36(s4) slli a2, a2, 8 andi a3, a3, 255 or a2, a2, a3 - sw a2, 56(s10) + sw a2, 56(s4) j .LBB3_138 .LBB3_115: # %if.end123.lr.ph.i # in Loop: Header=BB3_4 Depth=1 - ld a2, 0(s10) + ld a2, 0(s4) lw a3, 8(a2) addiw a3, a3, -1 j .LBB3_117 @@ -1356,17 +1356,18 @@ .LBB3_117: # %if.end123.i # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 - beq a3, t3, .LBB3_212 -# %bb.118: # %if.end129.i + bne a3, t3, .LBB3_118 + j .LBB3_293 +.LBB3_118: # %if.end129.i # in Loop: Header=BB3_117 Depth=2 ld a5, 0(a2) - lw a4, 32(s10) + lw a4, 32(s4) lbu a6, 0(a5) slli a4, a4, 8 or a4, a4, a6 - sw a4, 32(s10) + sw a4, 32(s4) addi a0, a0, 8 - sw a0, 36(s10) + sw a0, 36(s4) lw a6, 12(a2) addi a5, a5, 1 sd a5, 0(a2) @@ -1382,60 +1383,60 @@ j .LBB3_116 .LBB3_120: # %if.end.sw.bb509_crit_edge.i # in Loop: Header=BB3_4 Depth=1 - lw a0, 36(s10) + lw a0, 36(s4) .LBB3_121: # %sw.bb509.i # in Loop: Header=BB3_4 Depth=1 li a2, 31 - sw a2, 8(s10) + sw a2, 8(s4) li a2, 15 blt a0, a2, .LBB3_159 # %bb.122: # %sw.bb509.if.then516_crit_edge.i # in Loop: Header=BB3_4 Depth=1 - lw a4, 32(s10) + lw a4, 32(s4) .LBB3_123: # %if.then516.i # in Loop: Header=BB3_4 Depth=1 addi a0, a0, -15 srlw a2, a4, a0 slli a2, a2, 49 srli t2, a2, 49 - sw a0, 36(s10) + sw a0, 36(s4) bnez t2, .LBB3_124 - j .LBB3_334 + j .LBB3_327 .LBB3_124: # in Loop: Header=BB3_4 Depth=1 li a1, 0 - sd t6, 296(sp) # 8-byte Folded Spill + sd t6, 32(sp) # 8-byte Folded Spill blez t2, .LBB3_165 .LBB3_125: # in Loop: Header=BB3_4 Depth=1 - li s6, 0 + li t1, 0 .LBB3_126: # %sw.bb570.i.preheader # in Loop: Header=BB3_4 Depth=1 - lw a2, 36(s10) + lw a2, 36(s4) .LBB3_127: # %sw.bb570.i # Parent Loop BB3_4 Depth=1 # => This Loop Header: Depth=2 # Child Loop BB3_133 Depth 3 li a0, 32 - sw a0, 8(s10) + sw a0, 8(s4) blez a2, .LBB3_131 # %bb.128: # %sw.bb570.if.then577_crit_edge.i # in Loop: Header=BB3_127 Depth=2 - lw a4, 32(s10) + lw a4, 32(s4) .LBB3_129: # %if.then577.i # in Loop: Header=BB3_127 Depth=2 addiw a2, a2, -1 srlw a0, a4, a2 andi a0, a0, 1 - sw a2, 36(s10) + sw a2, 36(s4) beqz a0, .LBB3_164 # %bb.130: # %if.end626.i # in Loop: Header=BB3_127 Depth=2 - addiw s6, s6, 1 + addiw t1, t1, 1 li a0, -4 - blt s6, t0, .LBB3_127 - j .LBB3_345 + blt t1, t0, .LBB3_127 + j .LBB3_192 .LBB3_131: # %if.end587.lr.ph.i # in Loop: Header=BB3_127 Depth=2 - ld a0, 0(s10) + ld a0, 0(s4) lw a3, 8(a0) addiw a3, a3, -1 j .LBB3_133 @@ -1449,17 +1450,18 @@ # Parent Loop BB3_4 Depth=1 # Parent Loop BB3_127 Depth=2 # => This Inner Loop Header: Depth=3 - beq a3, t3, .LBB3_212 -# %bb.134: # %if.end593.i + bne a3, t3, .LBB3_134 + j .LBB3_293 +.LBB3_134: # %if.end593.i # in Loop: Header=BB3_133 Depth=3 ld a5, 0(a0) - lw a4, 32(s10) + lw a4, 32(s4) lbu a6, 0(a5) slli a4, a4, 8 or a4, a4, a6 - sw a4, 32(s10) + sw a4, 32(s4) addi a2, a2, 8 - sw a2, 36(s10) + sw a2, 36(s4) lw a6, 12(a0) addi a5, a5, 1 sd a5, 0(a0) @@ -1475,65 +1477,64 @@ j .LBB3_132 .LBB3_136: # %if.end.sw.bb220_crit_edge.i # in Loop: Header=BB3_4 Depth=1 - lw a0, 36(s10) + lw a0, 36(s4) j .LBB3_141 .LBB3_137: # %if.end.sw.bb163_crit_edge.i # in Loop: Header=BB3_4 Depth=1 - lw a0, 36(s10) + lw a0, 36(s4) .LBB3_138: # %sw.bb163.i # in Loop: Header=BB3_4 Depth=1 li a2, 26 - sw a2, 8(s10) + sw a2, 8(s4) li a2, 8 blt a0, a2, .LBB3_150 # %bb.139: # %sw.bb163.if.then170_crit_edge.i # in Loop: Header=BB3_4 Depth=1 - lw a4, 32(s10) + lw a4, 32(s4) .LBB3_140: # %if.then170.i # in Loop: Header=BB3_4 Depth=1 - lw a2, 56(s10) + lw a2, 56(s4) addiw a0, a0, -8 srlw a3, a4, a0 - sw a0, 36(s10) + sw a0, 36(s4) slli a2, a2, 8 andi a3, a3, 255 or a2, a2, a3 - sw a2, 56(s10) + sw a2, 56(s4) .LBB3_141: # %sw.bb220.i # in Loop: Header=BB3_4 Depth=1 li a2, 27 - sw a2, 8(s10) + sw a2, 8(s4) li a2, 8 blt a0, a2, .LBB3_145 # %bb.142: # %sw.bb220.if.then227_crit_edge.i # in Loop: Header=BB3_4 Depth=1 - lw a4, 32(s10) + lw a4, 32(s4) .LBB3_143: # %if.then227.i # in Loop: Header=BB3_4 Depth=1 - lw a2, 56(s10) + lw a2, 56(s4) addi a0, a0, -8 srlw a3, a4, a0 - sw a0, 36(s10) + sw a0, 36(s4) slliw a0, a2, 8 andi a4, a3, 255 or a4, a0, a4 - sw a4, 56(s10) + sw a4, 56(s4) li a0, -4 - bgez a4, .LBB3_144 - j .LBB3_345 -.LBB3_144: # %if.end281.i + bltz a4, .LBB3_192 +# %bb.144: # %if.end281.i # in Loop: Header=BB3_4 Depth=1 - lw a2, 40(s10) + lw a2, 40(s4) ld a3, 368(sp) # 8-byte Folded Reload mulw a2, a2, a3 addi a5, a2, 10 li a3, 0 li a2, 0 - bge a5, a4, .LBB3_192 - j .LBB3_346 + bge a5, a4, .LBB3_193 + j .LBB3_294 .LBB3_145: # %if.end237.lr.ph.i # in Loop: Header=BB3_4 Depth=1 - ld a2, 0(s10) + ld a2, 0(s4) lw a3, 8(a2) addiw a3, a3, -1 j .LBB3_147 @@ -1545,17 +1546,18 @@ .LBB3_147: # %if.end237.i # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 - beq a3, t3, .LBB3_212 -# %bb.148: # %if.end243.i + bne a3, t3, .LBB3_148 + j .LBB3_293 +.LBB3_148: # %if.end243.i # in Loop: Header=BB3_147 Depth=2 ld a5, 0(a2) - lw a4, 32(s10) + lw a4, 32(s4) lbu a6, 0(a5) slli a4, a4, 8 or a4, a4, a6 - sw a4, 32(s10) + sw a4, 32(s4) addi a0, a0, 8 - sw a0, 36(s10) + sw a0, 36(s4) lw a6, 12(a2) addi a5, a5, 1 sd a5, 0(a2) @@ -1571,7 +1573,7 @@ j .LBB3_146 .LBB3_150: # %if.end180.lr.ph.i # in Loop: Header=BB3_4 Depth=1 - ld a2, 0(s10) + ld a2, 0(s4) lw a3, 8(a2) addiw a3, a3, -1 j .LBB3_152 @@ -1583,17 +1585,18 @@ .LBB3_152: # %if.end180.i # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 - beq a3, t3, .LBB3_212 -# %bb.153: # %if.end186.i + bne a3, t3, .LBB3_153 + j .LBB3_293 +.LBB3_153: # %if.end186.i # in Loop: Header=BB3_152 Depth=2 ld a5, 0(a2) - lw a4, 32(s10) + lw a4, 32(s4) lbu a6, 0(a5) slli a4, a4, 8 or a4, a4, a6 - sw a4, 32(s10) + sw a4, 32(s4) addi a0, a0, 8 - sw a0, 36(s10) + sw a0, 36(s4) lw a6, 12(a2) addi a5, a5, 1 sd a5, 0(a2) @@ -1609,24 +1612,23 @@ j .LBB3_151 .LBB3_155: # %if.end.sw.bb803_crit_edge.i # in Loop: Header=BB3_4 Depth=1 - lw a0, 36(s10) - j .LBB3_330 + lw a0, 36(s4) + j .LBB3_331 .LBB3_156: # %if.end.sw.bb1067_crit_edge.i # in Loop: Header=BB3_4 Depth=1 - lw a2, 36(s10) - ld t4, 456(sp) # 8-byte Folded Reload - j .LBB3_203 + lw a2, 36(s4) + j .LBB3_204 .LBB3_157: # %if.end.sw.bb1676_crit_edge.i # in Loop: Header=BB3_4 Depth=1 - lw a2, 36(s10) - j .LBB3_287 + lw a2, 36(s4) + j .LBB3_212 .LBB3_158: # %if.end.sw.bb1260_crit_edge.i # in Loop: Header=BB3_4 Depth=1 - lw a2, 36(s10) - j .LBB3_279 + lw a2, 36(s4) + j .LBB3_220 .LBB3_159: # %if.end525.lr.ph.i # in Loop: Header=BB3_4 Depth=1 - ld a2, 0(s10) + ld a2, 0(s4) lw a3, 8(a2) addiw a3, a3, -1 j .LBB3_161 @@ -1639,17 +1641,18 @@ .LBB3_161: # %if.end525.i # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 - beq a3, t3, .LBB3_212 -# %bb.162: # %if.end531.i + bne a3, t3, .LBB3_162 + j .LBB3_293 +.LBB3_162: # %if.end531.i # in Loop: Header=BB3_161 Depth=2 ld a5, 0(a2) - lw a4, 32(s10) + lw a4, 32(s4) lbu a6, 0(a5) slli a4, a4, 8 or a4, a4, a6 - sw a4, 32(s10) + sw a4, 32(s4) addi a0, a0, 8 - sw a0, 36(s10) + sw a0, 36(s4) lw a6, 12(a2) addi a5, a5, 1 sd a5, 0(a2) @@ -1665,12 +1668,12 @@ j .LBB3_160 .LBB3_164: # %while.end632.i # in Loop: Header=BB3_4 Depth=1 - add a0, s10, a1 + add a0, s4, a1 lui a2, 6 add a0, a0, a2 - sb s6, 1310(a0) + sb t1, 1310(a0) addiw a1, a1, 1 - sd t6, 296(sp) # 8-byte Folded Spill + sd t6, 32(sp) # 8-byte Folded Spill blt a1, t2, .LBB3_125 .LBB3_165: # %for.end638.i # in Loop: Header=BB3_4 Depth=1 @@ -1710,16 +1713,16 @@ blt a1, t0, .LBB3_171 .LBB3_172: # %for.cond650.preheader.i # in Loop: Header=BB3_4 Depth=1 - ld t4, 416(sp) # 8-byte Folded Reload blez t2, .LBB3_187 # %bb.173: # %for.body653.preheader.i # in Loop: Header=BB3_4 Depth=1 sd t0, 240(sp) # 8-byte Folded Spill - sd a7, 48(sp) # 8-byte Folded Spill + sd a7, 376(sp) # 8-byte Folded Spill li a0, 0 srli a1, t3, 32 - sd t4, 416(sp) # 8-byte Folded Spill - sd t5, 352(sp) # 8-byte Folded Spill + sd s0, 40(sp) # 8-byte Folded Spill + sd s6, 280(sp) # 8-byte Folded Spill + sd s9, 288(sp) # 8-byte Folded Spill j .LBB3_175 .LBB3_174: # %while.end671.i # in Loop: Header=BB3_175 Depth=2 @@ -1734,7 +1737,7 @@ # => This Loop Header: Depth=2 # Child Loop BB3_184 Depth 3 # Child Loop BB3_182 Depth 3 - add a2, s10, a0 + add a2, s4, a0 lui a3, 6 add a3, a2, a3 lbu a4, 1310(a3) @@ -1751,10 +1754,10 @@ j .LBB3_181 .LBB3_178: # %vector.scevcheck493 # in Loop: Header=BB3_175 Depth=2 - mv s9, s8 - mv s8, s1 - mv s1, s0 - mv s0, t1 + mv s10, s2 + mv s2, s3 + mv s3, t5 + mv t5, t1 addi a6, a4, -1 andi a7, a6, 255 sltu t0, a6, a7 @@ -1779,11 +1782,10 @@ .LBB3_180: # in Loop: Header=BB3_175 Depth=2 mv a6, a4 mv a5, a4 - mv t1, s0 - mv s0, s1 - mv s1, s8 - mv s8, s9 - li s9, 2 + mv t1, t5 + mv t5, s3 + mv s3, s2 + mv s2, s10 .LBB3_181: # %while.body663.i.preheader577 # in Loop: Header=BB3_175 Depth=2 add a4, t6, a6 @@ -1804,16 +1806,14 @@ j .LBB3_174 .LBB3_183: # %vector.ph511 # in Loop: Header=BB3_175 Depth=2 - mv t5, s4 - mv s4, s6 - mv s6, s2 - mv t4, t2 + mv s0, t2 andi t0, a4, 224 andi a6, a4, 31 sub a5, a4, t0 addi t1, sp, 467 add t1, t1, a4 mv t2, t0 + li s6, 32 .LBB3_184: # %vector.body520 # Parent Loop BB3_4 Depth=1 # Parent Loop BB3_175 Depth=2 @@ -1821,8 +1821,7 @@ and t3, a7, a1 add t3, t6, t3 addi t3, t3, -31 - li s2, 32 - vsetvli zero, s2, e8, m2, ta, ma + vsetvli zero, s6, e8, m2, ta, ma vle8.v v8, (t3) addi t3, t1, -16 vse8.v v8, (t3) @@ -1833,30 +1832,29 @@ # %bb.185: # %middle.block508 # in Loop: Header=BB3_175 Depth=2 li t3, -1 - mv t2, t4 - mv t1, s0 - mv s0, s1 - mv s1, s8 - mv s8, s9 - mv s2, s6 - mv s6, s4 - mv s4, t5 - li s9, 2 - ld t5, 352(sp) # 8-byte Folded Reload + mv t2, s0 + ld s9, 288(sp) # 8-byte Folded Reload + ld s6, 280(sp) # 8-byte Folded Reload + ld s0, 40(sp) # 8-byte Folded Reload + mv t1, t5 + mv t5, s3 + mv s3, s2 + mv s2, s10 beq t0, a4, .LBB3_174 j .LBB3_181 .LBB3_186: # in Loop: Header=BB3_4 Depth=1 mv a1, t2 - ld a7, 48(sp) # 8-byte Folded Reload + ld a7, 376(sp) # 8-byte Folded Reload ld t0, 240(sp) # 8-byte Folded Reload j .LBB3_188 .LBB3_187: # in Loop: Header=BB3_4 Depth=1 li a1, 0 .LBB3_188: # %for.end677.i # in Loop: Header=BB3_4 Depth=1 - li a0, 0 - ld t6, 296(sp) # 8-byte Folded Reload - j .LBB3_213 + li s10, 0 + ld t6, 32(sp) # 8-byte Folded Reload + ld a2, 424(sp) # 8-byte Folded Reload + j .LBB3_228 .LBB3_189: # %vector.ph534 # in Loop: Header=BB3_4 Depth=1 li a1, 0 @@ -1878,33 +1876,36 @@ # in Loop: Header=BB3_4 Depth=1 bne t0, a0, .LBB3_171 j .LBB3_172 -.LBB3_192: # %for.cond.i +.LBB3_192: # in Loop: Header=BB3_4 Depth=1 + li a2, 0 + j .LBB3_294 +.LBB3_193: # %for.cond.i # in Loop: Header=BB3_4 Depth=1 li a0, 16 - bge a3, a0, .LBB3_197 -# %bb.193: # in Loop: Header=BB3_4 Depth=1 + bge a3, a0, .LBB3_198 +# %bb.194: # in Loop: Header=BB3_4 Depth=1 mv a1, a3 -.LBB3_194: # %sw.bb292.i +.LBB3_195: # %sw.bb292.i # in Loop: Header=BB3_4 Depth=1 - lw a0, 36(s10) + lw a0, 36(s4) li a2, 28 - sw a2, 8(s10) - blez a0, .LBB3_198 -# %bb.195: # %sw.bb292.if.then299_crit_edge.i + sw a2, 8(s4) + blez a0, .LBB3_199 +# %bb.196: # %sw.bb292.if.then299_crit_edge.i # in Loop: Header=BB3_4 Depth=1 - lw a4, 32(s10) -.LBB3_196: # %if.then299.i + lw a4, 32(s4) +.LBB3_197: # %if.then299.i # in Loop: Header=BB3_4 Depth=1 addi a0, a0, -1 - sw a0, 36(s10) + sw a0, 36(s4) srlw a0, a4, a0 - add a2, s10, a1 + add a2, s4, a1 addi a2, a2, 2047 andi a0, a0, 1 sb a0, 1405(a2) addiw a3, a1, 1 - j .LBB3_192 -.LBB3_197: # %for.body357.preheader.i + j .LBB3_193 +.LBB3_198: # %for.body357.preheader.i # in Loop: Header=BB3_4 Depth=1 li a2, 256 ld a0, 208(sp) # 8-byte Folded Reload @@ -1961,39 +1962,39 @@ add a3, sp, a3 addi a3, a3, 496 vs4r.v v28, (a3) # Unknown-size Folded Spill - sd s8, 288(sp) # 8-byte Folded Spill - sd s0, 56(sp) # 8-byte Folded Spill - mv s0, t6 - sd s6, 256(sp) # 8-byte Folded Spill - sd s4, 248(sp) # 8-byte Folded Spill - sd s2, 264(sp) # 8-byte Folded Spill - mv s2, a7 - sd s7, 272(sp) # 8-byte Folded Spill - sd s3, 280(sp) # 8-byte Folded Spill + sd s9, 288(sp) # 8-byte Folded Spill + sd s10, 344(sp) # 8-byte Folded Spill + mv s10, a7 + sd s8, 248(sp) # 8-byte Folded Spill + sd s7, 256(sp) # 8-byte Folded Spill + sd s3, 352(sp) # 8-byte Folded Spill mv s3, t0 - mv s9, s1 - mv s1, t2 - mv s7, t1 - mv s4, t5 + mv s8, t6 + sd s6, 280(sp) # 8-byte Folded Spill + sd s2, 336(sp) # 8-byte Folded Spill + mv s2, t2 + mv s7, s0 + sd t1, 48(sp) # 8-byte Folded Spill + mv s6, t5 + mv s0, ra call memset@plt - mv t5, s4 - mv t1, s7 - mv t2, s1 - mv s1, s9 - li s9, 2 + mv ra, s0 + mv t5, s6 + ld t1, 48(sp) # 8-byte Folded Reload + mv s0, s7 + mv t2, s2 + ld s2, 336(sp) # 8-byte Folded Reload + ld s6, 280(sp) # 8-byte Folded Reload + mv t6, s8 mv t0, s3 - ld s3, 280(sp) # 8-byte Folded Reload - ld s7, 272(sp) # 8-byte Folded Reload - mv a7, s2 - ld s2, 264(sp) # 8-byte Folded Reload - ld s4, 248(sp) # 8-byte Folded Reload - ld s6, 256(sp) # 8-byte Folded Reload - mv t6, s0 - ld s0, 56(sp) # 8-byte Folded Reload - ld s8, 288(sp) # 8-byte Folded Reload + ld s3, 352(sp) # 8-byte Folded Reload + ld s7, 256(sp) # 8-byte Folded Reload + ld s8, 248(sp) # 8-byte Folded Reload + mv a7, s10 + ld s10, 344(sp) # 8-byte Folded Reload + ld s9, 288(sp) # 8-byte Folded Reload li t3, -1 - li t4, 3 - li ra, 1 + li t4, 2 csrr a0, vlenb slli a0, a0, 3 add a0, sp, a0 @@ -2047,180 +2048,277 @@ addi a0, a0, 496 vl2r.v v16, (a0) # Unknown-size Folded Reload li a1, 0 - j .LBB3_295 -.LBB3_198: # %if.end309.lr.ph.i + j .LBB3_296 +.LBB3_199: # %if.end309.lr.ph.i # in Loop: Header=BB3_4 Depth=1 - ld a2, 0(s10) + ld a2, 0(s4) lw a3, 8(a2) addiw a3, a3, -1 - j .LBB3_200 -.LBB3_199: # %if.end342.i - # in Loop: Header=BB3_200 Depth=2 + j .LBB3_201 +.LBB3_200: # %if.end342.i + # in Loop: Header=BB3_201 Depth=2 addiw a5, a0, -8 addiw a3, a3, -1 li a6, -8 - blt a6, a5, .LBB3_196 -.LBB3_200: # %if.end309.i + blt a6, a5, .LBB3_197 +.LBB3_201: # %if.end309.i # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 - beq a3, t3, .LBB3_212 -# %bb.201: # %if.end315.i - # in Loop: Header=BB3_200 Depth=2 + beq a3, t3, .LBB3_293 +# %bb.202: # %if.end315.i + # in Loop: Header=BB3_201 Depth=2 ld a5, 0(a2) - lw a4, 32(s10) + lw a4, 32(s4) lbu a6, 0(a5) slli a4, a4, 8 or a4, a4, a6 - sw a4, 32(s10) + sw a4, 32(s4) addi a0, a0, 8 - sw a0, 36(s10) + sw a0, 36(s4) lw a6, 12(a2) addi a5, a5, 1 sd a5, 0(a2) sw a3, 8(a2) addiw a6, a6, 1 sw a6, 12(a2) - bnez a6, .LBB3_199 -# %bb.202: # %if.then338.i - # in Loop: Header=BB3_200 Depth=2 + bnez a6, .LBB3_200 +# %bb.203: # %if.then338.i + # in Loop: Header=BB3_201 Depth=2 lw a5, 16(a2) addi a5, a5, 1 sw a5, 16(a2) - j .LBB3_199 -.LBB3_203: # %sw.bb1067.i + j .LBB3_200 +.LBB3_204: # %sw.bb1067.i # in Loop: Header=BB3_4 Depth=1 li a0, 37 - sw a0, 8(s10) - blez a2, .LBB3_206 -# %bb.204: # %sw.bb1067.if.then1074_crit_edge.i + sw a0, 8(s4) + blez a2, .LBB3_207 +# %bb.205: # %sw.bb1067.if.then1074_crit_edge.i # in Loop: Header=BB3_4 Depth=1 - lw a4, 32(s10) -.LBB3_205: # %if.then1074.i + lw a4, 32(s4) +.LBB3_206: # %if.then1074.i # in Loop: Header=BB3_4 Depth=1 addiw a2, a2, -1 srlw a0, a4, a2 - andi a3, a0, 1 - sw a2, 36(s10) - slliw a0, s0, 1 - sd a3, 440(sp) # 8-byte Folded Spill - or s0, a3, a0 - j .LBB3_273 -.LBB3_206: # %if.end1083.lr.ph.i + andi t6, a0, 1 + sw a2, 36(s4) + slliw a0, s9, 1 + or s9, t6, a0 + j .LBB3_287 +.LBB3_207: # %if.end1083.lr.ph.i # in Loop: Header=BB3_4 Depth=1 - ld a0, 0(s10) + ld a0, 0(s4) lw a3, 8(a0) addiw a3, a3, -1 + j .LBB3_209 +.LBB3_208: # %if.end1116.i + # in Loop: Header=BB3_209 Depth=2 + addiw a5, a2, -8 + addiw a3, a3, -1 + li a6, -8 + blt a6, a5, .LBB3_206 +.LBB3_209: # %if.end1083.i + # Parent Loop BB3_4 Depth=1 + # => This Inner Loop Header: Depth=2 + beq a3, t3, .LBB3_293 +# %bb.210: # %if.end1089.i + # in Loop: Header=BB3_209 Depth=2 + ld a5, 0(a0) + lw a4, 32(s4) + lbu a6, 0(a5) + slli a4, a4, 8 + or a4, a4, a6 + sw a4, 32(s4) + addi a2, a2, 8 + sw a2, 36(s4) + lw a6, 12(a0) + addi a5, a5, 1 + sd a5, 0(a0) + sw a3, 8(a0) + addiw a6, a6, 1 + sw a6, 12(a0) + bnez a6, .LBB3_208 +# %bb.211: # %if.then1112.i + # in Loop: Header=BB3_209 Depth=2 + lw a5, 16(a0) + addi a5, a5, 1 + sw a5, 16(a0) j .LBB3_208 -.LBB3_207: # %if.end1116.i - # in Loop: Header=BB3_208 Depth=2 +.LBB3_212: # %sw.bb1676.i + # in Loop: Header=BB3_4 Depth=1 + li a0, 41 + sw a0, 8(s4) + blez a2, .LBB3_215 +# %bb.213: # %sw.bb1676.if.then1683_crit_edge.i + # in Loop: Header=BB3_4 Depth=1 + lw a4, 32(s4) +.LBB3_214: # %if.then1683.i + # in Loop: Header=BB3_4 Depth=1 + addiw a2, a2, -1 + srlw a0, a4, a2 + andi t6, a0, 1 + sw a2, 36(s4) + slliw a0, s9, 1 + or s9, t6, a0 + j .LBB3_506 +.LBB3_215: # %if.end1692.lr.ph.i + # in Loop: Header=BB3_4 Depth=1 + ld a0, 0(s4) + lw a3, 8(a0) + addiw a3, a3, -1 + j .LBB3_217 +.LBB3_216: # %if.end1725.i + # in Loop: Header=BB3_217 Depth=2 addiw a5, a2, -8 addiw a3, a3, -1 li a6, -8 - blt a6, a5, .LBB3_205 -.LBB3_208: # %if.end1083.i + blt a6, a5, .LBB3_214 +.LBB3_217: # %if.end1692.i # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 - beq a3, t3, .LBB3_211 -# %bb.209: # %if.end1089.i - # in Loop: Header=BB3_208 Depth=2 + beq a3, t3, .LBB3_293 +# %bb.218: # %if.end1698.i + # in Loop: Header=BB3_217 Depth=2 ld a5, 0(a0) - lw a4, 32(s10) + lw a4, 32(s4) lbu a6, 0(a5) slli a4, a4, 8 or a4, a4, a6 - sw a4, 32(s10) + sw a4, 32(s4) addi a2, a2, 8 - sw a2, 36(s10) + sw a2, 36(s4) lw a6, 12(a0) addi a5, a5, 1 sd a5, 0(a0) sw a3, 8(a0) addiw a6, a6, 1 sw a6, 12(a0) - bnez a6, .LBB3_207 -# %bb.210: # %if.then1112.i - # in Loop: Header=BB3_208 Depth=2 + bnez a6, .LBB3_216 +# %bb.219: # %if.then1721.i + # in Loop: Header=BB3_217 Depth=2 lw a5, 16(a0) addi a5, a5, 1 sw a5, 16(a0) - j .LBB3_207 -.LBB3_211: # in Loop: Header=BB3_4 Depth=1 - sd t4, 456(sp) # 8-byte Folded Spill -.LBB3_212: # in Loop: Header=BB3_4 Depth=1 - li a2, 0 - li a0, 0 - j .LBB3_346 -.LBB3_213: # %for.cond678.i + j .LBB3_216 +.LBB3_220: # %sw.bb1260.i # in Loop: Header=BB3_4 Depth=1 - bge a0, t0, .LBB3_223 -# %bb.214: # in Loop: Header=BB3_4 Depth=1 - sd a0, 432(sp) # 8-byte Folded Spill -.LBB3_215: # %sw.bb682.i + li a0, 39 + sw a0, 8(s4) + blez a2, .LBB3_223 +# %bb.221: # %sw.bb1260.if.then1267_crit_edge.i + # in Loop: Header=BB3_4 Depth=1 + lw a4, 32(s4) +.LBB3_222: # %if.then1267.i + # in Loop: Header=BB3_4 Depth=1 + addiw a2, a2, -1 + srlw a0, a4, a2 + andi t6, a0, 1 + sw a2, 36(s4) + slliw a0, s9, 1 + or s9, t6, a0 + j .LBB3_379 +.LBB3_223: # %if.end1276.lr.ph.i + # in Loop: Header=BB3_4 Depth=1 + ld a0, 0(s4) + lw a3, 8(a0) + addiw a3, a3, -1 + j .LBB3_225 +.LBB3_224: # %if.end1309.i + # in Loop: Header=BB3_225 Depth=2 + addiw a5, a2, -8 + addiw a3, a3, -1 + li a6, -8 + blt a6, a5, .LBB3_222 +.LBB3_225: # %if.end1276.i + # Parent Loop BB3_4 Depth=1 + # => This Inner Loop Header: Depth=2 + beq a3, t3, .LBB3_293 +# %bb.226: # %if.end1282.i + # in Loop: Header=BB3_225 Depth=2 + ld a5, 0(a0) + lw a4, 32(s4) + lbu a6, 0(a5) + slli a4, a4, 8 + or a4, a4, a6 + sw a4, 32(s4) + addi a2, a2, 8 + sw a2, 36(s4) + lw a6, 12(a0) + addi a5, a5, 1 + sd a5, 0(a0) + sw a3, 8(a0) + addiw a6, a6, 1 + sw a6, 12(a0) + bnez a6, .LBB3_224 +# %bb.227: # %if.then1305.i + # in Loop: Header=BB3_225 Depth=2 + lw a5, 16(a0) + addi a5, a5, 1 + sw a5, 16(a0) + j .LBB3_224 +.LBB3_228: # %for.cond678.i + # in Loop: Header=BB3_4 Depth=1 + sd a2, 424(sp) # 8-byte Folded Spill + bge s10, t0, .LBB3_237 +.LBB3_229: # %sw.bb682.i # in Loop: Header=BB3_4 Depth=1 - lw a0, 36(s10) + lw a0, 36(s4) li a2, 33 - sw a2, 8(s10) + sw a2, 8(s4) li a2, 5 - blt a0, a2, .LBB3_218 -# %bb.216: # %sw.bb682.if.then689_crit_edge.i + blt a0, a2, .LBB3_232 +# %bb.230: # %sw.bb682.if.then689_crit_edge.i # in Loop: Header=BB3_4 Depth=1 - lw a2, 32(s10) -.LBB3_217: # %if.then689.i + lw a2, 32(s4) +.LBB3_231: # %if.then689.i # in Loop: Header=BB3_4 Depth=1 li a1, 0 addi a0, a0, -5 srlw a2, a2, a0 - sw a0, 36(s10) - andi t1, a2, 31 - j .LBB3_277 -.LBB3_218: # %if.end698.lr.ph.i + sw a0, 36(s4) + andi a2, a2, 31 + j .LBB3_291 +.LBB3_232: # %if.end698.lr.ph.i # in Loop: Header=BB3_4 Depth=1 - ld a3, 0(s10) + ld a3, 0(s4) lw a4, 8(a3) addiw a4, a4, -1 - j .LBB3_220 -.LBB3_219: # %if.end731.i - # in Loop: Header=BB3_220 Depth=2 + j .LBB3_234 +.LBB3_233: # %if.end731.i + # in Loop: Header=BB3_234 Depth=2 addiw a5, a0, -8 addiw a4, a4, -1 li a6, -4 - blt a6, a5, .LBB3_217 -.LBB3_220: # %if.end698.i + blt a6, a5, .LBB3_231 +.LBB3_234: # %if.end698.i # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 - beq a4, t3, .LBB3_212 -# %bb.221: # %if.end704.i - # in Loop: Header=BB3_220 Depth=2 + beq a4, t3, .LBB3_293 +# %bb.235: # %if.end704.i + # in Loop: Header=BB3_234 Depth=2 ld a5, 0(a3) - lw a2, 32(s10) + lw a2, 32(s4) lbu a6, 0(a5) slli a2, a2, 8 or a2, a2, a6 - sw a2, 32(s10) + sw a2, 32(s4) addi a0, a0, 8 - sw a0, 36(s10) + sw a0, 36(s4) lw a6, 12(a3) addi a5, a5, 1 sd a5, 0(a3) sw a4, 8(a3) addiw a6, a6, 1 sw a6, 12(a3) - bnez a6, .LBB3_219 -# %bb.222: # %if.then727.i - # in Loop: Header=BB3_220 Depth=2 + bnez a6, .LBB3_233 +# %bb.236: # %if.then727.i + # in Loop: Header=BB3_234 Depth=2 lw a5, 16(a3) addi a5, a5, 1 sw a5, 16(a3) - j .LBB3_219 -.LBB3_223: # %for.cond875.preheader.i + j .LBB3_233 +.LBB3_237: # %for.cond875.preheader.i # in Loop: Header=BB3_4 Depth=1 - sd t6, 296(sp) # 8-byte Folded Spill - sd a7, 48(sp) # 8-byte Folded Spill - sd t0, 240(sp) # 8-byte Folded Spill - sd t2, 40(sp) # 8-byte Folded Spill - sd t1, 32(sp) # 8-byte Folded Spill - sd s0, 56(sp) # 8-byte Folded Spill - sd s1, 24(sp) # 8-byte Folded Spill csrr a0, vlenb li a1, 26 mul a0, a0, a1 @@ -2273,113 +2371,123 @@ add a0, sp, a0 addi a0, a0, 496 vs4r.v v28, (a0) # Unknown-size Folded Spill - blez t0, .LBB3_260 -# %bb.224: # %for.cond879.preheader.lr.ph.i + sd a7, 376(sp) # 8-byte Folded Spill + sd t0, 240(sp) # 8-byte Folded Spill + sd t6, 32(sp) # 8-byte Folded Spill + sd t2, 24(sp) # 8-byte Folded Spill + sd s0, 40(sp) # 8-byte Folded Spill + sd t1, 48(sp) # 8-byte Folded Spill + blez t0, .LBB3_274 +# %bb.238: # %for.cond879.preheader.lr.ph.i # in Loop: Header=BB3_4 Depth=1 li a0, 0 srli a2, t3, 32 - slli a1, t6, 32 + slli a1, a7, 32 srli a1, a1, 32 addi a2, a2, -3 - sd a2, 64(sp) # 8-byte Folded Spill - ld s0, 144(sp) # 8-byte Folded Reload + sd a2, 56(sp) # 8-byte Folded Spill + ld a3, 144(sp) # 8-byte Folded Reload ld a4, 152(sp) # 8-byte Folded Reload ld a5, 160(sp) # 8-byte Folded Reload - sd s8, 288(sp) # 8-byte Folded Spill - sd s2, 264(sp) # 8-byte Folded Spill - sd s6, 256(sp) # 8-byte Folded Spill - sd s4, 248(sp) # 8-byte Folded Spill + sd s9, 288(sp) # 8-byte Folded Spill + sd s6, 280(sp) # 8-byte Folded Spill + sd s4, 64(sp) # 8-byte Folded Spill sd s11, 216(sp) # 8-byte Folded Spill - sd s3, 280(sp) # 8-byte Folded Spill - sd s7, 272(sp) # 8-byte Folded Spill - j .LBB3_226 -.LBB3_225: # %CreateDecodeTables.exit.i - # in Loop: Header=BB3_226 Depth=2 + sd s7, 256(sp) # 8-byte Folded Spill + sd s8, 248(sp) # 8-byte Folded Spill + j .LBB3_240 +.LBB3_239: # %CreateDecodeTables.exit.i + # in Loop: Header=BB3_240 Depth=2 slli a2, a0, 2 - add a2, s10, a2 + add a2, s4, a2 lui a7, 16 add a2, a2, a7 sw a6, -1524(a2) addi a0, a0, 1 addi a5, a5, 258 addi a4, a4, 1032 - addi s0, s0, 1032 + addi a3, a3, 1032 + ld a7, 376(sp) # 8-byte Folded Reload ld a2, 240(sp) # 8-byte Folded Reload - beq a0, a2, .LBB3_259 -.LBB3_226: # %for.cond879.preheader.i + beq a0, a2, .LBB3_273 +.LBB3_240: # %for.cond879.preheader.i # Parent Loop BB3_4 Depth=1 # => This Loop Header: Depth=2 - # Child Loop BB3_231 Depth 3 - # Child Loop BB3_250 Depth 3 - # Child Loop BB3_235 Depth 3 - # Child Loop BB3_237 Depth 4 - # Child Loop BB3_240 Depth 3 - # Child Loop BB3_244 Depth 3 - # Child Loop BB3_255 Depth 3 + # Child Loop BB3_245 Depth 3 + # Child Loop BB3_264 Depth 3 + # Child Loop BB3_249 Depth 3 + # Child Loop BB3_251 Depth 4 + # Child Loop BB3_254 Depth 3 # Child Loop BB3_258 Depth 3 + # Child Loop BB3_269 Depth 3 + # Child Loop BB3_272 Depth 3 li a2, 1032 - mul ra, a0, a2 + mul t6, a0, a2 lui a2, 13 - addiw s2, a2, -1544 + addiw s10, a2, -1544 lui s1, 13 - addiw a3, a2, -1556 - sd s0, 448(sp) # 8-byte Folded Spill - blez t6, .LBB3_229 -# %bb.227: # %for.body882.i.preheader - # in Loop: Header=BB3_226 Depth=2 + addiw s2, a2, -1556 + sd a3, 408(sp) # 8-byte Folded Spill + blez a7, .LBB3_243 +# %bb.241: # %for.body882.i.preheader + # in Loop: Header=BB3_240 Depth=2 csrr a2, vlenb srli a6, a2, 1 - bgeu a1, a6, .LBB3_230 -# %bb.228: # in Loop: Header=BB3_226 Depth=2 + bgeu a1, a6, .LBB3_244 +# %bb.242: # in Loop: Header=BB3_240 Depth=2 li a2, 0 li a7, 0 li a6, 32 - j .LBB3_248 -.LBB3_229: # %for.cond12.preheader.i.thread.i - # in Loop: Header=BB3_226 Depth=2 + j .LBB3_262 +.LBB3_243: # %for.cond12.preheader.i.thread.i + # in Loop: Header=BB3_240 Depth=2 li a7, 0 - sd zero, 432(sp) # 8-byte Folded Spill - sd zero, 424(sp) # 8-byte Folded Spill - sd zero, 416(sp) # 8-byte Folded Spill - sd zero, 400(sp) # 8-byte Folded Spill - sd zero, 352(sp) # 8-byte Folded Spill - sd zero, 344(sp) # 8-byte Folded Spill + sd a4, 296(sp) # 8-byte Folded Spill + li a4, 0 li s11, 0 - mv a6, s2 - li s2, 0 + li a3, 0 li s3, 0 li s7, 0 li s1, 0 li s9, 0 + lui ra, 13 li s8, 0 + mv a6, s10 li s0, 0 - mv t3, s10 li s10, 0 - li t1, 0 li s6, 0 + li t1, 0 + sd zero, 352(sp) # 8-byte Folded Spill + sd zero, 344(sp) # 8-byte Folded Spill + sd zero, 336(sp) # 8-byte Folded Spill + sd zero, 328(sp) # 8-byte Folded Spill + sd zero, 320(sp) # 8-byte Folded Spill li t0, 0 li t2, 0 + li t3, 0 li t4, 0 - li s4, 0 li t5, 0 - add t6, t3, ra + mv a2, t6 + add t6, s4, t6 add a6, t6, a6 vsetivli zero, 4, e32, m1, ta, ma vse32.v v13, (a6) - add a6, t6, a3 + add a6, t6, s2 + mv s2, a4 + ld a4, 296(sp) # 8-byte Folded Reload vse32.v v13, (a6) - addiw a6, a2, -1620 + addiw a6, ra, -1620 add a6, t6, a6 vsetivli zero, 16, e32, m4, ta, ma vse32.v v20, (a6) - ld a6, 336(sp) # 8-byte Folded Reload + ld a6, 312(sp) # 8-byte Folded Reload add t6, t6, a6 li a6, 32 - j .LBB3_242 -.LBB3_230: # %vector.ph482 - # in Loop: Header=BB3_226 Depth=2 + j .LBB3_256 +.LBB3_244: # %vector.ph482 + # in Loop: Header=BB3_240 Depth=2 srli a2, a2, 3 - ld a6, 64(sp) # 8-byte Folded Reload + ld a6, 56(sp) # 8-byte Folded Reload mul a2, a2, a6 and a2, a2, a1 vsetvli a6, zero, e32, m2, ta, ma @@ -2387,86 +2495,85 @@ mv a7, a5 vmv2r.v v8, v18 vmv2r.v v10, v24 -.LBB3_231: # %vector.body487 +.LBB3_245: # %vector.body487 # Parent Loop BB3_4 Depth=1 - # Parent Loop BB3_226 Depth=2 + # Parent Loop BB3_240 Depth=2 # => This Inner Loop Header: Depth=3 vle8.v v12, (a7) vzext.vf4 v14, v12 vmax.vv v10, v10, v14 vmin.vv v8, v8, v14 - sub a6, a6, s7 - add a7, a7, s7 - bnez a6, .LBB3_231 -# %bb.232: # %middle.block479 - # in Loop: Header=BB3_226 Depth=2 + sub a6, a6, s8 + add a7, a7, s8 + bnez a6, .LBB3_245 +# %bb.246: # %middle.block479 + # in Loop: Header=BB3_240 Depth=2 vredmax.vs v10, v10, v10 vmv.x.s a7, v10 vredmin.vs v8, v8, v8 vmv.x.s a6, v8 - bne a2, a1, .LBB3_248 -.LBB3_233: # %for.cond1.preheader.lr.ph.i.i - # in Loop: Header=BB3_226 Depth=2 + bne a2, a1, .LBB3_262 +.LBB3_247: # %for.cond1.preheader.lr.ph.i.i + # in Loop: Header=BB3_240 Depth=2 li a2, 0 - add t6, s10, ra - ld t0, 328(sp) # 8-byte Folded Reload + sd t6, 296(sp) # 8-byte Folded Spill + add t6, s4, t6 + ld t0, 304(sp) # 8-byte Folded Reload add t0, t6, t0 mv t1, a6 - j .LBB3_235 -.LBB3_234: # %for.cond1.for.inc9_crit_edge.us.i.i - # in Loop: Header=BB3_235 Depth=3 + j .LBB3_249 +.LBB3_248: # %for.cond1.for.inc9_crit_edge.us.i.i + # in Loop: Header=BB3_249 Depth=3 addi t1, t1, 1 - beq t5, a7, .LBB3_239 -.LBB3_235: # %for.cond1.preheader.us.i.i + beq t5, a7, .LBB3_253 +.LBB3_249: # %for.cond1.preheader.us.i.i # Parent Loop BB3_4 Depth=1 - # Parent Loop BB3_226 Depth=2 + # Parent Loop BB3_240 Depth=2 # => This Loop Header: Depth=3 - # Child Loop BB3_237 Depth 4 + # Child Loop BB3_251 Depth 4 li t2, 0 mv t3, a5 mv t4, a1 - j .LBB3_237 -.LBB3_236: # %for.inc.us.i.i - # in Loop: Header=BB3_237 Depth=4 + j .LBB3_251 +.LBB3_250: # %for.inc.us.i.i + # in Loop: Header=BB3_251 Depth=4 addi t2, t2, 1 addi t4, t4, -1 addi t3, t3, 1 - beqz t4, .LBB3_234 -.LBB3_237: # %for.body3.us.i.i + beqz t4, .LBB3_248 +.LBB3_251: # %for.body3.us.i.i # Parent Loop BB3_4 Depth=1 - # Parent Loop BB3_226 Depth=2 - # Parent Loop BB3_235 Depth=3 + # Parent Loop BB3_240 Depth=2 + # Parent Loop BB3_249 Depth=3 # => This Inner Loop Header: Depth=4 lbu s0, 0(t3) sext.w t5, t1 - bne t5, s0, .LBB3_236 -# %bb.238: # %if.then.us.i.i - # in Loop: Header=BB3_237 Depth=4 + bne t5, s0, .LBB3_250 +# %bb.252: # %if.then.us.i.i + # in Loop: Header=BB3_251 Depth=4 slli s0, a2, 2 add s0, t0, s0 sw t2, 0(s0) addiw a2, a2, 1 - j .LBB3_236 -.LBB3_239: # %for.cond12.preheader.i.i - # in Loop: Header=BB3_226 Depth=2 - sd ra, 320(sp) # 8-byte Folded Spill - mv ra, s10 - addiw t3, s1, -1620 - add t3, t6, t3 - add a2, t6, s2 + j .LBB3_250 +.LBB3_253: # %for.cond12.preheader.i.i + # in Loop: Header=BB3_240 Depth=2 + addiw s4, s1, -1620 + add s4, t6, s4 + add a2, t6, s10 vsetivli zero, 4, e32, m1, ta, ma vse32.v v13, (a2) - add a2, t6, a3 + add a2, t6, s2 vse32.v v13, (a2) vsetivli zero, 16, e32, m4, ta, ma - vse32.v v20, (t3) - ld a2, 336(sp) # 8-byte Folded Reload + vse32.v v20, (s4) + ld a2, 312(sp) # 8-byte Folded Reload add t6, t6, a2 mv a2, a5 mv t0, a1 -.LBB3_240: # %for.body24.i.i +.LBB3_254: # %for.body24.i.i # Parent Loop BB3_4 Depth=1 - # Parent Loop BB3_226 Depth=2 + # Parent Loop BB3_240 Depth=2 # => This Inner Loop Header: Depth=3 lbu t1, 0(a2) slli t1, t1, 2 @@ -2476,126 +2583,124 @@ sw t2, 0(t1) addi t0, t0, -1 addi a2, a2, 1 - bnez t0, .LBB3_240 -# %bb.241: # %for.cond34.preheader.loopexit.i.i - # in Loop: Header=BB3_226 Depth=2 - lw t5, 4(t3) - lw s4, 8(t3) - lw t4, 12(t3) - lw t2, 16(t3) - lw t0, 20(t3) - lw s6, 24(t3) - lw t1, 28(t3) - lw s10, 32(t3) - lw s0, 36(t3) - lw s8, 40(t3) - lw s9, 44(t3) - lw s1, 48(t3) - lw s7, 52(t3) - lw s3, 56(t3) - lw s2, 60(t3) - lw s11, 64(t3) - lw a2, 68(t3) + bnez t0, .LBB3_254 +# %bb.255: # %for.cond34.preheader.loopexit.i.i + # in Loop: Header=BB3_240 Depth=2 + lw t5, 4(s4) + lw t4, 8(s4) + lw t3, 12(s4) + lw t2, 16(s4) + lw t0, 20(s4) + lw a2, 24(s4) + sd a2, 320(sp) # 8-byte Folded Spill + lw a2, 28(s4) + sd a2, 328(sp) # 8-byte Folded Spill + lw a2, 32(s4) + sd a2, 336(sp) # 8-byte Folded Spill + lw a2, 36(s4) sd a2, 344(sp) # 8-byte Folded Spill - lw a2, 72(t3) + lw a2, 40(s4) sd a2, 352(sp) # 8-byte Folded Spill - lw a2, 76(t3) - sd a2, 400(sp) # 8-byte Folded Spill - lw a2, 80(t3) - sd a2, 416(sp) # 8-byte Folded Spill - lw a2, 84(t3) - sd a2, 424(sp) # 8-byte Folded Spill - lw a2, 88(t3) - sd a2, 432(sp) # 8-byte Folded Spill - mv t3, ra - lui a2, 13 - ld ra, 320(sp) # 8-byte Folded Reload -.LBB3_242: # %for.cond34.preheader.i.i - # in Loop: Header=BB3_226 Depth=2 + lw t1, 44(s4) + lw s6, 48(s4) + lw s10, 52(s4) + lw s0, 56(s4) + lw s8, 60(s4) + lw s9, 64(s4) + lw s1, 68(s4) + lw s7, 72(s4) + lw s3, 76(s4) + lw a3, 80(s4) + lw s11, 84(s4) + lw s2, 88(s4) + ld s4, 64(sp) # 8-byte Folded Reload + lui ra, 13 + ld a2, 296(sp) # 8-byte Folded Reload +.LBB3_256: # %for.cond34.preheader.i.i + # in Loop: Header=BB3_240 Depth=2 sw t5, 0(t6) - mv a3, t3 - add t3, t3, ra - add t5, t5, s4 - addiw t6, a2, -1620 - add t6, t3, t6 - sw t5, 8(t6) + mv t6, s4 + add s4, s4, a2 add t4, t5, t4 - sw t4, 12(t6) - add t2, t4, t2 - sw t2, 16(t6) + addiw t5, ra, -1620 + add t5, s4, t5 + sw t4, 8(t5) + add t3, t4, t3 + sw t3, 12(t5) + add t2, t3, t2 + sw t2, 16(t5) add t0, t2, t0 - sw t0, 20(t6) - add t0, t0, s6 - sw t0, 24(t6) + sw t0, 20(t5) + ld a2, 320(sp) # 8-byte Folded Reload + add t0, t0, a2 + sw t0, 24(t5) + ld a2, 328(sp) # 8-byte Folded Reload + add t0, t0, a2 + sw t0, 28(t5) + ld a2, 336(sp) # 8-byte Folded Reload + add t0, t0, a2 + sw t0, 32(t5) + ld a2, 344(sp) # 8-byte Folded Reload + add t0, t0, a2 + sw t0, 36(t5) + ld a2, 352(sp) # 8-byte Folded Reload + add t0, t0, a2 + sw t0, 40(t5) add t0, t0, t1 - sw t0, 28(t6) + sw t0, 44(t5) + add t0, t0, s6 + sw t0, 48(t5) add t0, t0, s10 - sw t0, 32(t6) + sw t0, 52(t5) add t0, t0, s0 - sw t0, 36(t6) + sw t0, 56(t5) add t0, t0, s8 - sw t0, 40(t6) + sw t0, 60(t5) add t0, t0, s9 - sw t0, 44(t6) - add t0, t0, s1 - sw t0, 48(t6) - add t0, t0, s7 - sw t0, 52(t6) - add t0, t0, s3 - sw t0, 56(t6) - add t0, t0, s2 - sw t0, 60(t6) - add t0, t0, s11 - sw t0, 64(t6) - ld a2, 344(sp) # 8-byte Folded Reload - add a2, t0, a2 - sw a2, 68(t6) - ld t0, 352(sp) # 8-byte Folded Reload - add a2, a2, t0 - sw a2, 72(t6) - ld t0, 400(sp) # 8-byte Folded Reload - add a2, a2, t0 - sw a2, 76(t6) - ld t0, 416(sp) # 8-byte Folded Reload - add a2, a2, t0 - sw a2, 80(t6) - ld t0, 424(sp) # 8-byte Folded Reload - add a2, a2, t0 - sw a2, 84(t6) - ld t0, 432(sp) # 8-byte Folded Reload - add a2, a2, t0 - sw a2, 88(t6) + sw t0, 64(t5) + add a2, t0, s1 + sw a2, 68(t5) + add a2, a2, s7 + sw a2, 72(t5) + add a2, a2, s3 + sw a2, 76(t5) + add a2, a2, a3 + sw a2, 80(t5) + add a2, a2, s11 + sw a2, 84(t5) + add a2, a2, s2 + sw a2, 88(t5) lui t0, 11 addiw a2, t0, 456 - add a2, t3, a2 + add a2, s4, a2 vsetivli zero, 4, e32, m1, ta, ma vse32.v v13, (a2) addiw a2, t0, 444 - add a2, t3, a2 + add a2, s4, a2 vse32.v v13, (a2) ld a2, 360(sp) # 8-byte Folded Reload - add a2, t3, a2 + add a2, s4, a2 vsetivli zero, 16, e32, m4, ta, ma vse32.v v20, (a2) slli a2, a6, 32 - ld t6, 296(sp) # 8-byte Folded Reload - ld s0, 448(sp) # 8-byte Folded Reload - blez t6, .LBB3_245 -# %bb.243: # %for.body58.preheader.i.i - # in Loop: Header=BB3_226 Depth=2 + ld t0, 376(sp) # 8-byte Folded Reload + ld a3, 408(sp) # 8-byte Folded Reload + blez t0, .LBB3_259 +# %bb.257: # %for.body58.preheader.i.i + # in Loop: Header=BB3_240 Depth=2 li t0, 0 - srli t5, a2, 30 + srli t3, a2, 30 lui t1, 13 - add t3, t3, t1 - add t3, t3, t5 - lw t4, -1620(t3) - add t1, a4, t5 + add s4, s4, t1 + add s4, s4, t3 + lw t4, -1620(s4) + add t1, a4, t3 subw t2, a7, a6 addi t2, t2, 1 - add t3, s0, t5 -.LBB3_244: # %for.body58.i.i + add t3, a3, t3 +.LBB3_258: # %for.body58.i.i # Parent Loop BB3_4 Depth=1 - # Parent Loop BB3_226 Depth=2 + # Parent Loop BB3_240 Depth=2 # => This Inner Loop Header: Depth=3 lw t5, 0(t3) subw t0, t4, t0 @@ -2607,73 +2712,73 @@ addiw t2, t2, -1 addi t3, t3, 4 mv t4, t5 - bnez t2, .LBB3_244 -.LBB3_245: # %for.cond73.preheader.i.i - # in Loop: Header=BB3_226 Depth=2 - mv s10, a3 + bnez t2, .LBB3_258 +.LBB3_259: # %for.cond73.preheader.i.i + # in Loop: Header=BB3_240 Depth=2 + mv s4, t6 ld s11, 216(sp) # 8-byte Folded Reload - ld s3, 280(sp) # 8-byte Folded Reload - ld s7, 272(sp) # 8-byte Folded Reload - ld s8, 288(sp) # 8-byte Folded Reload - ld s2, 264(sp) # 8-byte Folded Reload - ld t3, 456(sp) # 8-byte Folded Reload - ld s6, 256(sp) # 8-byte Folded Reload - ld s4, 248(sp) # 8-byte Folded Reload - bge a6, a7, .LBB3_225 -# %bb.246: # %for.body76.preheader.i.i - # in Loop: Header=BB3_226 Depth=2 + ld s7, 256(sp) # 8-byte Folded Reload + ld s8, 248(sp) # 8-byte Folded Reload + ld t5, 432(sp) # 8-byte Folded Reload + ld s9, 288(sp) # 8-byte Folded Reload + ld t6, 456(sp) # 8-byte Folded Reload + ld s6, 280(sp) # 8-byte Folded Reload + ld s1, 448(sp) # 8-byte Folded Reload + ld s0, 440(sp) # 8-byte Folded Reload + bge a6, a7, .LBB3_239 +# %bb.260: # %for.body76.preheader.i.i + # in Loop: Header=BB3_240 Depth=2 srli t2, a2, 32 slli a2, a7, 32 srli a2, a2, 32 sub t0, a2, t2 li a7, 8 - bgeu t0, a7, .LBB3_254 -# %bb.247: # in Loop: Header=BB3_226 Depth=2 + bgeu t0, a7, .LBB3_268 +# %bb.261: # in Loop: Header=BB3_240 Depth=2 mv a7, t2 - j .LBB3_257 -.LBB3_248: # %for.body882.i.preheader576 - # in Loop: Header=BB3_226 Depth=2 + j .LBB3_271 +.LBB3_262: # %for.body882.i.preheader576 + # in Loop: Header=BB3_240 Depth=2 sub t0, a1, a2 add a2, a5, a2 - j .LBB3_250 -.LBB3_249: # %for.body882.i - # in Loop: Header=BB3_250 Depth=3 + j .LBB3_264 +.LBB3_263: # %for.body882.i + # in Loop: Header=BB3_264 Depth=3 addi t0, t0, -1 addi a2, a2, 1 - beqz t0, .LBB3_233 -.LBB3_250: # %for.body882.i + beqz t0, .LBB3_247 +.LBB3_264: # %for.body882.i # Parent Loop BB3_4 Depth=1 - # Parent Loop BB3_226 Depth=2 + # Parent Loop BB3_240 Depth=2 # => This Inner Loop Header: Depth=3 lbu t1, 0(a2) sext.w a7, a7 - blt t1, a7, .LBB3_252 -# %bb.251: # %for.body882.i - # in Loop: Header=BB3_250 Depth=3 + blt t1, a7, .LBB3_266 +# %bb.265: # %for.body882.i + # in Loop: Header=BB3_264 Depth=3 mv a7, t1 sext.w a6, a6 - blt a6, t1, .LBB3_249 - j .LBB3_253 -.LBB3_252: # %for.body882.i - # in Loop: Header=BB3_250 Depth=3 + blt a6, t1, .LBB3_263 + j .LBB3_267 +.LBB3_266: # %for.body882.i + # in Loop: Header=BB3_264 Depth=3 sext.w a6, a6 - blt a6, t1, .LBB3_249 -.LBB3_253: # %for.body882.i - # in Loop: Header=BB3_250 Depth=3 + blt a6, t1, .LBB3_263 +.LBB3_267: # %for.body882.i + # in Loop: Header=BB3_264 Depth=3 mv a6, t1 - j .LBB3_249 -.LBB3_254: # %vector.ph467 - # in Loop: Header=BB3_226 Depth=2 - mv t5, t3 + j .LBB3_263 +.LBB3_268: # %vector.ph467 + # in Loop: Header=BB3_240 Depth=2 andi t1, t0, -8 add a7, t1, t2 slli t3, t2, 2 - add t2, s0, t3 + add t2, a3, t3 add t3, a4, t3 mv t4, t1 -.LBB3_255: # %vector.body473 +.LBB3_269: # %vector.body473 # Parent Loop BB3_4 Depth=1 - # Parent Loop BB3_226 Depth=2 + # Parent Loop BB3_240 Depth=2 # => This Inner Loop Header: Depth=3 vsetivli zero, 8, e32, m2, ta, ma vle32.v v8, (t3) @@ -2685,20 +2790,19 @@ addi t4, t4, -8 addi t2, t2, 32 addi t3, t3, 32 - bnez t4, .LBB3_255 -# %bb.256: # %middle.block464 - # in Loop: Header=BB3_226 Depth=2 - mv t3, t5 - beq t0, t1, .LBB3_225 -.LBB3_257: # %for.body76.i.i.preheader - # in Loop: Header=BB3_226 Depth=2 + bnez t4, .LBB3_269 +# %bb.270: # %middle.block464 + # in Loop: Header=BB3_240 Depth=2 + beq t0, t1, .LBB3_239 +.LBB3_271: # %for.body76.i.i.preheader + # in Loop: Header=BB3_240 Depth=2 slli t1, a7, 2 add t0, a4, t1 sub a2, a2, a7 - add a7, s0, t1 -.LBB3_258: # %for.body76.i.i + add a7, a3, t1 +.LBB3_272: # %for.body76.i.i # Parent Loop BB3_4 Depth=1 - # Parent Loop BB3_226 Depth=2 + # Parent Loop BB3_240 Depth=2 # => This Inner Loop Header: Depth=3 lw t1, 0(t0) lw t2, 0(a7) @@ -2709,19 +2813,22 @@ addi t0, t0, 4 addi a2, a2, -1 addi a7, a7, 4 - bnez a2, .LBB3_258 - j .LBB3_225 -.LBB3_259: # in Loop: Header=BB3_4 Depth=1 - sd t3, 456(sp) # 8-byte Folded Spill - sd a2, 432(sp) # 8-byte Folded Spill - j .LBB3_261 -.LBB3_260: # in Loop: Header=BB3_4 Depth=1 - sd zero, 432(sp) # 8-byte Folded Spill -.LBB3_261: # %for.end935.i + bnez a2, .LBB3_272 + j .LBB3_239 +.LBB3_273: # in Loop: Header=BB3_4 Depth=1 + sd s1, 448(sp) # 8-byte Folded Spill + sd s0, 440(sp) # 8-byte Folded Spill + sd t6, 456(sp) # 8-byte Folded Spill + sd t5, 432(sp) # 8-byte Folded Spill + mv s10, a2 + j .LBB3_275 +.LBB3_274: # in Loop: Header=BB3_4 Depth=1 + li s10, 0 +.LBB3_275: # %for.end935.i # in Loop: Header=BB3_4 Depth=1 - ld a0, 304(sp) # 8-byte Folded Reload + ld a0, 264(sp) # 8-byte Folded Reload lw s0, 0(a0) - lw s1, 40(s10) + lw s1, 40(s4) li a2, 1024 ld a0, 184(sp) # 8-byte Folded Reload li a1, 0 @@ -2743,7 +2850,7 @@ add a5, sp, a5 addi a5, a5, 496 vl1r.v v27, (a5) # Unknown-size Folded Reload -.LBB3_262: # %for.cond953.preheader.i +.LBB3_276: # %for.cond953.preheader.i # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 slli a5, a0, 4 @@ -2768,14 +2875,13 @@ addi a4, a4, -4 addi a3, a3, -16 addi a2, a2, -16 - bnez a1, .LBB3_262 -# %bb.263: # %if.then974.i + bnez a1, .LBB3_276 +# %bb.277: # %if.then974.i # in Loop: Header=BB3_4 Depth=1 ld a0, 368(sp) # 8-byte Folded Reload - mulw a0, s1, a0 - sd a0, 416(sp) # 8-byte Folded Spill + mulw t5, s1, a0 addiw s0, s0, 1 - sd s0, 400(sp) # 8-byte Folded Spill + sd s0, 408(sp) # 8-byte Folded Spill csrr a0, vlenb li a1, 26 mul a0, a0, a1 @@ -2805,39 +2911,40 @@ add a0, sp, a0 addi a0, a0, 496 vl4r.v v28, (a0) # Unknown-size Folded Reload - li ra, 1 - ld t6, 296(sp) # 8-byte Folded Reload - ld a7, 48(sp) # 8-byte Folded Reload - ld t2, 40(sp) # 8-byte Folded Reload - ld t1, 32(sp) # 8-byte Folded Reload - blez t2, .LBB3_276 -# %bb.264: # %if.end999.i + li t4, 2 + ld a7, 376(sp) # 8-byte Folded Reload + ld t6, 32(sp) # 8-byte Folded Reload + ld t2, 24(sp) # 8-byte Folded Reload + ld s0, 40(sp) # 8-byte Folded Reload + ld t1, 48(sp) # 8-byte Folded Reload + blez t2, .LBB3_290 +# %bb.278: # %if.end999.i # in Loop: Header=BB3_4 Depth=1 ld a0, 168(sp) # 8-byte Folded Reload lbu a2, 64(a0) - sd zero, 448(sp) # 8-byte Folded Spill - li t5, 0 + li s2, 0 + li s3, 0 li a0, 1032 mul a0, a2, a0 - add a0, s10, a0 + add a0, s4, a0 lui a1, 13 addiw a1, a1, -1620 - add s8, a0, a1 - sd a2, 384(sp) # 8-byte Folded Spill + add a1, a0, a1 + sd a1, 448(sp) # 8-byte Folded Spill + sd a2, 432(sp) # 8-byte Folded Spill slli a1, a2, 2 lui a2, 16 - add a2, s10, a2 + add a2, s4, a2 add a1, a2, a1 - lw a2, -1524(a1) - ld a1, 328(sp) # 8-byte Folded Reload - add s2, a0, a1 + lw s0, -1524(a1) + ld a1, 304(sp) # 8-byte Folded Reload + add a1, a0, a1 + sd a1, 440(sp) # 8-byte Folded Spill ld a1, 360(sp) # 8-byte Folded Reload - add s1, a0, a1 + add s6, a0, a1 li a1, 256 - li a0, 49 - sd a0, 424(sp) # 8-byte Folded Spill - sd a2, 408(sp) # 8-byte Folded Spill - sd a2, 456(sp) # 8-byte Folded Spill + li ra, 49 + sd s0, 456(sp) # 8-byte Folded Spill csrr a0, vlenb slli a0, a0, 5 add a0, sp, a0 @@ -2849,84 +2956,82 @@ add a0, sp, a0 addi a0, a0, 496 vl4r.v v20, (a0) # Unknown-size Folded Reload - li s9, 2 + li s1, 1 li t3, -1 ld t0, 240(sp) # 8-byte Folded Reload - ld s0, 56(sp) # 8-byte Folded Reload -.LBB3_265: # %sw.bb1001.i +.LBB3_279: # %sw.bb1001.i # in Loop: Header=BB3_4 Depth=1 - lw a0, 36(s10) + lw a0, 36(s4) li a2, 36 - sw a2, 8(s10) - ld t4, 456(sp) # 8-byte Folded Reload - bge a0, t4, .LBB3_271 -# %bb.266: # %if.end1019.lr.ph.i + sw a2, 8(s4) + bge a0, s0, .LBB3_285 +# %bb.280: # %if.end1019.lr.ph.i # in Loop: Header=BB3_4 Depth=1 - ld a2, 0(s10) + ld a2, 0(s4) lw a3, 8(a2) addiw a3, a3, -1 - j .LBB3_268 -.LBB3_267: # %if.end1052.i - # in Loop: Header=BB3_268 Depth=2 + j .LBB3_282 +.LBB3_281: # %if.end1052.i + # in Loop: Header=BB3_282 Depth=2 addiw a3, a3, -1 - bge a0, t4, .LBB3_272 -.LBB3_268: # %if.end1019.i + bge a0, s0, .LBB3_286 +.LBB3_282: # %if.end1019.i # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 - beq a3, t3, .LBB3_212 -# %bb.269: # %if.end1025.i - # in Loop: Header=BB3_268 Depth=2 + beq a3, t3, .LBB3_293 +# %bb.283: # %if.end1025.i + # in Loop: Header=BB3_282 Depth=2 ld a5, 0(a2) - lw a4, 32(s10) + lw a4, 32(s4) lbu a6, 0(a5) slli a4, a4, 8 or a4, a4, a6 - sw a4, 32(s10) + sw a4, 32(s4) addiw a0, a0, 8 - sw a0, 36(s10) + sw a0, 36(s4) lw a6, 12(a2) addi a5, a5, 1 sd a5, 0(a2) sw a3, 8(a2) addiw a6, a6, 1 sw a6, 12(a2) - bnez a6, .LBB3_267 -# %bb.270: # %if.then1048.i - # in Loop: Header=BB3_268 Depth=2 + bnez a6, .LBB3_281 +# %bb.284: # %if.then1048.i + # in Loop: Header=BB3_282 Depth=2 lw a5, 16(a2) addi a5, a5, 1 sw a5, 16(a2) - j .LBB3_267 -.LBB3_271: # %sw.bb1001.if.then1008_crit_edge.i + j .LBB3_281 +.LBB3_285: # %sw.bb1001.if.then1008_crit_edge.i # in Loop: Header=BB3_4 Depth=1 - lw a4, 32(s10) -.LBB3_272: # %if.then1008.i + lw a4, 32(s4) +.LBB3_286: # %if.then1008.i # in Loop: Header=BB3_4 Depth=1 - subw a2, a0, t4 + subw a2, a0, s0 srlw a0, a4, a2 - sllw a3, t3, t4 + sllw a3, t3, s0 not a3, a3 - and s0, a0, a3 - sw a2, 36(s10) -.LBB3_273: # %while.cond1054.i + and s9, a0, a3 + sw a2, 36(s4) +.LBB3_287: # %while.cond1054.i # in Loop: Header=BB3_4 Depth=1 li a3, 20 li a0, -4 - blt a3, t4, .LBB3_344 -# %bb.274: # %if.end1059.i + blt a3, s0, .LBB3_192 +# %bb.288: # %if.end1059.i # in Loop: Header=BB3_4 Depth=1 - slli a3, t4, 2 - add a4, s1, a3 + slli a3, s0, 2 + add a4, s6, a3 lw a4, 0(a4) - bge a4, s0, .LBB3_348 -# %bb.275: # %if.end1065.i + bge a4, s9, .LBB3_345 +# %bb.289: # %if.end1065.i # in Loop: Header=BB3_4 Depth=1 - addiw t4, t4, 1 - j .LBB3_203 -.LBB3_276: # in Loop: Header=BB3_4 Depth=1 - sd zero, 448(sp) # 8-byte Folded Spill - sd zero, 424(sp) # 8-byte Folded Spill - li t5, 0 + addiw s0, s0, 1 + j .LBB3_204 +.LBB3_290: # in Loop: Header=BB3_4 Depth=1 + li s2, 0 + li ra, 0 + li s3, 0 li a2, 0 li a0, -4 li a1, 256 @@ -2941,418 +3046,341 @@ add a3, sp, a3 addi a3, a3, 496 vl4r.v v20, (a3) # Unknown-size Folded Reload - li s9, 2 + li s1, 1 li t3, -1 ld t0, 240(sp) # 8-byte Folded Reload - ld s0, 56(sp) # 8-byte Folded Reload - ld s1, 24(sp) # 8-byte Folded Reload - j .LBB3_346 -.LBB3_277: # %for.cond733.i - # in Loop: Header=BB3_4 Depth=1 - blt a1, t6, .LBB3_333 -# %bb.278: # %for.inc872.i - # in Loop: Header=BB3_4 Depth=1 - ld a0, 432(sp) # 8-byte Folded Reload - addiw a0, a0, 1 - j .LBB3_213 -.LBB3_279: # %sw.bb1260.i - # in Loop: Header=BB3_4 Depth=1 - li a0, 39 - sw a0, 8(s10) - ld t4, 456(sp) # 8-byte Folded Reload - blez a2, .LBB3_282 -# %bb.280: # %sw.bb1260.if.then1267_crit_edge.i + j .LBB3_294 +.LBB3_291: # %for.cond733.i # in Loop: Header=BB3_4 Depth=1 - lw a4, 32(s10) -.LBB3_281: # %if.then1267.i + blt a1, a7, .LBB3_326 +# %bb.292: # %for.inc872.i # in Loop: Header=BB3_4 Depth=1 - addiw a2, a2, -1 - srlw a0, a4, a2 - andi a3, a0, 1 - sw a2, 36(s10) - slliw a0, s0, 1 - sd a3, 440(sp) # 8-byte Folded Spill - or s0, a3, a0 - j .LBB3_381 -.LBB3_282: # %if.end1276.lr.ph.i - # in Loop: Header=BB3_4 Depth=1 - ld a0, 0(s10) - lw a3, 8(a0) - addiw a3, a3, -1 - j .LBB3_284 -.LBB3_283: # %if.end1309.i - # in Loop: Header=BB3_284 Depth=2 - addiw a5, a2, -8 - addiw a3, a3, -1 - li a6, -8 - blt a6, a5, .LBB3_281 -.LBB3_284: # %if.end1276.i - # Parent Loop BB3_4 Depth=1 - # => This Inner Loop Header: Depth=2 - beq a3, t3, .LBB3_212 -# %bb.285: # %if.end1282.i - # in Loop: Header=BB3_284 Depth=2 - ld a5, 0(a0) - lw a4, 32(s10) - lbu a6, 0(a5) - slli a4, a4, 8 - or a4, a4, a6 - sw a4, 32(s10) - addi a2, a2, 8 - sw a2, 36(s10) - lw a6, 12(a0) - addi a5, a5, 1 - sd a5, 0(a0) - sw a3, 8(a0) - addiw a6, a6, 1 - sw a6, 12(a0) - bnez a6, .LBB3_283 -# %bb.286: # %if.then1305.i - # in Loop: Header=BB3_284 Depth=2 - lw a5, 16(a0) - addi a5, a5, 1 - sw a5, 16(a0) - j .LBB3_283 -.LBB3_287: # %sw.bb1676.i - # in Loop: Header=BB3_4 Depth=1 - li a0, 41 - sw a0, 8(s10) - ld t4, 456(sp) # 8-byte Folded Reload - blez a2, .LBB3_290 -# %bb.288: # %sw.bb1676.if.then1683_crit_edge.i - # in Loop: Header=BB3_4 Depth=1 - lw a4, 32(s10) -.LBB3_289: # %if.then1683.i + addiw s10, s10, 1 + j .LBB3_228 +.LBB3_293: # in Loop: Header=BB3_4 Depth=1 + li a2, 0 + li a0, 0 +.LBB3_294: # %BZ2_decompress.exit # in Loop: Header=BB3_4 Depth=1 - addiw a2, a2, -1 - srlw a0, a4, a2 - andi a3, a0, 1 - sw a2, 36(s10) - slliw a0, s0, 1 - sd a3, 440(sp) # 8-byte Folded Spill - or s0, a3, a0 - j .LBB3_494 -.LBB3_290: # %if.end1692.lr.ph.i + sw a1, 0(s11) + sw t1, 4(s11) + sw s10, 8(s11) + sw a7, 12(s11) + sw t0, 16(s11) + sw t2, 20(s11) + ld a1, 408(sp) # 8-byte Folded Reload + sw a1, 24(s11) + sw s3, 28(s11) + sw ra, 32(s11) + ld a1, 416(sp) # 8-byte Folded Reload + sw a1, 36(s11) + sw t5, 40(s11) + ld a1, 472(sp) # 8-byte Folded Reload + sw s2, 0(a1) + ld a1, 400(sp) # 8-byte Folded Reload + sw a1, 48(s11) + ld a1, 392(sp) # 8-byte Folded Reload + sw a1, 52(s11) + ld a1, 424(sp) # 8-byte Folded Reload + sw a1, 56(s11) + ld a1, 384(sp) # 8-byte Folded Reload + sw a1, 60(s11) + sw s0, 64(s11) + sw s9, 68(s11) + sw t6, 72(s11) + ld a1, 432(sp) # 8-byte Folded Reload + sw a1, 76(s11) + ld a1, 456(sp) # 8-byte Folded Reload + sw a1, 80(s11) + sd s6, 84(s11) + ld a1, 448(sp) # 8-byte Folded Reload + sd a1, 92(s11) + ld a1, 440(sp) # 8-byte Folded Reload + sd a1, 100(s11) + beqz a2, .LBB3_295 + j .LBB3_516 +.LBB3_295: # %cleanup # in Loop: Header=BB3_4 Depth=1 - ld a0, 0(s10) - lw a3, 8(a0) - addiw a3, a3, -1 - j .LBB3_292 -.LBB3_291: # %if.end1725.i - # in Loop: Header=BB3_292 Depth=2 - addiw a5, a2, -8 - addiw a3, a3, -1 - li a6, -8 - blt a6, a5, .LBB3_289 -.LBB3_292: # %if.end1692.i - # Parent Loop BB3_4 Depth=1 - # => This Inner Loop Header: Depth=2 - beq a3, t3, .LBB3_212 -# %bb.293: # %if.end1698.i - # in Loop: Header=BB3_292 Depth=2 - ld a5, 0(a0) - lw a4, 32(s10) - lbu a6, 0(a5) - slli a4, a4, 8 - or a4, a4, a6 - sw a4, 32(s10) - addi a2, a2, 8 - sw a2, 36(s10) - lw a6, 12(a0) - addi a5, a5, 1 - sd a5, 0(a0) - sw a3, 8(a0) - addiw a6, a6, 1 - sw a6, 12(a0) - bnez a6, .LBB3_291 -# %bb.294: # %if.then1721.i - # in Loop: Header=BB3_292 Depth=2 - lw a5, 16(a0) - addi a5, a5, 1 - sw a5, 16(a0) - j .LBB3_291 -.LBB3_295: # %for.cond363.i + lw a1, 8(s4) + li a3, 2 + bne a1, a3, .LBB3_518 + j .LBB3_4 +.LBB3_518: # %cleanup + j .LBB3_514 +.LBB3_296: # %for.cond363.i # in Loop: Header=BB3_4 Depth=1 - ld a6, 304(sp) # 8-byte Folded Reload + ld a6, 264(sp) # 8-byte Folded Reload li a0, 15 - blt a0, a1, .LBB3_298 -# %bb.296: # %for.body366.i + blt a0, a1, .LBB3_299 +# %bb.297: # %for.body366.i # in Loop: Header=BB3_4 Depth=1 - add a0, s10, a1 + add a0, s4, a1 addi a0, a0, 2047 lbu a0, 1405(a0) - beqz a0, .LBB3_319 -# %bb.297: # in Loop: Header=BB3_4 Depth=1 - li s6, 0 - j .LBB3_313 -.LBB3_298: # %for.end444.i + beqz a0, .LBB3_320 +# %bb.298: # in Loop: Header=BB3_4 Depth=1 + li t1, 0 + j .LBB3_314 +.LBB3_299: # %for.end444.i # in Loop: Header=BB3_4 Depth=1 li a0, 0 li a2, 0 sw zero, 0(a6) li a3, 256 ld a4, 224(sp) # 8-byte Folded Reload - j .LBB3_300 -.LBB3_299: # %for.inc.i.i - # in Loop: Header=BB3_300 Depth=2 + j .LBB3_301 +.LBB3_300: # %for.inc.i.i + # in Loop: Header=BB3_301 Depth=2 addi a2, a2, 1 addi a3, a3, -1 addi a4, a4, 1 - beqz a3, .LBB3_302 -.LBB3_300: # %for.body.i.i + beqz a3, .LBB3_303 +.LBB3_301: # %for.body.i.i # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 lbu a5, 0(a4) - beqz a5, .LBB3_299 -# %bb.301: # %if.then.i.i - # in Loop: Header=BB3_300 Depth=2 - add a0, s10, a0 + beqz a5, .LBB3_300 +# %bb.302: # %if.then.i.i + # in Loop: Header=BB3_301 Depth=2 + add a0, s4, a0 addi a0, a0, 2047 sb a2, 1421(a0) lw a0, 0(a6) addiw a0, a0, 1 sw a0, 0(a6) - j .LBB3_299 -.LBB3_302: # %makeMaps_d.exit.i + j .LBB3_300 +.LBB3_303: # %makeMaps_d.exit.i # in Loop: Header=BB3_4 Depth=1 - beqz a0, .LBB3_334 -# %bb.303: # %if.end448.i + beqz a0, .LBB3_327 +# %bb.304: # %if.end448.i # in Loop: Header=BB3_4 Depth=1 - addiw t6, a0, 2 -.LBB3_304: # %sw.bb451.i + addiw a7, a0, 2 +.LBB3_305: # %sw.bb451.i # in Loop: Header=BB3_4 Depth=1 - lw a0, 36(s10) + lw a0, 36(s4) li a2, 30 - sw a2, 8(s10) - blt a0, t4, .LBB3_308 -# %bb.305: # %sw.bb451.if.then458_crit_edge.i + sw a2, 8(s4) + li a2, 3 + blt a0, a2, .LBB3_309 +# %bb.306: # %sw.bb451.if.then458_crit_edge.i # in Loop: Header=BB3_4 Depth=1 - lw a4, 32(s10) -.LBB3_306: # %if.then458.i + lw a4, 32(s4) +.LBB3_307: # %if.then458.i # in Loop: Header=BB3_4 Depth=1 addiw a0, a0, -3 srlw a2, a4, a0 andi t0, a2, 7 - sw a0, 36(s10) + sw a0, 36(s4) li a2, 7 - bgeu a2, t0, .LBB3_307 + bgeu a2, t0, .LBB3_308 j .LBB3_121 -.LBB3_307: # %if.then458.i +.LBB3_308: # %if.then458.i # in Loop: Header=BB3_4 Depth=1 li a2, 131 srl a2, a2, t0 andi a2, a2, 1 - bnez a2, .LBB3_334 + bnez a2, .LBB3_327 j .LBB3_121 -.LBB3_308: # %if.end467.lr.ph.i +.LBB3_309: # %if.end467.lr.ph.i # in Loop: Header=BB3_4 Depth=1 - ld a2, 0(s10) + ld a2, 0(s4) lw a3, 8(a2) addiw a3, a3, -1 - j .LBB3_310 -.LBB3_309: # %if.end500.i - # in Loop: Header=BB3_310 Depth=2 + j .LBB3_311 +.LBB3_310: # %if.end500.i + # in Loop: Header=BB3_311 Depth=2 addiw a5, a0, -8 addiw a3, a3, -1 li a6, -6 - blt a6, a5, .LBB3_306 -.LBB3_310: # %if.end467.i + blt a6, a5, .LBB3_307 +.LBB3_311: # %if.end467.i # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 - beq a3, t3, .LBB3_212 -# %bb.311: # %if.end473.i - # in Loop: Header=BB3_310 Depth=2 + beq a3, t3, .LBB3_293 +# %bb.312: # %if.end473.i + # in Loop: Header=BB3_311 Depth=2 ld a5, 0(a2) - lw a4, 32(s10) + lw a4, 32(s4) lbu a6, 0(a5) slli a4, a4, 8 or a4, a4, a6 - sw a4, 32(s10) + sw a4, 32(s4) addi a0, a0, 8 - sw a0, 36(s10) + sw a0, 36(s4) lw a6, 12(a2) addi a5, a5, 1 sd a5, 0(a2) sw a3, 8(a2) addiw a6, a6, 1 sw a6, 12(a2) - bnez a6, .LBB3_309 -# %bb.312: # %if.then496.i - # in Loop: Header=BB3_310 Depth=2 + bnez a6, .LBB3_310 +# %bb.313: # %if.then496.i + # in Loop: Header=BB3_311 Depth=2 lw a5, 16(a2) addi a5, a5, 1 sw a5, 16(a2) - j .LBB3_309 -.LBB3_313: # %for.cond372.i + j .LBB3_310 +.LBB3_314: # %for.cond372.i # in Loop: Header=BB3_4 Depth=1 li a0, 15 - blt a0, s6, .LBB3_319 -.LBB3_314: # %sw.bb376.i + blt a0, t1, .LBB3_320 +.LBB3_315: # %sw.bb376.i # in Loop: Header=BB3_4 Depth=1 - lw a0, 36(s10) + lw a0, 36(s4) li a2, 29 - sw a2, 8(s10) - blez a0, .LBB3_320 -# %bb.315: # %sw.bb376.if.then383_crit_edge.i + sw a2, 8(s4) + blez a0, .LBB3_321 +# %bb.316: # %sw.bb376.if.then383_crit_edge.i # in Loop: Header=BB3_4 Depth=1 - lw a4, 32(s10) -.LBB3_316: # %if.then383.i + lw a4, 32(s4) +.LBB3_317: # %if.then383.i # in Loop: Header=BB3_4 Depth=1 addi a0, a0, -1 srlw a2, a4, a0 andi a2, a2, 1 - sw a0, 36(s10) - beqz a2, .LBB3_318 -# %bb.317: # %if.then431.i + sw a0, 36(s4) + beqz a2, .LBB3_319 +# %bb.318: # %if.then431.i # in Loop: Header=BB3_4 Depth=1 slli a0, a1, 4 - addw a0, a0, s6 - add a0, s10, a0 + addw a0, a0, t1 + add a0, s4, a0 addi a0, a0, 2047 - sb ra, 1149(a0) -.LBB3_318: # %for.inc438.i + sb s1, 1149(a0) +.LBB3_319: # %for.inc438.i # in Loop: Header=BB3_4 Depth=1 - addiw s6, s6, 1 - j .LBB3_313 -.LBB3_319: # %for.inc442.i + addiw t1, t1, 1 + j .LBB3_314 +.LBB3_320: # %for.inc442.i # in Loop: Header=BB3_4 Depth=1 addiw a1, a1, 1 - j .LBB3_295 -.LBB3_320: # %if.end393.lr.ph.i + j .LBB3_296 +.LBB3_321: # %if.end393.lr.ph.i # in Loop: Header=BB3_4 Depth=1 - ld a2, 0(s10) + ld a2, 0(s4) lw a3, 8(a2) addiw a3, a3, -1 - j .LBB3_322 -.LBB3_321: # %if.end426.i - # in Loop: Header=BB3_322 Depth=2 + j .LBB3_323 +.LBB3_322: # %if.end426.i + # in Loop: Header=BB3_323 Depth=2 addiw a5, a0, -8 addiw a3, a3, -1 li a6, -8 - blt a6, a5, .LBB3_316 -.LBB3_322: # %if.end393.i + blt a6, a5, .LBB3_317 +.LBB3_323: # %if.end393.i # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 - beq a3, t3, .LBB3_212 -# %bb.323: # %if.end399.i - # in Loop: Header=BB3_322 Depth=2 + beq a3, t3, .LBB3_293 +# %bb.324: # %if.end399.i + # in Loop: Header=BB3_323 Depth=2 ld a5, 0(a2) - lw a4, 32(s10) + lw a4, 32(s4) lbu a6, 0(a5) slli a4, a4, 8 or a4, a4, a6 - sw a4, 32(s10) + sw a4, 32(s4) addi a0, a0, 8 - sw a0, 36(s10) + sw a0, 36(s4) lw a6, 12(a2) addi a5, a5, 1 sd a5, 0(a2) sw a3, 8(a2) addiw a6, a6, 1 sw a6, 12(a2) - bnez a6, .LBB3_321 -# %bb.324: # %if.then422.i - # in Loop: Header=BB3_322 Depth=2 + bnez a6, .LBB3_322 +# %bb.325: # %if.then422.i + # in Loop: Header=BB3_323 Depth=2 lw a5, 16(a2) addi a5, a5, 1 sw a5, 16(a2) - j .LBB3_321 -.LBB3_325: # %if.end763.lr.ph.i + j .LBB3_322 +.LBB3_326: # %while.cond737.i + # in Loop: Header=BB3_4 Depth=1 + sd a2, 424(sp) # 8-byte Folded Spill + addiw a0, a2, -21 + li a2, -20 + bgeu a0, a2, .LBB3_328 +.LBB3_327: # in Loop: Header=BB3_4 Depth=1 + li a2, 0 + li a0, -4 + j .LBB3_294 +.LBB3_328: # %sw.bb746.i + # in Loop: Header=BB3_4 Depth=1 + lw a0, 36(s4) + li a2, 34 + sw a2, 8(s4) + blez a0, .LBB3_334 +# %bb.329: # %sw.bb746.if.then753_crit_edge.i + # in Loop: Header=BB3_4 Depth=1 + lw a4, 32(s4) +.LBB3_330: # %if.then753.i + # in Loop: Header=BB3_4 Depth=1 + addiw a0, a0, -1 + srlw a2, a4, a0 + andi a2, a2, 1 + sw a0, 36(s4) + beqz a2, .LBB3_344 +.LBB3_331: # %sw.bb803.i + # in Loop: Header=BB3_4 Depth=1 + li a2, 35 + sw a2, 8(s4) + blez a0, .LBB3_339 +# %bb.332: # %sw.bb803.if.then810_crit_edge.i + # in Loop: Header=BB3_4 Depth=1 + lw a4, 32(s4) +.LBB3_333: # %if.then810.i + # in Loop: Header=BB3_4 Depth=1 + addi a0, a0, -1 + sw a0, 36(s4) + srlw a0, a4, a0 + slli a0, a0, 63 + srai a0, a0, 63 + ori a0, a0, 1 + ld a2, 424(sp) # 8-byte Folded Reload + add a2, a0, a2 + j .LBB3_326 +.LBB3_334: # %if.end763.lr.ph.i # in Loop: Header=BB3_4 Depth=1 - ld a2, 0(s10) + ld a2, 0(s4) lw a3, 8(a2) addiw a3, a3, -1 - j .LBB3_327 -.LBB3_326: # %if.end796.i - # in Loop: Header=BB3_327 Depth=2 + j .LBB3_336 +.LBB3_335: # %if.end796.i + # in Loop: Header=BB3_336 Depth=2 addiw a5, a0, -8 addiw a3, a3, -1 li a6, -8 - blt a6, a5, .LBB3_337 -.LBB3_327: # %if.end763.i + blt a6, a5, .LBB3_330 +.LBB3_336: # %if.end763.i # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 - beq a3, t3, .LBB3_212 -# %bb.328: # %if.end769.i - # in Loop: Header=BB3_327 Depth=2 + beq a3, t3, .LBB3_293 +# %bb.337: # %if.end769.i + # in Loop: Header=BB3_336 Depth=2 ld a5, 0(a2) - lw a4, 32(s10) + lw a4, 32(s4) lbu a6, 0(a5) slli a4, a4, 8 or a4, a4, a6 - sw a4, 32(s10) + sw a4, 32(s4) addi a0, a0, 8 - sw a0, 36(s10) + sw a0, 36(s4) lw a6, 12(a2) addi a5, a5, 1 sd a5, 0(a2) sw a3, 8(a2) addiw a6, a6, 1 sw a6, 12(a2) - bnez a6, .LBB3_326 -# %bb.329: # %if.then792.i - # in Loop: Header=BB3_327 Depth=2 + bnez a6, .LBB3_335 +# %bb.338: # %if.then792.i + # in Loop: Header=BB3_336 Depth=2 lw a5, 16(a2) addi a5, a5, 1 sw a5, 16(a2) - j .LBB3_326 -.LBB3_330: # %sw.bb803.i - # in Loop: Header=BB3_4 Depth=1 - li a2, 35 - sw a2, 8(s10) - blez a0, .LBB3_339 -# %bb.331: # %sw.bb803.if.then810_crit_edge.i - # in Loop: Header=BB3_4 Depth=1 - lw a4, 32(s10) -.LBB3_332: # %if.then810.i - # in Loop: Header=BB3_4 Depth=1 - addi a0, a0, -1 - sw a0, 36(s10) - srlw a0, a4, a0 - slli a0, a0, 63 - srai a0, a0, 63 - ori a0, a0, 1 - add t1, a0, t1 -.LBB3_333: # %while.cond737.i - # in Loop: Header=BB3_4 Depth=1 - addiw a0, t1, -21 - li a2, -20 - bgeu a0, a2, .LBB3_335 -.LBB3_334: # in Loop: Header=BB3_4 Depth=1 - li a2, 0 - li a0, -4 - j .LBB3_346 -.LBB3_335: # %sw.bb746.i - # in Loop: Header=BB3_4 Depth=1 - lw a0, 36(s10) - li a2, 34 - sw a2, 8(s10) - blez a0, .LBB3_325 -# %bb.336: # %sw.bb746.if.then753_crit_edge.i - # in Loop: Header=BB3_4 Depth=1 - lw a4, 32(s10) -.LBB3_337: # %if.then753.i - # in Loop: Header=BB3_4 Depth=1 - addiw a0, a0, -1 - srlw a2, a4, a0 - andi a2, a2, 1 - sw a0, 36(s10) - bnez a2, .LBB3_330 -# %bb.338: # %while.end863.i - # in Loop: Header=BB3_4 Depth=1 - li a0, 258 - ld a2, 432(sp) # 8-byte Folded Reload - mul a0, a2, a0 - add a0, s10, a0 - lui a2, 11 - add a2, a1, a2 - add a0, a0, a2 - sb t1, -1168(a0) - addiw a1, a1, 1 - j .LBB3_277 + j .LBB3_335 .LBB3_339: # %if.end820.lr.ph.i # in Loop: Header=BB3_4 Depth=1 - ld a2, 0(s10) + ld a2, 0(s4) lw a3, 8(a2) addiw a3, a3, -1 j .LBB3_341 @@ -3361,21 +3389,21 @@ addiw a5, a0, -8 addiw a3, a3, -1 li a6, -8 - blt a6, a5, .LBB3_332 + blt a6, a5, .LBB3_333 .LBB3_341: # %if.end820.i # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 - beq a3, t3, .LBB3_212 + beq a3, t3, .LBB3_293 # %bb.342: # %if.end826.i # in Loop: Header=BB3_341 Depth=2 ld a5, 0(a2) - lw a4, 32(s10) + lw a4, 32(s4) lbu a6, 0(a5) slli a4, a4, 8 or a4, a4, a6 - sw a4, 32(s10) + sw a4, 32(s4) addi a0, a0, 8 - sw a0, 36(s10) + sw a0, 36(s4) lw a6, 12(a2) addi a5, a5, 1 sd a5, 0(a2) @@ -3389,90 +3417,52 @@ addi a5, a5, 1 sw a5, 16(a2) j .LBB3_340 -.LBB3_344: # in Loop: Header=BB3_4 Depth=1 - sd t4, 456(sp) # 8-byte Folded Spill -.LBB3_345: # %BZ2_decompress.exit - # in Loop: Header=BB3_4 Depth=1 - li a2, 0 -.LBB3_346: # %BZ2_decompress.exit - # in Loop: Header=BB3_4 Depth=1 - sw a1, 0(s11) - sw s6, 4(s11) - ld a1, 432(sp) # 8-byte Folded Reload - sw a1, 8(s11) - sw t6, 12(s11) - sw t0, 16(s11) - sw t2, 20(s11) - ld a1, 400(sp) # 8-byte Folded Reload - sw a1, 24(s11) - sw t5, 28(s11) - ld a1, 424(sp) # 8-byte Folded Reload - sw a1, 32(s11) - sw a7, 36(s11) - ld a1, 416(sp) # 8-byte Folded Reload - sw a1, 40(s11) - ld a1, 472(sp) # 8-byte Folded Reload - ld a3, 448(sp) # 8-byte Folded Reload - sw a3, 0(a1) - sw s4, 48(s11) - ld a1, 392(sp) # 8-byte Folded Reload - sw a1, 52(s11) - sw t1, 56(s11) - ld a1, 376(sp) # 8-byte Folded Reload - sw a1, 60(s11) - ld a1, 456(sp) # 8-byte Folded Reload - sw a1, 64(s11) - sw s0, 68(s11) - ld a1, 440(sp) # 8-byte Folded Reload - sw a1, 72(s11) - ld a1, 384(sp) # 8-byte Folded Reload - sw a1, 76(s11) - ld a1, 408(sp) # 8-byte Folded Reload - sw a1, 80(s11) - sd s1, 84(s11) - sd s8, 92(s11) - sd s2, 100(s11) - beqz a2, .LBB3_347 - j .LBB3_519 -.LBB3_347: # %cleanup +.LBB3_344: # %while.end863.i # in Loop: Header=BB3_4 Depth=1 - lw a1, 8(s10) - li a3, 2 - bne a1, a3, .LBB3_521 - j .LBB3_4 -.LBB3_521: # %cleanup - j .LBB3_517 -.LBB3_348: # %while.end1120.i + li a0, 258 + mul a0, s10, a0 + add a0, s4, a0 + lui a2, 11 + add a2, a1, a2 + add a0, a0, a2 + ld a2, 424(sp) # 8-byte Folded Reload + sb a2, -1168(a0) + addiw a1, a1, 1 + j .LBB3_291 +.LBB3_345: # %while.end1120.i # in Loop: Header=BB3_4 Depth=1 - add a3, s8, a3 + ld a2, 448(sp) # 8-byte Folded Reload + add a3, a2, a3 lw a2, 0(a3) - subw a2, s0, a2 + subw a2, s9, a2 li a3, 257 - bltu a3, a2, .LBB3_344 -# %bb.349: # %if.end1133.i + bgeu a3, a2, .LBB3_346 + j .LBB3_192 +.LBB3_346: # %if.end1133.i # in Loop: Header=BB3_4 Depth=1 slli a2, a2, 2 - add a2, s2, a2 - lw a7, 0(a2) -.LBB3_350: # %while.cond1139.i - # in Loop: Header=BB3_4 Depth=1 - sd t4, 456(sp) # 8-byte Folded Spill - ld a0, 400(sp) # 8-byte Folded Reload - sd t2, 40(sp) # 8-byte Folded Spill - sd t5, 352(sp) # 8-byte Folded Spill - bne a7, a0, .LBB3_366 -# %bb.351: # %while.end1748.i + ld a0, 440(sp) # 8-byte Folded Reload + add a2, a0, a2 + lw a2, 0(a2) +.LBB3_347: # %while.cond1139.i + # in Loop: Header=BB3_4 Depth=1 + ld a0, 408(sp) # 8-byte Folded Reload + sd a2, 416(sp) # 8-byte Folded Spill + sd s0, 40(sp) # 8-byte Folded Spill + sd t5, 328(sp) # 8-byte Folded Spill + bne a2, a0, .LBB3_363 +# %bb.348: # %while.end1748.i # in Loop: Header=BB3_4 Depth=1 - lw a0, 56(s10) + lw a0, 56(s4) slti a2, a0, 0 not a2, a2 - ld a3, 448(sp) # 8-byte Folded Reload - slt a0, a0, a3 + slt a0, a0, s2 and a2, a2, a0 li a0, -4 - beqz a2, .LBB3_394 -# %bb.352: # %if.end1757.i + beqz a2, .LBB3_392 +# %bb.349: # %if.end1757.i # in Loop: Header=BB3_4 Depth=1 + mv t5, t2 mv t2, t0 sw zero, 0(s5) csrr a2, vlenb @@ -3480,8 +3470,9 @@ li a1, 1 ld t0, 128(sp) # 8-byte Folded Reload li a3, 64 - bltu a3, a2, .LBB3_356 -# %bb.353: # %vector.ph256 + ld s0, 416(sp) # 8-byte Folded Reload + bltu a3, a2, .LBB3_353 +# %bb.350: # %vector.ph256 # in Loop: Header=BB3_4 Depth=1 li a1, 508 mul a1, a2, a1 @@ -3489,37 +3480,37 @@ addi a1, a3, 1 ld a4, 120(sp) # 8-byte Folded Reload ld a5, 136(sp) # 8-byte Folded Reload -.LBB3_354: # %vector.body261 +.LBB3_351: # %vector.body261 # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 addi a6, a5, -1032 vl2re32.v v8, (a6) vs2r.v v8, (a5) - sub a4, a4, s7 - add a5, a5, s3 - bnez a4, .LBB3_354 -# %bb.355: # %middle.block253 + sub a4, a4, s8 + add a5, a5, s7 + bnez a4, .LBB3_351 +# %bb.352: # %middle.block253 # in Loop: Header=BB3_4 Depth=1 - bnez a3, .LBB3_358 -.LBB3_356: # %for.body1762.i.preheader + bnez a3, .LBB3_355 +.LBB3_353: # %for.body1762.i.preheader # in Loop: Header=BB3_4 Depth=1 addi a3, a1, -257 slli a1, a1, 2 add a1, s5, a1 -.LBB3_357: # %for.body1762.i +.LBB3_354: # %for.body1762.i # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 lw a4, -1032(a1) sw a4, 0(a1) addi a3, a3, 1 addi a1, a1, 4 - bnez a3, .LBB3_357 -.LBB3_358: # %for.body1776.i.preheader + bnez a3, .LBB3_354 +.LBB3_355: # %for.body1776.i.preheader # in Loop: Header=BB3_4 Depth=1 li a1, 0 li a3, 256 ld a4, 136(sp) # 8-byte Folded Reload -.LBB3_359: # %for.body1776.i +.LBB3_356: # %for.body1776.i # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 lw a5, 0(a4) @@ -3527,274 +3518,275 @@ sw a1, 0(a4) addi a3, a3, -1 addi a4, a4, 4 - bnez a3, .LBB3_359 -# %bb.360: # %for.body1791.i.preheader + bnez a3, .LBB3_356 +# %bb.357: # %for.body1791.i.preheader # in Loop: Header=BB3_4 Depth=1 li a1, 0 li a3, 257 mv a4, s5 -.LBB3_361: # %for.body1791.i +.LBB3_358: # %for.body1791.i # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 lw a5, 0(a4) slti a6, a5, 0 - ld t5, 448(sp) # 8-byte Folded Reload - slt a5, t5, a5 + slt a5, s2, a5 or a5, a6, a5 - bnez a5, .LBB3_396 -# %bb.362: # %for.inc1805.i - # in Loop: Header=BB3_361 Depth=2 + bnez a5, .LBB3_394 +# %bb.359: # %for.inc1805.i + # in Loop: Header=BB3_358 Depth=2 addi a1, a1, 1 addi a3, a3, -1 addi a4, a4, 4 - bnez a3, .LBB3_361 -# %bb.363: # %for.end1807.i + bnez a3, .LBB3_358 +# %bb.360: # %for.end1807.i # in Loop: Header=BB3_4 Depth=1 - lbu a1, 44(s10) - sw zero, 16(s10) - sb zero, 12(s10) - sw s9, 8(s10) - ld a0, 448(sp) # 8-byte Folded Reload - slli a0, a0, 32 - beqz a1, .LBB3_415 -# %bb.364: # %for.body1822.i.preheader + lbu a1, 44(s4) + sw zero, 16(s4) + sb zero, 12(s4) + sw t4, 8(s4) + slli a0, s2, 32 + beqz a1, .LBB3_413 +# %bb.361: # %for.body1822.i.preheader # in Loop: Header=BB3_4 Depth=1 li a1, 65 - bltu a2, a1, .LBB3_419 -# %bb.365: # in Loop: Header=BB3_4 Depth=1 - mv t4, t1 + bltu a2, a1, .LBB3_417 +# %bb.362: # in Loop: Header=BB3_4 Depth=1 li a1, 0 - j .LBB3_422 -.LBB3_366: # %if.end1144.i + j .LBB3_419 +.LBB3_363: # %if.end1144.i # in Loop: Header=BB3_4 Depth=1 li a0, 1 li a2, -1 - bltu a0, a7, .LBB3_384 -.LBB3_367: # in Loop: Header=BB3_4 Depth=1 + ld a3, 416(sp) # 8-byte Folded Reload + bltu a0, a3, .LBB3_382 +.LBB3_364: # in Loop: Header=BB3_4 Depth=1 lui a3, 2 - ld a5, 424(sp) # 8-byte Folded Reload slli a4, a0, 1 sd a4, 392(sp) # 8-byte Folded Spill - beqz a7, .LBB3_369 -# %bb.368: # %do.body.i + ld a4, 416(sp) # 8-byte Folded Reload + beqz a4, .LBB3_366 +# %bb.365: # %do.body.i # in Loop: Header=BB3_4 Depth=1 ld a0, 392(sp) # 8-byte Folded Reload -.LBB3_369: # %do.body.i +.LBB3_366: # %do.body.i # in Loop: Header=BB3_4 Depth=1 - addw s4, a0, a2 - bnez a5, .LBB3_372 -# %bb.370: # %if.then1167.i - # in Loop: Header=BB3_4 Depth=1 - addiw t5, t5, 1 - bge t5, t2, .LBB3_395 -# %bb.371: # %if.end1172.i + addw a0, a0, a2 + sd a0, 400(sp) # 8-byte Folded Spill + beqz ra, .LBB3_368 +# %bb.367: # in Loop: Header=BB3_4 Depth=1 + ld s0, 456(sp) # 8-byte Folded Reload + j .LBB3_370 +.LBB3_368: # %if.then1167.i + # in Loop: Header=BB3_4 Depth=1 + addiw s3, s3, 1 + bge s3, t2, .LBB3_393 +# %bb.369: # %if.end1172.i # in Loop: Header=BB3_4 Depth=1 - add a0, s10, t5 + add a0, s4, s3 add a0, a0, a3 lbu a3, -308(a0) slli a0, a3, 2 lui a2, 16 - add a2, s10, a2 + add a2, s4, a2 add a0, a2, a0 - lw a0, -1524(a0) - sd a0, 408(sp) # 8-byte Folded Spill + lw s0, -1524(a0) li a0, 1032 - sd a3, 384(sp) # 8-byte Folded Spill + sd a3, 432(sp) # 8-byte Folded Spill mul a0, a3, a0 - add a0, s10, a0 + add a0, s4, a0 ld a2, 360(sp) # 8-byte Folded Reload - add s1, a0, a2 - ld a2, 328(sp) # 8-byte Folded Reload - add s2, a0, a2 + add s6, a0, a2 + ld a2, 304(sp) # 8-byte Folded Reload + add a2, a0, a2 + sd a2, 440(sp) # 8-byte Folded Spill lui a2, 13 addiw a2, a2, -1620 - add s8, a0, a2 - li a5, 50 -.LBB3_372: # %if.end1192.i + add a0, a0, a2 + sd a0, 448(sp) # 8-byte Folded Spill + li ra, 50 +.LBB3_370: # %if.end1192.i # in Loop: Header=BB3_4 Depth=1 - addiw a5, a5, -1 - sd a5, 424(sp) # 8-byte Folded Spill - ld a0, 408(sp) # 8-byte Folded Reload - sd a0, 456(sp) # 8-byte Folded Spill -.LBB3_373: # %sw.bb1194.i + addiw ra, ra, -1 + sd s0, 456(sp) # 8-byte Folded Spill +.LBB3_371: # %sw.bb1194.i # in Loop: Header=BB3_4 Depth=1 - lw a0, 36(s10) + lw a0, 36(s4) li a2, 38 - sw a2, 8(s10) - ld t4, 456(sp) # 8-byte Folded Reload - bge a0, t4, .LBB3_379 -# %bb.374: # %if.end1212.lr.ph.i + sw a2, 8(s4) + bge a0, s0, .LBB3_377 +# %bb.372: # %if.end1212.lr.ph.i # in Loop: Header=BB3_4 Depth=1 - ld a2, 0(s10) + ld a2, 0(s4) lw a3, 8(a2) addiw a3, a3, -1 - j .LBB3_376 -.LBB3_375: # %if.end1245.i - # in Loop: Header=BB3_376 Depth=2 + j .LBB3_374 +.LBB3_373: # %if.end1245.i + # in Loop: Header=BB3_374 Depth=2 addiw a3, a3, -1 - bge a0, t4, .LBB3_380 -.LBB3_376: # %if.end1212.i + bge a0, s0, .LBB3_378 +.LBB3_374: # %if.end1212.i # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 - bne a3, t3, .LBB3_377 - j .LBB3_212 -.LBB3_377: # %if.end1218.i - # in Loop: Header=BB3_376 Depth=2 + beq a3, t3, .LBB3_293 +# %bb.375: # %if.end1218.i + # in Loop: Header=BB3_374 Depth=2 ld a5, 0(a2) - lw a4, 32(s10) + lw a4, 32(s4) lbu a6, 0(a5) slli a4, a4, 8 or a4, a4, a6 - sw a4, 32(s10) + sw a4, 32(s4) addiw a0, a0, 8 - sw a0, 36(s10) + sw a0, 36(s4) lw a6, 12(a2) addi a5, a5, 1 sd a5, 0(a2) sw a3, 8(a2) addiw a6, a6, 1 sw a6, 12(a2) - bnez a6, .LBB3_375 -# %bb.378: # %if.then1241.i - # in Loop: Header=BB3_376 Depth=2 + bnez a6, .LBB3_373 +# %bb.376: # %if.then1241.i + # in Loop: Header=BB3_374 Depth=2 lw a5, 16(a2) addi a5, a5, 1 sw a5, 16(a2) - j .LBB3_375 -.LBB3_379: # %sw.bb1194.if.then1201_crit_edge.i + j .LBB3_373 +.LBB3_377: # %sw.bb1194.if.then1201_crit_edge.i # in Loop: Header=BB3_4 Depth=1 - lw a4, 32(s10) -.LBB3_380: # %if.then1201.i + lw a4, 32(s4) +.LBB3_378: # %if.then1201.i # in Loop: Header=BB3_4 Depth=1 - subw a2, a0, t4 + subw a2, a0, s0 srlw a0, a4, a2 - sllw a3, t3, t4 + sllw a3, t3, s0 not a3, a3 - and s0, a0, a3 - sw a2, 36(s10) -.LBB3_381: # %while.cond1247.i + and s9, a0, a3 + sw a2, 36(s4) +.LBB3_379: # %while.cond1247.i # in Loop: Header=BB3_4 Depth=1 li a3, 20 li a0, -4 - blt a3, t4, .LBB3_344 -# %bb.382: # %if.end1252.i + bge a3, s0, .LBB3_380 + j .LBB3_192 +.LBB3_380: # %if.end1252.i # in Loop: Header=BB3_4 Depth=1 - slli a3, t4, 2 - add a4, s1, a3 + slli a3, s0, 2 + add a4, s6, a3 lw a4, 0(a4) - bge a4, s0, .LBB3_391 -# %bb.383: # %if.end1258.i + bge a4, s9, .LBB3_389 +# %bb.381: # %if.end1258.i # in Loop: Header=BB3_4 Depth=1 - addiw t4, t4, 1 - sd t4, 456(sp) # 8-byte Folded Spill - j .LBB3_279 -.LBB3_384: # %if.else1383.i + addiw s0, s0, 1 + j .LBB3_220 +.LBB3_382: # %if.else1383.i # in Loop: Header=BB3_4 Depth=1 li a0, -4 - ld a2, 448(sp) # 8-byte Folded Reload - ld a3, 416(sp) # 8-byte Folded Reload - bge a2, a3, .LBB3_345 -# %bb.385: # %if.end1387.i + blt s2, t5, .LBB3_383 + j .LBB3_192 +.LBB3_383: # %if.end1387.i # in Loop: Header=BB3_4 Depth=1 - sd t6, 296(sp) # 8-byte Folded Spill - addiw a4, a7, -1 + sd t6, 32(sp) # 8-byte Folded Spill + ld s0, 416(sp) # 8-byte Folded Reload + addiw a4, s0, -1 ld t5, 112(sp) # 8-byte Folded Reload li a2, 16 lui t6, 1 - sd a7, 48(sp) # 8-byte Folded Spill - bltu a2, a7, .LBB3_398 -# %bb.386: # %if.then1394.i + sd a7, 376(sp) # 8-byte Folded Spill + sd t1, 48(sp) # 8-byte Folded Spill + bltu a2, s0, .LBB3_396 +# %bb.384: # %if.then1394.i # in Loop: Header=BB3_4 Depth=1 ld a2, 168(sp) # 8-byte Folded Reload lw a3, 0(a2) add a2, a3, a4 slli a2, a2, 32 srli a2, a2, 32 - add a2, s10, a2 + add a2, s4, a2 addi a2, a2, 2047 lbu a2, 1677(a2) li a5, 4 sd t0, 240(sp) # 8-byte Folded Spill - sd t1, 32(sp) # 8-byte Folded Spill - bltu a4, a5, .LBB3_471 -# %bb.387: # %while.body1404.preheader.i + bltu a4, a5, .LBB3_482 +# %bb.385: # %while.body1404.preheader.i # in Loop: Header=BB3_4 Depth=1 slli a5, a4, 32 srli a6, a5, 32 - addi t3, a7, -5 + addi t3, s0, -5 srliw t4, t3, 2 li t0, 112 addi a5, t4, 1 ld t1, 96(sp) # 8-byte Folded Reload mv a7, t1 - bltu t0, t1, .LBB3_389 -# %bb.388: # %while.body1404.preheader.i + bltu t0, t1, .LBB3_387 +# %bb.386: # %while.body1404.preheader.i # in Loop: Header=BB3_4 Depth=1 li a7, 112 -.LBB3_389: # %while.body1404.preheader.i +.LBB3_387: # %while.body1404.preheader.i # in Loop: Header=BB3_4 Depth=1 - bgeu a5, a7, .LBB3_453 -# %bb.390: # in Loop: Header=BB3_4 Depth=1 + bgeu a5, a7, .LBB3_450 +# %bb.388: # in Loop: Header=BB3_4 Depth=1 mv a7, a6 li t1, 3 - j .LBB3_468 -.LBB3_391: # %while.end1313.i + j .LBB3_479 +.LBB3_389: # %while.end1313.i # in Loop: Header=BB3_4 Depth=1 - add a3, s8, a3 + ld a2, 448(sp) # 8-byte Folded Reload + add a3, a2, a3 lw a2, 0(a3) - subw a2, s0, a2 + subw a2, s9, a2 li a3, 257 - bltu a3, a2, .LBB3_344 -# %bb.392: # %if.end1326.i + bgeu a3, a2, .LBB3_390 + j .LBB3_192 +.LBB3_390: # %if.end1326.i # in Loop: Header=BB3_4 Depth=1 slli a2, a2, 2 - add a2, s2, a2 - lw a7, 0(a2) - bgeu a7, s9, .LBB3_405 -# %bb.393: # in Loop: Header=BB3_4 Depth=1 + ld a3, 440(sp) # 8-byte Folded Reload + add a2, a3, a2 + lw a2, 0(a2) + sd a2, 416(sp) # 8-byte Folded Spill + bgeu a2, t4, .LBB3_403 +# %bb.391: # in Loop: Header=BB3_4 Depth=1 ld a0, 392(sp) # 8-byte Folded Reload - mv a2, s4 - j .LBB3_367 + ld a2, 400(sp) # 8-byte Folded Reload + j .LBB3_364 +.LBB3_392: # in Loop: Header=BB3_4 Depth=1 + ld a3, 416(sp) # 8-byte Folded Reload + sd a3, 408(sp) # 8-byte Folded Spill + j .LBB3_294 +.LBB3_393: # in Loop: Header=BB3_4 Depth=1 + li ra, 0 + j .LBB3_327 .LBB3_394: # in Loop: Header=BB3_4 Depth=1 - sd a7, 400(sp) # 8-byte Folded Spill - j .LBB3_346 -.LBB3_395: # in Loop: Header=BB3_4 Depth=1 - sd t4, 456(sp) # 8-byte Folded Spill - sd zero, 424(sp) # 8-byte Folded Spill - j .LBB3_334 -.LBB3_396: # in Loop: Header=BB3_4 Depth=1 li a2, 0 - sd a7, 400(sp) # 8-byte Folded Spill + sd s0, 408(sp) # 8-byte Folded Spill mv t0, t2 -.LBB3_397: # %BZ2_decompress.exit +.LBB3_395: # %BZ2_decompress.exit # in Loop: Header=BB3_4 Depth=1 - ld t2, 40(sp) # 8-byte Folded Reload - ld t5, 352(sp) # 8-byte Folded Reload - j .LBB3_346 -.LBB3_398: # %if.else1457.i + mv t2, t5 + j .LBB3_436 +.LBB3_396: # %if.else1457.i # in Loop: Header=BB3_4 Depth=1 - mv t4, t1 srliw a5, a4, 4 slli a2, a5, 2 - add a2, s10, a2 + add a2, s4, a2 lui a3, 2 addiw a3, a3, -372 add a3, a2, a3 lw a6, 0(a3) andi a4, a4, 15 addw a2, a6, a4 - add a2, s10, a2 + add a2, s4, a2 addi a2, a2, 2047 lbu a2, 1677(a2) mv t1, t0 - beqz a4, .LBB3_401 -# %bb.399: # %while.body1471.preheader.i + beqz a4, .LBB3_399 +# %bb.397: # %while.body1471.preheader.i # in Loop: Header=BB3_4 Depth=1 - addi a4, a7, -1 + addi a4, s0, -1 andi a4, a4, 15 add a4, a6, a4 add a7, t5, a4 -.LBB3_400: # %while.body1471.i +.LBB3_398: # %while.body1471.i # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 lbu a6, -1(a7) @@ -3802,15 +3794,15 @@ lw a6, 0(a3) addi a4, a4, -1 addi a7, a7, -1 - blt a6, a4, .LBB3_400 -.LBB3_401: # %while.body1488.preheader.i + blt a6, a4, .LBB3_398 +.LBB3_399: # %while.body1488.preheader.i # in Loop: Header=BB3_4 Depth=1 srli a4, t3, 32 addi a6, a6, 1 sw a6, 0(a3) addi a5, a5, 1 lui t0, 2 -.LBB3_402: # %while.body1488.i +.LBB3_400: # %while.body1488.i # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 lw a6, 0(a3) @@ -3819,7 +3811,7 @@ addi a7, a5, -2 and a7, a7, a4 slli a7, a7, 2 - add a7, s10, a7 + add a7, s4, a7 add a7, a7, t0 lw a7, -372(a7) addiw a7, a7, 15 @@ -3829,105 +3821,104 @@ sb a7, 0(a6) addi a5, a5, -1 addi a3, a3, -4 - blt ra, a5, .LBB3_402 -# %bb.403: # %while.end1509.i + blt s1, a5, .LBB3_400 +# %bb.401: # %while.end1509.i # in Loop: Header=BB3_4 Depth=1 ld a4, 168(sp) # 8-byte Folded Reload lw a3, 0(a4) addiw a3, a3, -1 sw a3, 0(a4) - add a3, s10, a3 + add a3, s4, a3 addi a3, a3, 2047 sb a2, 1677(a3) lw a3, 0(a4) - beqz a3, .LBB3_439 -# %bb.404: # in Loop: Header=BB3_4 Depth=1 - ld t6, 296(sp) # 8-byte Folded Reload + beqz a3, .LBB3_437 +# %bb.402: # in Loop: Header=BB3_4 Depth=1 mv t0, t1 - j .LBB3_442 -.LBB3_405: # %do.end.i + j .LBB3_439 +.LBB3_403: # %do.end.i # in Loop: Header=BB3_4 Depth=1 + sd t5, 328(sp) # 8-byte Folded Spill ld a2, 168(sp) # 8-byte Folded Reload lw a2, 0(a2) - add a2, s10, a2 + add a2, s4, a2 addi a2, a2, 2047 lbu a2, 1677(a2) - add a2, s10, a2 + add a2, s4, a2 addi a2, a2, 2047 lbu a3, 1421(a2) slli a2, a3, 2 - add a4, s10, a2 + add a4, s4, a2 lw a5, 68(a4) - lbu a6, 44(s10) - addiw a2, s4, 1 + lbu a6, 44(s4) + ld t5, 400(sp) # 8-byte Folded Reload + addiw a2, t5, 1 add a5, a5, a2 sw a5, 68(a4) - beqz a6, .LBB3_443 -# %bb.406: # %while.cond1351.preheader.i + beqz a6, .LBB3_440 +# %bb.404: # %while.cond1351.preheader.i # in Loop: Header=BB3_4 Depth=1 - bltz s4, .LBB3_452 -# %bb.407: # %while.body1354.lr.ph.i + bltz t5, .LBB3_449 +# %bb.405: # %while.body1354.lr.ph.i # in Loop: Header=BB3_4 Depth=1 - sd t1, 32(sp) # 8-byte Folded Spill - ld a5, 448(sp) # 8-byte Folded Reload - mv a4, a5 - ld a6, 416(sp) # 8-byte Folded Reload - blt a6, a5, .LBB3_409 -# %bb.408: # %while.body1354.lr.ph.i + sd t1, 48(sp) # 8-byte Folded Spill + mv a4, s2 + ld a5, 328(sp) # 8-byte Folded Reload + blt a5, s2, .LBB3_407 +# %bb.406: # %while.body1354.lr.ph.i # in Loop: Header=BB3_4 Depth=1 - ld a4, 416(sp) # 8-byte Folded Reload -.LBB3_409: # %while.body1354.lr.ph.i + mv a4, a5 +.LBB3_407: # %while.body1354.lr.ph.i # in Loop: Header=BB3_4 Depth=1 mv a5, a2 ld t1, 88(sp) # 8-byte Folded Reload - blez a2, .LBB3_411 -# %bb.410: # %while.body1354.lr.ph.i + blez a2, .LBB3_409 +# %bb.408: # %while.body1354.lr.ph.i # in Loop: Header=BB3_4 Depth=1 li a5, 1 -.LBB3_411: # %while.body1354.lr.ph.i +.LBB3_409: # %while.body1354.lr.ph.i # in Loop: Header=BB3_4 Depth=1 - mv t3, t4 - sub a5, s4, a5 + sd t2, 24(sp) # 8-byte Folded Spill + ld a6, 400(sp) # 8-byte Folded Reload + sub a5, a6, a5 addi a5, a5, 1 slli a5, a5, 32 srli a5, a5, 32 - ld a6, 448(sp) # 8-byte Folded Reload - sub a6, a4, a6 - bltu a5, a6, .LBB3_413 -# %bb.412: # %while.body1354.lr.ph.i + sub a6, a4, s2 + bltu a5, a6, .LBB3_411 +# %bb.410: # %while.body1354.lr.ph.i # in Loop: Header=BB3_4 Depth=1 mv a5, a6 -.LBB3_413: # %while.body1354.lr.ph.i +.LBB3_411: # %while.body1354.lr.ph.i # in Loop: Header=BB3_4 Depth=1 - mv s9, s6 - sd s8, 288(sp) # 8-byte Folded Spill - sd s1, 24(sp) # 8-byte Folded Spill - mv t4, s0 - sd t2, 40(sp) # 8-byte Folded Spill - sd a7, 48(sp) # 8-byte Folded Spill - sd t5, 352(sp) # 8-byte Folded Spill - mv s4, t3 - bgeu a5, t1, .LBB3_455 -# %bb.414: # in Loop: Header=BB3_4 Depth=1 - ld s1, 440(sp) # 8-byte Folded Reload - mv t2, t0 - ld s0, 376(sp) # 8-byte Folded Reload - mv s6, s3 - ld a7, 448(sp) # 8-byte Folded Reload - j .LBB3_460 -.LBB3_415: # %for.cond1995.preheader.i + sd s10, 344(sp) # 8-byte Folded Spill + sd ra, 320(sp) # 8-byte Folded Spill + sd s3, 352(sp) # 8-byte Folded Spill + sd s9, 288(sp) # 8-byte Folded Spill + sd t6, 32(sp) # 8-byte Folded Spill + mv t2, a7 + sd s0, 40(sp) # 8-byte Folded Spill + bgeu a5, t1, .LBB3_452 +# %bb.412: # in Loop: Header=BB3_4 Depth=1 + ld t5, 440(sp) # 8-byte Folded Reload + ld ra, 392(sp) # 8-byte Folded Reload + mv t6, t0 + ld s10, 432(sp) # 8-byte Folded Reload + ld s0, 384(sp) # 8-byte Folded Reload + j .LBB3_457 +.LBB3_413: # %for.cond1995.preheader.i # in Loop: Header=BB3_4 Depth=1 ld a1, 464(sp) # 8-byte Folded Reload ld a1, 0(a1) li a2, 0 srli a0, a0, 32 mv a3, a1 -.LBB3_416: # %for.body1998.i +.LBB3_414: # %for.body1998.i # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 lbu a4, 0(a3) slli a4, a4, 2 - add a4, s10, a4 + add a4, s4, a4 lw a5, 1096(a4) slli a5, a5, 2 add a5, a1, a5 @@ -3940,22 +3931,22 @@ addi a0, a0, -1 addi a2, a2, 256 addi a3, a3, 4 - bnez a0, .LBB3_416 -# %bb.417: # %for.end2018.loopexit.i + bnez a0, .LBB3_414 +# %bb.415: # %for.end2018.loopexit.i # in Loop: Header=BB3_4 Depth=1 - lw a0, 56(s10) + lw a0, 56(s4) slli a0, a0, 2 add a0, a1, a0 lwu a2, 0(a0) - lw a0, 40(s10) + lw a0, 40(s4) srli a2, a2, 8 - sw a2, 60(s10) - sw zero, 1092(s10) + sw a2, 60(s4) + sw zero, 1092(s4) ld a3, 368(sp) # 8-byte Folded Reload mulw a3, a0, a3 li a0, 1 - bgeu a2, a3, .LBB3_347 -# %bb.418: # %if.end2032.i + bgeu a2, a3, .LBB3_295 +# %bb.416: # %if.end2032.i # in Loop: Header=BB3_4 Depth=1 mv t0, t2 slli a2, a2, 2 @@ -3964,57 +3955,55 @@ li a2, 0 li a0, 0 andi a3, a1, 255 - sw a3, 64(s10) + sw a3, 64(s4) srliw a1, a1, 8 - sw a1, 60(s10) - sw ra, 1092(s10) - sd a7, 400(sp) # 8-byte Folded Spill - ld a1, 448(sp) # 8-byte Folded Reload - j .LBB3_397 -.LBB3_419: # %vector.ph + sw a1, 60(s4) + sw s1, 1092(s4) + sd s0, 408(sp) # 8-byte Folded Spill + mv a1, s2 + j .LBB3_395 +.LBB3_417: # %vector.ph # in Loop: Header=BB3_4 Depth=1 li a1, 508 mul a1, a2, a1 andi a1, a1, 256 ld a2, 120(sp) # 8-byte Folded Reload mv a3, s5 -.LBB3_420: # %vector.body +.LBB3_418: # %vector.body # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 vl2re32.v v8, (a3) addi a4, a3, 1028 vs2r.v v8, (a4) - sub a2, a2, s7 - add a3, a3, s3 - bnez a2, .LBB3_420 -# %bb.421: # in Loop: Header=BB3_4 Depth=1 - mv t4, t1 -.LBB3_422: # %for.body1822.i.preheader604 + sub a2, a2, s8 + add a3, a3, s7 + bnez a2, .LBB3_418 +.LBB3_419: # %for.body1822.i.preheader604 # in Loop: Header=BB3_4 Depth=1 - mv t1, a7 + sd a7, 376(sp) # 8-byte Folded Spill addi a2, a1, -257 slli a1, a1, 2 ld a3, 104(sp) # 8-byte Folded Reload add a1, a3, a1 -.LBB3_423: # %for.body1822.i +.LBB3_420: # %for.body1822.i # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 lw a3, -1028(a1) sw a3, 0(a1) addi a2, a2, 1 addi a1, a1, 4 - bnez a2, .LBB3_423 -# %bb.424: # %for.body1834.lr.ph.i + bnez a2, .LBB3_420 +# %bb.421: # %for.body1834.lr.ph.i # in Loop: Header=BB3_4 Depth=1 li a1, 0 srli a0, a0, 32 - j .LBB3_427 -.LBB3_425: # %if.else1867.i - # in Loop: Header=BB3_427 Depth=2 + j .LBB3_424 +.LBB3_422: # %if.else1867.i + # in Loop: Header=BB3_424 Depth=2 andi a5, a5, 15 slli a6, a6, 4 -.LBB3_426: # %if.end1885.i - # in Loop: Header=BB3_427 Depth=2 +.LBB3_423: # %if.end1885.i + # in Loop: Header=BB3_424 Depth=2 or a5, a5, a6 addi a3, a3, 77 sb a5, 0(a4) @@ -4023,8 +4012,8 @@ sw a4, 0(a3) addi a2, a2, 1 addi a1, a1, 2 - beq a0, a2, .LBB3_429 -.LBB3_427: # %for.body1834.i + beq a0, a2, .LBB3_426 +.LBB3_424: # %for.body1834.i # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 ld a5, 464(sp) # 8-byte Folded Reload @@ -4032,7 +4021,7 @@ add a4, a3, a1 lbu a3, 0(a4) slli a3, a3, 2 - add a3, s10, a3 + add a3, s4, a3 addi a3, a3, 2047 lw a6, 77(a3) ld a5, 16(a5) @@ -4043,14 +4032,14 @@ lbu a5, 0(a4) andi a7, a2, 1 srliw a6, a6, 16 - bnez a7, .LBB3_425 -# %bb.428: # %if.then1850.i - # in Loop: Header=BB3_427 Depth=2 + bnez a7, .LBB3_422 +# %bb.425: # %if.then1850.i + # in Loop: Header=BB3_424 Depth=2 andi a5, a5, 240 - j .LBB3_426 -.LBB3_429: # %for.end1892.loopexit.i + j .LBB3_423 +.LBB3_426: # %for.end1892.loopexit.i # in Loop: Header=BB3_4 Depth=1 - lw a1, 56(s10) + lw a1, 56(s4) ld a2, 464(sp) # 8-byte Folded Reload ld a0, 8(a2) ld a2, 16(a2) @@ -4065,64 +4054,64 @@ srlw a2, a2, a3 slli a2, a2, 60 srli a2, a2, 44 - or s6, a2, a0 - j .LBB3_432 -.LBB3_430: # %if.else1948.i - # in Loop: Header=BB3_432 Depth=2 + or t1, a2, a0 + j .LBB3_429 +.LBB3_427: # %if.else1948.i + # in Loop: Header=BB3_429 Depth=2 andi a4, a4, 15 slli a7, a7, 4 -.LBB3_431: # %if.end1963.i - # in Loop: Header=BB3_432 Depth=2 +.LBB3_428: # %if.end1963.i + # in Loop: Header=BB3_429 Depth=2 or a7, a4, a7 slli a4, a1, 2 andi a4, a4, 4 sb a7, 0(a6) - lw a6, 56(s10) + lw a6, 56(s4) srlw a2, a2, a4 slli a2, a2, 60 srli a2, a2, 44 - or s6, a2, a0 - beq a1, a6, .LBB3_434 -.LBB3_432: # %do.body1909.i + or t1, a2, a0 + beq a1, a6, .LBB3_431 +.LBB3_429: # %do.body1909.i # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 mv a7, a1 - mv a1, s6 + mv a1, t1 ld a3, 464(sp) # 8-byte Folded Reload ld a0, 8(a3) - slli a5, s6, 32 + slli a5, t1, 32 srli a2, a5, 31 ld a6, 16(a3) add a4, a0, a2 lhu a0, 0(a4) - srliw a3, s6, 1 + srliw a3, t1, 1 add a6, a6, a3 lbu a2, 0(a6) sh a7, 0(a4) lbu a4, 0(a6) - andi t0, s6, 1 + andi t0, t1, 1 srliw a7, a7, 16 - bnez t0, .LBB3_430 -# %bb.433: # %if.then1934.i - # in Loop: Header=BB3_432 Depth=2 + bnez t0, .LBB3_427 +# %bb.430: # %if.then1934.i + # in Loop: Header=BB3_429 Depth=2 andi a4, a4, 240 - j .LBB3_431 -.LBB3_434: # %do.end1968.i + j .LBB3_428 +.LBB3_431: # %do.end1968.i # in Loop: Header=BB3_4 Depth=1 li a6, 0 srli a5, a5, 32 - sw a1, 60(s10) - sw zero, 1092(s10) + sw a1, 60(s4) + sw zero, 1092(s4) li a0, 256 mv t0, t2 - ld t2, 40(sp) # 8-byte Folded Reload - j .LBB3_436 -.LBB3_435: # %do.body.i.i53 - # in Loop: Header=BB3_436 Depth=2 + mv t2, t5 + j .LBB3_433 +.LBB3_432: # %do.body.i.i53 + # in Loop: Header=BB3_433 Depth=2 mv a6, a2 subw a2, a0, a2 - beq a2, ra, .LBB3_438 -.LBB3_436: # %do.body.i.i53 + beq a2, s1, .LBB3_435 +.LBB3_433: # %do.body.i.i53 # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 add a2, a6, a0 @@ -4130,18 +4119,18 @@ slli a7, a2, 2 add a7, s5, a7 lw a7, 0(a7) - bge a1, a7, .LBB3_435 -# %bb.437: # in Loop: Header=BB3_436 Depth=2 + bge a1, a7, .LBB3_432 +# %bb.434: # in Loop: Header=BB3_433 Depth=2 mv a0, a2 subw a2, a2, a6 - bne a2, ra, .LBB3_436 -.LBB3_438: # %indexIntoF.exit.i64 + bne a2, s1, .LBB3_433 +.LBB3_435: # %indexIntoF.exit.i64 # in Loop: Header=BB3_4 Depth=1 ld t5, 464(sp) # 8-byte Folded Reload ld a7, 16(t5) li a2, 0 li a0, 0 - sw a6, 64(s10) + sw a6, 64(s4) ld a6, 8(t5) add a3, a7, a3 lbu a3, 0(a3) @@ -4152,21 +4141,23 @@ slli a3, a3, 60 srli a3, a3, 44 or a3, a3, a5 - sw a3, 60(s10) - sw ra, 1092(s10) - mv a7, t1 - sd t1, 400(sp) # 8-byte Folded Spill - mv t1, t4 - ld t5, 352(sp) # 8-byte Folded Reload - j .LBB3_346 -.LBB3_439: # %for.cond1527.preheader.i.preheader + sw a3, 60(s4) + sw s1, 1092(s4) + sd s0, 408(sp) # 8-byte Folded Spill + ld a7, 376(sp) # 8-byte Folded Reload +.LBB3_436: # %BZ2_decompress.exit + # in Loop: Header=BB3_4 Depth=1 + ld s0, 40(sp) # 8-byte Folded Reload + ld t5, 328(sp) # 8-byte Folded Reload + j .LBB3_294 +.LBB3_437: # %for.cond1527.preheader.i.preheader # in Loop: Header=BB3_4 Depth=1 li a3, -16 addi a4, t6, -16 ld a5, 200(sp) # 8-byte Folded Reload ld a6, 192(sp) # 8-byte Folded Reload mv t0, t1 -.LBB3_440: # %for.cond1527.preheader.i +.LBB3_438: # %for.cond1527.preheader.i # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 lw a7, 0(a6) @@ -4253,82 +4244,82 @@ addi a6, a6, -4 addi a4, a4, -16 addi a5, a5, -16 - bnez a3, .LBB3_440 -# %bb.441: # in Loop: Header=BB3_4 Depth=1 - ld t6, 296(sp) # 8-byte Folded Reload -.LBB3_442: # %if.end1553.i - # in Loop: Header=BB3_4 Depth=1 - mv t1, t4 - j .LBB3_479 -.LBB3_443: # %while.cond1367.preheader.i - # in Loop: Header=BB3_4 Depth=1 - bltz s4, .LBB3_452 -# %bb.444: # %while.body1370.lr.ph.i + bnez a3, .LBB3_438 +.LBB3_439: # in Loop: Header=BB3_4 Depth=1 + ld t6, 32(sp) # 8-byte Folded Reload + ld t1, 48(sp) # 8-byte Folded Reload + j .LBB3_490 +.LBB3_440: # %while.cond1367.preheader.i + # in Loop: Header=BB3_4 Depth=1 + bltz t5, .LBB3_449 +# %bb.441: # %while.body1370.lr.ph.i + # in Loop: Header=BB3_4 Depth=1 + mv a4, s2 + ld a5, 328(sp) # 8-byte Folded Reload + blt a5, s2, .LBB3_443 +# %bb.442: # %while.body1370.lr.ph.i # in Loop: Header=BB3_4 Depth=1 - ld a5, 448(sp) # 8-byte Folded Reload mv a4, a5 - ld a6, 416(sp) # 8-byte Folded Reload - blt a6, a5, .LBB3_446 -# %bb.445: # %while.body1370.lr.ph.i - # in Loop: Header=BB3_4 Depth=1 - ld a4, 416(sp) # 8-byte Folded Reload -.LBB3_446: # %while.body1370.lr.ph.i +.LBB3_443: # %while.body1370.lr.ph.i # in Loop: Header=BB3_4 Depth=1 mv a5, a2 - blez a2, .LBB3_448 -# %bb.447: # %while.body1370.lr.ph.i + blez a2, .LBB3_445 +# %bb.444: # %while.body1370.lr.ph.i # in Loop: Header=BB3_4 Depth=1 li a5, 1 -.LBB3_448: # %while.body1370.lr.ph.i +.LBB3_445: # %while.body1370.lr.ph.i # in Loop: Header=BB3_4 Depth=1 - sub a5, s4, a5 + sd t6, 32(sp) # 8-byte Folded Spill + ld a6, 400(sp) # 8-byte Folded Reload + sub a5, a6, a5 addi a5, a5, 1 slli a5, a5, 32 srli a6, a5, 32 - ld a5, 448(sp) # 8-byte Folded Reload - sub a5, a4, a5 - bltu a6, a5, .LBB3_450 -# %bb.449: # %while.body1370.lr.ph.i + sub a5, a4, s2 + bltu a6, a5, .LBB3_447 +# %bb.446: # %while.body1370.lr.ph.i # in Loop: Header=BB3_4 Depth=1 mv a6, a5 -.LBB3_450: # %while.body1370.lr.ph.i +.LBB3_447: # %while.body1370.lr.ph.i # in Loop: Header=BB3_4 Depth=1 - mv s9, s6 - sd s8, 288(sp) # 8-byte Folded Spill - sd s1, 24(sp) # 8-byte Folded Spill - sd s0, 56(sp) # 8-byte Folded Spill - sd t2, 40(sp) # 8-byte Folded Spill - sd a7, 48(sp) # 8-byte Folded Spill + sd s10, 344(sp) # 8-byte Folded Spill + sd ra, 320(sp) # 8-byte Folded Spill + sd s3, 352(sp) # 8-byte Folded Spill + sd s9, 288(sp) # 8-byte Folded Spill + sd t2, 24(sp) # 8-byte Folded Spill + ld t6, 416(sp) # 8-byte Folded Reload + sd a7, 376(sp) # 8-byte Folded Spill ld a5, 96(sp) # 8-byte Folded Reload srli a5, a5, 2 - sd t5, 352(sp) # 8-byte Folded Spill - mv s4, t4 - mv t4, t1 - bgeu a6, a5, .LBB3_498 -# %bb.451: # in Loop: Header=BB3_4 Depth=1 - ld s1, 440(sp) # 8-byte Folded Reload + sd t1, 48(sp) # 8-byte Folded Spill + mv t5, s0 + bgeu a6, a5, .LBB3_464 +# %bb.448: # in Loop: Header=BB3_4 Depth=1 + ld s3, 440(sp) # 8-byte Folded Reload + ld ra, 392(sp) # 8-byte Folded Reload mv t2, t0 - ld s0, 376(sp) # 8-byte Folded Reload - mv s6, s3 - ld a7, 448(sp) # 8-byte Folded Reload - j .LBB3_503 -.LBB3_452: # in Loop: Header=BB3_4 Depth=1 - mv s4, a2 - j .LBB3_350 -.LBB3_453: # %vector.scevcheck336 - # in Loop: Header=BB3_4 Depth=1 - sd s4, 248(sp) # 8-byte Folded Spill - sd s6, 256(sp) # 8-byte Folded Spill - sd s2, 264(sp) # 8-byte Folded Spill - sd s8, 288(sp) # 8-byte Folded Spill - sd s1, 24(sp) # 8-byte Folded Spill - sd s0, 56(sp) # 8-byte Folded Spill - sd s7, 272(sp) # 8-byte Folded Spill - sd s3, 280(sp) # 8-byte Folded Spill + ld s10, 432(sp) # 8-byte Folded Reload + ld s0, 384(sp) # 8-byte Folded Reload + j .LBB3_469 +.LBB3_449: # in Loop: Header=BB3_4 Depth=1 + sd a2, 400(sp) # 8-byte Folded Spill + ld t5, 328(sp) # 8-byte Folded Reload + ld a2, 416(sp) # 8-byte Folded Reload + j .LBB3_347 +.LBB3_450: # %vector.scevcheck336 + # in Loop: Header=BB3_4 Depth=1 + sd ra, 320(sp) # 8-byte Folded Spill + sd s2, 336(sp) # 8-byte Folded Spill + sd s3, 352(sp) # 8-byte Folded Spill + sd s6, 280(sp) # 8-byte Folded Spill + sd s9, 288(sp) # 8-byte Folded Spill + sd t2, 24(sp) # 8-byte Folded Spill + sd s8, 248(sp) # 8-byte Folded Spill + sd s7, 256(sp) # 8-byte Folded Spill + mv ra, s4 mv s9, t5 andi t5, t3, -4 - ld t2, 48(sp) # 8-byte Folded Reload - add t2, t2, a3 + add t2, s0, a3 addiw a7, t2, -1 subw t0, a7, t5 slt t6, a7, t0 @@ -4370,94 +4361,112 @@ or t6, t6, s8 or t5, t5, t6 andi t5, t5, 1 - beqz t5, .LBB3_465 -# %bb.454: # in Loop: Header=BB3_4 Depth=1 + beqz t5, .LBB3_462 +# %bb.451: # in Loop: Header=BB3_4 Depth=1 mv a7, a6 + mv s4, ra ld t5, 112(sp) # 8-byte Folded Reload - ld s3, 280(sp) # 8-byte Folded Reload - ld s7, 272(sp) # 8-byte Folded Reload - j .LBB3_467 -.LBB3_455: # %vector.ph287 + ld s7, 256(sp) # 8-byte Folded Reload + ld s8, 248(sp) # 8-byte Folded Reload + li s1, 1 + li t1, 3 + lui t6, 1 + ld t2, 24(sp) # 8-byte Folded Reload + ld s9, 288(sp) # 8-byte Folded Reload + ld s6, 280(sp) # 8-byte Folded Reload + ld s3, 352(sp) # 8-byte Folded Reload + ld s2, 336(sp) # 8-byte Folded Reload + ld ra, 320(sp) # 8-byte Folded Reload + j .LBB3_479 +.LBB3_452: # %vector.ph287 # in Loop: Header=BB3_4 Depth=1 - ld s1, 440(sp) # 8-byte Folded Reload - mv t2, t0 - ld s0, 376(sp) # 8-byte Folded Reload - mv s6, s3 + ld t5, 440(sp) # 8-byte Folded Reload + ld ra, 392(sp) # 8-byte Folded Reload + mv t6, t0 + ld s10, 432(sp) # 8-byte Folded Reload + ld s0, 384(sp) # 8-byte Folded Reload addi a5, a5, 1 addi a6, t1, -1 and a7, a5, a6 mv a6, t1 - beqz a7, .LBB3_457 -# %bb.456: # %vector.ph287 + beqz a7, .LBB3_454 +# %bb.453: # %vector.ph287 # in Loop: Header=BB3_4 Depth=1 mv a6, a7 -.LBB3_457: # %vector.ph287 +.LBB3_454: # %vector.ph287 # in Loop: Header=BB3_4 Depth=1 sub a6, a5, a6 - ld t0, 448(sp) # 8-byte Folded Reload - add a5, a6, t0 + add a5, a6, s2 vsetvli a7, zero, e16, mf2, ta, ma ld a7, 464(sp) # 8-byte Folded Reload ld a7, 8(a7) subw a2, a2, a6 vmv.v.x v8, a3 - slli t0, t0, 1 + slli t0, s2, 1 add a7, a7, t0 -.LBB3_458: # %vector.body295 +.LBB3_455: # %vector.body295 # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 vse16.v v8, (a7) sub a6, a6, t1 - add a7, a7, s7 - bnez a6, .LBB3_458 -# %bb.459: # in Loop: Header=BB3_4 Depth=1 - mv a7, a5 - li ra, 1 -.LBB3_460: # %while.body1354.i.preheader + add a7, a7, s8 + bnez a6, .LBB3_455 +# %bb.456: # in Loop: Header=BB3_4 Depth=1 + mv s2, a5 + li s1, 1 +.LBB3_457: # %while.body1354.i.preheader # in Loop: Header=BB3_4 Depth=1 - slli a5, a7, 1 - sub a6, a4, a7 - sd s0, 376(sp) # 8-byte Folded Spill - sd s1, 440(sp) # 8-byte Folded Spill -.LBB3_461: # %while.body1354.i + mv a6, s2 + slli a5, s2, 1 + sub a6, a4, s2 + sd s10, 432(sp) # 8-byte Folded Spill + sd t5, 440(sp) # 8-byte Folded Spill + sd s0, 384(sp) # 8-byte Folded Spill + sd ra, 392(sp) # 8-byte Folded Spill +.LBB3_458: # %while.body1354.i # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 - mv t5, a2 - beqz a6, .LBB3_464 -# %bb.462: # %if.end1358.i - # in Loop: Header=BB3_461 Depth=2 + mv a7, a2 + beqz a6, .LBB3_461 +# %bb.459: # %if.end1358.i + # in Loop: Header=BB3_458 Depth=2 ld a2, 464(sp) # 8-byte Folded Reload ld a2, 8(a2) add a2, a2, a5 sh a3, 0(a2) - addiw a2, t5, -1 - addiw a7, a7, 1 + addiw a2, a7, -1 + addiw s2, s2, 1 addi a5, a5, 2 addi a6, a6, -1 - blt ra, t5, .LBB3_461 -# %bb.463: # in Loop: Header=BB3_4 Depth=1 - sd a7, 448(sp) # 8-byte Folded Spill - mv s3, s6 + blt s1, a7, .LBB3_458 +# %bb.460: # in Loop: Header=BB3_4 Depth=1 + sd a2, 400(sp) # 8-byte Folded Spill + li t4, 2 li t3, -1 - ld a7, 48(sp) # 8-byte Folded Reload - mv t0, t2 - ld t2, 40(sp) # 8-byte Folded Reload - ld t1, 32(sp) # 8-byte Folded Reload - mv s0, t4 - j .LBB3_507 -.LBB3_464: # in Loop: Header=BB3_4 Depth=1 + mv a7, t2 + ld a2, 416(sp) # 8-byte Folded Reload + mv t0, t6 + ld t6, 32(sp) # 8-byte Folded Reload + ld t2, 24(sp) # 8-byte Folded Reload + ld s9, 288(sp) # 8-byte Folded Reload + ld s0, 40(sp) # 8-byte Folded Reload + j .LBB3_473 +.LBB3_461: # in Loop: Header=BB3_4 Depth=1 + sd a7, 400(sp) # 8-byte Folded Spill li a2, 0 - sd a4, 448(sp) # 8-byte Folded Spill - mv s3, s6 + mv s2, a4 + li t4, 2 li t3, -1 - ld a7, 48(sp) # 8-byte Folded Reload - mv t0, t2 - ld t2, 40(sp) # 8-byte Folded Reload - ld t1, 32(sp) # 8-byte Folded Reload - mv s0, t4 - j .LBB3_509 -.LBB3_465: # %vector.memcheck377 + mv a7, t2 + mv t0, t6 + ld t6, 32(sp) # 8-byte Folded Reload + ld t2, 24(sp) # 8-byte Folded Reload + ld s9, 288(sp) # 8-byte Folded Reload + ld s0, 40(sp) # 8-byte Folded Reload + j .LBB3_475 +.LBB3_462: # %vector.memcheck377 # in Loop: Header=BB3_4 Depth=1 + sd s10, 344(sp) # 8-byte Folded Spill csrr t5, vlenb li t6, 20 mul t5, t5, t6 @@ -4556,12 +4565,9 @@ or t0, t0, t1 or a7, a7, t0 andi a7, a7, 1 - beqz a7, .LBB3_513 -# %bb.466: # in Loop: Header=BB3_4 Depth=1 + beqz a7, .LBB3_476 +# %bb.463: # in Loop: Header=BB3_4 Depth=1 mv a7, a6 - ld t5, 112(sp) # 8-byte Folded Reload - ld s3, 280(sp) # 8-byte Folded Reload - ld s7, 272(sp) # 8-byte Folded Reload csrr a4, vlenb li a5, 26 mul a4, a4, a5 @@ -4603,24 +4609,278 @@ add a4, sp, a4 addi a4, a4, 496 vl1r.v v27, (a4) # Unknown-size Folded Reload -.LBB3_467: # %while.body1404.i.preheader + mv s4, ra + ld t5, 112(sp) # 8-byte Folded Reload + ld s7, 256(sp) # 8-byte Folded Reload + ld s8, 248(sp) # 8-byte Folded Reload + li s1, 1 + li t1, 3 + lui t6, 1 + ld t2, 24(sp) # 8-byte Folded Reload + ld s9, 288(sp) # 8-byte Folded Reload + ld s6, 280(sp) # 8-byte Folded Reload + ld s3, 352(sp) # 8-byte Folded Reload + ld s2, 336(sp) # 8-byte Folded Reload + ld ra, 320(sp) # 8-byte Folded Reload + ld s10, 344(sp) # 8-byte Folded Reload + j .LBB3_479 +.LBB3_464: # %vector.ph268 + # in Loop: Header=BB3_4 Depth=1 + ld s3, 440(sp) # 8-byte Folded Reload + ld ra, 392(sp) # 8-byte Folded Reload + mv t2, t0 + ld s10, 432(sp) # 8-byte Folded Reload + ld s0, 384(sp) # 8-byte Folded Reload + addi a6, a6, 1 + addi a7, a5, -1 + and a7, a6, a7 + beqz a7, .LBB3_466 +# %bb.465: # %vector.ph268 + # in Loop: Header=BB3_4 Depth=1 + mv a5, a7 +.LBB3_466: # %vector.ph268 + # in Loop: Header=BB3_4 Depth=1 + sub a6, a6, a5 + add a5, a6, s2 + vsetvli a7, zero, e32, m1, ta, ma + ld a7, 464(sp) # 8-byte Folded Reload + ld a7, 0(a7) + subw a2, a2, a6 + vmv.v.x v8, a3 + slli t0, s2, 2 + add a7, a7, t0 + ld t0, 96(sp) # 8-byte Folded Reload + ld t1, 88(sp) # 8-byte Folded Reload +.LBB3_467: # %vector.body275 + # Parent Loop BB3_4 Depth=1 + # => This Inner Loop Header: Depth=2 + vs1r.v v8, (a7) + sub a6, a6, t1 + add a7, a7, t0 + bnez a6, .LBB3_467 +# %bb.468: # in Loop: Header=BB3_4 Depth=1 + mv s2, a5 + li s1, 1 +.LBB3_469: # %while.body1370.i.preheader + # in Loop: Header=BB3_4 Depth=1 + mv a6, s2 + slli a5, s2, 2 + sub a6, a4, s2 + sd s10, 432(sp) # 8-byte Folded Spill + sd s3, 440(sp) # 8-byte Folded Spill + sd s0, 384(sp) # 8-byte Folded Spill + sd ra, 392(sp) # 8-byte Folded Spill +.LBB3_470: # %while.body1370.i + # Parent Loop BB3_4 Depth=1 + # => This Inner Loop Header: Depth=2 + mv a7, a2 + beqz a6, .LBB3_474 +# %bb.471: # %if.end1374.i + # in Loop: Header=BB3_470 Depth=2 + ld a2, 464(sp) # 8-byte Folded Reload + ld a2, 0(a2) + add a2, a2, a5 + sw a3, 0(a2) + addiw a2, a7, -1 + addiw s2, s2, 1 + addi a5, a5, 4 + addi a6, a6, -1 + blt s1, a7, .LBB3_470 +# %bb.472: # in Loop: Header=BB3_4 Depth=1 + sd a2, 400(sp) # 8-byte Folded Spill + li t4, 2 + li t3, -1 + ld a7, 376(sp) # 8-byte Folded Reload + mv a2, t6 + mv t0, t2 + ld t6, 32(sp) # 8-byte Folded Reload + ld t2, 24(sp) # 8-byte Folded Reload + ld s9, 288(sp) # 8-byte Folded Reload + mv s0, t5 +.LBB3_473: # %while.cond1139.i + # in Loop: Header=BB3_4 Depth=1 + ld t1, 48(sp) # 8-byte Folded Reload + ld t5, 328(sp) # 8-byte Folded Reload + ld s3, 352(sp) # 8-byte Folded Reload + ld ra, 320(sp) # 8-byte Folded Reload + ld s10, 344(sp) # 8-byte Folded Reload + j .LBB3_347 +.LBB3_474: # in Loop: Header=BB3_4 Depth=1 + sd a7, 400(sp) # 8-byte Folded Spill + li a2, 0 + mv s2, a4 + li t4, 2 + li t3, -1 + ld a7, 376(sp) # 8-byte Folded Reload + mv t0, t2 + ld t6, 32(sp) # 8-byte Folded Reload + ld t2, 24(sp) # 8-byte Folded Reload + ld s9, 288(sp) # 8-byte Folded Reload + mv s0, t5 +.LBB3_475: # %BZ2_decompress.exit + # in Loop: Header=BB3_4 Depth=1 + ld t1, 48(sp) # 8-byte Folded Reload + ld t5, 328(sp) # 8-byte Folded Reload + ld s3, 352(sp) # 8-byte Folded Reload + ld ra, 320(sp) # 8-byte Folded Reload + ld s10, 344(sp) # 8-byte Folded Reload + j .LBB3_294 +.LBB3_476: # %vector.ph436 + # in Loop: Header=BB3_4 Depth=1 + csrr t1, vlenb + neg a7, t1 + and t0, a7, a5 + slli a7, t0, 2 + sub a7, a6, a7 + vsetvli t2, zero, e64, m8, ta, ma + vmv.v.x v8, a6 + csrr a6, vlenb + li t2, 12 + mul a6, a6, t2 + add a6, sp, a6 + addi a6, a6, 496 + vs8r.v v0, (a6) # Unknown-size Folded Spill + li t2, -4 + vmacc.vx v8, t2, v0 + addi a6, sp, 496 + vs8r.v v8, (a6) # Unknown-size Folded Spill + slli a6, t1, 2 + neg a6, a6 + vsetvli zero, zero, e32, m4, ta, ma + vmv.v.x v16, a4 + csrr a4, vlenb + slli a4, a4, 3 + add a4, sp, a4 + addi a4, a4, 496 + vs4r.v v28, (a4) # Unknown-size Folded Spill + vmacc.vx v16, t2, v28 + mv a4, t0 + ld t5, 112(sp) # 8-byte Folded Reload + ld t2, 96(sp) # 8-byte Folded Reload +.LBB3_477: # %vector.body442 + # Parent Loop BB3_4 Depth=1 + # => This Inner Loop Header: Depth=2 + vadd.vx v20, v16, a3 + vadd.vi v0, v20, -1 + vsetvli zero, zero, e64, m8, ta, ma + vsext.vf2 v24, v0 + vsetvli zero, zero, e8, m1, ta, ma + vluxei64.v v0, (t5), v24 + vsetvli zero, zero, e64, m8, ta, ma + vsext.vf2 v8, v20 + vsetvli zero, zero, e8, m1, ta, ma + vsoxei64.v v0, (t5), v8 + vsetvli zero, zero, e32, m4, ta, ma + vadd.vi v8, v20, -2 + vsetvli zero, zero, e64, m8, ta, ma + vsext.vf2 v0, v8 + vsetvli zero, zero, e8, m1, ta, ma + vluxei64.v v8, (t5), v0 + vsoxei64.v v8, (t5), v24 + vsetvli zero, zero, e32, m4, ta, ma + vadd.vi v8, v20, -3 + vsetvli zero, zero, e64, m8, ta, ma + vsext.vf2 v24, v8 + vsetvli zero, zero, e8, m1, ta, ma + vluxei64.v v8, (t5), v24 + vsoxei64.v v8, (t5), v0 + vsetvli zero, zero, e32, m4, ta, ma + vadd.vi v8, v20, -4 + vsetvli zero, zero, e64, m8, ta, ma + vsext.vf2 v0, v8 + vsetvli zero, zero, e8, m1, ta, ma + vluxei64.v v8, (t5), v0 + vsoxei64.v v8, (t5), v24 + addi t3, sp, 496 + vl8r.v v24, (t3) # Unknown-size Folded Reload + vsetvli zero, zero, e64, m8, ta, ma + vadd.vx v8, v24, a6 + vs8r.v v8, (t3) # Unknown-size Folded Spill + vsetvli zero, zero, e32, m4, ta, ma + sub a4, a4, t2 + vadd.vx v16, v16, a6 + bnez a4, .LBB3_477 +# %bb.478: # %middle.block433 # in Loop: Header=BB3_4 Depth=1 - li ra, 1 - li s9, 2 + vnsrl.wi v8, v24, 0 + vadd.vi v8, v8, -4 + addi t1, t1, -1 + slli t1, t1, 32 + srli a4, t1, 32 + vsetivli zero, 1, e32, m4, ta, ma + vslidedown.vx v8, v8, a4 + vmv.x.s a4, v8 + csrr a6, vlenb + li t1, 26 + mul a6, a6, t1 + add a6, sp, a6 + addi a6, a6, 496 + vl2r.v v16, (a6) # Unknown-size Folded Reload + csrr a6, vlenb + slli a6, a6, 5 + add a6, sp, a6 + addi a6, a6, 496 + vl1r.v v13, (a6) # Unknown-size Folded Reload + csrr a6, vlenb + li t1, 28 + mul a6, a6, t1 + add a6, sp, a6 + addi a6, a6, 496 + vl4r.v v20, (a6) # Unknown-size Folded Reload + csrr a6, vlenb + li t1, 24 + mul a6, a6, t1 + add a6, sp, a6 + addi a6, a6, 496 + vl2r.v v18, (a6) # Unknown-size Folded Reload + csrr a6, vlenb + li t1, 22 + mul a6, a6, t1 + add a6, sp, a6 + addi a6, a6, 496 + vl2r.v v24, (a6) # Unknown-size Folded Reload + csrr a6, vlenb + li t1, 21 + mul a6, a6, t1 + add a6, sp, a6 + addi a6, a6, 496 + vl1r.v v26, (a6) # Unknown-size Folded Reload + csrr a6, vlenb + li t1, 20 + mul a6, a6, t1 + add a6, sp, a6 + addi a6, a6, 496 + vl1r.v v27, (a6) # Unknown-size Folded Reload + csrr a6, vlenb + li t1, 12 + mul a6, a6, t1 + add a6, sp, a6 + addi a6, a6, 496 + vl8r.v v0, (a6) # Unknown-size Folded Reload + csrr a6, vlenb + slli a6, a6, 3 + add a6, sp, a6 + addi a6, a6, 496 + vl4r.v v28, (a6) # Unknown-size Folded Reload + mv s4, ra + ld s7, 256(sp) # 8-byte Folded Reload + ld s8, 248(sp) # 8-byte Folded Reload + li s1, 1 li t1, 3 lui t6, 1 - ld t2, 40(sp) # 8-byte Folded Reload - ld s0, 56(sp) # 8-byte Folded Reload - ld s1, 24(sp) # 8-byte Folded Reload - ld s8, 288(sp) # 8-byte Folded Reload - ld s2, 264(sp) # 8-byte Folded Reload - ld s6, 256(sp) # 8-byte Folded Reload - ld s4, 248(sp) # 8-byte Folded Reload -.LBB3_468: # %while.body1404.i.preheader + ld t2, 24(sp) # 8-byte Folded Reload + ld s9, 288(sp) # 8-byte Folded Reload + ld s6, 280(sp) # 8-byte Folded Reload + ld s3, 352(sp) # 8-byte Folded Reload + ld s2, 336(sp) # 8-byte Folded Reload + ld ra, 320(sp) # 8-byte Folded Reload + ld s10, 344(sp) # 8-byte Folded Reload + beq t0, a5, .LBB3_481 +.LBB3_479: # %while.body1404.i.preheader # in Loop: Header=BB3_4 Depth=1 vsetivli zero, 2, e8, mf8, ta, ma mv a4, a7 -.LBB3_469: # %while.body1404.i +.LBB3_480: # %while.body1404.i # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 addw a5, a3, a4 @@ -4640,22 +4900,24 @@ add a5, t5, a5 addiw a4, a4, -4 vse8.v v8, (a5) - bltu t1, a4, .LBB3_469 -.LBB3_470: # %while.cond1439.preheader.i + bltu t1, a4, .LBB3_480 +.LBB3_481: # %while.cond1439.preheader.i # in Loop: Header=BB3_4 Depth=1 + li t4, 2 li t3, -1 ld t0, 240(sp) # 8-byte Folded Reload - ld t1, 32(sp) # 8-byte Folded Reload - beqz a4, .LBB3_478 -.LBB3_471: # %while.body1442.preheader.i + ld t1, 48(sp) # 8-byte Folded Reload + beqz a4, .LBB3_489 +.LBB3_482: # %while.body1442.preheader.i # in Loop: Header=BB3_4 Depth=1 li a5, 96 - bgeu a4, a5, .LBB3_473 -# %bb.472: # in Loop: Header=BB3_4 Depth=1 + bgeu a4, a5, .LBB3_484 +# %bb.483: # in Loop: Header=BB3_4 Depth=1 mv a5, a4 - j .LBB3_476 -.LBB3_473: # %vector.scevcheck + j .LBB3_487 +.LBB3_484: # %vector.scevcheck # in Loop: Header=BB3_4 Depth=1 + sd t2, 24(sp) # 8-byte Folded Spill addiw a5, a4, -1 addw a6, a4, a3 sltu a7, a6, a5 @@ -4676,8 +4938,8 @@ or a7, a7, t1 or a7, a7, t2 or a5, a7, a5 - bnez a5, .LBB3_475 -# %bb.474: # %vector.memcheck + bnez a5, .LBB3_486 +# %bb.485: # %vector.memcheck # in Loop: Header=BB3_4 Depth=1 add a5, a4, a3 addi a7, a5, -1 @@ -4690,16 +4952,16 @@ sub a5, a7, a5 li a7, 32 bgeu a5, a7, .LBB3_510 -.LBB3_475: # in Loop: Header=BB3_4 Depth=1 +.LBB3_486: # in Loop: Header=BB3_4 Depth=1 mv a5, a4 li t3, -1 ld t0, 240(sp) # 8-byte Folded Reload - ld t2, 40(sp) # 8-byte Folded Reload - ld t1, 32(sp) # 8-byte Folded Reload -.LBB3_476: # %while.body1442.i.preheader + ld t2, 24(sp) # 8-byte Folded Reload + ld t1, 48(sp) # 8-byte Folded Reload +.LBB3_487: # %while.body1442.i.preheader # in Loop: Header=BB3_4 Depth=1 add a4, a5, a3 -.LBB3_477: # %while.body1442.i +.LBB3_488: # %while.body1442.i # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 slli a6, a4, 32 @@ -4712,264 +4974,167 @@ add a6, t5, a6 addiw a5, a5, -1 sb a7, 0(a6) - bnez a5, .LBB3_477 -.LBB3_478: # %while.end1453.i + bnez a5, .LBB3_488 +.LBB3_489: # %while.end1453.i # in Loop: Header=BB3_4 Depth=1 - add a3, s10, a3 + add a3, s4, a3 addi a3, a3, 2047 sb a2, 1677(a3) - ld t6, 296(sp) # 8-byte Folded Reload -.LBB3_479: # %if.end1553.i + ld t6, 32(sp) # 8-byte Folded Reload +.LBB3_490: # %if.end1553.i # in Loop: Header=BB3_4 Depth=1 - add a2, s10, a2 + add a2, s4, a2 addi a2, a2, 2047 lbu a2, 1421(a2) slli a3, a2, 2 - add a3, s10, a3 + add a3, s4, a3 lw a4, 68(a3) - lbu a5, 44(s10) + lbu a5, 44(s4) addi a4, a4, 1 sw a4, 68(a3) - ld t5, 352(sp) # 8-byte Folded Reload - ld a6, 448(sp) # 8-byte Folded Reload - beqz a5, .LBB3_481 -# %bb.480: # %if.then1563.i + ld a7, 376(sp) # 8-byte Folded Reload + ld s0, 40(sp) # 8-byte Folded Reload + ld t5, 328(sp) # 8-byte Folded Reload + beqz a5, .LBB3_492 +# %bb.491: # %if.then1563.i # in Loop: Header=BB3_4 Depth=1 ld a3, 464(sp) # 8-byte Folded Reload ld a3, 8(a3) - slli a4, a6, 1 + slli a4, s2, 1 add a3, a3, a4 sh a2, 0(a3) - j .LBB3_482 -.LBB3_481: # %if.else1571.i + j .LBB3_493 +.LBB3_492: # %if.else1571.i # in Loop: Header=BB3_4 Depth=1 ld a3, 464(sp) # 8-byte Folded Reload ld a3, 0(a3) - slli a4, a6, 2 + slli a4, s2, 2 add a3, a3, a4 sw a2, 0(a3) -.LBB3_482: # %if.end1579.i +.LBB3_493: # %if.end1579.i # in Loop: Header=BB3_4 Depth=1 - addiw a6, a6, 1 - sd a6, 448(sp) # 8-byte Folded Spill + addiw s2, s2, 1 lui a2, 2 - ld a7, 48(sp) # 8-byte Folded Reload - ld a3, 424(sp) # 8-byte Folded Reload - bnez a3, .LBB3_485 -# %bb.483: # %if.then1583.i - # in Loop: Header=BB3_4 Depth=1 - addiw t5, t5, 1 - bge t5, t2, .LBB3_497 -# %bb.484: # %if.end1588.i + beqz ra, .LBB3_495 +# %bb.494: # in Loop: Header=BB3_4 Depth=1 + ld s0, 456(sp) # 8-byte Folded Reload + j .LBB3_497 +.LBB3_495: # %if.then1583.i + # in Loop: Header=BB3_4 Depth=1 + addiw s3, s3, 1 + bge s3, t2, .LBB3_509 +# %bb.496: # %if.end1588.i # in Loop: Header=BB3_4 Depth=1 - add a0, s10, t5 + add a0, s4, s3 add a0, a0, a2 lbu a3, -308(a0) slli a0, a3, 2 lui a2, 16 - add a2, s10, a2 + add a2, s4, a2 add a0, a2, a0 - lw a0, -1524(a0) - sd a0, 408(sp) # 8-byte Folded Spill + lw s0, -1524(a0) li a0, 1032 - sd a3, 384(sp) # 8-byte Folded Spill + sd a3, 432(sp) # 8-byte Folded Spill mul a0, a3, a0 - add a0, s10, a0 + add a0, s4, a0 ld a2, 360(sp) # 8-byte Folded Reload - add s1, a0, a2 - ld a2, 328(sp) # 8-byte Folded Reload - add s2, a0, a2 + add s6, a0, a2 + ld a2, 304(sp) # 8-byte Folded Reload + add a2, a0, a2 + sd a2, 440(sp) # 8-byte Folded Spill lui a2, 13 addiw a2, a2, -1620 - add s8, a0, a2 - li a3, 50 -.LBB3_485: # %if.end1608.i + add a0, a0, a2 + sd a0, 448(sp) # 8-byte Folded Spill + li ra, 50 +.LBB3_497: # %if.end1608.i # in Loop: Header=BB3_4 Depth=1 - addiw a3, a3, -1 - sd a3, 424(sp) # 8-byte Folded Spill - ld a0, 408(sp) # 8-byte Folded Reload - sd a0, 456(sp) # 8-byte Folded Spill -.LBB3_486: # %sw.bb1610.i + addiw ra, ra, -1 + sd s0, 456(sp) # 8-byte Folded Spill +.LBB3_498: # %sw.bb1610.i # in Loop: Header=BB3_4 Depth=1 - lw a0, 36(s10) + lw a0, 36(s4) li a2, 40 - sw a2, 8(s10) - ld t4, 456(sp) # 8-byte Folded Reload - bge a0, t4, .LBB3_492 -# %bb.487: # %if.end1628.lr.ph.i + sw a2, 8(s4) + bge a0, s0, .LBB3_504 +# %bb.499: # %if.end1628.lr.ph.i # in Loop: Header=BB3_4 Depth=1 - ld a2, 0(s10) + ld a2, 0(s4) lw a3, 8(a2) addiw a3, a3, -1 - j .LBB3_489 -.LBB3_488: # %if.end1661.i - # in Loop: Header=BB3_489 Depth=2 + j .LBB3_501 +.LBB3_500: # %if.end1661.i + # in Loop: Header=BB3_501 Depth=2 addiw a3, a3, -1 - bge a0, t4, .LBB3_493 -.LBB3_489: # %if.end1628.i + bge a0, s0, .LBB3_505 +.LBB3_501: # %if.end1628.i # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 - bne a3, t3, .LBB3_490 - j .LBB3_212 -.LBB3_490: # %if.end1634.i - # in Loop: Header=BB3_489 Depth=2 + bne a3, t3, .LBB3_502 + j .LBB3_293 +.LBB3_502: # %if.end1634.i + # in Loop: Header=BB3_501 Depth=2 ld a5, 0(a2) - lw a4, 32(s10) + lw a4, 32(s4) lbu a6, 0(a5) slli a4, a4, 8 or a4, a4, a6 - sw a4, 32(s10) + sw a4, 32(s4) addiw a0, a0, 8 - sw a0, 36(s10) + sw a0, 36(s4) lw a6, 12(a2) addi a5, a5, 1 sd a5, 0(a2) sw a3, 8(a2) addiw a6, a6, 1 sw a6, 12(a2) - bnez a6, .LBB3_488 -# %bb.491: # %if.then1657.i - # in Loop: Header=BB3_489 Depth=2 + bnez a6, .LBB3_500 +# %bb.503: # %if.then1657.i + # in Loop: Header=BB3_501 Depth=2 lw a5, 16(a2) addi a5, a5, 1 sw a5, 16(a2) - j .LBB3_488 -.LBB3_492: # %sw.bb1610.if.then1617_crit_edge.i + j .LBB3_500 +.LBB3_504: # %sw.bb1610.if.then1617_crit_edge.i # in Loop: Header=BB3_4 Depth=1 - lw a4, 32(s10) -.LBB3_493: # %if.then1617.i + lw a4, 32(s4) +.LBB3_505: # %if.then1617.i # in Loop: Header=BB3_4 Depth=1 - subw a2, a0, t4 + subw a2, a0, s0 srlw a0, a4, a2 - sllw a3, t3, t4 + sllw a3, t3, s0 not a3, a3 - and s0, a0, a3 - sw a2, 36(s10) -.LBB3_494: # %while.cond1663.i + and s9, a0, a3 + sw a2, 36(s4) +.LBB3_506: # %while.cond1663.i # in Loop: Header=BB3_4 Depth=1 li a3, 20 li a0, -4 - bge a3, t4, .LBB3_495 - j .LBB3_344 -.LBB3_495: # %if.end1668.i + bge a3, s0, .LBB3_507 + j .LBB3_192 +.LBB3_507: # %if.end1668.i # in Loop: Header=BB3_4 Depth=1 - slli a3, t4, 2 - add a4, s1, a3 + slli a3, s0, 2 + add a4, s6, a3 lw a4, 0(a4) - blt a4, s0, .LBB3_496 - j .LBB3_348 -.LBB3_496: # %if.end1674.i - # in Loop: Header=BB3_4 Depth=1 - addiw t4, t4, 1 - sd t4, 456(sp) # 8-byte Folded Spill - j .LBB3_287 -.LBB3_497: # in Loop: Header=BB3_4 Depth=1 - sd zero, 424(sp) # 8-byte Folded Spill + blt a4, s9, .LBB3_508 j .LBB3_345 -.LBB3_498: # %vector.ph268 - # in Loop: Header=BB3_4 Depth=1 - ld s1, 440(sp) # 8-byte Folded Reload - mv t2, t0 - ld s0, 376(sp) # 8-byte Folded Reload - mv s6, s3 - addi a6, a6, 1 - addi a7, a5, -1 - and a7, a6, a7 - beqz a7, .LBB3_500 -# %bb.499: # %vector.ph268 - # in Loop: Header=BB3_4 Depth=1 - mv a5, a7 -.LBB3_500: # %vector.ph268 - # in Loop: Header=BB3_4 Depth=1 - sub a6, a6, a5 - ld t0, 448(sp) # 8-byte Folded Reload - add a5, a6, t0 - vsetvli a7, zero, e32, m1, ta, ma - ld a7, 464(sp) # 8-byte Folded Reload - ld a7, 0(a7) - subw a2, a2, a6 - vmv.v.x v8, a3 - slli t0, t0, 2 - add a7, a7, t0 - ld t0, 96(sp) # 8-byte Folded Reload - ld t1, 88(sp) # 8-byte Folded Reload -.LBB3_501: # %vector.body275 - # Parent Loop BB3_4 Depth=1 - # => This Inner Loop Header: Depth=2 - vs1r.v v8, (a7) - sub a6, a6, t1 - add a7, a7, t0 - bnez a6, .LBB3_501 -# %bb.502: # in Loop: Header=BB3_4 Depth=1 - mv a7, a5 - li ra, 1 -.LBB3_503: # %while.body1370.i.preheader +.LBB3_508: # %if.end1674.i # in Loop: Header=BB3_4 Depth=1 - slli a5, a7, 2 - sub a6, a4, a7 - sd s0, 376(sp) # 8-byte Folded Spill - sd s1, 440(sp) # 8-byte Folded Spill -.LBB3_504: # %while.body1370.i - # Parent Loop BB3_4 Depth=1 - # => This Inner Loop Header: Depth=2 - mv t5, a2 - beqz a6, .LBB3_508 -# %bb.505: # %if.end1374.i - # in Loop: Header=BB3_504 Depth=2 - ld a2, 464(sp) # 8-byte Folded Reload - ld a2, 0(a2) - add a2, a2, a5 - sw a3, 0(a2) - addiw a2, t5, -1 - addiw a7, a7, 1 - addi a5, a5, 4 - addi a6, a6, -1 - blt ra, t5, .LBB3_504 -# %bb.506: # in Loop: Header=BB3_4 Depth=1 - sd a7, 448(sp) # 8-byte Folded Spill - mv s3, s6 - li t3, -1 - ld a7, 48(sp) # 8-byte Folded Reload - mv t0, t2 - ld t2, 40(sp) # 8-byte Folded Reload - mv t1, t4 - ld s0, 56(sp) # 8-byte Folded Reload -.LBB3_507: # %while.cond1139.i - # in Loop: Header=BB3_4 Depth=1 - ld s1, 24(sp) # 8-byte Folded Reload - ld s8, 288(sp) # 8-byte Folded Reload - mv t4, s4 - mv s4, a2 - mv s6, s9 - li s9, 2 - ld t5, 352(sp) # 8-byte Folded Reload - j .LBB3_350 -.LBB3_508: # in Loop: Header=BB3_4 Depth=1 + addiw s0, s0, 1 + j .LBB3_212 +.LBB3_509: # in Loop: Header=BB3_4 Depth=1 + li ra, 0 li a2, 0 - sd a4, 448(sp) # 8-byte Folded Spill - mv s3, s6 - li t3, -1 - ld a7, 48(sp) # 8-byte Folded Reload - mv t0, t2 - ld t2, 40(sp) # 8-byte Folded Reload - mv t1, t4 - ld s0, 56(sp) # 8-byte Folded Reload -.LBB3_509: # %BZ2_decompress.exit - # in Loop: Header=BB3_4 Depth=1 - ld s1, 24(sp) # 8-byte Folded Reload - ld s8, 288(sp) # 8-byte Folded Reload - sd s4, 456(sp) # 8-byte Folded Spill - mv s6, s9 - li s9, 2 - mv s4, t5 - ld t5, 352(sp) # 8-byte Folded Reload - j .LBB3_346 + j .LBB3_294 .LBB3_510: # %vector.ph324 # in Loop: Header=BB3_4 Depth=1 + mv s0, ra andi a7, a4, -32 andi a5, a4, 31 mv t0, a7 ld t4, 72(sp) # 8-byte Folded Reload + li ra, 32 .LBB3_511: # %vector.body330 # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 @@ -4979,8 +5144,7 @@ addiw t2, t6, -372 add t3, t4, t2 add t1, t3, t1 - li t3, 32 - vsetvli zero, t3, e8, m2, ta, ma + vsetvli zero, ra, e8, m2, ta, ma vle8.v v8, (t1) slli t1, a6, 32 srli t1, t1, 32 @@ -4992,167 +5156,17 @@ bnez t0, .LBB3_511 # %bb.512: # %middle.block321 # in Loop: Header=BB3_4 Depth=1 + li t4, 2 li t3, -1 ld t0, 240(sp) # 8-byte Folded Reload - ld t2, 40(sp) # 8-byte Folded Reload - ld t1, 32(sp) # 8-byte Folded Reload - bne a4, a7, .LBB3_476 - j .LBB3_478 -.LBB3_513: # %vector.ph436 - # in Loop: Header=BB3_4 Depth=1 - csrr t1, vlenb - neg a7, t1 - and t0, a7, a5 - slli a7, t0, 2 - sub a7, a6, a7 - vsetvli t2, zero, e64, m8, ta, ma - vmv.v.x v8, a6 - csrr a6, vlenb - li t2, 12 - mul a6, a6, t2 - add a6, sp, a6 - addi a6, a6, 496 - vs8r.v v0, (a6) # Unknown-size Folded Spill - li t2, -4 - vmacc.vx v8, t2, v0 - addi a6, sp, 496 - vs8r.v v8, (a6) # Unknown-size Folded Spill - slli a6, t1, 2 - neg a6, a6 - vsetvli zero, zero, e32, m4, ta, ma - vmv.v.x v16, a4 - csrr a4, vlenb - slli a4, a4, 3 - add a4, sp, a4 - addi a4, a4, 496 - vs4r.v v28, (a4) # Unknown-size Folded Spill - vmacc.vx v16, t2, v28 - mv a4, t0 - ld t5, 112(sp) # 8-byte Folded Reload - ld t2, 96(sp) # 8-byte Folded Reload -.LBB3_514: # %vector.body442 - # Parent Loop BB3_4 Depth=1 - # => This Inner Loop Header: Depth=2 - vadd.vx v20, v16, a3 - vadd.vi v0, v20, -1 - vsetvli zero, zero, e64, m8, ta, ma - vsext.vf2 v24, v0 - vsetvli zero, zero, e8, m1, ta, ma - vluxei64.v v0, (t5), v24 - vsetvli zero, zero, e64, m8, ta, ma - vsext.vf2 v8, v20 - vsetvli zero, zero, e8, m1, ta, ma - vsoxei64.v v0, (t5), v8 - vsetvli zero, zero, e32, m4, ta, ma - vadd.vi v8, v20, -2 - vsetvli zero, zero, e64, m8, ta, ma - vsext.vf2 v0, v8 - vsetvli zero, zero, e8, m1, ta, ma - vluxei64.v v8, (t5), v0 - vsoxei64.v v8, (t5), v24 - vsetvli zero, zero, e32, m4, ta, ma - vadd.vi v8, v20, -3 - vsetvli zero, zero, e64, m8, ta, ma - vsext.vf2 v24, v8 - vsetvli zero, zero, e8, m1, ta, ma - vluxei64.v v8, (t5), v24 - vsoxei64.v v8, (t5), v0 - vsetvli zero, zero, e32, m4, ta, ma - vadd.vi v8, v20, -4 - vsetvli zero, zero, e64, m8, ta, ma - vsext.vf2 v0, v8 - vsetvli zero, zero, e8, m1, ta, ma - vluxei64.v v8, (t5), v0 - vsoxei64.v v8, (t5), v24 - addi t3, sp, 496 - vl8r.v v24, (t3) # Unknown-size Folded Reload - vsetvli zero, zero, e64, m8, ta, ma - vadd.vx v8, v24, a6 - vs8r.v v8, (t3) # Unknown-size Folded Spill - vsetvli zero, zero, e32, m4, ta, ma - sub a4, a4, t2 - vadd.vx v16, v16, a6 - bnez a4, .LBB3_514 -# %bb.515: # %middle.block433 - # in Loop: Header=BB3_4 Depth=1 - vnsrl.wi v8, v24, 0 - vadd.vi v8, v8, -4 - addi t1, t1, -1 - slli t1, t1, 32 - srli a4, t1, 32 - vsetivli zero, 1, e32, m4, ta, ma - vslidedown.vx v8, v8, a4 - vmv.x.s a4, v8 - ld s3, 280(sp) # 8-byte Folded Reload - ld s7, 272(sp) # 8-byte Folded Reload - csrr a6, vlenb - li t1, 26 - mul a6, a6, t1 - add a6, sp, a6 - addi a6, a6, 496 - vl2r.v v16, (a6) # Unknown-size Folded Reload - csrr a6, vlenb - slli a6, a6, 5 - add a6, sp, a6 - addi a6, a6, 496 - vl1r.v v13, (a6) # Unknown-size Folded Reload - csrr a6, vlenb - li t1, 28 - mul a6, a6, t1 - add a6, sp, a6 - addi a6, a6, 496 - vl4r.v v20, (a6) # Unknown-size Folded Reload - csrr a6, vlenb - li t1, 24 - mul a6, a6, t1 - add a6, sp, a6 - addi a6, a6, 496 - vl2r.v v18, (a6) # Unknown-size Folded Reload - csrr a6, vlenb - li t1, 22 - mul a6, a6, t1 - add a6, sp, a6 - addi a6, a6, 496 - vl2r.v v24, (a6) # Unknown-size Folded Reload - csrr a6, vlenb - li t1, 21 - mul a6, a6, t1 - add a6, sp, a6 - addi a6, a6, 496 - vl1r.v v26, (a6) # Unknown-size Folded Reload - csrr a6, vlenb - li t1, 20 - mul a6, a6, t1 - add a6, sp, a6 - addi a6, a6, 496 - vl1r.v v27, (a6) # Unknown-size Folded Reload - csrr a6, vlenb - li t1, 12 - mul a6, a6, t1 - add a6, sp, a6 - addi a6, a6, 496 - vl8r.v v0, (a6) # Unknown-size Folded Reload - csrr a6, vlenb - slli a6, a6, 3 - add a6, sp, a6 - addi a6, a6, 496 - vl4r.v v28, (a6) # Unknown-size Folded Reload - li ra, 1 - li s9, 2 - li t1, 3 - lui t6, 1 - ld t2, 40(sp) # 8-byte Folded Reload - ld s0, 56(sp) # 8-byte Folded Reload - ld s1, 24(sp) # 8-byte Folded Reload - ld s8, 288(sp) # 8-byte Folded Reload - ld s2, 264(sp) # 8-byte Folded Reload - ld s6, 256(sp) # 8-byte Folded Reload - ld s4, 248(sp) # 8-byte Folded Reload - bne t0, a5, .LBB3_468 - j .LBB3_470 -.LBB3_516: # %cleanup40.loopexit697 + ld t2, 24(sp) # 8-byte Folded Reload + ld t1, 48(sp) # 8-byte Folded Reload + mv ra, s0 + bne a4, a7, .LBB3_487 + j .LBB3_489 +.LBB3_513: # %cleanup40.loopexit697 li a0, -1 -.LBB3_517: # %cleanup40 +.LBB3_514: # %cleanup40 csrr a1, vlenb li a2, 34 mul a1, a1, a2 @@ -5172,15 +5186,15 @@ ld s11, 504(sp) # 8-byte Folded Reload addi sp, sp, 608 ret -.LBB3_518: +.LBB3_515: li a0, -4 - j .LBB3_517 -.LBB3_519: + j .LBB3_514 +.LBB3_516: li a0, 4 - j .LBB3_517 -.LBB3_520: + j .LBB3_514 +.LBB3_517: li a0, 0 - j .LBB3_517 + j .LBB3_514 .Lfunc_end3: .size nsis_BZ2_bzDecompress, .Lfunc_end3-nsis_BZ2_bzDecompress .cfi_endproc @@ -5188,32 +5202,32 @@ .p2align 2, 0x0 .LJTI3_0: .word .LBB3_88-.LJTI3_0 - .word .LBB3_346-.LJTI3_0 - .word .LBB3_346-.LJTI3_0 - .word .LBB3_346-.LJTI3_0 - .word .LBB3_346-.LJTI3_0 - .word .LBB3_346-.LJTI3_0 - .word .LBB3_346-.LJTI3_0 - .word .LBB3_346-.LJTI3_0 - .word .LBB3_346-.LJTI3_0 - .word .LBB3_346-.LJTI3_0 - .word .LBB3_346-.LJTI3_0 + .word .LBB3_294-.LJTI3_0 + .word .LBB3_294-.LJTI3_0 + .word .LBB3_294-.LJTI3_0 + .word .LBB3_294-.LJTI3_0 + .word .LBB3_294-.LJTI3_0 + .word .LBB3_294-.LJTI3_0 + .word .LBB3_294-.LJTI3_0 + .word .LBB3_294-.LJTI3_0 + .word .LBB3_294-.LJTI3_0 + .word .LBB3_294-.LJTI3_0 .word .LBB3_111-.LJTI3_0 .word .LBB3_137-.LJTI3_0 .word .LBB3_136-.LJTI3_0 - .word .LBB3_194-.LJTI3_0 - .word .LBB3_314-.LJTI3_0 - .word .LBB3_304-.LJTI3_0 + .word .LBB3_195-.LJTI3_0 + .word .LBB3_315-.LJTI3_0 + .word .LBB3_305-.LJTI3_0 .word .LBB3_120-.LJTI3_0 .word .LBB3_126-.LJTI3_0 - .word .LBB3_215-.LJTI3_0 - .word .LBB3_335-.LJTI3_0 + .word .LBB3_229-.LJTI3_0 + .word .LBB3_328-.LJTI3_0 .word .LBB3_155-.LJTI3_0 - .word .LBB3_265-.LJTI3_0 + .word .LBB3_279-.LJTI3_0 .word .LBB3_156-.LJTI3_0 - .word .LBB3_373-.LJTI3_0 + .word .LBB3_371-.LJTI3_0 .word .LBB3_158-.LJTI3_0 - .word .LBB3_486-.LJTI3_0 + .word .LBB3_498-.LJTI3_0 .word .LBB3_157-.LJTI3_0 # -- End function .text --- build.head//MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_matcher-ac.s 2023-11-13 08:03:22.191563489 +0000 +++ build//MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_matcher-ac.s 2023-11-13 08:03:17.247706397 +0000 @@ -1063,9 +1063,9 @@ sd a6, 112(sp) # 8-byte Folded Spill sd a5, 88(sp) # 8-byte Folded Spill sd a2, 56(sp) # 8-byte Folded Spill - beqz s9, .LBB7_153 + beqz s9, .LBB7_154 # %bb.1: # %if.end - beqz a4, .LBB7_154 + beqz a4, .LBB7_155 # %bb.2: # %if.end3 mv s5, a1 mv s8, a0 @@ -1076,7 +1076,7 @@ addi a0, sp, 160 vse64.v v8, (a0) sd zero, 192(sp) - beqz a1, .LBB7_155 + beqz a1, .LBB7_156 # %bb.3: # %while.cond.preheader.lr.ph csrr a0, vlenb slli a0, a0, 1 @@ -1121,7 +1121,7 @@ .LBB7_4: # %for.inc520 # in Loop: Header=BB7_5 Depth=1 ld a0, 136(sp) # 8-byte Folded Reload - beq s2, a0, .LBB7_156 + beq s2, a0, .LBB7_157 .LBB7_5: # %while.cond.preheader # =>This Loop Header: Depth=1 # Child Loop BB7_7 Depth 2 @@ -1129,17 +1129,17 @@ # Child Loop BB7_20 Depth 3 # Child Loop BB7_26 Depth 4 # Child Loop BB7_31 Depth 4 - # Child Loop BB7_134 Depth 3 - # Child Loop BB7_140 Depth 4 - # Child Loop BB7_145 Depth 4 + # Child Loop BB7_135 Depth 3 + # Child Loop BB7_141 Depth 4 + # Child Loop BB7_146 Depth 4 # Child Loop BB7_37 Depth 3 # Child Loop BB7_39 Depth 4 # Child Loop BB7_54 Depth 4 - # Child Loop BB7_109 Depth 4 - # Child Loop BB7_114 Depth 5 - # Child Loop BB7_126 Depth 4 - # Child Loop BB7_129 Depth 4 - # Child Loop BB7_103 Depth 4 + # Child Loop BB7_110 Depth 4 + # Child Loop BB7_115 Depth 5 + # Child Loop BB7_127 Depth 4 + # Child Loop BB7_130 Depth 4 + # Child Loop BB7_104 Depth 4 add a0, s8, s2 mv a1, s9 j .LBB7_7 @@ -1184,17 +1184,17 @@ # Child Loop BB7_20 Depth 3 # Child Loop BB7_26 Depth 4 # Child Loop BB7_31 Depth 4 - # Child Loop BB7_134 Depth 3 - # Child Loop BB7_140 Depth 4 - # Child Loop BB7_145 Depth 4 + # Child Loop BB7_135 Depth 3 + # Child Loop BB7_141 Depth 4 + # Child Loop BB7_146 Depth 4 # Child Loop BB7_37 Depth 3 # Child Loop BB7_39 Depth 4 # Child Loop BB7_54 Depth 4 - # Child Loop BB7_109 Depth 4 - # Child Loop BB7_114 Depth 5 - # Child Loop BB7_126 Depth 4 - # Child Loop BB7_129 Depth 4 - # Child Loop BB7_103 Depth 4 + # Child Loop BB7_110 Depth 4 + # Child Loop BB7_115 Depth 5 + # Child Loop BB7_127 Depth 4 + # Child Loop BB7_130 Depth 4 + # Child Loop BB7_104 Depth 4 lbu s6, 20(s1) lhu s4, 16(s1) subw s7, s2, s6 @@ -1225,7 +1225,7 @@ lbu a1, 0(a1) andi a0, a0, 15 andi a1, a1, 15 - bne a0, a1, .LBB7_151 + bne a0, a1, .LBB7_152 .LBB7_19: # %sw.epilog.i # in Loop: Header=BB7_20 Depth=3 addiw s2, s2, 1 @@ -1245,7 +1245,7 @@ lhu a0, 0(a0) srli a1, a0, 8 li a2, 4 - bltu a2, a1, .LBB7_152 + bltu a2, a1, .LBB7_153 # %bb.21: # %for.body.i # in Loop: Header=BB7_20 Depth=3 slli a1, a1, 2 @@ -1264,7 +1264,7 @@ lbu a1, 0(a1) andi a0, a0, 255 beq a1, a0, .LBB7_19 - j .LBB7_151 + j .LBB7_152 .LBB7_23: # %sw.bb33.i # in Loop: Header=BB7_20 Depth=3 ld a0, 64(s1) @@ -1278,7 +1278,7 @@ # %bb.24: # %for.cond37.preheader.i # in Loop: Header=BB7_20 Depth=3 lhu a0, 18(s3) - beqz a0, .LBB7_150 + beqz a0, .LBB7_151 # %bb.25: # %for.body42.lr.ph.i # in Loop: Header=BB7_20 Depth=3 ld a1, 8(s3) @@ -1298,7 +1298,7 @@ addi a0, a0, -1 addi a1, a1, 1 bnez a0, .LBB7_26 - j .LBB7_150 + j .LBB7_151 .LBB7_28: # %sw.bb76.i # in Loop: Header=BB7_20 Depth=3 slli a1, s2, 32 @@ -1308,7 +1308,7 @@ andi a0, a0, 240 andi a1, a1, 240 beq a0, a1, .LBB7_19 - j .LBB7_151 + j .LBB7_152 .LBB7_29: # %while.cond.preheader.i # in Loop: Header=BB7_20 Depth=3 sd a4, 80(sp) # 8-byte Folded Spill @@ -1319,7 +1319,7 @@ .LBB7_30: # %if.end70.i # in Loop: Header=BB7_31 Depth=4 ld s3, 24(s3) - beqz s3, .LBB7_149 + beqz s3, .LBB7_150 .LBB7_31: # %while.body.i # Parent Loop BB7_5 Depth=1 # Parent Loop BB7_14 Depth=2 @@ -1350,7 +1350,7 @@ seqz a0, s4 seqz a1, s11 or a0, a1, a0 - beqz a0, .LBB7_131 + beqz a0, .LBB7_132 .LBB7_36: # %ac_findmatch.exit # in Loop: Header=BB7_14 Depth=2 ld a0, 112(sp) # 8-byte Folded Reload @@ -1366,11 +1366,11 @@ # => This Loop Header: Depth=3 # Child Loop BB7_39 Depth 4 # Child Loop BB7_54 Depth 4 - # Child Loop BB7_109 Depth 4 - # Child Loop BB7_114 Depth 5 - # Child Loop BB7_126 Depth 4 - # Child Loop BB7_129 Depth 4 - # Child Loop BB7_103 Depth 4 + # Child Loop BB7_110 Depth 4 + # Child Loop BB7_115 Depth 5 + # Child Loop BB7_127 Depth 4 + # Child Loop BB7_130 Depth 4 + # Child Loop BB7_104 Depth 4 li s4, 1 j .LBB7_39 .LBB7_38: # %while.cond22.backedge @@ -1414,7 +1414,7 @@ .LBB7_45: # %if.end50 # in Loop: Header=BB7_39 Depth=4 lw a1, 48(s11) - beqz a1, .LBB7_58 + beqz a1, .LBB7_55 # %bb.46: # %if.then53 # in Loop: Header=BB7_39 Depth=4 lhu a2, 54(s11) @@ -1440,7 +1440,7 @@ # in Loop: Header=BB7_37 Depth=3 add a1, a0, a1 ld a1, 0(a1) - bnez a1, .LBB7_55 + bnez a1, .LBB7_64 # %bb.50: # %if.then87 # in Loop: Header=BB7_37 Depth=3 lhu a0, 52(s11) @@ -1456,12 +1456,13 @@ ld a0, 8(s6) add a0, a0, a3 ld a0, 0(a0) - beqz a0, .LBB7_164 + beqz a0, .LBB7_165 # %bb.51: # %if.end104 # in Loop: Header=BB7_37 Depth=3 + sd s10, 80(sp) # 8-byte Folded Spill lhu a0, 52(s11) - li a1, 36 - mul a0, a0, a1 + li s10, 36 + mul a0, a0, s10 call cli_malloc@plt lw a1, 48(s11) ld a2, 8(s6) @@ -1475,12 +1476,11 @@ add a0, a0, a3 ld a0, 0(a0) ld a0, 0(a0) - beqz a0, .LBB7_165 + beqz a0, .LBB7_166 # %bb.52: # %if.end137 # in Loop: Header=BB7_37 Depth=3 lhu a1, 52(s11) - li a2, 36 - mul a2, a1, a2 + mul a2, a1, s10 li a1, 255 call memset@plt lw a1, 48(s11) @@ -1494,11 +1494,12 @@ sw zero, 0(a1) lhu a1, 52(s11) li a2, 2 - bltu a1, a2, .LBB7_55 + bltu a1, a2, .LBB7_63 # %bb.53: # %for.body162.preheader # in Loop: Header=BB7_37 Depth=3 li a2, 1 li a6, 36 + ld s10, 80(sp) # 8-byte Folded Reload .LBB7_54: # %for.body162 # Parent Loop BB7_5 Depth=1 # Parent Loop BB7_14 Depth=2 @@ -1524,54 +1525,16 @@ addi a2, a2, 1 sw zero, 0(a3) bne a2, a1, .LBB7_54 -.LBB7_55: # %if.end186 - # in Loop: Header=BB7_37 Depth=3 - lw a1, 48(s11) - addi a1, a1, -1 - slli a1, a1, 32 - srli a1, a1, 29 - add a0, a0, a1 - lhu a1, 54(s11) - ld t0, 0(a0) - bne a1, s4, .LBB7_66 -# %bb.56: # %if.then299.critedge - # in Loop: Header=BB7_37 Depth=3 - ld a0, 0(t0) - lw a1, 0(a0) - slli a2, a1, 1 - srli a2, a2, 61 - add a2, a1, a2 - andi a2, a2, -8 - subw a1, a1, a2 - addiw a1, a1, 1 - sw a1, 0(a0) - slli a1, a1, 2 - add a0, a0, a1 - sw s10, 0(a0) -.LBB7_57: # %if.then299 - # in Loop: Header=BB7_37 Depth=3 - lhu a0, 52(s11) - ld a1, 0(t0) - slli a0, a0, 3 - add a0, t0, a0 - lw a1, 0(a1) - ld a0, -8(a0) - slli a1, a1, 2 - add a0, a0, a1 - sw s8, 0(a0) - ld s11, 88(s11) - ld s8, 128(sp) # 8-byte Folded Reload - bnez s11, .LBB7_37 - j .LBB7_13 -.LBB7_58: # %if.else438 + j .LBB7_64 +.LBB7_55: # %if.else438 # in Loop: Header=BB7_37 Depth=3 lhu a0, 74(s11) - beqz a0, .LBB7_160 -# %bb.59: # %if.then441 + beqz a0, .LBB7_161 +# %bb.56: # %if.then441 # in Loop: Header=BB7_37 Depth=3 ld a1, 88(sp) # 8-byte Folded Reload - beqz a1, .LBB7_119 -# %bb.60: # %if.then443 + beqz a1, .LBB7_120 +# %bb.57: # %if.then443 # in Loop: Header=BB7_37 Depth=3 ld a1, 72(sp) # 8-byte Folded Reload slt a1, a1, a0 @@ -1581,8 +1544,8 @@ addi a0, a0, -502 snez a0, a0 and a0, a0, a1 - bnez a0, .LBB7_119 -# %bb.61: # %if.then458 + bnez a0, .LBB7_120 +# %bb.58: # %if.then458 # in Loop: Header=BB7_37 Depth=3 ld a1, 32(s11) .Lpcrel_hi18: @@ -1593,17 +1556,17 @@ lhu a1, 74(s11) ld a0, 64(sp) # 8-byte Folded Reload sd a1, 72(sp) # 8-byte Folded Spill - beqz a0, .LBB7_119 -# %bb.62: # %land.lhs.true463 + beqz a0, .LBB7_120 +# %bb.59: # %land.lhs.true463 # in Loop: Header=BB7_37 Depth=3 ld a0, 0(a0) - beqz a0, .LBB7_100 -# %bb.63: # %lor.lhs.false465 + beqz a0, .LBB7_101 +# %bb.60: # %lor.lhs.false465 # in Loop: Header=BB7_37 Depth=3 lhu a1, 16(a0) li a2, 10 - bgeu a1, a2, .LBB7_119 -# %bb.64: # %land.lhs.true470.thread + bgeu a1, a2, .LBB7_120 +# %bb.61: # %land.lhs.true470.thread # in Loop: Header=BB7_37 Depth=3 ld a3, 72(sp) # 8-byte Folded Reload sltiu a1, a3, 530 @@ -1615,175 +1578,216 @@ ld a3, 40(sp) # 8-byte Folded Reload and a2, a3, a2 or a1, a1, a2 - beqz a1, .LBB7_119 -# %bb.65: # %land.lhs.true.i202 + beqz a1, .LBB7_120 +# %bb.62: # %land.lhs.true.i202 # in Loop: Header=BB7_37 Depth=3 lhu a0, 16(a0) li a1, 9 - bgeu a1, a0, .LBB7_101 - j .LBB7_119 -.LBB7_66: # %for.cond197.preheader + bgeu a1, a0, .LBB7_102 + j .LBB7_120 +.LBB7_63: # in Loop: Header=BB7_37 Depth=3 + ld s10, 80(sp) # 8-byte Folded Reload +.LBB7_64: # %if.end186 + # in Loop: Header=BB7_37 Depth=3 + lw a1, 48(s11) + addi a1, a1, -1 + slli a1, a1, 32 + srli a1, a1, 29 + add a0, a0, a1 + lhu a1, 54(s11) + ld t0, 0(a0) + bne a1, s4, .LBB7_67 +# %bb.65: # %if.then299.critedge + # in Loop: Header=BB7_37 Depth=3 + ld a0, 0(t0) + lw a1, 0(a0) + slli a2, a1, 1 + srli a2, a2, 61 + add a2, a1, a2 + andi a2, a2, -8 + subw a1, a1, a2 + addiw a1, a1, 1 + sw a1, 0(a0) + slli a1, a1, 2 + add a0, a0, a1 + sw s10, 0(a0) +.LBB7_66: # %if.then299 + # in Loop: Header=BB7_37 Depth=3 + lhu a0, 52(s11) + ld a1, 0(t0) + slli a0, a0, 3 + add a0, t0, a0 + lw a1, 0(a1) + ld a0, -8(a0) + slli a1, a1, 2 + add a0, a0, a1 + sw s8, 0(a0) + ld s11, 88(s11) + ld s8, 128(sp) # 8-byte Folded Reload + bnez s11, .LBB7_37 + j .LBB7_13 +.LBB7_67: # %for.cond197.preheader # in Loop: Header=BB7_37 Depth=3 slli a0, a1, 3 add a0, t0, a0 ld a2, -16(a0) lw a5, 4(a2) li a3, -1 - beq a5, a3, .LBB7_119 -# %bb.67: # %for.body210 + beq a5, a3, .LBB7_120 +# %bb.68: # %for.body210 # in Loop: Header=BB7_37 Depth=3 lw a3, 28(s11) snez a4, a3 subw a5, s8, a5 sltu a6, a3, a5 and a6, a4, a6 - bnez a6, .LBB7_69 -# %bb.68: # %land.lhs.true229 + bnez a6, .LBB7_70 +# %bb.69: # %land.lhs.true229 # in Loop: Header=BB7_37 Depth=3 lw a6, 24(s11) snez a7, a6 sltu a5, a5, a6 and a5, a7, a5 - beqz a5, .LBB7_90 -.LBB7_69: # %for.inc249 + beqz a5, .LBB7_91 +.LBB7_70: # %for.inc249 # in Loop: Header=BB7_37 Depth=3 lw a5, 8(a2) li a6, -1 - beq a5, a6, .LBB7_119 -# %bb.70: # %for.body210.1 + beq a5, a6, .LBB7_120 +# %bb.71: # %for.body210.1 # in Loop: Header=BB7_37 Depth=3 subw a5, s8, a5 sltu a6, a3, a5 and a6, a4, a6 - bnez a6, .LBB7_72 -# %bb.71: # %land.lhs.true229.1 + bnez a6, .LBB7_73 +# %bb.72: # %land.lhs.true229.1 # in Loop: Header=BB7_37 Depth=3 lw a6, 24(s11) snez a7, a6 sltu a5, a5, a6 and a5, a7, a5 - beqz a5, .LBB7_90 -.LBB7_72: # %for.inc249.1 + beqz a5, .LBB7_91 +.LBB7_73: # %for.inc249.1 # in Loop: Header=BB7_37 Depth=3 lw a5, 12(a2) li a6, -1 - beq a5, a6, .LBB7_119 -# %bb.73: # %for.body210.2 + beq a5, a6, .LBB7_120 +# %bb.74: # %for.body210.2 # in Loop: Header=BB7_37 Depth=3 subw a5, s8, a5 sltu a6, a3, a5 and a6, a4, a6 - bnez a6, .LBB7_75 -# %bb.74: # %land.lhs.true229.2 + bnez a6, .LBB7_76 +# %bb.75: # %land.lhs.true229.2 # in Loop: Header=BB7_37 Depth=3 lw a6, 24(s11) snez a7, a6 sltu a5, a5, a6 and a5, a7, a5 - beqz a5, .LBB7_90 -.LBB7_75: # %for.inc249.2 + beqz a5, .LBB7_91 +.LBB7_76: # %for.inc249.2 # in Loop: Header=BB7_37 Depth=3 lw a5, 16(a2) li a6, -1 - beq a5, a6, .LBB7_119 -# %bb.76: # %for.body210.3 + beq a5, a6, .LBB7_120 +# %bb.77: # %for.body210.3 # in Loop: Header=BB7_37 Depth=3 subw a5, s8, a5 sltu a6, a3, a5 and a6, a4, a6 - bnez a6, .LBB7_78 -# %bb.77: # %land.lhs.true229.3 + bnez a6, .LBB7_79 +# %bb.78: # %land.lhs.true229.3 # in Loop: Header=BB7_37 Depth=3 lw a6, 24(s11) snez a7, a6 sltu a5, a5, a6 and a5, a7, a5 - beqz a5, .LBB7_90 -.LBB7_78: # %for.inc249.3 + beqz a5, .LBB7_91 +.LBB7_79: # %for.inc249.3 # in Loop: Header=BB7_37 Depth=3 lw a5, 20(a2) li a6, -1 - beq a5, a6, .LBB7_119 -# %bb.79: # %for.body210.4 + beq a5, a6, .LBB7_120 +# %bb.80: # %for.body210.4 # in Loop: Header=BB7_37 Depth=3 subw a5, s8, a5 sltu a6, a3, a5 and a6, a4, a6 - bnez a6, .LBB7_81 -# %bb.80: # %land.lhs.true229.4 + bnez a6, .LBB7_82 +# %bb.81: # %land.lhs.true229.4 # in Loop: Header=BB7_37 Depth=3 lw a6, 24(s11) snez a7, a6 sltu a5, a5, a6 and a5, a7, a5 - beqz a5, .LBB7_90 -.LBB7_81: # %for.inc249.4 + beqz a5, .LBB7_91 +.LBB7_82: # %for.inc249.4 # in Loop: Header=BB7_37 Depth=3 lw a5, 24(a2) li a6, -1 - beq a5, a6, .LBB7_119 -# %bb.82: # %for.body210.5 + beq a5, a6, .LBB7_120 +# %bb.83: # %for.body210.5 # in Loop: Header=BB7_37 Depth=3 subw a5, s8, a5 sltu a6, a3, a5 and a6, a4, a6 - bnez a6, .LBB7_84 -# %bb.83: # %land.lhs.true229.5 + bnez a6, .LBB7_85 +# %bb.84: # %land.lhs.true229.5 # in Loop: Header=BB7_37 Depth=3 lw a6, 24(s11) snez a7, a6 sltu a5, a5, a6 and a5, a7, a5 - beqz a5, .LBB7_90 -.LBB7_84: # %for.inc249.5 + beqz a5, .LBB7_91 +.LBB7_85: # %for.inc249.5 # in Loop: Header=BB7_37 Depth=3 lw a5, 28(a2) li a6, -1 - beq a5, a6, .LBB7_119 -# %bb.85: # %for.body210.6 + beq a5, a6, .LBB7_120 +# %bb.86: # %for.body210.6 # in Loop: Header=BB7_37 Depth=3 subw a5, s8, a5 sltu a6, a3, a5 and a6, a4, a6 - bnez a6, .LBB7_87 -# %bb.86: # %land.lhs.true229.6 + bnez a6, .LBB7_88 +# %bb.87: # %land.lhs.true229.6 # in Loop: Header=BB7_37 Depth=3 lw a6, 24(s11) snez a7, a6 sltu a5, a5, a6 and a5, a7, a5 - beqz a5, .LBB7_90 -.LBB7_87: # %for.inc249.6 + beqz a5, .LBB7_91 +.LBB7_88: # %for.inc249.6 # in Loop: Header=BB7_37 Depth=3 lw a2, 32(a2) li a5, -1 - beq a2, a5, .LBB7_119 -# %bb.88: # %for.body210.7 + beq a2, a5, .LBB7_120 +# %bb.89: # %for.body210.7 # in Loop: Header=BB7_37 Depth=3 subw a2, s8, a2 sltu a3, a3, a2 and a3, a4, a3 - bnez a3, .LBB7_119 -# %bb.89: # %land.lhs.true229.7 + bnez a3, .LBB7_120 +# %bb.90: # %land.lhs.true229.7 # in Loop: Header=BB7_37 Depth=3 lw a3, 24(s11) snez a4, a3 sltu a2, a2, a3 and a2, a4, a2 - bnez a2, .LBB7_119 -.LBB7_90: # %land.lhs.true260 + bnez a2, .LBB7_120 +.LBB7_91: # %land.lhs.true260 # in Loop: Header=BB7_37 Depth=3 lhu a2, 52(s11) - bne a1, a2, .LBB7_99 -# %bb.91: # %if.then323 + bne a1, a2, .LBB7_100 +# %bb.92: # %if.then323 # in Loop: Header=BB7_37 Depth=3 lhu s8, 74(s11) - beqz s8, .LBB7_160 -# %bb.92: # %if.then326 + beqz s8, .LBB7_161 +# %bb.93: # %if.then326 # in Loop: Header=BB7_37 Depth=3 ld a0, 88(sp) # 8-byte Folded Reload - beqz a0, .LBB7_119 -# %bb.93: # %if.then328 + beqz a0, .LBB7_120 +# %bb.94: # %if.then328 # in Loop: Header=BB7_37 Depth=3 ld a0, 72(sp) # 8-byte Folded Reload slt a0, a0, s8 @@ -1793,22 +1797,22 @@ addi a3, s8, -502 snez a4, a3 and a0, a4, a0 - bnez a0, .LBB7_119 -# %bb.94: # %if.then343 + bnez a0, .LBB7_120 +# %bb.95: # %if.then343 # in Loop: Header=BB7_37 Depth=3 ld a0, 64(sp) # 8-byte Folded Reload sd t0, 80(sp) # 8-byte Folded Spill - beqz a0, .LBB7_122 -# %bb.95: # %land.lhs.true347 + beqz a0, .LBB7_123 +# %bb.96: # %land.lhs.true347 # in Loop: Header=BB7_37 Depth=3 ld a0, 0(a0) - beqz a0, .LBB7_97 -# %bb.96: # %lor.lhs.false349 + beqz a0, .LBB7_98 +# %bb.97: # %lor.lhs.false349 # in Loop: Header=BB7_37 Depth=3 lhu a4, 16(a0) li a5, 9 - bltu a5, a4, .LBB7_122 -.LBB7_97: # %land.lhs.true353 + bltu a5, a4, .LBB7_123 +.LBB7_98: # %land.lhs.true353 # in Loop: Header=BB7_37 Depth=3 seqz a3, a3 xori a2, a2, 1 @@ -1817,13 +1821,13 @@ ld a4, 40(sp) # 8-byte Folded Reload and a3, a4, a3 or a2, a2, a3 - beqz a2, .LBB7_122 -# %bb.98: # %if.then368 + beqz a2, .LBB7_123 +# %bb.99: # %if.then368 # in Loop: Header=BB7_37 Depth=3 addi s0, t0, -8 li s2, 1 - j .LBB7_109 -.LBB7_99: # %if.then267 + j .LBB7_110 +.LBB7_100: # %if.then267 # in Loop: Header=BB7_37 Depth=3 ld a0, -8(a0) lw a2, 0(a0) @@ -1837,9 +1841,9 @@ slli a2, a2, 2 add a0, a0, a2 sw s10, 0(a0) - beq a1, s4, .LBB7_57 - j .LBB7_119 -.LBB7_100: # %land.lhs.true470 + beq a1, s4, .LBB7_66 + j .LBB7_120 +.LBB7_101: # %land.lhs.true470 # in Loop: Header=BB7_37 Depth=3 sltiu a0, a1, 530 xori a0, a0, 1 @@ -1851,14 +1855,14 @@ ld a2, 40(sp) # 8-byte Folded Reload and a1, a2, a1 or a0, a0, a1 - beqz a0, .LBB7_119 -.LBB7_101: # %if.end.i205 + beqz a0, .LBB7_120 +.LBB7_102: # %if.end.i205 # in Loop: Header=BB7_37 Depth=3 li a0, 1 li a1, 32 call cli_calloc@plt - beqz a0, .LBB7_169 -# %bb.102: # %if.end4.i208 + beqz a0, .LBB7_170 +# %bb.103: # %if.end4.i208 # in Loop: Header=BB7_37 Depth=3 slli s8, s8, 32 srli a1, s8, 32 @@ -1867,42 +1871,42 @@ sd a1, 8(a0) ld a3, 64(sp) # 8-byte Folded Reload ld a2, 0(a3) -.LBB7_103: # %while.cond.i210 +.LBB7_104: # %while.cond.i210 # Parent Loop BB7_5 Depth=1 # Parent Loop BB7_14 Depth=2 # Parent Loop BB7_37 Depth=3 # => This Inner Loop Header: Depth=4 - beqz a2, .LBB7_117 -# %bb.104: # %land.rhs.i213 - # in Loop: Header=BB7_103 Depth=4 + beqz a2, .LBB7_118 +# %bb.105: # %land.rhs.i213 + # in Loop: Header=BB7_104 Depth=4 mv a1, a2 ld a2, 24(a2) - bnez a2, .LBB7_103 -# %bb.105: # %if.then11.i216 + bnez a2, .LBB7_104 +# %bb.106: # %if.then11.i216 # in Loop: Header=BB7_37 Depth=3 sd a0, 24(a1) ld a0, 0(a3) - j .LBB7_118 -.LBB7_106: # %if.else.i - # in Loop: Header=BB7_109 Depth=4 + j .LBB7_119 +.LBB7_107: # %if.else.i + # in Loop: Header=BB7_110 Depth=4 sd a0, 0(a3) -.LBB7_107: # %if.end13.i - # in Loop: Header=BB7_109 Depth=4 +.LBB7_108: # %if.end13.i + # in Loop: Header=BB7_110 Depth=4 lh a1, 16(a0) addi a1, a1, 1 sh a1, 16(a0) -.LBB7_108: # %for.inc398 - # in Loop: Header=BB7_109 Depth=4 +.LBB7_109: # %for.inc398 + # in Loop: Header=BB7_110 Depth=4 addi s2, s2, 1 ld s3, 120(sp) # 8-byte Folded Reload li a1, 8 - bgeu s4, a1, .LBB7_120 -.LBB7_109: # %land.rhs373 + bgeu s4, a1, .LBB7_121 +.LBB7_110: # %land.rhs373 # Parent Loop BB7_5 Depth=1 # Parent Loop BB7_14 Depth=2 # Parent Loop BB7_37 Depth=3 # => This Loop Header: Depth=4 - # Child Loop BB7_114 Depth 5 + # Child Loop BB7_115 Depth 5 ld a1, 0(t0) slli a2, s2, 48 srli s4, a2, 48 @@ -1911,72 +1915,72 @@ lw a3, 0(a1) lhu a1, 52(s11) li a4, -1 - beq a3, a4, .LBB7_121 -# %bb.110: # %for.body380 - # in Loop: Header=BB7_109 Depth=4 + beq a3, a4, .LBB7_122 +# %bb.111: # %for.body380 + # in Loop: Header=BB7_110 Depth=4 slli a1, a1, 3 add a1, s0, a1 ld a1, 0(a1) add a1, a1, a2 lw s3, 0(a1) - beqz a0, .LBB7_112 -# %bb.111: # %land.lhs.true.i - # in Loop: Header=BB7_109 Depth=4 + beqz a0, .LBB7_113 +# %bb.112: # %land.lhs.true.i + # in Loop: Header=BB7_110 Depth=4 lhu a1, 16(a0) li a2, 9 - bltu a2, a1, .LBB7_108 -.LBB7_112: # %if.end.i198 - # in Loop: Header=BB7_109 Depth=4 + bltu a2, a1, .LBB7_109 +.LBB7_113: # %if.end.i198 + # in Loop: Header=BB7_110 Depth=4 li a0, 1 li a1, 32 call cli_calloc@plt - beqz a0, .LBB7_168 -# %bb.113: # %if.end4.i - # in Loop: Header=BB7_109 Depth=4 + beqz a0, .LBB7_169 +# %bb.114: # %if.end4.i + # in Loop: Header=BB7_110 Depth=4 sw s8, 0(a0) sd s3, 8(a0) ld a3, 64(sp) # 8-byte Folded Reload ld a2, 0(a3) ld t0, 80(sp) # 8-byte Folded Reload -.LBB7_114: # %while.cond.i +.LBB7_115: # %while.cond.i # Parent Loop BB7_5 Depth=1 # Parent Loop BB7_14 Depth=2 # Parent Loop BB7_37 Depth=3 - # Parent Loop BB7_109 Depth=4 + # Parent Loop BB7_110 Depth=4 # => This Inner Loop Header: Depth=5 - beqz a2, .LBB7_106 -# %bb.115: # %land.rhs.i - # in Loop: Header=BB7_114 Depth=5 + beqz a2, .LBB7_107 +# %bb.116: # %land.rhs.i + # in Loop: Header=BB7_115 Depth=5 mv a1, a2 ld a2, 24(a2) - bnez a2, .LBB7_114 -# %bb.116: # %if.then11.i - # in Loop: Header=BB7_109 Depth=4 + bnez a2, .LBB7_115 +# %bb.117: # %if.then11.i + # in Loop: Header=BB7_110 Depth=4 sd a0, 24(a1) ld a0, 0(a3) - j .LBB7_107 -.LBB7_117: # %if.else.i223 + j .LBB7_108 +.LBB7_118: # %if.else.i223 # in Loop: Header=BB7_37 Depth=3 sd a0, 0(a3) -.LBB7_118: # %if.end13.i219 +.LBB7_119: # %if.end13.i219 # in Loop: Header=BB7_37 Depth=3 lh a1, 16(a0) addi a1, a1, 1 sh a1, 16(a0) -.LBB7_119: # %if.end514 +.LBB7_120: # %if.end514 # in Loop: Header=BB7_37 Depth=3 ld s11, 88(s11) ld s8, 128(sp) # 8-byte Folded Reload bnez s11, .LBB7_37 j .LBB7_13 -.LBB7_120: # %for.inc398.if.end401.loopexit_crit_edge +.LBB7_121: # %for.inc398.if.end401.loopexit_crit_edge # in Loop: Header=BB7_37 Depth=3 lhu a1, 52(s11) -.LBB7_121: # %if.end401.loopexit +.LBB7_122: # %if.end401.loopexit # in Loop: Header=BB7_37 Depth=3 ld s2, 144(sp) # 8-byte Folded Reload ld s0, 104(sp) # 8-byte Folded Reload -.LBB7_122: # %if.end401 +.LBB7_123: # %if.end401 # in Loop: Header=BB7_37 Depth=3 ld a0, 0(t0) li a2, 36 @@ -1984,18 +1988,18 @@ li a1, 255 call memset@plt lhu a0, 52(s11) - beqz a0, .LBB7_130 -# %bb.123: # %for.body414.preheader + beqz a0, .LBB7_131 +# %bb.124: # %for.body414.preheader # in Loop: Header=BB7_37 Depth=3 - ld a5, 32(sp) # 8-byte Folded Reload addi a1, sp, 208 vl1r.v v10, (a1) # Unknown-size Folded Reload - bgeu a0, a5, .LBB7_125 -# %bb.124: # in Loop: Header=BB7_37 Depth=3 + ld a5, 32(sp) # 8-byte Folded Reload + bgeu a0, a5, .LBB7_126 +# %bb.125: # in Loop: Header=BB7_37 Depth=3 li a1, 0 ld a6, 80(sp) # 8-byte Folded Reload - j .LBB7_128 -.LBB7_125: # %vector.ph + j .LBB7_129 +.LBB7_126: # %vector.ph # in Loop: Header=BB7_37 Depth=3 ld a1, 24(sp) # 8-byte Folded Reload srli a1, a1, 3 @@ -2007,7 +2011,7 @@ ld a6, 80(sp) # 8-byte Folded Reload mv a3, a6 ld a4, 16(sp) # 8-byte Folded Reload -.LBB7_126: # %vector.body +.LBB7_127: # %vector.body # Parent Loop BB7_5 Depth=1 # Parent Loop BB7_14 Depth=2 # Parent Loop BB7_37 Depth=3 @@ -2016,16 +2020,16 @@ vsoxei64.v v10, (zero), v8 sub a2, a2, a5 add a3, a3, a4 - bnez a2, .LBB7_126 -# %bb.127: # %middle.block + bnez a2, .LBB7_127 +# %bb.128: # %middle.block # in Loop: Header=BB7_37 Depth=3 - beq a1, a0, .LBB7_130 -.LBB7_128: # %for.body414.preheader530 + beq a1, a0, .LBB7_131 +.LBB7_129: # %for.body414.preheader530 # in Loop: Header=BB7_37 Depth=3 slli a2, a1, 3 add a2, a6, a2 sub a0, a0, a1 -.LBB7_129: # %for.body414 +.LBB7_130: # %for.body414 # Parent Loop BB7_5 Depth=1 # Parent Loop BB7_14 Depth=2 # Parent Loop BB7_37 Depth=3 @@ -2034,47 +2038,47 @@ sw zero, 0(a1) addi a0, a0, -1 addi a2, a2, 8 - bnez a0, .LBB7_129 -.LBB7_130: # in Loop: Header=BB7_37 Depth=3 + bnez a0, .LBB7_130 +.LBB7_131: # in Loop: Header=BB7_37 Depth=3 sd s8, 72(sp) # 8-byte Folded Spill ld s11, 88(s11) ld s8, 128(sp) # 8-byte Folded Reload bnez s11, .LBB7_37 j .LBB7_13 -.LBB7_131: # %for.body124.lr.ph.i +.LBB7_132: # %for.body124.lr.ph.i # in Loop: Header=BB7_14 Depth=2 li s0, 0 li a4, 0 subw s10, s7, s11 - j .LBB7_134 -.LBB7_132: # %sw.bb220.i - # in Loop: Header=BB7_134 Depth=3 + j .LBB7_135 +.LBB7_133: # %sw.bb220.i + # in Loop: Header=BB7_135 Depth=3 slli a1, s10, 32 srli a1, a1, 32 add a1, s8, a1 lbu a1, 0(a1) andi a0, a0, 15 andi a1, a1, 15 - bne a0, a1, .LBB7_151 -.LBB7_133: # %sw.epilog238.i - # in Loop: Header=BB7_134 Depth=3 + bne a0, a1, .LBB7_152 +.LBB7_134: # %sw.epilog238.i + # in Loop: Header=BB7_135 Depth=3 addi s0, s0, 1 addi s10, s10, 1 beq s0, s11, .LBB7_36 -.LBB7_134: # %for.body124.i +.LBB7_135: # %for.body124.i # Parent Loop BB7_5 Depth=1 # Parent Loop BB7_14 Depth=2 # => This Loop Header: Depth=3 - # Child Loop BB7_140 Depth 4 - # Child Loop BB7_145 Depth 4 + # Child Loop BB7_141 Depth 4 + # Child Loop BB7_146 Depth 4 slli a0, s0, 1 add a0, s4, a0 lhu a0, 0(a0) srli a1, a0, 8 li a2, 4 - bltu a2, a1, .LBB7_152 -# %bb.135: # %for.body124.i - # in Loop: Header=BB7_134 Depth=3 + bltu a2, a1, .LBB7_153 +# %bb.136: # %for.body124.i + # in Loop: Header=BB7_135 Depth=3 slli a1, a1, 2 .Lpcrel_hi13: auipc a2, %pcrel_hi(.LJTI7_1) @@ -2083,17 +2087,17 @@ lw a1, 0(a1) add a1, a1, a2 jr a1 -.LBB7_136: # %sw.bb132.i - # in Loop: Header=BB7_134 Depth=3 +.LBB7_137: # %sw.bb132.i + # in Loop: Header=BB7_135 Depth=3 slli a1, s10, 32 srli a1, a1, 32 add a1, s8, a1 lbu a1, 0(a1) andi a0, a0, 255 - beq a1, a0, .LBB7_133 - j .LBB7_151 -.LBB7_137: # %sw.bb145.i - # in Loop: Header=BB7_134 Depth=3 + beq a1, a0, .LBB7_134 + j .LBB7_152 +.LBB7_138: # %sw.bb145.i + # in Loop: Header=BB7_135 Depth=3 ld a0, 64(s1) slli a1, a4, 48 srli a1, a1, 48 @@ -2101,86 +2105,86 @@ add a0, a0, a1 ld s3, 0(a0) lbu a0, 0(s3) - beqz a0, .LBB7_143 -# %bb.138: # %for.cond152.preheader.i - # in Loop: Header=BB7_134 Depth=3 + beqz a0, .LBB7_144 +# %bb.139: # %for.cond152.preheader.i + # in Loop: Header=BB7_135 Depth=3 lhu a0, 18(s3) - beqz a0, .LBB7_150 -# %bb.139: # %for.body158.lr.ph.i - # in Loop: Header=BB7_134 Depth=3 + beqz a0, .LBB7_151 +# %bb.140: # %for.body158.lr.ph.i + # in Loop: Header=BB7_135 Depth=3 ld a1, 8(s3) slli a2, s10, 32 srli a2, a2, 32 add a2, s8, a2 lbu a2, 0(a2) -.LBB7_140: # %for.body158.i +.LBB7_141: # %for.body158.i # Parent Loop BB7_5 Depth=1 # Parent Loop BB7_14 Depth=2 - # Parent Loop BB7_134 Depth=3 + # Parent Loop BB7_135 Depth=3 # => This Inner Loop Header: Depth=4 lbu a3, 0(a1) - beq a3, a2, .LBB7_148 -# %bb.141: # %for.cond152.i - # in Loop: Header=BB7_140 Depth=4 + beq a3, a2, .LBB7_149 +# %bb.142: # %for.cond152.i + # in Loop: Header=BB7_141 Depth=4 addi a0, a0, -1 addi a1, a1, 1 - bnez a0, .LBB7_140 - j .LBB7_150 -.LBB7_142: # %sw.bb204.i - # in Loop: Header=BB7_134 Depth=3 + bnez a0, .LBB7_141 + j .LBB7_151 +.LBB7_143: # %sw.bb204.i + # in Loop: Header=BB7_135 Depth=3 slli a1, s10, 32 srli a1, a1, 32 add a1, s8, a1 lbu a1, 0(a1) andi a0, a0, 240 andi a1, a1, 240 - beq a0, a1, .LBB7_133 - j .LBB7_151 -.LBB7_143: # %while.cond174.preheader.i - # in Loop: Header=BB7_134 Depth=3 + beq a0, a1, .LBB7_134 + j .LBB7_152 +.LBB7_144: # %while.cond174.preheader.i + # in Loop: Header=BB7_135 Depth=3 sd a4, 80(sp) # 8-byte Folded Spill slli a0, s10, 32 srli a0, a0, 32 add s8, s8, a0 - j .LBB7_145 -.LBB7_144: # %if.end196.i - # in Loop: Header=BB7_145 Depth=4 + j .LBB7_146 +.LBB7_145: # %if.end196.i + # in Loop: Header=BB7_146 Depth=4 ld s3, 24(s3) - beqz s3, .LBB7_149 -.LBB7_145: # %while.body176.i + beqz s3, .LBB7_150 +.LBB7_146: # %while.body176.i # Parent Loop BB7_5 Depth=1 # Parent Loop BB7_14 Depth=2 - # Parent Loop BB7_134 Depth=3 + # Parent Loop BB7_135 Depth=3 # => This Inner Loop Header: Depth=4 lhu a2, 16(s3) addw s6, s10, a2 - bltu s5, s6, .LBB7_144 -# %bb.146: # %if.then182.i - # in Loop: Header=BB7_145 Depth=4 + bltu s5, s6, .LBB7_145 +# %bb.147: # %if.then182.i + # in Loop: Header=BB7_146 Depth=4 ld a1, 8(s3) mv a0, s8 call bcmp@plt - bnez a0, .LBB7_144 -# %bb.147: # %if.then190.i - # in Loop: Header=BB7_134 Depth=3 + bnez a0, .LBB7_145 +# %bb.148: # %if.then190.i + # in Loop: Header=BB7_135 Depth=3 addi s10, s6, -1 ld s8, 128(sp) # 8-byte Folded Reload ld a4, 80(sp) # 8-byte Folded Reload -.LBB7_148: # %if.end202.i - # in Loop: Header=BB7_134 Depth=3 +.LBB7_149: # %if.end202.i + # in Loop: Header=BB7_135 Depth=3 addi a4, a4, 1 ld s3, 120(sp) # 8-byte Folded Reload - j .LBB7_133 -.LBB7_149: # in Loop: Header=BB7_14 Depth=2 - ld s8, 128(sp) # 8-byte Folded Reload + j .LBB7_134 .LBB7_150: # in Loop: Header=BB7_14 Depth=2 + ld s8, 128(sp) # 8-byte Folded Reload +.LBB7_151: # in Loop: Header=BB7_14 Depth=2 ld s3, 120(sp) # 8-byte Folded Reload ld s2, 144(sp) # 8-byte Folded Reload j .LBB7_13 -.LBB7_151: # in Loop: Header=BB7_14 Depth=2 +.LBB7_152: # in Loop: Header=BB7_14 Depth=2 ld s2, 144(sp) # 8-byte Folded Reload j .LBB7_13 -.LBB7_152: # %cleanup.sink.split.i.loopexit619 +.LBB7_153: # %cleanup.sink.split.i.loopexit619 # in Loop: Header=BB7_14 Depth=2 ld s2, 144(sp) # 8-byte Folded Reload andi a1, a0, -256 @@ -2189,54 +2193,54 @@ addi a0, a0, %pcrel_lo(.Lpcrel_hi14) call cli_errmsg@plt j .LBB7_13 -.LBB7_153: +.LBB7_154: li a0, 0 - j .LBB7_167 -.LBB7_154: # %if.then2 + j .LBB7_168 +.LBB7_155: # %if.then2 .Lpcrel_hi11: auipc a0, %pcrel_hi(.L.str.10) addi a0, a0, %pcrel_lo(.Lpcrel_hi11) call cli_errmsg@plt li a0, -111 - j .LBB7_167 -.LBB7_155: + j .LBB7_168 +.LBB7_156: li a1, 0 - j .LBB7_159 -.LBB7_156: # %for.end522 + j .LBB7_160 +.LBB7_157: # %for.end522 ld a0, 184(sp) - beqz a0, .LBB7_158 -# %bb.157: # %if.then526 + beqz a0, .LBB7_159 +# %bb.158: # %if.then526 call free@plt -.LBB7_158: # %if.end529 - ld a1, 72(sp) # 8-byte Folded Reload .LBB7_159: # %if.end529 + ld a1, 72(sp) # 8-byte Folded Reload +.LBB7_160: # %if.end529 ld a0, 88(sp) # 8-byte Folded Reload seqz a0, a0 addiw a0, a0, -1 and a0, a0, a1 - j .LBB7_167 -.LBB7_160: # %if.else423 + j .LBB7_168 +.LBB7_161: # %if.else423 ld a1, 56(sp) # 8-byte Folded Reload - beqz a1, .LBB7_162 -# %bb.161: # %if.then425 + beqz a1, .LBB7_163 +# %bb.162: # %if.then425 ld a0, 32(s11) sd a0, 0(a1) -.LBB7_162: # %if.end427 +.LBB7_163: # %if.end427 ld a1, 184(sp) li a0, 1 - beqz a1, .LBB7_167 -# %bb.163: # %if.then431 + beqz a1, .LBB7_168 +# %bb.164: # %if.then431 mv a0, a1 call free@plt li a0, 1 - j .LBB7_167 -.LBB7_164: # %if.then101 + j .LBB7_168 +.LBB7_165: # %if.then101 .Lpcrel_hi15: auipc a0, %pcrel_hi(.L.str.11) addi a0, a0, %pcrel_lo(.Lpcrel_hi15) call cli_errmsg@plt - j .LBB7_166 -.LBB7_165: # %if.then124 + j .LBB7_167 +.LBB7_166: # %if.then124 .Lpcrel_hi16: auipc a0, %pcrel_hi(.L.str.12) addi a0, a0, %pcrel_lo(.Lpcrel_hi16) @@ -2256,9 +2260,9 @@ srli a0, a0, 29 add a0, a1, a0 sd zero, 0(a0) -.LBB7_166: # %cleanup - li a0, -114 .LBB7_167: # %cleanup + li a0, -114 +.LBB7_168: # %cleanup csrr a1, vlenb slli a1, a1, 1 add sp, sp, a1 @@ -2277,24 +2281,24 @@ ld s11, 216(sp) # 8-byte Folded Reload addi sp, sp, 320 ret -.LBB7_168: # %if.then391 +.LBB7_169: # %if.then391 .Lpcrel_hi17: auipc a0, %pcrel_hi(.L.str.25) addi a0, a0, %pcrel_lo(.Lpcrel_hi17) - j .LBB7_170 -.LBB7_169: # %if.then489 + j .LBB7_171 +.LBB7_170: # %if.then489 .Lpcrel_hi19: auipc a0, %pcrel_hi(.L.str.25) addi a0, a0, %pcrel_lo(.Lpcrel_hi19) -.LBB7_170: # %if.then391 +.LBB7_171: # %if.then391 call cli_errmsg@plt ld a1, 184(sp) li a0, -114 - beqz a1, .LBB7_167 -# %bb.171: # %if.then393 + beqz a1, .LBB7_168 +# %bb.172: # %if.then393 mv a0, a1 call free@plt - j .LBB7_166 + j .LBB7_167 .Lfunc_end7: .size cli_ac_scanbuff, .Lfunc_end7-cli_ac_scanbuff .cfi_endproc @@ -2307,11 +2311,11 @@ .word .LBB7_28-.LJTI7_0 .word .LBB7_18-.LJTI7_0 .LJTI7_1: - .word .LBB7_136-.LJTI7_1 - .word .LBB7_133-.LJTI7_1 .word .LBB7_137-.LJTI7_1 - .word .LBB7_142-.LJTI7_1 - .word .LBB7_132-.LJTI7_1 + .word .LBB7_134-.LJTI7_1 + .word .LBB7_138-.LJTI7_1 + .word .LBB7_143-.LJTI7_1 + .word .LBB7_133-.LJTI7_1 # -- End function .text .globl cli_ac_addsig # -- Begin function cli_ac_addsig --- build.head//MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/sort.s 2023-11-13 08:03:22.375558170 +0000 +++ build//MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/sort.s 2023-11-13 08:03:17.419701426 +0000 @@ -6089,19 +6089,19 @@ beqz s8, .LBB33_37 # %bb.45: # %for.cond.i.i.i30.preheader # in Loop: Header=BB33_39 Depth=4 - mv a2, s8 + mv a1, s8 .LBB33_46: # %for.cond.i.i.i30 # Parent Loop BB33_4 Depth=1 # Parent Loop BB33_25 Depth=2 # Parent Loop BB33_35 Depth=3 # Parent Loop BB33_39 Depth=4 # => This Inner Loop Header: Depth=5 - mv a1, a2 - ld a2, 0(a2) - bnez a2, .LBB33_46 + mv a2, a1 + ld a1, 0(a1) + bnez a1, .LBB33_46 # %bb.47: # %for.end.i.i.i34 # in Loop: Header=BB33_39 Depth=4 - sd a0, 0(a1) + sd a0, 0(a2) j .LBB33_38 .LBB33_48: # in Loop: Header=BB33_35 Depth=3 li s8, 0 --- build.head//MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_autoit.s 2023-11-13 08:03:22.187563604 +0000 +++ build//MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_autoit.s 2023-11-13 08:03:17.243706513 +0000 @@ -187,14 +187,14 @@ sd a0, 104(sp) # 8-byte Folded Spill vsetivli zero, 8, e32, m2, ta, ma vmv.v.i v8, 0 - sd s10, 160(sp) # 8-byte Folded Spill - sd s5, 136(sp) # 8-byte Folded Spill csrr a0, vlenb li a1, 6 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 1872 vs2r.v v8, (a0) # Unknown-size Folded Spill + sd s10, 160(sp) # 8-byte Folded Spill + sd s5, 136(sp) # 8-byte Folded Spill sd s11, 152(sp) # 8-byte Folded Spill j .LBB0_386 .LBB0_10: # %sw.bb13 @@ -3891,13 +3891,13 @@ j .LBB0_644 .LBB0_422: # %if.end.i390.i # in Loop: Header=BB0_386 Depth=1 + csrr a1, vlenb + li a2, 6 + mul a1, a1, a2 + add a1, sp, a1 + addi a1, a1, 1872 + vl2r.v v16, (a1) # Unknown-size Folded Reload li a1, 5 - csrr a2, vlenb - li a3, 6 - mul a2, a2, a3 - add a2, sp, a2 - addi a2, a2, 1872 - vl2r.v v16, (a2) # Unknown-size Folded Reload bltu a0, a1, .LBB0_427 # %bb.423: # %land.lhs.true.i391.i # in Loop: Header=BB0_386 Depth=1 --- build.head//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/Archive/7z/7zEncode.s 2023-11-13 08:03:21.203592047 +0000 +++ build//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/Archive/7z/7zEncode.s 2023-11-13 08:03:16.235735649 +0000 @@ -898,8 +898,8 @@ auipc a0, %got_pcrel_hi(_ZTV27CSequentialOutTempBufferImp) ld s9, %pcrel_lo(.Lpcrel_hi13)(a0) ld s2, 24(s9) - li s6, 0 - li s3, 1 + li s3, 0 + li s6, 1 addi s9, s9, 16 .LBB2_12: # %for.body41 # =>This Inner Loop Header: Depth=1 @@ -918,7 +918,7 @@ # %bb.14: # %invoke.cont49 # in Loop: Header=BB2_12 Depth=1 ld a0, 1416(sp) - add a0, a0, s6 + add a0, a0, s3 ld a0, 0(a0) sd a0, 16(s5) .Ltmp80: @@ -980,10 +980,10 @@ # %bb.20: # %_ZN9CMyComPtrI20ISequentialOutStreamED2Ev.exit # in Loop: Header=BB2_12 Depth=1 lw a0, 244(s1) - addi s3, s3, 1 - addi s6, s6, 8 + addi s6, s6, 1 + addi s3, s3, 8 ld s7, 80(sp) # 8-byte Folded Reload - blt s3, a0, .LBB2_12 + blt s6, a0, .LBB2_12 .LBB2_21: # %for.cond64.preheader blez s7, .LBB2_25 # %bb.22: # %for.body66.preheader @@ -2488,14 +2488,14 @@ .LBB3_4: # %if.end61 # in Loop: Header=BB3_5 Depth=1 addw s7, s9, s7 - addw s6, s10, s6 + addw s6, s2, s6 mv a0, s1 call _ZN17CBaseRecordVector18ReserveOnePositionEv@plt lw a0, 148(s0) ld a1, 152(s0) slli a0, a0, 3 add a0, a1, a0 - sw s10, 4(a0) + sw s2, 4(a0) sw s9, 0(a0) lw a1, 148(s0) lw a0, 60(s0) @@ -2512,7 +2512,7 @@ ld a1, 0(a1) lwu s9, 44(a1) lw a2, 92(s0) - lwu s10, 40(a1) + lwu s2, 40(a1) bnez a2, .LBB3_4 # %bb.6: # %if.then39 # in Loop: Header=BB3_5 Depth=1 @@ -2520,7 +2520,7 @@ bge s5, a0, .LBB3_8 # %bb.7: # %if.then44 # in Loop: Header=BB3_5 Depth=1 - add s2, s9, s7 + add s10, s9, s7 mv a0, s4 call _ZN17CBaseRecordVector18ReserveOnePositionEv@plt lw a0, 180(s0) @@ -2528,11 +2528,11 @@ slli a0, a0, 3 add a0, a1, a0 sw s6, 4(a0) - sw s2, 0(a0) + sw s10, 0(a0) lw a0, 180(s0) addi a0, a0, 1 sw a0, 180(s0) - bltu s10, s8, .LBB3_4 + bltu s2, s8, .LBB3_4 j .LBB3_9 .LBB3_8: # %if.else49 # in Loop: Header=BB3_5 Depth=1 @@ -2541,10 +2541,10 @@ call _ZN17CBaseRecordVector13InsertOneItemEi@plt ld a0, 248(s0) sw s6, 0(a0) - bltu s10, s8, .LBB3_4 + bltu s2, s8, .LBB3_4 .LBB3_9: # %for.body56.preheader # in Loop: Header=BB3_5 Depth=1 - addi s2, s10, -1 + addi s10, s2, -1 addi s11, s6, 1 .LBB3_10: # %for.body56 # Parent Loop BB3_5 Depth=1 @@ -2559,9 +2559,9 @@ lw a0, 244(s0) addi a0, a0, 1 sw a0, 244(s0) - addiw s2, s2, -1 + addiw s10, s10, -1 addi s11, s11, 1 - bnez s2, .LBB3_10 + bnez s10, .LBB3_10 j .LBB3_4 .LBB3_11: # %if.then2 lbu a0, 116(s0) --- build.head//SingleSource/Benchmarks/Adobe-C++/CMakeFiles/simple_types_loop_invariant.dir/simple_types_loop_invariant.s 2023-11-13 08:03:22.871543833 +0000 +++ build//SingleSource/Benchmarks/Adobe-C++/CMakeFiles/simple_types_loop_invariant.dir/simple_types_loop_invariant.s 2023-11-13 08:03:17.935686510 +0000 @@ -13054,7 +13054,7 @@ sub sp, sp, a7 .cfi_escape 0x0f, 0x0e, 0x72, 0x00, 0x11, 0xa0, 0x01, 0x22, 0x11, 0x02, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 160 + 2 * vlenb sd a6, 16(sp) # 8-byte Folded Spill - mv s0, a5 + mv s3, a5 mv s4, a4 mv s5, a3 mv s6, a2 @@ -13069,11 +13069,11 @@ sd a2, 24(sp) # 8-byte Folded Spill sd a0, %pcrel_lo(.Lpcrel_hi722)(a2) .Lpcrel_hi724: - auipc s3, %pcrel_hi(current_test) + auipc s7, %pcrel_hi(current_test) blez a1, .LBB48_17 # %bb.1: # %for.cond1.preheader.lr.ph mul a0, s5, s6 - mul a2, s4, s0 + mul a2, s4, s3 mul s5, a0, a2 lui a0, 2 addiw a0, a0, -192 @@ -13093,7 +13093,7 @@ sd a0, 32(sp) # 8-byte Folded Spill slli a0, s10, 29 sub a0, a0, s10 - and s7, a0, s1 + and s3, a0, s1 vsetvli a0, zero, e16, m2, ta, ma vmv.v.i v8, 0 addi a0, sp, 48 @@ -13115,7 +13115,7 @@ .LBB48_6: # %vector.ph # in Loop: Header=BB48_4 Depth=1 vsetvli a0, zero, e16, m2, ta, ma - mv a0, s7 + mv a0, s3 mv a2, s2 addi a3, sp, 48 vl2r.v v8, (a3) # Unknown-size Folded Reload @@ -13132,8 +13132,8 @@ vmv.s.x v10, zero vredsum.vs v8, v8, v10 vmv.x.s a0, v8 - mv a3, s7 - beq s7, s1, .LBB48_11 + mv a3, s3 + beq s3, s1, .LBB48_11 .LBB48_9: # %for.body3.us.preheader # in Loop: Header=BB48_4 Depth=1 slli a2, a3, 1 @@ -13158,7 +13158,7 @@ beq a2, a0, .LBB48_3 # %bb.12: # %if.then.i.us # in Loop: Header=BB48_4 Depth=1 - lw a1, %pcrel_lo(.Lpcrel_hi724)(s3) + lw a1, %pcrel_lo(.Lpcrel_hi724)(s7) ld a0, 32(sp) # 8-byte Folded Reload call printf@plt lw a1, %pcrel_lo(.Lpcrel_hi723)(s9) @@ -13184,7 +13184,7 @@ beqz a0, .LBB48_14 # %bb.16: # %if.then.i # in Loop: Header=BB48_15 Depth=1 - lw a1, %pcrel_lo(.Lpcrel_hi724)(s3) + lw a1, %pcrel_lo(.Lpcrel_hi724)(s7) mv a0, s1 call printf@plt fld fa5, %pcrel_lo(.Lpcrel_hi725)(s0) @@ -13193,12 +13193,12 @@ .LBB48_17: # %for.end8 call clock@plt .Lpcrel_hi730: - auipc s4, %pcrel_hi(results) - ld a2, %pcrel_lo(.Lpcrel_hi730)(s4) + auipc s3, %pcrel_hi(results) + ld a2, %pcrel_lo(.Lpcrel_hi730)(s3) .Lpcrel_hi731: auipc s2, %pcrel_hi(allocated_results) lw a3, %pcrel_lo(.Lpcrel_hi731)(s2) - lw a1, %pcrel_lo(.Lpcrel_hi724)(s3) + lw a1, %pcrel_lo(.Lpcrel_hi724)(s7) mv s1, a0 ld a0, 24(sp) # 8-byte Folded Reload ld s0, %pcrel_lo(.Lpcrel_hi722)(a0) @@ -13215,11 +13215,11 @@ slli a1, a1, 4 mv a0, a2 call realloc@plt - sd a0, %pcrel_lo(.Lpcrel_hi730)(s4) + sd a0, %pcrel_lo(.Lpcrel_hi730)(s3) beqz a0, .LBB48_21 # %bb.19: # %if.then.if.end5_crit_edge.i mv a2, a0 - lw a1, %pcrel_lo(.Lpcrel_hi724)(s3) + lw a1, %pcrel_lo(.Lpcrel_hi724)(s7) .LBB48_20: # %_Z13record_resultdPKc.exit .Lpcrel_hi733: auipc a0, %pcrel_hi(.LCPI48_0) @@ -13233,7 +13233,7 @@ ld a2, 16(sp) # 8-byte Folded Reload sd a2, 8(a0) addi a1, a1, 1 - sw a1, %pcrel_lo(.Lpcrel_hi724)(s3) + sw a1, %pcrel_lo(.Lpcrel_hi724)(s7) csrr a0, vlenb slli a0, a0, 1 add sp, sp, a0 @@ -14404,9 +14404,9 @@ csrr s0, vlenb slli s8, s0, 1 .Lpcrel_hi787: - auipc s7, %pcrel_hi(init_value) - lui s4, 16 - addiw s4, s4, -1 + auipc s4, %pcrel_hi(init_value) + lui s7, 16 + addiw s7, s7, -1 .Lpcrel_hi788: auipc a0, %pcrel_hi(.L.str.179) addi a0, a0, %pcrel_lo(.Lpcrel_hi788) @@ -14486,13 +14486,13 @@ bnez a3, .LBB53_10 .LBB53_11: # %for.cond1.for.cond.cleanup_crit_edge.us # in Loop: Header=BB53_4 Depth=1 - fld fa5, %pcrel_lo(.Lpcrel_hi787)(s7) + fld fa5, %pcrel_lo(.Lpcrel_hi787)(s4) fcvt.l.d a2, fa5, rtz sub a3, s1, s5 add a2, a2, a3 mul a2, a2, s11 - and a2, a2, s4 - and a0, a0, s4 + and a2, a2, s7 + and a0, a0, s7 beq a2, a0, .LBB53_3 # %bb.12: # %if.then.i.us # in Loop: Header=BB53_4 Depth=1 @@ -17786,7 +17786,7 @@ sub sp, sp, a7 .cfi_escape 0x0f, 0x0e, 0x72, 0x00, 0x11, 0xa0, 0x01, 0x22, 0x11, 0x02, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 160 + 2 * vlenb sd a6, 16(sp) # 8-byte Folded Spill - mv s0, a5 + mv s3, a5 mv s4, a4 mv s5, a3 mv s6, a2 @@ -17801,11 +17801,11 @@ sd a2, 24(sp) # 8-byte Folded Spill sd a0, %pcrel_lo(.Lpcrel_hi938)(a2) .Lpcrel_hi940: - auipc s3, %pcrel_hi(current_test) + auipc s7, %pcrel_hi(current_test) blez a1, .LBB66_17 # %bb.1: # %for.cond1.preheader.lr.ph mul a0, s5, s6 - mul a2, s4, s0 + mul a2, s4, s3 mul s5, a0, a2 lui a0, 2 addiw a0, a0, -192 @@ -17825,7 +17825,7 @@ sd a0, 32(sp) # 8-byte Folded Spill slli a0, s10, 29 sub a0, a0, s10 - and s7, a0, s1 + and s3, a0, s1 vsetvli a0, zero, e16, m2, ta, ma vmv.v.i v8, 0 addi a0, sp, 48 @@ -17847,7 +17847,7 @@ .LBB66_6: # %vector.ph # in Loop: Header=BB66_4 Depth=1 vsetvli a0, zero, e16, m2, ta, ma - mv a0, s7 + mv a0, s3 mv a2, s2 addi a3, sp, 48 vl2r.v v8, (a3) # Unknown-size Folded Reload @@ -17864,8 +17864,8 @@ vmv.s.x v10, zero vredsum.vs v8, v8, v10 vmv.x.s a0, v8 - mv a3, s7 - beq s7, s1, .LBB66_11 + mv a3, s3 + beq s3, s1, .LBB66_11 .LBB66_9: # %for.body3.us.preheader # in Loop: Header=BB66_4 Depth=1 slli a2, a3, 1 @@ -17890,7 +17890,7 @@ beq a2, a0, .LBB66_3 # %bb.12: # %if.then.i.us # in Loop: Header=BB66_4 Depth=1 - lw a1, %pcrel_lo(.Lpcrel_hi940)(s3) + lw a1, %pcrel_lo(.Lpcrel_hi940)(s7) ld a0, 32(sp) # 8-byte Folded Reload call printf@plt lw a1, %pcrel_lo(.Lpcrel_hi939)(s9) @@ -17916,7 +17916,7 @@ beqz a0, .LBB66_14 # %bb.16: # %if.then.i # in Loop: Header=BB66_15 Depth=1 - lw a1, %pcrel_lo(.Lpcrel_hi940)(s3) + lw a1, %pcrel_lo(.Lpcrel_hi940)(s7) mv a0, s1 call printf@plt fld fa5, %pcrel_lo(.Lpcrel_hi941)(s0) @@ -17925,12 +17925,12 @@ .LBB66_17: # %for.end8 call clock@plt .Lpcrel_hi946: - auipc s4, %pcrel_hi(results) - ld a2, %pcrel_lo(.Lpcrel_hi946)(s4) + auipc s3, %pcrel_hi(results) + ld a2, %pcrel_lo(.Lpcrel_hi946)(s3) .Lpcrel_hi947: auipc s2, %pcrel_hi(allocated_results) lw a3, %pcrel_lo(.Lpcrel_hi947)(s2) - lw a1, %pcrel_lo(.Lpcrel_hi940)(s3) + lw a1, %pcrel_lo(.Lpcrel_hi940)(s7) mv s1, a0 ld a0, 24(sp) # 8-byte Folded Reload ld s0, %pcrel_lo(.Lpcrel_hi938)(a0) @@ -17947,11 +17947,11 @@ slli a1, a1, 4 mv a0, a2 call realloc@plt - sd a0, %pcrel_lo(.Lpcrel_hi946)(s4) + sd a0, %pcrel_lo(.Lpcrel_hi946)(s3) beqz a0, .LBB66_21 # %bb.19: # %if.then.if.end5_crit_edge.i mv a2, a0 - lw a1, %pcrel_lo(.Lpcrel_hi940)(s3) + lw a1, %pcrel_lo(.Lpcrel_hi940)(s7) .LBB66_20: # %_Z13record_resultdPKc.exit .Lpcrel_hi949: auipc a0, %pcrel_hi(.LCPI66_0) @@ -17965,7 +17965,7 @@ ld a2, 16(sp) # 8-byte Folded Reload sd a2, 8(a0) addi a1, a1, 1 - sw a1, %pcrel_lo(.Lpcrel_hi940)(s3) + sw a1, %pcrel_lo(.Lpcrel_hi940)(s7) csrr a0, vlenb slli a0, a0, 1 add sp, sp, a0 @@ -19130,15 +19130,15 @@ slli s0, s11, 1 .Lpcrel_hi1003: auipc s8, %pcrel_hi(init_value) - lui s7, 16 - addiw s7, s7, -1 + lui s4, 16 + addiw s4, s4, -1 .Lpcrel_hi1004: auipc a0, %pcrel_hi(.L.str.179) addi a0, a0, %pcrel_lo(.Lpcrel_hi1004) sd a0, 40(sp) # 8-byte Folded Spill slli a0, s11, 29 sub a0, a0, s11 - and s4, a0, s2 + and s7, a0, s2 vsetvli a0, zero, e16, m2, ta, ma vmv.v.i v8, 0 csrr a0, vlenb @@ -19167,7 +19167,7 @@ .LBB71_6: # %vector.ph # in Loop: Header=BB71_4 Depth=1 vsetvli a0, zero, e16, m2, ta, ma - mv a0, s4 + mv a0, s7 mv a2, s3 csrr a3, vlenb slli a3, a3, 2 @@ -19192,8 +19192,8 @@ vmv.s.x v10, zero vredsum.vs v8, v8, v10 vmv.x.s a0, v8 - mv a3, s4 - beq s4, s2, .LBB71_11 + mv a3, s7 + beq s7, s2, .LBB71_11 .LBB71_9: # %for.body3.us.preheader # in Loop: Header=BB71_4 Depth=1 slli a2, a3, 1 @@ -19216,8 +19216,8 @@ sub a3, s1, s5 add a2, a2, a3 mul a2, a2, s10 - and a2, a2, s7 - and a0, a0, s7 + and a2, a2, s4 + and a0, a0, s4 beq a2, a0, .LBB71_3 # %bb.12: # %if.then.i.us # in Loop: Header=BB71_4 Depth=1 --- build.head//MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/btSubSimplexConvexCast.s 2023-11-13 08:03:22.487554932 +0000 +++ build//MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/btSubSimplexConvexCast.s 2023-11-13 08:03:17.523698419 +0000 @@ -148,10 +148,10 @@ flw ft3, 24(s3) fsw ft3, 72(sp) # 4-byte Folded Spill fsub.s fs3, fa5, fa2 - fsub.s fs5, fa4, fa1 + fsub.s fs6, fa4, fa1 fsub.s fs4, fa3, fa0 ld a0, 16(s1) - fneg.s fa5, fs5 + fneg.s fa5, fs6 fsw ft4, 84(sp) # 4-byte Folded Spill fmul.s fa4, ft4, fa5 fsw ft0, 16(sp) # 4-byte Folded Spill @@ -216,11 +216,11 @@ flw fa3, 40(s5) flw fa0, 56(s5) fmadd.s fa4, ft0, fa1, fa4 - fadd.s fs7, fa2, fa4 + fadd.s fs5, fa2, fa4 fmadd.s fa5, fa3, fa1, fa5 fadd.s fs1, fa0, fa5 fmv.x.w a0, fs0 - fmv.x.w a1, fs7 + fmv.x.w a1, fs5 slli a1, a1, 32 slli a0, a0, 32 srli a0, a0, 32 @@ -228,22 +228,22 @@ flw fa4, 0(s3) flw fa3, 32(s3) or a0, a1, a0 - fmul.s fa5, fs5, fa5 + fmul.s fa5, fs6, fa5 fmadd.s fa5, fa4, fs3, fa5 fmadd.s fa5, fa3, fs4, fa5 flw fa4, 20(s3) flw fa3, 4(s3) flw fa2, 36(s3) fmv.x.w a1, fs1 - fmul.s fa4, fs5, fa4 + fmul.s fa4, fs6, fa4 fmadd.s fa4, fa3, fs3, fa4 fmadd.s fa4, fa2, fs4, fa4 flw fa3, 24(s3) flw fa2, 8(s3) slli a1, a1, 32 srli a1, a1, 32 - fsw fs5, 32(sp) # 4-byte Folded Spill - fmul.s fa3, fs5, fa3 + fsw fs6, 32(sp) # 4-byte Folded Spill + fmul.s fa3, fs6, fa3 fsw fs3, 36(sp) # 4-byte Folded Spill fmadd.s fa3, fa2, fs3, fa3 flw fa2, 40(s3) @@ -307,7 +307,7 @@ sd a0, 168(sp) sd a1, 176(sp) fsub.s fa4, fs0, fa4 - fsub.s fa3, fs7, fa2 + fsub.s fa3, fs5, fa2 fsub.s fa5, fs1, fa5 fmv.x.w a0, fa4 fmv.x.w a1, fa3 @@ -340,13 +340,13 @@ addi a0, sp, 224 vl1r.v v9, (a0) # Unknown-size Folded Reload vslideup.vi v8, v9, 2 - fmv.w.x fs7, zero + fmv.w.x fs5, zero li s10, -33 lui s11, 260096 - fsw fs7, 24(sp) # 4-byte Folded Spill - fsw fs7, 20(sp) # 4-byte Folded Spill - fmv.s fs0, fs7 - flw fs5, 16(sp) # 4-byte Folded Reload + fsw fs5, 24(sp) # 4-byte Folded Spill + fsw fs5, 20(sp) # 4-byte Folded Spill + fmv.s fs0, fs5 + flw fs6, 16(sp) # 4-byte Folded Reload flw fs11, 56(sp) # 4-byte Folded Reload .LBB1_2: # %land.rhs # =>This Inner Loop Header: Depth=1 @@ -361,11 +361,11 @@ fneg.s fa5, fa5 flw fs4, 84(sp) # 4-byte Folded Reload fmul.s fa2, fs4, fa5 - fnmsub.s fa2, fa4, fs5, fa2 + fnmsub.s fa2, fa4, fs6, fa2 flw fs9, 60(sp) # 4-byte Folded Reload fnmsub.s fa2, fa3, fs9, fa2 - flw fs6, 76(sp) # 4-byte Folded Reload - fmul.s fa1, fs6, fa5 + flw fs7, 76(sp) # 4-byte Folded Reload + fmul.s fa1, fs7, fa5 flw fs3, 108(sp) # 4-byte Folded Reload fnmsub.s fa1, fa4, fs3, fa1 flw fs10, 52(sp) # 4-byte Folded Reload @@ -400,7 +400,7 @@ fmv.w.x fa4, a0 fmv.w.x fa3, a1 fmul.s fa2, fs3, fa4 - fmadd.s fa2, fs5, fa5, fa2 + fmadd.s fa2, fs6, fa5, fa2 fmadd.s fa2, fs1, fa3, fa2 vsetivli zero, 1, e32, m1, ta, ma csrr a0, vlenb @@ -410,7 +410,7 @@ vslidedown.vi v8, v9, 2 vfmv.f.s fa1, v8 fadd.s fa2, fa1, fa2 - fmul.s fa1, fs6, fa4 + fmul.s fa1, fs7, fa4 fmadd.s fa1, fs4, fa5, fa1 fmadd.s fa1, fs8, fa3, fa1 vslidedown.vi v8, v9, 3 @@ -436,8 +436,8 @@ flw fa4, 200(sp) flw fa3, 208(sp) ld a0, 24(s1) - flw fs6, 88(sp) # 4-byte Folded Reload - fmul.s fa2, fs6, fa5 + flw fs7, 88(sp) # 4-byte Folded Reload + fmul.s fa2, fs7, fa5 flw fs1, 100(sp) # 4-byte Folded Reload fmadd.s fa2, fs1, fa4, fa2 flw fs10, 64(sp) # 4-byte Folded Reload @@ -478,7 +478,7 @@ flw fa1, 112(sp) # 4-byte Folded Reload fadd.s fa2, fa1, fa2 fmul.s fa1, fs8, fa4 - fmadd.s fa1, fs6, fa5, fa1 + fmadd.s fa1, fs7, fa5, fa1 fmadd.s fa1, fs9, fa3, fa1 vsetivli zero, 1, e32, m1, ta, ma csrr a0, vlenb @@ -521,7 +521,7 @@ srli a1, a1, 32 sd a0, 152(sp) fmv.w.x fa2, s11 - flt.s a0, fa2, fs7 + flt.s a0, fa2, fs5 sd a1, 160(sp) bnez a0, .LBB1_15 # %bb.4: # %if.end @@ -550,26 +550,26 @@ # %bb.6: # %if.else # in Loop: Header=BB1_2 Depth=1 fdiv.s fa1, fa1, fa0 - fsub.s fs7, fs7, fa1 + fsub.s fs5, fs5, fa1 vsetivli zero, 2, e32, mf2, ta, ma flw fa1, 56(s4) - fsub.s fa2, fa2, fs7 + fsub.s fa2, fa2, fs5 flw fa0, 56(s5) vle32.v v8, (s6) - fmul.s fa1, fs7, fa1 + fmul.s fa1, fs5, fa1 flw ft0, 48(s2) fmadd.s fa1, fa2, fa0, fa1 fsw fa1, 116(sp) # 4-byte Folded Spill flw fa1, 48(s3) vle32.v v9, (s8) - fmul.s fa0, fs7, ft0 + fmul.s fa0, fs5, ft0 vle32.v v10, (s9) fmadd.s fa1, fa2, fa1, fa0 fsw fa1, 112(sp) # 4-byte Folded Spill vle32.v v11, (s7) vsetivli zero, 4, e32, m1, ta, ma vslideup.vi v10, v9, 2 - vfmul.vf v9, v10, fs7 + vfmul.vf v9, v10, fs5 vslideup.vi v11, v8, 2 vfmadd.vf v11, fa2, v9 csrr a0, vlenb @@ -610,7 +610,7 @@ fmv.w.x fs0, zero fsw fs0, 20(sp) # 4-byte Folded Spill fsw fs0, 24(sp) # 4-byte Folded Spill - fmv.s fs7, fs0 + fmv.s fs5, fs0 .LBB1_10: # %while.end flw fa3, 20(sp) # 4-byte Folded Reload fmul.s fa5, fa3, fa3 @@ -620,7 +620,7 @@ lui a0, 165888 fmv.w.x fa4, a0 fle.s a0, fa4, fa5 - fsw fs7, 168(s0) + fsw fs5, 168(s0) bnez a0, .LBB1_12 # %bb.11: # %if.else104 addi a0, s0, 136 --- build.head//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/Archive/7z/7zHandlerOut.s 2023-11-13 08:03:21.203592047 +0000 +++ build//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/Archive/7z/7zHandlerOut.s 2023-11-13 08:03:16.235735649 +0000 @@ -805,9 +805,9 @@ call _Z21MyStringCompareNoCasePKwS0_@plt mv s9, a0 vsetivli zero, 2, e64, m1, ta, ma + addi a0, sp, 96 + vl1r.v v8, (a0) # Unknown-size Folded Reload addi a0, sp, 56 - addi a1, sp, 96 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) sd s7, 72(sp) sd s2, 48(sp) --- build.head//MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/zlib_infback.s 2023-11-13 08:03:22.215562795 +0000 +++ build//MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/zlib_infback.s 2023-11-13 08:03:17.267705819 +0000 @@ -387,9 +387,9 @@ add s10, s10, s7 subw s1, a0, s1 sw s1, 92(s9) - li s7, 2 addi a0, sp, 176 vl2r.v v10, (a0) # Unknown-size Folded Reload + li s7, 2 beqz s1, .LBB1_64 .LBB1_27: # %while.body110 # Parent Loop BB1_6 Depth=1 @@ -1084,8 +1084,11 @@ # in Loop: Header=BB1_6 Depth=1 sd a0, 48(s2) sw s0, 8(s9) + addi a0, sp, 176 + vl2r.v v10, (a0) # Unknown-size Folded Reload li s7, 2 - j .LBB1_129 + lw a0, 8(s9) + j .LBB1_6 .LBB1_123: # %if.then549 # in Loop: Header=BB1_6 Depth=1 .Lpcrel_hi11: @@ -1097,9 +1100,9 @@ lui a0, 4 addi a0, a0, -184 sw a0, 8(s9) - li s7, 2 addi a0, sp, 176 vl2r.v v10, (a0) # Unknown-size Folded Reload + li s7, 2 .LBB1_125: # %sw.bb617 # in Loop: Header=BB1_6 Depth=1 sltiu a0, s6, 6 --- build.head//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/Archive/SplitHandler.s 2023-11-13 08:03:21.219591584 +0000 +++ build//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/Archive/SplitHandler.s 2023-11-13 08:03:16.251735187 +0000 @@ -2401,9 +2401,9 @@ sw a0, 0(s2) sw zero, 4(s2) vsetivli zero, 2, e64, m1, ta, ma + addi a0, sp, 80 + vl1r.v v8, (a0) # Unknown-size Folded Reload addi a0, sp, 32 - addi a1, sp, 80 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) .Ltmp259: li a0, 8 --- build.head//MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/rules-sort.s 2023-11-13 08:03:22.375558170 +0000 +++ build//MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/rules-sort.s 2023-11-13 08:03:17.419701426 +0000 @@ -107,9 +107,9 @@ sd a0, 88(sp) # 8-byte Folded Spill vsetivli zero, 4, e32, m1, ta, ma vmv.v.i v8, 0 - sd s2, 144(sp) # 8-byte Folded Spill addi a0, sp, 176 vs1r.v v8, (a0) # Unknown-size Folded Spill + sd s2, 144(sp) # 8-byte Folded Spill j .LBB0_5 .LBB0_4: # %if.end89 # in Loop: Header=BB0_5 Depth=1 @@ -439,16 +439,16 @@ .Lpcrel_hi6: auipc a0, %got_pcrel_hi(cont_LASTBINDING) ld a0, %pcrel_lo(.Lpcrel_hi6)(a0) - ld a2, 0(a0) - addi a1, sp, 176 - vl1r.v v8, (a1) # Unknown-size Folded Reload - beqz a2, .LBB0_46 + ld a1, 0(a0) + addi a2, sp, 176 + vl1r.v v8, (a2) # Unknown-size Folded Reload + beqz a1, .LBB0_46 # %bb.44: # %while.body.preheader.i # in Loop: Header=BB0_22 Depth=3 .Lpcrel_hi7: - auipc a1, %got_pcrel_hi(cont_BINDINGS) - ld a1, %pcrel_lo(.Lpcrel_hi7)(a1) - lw a3, 0(a1) + auipc a2, %got_pcrel_hi(cont_BINDINGS) + ld a2, %pcrel_lo(.Lpcrel_hi7)(a2) + lw a3, 0(a2) addi a3, a3, -1 vsetivli zero, 4, e32, m1, ta, ma .LBB0_45: # %while.body.i @@ -459,18 +459,18 @@ .Lpcrel_hi8: auipc a4, %got_pcrel_hi(cont_CURRENTBINDING) ld a4, %pcrel_lo(.Lpcrel_hi8)(a4) - sd a2, 0(a4) - ld a5, 24(a2) + sd a1, 0(a4) + ld a5, 24(a1) sd a5, 0(a0) - addi a5, a2, 4 - sw zero, 20(a2) + addi a5, a1, 4 + sw zero, 20(a1) vse32.v v8, (a5) ld a4, 0(a4) - ld a2, 0(a0) + ld a1, 0(a0) sd zero, 24(a4) - sw a3, 0(a1) + sw a3, 0(a2) addi a3, a3, -1 - bnez a2, .LBB0_45 + bnez a1, .LBB0_45 .LBB0_46: # %cont_Reset.exit # in Loop: Header=BB0_22 Depth=3 .Lpcrel_hi9: @@ -1277,30 +1277,30 @@ addi a1, sp, 160 addi a3, sp, 152 call subst_ExtractUnifier@plt - ld a1, 0(s7) - addi a0, sp, 176 - vl1r.v v8, (a0) # Unknown-size Folded Reload - beqz a1, .LBB2_49 + ld a0, 0(s7) + addi a1, sp, 176 + vl1r.v v8, (a1) # Unknown-size Folded Reload + beqz a0, .LBB2_49 # %bb.47: # %while.body.preheader.i # in Loop: Header=BB2_42 Depth=1 - lw a0, 0(s1) - addi a0, a0, -1 + lw a1, 0(s1) + addi a1, a1, -1 vsetivli zero, 4, e32, m1, ta, ma .LBB2_48: # %while.body.i # Parent Loop BB2_42 Depth=1 # => This Inner Loop Header: Depth=2 - sd a1, 0(s5) - ld a2, 24(a1) + sd a0, 0(s5) + ld a2, 24(a0) sd a2, 0(s7) - addi a2, a1, 4 - sw zero, 20(a1) + addi a2, a0, 4 + sw zero, 20(a0) vse32.v v8, (a2) ld a2, 0(s5) - ld a1, 0(s7) + ld a0, 0(s7) sd zero, 24(a2) - sw a0, 0(s1) - addi a0, a0, -1 - bnez a1, .LBB2_48 + sw a1, 0(s1) + addi a1, a1, -1 + bnez a0, .LBB2_48 .LBB2_49: # %cont_Reset.exit # in Loop: Header=BB2_42 Depth=1 ld a0, 152(sp) @@ -1733,16 +1733,16 @@ .Lpcrel_hi41: auipc a0, %got_pcrel_hi(cont_LASTBINDING) ld a0, %pcrel_lo(.Lpcrel_hi41)(a0) - ld a2, 0(a0) - addi a1, sp, 176 - vl1r.v v8, (a1) # Unknown-size Folded Reload - beqz a2, .LBB2_100 + ld a1, 0(a0) + addi a2, sp, 176 + vl1r.v v8, (a2) # Unknown-size Folded Reload + beqz a1, .LBB2_100 # %bb.98: # %while.body.preheader.i.i # in Loop: Header=BB2_75 Depth=1 .Lpcrel_hi42: - auipc a1, %got_pcrel_hi(cont_BINDINGS) - ld a1, %pcrel_lo(.Lpcrel_hi42)(a1) - lw a3, 0(a1) + auipc a2, %got_pcrel_hi(cont_BINDINGS) + ld a2, %pcrel_lo(.Lpcrel_hi42)(a2) + lw a3, 0(a2) addi a3, a3, -1 vsetivli zero, 4, e32, m1, ta, ma .LBB2_99: # %while.body.i245.i @@ -1751,18 +1751,18 @@ .Lpcrel_hi43: auipc a4, %got_pcrel_hi(cont_CURRENTBINDING) ld a4, %pcrel_lo(.Lpcrel_hi43)(a4) - sd a2, 0(a4) - ld a5, 24(a2) + sd a1, 0(a4) + ld a5, 24(a1) sd a5, 0(a0) - addi a5, a2, 4 - sw zero, 20(a2) + addi a5, a1, 4 + sw zero, 20(a1) vse32.v v8, (a5) ld a4, 0(a4) - ld a2, 0(a0) + ld a1, 0(a0) sd zero, 24(a4) - sw a3, 0(a1) + sw a3, 0(a2) addi a3, a3, -1 - bnez a2, .LBB2_99 + bnez a1, .LBB2_99 .LBB2_100: # %cont_Reset.exit.i # in Loop: Header=BB2_75 Depth=1 sd s9, 80(sp) # 8-byte Folded Spill @@ -2519,12 +2519,12 @@ srli s5, a0, 32 vsetivli zero, 4, e32, m1, ta, ma vmv.v.i v8, 0 + addi a0, sp, 192 + vs1r.v v8, (a0) # Unknown-size Folded Spill sd s6, 120(sp) # 8-byte Folded Spill sd s2, 112(sp) # 8-byte Folded Spill sd a5, 104(sp) # 8-byte Folded Spill sd a4, 96(sp) # 8-byte Folded Spill - addi a0, sp, 192 - vs1r.v v8, (a0) # Unknown-size Folded Spill j .LBB4_5 .LBB4_4: # %if.end111 # in Loop: Header=BB4_5 Depth=1 @@ -2735,7 +2735,7 @@ ld a0, 56(a1) sext.w s2, s8 li s6, -1 - slli s7, s6, 32 + slli s11, s6, 32 .LBB4_31: # %while.cond.i95 # Parent Loop BB4_5 Depth=1 # Parent Loop BB4_15 Depth=2 @@ -2743,22 +2743,22 @@ # => This Inner Loop Header: Depth=4 ld a1, 0(a0) addi s6, s6, 1 - add s7, s5, s7 - addi s7, s7, 1 + add s11, s5, s11 + addi s11, s11, 1 addi a0, a0, 8 bne a1, s4, .LBB4_31 # %bb.32: # %clause_LiteralGetIndex.exit100 # in Loop: Header=BB4_23 Depth=3 lw a0, 68(s10) lw a1, 72(s10) - addiw s11, s2, -1 - add a0, a0, s11 + addiw s7, s2, -1 + add a0, a0, s7 addw s4, a0, a1 blt s4, s2, .LBB4_39 # %bb.33: # %for.body53.preheader # in Loop: Header=BB4_23 Depth=3 - sd s11, 80(sp) # 8-byte Folded Spill - slli s11, s2, 3 + sd s7, 80(sp) # 8-byte Folded Spill + slli s7, s2, 3 j .LBB4_35 .LBB4_34: # %clause_GetLiteralAtom.exit # in Loop: Header=BB4_35 Depth=4 @@ -2768,7 +2768,7 @@ slt a2, s2, s4 addi s2, s2, 1 and a1, a1, a2 - addi s11, s11, 8 + addi s7, s7, 8 beqz a1, .LBB4_37 .LBB4_35: # %for.body53 # Parent Loop BB4_5 Depth=1 @@ -2776,7 +2776,7 @@ # Parent Loop BB4_23 Depth=3 # => This Inner Loop Header: Depth=4 ld a0, 56(s10) - add a0, a0, s11 + add a0, a0, s7 ld a0, 0(a0) ld a0, 24(a0) lw a1, 0(a0) @@ -2789,7 +2789,7 @@ j .LBB4_34 .LBB4_37: # %for.end # in Loop: Header=BB4_23 Depth=3 - ld s11, 80(sp) # 8-byte Folded Reload + ld s7, 80(sp) # 8-byte Folded Reload beqz a0, .LBB4_39 # %bb.38: # in Loop: Header=BB4_23 Depth=3 ld s6, 120(sp) # 8-byte Folded Reload @@ -2799,13 +2799,13 @@ j .LBB4_21 .LBB4_39: # %if.then59 # in Loop: Header=BB4_23 Depth=3 - srai s1, s7, 32 + srai s1, s11, 32 li a0, 16 call memory_Malloc@plt mv s4, a0 sd s1, 8(a0) sd zero, 0(a0) - bltz s11, .LBB4_47 + bltz s7, .LBB4_47 # %bb.40: # %for.body66.preheader # in Loop: Header=BB4_23 Depth=3 li s7, 0 @@ -2919,16 +2919,16 @@ .Lpcrel_hi78: auipc a0, %got_pcrel_hi(cont_LASTBINDING) ld a0, %pcrel_lo(.Lpcrel_hi78)(a0) - ld a2, 0(a0) - addi a1, sp, 192 - vl1r.v v8, (a1) # Unknown-size Folded Reload - beqz a2, .LBB4_55 + ld a1, 0(a0) + addi a2, sp, 192 + vl1r.v v8, (a2) # Unknown-size Folded Reload + beqz a1, .LBB4_55 # %bb.53: # %while.body.preheader.i # in Loop: Header=BB4_23 Depth=3 .Lpcrel_hi79: - auipc a1, %got_pcrel_hi(cont_BINDINGS) - ld a1, %pcrel_lo(.Lpcrel_hi79)(a1) - lw a3, 0(a1) + auipc a2, %got_pcrel_hi(cont_BINDINGS) + ld a2, %pcrel_lo(.Lpcrel_hi79)(a2) + lw a3, 0(a2) addi a3, a3, -1 vsetivli zero, 4, e32, m1, ta, ma .LBB4_54: # %while.body.i @@ -2939,18 +2939,18 @@ .Lpcrel_hi80: auipc a4, %got_pcrel_hi(cont_CURRENTBINDING) ld a4, %pcrel_lo(.Lpcrel_hi80)(a4) - sd a2, 0(a4) - ld a5, 24(a2) + sd a1, 0(a4) + ld a5, 24(a1) sd a5, 0(a0) - addi a5, a2, 4 - sw zero, 20(a2) + addi a5, a1, 4 + sw zero, 20(a1) vse32.v v8, (a5) ld a4, 0(a4) - ld a2, 0(a0) + ld a1, 0(a0) sd zero, 24(a4) - sw a3, 0(a1) + sw a3, 0(a2) addi a3, a3, -1 - bnez a2, .LBB4_54 + bnez a1, .LBB4_54 .LBB4_55: # %cont_Reset.exit # in Loop: Header=BB4_23 Depth=3 .Lpcrel_hi81: @@ -4279,12 +4279,12 @@ sd a0, 40(sp) # 8-byte Folded Spill mv s0, a0 mv s7, s8 + addi a0, sp, 256 + vl1r.v v8, (a0) # Unknown-size Folded Reload ld a7, 176(sp) # 8-byte Folded Reload ld t0, 184(sp) # 8-byte Folded Reload ld t1, 168(sp) # 8-byte Folded Reload ld t2, 160(sp) # 8-byte Folded Reload - addi a0, sp, 256 - vl1r.v v8, (a0) # Unknown-size Folded Reload j .LBB8_24 .LBB8_22: # in Loop: Header=BB8_24 Depth=2 mv a2, t2 @@ -4425,21 +4425,21 @@ # %bb.35: # in Loop: Header=BB8_28 Depth=3 mv s7, s8 mv s1, a0 + addi a0, sp, 256 + vl1r.v v8, (a0) # Unknown-size Folded Reload ld a7, 176(sp) # 8-byte Folded Reload ld t0, 184(sp) # 8-byte Folded Reload ld t1, 168(sp) # 8-byte Folded Reload ld t2, 160(sp) # 8-byte Folded Reload - addi a0, sp, 256 - vl1r.v v8, (a0) # Unknown-size Folded Reload bnez s8, .LBB8_28 j .LBB8_56 .LBB8_36: # %if.else74 # in Loop: Header=BB8_28 Depth=3 lw a0, 0(s4) - ld t0, 184(sp) # 8-byte Folded Reload - li a5, 1 addi a1, sp, 256 vl1r.v v8, (a1) # Unknown-size Folded Reload + ld t0, 184(sp) # 8-byte Folded Reload + li a5, 1 blez a0, .LBB8_39 # %bb.37: # %while.body.i.preheader # in Loop: Header=BB8_28 Depth=3 @@ -5396,11 +5396,11 @@ sd s6, 8(a0) sd s2, 0(a0) ld s1, 144(sp) # 8-byte Folded Reload + addi a0, sp, 256 + vl1r.v v8, (a0) # Unknown-size Folded Reload ld t0, 184(sp) # 8-byte Folded Reload ld t2, 160(sp) # 8-byte Folded Reload li s2, 1 - addi a0, sp, 256 - vl1r.v v8, (a0) # Unknown-size Folded Reload ld a6, 128(sp) # 8-byte Folded Reload lw a2, 0(t0) bne a2, t2, .LBB8_148 @@ -5854,8 +5854,6 @@ bnez a0, .LBB9_4 .LBB9_14: # %if.then # in Loop: Header=BB9_5 Depth=1 - addi a0, sp, 176 - vs1r.v v8, (a0) # Unknown-size Folded Spill sd t3, 16(sp) # 8-byte Folded Spill sd a5, 24(sp) # 8-byte Folded Spill sd a7, 32(sp) # 8-byte Folded Spill @@ -5863,6 +5861,8 @@ sd a4, 112(sp) # 8-byte Folded Spill sd t1, 56(sp) # 8-byte Folded Spill sd t0, 64(sp) # 8-byte Folded Spill + addi a0, sp, 176 + vs1r.v v8, (a0) # Unknown-size Folded Spill sd zero, 152(sp) sd zero, 160(sp) addi a2, sp, 152 @@ -6155,9 +6155,9 @@ beqz a0, .LBB9_58 # %bb.53: # %if.end.i # in Loop: Header=BB9_26 Depth=2 - ld a3, 112(sp) # 8-byte Folded Reload addi a1, sp, 176 vl1r.v v8, (a1) # Unknown-size Folded Reload + ld a3, 112(sp) # 8-byte Folded Reload ld a6, 120(sp) # 8-byte Folded Reload beqz a3, .LBB9_57 # %bb.54: # %for.cond.i.preheader @@ -6287,6 +6287,8 @@ bnez a5, .LBB9_66 # %bb.67: # %list_Delete.exit112 # in Loop: Header=BB9_5 Depth=1 + addi a0, sp, 176 + vl1r.v v8, (a0) # Unknown-size Folded Reload ld t0, 64(sp) # 8-byte Folded Reload ld t1, 56(sp) # 8-byte Folded Reload ld a1, 48(sp) # 8-byte Folded Reload @@ -6296,8 +6298,6 @@ ld a5, 24(sp) # 8-byte Folded Reload li t2, 2 ld t3, 16(sp) # 8-byte Folded Reload - addi a0, sp, 176 - vl1r.v v8, (a0) # Unknown-size Folded Reload j .LBB9_4 .Lfunc_end9: .size inf_BackwardWeakening, .Lfunc_end9-inf_BackwardWeakening @@ -7131,14 +7131,14 @@ bnez a0, .LBB12_4 .LBB12_14: # %if.then # in Loop: Header=BB12_5 Depth=1 - addi a0, sp, 176 - vs1r.v v8, (a0) # Unknown-size Folded Spill sd t2, 16(sp) # 8-byte Folded Spill sd a5, 24(sp) # 8-byte Folded Spill sd a6, 32(sp) # 8-byte Folded Spill sd a4, 40(sp) # 8-byte Folded Spill sd t1, 56(sp) # 8-byte Folded Spill sd t0, 64(sp) # 8-byte Folded Spill + addi a0, sp, 176 + vs1r.v v8, (a0) # Unknown-size Folded Spill sd zero, 152(sp) sd zero, 160(sp) addi a2, sp, 152 @@ -7621,6 +7621,8 @@ bnez a5, .LBB12_74 # %bb.75: # %list_Delete.exit139 # in Loop: Header=BB12_5 Depth=1 + addi a0, sp, 176 + vl1r.v v8, (a0) # Unknown-size Folded Reload ld t0, 64(sp) # 8-byte Folded Reload ld t1, 56(sp) # 8-byte Folded Reload ld a1, 48(sp) # 8-byte Folded Reload @@ -7629,8 +7631,6 @@ ld a5, 24(sp) # 8-byte Folded Reload li a7, 2 ld t2, 16(sp) # 8-byte Folded Reload - addi a0, sp, 176 - vl1r.v v8, (a0) # Unknown-size Folded Reload j .LBB12_4 .Lfunc_end12: .size inf_BackwardEmptySortPlusPlus, .Lfunc_end12-inf_BackwardEmptySortPlusPlus --- build.head//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/Common/Wildcard.s 2023-11-13 08:03:21.255590544 +0000 +++ build//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/Common/Wildcard.s 2023-11-13 08:03:16.287734147 +0000 @@ -3268,13 +3268,13 @@ srli a1, a1, 30 neg a0, a0 or a0, a0, a1 - mv s0, a2 addi a1, sp, 80 vs1r.v v8, (a1) # Unknown-size Folded Spill + mv s0, a2 call _Znam@plt + mv a2, s0 addi a1, sp, 80 vl1r.v v8, (a1) # Unknown-size Folded Reload - mv a2, s0 mv s0, a0 sd a0, 16(sp) sw zero, 0(a0) @@ -3536,9 +3536,9 @@ # in Loop: Header=BB28_4 Depth=1 sd s1, 16(sp) vsetivli zero, 2, e64, m1, ta, ma + addi a0, sp, 144 + vl1r.v v8, (a0) # Unknown-size Folded Reload addi a0, sp, 24 - addi a1, sp, 144 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) lw s4, 16(s3) addiw s6, s4, 1 @@ -3573,9 +3573,9 @@ # in Loop: Header=BB28_4 Depth=1 sw s4, 32(sp) vsetivli zero, 2, e64, m1, ta, ma + addi a0, sp, 144 + vl1r.v v8, (a0) # Unknown-size Folded Reload addi a0, sp, 48 - addi a1, sp, 144 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) sd s11, 64(sp) .Lpcrel_hi22: --- build.head//MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/condensing.s 2023-11-13 08:03:22.359558632 +0000 +++ build//MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/condensing.s 2023-11-13 08:03:17.403701887 +0000 @@ -126,9 +126,9 @@ vsetivli zero, 4, e32, m1, ta, ma vmv.v.i v8, 0 li s10, 1 - sd s0, 24(sp) # 8-byte Folded Spill addi a1, sp, 64 vs1r.v v8, (a1) # Unknown-size Folded Spill + sd s0, 24(sp) # 8-byte Folded Spill j .LBB0_9 .LBB0_8: # %for.cond4.loopexit # in Loop: Header=BB0_9 Depth=1 --- build.head//MultiSource/Benchmarks/PAQ8p/CMakeFiles/paq8p.dir/paq8p.s 2023-11-13 08:03:22.671549614 +0000 +++ build//MultiSource/Benchmarks/PAQ8p/CMakeFiles/paq8p.dir/paq8p.s 2023-11-13 08:03:17.703693216 +0000 @@ -2525,9 +2525,9 @@ # %bb.27: # %for.body.lr.ph.i # in Loop: Header=BB24_24 Depth=1 sd a0, 24(s9) + addi a1, sp, 80 + vl2r.v v8, (a1) # Unknown-size Folded Reload li a1, 64 - addi a2, sp, 80 - vl2r.v v8, (a2) # Unknown-size Folded Reload bgeu a1, s4, .LBB24_29 # %bb.28: # in Loop: Header=BB24_24 Depth=1 li a2, 0 @@ -18850,9 +18850,9 @@ .LBB59_24: # %vector.ph130 # in Loop: Header=BB59_12 Depth=2 mv a0, t0 - mv t0, s2 - mv s2, a7 - mv a7, t5 + mv t0, a7 + mv a7, s2 + mv s2, t5 mv t5, s10 mv s10, s11 mv s11, s9 @@ -18891,9 +18891,9 @@ mv s9, s11 mv s11, s10 mv s10, t5 - mv t5, a7 - mv a7, s2 - mv s2, t0 + mv t5, s2 + mv s2, a7 + mv a7, t0 mv t0, a0 ld a0, 24(sp) # 8-byte Folded Reload beq s1, t2, .LBB59_11 @@ -19621,13 +19621,13 @@ sd s10, 192(sp) # 8-byte Folded Spill add a0, a1, a0 sw a0, %pcrel_lo(.Lpcrel_hi936)(s0) - sd s9, 152(sp) # 8-byte Folded Spill - sd t6, 144(sp) # 8-byte Folded Spill - sd ra, 136(sp) # 8-byte Folded Spill lui a0, 14 addiw a0, a0, 512 add a0, sp, a0 vs2r.v v10, (a0) # Unknown-size Folded Spill + sd s9, 152(sp) # 8-byte Folded Spill + sd t6, 144(sp) # 8-byte Folded Spill + sd ra, 136(sp) # 8-byte Folded Spill beqz s6, .LBB61_49 # %bb.28: # %for.cond117.preheader.lr.ph # in Loop: Header=BB61_18 Depth=1 @@ -19666,13 +19666,13 @@ lui a2, 5 addiw a2, a2, -1048 add a2, sp, a2 - lui a3, 5 - addiw a3, a3, -264 - add t5, sp, a3 lui a3, 14 addiw a3, a3, 512 add a3, sp, a3 vl2r.v v10, (a3) # Unknown-size Folded Reload + lui a3, 5 + addiw a3, a3, -264 + add t5, sp, a3 j .LBB61_31 .LBB61_30: # %for.cond117.for.end131_crit_edge # in Loop: Header=BB61_31 Depth=2 @@ -19866,6 +19866,10 @@ sb s6, %pcrel_lo(.Lpcrel_hi956)(a0) .LBB61_52: # %for.inc152 # in Loop: Header=BB61_18 Depth=1 + lui a0, 14 + addiw a0, a0, 512 + add a0, sp, a0 + vl2r.v v10, (a0) # Unknown-size Folded Reload ld s6, 208(sp) # 8-byte Folded Reload mv t5, s9 ld a7, 160(sp) # 8-byte Folded Reload @@ -19876,10 +19880,6 @@ ld t6, 144(sp) # 8-byte Folded Reload ld ra, 136(sp) # 8-byte Folded Reload li t3, 1 - lui a0, 14 - addiw a0, a0, 512 - add a0, sp, a0 - vl2r.v v10, (a0) # Unknown-size Folded Reload j .LBB61_17 .LBB61_53: # %if.end155.loopexit lw a2, %pcrel_lo(.Lpcrel_hi934)(s6) --- build.head//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/UI/Common/LoadCodecs.s 2023-11-13 08:03:21.247590775 +0000 +++ build//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/UI/Common/LoadCodecs.s 2023-11-13 08:03:16.279734378 +0000 @@ -1205,18 +1205,18 @@ ld s1, 0(a0) sb zero, 48(sp) vsetivli zero, 2, e64, m1, ta, ma + addi a0, sp, 160 + vl1r.v v8, (a0) # Unknown-size Folded Reload addi a0, sp, 56 - addi a1, sp, 160 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) vse64.v v8, (s9) li a0, 16 call _Znam@plt sd a0, 72(sp) vsetivli zero, 2, e64, m1, ta, ma + addi a1, sp, 160 + vl1r.v v8, (a1) # Unknown-size Folded Reload addi a1, sp, 96 - addi a2, sp, 160 - vl1r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a1) li a1, 8 sd a1, 112(sp) --- build.head//MultiSource/Applications/kimwitu++/CMakeFiles/kc.dir/k.s 2023-11-13 08:03:22.287560714 +0000 +++ build//MultiSource/Applications/kimwitu++/CMakeFiles/kc.dir/k.s 2023-11-13 08:03:17.339703737 +0000 @@ -27946,17 +27946,17 @@ slli a2, a2, 1 sub sp, sp, a2 .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x30, 0x22, 0x11, 0x02, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 48 + 2 * vlenb - mv s0, a1 - mv s1, a0 + mv s1, a1 + mv s2, a0 li a0, 56 call _Znwm@plt - mv s2, a0 + mv s0, a0 .Lpcrel_hi1360: auipc a0, %pcrel_hi(_ZTVN2kc28impl_alternative_AlternativeE+16) addi a0, a0, %pcrel_lo(.Lpcrel_hi1360) - sd a0, 0(s2) - sd s1, 40(s2) - sd s0, 48(s2) + sd a0, 0(s0) + sd s2, 40(s0) + sd s1, 48(s0) li a0, 24 call _Znwm@plt .Lpcrel_hi1361: @@ -27969,7 +27969,7 @@ addi a2, sp, 16 vs1r.v v8, (a2) # Unknown-size Folded Spill vse64.v v8, (a1) - sd a0, 8(s2) + sd a0, 8(s0) li a0, 24 call _Znwm@plt .Lpcrel_hi1362: @@ -27981,7 +27981,7 @@ addi a2, sp, 16 vl1r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a1) - sd a0, 16(s2) + sd a0, 16(s0) li a0, 24 call _Znwm@plt .Lpcrel_hi1363: @@ -27993,7 +27993,7 @@ addi a2, sp, 16 vl1r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a1) - sd a0, 24(s2) + sd a0, 24(s0) li a0, 24 call _Znwm@plt .Lpcrel_hi1364: @@ -28005,8 +28005,8 @@ addi a2, sp, 16 vl1r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a1) - sd a0, 32(s2) - mv a0, s2 + sd a0, 32(s0) + mv a0, s0 csrr a1, vlenb slli a1, a1, 1 add sp, sp, a1 --- build.head//MicroBenchmarks/LCALS/SubsetBRawLoops/CMakeFiles/lcalsBRaw.dir/__/LCALSSuite.s 2023-11-13 08:03:20.907600603 +0000 +++ build//MicroBenchmarks/LCALS/SubsetBRawLoops/CMakeFiles/lcalsBRaw.dir/__/LCALSSuite.s 2023-11-13 08:03:15.943744090 +0000 @@ -42765,9 +42765,9 @@ mul s0, a3, a4 sd zero, 32(s1) vmv.v.i v8, 0 - sd a6, 32(sp) # 8-byte Folded Spill addi a3, sp, 48 vs1r.v v8, (a3) # Unknown-size Folded Spill + sd a6, 32(sp) # 8-byte Folded Spill vse64.v v8, (a6) beq a1, a2, .LBB27_3 # %bb.1: # %cond.true.i.i.i.i @@ -42801,9 +42801,9 @@ sub s4, a1, a2 sd zero, 56(s1) vsetivli zero, 2, e64, m1, ta, ma - sd a0, 24(sp) # 8-byte Folded Spill addi a3, sp, 48 vl1r.v v8, (a3) # Unknown-size Folded Reload + sd a0, 24(sp) # 8-byte Folded Spill vse64.v v8, (a0) beq a1, a2, .LBB27_9 # %bb.6: # %cond.true.i.i.i.i27 --- build.head//MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_nsis_infblock.s 2023-11-13 08:03:22.199563257 +0000 +++ build//MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_nsis_infblock.s 2023-11-13 08:03:17.255706166 +0000 @@ -111,13 +111,13 @@ li t1, 280 li t2, -144 li t3, 112 - sd a7, 88(sp) # 8-byte Folded Spill csrr a0, vlenb slli a1, a0, 3 add a0, a1, a0 add a0, sp, a0 addi a0, a0, 144 vs2r.v v20, (a0) # Unknown-size Folded Spill + sd a7, 88(sp) # 8-byte Folded Spill .LBB0_4: # %for.cond # =>This Loop Header: Depth=1 # Child Loop BB0_48 Depth 2 @@ -237,6 +237,12 @@ sd a0, 24(s0) beq s2, a1, .LBB0_58 # %bb.20: # in Loop: Header=BB0_4 Depth=1 + csrr a0, vlenb + slli a2, a0, 3 + add a0, a2, a0 + add a0, sp, a0 + addi a0, a0, 144 + vl2r.v v20, (a0) # Unknown-size Folded Reload ld a7, 88(sp) # 8-byte Folded Reload li s1, 8 j .LBB0_67 @@ -303,14 +309,14 @@ lw a1, 52(s0) srli a0, a0, 10 addi a6, a0, 4 + csrr a0, vlenb + slli a2, a0, 3 + sub a0, a2, a0 + add a0, sp, a0 + addi a0, a0, 144 + vl2r.v v10, (a0) # Unknown-size Folded Reload ld a0, 80(sp) # 8-byte Folded Reload li a7, 2 - csrr a2, vlenb - slli a3, a2, 3 - sub a2, a3, a2 - add a2, sp, a2 - addi a2, a2, 144 - vl2r.v v10, (a2) # Unknown-size Folded Reload li t0, 18 bltu a1, a6, .LBB0_119 # %bb.32: # %while.cond449.preheader @@ -402,13 +408,13 @@ # %bb.47: # %while.body328.preheader # in Loop: Header=BB0_4 Depth=1 mv a1, s5 - li a7, 2 csrr a0, vlenb slli a2, a0, 3 sub a0, a2, a0 add a0, sp, a0 addi a0, a0, 144 vl2r.v v10, (a0) # Unknown-size Folded Reload + li a7, 2 li t0, 18 .LBB0_48: # %while.body328 # Parent Loop BB0_4 Depth=1 @@ -521,16 +527,16 @@ bltu s6, s6, .LBB0_61 j .LBB0_60 .LBB0_66: # in Loop: Header=BB0_4 Depth=1 - ld a7, 88(sp) # 8-byte Folded Reload -.LBB0_67: # %inflate_flush.exit1409 - # in Loop: Header=BB0_4 Depth=1 - li t0, 256 csrr a0, vlenb slli a2, a0, 3 add a0, a2, a0 add a0, sp, a0 addi a0, a0, 144 vl2r.v v20, (a0) # Unknown-size Folded Reload + ld a7, 88(sp) # 8-byte Folded Reload +.LBB0_67: # %inflate_flush.exit1409 + # in Loop: Header=BB0_4 Depth=1 + li t0, 256 li t1, 280 li t2, -144 li t3, 112 @@ -776,14 +782,14 @@ mv a2, a3 j .LBB0_92 .LBB0_100: # in Loop: Header=BB0_82 Depth=2 - ld a7, 88(sp) # 8-byte Folded Reload - li t0, 256 csrr a2, vlenb slli a3, a2, 3 add a2, a3, a2 add a2, sp, a2 addi a2, a2, 144 vl2r.v v20, (a2) # Unknown-size Folded Reload + ld a7, 88(sp) # 8-byte Folded Reload + li t0, 256 li t1, 280 li t2, -144 li t3, 112 @@ -867,13 +873,13 @@ j .LBB0_4 .LBB0_116: # in Loop: Header=BB0_4 Depth=1 mv a2, s7 - li a7, 2 csrr a0, vlenb slli a1, a0, 3 sub a0, a1, a0 add a0, sp, a0 addi a0, a0, 144 vl2r.v v10, (a0) # Unknown-size Folded Reload + li a7, 2 li t0, 18 .LBB0_117: # %while.end355 # in Loop: Header=BB0_4 Depth=1 @@ -1033,14 +1039,14 @@ # in Loop: Header=BB0_4 Depth=1 li a0, 17 sw a0, 40(s0) - ld a7, 88(sp) # 8-byte Folded Reload - li t0, 256 csrr a0, vlenb slli a1, a0, 3 add a0, a1, a0 add a0, sp, a0 addi a0, a0, 144 vl2r.v v20, (a0) # Unknown-size Folded Reload + ld a7, 88(sp) # 8-byte Folded Reload + li t0, 256 li t1, 280 li t2, -144 li t3, 112 @@ -1363,14 +1369,14 @@ sb s1, 72(s0) sd a0, 80(s0) sd a2, 88(s0) - ld a7, 88(sp) # 8-byte Folded Reload - li t0, 256 csrr a1, vlenb slli a2, a1, 3 add a1, a2, a1 add a1, sp, a1 addi a1, a1, 144 vl2r.v v20, (a1) # Unknown-size Folded Reload + ld a7, 88(sp) # 8-byte Folded Reload + li t0, 256 li t1, 280 li t2, -144 li t3, 112 @@ -1573,14 +1579,14 @@ li t3, 112 li t2, -144 li t1, 280 + li t0, 256 + ld a7, 88(sp) # 8-byte Folded Reload csrr a0, vlenb slli a1, a0, 3 add a0, a1, a0 add a0, sp, a0 addi a0, a0, 144 vl2r.v v20, (a0) # Unknown-size Folded Reload - li t0, 256 - ld a7, 88(sp) # 8-byte Folded Reload lbu a0, %pcrel_lo(.Lpcrel_hi1)(s1) addi a0, a0, 1 sb a0, %pcrel_lo(.Lpcrel_hi1)(s1) @@ -1672,14 +1678,14 @@ subw s3, s3, s1 subw a1, a0, s1 sw a1, 48(s0) - ld a7, 88(sp) # 8-byte Folded Reload - li t0, 256 csrr a1, vlenb slli a2, a1, 3 add a1, a2, a1 add a1, sp, a1 addi a1, a1, 144 vl2r.v v20, (a1) # Unknown-size Folded Reload + ld a7, 88(sp) # 8-byte Folded Reload + li t0, 256 li t1, 280 li t2, -144 li t3, 112 @@ -1789,14 +1795,14 @@ mv a2, a3 j .LBB0_219 .LBB0_227: # in Loop: Header=BB0_4 Depth=1 - ld a7, 88(sp) # 8-byte Folded Reload - li t0, 256 csrr a0, vlenb slli a2, a0, 3 add a0, a2, a0 add a0, sp, a0 addi a0, a0, 144 vl2r.v v20, (a0) # Unknown-size Folded Reload + ld a7, 88(sp) # 8-byte Folded Reload + li t0, 256 li t1, 280 li t2, -144 li t3, 112 --- build.head//MicroBenchmarks/LCALS/SubsetARawLoops/CMakeFiles/lcalsARaw.dir/__/LCALSStats.s 2023-11-13 08:03:20.887601182 +0000 +++ build//MicroBenchmarks/LCALS/SubsetARawLoops/CMakeFiles/lcalsARaw.dir/__/LCALSStats.s 2023-11-13 08:03:15.923744668 +0000 @@ -1502,7 +1502,7 @@ sd a0, 80(sp) # 8-byte Folded Spill vslidedown.vi v8, v8, 1 vmv.x.s a0, v8 - sd a0, 48(sp) # 8-byte Folded Spill + sd a0, 64(sp) # 8-byte Folded Spill vsetivli zero, 2, e64, m2, ta, ma csrr a0, vlenb slli a0, a0, 2 @@ -1564,9 +1564,9 @@ vmv.x.s s11, v8 vsetivli zero, 1, e64, m1, ta, ma ld a0, 368(sp) - sd a0, 64(sp) # 8-byte Folded Spill - ld a0, 376(sp) sd a0, 56(sp) # 8-byte Folded Spill + ld a0, 376(sp) + sd a0, 48(sp) # 8-byte Folded Spill ld s9, 352(sp) ld s10, 360(sp) vslidedown.vi v8, v8, 1 @@ -1574,7 +1574,7 @@ mv a0, s4 mv a1, s3 ld a2, 72(sp) # 8-byte Folded Reload - ld a3, 48(sp) # 8-byte Folded Reload + ld a3, 64(sp) # 8-byte Folded Reload call __addtf3@plt ld a2, 104(sp) # 8-byte Folded Reload ld a3, 96(sp) # 8-byte Folded Reload @@ -1594,8 +1594,8 @@ mv a2, s9 mv a3, s10 call __addtf3@plt - ld a2, 64(sp) # 8-byte Folded Reload - ld a3, 56(sp) # 8-byte Folded Reload + ld a2, 56(sp) # 8-byte Folded Reload + ld a3, 48(sp) # 8-byte Folded Reload call __addtf3@plt mv s4, a0 mv s3, a1 --- build.head//MicroBenchmarks/LCALS/SubsetCRawLoops/CMakeFiles/lcalsCRaw.dir/__/LCALSSuite.s 2023-11-13 08:03:20.919600257 +0000 +++ build//MicroBenchmarks/LCALS/SubsetCRawLoops/CMakeFiles/lcalsCRaw.dir/__/LCALSSuite.s 2023-11-13 08:03:15.955743743 +0000 @@ -42765,9 +42765,9 @@ mul s0, a3, a4 sd zero, 32(s1) vmv.v.i v8, 0 - sd a6, 32(sp) # 8-byte Folded Spill addi a3, sp, 48 vs1r.v v8, (a3) # Unknown-size Folded Spill + sd a6, 32(sp) # 8-byte Folded Spill vse64.v v8, (a6) beq a1, a2, .LBB27_3 # %bb.1: # %cond.true.i.i.i.i @@ -42801,9 +42801,9 @@ sub s4, a1, a2 sd zero, 56(s1) vsetivli zero, 2, e64, m1, ta, ma - sd a0, 24(sp) # 8-byte Folded Spill addi a3, sp, 48 vl1r.v v8, (a3) # Unknown-size Folded Reload + sd a0, 24(sp) # 8-byte Folded Spill vse64.v v8, (a0) beq a1, a2, .LBB27_9 # %bb.6: # %cond.true.i.i.i.i27 --- build.head//MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/foldfg.s 2023-11-13 08:03:22.367558401 +0000 +++ build//MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/foldfg.s 2023-11-13 08:03:17.411701657 +0000 @@ -3892,21 +3892,21 @@ bnez a0, .LBB31_16 # %bb.2: # %if.then.i # in Loop: Header=BB31_1 Depth=1 - addi a0, sp, 80 - vs1r.v v8, (a0) # Unknown-size Folded Spill - sd a5, 56(sp) # 8-byte Folded Spill + sd a5, 48(sp) # 8-byte Folded Spill mv a1, s0 - sd a4, 48(sp) # 8-byte Folded Spill + sd a4, 56(sp) # 8-byte Folded Spill mv s0, a3 + addi a0, sp, 80 + vs1r.v v8, (a0) # Unknown-size Folded Spill lw a0, 0(a6) lw a3, 0(s10) addi a2, a0, 1 sd a6, 40(sp) # 8-byte Folded Spill sw a2, 0(a6) slli a2, a0, 2 - mv s11, t0 + mv s5, t0 ld a0, 0(t0) - mv s5, a7 + mv s11, a7 add a2, a7, a2 sw a3, 0(a2) sw zero, 0(s10) @@ -3920,18 +3920,18 @@ call memory_Malloc@plt mv a5, a0 sd s3, 8(a0) - ld a1, 56(sp) # 8-byte Folded Reload + ld a1, 48(sp) # 8-byte Folded Reload sd a1, 0(a0) + addi a0, sp, 80 + vl1r.v v8, (a0) # Unknown-size Folded Reload mv a3, s0 - ld a4, 48(sp) # 8-byte Folded Reload + ld a4, 56(sp) # 8-byte Folded Reload ld s0, 64(sp) # 8-byte Folded Reload .LBB31_4: # %if.end21.i # in Loop: Header=BB31_1 Depth=1 ld a6, 40(sp) # 8-byte Folded Reload - mv a7, s5 - mv t0, s11 - addi a0, sp, 80 - vl1r.v v8, (a0) # Unknown-size Folded Reload + mv a7, s11 + mv t0, s5 lw a0, 0(s10) bgtz a0, .LBB31_12 j .LBB31_14 @@ -3947,10 +3947,12 @@ li a2, 2 bne a1, a2, .LBB31_8 # %bb.7: # in Loop: Header=BB31_1 Depth=1 + addi a0, sp, 80 + vl1r.v v8, (a0) # Unknown-size Folded Reload mv a3, s0 - ld a4, 48(sp) # 8-byte Folded Reload + ld a4, 56(sp) # 8-byte Folded Reload ld s0, 64(sp) # 8-byte Folded Reload - ld a5, 56(sp) # 8-byte Folded Reload + ld a5, 48(sp) # 8-byte Folded Reload j .LBB31_4 .LBB31_8: # %if.then11.i # in Loop: Header=BB31_1 Depth=1 @@ -3964,14 +3966,14 @@ ld a0, 16(s3) snez a2, a2 and a1, a1, a2 - mv a3, s0 - ld a4, 48(sp) # 8-byte Folded Reload - ld a5, 56(sp) # 8-byte Folded Reload - ld a6, 40(sp) # 8-byte Folded Reload - mv a7, s5 - mv t0, s11 addi a2, sp, 80 vl1r.v v8, (a2) # Unknown-size Folded Reload + mv a3, s0 + ld a4, 56(sp) # 8-byte Folded Reload + ld a5, 48(sp) # 8-byte Folded Reload + ld a6, 40(sp) # 8-byte Folded Reload + mv a7, s11 + mv t0, s5 beqz a1, .LBB31_10 # %bb.9: # %if.else18.i # in Loop: Header=BB31_1 Depth=1 @@ -4192,15 +4194,15 @@ sd a1, 0(a0) j .LBB32_21 .LBB32_7: # %if.then4.i + sd a7, 24(sp) # 8-byte Folded Spill + sd a6, 40(sp) # 8-byte Folded Spill addi a0, sp, 64 vs1r.v v8, (a0) # Unknown-size Folded Spill - mv a2, s0 - mv s0, a7 - sd a6, 32(sp) # 8-byte Folded Spill lw a0, 0(t1) lw a1, 0(s11) addi a3, a0, 1 - sd t1, 24(sp) # 8-byte Folded Spill + mv a2, s0 + mv s0, t1 sw a3, 0(t1) slli a3, a0, 2 sd t3, 16(sp) # 8-byte Folded Spill @@ -4210,7 +4212,7 @@ sw a1, 0(a3) sw zero, 0(s11) mv a1, s3 - sd a2, 40(sp) # 8-byte Folded Spill + sd a2, 32(sp) # 8-byte Folded Spill call unify_MatchFlexible@plt beqz a0, .LBB32_10 # %bb.8: # %if.then7.i @@ -4218,17 +4220,17 @@ call memory_Malloc@plt mv a6, a0 sd s3, 8(a0) - ld a1, 32(sp) # 8-byte Folded Reload + ld a1, 40(sp) # 8-byte Folded Reload sd a1, 0(a0) - mv a7, s0 - ld s0, 40(sp) # 8-byte Folded Reload + addi a0, sp, 64 + vl1r.v v8, (a0) # Unknown-size Folded Reload + ld a7, 24(sp) # 8-byte Folded Reload li t0, 2 .LBB32_9: # %if.end22.i - ld t1, 24(sp) # 8-byte Folded Reload + mv t1, s0 + ld s0, 32(sp) # 8-byte Folded Reload mv t2, s10 ld t3, 16(sp) # 8-byte Folded Reload - addi a0, sp, 64 - vl1r.v v8, (a0) # Unknown-size Folded Reload lw a0, 0(s11) bgtz a0, .LBB32_17 j .LBB32_19 @@ -4241,26 +4243,27 @@ and a1, s6, a1 bne a1, t0, .LBB32_13 # %bb.12: - ld a6, 32(sp) # 8-byte Folded Reload - mv a7, s0 - ld s0, 40(sp) # 8-byte Folded Reload + addi a0, sp, 64 + vl1r.v v8, (a0) # Unknown-size Folded Reload + ld a6, 40(sp) # 8-byte Folded Reload + ld a7, 24(sp) # 8-byte Folded Reload j .LBB32_9 .LBB32_13: # %if.then12.i lw a1, %pcrel_lo(.Lpcrel_hi230)(s2) - mv a7, s0 - lw a2, %pcrel_lo(.Lpcrel_hi231)(s0) + ld a7, 24(sp) # 8-byte Folded Reload + lw a2, %pcrel_lo(.Lpcrel_hi231)(a7) xor a1, a1, a0 snez a1, a1 xor a2, a2, a0 ld a0, 16(s3) snez a2, a2 and a1, a1, a2 - ld a6, 32(sp) # 8-byte Folded Reload - ld t1, 24(sp) # 8-byte Folded Reload - mv t2, s10 - ld t3, 16(sp) # 8-byte Folded Reload addi a2, sp, 64 vl1r.v v8, (a2) # Unknown-size Folded Reload + ld a6, 40(sp) # 8-byte Folded Reload + mv t1, s0 + mv t2, s10 + ld t3, 16(sp) # 8-byte Folded Reload beqz a1, .LBB32_15 # %bb.14: # %if.else19.i lwu a1, 0(s4) @@ -4274,7 +4277,7 @@ slli a1, a1, 3 add a1, s7, a1 sd a0, 0(a1) - ld s0, 40(sp) # 8-byte Folded Reload + ld s0, 32(sp) # 8-byte Folded Reload lw a0, 0(s11) blez a0, .LBB32_19 .LBB32_17: # %while.body.i.i.preheader --- build.head//SingleSource/Benchmarks/Stanford/CMakeFiles/Puzzle.dir/Puzzle.s 2023-11-13 08:03:22.899543023 +0000 +++ build//SingleSource/Benchmarks/Stanford/CMakeFiles/Puzzle.dir/Puzzle.s 2023-11-13 08:03:17.967685585 +0000 @@ -392,10 +392,10 @@ addi a0, a0, 80 vs2r.v v8, (a0) # Unknown-size Folded Spill vmv.v.i v10, 1 - sd a7, 56(sp) # 8-byte Folded Spill - sd t0, 48(sp) # 8-byte Folded Spill addi a0, sp, 80 vs2r.v v10, (a0) # Unknown-size Folded Spill + sd a7, 56(sp) # 8-byte Folded Spill + sd t0, 48(sp) # 8-byte Folded Spill j .LBB5_3 .LBB5_1: # %Remove.exit # in Loop: Header=BB5_3 Depth=1 @@ -525,14 +525,14 @@ # %bb.20: # %if.else # in Loop: Header=BB5_3 Depth=1 lw a0, 0(s6) - ld a7, 56(sp) # 8-byte Folded Reload - ld t0, 48(sp) # 8-byte Folded Reload - li t1, 13 csrr a1, vlenb slli a1, a1, 1 add a1, sp, a1 addi a1, a1, 80 vl2r.v v10, (a1) # Unknown-size Folded Reload + ld a7, 56(sp) # 8-byte Folded Reload + ld t0, 48(sp) # 8-byte Folded Reload + li t1, 13 bltz a0, .LBB5_1 # %bb.21: # %for.body.preheader.i25 # in Loop: Header=BB5_3 Depth=1 --- build.head//MicroBenchmarks/LCALS/SubsetBLambdaLoops/CMakeFiles/lcalsBLambda.dir/__/LCALSStats.s 2023-11-13 08:03:20.895600950 +0000 +++ build//MicroBenchmarks/LCALS/SubsetBLambdaLoops/CMakeFiles/lcalsBLambda.dir/__/LCALSStats.s 2023-11-13 08:03:15.931744437 +0000 @@ -1502,7 +1502,7 @@ sd a0, 80(sp) # 8-byte Folded Spill vslidedown.vi v8, v8, 1 vmv.x.s a0, v8 - sd a0, 48(sp) # 8-byte Folded Spill + sd a0, 64(sp) # 8-byte Folded Spill vsetivli zero, 2, e64, m2, ta, ma csrr a0, vlenb slli a0, a0, 2 @@ -1564,9 +1564,9 @@ vmv.x.s s11, v8 vsetivli zero, 1, e64, m1, ta, ma ld a0, 368(sp) - sd a0, 64(sp) # 8-byte Folded Spill - ld a0, 376(sp) sd a0, 56(sp) # 8-byte Folded Spill + ld a0, 376(sp) + sd a0, 48(sp) # 8-byte Folded Spill ld s9, 352(sp) ld s10, 360(sp) vslidedown.vi v8, v8, 1 @@ -1574,7 +1574,7 @@ mv a0, s4 mv a1, s3 ld a2, 72(sp) # 8-byte Folded Reload - ld a3, 48(sp) # 8-byte Folded Reload + ld a3, 64(sp) # 8-byte Folded Reload call __addtf3@plt ld a2, 104(sp) # 8-byte Folded Reload ld a3, 96(sp) # 8-byte Folded Reload @@ -1594,8 +1594,8 @@ mv a2, s9 mv a3, s10 call __addtf3@plt - ld a2, 64(sp) # 8-byte Folded Reload - ld a3, 56(sp) # 8-byte Folded Reload + ld a2, 56(sp) # 8-byte Folded Reload + ld a3, 48(sp) # 8-byte Folded Reload call __addtf3@plt mv s4, a0 mv s3, a1 --- build.head//MultiSource/Benchmarks/nbench/CMakeFiles/nbench.dir/nbench1.s 2023-11-13 08:03:22.663549845 +0000 +++ build//MultiSource/Benchmarks/nbench/CMakeFiles/nbench.dir/nbench1.s 2023-11-13 08:03:17.699693332 +0000 @@ -2759,8 +2759,6 @@ vsetvli a0, zero, e16, m2, ta, ma vmv.v.i v18, 0 vmv.v.i v20, 1 - sd t4, 72(sp) # 8-byte Folded Spill - sd a6, 32(sp) # 8-byte Folded Spill csrr a0, vlenb slli a2, a0, 3 sub a0, a2, a0 @@ -2795,6 +2793,8 @@ addiw a0, a0, 416 add a0, sp, a0 vs2r.v v20, (a0) # Unknown-size Folded Spill + sd t4, 72(sp) # 8-byte Folded Spill + sd a6, 32(sp) # 8-byte Folded Spill j .LBB10_19 .LBB10_18: # %Assignment.exit # in Loop: Header=BB10_19 Depth=1 @@ -3080,13 +3080,6 @@ li t0, -1 li a0, 0 addi a1, sp, 82 - ld a7, 56(sp) # 8-byte Folded Reload - lui a2, 5 - addiw a2, a2, 206 - add t2, sp, a2 - lui a2, 5 - addiw a2, a2, 4 - add t3, sp, a2 csrr a2, vlenb slli a3, a2, 2 add a2, a3, a2 @@ -3095,6 +3088,13 @@ addiw a3, a3, 416 add a2, a2, a3 vl1r.v v15, (a2) # Unknown-size Folded Reload + ld a7, 56(sp) # 8-byte Folded Reload + lui a2, 5 + addiw a2, a2, 206 + add t2, sp, a2 + lui a2, 5 + addiw a2, a2, 4 + add t3, sp, a2 li t4, 12 j .LBB10_57 .LBB10_55: # %if.then36.i.i @@ -3130,7 +3130,6 @@ .LBB10_60: # %for.body47.i.i.preheader # in Loop: Header=BB10_121 Depth=2 li a0, 0 - li t1, 50 csrr a1, vlenb slli a1, a1, 2 add a1, sp, a1 @@ -3149,6 +3148,7 @@ addiw a1, a1, 416 add a1, sp, a1 vl2r.v v20, (a1) # Unknown-size Folded Reload + li t1, 50 j .LBB10_62 .LBB10_61: # %do.cond.i13.i # in Loop: Header=BB10_62 Depth=3 @@ -3615,10 +3615,6 @@ li a2, 0 li a0, 0 li a1, 0 - ld t4, 72(sp) # 8-byte Folded Reload - li t5, -1 - li t6, 50 - addi ra, sp, 82 csrr a4, vlenb slli a5, a4, 3 sub a4, a5, a4 @@ -3635,6 +3631,10 @@ addiw a5, a5, 416 add a4, a4, a5 vl1r.v v13, (a4) # Unknown-size Folded Reload + ld t4, 72(sp) # 8-byte Folded Reload + li t5, -1 + li t6, 50 + addi ra, sp, 82 j .LBB10_123 .LBB10_122: # %do.cond.i.i # in Loop: Header=BB10_123 Depth=3 @@ -6013,12 +6013,6 @@ vs1r.v v8, (a0) # Unknown-size Folded Spill vsetvli zero, zero, e32, m2, ta, ma vmv.v.i v12, 0 - sd t2, 112(sp) # 8-byte Folded Spill - sd t3, 104(sp) # 8-byte Folded Spill - sd t4, 96(sp) # 8-byte Folded Spill - sd t5, 72(sp) # 8-byte Folded Spill - sd a5, 64(sp) # 8-byte Folded Spill - sd t6, 56(sp) # 8-byte Folded Spill csrr a0, vlenb slli a1, a0, 1 add a0, a1, a0 @@ -6029,6 +6023,12 @@ add a0, sp, a0 addi a0, a0, 176 vs2r.v v12, (a0) # Unknown-size Folded Spill + sd t2, 112(sp) # 8-byte Folded Spill + sd t3, 104(sp) # 8-byte Folded Spill + sd t4, 96(sp) # 8-byte Folded Spill + sd t5, 72(sp) # 8-byte Folded Spill + sd a5, 64(sp) # 8-byte Folded Spill + sd t6, 56(sp) # 8-byte Folded Spill j .LBB13_3 .LBB13_2: # %do.end # in Loop: Header=BB13_3 Depth=1 @@ -6173,16 +6173,16 @@ call memset@plt ld t2, 112(sp) # 8-byte Folded Reload li a0, 0 + csrr a1, vlenb + slli a2, a1, 1 + add a1, a2, a1 + add a1, sp, a1 + addi a1, a1, 176 + vl2r.v v10, (a1) # Unknown-size Folded Reload ld t3, 104(sp) # 8-byte Folded Reload ld t5, 72(sp) # 8-byte Folded Reload ld t6, 56(sp) # 8-byte Folded Reload li a1, 127 - csrr a2, vlenb - slli a3, a2, 1 - add a2, a3, a2 - add a2, sp, a2 - addi a2, a2, 176 - vl2r.v v10, (a2) # Unknown-size Folded Reload bltu a1, t5, .LBB13_27 # %bb.23: # %vector.ph # in Loop: Header=BB13_3 Depth=1 @@ -6225,13 +6225,13 @@ mul a0, a0, s1 ld a2, 120(sp) # 8-byte Folded Reload add a0, a2, a0 - ld t4, 96(sp) # 8-byte Folded Reload - li ra, 64 - ld a4, 48(sp) # 8-byte Folded Reload csrr a2, vlenb add a2, sp, a2 addi a2, a2, 176 vl2r.v v12, (a2) # Unknown-size Folded Reload + ld t4, 96(sp) # 8-byte Folded Reload + li ra, 64 + ld a4, 48(sp) # 8-byte Folded Reload j .LBB13_29 .LBB13_28: # %for.inc53 # in Loop: Header=BB13_29 Depth=2 @@ -7041,10 +7041,6 @@ vs8r.v v8, (a0) # Unknown-size Folded Spill fmv.d.x fs3, zero li s8, 64 - sd s2, 144(sp) # 8-byte Folded Spill - sd s3, 136(sp) # 8-byte Folded Spill - sd s4, 128(sp) # 8-byte Folded Spill - sd s5, 120(sp) # 8-byte Folded Spill csrr a0, vlenb li a1, 10 mul a0, a0, a1 @@ -7056,6 +7052,10 @@ add a0, sp, a0 addi a0, a0, 496 vs2r.v v22, (a0) # Unknown-size Folded Spill + sd s2, 144(sp) # 8-byte Folded Spill + sd s3, 136(sp) # 8-byte Folded Spill + sd s4, 128(sp) # 8-byte Folded Spill + sd s5, 120(sp) # 8-byte Folded Spill j .LBB15_7 .LBB15_2: # in Loop: Header=BB15_7 Depth=1 li a3, 0 @@ -7999,8 +7999,6 @@ # in Loop: Header=BB15_27 Depth=2 fsub.d fa1, fs3, fa4 fneg.d fa2, fa4 - ld s2, 144(sp) # 8-byte Folded Reload - ld s3, 136(sp) # 8-byte Folded Reload csrr a3, vlenb li a5, 10 mul a3, a3, a5 @@ -8012,6 +8010,8 @@ add a3, sp, a3 addi a3, a3, 496 vl2r.v v22, (a3) # Unknown-size Folded Reload + ld s2, 144(sp) # 8-byte Folded Reload + ld s3, 136(sp) # 8-byte Folded Reload ld s0, 160(sp) # 8-byte Folded Reload j .LBB15_39 .LBB15_35: # %if.else.i.i --- build.head//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/Archive/Cab/CabHandler.s 2023-11-13 08:03:21.211591816 +0000 +++ build//MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/Archive/Cab/CabHandler.s 2023-11-13 08:03:16.243735418 +0000 @@ -1860,9 +1860,9 @@ # %bb.8: # %invoke.cont19 # in Loop: Header=BB7_7 Depth=1 vsetivli zero, 2, e64, m1, ta, ma + addi a0, sp, 288 + vl1r.v v8, (a0) # Unknown-size Folded Reload addi a0, sp, 144 - addi a1, sp, 288 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) sd s10, 160(sp) sd s11, 136(sp) @@ -4234,9 +4234,9 @@ addi a2, s1, 16 vsetivli zero, 2, e64, m1, ta, ma ld a1, 24(a0) - sd a2, 120(sp) # 8-byte Folded Spill addi a0, sp, 1312 vl1r.v v8, (a0) # Unknown-size Folded Reload + sd a2, 120(sp) # 8-byte Folded Spill vse64.v v8, (a2) sd zero, 40(s1) sh zero, 48(s1) --- build.head//MultiSource/Applications/viterbi/CMakeFiles/viterbi.dir/test.s 2023-11-13 08:03:22.411557129 +0000 +++ build//MultiSource/Applications/viterbi/CMakeFiles/viterbi.dir/test.s 2023-11-13 08:03:17.451700501 +0000 @@ -138,11 +138,11 @@ call free@plt vsetivli zero, 2, e64, m1, ta, ma ld a0, 0(s8) + lui a1, 5 + addiw a1, a1, -768 + add a1, sp, a1 + vl1r.v v8, (a1) # Unknown-size Folded Reload addi a1, sp, 32 - lui a2, 5 - addiw a2, a2, -768 - add a2, sp, a2 - vl1r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a1) beqz a0, .LBB0_1 # %bb.3: # %for.body.i.preheader --- build.head//MultiSource/Benchmarks/tramp3d-v4/CMakeFiles/tramp3d-v4.dir/tramp3d-v4.s 2023-11-13 08:03:22.755547186 +0000 +++ build//MultiSource/Benchmarks/tramp3d-v4/CMakeFiles/tramp3d-v4.dir/tramp3d-v4.s 2023-11-13 08:03:17.807690210 +0000 @@ -13184,12 +13184,12 @@ .LBB122_441: # %_ZNSt6vectorI3LocILi2EESaIS1_EE5clearEv.exit687 ld a0, 192(sp) ld a1, 200(sp) - addi s7, sp, 392 - addi s9, sp, 416 csrr a2, vlenb add a2, sp, a2 addi a2, a2, 448 vl1r.v v8, (a2) # Unknown-size Folded Reload + addi s7, sp, 392 + addi s9, sp, 416 beq a1, a0, .LBB122_443 # %bb.442: # %if.then.i.i690 sd a0, 200(sp) @@ -13230,10 +13230,10 @@ # %bb.454: # %if.then.i.i690.1.1 sd a0, 272(sp) .LBB122_455: # %_ZNSt6vectorI6VectorILi2Ed4FullESaIS2_EE5clearEv.exit691.1.1 - addi s0, sp, 136 + addi s3, sp, 136 vsetivli zero, 2, e64, m1, ta, ma - addi s1, sp, 160 - vse64.v v8, (s1) + addi s0, sp, 160 + vse64.v v8, (s0) addi a0, sp, 144 vse64.v v8, (a0) addi a0, sp, 128 @@ -13241,10 +13241,10 @@ sd zero, 176(sp) sd zero, 384(sp) mv a0, s7 - mv a1, s0 + mv a1, s3 call _ZNSt6vectorI3LocILi2EESaIS1_EEaSERKS3_ mv a0, s9 - mv a1, s1 + mv a1, s0 call _ZNSt6vectorI6VectorILi2Ed4FullESaIS2_EEaSERKS4_ ld a0, 160(sp) beqz a0, .LBB122_457 @@ -13266,8 +13266,8 @@ sd s4, 400(sp) j .LBB122_477 .LBB122_461: # %if.else.i.i561 - ld s1, 392(sp) - sub s5, s4, s1 + ld s0, 392(sp) + sub s5, s4, s0 li a0, -15 srli a0, a0, 1 bne s5, a0, .LBB122_462 @@ -13286,38 +13286,38 @@ li a0, -1 srli a0, a0, 4 .LBB122_464: # %_ZNKSt6vectorI3LocILi2EESaIS1_EE12_M_check_lenEmPKc.exit.i1673 - slli s2, a0, 3 + slli s1, a0, 3 beqz a0, .LBB122_466 # %bb.465: # %_ZNSt16allocator_traitsISaI3LocILi2EEEE8allocateERS2_m.exit.i.i1684 - mv a0, s2 + mv a0, s1 call _Znwm@plt - mv s3, a0 + mv s2, a0 j .LBB122_467 .LBB122_466: - li s3, 0 + li s2, 0 .LBB122_467: # %_ZNSt12_Vector_baseI3LocILi2EESaIS1_EE11_M_allocateEm.exit.i1687 slli s6, s6, 3 - add s6, s3, s6 + add s6, s2, s6 sw zero, 0(s6) sw zero, 4(s6) - mv a0, s3 - beq s1, s4, .LBB122_474 + mv a0, s2 + beq s0, s4, .LBB122_474 # %bb.468: # %for.body.i.i.i.i.i.i1693.preheader addi s5, s5, -8 li a2, 184 - mv a0, s3 - mv a1, s1 + mv a0, s2 + mv a1, s0 bltu s5, a2, .LBB122_473 # %bb.469: # %vector.memcheck2989 andi a0, s5, -8 addi a0, a0, 8 - add a1, s3, a0 - add a0, s1, a0 - sltu a0, s3, a0 - sltu a1, s1, a1 + add a1, s2, a0 + add a0, s0, a0 + sltu a0, s2, a0 + sltu a1, s0, a1 and a2, a0, a1 - mv a0, s3 - mv a1, s1 + mv a0, s2 + mv a1, s0 bnez a2, .LBB122_473 # %bb.470: # %vector.ph2998 srli a2, s5, 3 @@ -13325,12 +13325,12 @@ ld a3, 24(sp) # 8-byte Folded Reload and a3, a2, a3 slli a1, a3, 3 - add a0, s3, a1 - add a1, s1, a1 + add a0, s2, a1 + add a1, s0, a1 vsetivli zero, 16, e32, m4, ta, ma mv a4, a3 - mv a5, s3 - mv a6, s1 + mv a5, s2 + mv a6, s0 .LBB122_471: # %vector.body3006 # =>This Inner Loop Header: Depth=1 vle32.v v8, (a6) @@ -13352,15 +13352,15 @@ bne a1, s4, .LBB122_473 .LBB122_474: # %_ZSt34__uninitialized_move_if_noexcept_aIP3LocILi2EES2_SaIS1_EET0_T_S5_S4_RT1_.exit23.i1713 addi s4, a0, 8 - beqz s1, .LBB122_476 + beqz s0, .LBB122_476 # %bb.475: # %if.then.i24.i1716 - mv a0, s1 + mv a0, s0 call _ZdlPv@plt .LBB122_476: # %_ZNSt6vectorI3LocILi2EESaIS1_EE17_M_realloc_insertIJRKS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_.exit1720 - sd s3, 392(sp) + sd s2, 392(sp) sd s4, 400(sp) - add s2, s3, s2 - sd s2, 408(sp) + add s1, s2, s1 + sd s1, 408(sp) .LBB122_477: # %_ZNSt6vectorI3LocILi2EESaIS1_EE9push_backERKS1_.exit.i550 csrr a0, vlenb add a0, sp, a0 @@ -13376,8 +13376,8 @@ sd a0, 424(sp) j .LBB122_495 .LBB122_479: # %if.else.i7.i558 - ld s1, 416(sp) - sub s5, s4, s1 + ld s0, 416(sp) + sub s5, s4, s0 li a0, -31 srli a0, a0, 1 beq s5, a0, .LBB122_677 @@ -13395,42 +13395,42 @@ li a0, -1 srli a0, a0, 5 .LBB122_482: # %_ZNKSt6vectorI6VectorILi2Ed4FullESaIS2_EE12_M_check_lenEmPKc.exit.i1620 - slli s2, a0, 4 + slli s1, a0, 4 beqz a0, .LBB122_484 # %bb.483: # %_ZNSt16allocator_traitsISaI6VectorILi2Ed4FullEEE8allocateERS3_m.exit.i.i1631 - mv a0, s2 + mv a0, s1 call _Znwm@plt csrr a1, vlenb add a1, sp, a1 addi a1, a1, 448 vl1r.v v8, (a1) # Unknown-size Folded Reload - mv s3, a0 + mv s2, a0 j .LBB122_485 .LBB122_484: - li s3, 0 + li s2, 0 .LBB122_485: # %_ZNSt12_Vector_baseI6VectorILi2Ed4FullESaIS2_EE11_M_allocateEm.exit.i1634 slli s6, s6, 4 - add s6, s3, s6 + add s6, s2, s6 vsetivli zero, 2, e64, m1, ta, ma vse64.v v8, (s6) - mv a0, s3 - beq s1, s4, .LBB122_492 + mv a0, s2 + beq s0, s4, .LBB122_492 # %bb.486: # %for.body.i.i.i.i.i.i1640.preheader addi s5, s5, -16 li a2, 304 - mv a0, s3 - mv a1, s1 + mv a0, s2 + mv a1, s0 bltu s5, a2, .LBB122_491 # %bb.487: # %vector.memcheck3015 andi a0, s5, -16 addi a0, a0, 16 - add a1, s3, a0 - add a0, s1, a0 - sltu a0, s3, a0 - sltu a1, s1, a1 + add a1, s2, a0 + add a0, s0, a0 + sltu a0, s2, a0 + sltu a1, s0, a1 and a2, a0, a1 - mv a0, s3 - mv a1, s1 + mv a0, s2 + mv a1, s0 bnez a2, .LBB122_491 # %bb.488: # %vector.ph3024 srli a2, s5, 4 @@ -13438,11 +13438,11 @@ ld a3, 32(sp) # 8-byte Folded Reload and a3, a2, a3 slli a1, a3, 4 - add a0, s3, a1 - add a1, s1, a1 + add a0, s2, a1 + add a1, s0, a1 mv a4, a3 - mv a5, s3 - mv a6, s1 + mv a5, s2 + mv a6, s0 .LBB122_489: # %vector.body3032 # =>This Inner Loop Header: Depth=1 vsetivli zero, 8, e64, m4, ta, ma @@ -13465,25 +13465,25 @@ bne a1, s4, .LBB122_491 .LBB122_492: # %_ZSt34__uninitialized_move_if_noexcept_aIP6VectorILi2Ed4FullES3_SaIS2_EET0_T_S6_S5_RT1_.exit23.i1660 addi s4, a0, 16 - beqz s1, .LBB122_494 + beqz s0, .LBB122_494 # %bb.493: # %if.then.i24.i1663 - mv a0, s1 + mv a0, s0 call _ZdlPv@plt .LBB122_494: # %_ZNSt6vectorI6VectorILi2Ed4FullESaIS2_EE17_M_realloc_insertIJRKS2_EEEvN9__gnu_cxx17__normal_iteratorIPS2_S4_EEDpOT_.exit1667 - sd s3, 416(sp) + sd s2, 416(sp) sd s4, 424(sp) - add s2, s3, s2 - sd s2, 432(sp) + add s1, s2, s1 + sd s1, 432(sp) .LBB122_495: # %_ZN9CenteringILi2EE8addValueERK3LocILi2EERK6VectorILi2Ed4FullE.exit564 ld a0, %pcrel_lo(.Lpcrel_hi186)(s8) ld a0, 0(a0) - ld s1, 0(a0) + ld s0, 0(a0) ld a0, 384(sp) - sd a0, 168(s1) - addi a0, s1, 176 + sd a0, 168(s0) + addi a0, s0, 176 mv a1, s7 call _ZNSt6vectorI3LocILi2EESaIS1_EEaSERKS3_ - addi a0, s1, 200 + addi a0, s0, 200 mv a1, s9 call _ZNSt6vectorI6VectorILi2Ed4FullESaIS2_EEaSERKS4_ li a0, 1 @@ -13494,14 +13494,14 @@ add a1, sp, a1 addi a1, a1, 448 vl1r.v v8, (a1) # Unknown-size Folded Reload - vse64.v v8, (s0) + vse64.v v8, (s3) addi a1, sp, 152 vse64.v v8, (a1) addi a1, sp, 168 vse64.v v8, (a1) sd a0, 384(sp) mv a0, s7 - mv a1, s0 + mv a1, s3 call _ZNSt6vectorI3LocILi2EESaIS1_EEaSERKS3_ addi a1, sp, 160 mv a0, s9 @@ -13516,23 +13516,23 @@ # %bb.498: # %if.then.i.i.i2.i585 call _ZdlPv@plt .LBB122_499: # %_ZN9CenteringILi2EED2Ev.exit586 - ld s3, 400(sp) - ld s4, 408(sp) - beq s3, s4, .LBB122_501 + ld s4, 400(sp) + ld s3, 408(sp) + beq s4, s3, .LBB122_501 # %bb.500: # %if.then.i.i592 - sw zero, 0(s3) - sw zero, 4(s3) - addi s3, s3, 8 - sd s3, 400(sp) + sw zero, 0(s4) + sw zero, 4(s4) + addi s4, s4, 8 + sd s4, 400(sp) j .LBB122_517 .LBB122_501: # %if.else.i.i607 ld s0, 392(sp) - sub s4, s3, s0 + sub s3, s4, s0 li a0, -15 srli a0, a0, 1 - beq s4, a0, .LBB122_678 + beq s3, a0, .LBB122_678 # %bb.502: # %_ZNKSt6vectorI3LocILi2EESaIS1_EE12_M_check_lenEmPKc.exit.i1779 - srai s5, s4, 3 + srai s5, s3, 3 seqz a0, s5 add a1, s5, a0 add a0, a1, s5 @@ -13560,15 +13560,15 @@ sw zero, 0(s5) sw zero, 4(s5) mv a0, s2 - beq s0, s3, .LBB122_514 + beq s0, s4, .LBB122_514 # %bb.508: # %for.body.i.i.i.i.i.i1799.preheader - addi s4, s4, -8 + addi s3, s3, -8 li a2, 184 mv a0, s2 mv a1, s0 - bltu s4, a2, .LBB122_513 + bltu s3, a2, .LBB122_513 # %bb.509: # %vector.memcheck3041 - andi a0, s4, -8 + andi a0, s3, -8 addi a0, a0, 8 add a1, s2, a0 add a0, s0, a0 @@ -13579,7 +13579,7 @@ mv a1, s0 bnez a2, .LBB122_513 # %bb.510: # %vector.ph3050 - srli a2, s4, 3 + srli a2, s3, 3 addi a2, a2, 1 ld a3, 24(sp) # 8-byte Folded Reload and a3, a2, a3 @@ -13608,7 +13608,7 @@ sw a2, 4(a0) addi a1, a1, 8 addi a0, a0, 8 - bne a1, s3, .LBB122_513 + bne a1, s4, .LBB122_513 .LBB122_514: # %_ZSt34__uninitialized_move_if_noexcept_aIP3LocILi2EES2_SaIS1_EET0_T_S5_S4_RT1_.exit23.i1819 addi s3, a0, 8 beqz s0, .LBB122_516 @@ -13618,30 +13618,30 @@ .LBB122_516: # %_ZNSt6vectorI3LocILi2EESaIS1_EE17_M_realloc_insertIJRKS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_.exit1826 sd s2, 392(sp) sd s3, 400(sp) - add s4, s2, s1 - sd s4, 408(sp) + add s3, s2, s1 + sd s3, 408(sp) .LBB122_517: # %_ZNSt6vectorI3LocILi2EESaIS1_EE9push_backERKS1_.exit.i596 csrr a0, vlenb add a0, sp, a0 addi a0, a0, 448 vl1r.v v8, (a0) # Unknown-size Folded Reload ld s5, 424(sp) - ld s3, 432(sp) - beq s5, s3, .LBB122_525 + ld s4, 432(sp) + beq s5, s4, .LBB122_525 # %bb.518: # %if.then.i4.i600 addi a0, s5, 16 vsetivli zero, 2, e64, m1, ta, ma vse64.v v8, (s5) sd a0, 424(sp) ld a0, 400(sp) - beq a0, s4, .LBB122_541 + beq a0, s3, .LBB122_541 .LBB122_519: # %if.then.i.i614 sw zero, 0(a0) sw zero, 4(a0) addi a0, a0, 8 sd a0, 400(sp) ld a0, 424(sp) - beq a0, s3, .LBB122_557 + beq a0, s4, .LBB122_557 .LBB122_520: # %if.then.i4.i622 li a1, 1023 slli a1, a1, 52 @@ -13650,14 +13650,14 @@ addi a0, a0, 16 sd a0, 424(sp) ld a0, 400(sp) - beq a0, s4, .LBB122_573 + beq a0, s3, .LBB122_573 .LBB122_521: # %if.then.i.i637 sw zero, 0(a0) sw zero, 4(a0) addi a0, a0, 8 sd a0, 400(sp) ld a0, 424(sp) - beq a0, s3, .LBB122_589 + beq a0, s4, .LBB122_589 .LBB122_522: # %if.then.i4.i645 li a1, 1023 slli a1, a1, 52 @@ -13666,14 +13666,14 @@ addi a0, a0, 16 sd a0, 424(sp) ld a0, 400(sp) - beq a0, s4, .LBB122_605 + beq a0, s3, .LBB122_605 .LBB122_523: # %if.then.i.i659 sw zero, 0(a0) sw zero, 4(a0) addi a0, a0, 8 sd a0, 400(sp) ld a0, 424(sp) - beq a0, s3, .LBB122_621 + beq a0, s4, .LBB122_621 .LBB122_524: # %if.then.i4.i667 sd zero, 0(a0) li a1, 1023 @@ -13684,12 +13684,12 @@ j .LBB122_637 .LBB122_525: # %if.else.i7.i604 ld s0, 416(sp) - sub s3, s5, s0 + sub s4, s5, s0 li a0, -31 srli a0, a0, 1 - beq s3, a0, .LBB122_679 + beq s4, a0, .LBB122_679 # %bb.526: # %_ZNKSt6vectorI6VectorILi2Ed4FullESaIS2_EE12_M_check_lenEmPKc.exit.i1726 - srai s6, s3, 4 + srai s6, s4, 4 seqz a0, s6 add a1, s6, a0 add a0, a1, s6 @@ -13723,13 +13723,13 @@ mv a0, s2 beq s0, s5, .LBB122_538 # %bb.532: # %for.body.i.i.i.i.i.i1746.preheader - addi s3, s3, -16 + addi s4, s4, -16 li a2, 304 mv a0, s2 mv a1, s0 - bltu s3, a2, .LBB122_537 + bltu s4, a2, .LBB122_537 # %bb.533: # %vector.memcheck3067 - andi a0, s3, -16 + andi a0, s4, -16 addi a0, a0, 16 add a1, s2, a0 add a0, s0, a0 @@ -13740,7 +13740,7 @@ mv a1, s0 bnez a2, .LBB122_537 # %bb.534: # %vector.ph3076 - srli a2, s3, 4 + srli a2, s4, 4 addi a2, a2, 1 ld a3, 32(sp) # 8-byte Folded Reload and a3, a2, a3 @@ -13771,22 +13771,22 @@ addi a0, a0, 16 bne a1, s5, .LBB122_537 .LBB122_538: # %_ZSt34__uninitialized_move_if_noexcept_aIP6VectorILi2Ed4FullES3_SaIS2_EET0_T_S6_S5_RT1_.exit23.i1766 - addi s3, a0, 16 + addi s4, a0, 16 beqz s0, .LBB122_540 # %bb.539: # %if.then.i24.i1769 mv a0, s0 call _ZdlPv@plt - ld s4, 408(sp) + ld s3, 408(sp) .LBB122_540: # %_ZNSt6vectorI6VectorILi2Ed4FullESaIS2_EE17_M_realloc_insertIJRKS2_EEEvN9__gnu_cxx17__normal_iteratorIPS2_S4_EEDpOT_.exit1773 sd s2, 416(sp) - sd s3, 424(sp) - add s3, s2, s1 - sd s3, 432(sp) + sd s4, 424(sp) + add s4, s2, s1 + sd s4, 432(sp) ld a0, 400(sp) - bne a0, s4, .LBB122_519 + bne a0, s3, .LBB122_519 .LBB122_541: # %if.else.i.i629 ld s0, 392(sp) - sub s5, s4, s0 + sub s5, s3, s0 li a0, -15 srli a0, a0, 1 beq s5, a0, .LBB122_680 @@ -13819,7 +13819,7 @@ sw zero, 0(s6) sw zero, 4(s6) mv a0, s2 - beq s0, s4, .LBB122_554 + beq s0, s3, .LBB122_554 # %bb.548: # %for.body.i.i.i.i.i.i1905.preheader addi s5, s5, -8 li a2, 184 @@ -13867,24 +13867,24 @@ sw a2, 4(a0) addi a1, a1, 8 addi a0, a0, 8 - bne a1, s4, .LBB122_553 + bne a1, s3, .LBB122_553 .LBB122_554: # %_ZSt34__uninitialized_move_if_noexcept_aIP3LocILi2EES2_SaIS1_EET0_T_S5_S4_RT1_.exit23.i1925 - addi s4, a0, 8 + addi s3, a0, 8 beqz s0, .LBB122_556 # %bb.555: # %if.then.i24.i1928 mv a0, s0 call _ZdlPv@plt - ld s3, 432(sp) + ld s4, 432(sp) .LBB122_556: # %_ZNSt6vectorI3LocILi2EESaIS1_EE17_M_realloc_insertIJRKS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_.exit1932 sd s2, 392(sp) - sd s4, 400(sp) - add s4, s2, s1 - sd s4, 408(sp) + sd s3, 400(sp) + add s3, s2, s1 + sd s3, 408(sp) ld a0, 424(sp) - bne a0, s3, .LBB122_520 + bne a0, s4, .LBB122_520 .LBB122_557: # %if.else.i7.i626 ld s0, 416(sp) - sub s5, s3, s0 + sub s5, s4, s0 li a0, -31 srli a0, a0, 1 beq s5, a0, .LBB122_681 @@ -13919,7 +13919,7 @@ sd a0, 0(s6) sd zero, 8(s6) mv a0, s2 - beq s0, s3, .LBB122_570 + beq s0, s4, .LBB122_570 # %bb.564: # %for.body.i.i.i.i.i.i1852.preheader addi s5, s5, -16 li a2, 304 @@ -13967,24 +13967,24 @@ fsd fa5, 8(a0) addi a1, a1, 16 addi a0, a0, 16 - bne a1, s3, .LBB122_569 + bne a1, s4, .LBB122_569 .LBB122_570: # %_ZSt34__uninitialized_move_if_noexcept_aIP6VectorILi2Ed4FullES3_SaIS2_EET0_T_S6_S5_RT1_.exit23.i1872 - addi s3, a0, 16 + addi s4, a0, 16 beqz s0, .LBB122_572 # %bb.571: # %if.then.i24.i1875 mv a0, s0 call _ZdlPv@plt - ld s4, 408(sp) + ld s3, 408(sp) .LBB122_572: # %_ZNSt6vectorI6VectorILi2Ed4FullESaIS2_EE17_M_realloc_insertIJRKS2_EEEvN9__gnu_cxx17__normal_iteratorIPS2_S4_EEDpOT_.exit1879 sd s2, 416(sp) - sd s3, 424(sp) - add s3, s2, s1 - sd s3, 432(sp) + sd s4, 424(sp) + add s4, s2, s1 + sd s4, 432(sp) ld a0, 400(sp) - bne a0, s4, .LBB122_521 + bne a0, s3, .LBB122_521 .LBB122_573: # %if.else.i.i652 ld s0, 392(sp) - sub s5, s4, s0 + sub s5, s3, s0 li a0, -15 srli a0, a0, 1 beq s5, a0, .LBB122_682 @@ -14017,7 +14017,7 @@ sw zero, 0(s6) sw zero, 4(s6) mv a0, s2 - beq s0, s4, .LBB122_586 + beq s0, s3, .LBB122_586 # %bb.580: # %for.body.i.i.i.i.i.i2011.preheader addi s5, s5, -8 li a2, 184 @@ -14065,24 +14065,24 @@ sw a2, 4(a0) addi a1, a1, 8 addi a0, a0, 8 - bne a1, s4, .LBB122_585 + bne a1, s3, .LBB122_585 .LBB122_586: # %_ZSt34__uninitialized_move_if_noexcept_aIP3LocILi2EES2_SaIS1_EET0_T_S5_S4_RT1_.exit23.i2031 - addi s4, a0, 8 + addi s3, a0, 8 beqz s0, .LBB122_588 # %bb.587: # %if.then.i24.i2034 mv a0, s0 call _ZdlPv@plt - ld s3, 432(sp) + ld s4, 432(sp) .LBB122_588: # %_ZNSt6vectorI3LocILi2EESaIS1_EE17_M_realloc_insertIJRKS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_.exit2038 sd s2, 392(sp) - sd s4, 400(sp) - add s4, s2, s1 - sd s4, 408(sp) + sd s3, 400(sp) + add s3, s2, s1 + sd s3, 408(sp) ld a0, 424(sp) - bne a0, s3, .LBB122_522 + bne a0, s4, .LBB122_522 .LBB122_589: # %if.else.i7.i649 ld s0, 416(sp) - sub s5, s3, s0 + sub s5, s4, s0 li a0, -31 srli a0, a0, 1 beq s5, a0, .LBB122_683 @@ -14117,7 +14117,7 @@ sd a0, 0(s6) sd a0, 8(s6) mv a0, s2 - beq s0, s3, .LBB122_602 + beq s0, s4, .LBB122_602 # %bb.596: # %for.body.i.i.i.i.i.i1958.preheader addi s5, s5, -16 li a2, 304 @@ -14165,24 +14165,24 @@ fsd fa5, 8(a0) addi a1, a1, 16 addi a0, a0, 16 - bne a1, s3, .LBB122_601 + bne a1, s4, .LBB122_601 .LBB122_602: # %_ZSt34__uninitialized_move_if_noexcept_aIP6VectorILi2Ed4FullES3_SaIS2_EET0_T_S6_S5_RT1_.exit23.i1978 - addi s3, a0, 16 + addi s4, a0, 16 beqz s0, .LBB122_604 # %bb.603: # %if.then.i24.i1981 mv a0, s0 call _ZdlPv@plt - ld s4, 408(sp) + ld s3, 408(sp) .LBB122_604: # %_ZNSt6vectorI6VectorILi2Ed4FullESaIS2_EE17_M_realloc_insertIJRKS2_EEEvN9__gnu_cxx17__normal_iteratorIPS2_S4_EEDpOT_.exit1985 sd s2, 416(sp) - sd s3, 424(sp) - add s3, s2, s1 - sd s3, 432(sp) + sd s4, 424(sp) + add s4, s2, s1 + sd s4, 432(sp) ld a0, 400(sp) - bne a0, s4, .LBB122_523 + bne a0, s3, .LBB122_523 .LBB122_605: # %if.else.i.i674 ld s0, 392(sp) - sub s5, s4, s0 + sub s5, s3, s0 li a0, -15 srli a0, a0, 1 beq s5, a0, .LBB122_684 @@ -14215,7 +14215,7 @@ sw zero, 0(s6) sw zero, 4(s6) mv a0, s2 - beq s0, s4, .LBB122_618 + beq s0, s3, .LBB122_618 # %bb.612: # %for.body.i.i.i.i.i.i2117.preheader addi s5, s5, -8 li a2, 184 @@ -14263,29 +14263,29 @@ sw a2, 4(a0) addi a1, a1, 8 addi a0, a0, 8 - bne a1, s4, .LBB122_617 + bne a1, s3, .LBB122_617 .LBB122_618: # %_ZSt34__uninitialized_move_if_noexcept_aIP3LocILi2EES2_SaIS1_EET0_T_S5_S4_RT1_.exit23.i2137 - addi s4, a0, 8 + addi s3, a0, 8 beqz s0, .LBB122_620 # %bb.619: # %if.then.i24.i2140 mv a0, s0 call _ZdlPv@plt - ld s3, 432(sp) + ld s4, 432(sp) .LBB122_620: # %_ZNSt6vectorI3LocILi2EESaIS1_EE17_M_realloc_insertIJRKS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_.exit2144 sd s2, 392(sp) - sd s4, 400(sp) + sd s3, 400(sp) add s1, s2, s1 sd s1, 408(sp) ld a0, 424(sp) - bne a0, s3, .LBB122_524 + bne a0, s4, .LBB122_524 .LBB122_621: # %if.else.i7.i671 ld s0, 416(sp) - sub s4, s3, s0 + sub s3, s4, s0 li a0, -31 srli a0, a0, 1 - beq s4, a0, .LBB122_685 + beq s3, a0, .LBB122_685 # %bb.622: # %_ZNKSt6vectorI6VectorILi2Ed4FullESaIS2_EE12_M_check_lenEmPKc.exit.i2044 - srai s5, s4, 4 + srai s5, s3, 4 seqz a0, s5 add a1, s5, a0 add a0, a1, s5 @@ -14315,15 +14315,15 @@ slli a0, a0, 52 sd a0, 8(s5) mv a0, s2 - beq s0, s3, .LBB122_634 + beq s0, s4, .LBB122_634 # %bb.628: # %for.body.i.i.i.i.i.i2064.preheader - addi s4, s4, -16 + addi s3, s3, -16 li a2, 304 mv a0, s2 mv a1, s0 - bltu s4, a2, .LBB122_633 + bltu s3, a2, .LBB122_633 # %bb.629: # %vector.memcheck3223 - andi a0, s4, -16 + andi a0, s3, -16 addi a0, a0, 16 add a1, s2, a0 add a0, s0, a0 @@ -14334,7 +14334,7 @@ mv a1, s0 bnez a2, .LBB122_633 # %bb.630: # %vector.ph3232 - srli a2, s4, 4 + srli a2, s3, 4 addi a2, a2, 1 ld a3, 32(sp) # 8-byte Folded Reload and a3, a2, a3 @@ -14363,7 +14363,7 @@ fsd fa5, 8(a0) addi a1, a1, 16 addi a0, a0, 16 - bne a1, s3, .LBB122_633 + bne a1, s4, .LBB122_633 .LBB122_634: # %_ZSt34__uninitialized_move_if_noexcept_aIP6VectorILi2Ed4FullES3_SaIS2_EET0_T_S6_S5_RT1_.exit23.i2084 addi s3, a0, 16 beqz s0, .LBB122_636 @@ -25965,13 +25965,13 @@ sd a0, 1320(s8) vsetivli zero, 4, e32, m1, ta, ma vmv.v.i v8, 2 - addi s7, sp, 2047 - addi s7, s7, 1297 - vse32.v v8, (s7) - sd a0, 1176(s8) addi s9, sp, 2047 - addi s9, s9, 1153 + addi s9, s9, 1297 vse32.v v8, (s9) + sd a0, 1176(s8) + addi s10, sp, 2047 + addi s10, s10, 1153 + vse32.v v8, (s10) addi a0, sp, 2047 addi a0, a0, 1441 addi a1, sp, 2047 @@ -26039,9 +26039,9 @@ sw a1, 100(a0) fsd fa5, 104(a0) addi a1, a0, 112 - addi s10, s1, 8 + addi s7, s1, 8 vsetivli zero, 2, e64, m1, ta, ma - vle64.v v8, (s10) + vle64.v v8, (s7) vle64.v v10, (s2) vsetivli zero, 4, e64, m2, ta, ma fld fa5, 16(s2) @@ -26149,9 +26149,9 @@ sd a0, 1320(s8) vsetivli zero, 4, e32, m1, ta, ma vmv.v.i v8, 1 - vse32.v v8, (s7) - sd a0, 1176(s8) vse32.v v8, (s9) + sd a0, 1176(s8) + vse32.v v8, (s10) addi a0, sp, 2047 addi a0, a0, 1441 addi a1, sp, 2047 @@ -26220,7 +26220,7 @@ fsd fa5, 104(a0) addi a1, a0, 112 vsetivli zero, 2, e64, m1, ta, ma - vle64.v v8, (s10) + vle64.v v8, (s7) vle64.v v10, (s2) vsetivli zero, 4, e64, m2, ta, ma fld fa5, 16(s2) @@ -26332,9 +26332,9 @@ addiw a1, a1, 112 add a0, a0, a1 vl1r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (s7) - sd zero, 1320(s8) vse64.v v8, (s9) + sd zero, 1320(s8) + vse64.v v8, (s10) sd zero, 1176(s8) addi a0, sp, 2047 addi a0, a0, 1441 @@ -26412,7 +26412,7 @@ fsd fa5, 104(a0) addi a1, a0, 112 vsetivli zero, 2, e64, m1, ta, ma - vle64.v v8, (s10) + vle64.v v8, (s7) vle64.v v10, (s2) vsetivli zero, 4, e64, m2, ta, ma vslideup.vi v8, v10, 2 @@ -33415,12 +33415,12 @@ mv s2, a1 lw a1, 4(a1) mv s4, a2 - mv s1, a0 + mv s0, a0 addi a0, sp, 16 - addi s0, sp, 16 + addi s1, sp, 16 call _Z17makeRBlocksFactorIiESt6vectorIT_SaIS1_EES1_ vsetivli zero, 2, e64, m1, ta, ma - vle64.v v8, (s0) + vle64.v v8, (s1) lw a1, 12(s2) addi s5, sp, 48 addi a0, sp, 128 @@ -33429,10 +33429,10 @@ addi a0, sp, 16 call _Z17makeRBlocksFactorIiESt6vectorIT_SaIS1_EES1_ ld a0, 24(sp) - ld s0, 16(sp) + ld s1, 16(sp) lw a1, 20(s2) sd a0, 80(sp) - sd s0, 72(sp) + sd s1, 72(sp) addi a0, sp, 16 call _Z17makeRBlocksFactorIiESt6vectorIT_SaIS1_EES1_ ld s3, 16(sp) @@ -33558,10 +33558,10 @@ j .LBB158_2 .LBB158_15: # %for.cond.cleanup28 lw a1, 24(sp) - sw a1, 8(s1) + sw a1, 8(s0) vsetivli zero, 2, e32, mf2, ta, ma vle32.v v8, (s6) - vse32.v v8, (s1) + vse32.v v8, (s0) beqz a0, .LBB158_17 # %bb.16: # %if.then.i.i.i60 call _ZdlPv@plt @@ -33571,9 +33571,9 @@ mv a0, s3 call _ZdlPv@plt .LBB158_19: # %_ZNSt6vectorIiSaIiEED2Ev.exit64 - beqz s0, .LBB158_21 + beqz s1, .LBB158_21 # %bb.20: # %if.then.i.i.i63.1 - mv a0, s0 + mv a0, s1 call _ZdlPv@plt .LBB158_21: # %_ZNSt6vectorIiSaIiEED2Ev.exit64.1 vsetivli zero, 1, e64, m1, ta, ma @@ -51545,23 +51545,23 @@ vs1r.v v9, (a0) # Unknown-size Folded Spill li t0, 2 li s1, 3 - sd a3, 56(sp) # 8-byte Folded Spill - sd a4, 48(sp) # 8-byte Folded Spill - sd a5, 40(sp) # 8-byte Folded Spill - sd a2, 32(sp) # 8-byte Folded Spill - sd t3, 72(sp) # 8-byte Folded Spill csrr a0, vlenb slli a1, a0, 1 add a0, a1, a0 add a0, sp, a0 addi a0, a0, 384 vs1r.v v8, (a0) # Unknown-size Folded Spill - sd a7, 24(sp) # 8-byte Folded Spill csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 384 vs4r.v v12, (a0) # Unknown-size Folded Spill + sd a3, 56(sp) # 8-byte Folded Spill + sd a4, 48(sp) # 8-byte Folded Spill + sd a5, 40(sp) # 8-byte Folded Spill + sd a2, 32(sp) # 8-byte Folded Spill + sd t3, 72(sp) # 8-byte Folded Spill + sd a7, 24(sp) # 8-byte Folded Spill j .LBB219_12 .LBB219_10: # %for.end137.loopexit # in Loop: Header=BB219_12 Depth=1 @@ -51577,17 +51577,17 @@ sw a0, 300(sp) sw s1, 332(sp) vse32.v v10, (t3) - ld a3, 56(sp) # 8-byte Folded Reload - ld a4, 48(sp) # 8-byte Folded Reload - ld a5, 40(sp) # 8-byte Folded Reload - ld a2, 32(sp) # 8-byte Folded Reload - addi a6, sp, 288 csrr a0, vlenb slli a1, a0, 1 add a0, a1, a0 add a0, sp, a0 addi a0, a0, 384 vl1r.v v8, (a0) # Unknown-size Folded Reload + ld a3, 56(sp) # 8-byte Folded Reload + ld a4, 48(sp) # 8-byte Folded Reload + ld a5, 40(sp) # 8-byte Folded Reload + ld a2, 32(sp) # 8-byte Folded Reload + addi a6, sp, 288 ld a7, 24(sp) # 8-byte Folded Reload li s1, 3 .LBB219_11: # %for.inc139 @@ -51677,9 +51677,9 @@ add a1, sp, a1 addi a1, a1, 384 vl1r.v v8, (a1) # Unknown-size Folded Reload - li a7, -2 addi a1, sp, 384 vs1r.v v11, (a1) # Unknown-size Folded Spill + li a7, -2 j .LBB219_19 .LBB219_17: # in Loop: Header=BB219_19 Depth=2 li a1, 0 @@ -51832,26 +51832,26 @@ addi a3, a3, 384 vs1r.v v10, (a3) # Unknown-size Folded Spill call _ZNSt6vectorIN14LayoutBaseDataILi3EE10GCFillInfoESaIS2_EE17_M_realloc_insertIJS2_EEEvN9__gnu_cxx17__normal_iteratorIPS2_S4_EEDpOT_ + li a7, -2 + li t0, 2 + addi ra, sp, 240 + li t6, 1 + addi t5, sp, 176 + addi t4, sp, 224 + ld t3, 72(sp) # 8-byte Folded Reload + addi t2, sp, 348 + addi t1, sp, 284 addi a0, sp, 384 vl1r.v v11, (a0) # Unknown-size Folded Reload csrr a0, vlenb add a0, sp, a0 addi a0, a0, 384 vl1r.v v10, (a0) # Unknown-size Folded Reload - li a7, -2 - li t0, 2 - addi ra, sp, 240 - li t6, 1 csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 384 vl4r.v v12, (a0) # Unknown-size Folded Reload - addi t5, sp, 176 - addi t4, sp, 224 - ld t3, 72(sp) # 8-byte Folded Reload - addi t2, sp, 348 - addi t1, sp, 284 vsetivli zero, 2, e32, mf2, ta, ma .LBB219_25: # %_ZNSt6vectorIN14LayoutBaseDataILi3EE10GCFillInfoESaIS2_EE9push_backEOS2_.exit # in Loop: Header=BB219_19 Depth=2 @@ -51934,17 +51934,17 @@ sw a0, 300(sp) sw s7, 332(sp) vse32.v v10, (t3) - ld a3, 56(sp) # 8-byte Folded Reload - ld a4, 48(sp) # 8-byte Folded Reload - ld a5, 40(sp) # 8-byte Folded Reload - ld a2, 32(sp) # 8-byte Folded Reload - addi a6, sp, 288 csrr a0, vlenb slli a1, a0, 1 add a0, a1, a0 add a0, sp, a0 addi a0, a0, 384 vl1r.v v8, (a0) # Unknown-size Folded Reload + ld a3, 56(sp) # 8-byte Folded Reload + ld a4, 48(sp) # 8-byte Folded Reload + ld a5, 40(sp) # 8-byte Folded Reload + ld a2, 32(sp) # 8-byte Folded Reload + addi a6, sp, 288 ld a7, 24(sp) # 8-byte Folded Reload li s1, 3 ld s3, 16(sp) # 8-byte Folded Reload @@ -52029,9 +52029,9 @@ add a1, sp, a1 addi a1, a1, 384 vl1r.v v8, (a1) # Unknown-size Folded Reload - li a7, -2 addi a1, sp, 384 vs1r.v v11, (a1) # Unknown-size Folded Spill + li a7, -2 j .LBB219_44 .LBB219_42: # in Loop: Header=BB219_44 Depth=2 li a1, 0 @@ -52176,26 +52176,26 @@ addi a3, a3, 384 vs1r.v v10, (a3) # Unknown-size Folded Spill call _ZNSt6vectorIN14LayoutBaseDataILi3EE10GCFillInfoESaIS2_EE17_M_realloc_insertIJS2_EEEvN9__gnu_cxx17__normal_iteratorIPS2_S4_EEDpOT_ + li a7, -2 + li t0, 2 + addi ra, sp, 240 + li t6, 1 + addi t5, sp, 176 + addi t4, sp, 224 + ld t3, 72(sp) # 8-byte Folded Reload + addi t2, sp, 348 + addi t1, sp, 284 addi a0, sp, 384 vl1r.v v11, (a0) # Unknown-size Folded Reload csrr a0, vlenb add a0, sp, a0 addi a0, a0, 384 vl1r.v v10, (a0) # Unknown-size Folded Reload - li a7, -2 - li t0, 2 - addi ra, sp, 240 - li t6, 1 csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 384 vl4r.v v12, (a0) # Unknown-size Folded Reload - addi t5, sp, 176 - addi t4, sp, 224 - ld t3, 72(sp) # 8-byte Folded Reload - addi t2, sp, 348 - addi t1, sp, 284 vsetivli zero, 2, e32, mf2, ta, ma .LBB219_50: # %_ZNSt6vectorIN14LayoutBaseDataILi3EE10GCFillInfoESaIS2_EE9push_backEOS2_.exit281 # in Loop: Header=BB219_44 Depth=2 @@ -52618,10 +52618,10 @@ j .LBB221_3 .LBB221_1: # %if.then # in Loop: Header=BB221_3 Depth=1 - ld s0, 32(sp) # 8-byte Folded Reload - ld s1, 40(sp) # 8-byte Folded Reload addi a0, sp, 144 vl1r.v v8, (a0) # Unknown-size Folded Reload + ld s0, 32(sp) # 8-byte Folded Reload + ld s1, 40(sp) # 8-byte Folded Reload addi a4, sp, 96 li a0, 2 bgeu s7, a0, .LBB221_20 @@ -56921,13 +56921,13 @@ # in Loop: Header=BB244_23 Depth=2 sd s0, 168(sp) vsetivli zero, 2, e64, m1, ta, ma - addi a2, sp, 176 csrr a0, vlenb slli a1, a0, 2 add a0, a1, a0 add a0, sp, a0 addi a0, a0, 272 vl1r.v v8, (a0) # Unknown-size Folded Reload + addi a2, sp, 176 vse64.v v8, (a2) vsetivli zero, 16, e8, m1, ta, ma ld a0, 272(s4) @@ -57954,17 +57954,17 @@ li a0, 296 call _Znwm@plt .Lpcrel_hi583: - auipc s3, %pcrel_hi(_ZN6Unique6next_sE) - ld s5, %pcrel_lo(.Lpcrel_hi583)(s3) + auipc s4, %pcrel_hi(_ZN6Unique6next_sE) + ld s5, %pcrel_lo(.Lpcrel_hi583)(s4) mv s1, a0 - addi s4, s5, 1 + addi s3, s5, 1 sd s5, 0(a0) addi s8, a0, 8 li a0, 504 call _Znwm@plt mv s2, a0 addi s6, s5, 2 - sd s4, 0(a0) + sd s3, 0(a0) addi a0, a0, 8 addi a1, s2, 132 addi a2, s2, 184 @@ -58020,8 +58020,8 @@ li a1, 0 call memset@plt sd s2, 16(s1) - li s4, 1 - sw s4, 244(s2) + li s3, 1 + sw s3, 244(s2) sd s8, 24(s1) addi a0, s1, 32 vsetivli zero, 2, e64, m1, ta, ma @@ -58046,7 +58046,7 @@ sd a0, 264(s2) sd a1, 272(s2) sd a1, 280(s2) - sw s4, 288(s2) + sw s3, 288(s2) addi a0, s1, 64 vsetivli zero, 2, e64, m1, ta, ma csrr a1, vlenb @@ -58065,13 +58065,13 @@ vslideup.vi v8, v12, 12 addi a0, s1, 80 vse32.v v8, (a0) - sw s4, 144(s1) + sw s3, 144(s1) sw zero, 148(s1) sw zero, 152(s1) - sw s4, 156(s1) + sw s3, 156(s1) sw zero, 160(s1) sw zero, 164(s1) - sw s4, 168(s1) + sw s3, 168(s1) addi a0, s1, 196 vsetivli zero, 4, e32, m1, ta, ma csrr a1, vlenb @@ -58086,7 +58086,7 @@ vse32.v v8, (a0) sw zero, 276(s1) sd s1, 0(s0) - sw s4, 284(s1) + sw s3, 284(s1) .Lpcrel_hi585: auipc a0, %pcrel_hi(_ZTV6EngineILi3Ed10MultiPatchI7GridTag6RemoteI5BrickEEE+16) addi a0, a0, %pcrel_lo(.Lpcrel_hi585) @@ -58096,7 +58096,7 @@ call _Znwm@plt mv s1, a0 addi s5, s5, 3 - sd s5, %pcrel_lo(.Lpcrel_hi583)(s3) + sd s5, %pcrel_lo(.Lpcrel_hi583)(s4) sd s6, 0(a0) addi a0, a0, 8 addi a1, s1, 132 @@ -58149,7 +58149,7 @@ li a1, 0 call memset@plt sd s1, 24(s0) - sw s4, 244(s1) + sw s3, 244(s1) sd s2, 32(s0) addi a0, s0, 40 vsetivli zero, 2, e64, m1, ta, ma @@ -58171,7 +58171,7 @@ sd a0, 264(s1) sd a1, 272(s1) sd a1, 280(s1) - sw s4, 288(s1) + sw s3, 288(s1) addi a0, s0, 72 vsetivli zero, 2, e64, m1, ta, ma csrr a1, vlenb @@ -61957,8 +61957,8 @@ mv a0, a7 addi a1, sp, 144 vs1r.v v8, (a1) # Unknown-size Folded Spill - sd a5, 56(sp) # 8-byte Folded Spill - mv s11, a6 + mv s11, a5 + sd a6, 56(sp) # 8-byte Folded Spill sd t0, 48(sp) # 8-byte Folded Spill sd t1, 40(sp) # 8-byte Folded Spill sd a3, 32(sp) # 8-byte Folded Spill @@ -61968,11 +61968,11 @@ ld a3, 32(sp) # 8-byte Folded Reload ld t1, 40(sp) # 8-byte Folded Reload ld t0, 48(sp) # 8-byte Folded Reload - mv a6, s11 - ld a5, 56(sp) # 8-byte Folded Reload + ld a6, 56(sp) # 8-byte Folded Reload + mv a5, s11 + ld a7, 72(sp) # 8-byte Folded Reload addi a0, sp, 144 vl1r.v v8, (a0) # Unknown-size Folded Reload - ld a7, 72(sp) # 8-byte Folded Reload ld s11, 0(a7) vsetivli zero, 4, e32, m1, ta, ma .LBB259_18: # %_Z16touchesConstructI8IntervalILi3EES1_EP4NodeIT_T0_ERKS3_RKS4_iiiiRK23TouchesConstructNodePtr.exit @@ -71709,22 +71709,22 @@ add a2, a2, a3 addi s6, a2, -1 add a0, a4, a0 - addi s7, a0, -1 + addi s0, a0, -1 j .LBB306_5 .LBB306_3: # %if.else.i lw s4, 4(s8) .LBB306_4: # %_ZNK11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd14MultiPatchViewI7GridTag6RemoteI5BrickELi3EEE25inputDomainToVertexDomainERK8IntervalILi3EE.exit lw s6, 12(s8) - lw s7, 20(s8) + lw s0, 20(s8) .LBB306_5: # %_ZNK11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd14MultiPatchViewI7GridTag6RemoteI5BrickELi3EEE25inputDomainToVertexDomainERK8IntervalILi3EE.exit srli s1, s1, 32 lw s5, 16(s8) - lw s0, 8(s8) + lw s7, 8(s8) sd s8, 24(sp) # 8-byte Folded Spill lw s8, 0(s8) addi s9, s6, 1 addi s10, s4, 1 - addi s11, s7, 1 + addi s11, s0, 1 li a0, 152 call _Znwm@plt ld a1, 48(sp) # 8-byte Folded Reload @@ -71740,7 +71740,7 @@ sw zero, 40(a0) sw s6, 44(a0) sw zero, 48(a0) - sw s7, 52(a0) + sw s0, 52(a0) sw zero, 56(a0) sw s10, 60(a0) sw zero, 64(a0) @@ -71752,7 +71752,7 @@ sw zero, 88(a0) sw s6, 92(a0) sw zero, 96(a0) - sw s7, 100(a0) + sw s0, 100(a0) fld fa5, 128(a1) fld fa4, 104(a1) fld fa3, 112(a1) @@ -71768,8 +71768,8 @@ fmadd.d fa5, fa5, ft0, fa4 fsd fa5, 104(a0) lw a2, 40(a1) - subw s0, s0, a2 - fcvt.d.w fa5, s0 + subw a2, s7, a2 + fcvt.d.w fa5, a2 fmadd.d fa5, fa1, fa5, fa3 fsd fa5, 112(a0) lw a1, 48(a1) @@ -72277,12 +72277,12 @@ # in Loop: Header=BB306_23 Depth=2 sd s2, 200(sp) vsetivli zero, 2, e64, m1, ta, ma - addi a2, sp, 208 csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 336 vl1r.v v8, (a0) # Unknown-size Folded Reload + addi a2, sp, 208 vse64.v v8, (a2) vsetivli zero, 16, e8, m1, ta, ma ld a0, 272(s4) @@ -76609,13 +76609,13 @@ # in Loop: Header=BB326_23 Depth=2 sd s0, 168(sp) vsetivli zero, 2, e64, m1, ta, ma - addi a2, sp, 176 csrr a0, vlenb slli a1, a0, 2 add a0, a1, a0 add a0, sp, a0 addi a0, a0, 272 vl1r.v v8, (a0) # Unknown-size Folded Reload + addi a2, sp, 176 vse64.v v8, (a2) vsetivli zero, 16, e8, m1, ta, ma ld a0, 272(s4) @@ -77642,17 +77642,17 @@ li a0, 296 call _Znwm@plt .Lpcrel_hi717: - auipc s3, %pcrel_hi(_ZN6Unique6next_sE) - ld s5, %pcrel_lo(.Lpcrel_hi717)(s3) + auipc s4, %pcrel_hi(_ZN6Unique6next_sE) + ld s5, %pcrel_lo(.Lpcrel_hi717)(s4) mv s1, a0 - addi s4, s5, 1 + addi s3, s5, 1 sd s5, 0(a0) addi s8, a0, 8 li a0, 504 call _Znwm@plt mv s2, a0 addi s6, s5, 2 - sd s4, 0(a0) + sd s3, 0(a0) addi a0, a0, 8 addi a1, s2, 132 addi a2, s2, 184 @@ -77708,8 +77708,8 @@ li a1, 0 call memset@plt sd s2, 16(s1) - li s4, 1 - sw s4, 244(s2) + li s3, 1 + sw s3, 244(s2) sd s8, 24(s1) addi a0, s1, 32 vsetivli zero, 2, e64, m1, ta, ma @@ -77734,7 +77734,7 @@ sd a0, 264(s2) sd a1, 272(s2) sd a1, 280(s2) - sw s4, 288(s2) + sw s3, 288(s2) addi a0, s1, 64 vsetivli zero, 2, e64, m1, ta, ma csrr a1, vlenb @@ -77753,13 +77753,13 @@ vslideup.vi v8, v12, 12 addi a0, s1, 80 vse32.v v8, (a0) - sw s4, 144(s1) + sw s3, 144(s1) sw zero, 148(s1) sw zero, 152(s1) - sw s4, 156(s1) + sw s3, 156(s1) sw zero, 160(s1) sw zero, 164(s1) - sw s4, 168(s1) + sw s3, 168(s1) addi a0, s1, 196 vsetivli zero, 4, e32, m1, ta, ma csrr a1, vlenb @@ -77774,7 +77774,7 @@ vse32.v v8, (a0) sw zero, 276(s1) sd s1, 0(s0) - sw s4, 284(s1) + sw s3, 284(s1) .Lpcrel_hi719: auipc a0, %pcrel_hi(_ZTV6EngineILi3E6VectorILi3Ed4FullE10MultiPatchI7GridTag6RemoteI5BrickEEE+16) addi a0, a0, %pcrel_lo(.Lpcrel_hi719) @@ -77784,7 +77784,7 @@ call _Znwm@plt mv s1, a0 addi s5, s5, 3 - sd s5, %pcrel_lo(.Lpcrel_hi717)(s3) + sd s5, %pcrel_lo(.Lpcrel_hi717)(s4) sd s6, 0(a0) addi a0, a0, 8 addi a1, s1, 132 @@ -77837,7 +77837,7 @@ li a1, 0 call memset@plt sd s1, 24(s0) - sw s4, 244(s1) + sw s3, 244(s1) sd s2, 32(s0) addi a0, s0, 40 vsetivli zero, 2, e64, m1, ta, ma @@ -77859,7 +77859,7 @@ sd a0, 264(s1) sd a1, 272(s1) sd a1, 280(s1) - sw s4, 288(s1) + sw s3, 288(s1) addi a0, s0, 72 vsetivli zero, 2, e64, m1, ta, ma csrr a1, vlenb @@ -85920,22 +85920,22 @@ add a2, a2, a3 addi s6, a2, -1 add a0, a4, a0 - addi s7, a0, -1 + addi s0, a0, -1 j .LBB364_5 .LBB364_3: # %if.else.i lw s4, 4(s8) .LBB364_4: # %_ZNK11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEE6VectorILi3Ed4FullE14MultiPatchViewI7GridTag6RemoteI5BrickELi3EEE25inputDomainToVertexDomainERK8IntervalILi3EE.exit lw s6, 12(s8) - lw s7, 20(s8) + lw s0, 20(s8) .LBB364_5: # %_ZNK11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEE6VectorILi3Ed4FullE14MultiPatchViewI7GridTag6RemoteI5BrickELi3EEE25inputDomainToVertexDomainERK8IntervalILi3EE.exit srli s1, s1, 32 lw s5, 16(s8) - lw s0, 8(s8) + lw s7, 8(s8) sd s8, 24(sp) # 8-byte Folded Spill lw s8, 0(s8) addi s9, s6, 1 addi s10, s4, 1 - addi s11, s7, 1 + addi s11, s0, 1 li a0, 152 call _Znwm@plt ld a1, 48(sp) # 8-byte Folded Reload @@ -85951,7 +85951,7 @@ sw zero, 40(a0) sw s6, 44(a0) sw zero, 48(a0) - sw s7, 52(a0) + sw s0, 52(a0) sw zero, 56(a0) sw s10, 60(a0) sw zero, 64(a0) @@ -85963,7 +85963,7 @@ sw zero, 88(a0) sw s6, 92(a0) sw zero, 96(a0) - sw s7, 100(a0) + sw s0, 100(a0) fld fa5, 128(a1) fld fa4, 104(a1) fld fa3, 112(a1) @@ -85979,8 +85979,8 @@ fmadd.d fa5, fa5, ft0, fa4 fsd fa5, 104(a0) lw a2, 40(a1) - subw s0, s0, a2 - fcvt.d.w fa5, s0 + subw a2, s7, a2 + fcvt.d.w fa5, a2 fmadd.d fa5, fa1, fa5, fa3 fsd fa5, 112(a0) lw a1, 48(a1) @@ -86488,12 +86488,12 @@ # in Loop: Header=BB364_23 Depth=2 sd s2, 200(sp) vsetivli zero, 2, e64, m1, ta, ma - addi a2, sp, 208 csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 336 vl1r.v v8, (a0) # Unknown-size Folded Reload + addi a2, sp, 208 vse64.v v8, (a2) vsetivli zero, 16, e8, m1, ta, ma ld a0, 272(s4) @@ -89516,7 +89516,7 @@ add a0, sp, a0 addi a0, a0, 240 vs1r.v v12, (a0) # Unknown-size Folded Spill - li s2, 1 + li s4, 1 .LBB375_8: # %for.body.i.i.i # =>This Inner Loop Header: Depth=1 sd zero, 96(s6) @@ -89532,13 +89532,13 @@ vse64.v v8, (a0) addi a0, s6, 64 vse64.v v8, (a0) - sw s2, 104(s6) + sw s4, 104(s6) sw zero, 108(s6) sw zero, 112(s6) - sw s2, 116(s6) + sw s4, 116(s6) sw zero, 120(s6) sw zero, 124(s6) - sw s2, 128(s6) + sw s4, 128(s6) sw zero, 156(s6) sw zero, 160(s6) sw zero, 164(s6) @@ -89556,7 +89556,7 @@ vl1r.v v12, (a2) # Unknown-size Folded Reload vse64.v v12, (a1) sd a0, 168(s6) - sw s2, 0(a0) + sw s4, 0(a0) ld a0, 16(s3) addi s6, s6, 176 bne s6, a0, .LBB375_8 @@ -90963,12 +90963,12 @@ ld a1, 104(sp) # 8-byte Folded Reload fld fs0, 56(a1) vsetivli zero, 2, e64, m1, ta, ma + csrr a1, vlenb + slli a1, a1, 2 + add a1, sp, a1 + addi a1, a1, 576 + vl1r.v v8, (a1) # Unknown-size Folded Reload addi a1, sp, 160 - csrr a2, vlenb - slli a2, a2, 2 - add a2, sp, a2 - addi a2, a2, 576 - vl1r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a1) li a1, 1 sw a1, 176(sp) @@ -91010,24 +91010,24 @@ .LBB378_85: # %_ZN18RefCountedBlockPtrI19FieldEngineBaseDataILi3E6VectorILi3Ed4FullE10ViewEngineILi3E13IndexFunctionIN10GenericURMI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEE16PositionsFunctorEEEELb0E18RefBlockControllerISF_EEC2ERKSI_.exit.i.i.i.i.i.i.i.i.i.i # in Loop: Header=BB378_7 Depth=2 vsetivli zero, 4, e32, m1, ta, ma + csrr a0, vlenb + slli a1, a0, 1 + add a0, a1, a0 + add a0, sp, a0 + addi a0, a0, 576 + vl1r.v v8, (a0) # Unknown-size Folded Reload addi a0, sp, 264 - csrr a1, vlenb - slli a2, a1, 1 - add a1, a2, a1 - add a1, sp, a1 - addi a1, a1, 576 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) vsetivli zero, 2, e32, mf2, ta, ma ld a0, 560(sp) addi a1, sp, 544 vle64.v v8, (a1) + csrr a1, vlenb + slli a1, a1, 1 + add a1, sp, a1 + addi a1, a1, 576 + vl1r.v v9, (a1) # Unknown-size Folded Reload ld a1, 48(sp) # 8-byte Folded Reload - csrr a2, vlenb - slli a2, a2, 1 - add a2, sp, a2 - addi a2, a2, 576 - vl1r.v v9, (a2) # Unknown-size Folded Reload vse32.v v9, (a1) addi a1, sp, 288 sd a0, 16(a1) @@ -91043,9 +91043,9 @@ # in Loop: Header=BB378_7 Depth=2 vsetivli zero, 4, e64, m2, ta, ma lw a0, 268(sp) + addi a1, sp, 576 + vl2r.v v8, (a1) # Unknown-size Folded Reload ld a1, 40(sp) # 8-byte Folded Reload - addi a2, sp, 576 - vl2r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a1) fsd fs0, 352(sp) li a1, 1 @@ -106768,19 +106768,19 @@ .LBB447_116: # %_ZN18RefCountedBlockPtrI19FieldEngineBaseDataILi3Ed14MultiPatchViewI7GridTag6RemoteI5BrickELi3EEELb0E18RefBlockControllerIS7_EEC2ERKSA_.exit.i.i.i.i.i # in Loop: Header=BB447_7 Depth=2 vsetivli zero, 4, e32, m1, ta, ma + csrr a0, vlenb + add a0, sp, a0 + addi a0, a0, 528 + vl1r.v v8, (a0) # Unknown-size Folded Reload addi a0, sp, 216 - csrr a1, vlenb - add a1, sp, a1 - addi a1, a1, 528 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) vsetivli zero, 2, e32, mf2, ta, ma ld a0, 480(sp) addi a1, sp, 464 vle64.v v8, (a1) + addi a1, sp, 528 + vl1r.v v9, (a1) # Unknown-size Folded Reload ld a1, 32(sp) # 8-byte Folded Reload - addi a2, sp, 528 - vl1r.v v9, (a2) # Unknown-size Folded Reload vse32.v v9, (a1) addi a1, sp, 240 sd a0, 16(a1) @@ -127637,18 +127637,18 @@ slli a3, a3, 1 sub sp, sp, a3 .cfi_escape 0x0f, 0x0e, 0x72, 0x00, 0x11, 0xb0, 0x02, 0x22, 0x11, 0x02, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 304 + 2 * vlenb - mv s1, a1 + mv s2, a1 + sd a1, 32(sp) # 8-byte Folded Spill lw a1, 0(a1) - mv s6, a2 + mv s1, a2 mv s0, a0 - li s2, -1 + li s5, -1 sw a1, 0(a0) addi a0, a0, 8 - addi a1, s1, 8 + addi a1, s2, 8 call _ZN9CenteringILi3EEC2ERKS0_ - ld a0, 24(s1) - sd s1, 32(sp) # 8-byte Folded Spill - ld a1, 16(s1) + ld a0, 24(s2) + ld a1, 16(s2) sub a0, a0, a1 srli a0, a0, 2 lui a1, 699051 @@ -127664,44 +127664,45 @@ vmv.v.i v8, 0 sub a2, a2, a0 srai a2, a2, 2 - mul s4, a2, a1 + mul s2, a2, a1 mulw a2, a2, a1 li a1, 1 vse64.v v8, (s3) bne a2, a1, .LBB538_3 # %bb.1: # %if.then.i lw a2, 12(s0) - lw s5, 4(s6) + lw s4, 4(s1) beq a2, a1, .LBB538_4 # %bb.2: # %if.else.i.i lw a1, 0(a0) - lw a2, 12(s6) + lw a2, 12(s1) lw a3, 4(a0) - lw a4, 20(s6) + lw a4, 20(s1) lw a0, 8(a0) - add a1, s5, a1 - addi s5, a1, -1 + add a1, s4, a1 + addi s4, a1, -1 add a2, a2, a3 - addi s7, a2, -1 + mv a1, s1 + addi s6, a2, -1 add a0, a4, a0 addi s1, a0, -1 j .LBB538_5 .LBB538_3: # %if.else.i - lw s5, 4(s6) + lw s4, 4(s1) .LBB538_4: # %_ZNK11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd10BrickViewUE25inputDomainToVertexDomainERK8IntervalILi3EE.exit - lw s7, 12(s6) - lw s1, 20(s6) + mv a1, s1 + lw s6, 12(s1) + lw s1, 20(s1) .LBB538_5: # %_ZNK11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd10BrickViewUE25inputDomainToVertexDomainERK8IntervalILi3EE.exit - srli a0, s2, 32 + srli a0, s5, 32 sd a0, 56(sp) # 8-byte Folded Spill - mv a0, s6 - lw s6, 16(s6) - lw s2, 8(a0) - sd a0, 16(sp) # 8-byte Folded Spill - lw s9, 0(a0) - addi s10, s7, 1 - addi s11, s5, 1 - addi s8, s1, 1 + lw s5, 16(a1) + lw s8, 8(a1) + sd a1, 16(sp) # 8-byte Folded Spill + lw s9, 0(a1) + addi s10, s6, 1 + addi s11, s4, 1 + addi s7, s1, 1 li a0, 152 call _Znwm@plt ld a1, 32(sp) # 8-byte Folded Reload @@ -127711,11 +127712,11 @@ sw zero, 16(a0) sw s10, 20(a0) sw zero, 24(a0) - sw s8, 28(a0) + sw s7, 28(a0) sw zero, 32(a0) - sw s5, 36(a0) + sw s4, 36(a0) sw zero, 40(a0) - sw s7, 44(a0) + sw s6, 44(a0) sw zero, 48(a0) sw s1, 52(a0) sw zero, 56(a0) @@ -127723,11 +127724,11 @@ sw zero, 64(a0) sw s10, 68(a0) sw zero, 72(a0) - sw s8, 76(a0) + sw s7, 76(a0) sw zero, 80(a0) - sw s5, 84(a0) + sw s4, 84(a0) sw zero, 88(a0) - sw s7, 92(a0) + sw s6, 92(a0) sw zero, 96(a0) sw s1, 100(a0) fld fa5, 128(a1) @@ -127745,12 +127746,12 @@ fmadd.d fa5, fa5, ft0, fa4 fsd fa5, 104(a0) lw a2, 40(a1) - subw a2, s2, a2 + subw a2, s8, a2 fcvt.d.w fa5, a2 fmadd.d fa5, fa1, fa5, fa3 fsd fa5, 112(a0) lw a1, 48(a1) - subw a1, s6, a1 + subw a1, s5, a1 fcvt.d.w fa5, a1 fmadd.d fa5, fa0, fa5, fa2 fsd fa5, 120(a0) @@ -127758,34 +127759,34 @@ sd a0, 136(s0) li s5, 1 sw s5, 0(a0) - mulw s4, a1, s4 + mulw s4, a1, s2 mv a0, s3 mv a1, s4 call _ZN18RefCountedBlockPtrI19FieldEngineBaseDataILi3Ed10BrickViewUELb0E18RefBlockControllerIS2_EE7reserveEm - ld s3, 80(s0) - ld s6, 8(s3) - ld a1, 24(s3) + ld s2, 80(s0) + ld s3, 8(s2) + ld a1, 24(s2) li a0, 88 mul a0, s4, a0 - add a0, s6, a0 + add a0, s3, a0 bltu a1, a0, .LBB538_9 # %bb.6: # %if.then.i.i.i - sd a0, 16(s3) + sd a0, 16(s2) beqz s4, .LBB538_9 # %bb.7: # %for.body.i.i.i.preheader vsetivli zero, 2, e64, m1, ta, ma vmv.v.i v8, 0 addi a0, sp, 192 vs1r.v v8, (a0) # Unknown-size Folded Spill - li s2, 1 + li s4, 1 .LBB538_8: # %for.body.i.i.i # =>This Inner Loop Header: Depth=1 - sd zero, 16(s6) + sd zero, 16(s3) addi a0, sp, 192 vl1r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (s6) - addi a0, s6, 56 - sd zero, 72(s6) + vse64.v v8, (s3) + addi a0, s3, 56 + sd zero, 72(s3) vse64.v v8, (a0) li a0, 32 call _Znwm@plt @@ -127795,11 +127796,11 @@ addi a2, sp, 192 vl1r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a1) - sd a0, 80(s6) - sw s2, 0(a0) - ld a0, 16(s3) - addi s6, s6, 88 - bne s6, a0, .LBB538_8 + sd a0, 80(s3) + sw s4, 0(a0) + ld a0, 16(s2) + addi s3, s3, 88 + bne s3, a0, .LBB538_8 .LBB538_9: # %_ZN11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd10BrickViewUE12addSubFieldsEv.exit ld t4, 16(sp) # 8-byte Folded Reload lw a2, 0(t4) @@ -127825,7 +127826,7 @@ ld t1, 56(sp) # 8-byte Folded Reload and t1, t0, t1 sw a7, 108(s0) - ld s2, 32(sp) # 8-byte Folded Reload + ld s9, 32(sp) # 8-byte Folded Reload bne t1, s5, .LBB538_13 # %bb.10: # %if.then lw t1, 12(s0) @@ -127879,7 +127880,7 @@ # Child Loop BB538_57 Depth 3 # Child Loop BB538_52 Depth 3 lw a2, 12(s0) - lw s3, 92(s0) + lw a7, 92(s0) li a3, 1 bne a2, a3, .LBB538_19 # %bb.18: # %if.then.i74 @@ -127898,11 +127899,11 @@ add a2, a1, a2 lw a3, 0(a2) lw a4, 100(s0) - subw a3, s3, a3 + subw a3, a7, a3 lw a5, 4(a2) lw a6, 108(s0) lw a2, 8(a2) - addi s3, a3, 1 + addi a7, a3, 1 subw a4, a4, a5 addi a4, a4, 1 sd a4, 56(sp) # 8-byte Folded Spill @@ -127927,69 +127928,71 @@ # in Loop: Header=BB538_23 Depth=2 lw a0, 0(s0) addiw s11, s11, 1 + mv a7, s3 bge s11, a0, .LBB538_15 .LBB538_23: # %for.body21 # Parent Loop BB538_17 Depth=1 # => This Loop Header: Depth=2 # Child Loop BB538_57 Depth 3 # Child Loop BB538_52 Depth 3 - lw a0, 64(s2) - ld a1, 80(s2) - ld a2, 72(s2) + lw a0, 64(s9) + ld a1, 80(s9) + ld a2, 72(s9) mul a0, a0, s11 addw a0, a0, s6 - ld s4, 8(a1) + ld s2, 8(a1) li a3, 88 mul a1, a2, a3 mul a0, a0, a3 add a0, a1, a0 - add s4, s4, a0 - lw a0, 48(s4) + add s2, s2, a0 + lw a0, 48(s2) sw a0, 112(sp) - lbu a1, 52(s4) + lbu a1, 52(s2) sb a1, 116(sp) sw zero, 64(sp) - sw s3, 68(sp) - lw a1, 36(s4) + mv s3, a7 + sw a7, 68(sp) + lw a1, 36(s2) sw a1, 88(sp) sw a1, 100(sp) - lw a1, 36(s4) + lw a1, 36(s2) mul a1, a1, s7 add a0, a1, a0 sw a0, 112(sp) sw zero, 72(sp) ld a1, 56(sp) # 8-byte Folded Reload sw a1, 76(sp) - lw a1, 40(s4) + lw a1, 40(s2) sw a1, 92(sp) sw a1, 104(sp) - lw a1, 40(s4) + lw a1, 40(s2) mul a1, a1, s10 add a0, a1, a0 sw a0, 112(sp) sw zero, 80(sp) ld a1, 48(sp) # 8-byte Folded Reload sw a1, 84(sp) - lw a1, 44(s4) + lw a1, 44(s2) sw a1, 96(sp) sw a1, 108(sp) - lw a1, 44(s4) + lw a1, 44(s2) ld a4, 40(sp) # 8-byte Folded Reload mul a1, a1, a4 add a0, a1, a0 sw a0, 112(sp) - lw a0, 24(s4) - lw a1, 28(s4) - lw a2, 32(s4) + lw a0, 24(s2) + lw a1, 28(s2) + lw a2, 32(s2) mul a0, a0, s7 mul a1, a1, s10 - ld a3, 56(s4) + ld a3, 56(s2) mul a2, a2, a4 add a0, a1, a0 addw a0, a0, a2 add a1, a3, a0 sd a1, 120(sp) - ld a2, 64(s4) + ld a2, 64(s2) sd a2, 128(sp) lw a0, 0(a2) addi a0, a0, 1 @@ -128019,7 +128022,7 @@ .LBB538_25: # %_ZN6EngineILi3Ed10BrickViewUEC2I12DomainTraitsI8IntervalILi3EEEEERKS1_RK6DomainILi3ET_E.exit # in Loop: Header=BB538_23 Depth=2 ld a0, 8(a2) - addi a2, s4, 80 + addi a2, s2, 80 slli a1, a1, 3 add a0, a0, a1 sd a0, 136(sp) @@ -128038,47 +128041,47 @@ ld a2, 72(s0) mul a0, a0, s11 addw a0, a0, s6 - ld s9, 8(a1) + ld s2, 8(a1) li a3, 88 mul a1, a2, a3 mul a0, a0, a3 add a0, a1, a0 - add s9, s9, a0 + add s2, s2, a0 addi a0, sp, 64 - beq s9, a0, .LBB538_29 + beq s2, a0, .LBB538_29 # %bb.28: # %if.end.i.i # in Loop: Header=BB538_23 Depth=2 lw a0, 64(sp) - sw a0, 0(s9) + sw a0, 0(s2) lw a0, 68(sp) - sw a0, 4(s9) + sw a0, 4(s2) lw a0, 72(sp) - sw a0, 8(s9) + sw a0, 8(s2) lw a0, 76(sp) - sw a0, 12(s9) + sw a0, 12(s2) lw a0, 80(sp) - sw a0, 16(s9) + sw a0, 16(s2) lw a0, 84(sp) - sw a0, 20(s9) + sw a0, 20(s2) vsetivli zero, 2, e64, m1, ta, ma addi a1, sp, 88 vle64.v v8, (a1) - addi a0, s9, 24 + addi a0, s2, 24 vse64.v v8, (a0) addi a0, a1, 13 vsetivli zero, 16, e8, m1, ta, ma vle8.v v8, (a0) - addi a0, s9, 37 + addi a0, s2, 37 vse8.v v8, (a0) - addi a0, s9, 56 + addi a0, s2, 56 addi a1, sp, 120 call _ZN12DataBlockPtrIdLb0EEaSERKS0_ ld a0, 136(sp) - sd a0, 72(s9) + sd a0, 72(s2) ld s4, 144(sp) .LBB538_29: # %_ZN6EngineILi3Ed10BrickViewUEaSERKS1_.exit.i # in Loop: Header=BB538_23 Depth=2 - ld s5, 80(s9) + ld s5, 80(s2) beq s5, s4, .LBB538_35 # %bb.30: # %if.then.i.i.i104 # in Loop: Header=BB538_23 Depth=2 @@ -128091,7 +128094,7 @@ beqz a0, .LBB538_54 .LBB538_32: # %if.end.i.i.i # in Loop: Header=BB538_23 Depth=2 - addi a0, s9, 80 + addi a0, s2, 80 sd s4, 0(a0) beqz s4, .LBB538_34 .LBB538_33: # %if.then10.i.i.i @@ -128193,21 +128196,21 @@ beq a2, a0, .LBB538_59 # %bb.50: # %for.body.i.i.i.i.i.preheader # in Loop: Header=BB538_23 Depth=2 - li s5, 0 li s2, 0 + li s5, 0 j .LBB538_52 .LBB538_51: # %for.inc.i.i.i.i.i # in Loop: Header=BB538_52 Depth=3 - addi s2, s2, 1 + addi s5, s5, 1 sub a1, a2, a0 srai a1, a1, 3 - addi s5, s5, 8 - bgeu s2, a1, .LBB538_60 + addi s2, s2, 8 + bgeu s5, a1, .LBB538_60 .LBB538_52: # %for.body.i.i.i.i.i # Parent Loop BB538_17 Depth=1 # Parent Loop BB538_23 Depth=2 # => This Inner Loop Header: Depth=3 - add a1, a0, s5 + add a1, a0, s2 ld a1, 0(a1) beqz a1, .LBB538_51 # %bb.53: # %delete.notnull.i.i.i.i.i @@ -128227,15 +128230,15 @@ # %bb.55: # %for.body.i.i.i.i.preheader # in Loop: Header=BB538_23 Depth=2 li s4, 0 - li s2, 0 + li s9, 0 j .LBB538_57 .LBB538_56: # %for.inc.i.i.i.i # in Loop: Header=BB538_57 Depth=3 - addi s2, s2, 1 + addi s9, s9, 1 sub a1, a2, a0 srai a1, a1, 3 addi s4, s4, 8 - bgeu s2, a1, .LBB538_64 + bgeu s9, a1, .LBB538_64 .LBB538_57: # %for.body.i.i.i.i # Parent Loop BB538_17 Depth=1 # Parent Loop BB538_23 Depth=2 @@ -128256,7 +128259,6 @@ mv a0, a2 .LBB538_60: # %for.cond.cleanup.i.i.i.i.i # in Loop: Header=BB538_23 Depth=2 - ld s2, 32(sp) # 8-byte Folded Reload beqz a0, .LBB538_62 # %bb.61: # %if.then.i.i.i.i.i.i.i.i # in Loop: Header=BB538_23 Depth=2 @@ -128273,7 +128275,7 @@ mv a0, a2 .LBB538_64: # %for.cond.cleanup.i.i.i.i # in Loop: Header=BB538_23 Depth=2 - ld s2, 32(sp) # 8-byte Folded Reload + ld s9, 32(sp) # 8-byte Folded Reload beqz a0, .LBB538_66 # %bb.65: # %if.then.i.i.i.i.i.i.i # in Loop: Header=BB538_23 Depth=2 @@ -128283,7 +128285,7 @@ mv a0, s5 call _ZdlPv@plt ld s4, 144(sp) - addi a0, s9, 80 + addi a0, s2, 80 sd s4, 0(a0) bnez s4, .LBB538_33 j .LBB538_34 @@ -171084,18 +171086,18 @@ slli a3, a3, 1 sub sp, sp, a3 .cfi_escape 0x0f, 0x0e, 0x72, 0x00, 0x11, 0xc0, 0x02, 0x22, 0x11, 0x02, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 320 + 2 * vlenb - mv s1, a1 + mv s2, a1 + sd a1, 40(sp) # 8-byte Folded Spill lw a1, 0(a1) - mv s6, a2 + mv s1, a2 mv s0, a0 - li s2, -1 + li s5, -1 sw a1, 0(a0) addi a0, a0, 8 - addi a1, s1, 8 + addi a1, s2, 8 call _ZN9CenteringILi3EEC2ERKS0_ - ld a0, 24(s1) - sd s1, 40(sp) # 8-byte Folded Spill - ld a1, 16(s1) + ld a0, 24(s2) + ld a1, 16(s2) sub a0, a0, a1 srli a0, a0, 2 lui a1, 699051 @@ -171111,44 +171113,45 @@ vmv.v.i v8, 0 sub a2, a2, a0 srai a2, a2, 2 - mul s4, a2, a1 + mul s2, a2, a1 mulw a2, a2, a1 li a1, 1 vse64.v v8, (s3) bne a2, a1, .LBB688_3 # %bb.1: # %if.then.i lw a2, 12(s0) - lw s5, 4(s6) + lw s4, 4(s1) beq a2, a1, .LBB688_4 # %bb.2: # %if.else.i.i lw a1, 0(a0) - lw a2, 12(s6) + lw a2, 12(s1) lw a3, 4(a0) - lw a4, 20(s6) + lw a4, 20(s1) lw a0, 8(a0) - add a1, s5, a1 - addi s5, a1, -1 + add a1, s4, a1 + addi s4, a1, -1 add a2, a2, a3 - addi s7, a2, -1 + mv a1, s1 + addi s6, a2, -1 add a0, a4, a0 addi s1, a0, -1 j .LBB688_5 .LBB688_3: # %if.else.i - lw s5, 4(s6) + lw s4, 4(s1) .LBB688_4: # %_ZNK11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd7CompFwdI6EngineILi3E6VectorILi3Ed4FullE10BrickViewUE3LocILi1EEEE25inputDomainToVertexDomainERK8IntervalILi3EE.exit - lw s7, 12(s6) - lw s1, 20(s6) + mv a1, s1 + lw s6, 12(s1) + lw s1, 20(s1) .LBB688_5: # %_ZNK11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd7CompFwdI6EngineILi3E6VectorILi3Ed4FullE10BrickViewUE3LocILi1EEEE25inputDomainToVertexDomainERK8IntervalILi3EE.exit - srli a0, s2, 32 + srli a0, s5, 32 sd a0, 64(sp) # 8-byte Folded Spill - mv a0, s6 - lw s6, 16(s6) - lw s2, 8(a0) - sd a0, 24(sp) # 8-byte Folded Spill - lw s9, 0(a0) - addi s10, s7, 1 - addi s11, s5, 1 - addi s8, s1, 1 + lw s5, 16(a1) + lw s8, 8(a1) + sd a1, 24(sp) # 8-byte Folded Spill + lw s9, 0(a1) + addi s10, s6, 1 + addi s11, s4, 1 + addi s7, s1, 1 li a0, 152 call _Znwm@plt ld a1, 40(sp) # 8-byte Folded Reload @@ -171158,11 +171161,11 @@ sw zero, 16(a0) sw s10, 20(a0) sw zero, 24(a0) - sw s8, 28(a0) + sw s7, 28(a0) sw zero, 32(a0) - sw s5, 36(a0) + sw s4, 36(a0) sw zero, 40(a0) - sw s7, 44(a0) + sw s6, 44(a0) sw zero, 48(a0) sw s1, 52(a0) sw zero, 56(a0) @@ -171170,11 +171173,11 @@ sw zero, 64(a0) sw s10, 68(a0) sw zero, 72(a0) - sw s8, 76(a0) + sw s7, 76(a0) sw zero, 80(a0) - sw s5, 84(a0) + sw s4, 84(a0) sw zero, 88(a0) - sw s7, 92(a0) + sw s6, 92(a0) sw zero, 96(a0) sw s1, 100(a0) fld fa5, 128(a1) @@ -171192,12 +171195,12 @@ fmadd.d fa5, fa5, ft0, fa4 fsd fa5, 104(a0) lw a2, 40(a1) - subw a2, s2, a2 + subw a2, s8, a2 fcvt.d.w fa5, a2 fmadd.d fa5, fa1, fa5, fa3 fsd fa5, 112(a0) lw a1, 48(a1) - subw a1, s6, a1 + subw a1, s5, a1 fcvt.d.w fa5, a1 fmadd.d fa5, fa0, fa5, fa2 fsd fa5, 120(a0) @@ -171205,35 +171208,35 @@ sd a0, 136(s0) li s5, 1 sw s5, 0(a0) - mulw s4, a1, s4 + mulw s4, a1, s2 mv a0, s3 mv a1, s4 call _ZN18RefCountedBlockPtrI19FieldEngineBaseDataILi3Ed7CompFwdI6EngineILi3E6VectorILi3Ed4FullE10BrickViewUE3LocILi1EEEELb0E18RefBlockControllerISB_EE7reserveEm - ld s3, 80(s0) - ld s6, 8(s3) - ld a1, 24(s3) + ld s2, 80(s0) + ld s3, 8(s2) + ld a1, 24(s2) li a0, 96 mul a0, s4, a0 - add a0, s6, a0 + add a0, s3, a0 bltu a1, a0, .LBB688_9 # %bb.6: # %if.then.i.i.i - sd a0, 16(s3) + sd a0, 16(s2) beqz s4, .LBB688_9 # %bb.7: # %for.body.i.i.i.preheader vsetivli zero, 2, e64, m1, ta, ma vmv.v.i v8, 0 addi a0, sp, 208 vs1r.v v8, (a0) # Unknown-size Folded Spill - li s2, 1 + li s4, 1 .LBB688_8: # %for.body.i.i.i # =>This Inner Loop Header: Depth=1 - sd zero, 16(s6) + sd zero, 16(s3) addi a0, sp, 208 vl1r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (s6) - addi a0, s6, 56 + vse64.v v8, (s3) + addi a0, s3, 56 vse64.v v8, (a0) - addi a0, s6, 68 + addi a0, s3, 68 vsetivli zero, 16, e8, m1, ta, ma vse8.v v8, (a0) li a0, 32 @@ -171244,11 +171247,11 @@ addi a2, sp, 208 vl1r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a1) - sd a0, 88(s6) - sw s2, 0(a0) - ld a0, 16(s3) - addi s6, s6, 96 - bne s6, a0, .LBB688_8 + sd a0, 88(s3) + sw s4, 0(a0) + ld a0, 16(s2) + addi s3, s3, 96 + bne s3, a0, .LBB688_8 .LBB688_9: # %_ZN11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd7CompFwdI6EngineILi3E6VectorILi3Ed4FullE10BrickViewUE3LocILi1EEEE12addSubFieldsEv.exit ld t4, 24(sp) # 8-byte Folded Reload lw a2, 0(t4) @@ -171274,7 +171277,7 @@ ld t1, 64(sp) # 8-byte Folded Reload and t1, t0, t1 sw a7, 108(s0) - ld s2, 40(sp) # 8-byte Folded Reload + ld s9, 40(sp) # 8-byte Folded Reload bne t1, s5, .LBB688_13 # %bb.10: # %if.then lw t1, 12(s0) @@ -171328,7 +171331,7 @@ # Child Loop BB688_57 Depth 3 # Child Loop BB688_52 Depth 3 lw a2, 12(s0) - lw s10, 92(s0) + lw a7, 92(s0) li a3, 1 bne a2, a3, .LBB688_19 # %bb.18: # %if.then.i74 @@ -171347,11 +171350,11 @@ add a2, a1, a2 lw a3, 0(a2) lw a4, 100(s0) - subw a3, s10, a3 + subw a3, a7, a3 lw a5, 4(a2) lw a6, 108(s0) lw a2, 8(a2) - addi s10, a3, 1 + addi a7, a3, 1 subw a4, a4, a5 addi a4, a4, 1 sd a4, 64(sp) # 8-byte Folded Spill @@ -171376,69 +171379,71 @@ # in Loop: Header=BB688_23 Depth=2 lw a0, 0(s0) addiw s8, s8, 1 + mv a7, s10 bge s8, a0, .LBB688_15 .LBB688_23: # %for.body21 # Parent Loop BB688_17 Depth=1 # => This Loop Header: Depth=2 # Child Loop BB688_57 Depth 3 # Child Loop BB688_52 Depth 3 - lw a0, 64(s2) - ld a1, 80(s2) - ld a2, 72(s2) + lw a0, 64(s9) + ld a1, 80(s9) + ld a2, 72(s9) mul a0, a0, s8 addw a0, a0, s6 - ld s4, 8(a1) + ld s2, 8(a1) li a3, 96 mul a1, a2, a3 mul a0, a0, a3 add a0, a1, a0 - add s4, s4, a0 - lw a0, 48(s4) + add s2, s2, a0 + lw a0, 48(s2) sw a0, 120(sp) - lbu a1, 52(s4) + lbu a1, 52(s2) sb a1, 124(sp) sw zero, 72(sp) - sw s10, 76(sp) - lw a1, 36(s4) + mv s10, a7 + sw a7, 76(sp) + lw a1, 36(s2) sw a1, 96(sp) sw a1, 108(sp) - lw a1, 36(s4) + lw a1, 36(s2) mul a1, a1, s7 add a0, a1, a0 sw a0, 120(sp) sw zero, 80(sp) ld a1, 64(sp) # 8-byte Folded Reload sw a1, 84(sp) - lw a1, 40(s4) + lw a1, 40(s2) sw a1, 100(sp) sw a1, 112(sp) - lw a1, 40(s4) + lw a1, 40(s2) mul a1, a1, s11 add a0, a1, a0 sw a0, 120(sp) sw zero, 88(sp) ld a1, 56(sp) # 8-byte Folded Reload sw a1, 92(sp) - lw a1, 44(s4) + lw a1, 44(s2) sw a1, 104(sp) sw a1, 116(sp) - lw a1, 44(s4) + lw a1, 44(s2) ld a4, 48(sp) # 8-byte Folded Reload mul a1, a1, a4 add a0, a1, a0 sw a0, 120(sp) - lw a0, 24(s4) - lw a1, 28(s4) - lw a2, 32(s4) + lw a0, 24(s2) + lw a1, 28(s2) + lw a2, 32(s2) mul a0, a0, s7 mul a1, a1, s11 - ld a3, 56(s4) + ld a3, 56(s2) mul a2, a2, a4 add a0, a1, a0 addw a0, a0, a2 add a1, a3, a0 sd a1, 128(sp) - ld a2, 64(s4) + ld a2, 64(s2) sd a2, 136(sp) lw a0, 0(a2) addi a0, a0, 1 @@ -171472,8 +171477,8 @@ mul a1, a1, a2 add a0, a0, a1 sd a0, 144(sp) - lw a0, 80(s4) - addi a1, s4, 88 + lw a0, 80(s2) + addi a1, s2, 88 sw a0, 152(sp) ld s4, 0(a1) sd s4, 160(sp) @@ -171490,49 +171495,49 @@ ld a3, 72(s0) mul a1, a1, s8 addw a1, a1, s6 - ld s9, 8(a2) + ld s2, 8(a2) li a4, 96 mul a2, a3, a4 mul a1, a1, a4 add a1, a2, a1 - add s9, s9, a1 + add s2, s2, a1 addi a1, sp, 72 - beq s9, a1, .LBB688_29 + beq s2, a1, .LBB688_29 # %bb.28: # %if.end.i.i.i # in Loop: Header=BB688_23 Depth=2 lw a0, 72(sp) - sw a0, 0(s9) + sw a0, 0(s2) lw a0, 76(sp) - sw a0, 4(s9) + sw a0, 4(s2) lw a0, 80(sp) - sw a0, 8(s9) + sw a0, 8(s2) lw a0, 84(sp) - sw a0, 12(s9) + sw a0, 12(s2) lw a0, 88(sp) - sw a0, 16(s9) + sw a0, 16(s2) lw a0, 92(sp) - sw a0, 20(s9) + sw a0, 20(s2) vsetivli zero, 2, e64, m1, ta, ma addi a1, sp, 96 vle64.v v8, (a1) - addi a0, s9, 24 + addi a0, s2, 24 vse64.v v8, (a0) addi a0, a1, 13 vsetivli zero, 16, e8, m1, ta, ma vle8.v v8, (a0) - addi a0, s9, 37 + addi a0, s2, 37 vse8.v v8, (a0) - addi a0, s9, 56 + addi a0, s2, 56 addi a1, sp, 128 call _ZN12DataBlockPtrI6VectorILi3Ed4FullELb0EEaSERKS3_ ld a0, 144(sp) - sd a0, 72(s9) + sd a0, 72(s2) lw a0, 152(sp) ld s4, 160(sp) .LBB688_29: # %_ZN6EngineILi3Ed7CompFwdIS_ILi3E6VectorILi3Ed4FullE10BrickViewUE3LocILi1EEEEaSERKS9_.exit.i # in Loop: Header=BB688_23 Depth=2 - ld s5, 88(s9) - sw a0, 80(s9) + ld s5, 88(s2) + sw a0, 80(s2) beq s5, s4, .LBB688_35 # %bb.30: # %if.then.i.i.i106 # in Loop: Header=BB688_23 Depth=2 @@ -171545,7 +171550,7 @@ beqz a0, .LBB688_54 .LBB688_32: # %if.end.i.i2.i # in Loop: Header=BB688_23 Depth=2 - addi a0, s9, 88 + addi a0, s2, 88 sd s4, 0(a0) beqz s4, .LBB688_34 .LBB688_33: # %if.then10.i.i.i @@ -171647,21 +171652,21 @@ beq a2, a0, .LBB688_59 # %bb.50: # %for.body.i.i.i.i.i.preheader # in Loop: Header=BB688_23 Depth=2 - li s5, 0 li s2, 0 + li s5, 0 j .LBB688_52 .LBB688_51: # %for.inc.i.i.i.i.i # in Loop: Header=BB688_52 Depth=3 - addi s2, s2, 1 + addi s5, s5, 1 sub a1, a2, a0 srai a1, a1, 3 - addi s5, s5, 8 - bgeu s2, a1, .LBB688_60 + addi s2, s2, 8 + bgeu s5, a1, .LBB688_60 .LBB688_52: # %for.body.i.i.i.i.i # Parent Loop BB688_17 Depth=1 # Parent Loop BB688_23 Depth=2 # => This Inner Loop Header: Depth=3 - add a1, a0, s5 + add a1, a0, s2 ld a1, 0(a1) beqz a1, .LBB688_51 # %bb.53: # %delete.notnull.i.i.i.i.i @@ -171681,15 +171686,15 @@ # %bb.55: # %for.body.i.i.i.i.preheader # in Loop: Header=BB688_23 Depth=2 li s4, 0 - li s2, 0 + li s9, 0 j .LBB688_57 .LBB688_56: # %for.inc.i.i.i.i # in Loop: Header=BB688_57 Depth=3 - addi s2, s2, 1 + addi s9, s9, 1 sub a1, a2, a0 srai a1, a1, 3 addi s4, s4, 8 - bgeu s2, a1, .LBB688_64 + bgeu s9, a1, .LBB688_64 .LBB688_57: # %for.body.i.i.i.i # Parent Loop BB688_17 Depth=1 # Parent Loop BB688_23 Depth=2 @@ -171710,7 +171715,6 @@ mv a0, a2 .LBB688_60: # %for.cond.cleanup.i.i.i.i.i # in Loop: Header=BB688_23 Depth=2 - ld s2, 40(sp) # 8-byte Folded Reload beqz a0, .LBB688_62 # %bb.61: # %if.then.i.i.i.i.i.i.i.i # in Loop: Header=BB688_23 Depth=2 @@ -171727,7 +171731,7 @@ mv a0, a2 .LBB688_64: # %for.cond.cleanup.i.i.i.i # in Loop: Header=BB688_23 Depth=2 - ld s2, 40(sp) # 8-byte Folded Reload + ld s9, 40(sp) # 8-byte Folded Reload beqz a0, .LBB688_66 # %bb.65: # %if.then.i.i.i.i.i.i.i # in Loop: Header=BB688_23 Depth=2 @@ -171737,7 +171741,7 @@ mv a0, s5 call _ZdlPv@plt ld s4, 160(sp) - addi a0, s9, 88 + addi a0, s2, 88 sd s4, 0(a0) bnez s4, .LBB688_33 j .LBB688_34 @@ -172546,18 +172550,18 @@ ld s5, 8(a0) ld s1, 72(s0) vsetivli zero, 4, e32, m1, ta, ma + csrr a0, vlenb + add a0, sp, a0 + addi a0, a0, 304 + vl1r.v v8, (a0) # Unknown-size Folded Reload addi a0, sp, 80 - csrr a1, vlenb - add a1, sp, a1 - addi a1, a1, 304 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) vsetivli zero, 2, e32, mf2, ta, ma addi a0, sp, 48 vle64.v v8, (a0) + addi a0, sp, 304 + vl1r.v v9, (a0) # Unknown-size Folded Reload addi a0, sp, 96 - addi a1, sp, 304 - vl1r.v v9, (a1) # Unknown-size Folded Reload vse32.v v9, (a0) addi s6, sp, 104 vse64.v v8, (s6) --- build.head//MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/CMakeFiles/timberwolfmc.dir/finalpin.s 2023-11-13 08:03:22.699548805 +0000 +++ build//MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/CMakeFiles/timberwolfmc.dir/finalpin.s 2023-11-13 08:03:17.735692291 +0000 @@ -1142,7 +1142,6 @@ add t3, sp, a0 .LBB0_95: # %if.end554 # in Loop: Header=BB0_16 Depth=2 - ld t2, 120(sp) # 8-byte Folded Reload csrr a0, vlenb li a1, 13 mul a0, a0, a1 @@ -1159,6 +1158,7 @@ addiw a1, a1, -1920 add a0, a0, a1 vl2r.v v20, (a0) # Unknown-size Folded Reload + ld t2, 120(sp) # 8-byte Folded Reload blez s9, .LBB0_97 # %bb.96: # %land.lhs.true # in Loop: Header=BB0_16 Depth=2 @@ -1722,7 +1722,6 @@ ld a1, 184(sp) # 8-byte Folded Reload ld a3, %pcrel_lo(.Lpcrel_hi6)(a1) lw a1, 20(a3) - ld ra, 120(sp) # 8-byte Folded Reload csrr a4, vlenb li a5, 13 mul a4, a4, a5 @@ -1731,6 +1730,7 @@ addiw a5, a5, -1920 add a4, a4, a5 vl2r.v v12, (a4) # Unknown-size Folded Reload + ld ra, 120(sp) # 8-byte Folded Reload bne a1, s5, .LBB0_163 # %bb.158: # %for.cond930.preheader1319 # in Loop: Header=BB0_16 Depth=2 @@ -1774,7 +1774,6 @@ .LBB0_162: # %for.end944.thread # in Loop: Header=BB0_16 Depth=2 li a1, 0 - ld ra, 120(sp) # 8-byte Folded Reload csrr a2, vlenb li a3, 13 mul a2, a2, a3 @@ -1799,6 +1798,7 @@ addiw a3, a3, -1920 add a2, a2, a3 vl2r.v v16, (a2) # Unknown-size Folded Reload + ld ra, 120(sp) # 8-byte Folded Reload j .LBB0_171 .LBB0_163: # in Loop: Header=BB0_16 Depth=2 li a1, 0 @@ -1941,14 +1941,14 @@ # %bb.182: # %for.body1098.preheader # in Loop: Header=BB0_176 Depth=4 mv t5, a0 - li s1, 24 - mv s0, s8 - bgeu s1, s8, .LBB0_192 + li s0, 24 + mv s1, s8 + bgeu s0, s8, .LBB0_192 .LBB0_183: # %for.body1098.preheader # in Loop: Header=BB0_176 Depth=4 - sub s1, t5, t4 + sub s0, t5, t4 li t5, 1 - bgeu s1, s0, .LBB0_193 + bgeu s0, s1, .LBB0_193 j .LBB0_199 .LBB0_184: # %if.then995 # in Loop: Header=BB0_176 Depth=4 @@ -2005,15 +2005,15 @@ j .LBB0_173 .LBB0_191: # %for.body1098.preheader # in Loop: Header=BB0_176 Depth=4 - li s1, 24 - mv s0, s8 - bltu s1, s8, .LBB0_183 + li s0, 24 + mv s1, s8 + bltu s0, s8, .LBB0_183 .LBB0_192: # %for.body1098.preheader # in Loop: Header=BB0_176 Depth=4 - li s0, 24 - sub s1, t5, t4 + li s1, 24 + sub s0, t5, t4 li t5, 1 - bltu s1, s0, .LBB0_199 + bltu s0, s1, .LBB0_199 .LBB0_193: # %vector.memcheck # in Loop: Header=BB0_176 Depth=4 addi s3, t4, 1 @@ -2023,14 +2023,14 @@ mv s3, a0 .LBB0_195: # %vector.memcheck # in Loop: Header=BB0_176 Depth=4 - slli s0, t4, 4 - add s0, a2, s0 + slli s1, t4, 4 + add s1, a2, s1 slli s4, s3, 4 add s4, a4, s4 sub s3, s3, t4 slli s3, s3, 2 add s3, t6, s3 - sltu s3, s0, s3 + sltu s3, s1, s3 sltu t6, t6, s4 and t6, s3, t6 bnez t6, .LBB0_199 @@ -2039,7 +2039,7 @@ ld t5, 144(sp) # 8-byte Folded Reload srli t5, t5, 1 neg t5, t5 - and t6, s1, t5 + and t6, s0, t5 addi t5, t6, 1 add t4, t6, t4 vsetvli s3, zero, e32, m2, ta, ma @@ -2054,19 +2054,19 @@ # Parent Loop BB0_176 Depth=4 # => This Inner Loop Header: Depth=5 vl2re32.v v8, (s4) - vsse32.v v8, (s0), s10 - addi s6, s0, 4 + vsse32.v v8, (s1), s10 + addi s6, s1, 4 vsse32.v v12, (s6), s10 add s4, s4, s11 sub s3, s3, s8 - add s0, s0, ra + add s1, s1, ra bnez s3, .LBB0_197 # %bb.198: # %middle.block986 # in Loop: Header=BB0_176 Depth=4 addi s11, sp, 1428 li s10, 404 addi s6, sp, 1020 - beq s1, t6, .LBB0_214 + beq s0, t6, .LBB0_214 .LBB0_199: # %for.body1098.preheader1213 # in Loop: Header=BB0_176 Depth=4 slli t5, t5, 2 @@ -2100,9 +2100,9 @@ mv s0, a0 .LBB0_204: # %for.body1125.preheader # in Loop: Header=BB0_176 Depth=4 - sub s1, s0, t4 - li s0, 32 - bltu s1, s0, .LBB0_212 + sub s0, s0, t4 + li s1, 32 + bltu s0, s1, .LBB0_212 # %bb.205: # %vector.memcheck1007 # in Loop: Header=BB0_176 Depth=4 addi s3, t4, 1 @@ -2112,8 +2112,8 @@ mv s3, a0 .LBB0_207: # %vector.memcheck1007 # in Loop: Header=BB0_176 Depth=4 - slli s0, t4, 4 - add s0, a2, s0 + slli s1, t4, 4 + add s1, a2, s1 slli s4, s3, 4 add s4, a4, s4 add s6, t4, t5 @@ -2122,7 +2122,7 @@ add s6, t6, s3 slli s3, t5, 2 add t6, t6, s3 - sltu t6, s0, t6 + sltu t6, s1, t6 sltu s4, s6, s4 and t6, t6, s4 beqz t6, .LBB0_209 @@ -2131,7 +2131,7 @@ j .LBB0_212 .LBB0_209: # %vector.ph1022 # in Loop: Header=BB0_176 Depth=4 - andi t6, s1, -8 + andi t6, s0, -8 sub t5, t5, t6 add t4, t6, t4 add s3, a7, s3 @@ -2146,18 +2146,18 @@ # => This Inner Loop Header: Depth=5 vle32.v v8, (s3) vrgatherei16.vv v10, v8, v14 - vsse32.v v10, (s0), s10 - addi s6, s0, 4 + vsse32.v v10, (s1), s10 + addi s6, s1, 4 vsse32.v v16, (s6), s10 addi s4, s4, -8 addi s3, s3, -32 - addi s0, s0, 128 + addi s1, s1, 128 bnez s4, .LBB0_210 # %bb.211: # %middle.block1019 # in Loop: Header=BB0_176 Depth=4 li s10, 404 addi s6, sp, 1020 - beq s1, t6, .LBB0_214 + beq s0, t6, .LBB0_214 .LBB0_212: # %for.body1125.preheader1214 # in Loop: Header=BB0_176 Depth=4 slli t5, t5, 2 @@ -2806,11 +2806,11 @@ addi a2, a5, 2 vsetvli t0, zero, e64, m4, ta, ma vmv.v.x v8, a7 + lui a7, 2 + addiw a7, a7, -1920 + add a7, sp, a7 + vl4r.v v16, (a7) # Unknown-size Folded Reload li a7, -1 - lui t0, 2 - addiw t0, t0, -1920 - add t0, sp, t0 - vl4r.v v16, (t0) # Unknown-size Folded Reload vmacc.vx v8, a7, v16 mv a7, a5 lui t0, 1 --- build.head//MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/me_fullfast.s 2023-11-13 08:03:22.259561523 +0000 +++ build//MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/me_fullfast.s 2023-11-13 08:03:17.311704547 +0000 @@ -3385,12 +3385,6 @@ vmv.v.i v20, 0 vsetvli a0, zero, e32, m2, ta, ma vmv.v.i v22, 0 - sd s1, 136(sp) # 8-byte Folded Spill - sd s5, 128(sp) # 8-byte Folded Spill - sd s6, 120(sp) # 8-byte Folded Spill - sd s9, 112(sp) # 8-byte Folded Spill - sd t1, 192(sp) # 8-byte Folded Spill - sd t2, 184(sp) # 8-byte Folded Spill csrr a0, vlenb slli a0, a0, 1 add a0, sp, a0 @@ -3398,6 +3392,12 @@ vs1r.v v20, (a0) # Unknown-size Folded Spill addi a0, sp, 320 vs2r.v v22, (a0) # Unknown-size Folded Spill + sd s1, 136(sp) # 8-byte Folded Spill + sd s5, 128(sp) # 8-byte Folded Spill + sd s6, 120(sp) # 8-byte Folded Spill + sd s9, 112(sp) # 8-byte Folded Spill + sd t1, 192(sp) # 8-byte Folded Spill + sd t2, 184(sp) # 8-byte Folded Spill j .LBB4_49 .LBB4_48: # %for.inc997 # in Loop: Header=BB4_49 Depth=1 --- build.head//MultiSource/Benchmarks/MiBench/consumer-jpeg/CMakeFiles/consumer-jpeg.dir/jdsample.s 2023-11-13 08:03:22.623551000 +0000 +++ build//MultiSource/Benchmarks/MiBench/consumer-jpeg/CMakeFiles/consumer-jpeg.dir/jdsample.s 2023-11-13 08:03:17.655694604 +0000 @@ -800,20 +800,20 @@ add t4, a3, t6 ld t4, 0(t4) lbu s3, 0(t2) - slli s7, t5, 1 + slli s8, t5, 1 lbu s4, 1(a6) lbu s5, 1(t2) add t5, t5, s3 - add s7, s7, t5 + add s8, s8, t5 slli s6, s4, 1 add s4, s4, s5 add s6, s6, s4 - slli t5, s7, 2 + slli t5, s8, 2 addi t5, t5, 8 srli t5, t5, 4 sb t5, 0(t4) - slli t5, s7, 1 - add s3, s7, s6 + slli t5, s8, 1 + add s3, s8, s6 add t5, t5, s3 addi t5, t5, 7 srli t5, t5, 4 @@ -850,25 +850,25 @@ beqz a6, .LBB7_19 .LBB7_7: # in Loop: Header=BB7_4 Depth=1 mv s5, s4 - mv s8, t4 + mv s7, t4 mv s9, ra mv s10, s11 .LBB7_8: # %for.body32.preheader196 # in Loop: Header=BB7_4 Depth=1 - mv a6, s7 + mv a6, s8 .LBB7_9: # %for.body32 # Parent Loop BB7_4 Depth=1 # => This Inner Loop Header: Depth=2 lbu t2, 0(s10) - mv s7, s6 + mv s8, s6 lbu t4, 0(s9) addi s10, s10, 1 slli s6, t2, 1 addi s9, s9, 1 add t2, t2, t4 add s6, s6, t2 - slli t2, s7, 1 - add t2, t2, s7 + slli t2, s8, 1 + add t2, t2, s8 add a6, a6, t2 addi a6, a6, 8 srli a6, a6, 4 @@ -876,11 +876,11 @@ add t2, t2, s6 addi t2, t2, 7 srli a6, t2, 4 - sb a6, 3(s8) + sb a6, 3(s7) addiw s3, s3, -1 - mv s8, s5 + mv s7, s5 addi s5, s5, 2 - mv a6, s7 + mv a6, s8 bnez s3, .LBB7_9 # %bb.10: # %for.end.loopexit # in Loop: Header=BB7_4 Depth=1 @@ -892,8 +892,8 @@ # in Loop: Header=BB7_4 Depth=1 addi a4, a4, 1 slli a6, s6, 1 - add s7, s7, s6 - add a6, s7, a6 + add s8, s8, s6 + add a6, s8, a6 addi a6, a6, 8 srli a6, a6, 4 sb a6, 0(s5) @@ -1005,12 +1005,12 @@ slli t2, a6, 1 add s5, s4, t2 subw s3, s3, a6 - add s8, t4, t2 + add s7, t4, t2 add s9, ra, a6 add s10, s11, a6 li a7, 32 vsetvli zero, a7, e32, m8, ta, ma - vmv.v.x v16, s7 + vmv.v.x v16, s8 vmv.v.x v8, s6 mv s6, a6 .LBB7_20: # %vector.body142 @@ -1088,7 +1088,7 @@ addi a7, sp, 256 vse32.v v8, (a7) lw s6, 380(sp) - lw s7, 376(sp) + lw s8, 376(sp) bne a6, t5, .LBB7_8 # %bb.22: # in Loop: Header=BB7_4 Depth=1 add t4, t4, t2 --- build.head//MultiSource/Benchmarks/MiBench/consumer-jpeg/CMakeFiles/consumer-jpeg.dir/jddctmgr.s 2023-11-13 08:03:22.619551116 +0000 +++ build//MultiSource/Benchmarks/MiBench/consumer-jpeg/CMakeFiles/consumer-jpeg.dir/jddctmgr.s 2023-11-13 08:03:17.651694719 +0000 @@ -162,12 +162,12 @@ vs2r.v v8, (a0) # Unknown-size Folded Spill li t3, 16 li t4, 32 - sd t0, 48(sp) # 8-byte Folded Spill csrr a0, vlenb slli a0, a0, 1 add a0, sp, a0 addi a0, a0, 64 vs2r.v v20, (a0) # Unknown-size Folded Spill + sd t0, 48(sp) # 8-byte Folded Spill j .LBB1_4 .LBB1_2: # %sw.default84 # in Loop: Header=BB1_4 Depth=1 @@ -179,14 +179,14 @@ jalr a1 li t4, 32 li t3, 16 + li t2, 1 + li t1, 3 + ld t0, 48(sp) # 8-byte Folded Reload csrr a0, vlenb slli a0, a0, 1 add a0, sp, a0 addi a0, a0, 64 vl2r.v v20, (a0) # Unknown-size Folded Reload - li t2, 1 - li t1, 3 - ld t0, 48(sp) # 8-byte Folded Reload .LBB1_3: # %for.inc90 # in Loop: Header=BB1_4 Depth=1 lw a0, 48(s0) @@ -270,14 +270,14 @@ # in Loop: Header=BB1_4 Depth=1 li t4, 32 li t3, 16 + li t2, 1 + li t1, 3 + ld t0, 48(sp) # 8-byte Folded Reload csrr a0, vlenb slli a0, a0, 1 add a0, sp, a0 addi a0, a0, 64 vl2r.v v20, (a0) # Unknown-size Folded Reload - li t2, 1 - li t1, 3 - ld t0, 48(sp) # 8-byte Folded Reload .LBB1_17: # %sw.epilog16 # in Loop: Header=BB1_4 Depth=1 lw a0, 48(s3) --- build.head//MultiSource/Applications/JM/ldecod/CMakeFiles/ldecod.dir/erc_do_p.s 2023-11-13 08:03:22.231562332 +0000 +++ build//MultiSource/Applications/JM/ldecod/CMakeFiles/ldecod.dir/erc_do_p.s 2023-11-13 08:03:17.283705356 +0000 @@ -1321,9 +1321,9 @@ vle32.v v8, (a2) li a1, 1 sd zero, 36(s2) + addi a3, sp, 96 + vs1r.v v8, (a3) # Unknown-size Folded Spill sd a2, 16(sp) # 8-byte Folded Spill - addi a2, sp, 96 - vs1r.v v8, (a2) # Unknown-size Folded Spill bne a0, a1, .LBB3_2 # %bb.1: # %if.then lw a0, 404(s2) @@ -1331,23 +1331,23 @@ negw a0, a0 sw a0, 396(s2) sw zero, 412(s2) - lw s6, 16(s2) - beqz s6, .LBB3_3 + lw s11, 16(s2) + beqz s11, .LBB3_3 j .LBB3_4 .LBB3_2: # %if.else lw a0, 0(s2) lw a1, 156(s2) addi a0, a0, 1 remuw s4, a0, a1 - lw s6, 16(s2) - bne s6, s4, .LBB3_4 + lw s11, 16(s2) + bne s11, s4, .LBB3_4 .LBB3_3: # %while.end vsetivli zero, 2, e32, mf2, ta, ma + addi a0, sp, 96 + vl1r.v v8, (a0) # Unknown-size Folded Reload ld a0, 16(sp) # 8-byte Folded Reload - addi a1, sp, 96 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) - sw s6, 16(s2) + sw s11, 16(s2) csrr a0, vlenb slli a0, a0, 1 add sp, sp, a0 @@ -1368,7 +1368,7 @@ ret .LBB3_4: # %while.body.lr.ph lui a0, 77 - addiw s5, a0, 1432 + addiw s6, a0, 1432 li s7, 1 .Lpcrel_hi11: auipc a1, %got_pcrel_hi(dpb) @@ -1404,7 +1404,7 @@ j .LBB3_6 .LBB3_5: # %if.end29 # in Loop: Header=BB3_6 Depth=1 - mv a0, s11 + mv a0, s5 call store_picture_in_dpb@plt sw s4, 0(s2) lw a0, 156(s2) @@ -1427,7 +1427,7 @@ addi s4, s4, 1 remw s4, s4, a0 sw zero, 0(s3) - beq s6, s4, .LBB3_3 + beq s11, s4, .LBB3_3 .LBB3_6: # %while.body # =>This Loop Header: Depth=1 # Child Loop BB3_9 Depth 2 @@ -1437,8 +1437,8 @@ lw a4, 64(s0) li a0, 0 call alloc_storable_picture@plt - mv s11, a0 - add s1, a0, s5 + mv s5, a0 + add s1, a0, s6 sw s7, 76(s1) sw s4, 8(s1) sw s4, 0(s1) @@ -1450,11 +1450,11 @@ sw zero, 216(s1) sw s4, 16(s2) add a1, a1, a0 - sw a1, 8(s11) + sw a1, 8(s5) lw a0, 28(s8) - sw a1, 12(s11) - sw a1, 16(s11) - sw a1, 4(s11) + sw a1, 12(s5) + sw a1, 16(s5) + sw a1, 4(s5) addiw a0, a0, -1 sw a1, 396(s2) bltz a0, .LBB3_12 @@ -1492,7 +1492,7 @@ .LBB3_13: # %copy_prev_pic_to_concealed_pic.exit # in Loop: Header=BB3_6 Depth=1 sw zero, 424(s2) - mv a1, s11 + mv a1, s5 mv a2, s0 call copy_to_conceal lw a0, 420(s2) @@ -1500,9 +1500,9 @@ # %bb.14: # %if.then19 # in Loop: Header=BB3_6 Depth=1 mv s7, s8 - mv s8, s5 - mv s5, s6 - addi s6, s11, 4 + mv s8, s6 + mv s6, s11 + addi s11, s5, 4 ld a0, 24(sp) # 8-byte Folded Reload sd a0, 200(s1) call flush_dpb@plt @@ -1511,9 +1511,9 @@ add a0, sp, a0 addi a0, a0, 96 vl1r.v v8, (a0) # Unknown-size Folded Reload - vse32.v v8, (s6) - mv s6, s5 - mv s5, s8 + vse32.v v8, (s11) + mv s11, s6 + mv s6, s8 mv s8, s7 li s7, 1 sw zero, 396(s2) --- build.head//MultiSource/Benchmarks/DOE-ProxyApps-C++/PENNANT/CMakeFiles/PENNANT.dir/Hydro.s 2023-11-13 08:03:22.547553198 +0000 +++ build//MultiSource/Benchmarks/DOE-ProxyApps-C++/PENNANT/CMakeFiles/PENNANT.dir/Hydro.s 2023-11-13 08:03:17.575696916 +0000 @@ -1012,8 +1012,7 @@ ld a2, 256(a1) sd a2, 136(sp) # 8-byte Folded Spill sd a1, 24(sp) # 8-byte Folded Spill - ld a1, 320(a1) - sd a1, 160(sp) # 8-byte Folded Spill + ld s5, 320(a1) sd a0, 48(sp) # 8-byte Folded Spill sext.w a0, a0 sd a0, 32(sp) # 8-byte Folded Spill @@ -1055,7 +1054,7 @@ sd a0, 320(s3) mv a0, s7 call malloc@plt - mv s8, a0 + sd a0, 160(sp) # 8-byte Folded Spill sd a0, 328(s3) mv a0, s7 call malloc@plt @@ -1091,10 +1090,10 @@ auipc s7, %pcrel_hi(.LCPI1_1) blez s4, .LBB1_46 # %bb.1: # %for.body.lr.ph - mv t6, s8 mv t5, s6 mv t4, s2 mv t3, s1 + mv t2, s5 mv t1, s4 li s1, 0 ld a0, 24(sp) # 8-byte Folded Reload @@ -1118,10 +1117,10 @@ vfmv.v.f v18, fs1 vfmv.v.f v20, fs2 vfmv.v.f v22, fs3 - csrr t2, vlenb - slli s9, t2, 1 - srli s11, t2, 2 - slli a1, t2, 2 + csrr t6, vlenb + slli s9, t6, 1 + srli s11, t6, 2 + slli a1, t6, 2 sd a1, 120(sp) # 8-byte Folded Spill ld a1, 136(sp) # 8-byte Folded Reload addi a1, a1, 8 @@ -1129,13 +1128,6 @@ xor a0, s6, a0 snez a0, a0 sd a0, 168(sp) # 8-byte Folded Spill - sd t2, 144(sp) # 8-byte Folded Spill - sd s4, 104(sp) # 8-byte Folded Spill - sd t3, 96(sp) # 8-byte Folded Spill - sd t4, 88(sp) # 8-byte Folded Spill - sd t5, 80(sp) # 8-byte Folded Spill - sd s8, 72(sp) # 8-byte Folded Spill - sd ra, 64(sp) # 8-byte Folded Spill csrr a0, vlenb li a1, 6 mul a0, a0, a1 @@ -1154,6 +1146,13 @@ vs2r.v v20, (a0) # Unknown-size Folded Spill addi a0, sp, 192 vs2r.v v22, (a0) # Unknown-size Folded Spill + sd t6, 144(sp) # 8-byte Folded Spill + sd s4, 104(sp) # 8-byte Folded Spill + sd t2, 96(sp) # 8-byte Folded Spill + sd t3, 88(sp) # 8-byte Folded Spill + sd t4, 80(sp) # 8-byte Folded Spill + sd t5, 72(sp) # 8-byte Folded Spill + sd ra, 64(sp) # 8-byte Folded Spill j .LBB1_3 .LBB1_2: # %for.cond.cleanup94 # in Loop: Header=BB1_3 Depth=1 @@ -1173,15 +1172,15 @@ add a1, ra, a0 ld a2, 176(sp) # 8-byte Folded Reload add a0, a2, a0 - lw s4, 0(a0) + lw s8, 0(a0) lw s3, 0(a1) - slli s8, s4, 3 - add s0, t4, s8 - beq s3, s4, .LBB1_20 + slli s4, s8, 3 + add s0, t4, s4 + beq s3, s8, .LBB1_20 # %bb.4: # %for.body.i.i.i.preheader # in Loop: Header=BB1_3 Depth=1 slli a0, s3, 3 - sub a2, s8, a0 + sub a2, s4, a0 addi a1, a2, -8 srli a1, a1, 3 addi a1, a1, 1 @@ -1215,7 +1214,7 @@ bne a3, s0, .LBB1_9 .LBB1_10: # %_ZSt4fillIPddEvT_S1_RKT0_.exit # in Loop: Header=BB1_3 Depth=1 - beq s3, s4, .LBB1_20 + beq s3, s8, .LBB1_20 # %bb.11: # %for.body.i.i.i114.preheader # in Loop: Header=BB1_3 Depth=1 add a4, t5, a0 @@ -1242,7 +1241,7 @@ beq a1, a5, .LBB1_18 .LBB1_16: # %for.body.i.i.i114.preheader291 # in Loop: Header=BB1_3 Depth=1 - add a1, t5, s8 + add a1, t5, s4 .LBB1_17: # %for.body.i.i.i114 # Parent Loop BB1_3 Depth=1 # => This Inner Loop Header: Depth=2 @@ -1251,14 +1250,20 @@ bne a3, a1, .LBB1_17 .LBB1_18: # %_ZSt4fillIPddEvT_S1_RKT0_.exit118 # in Loop: Header=BB1_3 Depth=1 - beq s3, s4, .LBB1_20 + beq s3, s8, .LBB1_20 # %bb.19: # %for.body.i.i.i120.preheader # in Loop: Header=BB1_3 Depth=1 ld a1, 112(sp) # 8-byte Folded Reload add a0, a1, a0 li a1, 0 call memset@plt - ld t2, 144(sp) # 8-byte Folded Reload + ld t6, 144(sp) # 8-byte Folded Reload + ld ra, 64(sp) # 8-byte Folded Reload + ld t5, 72(sp) # 8-byte Folded Reload + ld t4, 80(sp) # 8-byte Folded Reload + ld t3, 88(sp) # 8-byte Folded Reload + ld t2, 96(sp) # 8-byte Folded Reload + ld t1, 104(sp) # 8-byte Folded Reload addi a0, sp, 192 vl2r.v v22, (a0) # Unknown-size Folded Reload csrr a0, vlenb @@ -1277,22 +1282,16 @@ add a0, sp, a0 addi a0, a0, 192 vl2r.v v16, (a0) # Unknown-size Folded Reload - ld ra, 64(sp) # 8-byte Folded Reload - ld t6, 72(sp) # 8-byte Folded Reload - ld t5, 80(sp) # 8-byte Folded Reload - ld t4, 88(sp) # 8-byte Folded Reload - ld t3, 96(sp) # 8-byte Folded Reload - ld t1, 104(sp) # 8-byte Folded Reload .LBB1_20: # %_ZSt4fillIPddEvT_S1_RKT0_.exit124 # in Loop: Header=BB1_3 Depth=1 - slt a0, s3, s4 + slt a0, s3, s8 ld a1, 168(sp) # 8-byte Folded Reload and a1, a1, a0 - sub a0, s4, s3 + sub a0, s8, s3 beqz a1, .LBB1_36 # %bb.21: # %for.body60.preheader # in Loop: Header=BB1_3 Depth=1 - srli a2, t2, 2 + srli a2, t6, 2 li a1, 20 bltu a1, a2, .LBB1_23 # %bb.22: # %for.body60.preheader @@ -1309,39 +1308,39 @@ slli a3, s3, 3 add a2, t4, a3 add a3, t5, a3 - add s8, t5, s8 + add s4, t5, s4 slli a4, s3, 4 ld a6, 136(sp) # 8-byte Folded Reload add a4, a6, a4 - slli a5, s4, 4 + slli a5, s8, 4 add a5, a6, a5 - sltu a6, a2, s8 + sltu a6, a2, s4 sltu a7, a3, s0 and a6, a6, a7 sltu a7, a2, a5 sltu t0, a4, s0 and a7, a7, t0 or a6, a6, a7 - ld t2, 128(sp) # 8-byte Folded Reload - sltu a7, a2, t2 + ld t6, 128(sp) # 8-byte Folded Reload + sltu a7, a2, t6 sltu t0, s6, s0 and a7, a7, t0 sltu a5, a3, a5 - sltu t0, a4, s8 + sltu t0, a4, s4 and a5, a5, t0 ld t0, 120(sp) # 8-byte Folded Reload or a5, a7, a5 or a5, a6, a5 - sltu a6, a3, t2 - ld t2, 144(sp) # 8-byte Folded Reload - sltu a7, s6, s8 + sltu a6, a3, t6 + ld t6, 144(sp) # 8-byte Folded Reload + sltu a7, s6, s4 and a6, a6, a7 or a6, a5, a6 mv a5, s3 bnez a6, .LBB1_29 # %bb.25: # %vector.ph207 # in Loop: Header=BB1_3 Depth=1 - srli a6, t2, 2 + srli a6, t6, 2 addi a5, a6, -1 and a5, a0, a5 beqz a5, .LBB1_27 @@ -1358,7 +1357,7 @@ vsetvli a7, zero, e64, m2, ta, ma vfmv.v.f v8, fa4 add a6, a6, s3 - sub a6, a6, s4 + sub a6, a6, s8 li s0, 16 .LBB1_28: # %vector.body212 # Parent Loop BB1_3 Depth=1 @@ -1395,7 +1394,7 @@ slli a4, a5, 3 add a3, t4, a4 add a4, t5, a4 - sub a5, s4, a5 + sub a5, s8, a5 j .LBB1_31 .LBB1_30: # %for.inc # in Loop: Header=BB1_31 Depth=2 @@ -1440,7 +1439,7 @@ j .LBB1_30 .LBB1_36: # %if.end90 # in Loop: Header=BB1_3 Depth=1 - bge s3, s4, .LBB1_2 + bge s3, s8, .LBB1_2 # %bb.37: # %for.body95.preheader # in Loop: Header=BB1_3 Depth=1 li a2, 32 @@ -1455,7 +1454,8 @@ # %bb.40: # %vector.memcheck # in Loop: Header=BB1_3 Depth=1 slli a5, s3, 3 - add a1, a5, t6 + ld a1, 160(sp) # 8-byte Folded Reload + add a1, a5, a1 add a2, a5, t3 sub a3, a1, a2 sltu a4, a3, s9 @@ -1463,8 +1463,7 @@ sub a6, a2, a3 sltu a6, a6, s9 or a6, a4, a6 - ld a4, 160(sp) # 8-byte Folded Reload - add a4, a5, a4 + add a4, a5, t2 sub a7, a2, a4 sltu a7, a7, s9 add a5, a5, t5 @@ -1485,7 +1484,7 @@ bnez a6, .LBB1_44 # %bb.41: # %vector.ph # in Loop: Header=BB1_3 Depth=1 - srli a6, t2, 2 + srli a6, t6, 2 neg a6, a6 and a6, a0, a6 add s3, a6, s3 @@ -1515,12 +1514,12 @@ # in Loop: Header=BB1_3 Depth=1 slli a4, s3, 3 add a0, t4, a4 - ld a1, 160(sp) # 8-byte Folded Reload - add a1, a1, a4 + add a1, t2, a4 add a2, t3, a4 add a3, t5, a4 - add a4, t6, a4 - sub a5, s4, s3 + ld a5, 160(sp) # 8-byte Folded Reload + add a4, a5, a4 + sub a5, s8, s3 .LBB1_45: # %for.body95 # Parent Loop BB1_3 Depth=1 # => This Inner Loop Header: Depth=2 --- build.head//MultiSource/Benchmarks/MiBench/consumer-jpeg/CMakeFiles/consumer-jpeg.dir/jfdctint.s 2023-11-13 08:03:22.623551000 +0000 +++ build//MultiSource/Benchmarks/MiBench/consumer-jpeg/CMakeFiles/consumer-jpeg.dir/jfdctint.s 2023-11-13 08:03:17.655694604 +0000 @@ -30,9 +30,9 @@ vmsleu.vi v0, v8, 7 li a1, 32 vlse32.v v8, (a0), a1, v0.t - li t1, 28 + li t0, 28 vsetvli zero, zero, e32, m4, ta, ma - vluxei64.v v12, (t1), v16, v0.t + vluxei64.v v12, (t0), v16, v0.t sd s5, 8(sp) sd s6, 0(sp) csrr a2, vlenb @@ -60,57 +60,57 @@ add a2, sp, a2 addi a2, a2, 32 vs8r.v v24, (a2) # Unknown-size Folded Spill - li a5, 4 + li a4, 4 vsetvli zero, zero, e32, m4, ta, ma - vluxei64.v v8, (a5), v16, v0.t - li a3, 24 - vluxei64.v v12, (a3), v16, v0.t + vluxei64.v v8, (a4), v16, v0.t + li a2, 24 + vluxei64.v v12, (a2), v16, v0.t vadd.vv v4, v12, v8 vsetvli zero, zero, e64, m8, ta, ma vsext.vf2 v24, v4 - csrr a2, vlenb - li a4, 28 - mul a2, a2, a4 - add a2, sp, a2 - addi a2, a2, 32 - vs8r.v v24, (a2) # Unknown-size Folded Spill + csrr a3, vlenb + li a5, 28 + mul a3, a3, a5 + add a3, sp, a3 + addi a3, a3, 32 + vs8r.v v24, (a3) # Unknown-size Folded Spill vsetvli zero, zero, e32, m4, ta, ma vsub.vv v8, v8, v12 vsetvli zero, zero, e64, m8, ta, ma - li a4, 8 + li a5, 8 vsext.vf2 v24, v8 - csrr a2, vlenb + csrr a3, vlenb li a6, 60 - mul a2, a2, a6 - add a2, sp, a2 - addi a2, a2, 32 - vs8r.v v24, (a2) # Unknown-size Folded Spill + mul a3, a3, a6 + add a3, sp, a3 + addi a3, a3, 32 + vs8r.v v24, (a3) # Unknown-size Folded Spill vsetvli zero, zero, e32, m4, ta, ma li t3, 20 - vluxei64.v v8, (a4), v16, v0.t + vluxei64.v v8, (a5), v16, v0.t vluxei64.v v12, (t3), v16, v0.t vadd.vv v4, v12, v8 vsetvli zero, zero, e64, m8, ta, ma vsext.vf2 v24, v4 - csrr a2, vlenb + csrr a3, vlenb li a6, 20 - mul a2, a2, a6 - add a2, sp, a2 - addi a2, a2, 32 - vs8r.v v24, (a2) # Unknown-size Folded Spill + mul a3, a3, a6 + add a3, sp, a3 + addi a3, a3, 32 + vs8r.v v24, (a3) # Unknown-size Folded Spill vsetvli zero, zero, e32, m4, ta, ma vsub.vv v8, v8, v12 vsetvli zero, zero, e64, m8, ta, ma li t4, 12 vsext.vf2 v24, v8 - csrr a2, vlenb + csrr a3, vlenb li a6, 44 - mul a2, a2, a6 - add a2, sp, a2 - addi a2, a2, 32 - vs8r.v v24, (a2) # Unknown-size Folded Spill + mul a3, a3, a6 + add a3, sp, a3 + addi a3, a3, 32 + vs8r.v v24, (a3) # Unknown-size Folded Spill vsetvli zero, zero, e32, m4, ta, ma - li a2, 16 + li a3, 16 csrr a6, vlenb li a7, 68 mul a6, a6, a7 @@ -118,7 +118,7 @@ addi a6, a6, 32 vs1r.v v0, (a6) # Unknown-size Folded Spill vluxei64.v v8, (t4), v16, v0.t - vluxei64.v v12, (a2), v16, v0.t + vluxei64.v v12, (a3), v16, v0.t vadd.vv v4, v12, v8 vsetvli zero, zero, e64, m8, ta, ma vsext.vf2 v16, v4 @@ -193,11 +193,11 @@ add a1, sp, a1 addi a1, a1, 32 vl8r.v v16, (a1) # Unknown-size Folded Reload - vsoxei64.v v8, (a2), v16, v0.t + vsoxei64.v v8, (a3), v16, v0.t vsetvli zero, zero, e64, m8, ta, ma - li a2, 1024 - lui t0, 1 - addiw a1, t0, 337 + li a3, 1024 + lui t1, 1 + addiw a1, t1, 337 csrr a6, vlenb li a7, 28 mul a6, a6, a7 @@ -210,17 +210,17 @@ addi a6, a6, 32 vl8r.v v24, (a6) # Unknown-size Folded Reload vadd.vv v16, v24, v16 - vmv.v.x v0, a2 - csrr a2, vlenb + vmv.v.x v0, a3 + csrr a3, vlenb li a6, 36 - mul a2, a2, a6 - add a2, sp, a2 - addi a2, a2, 32 - vs8r.v v0, (a2) # Unknown-size Folded Spill + mul a3, a3, a6 + add a3, sp, a3 + addi a3, a3, 32 + vs8r.v v0, (a3) # Unknown-size Folded Spill vmadd.vx v16, a1, v0 lui a6, 2 - addiw a2, a6, -1922 - vmadd.vx v24, a2, v16 + addiw a3, a6, -1922 + vmadd.vx v24, a3, v16 vsetvli zero, zero, e32, m4, ta, ma vnsrl.wi v8, v24, 11 vmv1r.v v0, v12 @@ -230,10 +230,10 @@ add a7, sp, a7 addi a7, a7, 32 vl8r.v v24, (a7) # Unknown-size Folded Reload - vsoxei64.v v8, (a4), v24, v0.t - lui a4, 1033439 - slli a4, a4, 9 - srli a4, a4, 21 + vsoxei64.v v8, (a5), v24, v0.t + lui a5, 1033439 + slli a5, a5, 9 + srli a5, a5, 21 vsetvli zero, zero, e64, m8, ta, ma csrr a7, vlenb li t2, 28 @@ -241,44 +241,44 @@ add a7, sp, a7 addi a7, a7, 32 vl8r.v v0, (a7) # Unknown-size Folded Reload - vmacc.vx v16, a4, v0 + vmacc.vx v16, a5, v0 vsetvli zero, zero, e32, m4, ta, ma vnsrl.wi v8, v16, 11 vmv1r.v v0, v12 - vsoxei64.v v8, (a3), v24, v0.t + vsoxei64.v v8, (a2), v24, v0.t vsetvli zero, zero, e64, m8, ta, ma - addiw a3, a6, 1441 - csrr a4, vlenb + addiw a2, a6, 1441 + csrr a5, vlenb li a6, 60 - mul a4, a4, a6 - add a4, sp, a4 - addi a4, a4, 32 - vl8r.v v8, (a4) # Unknown-size Folded Reload - csrr a4, vlenb + mul a5, a5, a6 + add a5, sp, a5 + addi a5, a5, 32 + vl8r.v v8, (a5) # Unknown-size Folded Reload + csrr a5, vlenb li a6, 12 - mul a4, a4, a6 - add a4, sp, a4 - addi a4, a4, 32 - vl8r.v v24, (a4) # Unknown-size Folded Reload + mul a5, a5, a6 + add a5, sp, a5 + addi a5, a5, 32 + vl8r.v v24, (a5) # Unknown-size Folded Reload vadd.vv v8, v24, v8 - csrr a4, vlenb + csrr a5, vlenb li a6, 44 - mul a4, a4, a6 - add a4, sp, a4 - addi a4, a4, 32 - vl8r.v v16, (a4) # Unknown-size Folded Reload - csrr a4, vlenb + mul a5, a5, a6 + add a5, sp, a5 + addi a5, a5, 32 + vl8r.v v16, (a5) # Unknown-size Folded Reload + csrr a5, vlenb li a6, 52 - mul a4, a4, a6 - add a4, sp, a4 - addi a4, a4, 32 - vl8r.v v0, (a4) # Unknown-size Folded Reload + mul a5, a5, a6 + add a5, sp, a5 + addi a5, a5, 32 + vl8r.v v0, (a5) # Unknown-size Folded Reload vadd.vv v0, v16, v0 vadd.vv v16, v8, v0 - vmul.vx v16, v16, a3 - lui a4, 1048572 - addiw a4, a4, 315 - vmadd.vx v8, a4, v16 + vmul.vx v16, v16, a2 + lui a5, 1048572 + addiw a5, a5, 315 + vmadd.vx v8, a5, v16 csrr a6, vlenb li a7, 20 mul a6, a6, a7 @@ -286,16 +286,16 @@ addi a6, a6, 32 vs8r.v v8, (a6) # Unknown-size Folded Spill lui a6, 1048575 - addiw a6, a6, 900 - vmacc.vx v16, a6, v0 - csrr a7, vlenb + addiw a7, a6, 900 + vmacc.vx v16, a7, v0 + csrr a6, vlenb li t2, 28 - mul a7, a7, t2 - add a7, sp, a7 - addi a7, a7, 32 - vs8r.v v16, (a7) # Unknown-size Folded Spill - lui a7, 1048574 - addiw a7, a7, 819 + mul a6, a6, t2 + add a6, sp, a6 + addi a6, a6, 32 + vs8r.v v16, (a6) # Unknown-size Folded Spill + lui a6, 1048574 + addiw a6, a6, 819 csrr t2, vlenb li t5, 52 mul t2, t2, t5 @@ -309,14 +309,14 @@ add t2, sp, t2 addi t2, t2, 32 vl8r.v v8, (t2) # Unknown-size Folded Reload - vmadd.vx v16, a7, v8 + vmadd.vx v16, a6, v8 csrr t2, vlenb slli t2, t2, 2 add t2, sp, t2 addi t2, t2, 32 vs8r.v v16, (t2) # Unknown-size Folded Spill - addiw t0, t0, -1650 - vmadd.vx v24, t0, v16 + addiw t1, t1, -1650 + vmadd.vx v24, t1, v16 csrr t2, vlenb li t5, 20 mul t2, t2, t5 @@ -364,9 +364,9 @@ add t2, sp, t2 addi t2, t2, 32 vl8r.v v24, (t2) # Unknown-size Folded Reload - vsoxei64.v v4, (t1), v24, v0.t - lui t1, 1048571 - addiw t1, t1, -515 + vsoxei64.v v4, (t0), v24, v0.t + lui t0, 1048571 + addiw t0, t0, -515 vsetvli zero, zero, e64, m8, ta, ma csrr t2, vlenb li t5, 36 @@ -374,13 +374,13 @@ add t2, sp, t2 addi t2, t2, 32 vl8r.v v24, (t2) # Unknown-size Folded Reload - vmadd.vx v16, t1, v24 - lui t6, 4 - addiw t2, t6, 435 + vmadd.vx v16, t0, v24 + lui s1, 4 + addiw t2, s1, 435 vmadd.vx v8, t2, v16 csrr t5, vlenb - li s0, 28 - mul t5, t5, s0 + li t6, 28 + mul t5, t5, t6 add t5, sp, t5 addi t5, t5, 32 vl8r.v v24, (t5) # Unknown-size Folded Reload @@ -388,8 +388,8 @@ vsetvli zero, zero, e32, m4, ta, ma vnsrl.wi v4, v8, 11 csrr t5, vlenb - li s0, 69 - mul t5, t5, s0 + li t6, 69 + mul t5, t5, t6 add t5, sp, t5 addi t5, t5, 32 vl8r.v v24, (t5) # Unknown-size Folded Reload @@ -398,15 +398,15 @@ addiw t3, t3, 596 vsetvli zero, zero, e64, m8, ta, ma csrr t5, vlenb - li s0, 60 - mul t5, t5, s0 + li t6, 60 + mul t5, t5, t6 add t5, sp, t5 addi t5, t5, 32 vl8r.v v24, (t5) # Unknown-size Folded Reload vmacc.vx v16, t3, v24 csrr t5, vlenb - li s0, 20 - mul t5, t5, s0 + li t6, 20 + mul t5, t5, t6 add t5, sp, t5 addi t5, t5, 32 vl8r.v v24, (t5) # Unknown-size Folded Reload @@ -414,8 +414,8 @@ vsetvli zero, zero, e32, m4, ta, ma vnsrl.wi v4, v8, 11 csrr t5, vlenb - li s0, 69 - mul t5, t5, s0 + li t6, 69 + mul t5, t5, t6 add t5, sp, t5 addi t5, t5, 32 vl8r.v v24, (t5) # Unknown-size Folded Reload @@ -424,8 +424,8 @@ addiw t4, t4, 11 vsetvli zero, zero, e64, m8, ta, ma csrr t5, vlenb - li s0, 52 - mul t5, t5, s0 + li t6, 52 + mul t5, t5, t6 add t5, sp, t5 addi t5, t5, 32 vl8r.v v8, (t5) # Unknown-size Folded Reload @@ -436,81 +436,81 @@ vl8r.v v16, (t5) # Unknown-size Folded Reload vmacc.vx v16, t4, v8 csrr t5, vlenb - li s0, 28 - mul t5, t5, s0 + li t6, 28 + mul t5, t5, t6 add t5, sp, t5 addi t5, t5, 32 vl8r.v v8, (t5) # Unknown-size Folded Reload vadd.vv v8, v16, v8 vsetvli zero, zero, e32, m4, ta, ma vnsrl.wi v16, v8, 11 - vsoxei64.v v16, (a5), v24, v0.t + vsoxei64.v v16, (a4), v24, v0.t vle32.v v8, (a0), v0.t addi t5, a0, 224 vle32.v v12, (t5), v0.t vadd.vv v24, v12, v8 vsetvli zero, zero, e64, m8, ta, ma vsext.vf2 v16, v24 - csrr a5, vlenb - li s0, 44 - mul a5, a5, s0 - add a5, sp, a5 - addi a5, a5, 32 - vs8r.v v16, (a5) # Unknown-size Folded Spill + csrr a4, vlenb + li t6, 44 + mul a4, a4, t6 + add a4, sp, a4 + addi a4, a4, 32 + vs8r.v v16, (a4) # Unknown-size Folded Spill vsetvli zero, zero, e32, m4, ta, ma vsub.vv v8, v8, v12 vsetvli zero, zero, e64, m8, ta, ma - addi a5, a0, 32 - vle32.v v12, (a5), v0.t + addi a4, a0, 32 + vle32.v v12, (a4), v0.t addi s2, a0, 192 vle32.v v24, (s2), v0.t vsext.vf2 v16, v8 - csrr s0, vlenb - li s1, 52 - mul s0, s0, s1 - add s0, sp, s0 - addi s0, s0, 32 - vs8r.v v16, (s0) # Unknown-size Folded Spill + csrr t6, vlenb + li s0, 52 + mul t6, t6, s0 + add t6, sp, t6 + addi t6, t6, 32 + vs8r.v v16, (t6) # Unknown-size Folded Spill vsetvli zero, zero, e32, m4, ta, ma vadd.vv v8, v24, v12 vsetvli zero, zero, e64, m8, ta, ma vsext.vf2 v16, v8 - csrr s0, vlenb - li s1, 36 - mul s0, s0, s1 - add s0, sp, s0 - addi s0, s0, 32 - vs8r.v v16, (s0) # Unknown-size Folded Spill + csrr t6, vlenb + li s0, 36 + mul t6, t6, s0 + add t6, sp, t6 + addi t6, t6, 32 + vs8r.v v16, (t6) # Unknown-size Folded Spill vsetvli zero, zero, e32, m4, ta, ma vsub.vv v8, v12, v24 vsetvli zero, zero, e64, m8, ta, ma addi s3, a0, 64 - addi s0, a0, 160 + addi t6, a0, 160 vle32.v v12, (s3), v0.t - vle32.v v24, (s0), v0.t + vle32.v v24, (t6), v0.t vsext.vf2 v16, v8 - csrr s1, vlenb + csrr s0, vlenb li s4, 69 - mul s1, s1, s4 - add s1, sp, s1 - addi s1, s1, 32 - vs8r.v v16, (s1) # Unknown-size Folded Spill + mul s0, s0, s4 + add s0, sp, s0 + addi s0, s0, 32 + vs8r.v v16, (s0) # Unknown-size Folded Spill vsetvli zero, zero, e32, m4, ta, ma vadd.vv v8, v24, v12 vsetvli zero, zero, e64, m8, ta, ma vsext.vf2 v16, v8 - csrr s1, vlenb + csrr s0, vlenb li s4, 28 - mul s1, s1, s4 - add s1, sp, s1 - addi s1, s1, 32 - vs8r.v v16, (s1) # Unknown-size Folded Spill + mul s0, s0, s4 + add s0, sp, s0 + addi s0, s0, 32 + vs8r.v v16, (s0) # Unknown-size Folded Spill vsetvli zero, zero, e32, m4, ta, ma vsub.vv v8, v12, v24 vsetvli zero, zero, e64, m8, ta, ma - addi s1, a0, 96 + addi s0, a0, 96 addi s4, a0, 128 - vle32.v v28, (s1), v0.t + vle32.v v28, (s0), v0.t vle32.v v24, (s4), v0.t vsext.vf2 v16, v8 csrr s5, vlenb @@ -617,15 +617,15 @@ addi a0, a0, 32 vl8r.v v16, (a0) # Unknown-size Folded Reload vadd.vv v24, v16, v24 - vmv.v.x v0, t6 + vmv.v.x v0, s1 csrr a0, vlenb - li t6, 44 - mul a0, a0, t6 + li s1, 44 + mul a0, a0, s1 add a0, sp, a0 addi a0, a0, 32 vs8r.v v0, (a0) # Unknown-size Folded Spill vmadd.vx v24, a1, v0 - vmadd.vx v16, a2, v24 + vmadd.vx v16, a3, v24 vsetvli zero, zero, e32, m4, ta, ma vnsrl.wi v8, v16, 15 vmv1r.v v0, v12 @@ -634,8 +634,8 @@ srli a0, a0, 17 vsetvli zero, zero, e64, m8, ta, ma csrr a1, vlenb - li a2, 36 - mul a1, a1, a2 + li a3, 36 + mul a1, a1, a3 add a1, sp, a1 addi a1, a1, 32 vl8r.v v8, (a1) # Unknown-size Folded Reload @@ -683,8 +683,8 @@ addi a0, a0, 32 vl8r.v v16, (a0) # Unknown-size Folded Reload vadd.vv v16, v8, v16 - vmul.vx v16, v16, a3 - vmadd.vx v8, a4, v16 + vmul.vx v16, v16, a2 + vmadd.vx v8, a5, v16 csrr a0, vlenb li a1, 28 mul a0, a0, a1 @@ -697,7 +697,7 @@ add a0, sp, a0 addi a0, a0, 32 vl8r.v v8, (a0) # Unknown-size Folded Reload - vmacc.vx v16, a6, v8 + vmacc.vx v16, a7, v8 csrr a0, vlenb li a1, 36 mul a0, a0, a1 @@ -711,8 +711,8 @@ add a0, sp, a0 addi a0, a0, 32 vl8r.v v8, (a0) # Unknown-size Folded Reload - vmadd.vx v16, a7, v8 - vmadd.vx v24, t0, v16 + vmadd.vx v16, a6, v8 + vmadd.vx v24, t1, v16 csrr a0, vlenb li a1, 28 mul a0, a0, a1 @@ -761,7 +761,7 @@ add a0, sp, a0 addi a0, a0, 32 vl8r.v v0, (a0) # Unknown-size Folded Reload - vmadd.vx v8, t1, v0 + vmadd.vx v8, t0, v0 csrr a0, vlenb li a1, 60 mul a0, a0, a1 @@ -785,7 +785,7 @@ addi a0, a0, 32 vl1r.v v28, (a0) # Unknown-size Folded Reload vmv1r.v v0, v28 - vse32.v v4, (s0), v0.t + vse32.v v4, (t6), v0.t vsetvli zero, zero, e64, m8, ta, ma csrr a0, vlenb li a1, 69 @@ -804,7 +804,7 @@ vsetvli zero, zero, e32, m4, ta, ma vnsrl.wi v24, v8, 15 vmv1r.v v0, v28 - vse32.v v24, (s1), v0.t + vse32.v v24, (s0), v0.t vsetvli zero, zero, e64, m8, ta, ma csrr a0, vlenb li a1, 52 @@ -822,7 +822,7 @@ vadd.vv v8, v16, v8 vsetvli zero, zero, e32, m4, ta, ma vnsrl.wi v16, v8, 15 - vse32.v v16, (a5), v0.t + vse32.v v16, (a4), v0.t csrr a0, vlenb li a1, 78 mul a0, a0, a1 --- build.head//MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/weighted_prediction.s 2023-11-13 08:03:22.271561176 +0000 +++ build//MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/weighted_prediction.s 2023-11-13 08:03:17.323704200 +0000 @@ -1721,12 +1721,12 @@ mv s1, t4 mv s11, t5 call memset@plt + mv t5, s11 + mv t4, s1 lui a0, 19 addiw a0, a0, 640 add a0, sp, a0 vl2r.v v10, (a0) # Unknown-size Folded Reload - mv t5, s11 - mv t4, s1 li a0, 0 li a1, 4 bltu s2, a1, .LBB1_94 --- build.head//MultiSource/Benchmarks/DOE-ProxyApps-C++/CLAMR/CMakeFiles/CLAMR.dir/Restartblock.s 2023-11-13 08:03:22.519554007 +0000 +++ build//MultiSource/Benchmarks/DOE-ProxyApps-C++/CLAMR/CMakeFiles/CLAMR.dir/Restartblock.s 2023-11-13 08:03:17.551697610 +0000 @@ -472,7 +472,7 @@ mul t0, t0, t1 sub sp, sp, t0 .cfi_escape 0x0f, 0x0e, 0x72, 0x00, 0x11, 0xf0, 0x03, 0x22, 0x11, 0x06, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 496 + 6 * vlenb - sd a7, 248(sp) # 8-byte Folded Spill + sd a7, 256(sp) # 8-byte Folded Spill mv s8, a6 mv s2, a5 mv s4, a4 @@ -514,7 +514,7 @@ call _ZNSt11_Deque_baseIN2PP4WordESaIS1_EE17_M_initialize_mapEm .Ltmp22: # %bb.1: # %invoke.cont - sd s2, 224(sp) # 8-byte Folded Spill + sd s2, 232(sp) # 8-byte Folded Spill addi s2, s0, 160 addi a0, s0, 224 vsetivli zero, 2, e64, m1, ta, ma @@ -569,7 +569,7 @@ call _ZNSt11_Deque_baseINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE17_M_initialize_mapEm .Ltmp31: # %bb.4: # %invoke.cont7 - sd s8, 208(sp) # 8-byte Folded Spill + sd s8, 216(sp) # 8-byte Folded Spill addi s8, s0, 400 addi a0, s0, 464 vsetivli zero, 2, e64, m1, ta, ma @@ -589,7 +589,7 @@ .Ltmp34: # %bb.5: # %invoke.cont9 addi a0, s0, 504 - sd a0, 232(sp) # 8-byte Folded Spill + sd a0, 240(sp) # 8-byte Folded Spill sd a0, 488(s0) sd zero, 496(s0) sb zero, 504(s0) @@ -599,7 +599,7 @@ addi a0, a0, 1 sw a0, 0(s5) li a0, 1 - sd s1, 216(sp) # 8-byte Folded Spill + sd s1, 224(sp) # 8-byte Folded Spill sb a0, 0(s1) sb zero, 0(s4) ld a0, 232(s7) @@ -613,7 +613,7 @@ li a3, 6 mul a2, a2, a3 add a2, sp, a2 - ld s5, 504(a2) + ld s9, 504(a2) sub a1, a0, a1 ld a2, 208(s7) ld a3, 216(s7) @@ -628,35 +628,35 @@ add a1, a1, a2 sub a0, a0, a3 srli a0, a0, 7 - addw s9, a1, a0 + addw s5, a1, a0 addw a0, a1, a0 li a1, 7 addi a2, s0, 488 - sd a2, 240(sp) # 8-byte Folded Spill + sd a2, 248(sp) # 8-byte Folded Spill blt a1, a0, .LBB3_11 # %bb.6: # %if.then .Ltmp483: mv a0, s7 li a1, 0 - mv a2, s5 + mv a2, s9 mv a3, s1 call _ZN2PP3Cmd11fatal_errorEiRNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEERi@plt .Ltmp484: # %bb.7: # %invoke.cont12 mv s7, s1 - addi s5, s5, 16 + addi s9, s9, 16 .Ltmp485: .Lpcrel_hi0: auipc a0, %pcrel_hi(.L.str) addi a1, a0, %pcrel_lo(.Lpcrel_hi0) li a2, 59 - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp486: # %bb.8: # %invoke.cont13 - ld a0, 0(s5) + ld a0, 0(s9) ld a0, -24(a0) - add a0, s5, a0 + add a0, s9, a0 ld s1, 240(a0) bnez s1, .LBB3_9 j .LBB3_807 @@ -668,7 +668,7 @@ j .LBB3_28 .LBB3_11: # %if.end .Ltmp36: - sd s1, 200(sp) # 8-byte Folded Spill + sd s1, 208(sp) # 8-byte Folded Spill addi a0, sp, 336 li a2, 2 mv a1, s7 @@ -684,24 +684,24 @@ li a1, 40 bne a0, a1, .LBB3_21 # %bb.14: # %for.body.lr.ph - sd s4, 24(sp) # 8-byte Folded Spill - sd s8, 88(sp) # 8-byte Folded Spill - sd s6, 96(sp) # 8-byte Folded Spill - sd s3, 120(sp) # 8-byte Folded Spill - sd s2, 128(sp) # 8-byte Folded Spill + sd s4, 32(sp) # 8-byte Folded Spill + sd s8, 96(sp) # 8-byte Folded Spill + sd s6, 104(sp) # 8-byte Folded Spill + sd s3, 128(sp) # 8-byte Folded Spill + sd s2, 136(sp) # 8-byte Folded Spill csrr a0, vlenb li a1, 6 mul a0, a0, a1 add a0, sp, a0 ld a0, 496(a0) - sd a0, 80(sp) # 8-byte Folded Spill + sd a0, 88(sp) # 8-byte Folded Spill addi a0, s0, 496 - sd a0, 32(sp) # 8-byte Folded Spill - addiw a0, s9, -1 - sd a0, 16(sp) # 8-byte Folded Spill + sd a0, 40(sp) # 8-byte Folded Spill + addiw a0, s5, -1 + sd a0, 24(sp) # 8-byte Folded Spill addi s3, sp, 320 li a0, 2 - subw s2, a0, s9 + subw s2, a0, s5 li s4, 1 li s6, 4 lui a0, 452183 @@ -750,25 +750,25 @@ .Ltmp39: li a1, 2 mv a0, s7 - mv a2, s5 - ld s7, 200(sp) # 8-byte Folded Reload - mv a3, s7 + mv a2, s9 + ld s5, 208(sp) # 8-byte Folded Reload + mv a3, s5 call _ZN2PP3Cmd11fatal_errorEiRNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEERi@plt .Ltmp40: # %bb.22: # %invoke.cont56 - addi s5, s5, 16 + addi s9, s9, 16 .Ltmp41: .Lpcrel_hi8: auipc a0, %pcrel_hi(.L.str.9) addi a1, a0, %pcrel_lo(.Lpcrel_hi8) li a2, 63 - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp42: # %bb.23: # %invoke.cont58 - ld a0, 0(s5) + ld a0, 0(s9) ld a0, -24(a0) - add a0, s5, a0 + add a0, s9, a0 ld s1, 240(a0) bnez s1, .LBB3_24 j .LBB3_809 @@ -794,7 +794,7 @@ .Ltmp490: .LBB3_28: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i .Ltmp491: - mv a0, s5 + mv a0, s9 call _ZNSo3putEc@plt .Ltmp492: # %bb.29: # %call1.i.noexc @@ -853,13 +853,13 @@ auipc a0, %pcrel_hi(.L.str.2) addi a1, a0, %pcrel_lo(.Lpcrel_hi2) li a2, 36 - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp506: # %bb.39: # %invoke.cont22 .Ltmp507: - mv a0, s5 - mv a1, s9 + mv a0, s9 + mv a1, s5 call _ZNSolsEi@plt .Ltmp508: # %bb.40: # %invoke.cont24 @@ -914,13 +914,13 @@ auipc a0, %pcrel_hi(.L.str.4) addi a1, a0, %pcrel_lo(.Lpcrel_hi4) li a2, 43 - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp520: # %bb.49: # %invoke.cont31 - ld a0, 0(s5) + ld a0, 0(s9) ld a0, -24(a0) - add a0, s5, a0 + add a0, s9, a0 ld s1, 240(a0) bnez s1, .LBB3_50 j .LBB3_807 @@ -946,7 +946,7 @@ .Ltmp524: .LBB3_54: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i2122 .Ltmp525: - mv a0, s5 + mv a0, s9 call _ZNSo3putEc@plt .Ltmp526: # %bb.55: # %call1.i.noexc2133 @@ -959,13 +959,13 @@ auipc a0, %pcrel_hi(.L.str.5) addi a1, a0, %pcrel_lo(.Lpcrel_hi5) li a2, 43 - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp530: # %bb.57: # %invoke.cont36 - ld a0, 0(s5) + ld a0, 0(s9) ld a0, -24(a0) - add a0, s5, a0 + add a0, s9, a0 ld s1, 240(a0) bnez s1, .LBB3_58 j .LBB3_807 @@ -991,7 +991,7 @@ .Ltmp534: .LBB3_62: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i2148 .Ltmp535: - mv a0, s5 + mv a0, s9 call _ZNSo3putEc@plt .Ltmp536: # %bb.63: # %call1.i.noexc2159 @@ -1004,13 +1004,13 @@ auipc a0, %pcrel_hi(.L.str.6) addi a1, a0, %pcrel_lo(.Lpcrel_hi6) li a2, 64 - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp540: # %bb.65: # %invoke.cont41 - ld a0, 0(s5) + ld a0, 0(s9) ld a0, -24(a0) - add a0, s5, a0 + add a0, s9, a0 ld s1, 240(a0) bnez s1, .LBB3_66 j .LBB3_807 @@ -1036,7 +1036,7 @@ .Ltmp544: .LBB3_70: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i2174 .Ltmp545: - mv a0, s5 + mv a0, s9 call _ZNSo3putEc@plt .Ltmp546: # %bb.71: # %call1.i.noexc2185 @@ -1049,13 +1049,13 @@ auipc a0, %pcrel_hi(.L.str.7) addi a1, a0, %pcrel_lo(.Lpcrel_hi7) li a2, 57 - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp550: # %bb.73: # %invoke.cont46 - ld a0, 0(s5) + ld a0, 0(s9) ld a0, -24(a0) - add a0, s5, a0 + add a0, s9, a0 ld s1, 240(a0) bnez s1, .LBB3_74 j .LBB3_807 @@ -1081,7 +1081,7 @@ .Ltmp554: .LBB3_78: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i2200 .Ltmp555: - mv a0, s5 + mv a0, s9 call _ZNSo3putEc@plt .Ltmp556: # %bb.79: # %call1.i.noexc2211 @@ -1108,7 +1108,7 @@ .Ltmp46: .LBB3_83: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i2226 .Ltmp47: - mv a0, s5 + mv a0, s9 call _ZNSo3putEc@plt .Ltmp48: # %bb.84: # %call1.i.noexc2237 @@ -1121,14 +1121,14 @@ auipc a0, %pcrel_hi(.L.str.10) addi a1, a0, %pcrel_lo(.Lpcrel_hi9) li a2, 14 - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp52: # %bb.86: # %invoke.cont63 ld a1, 336(sp) ld a2, 344(sp) .Ltmp53: - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp54: # %bb.87: # %invoke.cont65 @@ -1183,13 +1183,13 @@ auipc a0, %pcrel_hi(.L.str.12) addi a1, a0, %pcrel_lo(.Lpcrel_hi11) li a2, 51 - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp66: # %bb.96: # %invoke.cont72 - ld a0, 0(s5) + ld a0, 0(s9) ld a0, -24(a0) - add a0, s5, a0 + add a0, s9, a0 ld s1, 240(a0) bnez s1, .LBB3_97 j .LBB3_809 @@ -1215,7 +1215,7 @@ .Ltmp70: .LBB3_101: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i2278 .Ltmp71: - mv a0, s5 + mv a0, s9 call _ZNSo3putEc@plt .Ltmp72: # %bb.102: # %call1.i.noexc2289 @@ -1228,13 +1228,13 @@ auipc a0, %pcrel_hi(.L.str.13) addi a1, a0, %pcrel_lo(.Lpcrel_hi12) li a2, 46 - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp76: # %bb.104: # %invoke.cont77 - ld a0, 0(s5) + ld a0, 0(s9) ld a0, -24(a0) - add a0, s5, a0 + add a0, s9, a0 ld s1, 240(a0) bnez s1, .LBB3_105 j .LBB3_809 @@ -1260,7 +1260,7 @@ .Ltmp80: .LBB3_109: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i2304 .Ltmp81: - mv a0, s5 + mv a0, s9 call _ZNSo3putEc@plt .Ltmp82: # %bb.110: # %call1.i.noexc2315 @@ -1273,13 +1273,13 @@ auipc a0, %pcrel_hi(.L.str.14) addi a1, a0, %pcrel_lo(.Lpcrel_hi13) li a2, 44 - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp86: # %bb.112: # %invoke.cont82 - ld a0, 0(s5) + ld a0, 0(s9) ld a0, -24(a0) - add a0, s5, a0 + add a0, s9, a0 ld s1, 240(a0) bnez s1, .LBB3_113 j .LBB3_809 @@ -1305,7 +1305,7 @@ .Ltmp90: .LBB3_117: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i2330 .Ltmp91: - mv a0, s5 + mv a0, s9 call _ZNSo3putEc@plt .Ltmp92: # %bb.118: # %call1.i.noexc2341 @@ -1318,13 +1318,13 @@ auipc a0, %pcrel_hi(.L.str.15) addi a1, a0, %pcrel_lo(.Lpcrel_hi14) li a2, 60 - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp96: # %bb.120: # %invoke.cont87 - ld a0, 0(s5) + ld a0, 0(s9) ld a0, -24(a0) - add a0, s5, a0 + add a0, s9, a0 ld s1, 240(a0) bnez s1, .LBB3_121 j .LBB3_809 @@ -1350,7 +1350,7 @@ .Ltmp100: .LBB3_125: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i2356 .Ltmp101: - mv a0, s5 + mv a0, s9 call _ZNSo3putEc@plt .Ltmp102: # %bb.126: # %call1.i.noexc2367 @@ -1359,7 +1359,7 @@ .Ltmp104: # %bb.127: # %invoke.cont89 li a0, 2 - sw a0, 0(s7) + sw a0, 0(s5) .LBB3_128: # %cleanup730 ld a0, 336(sp) addi a1, sp, 352 @@ -1387,10 +1387,10 @@ addi sp, sp, 496 ret .LBB3_131: # %for.body139.lr.ph - sd s10, 112(sp) # 8-byte Folded Spill - negw s1, s9 + sd s10, 120(sp) # 8-byte Folded Spill + negw s1, s5 li s2, -1 - li s9, 2 + li s5, 2 li s4, 41 li s6, 4 lui a0, 452183 @@ -1398,8 +1398,8 @@ j .LBB3_133 .LBB3_132: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit379 # in Loop: Header=BB3_133 Depth=1 - addw a0, s1, s9 - addiw s9, s9, 1 + addw a0, s1, s5 + addiw s5, s5, 1 sltiu a0, a0, -1 and a0, s10, a0 beqz a0, .LBB3_143 @@ -1408,7 +1408,7 @@ .Ltmp111: addi a0, sp, 304 mv a1, s7 - mv a2, s9 + mv a2, s5 call _ZN2PP3Cmd10get_stringB5cxx11Ei .Ltmp112: # %bb.134: # %invoke.cont141 @@ -1441,7 +1441,7 @@ bne a1, s4, .LBB3_139 # %bb.138: # %invoke.cont147 # in Loop: Header=BB3_133 Depth=1 - mv s2, s9 + mv s2, s5 .LBB3_139: # %invoke.cont147 # in Loop: Header=BB3_133 Depth=1 addi a1, a1, -41 @@ -1466,25 +1466,25 @@ .Ltmp114: mv a0, s7 li a1, 0 - mv a2, s5 - ld s3, 200(sp) # 8-byte Folded Reload + mv a2, s9 + ld s3, 208(sp) # 8-byte Folded Reload mv a3, s3 call _ZN2PP3Cmd11fatal_errorEiRNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEERi@plt .Ltmp115: # %bb.146: # %invoke.cont202 - addi s5, s5, 16 + addi s9, s9, 16 .Ltmp116: .Lpcrel_hi27: auipc a0, %pcrel_hi(.L.str.23) addi a1, a0, %pcrel_lo(.Lpcrel_hi27) li a2, 53 - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp117: # %bb.147: # %invoke.cont204 - ld a0, 0(s5) + ld a0, 0(s9) ld a0, -24(a0) - add a0, s5, a0 + add a0, s9, a0 ld s1, 240(a0) bnez s1, .LBB3_148 j .LBB3_812 @@ -1499,25 +1499,25 @@ .Ltmp418: mv a0, s7 mv a1, s1 - mv a2, s5 - ld s2, 200(sp) # 8-byte Folded Reload + mv a2, s9 + ld s2, 208(sp) # 8-byte Folded Reload mv a3, s2 call _ZN2PP3Cmd11fatal_errorEiRNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEERi@plt .Ltmp419: # %bb.151: # %invoke.cont99 - addi s5, s5, 16 + addi s9, s9, 16 .Ltmp420: .Lpcrel_hi15: auipc a0, %pcrel_hi(.L.str.17) addi a1, a0, %pcrel_lo(.Lpcrel_hi15) li a2, 59 - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp421: # %bb.152: # %invoke.cont101 - ld a0, 0(s5) + ld a0, 0(s9) ld a0, -24(a0) - add a0, s5, a0 + add a0, s9, a0 ld s1, 240(a0) bnez s1, .LBB3_153 j .LBB3_814 @@ -1532,25 +1532,25 @@ .Ltmp353: mv a0, s7 li a1, 0 - mv a2, s5 - ld s2, 200(sp) # 8-byte Folded Reload + mv a2, s9 + ld s2, 208(sp) # 8-byte Folded Reload mv a3, s2 call _ZN2PP3Cmd11fatal_errorEiRNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEERi@plt .Ltmp354: # %bb.156: # %invoke.cont165 - addi s5, s5, 16 + addi s9, s9, 16 .Ltmp355: .Lpcrel_hi21: auipc a0, %pcrel_hi(.L.str.21) addi a1, a0, %pcrel_lo(.Lpcrel_hi21) li a2, 53 - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp356: # %bb.157: # %invoke.cont167 - ld a0, 0(s5) + ld a0, 0(s9) ld a0, -24(a0) - add a0, s5, a0 + add a0, s9, a0 ld s1, 240(a0) bnez s1, .LBB3_158 j .LBB3_816 @@ -1565,7 +1565,7 @@ li a0, 4 blt s2, a0, .LBB3_179 # %bb.161: # %for.body255.lr.ph - li s9, 3 + li s5, 3 addi s6, sp, 320 li s11, 115 li s1, 101 @@ -1588,41 +1588,41 @@ sd a0, 368(s0) .LBB3_164: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit492 # in Loop: Header=BB3_165 Depth=1 - addiw s9, s9, 4 - bge s9, s2, .LBB3_179 + addiw s5, s5, 4 + bge s5, s2, .LBB3_179 .LBB3_165: # %for.body255 # =>This Inner Loop Header: Depth=1 .Ltmp210: mv a1, s7 - mv a2, s9 + mv a2, s5 mv a3, s0 call _ZN2PP12Restartblock8add_wordERNS_3CmdEiRSt5dequeINS_4WordESaIS4_EE .Ltmp211: # %bb.166: # %invoke.cont258 # in Loop: Header=BB3_165 Depth=1 - addiw a2, s9, 1 + addiw a2, s5, 1 .Ltmp212: mv a1, s7 - ld a3, 112(sp) # 8-byte Folded Reload + ld a3, 120(sp) # 8-byte Folded Reload call _ZN2PP12Restartblock8add_wordERNS_3CmdEiRSt5dequeINS_4WordESaIS4_EE .Ltmp213: # %bb.167: # %invoke.cont261 # in Loop: Header=BB3_165 Depth=1 - addiw a2, s9, 2 + addiw a2, s5, 2 .Ltmp214: mv a1, s7 - ld a3, 128(sp) # 8-byte Folded Reload + ld a3, 136(sp) # 8-byte Folded Reload call _ZN2PP12Restartblock8add_wordERNS_3CmdEiRSt5dequeINS_4WordESaIS4_EE .Ltmp215: # %bb.168: # %invoke.cont264 # in Loop: Header=BB3_165 Depth=1 - addiw a2, s9, 3 + addiw a2, s5, 3 bge a2, s2, .LBB3_170 # %bb.169: # %if.then267 # in Loop: Header=BB3_165 Depth=1 .Ltmp219: mv a1, s7 - ld a3, 120(sp) # 8-byte Folded Reload + ld a3, 128(sp) # 8-byte Folded Reload call _ZN2PP12Restartblock8add_wordERNS_3CmdEiRSt5dequeINS_4WordESaIS4_EE .Ltmp220: j .LBB3_173 @@ -1637,7 +1637,7 @@ .Ltmp216: addi a4, sp, 272 mv a1, s7 - ld a3, 120(sp) # 8-byte Folded Reload + ld a3, 128(sp) # 8-byte Folded Reload call _ZN2PP12Restartblock8add_wordERNS_3CmdEiRSt5dequeINS_4WordESaIS4_EENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE .Ltmp217: # %bb.171: # %invoke.cont276 @@ -1681,7 +1681,7 @@ # in Loop: Header=BB3_165 Depth=1 .Ltmp222: addi a1, sp, 304 - ld a0, 96(sp) # 8-byte Folded Reload + ld a0, 104(sp) # 8-byte Folded Reload call _ZNSt5dequeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE16_M_push_back_auxIJS5_EEEvDpOT_ .Ltmp223: # %bb.177: # %invoke.cont287 @@ -1693,57 +1693,58 @@ call _ZdlPv@plt j .LBB3_164 .LBB3_179: # %for.cond297.preheader - sd zero, 256(sp) # 8-byte Folded Spill + li s10, 0 li s11, -1 slli s8, s11, 62 - addi s10, sp, 320 addi s4, sp, 320 + addi s6, sp, 320 lui a0, 190279 addiw a0, a0, -978 - sd a0, 72(sp) # 8-byte Folded Spill + sd a0, 80(sp) # 8-byte Folded Spill lui a0, 190039 addiw a0, a0, -978 - sd a0, 64(sp) # 8-byte Folded Spill + sd a0, 72(sp) # 8-byte Folded Spill lui a0, 190230 addiw a0, a0, 1326 - sd a0, 56(sp) # 8-byte Folded Spill + sd a0, 64(sp) # 8-byte Folded Spill lui a0, 190278 addiw a0, a0, 1838 - sd a0, 48(sp) # 8-byte Folded Spill + sd a0, 56(sp) # 8-byte Folded Spill lui a0, 190038 addiw a0, a0, 1838 - sd a0, 40(sp) # 8-byte Folded Spill - sd s5, 104(sp) # 8-byte Folded Spill + sd a0, 48(sp) # 8-byte Folded Spill + sd s9, 112(sp) # 8-byte Folded Spill j .LBB3_181 .LBB3_180: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit1158 # in Loop: Header=BB3_181 Depth=1 or a0, s1, s8 - or a1, s10, s4 - or a0, a0, a1 ld a1, 144(sp) # 8-byte Folded Reload - ld a2, 136(sp) # 8-byte Folded Reload - or a1, a2, a1 + or a1, s10, a1 + or a0, a0, a1 + ld a1, 160(sp) # 8-byte Folded Reload ld a2, 152(sp) # 8-byte Folded Reload + or a1, a2, a1 + ld a2, 168(sp) # 8-byte Folded Reload or a1, a1, a2 or a0, a0, a1 - ld a1, 168(sp) # 8-byte Folded Reload - ld a2, 160(sp) # 8-byte Folded Reload - or a1, a2, a1 - or a1, a1, s9 + ld a1, 176(sp) # 8-byte Folded Reload + or a1, a1, s4 ld a2, 184(sp) # 8-byte Folded Reload or a1, a1, a2 + ld a2, 192(sp) # 8-byte Folded Reload + or a1, a1, a2 or a0, a0, a1 or a0, a0, s5 andi a0, a0, 1 - ld a1, 256(sp) # 8-byte Folded Reload - addi a1, a1, 128 - sd a1, 256(sp) # 8-byte Folded Spill - mv s11, s6 + mv s10, s6 + addi s10, s6, 128 + mv s5, s9 + mv s11, s9 mv s8, s3 mv s3, s2 - ld s5, 104(sp) # 8-byte Folded Reload - addi s10, sp, 320 + ld s9, 112(sp) # 8-byte Folded Reload addi s4, sp, 320 + addi s6, sp, 320 bnez a0, .LBB3_181 j .LBB3_540 .LBB3_181: # %for.cond297 @@ -1781,18 +1782,15 @@ # %bb.183: # %land.lhs.true.i.i.i.i # in Loop: Header=BB3_181 Depth=1 srli a3, a3, 2 - li s6, 16 bnez a3, .LBB3_186 # %bb.184: # %if.then.i.i.i.i501 # in Loop: Header=BB3_181 Depth=1 - ld a0, 256(sp) # 8-byte Folded Reload - add a2, a2, a0 + add a2, a2, s10 j .LBB3_187 .LBB3_185: # %cond.false.i.i.i.i # in Loop: Header=BB3_181 Depth=1 srli a3, a3, 2 or a3, a3, s8 - li s6, 16 .LBB3_186: # %cond.end.i.i.i.i # in Loop: Header=BB3_181 Depth=1 slli a2, a3, 3 @@ -1808,10 +1806,11 @@ # in Loop: Header=BB3_181 Depth=1 sd s3, 304(sp) ld s1, 8(a2) - ld s9, 0(a2) + ld s5, 0(a2) sd s1, 368(sp) mv a0, s3 - bltu s1, s6, .LBB3_190 + li a1, 16 + bltu s1, a1, .LBB3_190 # %bb.188: # %if.then.i.i.i # in Loop: Header=BB3_181 Depth=1 .Ltmp264: @@ -1834,12 +1833,12 @@ bne s1, a1, .LBB3_193 # %bb.192: # %if.then.i.i.i.i.i505 # in Loop: Header=BB3_181 Depth=1 - lbu a1, 0(s9) + lbu a1, 0(s5) sb a1, 0(a0) j .LBB3_194 .LBB3_193: # %if.end.i.i.i.i.i.i # in Loop: Header=BB3_181 Depth=1 - mv a1, s9 + mv a1, s5 mv a2, s1 call memcpy@plt .LBB3_194: # %invoke.cont308 @@ -1851,7 +1850,7 @@ sb zero, 0(a0) ld a0, 312(sp) ld s1, 304(sp) - li s9, 0 + li s5, 0 li a1, 6 bne a0, a1, .LBB3_196 # %bb.195: # %if.end.i.i512 @@ -1862,7 +1861,7 @@ li a2, 6 mv a0, s1 call bcmp@plt - seqz s9, a0 + seqz s5, a0 .LBB3_196: # %invoke.cont310 # in Loop: Header=BB3_181 Depth=1 beq s1, s3, .LBB3_198 @@ -1879,7 +1878,7 @@ srai a0, a0, 7 add a3, s11, a0 addi a3, a3, 1 - sd s9, 192(sp) # 8-byte Folded Spill + sd s5, 200(sp) # 8-byte Folded Spill bltz a3, .LBB3_201 # %bb.199: # %land.lhs.true.i.i.i.i540 # in Loop: Header=BB3_181 Depth=1 @@ -1887,8 +1886,7 @@ bnez a3, .LBB3_202 # %bb.200: # %if.then.i.i.i.i544 # in Loop: Header=BB3_181 Depth=1 - ld a0, 256(sp) # 8-byte Folded Reload - add a2, a2, a0 + add a2, a2, s10 j .LBB3_203 .LBB3_201: # %cond.false.i.i.i.i530 # in Loop: Header=BB3_181 Depth=1 @@ -1907,12 +1905,13 @@ addi a2, a0, 128 .LBB3_203: # %_ZNSt5dequeIN2PP4WordESaIS1_EEixEm.exit546 # in Loop: Header=BB3_181 Depth=1 - sd s10, 304(sp) + sd s4, 304(sp) ld s1, 8(a2) - ld s9, 0(a2) + ld s5, 0(a2) sd s1, 368(sp) - mv a0, s10 - bltu s1, s6, .LBB3_206 + mv a0, s4 + li a1, 16 + bltu s1, a1, .LBB3_206 # %bb.204: # %if.then.i.i.i555 # in Loop: Header=BB3_181 Depth=1 .Ltmp267: @@ -1935,12 +1934,12 @@ bne s1, a1, .LBB3_209 # %bb.208: # %if.then.i.i.i.i.i553 # in Loop: Header=BB3_181 Depth=1 - lbu a1, 0(s9) + lbu a1, 0(s5) sb a1, 0(a0) j .LBB3_210 .LBB3_209: # %if.end.i.i.i.i.i.i554 # in Loop: Header=BB3_181 Depth=1 - mv a1, s9 + mv a1, s5 mv a2, s1 call memcpy@plt .LBB3_210: # %invoke.cont321 @@ -1966,8 +1965,8 @@ seqz a2, a0 .LBB3_212: # %invoke.cont323 # in Loop: Header=BB3_181 Depth=1 - sd a2, 184(sp) # 8-byte Folded Spill - beq s1, s10, .LBB3_214 + sd a2, 192(sp) # 8-byte Folded Spill + beq s1, s4, .LBB3_214 # %bb.213: # %if.then.i.i574 # in Loop: Header=BB3_181 Depth=1 mv a0, s1 @@ -1988,8 +1987,7 @@ bnez a3, .LBB3_218 # %bb.216: # %if.then.i.i.i.i602 # in Loop: Header=BB3_181 Depth=1 - ld a0, 256(sp) # 8-byte Folded Reload - add a2, a2, a0 + add a2, a2, s10 j .LBB3_219 .LBB3_217: # %cond.false.i.i.i.i588 # in Loop: Header=BB3_181 Depth=1 @@ -2007,12 +2005,13 @@ addi a2, a0, 128 .LBB3_219: # %_ZNSt5dequeIN2PP4WordESaIS1_EEixEm.exit604 # in Loop: Header=BB3_181 Depth=1 - sd s4, 304(sp) + sd s6, 304(sp) ld s1, 8(a2) - ld s9, 0(a2) + ld s5, 0(a2) sd s1, 368(sp) - mv a0, s4 - bltu s1, s6, .LBB3_222 + mv a0, s6 + li a1, 16 + bltu s1, a1, .LBB3_222 # %bb.220: # %if.then.i.i.i613 # in Loop: Header=BB3_181 Depth=1 .Ltmp270: @@ -2035,12 +2034,12 @@ bne s1, a1, .LBB3_225 # %bb.224: # %if.then.i.i.i.i.i611 # in Loop: Header=BB3_181 Depth=1 - lbu a1, 0(s9) + lbu a1, 0(s5) sb a1, 0(a0) j .LBB3_226 .LBB3_225: # %if.end.i.i.i.i.i.i612 # in Loop: Header=BB3_181 Depth=1 - mv a1, s9 + mv a1, s5 mv a2, s1 call memcpy@plt .LBB3_226: # %invoke.cont334 @@ -2052,7 +2051,7 @@ sb zero, 0(a0) ld a0, 312(sp) ld s1, 304(sp) - li s9, 0 + li s5, 0 li a1, 6 bne a0, a1, .LBB3_228 # %bb.227: # %if.end.i.i628 @@ -2063,10 +2062,10 @@ li a2, 6 mv a0, s1 call bcmp@plt - seqz s9, a0 + seqz s5, a0 .LBB3_228: # %invoke.cont336 # in Loop: Header=BB3_181 Depth=1 - beq s1, s4, .LBB3_230 + beq s1, s6, .LBB3_230 # %bb.229: # %if.then.i.i632 # in Loop: Header=BB3_181 Depth=1 mv a0, s1 @@ -2080,7 +2079,7 @@ srai a0, a0, 7 add a3, s11, a0 addi a3, a3, 1 - sd s9, 176(sp) # 8-byte Folded Spill + sd s5, 184(sp) # 8-byte Folded Spill bltz a3, .LBB3_233 # %bb.231: # %land.lhs.true.i.i.i.i656 # in Loop: Header=BB3_181 Depth=1 @@ -2089,8 +2088,7 @@ bnez a3, .LBB3_234 # %bb.232: # %if.then.i.i.i.i660 # in Loop: Header=BB3_181 Depth=1 - ld a0, 256(sp) # 8-byte Folded Reload - add a2, a2, a0 + add a2, a2, s10 j .LBB3_235 .LBB3_233: # %cond.false.i.i.i.i646 # in Loop: Header=BB3_181 Depth=1 @@ -2112,10 +2110,11 @@ # in Loop: Header=BB3_181 Depth=1 sd s4, 304(sp) ld s1, 8(a2) - ld s9, 0(a2) + ld s5, 0(a2) sd s1, 368(sp) mv a0, s4 - bltu s1, s6, .LBB3_238 + li a1, 16 + bltu s1, a1, .LBB3_238 # %bb.236: # %if.then.i.i.i671 # in Loop: Header=BB3_181 Depth=1 .Ltmp273: @@ -2138,12 +2137,12 @@ bne s1, a1, .LBB3_241 # %bb.240: # %if.then.i.i.i.i.i669 # in Loop: Header=BB3_181 Depth=1 - lbu a1, 0(s9) + lbu a1, 0(s5) sb a1, 0(a0) j .LBB3_242 .LBB3_241: # %if.end.i.i.i.i.i.i670 # in Loop: Header=BB3_181 Depth=1 - mv a1, s9 + mv a1, s5 mv a2, s1 call memcpy@plt .LBB3_242: # %invoke.cont347 @@ -2155,7 +2154,7 @@ sb zero, 0(a0) ld a0, 312(sp) ld s1, 304(sp) - li a2, 0 + li s6, 0 li a1, 6 bne a0, a1, .LBB3_244 # %bb.243: # %if.end.i.i686 @@ -2166,10 +2165,9 @@ li a2, 6 mv a0, s1 call bcmp@plt - seqz a2, a0 + seqz s6, a0 .LBB3_244: # %invoke.cont349 # in Loop: Header=BB3_181 Depth=1 - sd a2, 168(sp) # 8-byte Folded Spill beq s1, s4, .LBB3_246 # %bb.245: # %if.then.i.i690 # in Loop: Header=BB3_181 Depth=1 @@ -2192,8 +2190,7 @@ bnez a3, .LBB3_250 # %bb.248: # %if.then.i.i.i.i718 # in Loop: Header=BB3_181 Depth=1 - ld a0, 256(sp) # 8-byte Folded Reload - add a2, a2, a0 + add a2, a2, s10 j .LBB3_251 .LBB3_249: # %cond.false.i.i.i.i704 # in Loop: Header=BB3_181 Depth=1 @@ -2214,10 +2211,11 @@ # in Loop: Header=BB3_181 Depth=1 sd s4, 304(sp) ld s1, 8(a2) - ld s9, 0(a2) + ld s5, 0(a2) sd s1, 368(sp) mv a0, s4 - bltu s1, s6, .LBB3_254 + li a1, 16 + bltu s1, a1, .LBB3_254 # %bb.252: # %if.then.i.i.i729 # in Loop: Header=BB3_181 Depth=1 .Ltmp276: @@ -2240,12 +2238,12 @@ bne s1, a1, .LBB3_257 # %bb.256: # %if.then.i.i.i.i.i727 # in Loop: Header=BB3_181 Depth=1 - lbu a1, 0(s9) + lbu a1, 0(s5) sb a1, 0(a0) j .LBB3_258 .LBB3_257: # %if.end.i.i.i.i.i.i728 # in Loop: Header=BB3_181 Depth=1 - mv a1, s9 + mv a1, s5 mv a2, s1 call memcpy@plt .LBB3_258: # %invoke.cont360 @@ -2271,7 +2269,7 @@ seqz a2, a0 .LBB3_260: # %invoke.cont362 # in Loop: Header=BB3_181 Depth=1 - sd a2, 160(sp) # 8-byte Folded Spill + sd a2, 176(sp) # 8-byte Folded Spill beq s1, s4, .LBB3_262 # %bb.261: # %if.then.i.i748 # in Loop: Header=BB3_181 Depth=1 @@ -2294,8 +2292,7 @@ bnez a3, .LBB3_266 # %bb.264: # %if.then.i.i.i.i776 # in Loop: Header=BB3_181 Depth=1 - ld a0, 256(sp) # 8-byte Folded Reload - add a2, a2, a0 + add a2, a2, s10 j .LBB3_267 .LBB3_265: # %cond.false.i.i.i.i762 # in Loop: Header=BB3_181 Depth=1 @@ -2316,10 +2313,11 @@ # in Loop: Header=BB3_181 Depth=1 sd s4, 304(sp) ld s1, 8(a2) - ld s9, 0(a2) + ld s5, 0(a2) sd s1, 368(sp) mv a0, s4 - bltu s1, s6, .LBB3_270 + li a1, 16 + bltu s1, a1, .LBB3_270 # %bb.268: # %if.then.i.i.i787 # in Loop: Header=BB3_181 Depth=1 .Ltmp279: @@ -2342,12 +2340,12 @@ bne s1, a1, .LBB3_273 # %bb.272: # %if.then.i.i.i.i.i785 # in Loop: Header=BB3_181 Depth=1 - lbu a1, 0(s9) + lbu a1, 0(s5) sb a1, 0(a0) j .LBB3_274 .LBB3_273: # %if.end.i.i.i.i.i.i786 # in Loop: Header=BB3_181 Depth=1 - mv a1, s9 + mv a1, s5 mv a2, s1 call memcpy@plt .LBB3_274: # %invoke.cont373 @@ -2359,7 +2357,7 @@ sb zero, 0(a0) ld a0, 312(sp) ld s1, 304(sp) - li s9, 0 + li s5, 0 li a1, 6 bne a0, a1, .LBB3_276 # %bb.275: # %if.end.i.i802 @@ -2370,7 +2368,7 @@ li a2, 6 mv a0, s1 call bcmp@plt - seqz s9, a0 + seqz s5, a0 .LBB3_276: # %invoke.cont375 # in Loop: Header=BB3_181 Depth=1 beq s1, s4, .LBB3_278 @@ -2387,7 +2385,7 @@ srai a0, a0, 7 add a3, s11, a0 addi a3, a3, 1 - sd s9, 152(sp) # 8-byte Folded Spill + sd s5, 168(sp) # 8-byte Folded Spill bltz a3, .LBB3_281 # %bb.279: # %land.lhs.true.i.i.i.i830 # in Loop: Header=BB3_181 Depth=1 @@ -2396,8 +2394,7 @@ bnez a3, .LBB3_282 # %bb.280: # %if.then.i.i.i.i834 # in Loop: Header=BB3_181 Depth=1 - ld a0, 256(sp) # 8-byte Folded Reload - add a2, a2, a0 + add a2, a2, s10 j .LBB3_283 .LBB3_281: # %cond.false.i.i.i.i820 # in Loop: Header=BB3_181 Depth=1 @@ -2419,10 +2416,11 @@ # in Loop: Header=BB3_181 Depth=1 sd s4, 304(sp) ld s1, 8(a2) - ld s9, 0(a2) + ld s5, 0(a2) sd s1, 368(sp) mv a0, s4 - bltu s1, s6, .LBB3_286 + li a1, 16 + bltu s1, a1, .LBB3_286 # %bb.284: # %if.then.i.i.i845 # in Loop: Header=BB3_181 Depth=1 .Ltmp282: @@ -2445,12 +2443,12 @@ bne s1, a1, .LBB3_289 # %bb.288: # %if.then.i.i.i.i.i843 # in Loop: Header=BB3_181 Depth=1 - lbu a1, 0(s9) + lbu a1, 0(s5) sb a1, 0(a0) j .LBB3_290 .LBB3_289: # %if.end.i.i.i.i.i.i844 # in Loop: Header=BB3_181 Depth=1 - mv a1, s9 + mv a1, s5 mv a2, s1 call memcpy@plt .LBB3_290: # %invoke.cont386 @@ -2477,7 +2475,7 @@ slli a4, a4, 24 or a3, a4, a3 or a1, a3, a1 - ld a2, 72(sp) # 8-byte Folded Reload + ld a2, 80(sp) # 8-byte Folded Reload xor a1, a1, a2 seqz s1, a1 .LBB3_292: # %invoke.cont388 @@ -2495,7 +2493,7 @@ srai a0, a0, 7 add a3, s11, a0 addi a3, a3, 1 - sd s1, 144(sp) # 8-byte Folded Spill + sd s1, 160(sp) # 8-byte Folded Spill bltz a3, .LBB3_297 # %bb.295: # %land.lhs.true.i.i.i.i888 # in Loop: Header=BB3_181 Depth=1 @@ -2504,8 +2502,7 @@ bnez a3, .LBB3_298 # %bb.296: # %if.then.i.i.i.i892 # in Loop: Header=BB3_181 Depth=1 - ld a0, 256(sp) # 8-byte Folded Reload - add a2, a2, a0 + add a2, a2, s10 j .LBB3_299 .LBB3_297: # %cond.false.i.i.i.i878 # in Loop: Header=BB3_181 Depth=1 @@ -2527,10 +2524,11 @@ # in Loop: Header=BB3_181 Depth=1 sd s4, 304(sp) ld s1, 8(a2) - ld s9, 0(a2) + ld s5, 0(a2) sd s1, 368(sp) mv a0, s4 - bltu s1, s6, .LBB3_302 + li a1, 16 + bltu s1, a1, .LBB3_302 # %bb.300: # %if.then.i.i.i903 # in Loop: Header=BB3_181 Depth=1 .Ltmp285: @@ -2553,12 +2551,12 @@ bne s1, a1, .LBB3_305 # %bb.304: # %if.then.i.i.i.i.i901 # in Loop: Header=BB3_181 Depth=1 - lbu a1, 0(s9) + lbu a1, 0(s5) sb a1, 0(a0) j .LBB3_306 .LBB3_305: # %if.end.i.i.i.i.i.i902 # in Loop: Header=BB3_181 Depth=1 - mv a1, s9 + mv a1, s5 mv a2, s1 call memcpy@plt .LBB3_306: # %invoke.cont399 @@ -2585,7 +2583,7 @@ slli a4, a4, 24 or a3, a4, a3 or a1, a3, a1 - ld a2, 64(sp) # 8-byte Folded Reload + ld a2, 72(sp) # 8-byte Folded Reload xor a1, a1, a2 seqz s1, a1 .LBB3_308: # %invoke.cont401 @@ -2604,7 +2602,7 @@ add a3, s11, a0 addi a4, a3, 1 srli a3, a4, 2 - sd s1, 136(sp) # 8-byte Folded Spill + sd s1, 152(sp) # 8-byte Folded Spill bltz a4, .LBB3_313 # %bb.311: # %land.lhs.true.i.i.i.i946 # in Loop: Header=BB3_181 Depth=1 @@ -2612,8 +2610,7 @@ bnez a3, .LBB3_314 # %bb.312: # %if.then.i.i.i.i950 # in Loop: Header=BB3_181 Depth=1 - ld a0, 256(sp) # 8-byte Folded Reload - add a2, a2, a0 + add a2, a2, s10 j .LBB3_315 .LBB3_313: # %cond.false.i.i.i.i936 # in Loop: Header=BB3_181 Depth=1 @@ -2634,10 +2631,11 @@ # in Loop: Header=BB3_181 Depth=1 sd s4, 304(sp) ld s1, 8(a2) - ld s9, 0(a2) + ld s5, 0(a2) sd s1, 368(sp) mv a0, s4 - bltu s1, s6, .LBB3_318 + li a1, 16 + bltu s1, a1, .LBB3_318 # %bb.316: # %if.then.i.i.i961 # in Loop: Header=BB3_181 Depth=1 .Ltmp288: @@ -2660,12 +2658,12 @@ bne s1, a1, .LBB3_321 # %bb.320: # %if.then.i.i.i.i.i959 # in Loop: Header=BB3_181 Depth=1 - lbu a1, 0(s9) + lbu a1, 0(s5) sb a1, 0(a0) j .LBB3_322 .LBB3_321: # %if.end.i.i.i.i.i.i960 # in Loop: Header=BB3_181 Depth=1 - mv a1, s9 + mv a1, s5 mv a2, s1 call memcpy@plt .LBB3_322: # %invoke.cont412 @@ -2677,7 +2675,7 @@ sb zero, 0(a0) ld a1, 312(sp) ld a0, 304(sp) - li s5, 0 + li s1, 0 li a2, 4 bne a1, a2, .LBB3_324 # %bb.323: # %if.end.i.i976 @@ -2692,9 +2690,9 @@ slli a4, a4, 24 or a3, a4, a3 or a1, a3, a1 - ld a2, 56(sp) # 8-byte Folded Reload + ld a2, 64(sp) # 8-byte Folded Reload xor a1, a1, a2 - seqz s5, a1 + seqz s1, a1 .LBB3_324: # %invoke.cont414 # in Loop: Header=BB3_181 Depth=1 beq a0, s4, .LBB3_326 @@ -2711,14 +2709,14 @@ add a3, s11, a0 addi a4, a3, 1 srli a3, a4, 2 + sd s1, 144(sp) # 8-byte Folded Spill bltz a4, .LBB3_329 # %bb.327: # %land.lhs.true.i.i.i.i1004 # in Loop: Header=BB3_181 Depth=1 bnez a3, .LBB3_330 # %bb.328: # %if.then.i.i.i.i1008 # in Loop: Header=BB3_181 Depth=1 - ld a0, 256(sp) # 8-byte Folded Reload - add a2, a2, a0 + add a2, a2, s10 j .LBB3_331 .LBB3_329: # %cond.false.i.i.i.i994 # in Loop: Header=BB3_181 Depth=1 @@ -2739,9 +2737,10 @@ addi a0, sp, 320 sd a0, 304(sp) ld s1, 8(a2) - ld s9, 0(a2) + ld s5, 0(a2) sd s1, 368(sp) - bltu s1, s6, .LBB3_334 + li a1, 16 + bltu s1, a1, .LBB3_334 # %bb.332: # %if.then.i.i.i1019 # in Loop: Header=BB3_181 Depth=1 .Ltmp291: @@ -2764,19 +2763,19 @@ bne s1, a1, .LBB3_337 # %bb.336: # %if.then.i.i.i.i.i1017 # in Loop: Header=BB3_181 Depth=1 - lbu a1, 0(s9) + lbu a1, 0(s5) sb a1, 0(a0) j .LBB3_338 .LBB3_337: # %if.end.i.i.i.i.i.i1018 # in Loop: Header=BB3_181 Depth=1 - mv a1, s9 + mv a1, s5 mv a2, s1 call memcpy@plt .LBB3_338: # %invoke.cont425 # in Loop: Header=BB3_181 Depth=1 - mv s4, s5 - li s5, 16 - mv s6, s2 + mv s4, s6 + mv s6, s10 + mv s9, s2 ld a0, 368(sp) ld a1, 304(sp) sd a0, 312(sp) @@ -2826,8 +2825,7 @@ bnez a3, .LBB3_346 # %bb.344: # %if.then.i.i.i.i1066 # in Loop: Header=BB3_181 Depth=1 - ld a0, 256(sp) # 8-byte Folded Reload - add a2, a2, a0 + add a2, a2, s6 j .LBB3_347 .LBB3_345: # %cond.false.i.i.i.i1052 # in Loop: Header=BB3_181 Depth=1 @@ -2848,9 +2846,10 @@ addi a0, sp, 320 sd a0, 304(sp) ld s1, 8(a2) - ld s9, 0(a2) + ld s5, 0(a2) sd s1, 368(sp) - bltu s1, s5, .LBB3_350 + li a1, 16 + bltu s1, a1, .LBB3_350 # %bb.348: # %if.then.i.i.i1077 # in Loop: Header=BB3_181 Depth=1 .Ltmp294: @@ -2873,12 +2872,12 @@ bne s1, a1, .LBB3_353 # %bb.352: # %if.then.i.i.i.i.i1075 # in Loop: Header=BB3_181 Depth=1 - lbu a1, 0(s9) + lbu a1, 0(s5) sb a1, 0(a0) j .LBB3_354 .LBB3_353: # %if.end.i.i.i.i.i.i1076 # in Loop: Header=BB3_181 Depth=1 - mv a1, s9 + mv a1, s5 mv a2, s1 call memcpy@plt .LBB3_354: # %invoke.cont438 @@ -2907,7 +2906,7 @@ slli a4, a4, 24 or a3, a4, a3 or a1, a3, a1 - ld a2, 48(sp) # 8-byte Folded Reload + ld a2, 56(sp) # 8-byte Folded Reload xor a1, a1, a2 seqz s8, a1 .LBB3_356: # %invoke.cont440 @@ -2933,8 +2932,7 @@ bnez a3, .LBB3_362 # %bb.360: # %if.then.i.i.i.i1124 # in Loop: Header=BB3_181 Depth=1 - ld a0, 256(sp) # 8-byte Folded Reload - add a2, a2, a0 + add a2, a2, s6 j .LBB3_363 .LBB3_361: # %cond.false.i.i.i.i1110 # in Loop: Header=BB3_181 Depth=1 @@ -2956,9 +2954,10 @@ addi a0, sp, 320 sd a0, 304(sp) ld s1, 8(a2) - ld s9, 0(a2) + ld s5, 0(a2) sd s1, 368(sp) - bltu s1, s5, .LBB3_366 + li a1, 16 + bltu s1, a1, .LBB3_366 # %bb.364: # %if.then.i.i.i1135 # in Loop: Header=BB3_181 Depth=1 .Ltmp297: @@ -2981,12 +2980,12 @@ bne s1, a1, .LBB3_369 # %bb.368: # %if.then.i.i.i.i.i1133 # in Loop: Header=BB3_181 Depth=1 - lbu a1, 0(s9) + lbu a1, 0(s5) sb a1, 0(a0) j .LBB3_370 .LBB3_369: # %if.end.i.i.i.i.i.i1134 # in Loop: Header=BB3_181 Depth=1 - mv a1, s9 + mv a1, s5 mv a2, s1 call memcpy@plt .LBB3_370: # %invoke.cont451 @@ -3013,14 +3012,13 @@ slli a4, a4, 24 or a3, a4, a3 or a1, a3, a1 - ld a2, 40(sp) # 8-byte Folded Reload + ld a2, 48(sp) # 8-byte Folded Reload xor a1, a1, a2 seqz s1, a1 .LBB3_372: # %invoke.cont453 # in Loop: Header=BB3_181 Depth=1 addi a1, sp, 320 - ld s5, 192(sp) # 8-byte Folded Reload - ld s9, 176(sp) # 8-byte Folded Reload + ld s5, 200(sp) # 8-byte Folded Reload beq a0, a1, .LBB3_180 # %bb.373: # %if.then.i.i1154 # in Loop: Header=BB3_181 Depth=1 @@ -3042,7 +3040,7 @@ .Ltmp425: .LBB3_376: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i2382 .Ltmp426: - mv a0, s5 + mv a0, s9 call _ZNSo3putEc@plt .Ltmp427: # %bb.377: # %call1.i.noexc2393 @@ -3055,13 +3053,13 @@ auipc a0, %pcrel_hi(.L.str.18) addi a1, a0, %pcrel_lo(.Lpcrel_hi16) li a2, 66 - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp431: # %bb.379: # %invoke.cont106 - ld a0, 0(s5) + ld a0, 0(s9) ld a0, -24(a0) - add a0, s5, a0 + add a0, s9, a0 ld s1, 240(a0) bnez s1, .LBB3_380 j .LBB3_814 @@ -3087,7 +3085,7 @@ .Ltmp435: .LBB3_384: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i2408 .Ltmp436: - mv a0, s5 + mv a0, s9 call _ZNSo3putEc@plt .Ltmp437: # %bb.385: # %call1.i.noexc2419 @@ -3100,13 +3098,13 @@ auipc a0, %pcrel_hi(.L.str.19) addi a1, a0, %pcrel_lo(.Lpcrel_hi17) li a2, 51 - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp441: # %bb.387: # %invoke.cont111 - ld a0, 0(s5) + ld a0, 0(s9) ld a0, -24(a0) - add a0, s5, a0 + add a0, s9, a0 ld s1, 240(a0) bnez s1, .LBB3_388 j .LBB3_814 @@ -3132,7 +3130,7 @@ .Ltmp445: .LBB3_392: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i2434 .Ltmp446: - mv a0, s5 + mv a0, s9 call _ZNSo3putEc@plt .Ltmp447: # %bb.393: # %call1.i.noexc2445 @@ -3145,13 +3143,13 @@ auipc a0, %pcrel_hi(.L.str.13) addi a1, a0, %pcrel_lo(.Lpcrel_hi18) li a2, 46 - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp451: # %bb.395: # %invoke.cont116 - ld a0, 0(s5) + ld a0, 0(s9) ld a0, -24(a0) - add a0, s5, a0 + add a0, s9, a0 ld s1, 240(a0) bnez s1, .LBB3_396 j .LBB3_814 @@ -3177,7 +3175,7 @@ .Ltmp455: .LBB3_400: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i2460 .Ltmp456: - mv a0, s5 + mv a0, s9 call _ZNSo3putEc@plt .Ltmp457: # %bb.401: # %call1.i.noexc2471 @@ -3190,13 +3188,13 @@ auipc a0, %pcrel_hi(.L.str.14) addi a1, a0, %pcrel_lo(.Lpcrel_hi19) li a2, 44 - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp461: # %bb.403: # %invoke.cont121 - ld a0, 0(s5) + ld a0, 0(s9) ld a0, -24(a0) - add a0, s5, a0 + add a0, s9, a0 ld s1, 240(a0) bnez s1, .LBB3_404 j .LBB3_814 @@ -3222,7 +3220,7 @@ .Ltmp465: .LBB3_408: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i2486 .Ltmp466: - mv a0, s5 + mv a0, s9 call _ZNSo3putEc@plt .Ltmp467: # %bb.409: # %call1.i.noexc2497 @@ -3235,13 +3233,13 @@ auipc a0, %pcrel_hi(.L.str.15) addi a1, a0, %pcrel_lo(.Lpcrel_hi20) li a2, 60 - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp471: # %bb.411: # %invoke.cont126 - ld a0, 0(s5) + ld a0, 0(s9) ld a0, -24(a0) - add a0, s5, a0 + add a0, s9, a0 ld s1, 240(a0) bnez s1, .LBB3_412 j .LBB3_814 @@ -3267,7 +3265,7 @@ .Ltmp475: .LBB3_416: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i2512 .Ltmp476: - mv a0, s5 + mv a0, s9 call _ZNSo3putEc@plt .Ltmp477: # %bb.417: # %call1.i.noexc2523 @@ -3299,7 +3297,7 @@ .Ltmp121: .LBB3_422: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i2694 .Ltmp122: - mv a0, s5 + mv a0, s9 call _ZNSo3putEc@plt .Ltmp123: # %bb.423: # %call1.i.noexc2705 @@ -3312,13 +3310,13 @@ auipc a0, %pcrel_hi(.L.str.24) addi a1, a0, %pcrel_lo(.Lpcrel_hi28) li a2, 41 - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp127: # %bb.425: # %invoke.cont209 .Ltmp128: addiw a1, s2, -3 - mv a0, s5 + mv a0, s9 call _ZNSolsEi@plt .Ltmp129: # %bb.426: # %invoke.cont211 @@ -3364,13 +3362,13 @@ auipc a0, %pcrel_hi(.L.str.25) addi a1, a0, %pcrel_lo(.Lpcrel_hi29) li a2, 50 - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp139: # %bb.434: # %invoke.cont216 - ld a0, 0(s5) + ld a0, 0(s9) ld a0, -24(a0) - add a0, s5, a0 + add a0, s9, a0 ld s1, 240(a0) bnez s1, .LBB3_435 j .LBB3_812 @@ -3396,7 +3394,7 @@ .Ltmp143: .LBB3_439: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i2746 .Ltmp144: - mv a0, s5 + mv a0, s9 call _ZNSo3putEc@plt .Ltmp145: # %bb.440: # %call1.i.noexc2757 @@ -3409,13 +3407,13 @@ auipc a0, %pcrel_hi(.L.str.26) addi a1, a0, %pcrel_lo(.Lpcrel_hi30) li a2, 39 - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp149: # %bb.442: # %invoke.cont221 - ld a0, 0(s5) + ld a0, 0(s9) ld a0, -24(a0) - add a0, s5, a0 + add a0, s9, a0 ld s1, 240(a0) bnez s1, .LBB3_443 j .LBB3_812 @@ -3441,7 +3439,7 @@ .Ltmp153: .LBB3_447: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i2772 .Ltmp154: - mv a0, s5 + mv a0, s9 call _ZNSo3putEc@plt .Ltmp155: # %bb.448: # %call1.i.noexc2783 @@ -3454,13 +3452,13 @@ auipc a0, %pcrel_hi(.L.str.27) addi a1, a0, %pcrel_lo(.Lpcrel_hi31) li a2, 15 - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp159: # %bb.450: # %invoke.cont226 - ld a0, 0(s5) + ld a0, 0(s9) ld a0, -24(a0) - add a0, s5, a0 + add a0, s9, a0 ld s1, 240(a0) bnez s1, .LBB3_451 j .LBB3_812 @@ -3486,7 +3484,7 @@ .Ltmp163: .LBB3_455: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i2798 .Ltmp164: - mv a0, s5 + mv a0, s9 call _ZNSo3putEc@plt .Ltmp165: # %bb.456: # %call1.i.noexc2809 @@ -3499,13 +3497,13 @@ auipc a0, %pcrel_hi(.L.str.28) addi a1, a0, %pcrel_lo(.Lpcrel_hi32) li a2, 44 - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp169: # %bb.458: # %invoke.cont231 - ld a0, 0(s5) + ld a0, 0(s9) ld a0, -24(a0) - add a0, s5, a0 + add a0, s9, a0 ld s1, 240(a0) bnez s1, .LBB3_459 j .LBB3_812 @@ -3531,7 +3529,7 @@ .Ltmp173: .LBB3_463: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i2824 .Ltmp174: - mv a0, s5 + mv a0, s9 call _ZNSo3putEc@plt .Ltmp175: # %bb.464: # %call1.i.noexc2835 @@ -3544,13 +3542,13 @@ auipc a0, %pcrel_hi(.L.str.29) addi a1, a0, %pcrel_lo(.Lpcrel_hi33) li a2, 25 - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp179: # %bb.466: # %invoke.cont236 - ld a0, 0(s5) + ld a0, 0(s9) ld a0, -24(a0) - add a0, s5, a0 + add a0, s9, a0 ld s1, 240(a0) bnez s1, .LBB3_467 j .LBB3_812 @@ -3576,7 +3574,7 @@ .Ltmp183: .LBB3_471: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i2850 .Ltmp184: - mv a0, s5 + mv a0, s9 call _ZNSo3putEc@plt .Ltmp185: # %bb.472: # %call1.i.noexc2861 @@ -3589,13 +3587,13 @@ auipc a0, %pcrel_hi(.L.str.30) addi a1, a0, %pcrel_lo(.Lpcrel_hi34) li a2, 36 - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp189: # %bb.474: # %invoke.cont241 - ld a0, 0(s5) + ld a0, 0(s9) ld a0, -24(a0) - add a0, s5, a0 + add a0, s9, a0 ld s1, 240(a0) bnez s1, .LBB3_475 j .LBB3_812 @@ -3621,7 +3619,7 @@ .Ltmp193: .LBB3_479: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i2876 .Ltmp194: - mv a0, s5 + mv a0, s9 call _ZNSo3putEc@plt .Ltmp195: # %bb.480: # %call1.i.noexc2887 @@ -3634,13 +3632,13 @@ auipc a0, %pcrel_hi(.L.str.31) addi a1, a0, %pcrel_lo(.Lpcrel_hi35) li a2, 44 - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp199: # %bb.482: # %invoke.cont246 - ld a0, 0(s5) + ld a0, 0(s9) ld a0, -24(a0) - add a0, s5, a0 + add a0, s9, a0 ld s1, 240(a0) bnez s1, .LBB3_483 j .LBB3_812 @@ -3666,7 +3664,7 @@ .Ltmp203: .LBB3_487: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i2902 .Ltmp204: - mv a0, s5 + mv a0, s9 call _ZNSo3putEc@plt .Ltmp205: # %bb.488: # %call1.i.noexc2913 @@ -3693,7 +3691,7 @@ .Ltmp360: .LBB3_492: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i2538 .Ltmp361: - mv a0, s5 + mv a0, s9 call _ZNSo3putEc@plt .Ltmp362: # %bb.493: # %call1.i.noexc2549 @@ -3706,13 +3704,13 @@ auipc a0, %pcrel_hi(.L.str.22) addi a1, a0, %pcrel_lo(.Lpcrel_hi22) li a2, 33 - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp366: # %bb.495: # %invoke.cont172 - ld a0, 0(s5) + ld a0, 0(s9) ld a0, -24(a0) - add a0, s5, a0 + add a0, s9, a0 ld s1, 240(a0) bnez s1, .LBB3_496 j .LBB3_816 @@ -3738,7 +3736,7 @@ .Ltmp370: .LBB3_500: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i2564 .Ltmp371: - mv a0, s5 + mv a0, s9 call _ZNSo3putEc@plt .Ltmp372: # %bb.501: # %call1.i.noexc2575 @@ -3751,13 +3749,13 @@ auipc a0, %pcrel_hi(.L.str.19) addi a1, a0, %pcrel_lo(.Lpcrel_hi23) li a2, 51 - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp376: # %bb.503: # %invoke.cont177 - ld a0, 0(s5) + ld a0, 0(s9) ld a0, -24(a0) - add a0, s5, a0 + add a0, s9, a0 ld s1, 240(a0) bnez s1, .LBB3_504 j .LBB3_816 @@ -3783,7 +3781,7 @@ .Ltmp380: .LBB3_508: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i2590 .Ltmp381: - mv a0, s5 + mv a0, s9 call _ZNSo3putEc@plt .Ltmp382: # %bb.509: # %call1.i.noexc2601 @@ -3796,13 +3794,13 @@ auipc a0, %pcrel_hi(.L.str.13) addi a1, a0, %pcrel_lo(.Lpcrel_hi24) li a2, 46 - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp386: # %bb.511: # %invoke.cont182 - ld a0, 0(s5) + ld a0, 0(s9) ld a0, -24(a0) - add a0, s5, a0 + add a0, s9, a0 ld s1, 240(a0) bnez s1, .LBB3_512 j .LBB3_816 @@ -3828,7 +3826,7 @@ .Ltmp390: .LBB3_516: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i2616 .Ltmp391: - mv a0, s5 + mv a0, s9 call _ZNSo3putEc@plt .Ltmp392: # %bb.517: # %call1.i.noexc2627 @@ -3841,13 +3839,13 @@ auipc a0, %pcrel_hi(.L.str.14) addi a1, a0, %pcrel_lo(.Lpcrel_hi25) li a2, 44 - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp396: # %bb.519: # %invoke.cont187 - ld a0, 0(s5) + ld a0, 0(s9) ld a0, -24(a0) - add a0, s5, a0 + add a0, s9, a0 ld s1, 240(a0) bnez s1, .LBB3_520 j .LBB3_816 @@ -3873,7 +3871,7 @@ .Ltmp400: .LBB3_524: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i2642 .Ltmp401: - mv a0, s5 + mv a0, s9 call _ZNSo3putEc@plt .Ltmp402: # %bb.525: # %call1.i.noexc2653 @@ -3886,13 +3884,13 @@ auipc a0, %pcrel_hi(.L.str.15) addi a1, a0, %pcrel_lo(.Lpcrel_hi26) li a2, 60 - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp406: # %bb.527: # %invoke.cont192 - ld a0, 0(s5) + ld a0, 0(s9) ld a0, -24(a0) - add a0, s5, a0 + add a0, s9, a0 ld s1, 240(a0) bnez s1, .LBB3_528 j .LBB3_816 @@ -3918,7 +3916,7 @@ .Ltmp410: .LBB3_532: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i2668 .Ltmp411: - mv a0, s5 + mv a0, s9 call _ZNSo3putEc@plt .Ltmp412: # %bb.533: # %call1.i.noexc2679 @@ -3937,20 +3935,20 @@ call _ZN2PP3Cmd10get_stringB5cxx11Ei .Ltmp226: # %bb.536: # %invoke.cont509 - ld a0, 240(sp) # 8-byte Folded Reload + ld a0, 248(sp) # 8-byte Folded Reload ld a0, 0(a0) - ld a1, 232(sp) # 8-byte Folded Reload - ld s3, 224(sp) # 8-byte Folded Reload - ld s4, 32(sp) # 8-byte Folded Reload + ld a1, 240(sp) # 8-byte Folded Reload + ld s3, 232(sp) # 8-byte Folded Reload + ld s4, 40(sp) # 8-byte Folded Reload beq a0, a1, .LBB3_543 # %bb.537: # %invoke.cont.thread.i ld a1, 304(sp) addi a2, sp, 320 beq a1, a2, .LBB3_599 # %bb.538: # %if.end26.i - ld a3, 232(sp) # 8-byte Folded Reload + ld a3, 240(sp) # 8-byte Folded Reload ld a3, 0(a3) - ld a4, 240(sp) # 8-byte Folded Reload + ld a4, 248(sp) # 8-byte Folded Reload sd a1, 0(a4) addi a1, sp, 312 vsetivli zero, 2, e64, m1, ta, ma @@ -3967,15 +3965,14 @@ ld a1, 120(s0) sub a0, a2, a0 srai a0, a0, 7 - add a3, a0, s6 + add a3, a0, s5 bltz a3, .LBB3_546 # %bb.541: # %land.lhs.true.i.i.i.i1184 li a4, 3 - ld s3, 200(sp) # 8-byte Folded Reload + ld s3, 208(sp) # 8-byte Folded Reload bltu a4, a3, .LBB3_547 # %bb.542: # %if.then.i.i.i.i1188 - ld a0, 256(sp) # 8-byte Folded Reload - add a2, a2, a0 + add a2, a2, s10 addi a0, a2, -128 j .LBB3_549 .LBB3_543: # %invoke.cont.i @@ -3983,7 +3980,7 @@ addi a2, sp, 320 beq a1, a2, .LBB3_598 # %bb.544: # %if.end26.thread.i - ld a0, 240(sp) # 8-byte Folded Reload + ld a0, 248(sp) # 8-byte Folded Reload sd a1, 0(a0) addi a0, sp, 312 vsetivli zero, 2, e64, m1, ta, ma @@ -3996,7 +3993,7 @@ .LBB3_546: # %cond.false.i.i.i.i1174 srli a3, a3, 2 or a3, a3, s8 - ld s3, 200(sp) # 8-byte Folded Reload + ld s3, 208(sp) # 8-byte Folded Reload j .LBB3_548 .LBB3_547: # %cond.true.i.i.i.i1186 srli a3, a3, 2 @@ -4005,30 +4002,30 @@ add a1, a1, a2 ld a1, 0(a1) slli a3, a3, 2 - add a0, a0, s6 + add a0, a0, s5 sub a0, a0, a3 slli a0, a0, 7 add a0, a1, a0 .LBB3_549: # %_ZNSt5dequeIN2PP4WordESaIS1_EEixEm.exit1190 .Ltmp300: - mv a1, s5 + mv a1, s9 mv a2, s3 call _ZN2PP4Word11fatal_errorERNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEERi@plt .Ltmp301: # %bb.550: # %invoke.cont464 - addi s5, s5, 16 + addi s9, s9, 16 .Ltmp302: .Lpcrel_hi42: auipc a0, %pcrel_hi(.L.str.46) addi a1, a0, %pcrel_lo(.Lpcrel_hi42) li a2, 31 - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp303: # %bb.551: # %invoke.cont466 - ld a0, 0(s5) + ld a0, 0(s9) ld a0, -24(a0) - add a0, s5, a0 + add a0, s9, a0 ld s1, 240(a0) bnez s1, .LBB3_552 j .LBB3_818 @@ -4054,7 +4051,7 @@ .Ltmp307: .LBB3_556: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i2928 .Ltmp308: - mv a0, s5 + mv a0, s9 call _ZNSo3putEc@plt .Ltmp309: # %bb.557: # %call1.i.noexc2939 @@ -4067,13 +4064,13 @@ auipc a0, %pcrel_hi(.L.str.47) addi a1, a0, %pcrel_lo(.Lpcrel_hi43) li a2, 44 - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp313: # %bb.559: # %invoke.cont471 - ld a0, 0(s5) + ld a0, 0(s9) ld a0, -24(a0) - add a0, s5, a0 + add a0, s9, a0 ld s1, 240(a0) bnez s1, .LBB3_560 j .LBB3_818 @@ -4099,7 +4096,7 @@ .Ltmp317: .LBB3_564: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i2954 .Ltmp318: - mv a0, s5 + mv a0, s9 call _ZNSo3putEc@plt .Ltmp319: # %bb.565: # %call1.i.noexc2965 @@ -4112,13 +4109,13 @@ auipc a0, %pcrel_hi(.L.str.48) addi a1, a0, %pcrel_lo(.Lpcrel_hi44) li a2, 60 - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp323: # %bb.567: # %invoke.cont476 - ld a0, 0(s5) + ld a0, 0(s9) ld a0, -24(a0) - add a0, s5, a0 + add a0, s9, a0 ld s1, 240(a0) bnez s1, .LBB3_568 j .LBB3_818 @@ -4144,7 +4141,7 @@ .Ltmp327: .LBB3_572: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i2980 .Ltmp328: - mv a0, s5 + mv a0, s9 call _ZNSo3putEc@plt .Ltmp329: # %bb.573: # %call1.i.noexc2991 @@ -4157,7 +4154,7 @@ auipc a0, %pcrel_hi(.L.str.49) addi a1, a0, %pcrel_lo(.Lpcrel_hi45) li a2, 25 - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp333: # %bb.575: # %invoke.cont481 @@ -4166,14 +4163,13 @@ ld a1, 120(s0) sub a0, a2, a0 srai a0, a0, 7 - add a3, a0, s6 + add a3, a0, s5 bltz a3, .LBB3_578 # %bb.576: # %land.lhs.true.i.i.i.i1228 li a4, 3 bltu a4, a3, .LBB3_579 # %bb.577: # %if.then.i.i.i.i1232 - ld a0, 256(sp) # 8-byte Folded Reload - add a2, a2, a0 + add a2, a2, s10 addi a0, a2, -128 j .LBB3_581 .LBB3_578: # %cond.false.i.i.i.i1218 @@ -4187,7 +4183,7 @@ add a1, a1, a2 ld a1, 0(a1) slli a3, a3, 2 - add a0, a0, s6 + add a0, a0, s5 sub a0, a0, a3 slli a0, a0, 7 add a0, a1, a0 @@ -4233,7 +4229,7 @@ ld a1, 304(sp) ld a2, 312(sp) .Ltmp337: - mv a0, s5 + mv a0, s9 call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt .Ltmp338: # %bb.589: # %invoke.cont490 @@ -4282,7 +4278,7 @@ mv a1, a2 .LBB3_599: # %if.then9.i addi a2, sp, 304 - ld a3, 240(sp) # 8-byte Folded Reload + ld a3, 248(sp) # 8-byte Folded Reload beq a2, a3, .LBB3_811 # %bb.600: # %if.then10.i ld a2, 312(sp) @@ -4298,14 +4294,14 @@ call memcpy@plt .LBB3_604: # %if.end18.i ld a0, 312(sp) - ld a1, 240(sp) # 8-byte Folded Reload + ld a1, 248(sp) # 8-byte Folded Reload ld a1, 0(a1) sd a0, 0(s4) add a0, a1, a0 sb zero, 0(a0) ld a0, 304(sp) .LBB3_605: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEOS4_.exit - sd s8, 256(sp) # 8-byte Folded Spill + sd s8, 208(sp) # 8-byte Folded Spill sd zero, 312(sp) sb zero, 0(a0) ld a0, 304(sp) @@ -4345,7 +4341,7 @@ addi a2, a2, -2 sub s10, s9, a1 ld s4, 0(s4) - ld a1, 240(sp) # 8-byte Folded Reload + ld a1, 248(sp) # 8-byte Folded Reload ld s5, 0(a1) sd a2, 192(sp) # 8-byte Folded Spill addi a1, a2, 1 @@ -4399,7 +4395,7 @@ bnez a0, .LBB3_609 .LBB3_618: # %if.then524 sw zero, 480(s0) - ld a1, 208(sp) # 8-byte Folded Reload + ld a1, 216(sp) # 8-byte Folded Reload ld a2, 16(a1) ld a0, 24(a1) li a4, -1 @@ -4434,11 +4430,11 @@ .LBB3_625: # %if.end531 li a0, -1 slli a0, a0, 57 - sd a0, 224(sp) # 8-byte Folded Spill - sd a5, 208(sp) # 8-byte Folded Spill + sd a0, 232(sp) # 8-byte Folded Spill + sd a5, 216(sp) # 8-byte Folded Spill beqz s1, .LBB3_628 # %bb.626: # %for.body535.lr.ph - ld a1, 248(sp) # 8-byte Folded Reload + ld a1, 256(sp) # 8-byte Folded Reload ld a0, 16(a1) ld a2, 24(a1) ld a1, 40(a1) @@ -4519,7 +4515,7 @@ addi s10, s10, 32 .LBB3_634: # %for.cond544 # =>This Inner Loop Header: Depth=1 - ld a1, 248(sp) # 8-byte Folded Reload + ld a1, 256(sp) # 8-byte Folded Reload ld a3, 16(a1) ld a0, 24(a1) ld a1, 40(a1) @@ -4537,7 +4533,7 @@ j .LBB3_639 .LBB3_637: # %cond.false.i.i.i.i1389 # in Loop: Header=BB3_634 Depth=1 - ld a3, 224(sp) # 8-byte Folded Reload + ld a3, 232(sp) # 8-byte Folded Reload or a2, a2, a3 .LBB3_638: # %cond.end.i.i.i.i1392 # in Loop: Header=BB3_634 Depth=1 @@ -4564,7 +4560,7 @@ li a0, 108 sb a0, 2(s9) sb s3, 3(s9) - ld a1, 80(sp) # 8-byte Folded Reload + ld a1, 88(sp) # 8-byte Folded Reload ld a2, 16(a1) ld a0, 24(a1) sb s4, 4(s9) @@ -4585,7 +4581,7 @@ .LBB3_643: # %cond.false.i.i.i.i1426 # in Loop: Header=BB3_634 Depth=1 srli a3, a3, 9 - ld a2, 208(sp) # 8-byte Folded Reload + ld a2, 216(sp) # 8-byte Folded Reload or a3, a3, a2 .LBB3_644: # %cond.end.i.i.i.i1429 # in Loop: Header=BB3_634 Depth=1 @@ -4661,7 +4657,7 @@ li s3, 1 bne a0, s3, .LBB3_657 # %bb.656: # %if.then587 - ld a0, 216(sp) # 8-byte Folded Reload + ld a0, 224(sp) # 8-byte Folded Reload sb zero, 0(a0) .LBB3_657: # %if.end588 li s8, 0 @@ -4672,10 +4668,10 @@ .Lpcrel_hi47: auipc a0, %pcrel_hi(.L.str.34) addi a0, a0, %pcrel_lo(.Lpcrel_hi47) - sd a0, 248(sp) # 8-byte Folded Spill + sd a0, 256(sp) # 8-byte Folded Spill .Lpcrel_hi48: auipc a0, %pcrel_hi(.L.str.40) - addi s5, a0, %pcrel_lo(.Lpcrel_hi48) + addi s6, a0, %pcrel_lo(.Lpcrel_hi48) j .LBB3_660 .LBB3_658: # %if.then.i # in Loop: Header=BB3_660 Depth=1 @@ -4727,7 +4723,7 @@ j .LBB3_666 .LBB3_664: # %cond.false.i.i.i.i1520 # in Loop: Header=BB3_660 Depth=1 - ld a2, 256(sp) # 8-byte Folded Reload + ld a2, 208(sp) # 8-byte Folded Reload or a3, a3, a2 .LBB3_665: # %cond.end.i.i.i.i1523 # in Loop: Header=BB3_660 Depth=1 @@ -4742,7 +4738,7 @@ # in Loop: Header=BB3_660 Depth=1 sd s2, 304(sp) ld s1, 8(a2) - ld s6, 0(a2) + ld s5, 0(a2) sd s1, 368(sp) mv a0, s2 bltu s1, s11, .LBB3_669 @@ -4767,12 +4763,12 @@ bne s1, s3, .LBB3_672 # %bb.671: # %if.then.i.i.i.i.i1543 # in Loop: Header=BB3_660 Depth=1 - lbu a1, 0(s6) + lbu a1, 0(s5) sb a1, 0(a0) j .LBB3_673 .LBB3_672: # %if.end.i.i.i.i.i.i1544 # in Loop: Header=BB3_660 Depth=1 - mv a1, s6 + mv a1, s5 mv a2, s1 call memcpy@plt .LBB3_673: # %invoke.cont602 @@ -4784,15 +4780,15 @@ sb zero, 0(a0) ld a0, 312(sp) ld s1, 304(sp) - li s6, 0 + li s5, 0 bne a0, s10, .LBB3_675 # %bb.674: # %if.end.i.i1554 # in Loop: Header=BB3_660 Depth=1 li a2, 6 mv a0, s1 - ld a1, 248(sp) # 8-byte Folded Reload + ld a1, 256(sp) # 8-byte Folded Reload call bcmp@plt - seqz s6, a0 + seqz s5, a0 .LBB3_675: # %invoke.cont604 # in Loop: Header=BB3_660 Depth=1 beq s1, s2, .LBB3_677 @@ -4802,7 +4798,7 @@ call _ZdlPv@plt .LBB3_677: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit1563 # in Loop: Header=BB3_660 Depth=1 - beqz s6, .LBB3_681 + beqz s5, .LBB3_681 # %bb.678: # %if.then608 # in Loop: Header=BB3_660 Depth=1 ld a2, 96(s0) @@ -4820,7 +4816,7 @@ # %bb.680: # %if.then.i.i.i.i1587 # in Loop: Header=BB3_660 Depth=1 add a0, a2, s8 - mv a1, s5 + mv a1, s6 j .LBB3_789 .LBB3_681: # %if.else614 # in Loop: Header=BB3_660 Depth=1 @@ -4842,7 +4838,7 @@ .LBB3_684: # %cond.false.i.i.i.i1573 # in Loop: Header=BB3_660 Depth=1 srli a2, a1, 2 - ld a3, 256(sp) # 8-byte Folded Reload + ld a3, 208(sp) # 8-byte Folded Reload or a3, a2, a3 .LBB3_685: # %cond.end.i.i.i.i1576 # in Loop: Header=BB3_660 Depth=1 @@ -4853,12 +4849,12 @@ sub a1, a1, a3 slli a1, a1, 7 add a0, a0, a1 - mv a1, s5 + mv a1, s6 j .LBB3_789 .LBB3_686: # %cond.false.i.i.i.i1606 # in Loop: Header=BB3_660 Depth=1 srli a2, a1, 2 - ld a3, 256(sp) # 8-byte Folded Reload + ld a3, 208(sp) # 8-byte Folded Reload or a3, a2, a3 .LBB3_687: # %cond.end.i.i.i.i1609 # in Loop: Header=BB3_660 Depth=1 @@ -4873,7 +4869,7 @@ # in Loop: Header=BB3_660 Depth=1 sd s9, 304(sp) ld s1, 8(a2) - ld s6, 0(a2) + ld s5, 0(a2) sd s1, 368(sp) mv a0, s9 bltu s1, s11, .LBB3_691 @@ -4898,12 +4894,12 @@ bne s1, s3, .LBB3_694 # %bb.693: # %if.then.i.i.i.i.i1629 # in Loop: Header=BB3_660 Depth=1 - lbu a1, 0(s6) + lbu a1, 0(s5) sb a1, 0(a0) j .LBB3_695 .LBB3_694: # %if.end.i.i.i.i.i.i1630 # in Loop: Header=BB3_660 Depth=1 - mv a1, s6 + mv a1, s5 mv a2, s1 call memcpy@plt .LBB3_695: # %invoke.cont620 @@ -4915,7 +4911,7 @@ sb zero, 0(a0) ld a0, 312(sp) ld s1, 304(sp) - li s6, 0 + li s5, 0 bne a0, s10, .LBB3_697 # %bb.696: # %if.end.i.i1640 # in Loop: Header=BB3_660 Depth=1 @@ -4925,7 +4921,7 @@ li a2, 6 mv a0, s1 call bcmp@plt - seqz s6, a0 + seqz s5, a0 .LBB3_697: # %invoke.cont622 # in Loop: Header=BB3_660 Depth=1 beq s1, s9, .LBB3_699 @@ -4935,7 +4931,7 @@ call _ZdlPv@plt .LBB3_699: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit1649 # in Loop: Header=BB3_660 Depth=1 - beqz s6, .LBB3_703 + beqz s5, .LBB3_703 # %bb.700: # %if.then626 # in Loop: Header=BB3_660 Depth=1 ld a3, 96(s0) @@ -4977,7 +4973,7 @@ j .LBB3_710 .LBB3_706: # %cond.false.i.i.i.i1659 # in Loop: Header=BB3_660 Depth=1 - ld a3, 256(sp) # 8-byte Folded Reload + ld a3, 208(sp) # 8-byte Folded Reload or a4, a4, a3 .LBB3_707: # %cond.end.i.i.i.i1662 # in Loop: Header=BB3_660 Depth=1 @@ -4991,7 +4987,7 @@ j .LBB3_789 .LBB3_708: # %cond.false.i.i.i.i1692 # in Loop: Header=BB3_660 Depth=1 - ld a3, 256(sp) # 8-byte Folded Reload + ld a3, 208(sp) # 8-byte Folded Reload or a2, a2, a3 .LBB3_709: # %cond.end.i.i.i.i1695 # in Loop: Header=BB3_660 Depth=1 @@ -5007,7 +5003,7 @@ addi a0, sp, 320 sd a0, 304(sp) ld s1, 8(a3) - ld s6, 0(a3) + ld s5, 0(a3) sd s1, 368(sp) bltu s1, s11, .LBB3_713 # %bb.711: # %if.then.i.i.i1717 @@ -5031,12 +5027,12 @@ bne s1, s3, .LBB3_716 # %bb.715: # %if.then.i.i.i.i.i1715 # in Loop: Header=BB3_660 Depth=1 - lbu a1, 0(s6) + lbu a1, 0(s5) sb a1, 0(a0) j .LBB3_717 .LBB3_716: # %if.end.i.i.i.i.i.i1716 # in Loop: Header=BB3_660 Depth=1 - mv a1, s6 + mv a1, s5 mv a2, s1 call memcpy@plt .LBB3_717: # %invoke.cont637 @@ -5048,7 +5044,7 @@ sb zero, 0(a0) ld a0, 312(sp) ld s1, 304(sp) - li s6, 0 + li s5, 0 bne a0, s10, .LBB3_719 # %bb.718: # %if.end.i.i1726 # in Loop: Header=BB3_660 Depth=1 @@ -5058,7 +5054,7 @@ li a2, 6 mv a0, s1 call bcmp@plt - seqz s6, a0 + seqz s5, a0 .LBB3_719: # %invoke.cont639 # in Loop: Header=BB3_660 Depth=1 addi a0, sp, 320 @@ -5069,7 +5065,7 @@ call _ZdlPv@plt .LBB3_721: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit1735 # in Loop: Header=BB3_660 Depth=1 - beqz s6, .LBB3_725 + beqz s5, .LBB3_725 # %bb.722: # %if.then643 # in Loop: Header=BB3_660 Depth=1 ld a2, 96(s0) @@ -5111,7 +5107,7 @@ j .LBB3_732 .LBB3_728: # %cond.false.i.i.i.i1745 # in Loop: Header=BB3_660 Depth=1 - ld a2, 256(sp) # 8-byte Folded Reload + ld a2, 208(sp) # 8-byte Folded Reload or a3, a3, a2 .LBB3_729: # %cond.end.i.i.i.i1748 # in Loop: Header=BB3_660 Depth=1 @@ -5128,7 +5124,7 @@ j .LBB3_789 .LBB3_730: # %cond.false.i.i.i.i1778 # in Loop: Header=BB3_660 Depth=1 - ld a3, 256(sp) # 8-byte Folded Reload + ld a3, 208(sp) # 8-byte Folded Reload or a2, a2, a3 .LBB3_731: # %cond.end.i.i.i.i1781 # in Loop: Header=BB3_660 Depth=1 @@ -5144,7 +5140,7 @@ addi a0, sp, 320 sd a0, 304(sp) ld s1, 8(a3) - ld s6, 0(a3) + ld s5, 0(a3) sd s1, 368(sp) bltu s1, s11, .LBB3_735 # %bb.733: # %if.then.i.i.i1803 @@ -5168,12 +5164,12 @@ bne s1, s3, .LBB3_738 # %bb.737: # %if.then.i.i.i.i.i1801 # in Loop: Header=BB3_660 Depth=1 - lbu a1, 0(s6) + lbu a1, 0(s5) sb a1, 0(a0) j .LBB3_739 .LBB3_738: # %if.end.i.i.i.i.i.i1802 # in Loop: Header=BB3_660 Depth=1 - mv a1, s6 + mv a1, s5 mv a2, s1 call memcpy@plt .LBB3_739: # %invoke.cont654 @@ -5185,7 +5181,7 @@ sb zero, 0(a0) ld a0, 312(sp) ld s1, 304(sp) - li s6, 0 + li s5, 0 bne a0, s10, .LBB3_741 # %bb.740: # %if.end.i.i1812 # in Loop: Header=BB3_660 Depth=1 @@ -5195,7 +5191,7 @@ li a2, 6 mv a0, s1 call bcmp@plt - seqz s6, a0 + seqz s5, a0 .LBB3_741: # %invoke.cont656 # in Loop: Header=BB3_660 Depth=1 addi a0, sp, 320 @@ -5206,7 +5202,7 @@ call _ZdlPv@plt .LBB3_743: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit1821 # in Loop: Header=BB3_660 Depth=1 - beqz s6, .LBB3_747 + beqz s5, .LBB3_747 # %bb.744: # %if.then660 # in Loop: Header=BB3_660 Depth=1 ld a2, 96(s0) @@ -5249,7 +5245,7 @@ .LBB3_750: # %cond.false.i.i.i.i1831 # in Loop: Header=BB3_660 Depth=1 srli a2, a1, 2 - ld a3, 256(sp) # 8-byte Folded Reload + ld a3, 208(sp) # 8-byte Folded Reload or a3, a2, a3 .LBB3_751: # %cond.end.i.i.i.i1834 # in Loop: Header=BB3_660 Depth=1 @@ -5267,7 +5263,7 @@ .LBB3_752: # %cond.false.i.i.i.i1864 # in Loop: Header=BB3_660 Depth=1 srli a2, a1, 2 - ld a3, 256(sp) # 8-byte Folded Reload + ld a3, 208(sp) # 8-byte Folded Reload or a3, a2, a3 .LBB3_753: # %cond.end.i.i.i.i1867 # in Loop: Header=BB3_660 Depth=1 @@ -5283,7 +5279,7 @@ addi a0, sp, 320 sd a0, 304(sp) ld s1, 8(a2) - ld s6, 0(a2) + ld s5, 0(a2) sd s1, 368(sp) bltu s1, s11, .LBB3_757 # %bb.755: # %if.then.i.i.i1889 @@ -5307,12 +5303,12 @@ bne s1, s3, .LBB3_760 # %bb.759: # %if.then.i.i.i.i.i1887 # in Loop: Header=BB3_660 Depth=1 - lbu a1, 0(s6) + lbu a1, 0(s5) sb a1, 0(a0) j .LBB3_761 .LBB3_760: # %if.end.i.i.i.i.i.i1888 # in Loop: Header=BB3_660 Depth=1 - mv a1, s6 + mv a1, s5 mv a2, s1 call memcpy@plt .LBB3_761: # %invoke.cont671 @@ -5324,7 +5320,7 @@ sb zero, 0(a0) ld a0, 312(sp) ld s1, 304(sp) - li s6, 0 + li s5, 0 bne a0, s10, .LBB3_763 # %bb.762: # %if.end.i.i1898 # in Loop: Header=BB3_660 Depth=1 @@ -5334,7 +5330,7 @@ li a2, 6 mv a0, s1 call bcmp@plt - seqz s6, a0 + seqz s5, a0 .LBB3_763: # %invoke.cont673 # in Loop: Header=BB3_660 Depth=1 addi a0, sp, 320 @@ -5345,7 +5341,7 @@ call _ZdlPv@plt .LBB3_765: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit1907 # in Loop: Header=BB3_660 Depth=1 - beqz s6, .LBB3_769 + beqz s5, .LBB3_769 # %bb.766: # %if.then677 # in Loop: Header=BB3_660 Depth=1 ld a2, 96(s0) @@ -5388,7 +5384,7 @@ .LBB3_772: # %cond.false.i.i.i.i1917 # in Loop: Header=BB3_660 Depth=1 srli a2, a1, 2 - ld a3, 256(sp) # 8-byte Folded Reload + ld a3, 208(sp) # 8-byte Folded Reload or a3, a2, a3 .LBB3_773: # %cond.end.i.i.i.i1920 # in Loop: Header=BB3_660 Depth=1 @@ -5406,7 +5402,7 @@ .LBB3_774: # %cond.false.i.i.i.i1950 # in Loop: Header=BB3_660 Depth=1 srli a2, a1, 2 - ld a3, 256(sp) # 8-byte Folded Reload + ld a3, 208(sp) # 8-byte Folded Reload or a3, a2, a3 .LBB3_775: # %cond.end.i.i.i.i1953 # in Loop: Header=BB3_660 Depth=1 @@ -5422,7 +5418,7 @@ addi a0, sp, 320 sd a0, 304(sp) ld s1, 8(a2) - ld s6, 0(a2) + ld s5, 0(a2) sd s1, 368(sp) bltu s1, s11, .LBB3_779 # %bb.777: # %if.then.i.i.i1975 @@ -5446,12 +5442,12 @@ bne s1, s3, .LBB3_782 # %bb.781: # %if.then.i.i.i.i.i1973 # in Loop: Header=BB3_660 Depth=1 - lbu a1, 0(s6) + lbu a1, 0(s5) sb a1, 0(a0) j .LBB3_783 .LBB3_782: # %if.end.i.i.i.i.i.i1974 # in Loop: Header=BB3_660 Depth=1 - mv a1, s6 + mv a1, s5 mv a2, s1 call memcpy@plt .LBB3_783: # %invoke.cont688 @@ -5463,7 +5459,7 @@ sb zero, 0(a0) ld a0, 312(sp) ld s1, 304(sp) - li s6, 0 + li s5, 0 bne a0, s10, .LBB3_785 # %bb.784: # %if.end.i.i1984 # in Loop: Header=BB3_660 Depth=1 @@ -5473,7 +5469,7 @@ li a2, 6 mv a0, s1 call bcmp@plt - seqz s6, a0 + seqz s5, a0 .LBB3_785: # %invoke.cont690 # in Loop: Header=BB3_660 Depth=1 addi a0, sp, 320 @@ -5484,11 +5480,11 @@ call _ZdlPv@plt .LBB3_787: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit1993 # in Loop: Header=BB3_660 Depth=1 - beqz s6, .LBB3_790 + beqz s5, .LBB3_790 # %bb.788: # %if.then694 # in Loop: Header=BB3_660 Depth=1 sb s3, 271(sp) - ld a0, 112(sp) # 8-byte Folded Reload + ld a0, 120(sp) # 8-byte Folded Reload mv a1, s4 call _ZNSt5dequeIN2PP4WordESaIS1_EEixEm .Lpcrel_hi61: @@ -5509,7 +5505,7 @@ # in Loop: Header=BB3_660 Depth=1 .Ltmp256: addi a1, sp, 271 - ld a0, 88(sp) # 8-byte Folded Reload + ld a0, 96(sp) # 8-byte Folded Reload call _ZNSt5dequeIbSaIbEE16_M_push_back_auxIJRKbEEEvDpOT_ .Ltmp257: j .LBB3_659 @@ -5517,7 +5513,7 @@ .Ltmp228: addi a0, sp, 304 mv a1, s7 - ld a2, 16(sp) # 8-byte Folded Reload + ld a2, 24(sp) # 8-byte Folded Reload call _ZN2PP3Cmd10get_stringB5cxx11Ei .Ltmp229: # %bb.793: # %invoke.cont716 @@ -5525,7 +5521,7 @@ ld a0, 304(sp) li a2, 4 li s1, 1 - ld s2, 24(sp) # 8-byte Folded Reload + ld s2, 32(sp) # 8-byte Folded Reload bne a1, a2, .LBB3_795 # %bb.794: # %if.end.i.i.i2010 lbu a1, 1(a0) @@ -5572,7 +5568,7 @@ j .LBB3_804 .LBB3_801: # %cond.false.i.i.i.i1364 # in Loop: Header=BB3_804 Depth=1 - ld a7, 224(sp) # 8-byte Folded Reload + ld a7, 232(sp) # 8-byte Folded Reload or a6, a6, a7 .LBB3_802: # %cond.end.i.i.i.i1367 # in Loop: Header=BB3_804 Depth=1 @@ -5742,28 +5738,28 @@ j .LBB3_864 .LBB3_851: # %lpad8 .Ltmp35: - sd s6, 96(sp) # 8-byte Folded Spill - sd s3, 120(sp) # 8-byte Folded Spill - sd s2, 128(sp) # 8-byte Folded Spill - sd s10, 112(sp) # 8-byte Folded Spill + sd s6, 104(sp) # 8-byte Folded Spill + sd s3, 128(sp) # 8-byte Folded Spill + sd s2, 136(sp) # 8-byte Folded Spill + sd s10, 120(sp) # 8-byte Folded Spill mv s4, a0 j .LBB3_872 .LBB3_852: # %lpad6 .Ltmp32: - sd s3, 120(sp) # 8-byte Folded Spill - sd s2, 128(sp) # 8-byte Folded Spill - sd s10, 112(sp) # 8-byte Folded Spill + sd s3, 128(sp) # 8-byte Folded Spill + sd s2, 136(sp) # 8-byte Folded Spill + sd s10, 120(sp) # 8-byte Folded Spill mv s4, a0 j .LBB3_873 .LBB3_853: # %lpad4 .Ltmp29: - sd s2, 128(sp) # 8-byte Folded Spill - sd s10, 112(sp) # 8-byte Folded Spill + sd s2, 136(sp) # 8-byte Folded Spill + sd s10, 120(sp) # 8-byte Folded Spill mv s4, a0 j .LBB3_874 .LBB3_854: # %lpad2 .Ltmp26: - sd s10, 112(sp) # 8-byte Folded Spill + sd s10, 120(sp) # 8-byte Folded Spill mv s4, a0 j .LBB3_875 .LBB3_855: # %lpad @@ -5778,7 +5774,7 @@ j .LBB3_864 .LBB3_857: # %lpad95 .Ltmp482: - sd s10, 112(sp) # 8-byte Folded Spill + sd s10, 120(sp) # 8-byte Folded Spill ld a1, 304(sp) mv s4, a0 beq a1, s3, .LBB3_865 @@ -5797,12 +5793,12 @@ j .LBB3_863 .LBB3_862: # %lpad52 .Ltmp107: - sd s8, 88(sp) # 8-byte Folded Spill - sd s6, 96(sp) # 8-byte Folded Spill - sd s3, 120(sp) # 8-byte Folded Spill - sd s2, 128(sp) # 8-byte Folded Spill + sd s8, 96(sp) # 8-byte Folded Spill + sd s6, 104(sp) # 8-byte Folded Spill + sd s3, 128(sp) # 8-byte Folded Spill + sd s2, 136(sp) # 8-byte Folded Spill .LBB3_863: # %ehcleanup731 - sd s10, 112(sp) # 8-byte Folded Spill + sd s10, 120(sp) # 8-byte Folded Spill .LBB3_864: # %ehcleanup731 mv s4, a0 .LBB3_865: # %ehcleanup731 @@ -5815,33 +5811,33 @@ .LBB3_867: # %lpad10 .Ltmp561: .LBB3_868: # %ehcleanup737 - sd s8, 88(sp) # 8-byte Folded Spill - sd s6, 96(sp) # 8-byte Folded Spill - sd s3, 120(sp) # 8-byte Folded Spill - sd s2, 128(sp) # 8-byte Folded Spill - sd s10, 112(sp) # 8-byte Folded Spill + sd s8, 96(sp) # 8-byte Folded Spill + sd s6, 104(sp) # 8-byte Folded Spill + sd s3, 128(sp) # 8-byte Folded Spill + sd s2, 136(sp) # 8-byte Folded Spill + sd s10, 120(sp) # 8-byte Folded Spill mv s4, a0 .LBB3_869: # %ehcleanup737 - ld a0, 240(sp) # 8-byte Folded Reload + ld a0, 248(sp) # 8-byte Folded Reload ld a0, 0(a0) - ld a1, 232(sp) # 8-byte Folded Reload + ld a1, 240(sp) # 8-byte Folded Reload beq a0, a1, .LBB3_871 # %bb.870: # %if.then.i.i2042 call _ZdlPv@plt .LBB3_871: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit2047 - ld a0, 88(sp) # 8-byte Folded Reload + ld a0, 96(sp) # 8-byte Folded Reload call _ZNSt5dequeIbSaIbEED2Ev .LBB3_872: # %ehcleanup740 - ld a0, 96(sp) # 8-byte Folded Reload + ld a0, 104(sp) # 8-byte Folded Reload call _ZNSt5dequeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EED2Ev .LBB3_873: # %ehcleanup741 - ld a0, 120(sp) # 8-byte Folded Reload + ld a0, 128(sp) # 8-byte Folded Reload call _ZNSt5dequeIN2PP4WordESaIS1_EED2Ev .LBB3_874: # %ehcleanup742 - ld a0, 128(sp) # 8-byte Folded Reload + ld a0, 136(sp) # 8-byte Folded Reload call _ZNSt5dequeIN2PP4WordESaIS1_EED2Ev .LBB3_875: # %ehcleanup743 - ld a0, 112(sp) # 8-byte Folded Reload + ld a0, 120(sp) # 8-byte Folded Reload call _ZNSt5dequeIN2PP4WordESaIS1_EED2Ev mv a0, s0 call _ZNSt5dequeIN2PP4WordESaIS1_EED2Ev --- build.head//MultiSource/Benchmarks/Prolangs-C/football/CMakeFiles/football.dir/common.s 2023-11-13 08:03:22.687549152 +0000 +++ build//MultiSource/Benchmarks/Prolangs-C/football/CMakeFiles/football.dir/common.s 2023-11-13 08:03:17.719692754 +0000 @@ -69,10 +69,10 @@ .cfi_offset s10, -96 .cfi_offset s11, -104 csrr a1, vlenb - li a2, 58 + li a2, 56 mul a1, a1, a2 sub sp, sp, a1 - .cfi_escape 0x0f, 0x0e, 0x72, 0x00, 0x11, 0x80, 0x03, 0x22, 0x11, 0x3a, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 384 + 58 * vlenb + .cfi_escape 0x0f, 0x0e, 0x72, 0x00, 0x11, 0x80, 0x03, 0x22, 0x11, 0x38, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 384 + 56 * vlenb mv a7, a0 addi a1, sp, 152 addi a0, sp, 248 @@ -88,250 +88,247 @@ vse32.v v8, (a1) vsetivli zero, 8, e32, m2, ta, ma vmv.v.i v18, 0 - addi t1, a7, 1 + addi t0, a7, 1 .Lpcrel_hi1: auipc a0, %pcrel_hi(common_teams) addi a2, a0, %pcrel_lo(.Lpcrel_hi1) - csrr t0, vlenb - sd t0, 56(sp) # 8-byte Folded Spill + csrr a5, vlenb + sd a5, 56(sp) # 8-byte Folded Spill blez a7, .LBB1_3 # %bb.1: # %for.cond4.preheader.preheader sd a7, 48(sp) # 8-byte Folded Spill - sd t1, 40(sp) # 8-byte Folded Spill - slli a0, t1, 32 + sd t0, 40(sp) # 8-byte Folded Spill + slli a0, t0, 32 srli t1, a0, 32 - lw s5, 152(sp) - lw a7, 156(sp) - lw a0, 160(sp) + lw a3, 152(sp) + lw t6, 156(sp) + lw ra, 160(sp) + lw s11, 164(sp) + lw s1, 168(sp) + lw a6, 172(sp) + lw a0, 176(sp) sd a0, 64(sp) # 8-byte Folded Spill - lw ra, 164(sp) - lw s11, 168(sp) - lw a3, 172(sp) - lw a5, 176(sp) lw a1, 180(sp) - lw s6, 184(sp) - lw t6, 188(sp) - lw s4, 192(sp) - lw s9, 196(sp) - lw t5, 216(sp) - lw s10, 220(sp) - lw t4, 224(sp) - lw t2, 228(sp) - lw a6, 232(sp) - lw a4, 236(sp) - lw s7, 240(sp) + lw s10, 184(sp) + lw s0, 188(sp) + lw a7, 192(sp) + lw t0, 196(sp) + lw t3, 216(sp) + lw s6, 220(sp) + lw s5, 224(sp) + lw s8, 228(sp) + lw s9, 232(sp) + lw s2, 236(sp) + lw a4, 240(sp) lw s3, 244(sp) - lw s1, 248(sp) - lw a0, 252(sp) - lw s2, 256(sp) - lw t3, 260(sp) - addi s0, t1, -1 - srli s8, t0, 1 - bgeu s0, s8, .LBB1_4 + lw t4, 248(sp) + lw t2, 252(sp) + lw t5, 256(sp) + lw a0, 260(sp) + addi s7, t1, -1 + srli s4, a5, 1 + bgeu s7, s4, .LBB1_4 # %bb.2: sd zero, 136(sp) # 8-byte Folded Spill - mv t0, s10 - mv s10, s9 - mv s9, s4 - mv s4, t6 - mv t6, s6 - mv s6, a4 + mv a5, t6 + mv t6, a4 sd zero, 128(sp) # 8-byte Folded Spill - mv s8, a6 + sd s2, 80(sp) # 8-byte Folded Spill sd zero, 120(sp) # 8-byte Folded Spill sd zero, 112(sp) # 8-byte Folded Spill - li s0, 1 - mv a4, t0 - mv a6, t4 - sd t6, 104(sp) # 8-byte Folded Spill - sd s4, 96(sp) # 8-byte Folded Spill - sd s9, 88(sp) # 8-byte Folded Spill - sd s10, 80(sp) # 8-byte Folded Spill - mv s9, a7 - ld s10, 64(sp) # 8-byte Folded Reload - sd s7, 72(sp) # 8-byte Folded Spill + li s2, 1 + mv s7, s1 + mv s1, s8 + mv s8, s9 + sd s10, 104(sp) # 8-byte Folded Spill + mv s4, t3 + sd s0, 96(sp) # 8-byte Folded Spill + mv s0, t5 + mv s9, s6 + mv s6, a3 + sd a7, 88(sp) # 8-byte Folded Spill + mv a4, s5 + mv s10, a5 + sd t0, 72(sp) # 8-byte Folded Spill + mv a3, s7 + ld a5, 64(sp) # 8-byte Folded Reload + mv s7, a0 j .LBB1_7 .LBB1_3: - li t2, 0 - li t5, 0 - li t4, 0 - li t3, 0 - li a3, 0 + li t6, 0 + li s8, 0 + li s5, 0 li s1, 0 + li a3, 0 + li t4, 0 li a4, 0 li a5, 0 - li s7, 0 - li s6, 0 - li s5, 0 li s4, 0 + li a6, 0 + li t1, 0 + li a0, 0 vmv2r.v v10, v18 j .LBB1_10 .LBB1_4: # %vector.ph sd t1, 32(sp) # 8-byte Folded Spill sd a0, 8(sp) csrr a0, vlenb - slli a0, a0, 4 + slli t1, a0, 4 + sub a0, t1, a0 add a0, sp, a0 addi a0, a0, 272 vs2r.v v18, (a0) # Unknown-size Folded Spill csrr t1, vlenb - li a0, 18 - mul t1, t1, a0 + slli a0, t1, 4 + add t1, a0, t1 ld a0, 8(sp) add t1, sp, t1 addi t1, t1, 272 vs1r.v v16, (t1) # Unknown-size Folded Spill - mv t1, a7 - vsetvli a7, zero, e32, m1, ta, ma + mv t1, a3 + vsetvli a3, zero, e32, m1, ta, ma vmv.v.i v30, 0 vsetvli zero, zero, e32, m1, tu, ma vmv.v.i v8, 0 - vmv.s.x v8, t3 - csrr a7, vlenb - li t3, 37 - mul a7, a7, t3 - add a7, sp, a7 - addi a7, a7, 272 - vs1r.v v8, (a7) # Unknown-size Folded Spill - mv a7, a0 - vsetvli a0, zero, e32, m2, ta, ma - vmv.v.i v18, 0 + vmv.s.x v8, a0 csrr a0, vlenb - li t3, 55 - mul a0, a0, t3 + li a3, 38 + mul a0, a0, a3 add a0, sp, a0 addi a0, a0, 272 - vs2r.v v18, (a0) # Unknown-size Folded Spill + vs1r.v v8, (a0) # Unknown-size Folded Spill + vsetvli a0, zero, e32, m2, ta, ma + vmv.v.i v18, 0 + vmv.v.i v20, 0 vsetvli a0, zero, e32, m1, tu, ma vmv1r.v v8, v30 - vmv.s.x v8, s2 + vmv.s.x v8, t5 csrr a0, vlenb - li t3, 35 - mul a0, a0, t3 + li a3, 36 + mul a0, a0, a3 add a0, sp, a0 addi a0, a0, 272 vs1r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - li t3, 53 - mul a0, a0, t3 + li a3, 54 + mul a0, a0, a3 add a0, sp, a0 addi a0, a0, 272 vs2r.v v18, (a0) # Unknown-size Folded Spill vmv1r.v v8, v30 - vmv.s.x v8, a7 + vmv.s.x v8, t2 csrr a0, vlenb - slli a7, a0, 5 - add a0, a7, a0 + li a3, 34 + mul a0, a0, a3 add a0, sp, a0 addi a0, a0, 272 vs1r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - li a7, 51 - mul a0, a0, a7 + li a3, 52 + mul a0, a0, a3 add a0, sp, a0 addi a0, a0, 272 vs2r.v v18, (a0) # Unknown-size Folded Spill vmv1r.v v8, v30 - vmv.s.x v8, s1 + vmv.s.x v8, t4 csrr a0, vlenb - slli a7, a0, 5 - sub a0, a7, a0 + slli a0, a0, 5 add a0, sp, a0 addi a0, a0, 272 vs1r.v v8, (a0) # Unknown-size Folded Spill vmv1r.v v8, v30 vmv.s.x v8, s3 csrr a0, vlenb - li a7, 29 - mul a0, a0, a7 + li a3, 30 + mul a0, a0, a3 add a0, sp, a0 addi a0, a0, 272 vs1r.v v8, (a0) # Unknown-size Folded Spill vmv1r.v v8, v30 - vmv.s.x v8, s7 + vmv.s.x v8, a4 csrr a0, vlenb - li a7, 27 - mul a0, a0, a7 + li a3, 28 + mul a0, a0, a3 add a0, sp, a0 addi a0, a0, 272 vs1r.v v8, (a0) # Unknown-size Folded Spill vmv1r.v v8, v30 - vmv.s.x v8, a4 + vmv.s.x v8, s2 csrr a0, vlenb - li a4, 25 - mul a0, a0, a4 + li a3, 26 + mul a0, a0, a3 add a0, sp, a0 addi a0, a0, 272 vs1r.v v8, (a0) # Unknown-size Folded Spill vmv1r.v v8, v30 - vmv.s.x v8, a6 + vmv.s.x v8, s9 csrr a0, vlenb - li a4, 23 - mul a0, a0, a4 + li a3, 24 + mul a0, a0, a3 add a0, sp, a0 addi a0, a0, 272 vs1r.v v8, (a0) # Unknown-size Folded Spill vmv1r.v v8, v30 - vmv.s.x v8, t2 + vmv.s.x v8, s8 csrr a0, vlenb - li a4, 21 - mul a0, a0, a4 + li a3, 22 + mul a0, a0, a3 add a0, sp, a0 addi a0, a0, 272 vs1r.v v8, (a0) # Unknown-size Folded Spill vmv1r.v v8, v30 - vmv.s.x v8, t4 + vmv.s.x v8, s5 csrr a0, vlenb - li a4, 19 - mul a0, a0, a4 + li a3, 20 + mul a0, a0, a3 add a0, sp, a0 addi a0, a0, 272 vs1r.v v8, (a0) # Unknown-size Folded Spill vmv1r.v v8, v30 - vmv.s.x v8, s10 + vmv.s.x v8, s6 csrr a0, vlenb - slli a4, a0, 4 - sub a0, a4, a0 + li a3, 18 + mul a0, a0, a3 add a0, sp, a0 addi a0, a0, 272 vs1r.v v8, (a0) # Unknown-size Folded Spill vmv1r.v v8, v30 - vmv.s.x v8, t5 + vmv.s.x v8, t3 csrr a0, vlenb - li a4, 14 - mul a0, a0, a4 + li a3, 14 + mul a0, a0, a3 add a0, sp, a0 addi a0, a0, 272 vs1r.v v8, (a0) # Unknown-size Folded Spill vmv1r.v v8, v30 - vmv.s.x v8, s9 + vmv.s.x v8, t0 csrr a0, vlenb - li a4, 13 - mul a0, a0, a4 + li a3, 13 + mul a0, a0, a3 add a0, sp, a0 addi a0, a0, 272 vs1r.v v8, (a0) # Unknown-size Folded Spill vmv1r.v v8, v30 - vmv.s.x v8, s4 + vmv.s.x v8, a7 csrr a0, vlenb - li a4, 12 - mul a0, a0, a4 + li a3, 12 + mul a0, a0, a3 add a0, sp, a0 addi a0, a0, 272 vs1r.v v8, (a0) # Unknown-size Folded Spill vmv1r.v v8, v30 - vmv.s.x v8, t6 + vmv.s.x v8, s0 csrr a0, vlenb - li a4, 11 - mul a0, a0, a4 + li a3, 11 + mul a0, a0, a3 add a0, sp, a0 addi a0, a0, 272 vs1r.v v8, (a0) # Unknown-size Folded Spill vmv1r.v v8, v30 - vmv.s.x v8, s6 + vmv.s.x v8, s10 csrr a0, vlenb - li a4, 10 - mul a0, a0, a4 + li a3, 10 + mul a0, a0, a3 add a0, sp, a0 addi a0, a0, 272 vs1r.v v8, (a0) # Unknown-size Folded Spill @@ -344,14 +341,15 @@ addi a0, a0, 272 vs1r.v v8, (a0) # Unknown-size Folded Spill vmv1r.v v8, v30 - vmv.s.x v8, a5 + ld a0, 64(sp) # 8-byte Folded Reload + vmv.s.x v8, a0 csrr a0, vlenb slli a0, a0, 3 add a0, sp, a0 addi a0, a0, 272 vs1r.v v8, (a0) # Unknown-size Folded Spill vmv1r.v v8, v30 - vmv.s.x v8, a3 + vmv.s.x v8, a6 csrr a0, vlenb slli a1, a0, 3 sub a0, a1, a0 @@ -359,7 +357,7 @@ addi a0, a0, 272 vs1r.v v8, (a0) # Unknown-size Folded Spill vmv1r.v v8, v30 - vmv.s.x v8, s11 + vmv.s.x v8, s1 csrr a0, vlenb li a1, 6 mul a0, a0, a1 @@ -367,7 +365,7 @@ addi a0, a0, 272 vs1r.v v8, (a0) # Unknown-size Folded Spill vmv1r.v v8, v30 - vmv.s.x v8, ra + vmv.s.x v8, s11 csrr a0, vlenb slli a1, a0, 2 add a0, a1, a0 @@ -375,16 +373,15 @@ addi a0, a0, 272 vs1r.v v8, (a0) # Unknown-size Folded Spill vmv1r.v v8, v30 - ld a0, 64(sp) # 8-byte Folded Reload - vmv.s.x v8, a0 + vmv.s.x v8, ra csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 272 vs1r.v v8, (a0) # Unknown-size Folded Spill vmv1r.v v31, v30 - vmv.s.x v31, t1 - vmv.s.x v30, s5 + vmv.s.x v31, t6 + vmv.s.x v30, t1 vmv2r.v v14, v18 vmv2r.v v8, v18 vmv2r.v v10, v18 @@ -395,37 +392,37 @@ vmv2r.v v4, v18 vmv2r.v v6, v18 csrr a0, vlenb - li a1, 49 + li a1, 50 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vs2r.v v18, (a0) # Unknown-size Folded Spill csrr a0, vlenb - li a1, 47 + li a1, 48 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vs2r.v v18, (a0) # Unknown-size Folded Spill csrr a0, vlenb - li a1, 45 + li a1, 46 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vs2r.v v18, (a0) # Unknown-size Folded Spill csrr a0, vlenb - li a1, 43 + li a1, 44 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vs2r.v v18, (a0) # Unknown-size Folded Spill csrr a0, vlenb - li a1, 41 + li a1, 42 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vs2r.v v18, (a0) # Unknown-size Folded Spill csrr a0, vlenb - li a1, 39 + li a1, 40 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 @@ -442,127 +439,121 @@ vmv2r.v v24, v18 vmv2r.v v22, v18 csrr a0, vlenb - li a1, 55 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 272 - vl2r.v v20, (a0) # Unknown-size Folded Reload - csrr a0, vlenb - li a1, 37 + li a1, 38 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vl1r.v v20, (a0) # Unknown-size Folded Reload csrr a0, vlenb - li a1, 55 + li a1, 38 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vs2r.v v20, (a0) # Unknown-size Folded Spill csrr a0, vlenb - li a1, 53 + li a1, 36 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 - vl2r.v v20, (a0) # Unknown-size Folded Reload + vl1r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - li a1, 35 + li a1, 54 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 - vl1r.v v20, (a0) # Unknown-size Folded Reload + vl2r.v v20, (a0) # Unknown-size Folded Reload + vmv1r.v v20, v8 csrr a0, vlenb - li a1, 53 + li a1, 54 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vs2r.v v20, (a0) # Unknown-size Folded Spill csrr a0, vlenb - li a1, 51 + li a1, 34 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 - vl2r.v v20, (a0) # Unknown-size Folded Reload + vl1r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - slli a1, a0, 5 - add a0, a1, a0 + li a1, 52 + mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 - vl1r.v v20, (a0) # Unknown-size Folded Reload + vl2r.v v20, (a0) # Unknown-size Folded Reload + vmv1r.v v20, v8 csrr a0, vlenb - li a1, 51 + li a1, 52 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vs2r.v v20, (a0) # Unknown-size Folded Spill csrr a0, vlenb - slli a1, a0, 5 - sub a0, a1, a0 + slli a0, a0, 5 add a0, sp, a0 addi a0, a0, 272 vl1r.v v14, (a0) # Unknown-size Folded Reload csrr a0, vlenb - li a1, 37 + li a1, 36 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vs2r.v v14, (a0) # Unknown-size Folded Spill csrr a0, vlenb - li a1, 29 + li a1, 30 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vl1r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - li a1, 35 + li a1, 34 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vs2r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - li a1, 27 + li a1, 28 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vl1r.v v10, (a0) # Unknown-size Folded Reload csrr a0, vlenb - slli a1, a0, 5 - add a0, a1, a0 + slli a0, a0, 5 add a0, sp, a0 addi a0, a0, 272 vs2r.v v10, (a0) # Unknown-size Folded Spill csrr a0, vlenb - li a1, 25 + li a1, 26 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vl1r.v v12, (a0) # Unknown-size Folded Reload csrr a0, vlenb - slli a1, a0, 5 - sub a0, a1, a0 + li a1, 30 + mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vs2r.v v12, (a0) # Unknown-size Folded Spill csrr a0, vlenb - li a1, 23 + li a1, 24 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vl1r.v v0, (a0) # Unknown-size Folded Reload csrr a0, vlenb - li a1, 29 + li a1, 28 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vs2r.v v0, (a0) # Unknown-size Folded Spill csrr a0, vlenb - li a1, 21 + li a1, 22 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vl1r.v v16, (a0) # Unknown-size Folded Reload csrr a0, vlenb - li a1, 27 + li a1, 26 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 @@ -576,25 +567,25 @@ vl2r.v v20, (a0) # Unknown-size Folded Reload vmv1r.v v15, v23 csrr a0, vlenb - li a1, 19 + li a1, 20 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vl1r.v v2, (a0) # Unknown-size Folded Reload csrr a0, vlenb - li a1, 25 + li a1, 24 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vs2r.v v2, (a0) # Unknown-size Folded Spill csrr a0, vlenb - slli a1, a0, 4 - sub a0, a1, a0 + li a1, 18 + mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vl1r.v v4, (a0) # Unknown-size Folded Reload csrr a0, vlenb - li a1, 23 + li a1, 22 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 @@ -606,7 +597,7 @@ addi a0, a0, 272 vl1r.v v6, (a0) # Unknown-size Folded Reload csrr a0, vlenb - li a1, 21 + li a1, 20 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 @@ -618,14 +609,14 @@ addi a0, a0, 272 vl1r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - li a1, 49 + li a1, 50 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vl2r.v v10, (a0) # Unknown-size Folded Reload vmv1r.v v9, v11 csrr a0, vlenb - li a1, 49 + li a1, 50 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 @@ -637,14 +628,14 @@ addi a0, a0, 272 vl1r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - li a1, 47 + li a1, 48 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vl2r.v v10, (a0) # Unknown-size Folded Reload vmv1r.v v9, v11 csrr a0, vlenb - li a1, 47 + li a1, 48 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 @@ -656,14 +647,14 @@ addi a0, a0, 272 vl1r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - li a1, 45 + li a1, 46 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vl2r.v v10, (a0) # Unknown-size Folded Reload vmv1r.v v9, v11 csrr a0, vlenb - li a1, 45 + li a1, 46 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 @@ -675,14 +666,14 @@ addi a0, a0, 272 vl1r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - li a1, 43 + li a1, 44 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vl2r.v v10, (a0) # Unknown-size Folded Reload vmv1r.v v9, v11 csrr a0, vlenb - li a1, 43 + li a1, 44 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 @@ -694,14 +685,14 @@ addi a0, a0, 272 vl1r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - li a1, 41 + li a1, 42 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vl2r.v v10, (a0) # Unknown-size Folded Reload vmv1r.v v9, v11 csrr a0, vlenb - li a1, 41 + li a1, 42 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 @@ -712,14 +703,14 @@ addi a0, a0, 272 vl1r.v v8, (a0) # Unknown-size Folded Reload csrr a0, vlenb - li a1, 39 + li a1, 40 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vl2r.v v10, (a0) # Unknown-size Folded Reload vmv1r.v v9, v11 csrr a0, vlenb - li a1, 39 + li a1, 40 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 @@ -749,13 +740,13 @@ vl1r.v v28, (a0) # Unknown-size Folded Reload vmv1r.v v24, v31 vmv1r.v v14, v30 - neg a0, s8 - sd s0, 64(sp) # 8-byte Folded Spill - and t2, s0, a0 + neg a0, s4 + sd s7, 64(sp) # 8-byte Folded Spill + and t2, s7, a0 addi a0, t2, 1 sd a0, 24(sp) # 8-byte Folded Spill addi a0, a2, 4 - slli a1, t0, 1 + slli a1, a5, 1 .Lpcrel_hi2: auipc a3, %got_pcrel_hi(team_plays) ld a3, %pcrel_lo(.Lpcrel_hi2)(a3) @@ -766,10 +757,10 @@ li s1, 48 li s2, 52 li s3, 56 - li s4, 60 - li s5, 64 - li s6, 68 - li s7, 72 + li s5, 60 + li s6, 64 + li s7, 68 + li s8, 72 li s9, 76 li s10, 80 li s11, 84 @@ -785,7 +776,7 @@ vmv2r.v v0, v18 csrr t3, vlenb sd a0, 8(sp) - li a0, 19 + li a0, 18 mul t3, t3, a0 ld a0, 8(sp) add t3, sp, t3 @@ -824,27 +815,27 @@ vadd.vv v16, v16, v10 sd a0, 8(sp) csrr a0, vlenb - li t3, 39 + li t3, 40 mul a0, a0, t3 add a0, sp, a0 addi a0, a0, 272 vl2r.v v8, (a0) # Unknown-size Folded Reload vadd.vv v8, v8, v12 csrr a0, vlenb - li t3, 39 + li t3, 40 mul a0, a0, t3 add a0, sp, a0 addi a0, a0, 272 vs2r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - li t3, 41 + li t3, 42 mul a0, a0, t3 add a0, sp, a0 addi a0, a0, 272 vl2r.v v8, (a0) # Unknown-size Folded Reload vadd.vv v8, v8, v18 csrr a0, vlenb - li t3, 41 + li t3, 42 mul a0, a0, t3 add a0, sp, a0 addi a0, a0, 272 @@ -857,131 +848,131 @@ vmv.v.v v24, v28 vmv.v.v v28, v20 csrr a0, vlenb - li t3, 43 + li t3, 44 mul a0, a0, t3 add a0, sp, a0 addi a0, a0, 272 vl2r.v v20, (a0) # Unknown-size Folded Reload vadd.vv v20, v20, v8 csrr a0, vlenb - li t3, 43 + li t3, 44 mul a0, a0, t3 add a0, sp, a0 addi a0, a0, 272 vs2r.v v20, (a0) # Unknown-size Folded Spill csrr a0, vlenb - li t3, 45 + li t3, 46 mul a0, a0, t3 add a0, sp, a0 addi a0, a0, 272 vl2r.v v8, (a0) # Unknown-size Folded Reload vadd.vv v8, v8, v10 csrr a0, vlenb - li t3, 45 + li t3, 46 mul a0, a0, t3 add a0, sp, a0 addi a0, a0, 272 vs2r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - li t3, 47 + li t3, 48 mul a0, a0, t3 add a0, sp, a0 addi a0, a0, 272 vl2r.v v8, (a0) # Unknown-size Folded Reload vadd.vv v8, v8, v12 csrr a0, vlenb - li t3, 47 + li t3, 48 mul a0, a0, t3 add a0, sp, a0 addi a0, a0, 272 vs2r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - li t3, 49 + li t3, 50 mul a0, a0, t3 add a0, sp, a0 addi a0, a0, 272 vl2r.v v8, (a0) # Unknown-size Folded Reload vadd.vv v8, v8, v18 csrr a0, vlenb - li t3, 49 + li t3, 50 mul a0, a0, t3 add a0, sp, a0 addi a0, a0, 272 vs2r.v v8, (a0) # Unknown-size Folded Spill vluxei64.v v8, (s2), v4 vluxei64.v v10, (s3), v4 - vluxei64.v v12, (s4), v4 - vluxei64.v v18, (s5), v4 + vluxei64.v v12, (s5), v4 + vluxei64.v v18, (s6), v4 vadd.vv v2, v2, v8 vadd.vv v0, v0, v10 vadd.vv v30, v30, v12 csrr a0, vlenb - li t3, 19 + li t3, 18 mul a0, a0, t3 add a0, sp, a0 addi a0, a0, 272 vl2r.v v8, (a0) # Unknown-size Folded Reload vadd.vv v8, v8, v18 csrr a0, vlenb - li t3, 19 + li t3, 18 mul a0, a0, t3 add a0, sp, a0 addi a0, a0, 272 vs2r.v v8, (a0) # Unknown-size Folded Spill - vluxei64.v v8, (s6), v4 - vluxei64.v v10, (s7), v4 + vluxei64.v v8, (s7), v4 + vluxei64.v v10, (s8), v4 vluxei64.v v12, (s9), v4 vluxei64.v v18, (s10), v4 vmv.v.v v20, v26 vmv.v.v v26, v16 csrr a0, vlenb - li t3, 21 + li t3, 20 mul a0, a0, t3 add a0, sp, a0 addi a0, a0, 272 vl2r.v v16, (a0) # Unknown-size Folded Reload vadd.vv v16, v16, v8 csrr a0, vlenb - li t3, 21 + li t3, 20 mul a0, a0, t3 add a0, sp, a0 addi a0, a0, 272 vs2r.v v16, (a0) # Unknown-size Folded Spill csrr a0, vlenb - li t3, 23 + li t3, 22 mul a0, a0, t3 add a0, sp, a0 addi a0, a0, 272 vl2r.v v8, (a0) # Unknown-size Folded Reload vadd.vv v8, v8, v10 csrr a0, vlenb - li t3, 23 + li t3, 22 mul a0, a0, t3 add a0, sp, a0 addi a0, a0, 272 vs2r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - li t3, 25 + li t3, 24 mul a0, a0, t3 add a0, sp, a0 addi a0, a0, 272 vl2r.v v8, (a0) # Unknown-size Folded Reload vadd.vv v8, v8, v12 csrr a0, vlenb - li t3, 25 + li t3, 24 mul a0, a0, t3 add a0, sp, a0 addi a0, a0, 272 vs2r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - li t3, 27 + li t3, 26 mul a0, a0, t3 add a0, sp, a0 addi a0, a0, 272 vl2r.v v8, (a0) # Unknown-size Folded Reload vadd.vv v8, v8, v18 csrr a0, vlenb - li t3, 27 + li t3, 26 mul a0, a0, t3 add a0, sp, a0 addi a0, a0, 272 @@ -991,14 +982,14 @@ vluxei64.v v12, (a4), v4 vluxei64.v v18, (a5), v4 csrr a0, vlenb - li t3, 29 + li t3, 28 mul a0, a0, t3 add a0, sp, a0 addi a0, a0, 272 vl2r.v v16, (a0) # Unknown-size Folded Reload vadd.vv v16, v16, v8 csrr a0, vlenb - li t3, 29 + li t3, 28 mul a0, a0, t3 add a0, sp, a0 addi a0, a0, 272 @@ -1009,40 +1000,38 @@ vmv.v.v v28, v24 vmv.v.v v24, v22 csrr a0, vlenb - slli t3, a0, 5 - sub a0, t3, a0 + li t3, 30 + mul a0, a0, t3 add a0, sp, a0 addi a0, a0, 272 vl2r.v v8, (a0) # Unknown-size Folded Reload vadd.vv v8, v8, v10 csrr a0, vlenb - slli t3, a0, 5 - sub a0, t3, a0 + li t3, 30 + mul a0, a0, t3 add a0, sp, a0 addi a0, a0, 272 vs2r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - slli t3, a0, 5 - add a0, t3, a0 + slli a0, a0, 5 add a0, sp, a0 addi a0, a0, 272 vl2r.v v8, (a0) # Unknown-size Folded Reload vadd.vv v8, v8, v12 csrr a0, vlenb - slli t3, a0, 5 - add a0, t3, a0 + slli a0, a0, 5 add a0, sp, a0 addi a0, a0, 272 vs2r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - li t3, 35 + li t3, 34 mul a0, a0, t3 add a0, sp, a0 addi a0, a0, 272 vl2r.v v8, (a0) # Unknown-size Folded Reload vadd.vv v8, v8, v18 csrr a0, vlenb - li t3, 35 + li t3, 34 mul a0, a0, t3 add a0, sp, a0 addi a0, a0, 272 @@ -1052,74 +1041,74 @@ vluxei64.v v12, (t0), v4 vluxei64.v v18, (t1), v4 csrr a0, vlenb - li t3, 37 + li t3, 36 mul a0, a0, t3 add a0, sp, a0 addi a0, a0, 272 vl2r.v v4, (a0) # Unknown-size Folded Reload vadd.vv v4, v4, v8 csrr a0, vlenb - li t3, 37 + li t3, 36 mul a0, a0, t3 add a0, sp, a0 addi a0, a0, 272 vs2r.v v4, (a0) # Unknown-size Folded Spill csrr a0, vlenb - li t3, 51 + li t3, 52 mul a0, a0, t3 add a0, sp, a0 addi a0, a0, 272 vl2r.v v8, (a0) # Unknown-size Folded Reload vadd.vv v8, v8, v10 csrr a0, vlenb - li t3, 51 + li t3, 52 mul a0, a0, t3 add a0, sp, a0 addi a0, a0, 272 vs2r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - li t3, 53 + li t3, 54 mul a0, a0, t3 add a0, sp, a0 addi a0, a0, 272 vl2r.v v8, (a0) # Unknown-size Folded Reload vadd.vv v8, v8, v12 csrr a0, vlenb - li t3, 53 + li t3, 54 mul a0, a0, t3 add a0, sp, a0 addi a0, a0, 272 vs2r.v v8, (a0) # Unknown-size Folded Spill csrr a0, vlenb - li t3, 55 + li t3, 38 mul a0, a0, t3 add a0, sp, a0 addi a0, a0, 272 vl2r.v v8, (a0) # Unknown-size Folded Reload vadd.vv v8, v8, v18 csrr t3, vlenb - li a0, 55 + li a0, 38 mul t3, t3, a0 ld a0, 8(sp) add t3, sp, t3 addi t3, t3, 272 vs2r.v v8, (t3) # Unknown-size Folded Spill - sub t2, t2, s8 + sub t2, t2, s4 add a0, a0, a1 bnez t2, .LBB1_5 # %bb.6: # %middle.block vmv.s.x v8, zero vredsum.vs v9, v2, v8 csrr a0, vlenb - slli a1, a0, 4 - sub a0, a1, a0 + li a1, 14 + mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vs1r.v v9, (a0) # Unknown-size Folded Spill vredsum.vs v10, v0, v8 vredsum.vs v11, v30, v8 csrr a0, vlenb - li a1, 19 + li a1, 18 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 @@ -1132,134 +1121,133 @@ vredsum.vs v6, v26, v8 vredsum.vs v16, v16, v8 csrr a0, vlenb - li a1, 39 + li a1, 40 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vl2r.v v14, (a0) # Unknown-size Folded Reload vredsum.vs v14, v14, v8 csrr a0, vlenb - li a1, 41 + li a1, 42 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vl2r.v v20, (a0) # Unknown-size Folded Reload vredsum.vs v15, v20, v8 csrr a0, vlenb - li a1, 43 + li a1, 44 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vl2r.v v20, (a0) # Unknown-size Folded Reload vredsum.vs v17, v20, v8 csrr a0, vlenb - li a1, 45 + li a1, 46 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vl2r.v v20, (a0) # Unknown-size Folded Reload vredsum.vs v7, v20, v8 csrr a0, vlenb - li a1, 47 + li a1, 48 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vl2r.v v20, (a0) # Unknown-size Folded Reload vredsum.vs v23, v20, v8 csrr a0, vlenb - li a1, 49 + li a1, 50 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vl2r.v v20, (a0) # Unknown-size Folded Reload vredsum.vs v24, v20, v8 csrr a0, vlenb - li a1, 21 + li a1, 20 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vl2r.v v26, (a0) # Unknown-size Folded Reload vredsum.vs v25, v26, v8 csrr a0, vlenb - li a1, 23 + li a1, 22 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vl2r.v v26, (a0) # Unknown-size Folded Reload vredsum.vs v26, v26, v8 csrr a0, vlenb - li a1, 25 + li a1, 24 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vl2r.v v28, (a0) # Unknown-size Folded Reload vredsum.vs v27, v28, v8 csrr a0, vlenb - li a1, 27 + li a1, 26 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vl2r.v v28, (a0) # Unknown-size Folded Reload vredsum.vs v28, v28, v8 csrr a0, vlenb - li a1, 29 + li a1, 28 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vl2r.v v30, (a0) # Unknown-size Folded Reload vredsum.vs v29, v30, v8 csrr a0, vlenb - slli a1, a0, 5 - sub a0, a1, a0 + li a1, 30 + mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vl2r.v v30, (a0) # Unknown-size Folded Reload vredsum.vs v30, v30, v8 csrr a0, vlenb - slli a1, a0, 5 - add a0, a1, a0 + slli a0, a0, 5 add a0, sp, a0 addi a0, a0, 272 vl2r.v v0, (a0) # Unknown-size Folded Reload vredsum.vs v31, v0, v8 csrr a0, vlenb - li a1, 35 + li a1, 34 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vl2r.v v0, (a0) # Unknown-size Folded Reload vredsum.vs v0, v0, v8 csrr a0, vlenb - li a1, 37 + li a1, 36 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vl2r.v v2, (a0) # Unknown-size Folded Reload vredsum.vs v1, v2, v8 csrr a0, vlenb - li a1, 51 + li a1, 52 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vl2r.v v2, (a0) # Unknown-size Folded Reload vredsum.vs v2, v2, v8 csrr a0, vlenb - li a1, 53 + li a1, 54 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vl2r.v v4, (a0) # Unknown-size Folded Reload vredsum.vs v3, v4, v8 csrr a0, vlenb - li a1, 55 + li a1, 38 mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vl2r.v v4, (a0) # Unknown-size Folded Reload vredsum.vs v8, v4, v8 csrr a0, vlenb - slli a1, a0, 4 - sub a0, a1, a0 + li a1, 14 + mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 272 vl1r.v v20, (a0) # Unknown-size Folded Reload @@ -1271,12 +1259,12 @@ sd a0, 128(sp) # 8-byte Folded Spill vmv.x.s a0, v12 sd a0, 136(sp) # 8-byte Folded Spill - vmv.x.s s5, v13 - vmv.x.s s9, v18 - vmv.x.s s10, v19 - vmv.x.s ra, v9 - vmv.x.s s11, v6 - vmv.x.s a3, v16 + vmv.x.s s6, v13 + vmv.x.s s10, v18 + vmv.x.s ra, v19 + vmv.x.s s11, v9 + vmv.x.s a3, v6 + vmv.x.s a6, v16 vmv.x.s a5, v14 vmv.x.s a1, v15 vmv.x.s a0, v17 @@ -1286,213 +1274,211 @@ vmv.x.s a0, v23 sd a0, 88(sp) # 8-byte Folded Spill vmv.x.s a0, v24 - sd a0, 80(sp) # 8-byte Folded Spill - vmv.x.s t5, v25 - vmv.x.s a4, v26 - vmv.x.s a6, v27 - vmv.x.s t2, v28 - vmv.x.s s8, v29 - vmv.x.s s6, v30 - vmv.x.s a0, v31 sd a0, 72(sp) # 8-byte Folded Spill + vmv.x.s s4, v25 + vmv.x.s s9, v26 + vmv.x.s a4, v27 + vmv.x.s s1, v28 + vmv.x.s s8, v29 + vmv.x.s a0, v30 + sd a0, 80(sp) # 8-byte Folded Spill + vmv.x.s t6, v31 vmv.x.s s3, v0 - vmv.x.s s1, v1 - vmv.x.s a0, v2 - vmv.x.s s2, v3 - vmv.x.s t3, v8 - csrr a7, vlenb - li t0, 18 - mul a7, a7, t0 - add a7, sp, a7 - addi a7, a7, 272 - vl1r.v v16, (a7) # Unknown-size Folded Reload - csrr a7, vlenb - slli a7, a7, 4 - add a7, sp, a7 - addi a7, a7, 272 - vl2r.v v18, (a7) # Unknown-size Folded Reload + vmv.x.s t4, v1 + vmv.x.s t2, v2 + vmv.x.s s0, v3 + vmv.x.s s7, v8 + csrr a0, vlenb + slli a7, a0, 4 + add a0, a7, a0 + add a0, sp, a0 + addi a0, a0, 272 + vl1r.v v16, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + slli a7, a0, 4 + sub a0, a7, a0 + add a0, sp, a0 + addi a0, a0, 272 + vl2r.v v18, (a0) # Unknown-size Folded Reload ld t1, 32(sp) # 8-byte Folded Reload ld a7, 64(sp) # 8-byte Folded Reload - ld s0, 24(sp) # 8-byte Folded Reload - ld t0, 16(sp) # 8-byte Folded Reload - beq a7, t0, .LBB1_9 + ld s2, 24(sp) # 8-byte Folded Reload + ld a0, 16(sp) # 8-byte Folded Reload + beq a7, a0, .LBB1_9 .LBB1_7: # %for.cond4.preheader.preheader245 - slli a7, s0, 2 + slli a7, s2, 2 .Lpcrel_hi3: auipc t0, %got_pcrel_hi(team_plays) - ld t0, %pcrel_lo(.Lpcrel_hi3)(t0) - sd t0, 64(sp) # 8-byte Folded Spill + ld a0, %pcrel_lo(.Lpcrel_hi3)(t0) + sd a0, 64(sp) # 8-byte Folded Spill add a7, a2, a7 - sub t0, t1, s0 + sub t0, t1, s2 .LBB1_8: # %for.cond4.preheader # =>This Inner Loop Header: Depth=1 lw t1, 0(a7) - li t4, 116 - mul t1, t1, t4 - ld t4, 64(sp) # 8-byte Folded Reload - add t1, t4, t1 - lw t6, 4(t1) - lw s0, 8(t1) - mv t4, t3 - mv t3, s2 + li a0, 116 + mul t1, t1, a0 + ld a0, 64(sp) # 8-byte Folded Reload + add t1, a0, t1 + mv t3, t2 + mv s5, s0 + lw s0, 4(t1) + lw t2, 8(t1) lw s2, 12(t1) - mv s4, a0 - mv a0, s1 - mv s1, s3 + mv a0, t4 + mv t4, s3 lw s3, 16(t1) - add s5, s5, t6 - add s9, s9, s0 - add s10, s10, s2 - add ra, ra, s3 - lw t6, 20(t1) + add s6, s6, s0 + add s10, s10, t2 + add ra, ra, s2 + add s11, s11, s3 + lw t2, 20(t1) lw s0, 24(t1) lw s2, 28(t1) lw s3, 32(t1) - add s11, s11, t6 - add a3, a3, s0 + add a3, a3, t2 + add a6, a6, s0 add a5, a5, s2 add a1, a1, s3 - lw t6, 36(t1) + lw t2, 36(t1) lw s0, 40(t1) lw s2, 44(t1) lw s3, 48(t1) - mv s7, s8 - mv s8, s6 - mv s6, t2 - mv t2, a6 - ld a6, 104(sp) # 8-byte Folded Reload - addw a6, a6, t6 - sd a6, 104(sp) # 8-byte Folded Spill - ld a6, 96(sp) # 8-byte Folded Reload - addw a6, a6, s0 - sd a6, 96(sp) # 8-byte Folded Spill - ld a6, 88(sp) # 8-byte Folded Reload - addw a6, a6, s2 - sd a6, 88(sp) # 8-byte Folded Spill - ld a6, 80(sp) # 8-byte Folded Reload - addw a6, a6, s3 - sd a6, 80(sp) # 8-byte Folded Spill - lw t6, 52(t1) + mv t5, t6 + mv t6, s8 + ld s8, 104(sp) # 8-byte Folded Reload + addw s8, s8, t2 + sd s8, 104(sp) # 8-byte Folded Spill + ld t2, 96(sp) # 8-byte Folded Reload + addw t2, t2, s0 + sd t2, 96(sp) # 8-byte Folded Spill + ld t2, 88(sp) # 8-byte Folded Reload + addw t2, t2, s2 + sd t2, 88(sp) # 8-byte Folded Spill + ld t2, 72(sp) # 8-byte Folded Reload + addw t2, t2, s3 + sd t2, 72(sp) # 8-byte Folded Spill + lw t2, 52(t1) lw s0, 56(t1) lw s2, 60(t1) lw s3, 64(t1) - mv a6, a4 - mv a4, t5 - ld t5, 112(sp) # 8-byte Folded Reload - addw t5, t5, t6 - sd t5, 112(sp) # 8-byte Folded Spill - mv t5, a4 - mv a4, a6 - mv a6, t2 - mv t2, s6 - mv s6, s8 - mv s8, s7 - ld t6, 120(sp) # 8-byte Folded Reload - addw t6, t6, s0 - sd t6, 120(sp) # 8-byte Folded Spill - ld t6, 128(sp) # 8-byte Folded Reload - addw t6, t6, s2 - sd t6, 128(sp) # 8-byte Folded Spill - ld t6, 136(sp) # 8-byte Folded Reload - addw t6, t6, s3 - sd t6, 136(sp) # 8-byte Folded Spill - lw t6, 68(t1) + mv s8, s1 + mv s1, a4 + mv a4, s9 + mv s9, s4 + ld s4, 112(sp) # 8-byte Folded Reload + addw s4, s4, t2 + sd s4, 112(sp) # 8-byte Folded Spill + mv s4, s9 + mv s9, a4 + mv a4, s1 + mv s1, s8 + mv s8, t6 + mv t6, t5 + ld t2, 120(sp) # 8-byte Folded Reload + addw t2, t2, s0 + sd t2, 120(sp) # 8-byte Folded Spill + ld t2, 128(sp) # 8-byte Folded Reload + addw t2, t2, s2 + sd t2, 128(sp) # 8-byte Folded Spill + ld t2, 136(sp) # 8-byte Folded Reload + addw t2, t2, s3 + sd t2, 136(sp) # 8-byte Folded Spill + lw t2, 68(t1) lw s0, 72(t1) lw s2, 76(t1) lw s3, 80(t1) - addw t5, t5, t6 - addw a4, a4, s0 - addw a6, a6, s2 - addw t2, t2, s3 - lw t6, 84(t1) + addw s4, s4, t2 + addw s9, s9, s0 + addw a4, a4, s2 + addw s1, s1, s3 + lw t2, 84(t1) lw s0, 88(t1) lw s2, 92(t1) lw s3, 96(t1) - add s8, s7, t6 - add s6, s6, s0 - ld t6, 72(sp) # 8-byte Folded Reload - add t6, t6, s2 - sd t6, 72(sp) # 8-byte Folded Spill - add s3, s1, s3 - mv s1, a0 - mv a0, s4 - lw t6, 100(t1) + add s8, s8, t2 + ld t2, 80(sp) # 8-byte Folded Reload + add t2, t2, s0 + sd t2, 80(sp) # 8-byte Folded Spill + add t6, t5, s2 + add s3, t4, s3 + mv t4, a0 + lw t2, 100(t1) lw s0, 104(t1) lw s2, 108(t1) lw t1, 112(t1) - add s1, s1, t6 - add a0, s4, s0 - add s2, t3, s2 - mv t3, t4 - add t3, t4, t1 + add t4, a0, t2 + add t2, t3, s0 + mv s0, s5 + add s0, s5, s2 + add s7, s7, t1 addi t0, t0, -1 addi a7, a7, 4 bnez t0, .LBB1_8 .LBB1_9: # %for.cond21.preheader.loopexit - sw s5, 152(sp) - sw s9, 156(sp) - sw s10, 160(sp) - sw ra, 164(sp) - sw s11, 168(sp) - sw a3, 172(sp) + sw s6, 152(sp) + sw s10, 156(sp) + sw ra, 160(sp) + sw s11, 164(sp) + sw a3, 168(sp) + sw a6, 172(sp) sw a5, 176(sp) sw a1, 180(sp) - ld s4, 104(sp) # 8-byte Folded Reload - sw s4, 184(sp) - ld a3, 96(sp) # 8-byte Folded Reload - sw a3, 188(sp) - ld s0, 88(sp) # 8-byte Folded Reload - sw s0, 192(sp) - ld s7, 80(sp) # 8-byte Folded Reload - sw s7, 196(sp) - ld t0, 112(sp) # 8-byte Folded Reload - sw t0, 200(sp) - ld t6, 120(sp) # 8-byte Folded Reload - sw t6, 204(sp) - ld a5, 128(sp) # 8-byte Folded Reload - sw a5, 208(sp) - sw t5, 216(sp) - sw a4, 220(sp) - sw a6, 224(sp) - sw t2, 228(sp) + ld a0, 104(sp) # 8-byte Folded Reload + sw a0, 184(sp) + ld t1, 96(sp) # 8-byte Folded Reload + sw t1, 188(sp) + ld a6, 88(sp) # 8-byte Folded Reload + sw a6, 192(sp) + ld a3, 72(sp) # 8-byte Folded Reload + sw a3, 196(sp) + ld a5, 112(sp) # 8-byte Folded Reload + sw a5, 200(sp) + ld t3, 120(sp) # 8-byte Folded Reload + sw t3, 204(sp) + ld t5, 128(sp) # 8-byte Folded Reload + sw t5, 208(sp) + sw s4, 216(sp) + sw s9, 220(sp) + sw a4, 224(sp) + sw s1, 228(sp) sw s8, 232(sp) - sw s6, 236(sp) - ld a1, 72(sp) # 8-byte Folded Reload - sw a1, 240(sp) + ld a1, 80(sp) # 8-byte Folded Reload + sw a1, 236(sp) + sw t6, 240(sp) sw s3, 244(sp) - sw s1, 248(sp) - sw a0, 252(sp) - sw s2, 256(sp) - sw t3, 260(sp) + sw t4, 248(sp) + sw t2, 252(sp) + sw s0, 256(sp) + sw s7, 260(sp) vsetivli zero, 8, e32, m2, ta, ma addi a1, sp, 152 vle32.v v10, (a1) ld a7, 48(sp) # 8-byte Folded Reload - ld t1, 40(sp) # 8-byte Folded Reload - mv t3, t5 - mv t4, a4 - mv t5, a6 - mv s5, a3 - mv s6, s0 + ld t0, 40(sp) # 8-byte Folded Reload + mv t6, s1 + mv s1, s4 + mv s5, s9 + mv s8, a4 + mv s4, a3 ld a3, 136(sp) # 8-byte Folded Reload - mv s1, a5 - mv a4, t6 - mv a5, t0 + mv t4, t5 + mv a4, t3 .LBB1_10: # %for.cond21.preheader vmv.v.x v8, a7 vmsle.vv v0, v8, v10 vmerge.vim v10, v18, 1, v0 vse32.v v10, (a1) - slt a0, s4, a7 + slt a0, a0, a7 xori a0, a0, 1 sw a0, 184(sp) - slt a0, s5, a7 + slt a0, t1, a7 xori a0, a0, 1 sw a0, 188(sp) - slt a0, s6, a7 + slt a0, a6, a7 xori a0, a0, 1 sw a0, 192(sp) - slt a0, s7, a7 + slt a0, s4, a7 xori a0, a0, 1 sw a0, 196(sp) slt a0, a5, a7 @@ -1501,19 +1487,19 @@ slt a0, a4, a7 xori a0, a0, 1 sw a0, 204(sp) - slt a0, s1, a7 + slt a0, t4, a7 xori a0, a0, 1 sw a0, 208(sp) slt a0, a3, a7 xori a0, a0, 1 sw a0, 212(sp) - slt a0, t3, a7 + slt a0, s1, a7 xori a0, a0, 1 sw a0, 216(sp) - slt a0, t4, a7 + slt a0, s5, a7 xori a0, a0, 1 sw a0, 220(sp) - slt a0, t5, a7 + slt a0, s8, a7 xori a0, a0, 1 sw a0, 224(sp) addi a0, a1, 80 @@ -1524,7 +1510,7 @@ vle32.v v12, (a0) lw a0, 256(sp) vsetivli zero, 8, e32, m2, ta, ma - vslide1up.vx v14, v10, t2 + vslide1up.vx v14, v10, t6 vsetivli zero, 7, e32, m2, tu, ma vslideup.vi v14, v12, 5 vmv.s.x v10, a0 @@ -1635,7 +1621,7 @@ # %bb.11: # %for.cond53.preheader.lr.ph blez a7, .LBB1_45 # %bb.12: # %for.cond53.preheader.preheader - slli a4, t1, 32 + slli a4, t0, 32 srli a4, a4, 32 addi a3, a3, 1 slli a3, a3, 32 @@ -1850,7 +1836,7 @@ bne a3, a1, .LBB1_50 .LBB1_49: # %for.end190 csrr a0, vlenb - li a1, 58 + li a1, 56 mul a0, a0, a1 add sp, sp, a0 ld ra, 376(sp) # 8-byte Folded Reload --- build.head//MultiSource/Benchmarks/MiBench/consumer-lame/CMakeFiles/consumer-lame.dir/formatBitstream.s 2023-11-13 08:03:22.627550886 +0000 +++ build//MultiSource/Benchmarks/MiBench/consumer-lame/CMakeFiles/consumer-lame.dir/formatBitstream.s 2023-11-13 08:03:17.659694488 +0000 @@ -429,12 +429,12 @@ vmv.v.i v8, 0 addi a0, sp, 96 vs2r.v v8, (a0) # Unknown-size Folded Spill - ld s7, 72(sp) # 8-byte Folded Reload csrr a0, vlenb slli a0, a0, 1 add a0, sp, a0 addi a0, a0, 96 vs4r.v v12, (a0) # Unknown-size Folded Spill + ld s7, 72(sp) # 8-byte Folded Reload j .LBB1_49 .LBB1_47: # in Loop: Header=BB1_49 Depth=1 li a3, 0 --- build.head//MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/me_distortion.s 2023-11-13 08:03:22.255561639 +0000 +++ build//MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/me_distortion.s 2023-11-13 08:03:17.307704662 +0000 @@ -642,47 +642,47 @@ add t2, sp, t2 addi t2, t2, 32 vs4r.v v28, (t2) # Unknown-size Folded Spill - addi t3, a0, 32 - vle32.v v8, (t3), v0.t + addi t4, a0, 32 + vle32.v v8, (t4), v0.t csrr t2, vlenb - li t4, 44 - mul t2, t2, t4 + li t3, 44 + mul t2, t2, t3 add t2, sp, t2 addi t2, t2, 32 vs4r.v v8, (t2) # Unknown-size Folded Spill addi t2, a0, 160 vle32.v v24, (t2), v0.t - csrr t4, vlenb + csrr t3, vlenb li t5, 36 - mul t4, t4, t5 - add t4, sp, t4 - addi t4, t4, 32 - vs4r.v v24, (t4) # Unknown-size Folded Spill - addi t4, a0, 64 - vle32.v v20, (t4), v0.t + mul t3, t3, t5 + add t3, sp, t3 + addi t3, t3, 32 + vs4r.v v24, (t3) # Unknown-size Folded Spill + addi t6, a0, 64 + vle32.v v20, (t6), v0.t + csrr t3, vlenb + slli t3, t3, 5 + add t3, sp, t3 + addi t3, t3, 32 + vs4r.v v20, (t3) # Unknown-size Folded Spill + addi t3, a0, 192 + vle32.v v4, (t3), v0.t csrr t5, vlenb - slli t5, t5, 5 + li s0, 24 + mul t5, t5, s0 add t5, sp, t5 addi t5, t5, 32 - vs4r.v v20, (t5) # Unknown-size Folded Spill - addi t5, a0, 192 - vle32.v v4, (t5), v0.t - csrr t6, vlenb - li s0, 24 - mul t6, t6, s0 - add t6, sp, t6 - addi t6, t6, 32 - vs4r.v v4, (t6) # Unknown-size Folded Spill - addi t6, a0, 96 - vle32.v v16, (t6), v0.t - csrr s0, vlenb + vs4r.v v4, (t5) # Unknown-size Folded Spill + addi s0, a0, 96 + vle32.v v16, (s0), v0.t + csrr t5, vlenb li s1, 20 - mul s0, s0, s1 - add s0, sp, s0 - addi s0, s0, 32 - vs4r.v v16, (s0) # Unknown-size Folded Spill - addi s0, a0, 224 - vle32.v v8, (s0), v0.t + mul t5, t5, s1 + add t5, sp, t5 + addi t5, t5, 32 + vs4r.v v16, (t5) # Unknown-size Folded Spill + addi t5, a0, 224 + vle32.v v8, (t5), v0.t csrr s1, vlenb li s2, 28 mul s1, s1, s2 @@ -821,11 +821,11 @@ vl4r.v v8, (s1) # Unknown-size Folded Reload ld s1, 8(sp) vsub.vv v12, v8, v12 - vse32.v v12, (t3), v0.t - vadd.vv v12, v4, v24 vse32.v v12, (t4), v0.t - vsub.vv v12, v24, v4 + vadd.vv v12, v4, v24 vse32.v v12, (t6), v0.t + vsub.vv v12, v24, v4 + vse32.v v12, (s0), v0.t vadd.vv v12, v16, v28 vse32.v v12, (t1), v0.t vsub.vv v12, v28, v16 @@ -837,9 +837,9 @@ addi t1, t1, 32 vl4r.v v8, (t1) # Unknown-size Folded Reload vadd.vv v12, v20, v8 - vse32.v v12, (t5), v0.t + vse32.v v12, (t3), v0.t vsub.vv v8, v8, v20 - vse32.v v8, (s0), v0.t + vse32.v v8, (t5), v0.t vlse32.v v8, (t0), a1, v0.t vlse32.v v12, (a7), a1, v0.t vrsub.vi v16, v8, 0 --- build.head//MultiSource/Benchmarks/MiBench/consumer-jpeg/CMakeFiles/consumer-jpeg.dir/jquant1.s 2023-11-13 08:03:22.623551000 +0000 +++ build//MultiSource/Benchmarks/MiBench/consumer-jpeg/CMakeFiles/consumer-jpeg.dir/jquant1.s 2023-11-13 08:03:17.655694604 +0000 @@ -1834,19 +1834,19 @@ addi a0, a0, -2 slli a1, s4, 32 srli s5, a1, 32 - addi s0, s3, 112 + addi s7, s3, 112 csrr a1, vlenb - slli s7, a1, 1 - srli s8, a1, 2 + slli s8, a1, 1 + srli s9, a1, 2 srli a1, a1, 3 - mul s9, a1, a0 - and s10, s9, s4 + mul s10, a1, a0 + and s11, s10, s4 vsetvli a0, zero, e16, mf2, ta, ma vmv.v.i v10, 0 slli s6, s6, 1 - mv a1, a2 addi a0, sp, 48 vs1r.v v10, (a0) # Unknown-size Folded Spill + mv a1, a2 j .LBB9_17 .LBB9_16: # %for.cond2.for.end71_crit_edge.split.us.us.us # in Loop: Header=BB9_17 Depth=1 @@ -1870,34 +1870,34 @@ beqz a0, .LBB9_20 # %bb.18: # %for.body5.us.us76.us.preheader # in Loop: Header=BB9_17 Depth=1 - bgeu s4, s8, .LBB9_22 + bgeu s4, s9, .LBB9_22 # %bb.19: # in Loop: Header=BB9_17 Depth=1 li a1, 0 ld a4, 32(sp) # 8-byte Folded Reload j .LBB9_25 .LBB9_20: # %for.body5.us.us.us.us.preheader # in Loop: Header=BB9_17 Depth=1 - bgeu s4, s8, .LBB9_27 + bgeu s4, s9, .LBB9_27 # %bb.21: # in Loop: Header=BB9_17 Depth=1 li a2, 0 ld a4, 32(sp) # 8-byte Folded Reload j .LBB9_30 .LBB9_22: # %vector.ph116 # in Loop: Header=BB9_17 Depth=1 - and a1, s9, s4 + and a1, s10, s4 vsetvli a2, zero, e16, mf2, ta, ma mv a2, a1 - mv a3, s0 + mv a3, s7 + addi a4, sp, 48 + vl1r.v v10, (a4) # Unknown-size Folded Reload ld a4, 32(sp) # 8-byte Folded Reload - addi a5, sp, 48 - vl1r.v v10, (a5) # Unknown-size Folded Reload .LBB9_23: # %vector.body121 # Parent Loop BB9_17 Depth=1 # => This Inner Loop Header: Depth=2 vl2re64.v v8, (a3) vsoxei64.v v10, (s6), v8 - sub a2, a2, s8 - add a3, a3, s7 + sub a2, a2, s9 + add a3, a3, s8 bnez a2, .LBB9_23 # %bb.24: # %middle.block113 # in Loop: Header=BB9_17 Depth=1 @@ -1905,7 +1905,7 @@ .LBB9_25: # %for.body5.us.us76.us.preheader127 # in Loop: Header=BB9_17 Depth=1 slli a2, a1, 3 - add a2, s0, a2 + add a2, s7, a2 sub a1, s4, a1 .LBB9_26: # %for.body5.us.us76.us # Parent Loop BB9_17 Depth=1 @@ -1920,27 +1920,27 @@ .LBB9_27: # %vector.ph # in Loop: Header=BB9_17 Depth=1 vsetvli a1, zero, e16, mf2, ta, ma - mv a1, s10 - mv a2, s0 - ld a4, 32(sp) # 8-byte Folded Reload + mv a1, s11 + mv a2, s7 addi a3, sp, 48 vl1r.v v10, (a3) # Unknown-size Folded Reload + ld a4, 32(sp) # 8-byte Folded Reload .LBB9_28: # %vector.body # Parent Loop BB9_17 Depth=1 # => This Inner Loop Header: Depth=2 vl2re64.v v8, (a2) vsoxei64.v v10, (zero), v8 - sub a1, a1, s8 - add a2, a2, s7 + sub a1, a1, s9 + add a2, a2, s8 bnez a1, .LBB9_28 # %bb.29: # %middle.block # in Loop: Header=BB9_17 Depth=1 - mv a2, s10 - beq s10, s4, .LBB9_16 + mv a2, s11 + beq s11, s4, .LBB9_16 .LBB9_30: # %for.body5.us.us.us.us.preheader126 # in Loop: Header=BB9_17 Depth=1 slli a1, a2, 3 - add a1, s0, a1 + add a1, s7, a1 sub a2, s5, a2 .LBB9_31: # %for.body5.us.us.us.us # Parent Loop BB9_17 Depth=1 --- build.head//MicroBenchmarks/libs/benchmark/test/CMakeFiles/user_counters_test.dir/user_counters_test.s 2023-11-13 08:03:22.159564414 +0000 +++ build//MicroBenchmarks/libs/benchmark/test/CMakeFiles/user_counters_test.dir/user_counters_test.s 2023-11-13 08:03:17.219707206 +0000 @@ -17371,8 +17371,8 @@ jalr a1 .LBB39_34: # %_ZNSt12__shared_ptrIN9benchmark5RegexELN9__gnu_cxx12_Lock_policyE1EED2Ev.exit.i.2.i ld a0, 152(sp) - addi a1, sp, 168 - beq a0, a1, .LBB39_36 + addi s5, sp, 168 + beq a0, s5, .LBB39_36 # %bb.35: # %if.then.i.i2.i.2.i call _ZdlPv@plt .LBB39_36: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.i.2.i @@ -17496,8 +17496,7 @@ jalr a1 .LBB39_53: # %_ZNSt12__shared_ptrIN9benchmark5RegexELN9__gnu_cxx12_Lock_policyE1EED2Ev.exit.i.i23 ld a0, 152(sp) - addi a1, sp, 168 - beq a0, a1, .LBB39_55 + beq a0, s5, .LBB39_55 # %bb.54: # %if.then.i.i2.i.i26 call _ZdlPv@plt .LBB39_55: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.i.i27 @@ -17633,8 +17632,7 @@ jalr a1 .LBB39_69: # %_ZNSt12__shared_ptrIN9benchmark5RegexELN9__gnu_cxx12_Lock_policyE1EED2Ev.exit.i.i85 ld a0, 152(sp) - addi a1, sp, 168 - beq a0, a1, .LBB39_71 + beq a0, s5, .LBB39_71 # %bb.70: # %if.then.i.i2.i.i88 call _ZdlPv@plt .LBB39_71: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.i.i89 @@ -18287,6 +18285,7 @@ addi s3, s3, 25 addi s4, sp, 1976 addi a1, sp, 1656 + addi s5, sp, 168 beq a0, a1, .LBB39_119 # %bb.118: # %if.then.i.i204.i call _ZdlPv@plt @@ -18458,8 +18457,7 @@ jalr a1 .LBB39_154: # %_ZNSt12__shared_ptrIN9benchmark5RegexELN9__gnu_cxx12_Lock_policyE1EED2Ev.exit.i.i222 ld a0, 152(sp) - addi a1, sp, 168 - beq a0, a1, .LBB39_156 + beq a0, s5, .LBB39_156 # %bb.155: # %if.then.i.i2.i.i225 call _ZdlPv@plt .LBB39_156: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.i.i226 @@ -18619,8 +18617,7 @@ jalr a1 .LBB39_173: # %_ZNSt12__shared_ptrIN9benchmark5RegexELN9__gnu_cxx12_Lock_policyE1EED2Ev.exit.i.i294 ld a0, 152(sp) - addi a1, sp, 168 - beq a0, a1, .LBB39_175 + beq a0, s5, .LBB39_175 # %bb.174: # %if.then.i.i2.i.i297 call _ZdlPv@plt .LBB39_175: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.i.i298 @@ -19313,6 +19310,7 @@ call _ZdlPv@plt .LBB39_225: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.i475 ld a0, 80(sp) + addi s5, sp, 168 beq a0, s3, .LBB39_227 # %bb.226: # %if.then.i.i232.i call _ZdlPv@plt @@ -19503,8 +19501,7 @@ jalr a1 .LBB39_266: # %_ZNSt12__shared_ptrIN9benchmark5RegexELN9__gnu_cxx12_Lock_policyE1EED2Ev.exit.i.i527 ld a0, 152(sp) - addi a1, sp, 168 - beq a0, a1, .LBB39_268 + beq a0, s5, .LBB39_268 # %bb.267: # %if.then.i.i2.i.i530 call _ZdlPv@plt .LBB39_268: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.i.i531 @@ -19662,8 +19659,7 @@ jalr a1 .LBB39_285: # %_ZNSt12__shared_ptrIN9benchmark5RegexELN9__gnu_cxx12_Lock_policyE1EED2Ev.exit.i.i611 ld a0, 152(sp) - addi a1, sp, 168 - beq a0, a1, .LBB39_287 + beq a0, s5, .LBB39_287 # %bb.286: # %if.then.i.i2.i.i614 call _ZdlPv@plt .LBB39_287: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.i.i615 @@ -19753,7 +19749,7 @@ call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2363: # %bb.294: # %invoke.cont10.i708 - addi s1, sp, 288 + addi s2, sp, 288 addi a0, sp, 2008 sd a0, 16(s4) li s0, 32 @@ -19779,11 +19775,11 @@ .Ltmp2368: addi a1, sp, 1992 li a2, 1 - mv a0, s1 + mv a0, s2 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2369: # %bb.296: # %invoke.cont17.i724 - addi s1, sp, 376 + addi s7, sp, 376 sd s4, 1960(sp) li s0, 32 sd s0, 1928(sp) @@ -19810,7 +19806,7 @@ .Ltmp2374: addi a1, sp, 1960 li a2, 1 - mv a0, s1 + mv a0, s7 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2375: # %bb.298: # %invoke.cont24.i740 @@ -19858,7 +19854,7 @@ call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2381: # %bb.300: # %invoke.cont31.i756 - addi s7, sp, 552 + addi s0, sp, 552 addi a0, sp, 1912 sd a0, 1896(sp) li a0, 18 @@ -19893,7 +19889,7 @@ .Ltmp2386: addi a1, sp, 1896 li a2, 1 - mv a0, s7 + mv a0, s0 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2387: # %bb.302: # %invoke.cont38.i772 @@ -20128,21 +20124,21 @@ call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2420: # %bb.313: # %invoke.cont80.i865 - addi s1, sp, 1168 + addi s10, sp, 1168 addi a0, sp, 1688 sd a0, 1672(sp) .Lpcrel_hi1043: auipc a1, %pcrel_hi(.L.str.24) addi a1, a1, %pcrel_lo(.Lpcrel_hi1043) li a2, 15 - li s6, 15 + li s1, 15 call memcpy@plt - sd s6, 1680(sp) + sd s1, 1680(sp) sb zero, 1703(sp) .Ltmp2422: addi a1, sp, 1672 li a2, 1 - mv a0, s1 + mv a0, s10 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2423: # %bb.314: # %invoke.cont87.i878 @@ -20153,14 +20149,14 @@ auipc a1, %pcrel_hi(.L.str.25) addi a1, a1, %pcrel_lo(.Lpcrel_hi1044) li a2, 14 - li s6, 14 + li s1, 14 call memcpy@plt - sd s6, 1648(sp) + sd s1, 1648(sp) sb zero, 1670(sp) .Ltmp2425: addi a1, sp, 1640 li a2, 1 - li s10, 1 + li s1, 1 mv a0, s11 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2426: @@ -20170,7 +20166,7 @@ sd a0, 1608(sp) li a0, 125 sh a0, 1624(sp) - sd s10, 1616(sp) + sd s1, 1616(sp) .Ltmp2428: addi a1, sp, 1608 li a2, 1 @@ -20185,27 +20181,27 @@ call _Z8AddCases10TestCaseIDSt16initializer_listI8TestCaseE@plt .Ltmp2432: # %bb.317: # %invoke.cont103.i922 - mv s10, a0 - li s1, -1320 - addi s2, sp, 1432 - li s3, -1 - li s4, 1 + mv s1, a0 + li s2, -1320 + addi s3, sp, 1432 + li s4, -1 + li s5, 1 j .LBB39_319 .LBB39_318: # %_ZN8TestCaseD2Ev.exit.i943 # in Loop: Header=BB39_319 Depth=1 - addi s1, s1, 88 - addi s2, s2, -88 - beqz s1, .LBB39_331 + addi s2, s2, 88 + addi s3, s3, -88 + beqz s2, .LBB39_331 .LBB39_319: # %arraydestroy.body.i923 # =>This Inner Loop Header: Depth=1 - ld s0, -8(s2) + ld s0, -8(s3) beqz s0, .LBB39_326 # %bb.320: # %if.then.i.i.i.i928 # in Loop: Header=BB39_319 Depth=1 .Lpcrel_hi1045: auipc a0, %got_pcrel_hi(__libc_single_threaded) - ld s5, %pcrel_lo(.Lpcrel_hi1045)(a0) - lbu a0, 0(s5) + ld s6, %pcrel_lo(.Lpcrel_hi1045)(a0) + lbu a0, 0(s6) beqz a0, .LBB39_322 # %bb.321: # %if.then.i.i.i.i.i.i931 # in Loop: Header=BB39_319 Depth=1 @@ -20213,14 +20209,14 @@ addi a1, a0, -1 sw a1, 48(s0) sext.w a0, a0 - beq a0, s4, .LBB39_323 + beq a0, s5, .LBB39_323 j .LBB39_326 .LBB39_322: # %if.else.i.i.i.i.i.i1040 # in Loop: Header=BB39_319 Depth=1 addi a0, s0, 48 - amoadd.w.aqrl a0, s3, (a0) + amoadd.w.aqrl a0, s4, (a0) sext.w a0, a0 - bne a0, s4, .LBB39_326 + bne a0, s5, .LBB39_326 .LBB39_323: # %if.then.i.i.i.i201.i1026 # in Loop: Header=BB39_319 Depth=1 ld a0, 0(s0) @@ -20228,7 +20224,7 @@ mv a0, s0 jalr a1 fence.tso - lbu a0, 0(s5) + lbu a0, 0(s6) beqz a0, .LBB39_330 # %bb.324: # %if.then.i.i.i.i.i.i.i1031 # in Loop: Header=BB39_319 Depth=1 @@ -20236,7 +20232,7 @@ addi a1, a0, -1 sw a1, 52(s0) sext.w a0, a0 - bne a0, s4, .LBB39_326 + bne a0, s5, .LBB39_326 .LBB39_325: # %if.then.i1.i.i.i.i.i1036 # in Loop: Header=BB39_319 Depth=1 ld a0, 0(s0) @@ -20245,16 +20241,16 @@ jalr a1 .LBB39_326: # %_ZNSt12__shared_ptrIN9benchmark5RegexELN9__gnu_cxx12_Lock_policyE1EED2Ev.exit.i.i936 # in Loop: Header=BB39_319 Depth=1 - ld a0, -48(s2) - addi a1, s2, -32 + ld a0, -48(s3) + addi a1, s3, -32 beq a1, a0, .LBB39_328 # %bb.327: # %if.then.i.i2.i.i939 # in Loop: Header=BB39_319 Depth=1 call _ZdlPv@plt .LBB39_328: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.i.i940 # in Loop: Header=BB39_319 Depth=1 - ld a0, -88(s2) - addi a1, s2, -72 + ld a0, -88(s3) + addi a1, s3, -72 beq a1, a0, .LBB39_318 # %bb.329: # %if.then.i.i4.i.i942 # in Loop: Header=BB39_319 Depth=1 @@ -20263,9 +20259,9 @@ .LBB39_330: # %if.else.i.i.i.i.i.i.i1039 # in Loop: Header=BB39_319 Depth=1 addi a0, s0, 52 - amoadd.w.aqrl a0, s3, (a0) + amoadd.w.aqrl a0, s4, (a0) sext.w a0, a0 - beq a0, s4, .LBB39_325 + beq a0, s5, .LBB39_325 j .LBB39_326 .LBB39_331: # %arraydestroy.done104.i945 ld a0, 1608(sp) @@ -20279,6 +20275,7 @@ addi s3, s3, 25 addi s4, sp, 1976 addi a1, sp, 1656 + addi s5, sp, 168 beq a0, a1, .LBB39_335 # %bb.334: # %if.then.i.i204.i950 call _ZdlPv@plt @@ -20361,7 +20358,7 @@ .LBB39_361: # %__cxx_global_var_init.71.exit .Lpcrel_hi1046: auipc a0, %pcrel_hi(dummy145) - sw s10, %pcrel_lo(.Lpcrel_hi1046)(a0) + sw s1, %pcrel_lo(.Lpcrel_hi1046)(a0) sd s3, 80(s4) li a0, 46 sd a0, 48(s4) @@ -20450,8 +20447,7 @@ jalr a1 .LBB39_370: # %_ZNSt12__shared_ptrIN9benchmark5RegexELN9__gnu_cxx12_Lock_policyE1EED2Ev.exit.i.i1071 ld a0, 152(sp) - addi a1, sp, 168 - beq a0, a1, .LBB39_372 + beq a0, s5, .LBB39_372 # %bb.371: # %if.then.i.i2.i.i1074 call _ZdlPv@plt .LBB39_372: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.i.i1075 @@ -20624,8 +20620,7 @@ jalr a1 .LBB39_389: # %_ZNSt12__shared_ptrIN9benchmark5RegexELN9__gnu_cxx12_Lock_policyE1EED2Ev.exit.i.i1155 ld a0, 152(sp) - addi a1, sp, 168 - beq a0, a1, .LBB39_391 + beq a0, s5, .LBB39_391 # %bb.390: # %if.then.i.i2.i.i1158 call _ZdlPv@plt .LBB39_391: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.i.i1159 @@ -20721,7 +20716,7 @@ call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2465: # %bb.398: # %invoke.cont10.i1252 - addi s1, sp, 288 + addi s2, sp, 288 addi a0, sp, 2008 sd a0, 16(s4) li s0, 32 @@ -20747,11 +20742,11 @@ .Ltmp2470: addi a1, sp, 1992 li a2, 1 - mv a0, s1 + mv a0, s2 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2471: # %bb.400: # %invoke.cont17.i1268 - addi s0, sp, 376 + addi s7, sp, 376 sd s4, 1960(sp) li a0, 25 sd a0, 1928(sp) @@ -20782,7 +20777,7 @@ .Ltmp2476: addi a1, sp, 1960 li a2, 1 - mv a0, s0 + mv a0, s7 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2477: # %bb.402: # %invoke.cont24.i1284 @@ -20830,7 +20825,7 @@ call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2483: # %bb.404: # %invoke.cont31.i1300 - addi s7, sp, 552 + addi s0, sp, 552 addi a0, sp, 1912 sd a0, 1896(sp) li a0, 18 @@ -20865,7 +20860,7 @@ .Ltmp2488: addi a1, sp, 1896 li a2, 1 - mv a0, s7 + mv a0, s0 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2489: # %bb.406: # %invoke.cont38.i1316 @@ -21100,21 +21095,21 @@ call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2522: # %bb.417: # %invoke.cont80.i1409 - addi s1, sp, 1168 + addi s10, sp, 1168 addi a0, sp, 1688 sd a0, 1672(sp) .Lpcrel_hi1063: auipc a1, %pcrel_hi(.L.str.24) addi a1, a1, %pcrel_lo(.Lpcrel_hi1063) li a2, 15 - li s6, 15 + li s1, 15 call memcpy@plt - sd s6, 1680(sp) + sd s1, 1680(sp) sb zero, 1703(sp) .Ltmp2524: addi a1, sp, 1672 li a2, 1 - mv a0, s1 + mv a0, s10 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2525: # %bb.418: # %invoke.cont87.i1422 @@ -21125,14 +21120,14 @@ auipc a1, %pcrel_hi(.L.str.25) addi a1, a1, %pcrel_lo(.Lpcrel_hi1064) li a2, 14 - li s6, 14 + li s1, 14 call memcpy@plt - sd s6, 1648(sp) + sd s1, 1648(sp) sb zero, 1670(sp) .Ltmp2527: addi a1, sp, 1640 li a2, 1 - li s10, 1 + li s1, 1 mv a0, s11 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2528: @@ -21142,7 +21137,7 @@ sd a0, 1608(sp) li a0, 125 sh a0, 1624(sp) - sd s10, 1616(sp) + sd s1, 1616(sp) .Ltmp2530: addi a1, sp, 1608 li a2, 1 @@ -21157,27 +21152,27 @@ call _Z8AddCases10TestCaseIDSt16initializer_listI8TestCaseE@plt .Ltmp2534: # %bb.421: # %invoke.cont103.i1466 - mv s10, a0 - li s1, -1320 - addi s2, sp, 1432 - li s3, -1 - li s4, 1 + mv s1, a0 + li s2, -1320 + addi s3, sp, 1432 + li s4, -1 + li s5, 1 j .LBB39_423 .LBB39_422: # %_ZN8TestCaseD2Ev.exit.i1487 # in Loop: Header=BB39_423 Depth=1 - addi s1, s1, 88 - addi s2, s2, -88 - beqz s1, .LBB39_435 + addi s2, s2, 88 + addi s3, s3, -88 + beqz s2, .LBB39_435 .LBB39_423: # %arraydestroy.body.i1467 # =>This Inner Loop Header: Depth=1 - ld s0, -8(s2) + ld s0, -8(s3) beqz s0, .LBB39_430 # %bb.424: # %if.then.i.i.i.i1472 # in Loop: Header=BB39_423 Depth=1 .Lpcrel_hi1065: auipc a0, %got_pcrel_hi(__libc_single_threaded) - ld s5, %pcrel_lo(.Lpcrel_hi1065)(a0) - lbu a0, 0(s5) + ld s6, %pcrel_lo(.Lpcrel_hi1065)(a0) + lbu a0, 0(s6) beqz a0, .LBB39_426 # %bb.425: # %if.then.i.i.i.i.i.i1475 # in Loop: Header=BB39_423 Depth=1 @@ -21185,14 +21180,14 @@ addi a1, a0, -1 sw a1, 48(s0) sext.w a0, a0 - beq a0, s4, .LBB39_427 + beq a0, s5, .LBB39_427 j .LBB39_430 .LBB39_426: # %if.else.i.i.i.i.i.i1584 # in Loop: Header=BB39_423 Depth=1 addi a0, s0, 48 - amoadd.w.aqrl a0, s3, (a0) + amoadd.w.aqrl a0, s4, (a0) sext.w a0, a0 - bne a0, s4, .LBB39_430 + bne a0, s5, .LBB39_430 .LBB39_427: # %if.then.i.i.i.i201.i1570 # in Loop: Header=BB39_423 Depth=1 ld a0, 0(s0) @@ -21200,7 +21195,7 @@ mv a0, s0 jalr a1 fence.tso - lbu a0, 0(s5) + lbu a0, 0(s6) beqz a0, .LBB39_434 # %bb.428: # %if.then.i.i.i.i.i.i.i1575 # in Loop: Header=BB39_423 Depth=1 @@ -21208,7 +21203,7 @@ addi a1, a0, -1 sw a1, 52(s0) sext.w a0, a0 - bne a0, s4, .LBB39_430 + bne a0, s5, .LBB39_430 .LBB39_429: # %if.then.i1.i.i.i.i.i1580 # in Loop: Header=BB39_423 Depth=1 ld a0, 0(s0) @@ -21217,16 +21212,16 @@ jalr a1 .LBB39_430: # %_ZNSt12__shared_ptrIN9benchmark5RegexELN9__gnu_cxx12_Lock_policyE1EED2Ev.exit.i.i1480 # in Loop: Header=BB39_423 Depth=1 - ld a0, -48(s2) - addi a1, s2, -32 + ld a0, -48(s3) + addi a1, s3, -32 beq a1, a0, .LBB39_432 # %bb.431: # %if.then.i.i2.i.i1483 # in Loop: Header=BB39_423 Depth=1 call _ZdlPv@plt .LBB39_432: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.i.i1484 # in Loop: Header=BB39_423 Depth=1 - ld a0, -88(s2) - addi a1, s2, -72 + ld a0, -88(s3) + addi a1, s3, -72 beq a1, a0, .LBB39_422 # %bb.433: # %if.then.i.i4.i.i1486 # in Loop: Header=BB39_423 Depth=1 @@ -21235,9 +21230,9 @@ .LBB39_434: # %if.else.i.i.i.i.i.i.i1583 # in Loop: Header=BB39_423 Depth=1 addi a0, s0, 52 - amoadd.w.aqrl a0, s3, (a0) + amoadd.w.aqrl a0, s4, (a0) sext.w a0, a0 - beq a0, s4, .LBB39_429 + beq a0, s5, .LBB39_429 j .LBB39_430 .LBB39_435: # %arraydestroy.done104.i1489 ld a0, 1608(sp) @@ -21251,6 +21246,7 @@ addi s3, s3, 25 addi s4, sp, 1976 addi a1, sp, 1656 + addi s5, sp, 168 beq a0, a1, .LBB39_439 # %bb.438: # %if.then.i.i204.i1494 call _ZdlPv@plt @@ -21333,7 +21329,7 @@ .LBB39_465: # %__cxx_global_var_init.84.exit .Lpcrel_hi1066: auipc a0, %pcrel_hi(dummy187) - sw s10, %pcrel_lo(.Lpcrel_hi1066)(a0) + sw s1, %pcrel_lo(.Lpcrel_hi1066)(a0) sd s3, 80(s4) li a0, 39 sd a0, 48(s4) @@ -21431,8 +21427,7 @@ jalr a1 .LBB39_474: # %_ZNSt12__shared_ptrIN9benchmark5RegexELN9__gnu_cxx12_Lock_policyE1EED2Ev.exit.i.i1615 ld a0, 152(sp) - addi a1, sp, 168 - beq a0, a1, .LBB39_476 + beq a0, s5, .LBB39_476 # %bb.475: # %if.then.i.i2.i.i1618 call _ZdlPv@plt .LBB39_476: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.i.i1619 @@ -21602,8 +21597,7 @@ jalr a1 .LBB39_493: # %_ZNSt12__shared_ptrIN9benchmark5RegexELN9__gnu_cxx12_Lock_policyE1EED2Ev.exit.i.i1699 ld a0, 152(sp) - addi a1, sp, 168 - beq a0, a1, .LBB39_495 + beq a0, s5, .LBB39_495 # %bb.494: # %if.then.i.i2.i.i1702 call _ZdlPv@plt .LBB39_495: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.i.i1703 @@ -21696,7 +21690,7 @@ call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2567: # %bb.502: # %invoke.cont10.i1796 - addi s1, sp, 288 + addi s2, sp, 288 addi a0, sp, 2008 sd a0, 16(s4) li s0, 32 @@ -21722,11 +21716,11 @@ .Ltmp2572: addi a1, sp, 1992 li a2, 1 - mv a0, s1 + mv a0, s2 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2573: # %bb.504: # %invoke.cont17.i1812 - addi s0, sp, 376 + addi s7, sp, 376 sd s4, 1960(sp) li a0, 40 sd a0, 1928(sp) @@ -21769,7 +21763,7 @@ .Ltmp2578: addi a1, sp, 1960 li a2, 1 - mv a0, s0 + mv a0, s7 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2579: # %bb.506: # %invoke.cont24.i1828 @@ -21817,7 +21811,7 @@ call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2585: # %bb.508: # %invoke.cont31.i1844 - addi s7, sp, 552 + addi s0, sp, 552 addi a0, sp, 1912 sd a0, 1896(sp) li a0, 18 @@ -21852,7 +21846,7 @@ .Ltmp2590: addi a1, sp, 1896 li a2, 1 - mv a0, s7 + mv a0, s0 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2591: # %bb.510: # %invoke.cont38.i1860 @@ -22087,21 +22081,21 @@ call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2624: # %bb.521: # %invoke.cont80.i1953 - addi s1, sp, 1168 + addi s10, sp, 1168 addi a0, sp, 1688 sd a0, 1672(sp) .Lpcrel_hi1083: auipc a1, %pcrel_hi(.L.str.24) addi a1, a1, %pcrel_lo(.Lpcrel_hi1083) li a2, 15 - li s6, 15 + li s1, 15 call memcpy@plt - sd s6, 1680(sp) + sd s1, 1680(sp) sb zero, 1703(sp) .Ltmp2626: addi a1, sp, 1672 li a2, 1 - mv a0, s1 + mv a0, s10 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2627: # %bb.522: # %invoke.cont87.i1966 @@ -22112,14 +22106,14 @@ auipc a1, %pcrel_hi(.L.str.25) addi a1, a1, %pcrel_lo(.Lpcrel_hi1084) li a2, 14 - li s6, 14 + li s1, 14 call memcpy@plt - sd s6, 1648(sp) + sd s1, 1648(sp) sb zero, 1670(sp) .Ltmp2629: addi a1, sp, 1640 li a2, 1 - li s10, 1 + li s1, 1 mv a0, s11 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2630: @@ -22129,7 +22123,7 @@ sd a0, 1608(sp) li a0, 125 sh a0, 1624(sp) - sd s10, 1616(sp) + sd s1, 1616(sp) .Ltmp2632: addi a1, sp, 1608 li a2, 1 @@ -22144,27 +22138,27 @@ call _Z8AddCases10TestCaseIDSt16initializer_listI8TestCaseE@plt .Ltmp2636: # %bb.525: # %invoke.cont103.i2010 - mv s10, a0 - li s1, -1320 - addi s2, sp, 1432 - li s3, -1 - li s4, 1 + mv s1, a0 + li s2, -1320 + addi s3, sp, 1432 + li s4, -1 + li s5, 1 j .LBB39_527 .LBB39_526: # %_ZN8TestCaseD2Ev.exit.i2031 # in Loop: Header=BB39_527 Depth=1 - addi s1, s1, 88 - addi s2, s2, -88 - beqz s1, .LBB39_539 + addi s2, s2, 88 + addi s3, s3, -88 + beqz s2, .LBB39_539 .LBB39_527: # %arraydestroy.body.i2011 # =>This Inner Loop Header: Depth=1 - ld s0, -8(s2) + ld s0, -8(s3) beqz s0, .LBB39_534 # %bb.528: # %if.then.i.i.i.i2016 # in Loop: Header=BB39_527 Depth=1 .Lpcrel_hi1085: auipc a0, %got_pcrel_hi(__libc_single_threaded) - ld s5, %pcrel_lo(.Lpcrel_hi1085)(a0) - lbu a0, 0(s5) + ld s6, %pcrel_lo(.Lpcrel_hi1085)(a0) + lbu a0, 0(s6) beqz a0, .LBB39_530 # %bb.529: # %if.then.i.i.i.i.i.i2019 # in Loop: Header=BB39_527 Depth=1 @@ -22172,14 +22166,14 @@ addi a1, a0, -1 sw a1, 48(s0) sext.w a0, a0 - beq a0, s4, .LBB39_531 + beq a0, s5, .LBB39_531 j .LBB39_534 .LBB39_530: # %if.else.i.i.i.i.i.i2128 # in Loop: Header=BB39_527 Depth=1 addi a0, s0, 48 - amoadd.w.aqrl a0, s3, (a0) + amoadd.w.aqrl a0, s4, (a0) sext.w a0, a0 - bne a0, s4, .LBB39_534 + bne a0, s5, .LBB39_534 .LBB39_531: # %if.then.i.i.i.i201.i2114 # in Loop: Header=BB39_527 Depth=1 ld a0, 0(s0) @@ -22187,7 +22181,7 @@ mv a0, s0 jalr a1 fence.tso - lbu a0, 0(s5) + lbu a0, 0(s6) beqz a0, .LBB39_538 # %bb.532: # %if.then.i.i.i.i.i.i.i2119 # in Loop: Header=BB39_527 Depth=1 @@ -22195,7 +22189,7 @@ addi a1, a0, -1 sw a1, 52(s0) sext.w a0, a0 - bne a0, s4, .LBB39_534 + bne a0, s5, .LBB39_534 .LBB39_533: # %if.then.i1.i.i.i.i.i2124 # in Loop: Header=BB39_527 Depth=1 ld a0, 0(s0) @@ -22204,16 +22198,16 @@ jalr a1 .LBB39_534: # %_ZNSt12__shared_ptrIN9benchmark5RegexELN9__gnu_cxx12_Lock_policyE1EED2Ev.exit.i.i2024 # in Loop: Header=BB39_527 Depth=1 - ld a0, -48(s2) - addi a1, s2, -32 + ld a0, -48(s3) + addi a1, s3, -32 beq a1, a0, .LBB39_536 # %bb.535: # %if.then.i.i2.i.i2027 # in Loop: Header=BB39_527 Depth=1 call _ZdlPv@plt .LBB39_536: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.i.i2028 # in Loop: Header=BB39_527 Depth=1 - ld a0, -88(s2) - addi a1, s2, -72 + ld a0, -88(s3) + addi a1, s3, -72 beq a1, a0, .LBB39_526 # %bb.537: # %if.then.i.i4.i.i2030 # in Loop: Header=BB39_527 Depth=1 @@ -22222,9 +22216,9 @@ .LBB39_538: # %if.else.i.i.i.i.i.i.i2127 # in Loop: Header=BB39_527 Depth=1 addi a0, s0, 52 - amoadd.w.aqrl a0, s3, (a0) + amoadd.w.aqrl a0, s4, (a0) sext.w a0, a0 - beq a0, s4, .LBB39_533 + beq a0, s5, .LBB39_533 j .LBB39_534 .LBB39_539: # %arraydestroy.done104.i2033 ld a0, 1608(sp) @@ -22238,6 +22232,7 @@ addi s3, s3, 25 addi s4, sp, 1976 addi a1, sp, 1656 + addi s5, sp, 168 beq a0, a1, .LBB39_543 # %bb.542: # %if.then.i.i204.i2038 call _ZdlPv@plt @@ -22320,7 +22315,7 @@ .LBB39_569: # %__cxx_global_var_init.97.exit .Lpcrel_hi1086: auipc a0, %pcrel_hi(dummy231) - sw s10, %pcrel_lo(.Lpcrel_hi1086)(a0) + sw s1, %pcrel_lo(.Lpcrel_hi1086)(a0) sd s3, 80(s4) li a0, 54 sd a0, 48(s4) @@ -22421,8 +22416,7 @@ jalr a1 .LBB39_578: # %_ZNSt12__shared_ptrIN9benchmark5RegexELN9__gnu_cxx12_Lock_policyE1EED2Ev.exit.i.i2159 ld a0, 152(sp) - addi a1, sp, 168 - beq a0, a1, .LBB39_580 + beq a0, s5, .LBB39_580 # %bb.579: # %if.then.i.i2.i.i2162 call _ZdlPv@plt .LBB39_580: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.i.i2163 @@ -22588,8 +22582,7 @@ jalr a1 .LBB39_597: # %_ZNSt12__shared_ptrIN9benchmark5RegexELN9__gnu_cxx12_Lock_policyE1EED2Ev.exit.i.i2243 ld a0, 152(sp) - addi a1, sp, 168 - beq a0, a1, .LBB39_599 + beq a0, s5, .LBB39_599 # %bb.598: # %if.then.i.i2.i.i2246 call _ZdlPv@plt .LBB39_599: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.i.i2247 @@ -22680,7 +22673,7 @@ call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2669: # %bb.606: # %invoke.cont10.i2340 - addi s1, sp, 288 + addi s2, sp, 288 addi a0, sp, 2008 sd a0, 16(s4) li s0, 32 @@ -22706,11 +22699,11 @@ .Ltmp2674: addi a1, sp, 1992 li a2, 1 - mv a0, s1 + mv a0, s2 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2675: # %bb.608: # %invoke.cont17.i2356 - addi s0, sp, 376 + addi s7, sp, 376 sd s4, 1960(sp) li a0, 48 sd a0, 1928(sp) @@ -22742,7 +22735,7 @@ .Ltmp2680: addi a1, sp, 1960 li a2, 1 - mv a0, s0 + mv a0, s7 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2681: # %bb.610: # %invoke.cont24.i2372 @@ -22790,7 +22783,7 @@ call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2687: # %bb.612: # %invoke.cont31.i2388 - addi s7, sp, 552 + addi s0, sp, 552 addi a0, sp, 1912 sd a0, 1896(sp) li a0, 18 @@ -22825,7 +22818,7 @@ .Ltmp2692: addi a1, sp, 1896 li a2, 1 - mv a0, s7 + mv a0, s0 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2693: # %bb.614: # %invoke.cont38.i2404 @@ -23060,21 +23053,21 @@ call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2726: # %bb.625: # %invoke.cont80.i2497 - addi s1, sp, 1168 + addi s10, sp, 1168 addi a0, sp, 1688 sd a0, 1672(sp) .Lpcrel_hi1103: auipc a1, %pcrel_hi(.L.str.24) addi a1, a1, %pcrel_lo(.Lpcrel_hi1103) li a2, 15 - li s6, 15 + li s1, 15 call memcpy@plt - sd s6, 1680(sp) + sd s1, 1680(sp) sb zero, 1703(sp) .Ltmp2728: addi a1, sp, 1672 li a2, 1 - mv a0, s1 + mv a0, s10 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2729: # %bb.626: # %invoke.cont87.i2510 @@ -23085,14 +23078,14 @@ auipc a1, %pcrel_hi(.L.str.25) addi a1, a1, %pcrel_lo(.Lpcrel_hi1104) li a2, 14 - li s6, 14 + li s1, 14 call memcpy@plt - sd s6, 1648(sp) + sd s1, 1648(sp) sb zero, 1670(sp) .Ltmp2731: addi a1, sp, 1640 li a2, 1 - li s10, 1 + li s1, 1 mv a0, s11 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2732: @@ -23102,7 +23095,7 @@ sd a0, 1608(sp) li a0, 125 sh a0, 1624(sp) - sd s10, 1616(sp) + sd s1, 1616(sp) .Ltmp2734: addi a1, sp, 1608 li a2, 1 @@ -23117,27 +23110,27 @@ call _Z8AddCases10TestCaseIDSt16initializer_listI8TestCaseE@plt .Ltmp2738: # %bb.629: # %invoke.cont103.i2554 - mv s10, a0 - li s1, -1320 - addi s2, sp, 1432 - li s3, -1 - li s4, 1 + mv s1, a0 + li s2, -1320 + addi s3, sp, 1432 + li s4, -1 + li s5, 1 j .LBB39_631 .LBB39_630: # %_ZN8TestCaseD2Ev.exit.i2575 # in Loop: Header=BB39_631 Depth=1 - addi s1, s1, 88 - addi s2, s2, -88 - beqz s1, .LBB39_643 + addi s2, s2, 88 + addi s3, s3, -88 + beqz s2, .LBB39_643 .LBB39_631: # %arraydestroy.body.i2555 # =>This Inner Loop Header: Depth=1 - ld s0, -8(s2) + ld s0, -8(s3) beqz s0, .LBB39_638 # %bb.632: # %if.then.i.i.i.i2560 # in Loop: Header=BB39_631 Depth=1 .Lpcrel_hi1105: auipc a0, %got_pcrel_hi(__libc_single_threaded) - ld s5, %pcrel_lo(.Lpcrel_hi1105)(a0) - lbu a0, 0(s5) + ld s6, %pcrel_lo(.Lpcrel_hi1105)(a0) + lbu a0, 0(s6) beqz a0, .LBB39_634 # %bb.633: # %if.then.i.i.i.i.i.i2563 # in Loop: Header=BB39_631 Depth=1 @@ -23145,14 +23138,14 @@ addi a1, a0, -1 sw a1, 48(s0) sext.w a0, a0 - beq a0, s4, .LBB39_635 + beq a0, s5, .LBB39_635 j .LBB39_638 .LBB39_634: # %if.else.i.i.i.i.i.i2672 # in Loop: Header=BB39_631 Depth=1 addi a0, s0, 48 - amoadd.w.aqrl a0, s3, (a0) + amoadd.w.aqrl a0, s4, (a0) sext.w a0, a0 - bne a0, s4, .LBB39_638 + bne a0, s5, .LBB39_638 .LBB39_635: # %if.then.i.i.i.i201.i2658 # in Loop: Header=BB39_631 Depth=1 ld a0, 0(s0) @@ -23160,7 +23153,7 @@ mv a0, s0 jalr a1 fence.tso - lbu a0, 0(s5) + lbu a0, 0(s6) beqz a0, .LBB39_642 # %bb.636: # %if.then.i.i.i.i.i.i.i2663 # in Loop: Header=BB39_631 Depth=1 @@ -23168,7 +23161,7 @@ addi a1, a0, -1 sw a1, 52(s0) sext.w a0, a0 - bne a0, s4, .LBB39_638 + bne a0, s5, .LBB39_638 .LBB39_637: # %if.then.i1.i.i.i.i.i2668 # in Loop: Header=BB39_631 Depth=1 ld a0, 0(s0) @@ -23177,16 +23170,16 @@ jalr a1 .LBB39_638: # %_ZNSt12__shared_ptrIN9benchmark5RegexELN9__gnu_cxx12_Lock_policyE1EED2Ev.exit.i.i2568 # in Loop: Header=BB39_631 Depth=1 - ld a0, -48(s2) - addi a1, s2, -32 + ld a0, -48(s3) + addi a1, s3, -32 beq a1, a0, .LBB39_640 # %bb.639: # %if.then.i.i2.i.i2571 # in Loop: Header=BB39_631 Depth=1 call _ZdlPv@plt .LBB39_640: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.i.i2572 # in Loop: Header=BB39_631 Depth=1 - ld a0, -88(s2) - addi a1, s2, -72 + ld a0, -88(s3) + addi a1, s3, -72 beq a1, a0, .LBB39_630 # %bb.641: # %if.then.i.i4.i.i2574 # in Loop: Header=BB39_631 Depth=1 @@ -23195,9 +23188,9 @@ .LBB39_642: # %if.else.i.i.i.i.i.i.i2671 # in Loop: Header=BB39_631 Depth=1 addi a0, s0, 52 - amoadd.w.aqrl a0, s3, (a0) + amoadd.w.aqrl a0, s4, (a0) sext.w a0, a0 - beq a0, s4, .LBB39_637 + beq a0, s5, .LBB39_637 j .LBB39_638 .LBB39_643: # %arraydestroy.done104.i2577 ld a0, 1608(sp) @@ -23211,6 +23204,7 @@ addi s3, s3, 25 addi s4, sp, 1976 addi a1, sp, 1656 + addi s5, sp, 168 beq a0, a1, .LBB39_647 # %bb.646: # %if.then.i.i204.i2582 call _ZdlPv@plt @@ -23293,7 +23287,7 @@ .LBB39_673: # %__cxx_global_var_init.110.exit .Lpcrel_hi1106: auipc a0, %pcrel_hi(dummy272) - sw s10, %pcrel_lo(.Lpcrel_hi1106)(a0) + sw s1, %pcrel_lo(.Lpcrel_hi1106)(a0) sd s3, 80(s4) li a0, 62 sd a0, 48(s4) @@ -23386,8 +23380,7 @@ jalr a1 .LBB39_682: # %_ZNSt12__shared_ptrIN9benchmark5RegexELN9__gnu_cxx12_Lock_policyE1EED2Ev.exit.i.i2703 ld a0, 152(sp) - addi a1, sp, 168 - beq a0, a1, .LBB39_684 + beq a0, s5, .LBB39_684 # %bb.683: # %if.then.i.i2.i.i2706 call _ZdlPv@plt .LBB39_684: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.i.i2707 @@ -23553,8 +23546,7 @@ jalr a1 .LBB39_701: # %_ZNSt12__shared_ptrIN9benchmark5RegexELN9__gnu_cxx12_Lock_policyE1EED2Ev.exit.i.i2788 ld a0, 152(sp) - addi a1, sp, 168 - beq a0, a1, .LBB39_703 + beq a0, s5, .LBB39_703 # %bb.702: # %if.then.i.i2.i.i2791 call _ZdlPv@plt .LBB39_703: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.i.i2792 @@ -23675,7 +23667,7 @@ call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2777: # %bb.712: # %invoke.cont17.i2901 - addi s0, sp, 376 + addi s7, sp, 376 sd s4, 1960(sp) li a0, 51 sd a0, 1928(sp) @@ -23713,11 +23705,11 @@ .Ltmp2782: addi a1, sp, 1960 li a2, 1 - mv a0, s0 + mv a0, s7 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2783: # %bb.714: # %invoke.cont24.i2917 - addi s7, sp, 464 + addi s0, sp, 464 addi a0, sp, 1944 sd a0, 1928(sp) li a0, 25 @@ -23757,7 +23749,7 @@ .Ltmp2788: addi a1, sp, 1928 li a2, 1 - mv a0, s7 + mv a0, s0 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2789: # %bb.716: # %invoke.cont31.i2933 @@ -23994,7 +23986,7 @@ call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2822: # %bb.727: # %invoke.cont73.i3026 - addi s2, sp, 1080 + addi s10, sp, 1080 addi a0, sp, 1720 sd a0, 1704(sp) li a0, 19 @@ -24027,11 +24019,11 @@ .Ltmp2827: addi a1, sp, 1704 li a2, 1 - mv a0, s2 + mv a0, s10 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2828: # %bb.729: # %invoke.cont80.i3042 - addi s10, sp, 1168 + addi s2, sp, 1168 addi a0, sp, 1688 sd a0, 1672(sp) .Lpcrel_hi1123: @@ -24045,7 +24037,7 @@ .Ltmp2830: addi a1, sp, 1672 li a2, 1 - mv a0, s10 + mv a0, s2 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2831: # %bb.730: # %invoke.cont87.i3055 @@ -24182,6 +24174,7 @@ addi s3, s3, 25 addi s4, sp, 1976 addi a1, sp, 1656 + addi s5, sp, 168 beq a0, a1, .LBB39_751 # %bb.750: # %if.then.i.i204.i3127 call _ZdlPv@plt @@ -24354,8 +24347,7 @@ jalr a1 .LBB39_786: # %_ZNSt12__shared_ptrIN9benchmark5RegexELN9__gnu_cxx12_Lock_policyE1EED2Ev.exit.i.i3248 ld a0, 152(sp) - addi a1, sp, 168 - beq a0, a1, .LBB39_788 + beq a0, s5, .LBB39_788 # %bb.787: # %if.then.i.i2.i.i3251 call _ZdlPv@plt .LBB39_788: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.i.i3252 @@ -24535,8 +24527,7 @@ jalr a1 .LBB39_805: # %_ZNSt12__shared_ptrIN9benchmark5RegexELN9__gnu_cxx12_Lock_policyE1EED2Ev.exit.i.i3333 ld a0, 152(sp) - addi a1, sp, 168 - beq a0, a1, .LBB39_807 + beq a0, s5, .LBB39_807 # %bb.806: # %if.then.i.i2.i.i3336 call _ZdlPv@plt .LBB39_807: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.i.i3337 @@ -24663,7 +24654,7 @@ call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2879: # %bb.816: # %invoke.cont17.i3446 - addi s0, sp, 376 + addi s6, sp, 376 sd s4, 1960(sp) li a0, 55 sd a0, 1928(sp) @@ -24709,11 +24700,11 @@ .Ltmp2884: addi a1, sp, 1960 li a2, 1 - mv a0, s0 + mv a0, s6 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2885: # %bb.818: # %invoke.cont24.i3462 - addi s6, sp, 464 + addi s0, sp, 464 addi a0, sp, 1944 sd a0, 1928(sp) li a0, 25 @@ -24753,7 +24744,7 @@ .Ltmp2890: addi a1, sp, 1928 li a2, 1 - mv a0, s6 + mv a0, s0 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2891: # %bb.820: # %invoke.cont31.i3478 @@ -24990,7 +24981,7 @@ call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2924: # %bb.831: # %invoke.cont73.i3571 - addi s2, sp, 1080 + addi s10, sp, 1080 addi a0, sp, 1720 sd a0, 1704(sp) li a0, 19 @@ -25023,11 +25014,11 @@ .Ltmp2929: addi a1, sp, 1704 li a2, 1 - mv a0, s2 + mv a0, s10 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2930: # %bb.833: # %invoke.cont80.i3587 - addi s10, sp, 1168 + addi s2, sp, 1168 addi a0, sp, 1688 sd a0, 1672(sp) .Lpcrel_hi1143: @@ -25041,7 +25032,7 @@ .Ltmp2932: addi a1, sp, 1672 li a2, 1 - mv a0, s10 + mv a0, s2 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2933: # %bb.834: # %invoke.cont87.i3600 @@ -25179,6 +25170,7 @@ addi s3, s3, 25 addi s4, sp, 1976 addi a1, sp, 1656 + addi s5, sp, 168 beq a0, a1, .LBB39_855 # %bb.854: # %if.then.i.i204.i3672 call _ZdlPv@plt @@ -25359,8 +25351,7 @@ jalr a1 .LBB39_890: # %_ZNSt12__shared_ptrIN9benchmark5RegexELN9__gnu_cxx12_Lock_policyE1EED2Ev.exit.i.i3793 ld a0, 152(sp) - addi a1, sp, 168 - beq a0, a1, .LBB39_892 + beq a0, s5, .LBB39_892 # %bb.891: # %if.then.i.i2.i.i3796 call _ZdlPv@plt .LBB39_892: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.i.i3797 @@ -25523,8 +25514,7 @@ jalr a1 .LBB39_909: # %_ZNSt12__shared_ptrIN9benchmark5RegexELN9__gnu_cxx12_Lock_policyE1EED2Ev.exit.i.i3877 ld a0, 152(sp) - addi a1, sp, 168 - beq a0, a1, .LBB39_911 + beq a0, s5, .LBB39_911 # %bb.910: # %if.then.i.i2.i.i3880 call _ZdlPv@plt .LBB39_911: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.i.i3881 @@ -25645,7 +25635,7 @@ call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2981: # %bb.920: # %invoke.cont17.i3990 - addi s0, sp, 376 + addi s6, sp, 376 sd s4, 1960(sp) li a0, 46 sd a0, 1928(sp) @@ -25677,11 +25667,11 @@ .Ltmp2986: addi a1, sp, 1960 li a2, 1 - mv a0, s0 + mv a0, s6 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2987: # %bb.922: # %invoke.cont24.i4006 - addi s6, sp, 464 + addi s0, sp, 464 addi a0, sp, 1944 sd a0, 1928(sp) li a0, 25 @@ -25721,7 +25711,7 @@ .Ltmp2992: addi a1, sp, 1928 li a2, 1 - mv a0, s6 + mv a0, s0 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp2993: # %bb.924: # %invoke.cont31.i4022 @@ -25958,7 +25948,7 @@ call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3026: # %bb.935: # %invoke.cont73.i4115 - addi s2, sp, 1080 + addi s10, sp, 1080 addi a0, sp, 1720 sd a0, 1704(sp) li a0, 19 @@ -25991,11 +25981,11 @@ .Ltmp3031: addi a1, sp, 1704 li a2, 1 - mv a0, s2 + mv a0, s10 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3032: # %bb.937: # %invoke.cont80.i4131 - addi s10, sp, 1168 + addi s2, sp, 1168 addi a0, sp, 1688 sd a0, 1672(sp) .Lpcrel_hi1163: @@ -26009,7 +25999,7 @@ .Ltmp3034: addi a1, sp, 1672 li a2, 1 - mv a0, s10 + mv a0, s2 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3035: # %bb.938: # %invoke.cont87.i4144 @@ -26147,6 +26137,7 @@ addi s3, s3, 25 addi s4, sp, 1976 addi a1, sp, 1656 + addi s5, sp, 168 beq a0, a1, .LBB39_959 # %bb.958: # %if.then.i.i204.i4216 call _ZdlPv@plt @@ -26322,8 +26313,7 @@ jalr a1 .LBB39_994: # %_ZNSt12__shared_ptrIN9benchmark5RegexELN9__gnu_cxx12_Lock_policyE1EED2Ev.exit.i.i4337 ld a0, 152(sp) - addi a1, sp, 168 - beq a0, a1, .LBB39_996 + beq a0, s5, .LBB39_996 # %bb.995: # %if.then.i.i2.i.i4340 call _ZdlPv@plt .LBB39_996: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.i.i4341 @@ -26496,8 +26486,7 @@ jalr a1 .LBB39_1013: # %_ZNSt12__shared_ptrIN9benchmark5RegexELN9__gnu_cxx12_Lock_policyE1EED2Ev.exit.i.i4421 ld a0, 152(sp) - addi a1, sp, 168 - beq a0, a1, .LBB39_1015 + beq a0, s5, .LBB39_1015 # %bb.1014: # %if.then.i.i2.i.i4424 call _ZdlPv@plt .LBB39_1015: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.i.i4425 @@ -26620,7 +26609,7 @@ call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3083: # %bb.1024: # %invoke.cont17.i4534 - addi s0, sp, 376 + addi s6, sp, 376 sd s4, 1960(sp) li a0, 53 sd a0, 1928(sp) @@ -26662,11 +26651,11 @@ .Ltmp3088: addi a1, sp, 1960 li a2, 1 - mv a0, s0 + mv a0, s6 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3089: # %bb.1026: # %invoke.cont24.i4550 - addi s6, sp, 464 + addi s0, sp, 464 addi a0, sp, 1944 sd a0, 1928(sp) li a0, 25 @@ -26706,7 +26695,7 @@ .Ltmp3094: addi a1, sp, 1928 li a2, 1 - mv a0, s6 + mv a0, s0 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3095: # %bb.1028: # %invoke.cont31.i4566 @@ -26943,7 +26932,7 @@ call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3128: # %bb.1039: # %invoke.cont73.i4659 - addi s2, sp, 1080 + addi s10, sp, 1080 addi a0, sp, 1720 sd a0, 1704(sp) li a0, 19 @@ -26976,11 +26965,11 @@ .Ltmp3133: addi a1, sp, 1704 li a2, 1 - mv a0, s2 + mv a0, s10 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3134: # %bb.1041: # %invoke.cont80.i4675 - addi s10, sp, 1168 + addi s2, sp, 1168 addi a0, sp, 1688 sd a0, 1672(sp) .Lpcrel_hi1183: @@ -26994,7 +26983,7 @@ .Ltmp3136: addi a1, sp, 1672 li a2, 1 - mv a0, s10 + mv a0, s2 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3137: # %bb.1042: # %invoke.cont87.i4688 @@ -27132,6 +27121,7 @@ addi s3, s3, 25 addi s4, sp, 1976 addi a1, sp, 1656 + addi s5, sp, 168 beq a0, a1, .LBB39_1063 # %bb.1062: # %if.then.i.i204.i4760 call _ZdlPv@plt @@ -27308,8 +27298,7 @@ jalr a1 .LBB39_1098: # %_ZNSt12__shared_ptrIN9benchmark5RegexELN9__gnu_cxx12_Lock_policyE1EED2Ev.exit.i.i4881 ld a0, 152(sp) - addi a1, sp, 168 - beq a0, a1, .LBB39_1100 + beq a0, s5, .LBB39_1100 # %bb.1099: # %if.then.i.i2.i.i4884 call _ZdlPv@plt .LBB39_1100: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.i.i4885 @@ -27477,8 +27466,7 @@ jalr a1 .LBB39_1117: # %_ZNSt12__shared_ptrIN9benchmark5RegexELN9__gnu_cxx12_Lock_policyE1EED2Ev.exit.i.i4965 ld a0, 152(sp) - addi a1, sp, 168 - beq a0, a1, .LBB39_1119 + beq a0, s5, .LBB39_1119 # %bb.1118: # %if.then.i.i2.i.i4968 call _ZdlPv@plt .LBB39_1119: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.i.i4969 @@ -27606,7 +27594,7 @@ call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3185: # %bb.1128: # %invoke.cont17.i5078 - addi s0, sp, 376 + addi s6, sp, 376 sd s4, 1960(sp) li a0, 41 sd a0, 1928(sp) @@ -27638,11 +27626,11 @@ .Ltmp3190: addi a1, sp, 1960 li a2, 1 - mv a0, s0 + mv a0, s6 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3191: # %bb.1130: # %invoke.cont24.i5094 - addi s6, sp, 464 + addi s0, sp, 464 addi a0, sp, 1944 sd a0, 1928(sp) li a0, 25 @@ -27682,7 +27670,7 @@ .Ltmp3196: addi a1, sp, 1928 li a2, 1 - mv a0, s6 + mv a0, s0 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3197: # %bb.1132: # %invoke.cont31.i5110 @@ -27919,7 +27907,7 @@ call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3230: # %bb.1143: # %invoke.cont73.i5203 - addi s2, sp, 1080 + addi s10, sp, 1080 addi a0, sp, 1720 sd a0, 1704(sp) li a0, 19 @@ -27952,11 +27940,11 @@ .Ltmp3235: addi a1, sp, 1704 li a2, 1 - mv a0, s2 + mv a0, s10 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3236: # %bb.1145: # %invoke.cont80.i5219 - addi s10, sp, 1168 + addi s2, sp, 1168 addi a0, sp, 1688 sd a0, 1672(sp) .Lpcrel_hi1203: @@ -27970,7 +27958,7 @@ .Ltmp3238: addi a1, sp, 1672 li a2, 1 - mv a0, s10 + mv a0, s2 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3239: # %bb.1146: # %invoke.cont87.i5232 @@ -28108,6 +28096,7 @@ addi s3, s3, 25 addi s4, sp, 1976 addi a1, sp, 1656 + addi s5, sp, 168 beq a0, a1, .LBB39_1167 # %bb.1166: # %if.then.i.i204.i5304 call _ZdlPv@plt @@ -28293,8 +28282,7 @@ jalr a1 .LBB39_1202: # %_ZNSt12__shared_ptrIN9benchmark5RegexELN9__gnu_cxx12_Lock_policyE1EED2Ev.exit.i.i5425 ld a0, 152(sp) - addi a1, sp, 168 - beq a0, a1, .LBB39_1204 + beq a0, s5, .LBB39_1204 # %bb.1203: # %if.then.i.i2.i.i5428 call _ZdlPv@plt .LBB39_1204: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.i.i5429 @@ -28456,8 +28444,7 @@ jalr a1 .LBB39_1221: # %_ZNSt12__shared_ptrIN9benchmark5RegexELN9__gnu_cxx12_Lock_policyE1EED2Ev.exit.i.i5509 ld a0, 152(sp) - addi a1, sp, 168 - beq a0, a1, .LBB39_1223 + beq a0, s5, .LBB39_1223 # %bb.1222: # %if.then.i.i2.i.i5512 call _ZdlPv@plt .LBB39_1223: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.i.i5513 @@ -28579,7 +28566,7 @@ call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3287: # %bb.1232: # %invoke.cont17.i5622 - addi s0, sp, 376 + addi s6, sp, 376 sd s4, 1960(sp) li a0, 46 sd a0, 1928(sp) @@ -28611,11 +28598,11 @@ .Ltmp3292: addi a1, sp, 1960 li a2, 1 - mv a0, s0 + mv a0, s6 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3293: # %bb.1234: # %invoke.cont24.i5638 - addi s6, sp, 464 + addi s0, sp, 464 addi a0, sp, 1944 sd a0, 1928(sp) li a0, 25 @@ -28655,7 +28642,7 @@ .Ltmp3298: addi a1, sp, 1928 li a2, 1 - mv a0, s6 + mv a0, s0 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3299: # %bb.1236: # %invoke.cont31.i5654 @@ -28892,7 +28879,7 @@ call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3332: # %bb.1247: # %invoke.cont73.i5747 - addi s2, sp, 1080 + addi s10, sp, 1080 addi a0, sp, 1720 sd a0, 1704(sp) li a0, 19 @@ -28925,11 +28912,11 @@ .Ltmp3337: addi a1, sp, 1704 li a2, 1 - mv a0, s2 + mv a0, s10 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3338: # %bb.1249: # %invoke.cont80.i5763 - addi s10, sp, 1168 + addi s2, sp, 1168 addi a0, sp, 1688 sd a0, 1672(sp) .Lpcrel_hi1223: @@ -28943,7 +28930,7 @@ .Ltmp3340: addi a1, sp, 1672 li a2, 1 - mv a0, s10 + mv a0, s2 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3341: # %bb.1250: # %invoke.cont87.i5776 @@ -29081,6 +29068,7 @@ addi s3, s3, 25 addi s4, sp, 1976 addi a1, sp, 1656 + addi s5, sp, 168 beq a0, a1, .LBB39_1271 # %bb.1270: # %if.then.i.i204.i5848 call _ZdlPv@plt @@ -29255,8 +29243,7 @@ jalr a1 .LBB39_1306: # %_ZNSt12__shared_ptrIN9benchmark5RegexELN9__gnu_cxx12_Lock_policyE1EED2Ev.exit.i.i5969 ld a0, 152(sp) - addi a1, sp, 168 - beq a0, a1, .LBB39_1308 + beq a0, s5, .LBB39_1308 # %bb.1307: # %if.then.i.i2.i.i5972 call _ZdlPv@plt .LBB39_1308: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.i.i5973 @@ -29669,10 +29656,10 @@ call _ZN8TestCaseD2Ev mv a0, s11 call _ZN8TestCaseD2Ev - mv a0, s10 - call _ZN8TestCaseD2Ev mv a0, s2 call _ZN8TestCaseD2Ev + mv a0, s10 + call _ZN8TestCaseD2Ev mv a0, s0 call _ZN8TestCaseD2Ev mv a0, s3 @@ -29685,9 +29672,9 @@ call _ZN8TestCaseD2Ev addi a0, sp, 552 call _ZN8TestCaseD2Ev - mv a0, s7 + addi a0, sp, 464 call _ZN8TestCaseD2Ev - addi a0, sp, 376 + mv a0, s7 call _ZN8TestCaseD2Ev addi a0, sp, 288 call _ZN8TestCaseD2Ev @@ -29721,7 +29708,7 @@ # %bb.1368: # %if.then.i.i294.i5786 call _ZdlPv@plt .LBB39_1369: # %ehcleanup116.i5768 - mv s10, s11 + mv s2, s11 j .LBB39_1371 .LBB39_1370: # %lpad86.i5767 .Ltmp3342: @@ -29734,7 +29721,7 @@ # %bb.1372: # %if.then.i.i300.i5773 call _ZdlPv@plt .LBB39_1373: # %ehcleanup119.i5755 - mv s2, s10 + mv s10, s2 j .LBB39_1375 .LBB39_1374: # %lpad79.i5754 .Ltmp3339: @@ -29752,7 +29739,7 @@ mv s1, a0 li s7, 0 .LBB39_1378: # %ehcleanup122.i5739 - mv s0, s2 + mv s0, s10 ld a0, 1736(sp) addi a1, sp, 1752 beq a0, a1, .LBB39_1382 @@ -29930,7 +29917,7 @@ j .LBB39_1392 .LBB39_1413: # %lpad30.i5645 .Ltmp3300: - mv s5, s6 + mv s5, s0 mv s1, a0 li s7, 0 j .LBB39_1392 @@ -29938,14 +29925,14 @@ .Ltmp3297: mv s1, a0 li s7, 0 - mv s5, s6 + mv s5, s0 ld a0, 1960(sp) addi a1, sp, 1976 beq a0, a1, .LBB39_1394 j .LBB39_1397 .LBB39_1415: # %lpad23.i5629 .Ltmp3294: - mv s5, s0 + mv s5, s6 mv s1, a0 li s7, 0 ld a0, 1960(sp) @@ -29956,7 +29943,7 @@ .Ltmp3291: mv s1, a0 li s7, 0 - mv s5, s0 + mv s5, s6 addi a0, sp, 1976 ld a0, 16(a0) addi a1, sp, 2008 @@ -30045,10 +30032,10 @@ call _ZN8TestCaseD2Ev mv a0, s11 call _ZN8TestCaseD2Ev - mv a0, s10 - call _ZN8TestCaseD2Ev mv a0, s2 call _ZN8TestCaseD2Ev + mv a0, s10 + call _ZN8TestCaseD2Ev mv a0, s0 call _ZN8TestCaseD2Ev mv a0, s3 @@ -30061,9 +30048,9 @@ call _ZN8TestCaseD2Ev addi a0, sp, 552 call _ZN8TestCaseD2Ev - mv a0, s7 + addi a0, sp, 464 call _ZN8TestCaseD2Ev - addi a0, sp, 376 + mv a0, s7 call _ZN8TestCaseD2Ev addi a0, sp, 288 call _ZN8TestCaseD2Ev @@ -30097,7 +30084,7 @@ # %bb.1438: # %if.then.i.i294.i5242 call _ZdlPv@plt .LBB39_1439: # %ehcleanup116.i5224 - mv s10, s11 + mv s2, s11 j .LBB39_1441 .LBB39_1440: # %lpad86.i5223 .Ltmp3240: @@ -30110,7 +30097,7 @@ # %bb.1442: # %if.then.i.i300.i5229 call _ZdlPv@plt .LBB39_1443: # %ehcleanup119.i5211 - mv s2, s10 + mv s10, s2 j .LBB39_1445 .LBB39_1444: # %lpad79.i5210 .Ltmp3237: @@ -30128,7 +30115,7 @@ mv s1, a0 li s7, 0 .LBB39_1448: # %ehcleanup122.i5195 - mv s0, s2 + mv s0, s10 ld a0, 1736(sp) addi a1, sp, 1752 beq a0, a1, .LBB39_1452 @@ -30306,7 +30293,7 @@ j .LBB39_1462 .LBB39_1483: # %lpad30.i5101 .Ltmp3198: - mv s5, s6 + mv s5, s0 mv s1, a0 li s7, 0 j .LBB39_1462 @@ -30314,14 +30301,14 @@ .Ltmp3195: mv s1, a0 li s7, 0 - mv s5, s6 + mv s5, s0 ld a0, 1960(sp) addi a1, sp, 1976 beq a0, a1, .LBB39_1464 j .LBB39_1467 .LBB39_1485: # %lpad23.i5085 .Ltmp3192: - mv s5, s0 + mv s5, s6 mv s1, a0 li s7, 0 ld a0, 1960(sp) @@ -30332,7 +30319,7 @@ .Ltmp3189: mv s1, a0 li s7, 0 - mv s5, s0 + mv s5, s6 addi a0, sp, 1976 ld a0, 16(a0) addi a1, sp, 2008 @@ -30421,10 +30408,10 @@ call _ZN8TestCaseD2Ev mv a0, s11 call _ZN8TestCaseD2Ev - mv a0, s10 - call _ZN8TestCaseD2Ev mv a0, s2 call _ZN8TestCaseD2Ev + mv a0, s10 + call _ZN8TestCaseD2Ev mv a0, s0 call _ZN8TestCaseD2Ev mv a0, s3 @@ -30437,9 +30424,9 @@ call _ZN8TestCaseD2Ev addi a0, sp, 552 call _ZN8TestCaseD2Ev - mv a0, s7 + addi a0, sp, 464 call _ZN8TestCaseD2Ev - addi a0, sp, 376 + mv a0, s7 call _ZN8TestCaseD2Ev addi a0, sp, 288 call _ZN8TestCaseD2Ev @@ -30473,7 +30460,7 @@ # %bb.1508: # %if.then.i.i294.i4698 call _ZdlPv@plt .LBB39_1509: # %ehcleanup116.i4680 - mv s10, s11 + mv s2, s11 j .LBB39_1511 .LBB39_1510: # %lpad86.i4679 .Ltmp3138: @@ -30486,7 +30473,7 @@ # %bb.1512: # %if.then.i.i300.i4685 call _ZdlPv@plt .LBB39_1513: # %ehcleanup119.i4667 - mv s2, s10 + mv s10, s2 j .LBB39_1515 .LBB39_1514: # %lpad79.i4666 .Ltmp3135: @@ -30504,7 +30491,7 @@ mv s1, a0 li s7, 0 .LBB39_1518: # %ehcleanup122.i4651 - mv s0, s2 + mv s0, s10 ld a0, 1736(sp) addi a1, sp, 1752 beq a0, a1, .LBB39_1522 @@ -30682,7 +30669,7 @@ j .LBB39_1532 .LBB39_1553: # %lpad30.i4557 .Ltmp3096: - mv s5, s6 + mv s5, s0 mv s1, a0 li s7, 0 j .LBB39_1532 @@ -30690,14 +30677,14 @@ .Ltmp3093: mv s1, a0 li s7, 0 - mv s5, s6 + mv s5, s0 ld a0, 1960(sp) addi a1, sp, 1976 beq a0, a1, .LBB39_1534 j .LBB39_1537 .LBB39_1555: # %lpad23.i4541 .Ltmp3090: - mv s5, s0 + mv s5, s6 mv s1, a0 li s7, 0 ld a0, 1960(sp) @@ -30708,7 +30695,7 @@ .Ltmp3087: mv s1, a0 li s7, 0 - mv s5, s0 + mv s5, s6 addi a0, sp, 1976 ld a0, 16(a0) addi a1, sp, 2008 @@ -30797,10 +30784,10 @@ call _ZN8TestCaseD2Ev mv a0, s11 call _ZN8TestCaseD2Ev - mv a0, s10 - call _ZN8TestCaseD2Ev mv a0, s2 call _ZN8TestCaseD2Ev + mv a0, s10 + call _ZN8TestCaseD2Ev mv a0, s0 call _ZN8TestCaseD2Ev mv a0, s3 @@ -30813,9 +30800,9 @@ call _ZN8TestCaseD2Ev addi a0, sp, 552 call _ZN8TestCaseD2Ev - mv a0, s7 + addi a0, sp, 464 call _ZN8TestCaseD2Ev - addi a0, sp, 376 + mv a0, s7 call _ZN8TestCaseD2Ev addi a0, sp, 288 call _ZN8TestCaseD2Ev @@ -30849,7 +30836,7 @@ # %bb.1578: # %if.then.i.i294.i4154 call _ZdlPv@plt .LBB39_1579: # %ehcleanup116.i4136 - mv s10, s11 + mv s2, s11 j .LBB39_1581 .LBB39_1580: # %lpad86.i4135 .Ltmp3036: @@ -30862,7 +30849,7 @@ # %bb.1582: # %if.then.i.i300.i4141 call _ZdlPv@plt .LBB39_1583: # %ehcleanup119.i4123 - mv s2, s10 + mv s10, s2 j .LBB39_1585 .LBB39_1584: # %lpad79.i4122 .Ltmp3033: @@ -30880,7 +30867,7 @@ mv s1, a0 li s7, 0 .LBB39_1588: # %ehcleanup122.i4107 - mv s0, s2 + mv s0, s10 ld a0, 1736(sp) addi a1, sp, 1752 beq a0, a1, .LBB39_1592 @@ -31058,7 +31045,7 @@ j .LBB39_1602 .LBB39_1623: # %lpad30.i4013 .Ltmp2994: - mv s5, s6 + mv s5, s0 mv s1, a0 li s7, 0 j .LBB39_1602 @@ -31066,14 +31053,14 @@ .Ltmp2991: mv s1, a0 li s7, 0 - mv s5, s6 + mv s5, s0 ld a0, 1960(sp) addi a1, sp, 1976 beq a0, a1, .LBB39_1604 j .LBB39_1607 .LBB39_1625: # %lpad23.i3997 .Ltmp2988: - mv s5, s0 + mv s5, s6 mv s1, a0 li s7, 0 ld a0, 1960(sp) @@ -31084,7 +31071,7 @@ .Ltmp2985: mv s1, a0 li s7, 0 - mv s5, s0 + mv s5, s6 addi a0, sp, 1976 ld a0, 16(a0) addi a1, sp, 2008 @@ -31173,10 +31160,10 @@ call _ZN8TestCaseD2Ev mv a0, s11 call _ZN8TestCaseD2Ev - mv a0, s10 - call _ZN8TestCaseD2Ev mv a0, s2 call _ZN8TestCaseD2Ev + mv a0, s10 + call _ZN8TestCaseD2Ev mv a0, s0 call _ZN8TestCaseD2Ev mv a0, s3 @@ -31189,9 +31176,9 @@ call _ZN8TestCaseD2Ev addi a0, sp, 552 call _ZN8TestCaseD2Ev - mv a0, s7 + addi a0, sp, 464 call _ZN8TestCaseD2Ev - addi a0, sp, 376 + mv a0, s7 call _ZN8TestCaseD2Ev addi a0, sp, 288 call _ZN8TestCaseD2Ev @@ -31225,7 +31212,7 @@ # %bb.1648: # %if.then.i.i294.i3610 call _ZdlPv@plt .LBB39_1649: # %ehcleanup116.i3592 - mv s10, s11 + mv s2, s11 j .LBB39_1651 .LBB39_1650: # %lpad86.i3591 .Ltmp2934: @@ -31238,7 +31225,7 @@ # %bb.1652: # %if.then.i.i300.i3597 call _ZdlPv@plt .LBB39_1653: # %ehcleanup119.i3579 - mv s2, s10 + mv s10, s2 j .LBB39_1655 .LBB39_1654: # %lpad79.i3578 .Ltmp2931: @@ -31256,7 +31243,7 @@ mv s1, a0 li s7, 0 .LBB39_1658: # %ehcleanup122.i3563 - mv s0, s2 + mv s0, s10 ld a0, 1736(sp) addi a1, sp, 1752 beq a0, a1, .LBB39_1662 @@ -31434,7 +31421,7 @@ j .LBB39_1672 .LBB39_1693: # %lpad30.i3469 .Ltmp2892: - mv s5, s6 + mv s5, s0 mv s1, a0 li s7, 0 j .LBB39_1672 @@ -31442,14 +31429,14 @@ .Ltmp2889: mv s1, a0 li s7, 0 - mv s5, s6 + mv s5, s0 ld a0, 1960(sp) addi a1, sp, 1976 beq a0, a1, .LBB39_1674 j .LBB39_1677 .LBB39_1695: # %lpad23.i3453 .Ltmp2886: - mv s5, s0 + mv s5, s6 mv s1, a0 li s7, 0 ld a0, 1960(sp) @@ -31460,7 +31447,7 @@ .Ltmp2883: mv s1, a0 li s7, 0 - mv s5, s0 + mv s5, s6 addi a0, sp, 1976 ld a0, 16(a0) addi a1, sp, 2008 @@ -31549,10 +31536,10 @@ call _ZN8TestCaseD2Ev mv a0, s11 call _ZN8TestCaseD2Ev - mv a0, s10 - call _ZN8TestCaseD2Ev mv a0, s2 call _ZN8TestCaseD2Ev + mv a0, s10 + call _ZN8TestCaseD2Ev mv a0, s0 call _ZN8TestCaseD2Ev mv a0, s3 @@ -31565,9 +31552,9 @@ call _ZN8TestCaseD2Ev addi a0, sp, 552 call _ZN8TestCaseD2Ev - mv a0, s7 + addi a0, sp, 464 call _ZN8TestCaseD2Ev - addi a0, sp, 376 + mv a0, s7 call _ZN8TestCaseD2Ev addi a0, sp, 288 call _ZN8TestCaseD2Ev @@ -31601,7 +31588,7 @@ # %bb.1718: # %if.then.i.i294.i3065 call _ZdlPv@plt .LBB39_1719: # %ehcleanup116.i3047 - mv s10, s11 + mv s2, s11 j .LBB39_1721 .LBB39_1720: # %lpad86.i3046 .Ltmp2832: @@ -31614,7 +31601,7 @@ # %bb.1722: # %if.then.i.i300.i3052 call _ZdlPv@plt .LBB39_1723: # %ehcleanup119.i3034 - mv s2, s10 + mv s10, s2 j .LBB39_1725 .LBB39_1724: # %lpad79.i3033 .Ltmp2829: @@ -31627,7 +31614,7 @@ # %bb.1726: # %if.then.i.i306.i3039 call _ZdlPv@plt .LBB39_1727: # %ehcleanup122.i3018 - mv s0, s2 + mv s0, s10 .LBB39_1728: # %ehcleanup122.i3018 ld a0, 1736(sp) addi a1, sp, 1752 @@ -31739,7 +31726,7 @@ .LBB39_1756: # %lpad77.i3029 .Ltmp2826: li s1, 0 - mv s0, s2 + mv s0, s10 sd a0, 40(sp) # 8-byte Folded Spill j .LBB39_1728 .LBB39_1757: # %lpad72.i3017 @@ -31811,7 +31798,7 @@ j .LBB39_1748 .LBB39_1768: # %lpad30.i2924 .Ltmp2790: - mv s5, s7 + mv s5, s0 li s1, 0 sd a0, 40(sp) # 8-byte Folded Spill ld a0, 1928(sp) @@ -31821,7 +31808,7 @@ .LBB39_1769: # %lpad28.i2920 .Ltmp2787: li s1, 0 - mv s5, s7 + mv s5, s0 sd a0, 40(sp) # 8-byte Folded Spill ld a0, 1960(sp) addi a1, sp, 1976 @@ -31829,7 +31816,7 @@ j .LBB39_1749 .LBB39_1770: # %lpad23.i2908 .Ltmp2784: - mv s5, s0 + mv s5, s7 li s1, 0 sd a0, 40(sp) # 8-byte Folded Spill ld a0, 1960(sp) @@ -31840,7 +31827,7 @@ .Ltmp2781: sd a0, 40(sp) # 8-byte Folded Spill li s1, 0 - mv s5, s0 + mv s5, s7 addi a0, sp, 1976 ld a0, 16(a0) addi a1, sp, 2008 @@ -31929,7 +31916,7 @@ call _ZN8TestCaseD2Ev mv a0, s11 call _ZN8TestCaseD2Ev - mv a0, s1 + mv a0, s10 call _ZN8TestCaseD2Ev mv a0, s2 call _ZN8TestCaseD2Ev @@ -31943,11 +31930,11 @@ call _ZN8TestCaseD2Ev mv a0, s8 call _ZN8TestCaseD2Ev - mv a0, s7 + addi a0, sp, 552 call _ZN8TestCaseD2Ev addi a0, sp, 464 call _ZN8TestCaseD2Ev - addi a0, sp, 376 + mv a0, s7 call _ZN8TestCaseD2Ev addi a0, sp, 288 call _ZN8TestCaseD2Ev @@ -31955,12 +31942,12 @@ call _ZN8TestCaseD2Ev addi a0, sp, 112 call _ZN8TestCaseD2Ev - li s10, 1 + li s1, 1 j .LBB39_1788 .LBB39_1787: # %lpad100.i2527 .Ltmp2736: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 .LBB39_1788: # %ehcleanup.i2528 ld a0, 1608(sp) addi a1, sp, 1624 @@ -31973,7 +31960,7 @@ .LBB39_1791: # %lpad93.i2514 .Ltmp2733: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 .LBB39_1792: # %ehcleanup113.i2515 ld a0, 1640(sp) addi a1, sp, 1656 @@ -31981,12 +31968,12 @@ # %bb.1793: # %if.then.i.i294.i2520 call _ZdlPv@plt .LBB39_1794: # %ehcleanup116.i2502 - mv s1, s11 + mv s10, s11 j .LBB39_1796 .LBB39_1795: # %lpad86.i2501 .Ltmp2730: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 .LBB39_1796: # %ehcleanup116.i2502 ld a0, 1672(sp) addi a1, sp, 1688 @@ -31994,12 +31981,12 @@ # %bb.1797: # %if.then.i.i300.i2507 call _ZdlPv@plt .LBB39_1798: # %ehcleanup119.i2489 - mv s2, s1 + mv s2, s10 j .LBB39_1800 .LBB39_1799: # %lpad79.i2488 .Ltmp2727: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 .LBB39_1800: # %ehcleanup119.i2489 ld a0, 1704(sp) addi a1, sp, 1720 @@ -32010,7 +31997,7 @@ .LBB39_1802: # %lpad77.i2484 .Ltmp2724: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 .LBB39_1803: # %ehcleanup122.i2473 mv s0, s2 ld a0, 1736(sp) @@ -32022,7 +32009,7 @@ .LBB39_1805: # %lpad72.i2472 .Ltmp2721: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 ld a0, 1736(sp) addi a1, sp, 1752 bne a0, a1, .LBB39_1804 @@ -32030,7 +32017,7 @@ .LBB39_1806: # %lpad70.i2468 .Ltmp2718: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 .LBB39_1807: # %ehcleanup125.i2457 mv s3, s0 ld a0, 1768(sp) @@ -32060,40 +32047,42 @@ .LBB39_1814: # %if.then.i.i336.i2417 call _ZdlPv@plt .LBB39_1815: # %ehcleanup137.i2396 - mv s7, s8 + mv s5, s8 ld a0, 1896(sp) addi a1, sp, 1912 beq a0, a1, .LBB39_1817 .LBB39_1816: # %if.then.i.i342.i2401 call _ZdlPv@plt .LBB39_1817: # %ehcleanup140.i2380 - mv s5, s7 ld a0, 1928(sp) addi a1, sp, 1944 - beq a0, a1, .LBB39_1819 -.LBB39_1818: # %if.then.i.i348.i2385 - call _ZdlPv@plt -.LBB39_1819: # %ehcleanup143.i2364 + bne a0, a1, .LBB39_1821 +# %bb.1818: # %ehcleanup143.i2364 ld a0, 1960(sp) addi a1, sp, 1976 bne a0, a1, .LBB39_1822 -# %bb.1820: # %ehcleanup146.i2348 +.LBB39_1819: # %ehcleanup146.i2348 addi a0, sp, 1976 ld a0, 16(a0) addi a1, sp, 2008 bne a0, a1, .LBB39_1823 -.LBB39_1821: # %ehcleanup149.i2332 +.LBB39_1820: # %ehcleanup149.i2332 addi a0, sp, 1976 ld a0, 48(a0) addi a1, sp, 2040 bne a0, a1, .LBB39_1824 j .LBB39_1825 +.LBB39_1821: # %if.then.i.i348.i2385 + call _ZdlPv@plt + ld a0, 1960(sp) + addi a1, sp, 1976 + beq a0, a1, .LBB39_1819 .LBB39_1822: # %if.then.i.i354.i2369 call _ZdlPv@plt addi a0, sp, 1976 ld a0, 16(a0) addi a1, sp, 2008 - beq a0, a1, .LBB39_1821 + beq a0, a1, .LBB39_1820 .LBB39_1823: # %if.then.i.i360.i2353 call _ZdlPv@plt addi a0, sp, 1976 @@ -32114,7 +32103,7 @@ addi s0, sp, 112 xor a0, s0, s5 seqz a0, a0 - or a0, s10, a0 + or a0, s1, a0 beqz a0, .LBB39_1828 j .LBB39_2186 .LBB39_1828: # %arraydestroy.body156.i2317 @@ -32127,7 +32116,7 @@ .LBB39_1829: # %lpad65.i2456 .Ltmp2715: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 ld a0, 1768(sp) addi a1, sp, 1784 bne a0, a1, .LBB39_1808 @@ -32135,12 +32124,12 @@ .LBB39_1830: # %lpad63.i2452 .Ltmp2712: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 j .LBB39_1809 .LBB39_1831: # %lpad58.i2440 .Ltmp2709: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 ld a0, 1800(sp) addi a1, sp, 1816 bne a0, a1, .LBB39_1810 @@ -32148,12 +32137,12 @@ .LBB39_1832: # %lpad56.i2436 .Ltmp2706: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 j .LBB39_1811 .LBB39_1833: # %lpad51.i2424 .Ltmp2703: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 ld a0, 1832(sp) addi a1, sp, 1848 bne a0, a1, .LBB39_1812 @@ -32161,7 +32150,7 @@ .LBB39_1834: # %lpad44.i2411 .Ltmp2700: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 ld a0, 1864(sp) addi a1, sp, 1880 bne a0, a1, .LBB39_1814 @@ -32169,12 +32158,13 @@ .LBB39_1835: # %lpad42.i2407 .Ltmp2697: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 j .LBB39_1815 .LBB39_1836: # %lpad37.i2395 .Ltmp2694: + mv s5, s0 sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 ld a0, 1896(sp) addi a1, sp, 1912 bne a0, a1, .LBB39_1816 @@ -32182,54 +32172,58 @@ .LBB39_1837: # %lpad35.i2391 .Ltmp2691: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 + mv s5, s0 j .LBB39_1817 .LBB39_1838: # %lpad30.i2379 .Ltmp2688: mv s5, s0 sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 - ld a0, 1928(sp) - addi a1, sp, 1944 - bne a0, a1, .LBB39_1818 - j .LBB39_1819 + li s1, 0 + j .LBB39_1817 .LBB39_1839: # %lpad28.i2375 .Ltmp2685: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 mv s5, s0 - j .LBB39_1819 + ld a0, 1960(sp) + addi a1, sp, 1976 + beq a0, a1, .LBB39_1819 + j .LBB39_1822 .LBB39_1840: # %lpad23.i2363 .Ltmp2682: - mv s5, s0 + mv s5, s7 sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 - j .LBB39_1819 + li s1, 0 + ld a0, 1960(sp) + addi a1, sp, 1976 + beq a0, a1, .LBB39_1819 + j .LBB39_1822 .LBB39_1841: # %lpad21.i2359 .Ltmp2679: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 - mv s5, s0 + li s1, 0 + mv s5, s7 addi a0, sp, 1976 ld a0, 16(a0) addi a1, sp, 2008 - beq a0, a1, .LBB39_1821 + beq a0, a1, .LBB39_1820 j .LBB39_1823 .LBB39_1842: # %lpad16.i2347 .Ltmp2676: - mv s5, s1 + mv s5, s2 sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 addi a0, sp, 1976 ld a0, 16(a0) addi a1, sp, 2008 - beq a0, a1, .LBB39_1821 + beq a0, a1, .LBB39_1820 j .LBB39_1823 .LBB39_1843: # %lpad14.i2343 .Ltmp2673: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 - mv s5, s1 + li s1, 0 + mv s5, s2 addi a0, sp, 1976 ld a0, 48(a0) addi a1, sp, 2040 @@ -32238,7 +32232,7 @@ .LBB39_1844: # %lpad9.i2331 .Ltmp2670: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 addi a0, sp, 1976 ld a0, 48(a0) addi a1, sp, 2040 @@ -32251,7 +32245,7 @@ .Ltmp2664: .LBB39_1847: # %ehcleanup152.i2308 sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 j .LBB39_1825 .LBB39_1848: # %lpad5.i2231 .Ltmp2661: @@ -32298,7 +32292,7 @@ call _ZN8TestCaseD2Ev mv a0, s11 call _ZN8TestCaseD2Ev - mv a0, s1 + mv a0, s10 call _ZN8TestCaseD2Ev mv a0, s2 call _ZN8TestCaseD2Ev @@ -32312,11 +32306,11 @@ call _ZN8TestCaseD2Ev mv a0, s8 call _ZN8TestCaseD2Ev - mv a0, s7 + addi a0, sp, 552 call _ZN8TestCaseD2Ev addi a0, sp, 464 call _ZN8TestCaseD2Ev - addi a0, sp, 376 + mv a0, s7 call _ZN8TestCaseD2Ev addi a0, sp, 288 call _ZN8TestCaseD2Ev @@ -32324,12 +32318,12 @@ call _ZN8TestCaseD2Ev addi a0, sp, 112 call _ZN8TestCaseD2Ev - li s10, 1 + li s1, 1 j .LBB39_1858 .LBB39_1857: # %lpad100.i1983 .Ltmp2634: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 .LBB39_1858: # %ehcleanup.i1984 ld a0, 1608(sp) addi a1, sp, 1624 @@ -32342,7 +32336,7 @@ .LBB39_1861: # %lpad93.i1970 .Ltmp2631: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 .LBB39_1862: # %ehcleanup113.i1971 ld a0, 1640(sp) addi a1, sp, 1656 @@ -32350,12 +32344,12 @@ # %bb.1863: # %if.then.i.i294.i1976 call _ZdlPv@plt .LBB39_1864: # %ehcleanup116.i1958 - mv s1, s11 + mv s10, s11 j .LBB39_1866 .LBB39_1865: # %lpad86.i1957 .Ltmp2628: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 .LBB39_1866: # %ehcleanup116.i1958 ld a0, 1672(sp) addi a1, sp, 1688 @@ -32363,12 +32357,12 @@ # %bb.1867: # %if.then.i.i300.i1963 call _ZdlPv@plt .LBB39_1868: # %ehcleanup119.i1945 - mv s2, s1 + mv s2, s10 j .LBB39_1870 .LBB39_1869: # %lpad79.i1944 .Ltmp2625: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 .LBB39_1870: # %ehcleanup119.i1945 ld a0, 1704(sp) addi a1, sp, 1720 @@ -32379,7 +32373,7 @@ .LBB39_1872: # %lpad77.i1940 .Ltmp2622: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 .LBB39_1873: # %ehcleanup122.i1929 mv s0, s2 ld a0, 1736(sp) @@ -32391,7 +32385,7 @@ .LBB39_1875: # %lpad72.i1928 .Ltmp2619: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 ld a0, 1736(sp) addi a1, sp, 1752 bne a0, a1, .LBB39_1874 @@ -32399,7 +32393,7 @@ .LBB39_1876: # %lpad70.i1924 .Ltmp2616: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 .LBB39_1877: # %ehcleanup125.i1913 mv s3, s0 ld a0, 1768(sp) @@ -32429,40 +32423,42 @@ .LBB39_1884: # %if.then.i.i336.i1873 call _ZdlPv@plt .LBB39_1885: # %ehcleanup137.i1852 - mv s7, s8 + mv s5, s8 ld a0, 1896(sp) addi a1, sp, 1912 beq a0, a1, .LBB39_1887 .LBB39_1886: # %if.then.i.i342.i1857 call _ZdlPv@plt .LBB39_1887: # %ehcleanup140.i1836 - mv s5, s7 ld a0, 1928(sp) addi a1, sp, 1944 - beq a0, a1, .LBB39_1889 -.LBB39_1888: # %if.then.i.i348.i1841 - call _ZdlPv@plt -.LBB39_1889: # %ehcleanup143.i1820 + bne a0, a1, .LBB39_1891 +# %bb.1888: # %ehcleanup143.i1820 ld a0, 1960(sp) addi a1, sp, 1976 bne a0, a1, .LBB39_1892 -# %bb.1890: # %ehcleanup146.i1804 +.LBB39_1889: # %ehcleanup146.i1804 addi a0, sp, 1976 ld a0, 16(a0) addi a1, sp, 2008 bne a0, a1, .LBB39_1893 -.LBB39_1891: # %ehcleanup149.i1788 +.LBB39_1890: # %ehcleanup149.i1788 addi a0, sp, 1976 ld a0, 48(a0) addi a1, sp, 2040 bne a0, a1, .LBB39_1894 j .LBB39_1895 +.LBB39_1891: # %if.then.i.i348.i1841 + call _ZdlPv@plt + ld a0, 1960(sp) + addi a1, sp, 1976 + beq a0, a1, .LBB39_1889 .LBB39_1892: # %if.then.i.i354.i1825 call _ZdlPv@plt addi a0, sp, 1976 ld a0, 16(a0) addi a1, sp, 2008 - beq a0, a1, .LBB39_1891 + beq a0, a1, .LBB39_1890 .LBB39_1893: # %if.then.i.i360.i1809 call _ZdlPv@plt addi a0, sp, 1976 @@ -32483,7 +32479,7 @@ addi s0, sp, 112 xor a0, s0, s5 seqz a0, a0 - or a0, s10, a0 + or a0, s1, a0 beqz a0, .LBB39_1898 j .LBB39_2186 .LBB39_1898: # %arraydestroy.body156.i1773 @@ -32496,7 +32492,7 @@ .LBB39_1899: # %lpad65.i1912 .Ltmp2613: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 ld a0, 1768(sp) addi a1, sp, 1784 bne a0, a1, .LBB39_1878 @@ -32504,12 +32500,12 @@ .LBB39_1900: # %lpad63.i1908 .Ltmp2610: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 j .LBB39_1879 .LBB39_1901: # %lpad58.i1896 .Ltmp2607: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 ld a0, 1800(sp) addi a1, sp, 1816 bne a0, a1, .LBB39_1880 @@ -32517,12 +32513,12 @@ .LBB39_1902: # %lpad56.i1892 .Ltmp2604: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 j .LBB39_1881 .LBB39_1903: # %lpad51.i1880 .Ltmp2601: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 ld a0, 1832(sp) addi a1, sp, 1848 bne a0, a1, .LBB39_1882 @@ -32530,7 +32526,7 @@ .LBB39_1904: # %lpad44.i1867 .Ltmp2598: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 ld a0, 1864(sp) addi a1, sp, 1880 bne a0, a1, .LBB39_1884 @@ -32538,12 +32534,13 @@ .LBB39_1905: # %lpad42.i1863 .Ltmp2595: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 j .LBB39_1885 .LBB39_1906: # %lpad37.i1851 .Ltmp2592: + mv s5, s0 sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 ld a0, 1896(sp) addi a1, sp, 1912 bne a0, a1, .LBB39_1886 @@ -32551,54 +32548,58 @@ .LBB39_1907: # %lpad35.i1847 .Ltmp2589: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 + mv s5, s0 j .LBB39_1887 .LBB39_1908: # %lpad30.i1835 .Ltmp2586: mv s5, s0 sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 - ld a0, 1928(sp) - addi a1, sp, 1944 - bne a0, a1, .LBB39_1888 - j .LBB39_1889 + li s1, 0 + j .LBB39_1887 .LBB39_1909: # %lpad28.i1831 .Ltmp2583: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 mv s5, s0 - j .LBB39_1889 + ld a0, 1960(sp) + addi a1, sp, 1976 + beq a0, a1, .LBB39_1889 + j .LBB39_1892 .LBB39_1910: # %lpad23.i1819 .Ltmp2580: - mv s5, s0 + mv s5, s7 sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 - j .LBB39_1889 + li s1, 0 + ld a0, 1960(sp) + addi a1, sp, 1976 + beq a0, a1, .LBB39_1889 + j .LBB39_1892 .LBB39_1911: # %lpad21.i1815 .Ltmp2577: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 - mv s5, s0 + li s1, 0 + mv s5, s7 addi a0, sp, 1976 ld a0, 16(a0) addi a1, sp, 2008 - beq a0, a1, .LBB39_1891 + beq a0, a1, .LBB39_1890 j .LBB39_1893 .LBB39_1912: # %lpad16.i1803 .Ltmp2574: - mv s5, s1 + mv s5, s2 sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 addi a0, sp, 1976 ld a0, 16(a0) addi a1, sp, 2008 - beq a0, a1, .LBB39_1891 + beq a0, a1, .LBB39_1890 j .LBB39_1893 .LBB39_1913: # %lpad14.i1799 .Ltmp2571: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 - mv s5, s1 + li s1, 0 + mv s5, s2 addi a0, sp, 1976 ld a0, 48(a0) addi a1, sp, 2040 @@ -32607,7 +32608,7 @@ .LBB39_1914: # %lpad9.i1787 .Ltmp2568: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 addi a0, sp, 1976 ld a0, 48(a0) addi a1, sp, 2040 @@ -32620,7 +32621,7 @@ .Ltmp2562: .LBB39_1917: # %ehcleanup152.i1764 sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 j .LBB39_1895 .LBB39_1918: # %lpad5.i1687 .Ltmp2559: @@ -32667,7 +32668,7 @@ call _ZN8TestCaseD2Ev mv a0, s11 call _ZN8TestCaseD2Ev - mv a0, s1 + mv a0, s10 call _ZN8TestCaseD2Ev mv a0, s2 call _ZN8TestCaseD2Ev @@ -32681,11 +32682,11 @@ call _ZN8TestCaseD2Ev mv a0, s8 call _ZN8TestCaseD2Ev - mv a0, s7 + addi a0, sp, 552 call _ZN8TestCaseD2Ev addi a0, sp, 464 call _ZN8TestCaseD2Ev - addi a0, sp, 376 + mv a0, s7 call _ZN8TestCaseD2Ev addi a0, sp, 288 call _ZN8TestCaseD2Ev @@ -32693,12 +32694,12 @@ call _ZN8TestCaseD2Ev addi a0, sp, 112 call _ZN8TestCaseD2Ev - li s10, 1 + li s1, 1 j .LBB39_1928 .LBB39_1927: # %lpad100.i1439 .Ltmp2532: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 .LBB39_1928: # %ehcleanup.i1440 ld a0, 1608(sp) addi a1, sp, 1624 @@ -32711,7 +32712,7 @@ .LBB39_1931: # %lpad93.i1426 .Ltmp2529: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 .LBB39_1932: # %ehcleanup113.i1427 ld a0, 1640(sp) addi a1, sp, 1656 @@ -32719,12 +32720,12 @@ # %bb.1933: # %if.then.i.i294.i1432 call _ZdlPv@plt .LBB39_1934: # %ehcleanup116.i1414 - mv s1, s11 + mv s10, s11 j .LBB39_1936 .LBB39_1935: # %lpad86.i1413 .Ltmp2526: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 .LBB39_1936: # %ehcleanup116.i1414 ld a0, 1672(sp) addi a1, sp, 1688 @@ -32732,12 +32733,12 @@ # %bb.1937: # %if.then.i.i300.i1419 call _ZdlPv@plt .LBB39_1938: # %ehcleanup119.i1401 - mv s2, s1 + mv s2, s10 j .LBB39_1940 .LBB39_1939: # %lpad79.i1400 .Ltmp2523: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 .LBB39_1940: # %ehcleanup119.i1401 ld a0, 1704(sp) addi a1, sp, 1720 @@ -32748,7 +32749,7 @@ .LBB39_1942: # %lpad77.i1396 .Ltmp2520: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 .LBB39_1943: # %ehcleanup122.i1385 mv s0, s2 ld a0, 1736(sp) @@ -32760,7 +32761,7 @@ .LBB39_1945: # %lpad72.i1384 .Ltmp2517: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 ld a0, 1736(sp) addi a1, sp, 1752 bne a0, a1, .LBB39_1944 @@ -32768,7 +32769,7 @@ .LBB39_1946: # %lpad70.i1380 .Ltmp2514: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 .LBB39_1947: # %ehcleanup125.i1369 mv s3, s0 ld a0, 1768(sp) @@ -32798,40 +32799,42 @@ .LBB39_1954: # %if.then.i.i336.i1329 call _ZdlPv@plt .LBB39_1955: # %ehcleanup137.i1308 - mv s7, s8 + mv s5, s8 ld a0, 1896(sp) addi a1, sp, 1912 beq a0, a1, .LBB39_1957 .LBB39_1956: # %if.then.i.i342.i1313 call _ZdlPv@plt .LBB39_1957: # %ehcleanup140.i1292 - mv s5, s7 ld a0, 1928(sp) addi a1, sp, 1944 - beq a0, a1, .LBB39_1959 -.LBB39_1958: # %if.then.i.i348.i1297 - call _ZdlPv@plt -.LBB39_1959: # %ehcleanup143.i1276 + bne a0, a1, .LBB39_1961 +# %bb.1958: # %ehcleanup143.i1276 ld a0, 1960(sp) addi a1, sp, 1976 bne a0, a1, .LBB39_1962 -# %bb.1960: # %ehcleanup146.i1260 +.LBB39_1959: # %ehcleanup146.i1260 addi a0, sp, 1976 ld a0, 16(a0) addi a1, sp, 2008 bne a0, a1, .LBB39_1963 -.LBB39_1961: # %ehcleanup149.i1244 +.LBB39_1960: # %ehcleanup149.i1244 addi a0, sp, 1976 ld a0, 48(a0) addi a1, sp, 2040 bne a0, a1, .LBB39_1964 j .LBB39_1965 +.LBB39_1961: # %if.then.i.i348.i1297 + call _ZdlPv@plt + ld a0, 1960(sp) + addi a1, sp, 1976 + beq a0, a1, .LBB39_1959 .LBB39_1962: # %if.then.i.i354.i1281 call _ZdlPv@plt addi a0, sp, 1976 ld a0, 16(a0) addi a1, sp, 2008 - beq a0, a1, .LBB39_1961 + beq a0, a1, .LBB39_1960 .LBB39_1963: # %if.then.i.i360.i1265 call _ZdlPv@plt addi a0, sp, 1976 @@ -32852,7 +32855,7 @@ addi s0, sp, 112 xor a0, s0, s5 seqz a0, a0 - or a0, s10, a0 + or a0, s1, a0 bnez a0, .LBB39_2186 .LBB39_1968: # %arraydestroy.body156.i1229 # =>This Inner Loop Header: Depth=1 @@ -32864,7 +32867,7 @@ .LBB39_1969: # %lpad65.i1368 .Ltmp2511: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 ld a0, 1768(sp) addi a1, sp, 1784 bne a0, a1, .LBB39_1948 @@ -32872,12 +32875,12 @@ .LBB39_1970: # %lpad63.i1364 .Ltmp2508: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 j .LBB39_1949 .LBB39_1971: # %lpad58.i1352 .Ltmp2505: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 ld a0, 1800(sp) addi a1, sp, 1816 bne a0, a1, .LBB39_1950 @@ -32885,12 +32888,12 @@ .LBB39_1972: # %lpad56.i1348 .Ltmp2502: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 j .LBB39_1951 .LBB39_1973: # %lpad51.i1336 .Ltmp2499: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 ld a0, 1832(sp) addi a1, sp, 1848 bne a0, a1, .LBB39_1952 @@ -32898,7 +32901,7 @@ .LBB39_1974: # %lpad44.i1323 .Ltmp2496: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 ld a0, 1864(sp) addi a1, sp, 1880 bne a0, a1, .LBB39_1954 @@ -32906,12 +32909,13 @@ .LBB39_1975: # %lpad42.i1319 .Ltmp2493: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 j .LBB39_1955 .LBB39_1976: # %lpad37.i1307 .Ltmp2490: + mv s5, s0 sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 ld a0, 1896(sp) addi a1, sp, 1912 bne a0, a1, .LBB39_1956 @@ -32919,54 +32923,58 @@ .LBB39_1977: # %lpad35.i1303 .Ltmp2487: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 + mv s5, s0 j .LBB39_1957 .LBB39_1978: # %lpad30.i1291 .Ltmp2484: mv s5, s0 sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 - ld a0, 1928(sp) - addi a1, sp, 1944 - bne a0, a1, .LBB39_1958 - j .LBB39_1959 + li s1, 0 + j .LBB39_1957 .LBB39_1979: # %lpad28.i1287 .Ltmp2481: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 mv s5, s0 - j .LBB39_1959 + ld a0, 1960(sp) + addi a1, sp, 1976 + beq a0, a1, .LBB39_1959 + j .LBB39_1962 .LBB39_1980: # %lpad23.i1275 .Ltmp2478: - mv s5, s0 + mv s5, s7 sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 - j .LBB39_1959 + li s1, 0 + ld a0, 1960(sp) + addi a1, sp, 1976 + beq a0, a1, .LBB39_1959 + j .LBB39_1962 .LBB39_1981: # %lpad21.i1271 .Ltmp2475: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 - mv s5, s0 + li s1, 0 + mv s5, s7 addi a0, sp, 1976 ld a0, 16(a0) addi a1, sp, 2008 - beq a0, a1, .LBB39_1961 + beq a0, a1, .LBB39_1960 j .LBB39_1963 .LBB39_1982: # %lpad16.i1259 .Ltmp2472: - mv s5, s1 + mv s5, s2 sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 addi a0, sp, 1976 ld a0, 16(a0) addi a1, sp, 2008 - beq a0, a1, .LBB39_1961 + beq a0, a1, .LBB39_1960 j .LBB39_1963 .LBB39_1983: # %lpad14.i1255 .Ltmp2469: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 - mv s5, s1 + li s1, 0 + mv s5, s2 addi a0, sp, 1976 ld a0, 48(a0) addi a1, sp, 2040 @@ -32975,7 +32983,7 @@ .LBB39_1984: # %lpad9.i1243 .Ltmp2466: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 addi a0, sp, 1976 ld a0, 48(a0) addi a1, sp, 2040 @@ -32988,7 +32996,7 @@ .Ltmp2460: .LBB39_1987: # %ehcleanup152.i1220 sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 j .LBB39_1965 .LBB39_1988: # %lpad5.i1143 .Ltmp2457: @@ -33034,7 +33042,7 @@ call _ZN8TestCaseD2Ev mv a0, s11 call _ZN8TestCaseD2Ev - mv a0, s1 + mv a0, s10 call _ZN8TestCaseD2Ev mv a0, s2 call _ZN8TestCaseD2Ev @@ -33048,11 +33056,11 @@ call _ZN8TestCaseD2Ev mv a0, s8 call _ZN8TestCaseD2Ev - mv a0, s7 + addi a0, sp, 552 call _ZN8TestCaseD2Ev addi a0, sp, 464 call _ZN8TestCaseD2Ev - addi a0, sp, 376 + mv a0, s7 call _ZN8TestCaseD2Ev addi a0, sp, 288 call _ZN8TestCaseD2Ev @@ -33060,12 +33068,12 @@ call _ZN8TestCaseD2Ev addi a0, sp, 112 call _ZN8TestCaseD2Ev - li s10, 1 + li s1, 1 j .LBB39_1998 .LBB39_1997: # %lpad100.i895 .Ltmp2430: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 .LBB39_1998: # %ehcleanup.i896 ld a0, 1608(sp) addi a1, sp, 1624 @@ -33078,7 +33086,7 @@ .LBB39_2001: # %lpad93.i882 .Ltmp2427: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 .LBB39_2002: # %ehcleanup113.i883 ld a0, 1640(sp) addi a1, sp, 1656 @@ -33086,12 +33094,12 @@ # %bb.2003: # %if.then.i.i294.i888 call _ZdlPv@plt .LBB39_2004: # %ehcleanup116.i870 - mv s1, s11 + mv s10, s11 j .LBB39_2006 .LBB39_2005: # %lpad86.i869 .Ltmp2424: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 .LBB39_2006: # %ehcleanup116.i870 ld a0, 1672(sp) addi a1, sp, 1688 @@ -33099,12 +33107,12 @@ # %bb.2007: # %if.then.i.i300.i875 call _ZdlPv@plt .LBB39_2008: # %ehcleanup119.i857 - mv s2, s1 + mv s2, s10 j .LBB39_2010 .LBB39_2009: # %lpad79.i856 .Ltmp2421: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 .LBB39_2010: # %ehcleanup119.i857 ld a0, 1704(sp) addi a1, sp, 1720 @@ -33115,7 +33123,7 @@ .LBB39_2012: # %lpad77.i852 .Ltmp2418: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 .LBB39_2013: # %ehcleanup122.i841 mv s0, s2 ld a0, 1736(sp) @@ -33127,7 +33135,7 @@ .LBB39_2015: # %lpad72.i840 .Ltmp2415: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 ld a0, 1736(sp) addi a1, sp, 1752 bne a0, a1, .LBB39_2014 @@ -33135,7 +33143,7 @@ .LBB39_2016: # %lpad70.i836 .Ltmp2412: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 .LBB39_2017: # %ehcleanup125.i825 mv s3, s0 ld a0, 1768(sp) @@ -33165,40 +33173,42 @@ .LBB39_2024: # %if.then.i.i336.i785 call _ZdlPv@plt .LBB39_2025: # %ehcleanup137.i764 - mv s7, s8 + mv s5, s8 ld a0, 1896(sp) addi a1, sp, 1912 beq a0, a1, .LBB39_2027 .LBB39_2026: # %if.then.i.i342.i769 call _ZdlPv@plt .LBB39_2027: # %ehcleanup140.i748 - mv s5, s7 ld a0, 1928(sp) addi a1, sp, 1944 - beq a0, a1, .LBB39_2029 -.LBB39_2028: # %if.then.i.i348.i753 - call _ZdlPv@plt -.LBB39_2029: # %ehcleanup143.i732 + bne a0, a1, .LBB39_2031 +# %bb.2028: # %ehcleanup143.i732 ld a0, 1960(sp) addi a1, sp, 1976 bne a0, a1, .LBB39_2032 -# %bb.2030: # %ehcleanup146.i716 +.LBB39_2029: # %ehcleanup146.i716 addi a0, sp, 1976 ld a0, 16(a0) addi a1, sp, 2008 bne a0, a1, .LBB39_2033 -.LBB39_2031: # %ehcleanup149.i700 +.LBB39_2030: # %ehcleanup149.i700 addi a0, sp, 1976 ld a0, 48(a0) addi a1, sp, 2040 bne a0, a1, .LBB39_2034 j .LBB39_2035 +.LBB39_2031: # %if.then.i.i348.i753 + call _ZdlPv@plt + ld a0, 1960(sp) + addi a1, sp, 1976 + beq a0, a1, .LBB39_2029 .LBB39_2032: # %if.then.i.i354.i737 call _ZdlPv@plt addi a0, sp, 1976 ld a0, 16(a0) addi a1, sp, 2008 - beq a0, a1, .LBB39_2031 + beq a0, a1, .LBB39_2030 .LBB39_2033: # %if.then.i.i360.i721 call _ZdlPv@plt addi a0, sp, 1976 @@ -33219,7 +33229,7 @@ addi s0, sp, 112 xor a0, s0, s5 seqz a0, a0 - or a0, s10, a0 + or a0, s1, a0 bnez a0, .LBB39_2186 .LBB39_2038: # %arraydestroy.body156.i685 # =>This Inner Loop Header: Depth=1 @@ -33231,7 +33241,7 @@ .LBB39_2039: # %lpad65.i824 .Ltmp2409: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 ld a0, 1768(sp) addi a1, sp, 1784 bne a0, a1, .LBB39_2018 @@ -33239,12 +33249,12 @@ .LBB39_2040: # %lpad63.i820 .Ltmp2406: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 j .LBB39_2019 .LBB39_2041: # %lpad58.i808 .Ltmp2403: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 ld a0, 1800(sp) addi a1, sp, 1816 bne a0, a1, .LBB39_2020 @@ -33252,12 +33262,12 @@ .LBB39_2042: # %lpad56.i804 .Ltmp2400: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 j .LBB39_2021 .LBB39_2043: # %lpad51.i792 .Ltmp2397: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 ld a0, 1832(sp) addi a1, sp, 1848 bne a0, a1, .LBB39_2022 @@ -33265,7 +33275,7 @@ .LBB39_2044: # %lpad44.i779 .Ltmp2394: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 ld a0, 1864(sp) addi a1, sp, 1880 bne a0, a1, .LBB39_2024 @@ -33273,12 +33283,13 @@ .LBB39_2045: # %lpad42.i775 .Ltmp2391: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 j .LBB39_2025 .LBB39_2046: # %lpad37.i763 .Ltmp2388: + mv s5, s0 sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 ld a0, 1896(sp) addi a1, sp, 1912 bne a0, a1, .LBB39_2026 @@ -33286,54 +33297,58 @@ .LBB39_2047: # %lpad35.i759 .Ltmp2385: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 + mv s5, s0 j .LBB39_2027 .LBB39_2048: # %lpad30.i747 .Ltmp2382: mv s5, s0 sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 - ld a0, 1928(sp) - addi a1, sp, 1944 - bne a0, a1, .LBB39_2028 - j .LBB39_2029 + li s1, 0 + j .LBB39_2027 .LBB39_2049: # %lpad28.i743 .Ltmp2379: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 mv s5, s0 - j .LBB39_2029 + ld a0, 1960(sp) + addi a1, sp, 1976 + beq a0, a1, .LBB39_2029 + j .LBB39_2032 .LBB39_2050: # %lpad23.i731 .Ltmp2376: - mv s5, s1 + mv s5, s7 sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 - j .LBB39_2029 + li s1, 0 + ld a0, 1960(sp) + addi a1, sp, 1976 + beq a0, a1, .LBB39_2029 + j .LBB39_2032 .LBB39_2051: # %lpad21.i727 .Ltmp2373: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 - mv s5, s1 + li s1, 0 + mv s5, s7 addi a0, sp, 1976 ld a0, 16(a0) addi a1, sp, 2008 - beq a0, a1, .LBB39_2031 + beq a0, a1, .LBB39_2030 j .LBB39_2033 .LBB39_2052: # %lpad16.i715 .Ltmp2370: - mv s5, s1 + mv s5, s2 sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 addi a0, sp, 1976 ld a0, 16(a0) addi a1, sp, 2008 - beq a0, a1, .LBB39_2031 + beq a0, a1, .LBB39_2030 j .LBB39_2033 .LBB39_2053: # %lpad14.i711 .Ltmp2367: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 - mv s5, s1 + li s1, 0 + mv s5, s2 addi a0, sp, 1976 ld a0, 48(a0) addi a1, sp, 2040 @@ -33342,7 +33357,7 @@ .LBB39_2054: # %lpad9.i699 .Ltmp2364: sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 addi a0, sp, 1976 ld a0, 48(a0) addi a1, sp, 2040 @@ -33355,7 +33370,7 @@ .Ltmp2358: .LBB39_2057: # %ehcleanup152.i676 sd a0, 40(sp) # 8-byte Folded Spill - li s10, 0 + li s1, 0 j .LBB39_2035 .LBB39_2058: # %lpad5.i599 .Ltmp2355: --- build.head//MultiSource/Benchmarks/ASCI_Purple/SMG2000/CMakeFiles/smg2000.dir/smg3_setup_rap.s 2023-11-13 08:03:22.415557013 +0000 +++ build//MultiSource/Benchmarks/ASCI_Purple/SMG2000/CMakeFiles/smg2000.dir/smg3_setup_rap.s 2023-11-13 08:03:17.455700385 +0000 @@ -6123,10 +6123,10 @@ # kill: killed $x10 # implicit-def: $x10 # kill: killed $x10 - sd s2, 16(sp) # 8-byte Folded Spill - sd s5, 64(sp) # 8-byte Folded Spill addi a0, sp, 272 vs2r.v v14, (a0) # Unknown-size Folded Spill + sd s2, 16(sp) # 8-byte Folded Spill + sd s5, 64(sp) # 8-byte Folded Spill j .LBB3_4 .LBB3_3: # %for.inc1094 # in Loop: Header=BB3_4 Depth=1 @@ -7355,11 +7355,11 @@ # kill: killed $x10 # implicit-def: $x10 # kill: killed $x10 + addi a0, sp, 480 + vs2r.v v14, (a0) # Unknown-size Folded Spill sd a1, 80(sp) # 8-byte Folded Spill sd ra, 336(sp) # 8-byte Folded Spill sd s2, 312(sp) # 8-byte Folded Spill - addi a0, sp, 480 - vs2r.v v14, (a0) # Unknown-size Folded Spill j .LBB4_4 .LBB4_3: # %for.inc675 # in Loop: Header=BB4_4 Depth=1 @@ -7686,9 +7686,9 @@ bge a3, a2, .LBB4_30 .LBB4_15: # %if.then402 # in Loop: Header=BB4_4 Depth=1 - ld ra, 336(sp) # 8-byte Folded Reload addi a2, sp, 480 vl2r.v v14, (a2) # Unknown-size Folded Reload + ld ra, 336(sp) # 8-byte Folded Reload bgtz a4, .LBB4_31 j .LBB4_3 .LBB4_16: # %for.cond319.preheader.us.us.us.us.us.preheader @@ -8551,9 +8551,9 @@ .LBB4_30: # %if.then402 # in Loop: Header=BB4_4 Depth=1 mv a4, a3 - ld ra, 336(sp) # 8-byte Folded Reload addi a2, sp, 480 vl2r.v v14, (a2) # Unknown-size Folded Reload + ld ra, 336(sp) # 8-byte Folded Reload bgtz a3, .LBB4_31 j .LBB4_3 .LBB4_31: # %for.cond598.preheader.lr.ph --- build.head//MultiSource/Benchmarks/DOE-ProxyApps-C/CoMD/CMakeFiles/CoMD.dir/eam.s 2023-11-13 08:03:22.527553776 +0000 +++ build//MultiSource/Benchmarks/DOE-ProxyApps-C/CoMD/CMakeFiles/CoMD.dir/eam.s 2023-11-13 08:03:17.559697379 +0000 @@ -1294,17 +1294,15 @@ .LBB1_38: # %call.sqrt # in Loop: Header=BB1_17 Depth=4 fmv.d fa0, fa5 + addi a1, sp, 224 + vs1r.v v9, (a1) # Unknown-size Folded Spill sd a0, 64(sp) # 8-byte Folded Spill sd t1, 56(sp) # 8-byte Folded Spill sd t2, 48(sp) # 8-byte Folded Spill sd t3, 40(sp) # 8-byte Folded Spill sd t4, 32(sp) # 8-byte Folded Spill sd t5, 24(sp) # 8-byte Folded Spill - addi a0, sp, 224 - vs1r.v v9, (a0) # Unknown-size Folded Spill call sqrt@plt - addi a0, sp, 224 - vl1r.v v9, (a0) # Unknown-size Folded Reload ld t5, 24(sp) # 8-byte Folded Reload ld t4, 32(sp) # 8-byte Folded Reload ld t3, 40(sp) # 8-byte Folded Reload @@ -1316,6 +1314,8 @@ ld a5, 88(sp) # 8-byte Folded Reload ld a4, 96(sp) # 8-byte Folded Reload ld a0, 64(sp) # 8-byte Folded Reload + addi a1, sp, 224 + vl1r.v v9, (a1) # Unknown-size Folded Reload j .LBB1_20 .LBB1_39: # %for.cond189.preheader blez a1, .LBB1_54 --- build.head//MultiSource/Benchmarks/ASCI_Purple/SMG2000/CMakeFiles/smg2000.dir/struct_matvec.s 2023-11-13 08:03:22.419556898 +0000 +++ build//MultiSource/Benchmarks/ASCI_Purple/SMG2000/CMakeFiles/smg2000.dir/struct_matvec.s 2023-11-13 08:03:17.459700269 +0000 @@ -363,13 +363,13 @@ sd a3, 16(sp) # 8-byte Folded Spill vsetvli a3, zero, e64, m2, ta, ma vmv.v.i v10, 0 + addi a3, sp, 688 + vs2r.v v10, (a3) # Unknown-size Folded Spill sd a2, 48(sp) # 8-byte Folded Spill sd s9, 616(sp) # 8-byte Folded Spill sd s11, 600(sp) # 8-byte Folded Spill sd a1, 176(sp) # 8-byte Folded Spill sd s7, 272(sp) # 8-byte Folded Spill - addi a1, sp, 688 - vs2r.v v10, (a1) # Unknown-size Folded Spill j .LBB2_25 .LBB2_24: # %for.inc6112 # in Loop: Header=BB2_25 Depth=1 --- build.head//MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/rdopt.s 2023-11-13 08:03:22.267561292 +0000 +++ build//MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/rdopt.s 2023-11-13 08:03:17.319704316 +0000 @@ -9793,7 +9793,7 @@ lw s6, 12(a1) mv s7, a0 li a0, 2 - seqz s2, s8 + seqz s0, s8 sd a2, 40(sp) # 8-byte Folded Spill bne a2, a0, .LBB16_2 # %bb.1: # %land.end.thread @@ -9809,14 +9809,14 @@ ld a0, 0(a0) addi a0, a0, 2047 lw a0, 1961(a0) - xori s0, a2, 1 + xori s1, a2, 1 addi a0, a0, -1 snez a0, a0 sd a0, 80(sp) # 8-byte Folded Spill mv a0, s8 call SetModesAndRefframeForBlocks ld a0, 0(s9) - or a1, s8, s0 + or a1, s8, s1 bnez a1, .LBB16_19 # %bb.3: # %if.then lw a1, 180(a0) @@ -9897,7 +9897,7 @@ # %bb.18: # %for.cond16.2.3 add a1, a1, a5 lb a1, 0(a1) - li s2, 1 + li s0, 1 bltz a1, .LBB16_124 .LBB16_19: # %if.end33 lui a1, 3 @@ -9918,7 +9918,7 @@ .LBB16_22: # %if.end95 lw a0, 1084(a1) li a2, 536 - mul s0, s6, a2 + mul s1, s6, a2 beqz a0, .LBB16_24 # %bb.23: # %if.then97 ld a0, 0(a1) @@ -9928,8 +9928,8 @@ li a1, 0 call memset@plt ld a0, 0(s9) - lui s1, 3 - add a0, a0, s1 + lui s2, 3 + add a0, a0, s2 ld a0, 1896(a0) ld a0, 0(a0) ld a0, 0(a0) @@ -9937,8 +9937,8 @@ li a1, 0 call memset@plt ld a0, 0(s9) - addiw s1, s1, 1904 - add a0, a0, s1 + addiw s2, s2, 1904 + add a0, a0, s2 ld a1, 0(a0) ld a1, 0(a1) ld a1, 0(a1) @@ -9950,7 +9950,7 @@ li a1, 0 call memset@plt ld a0, 0(s9) - add a0, a0, s1 + add a0, a0, s2 ld a1, 0(a0) ld a1, 0(a1) ld a1, 8(a1) @@ -9963,8 +9963,8 @@ call memset@plt .LBB16_24: # %if.end120 li a0, 7 - add s0, s5, s0 - sd s0, 88(sp) # 8-byte Folded Spill + add s1, s5, s1 + sd s1, 88(sp) # 8-byte Folded Spill sd s9, 104(sp) # 8-byte Folded Spill sd s3, 32(sp) # 8-byte Folded Spill sd s4, 48(sp) # 8-byte Folded Spill @@ -9975,7 +9975,7 @@ blt a0, s8, .LBB16_29 # %bb.25: # %if.then123 call LumaResidualCoding@plt - beqz s2, .LBB16_40 + beqz s0, .LBB16_40 # %bb.26: # %land.lhs.true126 li a0, 536 mul a0, s6, a0 @@ -16154,9 +16154,9 @@ slli a2, a2, 1 li a1, 0 call memset@plt + mv t3, s8 addi a0, sp, 64 vl2r.v v8, (a0) # Unknown-size Folded Reload - mv t3, s8 ld a3, 0(s1) lw a0, 172(a3) addi s5, s5, 1 @@ -20590,13 +20590,13 @@ ld t5, 0(t5) ld t5, 0(t5) ld t5, 8(t5) - addi s4, s4, 24 + addi s1, s1, 24 lh t6, 0(t5) - add s6, s6, s4 + add s6, s6, s1 ld s6, 0(s6) sh t6, 0(s6) lh t5, 2(t5) - add s1, s1, s4 + add s1, s4, s1 sd s5, 0(s1) sh t5, 2(s6) addi a5, a5, 8 @@ -20608,17 +20608,17 @@ ld t4, -1704(t4) lw t5, 172(a0) ld t4, 0(t4) - addw s1, a1, t5 - lw a0, 168(a0) - slli s1, s1, 3 - add t4, t4, s1 - ld t4, 0(t4) - addw s4, a0, a2 + addw s4, a1, t5 + lw s1, 168(a0) + slli s4, s4, 3 add t4, t4, s4 - sb zero, 3(t4) - sb zero, 2(t4) - sb zero, 1(t4) - sb zero, 0(t4) + ld a0, 0(t4) + addw s1, s1, a2 + add a0, a0, s1 + sb zero, 3(a0) + sb zero, 2(a0) + sb zero, 1(a0) + sb zero, 0(a0) ld a0, 0(ra) add t5, a0, a7 lhu s5, 18(t5) @@ -20640,24 +20640,24 @@ ld s5, 0(s5) ld s6, 0(s6) ld s5, 0(s5) - add s6, s6, s1 + add s6, s6, s4 ld s8, 8(s5) ld s6, 0(s6) ld s5, 0(s7) - slli s4, s4, 3 + slli s1, s1, 3 lh s7, 0(s8) - add s9, s6, s4 + add s9, s6, s1 ld s9, 0(s9) ld s10, 0(s5) add s5, t4, t1 sh s7, 0(s9) lh s8, 2(s8) - add s1, s10, s1 - ld s1, 0(s1) + add s4, s10, s4 + ld s4, 0(s4) ld s7, 24(s5) sh s8, 2(s9) lhu s9, 18(t5) - add s8, s1, s4 + add s8, s4, s1 sd s7, 0(s8) mv s8, t5 beq s9, t2, .LBB30_54 @@ -20673,7 +20673,7 @@ ld s8, 0(s8) ld s8, 0(s8) ld s8, 8(s8) - addi s9, s4, 8 + addi s9, s1, 8 lh s10, 0(s8) add s11, s6, s9 ld s11, 0(s11) @@ -20681,7 +20681,7 @@ lh s8, 2(s8) sh s8, 2(s11) lhu s8, 18(t5) - add s9, s1, s9 + add s9, s4, s9 sd s7, 0(s9) mv s7, t5 beq s8, t2, .LBB30_56 @@ -20697,7 +20697,7 @@ ld s7, 0(s7) ld s7, 0(s7) ld s7, 8(s7) - addi s8, s4, 16 + addi s8, s1, 16 lh s9, 0(s7) add s10, s6, s8 ld s10, 0(s10) @@ -20706,7 +20706,7 @@ ld s5, 24(s5) sh s7, 2(s10) lhu s7, 18(t5) - add s8, s1, s8 + add s8, s4, s8 sd s5, 0(s8) beq s7, t2, .LBB30_49 # %bb.57: # %for.body41 --- build.head//MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/macroblock.s 2023-11-13 08:03:22.251561754 +0000 +++ build//MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/macroblock.s 2023-11-13 08:03:17.307704662 +0000 @@ -9645,8 +9645,6 @@ sd a0, 296(sp) # 8-byte Folded Spill li s9, 24 li a1, 1 - sd s5, 352(sp) # 8-byte Folded Spill - sd ra, 264(sp) # 8-byte Folded Spill csrr a0, vlenb slli a2, a0, 3 sub a0, a2, a0 @@ -9659,6 +9657,8 @@ add a0, sp, a0 addi a0, a0, 880 vs1r.v v25, (a0) # Unknown-size Folded Spill + sd s5, 352(sp) # 8-byte Folded Spill + sd ra, 264(sp) # 8-byte Folded Spill j .LBB17_45 .LBB17_44: # %for.inc632 # in Loop: Header=BB17_45 Depth=1 @@ -10626,6 +10626,18 @@ bnez s5, .LBB17_146 .LBB17_147: # %if.end423 # in Loop: Header=BB17_45 Depth=1 + csrr a0, vlenb + slli a1, a0, 3 + sub a0, a1, a0 + add a0, sp, a0 + addi a0, a0, 880 + vl1r.v v24, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 6 + mul a0, a0, a1 + add a0, sp, a0 + addi a0, a0, 880 + vl1r.v v25, (a0) # Unknown-size Folded Reload ld a0, 256(sp) # 8-byte Folded Reload ld t5, 312(sp) # 8-byte Folded Reload ld t6, 320(sp) # 8-byte Folded Reload @@ -10633,18 +10645,6 @@ mv s1, s0 mv s0, s10 mv s10, s9 - csrr a1, vlenb - slli a2, a1, 3 - sub a1, a2, a1 - add a1, sp, a1 - addi a1, a1, 880 - vl1r.v v24, (a1) # Unknown-size Folded Reload - csrr a1, vlenb - li a2, 6 - mul a1, a1, a2 - add a1, sp, a1 - addi a1, a1, 880 - vl1r.v v25, (a1) # Unknown-size Folded Reload mv s6, s7 li s7, 1 li s9, 24 @@ -10701,6 +10701,18 @@ j .LBB17_156 .LBB17_154: # %if.end423.thread # in Loop: Header=BB17_45 Depth=1 + csrr a0, vlenb + slli a1, a0, 3 + sub a0, a1, a0 + add a0, sp, a0 + addi a0, a0, 880 + vl1r.v v24, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 6 + mul a0, a0, a1 + add a0, sp, a0 + addi a0, a0, 880 + vl1r.v v25, (a0) # Unknown-size Folded Reload ld a0, 256(sp) # 8-byte Folded Reload ld t5, 312(sp) # 8-byte Folded Reload ld t6, 320(sp) # 8-byte Folded Reload @@ -10708,18 +10720,6 @@ mv s1, s0 mv s0, s10 mv s10, s9 - csrr a1, vlenb - slli a2, a1, 3 - sub a1, a2, a1 - add a1, sp, a1 - addi a1, a1, 880 - vl1r.v v24, (a1) # Unknown-size Folded Reload - csrr a1, vlenb - li a2, 6 - mul a1, a1, a2 - add a1, sp, a1 - addi a1, a1, 880 - vl1r.v v25, (a1) # Unknown-size Folded Reload mv s6, s7 li s7, 1 li s9, 24 @@ -18956,21 +18956,21 @@ find_sad_16x16: # @find_sad_16x16 .cfi_startproc # %bb.0: # %entry - addi sp, sp, -1648 - .cfi_def_cfa_offset 1648 - sd ra, 1640(sp) # 8-byte Folded Spill - sd s0, 1632(sp) # 8-byte Folded Spill - sd s1, 1624(sp) # 8-byte Folded Spill - sd s2, 1616(sp) # 8-byte Folded Spill - sd s3, 1608(sp) # 8-byte Folded Spill - sd s4, 1600(sp) # 8-byte Folded Spill - sd s5, 1592(sp) # 8-byte Folded Spill - sd s6, 1584(sp) # 8-byte Folded Spill - sd s7, 1576(sp) # 8-byte Folded Spill - sd s8, 1568(sp) # 8-byte Folded Spill - sd s9, 1560(sp) # 8-byte Folded Spill - sd s10, 1552(sp) # 8-byte Folded Spill - sd s11, 1544(sp) # 8-byte Folded Spill + addi sp, sp, -1632 + .cfi_def_cfa_offset 1632 + sd ra, 1624(sp) # 8-byte Folded Spill + sd s0, 1616(sp) # 8-byte Folded Spill + sd s1, 1608(sp) # 8-byte Folded Spill + sd s2, 1600(sp) # 8-byte Folded Spill + sd s3, 1592(sp) # 8-byte Folded Spill + sd s4, 1584(sp) # 8-byte Folded Spill + sd s5, 1576(sp) # 8-byte Folded Spill + sd s6, 1568(sp) # 8-byte Folded Spill + sd s7, 1560(sp) # 8-byte Folded Spill + sd s8, 1552(sp) # 8-byte Folded Spill + sd s9, 1544(sp) # 8-byte Folded Spill + sd s10, 1536(sp) # 8-byte Folded Spill + sd s11, 1528(sp) # 8-byte Folded Spill .cfi_offset ra, -8 .cfi_offset s0, -16 .cfi_offset s1, -24 @@ -18988,7 +18988,7 @@ li a2, 42 mul a1, a1, a2 sub sp, sp, a1 - .cfi_escape 0x0f, 0x0e, 0x72, 0x00, 0x11, 0xf0, 0x0c, 0x22, 0x11, 0x2a, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 1648 + 42 * vlenb + .cfi_escape 0x0f, 0x0e, 0x72, 0x00, 0x11, 0xe0, 0x0c, 0x22, 0x11, 0x2a, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 1632 + 42 * vlenb .Lpcrel_hi311: auipc a1, %got_pcrel_hi(img) ld s2, %pcrel_lo(.Lpcrel_hi311)(a1) @@ -18997,120 +18997,120 @@ .Lpcrel_hi312: auipc s3, %pcrel_hi(getNeighbour) ld a5, %pcrel_lo(.Lpcrel_hi312)(s3) - sd a0, 24(sp) # 8-byte Folded Spill + sd a0, 16(sp) # 8-byte Folded Spill li a1, -1 li a2, -1 - addi a4, sp, 72 + addi a4, sp, 56 mv a0, s1 li a3, 0 jalr a5 ld a5, %pcrel_lo(.Lpcrel_hi312)(s3) - addi a4, sp, 96 + addi a4, sp, 80 li a1, -1 mv a0, s1 li a2, 0 li a3, 0 jalr a5 ld a5, %pcrel_lo(.Lpcrel_hi312)(s3) - addi a4, sp, 120 + addi a4, sp, 104 li a1, -1 li a2, 1 mv a0, s1 li a3, 0 jalr a5 ld a5, %pcrel_lo(.Lpcrel_hi312)(s3) - addi a4, sp, 144 + addi a4, sp, 128 li a1, -1 li a2, 2 mv a0, s1 li a3, 0 jalr a5 ld a5, %pcrel_lo(.Lpcrel_hi312)(s3) - addi a4, sp, 168 + addi a4, sp, 152 li a1, -1 li a2, 3 mv a0, s1 li a3, 0 jalr a5 ld a5, %pcrel_lo(.Lpcrel_hi312)(s3) - addi a4, sp, 192 + addi a4, sp, 176 li a1, -1 li a2, 4 mv a0, s1 li a3, 0 jalr a5 ld a5, %pcrel_lo(.Lpcrel_hi312)(s3) - addi a4, sp, 216 + addi a4, sp, 200 li a1, -1 li a2, 5 mv a0, s1 li a3, 0 jalr a5 ld a5, %pcrel_lo(.Lpcrel_hi312)(s3) - addi a4, sp, 240 + addi a4, sp, 224 li a1, -1 li a2, 6 mv a0, s1 li a3, 0 jalr a5 ld a5, %pcrel_lo(.Lpcrel_hi312)(s3) - addi a4, sp, 264 + addi a4, sp, 248 li a1, -1 li a2, 7 mv a0, s1 li a3, 0 jalr a5 ld a5, %pcrel_lo(.Lpcrel_hi312)(s3) - addi a4, sp, 288 + addi a4, sp, 272 li a1, -1 li a2, 8 mv a0, s1 li a3, 0 jalr a5 ld a5, %pcrel_lo(.Lpcrel_hi312)(s3) - addi a4, sp, 312 + addi a4, sp, 296 li a1, -1 li a2, 9 mv a0, s1 li a3, 0 jalr a5 ld a5, %pcrel_lo(.Lpcrel_hi312)(s3) - addi a4, sp, 336 + addi a4, sp, 320 li a1, -1 li a2, 10 mv a0, s1 li a3, 0 jalr a5 ld a5, %pcrel_lo(.Lpcrel_hi312)(s3) - addi a4, sp, 360 + addi a4, sp, 344 li a1, -1 li a2, 11 mv a0, s1 li a3, 0 jalr a5 ld a5, %pcrel_lo(.Lpcrel_hi312)(s3) - addi a4, sp, 384 + addi a4, sp, 368 li a1, -1 li a2, 12 mv a0, s1 li a3, 0 jalr a5 ld a5, %pcrel_lo(.Lpcrel_hi312)(s3) - addi a4, sp, 408 + addi a4, sp, 392 li a1, -1 li a2, 13 mv a0, s1 li a3, 0 jalr a5 ld a5, %pcrel_lo(.Lpcrel_hi312)(s3) - addi a4, sp, 432 + addi a4, sp, 416 li a1, -1 li a2, 14 mv a0, s1 li a3, 0 jalr a5 ld a5, %pcrel_lo(.Lpcrel_hi312)(s3) - addi a4, sp, 456 + addi a4, sp, 440 li a1, -1 li a2, 15 mv a0, s1 @@ -19118,7 +19118,7 @@ jalr a5 ld a5, %pcrel_lo(.Lpcrel_hi312)(s3) li a2, -1 - addi a4, sp, 480 + addi a4, sp, 464 mv a0, s1 li a1, 0 li a3, 0 @@ -19128,280 +19128,280 @@ ld a0, %pcrel_lo(.Lpcrel_hi313)(a0) ld a1, 0(a0) lw a2, 272(a1) - lw t0, 480(sp) + lw a0, 464(sp) addi a3, a1, 2047 beqz a2, .LBB38_23 # %bb.1: # %if.else ld a2, 0(s2) - beqz t0, .LBB38_3 + beqz a0, .LBB38_3 # %bb.2: # %cond.true lui a0, 3 add a0, a2, a0 - lw a1, 484(sp) + lw a1, 468(sp) ld a0, 1952(a0) slli a1, a1, 2 add a0, a0, a1 - lw t0, 0(a0) + lw a0, 0(a0) .LBB38_3: # %cond.end - lw a1, 96(sp) + lw a1, 80(sp) lui a4, 3 addiw a4, a4, 1952 add a2, a2, a4 beqz a1, .LBB38_5 # %bb.4: # %cond.true16 - lw a1, 100(sp) + lw a1, 84(sp) ld a4, 0(a2) slli a1, a1, 2 add a1, a4, a1 lw a1, 0(a1) .LBB38_5: # %cond.end24 - lw a4, 120(sp) + lw a4, 104(sp) andi a1, a1, 1 beqz a4, .LBB38_7 # %bb.6: # %cond.true16.1 - lw a4, 124(sp) + lw a4, 108(sp) ld a5, 0(a2) slli a4, a4, 2 add a4, a5, a4 lw a4, 0(a4) .LBB38_7: # %cond.end24.1 - lw a5, 144(sp) + lw a5, 128(sp) and a1, a4, a1 beqz a5, .LBB38_24 # %bb.8: # %cond.true16.2 - lw a4, 148(sp) + lw a4, 132(sp) ld a5, 0(a2) slli a4, a4, 2 add a4, a5, a4 lw a4, 0(a4) - lw a5, 168(sp) + lw a5, 152(sp) and a1, a4, a1 beqz a5, .LBB38_25 .LBB38_9: # %cond.true16.3 - lw a4, 172(sp) + lw a4, 156(sp) ld a5, 0(a2) slli a4, a4, 2 add a4, a5, a4 lw a4, 0(a4) - lw a5, 192(sp) + lw a5, 176(sp) and a1, a4, a1 beqz a5, .LBB38_26 .LBB38_10: # %cond.true16.4 - lw a4, 196(sp) + lw a4, 180(sp) ld a5, 0(a2) slli a4, a4, 2 add a4, a5, a4 lw a4, 0(a4) - lw a5, 216(sp) + lw a5, 200(sp) and a1, a4, a1 beqz a5, .LBB38_27 .LBB38_11: # %cond.true16.5 - lw a4, 220(sp) + lw a4, 204(sp) ld a5, 0(a2) slli a4, a4, 2 add a4, a5, a4 lw a4, 0(a4) - lw a5, 240(sp) + lw a5, 224(sp) and a1, a4, a1 beqz a5, .LBB38_28 .LBB38_12: # %cond.true16.6 - lw a4, 244(sp) + lw a4, 228(sp) ld a5, 0(a2) slli a4, a4, 2 add a4, a5, a4 lw a4, 0(a4) - lw a5, 264(sp) + lw a5, 248(sp) and a1, a4, a1 beqz a5, .LBB38_29 .LBB38_13: # %cond.true16.7 - lw a4, 268(sp) + lw a4, 252(sp) ld a5, 0(a2) slli a4, a4, 2 add a4, a5, a4 lw a4, 0(a4) - lw a5, 288(sp) + lw a5, 272(sp) and a1, a4, a1 beqz a5, .LBB38_30 .LBB38_14: # %cond.true16.8 - lw a4, 292(sp) + lw a4, 276(sp) ld a5, 0(a2) slli a4, a4, 2 add a4, a5, a4 lw a4, 0(a4) - lw a5, 312(sp) + lw a5, 296(sp) and a1, a4, a1 beqz a5, .LBB38_31 .LBB38_15: # %cond.true16.9 - lw a4, 316(sp) + lw a4, 300(sp) ld a5, 0(a2) slli a4, a4, 2 add a4, a5, a4 lw a4, 0(a4) - lw a5, 336(sp) + lw a5, 320(sp) and a1, a4, a1 beqz a5, .LBB38_32 .LBB38_16: # %cond.true16.10 - lw a4, 340(sp) + lw a4, 324(sp) ld a5, 0(a2) slli a4, a4, 2 add a4, a5, a4 lw a4, 0(a4) - lw a5, 360(sp) + lw a5, 344(sp) and a1, a4, a1 beqz a5, .LBB38_33 .LBB38_17: # %cond.true16.11 - lw a4, 364(sp) + lw a4, 348(sp) ld a5, 0(a2) slli a4, a4, 2 add a4, a5, a4 lw a4, 0(a4) - lw a5, 384(sp) + lw a5, 368(sp) and a1, a4, a1 beqz a5, .LBB38_34 .LBB38_18: # %cond.true16.12 - lw a4, 388(sp) + lw a4, 372(sp) ld a5, 0(a2) slli a4, a4, 2 add a4, a5, a4 lw a4, 0(a4) - lw a5, 408(sp) + lw a5, 392(sp) and a1, a4, a1 beqz a5, .LBB38_35 .LBB38_19: # %cond.true16.13 - lw a4, 412(sp) + lw a4, 396(sp) ld a5, 0(a2) slli a4, a4, 2 add a4, a5, a4 lw a4, 0(a4) - lw a5, 432(sp) + lw a5, 416(sp) and a1, a4, a1 beqz a5, .LBB38_36 .LBB38_20: # %cond.true16.14 - lw a4, 436(sp) + lw a4, 420(sp) ld a5, 0(a2) slli a4, a4, 2 add a4, a5, a4 lw a4, 0(a4) - lw a5, 456(sp) + lw a5, 440(sp) and a1, a4, a1 beqz a5, .LBB38_37 .LBB38_21: # %cond.true16.15 - lw a4, 460(sp) + lw a4, 444(sp) ld a5, 0(a2) slli a4, a4, 2 add a4, a5, a4 lw a4, 0(a4) - lw a5, 72(sp) - and a1, a4, a1 + lw a5, 56(sp) + and t0, a4, a1 beqz a5, .LBB38_38 .LBB38_22: # %cond.true32 - lw a4, 76(sp) + lw a4, 60(sp) ld a2, 0(a2) slli a4, a4, 2 add a2, a2, a4 lw a4, 0(a2) j .LBB38_39 .LBB38_23: # %if.then - lw a1, 96(sp) - lw a4, 72(sp) + lw t0, 80(sp) + lw a4, 56(sp) j .LBB38_39 .LBB38_24: li a4, 0 - lw a5, 168(sp) + lw a5, 152(sp) and a1, zero, a1 bnez a5, .LBB38_9 .LBB38_25: li a4, 0 - lw a5, 192(sp) + lw a5, 176(sp) and a1, zero, a1 bnez a5, .LBB38_10 .LBB38_26: li a4, 0 - lw a5, 216(sp) + lw a5, 200(sp) and a1, zero, a1 bnez a5, .LBB38_11 .LBB38_27: li a4, 0 - lw a5, 240(sp) + lw a5, 224(sp) and a1, zero, a1 bnez a5, .LBB38_12 .LBB38_28: li a4, 0 - lw a5, 264(sp) + lw a5, 248(sp) and a1, zero, a1 bnez a5, .LBB38_13 .LBB38_29: li a4, 0 - lw a5, 288(sp) + lw a5, 272(sp) and a1, zero, a1 bnez a5, .LBB38_14 .LBB38_30: li a4, 0 - lw a5, 312(sp) + lw a5, 296(sp) and a1, zero, a1 bnez a5, .LBB38_15 .LBB38_31: li a4, 0 - lw a5, 336(sp) + lw a5, 320(sp) and a1, zero, a1 bnez a5, .LBB38_16 .LBB38_32: li a4, 0 - lw a5, 360(sp) + lw a5, 344(sp) and a1, zero, a1 bnez a5, .LBB38_17 .LBB38_33: li a4, 0 - lw a5, 384(sp) + lw a5, 368(sp) and a1, zero, a1 bnez a5, .LBB38_18 .LBB38_34: li a4, 0 - lw a5, 408(sp) + lw a5, 392(sp) and a1, zero, a1 bnez a5, .LBB38_19 .LBB38_35: li a4, 0 - lw a5, 432(sp) + lw a5, 416(sp) and a1, zero, a1 bnez a5, .LBB38_20 .LBB38_36: li a4, 0 - lw a5, 456(sp) + lw a5, 440(sp) and a1, zero, a1 bnez a5, .LBB38_21 .LBB38_37: li a4, 0 - lw a5, 72(sp) - and a1, zero, a1 + lw a5, 56(sp) + and t0, zero, a1 bnez a5, .LBB38_22 .LBB38_38: li a4, 0 .LBB38_39: # %if.end li a2, 0 addi a3, a3, 2001 - li t3, 2 - ld a0, 24(sp) # 8-byte Folded Reload - sw t3, 0(a0) + li t2, 2 + ld a1, 16(sp) # 8-byte Folded Reload + sw t2, 0(a1) ld a5, 0(s2) - snez a6, t0 - snez a7, a1 + snez a6, a0 + snez a7, t0 and a6, a7, a6 snez a4, a4 - and a0, a6, a4 - sd a0, 56(sp) # 8-byte Folded Spill + and a1, a6, a4 + sd a1, 40(sp) # 8-byte Folded Spill .Lpcrel_hi314: auipc a4, %pcrel_hi(imgY_org) - ld a0, %pcrel_lo(.Lpcrel_hi314)(a4) - sd a0, 32(sp) # 8-byte Folded Spill + ld a1, %pcrel_lo(.Lpcrel_hi314)(a4) + sd a1, 24(sp) # 8-byte Folded Spill lui a4, 1 addiw t1, a4, 736 add t1, a5, t1 lui a4, 244 - addiw a0, a4, 575 - sd a0, 64(sp) # 8-byte Folded Spill - li t2, 4 - addi a4, sp, 504 + addiw a1, a4, 575 + sd a1, 48(sp) # 8-byte Folded Spill + li t3, 4 + addi a4, sp, 488 li t4, 16 vsetvli a6, zero, e64, m4, ta, ma vid.v v8 @@ -19411,16 +19411,15 @@ vsetvli a6, zero, e32, m2, ta, ma vmv.v.i v8, 0 li t5, 64 - sd t0, 48(sp) # 8-byte Folded Spill - sd a1, 40(sp) # 8-byte Folded Spill - addi a0, sp, 1536 - vs2r.v v8, (a0) # Unknown-size Folded Spill + addi a1, sp, 1520 + vs2r.v v8, (a1) # Unknown-size Folded Spill + sd t0, 32(sp) # 8-byte Folded Spill j .LBB38_41 .LBB38_40: # %for.inc545 # in Loop: Header=BB38_41 Depth=1 addi a2, a2, 1 addi t1, t1, 512 - beq a2, t2, .LBB38_54 + beq a2, t3, .LBB38_54 .LBB38_41: # %for.body43 # =>This Loop Header: Depth=1 # Child Loop BB38_49 Depth 2 @@ -19430,10 +19429,10 @@ # %bb.42: # %lor.lhs.false # in Loop: Header=BB38_41 Depth=1 lw a6, 20(a5) - bne a6, t3, .LBB38_44 + bne a6, t2, .LBB38_44 # %bb.43: # %if.end58 # in Loop: Header=BB38_41 Depth=1 - or a6, a2, t0 + or a6, a2, a0 beqz a6, .LBB38_40 j .LBB38_46 .LBB38_44: # %if.then46 @@ -19450,21 +19449,21 @@ addi a7, a2, -3 snez a7, a7 or a6, a7, a6 - or a7, a2, t0 + or a7, a2, a0 snez a7, a7 and a6, a6, a7 beqz a6, .LBB38_40 .LBB38_46: # %lor.lhs.false62 # in Loop: Header=BB38_41 Depth=1 xori a6, a2, 1 - or a6, a6, a1 + or a6, a6, t0 beqz a6, .LBB38_40 # %bb.47: # %lor.lhs.false66 # in Loop: Header=BB38_41 Depth=1 addi a6, a2, -3 snez a6, a6 - ld a0, 56(sp) # 8-byte Folded Reload - or a6, a6, a0 + ld a1, 40(sp) # 8-byte Folded Reload + or a6, a6, a1 beqz a6, .LBB38_54 # %bb.48: # %if.else75 # in Loop: Header=BB38_41 Depth=1 @@ -19472,8 +19471,8 @@ lw t3, 192(a5) li a6, 0 slli a7, a7, 3 - ld a0, 32(sp) # 8-byte Folded Reload - add a7, a0, a7 + ld a1, 24(sp) # 8-byte Folded Reload + add a7, a1, a7 slli t3, t3, 1 mv t6, t1 .LBB38_49: # %for.cond79.preheader @@ -19558,201 +19557,201 @@ # %bb.50: # %for.cond124.preheader.preheader # in Loop: Header=BB38_41 Depth=1 li t6, 0 - li s1, 0 + li a6, 0 .LBB38_51: # %for.cond124.preheader # Parent Loop BB38_41 Depth=1 # => This Inner Loop Header: Depth=2 add t3, a4, t6 - vsetvli a0, zero, e32, m1, tu, ma + vsetvli a1, zero, e32, m1, tu, ma vmv1r.v v8, v1 - vmv.s.x v8, s1 - csrr a0, vlenb - li a1, 30 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vs1r.v v8, (a0) # Unknown-size Folded Spill - vsetvli a0, zero, e32, m2, ta, ma + vmv.s.x v8, a6 + csrr a1, vlenb + li a6, 30 + mul a1, a1, a6 + add a1, sp, a1 + addi a1, a1, 1520 + vs1r.v v8, (a1) # Unknown-size Folded Spill + vsetvli a1, zero, e32, m2, ta, ma vlse32.v v8, (t3), t5, v0.t - csrr a0, vlenb - li a1, 39 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vs2r.v v8, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + li a6, 39 + mul a1, a1, a6 + add a1, sp, a1 + addi a1, a1, 1520 + vs2r.v v8, (a1) # Unknown-size Folded Spill addi s1, t3, 768 vlse32.v v8, (s1), t5, v0.t - csrr a0, vlenb - li a1, 37 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vs2r.v v8, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + li a6, 37 + mul a1, a1, a6 + add a1, sp, a1 + addi a1, a1, 1520 + vs2r.v v8, (a1) # Unknown-size Folded Spill addi s4, t3, 256 vlse32.v v8, (s4), t5, v0.t - csrr a0, vlenb - li a1, 35 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vs2r.v v8, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + li a6, 35 + mul a1, a1, a6 + add a1, sp, a1 + addi a1, a1, 1520 + vs2r.v v8, (a1) # Unknown-size Folded Spill addi s2, t3, 512 vlse32.v v16, (s2), t5, v0.t - csrr a0, vlenb - slli a0, a0, 1 - add a0, sp, a0 - addi a0, a0, 1536 - vs2r.v v16, (a0) # Unknown-size Folded Spill - addi s7, t3, 16 - vlse32.v v8, (s7), t5, v0.t - csrr a0, vlenb - slli a1, a0, 5 - add a0, a1, a0 - add a0, sp, a0 - addi a0, a0, 1536 - vs2r.v v8, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + slli a1, a1, 1 + add a1, sp, a1 + addi a1, a1, 1520 + vs2r.v v16, (a1) # Unknown-size Folded Spill + addi s6, t3, 16 + vlse32.v v8, (s6), t5, v0.t + csrr a1, vlenb + slli a6, a1, 5 + add a1, a6, a1 + add a1, sp, a1 + addi a1, a1, 1520 + vs2r.v v8, (a1) # Unknown-size Folded Spill addi s3, t3, 784 vlse32.v v8, (s3), t5, v0.t - csrr a0, vlenb - slli a1, a0, 5 - sub a0, a1, a0 - add a0, sp, a0 - addi a0, a0, 1536 - vs2r.v v8, (a0) # Unknown-size Folded Spill - addi s6, t3, 272 - vlse32.v v30, (s6), t5, v0.t - csrr a0, vlenb - slli a0, a0, 2 - add a0, sp, a0 - addi a0, a0, 1536 - vs2r.v v30, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + slli a6, a1, 5 + sub a1, a6, a1 + add a1, sp, a1 + addi a1, a1, 1520 + vs2r.v v8, (a1) # Unknown-size Folded Spill + addi s7, t3, 272 + vlse32.v v30, (s7), t5, v0.t + csrr a1, vlenb + slli a1, a1, 2 + add a1, sp, a1 + addi a1, a1, 1520 + vs2r.v v30, (a1) # Unknown-size Folded Spill addi s5, t3, 528 vlse32.v v10, (s5), t5, v0.t - csrr a0, vlenb - slli a0, a0, 3 - add a0, sp, a0 - addi a0, a0, 1536 - vs2r.v v10, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + slli a1, a1, 3 + add a1, sp, a1 + addi a1, a1, 1520 + vs2r.v v10, (a1) # Unknown-size Folded Spill addi ra, t3, 32 vlse32.v v28, (ra), t5, v0.t - csrr a0, vlenb - li a1, 22 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vs2r.v v28, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + li a6, 22 + mul a1, a1, a6 + add a1, sp, a1 + addi a1, a1, 1520 + vs2r.v v28, (a1) # Unknown-size Folded Spill addi s8, t3, 800 vlse32.v v8, (s8), t5, v0.t - csrr a0, vlenb - li a1, 24 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vs2r.v v8, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + li a6, 24 + mul a1, a1, a6 + add a1, sp, a1 + addi a1, a1, 1520 + vs2r.v v8, (a1) # Unknown-size Folded Spill addi s11, t3, 288 vlse32.v v2, (s11), t5, v0.t - csrr a0, vlenb - li a1, 14 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vs2r.v v2, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + li a6, 14 + mul a1, a1, a6 + add a1, sp, a1 + addi a1, a1, 1520 + vs2r.v v2, (a1) # Unknown-size Folded Spill addi s9, t3, 544 vlse32.v v4, (s9), t5, v0.t - csrr a0, vlenb - slli a0, a0, 4 - add a0, sp, a0 - addi a0, a0, 1536 - vs2r.v v4, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + slli a1, a1, 4 + add a1, sp, a1 + addi a1, a1, 1520 + vs2r.v v4, (a1) # Unknown-size Folded Spill addi a6, t3, 48 vlse32.v v26, (a6), t5, v0.t - csrr a0, vlenb - li a1, 26 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vs2r.v v26, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + li a7, 26 + mul a1, a1, a7 + add a1, sp, a1 + addi a1, a1, 1520 + vs2r.v v26, (a1) # Unknown-size Folded Spill addi s10, t3, 816 vlse32.v v18, (s10), t5, v0.t - csrr a0, vlenb - li a1, 28 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vs2r.v v18, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + li a7, 28 + mul a1, a1, a7 + add a1, sp, a1 + addi a1, a1, 1520 + vs2r.v v18, (a1) # Unknown-size Folded Spill addi a7, t3, 304 vlse32.v v14, (a7), t5, v0.t - csrr a0, vlenb - li a1, 20 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vs2r.v v14, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + li t0, 20 + mul a1, a1, t0 + add a1, sp, a1 + addi a1, a1, 1520 + vs2r.v v14, (a1) # Unknown-size Folded Spill addi s0, t3, 560 vlse32.v v6, (s0), t5, v0.t - csrr a0, vlenb - li a1, 12 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vs2r.v v6, (a0) # Unknown-size Folded Spill - csrr a0, vlenb - li a1, 39 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vl2r.v v20, (a0) # Unknown-size Folded Reload - csrr a0, vlenb - li a1, 37 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vl2r.v v22, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + li t0, 12 + mul a1, a1, t0 + add a1, sp, a1 + addi a1, a1, 1520 + vs2r.v v6, (a1) # Unknown-size Folded Spill + csrr a1, vlenb + li t0, 39 + mul a1, a1, t0 + add a1, sp, a1 + addi a1, a1, 1520 + vl2r.v v20, (a1) # Unknown-size Folded Reload + csrr a1, vlenb + li t0, 37 + mul a1, a1, t0 + add a1, sp, a1 + addi a1, a1, 1520 + vl2r.v v22, (a1) # Unknown-size Folded Reload vadd.vv v22, v22, v20 - csrr a0, vlenb - li a1, 35 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vl2r.v v12, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + li t0, 35 + mul a1, a1, t0 + add a1, sp, a1 + addi a1, a1, 1520 + vl2r.v v12, (a1) # Unknown-size Folded Reload vadd.vv v20, v16, v12 vadd.vv v12, v20, v22 - csrr a0, vlenb - li a1, 18 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vs2r.v v12, (a0) # Unknown-size Folded Spill - csrr a0, vlenb - slli a1, a0, 5 - add a0, a1, a0 - add a0, sp, a0 - addi a0, a0, 1536 - vl2r.v v16, (a0) # Unknown-size Folded Reload - csrr a0, vlenb - slli a1, a0, 5 - sub a0, a1, a0 - add a0, sp, a0 - addi a0, a0, 1536 - vl2r.v v24, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + li t0, 18 + mul a1, a1, t0 + add a1, sp, a1 + addi a1, a1, 1520 + vs2r.v v12, (a1) # Unknown-size Folded Spill + csrr a1, vlenb + slli t0, a1, 5 + add a1, t0, a1 + add a1, sp, a1 + addi a1, a1, 1520 + vl2r.v v16, (a1) # Unknown-size Folded Reload + csrr a1, vlenb + slli t0, a1, 5 + sub a1, t0, a1 + add a1, sp, a1 + addi a1, a1, 1520 + vl2r.v v24, (a1) # Unknown-size Folded Reload vadd.vv v24, v24, v16 vadd.vv v16, v10, v30 vadd.vv v10, v16, v24 - csrr a0, vlenb - li a1, 6 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vs2r.v v10, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + li t0, 6 + mul a1, a1, t0 + add a1, sp, a1 + addi a1, a1, 1520 + vs2r.v v10, (a1) # Unknown-size Folded Spill vadd.vv v30, v8, v28 vadd.vv v28, v4, v2 vadd.vv v8, v28, v30 - csrr a0, vlenb - li a1, 10 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vs2r.v v8, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + li t0, 10 + mul a1, a1, t0 + add a1, sp, a1 + addi a1, a1, 1520 + vs2r.v v8, (a1) # Unknown-size Folded Spill vadd.vv v4, v18, v26 vadd.vv v2, v6, v14 vadd.vv v6, v2, v4 @@ -19760,189 +19759,189 @@ vadd.vv v18, v8, v10 vadd.vv v8, v18, v26 vsse32.v v8, (t3), t5, v0.t - csrr a0, vlenb - li a1, 35 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vl2r.v v8, (a0) # Unknown-size Folded Reload - csrr a0, vlenb - slli a0, a0, 1 - add a0, sp, a0 - addi a0, a0, 1536 - vl2r.v v10, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + li t0, 35 + mul a1, a1, t0 + add a1, sp, a1 + addi a1, a1, 1520 + vl2r.v v8, (a1) # Unknown-size Folded Reload + csrr a1, vlenb + slli a1, a1, 1 + add a1, sp, a1 + addi a1, a1, 1520 + vl2r.v v10, (a1) # Unknown-size Folded Reload vsub.vv v10, v8, v10 - csrr a0, vlenb - li a1, 39 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vl2r.v v8, (a0) # Unknown-size Folded Reload - csrr a0, vlenb - li a1, 37 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vl2r.v v12, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + li t0, 39 + mul a1, a1, t0 + add a1, sp, a1 + addi a1, a1, 1520 + vl2r.v v8, (a1) # Unknown-size Folded Reload + csrr a1, vlenb + li t0, 37 + mul a1, a1, t0 + add a1, sp, a1 + addi a1, a1, 1520 + vl2r.v v12, (a1) # Unknown-size Folded Reload vsub.vv v8, v8, v12 vsub.vv v20, v22, v20 vadd.vv v12, v10, v8 vsub.vv v8, v8, v10 - csrr a0, vlenb - li a1, 37 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vs2r.v v8, (a0) # Unknown-size Folded Spill - csrr a0, vlenb - slli a0, a0, 3 - add a0, sp, a0 - addi a0, a0, 1536 - vl2r.v v8, (a0) # Unknown-size Folded Reload - csrr a0, vlenb - slli a0, a0, 2 - add a0, sp, a0 - addi a0, a0, 1536 - vl2r.v v10, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + li t0, 37 + mul a1, a1, t0 + add a1, sp, a1 + addi a1, a1, 1520 + vs2r.v v8, (a1) # Unknown-size Folded Spill + csrr a1, vlenb + slli a1, a1, 3 + add a1, sp, a1 + addi a1, a1, 1520 + vl2r.v v8, (a1) # Unknown-size Folded Reload + csrr a1, vlenb + slli a1, a1, 2 + add a1, sp, a1 + addi a1, a1, 1520 + vl2r.v v10, (a1) # Unknown-size Folded Reload vsub.vv v10, v10, v8 - csrr a0, vlenb - slli a1, a0, 5 - add a0, a1, a0 - add a0, sp, a0 - addi a0, a0, 1536 - vl2r.v v8, (a0) # Unknown-size Folded Reload - csrr a0, vlenb - slli a1, a0, 5 - sub a0, a1, a0 - add a0, sp, a0 - addi a0, a0, 1536 - vl2r.v v14, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + slli t0, a1, 5 + add a1, t0, a1 + add a1, sp, a1 + addi a1, a1, 1520 + vl2r.v v8, (a1) # Unknown-size Folded Reload + csrr a1, vlenb + slli t0, a1, 5 + sub a1, t0, a1 + add a1, sp, a1 + addi a1, a1, 1520 + vl2r.v v14, (a1) # Unknown-size Folded Reload vsub.vv v8, v8, v14 vsub.vv v16, v24, v16 vadd.vv v14, v10, v8 vsub.vv v8, v8, v10 - csrr a0, vlenb - slli a1, a0, 5 - add a0, a1, a0 - add a0, sp, a0 - addi a0, a0, 1536 - vs2r.v v8, (a0) # Unknown-size Folded Spill - csrr a0, vlenb - slli a0, a0, 4 - add a0, sp, a0 - addi a0, a0, 1536 - vl2r.v v8, (a0) # Unknown-size Folded Reload - csrr a0, vlenb - li a1, 14 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vl2r.v v10, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + slli t0, a1, 5 + add a1, t0, a1 + add a1, sp, a1 + addi a1, a1, 1520 + vs2r.v v8, (a1) # Unknown-size Folded Spill + csrr a1, vlenb + slli a1, a1, 4 + add a1, sp, a1 + addi a1, a1, 1520 + vl2r.v v8, (a1) # Unknown-size Folded Reload + csrr a1, vlenb + li t0, 14 + mul a1, a1, t0 + add a1, sp, a1 + addi a1, a1, 1520 + vl2r.v v10, (a1) # Unknown-size Folded Reload vsub.vv v8, v10, v8 - csrr a0, vlenb - li a1, 24 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vl2r.v v10, (a0) # Unknown-size Folded Reload - csrr a0, vlenb - li a1, 22 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vl2r.v v22, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + li t0, 24 + mul a1, a1, t0 + add a1, sp, a1 + addi a1, a1, 1520 + vl2r.v v10, (a1) # Unknown-size Folded Reload + csrr a1, vlenb + li t0, 22 + mul a1, a1, t0 + add a1, sp, a1 + addi a1, a1, 1520 + vl2r.v v22, (a1) # Unknown-size Folded Reload vsub.vv v10, v22, v10 vsub.vv v22, v30, v28 vadd.vv v24, v8, v10 vsub.vv v8, v10, v8 - csrr a0, vlenb - slli a1, a0, 5 - sub a0, a1, a0 - add a0, sp, a0 - addi a0, a0, 1536 - vs2r.v v8, (a0) # Unknown-size Folded Spill - csrr a0, vlenb - li a1, 20 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vl2r.v v8, (a0) # Unknown-size Folded Reload - csrr a0, vlenb - li a1, 12 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vl2r.v v10, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + slli t0, a1, 5 + sub a1, t0, a1 + add a1, sp, a1 + addi a1, a1, 1520 + vs2r.v v8, (a1) # Unknown-size Folded Spill + csrr a1, vlenb + li t0, 20 + mul a1, a1, t0 + add a1, sp, a1 + addi a1, a1, 1520 + vl2r.v v8, (a1) # Unknown-size Folded Reload + csrr a1, vlenb + li t0, 12 + mul a1, a1, t0 + add a1, sp, a1 + addi a1, a1, 1520 + vl2r.v v10, (a1) # Unknown-size Folded Reload vsub.vv v10, v8, v10 - csrr a0, vlenb - li a1, 28 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vl2r.v v8, (a0) # Unknown-size Folded Reload - csrr a0, vlenb - li a1, 26 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vl2r.v v28, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + li t0, 28 + mul a1, a1, t0 + add a1, sp, a1 + addi a1, a1, 1520 + vl2r.v v8, (a1) # Unknown-size Folded Reload + csrr a1, vlenb + li t0, 26 + mul a1, a1, t0 + add a1, sp, a1 + addi a1, a1, 1520 + vl2r.v v28, (a1) # Unknown-size Folded Reload vsub.vv v8, v28, v8 vsub.vv v28, v4, v2 vadd.vv v30, v10, v8 vsub.vv v8, v8, v10 - csrr a0, vlenb - li a1, 10 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vl2r.v v10, (a0) # Unknown-size Folded Reload - csrr a0, vlenb - li a1, 6 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vl2r.v v2, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + li t0, 10 + mul a1, a1, t0 + add a1, sp, a1 + addi a1, a1, 1520 + vl2r.v v10, (a1) # Unknown-size Folded Reload + csrr a1, vlenb + li t0, 6 + mul a1, a1, t0 + add a1, sp, a1 + addi a1, a1, 1520 + vl2r.v v2, (a1) # Unknown-size Folded Reload vsub.vv v10, v2, v10 - csrr a0, vlenb - li a1, 18 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vl2r.v v2, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + li t0, 18 + mul a1, a1, t0 + add a1, sp, a1 + addi a1, a1, 1520 + vl2r.v v2, (a1) # Unknown-size Folded Reload vsub.vv v2, v2, v6 vsub.vv v4, v26, v18 vadd.vv v18, v10, v2 - csrr a0, vlenb - li a1, 39 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vs2r.v v18, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + li t0, 39 + mul a1, a1, t0 + add a1, sp, a1 + addi a1, a1, 1520 + vs2r.v v18, (a1) # Unknown-size Folded Spill vsub.vv v10, v2, v10 - csrr a0, vlenb - li a1, 35 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vs2r.v v10, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + li t0, 35 + mul a1, a1, t0 + add a1, sp, a1 + addi a1, a1, 1520 + vs2r.v v10, (a1) # Unknown-size Folded Spill vadd.vv v10, v24, v14 vsub.vv v14, v14, v24 vadd.vv v18, v30, v12 vsub.vv v12, v12, v30 vadd.vv v24, v10, v18 - csrr a0, vlenb - li a1, 26 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vs2r.v v24, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + li t0, 26 + mul a1, a1, t0 + add a1, sp, a1 + addi a1, a1, 1520 + vs2r.v v24, (a1) # Unknown-size Folded Spill vsub.vv v10, v18, v10 - csrr a0, vlenb - li a1, 28 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vs2r.v v10, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + li t0, 28 + mul a1, a1, t0 + add a1, sp, a1 + addi a1, a1, 1520 + vs2r.v v10, (a1) # Unknown-size Folded Spill vadd.vv v30, v14, v12 vsub.vv v18, v12, v14 vadd.vv v10, v22, v16 @@ -19953,26 +19952,26 @@ vsub.vv v28, v14, v10 vadd.vv v2, v12, v16 vsub.vv v6, v16, v12 - csrr a0, vlenb - slli a1, a0, 5 - add a0, a1, a0 - add a0, sp, a0 - addi a0, a0, 1536 - vl2r.v v10, (a0) # Unknown-size Folded Reload - csrr a0, vlenb - slli a1, a0, 5 - sub a0, a1, a0 - add a0, sp, a0 - addi a0, a0, 1536 - vl2r.v v14, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + slli t0, a1, 5 + add a1, t0, a1 + add a1, sp, a1 + addi a1, a1, 1520 + vl2r.v v10, (a1) # Unknown-size Folded Reload + csrr a1, vlenb + slli t0, a1, 5 + sub a1, t0, a1 + add a1, sp, a1 + addi a1, a1, 1520 + vl2r.v v14, (a1) # Unknown-size Folded Reload vadd.vv v12, v14, v10 vsub.vv v14, v10, v14 - csrr a0, vlenb - li a1, 37 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vl2r.v v10, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + li t0, 37 + mul a1, a1, t0 + add a1, sp, a1 + addi a1, a1, 1520 + vl2r.v v10, (a1) # Unknown-size Folded Reload vadd.vv v16, v8, v10 vsub.vv v8, v10, v8 vadd.vv v10, v12, v16 @@ -19980,29 +19979,29 @@ vadd.vv v22, v14, v8 vsub.vv v8, v8, v14 vsse32.v v4, (ra), t5, v0.t - csrr a0, vlenb - li a1, 39 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vl2r.v v14, (a0) # Unknown-size Folded Reload - vsse32.v v14, (s7), t5, v0.t - csrr a0, vlenb - li a1, 35 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vl2r.v v20, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + li t0, 39 + mul a1, a1, t0 + add a1, sp, a1 + addi a1, a1, 1520 + vl2r.v v14, (a1) # Unknown-size Folded Reload + vsse32.v v14, (s6), t5, v0.t + csrr a1, vlenb + li t0, 35 + mul a1, a1, t0 + add a1, sp, a1 + addi a1, a1, 1520 + vl2r.v v20, (a1) # Unknown-size Folded Reload vsse32.v v20, (a6), t5, v0.t vsse32.v v24, (s4), t5, v0.t - csrr a0, vlenb - li a1, 28 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vl2r.v v24, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + li a6, 28 + mul a1, a1, a6 + add a1, sp, a1 + addi a1, a1, 1520 + vl2r.v v24, (a1) # Unknown-size Folded Reload vsse32.v v24, (s11), t5, v0.t - vsse32.v v30, (s6), t5, v0.t + vsse32.v v30, (s7), t5, v0.t vsse32.v v18, (a7), t5, v0.t vsse32.v v26, (s2), t5, v0.t vsse32.v v28, (s9), t5, v0.t @@ -20014,28 +20013,28 @@ vsse32.v v8, (s10), t5, v0.t vrsub.vi v14, v8, 0 vmax.vv v8, v8, v14 - csrr a0, vlenb - li a1, 37 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vs2r.v v8, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + li a6, 37 + mul a1, a1, a6 + add a1, sp, a1 + addi a1, a1, 1520 + vs2r.v v8, (a1) # Unknown-size Folded Spill vrsub.vi v8, v12, 0 vmax.vv v8, v12, v8 - csrr a0, vlenb - slli a1, a0, 5 - add a0, a1, a0 - add a0, sp, a0 - addi a0, a0, 1536 - vs2r.v v8, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + slli a6, a1, 5 + add a1, a6, a1 + add a1, sp, a1 + addi a1, a1, 1520 + vs2r.v v8, (a1) # Unknown-size Folded Spill vrsub.vi v8, v22, 0 vmax.vv v8, v22, v8 - csrr a0, vlenb - slli a1, a0, 5 - sub a0, a1, a0 - add a0, sp, a0 - addi a0, a0, 1536 - vs2r.v v8, (a0) # Unknown-size Folded Spill + csrr a1, vlenb + slli a6, a1, 5 + sub a1, a6, a1 + add a1, sp, a1 + addi a1, a1, 1520 + vs2r.v v8, (a1) # Unknown-size Folded Spill vrsub.vi v8, v10, 0 vmax.vv v22, v10, v8 vrsub.vi v8, v6, 0 @@ -20053,12 +20052,12 @@ vmax.vv v26, v24, v26 vrsub.vi v28, v30, 0 vmax.vv v28, v30, v28 - csrr a0, vlenb - li a1, 26 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vl2r.v v8, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + li a6, 26 + mul a1, a1, a6 + add a1, sp, a1 + addi a1, a1, 1520 + vl2r.v v8, (a1) # Unknown-size Folded Reload vrsub.vi v30, v8, 0 vmax.vv v30, v8, v30 vrsub.vi v2, v20, 0 @@ -20066,22 +20065,22 @@ vmv.v.v v20, v4 vrsub.vi v4, v4, 0 vmax.vv v4, v20, v4 - addi a0, sp, 1536 - vl2r.v v6, (a0) # Unknown-size Folded Reload - csrr a0, vlenb - li a1, 39 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vl2r.v v8, (a0) # Unknown-size Folded Reload + addi a1, sp, 1520 + vl2r.v v6, (a1) # Unknown-size Folded Reload + csrr a1, vlenb + li a6, 39 + mul a1, a1, a6 + add a1, sp, a1 + addi a1, a1, 1520 + vl2r.v v8, (a1) # Unknown-size Folded Reload vrsub.vi v20, v8, 0 vmax.vv v20, v8, v20 - csrr a0, vlenb - li a1, 30 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vl1r.v v6, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + li a6, 30 + mul a1, a1, a6 + add a1, sp, a1 + addi a1, a1, 1520 + vl1r.v v6, (a1) # Unknown-size Folded Reload vadd.vv v20, v20, v6 vadd.vv v20, v4, v20 vadd.vv v20, v2, v20 @@ -20094,108 +20093,108 @@ vadd.vv v8, v10, v14 vadd.vv v8, v12, v8 vadd.vv v8, v22, v8 - csrr a0, vlenb - slli a1, a0, 5 - sub a0, a1, a0 - add a0, sp, a0 - addi a0, a0, 1536 - vl2r.v v10, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + slli a6, a1, 5 + sub a1, a6, a1 + add a1, sp, a1 + addi a1, a1, 1520 + vl2r.v v10, (a1) # Unknown-size Folded Reload vadd.vv v8, v10, v8 - csrr a0, vlenb - slli a1, a0, 5 - add a0, a1, a0 - add a0, sp, a0 - addi a0, a0, 1536 - vl2r.v v10, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + slli a6, a1, 5 + add a1, a6, a1 + add a1, sp, a1 + addi a1, a1, 1520 + vl2r.v v10, (a1) # Unknown-size Folded Reload vadd.vv v8, v10, v8 vsetvli zero, zero, e32, m2, ta, mu - csrr a0, vlenb - li a1, 37 - mul a0, a0, a1 - add a0, sp, a0 - addi a0, a0, 1536 - vl2r.v v10, (a0) # Unknown-size Folded Reload + csrr a1, vlenb + li a6, 37 + mul a1, a1, a6 + add a1, sp, a1 + addi a1, a1, 1520 + vl2r.v v10, (a1) # Unknown-size Folded Reload vadd.vv v6, v10, v8, v0.t vmv.s.x v8, zero vredsum.vs v8, v6, v8 addi t6, t6, 4 - vmv.x.s s1, v8 + vmv.x.s a6, v8 bne t6, t4, .LBB38_51 # %bb.52: # %for.cond377.preheader # in Loop: Header=BB38_41 Depth=1 - lw a6, 504(sp) - slli a7, a6, 1 - lw t3, 568(sp) - srli a7, a7, 62 - add a6, a6, a7 - sraiw a6, a6, 2 - slli a7, t3, 1 - lw t6, 632(sp) - srli a7, a7, 62 - add a7, t3, a7 - sraiw a1, a7, 2 + lw a7, 488(sp) + slli t3, a7, 1 + lw t6, 552(sp) + srli t3, t3, 62 + add a7, a7, t3 + sraiw a7, a7, 2 slli t3, t6, 1 - lw s0, 696(sp) + lw s0, 616(sp) srli t3, t3, 62 add t3, t6, t3 - sraiw t3, t3, 2 + sraiw a1, t3, 2 slli t6, s0, 1 - lw s2, 508(sp) + lw s1, 680(sp) srli t6, t6, 62 add t6, s0, t6 sraiw t6, t6, 2 - slli s0, s2, 1 - lw s3, 572(sp) + slli s0, s1, 1 + lw s2, 492(sp) srli s0, s0, 62 - add s0, s2, s0 + add s0, s1, s0 sraiw s0, s0, 2 + slli s1, s2, 1 + lw s3, 556(sp) + srli s1, s1, 62 + add s1, s2, s1 + sraiw s1, s1, 2 slli s2, s3, 1 - lw s4, 636(sp) + lw s4, 620(sp) srli s2, s2, 62 add s2, s3, s2 sraiw s2, s2, 2 slli s3, s4, 1 - lw s5, 700(sp) + lw s5, 684(sp) srli s3, s3, 62 add s3, s4, s3 sraiw s3, s3, 2 slli s4, s5, 1 - lw s6, 512(sp) + lw s6, 496(sp) srli s4, s4, 62 add s4, s5, s4 sraiw s4, s4, 2 slli s5, s6, 1 - lw s7, 576(sp) + lw s7, 560(sp) srli s5, s5, 62 add s5, s6, s5 sraiw s5, s5, 2 slli s6, s7, 1 - lw s8, 640(sp) + lw s8, 624(sp) srli s6, s6, 62 add s6, s7, s6 sraiw s6, s6, 2 slli s7, s8, 1 - lw s9, 704(sp) + lw s9, 688(sp) srli s7, s7, 62 add s7, s8, s7 sraiw s7, s7, 2 slli s8, s9, 1 - lw s10, 516(sp) + lw s10, 500(sp) srli s8, s8, 62 add s8, s9, s8 sraiw s8, s8, 2 slli s9, s10, 1 - lw s11, 580(sp) + lw s11, 564(sp) srli s9, s9, 62 add s9, s10, s9 sraiw s9, s9, 2 slli s10, s11, 1 - lw ra, 644(sp) + lw ra, 628(sp) srli s10, s10, 62 add s10, s11, s10 sraiw s10, s10, 2 slli s11, ra, 1 - lw t0, 708(sp) + lw t0, 692(sp) srli s11, s11, 62 add s11, ra, s11 sraiw s11, s11, 2 @@ -20203,147 +20202,147 @@ srli ra, ra, 62 add t0, t0, ra sraiw t0, t0, 2 - add ra, t6, a6 - add a7, t3, a1 - subw a1, a1, t3 - subw a6, a6, t6 - add a0, a7, ra - subw t6, ra, a7 - add ra, a1, a6 - subw a6, a6, a1 - add a1, s4, s0 - add a7, s3, s2 - subw t3, s2, s3 - subw s0, s0, s4 - add s4, a7, a1 - subw s2, a1, a7 - add a1, t3, s0 - subw a7, s0, t3 - add t3, s8, s5 - add s0, s7, s6 + add ra, s0, a7 + add t3, t6, a1 + subw a1, a1, t6 + subw a7, a7, s0 + add t2, t3, ra + subw s0, ra, t3 + add ra, a1, a7 + subw a7, a7, a1 + add a1, s4, s1 + add t3, s3, s2 + subw t6, s2, s3 + subw s1, s1, s4 + add s4, t3, a1 + subw s2, a1, t3 + add a1, t6, s1 + subw t3, s1, t6 + add t6, s8, s5 + add s1, s7, s6 subw s6, s6, s7 subw s5, s5, s8 - add s7, s0, t3 - subw s3, t3, s0 + add s7, s1, t6 + subw s3, t6, s1 add s8, s6, s5 - subw t3, s5, s6 - add s0, t0, s9 + subw t6, s5, s6 + add s1, t0, s9 add s5, s11, s10 subw s6, s10, s11 subw t0, s9, t0 - add s9, s5, s0 - subw s5, s0, s5 + add s9, s5, s1 + subw s5, s1, s5 add s10, s6, t0 - subw s0, t0, s6 - add t0, s9, a0 + subw s1, t0, s6 + add t0, s9, t2 add s6, s7, s4 subw s4, s4, s7 - subw a0, a0, s9 + subw t2, t2, s9 add s7, s6, t0 sub t0, t0, s6 - add s6, s4, a0 - sub a0, a0, s4 + add s6, s4, t2 + sub t2, t2, s4 sraiw s4, s7, 31 xor s7, s7, s4 subw s4, s7, s4 - add s1, s4, s1 + add a6, s4, a6 sraiw s4, s6, 31 xor s6, s6, s4 subw s4, s6, s4 - add s1, s4, s1 + add a6, s4, a6 sraiw s4, t0, 31 xor t0, t0, s4 subw t0, t0, s4 - add t0, t0, s1 - sraiw s1, a0, 31 - xor a0, a0, s1 - subw a0, a0, s1 - add a0, a0, t0 + add a6, t0, a6 + sraiw t0, t2, 31 + xor t2, t2, t0 + subw t0, t2, t0 + add a6, t0, a6 add t0, s10, ra - add s1, s8, a1 + add t2, s8, a1 subw a1, a1, s8 subw s4, ra, s10 - add s6, s1, t0 - sub t0, t0, s1 - add s1, a1, s4 + add s6, t2, t0 + sub t0, t0, t2 + add t2, a1, s4 sub a1, s4, a1 sraiw s4, s6, 31 xor s6, s6, s4 subw s4, s6, s4 - add a0, s4, a0 - sraiw s4, s1, 31 - xor s1, s1, s4 - subw s1, s1, s4 - add a0, s1, a0 - sraiw s1, t0, 31 - xor t0, t0, s1 - subw t0, t0, s1 - add a0, t0, a0 + add a6, s4, a6 + sraiw s4, t2, 31 + xor t2, t2, s4 + subw t2, t2, s4 + add a6, t2, a6 + sraiw t2, t0, 31 + xor t0, t0, t2 + subw t0, t0, t2 + add a6, t0, a6 sraiw t0, a1, 31 xor a1, a1, t0 subw a1, a1, t0 - add a0, a1, a0 - add a1, s5, t6 + add a1, a1, a6 + add a6, s5, s0 add t0, s3, s2 - subw s1, s2, s3 - subw t6, t6, s5 - add s2, t0, a1 - sub a1, a1, t0 - add t0, s1, t6 - sub t6, t6, s1 - sraiw s1, s2, 31 - xor s2, s2, s1 - subw s1, s2, s1 - add a0, s1, a0 - sraiw s1, t0, 31 - xor t0, t0, s1 - subw t0, t0, s1 - add a0, t0, a0 - sraiw t0, a1, 31 - xor a1, a1, t0 - subw a1, a1, t0 - add a0, a1, a0 - sraiw a1, t6, 31 - xor t0, t6, a1 - subw a1, t0, a1 - add a0, a1, a0 - add a1, s0, a6 - add t0, t3, a7 - subw a7, a7, t3 - subw a6, a6, s0 - add t3, t0, a1 - sub a1, a1, t0 - add t0, a7, a6 - sub a6, a6, a7 - sraiw a7, t3, 31 - xor t3, t3, a7 - subw a7, t3, a7 - add a0, a7, a0 - sraiw a7, t0, 31 - xor t0, t0, a7 - subw a7, t0, a7 - add a0, a7, a0 - sraiw a7, a1, 31 - xor a1, a1, a7 - subw a1, a1, a7 - add a0, a1, a0 - sraiw a1, a6, 31 - xor a6, a6, a1 - subw a1, a6, a1 - addw a6, a1, a0 - ld t0, 48(sp) # 8-byte Folded Reload - ld a1, 40(sp) # 8-byte Folded Reload - li t3, 2 - ld a0, 64(sp) # 8-byte Folded Reload - bge a6, a0, .LBB38_40 + subw t2, s2, s3 + subw s0, s0, s5 + add s2, t0, a6 + sub a6, a6, t0 + add t0, t2, s0 + sub t2, s0, t2 + sraiw s0, s2, 31 + xor s2, s2, s0 + subw s0, s2, s0 + add a1, s0, a1 + sraiw s0, t0, 31 + xor t0, t0, s0 + subw t0, t0, s0 + add a1, t0, a1 + sraiw t0, a6, 31 + xor a6, a6, t0 + subw a6, a6, t0 + add a1, a6, a1 + sraiw a6, t2, 31 + xor t0, t2, a6 + subw a6, t0, a6 + add a1, a6, a1 + add a6, s1, a7 + add t0, t6, t3 + subw t2, t3, t6 + subw a7, a7, s1 + add t3, t0, a6 + sub a6, a6, t0 + add t0, t2, a7 + sub a7, a7, t2 + sraiw t2, t3, 31 + xor t3, t3, t2 + subw t2, t3, t2 + add a1, t2, a1 + sraiw t2, t0, 31 + xor t0, t0, t2 + subw t0, t0, t2 + add a1, t0, a1 + sraiw t0, a6, 31 + xor a6, a6, t0 + subw a6, a6, t0 + add a1, a6, a1 + sraiw a6, a7, 31 + xor a7, a7, a6 + subw a6, a7, a6 + addw a6, a6, a1 + ld t0, 32(sp) # 8-byte Folded Reload + li t2, 2 + ld a1, 48(sp) # 8-byte Folded Reload + li t3, 4 + bge a6, a1, .LBB38_40 # %bb.53: # %if.then542 # in Loop: Header=BB38_41 Depth=1 - ld a0, 24(sp) # 8-byte Folded Reload - sw a2, 0(a0) - sd a6, 64(sp) # 8-byte Folded Spill + ld a1, 16(sp) # 8-byte Folded Reload + sw a2, 0(a1) + sd a6, 48(sp) # 8-byte Folded Spill j .LBB38_40 .LBB38_54: # %for.end547 - ld a1, 64(sp) # 8-byte Folded Reload + ld a1, 48(sp) # 8-byte Folded Reload srliw a0, a1, 31 add a0, a1, a0 sraiw a0, a0, 1 @@ -20351,20 +20350,20 @@ li a2, 42 mul a1, a1, a2 add sp, sp, a1 - ld ra, 1640(sp) # 8-byte Folded Reload - ld s0, 1632(sp) # 8-byte Folded Reload - ld s1, 1624(sp) # 8-byte Folded Reload - ld s2, 1616(sp) # 8-byte Folded Reload - ld s3, 1608(sp) # 8-byte Folded Reload - ld s4, 1600(sp) # 8-byte Folded Reload - ld s5, 1592(sp) # 8-byte Folded Reload - ld s6, 1584(sp) # 8-byte Folded Reload - ld s7, 1576(sp) # 8-byte Folded Reload - ld s8, 1568(sp) # 8-byte Folded Reload - ld s9, 1560(sp) # 8-byte Folded Reload - ld s10, 1552(sp) # 8-byte Folded Reload - ld s11, 1544(sp) # 8-byte Folded Reload - addi sp, sp, 1648 + ld ra, 1624(sp) # 8-byte Folded Reload + ld s0, 1616(sp) # 8-byte Folded Reload + ld s1, 1608(sp) # 8-byte Folded Reload + ld s2, 1600(sp) # 8-byte Folded Reload + ld s3, 1592(sp) # 8-byte Folded Reload + ld s4, 1584(sp) # 8-byte Folded Reload + ld s5, 1576(sp) # 8-byte Folded Reload + ld s6, 1568(sp) # 8-byte Folded Reload + ld s7, 1560(sp) # 8-byte Folded Reload + ld s8, 1552(sp) # 8-byte Folded Reload + ld s9, 1544(sp) # 8-byte Folded Reload + ld s10, 1536(sp) # 8-byte Folded Reload + ld s11, 1528(sp) # 8-byte Folded Reload + addi sp, sp, 1632 ret .Lfunc_end38: .size find_sad_16x16, .Lfunc_end38-find_sad_16x16 --- build.head//MultiSource/Benchmarks/MiBench/consumer-jpeg/CMakeFiles/consumer-jpeg.dir/jdmarker.s 2023-11-13 08:03:22.623551000 +0000 +++ build//MultiSource/Benchmarks/MiBench/consumer-jpeg/CMakeFiles/consumer-jpeg.dir/jdmarker.s 2023-11-13 08:03:17.655694604 +0000 @@ -726,22 +726,22 @@ .LBB4_45: # %get_soi.exit # in Loop: Header=BB4_4 Depth=1 vsetivli zero, 16, e8, m1, ta, ma + csrr a1, vlenb + slli a1, a1, 1 + add a1, sp, a1 + addi a1, a1, 448 + vl1r.v v8, (a1) # Unknown-size Folded Reload ld a1, 80(sp) # 8-byte Folded Reload - csrr a2, vlenb - slli a2, a2, 1 - add a2, sp, a2 - addi a2, a2, 448 - vl1r.v v8, (a2) # Unknown-size Folded Reload vse8.v v8, (a1) + csrr a1, vlenb + add a1, sp, a1 + addi a1, a1, 448 + vl1r.v v8, (a1) # Unknown-size Folded Reload ld a1, 72(sp) # 8-byte Folded Reload - csrr a2, vlenb - add a2, sp, a2 - addi a2, a2, 448 - vl1r.v v8, (a2) # Unknown-size Folded Reload vse8.v v8, (a1) + addi a1, sp, 448 + vl1r.v v8, (a1) # Unknown-size Folded Reload ld a1, 64(sp) # 8-byte Folded Reload - addi a2, sp, 448 - vl1r.v v8, (a2) # Unknown-size Folded Reload vse8.v v8, (a1) sw zero, 52(s0) sw zero, 384(s0) --- build.head//MicroBenchmarks/libs/benchmark/test/CMakeFiles/reporter_output_test.dir/reporter_output_test.s 2023-11-13 08:03:22.151564645 +0000 +++ build//MicroBenchmarks/libs/benchmark/test/CMakeFiles/reporter_output_test.dir/reporter_output_test.s 2023-11-13 08:03:17.211707438 +0000 @@ -11015,9 +11015,9 @@ addiw a0, a0, 720 add s6, sp, a0 addi s10, sp, 1936 - addi s4, sp, 2047 - addi s4, s4, 337 - sd s4, 432(s10) + addi s3, sp, 2047 + addi s3, s3, 337 + sd s3, 432(s10) li a0, 59 sd a0, 0(s6) addi a0, sp, 2047 @@ -11077,9 +11077,9 @@ # %bb.1: # %invoke.cont4 addi s1, sp, 2047 addi s1, s1, 441 - addi s5, sp, 2047 - addi s5, s5, 305 - sd s5, 400(s10) + addi s4, sp, 2047 + addi s4, s4, 305 + sd s4, 400(s10) li a0, 20 sd a0, 0(s6) .Ltmp672: @@ -11130,11 +11130,11 @@ # %bb.3: # %invoke.cont10 addi s1, sp, 2047 addi s1, s1, 529 - addi s7, sp, 2047 - addi s7, s7, 273 - sd s7, 368(s10) - li s3, 32 - sd s3, 0(s6) + addi s5, sp, 2047 + addi s5, s5, 273 + sd s5, 368(s10) + li s2, 32 + sd s2, 0(s6) .Ltmp678: addi a0, sp, 2047 addi a0, a0, 257 @@ -11150,9 +11150,9 @@ sd a1, 384(s10) .Lpcrel_hi65: auipc a2, %pcrel_hi(.L.str.13) - addi s2, a2, %pcrel_lo(.Lpcrel_hi65) - vsetvli zero, s3, e8, m2, ta, ma - vle8.v v8, (s2) + addi s11, a2, %pcrel_lo(.Lpcrel_hi65) + vsetvli zero, s2, e8, m2, ta, ma + vle8.v v8, (s11) vse8.v v8, (a0) ld a0, 368(s10) sd a1, 376(s10) @@ -11168,9 +11168,9 @@ # %bb.5: # %invoke.cont17 addi s1, sp, 2047 addi s1, s1, 617 - addi s3, sp, 2047 - addi s3, s3, 241 - sd s3, 336(s10) + addi s2, sp, 2047 + addi s2, s2, 241 + sd s2, 336(s10) li a0, 63 sd a0, 0(s6) .Ltmp684: @@ -11230,9 +11230,9 @@ # %bb.7: # %invoke.cont24 addi s1, sp, 2047 addi s1, s1, 705 - addi s9, sp, 2047 - addi s9, s9, 209 - sd s9, 304(s10) + addi s7, sp, 2047 + addi s7, s7, 209 + sd s7, 304(s10) li a0, 25 sd a0, 0(s6) .Ltmp690: @@ -11285,9 +11285,9 @@ # %bb.9: # %invoke.cont31 addi s1, sp, 2047 addi s1, s1, 793 - addi a0, sp, 2047 - addi a0, a0, 177 - sd a0, 272(s10) + addi s9, sp, 2047 + addi s9, s9, 177 + sd s9, 272(s10) li a0, 18 sd a0, 0(s6) .Ltmp696: @@ -11387,17 +11387,17 @@ # %bb.13: # %invoke.cont45 addi s1, sp, 2047 addi s1, s1, 969 - addi s4, sp, 2047 - addi s4, s4, 113 - sd s4, 208(s10) + addi s3, sp, 2047 + addi s3, s3, 113 + sd s3, 208(s10) .Lpcrel_hi70: auipc a0, %pcrel_hi(.L.str.18) addi a1, a0, %pcrel_lo(.Lpcrel_hi70) li a2, 14 - li s3, 14 - mv a0, s4 + li s2, 14 + mv a0, s3 call memcpy@plt - sd s3, 216(s10) + sd s2, 216(s10) sb zero, 238(s10) .Ltmp708: addi a1, sp, 2047 @@ -11614,8 +11614,8 @@ addi s1, s1, 1409 addi a0, sp, 2000 sd a0, 48(s10) - li s3, 32 - sd s3, 0(s6) + li s2, 32 + sd s2, 0(s6) .Ltmp735: addi a0, sp, 1984 lui a1, 2 @@ -11628,8 +11628,8 @@ ld a1, 0(s6) sd a0, 48(s10) sd a1, 64(s10) - vsetvli zero, s3, e8, m2, ta, ma - vle8.v v8, (s2) + vsetvli zero, s2, e8, m2, ta, ma + vle8.v v8, (s11) vse8.v v8, (a0) ld a0, 48(s10) sd a1, 56(s10) @@ -11842,9 +11842,9 @@ auipc a1, %pcrel_hi(.L.str.18) addi a1, a1, %pcrel_lo(.Lpcrel_hi74) li a2, 14 - li s3, 14 + li s2, 14 call memcpy@plt - sd s3, 1832(sp) + sd s2, 1832(sp) sb zero, 1854(sp) .Ltmp765: addi a1, sp, 1824 @@ -12063,7 +12063,7 @@ sd a0, 1664(sp) sd a1, 1680(sp) vsetvli zero, s0, e8, m2, ta, ma - vle8.v v8, (s2) + vle8.v v8, (s11) vse8.v v8, (a0) ld a0, 1664(sp) sd a1, 1672(sp) @@ -12288,9 +12288,9 @@ auipc a1, %pcrel_hi(.L.str.18) addi a1, a1, %pcrel_lo(.Lpcrel_hi76) li a2, 14 - li s3, 14 + li s2, 14 call memcpy@plt - sd s3, 1512(sp) + sd s2, 1512(sp) sb zero, 1534(sp) .Ltmp822: addi a1, sp, 1504 @@ -12500,7 +12500,7 @@ sd a0, 1344(sp) sd a1, 1360(sp) vsetvli zero, s0, e8, m2, ta, ma - vle8.v v8, (s2) + vle8.v v8, (s11) vse8.v v8, (a0) ld a0, 1344(sp) sd a1, 1352(sp) @@ -12682,9 +12682,9 @@ auipc a1, %pcrel_hi(.L.str.18) addi a1, a1, %pcrel_lo(.Lpcrel_hi79) li a2, 14 - li s3, 14 + li s2, 14 call memcpy@plt - sd s3, 1224(sp) + sd s2, 1224(sp) sb zero, 1246(sp) .Ltmp873: addi a1, sp, 1216 @@ -12999,7 +12999,7 @@ sd a0, 992(sp) sd a1, 1008(sp) vsetvli zero, s0, e8, m2, ta, ma - vle8.v v8, (s2) + vle8.v v8, (s11) vse8.v v8, (a0) ld a0, 992(sp) sd a1, 1000(sp) @@ -13167,9 +13167,9 @@ # %bb.89: # %invoke.cont325 lui s0, 1 addiw s1, s0, 40 - addi s4, sp, 2047 - addi s4, s4, 353 - add s1, s4, s1 + addi s2, sp, 2047 + addi s2, s2, 353 + add s1, s2, s1 addi a0, sp, 880 sd a0, 864(sp) .Lpcrel_hi84: @@ -13189,7 +13189,7 @@ .Ltmp937: # %bb.90: # %invoke.cont332 addiw s1, s0, 128 - add s1, s4, s1 + add s1, s2, s1 addi a0, sp, 848 sd a0, 832(sp) li a0, 28 @@ -13490,7 +13490,7 @@ sd a0, 640(sp) sd a1, 656(sp) vsetvli zero, s0, e8, m2, ta, ma - vle8.v v8, (s2) + vle8.v v8, (s11) vse8.v v8, (a0) ld a0, 640(sp) sd a1, 648(sp) @@ -13661,9 +13661,9 @@ # %bb.110: # %invoke.cont402 lui s0, 1 addiw s1, s0, 1008 - addi s4, sp, 2047 - addi s4, s4, 353 - add s1, s4, s1 + addi s2, sp, 2047 + addi s2, s2, 353 + add s1, s2, s1 addi a0, sp, 528 sd a0, 512(sp) .Lpcrel_hi87: @@ -13683,7 +13683,7 @@ .Ltmp1000: # %bb.111: # %invoke.cont409 addiw s1, s0, 1096 - add s1, s4, s1 + add s1, s2, s1 addi a0, sp, 496 sd a0, 480(sp) li a0, 28 @@ -13981,7 +13981,7 @@ sd a0, 288(sp) sd a1, 304(sp) vsetvli zero, s0, e8, m2, ta, ma - vle8.v v8, (s2) + vle8.v v8, (s11) vse8.v v8, (a0) ld a0, 288(sp) sd a1, 296(sp) @@ -14056,8 +14056,8 @@ addi a0, sp, 2047 addi a0, a0, 353 add s1, a0, s1 - addi a0, sp, 240 - sd a0, 224(sp) + addi s7, sp, 240 + sd s7, 224(sp) li a0, 25 sd a0, 0(s6) .Ltmp1050: @@ -14108,8 +14108,8 @@ addi a0, sp, 2047 addi a0, a0, 353 add s1, a0, s1 - addi a0, sp, 208 - sd a0, 192(sp) + addi s8, sp, 208 + sd s8, 192(sp) li a0, 18 sd a0, 0(s6) .Ltmp1056: @@ -14277,8 +14277,8 @@ addi a0, sp, 2047 addi a0, a0, 353 add s1, a0, s1 - addi s8, sp, 80 - sd s8, 64(sp) + addi a0, sp, 80 + sd a0, 64(sp) li a0, 17 sd a0, 0(s6) .Ltmp1077: @@ -14318,8 +14318,8 @@ addi a0, sp, 2047 addi a0, a0, 353 add s1, a0, s1 - addi s7, sp, 48 - sd s7, 32(sp) + addi a0, sp, 48 + sd a0, 32(sp) li a0, 31 sd a0, 0(s6) .Ltmp1083: @@ -14382,15 +14382,15 @@ addiw a0, a0, -1680 add s3, s3, a0 lui a0, 1048574 - addiw s2, a0, 1680 + addiw s11, a0, 1680 li s5, -1 li s0, 1 j .LBB28_143 .LBB28_142: # %_ZN8TestCaseD2Ev.exit # in Loop: Header=BB28_143 Depth=1 - addi s2, s2, 88 + addi s11, s11, 88 addi s3, s3, -88 - beqz s2, .LBB28_155 + beqz s11, .LBB28_155 .LBB28_143: # %arraydestroy.body # =>This Inner Loop Header: Depth=1 ld s1, -8(s3) @@ -14399,8 +14399,8 @@ # in Loop: Header=BB28_143 Depth=1 .Lpcrel_hi93: auipc a0, %got_pcrel_hi(__libc_single_threaded) - ld s11, %pcrel_lo(.Lpcrel_hi93)(a0) - lbu a0, 0(s11) + ld s2, %pcrel_lo(.Lpcrel_hi93)(a0) + lbu a0, 0(s2) beqz a0, .LBB28_146 # %bb.145: # %if.then.i.i.i.i.i # in Loop: Header=BB28_143 Depth=1 @@ -14423,7 +14423,7 @@ mv a0, s1 jalr a1 fence.tso - lbu a0, 0(s11) + lbu a0, 0(s2) beqz a0, .LBB28_154 # %bb.148: # %if.then.i.i.i.i.i.i # in Loop: Header=BB28_143 Depth=1 @@ -14464,7 +14464,8 @@ j .LBB28_150 .LBB28_155: # %arraydestroy.done517 ld a0, 32(sp) - beq a0, s7, .LBB28_157 + addi a1, sp, 48 + beq a0, a1, .LBB28_157 # %bb.156: # %if.then.i.i1028 call _ZdlPv@plt .LBB28_157: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit @@ -14473,7 +14474,11 @@ addi s0, s0, 337 addi s1, sp, 2047 addi s1, s1, 305 - beq a0, s8, .LBB28_159 + addi s2, sp, 2047 + addi s2, s2, 273 + mv s11, s7 + addi a1, sp, 80 + beq a0, a1, .LBB28_159 # %bb.158: # %if.then.i.i1030 call _ZdlPv@plt .LBB28_159: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit1034 @@ -14483,12 +14488,12 @@ call _ZdlPv@plt .LBB28_161: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit1040 ld a0, 128(sp) - addi s2, sp, 2047 - addi s2, s2, 273 addi s3, sp, 2047 addi s3, s3, 241 addi s4, sp, 2047 addi s4, s4, 209 + addi s5, sp, 2047 + addi s5, s5, 177 beq a0, s6, .LBB28_163 # %bb.162: # %if.then.i.i1042 call _ZdlPv@plt @@ -14499,16 +14504,14 @@ call _ZdlPv@plt .LBB28_165: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit1052 ld a0, 192(sp) - addi a1, sp, 208 - beq a0, a1, .LBB28_167 + beq a0, s8, .LBB28_167 # %bb.166: # %if.then.i.i1054 call _ZdlPv@plt .LBB28_167: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit1058 ld a0, 224(sp) - addi s5, sp, 2047 - addi s5, s5, 145 - addi a1, sp, 240 - beq a0, a1, .LBB28_169 + addi s7, sp, 2047 + addi s7, s7, 145 + beq a0, s11, .LBB28_169 # %bb.168: # %if.then.i.i1060 call _ZdlPv@plt .LBB28_169: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit1064 @@ -14876,14 +14879,12 @@ call _ZdlPv@plt .LBB28_289: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit1424 ld a0, 240(s10) - beq a0, s5, .LBB28_291 + beq a0, s7, .LBB28_291 # %bb.290: # %if.then.i.i1426 call _ZdlPv@plt .LBB28_291: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit1430 ld a0, 272(s10) - addi a1, sp, 2047 - addi a1, a1, 177 - beq a0, a1, .LBB28_293 + beq a0, s5, .LBB28_293 # %bb.292: # %if.then.i.i1432 call _ZdlPv@plt .LBB28_293: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit1436 @@ -15156,235 +15157,235 @@ mv s11, a0 .LBB28_306: # %ehcleanup ld a0, 32(sp) - bne a0, s7, .LBB28_399 + addi a1, sp, 48 + bne a0, a1, .LBB28_398 # %bb.307: # %ehcleanup526 ld a0, 64(sp) - bne a0, s8, .LBB28_403 + addi a1, sp, 80 + bne a0, a1, .LBB28_402 .LBB28_308: # %ehcleanup529 ld a0, 96(sp) - bne a0, s4, .LBB28_407 + bne a0, s4, .LBB28_406 .LBB28_309: # %ehcleanup532 ld a0, 128(sp) - bne a0, s6, .LBB28_411 + bne a0, s6, .LBB28_410 .LBB28_310: # %ehcleanup535 ld a0, 160(sp) - bne a0, s9, .LBB28_414 + bne a0, s9, .LBB28_413 .LBB28_311: # %ehcleanup538 ld a0, 192(sp) - addi a1, sp, 208 - bne a0, a1, .LBB28_415 + bne a0, s8, .LBB28_414 .LBB28_312: # %ehcleanup541 ld a0, 224(sp) - addi a1, sp, 240 - bne a0, a1, .LBB28_416 + bne a0, s7, .LBB28_415 .LBB28_313: # %ehcleanup544 ld a0, 256(sp) addi a1, sp, 272 - bne a0, a1, .LBB28_417 + bne a0, a1, .LBB28_416 .LBB28_314: # %ehcleanup547 ld a0, 288(sp) addi a1, sp, 304 - bne a0, a1, .LBB28_418 + bne a0, a1, .LBB28_417 .LBB28_315: # %ehcleanup550 ld a0, 320(sp) addi a1, sp, 336 - bne a0, a1, .LBB28_419 + bne a0, a1, .LBB28_418 .LBB28_316: # %ehcleanup553 ld a0, 352(sp) addi a1, sp, 368 - bne a0, a1, .LBB28_420 + bne a0, a1, .LBB28_419 .LBB28_317: # %ehcleanup556 ld a0, 384(sp) addi a1, sp, 400 - bne a0, a1, .LBB28_421 + bne a0, a1, .LBB28_420 .LBB28_318: # %ehcleanup559 ld a0, 416(sp) addi a1, sp, 432 - bne a0, a1, .LBB28_422 + bne a0, a1, .LBB28_421 .LBB28_319: # %ehcleanup562 ld a0, 448(sp) addi a1, sp, 464 - bne a0, a1, .LBB28_423 + bne a0, a1, .LBB28_422 .LBB28_320: # %ehcleanup565 ld a0, 480(sp) addi a1, sp, 496 - bne a0, a1, .LBB28_424 + bne a0, a1, .LBB28_423 .LBB28_321: # %ehcleanup568 ld a0, 512(sp) addi a1, sp, 528 - bne a0, a1, .LBB28_425 + bne a0, a1, .LBB28_424 .LBB28_322: # %ehcleanup571 ld a0, 544(sp) addi a1, sp, 560 - bne a0, a1, .LBB28_426 + bne a0, a1, .LBB28_425 .LBB28_323: # %ehcleanup574 ld a0, 576(sp) addi a1, sp, 592 - bne a0, a1, .LBB28_427 + bne a0, a1, .LBB28_426 .LBB28_324: # %ehcleanup577 ld a0, 608(sp) addi a1, sp, 624 - bne a0, a1, .LBB28_428 + bne a0, a1, .LBB28_427 .LBB28_325: # %ehcleanup580 ld a0, 640(sp) addi a1, sp, 656 - bne a0, a1, .LBB28_429 + bne a0, a1, .LBB28_428 .LBB28_326: # %ehcleanup583 ld a0, 672(sp) addi a1, sp, 688 - bne a0, a1, .LBB28_430 + bne a0, a1, .LBB28_429 .LBB28_327: # %ehcleanup586 ld a0, 704(sp) addi a1, sp, 720 - bne a0, a1, .LBB28_431 + bne a0, a1, .LBB28_430 .LBB28_328: # %ehcleanup589 ld a0, 736(sp) addi a1, sp, 752 - bne a0, a1, .LBB28_432 + bne a0, a1, .LBB28_431 .LBB28_329: # %ehcleanup592 ld a0, 768(sp) addi a1, sp, 784 - bne a0, a1, .LBB28_433 + bne a0, a1, .LBB28_432 .LBB28_330: # %ehcleanup595 ld a0, 800(sp) addi a1, sp, 816 - bne a0, a1, .LBB28_434 + bne a0, a1, .LBB28_433 .LBB28_331: # %ehcleanup598 ld a0, 832(sp) addi a1, sp, 848 - bne a0, a1, .LBB28_435 + bne a0, a1, .LBB28_434 .LBB28_332: # %ehcleanup601 ld a0, 864(sp) addi a1, sp, 880 - bne a0, a1, .LBB28_436 + bne a0, a1, .LBB28_435 .LBB28_333: # %ehcleanup604 ld a0, 896(sp) addi a1, sp, 912 - bne a0, a1, .LBB28_437 + bne a0, a1, .LBB28_436 .LBB28_334: # %ehcleanup607 ld a0, 928(sp) addi a1, sp, 944 - bne a0, a1, .LBB28_438 + bne a0, a1, .LBB28_437 .LBB28_335: # %ehcleanup610 ld a0, 960(sp) addi a1, sp, 976 - bne a0, a1, .LBB28_439 + bne a0, a1, .LBB28_438 .LBB28_336: # %ehcleanup613 ld a0, 992(sp) addi a1, sp, 1008 - bne a0, a1, .LBB28_440 + bne a0, a1, .LBB28_439 .LBB28_337: # %ehcleanup616 ld a0, 1024(sp) addi a1, sp, 1040 - bne a0, a1, .LBB28_441 + bne a0, a1, .LBB28_440 .LBB28_338: # %ehcleanup619 ld a0, 1056(sp) addi a1, sp, 1072 - bne a0, a1, .LBB28_442 + bne a0, a1, .LBB28_441 .LBB28_339: # %ehcleanup622 ld a0, 1088(sp) addi a1, sp, 1104 - bne a0, a1, .LBB28_443 + bne a0, a1, .LBB28_442 .LBB28_340: # %ehcleanup625 ld a0, 1120(sp) addi a1, sp, 1136 - bne a0, a1, .LBB28_444 + bne a0, a1, .LBB28_443 .LBB28_341: # %ehcleanup628 ld a0, 1152(sp) addi a1, sp, 1168 - bne a0, a1, .LBB28_445 + bne a0, a1, .LBB28_444 .LBB28_342: # %ehcleanup631 ld a0, 1184(sp) addi a1, sp, 1200 - bne a0, a1, .LBB28_446 + bne a0, a1, .LBB28_445 .LBB28_343: # %ehcleanup634 ld a0, 1216(sp) addi a1, sp, 1232 - bne a0, a1, .LBB28_447 + bne a0, a1, .LBB28_446 .LBB28_344: # %ehcleanup637 ld a0, 1248(sp) addi a1, sp, 1264 - bne a0, a1, .LBB28_448 + bne a0, a1, .LBB28_447 .LBB28_345: # %ehcleanup640 ld a0, 1280(sp) addi a1, sp, 1296 - bne a0, a1, .LBB28_449 + bne a0, a1, .LBB28_448 .LBB28_346: # %ehcleanup643 ld a0, 1312(sp) addi a1, sp, 1328 - bne a0, a1, .LBB28_450 + bne a0, a1, .LBB28_449 .LBB28_347: # %ehcleanup646 ld a0, 1344(sp) addi a1, sp, 1360 - bne a0, a1, .LBB28_451 + bne a0, a1, .LBB28_450 .LBB28_348: # %ehcleanup649 ld a0, 1376(sp) addi a1, sp, 1392 - bne a0, a1, .LBB28_452 + bne a0, a1, .LBB28_451 .LBB28_349: # %ehcleanup652 ld a0, 1408(sp) addi a1, sp, 1424 - bne a0, a1, .LBB28_453 + bne a0, a1, .LBB28_452 .LBB28_350: # %ehcleanup655 ld a0, 1440(sp) addi a1, sp, 1456 - bne a0, a1, .LBB28_454 + bne a0, a1, .LBB28_453 .LBB28_351: # %ehcleanup658 ld a0, 1472(sp) addi a1, sp, 1488 - bne a0, a1, .LBB28_455 + bne a0, a1, .LBB28_454 .LBB28_352: # %ehcleanup661 ld a0, 1504(sp) addi a1, sp, 1520 - bne a0, a1, .LBB28_456 + bne a0, a1, .LBB28_455 .LBB28_353: # %ehcleanup664 ld a0, 1536(sp) addi a1, sp, 1552 - bne a0, a1, .LBB28_457 + bne a0, a1, .LBB28_456 .LBB28_354: # %ehcleanup667 ld a0, 1568(sp) addi a1, sp, 1584 - bne a0, a1, .LBB28_458 + bne a0, a1, .LBB28_457 .LBB28_355: # %ehcleanup670 ld a0, 1600(sp) addi a1, sp, 1616 - bne a0, a1, .LBB28_459 + bne a0, a1, .LBB28_458 .LBB28_356: # %ehcleanup673 ld a0, 1632(sp) addi a1, sp, 1648 - bne a0, a1, .LBB28_460 + bne a0, a1, .LBB28_459 .LBB28_357: # %ehcleanup676 ld a0, 1664(sp) addi a1, sp, 1680 - bne a0, a1, .LBB28_461 + bne a0, a1, .LBB28_460 .LBB28_358: # %ehcleanup679 ld a0, 1696(sp) addi a1, sp, 1712 - bne a0, a1, .LBB28_462 + bne a0, a1, .LBB28_461 .LBB28_359: # %ehcleanup682 ld a0, 1728(sp) addi a1, sp, 1744 - bne a0, a1, .LBB28_463 + bne a0, a1, .LBB28_462 .LBB28_360: # %ehcleanup685 ld a0, 1760(sp) addi a1, sp, 1776 - bne a0, a1, .LBB28_464 + bne a0, a1, .LBB28_463 .LBB28_361: # %ehcleanup688 ld a0, 1792(sp) addi a1, sp, 1808 - bne a0, a1, .LBB28_465 + bne a0, a1, .LBB28_464 .LBB28_362: # %ehcleanup691 ld a0, 1824(sp) addi a1, sp, 1840 - bne a0, a1, .LBB28_466 + bne a0, a1, .LBB28_465 .LBB28_363: # %ehcleanup694 ld a0, 1856(sp) addi a1, sp, 1872 - bne a0, a1, .LBB28_467 + bne a0, a1, .LBB28_466 .LBB28_364: # %ehcleanup697 ld a0, 1888(sp) addi a1, sp, 1904 - bne a0, a1, .LBB28_468 + bne a0, a1, .LBB28_467 .LBB28_365: # %ehcleanup700 ld a0, 1920(sp) beq a0, s10, .LBB28_367 @@ -15400,21 +15401,21 @@ .LBB28_369: # %ehcleanup706 ld a0, 48(s10) addi a1, sp, 2000 - bne a0, a1, .LBB28_395 + bne a0, a1, .LBB28_394 # %bb.370: # %ehcleanup709 ld a0, 80(s10) addi a1, sp, 2032 - bne a0, a1, .LBB28_396 + bne a0, a1, .LBB28_395 .LBB28_371: # %ehcleanup712 ld a0, 112(s10) addi a1, sp, 2047 addi a1, a1, 17 - bne a0, a1, .LBB28_397 + bne a0, a1, .LBB28_396 .LBB28_372: # %ehcleanup715 ld a0, 144(s10) addi a1, sp, 2047 addi a1, a1, 49 - bne a0, a1, .LBB28_398 + bne a0, a1, .LBB28_397 .LBB28_373: # %ehcleanup718 ld a0, 176(s10) addi a1, sp, 2047 @@ -15423,48 +15424,49 @@ .LBB28_374: # %if.then.i.i1858 call _ZdlPv@plt .LBB28_375: # %ehcleanup721 - addi s4, sp, 2047 - addi s4, s4, 113 + addi s3, sp, 2047 + addi s3, s3, 113 ld a0, 208(s10) - beq a0, s4, .LBB28_377 + beq a0, s3, .LBB28_377 .LBB28_376: # %if.then.i.i1864 call _ZdlPv@plt .LBB28_377: # %ehcleanup724 + addi s3, sp, 2047 + addi s3, s3, 337 addi s4, sp, 2047 - addi s4, s4, 337 + addi s4, s4, 305 addi s5, sp, 2047 - addi s5, s5, 305 + addi s5, s5, 273 + addi s2, sp, 2047 + addi s2, s2, 241 addi s7, sp, 2047 - addi s7, s7, 273 - addi s3, sp, 2047 - addi s3, s3, 241 + addi s7, s7, 209 addi s9, sp, 2047 - addi s9, s9, 209 -.LBB28_378: # %ehcleanup724 - addi s2, sp, 2047 - addi s2, s2, 177 + addi s9, s9, 177 addi a1, sp, 2047 addi a1, a1, 145 ld a0, 240(s10) - bne a0, a1, .LBB28_389 -# %bb.379: # %ehcleanup727 + beq a0, a1, .LBB28_379 +.LBB28_378: # %if.then.i.i1870 + call _ZdlPv@plt +.LBB28_379: # %ehcleanup727 ld a0, 272(s10) - bne a0, s2, .LBB28_390 -.LBB28_380: # %ehcleanup730 + bne a0, s9, .LBB28_389 +# %bb.380: # %ehcleanup730 ld a0, 304(s10) - bne a0, s9, .LBB28_391 + bne a0, s7, .LBB28_390 .LBB28_381: # %ehcleanup733 ld a0, 336(s10) - bne a0, s3, .LBB28_392 + bne a0, s2, .LBB28_391 .LBB28_382: # %ehcleanup736 ld a0, 368(s10) - bne a0, s7, .LBB28_393 + bne a0, s5, .LBB28_392 .LBB28_383: # %ehcleanup739 ld a0, 400(s10) - bne a0, s5, .LBB28_394 + bne a0, s4, .LBB28_393 .LBB28_384: # %ehcleanup742 ld a0, 432(s10) - beq a0, s4, .LBB28_386 + beq a0, s3, .LBB28_386 .LBB28_385: # %if.then.i.i1906 call _ZdlPv@plt .LBB28_386: # %ehcleanup743 @@ -15483,1172 +15485,1165 @@ .LBB28_388: # %cleanup.done mv a0, s11 call _Unwind_Resume@plt -.LBB28_389: # %if.then.i.i1870 - call _ZdlPv@plt - ld a0, 272(s10) - beq a0, s2, .LBB28_380 -.LBB28_390: # %if.then.i.i1876 +.LBB28_389: # %if.then.i.i1876 call _ZdlPv@plt ld a0, 304(s10) - beq a0, s9, .LBB28_381 -.LBB28_391: # %if.then.i.i1882 + beq a0, s7, .LBB28_381 +.LBB28_390: # %if.then.i.i1882 call _ZdlPv@plt ld a0, 336(s10) - beq a0, s3, .LBB28_382 -.LBB28_392: # %if.then.i.i1888 + beq a0, s2, .LBB28_382 +.LBB28_391: # %if.then.i.i1888 call _ZdlPv@plt ld a0, 368(s10) - beq a0, s7, .LBB28_383 -.LBB28_393: # %if.then.i.i1894 + beq a0, s5, .LBB28_383 +.LBB28_392: # %if.then.i.i1894 call _ZdlPv@plt ld a0, 400(s10) - beq a0, s5, .LBB28_384 -.LBB28_394: # %if.then.i.i1900 + beq a0, s4, .LBB28_384 +.LBB28_393: # %if.then.i.i1900 call _ZdlPv@plt ld a0, 432(s10) - bne a0, s4, .LBB28_385 + bne a0, s3, .LBB28_385 j .LBB28_386 -.LBB28_395: # %if.then.i.i1834 +.LBB28_394: # %if.then.i.i1834 call _ZdlPv@plt ld a0, 80(s10) addi a1, sp, 2032 beq a0, a1, .LBB28_371 -.LBB28_396: # %if.then.i.i1840 +.LBB28_395: # %if.then.i.i1840 call _ZdlPv@plt ld a0, 112(s10) addi a1, sp, 2047 addi a1, a1, 17 beq a0, a1, .LBB28_372 -.LBB28_397: # %if.then.i.i1846 +.LBB28_396: # %if.then.i.i1846 call _ZdlPv@plt ld a0, 144(s10) addi a1, sp, 2047 addi a1, a1, 49 beq a0, a1, .LBB28_373 -.LBB28_398: # %if.then.i.i1852 +.LBB28_397: # %if.then.i.i1852 call _ZdlPv@plt ld a0, 176(s10) addi a1, sp, 2047 addi a1, a1, 81 bne a0, a1, .LBB28_374 j .LBB28_375 -.LBB28_399: # %if.then.i.i1468 +.LBB28_398: # %if.then.i.i1468 call _ZdlPv@plt ld a0, 64(sp) - beq a0, s8, .LBB28_308 - j .LBB28_403 -.LBB28_400: # %lpad511 -.Ltmp1085: + addi a1, sp, 80 + beq a0, a1, .LBB28_308 j .LBB28_402 -.LBB28_401: # %lpad506 +.LBB28_399: # %lpad511 +.Ltmp1085: + j .LBB28_401 +.LBB28_400: # %lpad506 .Ltmp1082: -.LBB28_402: # %ehcleanup526 +.LBB28_401: # %ehcleanup526 mv s6, s0 mv s11, a0 ld a0, 64(sp) - beq a0, s8, .LBB28_308 -.LBB28_403: # %if.then.i.i1474 + addi a1, sp, 80 + beq a0, a1, .LBB28_308 +.LBB28_402: # %if.then.i.i1474 call _ZdlPv@plt ld a0, 96(sp) beq a0, s4, .LBB28_309 - j .LBB28_407 -.LBB28_404: # %lpad504 -.Ltmp1079: j .LBB28_406 -.LBB28_405: # %lpad499 +.LBB28_403: # %lpad504 +.Ltmp1079: + j .LBB28_405 +.LBB28_404: # %lpad499 .Ltmp1076: -.LBB28_406: # %ehcleanup529 +.LBB28_405: # %ehcleanup529 mv s6, s0 mv s11, a0 ld a0, 96(sp) beq a0, s4, .LBB28_309 -.LBB28_407: # %if.then.i.i1480 +.LBB28_406: # %if.then.i.i1480 call _ZdlPv@plt ld a0, 128(sp) beq a0, s6, .LBB28_310 - j .LBB28_411 -.LBB28_408: # %lpad497 -.Ltmp1073: j .LBB28_410 -.LBB28_409: # %lpad492 +.LBB28_407: # %lpad497 +.Ltmp1073: + j .LBB28_409 +.LBB28_408: # %lpad492 .Ltmp1070: -.LBB28_410: # %ehcleanup532 +.LBB28_409: # %ehcleanup532 mv s6, s0 mv s11, a0 ld a0, 128(sp) beq a0, s0, .LBB28_310 -.LBB28_411: # %if.then.i.i1486 +.LBB28_410: # %if.then.i.i1486 call _ZdlPv@plt ld a0, 160(sp) beq a0, s9, .LBB28_311 - j .LBB28_414 -.LBB28_412: # %lpad490 + j .LBB28_413 +.LBB28_411: # %lpad490 .Ltmp1067: mv s11, a0 ld a0, 160(sp) beq a0, s9, .LBB28_311 - j .LBB28_414 -.LBB28_413: # %lpad485 + j .LBB28_413 +.LBB28_412: # %lpad485 .Ltmp1064: mv s11, a0 ld a0, 160(sp) beq a0, s9, .LBB28_311 -.LBB28_414: # %if.then.i.i1492 +.LBB28_413: # %if.then.i.i1492 call _ZdlPv@plt ld a0, 192(sp) - addi a1, sp, 208 - beq a0, a1, .LBB28_312 -.LBB28_415: # %if.then.i.i1498 + beq a0, s8, .LBB28_312 +.LBB28_414: # %if.then.i.i1498 call _ZdlPv@plt ld a0, 224(sp) - addi a1, sp, 240 - beq a0, a1, .LBB28_313 -.LBB28_416: # %if.then.i.i1504 + beq a0, s7, .LBB28_313 +.LBB28_415: # %if.then.i.i1504 call _ZdlPv@plt ld a0, 256(sp) addi a1, sp, 272 beq a0, a1, .LBB28_314 -.LBB28_417: # %if.then.i.i1510 +.LBB28_416: # %if.then.i.i1510 call _ZdlPv@plt ld a0, 288(sp) addi a1, sp, 304 beq a0, a1, .LBB28_315 -.LBB28_418: # %if.then.i.i1516 +.LBB28_417: # %if.then.i.i1516 call _ZdlPv@plt ld a0, 320(sp) addi a1, sp, 336 beq a0, a1, .LBB28_316 -.LBB28_419: # %if.then.i.i1522 +.LBB28_418: # %if.then.i.i1522 call _ZdlPv@plt ld a0, 352(sp) addi a1, sp, 368 beq a0, a1, .LBB28_317 -.LBB28_420: # %if.then.i.i1528 +.LBB28_419: # %if.then.i.i1528 call _ZdlPv@plt ld a0, 384(sp) addi a1, sp, 400 beq a0, a1, .LBB28_318 -.LBB28_421: # %if.then.i.i1534 +.LBB28_420: # %if.then.i.i1534 call _ZdlPv@plt ld a0, 416(sp) addi a1, sp, 432 beq a0, a1, .LBB28_319 -.LBB28_422: # %if.then.i.i1540 +.LBB28_421: # %if.then.i.i1540 call _ZdlPv@plt ld a0, 448(sp) addi a1, sp, 464 beq a0, a1, .LBB28_320 -.LBB28_423: # %if.then.i.i1546 +.LBB28_422: # %if.then.i.i1546 call _ZdlPv@plt ld a0, 480(sp) addi a1, sp, 496 beq a0, a1, .LBB28_321 -.LBB28_424: # %if.then.i.i1552 +.LBB28_423: # %if.then.i.i1552 call _ZdlPv@plt ld a0, 512(sp) addi a1, sp, 528 beq a0, a1, .LBB28_322 -.LBB28_425: # %if.then.i.i1558 +.LBB28_424: # %if.then.i.i1558 call _ZdlPv@plt ld a0, 544(sp) addi a1, sp, 560 beq a0, a1, .LBB28_323 -.LBB28_426: # %if.then.i.i1564 +.LBB28_425: # %if.then.i.i1564 call _ZdlPv@plt ld a0, 576(sp) addi a1, sp, 592 beq a0, a1, .LBB28_324 -.LBB28_427: # %if.then.i.i1570 +.LBB28_426: # %if.then.i.i1570 call _ZdlPv@plt ld a0, 608(sp) addi a1, sp, 624 beq a0, a1, .LBB28_325 -.LBB28_428: # %if.then.i.i1576 +.LBB28_427: # %if.then.i.i1576 call _ZdlPv@plt ld a0, 640(sp) addi a1, sp, 656 beq a0, a1, .LBB28_326 -.LBB28_429: # %if.then.i.i1582 +.LBB28_428: # %if.then.i.i1582 call _ZdlPv@plt ld a0, 672(sp) addi a1, sp, 688 beq a0, a1, .LBB28_327 -.LBB28_430: # %if.then.i.i1588 +.LBB28_429: # %if.then.i.i1588 call _ZdlPv@plt ld a0, 704(sp) addi a1, sp, 720 beq a0, a1, .LBB28_328 -.LBB28_431: # %if.then.i.i1594 +.LBB28_430: # %if.then.i.i1594 call _ZdlPv@plt ld a0, 736(sp) addi a1, sp, 752 beq a0, a1, .LBB28_329 -.LBB28_432: # %if.then.i.i1600 +.LBB28_431: # %if.then.i.i1600 call _ZdlPv@plt ld a0, 768(sp) addi a1, sp, 784 beq a0, a1, .LBB28_330 -.LBB28_433: # %if.then.i.i1606 +.LBB28_432: # %if.then.i.i1606 call _ZdlPv@plt ld a0, 800(sp) addi a1, sp, 816 beq a0, a1, .LBB28_331 -.LBB28_434: # %if.then.i.i1612 +.LBB28_433: # %if.then.i.i1612 call _ZdlPv@plt ld a0, 832(sp) addi a1, sp, 848 beq a0, a1, .LBB28_332 -.LBB28_435: # %if.then.i.i1618 +.LBB28_434: # %if.then.i.i1618 call _ZdlPv@plt ld a0, 864(sp) addi a1, sp, 880 beq a0, a1, .LBB28_333 -.LBB28_436: # %if.then.i.i1624 +.LBB28_435: # %if.then.i.i1624 call _ZdlPv@plt ld a0, 896(sp) addi a1, sp, 912 beq a0, a1, .LBB28_334 -.LBB28_437: # %if.then.i.i1630 +.LBB28_436: # %if.then.i.i1630 call _ZdlPv@plt ld a0, 928(sp) addi a1, sp, 944 beq a0, a1, .LBB28_335 -.LBB28_438: # %if.then.i.i1636 +.LBB28_437: # %if.then.i.i1636 call _ZdlPv@plt ld a0, 960(sp) addi a1, sp, 976 beq a0, a1, .LBB28_336 -.LBB28_439: # %if.then.i.i1642 +.LBB28_438: # %if.then.i.i1642 call _ZdlPv@plt ld a0, 992(sp) addi a1, sp, 1008 beq a0, a1, .LBB28_337 -.LBB28_440: # %if.then.i.i1648 +.LBB28_439: # %if.then.i.i1648 call _ZdlPv@plt ld a0, 1024(sp) addi a1, sp, 1040 beq a0, a1, .LBB28_338 -.LBB28_441: # %if.then.i.i1654 +.LBB28_440: # %if.then.i.i1654 call _ZdlPv@plt ld a0, 1056(sp) addi a1, sp, 1072 beq a0, a1, .LBB28_339 -.LBB28_442: # %if.then.i.i1660 +.LBB28_441: # %if.then.i.i1660 call _ZdlPv@plt ld a0, 1088(sp) addi a1, sp, 1104 beq a0, a1, .LBB28_340 -.LBB28_443: # %if.then.i.i1666 +.LBB28_442: # %if.then.i.i1666 call _ZdlPv@plt ld a0, 1120(sp) addi a1, sp, 1136 beq a0, a1, .LBB28_341 -.LBB28_444: # %if.then.i.i1672 +.LBB28_443: # %if.then.i.i1672 call _ZdlPv@plt ld a0, 1152(sp) addi a1, sp, 1168 beq a0, a1, .LBB28_342 -.LBB28_445: # %if.then.i.i1678 +.LBB28_444: # %if.then.i.i1678 call _ZdlPv@plt ld a0, 1184(sp) addi a1, sp, 1200 beq a0, a1, .LBB28_343 -.LBB28_446: # %if.then.i.i1684 +.LBB28_445: # %if.then.i.i1684 call _ZdlPv@plt ld a0, 1216(sp) addi a1, sp, 1232 beq a0, a1, .LBB28_344 -.LBB28_447: # %if.then.i.i1690 +.LBB28_446: # %if.then.i.i1690 call _ZdlPv@plt ld a0, 1248(sp) addi a1, sp, 1264 beq a0, a1, .LBB28_345 -.LBB28_448: # %if.then.i.i1696 +.LBB28_447: # %if.then.i.i1696 call _ZdlPv@plt ld a0, 1280(sp) addi a1, sp, 1296 beq a0, a1, .LBB28_346 -.LBB28_449: # %if.then.i.i1702 +.LBB28_448: # %if.then.i.i1702 call _ZdlPv@plt ld a0, 1312(sp) addi a1, sp, 1328 beq a0, a1, .LBB28_347 -.LBB28_450: # %if.then.i.i1708 +.LBB28_449: # %if.then.i.i1708 call _ZdlPv@plt ld a0, 1344(sp) addi a1, sp, 1360 beq a0, a1, .LBB28_348 -.LBB28_451: # %if.then.i.i1714 +.LBB28_450: # %if.then.i.i1714 call _ZdlPv@plt ld a0, 1376(sp) addi a1, sp, 1392 beq a0, a1, .LBB28_349 -.LBB28_452: # %if.then.i.i1720 +.LBB28_451: # %if.then.i.i1720 call _ZdlPv@plt ld a0, 1408(sp) addi a1, sp, 1424 beq a0, a1, .LBB28_350 -.LBB28_453: # %if.then.i.i1726 +.LBB28_452: # %if.then.i.i1726 call _ZdlPv@plt ld a0, 1440(sp) addi a1, sp, 1456 beq a0, a1, .LBB28_351 -.LBB28_454: # %if.then.i.i1732 +.LBB28_453: # %if.then.i.i1732 call _ZdlPv@plt ld a0, 1472(sp) addi a1, sp, 1488 beq a0, a1, .LBB28_352 -.LBB28_455: # %if.then.i.i1738 +.LBB28_454: # %if.then.i.i1738 call _ZdlPv@plt ld a0, 1504(sp) addi a1, sp, 1520 beq a0, a1, .LBB28_353 -.LBB28_456: # %if.then.i.i1744 +.LBB28_455: # %if.then.i.i1744 call _ZdlPv@plt ld a0, 1536(sp) addi a1, sp, 1552 beq a0, a1, .LBB28_354 -.LBB28_457: # %if.then.i.i1750 +.LBB28_456: # %if.then.i.i1750 call _ZdlPv@plt ld a0, 1568(sp) addi a1, sp, 1584 beq a0, a1, .LBB28_355 -.LBB28_458: # %if.then.i.i1756 +.LBB28_457: # %if.then.i.i1756 call _ZdlPv@plt ld a0, 1600(sp) addi a1, sp, 1616 beq a0, a1, .LBB28_356 -.LBB28_459: # %if.then.i.i1762 +.LBB28_458: # %if.then.i.i1762 call _ZdlPv@plt ld a0, 1632(sp) addi a1, sp, 1648 beq a0, a1, .LBB28_357 -.LBB28_460: # %if.then.i.i1768 +.LBB28_459: # %if.then.i.i1768 call _ZdlPv@plt ld a0, 1664(sp) addi a1, sp, 1680 beq a0, a1, .LBB28_358 -.LBB28_461: # %if.then.i.i1774 +.LBB28_460: # %if.then.i.i1774 call _ZdlPv@plt ld a0, 1696(sp) addi a1, sp, 1712 beq a0, a1, .LBB28_359 -.LBB28_462: # %if.then.i.i1780 +.LBB28_461: # %if.then.i.i1780 call _ZdlPv@plt ld a0, 1728(sp) addi a1, sp, 1744 beq a0, a1, .LBB28_360 -.LBB28_463: # %if.then.i.i1786 +.LBB28_462: # %if.then.i.i1786 call _ZdlPv@plt ld a0, 1760(sp) addi a1, sp, 1776 beq a0, a1, .LBB28_361 -.LBB28_464: # %if.then.i.i1792 +.LBB28_463: # %if.then.i.i1792 call _ZdlPv@plt ld a0, 1792(sp) addi a1, sp, 1808 beq a0, a1, .LBB28_362 -.LBB28_465: # %if.then.i.i1798 +.LBB28_464: # %if.then.i.i1798 call _ZdlPv@plt ld a0, 1824(sp) addi a1, sp, 1840 beq a0, a1, .LBB28_363 -.LBB28_466: # %if.then.i.i1804 +.LBB28_465: # %if.then.i.i1804 call _ZdlPv@plt ld a0, 1856(sp) addi a1, sp, 1872 beq a0, a1, .LBB28_364 -.LBB28_467: # %if.then.i.i1810 +.LBB28_466: # %if.then.i.i1810 call _ZdlPv@plt ld a0, 1888(sp) addi a1, sp, 1904 beq a0, a1, .LBB28_365 -.LBB28_468: # %if.then.i.i1816 +.LBB28_467: # %if.then.i.i1816 call _ZdlPv@plt ld a0, 1920(sp) bne a0, s10, .LBB28_366 j .LBB28_367 -.LBB28_469: # %lpad478 +.LBB28_468: # %lpad478 .Ltmp1061: mv s11, a0 ld a0, 192(sp) - addi a1, sp, 208 - beq a0, a1, .LBB28_312 - j .LBB28_415 -.LBB28_470: # %lpad476 + beq a0, s8, .LBB28_312 + j .LBB28_414 +.LBB28_469: # %lpad476 .Ltmp1058: mv s11, a0 ld a0, 224(sp) - addi a1, sp, 240 - beq a0, a1, .LBB28_313 - j .LBB28_416 -.LBB28_471: # %lpad471 + beq a0, s7, .LBB28_313 + j .LBB28_415 +.LBB28_470: # %lpad471 .Ltmp1055: mv s11, a0 ld a0, 224(sp) - addi a1, sp, 240 - beq a0, a1, .LBB28_313 - j .LBB28_416 -.LBB28_472: # %lpad469 + beq a0, s7, .LBB28_313 + j .LBB28_415 +.LBB28_471: # %lpad469 .Ltmp1052: mv s11, a0 ld a0, 256(sp) addi a1, sp, 272 beq a0, a1, .LBB28_314 - j .LBB28_417 -.LBB28_473: # %lpad464 + j .LBB28_416 +.LBB28_472: # %lpad464 .Ltmp1049: mv s11, a0 ld a0, 256(sp) addi a1, sp, 272 beq a0, a1, .LBB28_314 - j .LBB28_417 -.LBB28_474: # %lpad462 + j .LBB28_416 +.LBB28_473: # %lpad462 .Ltmp1046: mv s11, a0 ld a0, 288(sp) addi a1, sp, 304 beq a0, a1, .LBB28_315 - j .LBB28_418 -.LBB28_475: # %lpad457 + j .LBB28_417 +.LBB28_474: # %lpad457 .Ltmp1043: mv s11, a0 ld a0, 288(sp) addi a1, sp, 304 beq a0, a1, .LBB28_315 - j .LBB28_418 -.LBB28_476: # %lpad455 + j .LBB28_417 +.LBB28_475: # %lpad455 .Ltmp1040: mv s11, a0 ld a0, 320(sp) addi a1, sp, 336 beq a0, a1, .LBB28_316 - j .LBB28_419 -.LBB28_477: # %lpad450 + j .LBB28_418 +.LBB28_476: # %lpad450 .Ltmp1037: mv s11, a0 ld a0, 320(sp) addi a1, sp, 336 beq a0, a1, .LBB28_316 - j .LBB28_419 -.LBB28_478: # %lpad448 + j .LBB28_418 +.LBB28_477: # %lpad448 .Ltmp1034: - j .LBB28_480 -.LBB28_479: # %lpad443 + j .LBB28_479 +.LBB28_478: # %lpad443 .Ltmp1031: -.LBB28_480: # %ehcleanup553 +.LBB28_479: # %ehcleanup553 mv s11, a0 li s3, 1 ld a0, 352(sp) addi a1, sp, 368 beq a0, a1, .LBB28_317 - j .LBB28_420 -.LBB28_481: # %lpad441 + j .LBB28_419 +.LBB28_480: # %lpad441 .Ltmp1028: mv s11, a0 ld a0, 384(sp) addi a1, sp, 400 beq a0, a1, .LBB28_318 - j .LBB28_421 -.LBB28_482: # %lpad436 + j .LBB28_420 +.LBB28_481: # %lpad436 .Ltmp1025: mv s11, a0 ld a0, 384(sp) addi a1, sp, 400 beq a0, a1, .LBB28_318 - j .LBB28_421 -.LBB28_483: # %lpad434 + j .LBB28_420 +.LBB28_482: # %lpad434 .Ltmp1022: mv s11, a0 ld a0, 416(sp) addi a1, sp, 432 beq a0, a1, .LBB28_319 - j .LBB28_422 -.LBB28_484: # %lpad429 + j .LBB28_421 +.LBB28_483: # %lpad429 .Ltmp1019: mv s11, a0 ld a0, 416(sp) addi a1, sp, 432 beq a0, a1, .LBB28_319 - j .LBB28_422 -.LBB28_485: # %lpad427 + j .LBB28_421 +.LBB28_484: # %lpad427 .Ltmp1016: mv s11, a0 ld a0, 448(sp) addi a1, sp, 464 beq a0, a1, .LBB28_320 - j .LBB28_423 -.LBB28_486: # %lpad422 + j .LBB28_422 +.LBB28_485: # %lpad422 .Ltmp1013: mv s11, a0 ld a0, 448(sp) addi a1, sp, 464 beq a0, a1, .LBB28_320 - j .LBB28_423 -.LBB28_487: # %lpad420 + j .LBB28_422 +.LBB28_486: # %lpad420 .Ltmp1010: mv s11, a0 ld a0, 480(sp) addi a1, sp, 496 beq a0, a1, .LBB28_321 - j .LBB28_424 -.LBB28_488: # %lpad415 + j .LBB28_423 +.LBB28_487: # %lpad415 .Ltmp1007: mv s11, a0 ld a0, 480(sp) addi a1, sp, 496 beq a0, a1, .LBB28_321 - j .LBB28_424 -.LBB28_489: # %lpad413 + j .LBB28_423 +.LBB28_488: # %lpad413 .Ltmp1004: mv s11, a0 ld a0, 512(sp) addi a1, sp, 528 beq a0, a1, .LBB28_322 - j .LBB28_425 -.LBB28_490: # %lpad408 + j .LBB28_424 +.LBB28_489: # %lpad408 .Ltmp1001: mv s11, a0 ld a0, 512(sp) addi a1, sp, 528 beq a0, a1, .LBB28_322 - j .LBB28_425 -.LBB28_491: # %lpad401 + j .LBB28_424 +.LBB28_490: # %lpad401 .Ltmp998: mv s11, a0 ld a0, 544(sp) addi a1, sp, 560 beq a0, a1, .LBB28_323 - j .LBB28_426 -.LBB28_492: # %lpad399 + j .LBB28_425 +.LBB28_491: # %lpad399 .Ltmp995: mv s11, a0 ld a0, 576(sp) addi a1, sp, 592 beq a0, a1, .LBB28_324 - j .LBB28_427 -.LBB28_493: # %lpad394 + j .LBB28_426 +.LBB28_492: # %lpad394 .Ltmp992: mv s11, a0 ld a0, 576(sp) addi a1, sp, 592 beq a0, a1, .LBB28_324 - j .LBB28_427 -.LBB28_494: # %lpad392 + j .LBB28_426 +.LBB28_493: # %lpad392 .Ltmp989: mv s11, a0 ld a0, 608(sp) addi a1, sp, 624 beq a0, a1, .LBB28_325 - j .LBB28_428 -.LBB28_495: # %lpad387 + j .LBB28_427 +.LBB28_494: # %lpad387 .Ltmp986: mv s11, a0 ld a0, 608(sp) addi a1, sp, 624 beq a0, a1, .LBB28_325 - j .LBB28_428 -.LBB28_496: # %lpad385 + j .LBB28_427 +.LBB28_495: # %lpad385 .Ltmp983: mv s11, a0 ld a0, 640(sp) addi a1, sp, 656 beq a0, a1, .LBB28_326 - j .LBB28_429 -.LBB28_497: # %lpad380 + j .LBB28_428 +.LBB28_496: # %lpad380 .Ltmp980: mv s11, a0 ld a0, 640(sp) addi a1, sp, 656 beq a0, a1, .LBB28_326 - j .LBB28_429 -.LBB28_498: # %lpad378 + j .LBB28_428 +.LBB28_497: # %lpad378 .Ltmp977: mv s11, a0 ld a0, 672(sp) addi a1, sp, 688 beq a0, a1, .LBB28_327 - j .LBB28_430 -.LBB28_499: # %lpad373 + j .LBB28_429 +.LBB28_498: # %lpad373 .Ltmp974: mv s11, a0 ld a0, 672(sp) addi a1, sp, 688 beq a0, a1, .LBB28_327 - j .LBB28_430 -.LBB28_500: # %lpad371 + j .LBB28_429 +.LBB28_499: # %lpad371 .Ltmp971: - j .LBB28_502 -.LBB28_501: # %lpad366 + j .LBB28_501 +.LBB28_500: # %lpad366 .Ltmp968: -.LBB28_502: # %ehcleanup586 +.LBB28_501: # %ehcleanup586 mv s11, a0 li s3, 1 ld a0, 704(sp) addi a1, sp, 720 beq a0, a1, .LBB28_328 - j .LBB28_431 -.LBB28_503: # %lpad364 + j .LBB28_430 +.LBB28_502: # %lpad364 .Ltmp965: mv s11, a0 ld a0, 736(sp) addi a1, sp, 752 beq a0, a1, .LBB28_329 - j .LBB28_432 -.LBB28_504: # %lpad359 + j .LBB28_431 +.LBB28_503: # %lpad359 .Ltmp962: mv s11, a0 ld a0, 736(sp) addi a1, sp, 752 beq a0, a1, .LBB28_329 - j .LBB28_432 -.LBB28_505: # %lpad357 + j .LBB28_431 +.LBB28_504: # %lpad357 .Ltmp959: mv s11, a0 ld a0, 768(sp) addi a1, sp, 784 beq a0, a1, .LBB28_330 - j .LBB28_433 -.LBB28_506: # %lpad352 + j .LBB28_432 +.LBB28_505: # %lpad352 .Ltmp956: mv s11, a0 ld a0, 768(sp) addi a1, sp, 784 beq a0, a1, .LBB28_330 - j .LBB28_433 -.LBB28_507: # %lpad350 + j .LBB28_432 +.LBB28_506: # %lpad350 .Ltmp953: mv s11, a0 ld a0, 800(sp) addi a1, sp, 816 beq a0, a1, .LBB28_331 - j .LBB28_434 -.LBB28_508: # %lpad345 + j .LBB28_433 +.LBB28_507: # %lpad345 .Ltmp950: mv s11, a0 ld a0, 800(sp) addi a1, sp, 816 beq a0, a1, .LBB28_331 - j .LBB28_434 -.LBB28_509: # %lpad343 + j .LBB28_433 +.LBB28_508: # %lpad343 .Ltmp947: mv s11, a0 ld a0, 832(sp) addi a1, sp, 848 beq a0, a1, .LBB28_332 - j .LBB28_435 -.LBB28_510: # %lpad338 + j .LBB28_434 +.LBB28_509: # %lpad338 .Ltmp944: mv s11, a0 ld a0, 832(sp) addi a1, sp, 848 beq a0, a1, .LBB28_332 - j .LBB28_435 -.LBB28_511: # %lpad336 + j .LBB28_434 +.LBB28_510: # %lpad336 .Ltmp941: mv s11, a0 ld a0, 864(sp) addi a1, sp, 880 beq a0, a1, .LBB28_333 - j .LBB28_436 -.LBB28_512: # %lpad331 + j .LBB28_435 +.LBB28_511: # %lpad331 .Ltmp938: mv s11, a0 ld a0, 864(sp) addi a1, sp, 880 beq a0, a1, .LBB28_333 - j .LBB28_436 -.LBB28_513: # %lpad324 + j .LBB28_435 +.LBB28_512: # %lpad324 .Ltmp935: mv s11, a0 ld a0, 896(sp) addi a1, sp, 912 beq a0, a1, .LBB28_334 - j .LBB28_437 -.LBB28_514: # %lpad322 + j .LBB28_436 +.LBB28_513: # %lpad322 .Ltmp932: mv s11, a0 ld a0, 928(sp) addi a1, sp, 944 beq a0, a1, .LBB28_335 - j .LBB28_438 -.LBB28_515: # %lpad317 + j .LBB28_437 +.LBB28_514: # %lpad317 .Ltmp929: mv s11, a0 ld a0, 928(sp) addi a1, sp, 944 beq a0, a1, .LBB28_335 - j .LBB28_438 -.LBB28_516: # %lpad315 + j .LBB28_437 +.LBB28_515: # %lpad315 .Ltmp926: mv s11, a0 ld a0, 960(sp) addi a1, sp, 976 beq a0, a1, .LBB28_336 - j .LBB28_439 -.LBB28_517: # %lpad310 + j .LBB28_438 +.LBB28_516: # %lpad310 .Ltmp923: mv s11, a0 ld a0, 960(sp) addi a1, sp, 976 beq a0, a1, .LBB28_336 - j .LBB28_439 -.LBB28_518: # %lpad308 + j .LBB28_438 +.LBB28_517: # %lpad308 .Ltmp920: mv s11, a0 ld a0, 992(sp) addi a1, sp, 1008 beq a0, a1, .LBB28_337 - j .LBB28_440 -.LBB28_519: # %lpad303 + j .LBB28_439 +.LBB28_518: # %lpad303 .Ltmp917: mv s11, a0 ld a0, 992(sp) addi a1, sp, 1008 beq a0, a1, .LBB28_337 - j .LBB28_440 -.LBB28_520: # %lpad301 + j .LBB28_439 +.LBB28_519: # %lpad301 .Ltmp914: mv s11, a0 ld a0, 1024(sp) addi a1, sp, 1040 beq a0, a1, .LBB28_338 - j .LBB28_441 -.LBB28_521: # %lpad296 + j .LBB28_440 +.LBB28_520: # %lpad296 .Ltmp911: mv s11, a0 ld a0, 1024(sp) addi a1, sp, 1040 beq a0, a1, .LBB28_338 - j .LBB28_441 -.LBB28_522: # %lpad294 + j .LBB28_440 +.LBB28_521: # %lpad294 .Ltmp908: - j .LBB28_524 -.LBB28_523: # %lpad289 + j .LBB28_523 +.LBB28_522: # %lpad289 .Ltmp905: -.LBB28_524: # %ehcleanup619 +.LBB28_523: # %ehcleanup619 mv s11, a0 li s3, 1 ld a0, 1056(sp) addi a1, sp, 1072 beq a0, a1, .LBB28_339 - j .LBB28_442 -.LBB28_525: # %lpad287 + j .LBB28_441 +.LBB28_524: # %lpad287 .Ltmp902: mv s11, a0 ld a0, 1088(sp) addi a1, sp, 1104 beq a0, a1, .LBB28_340 - j .LBB28_443 -.LBB28_526: # %lpad282 + j .LBB28_442 +.LBB28_525: # %lpad282 .Ltmp899: mv s11, a0 ld a0, 1088(sp) addi a1, sp, 1104 beq a0, a1, .LBB28_340 - j .LBB28_443 -.LBB28_527: # %lpad280 + j .LBB28_442 +.LBB28_526: # %lpad280 .Ltmp896: mv s11, a0 ld a0, 1120(sp) addi a1, sp, 1136 beq a0, a1, .LBB28_341 - j .LBB28_444 -.LBB28_528: # %lpad275 + j .LBB28_443 +.LBB28_527: # %lpad275 .Ltmp893: mv s11, a0 ld a0, 1120(sp) addi a1, sp, 1136 beq a0, a1, .LBB28_341 - j .LBB28_444 -.LBB28_529: # %lpad273 + j .LBB28_443 +.LBB28_528: # %lpad273 .Ltmp890: mv s11, a0 ld a0, 1152(sp) addi a1, sp, 1168 beq a0, a1, .LBB28_342 - j .LBB28_445 -.LBB28_530: # %lpad268 + j .LBB28_444 +.LBB28_529: # %lpad268 .Ltmp887: mv s11, a0 ld a0, 1152(sp) addi a1, sp, 1168 beq a0, a1, .LBB28_342 - j .LBB28_445 -.LBB28_531: # %lpad266 + j .LBB28_444 +.LBB28_530: # %lpad266 .Ltmp884: mv s11, a0 ld a0, 1184(sp) addi a1, sp, 1200 beq a0, a1, .LBB28_343 - j .LBB28_446 -.LBB28_532: # %lpad261 + j .LBB28_445 +.LBB28_531: # %lpad261 .Ltmp881: mv s11, a0 ld a0, 1184(sp) addi a1, sp, 1200 beq a0, a1, .LBB28_343 - j .LBB28_446 -.LBB28_533: # %lpad259 + j .LBB28_445 +.LBB28_532: # %lpad259 .Ltmp878: mv s11, a0 ld a0, 1216(sp) addi a1, sp, 1232 beq a0, a1, .LBB28_344 - j .LBB28_447 -.LBB28_534: # %lpad254 + j .LBB28_446 +.LBB28_533: # %lpad254 .Ltmp875: mv s11, a0 ld a0, 1216(sp) addi a1, sp, 1232 beq a0, a1, .LBB28_344 - j .LBB28_447 -.LBB28_535: # %lpad247 + j .LBB28_446 +.LBB28_534: # %lpad247 .Ltmp872: mv s11, a0 ld a0, 1248(sp) addi a1, sp, 1264 beq a0, a1, .LBB28_345 - j .LBB28_448 -.LBB28_536: # %lpad245 + j .LBB28_447 +.LBB28_535: # %lpad245 .Ltmp869: mv s11, a0 ld a0, 1280(sp) addi a1, sp, 1296 beq a0, a1, .LBB28_346 - j .LBB28_449 -.LBB28_537: # %lpad240 + j .LBB28_448 +.LBB28_536: # %lpad240 .Ltmp866: mv s11, a0 ld a0, 1280(sp) addi a1, sp, 1296 beq a0, a1, .LBB28_346 - j .LBB28_449 -.LBB28_538: # %lpad238 + j .LBB28_448 +.LBB28_537: # %lpad238 .Ltmp863: mv s11, a0 ld a0, 1312(sp) addi a1, sp, 1328 beq a0, a1, .LBB28_347 - j .LBB28_450 -.LBB28_539: # %lpad233 + j .LBB28_449 +.LBB28_538: # %lpad233 .Ltmp860: mv s11, a0 ld a0, 1312(sp) addi a1, sp, 1328 beq a0, a1, .LBB28_347 - j .LBB28_450 -.LBB28_540: # %lpad231 + j .LBB28_449 +.LBB28_539: # %lpad231 .Ltmp857: mv s11, a0 ld a0, 1344(sp) addi a1, sp, 1360 beq a0, a1, .LBB28_348 - j .LBB28_451 -.LBB28_541: # %lpad226 + j .LBB28_450 +.LBB28_540: # %lpad226 .Ltmp854: mv s11, a0 ld a0, 1344(sp) addi a1, sp, 1360 beq a0, a1, .LBB28_348 - j .LBB28_451 -.LBB28_542: # %lpad224 + j .LBB28_450 +.LBB28_541: # %lpad224 .Ltmp851: mv s11, a0 ld a0, 1376(sp) addi a1, sp, 1392 beq a0, a1, .LBB28_349 - j .LBB28_452 -.LBB28_543: # %lpad219 + j .LBB28_451 +.LBB28_542: # %lpad219 .Ltmp848: mv s11, a0 ld a0, 1376(sp) addi a1, sp, 1392 beq a0, a1, .LBB28_349 - j .LBB28_452 -.LBB28_544: # %lpad217 + j .LBB28_451 +.LBB28_543: # %lpad217 .Ltmp845: - j .LBB28_546 -.LBB28_545: # %lpad212 + j .LBB28_545 +.LBB28_544: # %lpad212 .Ltmp842: -.LBB28_546: # %ehcleanup652 +.LBB28_545: # %ehcleanup652 mv s11, a0 li s3, 1 ld a0, 1408(sp) addi a1, sp, 1424 beq a0, a1, .LBB28_350 - j .LBB28_453 -.LBB28_547: # %lpad210 + j .LBB28_452 +.LBB28_546: # %lpad210 .Ltmp839: mv s11, a0 ld a0, 1440(sp) addi a1, sp, 1456 beq a0, a1, .LBB28_351 - j .LBB28_454 -.LBB28_548: # %lpad205 + j .LBB28_453 +.LBB28_547: # %lpad205 .Ltmp836: mv s11, a0 ld a0, 1440(sp) addi a1, sp, 1456 beq a0, a1, .LBB28_351 - j .LBB28_454 -.LBB28_549: # %lpad203 + j .LBB28_453 +.LBB28_548: # %lpad203 .Ltmp833: mv s11, a0 ld a0, 1472(sp) addi a1, sp, 1488 beq a0, a1, .LBB28_352 - j .LBB28_455 -.LBB28_550: # %lpad198 + j .LBB28_454 +.LBB28_549: # %lpad198 .Ltmp830: mv s11, a0 ld a0, 1472(sp) addi a1, sp, 1488 beq a0, a1, .LBB28_352 - j .LBB28_455 -.LBB28_551: # %lpad196 + j .LBB28_454 +.LBB28_550: # %lpad196 .Ltmp827: mv s11, a0 ld a0, 1504(sp) addi a1, sp, 1520 beq a0, a1, .LBB28_353 - j .LBB28_456 -.LBB28_552: # %lpad191 + j .LBB28_455 +.LBB28_551: # %lpad191 .Ltmp824: mv s11, a0 ld a0, 1504(sp) addi a1, sp, 1520 beq a0, a1, .LBB28_353 - j .LBB28_456 -.LBB28_553: # %lpad184 + j .LBB28_455 +.LBB28_552: # %lpad184 .Ltmp821: mv s11, a0 ld a0, 1536(sp) addi a1, sp, 1552 beq a0, a1, .LBB28_354 - j .LBB28_457 -.LBB28_554: # %lpad182 + j .LBB28_456 +.LBB28_553: # %lpad182 .Ltmp818: mv s11, a0 ld a0, 1568(sp) addi a1, sp, 1584 beq a0, a1, .LBB28_355 - j .LBB28_458 -.LBB28_555: # %lpad177 + j .LBB28_457 +.LBB28_554: # %lpad177 .Ltmp815: mv s11, a0 ld a0, 1568(sp) addi a1, sp, 1584 beq a0, a1, .LBB28_355 - j .LBB28_458 -.LBB28_556: # %lpad175 + j .LBB28_457 +.LBB28_555: # %lpad175 .Ltmp812: mv s11, a0 ld a0, 1600(sp) addi a1, sp, 1616 beq a0, a1, .LBB28_356 - j .LBB28_459 -.LBB28_557: # %lpad170 + j .LBB28_458 +.LBB28_556: # %lpad170 .Ltmp809: mv s11, a0 ld a0, 1600(sp) addi a1, sp, 1616 beq a0, a1, .LBB28_356 - j .LBB28_459 -.LBB28_558: # %lpad168 + j .LBB28_458 +.LBB28_557: # %lpad168 .Ltmp806: mv s11, a0 ld a0, 1632(sp) addi a1, sp, 1648 beq a0, a1, .LBB28_357 - j .LBB28_460 -.LBB28_559: # %lpad163 + j .LBB28_459 +.LBB28_558: # %lpad163 .Ltmp803: mv s11, a0 ld a0, 1632(sp) addi a1, sp, 1648 beq a0, a1, .LBB28_357 - j .LBB28_460 -.LBB28_560: # %lpad161 + j .LBB28_459 +.LBB28_559: # %lpad161 .Ltmp800: mv s11, a0 ld a0, 1664(sp) addi a1, sp, 1680 beq a0, a1, .LBB28_358 - j .LBB28_461 -.LBB28_561: # %lpad156 + j .LBB28_460 +.LBB28_560: # %lpad156 .Ltmp797: mv s11, a0 ld a0, 1664(sp) addi a1, sp, 1680 beq a0, a1, .LBB28_358 - j .LBB28_461 -.LBB28_562: # %lpad154 + j .LBB28_460 +.LBB28_561: # %lpad154 .Ltmp794: mv s11, a0 ld a0, 1696(sp) addi a1, sp, 1712 beq a0, a1, .LBB28_359 - j .LBB28_462 -.LBB28_563: # %lpad149 + j .LBB28_461 +.LBB28_562: # %lpad149 .Ltmp791: mv s11, a0 ld a0, 1696(sp) addi a1, sp, 1712 beq a0, a1, .LBB28_359 - j .LBB28_462 -.LBB28_564: # %lpad147 + j .LBB28_461 +.LBB28_563: # %lpad147 .Ltmp788: - j .LBB28_566 -.LBB28_565: # %lpad142 + j .LBB28_565 +.LBB28_564: # %lpad142 .Ltmp785: -.LBB28_566: # %ehcleanup682 +.LBB28_565: # %ehcleanup682 mv s11, a0 li s3, 1 ld a0, 1728(sp) addi a1, sp, 1744 beq a0, a1, .LBB28_360 - j .LBB28_463 -.LBB28_567: # %lpad140 + j .LBB28_462 +.LBB28_566: # %lpad140 .Ltmp782: mv s11, a0 ld a0, 1760(sp) addi a1, sp, 1776 beq a0, a1, .LBB28_361 - j .LBB28_464 -.LBB28_568: # %lpad135 + j .LBB28_463 +.LBB28_567: # %lpad135 .Ltmp779: mv s11, a0 ld a0, 1760(sp) addi a1, sp, 1776 beq a0, a1, .LBB28_361 - j .LBB28_464 -.LBB28_569: # %lpad133 + j .LBB28_463 +.LBB28_568: # %lpad133 .Ltmp776: mv s11, a0 ld a0, 1792(sp) addi a1, sp, 1808 beq a0, a1, .LBB28_362 - j .LBB28_465 -.LBB28_570: # %lpad128 + j .LBB28_464 +.LBB28_569: # %lpad128 .Ltmp773: mv s11, a0 ld a0, 1792(sp) addi a1, sp, 1808 beq a0, a1, .LBB28_362 - j .LBB28_465 -.LBB28_571: # %lpad126 + j .LBB28_464 +.LBB28_570: # %lpad126 .Ltmp770: mv s11, a0 ld a0, 1824(sp) addi a1, sp, 1840 beq a0, a1, .LBB28_363 - j .LBB28_466 -.LBB28_572: # %lpad121 + j .LBB28_465 +.LBB28_571: # %lpad121 .Ltmp767: mv s11, a0 ld a0, 1824(sp) addi a1, sp, 1840 beq a0, a1, .LBB28_363 - j .LBB28_466 -.LBB28_573: # %lpad114 + j .LBB28_465 +.LBB28_572: # %lpad114 .Ltmp764: mv s11, a0 ld a0, 1856(sp) addi a1, sp, 1872 beq a0, a1, .LBB28_364 - j .LBB28_467 -.LBB28_574: # %lpad112 + j .LBB28_466 +.LBB28_573: # %lpad112 .Ltmp761: mv s11, a0 ld a0, 1888(sp) addi a1, sp, 1904 beq a0, a1, .LBB28_365 - j .LBB28_468 -.LBB28_575: # %lpad107 + j .LBB28_467 +.LBB28_574: # %lpad107 .Ltmp758: mv s11, a0 ld a0, 1888(sp) addi a1, sp, 1904 beq a0, a1, .LBB28_365 - j .LBB28_468 -.LBB28_576: # %lpad105 + j .LBB28_467 +.LBB28_575: # %lpad105 .Ltmp755: mv s11, a0 ld a0, 1920(sp) bne a0, s10, .LBB28_366 j .LBB28_367 -.LBB28_577: # %lpad100 +.LBB28_576: # %lpad100 .Ltmp752: mv s11, a0 ld a0, 1920(sp) bne a0, s10, .LBB28_366 j .LBB28_367 -.LBB28_578: # %lpad98 +.LBB28_577: # %lpad98 .Ltmp749: - j .LBB28_580 -.LBB28_579: # %lpad93 + j .LBB28_579 +.LBB28_578: # %lpad93 .Ltmp746: -.LBB28_580: # %ehcleanup703 +.LBB28_579: # %ehcleanup703 mv s11, a0 li s0, 0 ld a0, 16(s10) addi a1, sp, 1968 bne a0, a1, .LBB28_368 j .LBB28_369 -.LBB28_581: # %lpad91 +.LBB28_580: # %lpad91 .Ltmp743: - j .LBB28_583 -.LBB28_582: # %lpad86 + j .LBB28_582 +.LBB28_581: # %lpad86 .Ltmp740: -.LBB28_583: # %ehcleanup706 +.LBB28_582: # %ehcleanup706 mv s11, a0 li s0, 0 j .LBB28_369 -.LBB28_584: # %lpad84 +.LBB28_583: # %lpad84 .Ltmp737: - j .LBB28_586 -.LBB28_585: # %lpad79 + j .LBB28_585 +.LBB28_584: # %lpad79 .Ltmp734: -.LBB28_586: # %ehcleanup709 +.LBB28_585: # %ehcleanup709 mv s11, a0 li s0, 0 ld a0, 80(s10) addi a1, sp, 2032 beq a0, a1, .LBB28_371 - j .LBB28_396 -.LBB28_587: # %lpad77 + j .LBB28_395 +.LBB28_586: # %lpad77 .Ltmp731: - j .LBB28_589 -.LBB28_588: # %lpad72 + j .LBB28_588 +.LBB28_587: # %lpad72 .Ltmp728: -.LBB28_589: # %ehcleanup712 +.LBB28_588: # %ehcleanup712 mv s11, a0 li s0, 0 ld a0, 112(s10) addi a1, sp, 2047 addi a1, a1, 17 beq a0, a1, .LBB28_372 - j .LBB28_397 -.LBB28_590: # %lpad70 + j .LBB28_396 +.LBB28_589: # %lpad70 .Ltmp725: - j .LBB28_592 -.LBB28_591: # %lpad65 + j .LBB28_591 +.LBB28_590: # %lpad65 .Ltmp722: -.LBB28_592: # %ehcleanup715 +.LBB28_591: # %ehcleanup715 mv s11, a0 li s0, 0 ld a0, 144(s10) addi a1, sp, 2047 addi a1, a1, 49 beq a0, a1, .LBB28_373 - j .LBB28_398 -.LBB28_593: # %lpad63 + j .LBB28_397 +.LBB28_592: # %lpad63 .Ltmp719: - j .LBB28_595 -.LBB28_594: # %lpad58 + j .LBB28_594 +.LBB28_593: # %lpad58 .Ltmp716: -.LBB28_595: # %ehcleanup718 +.LBB28_594: # %ehcleanup718 mv s11, a0 li s0, 0 ld a0, 176(s10) @@ -16656,89 +16651,89 @@ addi a1, a1, 81 bne a0, a1, .LBB28_374 j .LBB28_375 -.LBB28_596: # %lpad56 +.LBB28_595: # %lpad56 .Ltmp713: - j .LBB28_598 -.LBB28_597: # %lpad51 + j .LBB28_597 +.LBB28_596: # %lpad51 .Ltmp710: -.LBB28_598: # %ehcleanup721 +.LBB28_597: # %ehcleanup721 mv s11, a0 li s0, 0 ld a0, 208(s10) - bne a0, s4, .LBB28_376 + bne a0, s3, .LBB28_376 j .LBB28_377 -.LBB28_599: # %lpad44 +.LBB28_598: # %lpad44 .Ltmp707: mv s11, a0 li s0, 0 - j .LBB28_378 -.LBB28_600: # %lpad42 + addi a1, sp, 2047 + addi a1, a1, 145 + ld a0, 240(s10) + bne a0, a1, .LBB28_378 + j .LBB28_379 +.LBB28_599: # %lpad42 .Ltmp704: - j .LBB28_602 -.LBB28_601: # %lpad37 + j .LBB28_601 +.LBB28_600: # %lpad37 .Ltmp701: -.LBB28_602: # %ehcleanup727 +.LBB28_601: # %ehcleanup727 mv s11, a0 li s0, 0 - addi s2, sp, 2047 - addi s2, s2, 177 - ld a0, 272(s10) - beq a0, s2, .LBB28_380 - j .LBB28_390 -.LBB28_603: # %lpad35 + j .LBB28_379 +.LBB28_602: # %lpad35 .Ltmp698: - j .LBB28_605 -.LBB28_604: # %lpad30 + j .LBB28_604 +.LBB28_603: # %lpad30 .Ltmp695: -.LBB28_605: # %ehcleanup730 +.LBB28_604: # %ehcleanup730 mv s11, a0 li s0, 0 ld a0, 304(s10) - beq a0, s9, .LBB28_381 - j .LBB28_391 -.LBB28_606: # %lpad28 + beq a0, s7, .LBB28_381 + j .LBB28_390 +.LBB28_605: # %lpad28 .Ltmp692: - j .LBB28_608 -.LBB28_607: # %lpad23 + j .LBB28_607 +.LBB28_606: # %lpad23 .Ltmp689: -.LBB28_608: # %ehcleanup733 +.LBB28_607: # %ehcleanup733 mv s11, a0 li s0, 0 ld a0, 336(s10) - beq a0, s3, .LBB28_382 - j .LBB28_392 -.LBB28_609: # %lpad21 + beq a0, s2, .LBB28_382 + j .LBB28_391 +.LBB28_608: # %lpad21 .Ltmp686: - j .LBB28_611 -.LBB28_610: # %lpad16 + j .LBB28_610 +.LBB28_609: # %lpad16 .Ltmp683: -.LBB28_611: # %ehcleanup736 +.LBB28_610: # %ehcleanup736 mv s11, a0 li s0, 0 ld a0, 368(s10) - beq a0, s7, .LBB28_383 - j .LBB28_393 -.LBB28_612: # %lpad14 + beq a0, s5, .LBB28_383 + j .LBB28_392 +.LBB28_611: # %lpad14 .Ltmp680: - j .LBB28_614 -.LBB28_613: # %lpad9 + j .LBB28_613 +.LBB28_612: # %lpad9 .Ltmp677: -.LBB28_614: # %ehcleanup739 +.LBB28_613: # %ehcleanup739 mv s11, a0 li s0, 0 ld a0, 400(s10) - beq a0, s5, .LBB28_384 - j .LBB28_394 -.LBB28_615: # %lpad7 + beq a0, s4, .LBB28_384 + j .LBB28_393 +.LBB28_614: # %lpad7 .Ltmp674: - j .LBB28_617 -.LBB28_616: # %lpad3 + j .LBB28_616 +.LBB28_615: # %lpad3 .Ltmp671: -.LBB28_617: # %ehcleanup742 +.LBB28_616: # %ehcleanup742 mv s11, a0 li s0, 0 ld a0, 432(s10) - bne a0, s4, .LBB28_385 + bne a0, s3, .LBB28_385 j .LBB28_386 .Lfunc_end28: .size __cxx_global_var_init.316, .Lfunc_end28-__cxx_global_var_init.316 @@ -17462,9 +17457,9 @@ addiw a0, a0, 720 add s6, sp, a0 addi s10, sp, 1936 - addi s3, sp, 2047 - addi s3, s3, 337 - sd s3, 432(s10) + addi s5, sp, 2047 + addi s5, s5, 337 + sd s5, 432(s10) li a0, 66 sd a0, 0(s6) addi a0, sp, 2047 @@ -17508,9 +17503,9 @@ # %bb.1: # %invoke.cont4 addi s1, sp, 2047 addi s1, s1, 441 - addi s5, sp, 2047 - addi s5, s5, 305 - sd s5, 400(s10) + addi s7, sp, 2047 + addi s7, s7, 305 + sd s7, 400(s10) li a0, 20 sd a0, 0(s6) .Ltmp1095: @@ -17561,9 +17556,9 @@ # %bb.3: # %invoke.cont10 addi s1, sp, 2047 addi s1, s1, 529 - addi s7, sp, 2047 - addi s7, s7, 273 - sd s7, 368(s10) + addi s9, sp, 2047 + addi s9, s9, 273 + sd s9, 368(s10) li s2, 32 sd s2, 0(s6) .Ltmp1101: @@ -17581,9 +17576,9 @@ sd a1, 384(s10) .Lpcrel_hi98: auipc a2, %pcrel_hi(.L.str.13) - addi s11, a2, %pcrel_lo(.Lpcrel_hi98) + addi s3, a2, %pcrel_lo(.Lpcrel_hi98) vsetvli zero, s2, e8, m2, ta, ma - vle8.v v8, (s11) + vle8.v v8, (s3) vse8.v v8, (a0) ld a0, 368(s10) sd a1, 376(s10) @@ -17599,9 +17594,9 @@ # %bb.5: # %invoke.cont17 addi s1, sp, 2047 addi s1, s1, 617 - addi s9, sp, 2047 - addi s9, s9, 241 - sd s9, 336(s10) + addi s2, sp, 2047 + addi s2, s2, 241 + sd s2, 336(s10) li a0, 70 sd a0, 0(s6) .Ltmp1107: @@ -17624,8 +17619,8 @@ vsetvli zero, a2, e8, m2, ta, ma vle8.v v8, (s8) vse8.v v8, (a0) - addi s2, s8, 32 - vle8.v v8, (s2) + addi s11, s8, 32 + vle8.v v8, (s11) addi a2, a0, 32 vse8.v v8, (a2) li a2, 34 @@ -17819,10 +17814,10 @@ auipc a0, %pcrel_hi(.L.str.18) addi a1, a0, %pcrel_lo(.Lpcrel_hi103) li a2, 14 - li s3, 14 + li s2, 14 mv a0, s5 call memcpy@plt - sd s3, 216(s10) + sd s2, 216(s10) sb zero, 238(s10) .Ltmp1131: addi a1, sp, 2047 @@ -18029,8 +18024,8 @@ addi s1, s1, 1409 addi a0, sp, 2000 sd a0, 48(s10) - li s3, 32 - sd s3, 0(s6) + li s2, 32 + sd s2, 0(s6) .Ltmp1158: addi a0, sp, 1984 lui a1, 2 @@ -18043,8 +18038,8 @@ ld a1, 0(s6) sd a0, 48(s10) sd a1, 64(s10) - vsetvli zero, s3, e8, m2, ta, ma - vle8.v v8, (s11) + vsetvli zero, s2, e8, m2, ta, ma + vle8.v v8, (s3) vse8.v v8, (a0) ld a0, 48(s10) sd a1, 56(s10) @@ -18079,7 +18074,7 @@ vsetvli zero, a2, e8, m2, ta, ma vle8.v v8, (s8) vse8.v v8, (a0) - vle8.v v8, (s2) + vle8.v v8, (s11) addi a2, a0, 32 vse8.v v8, (a2) li a2, 34 @@ -18147,7 +18142,7 @@ .Ltmp1173: addi a1, sp, 1920 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1174: @@ -18191,7 +18186,7 @@ .Ltmp1179: addi a1, sp, 1888 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1180: @@ -18241,7 +18236,7 @@ .Ltmp1185: addi a1, sp, 1856 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1186: @@ -18254,14 +18249,14 @@ auipc a1, %pcrel_hi(.L.str.18) addi a1, a1, %pcrel_lo(.Lpcrel_hi107) li a2, 14 - li s3, 14 + li s2, 14 call memcpy@plt - sd s3, 1832(sp) + sd s2, 1832(sp) sb zero, 1854(sp) .Ltmp1188: addi a1, sp, 1824 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1189: @@ -18302,7 +18297,7 @@ .Ltmp1194: addi a1, sp, 1792 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1195: @@ -18352,7 +18347,7 @@ .Ltmp1200: addi a1, sp, 1760 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1201: @@ -18440,7 +18435,7 @@ .Ltmp1212: addi a1, sp, 1696 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1213: @@ -18465,7 +18460,7 @@ sd a0, 1664(sp) sd a1, 1680(sp) vsetvli zero, s0, e8, m2, ta, ma - vle8.v v8, (s11) + vle8.v v8, (s3) vse8.v v8, (a0) ld a0, 1664(sp) sd a1, 1672(sp) @@ -18474,7 +18469,7 @@ .Ltmp1218: addi a1, sp, 1664 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1219: @@ -18502,7 +18497,7 @@ vsetvli zero, a2, e8, m2, ta, ma vle8.v v8, (s8) vse8.v v8, (a0) - vle8.v v8, (s2) + vle8.v v8, (s11) addi a2, a0, 32 vse8.v v8, (a2) li a2, 34 @@ -18523,7 +18518,7 @@ .Ltmp1224: addi a1, sp, 1632 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1225: @@ -18574,7 +18569,7 @@ .Ltmp1230: addi a1, sp, 1600 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1231: @@ -18620,7 +18615,7 @@ .Ltmp1236: addi a1, sp, 1568 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1237: @@ -18672,7 +18667,7 @@ .Ltmp1242: addi a1, sp, 1536 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1243: @@ -18687,14 +18682,14 @@ auipc a1, %pcrel_hi(.L.str.18) addi a1, a1, %pcrel_lo(.Lpcrel_hi109) li a2, 14 - li s3, 14 + li s2, 14 call memcpy@plt - sd s3, 1512(sp) + sd s2, 1512(sp) sb zero, 1534(sp) .Ltmp1245: addi a1, sp, 1504 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1246: @@ -18734,7 +18729,7 @@ .Ltmp1251: addi a1, sp, 1472 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1252: @@ -18786,7 +18781,7 @@ .Ltmp1257: addi a1, sp, 1440 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1258: @@ -18890,7 +18885,7 @@ .Ltmp1269: addi a1, sp, 1376 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1270: @@ -18916,7 +18911,7 @@ sd a0, 1344(sp) sd a1, 1360(sp) vsetvli zero, s0, e8, m2, ta, ma - vle8.v v8, (s11) + vle8.v v8, (s3) vse8.v v8, (a0) ld a0, 1344(sp) sd a1, 1352(sp) @@ -18925,7 +18920,7 @@ .Ltmp1275: addi a1, sp, 1344 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1276: @@ -18954,7 +18949,7 @@ vsetvli zero, a2, e8, m2, ta, ma vle8.v v8, (s8) vse8.v v8, (a0) - vle8.v v8, (s2) + vle8.v v8, (s11) addi a2, a0, 32 vse8.v v8, (a2) li a2, 34 @@ -18975,7 +18970,7 @@ .Ltmp1281: addi a1, sp, 1312 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1282: @@ -19032,7 +19027,7 @@ .Ltmp1287: addi a1, sp, 1280 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1288: @@ -19078,7 +19073,7 @@ .Ltmp1293: addi a1, sp, 1248 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1294: @@ -19093,14 +19088,14 @@ auipc a1, %pcrel_hi(.L.str.18) addi a1, a1, %pcrel_lo(.Lpcrel_hi112) li a2, 14 - li s3, 14 + li s2, 14 call memcpy@plt - sd s3, 1224(sp) + sd s2, 1224(sp) sb zero, 1246(sp) .Ltmp1296: addi a1, sp, 1216 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1297: @@ -19139,7 +19134,7 @@ .Ltmp1302: addi a1, sp, 1184 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1303: @@ -19191,7 +19186,7 @@ .Ltmp1308: addi a1, sp, 1152 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1309: @@ -19238,7 +19233,7 @@ .Ltmp1314: addi a1, sp, 1120 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1315: @@ -19290,7 +19285,7 @@ .Ltmp1320: addi a1, sp, 1088 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1321: @@ -19385,7 +19380,7 @@ .Ltmp1332: addi a1, sp, 1024 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1333: @@ -19411,7 +19406,7 @@ sd a0, 992(sp) sd a1, 1008(sp) vsetvli zero, s0, e8, m2, ta, ma - vle8.v v8, (s11) + vle8.v v8, (s3) vse8.v v8, (a0) ld a0, 992(sp) sd a1, 1000(sp) @@ -19420,7 +19415,7 @@ .Ltmp1338: addi a1, sp, 992 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1339: @@ -19449,7 +19444,7 @@ vsetvli zero, a2, e8, m2, ta, ma vle8.v v8, (s8) vse8.v v8, (a0) - vle8.v v8, (s2) + vle8.v v8, (s11) addi a2, a0, 32 vse8.v v8, (a2) li a2, 34 @@ -19470,7 +19465,7 @@ .Ltmp1344: addi a1, sp, 960 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1345: @@ -19521,7 +19516,7 @@ .Ltmp1350: addi a1, sp, 928 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1351: @@ -19567,7 +19562,7 @@ .Ltmp1356: addi a1, sp, 896 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1357: @@ -19583,14 +19578,14 @@ auipc a1, %pcrel_hi(.L.str.18) addi a1, a1, %pcrel_lo(.Lpcrel_hi117) li a2, 14 - li s3, 14 + li s2, 14 call memcpy@plt - sd s3, 872(sp) + sd s2, 872(sp) sb zero, 894(sp) .Ltmp1359: addi a1, sp, 864 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1360: @@ -19630,7 +19625,7 @@ .Ltmp1365: addi a1, sp, 832 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1366: @@ -19677,7 +19672,7 @@ .Ltmp1371: addi a1, sp, 800 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1372: @@ -19721,7 +19716,7 @@ .Ltmp1377: addi a1, sp, 768 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1378: @@ -19774,7 +19769,7 @@ .Ltmp1383: addi a1, sp, 736 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1384: @@ -19871,7 +19866,7 @@ .Ltmp1395: addi a1, sp, 672 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1396: @@ -19898,7 +19893,7 @@ sd a0, 640(sp) sd a1, 656(sp) vsetvli zero, s0, e8, m2, ta, ma - vle8.v v8, (s11) + vle8.v v8, (s3) vse8.v v8, (a0) ld a0, 640(sp) sd a1, 648(sp) @@ -19907,7 +19902,7 @@ .Ltmp1401: addi a1, sp, 640 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1402: @@ -19937,7 +19932,7 @@ vsetvli zero, a2, e8, m2, ta, ma vle8.v v8, (s8) vse8.v v8, (a0) - vle8.v v8, (s2) + vle8.v v8, (s11) addi a2, a0, 32 vse8.v v8, (a2) li a2, 34 @@ -19958,7 +19953,7 @@ .Ltmp1407: addi a1, sp, 608 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1408: @@ -20010,7 +20005,7 @@ .Ltmp1413: addi a1, sp, 576 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1414: @@ -20057,7 +20052,7 @@ .Ltmp1419: addi a1, sp, 544 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1420: @@ -20073,14 +20068,14 @@ auipc a1, %pcrel_hi(.L.str.18) addi a1, a1, %pcrel_lo(.Lpcrel_hi120) li a2, 14 - li s3, 14 + li s2, 14 call memcpy@plt - sd s3, 520(sp) + sd s2, 520(sp) sb zero, 542(sp) .Ltmp1422: addi a1, sp, 512 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1423: @@ -20120,7 +20115,7 @@ .Ltmp1428: addi a1, sp, 480 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1429: @@ -20167,7 +20162,7 @@ .Ltmp1434: addi a1, sp, 448 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1435: @@ -20211,7 +20206,7 @@ .Ltmp1440: addi a1, sp, 416 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1441: @@ -20260,7 +20255,7 @@ .Ltmp1446: addi a1, sp, 384 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1447: @@ -20358,7 +20353,7 @@ .Ltmp1458: addi a1, sp, 320 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1459: @@ -20385,7 +20380,7 @@ sd a0, 288(sp) sd a1, 304(sp) vsetvli zero, s0, e8, m2, ta, ma - vle8.v v8, (s11) + vle8.v v8, (s3) vse8.v v8, (a0) ld a0, 288(sp) sd a1, 296(sp) @@ -20394,7 +20389,7 @@ .Ltmp1464: addi a1, sp, 288 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1465: @@ -20424,7 +20419,7 @@ vsetvli zero, a2, e8, m2, ta, ma vle8.v v8, (s8) vse8.v v8, (a0) - vle8.v v8, (s2) + vle8.v v8, (s11) addi a2, a0, 32 vse8.v v8, (a2) li a2, 34 @@ -20445,7 +20440,7 @@ .Ltmp1470: addi a1, sp, 256 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1471: @@ -20497,7 +20492,7 @@ .Ltmp1476: addi a1, sp, 224 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1477: @@ -20544,7 +20539,7 @@ .Ltmp1482: addi a1, sp, 192 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1483: @@ -20568,7 +20563,7 @@ .Ltmp1485: addi a1, sp, 160 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1486: @@ -20599,8 +20594,8 @@ li a2, 34 sb a2, 19(a0) sb a2, 18(a0) - li s2, 32 - sb s2, 17(a0) + li s3, 32 + sb s3, 17(a0) li a2, 58 sb a2, 16(a0) .Lpcrel_hi125: @@ -20616,7 +20611,7 @@ .Ltmp1491: addi a1, sp, 128 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1492: @@ -20628,7 +20623,7 @@ add s1, a0, s1 addi a0, sp, 112 sd a0, 96(sp) - sd s2, 0(s6) + sd s3, 0(s6) .Ltmp1494: addi a0, sp, 96 lui a1, 2 @@ -20655,7 +20650,7 @@ .Ltmp1497: addi a1, sp, 96 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1498: @@ -20699,7 +20694,7 @@ .Ltmp1503: addi a1, sp, 64 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1504: @@ -20742,7 +20737,7 @@ .Ltmp1509: addi a1, sp, 32 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s1 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1510: @@ -20753,28 +20748,28 @@ addi a1, sp, 2047 addi a1, a1, 353 li a2, 74 - addi s3, sp, 2047 - addi s3, s3, 353 + addi s2, sp, 2047 + addi s2, s2, 353 call _Z8AddCases10TestCaseIDSt16initializer_listI8TestCaseE@plt sd a0, 24(sp) # 8-byte Folded Spill .Ltmp1513: # %bb.141: # %invoke.cont516 lui a0, 2 addiw a0, a0, -1680 - add s3, s3, a0 + add s2, s2, a0 lui a0, 1048574 - addiw s11, a0, 1680 - li s2, -1 + addiw s3, a0, 1680 + li s11, -1 li s9, 1 j .LBB30_143 .LBB30_142: # %_ZN8TestCaseD2Ev.exit # in Loop: Header=BB30_143 Depth=1 - addi s11, s11, 88 - addi s3, s3, -88 - beqz s11, .LBB30_155 + addi s3, s3, 88 + addi s2, s2, -88 + beqz s3, .LBB30_155 .LBB30_143: # %arraydestroy.body # =>This Inner Loop Header: Depth=1 - ld s1, -8(s3) + ld s1, -8(s2) beqz s1, .LBB30_150 # %bb.144: # %if.then.i.i.i # in Loop: Header=BB30_143 Depth=1 @@ -20794,7 +20789,7 @@ .LBB30_146: # %if.else.i.i.i.i.i # in Loop: Header=BB30_143 Depth=1 addi a0, s1, 48 - amoadd.w.aqrl a0, s2, (a0) + amoadd.w.aqrl a0, s11, (a0) sext.w a0, a0 bne a0, s9, .LBB30_150 .LBB30_147: # %if.then.i.i.i.i1027 @@ -20821,16 +20816,16 @@ jalr a1 .LBB30_150: # %_ZNSt12__shared_ptrIN9benchmark5RegexELN9__gnu_cxx12_Lock_policyE1EED2Ev.exit.i # in Loop: Header=BB30_143 Depth=1 - ld a0, -48(s3) - addi a1, s3, -32 + ld a0, -48(s2) + addi a1, s2, -32 beq a1, a0, .LBB30_152 # %bb.151: # %if.then.i.i2.i # in Loop: Header=BB30_143 Depth=1 call _ZdlPv@plt .LBB30_152: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.i # in Loop: Header=BB30_143 Depth=1 - ld a0, -88(s3) - addi a1, s3, -72 + ld a0, -88(s2) + addi a1, s2, -72 beq a1, a0, .LBB30_142 # %bb.153: # %if.then.i.i4.i # in Loop: Header=BB30_143 Depth=1 @@ -20839,7 +20834,7 @@ .LBB30_154: # %if.else.i.i.i.i.i.i # in Loop: Header=BB30_143 Depth=1 addi a0, s1, 52 - amoadd.w.aqrl a0, s2, (a0) + amoadd.w.aqrl a0, s11, (a0) sext.w a0, a0 beq a0, s9, .LBB30_149 j .LBB30_150 @@ -20857,7 +20852,7 @@ addi s2, sp, 2047 addi s2, s2, 273 addi s3, sp, 2047 - addi s3, s3, 241 + addi s3, s3, 209 addi s9, sp, 2047 addi s9, s9, 113 mv s11, s5 @@ -21268,14 +21263,14 @@ call _ZdlPv@plt .LBB30_293: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit1436 ld a0, 304(s10) - addi a1, sp, 2047 - addi a1, a1, 209 - beq a0, a1, .LBB30_295 + beq a0, s3, .LBB30_295 # %bb.294: # %if.then.i.i1438 call _ZdlPv@plt .LBB30_295: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit1442 ld a0, 336(s10) - beq a0, s3, .LBB30_297 + addi a1, sp, 2047 + addi a1, a1, 241 + beq a0, a1, .LBB30_297 # %bb.296: # %if.then.i.i1444 call _ZdlPv@plt .LBB30_297: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit1448 @@ -21325,134 +21320,134 @@ mv s11, a0 lui s0, 2 addiw a0, s0, -1768 - add a0, s3, a0 + add a0, s2, a0 call _ZN8TestCaseD2Ev addiw a0, s0, -1856 - add a0, s3, a0 + add a0, s2, a0 call _ZN8TestCaseD2Ev addiw a0, s0, -1944 - add a0, s3, a0 + add a0, s2, a0 call _ZN8TestCaseD2Ev addiw a0, s0, -2032 - add a0, s3, a0 + add a0, s2, a0 call _ZN8TestCaseD2Ev lui s0, 1 addiw a0, s0, 1976 - add a0, s3, a0 + add a0, s2, a0 call _ZN8TestCaseD2Ev addiw a0, s0, 1888 - add a0, s3, a0 + add a0, s2, a0 call _ZN8TestCaseD2Ev addiw a0, s0, 1800 - add a0, s3, a0 + add a0, s2, a0 call _ZN8TestCaseD2Ev addiw a0, s0, 1712 - add a0, s3, a0 + add a0, s2, a0 call _ZN8TestCaseD2Ev addiw a0, s0, 1624 - add a0, s3, a0 + add a0, s2, a0 call _ZN8TestCaseD2Ev li a0, 11 slli a0, a0, 9 - add a0, s3, a0 + add a0, s2, a0 call _ZN8TestCaseD2Ev addiw a0, s0, 1448 - add a0, s3, a0 + add a0, s2, a0 call _ZN8TestCaseD2Ev addiw a0, s0, 1360 - add a0, s3, a0 + add a0, s2, a0 call _ZN8TestCaseD2Ev addiw a0, s0, 1272 - add a0, s3, a0 + add a0, s2, a0 call _ZN8TestCaseD2Ev addiw a0, s0, 1184 - add a0, s3, a0 + add a0, s2, a0 call _ZN8TestCaseD2Ev addiw a0, s0, 1096 - add a0, s3, a0 + add a0, s2, a0 call _ZN8TestCaseD2Ev addiw a0, s0, 1008 - add a0, s3, a0 + add a0, s2, a0 call _ZN8TestCaseD2Ev addiw a0, s0, 920 - add a0, s3, a0 + add a0, s2, a0 call _ZN8TestCaseD2Ev addiw a0, s0, 832 - add a0, s3, a0 + add a0, s2, a0 call _ZN8TestCaseD2Ev addiw a0, s0, 744 - add a0, s3, a0 + add a0, s2, a0 call _ZN8TestCaseD2Ev addiw a0, s0, 656 - add a0, s3, a0 + add a0, s2, a0 call _ZN8TestCaseD2Ev addiw a0, s0, 568 - add a0, s3, a0 + add a0, s2, a0 call _ZN8TestCaseD2Ev addiw a0, s0, 480 - add a0, s3, a0 + add a0, s2, a0 call _ZN8TestCaseD2Ev addiw a0, s0, 392 - add a0, s3, a0 + add a0, s2, a0 call _ZN8TestCaseD2Ev addiw a0, s0, 304 - add a0, s3, a0 + add a0, s2, a0 call _ZN8TestCaseD2Ev addiw a0, s0, 216 - add a0, s3, a0 + add a0, s2, a0 call _ZN8TestCaseD2Ev addiw a0, s0, 128 - add a0, s3, a0 + add a0, s2, a0 call _ZN8TestCaseD2Ev addiw a0, s0, 40 - add a0, s3, a0 + add a0, s2, a0 call _ZN8TestCaseD2Ev - addi s3, s3, 2047 - addi a0, s3, 2001 + addi s2, s2, 2047 + addi a0, s2, 2001 call _ZN8TestCaseD2Ev - addi a0, s3, 1913 + addi a0, s2, 1913 call _ZN8TestCaseD2Ev - addi a0, s3, 1825 + addi a0, s2, 1825 call _ZN8TestCaseD2Ev - addi a0, s3, 1737 + addi a0, s2, 1737 call _ZN8TestCaseD2Ev - addi a0, s3, 1649 + addi a0, s2, 1649 call _ZN8TestCaseD2Ev - addi a0, s3, 1561 + addi a0, s2, 1561 call _ZN8TestCaseD2Ev - addi a0, s3, 1473 + addi a0, s2, 1473 call _ZN8TestCaseD2Ev - addi a0, s3, 1385 + addi a0, s2, 1385 call _ZN8TestCaseD2Ev - addi a0, s3, 1297 + addi a0, s2, 1297 call _ZN8TestCaseD2Ev - addi a0, s3, 1209 + addi a0, s2, 1209 call _ZN8TestCaseD2Ev - addi a0, s3, 1121 + addi a0, s2, 1121 call _ZN8TestCaseD2Ev - addi a0, s3, 1033 + addi a0, s2, 1033 call _ZN8TestCaseD2Ev - addi a0, s3, 945 + addi a0, s2, 945 call _ZN8TestCaseD2Ev - addi a0, s3, 857 + addi a0, s2, 857 call _ZN8TestCaseD2Ev - addi a0, s3, 769 + addi a0, s2, 769 call _ZN8TestCaseD2Ev - addi a0, s3, 681 + addi a0, s2, 681 call _ZN8TestCaseD2Ev - addi a0, s3, 593 + addi a0, s2, 593 call _ZN8TestCaseD2Ev - addi a0, s3, 505 + addi a0, s2, 505 call _ZN8TestCaseD2Ev - addi a0, s3, 417 + addi a0, s2, 417 call _ZN8TestCaseD2Ev - addi a0, s3, 329 + addi a0, s2, 329 call _ZN8TestCaseD2Ev - addi a0, s3, 241 + addi a0, s2, 241 call _ZN8TestCaseD2Ev - addi a0, s3, 153 + addi a0, s2, 153 call _ZN8TestCaseD2Ev - addi a0, s3, 65 + addi a0, s2, 65 call _ZN8TestCaseD2Ev lui a0, 1 addiw a0, a0, 328 @@ -21530,7 +21525,7 @@ addi a0, sp, 2047 addi a0, a0, 353 call _ZN8TestCaseD2Ev - li s3, 0 + li s2, 0 j .LBB30_306 .LBB30_305: # %lpad513 .Ltmp1511: @@ -21773,7 +21768,7 @@ .LBB30_366: # %if.then.i.i1822 call _ZdlPv@plt .LBB30_367: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit1826 - xori s0, s3, 1 + xori s0, s2, 1 ld a0, 16(s10) addi a1, sp, 1968 beq a0, a1, .LBB30_369 @@ -21812,17 +21807,17 @@ .LBB30_376: # %if.then.i.i1864 call _ZdlPv@plt .LBB30_377: # %ehcleanup724 - addi s3, sp, 2047 - addi s3, s3, 337 addi s5, sp, 2047 - addi s5, s5, 305 + addi s5, s5, 337 addi s7, sp, 2047 - addi s7, s7, 273 + addi s7, s7, 305 addi s9, sp, 2047 - addi s9, s9, 241 + addi s9, s9, 273 .LBB30_378: # %ehcleanup724 addi s2, sp, 2047 - addi s2, s2, 209 + addi s2, s2, 241 + addi s3, sp, 2047 + addi s3, s3, 209 addi s4, sp, 2047 addi s4, s4, 177 addi a1, sp, 2047 @@ -21834,19 +21829,19 @@ bne a0, s4, .LBB30_390 .LBB30_380: # %ehcleanup730 ld a0, 304(s10) - bne a0, s2, .LBB30_391 + bne a0, s3, .LBB30_391 .LBB30_381: # %ehcleanup733 ld a0, 336(s10) - bne a0, s9, .LBB30_392 + bne a0, s2, .LBB30_392 .LBB30_382: # %ehcleanup736 ld a0, 368(s10) - bne a0, s7, .LBB30_393 + bne a0, s9, .LBB30_393 .LBB30_383: # %ehcleanup739 ld a0, 400(s10) - bne a0, s5, .LBB30_394 + bne a0, s7, .LBB30_394 .LBB30_384: # %ehcleanup742 ld a0, 432(s10) - beq a0, s3, .LBB30_386 + beq a0, s5, .LBB30_386 .LBB30_385: # %if.then.i.i1906 call _ZdlPv@plt .LBB30_386: # %ehcleanup743 @@ -21872,23 +21867,23 @@ .LBB30_390: # %if.then.i.i1876 call _ZdlPv@plt ld a0, 304(s10) - beq a0, s2, .LBB30_381 + beq a0, s3, .LBB30_381 .LBB30_391: # %if.then.i.i1882 call _ZdlPv@plt ld a0, 336(s10) - beq a0, s9, .LBB30_382 + beq a0, s2, .LBB30_382 .LBB30_392: # %if.then.i.i1888 call _ZdlPv@plt ld a0, 368(s10) - beq a0, s7, .LBB30_383 + beq a0, s9, .LBB30_383 .LBB30_393: # %if.then.i.i1894 call _ZdlPv@plt ld a0, 400(s10) - beq a0, s5, .LBB30_384 + beq a0, s7, .LBB30_384 .LBB30_394: # %if.then.i.i1900 call _ZdlPv@plt ld a0, 432(s10) - bne a0, s3, .LBB30_385 + bne a0, s5, .LBB30_385 j .LBB30_386 .LBB30_395: # %if.then.i.i1834 call _ZdlPv@plt @@ -22324,7 +22319,7 @@ .Ltmp1454: .LBB30_477: # %ehcleanup553 mv s11, a0 - li s3, 1 + li s2, 1 ld a0, 352(sp) addi a1, sp, 368 beq a0, a1, .LBB30_317 @@ -22469,7 +22464,7 @@ .Ltmp1391: .LBB30_499: # %ehcleanup586 mv s11, a0 - li s3, 1 + li s2, 1 ld a0, 704(sp) addi a1, sp, 720 beq a0, a1, .LBB30_328 @@ -22614,7 +22609,7 @@ .Ltmp1328: .LBB30_521: # %ehcleanup619 mv s11, a0 - li s3, 1 + li s2, 1 ld a0, 1056(sp) addi a1, sp, 1072 beq a0, a1, .LBB30_339 @@ -22759,7 +22754,7 @@ .Ltmp1265: .LBB30_543: # %ehcleanup652 mv s11, a0 - li s3, 1 + li s2, 1 ld a0, 1408(sp) addi a1, sp, 1424 beq a0, a1, .LBB30_350 @@ -22890,7 +22885,7 @@ .Ltmp1208: .LBB30_563: # %ehcleanup682 mv s11, a0 - li s3, 1 + li s2, 1 ld a0, 1728(sp) addi a1, sp, 1744 beq a0, a1, .LBB30_360 @@ -23066,8 +23061,8 @@ .LBB30_599: # %ehcleanup727 mv s11, a0 li s0, 0 - addi s2, sp, 2047 - addi s2, s2, 209 + addi s3, sp, 2047 + addi s3, s3, 209 addi s4, sp, 2047 addi s4, s4, 177 ld a0, 272(s10) @@ -23081,10 +23076,10 @@ .LBB30_602: # %ehcleanup730 mv s11, a0 li s0, 0 - addi s2, sp, 2047 - addi s2, s2, 209 + addi s3, sp, 2047 + addi s3, s3, 209 ld a0, 304(s10) - beq a0, s2, .LBB30_381 + beq a0, s3, .LBB30_381 j .LBB30_391 .LBB30_603: # %lpad28 .Ltmp1115: @@ -23095,7 +23090,7 @@ mv s11, a0 li s0, 0 ld a0, 336(s10) - beq a0, s9, .LBB30_382 + beq a0, s2, .LBB30_382 j .LBB30_392 .LBB30_606: # %lpad21 .Ltmp1109: @@ -23106,7 +23101,7 @@ mv s11, a0 li s0, 0 ld a0, 368(s10) - beq a0, s7, .LBB30_383 + beq a0, s9, .LBB30_383 j .LBB30_393 .LBB30_609: # %lpad14 .Ltmp1103: @@ -23117,7 +23112,7 @@ mv s11, a0 li s0, 0 ld a0, 400(s10) - beq a0, s5, .LBB30_384 + beq a0, s7, .LBB30_384 j .LBB30_394 .LBB30_612: # %lpad7 .Ltmp1097: @@ -23128,7 +23123,7 @@ mv s11, a0 li s0, 0 ld a0, 432(s10) - bne a0, s3, .LBB30_385 + bne a0, s5, .LBB30_385 j .LBB30_386 .Lfunc_end30: .size __cxx_global_var_init.341, .Lfunc_end30-__cxx_global_var_init.341 @@ -49021,7 +49016,7 @@ call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3399: # %bb.2373: # %invoke.cont52.i8160 - addi s3, sp, 1256 + addi s5, sp, 1256 lui a0, 1 addiw a0, a0, 1328 add a0, sp, a0 @@ -49074,11 +49069,11 @@ addiw a0, a0, 1312 add a1, sp, a0 li a2, 1 - mv a0, s3 + mv a0, s5 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3405: # %bb.2375: # %invoke.cont59.i8175 - addi s3, sp, 1344 + addi s5, sp, 1344 lui a0, 1 addiw a0, a0, 1296 add a0, sp, a0 @@ -49128,11 +49123,11 @@ slli a0, a0, 8 add a1, sp, a0 li a2, 1 - mv a0, s3 + mv a0, s5 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3411: # %bb.2377: # %invoke.cont66.i8188 - addi s3, sp, 1432 + addi s5, sp, 1432 lui a0, 1 addiw a0, a0, 1264 add a0, sp, a0 @@ -49177,11 +49172,11 @@ addiw a0, a0, 1248 add a1, sp, a0 li a2, 1 - mv a0, s3 + mv a0, s5 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3417: # %bb.2379: # %invoke.cont73.i8199 - addi s3, sp, 1520 + addi s5, sp, 1520 lui a0, 1 addiw a0, a0, 1232 add a0, sp, a0 @@ -49221,12 +49216,12 @@ lui a0, 1 addiw a0, a0, 1216 add a1, sp, a0 - mv a0, s3 + mv a0, s5 li a2, 0 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3423: # %bb.2381: # %invoke.cont80.i8210 - addi s3, sp, 1608 + addi s5, sp, 1608 sd s2, 680(s4) li a0, 20 sd a0, 648(s4) @@ -49269,11 +49264,11 @@ addiw a0, a0, 1184 add a1, sp, a0 li a2, 1 - mv a0, s3 + mv a0, s5 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3429: # %bb.2383: # %invoke.cont87.i8221 - addi s3, sp, 1696 + addi s5, sp, 1696 lui a0, 1 addiw a0, a0, 1168 add a0, sp, a0 @@ -49307,11 +49302,11 @@ addiw a0, a0, 1152 add a1, sp, a0 li a2, 1 - mv a0, s3 + mv a0, s5 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3435: # %bb.2385: # %invoke.cont94.i8232 - addi s3, sp, 1784 + addi s2, sp, 1784 lui a0, 1 addiw a0, a0, 1136 add a0, sp, a0 @@ -49351,12 +49346,12 @@ addiw a0, a0, 1120 add a1, sp, a0 li a2, 1 - li s2, 1 - mv a0, s3 + li s3, 1 + mv a0, s2 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3441: # %bb.2387: # %invoke.cont101.i8244 - addi s3, sp, 1872 + addi s2, sp, 1872 lui a0, 1 addiw a0, a0, 1104 add a0, sp, a0 @@ -49406,12 +49401,12 @@ addiw a0, a0, 1088 add a1, sp, a0 li a2, 1 - li s2, 1 - mv a0, s3 + li s3, 1 + mv a0, s2 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3447: # %bb.2389: # %invoke.cont108.i8254 - addi s3, sp, 1960 + addi s2, sp, 1960 lui a0, 1 addiw a0, a0, 1072 add a0, sp, a0 @@ -49455,13 +49450,13 @@ addiw a0, a0, 1056 add a1, sp, a0 li a2, 1 - li s2, 1 - mv a0, s3 + li s3, 1 + mv a0, s2 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3453: # %bb.2391: # %invoke.cont115.i8265 - addi s3, sp, 2047 - addi s3, s3, 1 + addi s5, sp, 2047 + addi s5, s5, 1 lui a0, 1 addiw a0, a0, 1040 add a0, sp, a0 @@ -49479,13 +49474,13 @@ slli a0, a0, 10 add a1, sp, a0 li a2, 1 - li s2, 1 - mv a0, s3 + li s3, 1 + mv a0, s5 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3456: # %bb.2392: # %invoke.cont122.i8275 - addi s3, sp, 2047 - addi s3, s3, 89 + addi s2, sp, 2047 + addi s2, s2, 89 lui a0, 1 addiw a0, a0, 1008 add a0, sp, a0 @@ -49534,13 +49529,13 @@ addiw a0, a0, 992 add a1, sp, a0 li a2, 1 - li s2, 1 - mv a0, s3 + li s3, 1 + mv a0, s2 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3462: # %bb.2394: # %invoke.cont129.i8286 - addi s3, sp, 2047 - addi s3, s3, 177 + addi s2, sp, 2047 + addi s2, s2, 177 lui a0, 1 addiw a0, a0, 976 add a0, sp, a0 @@ -49590,13 +49585,13 @@ addiw a0, a0, 960 add a1, sp, a0 li a2, 1 - li s2, 1 - mv a0, s3 + li s3, 1 + mv a0, s2 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3468: # %bb.2396: # %invoke.cont136.i8297 - addi s3, sp, 2047 - addi s3, s3, 265 + addi s2, sp, 2047 + addi s2, s2, 265 lui a0, 1 addiw a0, a0, 944 add a0, sp, a0 @@ -49637,13 +49632,13 @@ addiw a0, a0, 928 add a1, sp, a0 li a2, 1 - li s2, 1 - mv a0, s3 + li s3, 1 + mv a0, s2 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3474: # %bb.2398: # %invoke.cont143.i8308 - addi s3, sp, 2047 - addi s3, s3, 353 + addi s2, sp, 2047 + addi s2, s2, 353 lui a0, 1 addiw a0, a0, 912 add a0, sp, a0 @@ -49683,13 +49678,13 @@ lui a0, 1 addiw a0, a0, 896 add a1, sp, a0 - mv a0, s3 + mv a0, s2 li a2, 0 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3480: # %bb.2400: # %invoke.cont150.i8319 - addi s3, sp, 2047 - addi s3, s3, 441 + addi s2, sp, 2047 + addi s2, s2, 441 lui a0, 1 addiw a0, a0, 880 add a0, sp, a0 @@ -49735,8 +49730,8 @@ addiw a0, a0, 864 add a1, sp, a0 li a2, 1 - li s2, 1 - mv a0, s3 + li s3, 1 + mv a0, s2 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3486: # %bb.2402: # %invoke.cont157.i8329 @@ -49746,8 +49741,8 @@ addiw a0, a0, 848 add a0, sp, a0 sd a0, 328(s4) - li s3, 32 - sd s3, 296(s4) + li s2, 32 + sd s2, 296(s4) .Ltmp3488: lui a0, 1 addiw a0, a0, 832 @@ -49762,7 +49757,7 @@ ld a1, 296(s4) sd a0, 328(s4) sd a1, 344(s4) - vsetvli zero, s3, e8, m2, ta, ma + vsetvli zero, s2, e8, m2, ta, ma ld a2, 160(sp) # 8-byte Folded Reload vle8.v v8, (a2) vse8.v v8, (a0) @@ -49775,7 +49770,7 @@ addiw a0, a0, 832 add a1, sp, a0 li a2, 1 - li s2, 1 + li s3, 1 mv a0, s5 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3492: @@ -49822,14 +49817,14 @@ addiw a0, a0, 800 add a1, sp, a0 li a2, 1 - li s2, 1 + li s3, 1 mv a0, s6 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3498: # %bb.2406: # %invoke.cont171.i8351 addi a0, sp, 552 addi a0, a0, 2047 - addi s8, a0, 153 + addi s7, a0, 153 lui a0, 1 addiw a0, a0, 784 add a0, sp, a0 @@ -49879,14 +49874,14 @@ slli a0, a0, 8 add a1, sp, a0 li a2, 1 - li s2, 1 - mv a0, s8 + li s3, 1 + mv a0, s7 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3504: # %bb.2408: # %invoke.cont178.i8362 addi a0, sp, 552 addi a0, a0, 2047 - addi s9, a0, 241 + addi s8, a0, 241 lui a0, 1 addiw a0, a0, 752 add a0, sp, a0 @@ -49930,14 +49925,14 @@ addiw a0, a0, 736 add a1, sp, a0 li a2, 1 - li s2, 1 - mv a0, s9 + li s3, 1 + mv a0, s8 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3510: # %bb.2410: # %invoke.cont185.i8369 addi a0, sp, 552 addi s0, a0, 2047 - addi s10, s0, 329 + addi s9, s0, 329 lui a0, 1 addiw a0, a0, 720 add a0, sp, a0 @@ -49955,12 +49950,12 @@ addiw a0, a0, 704 add a1, sp, a0 li a2, 1 - li s2, 1 - mv a0, s10 + li s3, 1 + mv a0, s9 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3513: # %bb.2411: # %invoke.cont192.i8375 - addi s11, s0, 417 + addi s10, s0, 417 lui a0, 1 addiw a0, a0, 688 add a0, sp, a0 @@ -50009,14 +50004,14 @@ addiw a0, a0, 672 add a1, sp, a0 li a2, 1 - li s2, 1 - mv a0, s11 + li s3, 1 + mv a0, s10 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3519: # %bb.2413: # %invoke.cont199.i8382 addi a0, sp, 552 addi a0, a0, 2047 - addi s0, a0, 505 + addi s11, a0, 505 lui a0, 1 addiw a0, a0, 656 add a0, sp, a0 @@ -50066,14 +50061,14 @@ addiw a0, a0, 640 add a1, sp, a0 li a2, 1 - li s2, 1 - mv a0, s0 + li s3, 1 + mv a0, s11 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3525: # %bb.2415: # %invoke.cont206.i8389 addi a0, sp, 552 addi a0, a0, 2047 - addi s3, a0, 593 + addi s2, a0, 593 lui a0, 1 addiw a0, a0, 624 add a0, sp, a0 @@ -50108,7 +50103,7 @@ ld a0, 104(s4) lui a2, 1 addiw a2, a2, 504 - add s7, sp, a2 + add s0, sp, a2 sd a1, 112(s4) add a0, a0, a1 sb zero, 0(a0) @@ -50117,8 +50112,8 @@ addiw a0, a0, 608 add a1, sp, a0 li a2, 1 - li s2, 1 - mv a0, s3 + li s3, 1 + mv a0, s2 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3531: # %bb.2417: # %invoke.cont213.i8396 @@ -50126,13 +50121,13 @@ li a0, 2 addi a1, sp, 552 li a2, 31 - addi s4, sp, 552 + addi s3, sp, 552 call _Z8AddCases10TestCaseIDSt16initializer_listI8TestCaseE@plt + sd a0, 144(sp) # 8-byte Folded Spill .Ltmp3534: # %bb.2418: # %invoke.cont215.i - mv s2, a0 - addi a0, s4, 2047 - addi s1, a0, 681 + addi a0, s3, 2047 + addi s2, a0, 681 lui a0, 1048575 addiw s3, a0, 1368 li s4, -1 @@ -50141,12 +50136,12 @@ .LBB42_2419: # %_ZN8TestCaseD2Ev.exit.i8420 # in Loop: Header=BB42_2420 Depth=1 addi s3, s3, 88 - addi s1, s1, -88 + addi s2, s2, -88 beqz s3, .LBB42_2432 .LBB42_2420: # %arraydestroy.body.i8400 # =>This Inner Loop Header: Depth=1 - ld s0, -8(s1) - beqz s0, .LBB42_2427 + ld s1, -8(s2) + beqz s1, .LBB42_2427 # %bb.2421: # %if.then.i.i.i.i8405 # in Loop: Header=BB42_2420 Depth=1 .Lpcrel_hi534: @@ -50156,52 +50151,52 @@ beqz a0, .LBB42_2423 # %bb.2422: # %if.then.i.i.i.i.i.i8408 # in Loop: Header=BB42_2420 Depth=1 - lw a0, 48(s0) + lw a0, 48(s1) addi a1, a0, -1 - sw a1, 48(s0) + sw a1, 48(s1) sext.w a0, a0 beq a0, s5, .LBB42_2424 j .LBB42_2427 .LBB42_2423: # %if.else.i.i.i.i.i.i8444 # in Loop: Header=BB42_2420 Depth=1 - addi a0, s0, 48 + addi a0, s1, 48 amoadd.w.aqrl a0, s4, (a0) sext.w a0, a0 bne a0, s5, .LBB42_2427 .LBB42_2424: # %if.then.i.i.i.i425.i # in Loop: Header=BB42_2420 Depth=1 - ld a0, 0(s0) + ld a0, 0(s1) ld a1, 16(a0) - mv a0, s0 + mv a0, s1 jalr a1 fence.tso lbu a0, 0(s6) beqz a0, .LBB42_2431 # %bb.2425: # %if.then.i.i.i.i.i.i.i8435 # in Loop: Header=BB42_2420 Depth=1 - lw a0, 52(s0) + lw a0, 52(s1) addi a1, a0, -1 - sw a1, 52(s0) + sw a1, 52(s1) sext.w a0, a0 bne a0, s5, .LBB42_2427 .LBB42_2426: # %if.then.i1.i.i.i.i.i8440 # in Loop: Header=BB42_2420 Depth=1 - ld a0, 0(s0) + ld a0, 0(s1) ld a1, 24(a0) - mv a0, s0 + mv a0, s1 jalr a1 .LBB42_2427: # %_ZNSt12__shared_ptrIN9benchmark5RegexELN9__gnu_cxx12_Lock_policyE1EED2Ev.exit.i.i8413 # in Loop: Header=BB42_2420 Depth=1 - ld a0, -48(s1) - addi a1, s1, -32 + ld a0, -48(s2) + addi a1, s2, -32 beq a1, a0, .LBB42_2429 # %bb.2428: # %if.then.i.i2.i.i8416 # in Loop: Header=BB42_2420 Depth=1 call _ZdlPv@plt .LBB42_2429: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.i.i8417 # in Loop: Header=BB42_2420 Depth=1 - ld a0, -88(s1) - addi a1, s1, -72 + ld a0, -88(s2) + addi a1, s2, -72 beq a1, a0, .LBB42_2419 # %bb.2430: # %if.then.i.i4.i.i8419 # in Loop: Header=BB42_2420 Depth=1 @@ -50209,13 +50204,13 @@ j .LBB42_2419 .LBB42_2431: # %if.else.i.i.i.i.i.i.i8443 # in Loop: Header=BB42_2420 Depth=1 - addi a0, s0, 52 + addi a0, s1, 52 amoadd.w.aqrl a0, s4, (a0) sext.w a0, a0 beq a0, s5, .LBB42_2426 j .LBB42_2427 .LBB42_2432: # %arraydestroy.done216.i - ld a0, 104(s7) + ld a0, 104(s0) lui a1, 1 addiw a1, a1, 624 add a1, sp, a1 @@ -50223,7 +50218,10 @@ # %bb.2433: # %if.then.i.i426.i call _ZdlPv@plt .LBB42_2434: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.i8423 - ld a0, 136(s7) + ld a0, 136(s0) + lui a1, 1 + addiw a1, a1, 1200 + add s1, sp, a1 lui a1, 1 addiw a1, a1, 656 add a1, sp, a1 @@ -50231,7 +50229,7 @@ # %bb.2435: # %if.then.i.i428.i call _ZdlPv@plt .LBB42_2436: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit432.i - ld a0, 168(s7) + ld a0, 168(s0) lui a1, 1 addiw a1, a1, 688 add a1, sp, a1 @@ -50239,7 +50237,7 @@ # %bb.2437: # %if.then.i.i434.i call _ZdlPv@plt .LBB42_2438: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit438.i - ld a0, 200(s7) + ld a0, 200(s0) lui a1, 1 addiw a1, a1, 720 add a1, sp, a1 @@ -50247,7 +50245,7 @@ # %bb.2439: # %if.then.i.i440.i call _ZdlPv@plt .LBB42_2440: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit444.i - ld a0, 232(s7) + ld a0, 232(s0) lui a1, 1 addiw a1, a1, 752 add a1, sp, a1 @@ -50255,7 +50253,7 @@ # %bb.2441: # %if.then.i.i446.i call _ZdlPv@plt .LBB42_2442: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit450.i - ld a0, 264(s7) + ld a0, 264(s0) lui a1, 1 addiw a1, a1, 784 add a1, sp, a1 @@ -50263,7 +50261,7 @@ # %bb.2443: # %if.then.i.i452.i call _ZdlPv@plt .LBB42_2444: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit456.i - ld a0, 296(s7) + ld a0, 296(s0) lui a1, 1 addiw a1, a1, 816 add a1, sp, a1 @@ -50271,7 +50269,7 @@ # %bb.2445: # %if.then.i.i458.i call _ZdlPv@plt .LBB42_2446: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit462.i - ld a0, 328(s7) + ld a0, 328(s0) lui a1, 1 addiw a1, a1, 848 add a1, sp, a1 @@ -50279,7 +50277,7 @@ # %bb.2447: # %if.then.i.i464.i call _ZdlPv@plt .LBB42_2448: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit468.i - ld a0, 360(s7) + ld a0, 360(s0) lui a1, 1 addiw a1, a1, 880 add a1, sp, a1 @@ -50287,7 +50285,7 @@ # %bb.2449: # %if.then.i.i470.i call _ZdlPv@plt .LBB42_2450: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit474.i - ld a0, 392(s7) + ld a0, 392(s0) lui a1, 1 addiw a1, a1, 912 add a1, sp, a1 @@ -50295,7 +50293,7 @@ # %bb.2451: # %if.then.i.i476.i call _ZdlPv@plt .LBB42_2452: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit480.i - ld a0, 424(s7) + ld a0, 424(s0) lui a1, 1 addiw a1, a1, 944 add a1, sp, a1 @@ -50303,7 +50301,7 @@ # %bb.2453: # %if.then.i.i482.i call _ZdlPv@plt .LBB42_2454: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit486.i - ld a0, 456(s7) + ld a0, 456(s0) lui a1, 1 addiw a1, a1, 976 add a1, sp, a1 @@ -50311,7 +50309,7 @@ # %bb.2455: # %if.then.i.i488.i call _ZdlPv@plt .LBB42_2456: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit492.i - ld a0, 488(s7) + ld a0, 488(s0) lui a1, 1 addiw a1, a1, 1008 add a1, sp, a1 @@ -50319,7 +50317,7 @@ # %bb.2457: # %if.then.i.i494.i call _ZdlPv@plt .LBB42_2458: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit498.i - ld a0, 520(s7) + ld a0, 520(s0) lui a1, 1 addiw a1, a1, 1040 add a1, sp, a1 @@ -50327,7 +50325,7 @@ # %bb.2459: # %if.then.i.i500.i call _ZdlPv@plt .LBB42_2460: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit504.i - ld a0, 552(s7) + ld a0, 552(s0) lui a1, 1 addiw a1, a1, 1072 add a1, sp, a1 @@ -50335,7 +50333,7 @@ # %bb.2461: # %if.then.i.i506.i call _ZdlPv@plt .LBB42_2462: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit510.i - ld a0, 584(s7) + ld a0, 584(s0) lui a1, 1 addiw a1, a1, 1104 add a1, sp, a1 @@ -50343,7 +50341,7 @@ # %bb.2463: # %if.then.i.i512.i call _ZdlPv@plt .LBB42_2464: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit516.i - ld a0, 616(s7) + ld a0, 616(s0) lui a1, 1 addiw a1, a1, 1136 add a1, sp, a1 @@ -50351,7 +50349,7 @@ # %bb.2465: # %if.then.i.i518.i call _ZdlPv@plt .LBB42_2466: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit522.i - ld a0, 648(s7) + ld a0, 648(s0) lui a1, 1 addiw a1, a1, 1168 add a1, sp, a1 @@ -50359,15 +50357,12 @@ # %bb.2467: # %if.then.i.i524.i call _ZdlPv@plt .LBB42_2468: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit528.i - ld a0, 680(s7) - lui a1, 1 - addiw a1, a1, 1200 - add a1, sp, a1 - beq a0, a1, .LBB42_2470 + ld a0, 680(s0) + beq a0, s1, .LBB42_2470 # %bb.2469: # %if.then.i.i530.i call _ZdlPv@plt .LBB42_2470: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit534.i - ld a0, 712(s7) + ld a0, 712(s0) lui a1, 1 addiw a1, a1, 1232 add a1, sp, a1 @@ -50375,7 +50370,7 @@ # %bb.2471: # %if.then.i.i536.i call _ZdlPv@plt .LBB42_2472: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit540.i - ld a0, 744(s7) + ld a0, 744(s0) lui a1, 1 addiw a1, a1, 1264 add a1, sp, a1 @@ -50383,7 +50378,7 @@ # %bb.2473: # %if.then.i.i542.i call _ZdlPv@plt .LBB42_2474: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit546.i - ld a0, 776(s7) + ld a0, 776(s0) lui a1, 1 addiw a1, a1, 1296 add a1, sp, a1 @@ -50391,7 +50386,7 @@ # %bb.2475: # %if.then.i.i548.i call _ZdlPv@plt .LBB42_2476: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit552.i - ld a0, 808(s7) + ld a0, 808(s0) lui a1, 1 addiw a1, a1, 1328 add a1, sp, a1 @@ -50399,7 +50394,7 @@ # %bb.2477: # %if.then.i.i554.i call _ZdlPv@plt .LBB42_2478: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit558.i - ld a0, 840(s7) + ld a0, 840(s0) lui a1, 1 addiw a1, a1, 1360 add a1, sp, a1 @@ -50407,7 +50402,7 @@ # %bb.2479: # %if.then.i.i560.i call _ZdlPv@plt .LBB42_2480: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit564.i - ld a0, 872(s7) + ld a0, 872(s0) lui a1, 1 addiw a1, a1, 1392 add a1, sp, a1 @@ -50415,7 +50410,7 @@ # %bb.2481: # %if.then.i.i566.i call _ZdlPv@plt .LBB42_2482: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit570.i - ld a0, 904(s7) + ld a0, 904(s0) lui a1, 1 addiw a1, a1, 1424 add a1, sp, a1 @@ -50423,7 +50418,7 @@ # %bb.2483: # %if.then.i.i572.i call _ZdlPv@plt .LBB42_2484: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit576.i - ld a0, 936(s7) + ld a0, 936(s0) lui a1, 1 addiw a1, a1, 1456 add a1, sp, a1 @@ -50431,7 +50426,7 @@ # %bb.2485: # %if.then.i.i578.i call _ZdlPv@plt .LBB42_2486: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit582.i - ld a0, 968(s7) + ld a0, 968(s0) lui a1, 1 addiw a1, a1, 1488 add a1, sp, a1 @@ -50439,7 +50434,7 @@ # %bb.2487: # %if.then.i.i584.i call _ZdlPv@plt .LBB42_2488: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit588.i - ld a0, 1000(s7) + ld a0, 1000(s0) lui a1, 1 addiw a1, a1, 1520 add a1, sp, a1 @@ -50447,7 +50442,7 @@ # %bb.2489: # %if.then.i.i590.i call _ZdlPv@plt .LBB42_2490: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit594.i - ld a0, 1032(s7) + ld a0, 1032(s0) lui a1, 1 addiw a1, a1, 1552 add a1, sp, a1 @@ -50455,7 +50450,7 @@ # %bb.2491: # %if.then.i.i596.i call _ZdlPv@plt .LBB42_2492: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit600.i - ld a0, 1064(s7) + ld a0, 1064(s0) lui a1, 1 addiw a1, a1, 1584 add a1, sp, a1 @@ -50465,7 +50460,8 @@ .LBB42_2494: # %__cxx_global_var_init.263.exit .Lpcrel_hi535: auipc a0, %pcrel_hi(dummy695) - sw s2, %pcrel_lo(.Lpcrel_hi535)(a0) + ld a1, 144(sp) # 8-byte Folded Reload + sw a1, %pcrel_lo(.Lpcrel_hi535)(a0) lui a0, 1 addiw a0, a0, 504 add s0, sp, a0 @@ -54617,7 +54613,7 @@ call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3855: # %bb.2885: # %invoke.cont52.i10479 - addi s5, sp, 1256 + addi s3, sp, 1256 lui a0, 1 addiw a0, a0, 1328 add a0, sp, a0 @@ -54670,11 +54666,11 @@ addiw a0, a0, 1312 add a1, sp, a0 li a2, 1 - mv a0, s5 + mv a0, s3 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3861: # %bb.2887: # %invoke.cont59.i10494 - addi s5, sp, 1344 + addi s3, sp, 1344 lui a0, 1 addiw a0, a0, 1296 add a0, sp, a0 @@ -54724,11 +54720,11 @@ slli a0, a0, 8 add a1, sp, a0 li a2, 1 - mv a0, s5 + mv a0, s3 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3867: # %bb.2889: # %invoke.cont66.i10507 - addi s5, sp, 1432 + addi s3, sp, 1432 lui a0, 1 addiw a0, a0, 1264 add a0, sp, a0 @@ -54769,11 +54765,11 @@ addiw a0, a0, 1248 add a1, sp, a0 li a2, 1 - mv a0, s5 + mv a0, s3 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3873: # %bb.2891: # %invoke.cont73.i10523 - addi s5, sp, 1520 + addi s3, sp, 1520 lui a0, 1 addiw a0, a0, 1232 add a0, sp, a0 @@ -54824,12 +54820,12 @@ lui a0, 1 addiw a0, a0, 1216 add a1, sp, a0 - mv a0, s5 + mv a0, s3 li a2, 0 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3879: # %bb.2893: # %invoke.cont80.i10539 - addi s5, sp, 1608 + addi s3, sp, 1608 sd s2, 680(s4) li a0, 46 sd a0, 648(s4) @@ -54866,7 +54862,7 @@ lui a0, 1 addiw a0, a0, 1184 add a1, sp, a0 - mv a0, s5 + mv a0, s3 li a2, 0 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3885: @@ -54923,7 +54919,7 @@ call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3891: # %bb.2897: # %invoke.cont94.i10571 - addi s5, sp, 1784 + addi s3, sp, 1784 lui a0, 1 addiw a0, a0, 1136 add a0, sp, a0 @@ -54957,12 +54953,12 @@ addiw a0, a0, 1120 add a1, sp, a0 li a2, 1 - li s3, 1 - mv a0, s5 + li s2, 1 + mv a0, s3 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3897: # %bb.2899: # %invoke.cont101.i10588 - addi s2, sp, 1872 + addi s3, sp, 1872 lui a0, 1 addiw a0, a0, 1104 add a0, sp, a0 @@ -55005,12 +55001,12 @@ addiw a0, a0, 1088 add a1, sp, a0 li a2, 1 - li s3, 1 - mv a0, s2 + li s2, 1 + mv a0, s3 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3903: # %bb.2901: # %invoke.cont108.i10604 - addi s2, sp, 1960 + addi s3, sp, 1960 lui a0, 1 addiw a0, a0, 1072 add a0, sp, a0 @@ -55060,13 +55056,13 @@ addiw a0, a0, 1056 add a1, sp, a0 li a2, 1 - li s3, 1 - mv a0, s2 + li s2, 1 + mv a0, s3 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3909: # %bb.2903: # %invoke.cont115.i10620 - addi s2, sp, 2047 - addi s2, s2, 1 + addi s3, sp, 2047 + addi s3, s3, 1 lui a0, 1 addiw a0, a0, 1040 add a0, sp, a0 @@ -55110,13 +55106,13 @@ slli a0, a0, 10 add a1, sp, a0 li a2, 1 - li s3, 1 - mv a0, s2 + li s2, 1 + mv a0, s3 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3915: # %bb.2905: # %invoke.cont122.i10634 - addi s5, sp, 2047 - addi s5, s5, 89 + addi s3, sp, 2047 + addi s3, s3, 89 lui a0, 1 addiw a0, a0, 1008 add a0, sp, a0 @@ -55134,13 +55130,13 @@ addiw a0, a0, 992 add a1, sp, a0 li a2, 1 - li s3, 1 - mv a0, s5 + li s2, 1 + mv a0, s3 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3918: # %bb.2906: # %invoke.cont129.i10647 - addi s2, sp, 2047 - addi s2, s2, 177 + addi s3, sp, 2047 + addi s3, s3, 177 lui a0, 1 addiw a0, a0, 976 add a0, sp, a0 @@ -55189,13 +55185,13 @@ addiw a0, a0, 960 add a1, sp, a0 li a2, 1 - li s3, 1 - mv a0, s2 + li s2, 1 + mv a0, s3 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3924: # %bb.2908: # %invoke.cont136.i10663 - addi s2, sp, 2047 - addi s2, s2, 265 + addi s3, sp, 2047 + addi s3, s3, 265 lui a0, 1 addiw a0, a0, 944 add a0, sp, a0 @@ -55245,13 +55241,13 @@ addiw a0, a0, 928 add a1, sp, a0 li a2, 1 - li s3, 1 - mv a0, s2 + li s2, 1 + mv a0, s3 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3930: # %bb.2910: # %invoke.cont143.i10679 - addi s2, sp, 2047 - addi s2, s2, 353 + addi s3, sp, 2047 + addi s3, s3, 353 lui a0, 1 addiw a0, a0, 912 add a0, sp, a0 @@ -55292,13 +55288,13 @@ addiw a0, a0, 896 add a1, sp, a0 li a2, 1 - li s3, 1 - mv a0, s2 + li s2, 1 + mv a0, s3 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3936: # %bb.2912: # %invoke.cont150.i10695 - addi s2, sp, 2047 - addi s2, s2, 441 + addi s3, sp, 2047 + addi s3, s3, 441 lui a0, 1 addiw a0, a0, 880 add a0, sp, a0 @@ -55345,13 +55341,13 @@ lui a0, 1 addiw a0, a0, 864 add a1, sp, a0 - mv a0, s2 + mv a0, s3 li a2, 0 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3942: # %bb.2914: # %invoke.cont157.i10711 - addi s2, sp, 2047 - addi s2, s2, 529 + addi s3, sp, 2047 + addi s3, s3, 529 lui a0, 1 addiw a0, a0, 848 add a0, sp, a0 @@ -55391,7 +55387,7 @@ lui a0, 1 addiw a0, a0, 832 add a1, sp, a0 - mv a0, s2 + mv a0, s3 li a2, 0 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3948: @@ -55446,20 +55442,20 @@ addiw a0, a0, 800 add a1, sp, a0 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s7 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3954: # %bb.2918: # %invoke.cont171.i10741 addi a0, sp, 552 addi a0, a0, 2047 - addi s5, a0, 153 + addi s8, a0, 153 lui a0, 1 addiw a0, a0, 784 add a0, sp, a0 sd a0, 264(s4) - li s2, 32 - sd s2, 232(s4) + li s3, 32 + sd s3, 232(s4) .Ltmp3956: li a0, 19 slli a0, a0, 8 @@ -55474,7 +55470,7 @@ ld a1, 232(s4) sd a0, 264(s4) sd a1, 280(s4) - vsetvli zero, s2, e8, m2, ta, ma + vsetvli zero, s3, e8, m2, ta, ma ld a2, 160(sp) # 8-byte Folded Reload vle8.v v8, (a2) vse8.v v8, (a0) @@ -55487,14 +55483,14 @@ slli a0, a0, 8 add a1, sp, a0 li a2, 1 - li s3, 1 - mv a0, s5 + li s2, 1 + mv a0, s8 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3960: # %bb.2920: # %invoke.cont178.i10757 addi a0, sp, 552 addi a0, a0, 2047 - addi s8, a0, 241 + addi s5, a0, 241 lui a0, 1 addiw a0, a0, 752 add a0, sp, a0 @@ -55537,8 +55533,8 @@ addiw a0, a0, 736 add a1, sp, a0 li a2, 1 - li s3, 1 - mv a0, s8 + li s2, 1 + mv a0, s5 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3966: # %bb.2922: # %invoke.cont185.i10773 @@ -55594,14 +55590,14 @@ addiw a0, a0, 704 add a1, sp, a0 li a2, 1 - li s3, 1 + li s2, 1 mv a0, s6 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3972: # %bb.2924: # %invoke.cont192.i10789 addi a0, sp, 552 addi a0, a0, 2047 - addi s9, a0, 417 + addi s10, a0, 417 lui a0, 1 addiw a0, a0, 688 add a0, sp, a0 @@ -55645,14 +55641,15 @@ addiw a0, a0, 672 add a1, sp, a0 li a2, 1 - li s3, 1 - mv a0, s9 + li s2, 1 + mv a0, s10 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3978: # %bb.2926: # %invoke.cont199.i10805 + sd s8, 160(sp) # 8-byte Folded Spill addi a0, sp, 552 addi s0, a0, 2047 - addi s10, s0, 505 + addi s11, s0, 505 lui a0, 1 addiw a0, a0, 656 add a0, sp, a0 @@ -55670,12 +55667,12 @@ addiw a0, a0, 640 add a1, sp, a0 li a2, 1 - li s3, 1 - mv a0, s10 + li s2, 1 + mv a0, s11 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3981: # %bb.2927: # %invoke.cont206.i10818 - addi s11, s0, 593 + addi s8, s0, 593 lui a0, 1 addiw a0, a0, 624 add a0, sp, a0 @@ -55693,7 +55690,7 @@ call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm@plt .Ltmp3984: # %bb.2928: # %call2.i5.i.noexc427.i10822 - sd s8, 144(sp) # 8-byte Folded Spill + sd s7, 144(sp) # 8-byte Folded Spill ld a1, 72(s4) sd a0, 104(s4) sd a1, 120(s4) @@ -55725,15 +55722,14 @@ addiw a0, a0, 608 add a1, sp, a0 li a2, 1 - li s3, 1 - mv a0, s11 + li s2, 1 + mv a0, s8 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3987: # %bb.2929: # %invoke.cont213.i10834 - sd s5, 136(sp) # 8-byte Folded Spill addi a0, sp, 552 addi a0, a0, 2047 - addi s8, a0, 681 + addi s7, a0, 681 lui a0, 1 addiw a0, a0, 592 add a0, sp, a0 @@ -55751,7 +55747,6 @@ call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm@plt .Ltmp3990: # %bb.2930: # %call2.i5.i.noexc439.i10838 - mv s5, s7 ld a1, 40(s4) sd a0, 72(s4) sd a1, 88(s4) @@ -55784,14 +55779,14 @@ addiw a0, a0, 576 add a1, sp, a0 li a2, 1 - li s3, 1 - mv a0, s8 + li s2, 1 + mv a0, s7 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3993: # %bb.2931: # %invoke.cont220.i10850 addi a0, sp, 552 addi a0, a0, 2047 - addi s7, a0, 769 + addi s0, a0, 769 lui a0, 1 addiw a0, a0, 560 add a0, sp, a0 @@ -55832,14 +55827,14 @@ addiw a0, a0, 544 add a1, sp, a0 li a2, 1 - li s3, 1 - mv a0, s7 + li s2, 1 + mv a0, s0 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp3999: # %bb.2933: # %invoke.cont227.i10865 addi a0, sp, 552 addi a0, a0, 2047 - addi s2, a0, 857 + addi s3, a0, 857 lui a0, 1 addiw a0, a0, 528 add a0, sp, a0 @@ -55879,7 +55874,7 @@ ld a0, 8(s4) lui a2, 1 addiw a2, a2, 504 - add s0, sp, a2 + add s9, sp, a2 sd a1, 16(s4) add a0, a0, a1 sb zero, 0(a0) @@ -55887,7 +55882,7 @@ li a0, 9 slli a0, a0, 9 add a1, sp, a0 - mv a0, s2 + mv a0, s3 li a2, 0 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp4005: @@ -55896,13 +55891,13 @@ li a0, 2 addi a1, sp, 552 li a2, 34 - addi s3, sp, 552 + addi s4, sp, 552 call _Z8AddCases10TestCaseIDSt16initializer_listI8TestCaseE@plt - sd a0, 160(sp) # 8-byte Folded Spill .Ltmp4008: # %bb.2936: # %invoke.cont236.i - addi a0, s3, 2047 - addi s2, a0, 945 + mv s2, a0 + addi a0, s4, 2047 + addi s1, a0, 945 lui a0, 1048575 addiw s3, a0, 1104 li s4, -1 @@ -55911,12 +55906,12 @@ .LBB42_2937: # %_ZN8TestCaseD2Ev.exit.i10904 # in Loop: Header=BB42_2938 Depth=1 addi s3, s3, 88 - addi s2, s2, -88 + addi s1, s1, -88 beqz s3, .LBB42_2950 .LBB42_2938: # %arraydestroy.body.i10884 # =>This Inner Loop Header: Depth=1 - ld s1, -8(s2) - beqz s1, .LBB42_2945 + ld s0, -8(s1) + beqz s0, .LBB42_2945 # %bb.2939: # %if.then.i.i.i.i10889 # in Loop: Header=BB42_2938 Depth=1 .Lpcrel_hi595: @@ -55926,52 +55921,52 @@ beqz a0, .LBB42_2941 # %bb.2940: # %if.then.i.i.i.i.i.i10892 # in Loop: Header=BB42_2938 Depth=1 - lw a0, 48(s1) + lw a0, 48(s0) addi a1, a0, -1 - sw a1, 48(s1) + sw a1, 48(s0) sext.w a0, a0 beq a0, s5, .LBB42_2942 j .LBB42_2945 .LBB42_2941: # %if.else.i.i.i.i.i.i11087 # in Loop: Header=BB42_2938 Depth=1 - addi a0, s1, 48 + addi a0, s0, 48 amoadd.w.aqrl a0, s4, (a0) sext.w a0, a0 bne a0, s5, .LBB42_2945 .LBB42_2942: # %if.then.i.i.i.i467.i # in Loop: Header=BB42_2938 Depth=1 - ld a0, 0(s1) + ld a0, 0(s0) ld a1, 16(a0) - mv a0, s1 + mv a0, s0 jalr a1 fence.tso lbu a0, 0(s6) beqz a0, .LBB42_2949 # %bb.2943: # %if.then.i.i.i.i.i.i.i11078 # in Loop: Header=BB42_2938 Depth=1 - lw a0, 52(s1) + lw a0, 52(s0) addi a1, a0, -1 - sw a1, 52(s1) + sw a1, 52(s0) sext.w a0, a0 bne a0, s5, .LBB42_2945 .LBB42_2944: # %if.then.i1.i.i.i.i.i11083 # in Loop: Header=BB42_2938 Depth=1 - ld a0, 0(s1) + ld a0, 0(s0) ld a1, 24(a0) - mv a0, s1 + mv a0, s0 jalr a1 .LBB42_2945: # %_ZNSt12__shared_ptrIN9benchmark5RegexELN9__gnu_cxx12_Lock_policyE1EED2Ev.exit.i.i10897 # in Loop: Header=BB42_2938 Depth=1 - ld a0, -48(s2) - addi a1, s2, -32 + ld a0, -48(s1) + addi a1, s1, -32 beq a1, a0, .LBB42_2947 # %bb.2946: # %if.then.i.i2.i.i10900 # in Loop: Header=BB42_2938 Depth=1 call _ZdlPv@plt .LBB42_2947: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.i.i10901 # in Loop: Header=BB42_2938 Depth=1 - ld a0, -88(s2) - addi a1, s2, -72 + ld a0, -88(s1) + addi a1, s1, -72 beq a1, a0, .LBB42_2937 # %bb.2948: # %if.then.i.i4.i.i10903 # in Loop: Header=BB42_2938 Depth=1 @@ -55979,13 +55974,13 @@ j .LBB42_2937 .LBB42_2949: # %if.else.i.i.i.i.i.i.i11086 # in Loop: Header=BB42_2938 Depth=1 - addi a0, s1, 52 + addi a0, s0, 52 amoadd.w.aqrl a0, s4, (a0) sext.w a0, a0 beq a0, s5, .LBB42_2944 j .LBB42_2945 .LBB42_2950: # %arraydestroy.done237.i - ld a0, 8(s0) + ld a0, 8(s9) lui a1, 1 addiw a1, a1, 528 add a1, sp, a1 @@ -55993,10 +55988,7 @@ # %bb.2951: # %if.then.i.i468.i call _ZdlPv@plt .LBB42_2952: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.i10907 - ld a0, 40(s0) - lui a1, 1 - addiw a1, a1, 1200 - add s1, sp, a1 + ld a0, 40(s9) lui a1, 1 addiw a1, a1, 560 add a1, sp, a1 @@ -56004,7 +55996,7 @@ # %bb.2953: # %if.then.i.i470.i10909 call _ZdlPv@plt .LBB42_2954: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit474.i10910 - ld a0, 72(s0) + ld a0, 72(s9) lui a1, 1 addiw a1, a1, 592 add a1, sp, a1 @@ -56012,7 +56004,7 @@ # %bb.2955: # %if.then.i.i476.i10912 call _ZdlPv@plt .LBB42_2956: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit480.i10913 - ld a0, 104(s0) + ld a0, 104(s9) lui a1, 1 addiw a1, a1, 624 add a1, sp, a1 @@ -56020,7 +56012,7 @@ # %bb.2957: # %if.then.i.i482.i10915 call _ZdlPv@plt .LBB42_2958: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit486.i10916 - ld a0, 136(s0) + ld a0, 136(s9) lui a1, 1 addiw a1, a1, 656 add a1, sp, a1 @@ -56028,7 +56020,7 @@ # %bb.2959: # %if.then.i.i488.i10918 call _ZdlPv@plt .LBB42_2960: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit492.i10919 - ld a0, 168(s0) + ld a0, 168(s9) lui a1, 1 addiw a1, a1, 688 add a1, sp, a1 @@ -56036,7 +56028,7 @@ # %bb.2961: # %if.then.i.i494.i10921 call _ZdlPv@plt .LBB42_2962: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit498.i10922 - ld a0, 200(s0) + ld a0, 200(s9) lui a1, 1 addiw a1, a1, 720 add a1, sp, a1 @@ -56044,7 +56036,7 @@ # %bb.2963: # %if.then.i.i500.i10924 call _ZdlPv@plt .LBB42_2964: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit504.i10925 - ld a0, 232(s0) + ld a0, 232(s9) lui a1, 1 addiw a1, a1, 752 add a1, sp, a1 @@ -56052,7 +56044,7 @@ # %bb.2965: # %if.then.i.i506.i10927 call _ZdlPv@plt .LBB42_2966: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit510.i10928 - ld a0, 264(s0) + ld a0, 264(s9) lui a1, 1 addiw a1, a1, 784 add a1, sp, a1 @@ -56060,7 +56052,7 @@ # %bb.2967: # %if.then.i.i512.i10930 call _ZdlPv@plt .LBB42_2968: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit516.i10931 - ld a0, 296(s0) + ld a0, 296(s9) lui a1, 1 addiw a1, a1, 816 add a1, sp, a1 @@ -56068,7 +56060,7 @@ # %bb.2969: # %if.then.i.i518.i10933 call _ZdlPv@plt .LBB42_2970: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit522.i10934 - ld a0, 328(s0) + ld a0, 328(s9) lui a1, 1 addiw a1, a1, 848 add a1, sp, a1 @@ -56076,7 +56068,7 @@ # %bb.2971: # %if.then.i.i524.i10936 call _ZdlPv@plt .LBB42_2972: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit528.i10937 - ld a0, 360(s0) + ld a0, 360(s9) lui a1, 1 addiw a1, a1, 880 add a1, sp, a1 @@ -56084,7 +56076,7 @@ # %bb.2973: # %if.then.i.i530.i10939 call _ZdlPv@plt .LBB42_2974: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit534.i10940 - ld a0, 392(s0) + ld a0, 392(s9) lui a1, 1 addiw a1, a1, 912 add a1, sp, a1 @@ -56092,7 +56084,7 @@ # %bb.2975: # %if.then.i.i536.i10942 call _ZdlPv@plt .LBB42_2976: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit540.i10943 - ld a0, 424(s0) + ld a0, 424(s9) lui a1, 1 addiw a1, a1, 944 add a1, sp, a1 @@ -56100,7 +56092,7 @@ # %bb.2977: # %if.then.i.i542.i10945 call _ZdlPv@plt .LBB42_2978: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit546.i10946 - ld a0, 456(s0) + ld a0, 456(s9) lui a1, 1 addiw a1, a1, 976 add a1, sp, a1 @@ -56108,7 +56100,7 @@ # %bb.2979: # %if.then.i.i548.i10948 call _ZdlPv@plt .LBB42_2980: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit552.i10949 - ld a0, 488(s0) + ld a0, 488(s9) lui a1, 1 addiw a1, a1, 1008 add a1, sp, a1 @@ -56116,7 +56108,7 @@ # %bb.2981: # %if.then.i.i554.i10951 call _ZdlPv@plt .LBB42_2982: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit558.i10952 - ld a0, 520(s0) + ld a0, 520(s9) lui a1, 1 addiw a1, a1, 1040 add a1, sp, a1 @@ -56124,7 +56116,7 @@ # %bb.2983: # %if.then.i.i560.i10954 call _ZdlPv@plt .LBB42_2984: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit564.i10955 - ld a0, 552(s0) + ld a0, 552(s9) lui a1, 1 addiw a1, a1, 1072 add a1, sp, a1 @@ -56132,7 +56124,7 @@ # %bb.2985: # %if.then.i.i566.i10957 call _ZdlPv@plt .LBB42_2986: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit570.i10958 - ld a0, 584(s0) + ld a0, 584(s9) lui a1, 1 addiw a1, a1, 1104 add a1, sp, a1 @@ -56140,7 +56132,7 @@ # %bb.2987: # %if.then.i.i572.i10960 call _ZdlPv@plt .LBB42_2988: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit576.i10961 - ld a0, 616(s0) + ld a0, 616(s9) lui a1, 1 addiw a1, a1, 1136 add a1, sp, a1 @@ -56148,7 +56140,7 @@ # %bb.2989: # %if.then.i.i578.i10963 call _ZdlPv@plt .LBB42_2990: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit582.i10964 - ld a0, 648(s0) + ld a0, 648(s9) lui a1, 1 addiw a1, a1, 1168 add a1, sp, a1 @@ -56156,12 +56148,15 @@ # %bb.2991: # %if.then.i.i584.i10966 call _ZdlPv@plt .LBB42_2992: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit588.i10967 - ld a0, 680(s0) - beq a0, s1, .LBB42_2994 + ld a0, 680(s9) + lui a1, 1 + addiw a1, a1, 1200 + add a1, sp, a1 + beq a0, a1, .LBB42_2994 # %bb.2993: # %if.then.i.i590.i10969 call _ZdlPv@plt .LBB42_2994: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit594.i10970 - ld a0, 712(s0) + ld a0, 712(s9) lui a1, 1 addiw a1, a1, 1232 add a1, sp, a1 @@ -56169,7 +56164,7 @@ # %bb.2995: # %if.then.i.i596.i10972 call _ZdlPv@plt .LBB42_2996: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit600.i10973 - ld a0, 744(s0) + ld a0, 744(s9) lui a1, 1 addiw a1, a1, 1264 add a1, sp, a1 @@ -56177,7 +56172,7 @@ # %bb.2997: # %if.then.i.i602.i10975 call _ZdlPv@plt .LBB42_2998: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit606.i - ld a0, 776(s0) + ld a0, 776(s9) lui a1, 1 addiw a1, a1, 1296 add a1, sp, a1 @@ -56185,7 +56180,7 @@ # %bb.2999: # %if.then.i.i608.i10977 call _ZdlPv@plt .LBB42_3000: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit612.i - ld a0, 808(s0) + ld a0, 808(s9) lui a1, 1 addiw a1, a1, 1328 add a1, sp, a1 @@ -56193,7 +56188,7 @@ # %bb.3001: # %if.then.i.i614.i10979 call _ZdlPv@plt .LBB42_3002: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit618.i - ld a0, 840(s0) + ld a0, 840(s9) lui a1, 1 addiw a1, a1, 1360 add a1, sp, a1 @@ -56201,7 +56196,7 @@ # %bb.3003: # %if.then.i.i620.i10981 call _ZdlPv@plt .LBB42_3004: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit624.i - ld a0, 872(s0) + ld a0, 872(s9) lui a1, 1 addiw a1, a1, 1392 add a1, sp, a1 @@ -56209,7 +56204,7 @@ # %bb.3005: # %if.then.i.i626.i10983 call _ZdlPv@plt .LBB42_3006: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit630.i - ld a0, 904(s0) + ld a0, 904(s9) lui a1, 1 addiw a1, a1, 1424 add a1, sp, a1 @@ -56217,7 +56212,7 @@ # %bb.3007: # %if.then.i.i632.i10985 call _ZdlPv@plt .LBB42_3008: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit636.i - ld a0, 936(s0) + ld a0, 936(s9) lui a1, 1 addiw a1, a1, 1456 add a1, sp, a1 @@ -56225,7 +56220,7 @@ # %bb.3009: # %if.then.i.i638.i10987 call _ZdlPv@plt .LBB42_3010: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit642.i10988 - ld a0, 968(s0) + ld a0, 968(s9) lui a1, 1 addiw a1, a1, 1488 add a1, sp, a1 @@ -56233,7 +56228,7 @@ # %bb.3011: # %if.then.i.i644.i10990 call _ZdlPv@plt .LBB42_3012: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit648.i10991 - ld a0, 1000(s0) + ld a0, 1000(s9) lui a1, 1 addiw a1, a1, 1520 add a1, sp, a1 @@ -56241,7 +56236,7 @@ # %bb.3013: # %if.then.i.i650.i10993 call _ZdlPv@plt .LBB42_3014: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit654.i10994 - ld a0, 1032(s0) + ld a0, 1032(s9) lui a1, 1 addiw a1, a1, 1552 add a1, sp, a1 @@ -56249,7 +56244,7 @@ # %bb.3015: # %if.then.i.i656.i10996 call _ZdlPv@plt .LBB42_3016: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit660.i10997 - ld a0, 1064(s0) + ld a0, 1064(s9) lui a1, 1 addiw a1, a1, 1584 add a1, sp, a1 @@ -56259,8 +56254,7 @@ .LBB42_3018: # %__cxx_global_var_init.297.exit .Lpcrel_hi596: auipc a0, %pcrel_hi(dummy804) - ld a1, 160(sp) # 8-byte Folded Reload - sw a1, %pcrel_lo(.Lpcrel_hi596)(a0) + sw s2, %pcrel_lo(.Lpcrel_hi596)(a0) lui a0, 1 addiw a0, a0, 504 add s0, sp, a0 @@ -59121,9 +59115,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5499 + bne a0, a1, .LBB42_5501 j .LBB42_11 -.LBB42_5499: # %if.else.i.i.i.i.i.i.i +.LBB42_5501: # %if.else.i.i.i.i.i.i.i j .LBB42_12 .LBB42_3272: # %if.else.i.i.i.i.i.i.1.i addi a0, s1, 52 @@ -59131,9 +59125,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5500 + bne a0, a1, .LBB42_5502 j .LBB42_22 -.LBB42_5500: # %if.else.i.i.i.i.i.i.1.i +.LBB42_5502: # %if.else.i.i.i.i.i.i.1.i j .LBB42_23 .LBB42_3273: # %if.else.i.i.i.i.i.i.2.i addi a0, s1, 52 @@ -59141,9 +59135,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5501 + bne a0, a1, .LBB42_5503 j .LBB42_33 -.LBB42_5501: # %if.else.i.i.i.i.i.i.2.i +.LBB42_5503: # %if.else.i.i.i.i.i.i.2.i j .LBB42_34 .LBB42_3274: # %if.else.i.i.i.i.i.i.i.i addi a0, s0, 52 @@ -59151,9 +59145,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5502 + bne a0, a1, .LBB42_5504 j .LBB42_57 -.LBB42_5502: # %if.else.i.i.i.i.i.i.i.i +.LBB42_5504: # %if.else.i.i.i.i.i.i.i.i j .LBB42_58 .LBB42_3275: # %if.else.i.i.i.i.i.i.1.i.i addi a0, s0, 52 @@ -59161,9 +59155,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5503 + bne a0, a1, .LBB42_5505 j .LBB42_68 -.LBB42_5503: # %if.else.i.i.i.i.i.i.1.i.i +.LBB42_5505: # %if.else.i.i.i.i.i.i.1.i.i j .LBB42_69 .LBB42_3276: # %if.else.i.i.i.i.i.i.2.i.i addi a0, s0, 52 @@ -59171,9 +59165,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5504 + bne a0, a1, .LBB42_5506 j .LBB42_79 -.LBB42_5504: # %if.else.i.i.i.i.i.i.2.i.i +.LBB42_5506: # %if.else.i.i.i.i.i.i.2.i.i j .LBB42_80 .LBB42_3277: # %if.else.i.i.i.i.i.i745.i.i addi a0, s0, 52 @@ -59181,9 +59175,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5505 + bne a0, a1, .LBB42_5507 j .LBB42_279 -.LBB42_5505: # %if.else.i.i.i.i.i.i745.i.i +.LBB42_5507: # %if.else.i.i.i.i.i.i745.i.i j .LBB42_280 .LBB42_3278: # %if.else.i.i.i.i.i.i873.i.i addi a0, s0, 52 @@ -59191,9 +59185,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5506 + bne a0, a1, .LBB42_5508 j .LBB42_312 -.LBB42_5506: # %if.else.i.i.i.i.i.i873.i.i +.LBB42_5508: # %if.else.i.i.i.i.i.i873.i.i j .LBB42_313 .LBB42_3279: # %if.else.i.i.i.i.i.i.i63 addi a0, s1, 52 @@ -59201,9 +59195,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5507 + bne a0, a1, .LBB42_5509 j .LBB42_327 -.LBB42_5507: # %if.else.i.i.i.i.i.i.i63 +.LBB42_5509: # %if.else.i.i.i.i.i.i.i63 j .LBB42_328 .LBB42_3280: # %if.else.i.i.i.i.i.i.i126 addi a0, s1, 52 @@ -59211,9 +59205,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5508 + bne a0, a1, .LBB42_5510 j .LBB42_343 -.LBB42_5508: # %if.else.i.i.i.i.i.i.i126 +.LBB42_5510: # %if.else.i.i.i.i.i.i.i126 j .LBB42_344 .LBB42_3281: # %if.else.i.i.i.i.i.i.i264 addi a0, s1, 52 @@ -59221,9 +59215,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5509 + bne a0, a1, .LBB42_5511 j .LBB42_422 -.LBB42_5509: # %if.else.i.i.i.i.i.i.i264 +.LBB42_5511: # %if.else.i.i.i.i.i.i.i264 j .LBB42_423 .LBB42_3282: # %if.else.i.i.i.i.i.i.i332 addi a0, s1, 52 @@ -59231,9 +59225,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5510 + bne a0, a1, .LBB42_5512 j .LBB42_438 -.LBB42_5510: # %if.else.i.i.i.i.i.i.i332 +.LBB42_5512: # %if.else.i.i.i.i.i.i.i332 j .LBB42_439 .LBB42_3283: # %if.else.i.i.i.i.i.i.i553 addi a0, s1, 52 @@ -59241,9 +59235,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5511 + bne a0, a1, .LBB42_5513 j .LBB42_521 -.LBB42_5511: # %if.else.i.i.i.i.i.i.i553 +.LBB42_5513: # %if.else.i.i.i.i.i.i.i553 j .LBB42_522 .LBB42_3284: # %if.else.i.i.i.i.i.i.i621 addi a0, s1, 52 @@ -59251,9 +59245,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5512 + bne a0, a1, .LBB42_5514 j .LBB42_537 -.LBB42_5512: # %if.else.i.i.i.i.i.i.i621 +.LBB42_5514: # %if.else.i.i.i.i.i.i.i621 j .LBB42_538 .LBB42_3285: # %if.else.i.i.i.i.i.i.i1065 addi a0, s1, 52 @@ -59261,9 +59255,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5513 + bne a0, a1, .LBB42_5515 j .LBB42_620 -.LBB42_5513: # %if.else.i.i.i.i.i.i.i1065 +.LBB42_5515: # %if.else.i.i.i.i.i.i.i1065 j .LBB42_621 .LBB42_3286: # %if.else.i.i.i.i.i.i.i1133 addi a0, s1, 52 @@ -59271,9 +59265,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5514 + bne a0, a1, .LBB42_5516 j .LBB42_636 -.LBB42_5514: # %if.else.i.i.i.i.i.i.i1133 +.LBB42_5516: # %if.else.i.i.i.i.i.i.i1133 j .LBB42_637 .LBB42_3287: # %if.else.i.i.i.i.i.i.i1577 addi a0, s1, 52 @@ -59281,9 +59275,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5515 + bne a0, a1, .LBB42_5517 j .LBB42_719 -.LBB42_5515: # %if.else.i.i.i.i.i.i.i1577 +.LBB42_5517: # %if.else.i.i.i.i.i.i.i1577 j .LBB42_720 .LBB42_3288: # %if.else.i.i.i.i.i.i.i1645 addi a0, s1, 52 @@ -59291,9 +59285,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5516 + bne a0, a1, .LBB42_5518 j .LBB42_735 -.LBB42_5516: # %if.else.i.i.i.i.i.i.i1645 +.LBB42_5518: # %if.else.i.i.i.i.i.i.i1645 j .LBB42_736 .LBB42_3289: # %if.else.i.i.i.i.i.i.i2065 addi a0, s1, 52 @@ -59301,9 +59295,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5517 + bne a0, a1, .LBB42_5519 j .LBB42_814 -.LBB42_5517: # %if.else.i.i.i.i.i.i.i2065 +.LBB42_5519: # %if.else.i.i.i.i.i.i.i2065 j .LBB42_815 .LBB42_3290: # %if.else.i.i.i.i.i.i.i2134 addi a0, s1, 52 @@ -59311,9 +59305,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5518 + bne a0, a1, .LBB42_5520 j .LBB42_830 -.LBB42_5518: # %if.else.i.i.i.i.i.i.i2134 +.LBB42_5520: # %if.else.i.i.i.i.i.i.i2134 j .LBB42_831 .LBB42_3291: # %if.else.i.i.i.i.i.i.i2554 addi a0, s1, 52 @@ -59321,9 +59315,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5519 + bne a0, a1, .LBB42_5521 j .LBB42_909 -.LBB42_5519: # %if.else.i.i.i.i.i.i.i2554 +.LBB42_5521: # %if.else.i.i.i.i.i.i.i2554 j .LBB42_910 .LBB42_3292: # %if.else.i.i.i.i.i.i.i2623 addi a0, s1, 52 @@ -59331,9 +59325,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5520 + bne a0, a1, .LBB42_5522 j .LBB42_925 -.LBB42_5520: # %if.else.i.i.i.i.i.i.i2623 +.LBB42_5522: # %if.else.i.i.i.i.i.i.i2623 j .LBB42_926 .LBB42_3293: # %if.else.i.i.i.i.i.i.i3043 addi a0, s1, 52 @@ -59341,9 +59335,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5521 + bne a0, a1, .LBB42_5523 j .LBB42_1004 -.LBB42_5521: # %if.else.i.i.i.i.i.i.i3043 +.LBB42_5523: # %if.else.i.i.i.i.i.i.i3043 j .LBB42_1005 .LBB42_3294: # %if.else.i.i.i.i.i.i.i3112 addi a0, s1, 52 @@ -59351,9 +59345,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5522 + bne a0, a1, .LBB42_5524 j .LBB42_1020 -.LBB42_5522: # %if.else.i.i.i.i.i.i.i3112 +.LBB42_5524: # %if.else.i.i.i.i.i.i.i3112 j .LBB42_1021 .LBB42_3295: # %if.else.i.i.i.i.i.i.i3532 addi a0, s1, 52 @@ -59361,9 +59355,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5523 + bne a0, a1, .LBB42_5525 j .LBB42_1099 -.LBB42_5523: # %if.else.i.i.i.i.i.i.i3532 +.LBB42_5525: # %if.else.i.i.i.i.i.i.i3532 j .LBB42_1100 .LBB42_3296: # %if.else.i.i.i.i.i.i.i3600 addi a0, s1, 52 @@ -59371,9 +59365,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5524 + bne a0, a1, .LBB42_5526 j .LBB42_1115 -.LBB42_5524: # %if.else.i.i.i.i.i.i.i3600 +.LBB42_5526: # %if.else.i.i.i.i.i.i.i3600 j .LBB42_1116 .LBB42_3297: # %if.else.i.i.i.i.i.i.i3849 addi a0, s1, 52 @@ -59381,9 +59375,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5525 + bne a0, a1, .LBB42_5527 j .LBB42_1183 -.LBB42_5525: # %if.else.i.i.i.i.i.i.i3849 +.LBB42_5527: # %if.else.i.i.i.i.i.i.i3849 j .LBB42_1184 .LBB42_3298: # %if.else.i.i.i.i.i.i.i3918 addi a0, s1, 52 @@ -59391,9 +59385,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5526 + bne a0, a1, .LBB42_5528 j .LBB42_1199 -.LBB42_5526: # %if.else.i.i.i.i.i.i.i3918 +.LBB42_5528: # %if.else.i.i.i.i.i.i.i3918 j .LBB42_1200 .LBB42_3299: # %if.else.i.i.i.i.i.i.i4129 addi a0, s1, 52 @@ -59401,9 +59395,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5527 + bne a0, a1, .LBB42_5529 j .LBB42_1259 -.LBB42_5527: # %if.else.i.i.i.i.i.i.i4129 +.LBB42_5529: # %if.else.i.i.i.i.i.i.i4129 j .LBB42_1260 .LBB42_3300: # %if.else.i.i.i.i.i.i.i4208 addi a0, s1, 52 @@ -59411,9 +59405,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5528 + bne a0, a1, .LBB42_5530 j .LBB42_1279 -.LBB42_5528: # %if.else.i.i.i.i.i.i.i4208 +.LBB42_5530: # %if.else.i.i.i.i.i.i.i4208 j .LBB42_1280 .LBB42_3301: # %if.else.i.i.i.i.i.i.i4512 addi a0, s1, 52 @@ -59421,9 +59415,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5529 + bne a0, a1, .LBB42_5531 j .LBB42_1339 -.LBB42_5529: # %if.else.i.i.i.i.i.i.i4512 +.LBB42_5531: # %if.else.i.i.i.i.i.i.i4512 j .LBB42_1340 .LBB42_3302: # %if.else.i.i.i.i.i.i.i4603 addi a0, s1, 52 @@ -59431,9 +59425,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5530 + bne a0, a1, .LBB42_5532 j .LBB42_1375 -.LBB42_5530: # %if.else.i.i.i.i.i.i.i4603 +.LBB42_5532: # %if.else.i.i.i.i.i.i.i4603 j .LBB42_1376 .LBB42_3303: # %if.else.i.i.i.i.i.i.i4907 addi a0, s1, 52 @@ -59441,9 +59435,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5531 + bne a0, a1, .LBB42_5533 j .LBB42_1435 -.LBB42_5531: # %if.else.i.i.i.i.i.i.i4907 +.LBB42_5533: # %if.else.i.i.i.i.i.i.i4907 j .LBB42_1436 .LBB42_3304: # %if.else.i.i.i.i.i.i.i4994 addi a0, s1, 52 @@ -59451,9 +59445,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5532 + bne a0, a1, .LBB42_5534 j .LBB42_1454 -.LBB42_5532: # %if.else.i.i.i.i.i.i.i4994 +.LBB42_5534: # %if.else.i.i.i.i.i.i.i4994 j .LBB42_1455 .LBB42_3305: # %if.else.i.i.i.i.i.i.i5414 addi a0, s1, 52 @@ -59461,9 +59455,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5533 + bne a0, a1, .LBB42_5535 j .LBB42_1533 -.LBB42_5533: # %if.else.i.i.i.i.i.i.i5414 +.LBB42_5535: # %if.else.i.i.i.i.i.i.i5414 j .LBB42_1534 .LBB42_3306: # %if.else.i.i.i.i.i.i.i5524 addi a0, s1, 52 @@ -59471,9 +59465,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5534 + bne a0, a1, .LBB42_5536 j .LBB42_1551 -.LBB42_5534: # %if.else.i.i.i.i.i.i.i5524 +.LBB42_5536: # %if.else.i.i.i.i.i.i.i5524 j .LBB42_1552 .LBB42_3307: # %if.else.i.i.i.i.i.i.1.i5505 addi a0, s1, 52 @@ -59481,9 +59475,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5535 + bne a0, a1, .LBB42_5537 j .LBB42_1562 -.LBB42_5535: # %if.else.i.i.i.i.i.i.1.i5505 +.LBB42_5537: # %if.else.i.i.i.i.i.i.1.i5505 j .LBB42_1563 .LBB42_3308: # %if.else.i.i.i.i.i.i.i5691 addi a0, s1, 52 @@ -59491,9 +59485,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5536 + bne a0, a1, .LBB42_5538 j .LBB42_1592 -.LBB42_5536: # %if.else.i.i.i.i.i.i.i5691 +.LBB42_5538: # %if.else.i.i.i.i.i.i.i5691 j .LBB42_1593 .LBB42_3309: # %if.else.i.i.i.i.i.i.1.i5670 addi a0, s1, 52 @@ -59501,9 +59495,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5537 + bne a0, a1, .LBB42_5539 j .LBB42_1603 -.LBB42_5537: # %if.else.i.i.i.i.i.i.1.i5670 +.LBB42_5539: # %if.else.i.i.i.i.i.i.1.i5670 j .LBB42_1604 .LBB42_3310: # %if.else.i.i.i.i.i.i.i5872 addi a0, s1, 52 @@ -59511,9 +59505,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5538 + bne a0, a1, .LBB42_5540 j .LBB42_1629 -.LBB42_5538: # %if.else.i.i.i.i.i.i.i5872 +.LBB42_5540: # %if.else.i.i.i.i.i.i.i5872 j .LBB42_1630 .LBB42_3311: # %if.else.i.i.i.i.i.i.1.i5853 addi a0, s1, 52 @@ -59521,9 +59515,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5539 + bne a0, a1, .LBB42_5541 j .LBB42_1640 -.LBB42_5539: # %if.else.i.i.i.i.i.i.1.i5853 +.LBB42_5541: # %if.else.i.i.i.i.i.i.1.i5853 j .LBB42_1641 .LBB42_3312: # %if.else.i.i.i.i.i.i.2.i5834 addi a0, s1, 52 @@ -59531,9 +59525,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5540 + bne a0, a1, .LBB42_5542 j .LBB42_1651 -.LBB42_5540: # %if.else.i.i.i.i.i.i.2.i5834 +.LBB42_5542: # %if.else.i.i.i.i.i.i.2.i5834 j .LBB42_1652 .LBB42_3313: # %if.else.i.i.i.i.i.i.3.i addi a0, s1, 52 @@ -59541,9 +59535,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5541 + bne a0, a1, .LBB42_5543 j .LBB42_1662 -.LBB42_5541: # %if.else.i.i.i.i.i.i.3.i +.LBB42_5543: # %if.else.i.i.i.i.i.i.3.i j .LBB42_1663 .LBB42_3314: # %if.else.i.i.i.i.i.i.4.i addi a0, s1, 52 @@ -59551,9 +59545,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5542 + bne a0, a1, .LBB42_5544 j .LBB42_1673 -.LBB42_5542: # %if.else.i.i.i.i.i.i.4.i +.LBB42_5544: # %if.else.i.i.i.i.i.i.4.i j .LBB42_1674 .LBB42_3315: # %if.else.i.i.i.i.i.i.i6374 addi a0, s1, 52 @@ -59561,9 +59555,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5543 + bne a0, a1, .LBB42_5545 j .LBB42_1897 -.LBB42_5543: # %if.else.i.i.i.i.i.i.i6374 +.LBB42_5545: # %if.else.i.i.i.i.i.i.i6374 j .LBB42_1898 .LBB42_3316: # %if.else.i.i.i.i.i.i.1.i6353 addi a0, s1, 52 @@ -59571,9 +59565,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5544 + bne a0, a1, .LBB42_5546 j .LBB42_1908 -.LBB42_5544: # %if.else.i.i.i.i.i.i.1.i6353 +.LBB42_5546: # %if.else.i.i.i.i.i.i.1.i6353 j .LBB42_1909 .LBB42_3317: # %if.else.i.i.i.i.i.i.2.i6332 addi a0, s1, 52 @@ -59581,9 +59575,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5545 + bne a0, a1, .LBB42_5547 j .LBB42_1919 -.LBB42_5545: # %if.else.i.i.i.i.i.i.2.i6332 +.LBB42_5547: # %if.else.i.i.i.i.i.i.2.i6332 j .LBB42_1920 .LBB42_3318: # %if.else.i.i.i.i.i.i.3.i6311 addi a0, s1, 52 @@ -59591,9 +59585,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5546 + bne a0, a1, .LBB42_5548 j .LBB42_1930 -.LBB42_5546: # %if.else.i.i.i.i.i.i.3.i6311 +.LBB42_5548: # %if.else.i.i.i.i.i.i.3.i6311 j .LBB42_1931 .LBB42_3319: # %if.else.i.i.i.i.i.i.4.i6290 addi a0, s1, 52 @@ -59601,9 +59595,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5547 + bne a0, a1, .LBB42_5549 j .LBB42_1941 -.LBB42_5547: # %if.else.i.i.i.i.i.i.4.i6290 +.LBB42_5549: # %if.else.i.i.i.i.i.i.4.i6290 j .LBB42_1942 .LBB42_3320: # %if.else.i.i.i.i.i.i.i6636 addi a0, s1, 52 @@ -59611,9 +59605,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5548 + bne a0, a1, .LBB42_5550 j .LBB42_1975 -.LBB42_5548: # %if.else.i.i.i.i.i.i.i6636 +.LBB42_5550: # %if.else.i.i.i.i.i.i.i6636 j .LBB42_1976 .LBB42_3321: # %if.else.i.i.i.i.i.i.1.i6616 addi a0, s1, 52 @@ -59621,9 +59615,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5549 + bne a0, a1, .LBB42_5551 j .LBB42_1986 -.LBB42_5549: # %if.else.i.i.i.i.i.i.1.i6616 +.LBB42_5551: # %if.else.i.i.i.i.i.i.1.i6616 j .LBB42_1987 .LBB42_3322: # %if.else.i.i.i.i.i.i.2.i6597 addi a0, s1, 52 @@ -59631,9 +59625,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5550 + bne a0, a1, .LBB42_5552 j .LBB42_1997 -.LBB42_5550: # %if.else.i.i.i.i.i.i.2.i6597 +.LBB42_5552: # %if.else.i.i.i.i.i.i.2.i6597 j .LBB42_1998 .LBB42_3323: # %if.else.i.i.i.i.i.i.3.i6578 addi a0, s1, 52 @@ -59641,9 +59635,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5551 + bne a0, a1, .LBB42_5553 j .LBB42_2008 -.LBB42_5551: # %if.else.i.i.i.i.i.i.3.i6578 +.LBB42_5553: # %if.else.i.i.i.i.i.i.3.i6578 j .LBB42_2009 .LBB42_3324: # %if.else.i.i.i.i.i.i.4.i6559 addi a0, s1, 52 @@ -59651,9 +59645,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5552 + bne a0, a1, .LBB42_5554 j .LBB42_2019 -.LBB42_5552: # %if.else.i.i.i.i.i.i.4.i6559 +.LBB42_5554: # %if.else.i.i.i.i.i.i.4.i6559 j .LBB42_2020 .LBB42_3325: # %if.else.i.i.i.i.i.i.5.i addi a0, s1, 52 @@ -59661,9 +59655,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5553 + bne a0, a1, .LBB42_5555 j .LBB42_2030 -.LBB42_5553: # %if.else.i.i.i.i.i.i.5.i +.LBB42_5555: # %if.else.i.i.i.i.i.i.5.i j .LBB42_2031 .LBB42_3326: # %if.else.i.i.i.i.i.i.i7027 addi a0, s1, 52 @@ -59671,9 +59665,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5554 + bne a0, a1, .LBB42_5556 j .LBB42_2065 -.LBB42_5554: # %if.else.i.i.i.i.i.i.i7027 +.LBB42_5556: # %if.else.i.i.i.i.i.i.i7027 j .LBB42_2066 .LBB42_3327: # %if.else.i.i.i.i.i.i.1.i7006 addi a0, s1, 52 @@ -59681,9 +59675,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5555 + bne a0, a1, .LBB42_5557 j .LBB42_2076 -.LBB42_5555: # %if.else.i.i.i.i.i.i.1.i7006 +.LBB42_5557: # %if.else.i.i.i.i.i.i.1.i7006 j .LBB42_2077 .LBB42_3328: # %if.else.i.i.i.i.i.i.2.i6985 addi a0, s1, 52 @@ -59691,9 +59685,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5556 + bne a0, a1, .LBB42_5558 j .LBB42_2087 -.LBB42_5556: # %if.else.i.i.i.i.i.i.2.i6985 +.LBB42_5558: # %if.else.i.i.i.i.i.i.2.i6985 j .LBB42_2088 .LBB42_3329: # %if.else.i.i.i.i.i.i.3.i6964 addi a0, s1, 52 @@ -59701,9 +59695,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5557 + bne a0, a1, .LBB42_5559 j .LBB42_2098 -.LBB42_5557: # %if.else.i.i.i.i.i.i.3.i6964 +.LBB42_5559: # %if.else.i.i.i.i.i.i.3.i6964 j .LBB42_2099 .LBB42_3330: # %if.else.i.i.i.i.i.i.4.i6943 addi a0, s1, 52 @@ -59711,9 +59705,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5558 + bne a0, a1, .LBB42_5560 j .LBB42_2109 -.LBB42_5558: # %if.else.i.i.i.i.i.i.4.i6943 +.LBB42_5560: # %if.else.i.i.i.i.i.i.4.i6943 j .LBB42_2110 .LBB42_3331: # %if.else.i.i.i.i.i.i.5.i6922 addi a0, s1, 52 @@ -59721,9 +59715,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5559 + bne a0, a1, .LBB42_5561 j .LBB42_2120 -.LBB42_5559: # %if.else.i.i.i.i.i.i.5.i6922 +.LBB42_5561: # %if.else.i.i.i.i.i.i.5.i6922 j .LBB42_2121 .LBB42_3332: # %if.else.i.i.i.i.i.i.i7486 addi a0, s1, 52 @@ -59731,9 +59725,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5560 + bne a0, a1, .LBB42_5562 j .LBB42_2231 -.LBB42_5560: # %if.else.i.i.i.i.i.i.i7486 +.LBB42_5562: # %if.else.i.i.i.i.i.i.i7486 j .LBB42_2232 .LBB42_3333: # %if.else.i.i.i.i.i.i.i7790 addi a0, s1, 52 @@ -59741,9 +59735,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5561 + bne a0, a1, .LBB42_5563 j .LBB42_2291 -.LBB42_5561: # %if.else.i.i.i.i.i.i.i7790 +.LBB42_5563: # %if.else.i.i.i.i.i.i.i7790 j .LBB42_2292 .LBB42_3334: # %if.else.i.i.i.i.i.i.i8006 addi a0, s1, 52 @@ -59751,9 +59745,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5562 + bne a0, a1, .LBB42_5564 j .LBB42_2313 -.LBB42_5562: # %if.else.i.i.i.i.i.i.i8006 +.LBB42_5564: # %if.else.i.i.i.i.i.i.i8006 j .LBB42_2314 .LBB42_3335: # %if.else.i.i.i.i.i.i.1.i7986 addi a0, s1, 52 @@ -59761,9 +59755,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5563 + bne a0, a1, .LBB42_5565 j .LBB42_2324 -.LBB42_5563: # %if.else.i.i.i.i.i.i.1.i7986 +.LBB42_5565: # %if.else.i.i.i.i.i.i.1.i7986 j .LBB42_2325 .LBB42_3336: # %if.else.i.i.i.i.i.i.2.i7967 addi a0, s1, 52 @@ -59771,9 +59765,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5564 + bne a0, a1, .LBB42_5566 j .LBB42_2335 -.LBB42_5564: # %if.else.i.i.i.i.i.i.2.i7967 +.LBB42_5566: # %if.else.i.i.i.i.i.i.2.i7967 j .LBB42_2336 .LBB42_3337: # %if.else.i.i.i.i.i.i.3.i7948 addi a0, s1, 52 @@ -59781,9 +59775,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5565 + bne a0, a1, .LBB42_5567 j .LBB42_2346 -.LBB42_5565: # %if.else.i.i.i.i.i.i.3.i7948 +.LBB42_5567: # %if.else.i.i.i.i.i.i.3.i7948 j .LBB42_2347 .LBB42_3338: # %if.else.i.i.i.i.i.i.i8706 addi a0, s1, 52 @@ -59791,9 +59785,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5566 + bne a0, a1, .LBB42_5568 j .LBB42_2508 -.LBB42_5566: # %if.else.i.i.i.i.i.i.i8706 +.LBB42_5568: # %if.else.i.i.i.i.i.i.i8706 j .LBB42_2509 .LBB42_3339: # %if.else.i.i.i.i.i.i.1.i8685 addi a0, s1, 52 @@ -59801,9 +59795,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5567 + bne a0, a1, .LBB42_5569 j .LBB42_2519 -.LBB42_5567: # %if.else.i.i.i.i.i.i.1.i8685 +.LBB42_5569: # %if.else.i.i.i.i.i.i.1.i8685 j .LBB42_2520 .LBB42_3340: # %if.else.i.i.i.i.i.i.2.i8664 addi a0, s1, 52 @@ -59811,9 +59805,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5568 + bne a0, a1, .LBB42_5570 j .LBB42_2530 -.LBB42_5568: # %if.else.i.i.i.i.i.i.2.i8664 +.LBB42_5570: # %if.else.i.i.i.i.i.i.2.i8664 j .LBB42_2531 .LBB42_3341: # %if.else.i.i.i.i.i.i.3.i8643 addi a0, s1, 52 @@ -59821,9 +59815,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5569 + bne a0, a1, .LBB42_5571 j .LBB42_2541 -.LBB42_5569: # %if.else.i.i.i.i.i.i.3.i8643 +.LBB42_5571: # %if.else.i.i.i.i.i.i.3.i8643 j .LBB42_2542 .LBB42_3342: # %if.else.i.i.i.i.i.i.i8976 addi a0, s1, 52 @@ -59831,9 +59825,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5570 + bne a0, a1, .LBB42_5572 j .LBB42_2569 -.LBB42_5570: # %if.else.i.i.i.i.i.i.i8976 +.LBB42_5572: # %if.else.i.i.i.i.i.i.i8976 j .LBB42_2570 .LBB42_3343: # %if.else.i.i.i.i.i.i.1.i8955 addi a0, s1, 52 @@ -59841,9 +59835,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5571 + bne a0, a1, .LBB42_5573 j .LBB42_2580 -.LBB42_5571: # %if.else.i.i.i.i.i.i.1.i8955 +.LBB42_5573: # %if.else.i.i.i.i.i.i.1.i8955 j .LBB42_2581 .LBB42_3344: # %if.else.i.i.i.i.i.i.2.i8934 addi a0, s1, 52 @@ -59851,9 +59845,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5572 + bne a0, a1, .LBB42_5574 j .LBB42_2591 -.LBB42_5572: # %if.else.i.i.i.i.i.i.2.i8934 +.LBB42_5574: # %if.else.i.i.i.i.i.i.2.i8934 j .LBB42_2592 .LBB42_3345: # %if.else.i.i.i.i.i.i.3.i8913 addi a0, s1, 52 @@ -59861,9 +59855,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5573 + bne a0, a1, .LBB42_5575 j .LBB42_2602 -.LBB42_5573: # %if.else.i.i.i.i.i.i.3.i8913 +.LBB42_5575: # %if.else.i.i.i.i.i.i.3.i8913 j .LBB42_2603 .LBB42_3346: # %if.else.i.i.i.i.i.i.i10024 addi a0, s1, 52 @@ -59871,9 +59865,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5574 + bne a0, a1, .LBB42_5576 j .LBB42_2764 -.LBB42_5574: # %if.else.i.i.i.i.i.i.i10024 +.LBB42_5576: # %if.else.i.i.i.i.i.i.i10024 j .LBB42_2765 .LBB42_3347: # %if.else.i.i.i.i.i.i.1.i10003 addi a0, s1, 52 @@ -59881,9 +59875,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5575 + bne a0, a1, .LBB42_5577 j .LBB42_2775 -.LBB42_5575: # %if.else.i.i.i.i.i.i.1.i10003 +.LBB42_5577: # %if.else.i.i.i.i.i.i.1.i10003 j .LBB42_2776 .LBB42_3348: # %if.else.i.i.i.i.i.i.2.i9982 addi a0, s1, 52 @@ -59891,9 +59885,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5576 + bne a0, a1, .LBB42_5578 j .LBB42_2786 -.LBB42_5576: # %if.else.i.i.i.i.i.i.2.i9982 +.LBB42_5578: # %if.else.i.i.i.i.i.i.2.i9982 j .LBB42_2787 .LBB42_3349: # %if.else.i.i.i.i.i.i.3.i9961 addi a0, s1, 52 @@ -59901,9 +59895,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5577 + bne a0, a1, .LBB42_5579 j .LBB42_2797 -.LBB42_5577: # %if.else.i.i.i.i.i.i.3.i9961 +.LBB42_5579: # %if.else.i.i.i.i.i.i.3.i9961 j .LBB42_2798 .LBB42_3350: # %if.else.i.i.i.i.i.i.i10294 addi a0, s1, 52 @@ -59911,9 +59905,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5578 + bne a0, a1, .LBB42_5580 j .LBB42_2825 -.LBB42_5578: # %if.else.i.i.i.i.i.i.i10294 +.LBB42_5580: # %if.else.i.i.i.i.i.i.i10294 j .LBB42_2826 .LBB42_3351: # %if.else.i.i.i.i.i.i.1.i10273 addi a0, s1, 52 @@ -59921,9 +59915,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5579 + bne a0, a1, .LBB42_5581 j .LBB42_2836 -.LBB42_5579: # %if.else.i.i.i.i.i.i.1.i10273 +.LBB42_5581: # %if.else.i.i.i.i.i.i.1.i10273 j .LBB42_2837 .LBB42_3352: # %if.else.i.i.i.i.i.i.2.i10252 addi a0, s1, 52 @@ -59931,9 +59925,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5580 + bne a0, a1, .LBB42_5582 j .LBB42_2847 -.LBB42_5580: # %if.else.i.i.i.i.i.i.2.i10252 +.LBB42_5582: # %if.else.i.i.i.i.i.i.2.i10252 j .LBB42_2848 .LBB42_3353: # %if.else.i.i.i.i.i.i.3.i10231 addi a0, s1, 52 @@ -59941,9 +59935,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5581 + bne a0, a1, .LBB42_5583 j .LBB42_2858 -.LBB42_5581: # %if.else.i.i.i.i.i.i.3.i10231 +.LBB42_5583: # %if.else.i.i.i.i.i.i.3.i10231 j .LBB42_2859 .LBB42_3354: # %if.else.i.i.i.i.i.i.i11349 addi a0, s1, 52 @@ -59951,9 +59945,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5582 + bne a0, a1, .LBB42_5584 j .LBB42_3032 -.LBB42_5582: # %if.else.i.i.i.i.i.i.i11349 +.LBB42_5584: # %if.else.i.i.i.i.i.i.i11349 j .LBB42_3033 .LBB42_3355: # %if.else.i.i.i.i.i.i.1.i11328 addi a0, s1, 52 @@ -59961,9 +59955,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5583 + bne a0, a1, .LBB42_5585 j .LBB42_3043 -.LBB42_5583: # %if.else.i.i.i.i.i.i.1.i11328 +.LBB42_5585: # %if.else.i.i.i.i.i.i.1.i11328 j .LBB42_3044 .LBB42_3356: # %if.else.i.i.i.i.i.i.2.i11307 addi a0, s1, 52 @@ -59971,9 +59965,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5584 + bne a0, a1, .LBB42_5586 j .LBB42_3054 -.LBB42_5584: # %if.else.i.i.i.i.i.i.2.i11307 +.LBB42_5586: # %if.else.i.i.i.i.i.i.2.i11307 j .LBB42_3055 .LBB42_3357: # %if.else.i.i.i.i.i.i.3.i11286 addi a0, s1, 52 @@ -59981,9 +59975,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5585 + bne a0, a1, .LBB42_5587 j .LBB42_3065 -.LBB42_5585: # %if.else.i.i.i.i.i.i.3.i11286 +.LBB42_5587: # %if.else.i.i.i.i.i.i.3.i11286 j .LBB42_3066 .LBB42_3358: # %if.else.i.i.i.i.i.i.i12344 addi a0, s1, 52 @@ -59999,9 +59993,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5586 + bne a0, a1, .LBB42_5588 j .LBB42_141 -.LBB42_5586: # %if.else.i.i.i.i.i.i355.i.i +.LBB42_5588: # %if.else.i.i.i.i.i.i355.i.i j .LBB42_142 .LBB42_3360: # %if.else.i.i.i.i.i.i804.i.i addi a0, s0, 52 @@ -60009,9 +60003,9 @@ amoadd.w.aqrl a0, a1, (a0) sext.w a0, a0 li a1, 1 - bne a0, a1, .LBB42_5587 + bne a0, a1, .LBB42_5589 j .LBB42_296 -.LBB42_5587: # %if.else.i.i.i.i.i.i804.i.i +.LBB42_5589: # %if.else.i.i.i.i.i.i804.i.i j .LBB42_297 .LBB42_3361: # %if.then.i.i9.invoke.i.i.i.i .Ltmp1642: @@ -60035,10 +60029,10 @@ lui a1, 1 addiw a1, a1, 944 add a1, sp, a1 - beq a0, a1, .LBB42_5588 - j .LBB42_5498 -.LBB42_5588: # %ehcleanup424.i.i - j .LBB42_5497 + beq a0, a1, .LBB42_5590 + j .LBB42_5500 +.LBB42_5590: # %ehcleanup424.i.i + j .LBB42_5499 .LBB42_3366: # %lpad400.i.i .Ltmp1653: sd a0, 112(sp) # 8-byte Folded Spill @@ -60058,19 +60052,19 @@ lui a1, 1 addiw a1, a1, 1232 add a1, sp, a1 - bne a0, a1, .LBB42_5589 - j .LBB42_5497 -.LBB42_5589: # %ehcleanup188.i.i - j .LBB42_5498 + bne a0, a1, .LBB42_5591 + j .LBB42_5499 +.LBB42_5591: # %ehcleanup188.i.i + j .LBB42_5500 .LBB42_3370: # %lpad5.i12300 .Ltmp4222: - j .LBB42_5165 + j .LBB42_5167 .LBB42_3371: # %lpad3.i12288 .Ltmp4219: - j .LBB42_5374 + j .LBB42_5376 .LBB42_3372: # %lpad.i12278 .Ltmp4216: - j .LBB42_5163 + j .LBB42_5165 .LBB42_3373: # %lpad46.i12191 .Ltmp4213: mv s5, a0 @@ -60264,14 +60258,14 @@ seqz a0, a0 or a0, s7, a0 beqz a0, .LBB42_3410 - j .LBB42_5497 + j .LBB42_5499 .LBB42_3410: # %arraydestroy.body76.i12085 # =>This Inner Loop Header: Depth=1 addi s0, s0, -88 mv a0, s0 call _ZN8TestCaseD2Ev bne s0, s1, .LBB42_3410 - j .LBB42_5497 + j .LBB42_5499 .LBB42_3411: # %lpad46.i11971 .Ltmp4171: mv s5, a0 @@ -60465,20 +60459,20 @@ seqz a0, a0 or a0, s7, a0 beqz a0, .LBB42_3448 - j .LBB42_5497 + j .LBB42_5499 .LBB42_3448: # %arraydestroy.body76.i11865 # =>This Inner Loop Header: Depth=1 addi s0, s0, -88 mv a0, s0 call _ZN8TestCaseD2Ev bne s0, s1, .LBB42_3448 - j .LBB42_5497 + j .LBB42_5499 .LBB42_3449: # %lpad10.i .Ltmp4129: j .LBB42_3528 .LBB42_3450: # %lpad.i11817 .Ltmp4126: - j .LBB42_5163 + j .LBB42_5165 .LBB42_3451: # %lpad46.i11729 .Ltmp4123: mv s5, a0 @@ -60672,14 +60666,14 @@ seqz a0, a0 or a0, s7, a0 beqz a0, .LBB42_3488 - j .LBB42_5497 + j .LBB42_5499 .LBB42_3488: # %arraydestroy.body76.i11623 # =>This Inner Loop Header: Depth=1 addi s0, s0, -88 mv a0, s0 call _ZN8TestCaseD2Ev bne s0, s1, .LBB42_3488 - j .LBB42_5497 + j .LBB42_5499 .LBB42_3489: # %lpad46.i11509 .Ltmp4081: mv s5, a0 @@ -60873,26 +60867,26 @@ seqz a0, a0 or a0, s7, a0 beqz a0, .LBB42_3526 - j .LBB42_5497 + j .LBB42_5499 .LBB42_3526: # %arraydestroy.body76.i11403 # =>This Inner Loop Header: Depth=1 addi s0, s0, -88 mv a0, s0 call _ZN8TestCaseD2Ev bne s0, s1, .LBB42_3526 - j .LBB42_5497 + j .LBB42_5499 .LBB42_3527: # %lpad9.i11363 .Ltmp4039: .LBB42_3528: # %lpad9.i11363 ld a1, 552(sp) sd a0, 112(sp) # 8-byte Folded Spill - beq a1, s1, .LBB42_5590 - j .LBB42_5461 -.LBB42_5590: # %lpad9.i11363 - j .LBB42_5497 + beq a1, s1, .LBB42_5592 + j .LBB42_5463 +.LBB42_5592: # %lpad9.i11363 + j .LBB42_5499 .LBB42_3529: # %lpad.i11353 .Ltmp4036: - j .LBB42_5163 + j .LBB42_5165 .LBB42_3530: # %lpad25.i11168 .Ltmp4033: mv s0, a0 @@ -60999,18 +60993,20 @@ seqz a0, a0 or a0, s4, a0 beqz a0, .LBB42_3552 - j .LBB42_5497 + j .LBB42_5499 .LBB42_3552: # %arraydestroy.body46.i11110 # =>This Inner Loop Header: Depth=1 addi s1, s1, -88 mv a0, s1 call _ZN8TestCaseD2Ev bne s1, s0, .LBB42_3552 - j .LBB42_5497 + j .LBB42_5499 .LBB42_3553: # %lpad235.i .Ltmp4009: mv s4, a0 - mv a0, s2 + mv a0, s3 + call _ZN8TestCaseD2Ev + mv a0, s0 call _ZN8TestCaseD2Ev mv a0, s7 call _ZN8TestCaseD2Ev @@ -61020,15 +61016,13 @@ call _ZN8TestCaseD2Ev mv a0, s10 call _ZN8TestCaseD2Ev - mv a0, s9 - call _ZN8TestCaseD2Ev mv a0, s6 call _ZN8TestCaseD2Ev - ld a0, 144(sp) # 8-byte Folded Reload + mv a0, s5 call _ZN8TestCaseD2Ev - ld a0, 136(sp) # 8-byte Folded Reload + ld a0, 160(sp) # 8-byte Folded Reload call _ZN8TestCaseD2Ev - mv a0, s5 + ld a0, 144(sp) # 8-byte Folded Reload call _ZN8TestCaseD2Ev addi a0, sp, 2047 addi a0, a0, 529 @@ -61085,15 +61079,15 @@ call _ZN8TestCaseD2Ev addi a0, sp, 552 call _ZN8TestCaseD2Ev - li s3, 0 + li s2, 0 sd s4, 112(sp) # 8-byte Folded Spill j .LBB42_3555 .LBB42_3554: # %lpad233.i10872 .Ltmp4006: - li s3, 1 + li s2, 1 sd a0, 112(sp) # 8-byte Folded Spill .LBB42_3555: # %ehcleanup.i10873 - ld a0, 8(s0) + ld a0, 8(s9) lui a1, 1 addiw a1, a1, 528 add a1, sp, a1 @@ -61101,24 +61095,24 @@ # %bb.3556: # %if.then.i.i668.i10877 call _ZdlPv@plt .LBB42_3557: # %ehcleanup246.i10857 - mv s7, s2 + mv s0, s3 j .LBB42_3561 .LBB42_3558: # %lpad231.i10868 .Ltmp4003: lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - mv s7, s2 + add s9, sp, a1 + mv s0, s3 j .LBB42_3560 .LBB42_3559: # %lpad226.i10856 .Ltmp4000: lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 + add s9, sp, a1 .LBB42_3560: # %ehcleanup246.i10857 sd a0, 112(sp) # 8-byte Folded Spill .LBB42_3561: # %ehcleanup246.i10857 - ld a0, 40(s0) + ld a0, 40(s9) lui a1, 1 addiw a1, a1, 560 add a1, sp, a1 @@ -61126,24 +61120,24 @@ # %bb.3562: # %if.then.i.i674.i10862 call _ZdlPv@plt .LBB42_3563: # %ehcleanup249.i10842 - mv s8, s7 + mv s7, s0 j .LBB42_3567 .LBB42_3564: # %lpad224.i .Ltmp3997: lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - mv s8, s7 + add s9, sp, a1 + mv s7, s0 j .LBB42_3566 .LBB42_3565: # %lpad219.i10841 .Ltmp3994: lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 + add s9, sp, a1 .LBB42_3566: # %ehcleanup249.i10842 sd a0, 112(sp) # 8-byte Folded Spill .LBB42_3567: # %ehcleanup249.i10842 - ld a0, 72(s0) + ld a0, 72(s9) lui a1, 1 addiw a1, a1, 592 add a1, sp, a1 @@ -61151,9 +61145,9 @@ # %bb.3568: # %if.then.i.i680.i10847 call _ZdlPv@plt .LBB42_3569: # %ehcleanup252.i10826 - mv s11, s8 + mv s8, s7 .LBB42_3570: # %ehcleanup252.i10826 - ld a0, 104(s0) + ld a0, 104(s9) lui a1, 1 addiw a1, a1, 624 add a1, sp, a1 @@ -61161,9 +61155,9 @@ # %bb.3571: # %if.then.i.i686.i10831 call _ZdlPv@plt .LBB42_3572: # %ehcleanup255.i10810 - mv s10, s11 + mv s11, s8 .LBB42_3573: # %ehcleanup255.i10810 - ld a0, 136(s0) + ld a0, 136(s9) lui a1, 1 addiw a1, a1, 656 add a1, sp, a1 @@ -61171,9 +61165,9 @@ # %bb.3574: # %if.then.i.i692.i10815 call _ZdlPv@plt .LBB42_3575: # %ehcleanup258.i10797 - mv s9, s10 + mv s10, s11 .LBB42_3576: # %ehcleanup258.i10797 - ld a0, 168(s0) + ld a0, 168(s9) lui a1, 1 addiw a1, a1, 688 add a1, sp, a1 @@ -61181,9 +61175,9 @@ # %bb.3577: # %if.then.i.i698.i10802 call _ZdlPv@plt .LBB42_3578: # %ehcleanup261.i10781 - mv s6, s9 + mv s6, s10 .LBB42_3579: # %ehcleanup261.i10781 - ld a0, 200(s0) + ld a0, 200(s9) lui a1, 1 addiw a1, a1, 720 add a1, sp, a1 @@ -61191,9 +61185,9 @@ # %bb.3580: # %if.then.i.i704.i10786 call _ZdlPv@plt .LBB42_3581: # %ehcleanup264.i10765 - mv s1, s6 + mv s5, s6 .LBB42_3582: # %ehcleanup264.i10765 - ld a0, 232(s0) + ld a0, 232(s9) lui a1, 1 addiw a1, a1, 752 add a1, sp, a1 @@ -61201,722 +61195,719 @@ # %bb.3583: # %if.then.i.i710.i10770 call _ZdlPv@plt .LBB42_3584: # %ehcleanup267.i10749 - ld a0, 264(s0) + mv s1, s5 +.LBB42_3585: # %ehcleanup267.i10749 + ld a0, 264(s9) lui a1, 1 addiw a1, a1, 784 add a1, sp, a1 - beq a0, a1, .LBB42_3586 -# %bb.3585: # %if.then.i.i716.i10754 + beq a0, a1, .LBB42_3587 +# %bb.3586: # %if.then.i.i716.i10754 call _ZdlPv@plt -.LBB42_3586: # %ehcleanup270.i10733 - ld a0, 296(s0) +.LBB42_3587: # %ehcleanup270.i10733 + ld a0, 296(s9) lui a1, 1 addiw a1, a1, 816 add a1, sp, a1 - beq a0, a1, .LBB42_3588 -# %bb.3587: # %if.then.i.i722.i10738 + beq a0, a1, .LBB42_3589 +# %bb.3588: # %if.then.i.i722.i10738 call _ZdlPv@plt -.LBB42_3588: # %ehcleanup273.i10719 - ld a0, 328(s0) +.LBB42_3589: # %ehcleanup273.i10719 + ld a0, 328(s9) lui a1, 1 addiw a1, a1, 848 add a1, sp, a1 - beq a0, a1, .LBB42_3590 -# %bb.3589: # %if.then.i.i728.i10724 + beq a0, a1, .LBB42_3591 +# %bb.3590: # %if.then.i.i728.i10724 call _ZdlPv@plt -.LBB42_3590: # %ehcleanup276.i10703 - ld a0, 360(s0) +.LBB42_3591: # %ehcleanup276.i10703 + ld a0, 360(s9) lui a1, 1 addiw a1, a1, 880 add a1, sp, a1 - beq a0, a1, .LBB42_3592 -# %bb.3591: # %if.then.i.i734.i10708 + beq a0, a1, .LBB42_3593 +# %bb.3592: # %if.then.i.i734.i10708 call _ZdlPv@plt -.LBB42_3592: # %ehcleanup279.i10687 - ld a0, 392(s0) +.LBB42_3593: # %ehcleanup279.i10687 + ld a0, 392(s9) lui a1, 1 addiw a1, a1, 912 add a1, sp, a1 - beq a0, a1, .LBB42_3594 -# %bb.3593: # %if.then.i.i740.i10692 + beq a0, a1, .LBB42_3595 +# %bb.3594: # %if.then.i.i740.i10692 call _ZdlPv@plt -.LBB42_3594: # %ehcleanup282.i10671 - ld a0, 424(s0) +.LBB42_3595: # %ehcleanup282.i10671 + ld a0, 424(s9) lui a1, 1 addiw a1, a1, 944 add a1, sp, a1 - beq a0, a1, .LBB42_3596 -# %bb.3595: # %if.then.i.i746.i10676 + beq a0, a1, .LBB42_3597 +# %bb.3596: # %if.then.i.i746.i10676 call _ZdlPv@plt -.LBB42_3596: # %ehcleanup285.i10655 - ld a0, 456(s0) +.LBB42_3597: # %ehcleanup285.i10655 + ld a0, 456(s9) lui a1, 1 addiw a1, a1, 976 add a1, sp, a1 - beq a0, a1, .LBB42_3598 -# %bb.3597: # %if.then.i.i752.i10660 + beq a0, a1, .LBB42_3599 +# %bb.3598: # %if.then.i.i752.i10660 call _ZdlPv@plt -.LBB42_3598: # %ehcleanup288.i10639 - ld a0, 488(s0) +.LBB42_3599: # %ehcleanup288.i10639 + ld a0, 488(s9) lui a1, 1 addiw a1, a1, 1008 add a1, sp, a1 - beq a0, a1, .LBB42_3600 -# %bb.3599: # %if.then.i.i758.i10644 + beq a0, a1, .LBB42_3601 +# %bb.3600: # %if.then.i.i758.i10644 call _ZdlPv@plt -.LBB42_3600: # %ehcleanup291.i10626 - ld a0, 520(s0) +.LBB42_3601: # %ehcleanup291.i10626 + ld a0, 520(s9) lui a1, 1 addiw a1, a1, 1040 add a1, sp, a1 - beq a0, a1, .LBB42_3602 -# %bb.3601: # %if.then.i.i764.i10631 + beq a0, a1, .LBB42_3603 +# %bb.3602: # %if.then.i.i764.i10631 call _ZdlPv@plt -.LBB42_3602: # %ehcleanup294.i10612 - ld a0, 552(s0) +.LBB42_3603: # %ehcleanup294.i10612 + ld a0, 552(s9) lui a1, 1 addiw a1, a1, 1072 add a1, sp, a1 - beq a0, a1, .LBB42_3604 -# %bb.3603: # %if.then.i.i770.i10617 + beq a0, a1, .LBB42_3605 +# %bb.3604: # %if.then.i.i770.i10617 call _ZdlPv@plt -.LBB42_3604: # %ehcleanup297.i10596 - ld a0, 584(s0) +.LBB42_3605: # %ehcleanup297.i10596 + ld a0, 584(s9) lui a1, 1 addiw a1, a1, 1104 add a1, sp, a1 - beq a0, a1, .LBB42_3606 -# %bb.3605: # %if.then.i.i776.i10601 + beq a0, a1, .LBB42_3607 +# %bb.3606: # %if.then.i.i776.i10601 call _ZdlPv@plt -.LBB42_3606: # %ehcleanup300.i10579 - ld a0, 616(s0) +.LBB42_3607: # %ehcleanup300.i10579 + ld a0, 616(s9) lui a1, 1 addiw a1, a1, 1136 add a1, sp, a1 - beq a0, a1, .LBB42_3608 -# %bb.3607: # %if.then.i.i782.i10584 + beq a0, a1, .LBB42_3609 +# %bb.3608: # %if.then.i.i782.i10584 call _ZdlPv@plt -.LBB42_3608: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit786.i10585 - xori s3, s3, 1 -.LBB42_3609: # %ehcleanup303.i10563 - ld a0, 648(s0) +.LBB42_3609: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit786.i10585 + xori s0, s2, 1 +.LBB42_3610: # %ehcleanup303.i10563 + ld a0, 648(s9) lui a1, 1 addiw a1, a1, 1168 add a1, sp, a1 - beq a0, a1, .LBB42_3611 -# %bb.3610: # %if.then.i.i788.i10568 + beq a0, a1, .LBB42_3612 +# %bb.3611: # %if.then.i.i788.i10568 call _ZdlPv@plt -.LBB42_3611: # %ehcleanup306.i10547 - ld a0, 680(s0) +.LBB42_3612: # %ehcleanup306.i10547 + ld a0, 680(s9) lui a1, 1 addiw a1, a1, 1200 add a1, sp, a1 - beq a0, a1, .LBB42_3613 -# %bb.3612: # %if.then.i.i794.i10552 + beq a0, a1, .LBB42_3614 +# %bb.3613: # %if.then.i.i794.i10552 call _ZdlPv@plt -.LBB42_3613: # %ehcleanup309.i10531 - ld a0, 712(s0) +.LBB42_3614: # %ehcleanup309.i10531 + ld a0, 712(s9) lui a1, 1 addiw a1, a1, 1232 add a1, sp, a1 - beq a0, a1, .LBB42_3615 -# %bb.3614: # %if.then.i.i800.i10536 + beq a0, a1, .LBB42_3616 +# %bb.3615: # %if.then.i.i800.i10536 call _ZdlPv@plt -.LBB42_3615: # %ehcleanup312.i10515 - ld a0, 744(s0) +.LBB42_3616: # %ehcleanup312.i10515 + ld a0, 744(s9) lui a1, 1 addiw a1, a1, 1264 add a1, sp, a1 - beq a0, a1, .LBB42_3617 -# %bb.3616: # %if.then.i.i806.i10520 + beq a0, a1, .LBB42_3618 +# %bb.3617: # %if.then.i.i806.i10520 call _ZdlPv@plt -.LBB42_3617: # %ehcleanup315.i - ld a0, 776(s0) +.LBB42_3618: # %ehcleanup315.i + ld a0, 776(s9) lui a1, 1 addiw a1, a1, 1296 add a1, sp, a1 - beq a0, a1, .LBB42_3619 -# %bb.3618: # %if.then.i.i812.i10504 + beq a0, a1, .LBB42_3620 +# %bb.3619: # %if.then.i.i812.i10504 call _ZdlPv@plt -.LBB42_3619: # %ehcleanup318.i - ld a0, 808(s0) +.LBB42_3620: # %ehcleanup318.i + ld a0, 808(s9) lui a1, 1 addiw a1, a1, 1328 add a1, sp, a1 - beq a0, a1, .LBB42_3621 -# %bb.3620: # %if.then.i.i818.i10491 + beq a0, a1, .LBB42_3622 +# %bb.3621: # %if.then.i.i818.i10491 call _ZdlPv@plt -.LBB42_3621: # %ehcleanup321.i - ld a0, 840(s0) +.LBB42_3622: # %ehcleanup321.i + ld a0, 840(s9) lui a1, 1 addiw a1, a1, 1360 add a1, sp, a1 - beq a0, a1, .LBB42_3623 -# %bb.3622: # %if.then.i.i824.i10476 + beq a0, a1, .LBB42_3624 +# %bb.3623: # %if.then.i.i824.i10476 call _ZdlPv@plt -.LBB42_3623: # %ehcleanup324.i - ld a0, 872(s0) +.LBB42_3624: # %ehcleanup324.i + ld a0, 872(s9) lui a1, 1 addiw a1, a1, 1392 add a1, sp, a1 - beq a0, a1, .LBB42_3625 -# %bb.3624: # %if.then.i.i830.i10464 + beq a0, a1, .LBB42_3626 +# %bb.3625: # %if.then.i.i830.i10464 call _ZdlPv@plt -.LBB42_3625: # %ehcleanup327.i - ld a0, 904(s0) +.LBB42_3626: # %ehcleanup327.i + ld a0, 904(s9) lui a1, 1 addiw a1, a1, 1424 add a1, sp, a1 - beq a0, a1, .LBB42_3627 -# %bb.3626: # %if.then.i.i836.i10449 + beq a0, a1, .LBB42_3628 +# %bb.3627: # %if.then.i.i836.i10449 call _ZdlPv@plt -.LBB42_3627: # %ehcleanup330.i10429 - ld a0, 936(s0) +.LBB42_3628: # %ehcleanup330.i10429 + ld a0, 936(s9) lui a1, 1 addiw a1, a1, 1456 add a1, sp, a1 - beq a0, a1, .LBB42_3629 -# %bb.3628: # %if.then.i.i842.i10434 + beq a0, a1, .LBB42_3630 +# %bb.3629: # %if.then.i.i842.i10434 call _ZdlPv@plt -.LBB42_3629: # %ehcleanup333.i10413 - ld a0, 968(s0) +.LBB42_3630: # %ehcleanup333.i10413 + ld a0, 968(s9) lui a1, 1 addiw a1, a1, 1488 add a1, sp, a1 - beq a0, a1, .LBB42_3631 -# %bb.3630: # %if.then.i.i848.i10418 + beq a0, a1, .LBB42_3632 +# %bb.3631: # %if.then.i.i848.i10418 call _ZdlPv@plt -.LBB42_3631: # %ehcleanup336.i10397 - ld a0, 1000(s0) +.LBB42_3632: # %ehcleanup336.i10397 + ld a0, 1000(s9) lui a1, 1 addiw a1, a1, 1520 add a1, sp, a1 - beq a0, a1, .LBB42_3633 -# %bb.3632: # %if.then.i.i854.i10402 + beq a0, a1, .LBB42_3634 +# %bb.3633: # %if.then.i.i854.i10402 call _ZdlPv@plt -.LBB42_3633: # %ehcleanup339.i10381 - ld a0, 1032(s0) +.LBB42_3634: # %ehcleanup339.i10381 + ld a0, 1032(s9) lui a1, 1 addiw a1, a1, 1552 add a1, sp, a1 - beq a0, a1, .LBB42_3635 -# %bb.3634: # %if.then.i.i860.i10386 + beq a0, a1, .LBB42_3636 +# %bb.3635: # %if.then.i.i860.i10386 call _ZdlPv@plt -.LBB42_3635: # %ehcleanup342.i10362 - ld a0, 1064(s0) +.LBB42_3636: # %ehcleanup342.i10362 + ld a0, 1064(s9) lui a1, 1 addiw a1, a1, 1584 add a1, sp, a1 - beq a0, a1, .LBB42_3637 -# %bb.3636: # %if.then.i.i866.i10367 + beq a0, a1, .LBB42_3638 +# %bb.3637: # %if.then.i.i866.i10367 call _ZdlPv@plt -.LBB42_3637: # %ehcleanup343.i +.LBB42_3638: # %ehcleanup343.i addi s2, sp, 552 xor a0, s2, s1 seqz a0, a0 - or a0, s3, a0 - beqz a0, .LBB42_3638 - j .LBB42_5497 -.LBB42_3638: # %arraydestroy.body346.i + or a0, s0, a0 + beqz a0, .LBB42_3639 + j .LBB42_5499 +.LBB42_3639: # %arraydestroy.body346.i # =>This Inner Loop Header: Depth=1 addi s1, s1, -88 mv a0, s1 call _ZN8TestCaseD2Ev - bne s1, s2, .LBB42_3638 - j .LBB42_5497 -.LBB42_3639: # %lpad217.i10837 + bne s1, s2, .LBB42_3639 + j .LBB42_5499 +.LBB42_3640: # %lpad217.i10837 .Ltmp3991: lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - mv s11, s8 + add s9, sp, a1 + mv s8, s7 sd a0, 112(sp) # 8-byte Folded Spill j .LBB42_3570 -.LBB42_3640: # %lpad212.i10825 +.LBB42_3641: # %lpad212.i10825 .Ltmp3988: lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 + add s9, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill j .LBB42_3570 -.LBB42_3641: # %lpad210.i10821 +.LBB42_3642: # %lpad210.i10821 .Ltmp3985: lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - mv s10, s11 + add s9, sp, a1 + mv s11, s8 sd a0, 112(sp) # 8-byte Folded Spill j .LBB42_3573 -.LBB42_3642: # %lpad205.i10809 +.LBB42_3643: # %lpad205.i10809 .Ltmp3982: lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 + add s9, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill j .LBB42_3573 -.LBB42_3643: # %lpad198.i10796 +.LBB42_3644: # %lpad198.i10796 .Ltmp3979: lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 + add s9, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill j .LBB42_3576 -.LBB42_3644: # %lpad196.i10792 +.LBB42_3645: # %lpad196.i10792 .Ltmp3976: lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - mv s6, s9 + add s9, sp, a1 + mv s6, s10 sd a0, 112(sp) # 8-byte Folded Spill j .LBB42_3579 -.LBB42_3645: # %lpad191.i10780 +.LBB42_3646: # %lpad191.i10780 .Ltmp3973: lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 + add s9, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill j .LBB42_3579 -.LBB42_3646: # %lpad189.i10776 +.LBB42_3647: # %lpad189.i10776 .Ltmp3970: lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - mv s1, s6 + add s9, sp, a1 + mv s5, s6 sd a0, 112(sp) # 8-byte Folded Spill j .LBB42_3582 -.LBB42_3647: # %lpad184.i10764 +.LBB42_3648: # %lpad184.i10764 .Ltmp3967: - mv s1, s8 lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 + add s9, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill j .LBB42_3582 -.LBB42_3648: # %lpad182.i10760 +.LBB42_3649: # %lpad182.i10760 .Ltmp3964: lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - mv s1, s8 + add s9, sp, a1 + mv s1, s5 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3584 -.LBB42_3649: # %lpad177.i10748 + j .LBB42_3585 +.LBB42_3650: # %lpad177.i10748 .Ltmp3961: - mv s1, s5 + mv s1, s8 lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 + add s9, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3584 -.LBB42_3650: # %lpad175.i10744 + j .LBB42_3585 +.LBB42_3651: # %lpad175.i10744 .Ltmp3958: lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - mv s1, s5 + add s9, sp, a1 + mv s1, s8 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3586 -.LBB42_3651: # %lpad170.i10732 + j .LBB42_3587 +.LBB42_3652: # %lpad170.i10732 .Ltmp3955: mv s1, s7 lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 + add s9, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3586 -.LBB42_3652: # %lpad168.i10729 + j .LBB42_3587 +.LBB42_3653: # %lpad168.i10729 .Ltmp3952: lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - li s3, 1 + add s9, sp, a1 + li s2, 1 mv s1, s7 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3588 -.LBB42_3653: # %lpad163.i10718 + j .LBB42_3589 +.LBB42_3654: # %lpad163.i10718 .Ltmp3949: - mv s1, s2 + mv s1, s3 lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - li s3, 1 + add s9, sp, a1 + li s2, 1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3588 -.LBB42_3654: # %lpad161.i10714 + j .LBB42_3589 +.LBB42_3655: # %lpad161.i10714 .Ltmp3946: lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - li s3, 1 - mv s1, s2 + add s9, sp, a1 + li s2, 1 + mv s1, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3590 -.LBB42_3655: # %lpad156.i10702 + j .LBB42_3591 +.LBB42_3656: # %lpad156.i10702 .Ltmp3943: - mv s1, s2 + mv s1, s3 lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - li s3, 1 + add s9, sp, a1 + li s2, 1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3590 -.LBB42_3656: # %lpad154.i10698 + j .LBB42_3591 +.LBB42_3657: # %lpad154.i10698 .Ltmp3940: lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - mv s1, s2 + add s9, sp, a1 + mv s1, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3592 -.LBB42_3657: # %lpad149.i10686 + j .LBB42_3593 +.LBB42_3658: # %lpad149.i10686 .Ltmp3937: - mv s1, s2 + mv s1, s3 lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 + add s9, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3592 -.LBB42_3658: # %lpad147.i10682 + j .LBB42_3593 +.LBB42_3659: # %lpad147.i10682 .Ltmp3934: lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - mv s1, s2 + add s9, sp, a1 + mv s1, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3594 -.LBB42_3659: # %lpad142.i10670 + j .LBB42_3595 +.LBB42_3660: # %lpad142.i10670 .Ltmp3931: - mv s1, s2 + mv s1, s3 lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 + add s9, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3594 -.LBB42_3660: # %lpad140.i10666 + j .LBB42_3595 +.LBB42_3661: # %lpad140.i10666 .Ltmp3928: lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - mv s1, s2 + add s9, sp, a1 + mv s1, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3596 -.LBB42_3661: # %lpad135.i10654 + j .LBB42_3597 +.LBB42_3662: # %lpad135.i10654 .Ltmp3925: - mv s1, s2 + mv s1, s3 lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 + add s9, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3596 -.LBB42_3662: # %lpad133.i10650 + j .LBB42_3597 +.LBB42_3663: # %lpad133.i10650 .Ltmp3922: lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - mv s1, s2 + add s9, sp, a1 + mv s1, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3598 -.LBB42_3663: # %lpad128.i10638 + j .LBB42_3599 +.LBB42_3664: # %lpad128.i10638 .Ltmp3919: - mv s1, s5 + mv s1, s3 lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 + add s9, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3598 -.LBB42_3664: # %lpad121.i10625 + j .LBB42_3599 +.LBB42_3665: # %lpad121.i10625 .Ltmp3916: - mv s1, s2 + mv s1, s3 lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 + add s9, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3600 -.LBB42_3665: # %lpad119.i10622 + j .LBB42_3601 +.LBB42_3666: # %lpad119.i10622 .Ltmp3913: lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - mv s1, s2 + add s9, sp, a1 + mv s1, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3602 -.LBB42_3666: # %lpad114.i10611 + j .LBB42_3603 +.LBB42_3667: # %lpad114.i10611 .Ltmp3910: - mv s1, s2 + mv s1, s3 lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 + add s9, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3602 -.LBB42_3667: # %lpad112.i10607 + j .LBB42_3603 +.LBB42_3668: # %lpad112.i10607 .Ltmp3907: lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - mv s1, s2 + add s9, sp, a1 + mv s1, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3604 -.LBB42_3668: # %lpad107.i10595 + j .LBB42_3605 +.LBB42_3669: # %lpad107.i10595 .Ltmp3904: - mv s1, s2 + mv s1, s3 lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 + add s9, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3604 -.LBB42_3669: # %lpad105.i10591 + j .LBB42_3605 +.LBB42_3670: # %lpad105.i10591 .Ltmp3901: - lui a1, 1 - addiw a1, a1, 504 - add s0, sp, a1 - mv s1, s2 - sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3606 -.LBB42_3670: # %lpad100.i10578 + j .LBB42_3672 +.LBB42_3671: # %lpad100.i10578 .Ltmp3898: +.LBB42_3672: # %ehcleanup300.i10579 lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - mv s1, s5 + add s9, sp, a1 + mv s1, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3606 -.LBB42_3671: # %lpad98.i10574 + j .LBB42_3607 +.LBB42_3673: # %lpad98.i10574 .Ltmp3895: lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - li s3, 0 - mv s1, s5 + add s9, sp, a1 + li s0, 0 + mv s1, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3609 -.LBB42_3672: # %lpad93.i10562 + j .LBB42_3610 +.LBB42_3674: # %lpad93.i10562 .Ltmp3892: mv s1, s2 lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - li s3, 0 + add s9, sp, a1 + li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3609 -.LBB42_3673: # %lpad91.i10558 + j .LBB42_3610 +.LBB42_3675: # %lpad91.i10558 .Ltmp3889: lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - li s3, 0 + add s9, sp, a1 + li s0, 0 mv s1, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3611 -.LBB42_3674: # %lpad86.i10546 + j .LBB42_3612 +.LBB42_3676: # %lpad86.i10546 .Ltmp3886: - mv s1, s5 + mv s1, s3 lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - li s3, 0 + add s9, sp, a1 + li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3611 -.LBB42_3675: # %lpad84.i10542 + j .LBB42_3612 +.LBB42_3677: # %lpad84.i10542 .Ltmp3883: lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - li s3, 0 - mv s1, s5 + add s9, sp, a1 + li s0, 0 + mv s1, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3613 -.LBB42_3676: # %lpad79.i10530 + j .LBB42_3614 +.LBB42_3678: # %lpad79.i10530 .Ltmp3880: - mv s1, s5 + mv s1, s3 lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - li s3, 0 + add s9, sp, a1 + li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3613 -.LBB42_3677: # %lpad77.i10526 + j .LBB42_3614 +.LBB42_3679: # %lpad77.i10526 .Ltmp3877: lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - li s3, 0 - mv s1, s5 + add s9, sp, a1 + li s0, 0 + mv s1, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3615 -.LBB42_3678: # %lpad72.i10514 + j .LBB42_3616 +.LBB42_3680: # %lpad72.i10514 .Ltmp3874: - mv s1, s5 + mv s1, s3 lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - li s3, 0 + add s9, sp, a1 + li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3615 -.LBB42_3679: # %lpad70.i10510 + j .LBB42_3616 +.LBB42_3681: # %lpad70.i10510 .Ltmp3871: lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - li s3, 0 - mv s1, s5 + add s9, sp, a1 + li s0, 0 + mv s1, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3617 -.LBB42_3680: # %lpad65.i10499 + j .LBB42_3618 +.LBB42_3682: # %lpad65.i10499 .Ltmp3868: - mv s1, s5 + mv s1, s3 lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - li s3, 0 + add s9, sp, a1 + li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3617 -.LBB42_3681: # %lpad63.i10496 + j .LBB42_3618 +.LBB42_3683: # %lpad63.i10496 .Ltmp3865: lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - li s3, 0 - mv s1, s5 + add s9, sp, a1 + li s0, 0 + mv s1, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3619 -.LBB42_3682: # %lpad58.i10486 + j .LBB42_3620 +.LBB42_3684: # %lpad58.i10486 .Ltmp3862: - mv s1, s5 + mv s1, s3 lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - li s3, 0 + add s9, sp, a1 + li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3619 -.LBB42_3683: # %lpad56.i10482 + j .LBB42_3620 +.LBB42_3685: # %lpad56.i10482 .Ltmp3859: lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - li s3, 0 - mv s1, s5 + add s9, sp, a1 + li s0, 0 + mv s1, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3621 -.LBB42_3684: # %lpad51.i10471 + j .LBB42_3622 +.LBB42_3686: # %lpad51.i10471 .Ltmp3856: mv s1, s3 lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - li s3, 0 + add s9, sp, a1 + li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3621 -.LBB42_3685: # %lpad44.i10459 + j .LBB42_3622 +.LBB42_3687: # %lpad44.i10459 .Ltmp3853: mv s1, s2 lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - li s3, 0 + add s9, sp, a1 + li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3623 -.LBB42_3686: # %lpad42.i10455 + j .LBB42_3624 +.LBB42_3688: # %lpad42.i10455 .Ltmp3850: lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - li s3, 0 + add s9, sp, a1 + li s0, 0 mv s1, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3625 -.LBB42_3687: # %lpad37.i10444 + j .LBB42_3626 +.LBB42_3689: # %lpad37.i10444 .Ltmp3847: mv s1, s2 lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - li s3, 0 + add s9, sp, a1 + li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3625 -.LBB42_3688: # %lpad35.i10440 + j .LBB42_3626 +.LBB42_3690: # %lpad35.i10440 .Ltmp3844: lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - li s3, 0 + add s9, sp, a1 + li s0, 0 mv s1, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3627 -.LBB42_3689: # %lpad30.i10428 + j .LBB42_3628 +.LBB42_3691: # %lpad30.i10428 .Ltmp3841: mv s1, s2 lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - li s3, 0 + add s9, sp, a1 + li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3627 -.LBB42_3690: # %lpad28.i10424 + j .LBB42_3628 +.LBB42_3692: # %lpad28.i10424 .Ltmp3838: lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - li s3, 0 + add s9, sp, a1 + li s0, 0 mv s1, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3629 -.LBB42_3691: # %lpad23.i10412 + j .LBB42_3630 +.LBB42_3693: # %lpad23.i10412 .Ltmp3835: mv s1, s2 lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - li s3, 0 + add s9, sp, a1 + li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3629 -.LBB42_3692: # %lpad21.i10408 + j .LBB42_3630 +.LBB42_3694: # %lpad21.i10408 .Ltmp3832: lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - li s3, 0 + add s9, sp, a1 + li s0, 0 mv s1, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3631 -.LBB42_3693: # %lpad16.i10396 + j .LBB42_3632 +.LBB42_3695: # %lpad16.i10396 .Ltmp3829: mv s1, s2 lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - li s3, 0 + add s9, sp, a1 + li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3631 -.LBB42_3694: # %lpad14.i10392 + j .LBB42_3632 +.LBB42_3696: # %lpad14.i10392 .Ltmp3826: lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - li s3, 0 + add s9, sp, a1 + li s0, 0 mv s1, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3633 -.LBB42_3695: # %lpad9.i10380 + j .LBB42_3634 +.LBB42_3697: # %lpad9.i10380 .Ltmp3823: lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - li s3, 0 + add s9, sp, a1 + li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3633 -.LBB42_3696: # %lpad7.i10376 + j .LBB42_3634 +.LBB42_3698: # %lpad7.i10376 .Ltmp3820: - j .LBB42_3698 -.LBB42_3697: # %lpad3.i10361 + j .LBB42_3700 +.LBB42_3699: # %lpad3.i10361 .Ltmp3817: -.LBB42_3698: # %ehcleanup342.i10362 +.LBB42_3700: # %ehcleanup342.i10362 lui a1, 1 addiw a1, a1, 504 - add s0, sp, a1 - li s3, 0 + add s9, sp, a1 + li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3635 -.LBB42_3699: # %lpad25.i10113 + j .LBB42_3636 +.LBB42_3701: # %lpad25.i10113 .Ltmp3814: mv s0, a0 mv a0, s3 @@ -61929,111 +61920,111 @@ call _ZN8TestCaseD2Ev li s4, 1 sd s0, 112(sp) # 8-byte Folded Spill - j .LBB42_3701 -.LBB42_3700: # %lpad23.i10101 + j .LBB42_3703 +.LBB42_3702: # %lpad23.i10101 .Ltmp3811: li s4, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_3701: # %ehcleanup.i10102 +.LBB42_3703: # %ehcleanup.i10102 ld a0, 968(s5) lui a1, 1 addiw a1, a1, 1488 add a1, sp, a1 - beq a0, a1, .LBB42_3703 -# %bb.3702: # %if.then.i.i68.i10106 + beq a0, a1, .LBB42_3705 +# %bb.3704: # %if.then.i.i68.i10106 call _ZdlPv@plt -.LBB42_3703: # %ehcleanup36.i10086 +.LBB42_3705: # %ehcleanup36.i10086 mv s2, s3 - j .LBB42_3707 -.LBB42_3704: # %lpad21.i10097 + j .LBB42_3709 +.LBB42_3706: # %lpad21.i10097 .Ltmp3808: lui a1, 1 addiw a1, a1, 504 add s5, sp, a1 li s4, 0 mv s2, s3 - j .LBB42_3706 -.LBB42_3705: # %lpad16.i10085 + j .LBB42_3708 +.LBB42_3707: # %lpad16.i10085 .Ltmp3805: lui a1, 1 addiw a1, a1, 504 add s5, sp, a1 li s4, 0 -.LBB42_3706: # %ehcleanup36.i10086 +.LBB42_3708: # %ehcleanup36.i10086 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_3707: # %ehcleanup36.i10086 +.LBB42_3709: # %ehcleanup36.i10086 ld a0, 1000(s5) lui a1, 1 addiw a1, a1, 1520 add a1, sp, a1 - beq a0, a1, .LBB42_3709 -# %bb.3708: # %if.then.i.i74.i10091 + beq a0, a1, .LBB42_3711 +# %bb.3710: # %if.then.i.i74.i10091 call _ZdlPv@plt -.LBB42_3709: # %ehcleanup39.i10070 +.LBB42_3711: # %ehcleanup39.i10070 mv s1, s2 - j .LBB42_3713 -.LBB42_3710: # %lpad14.i10081 + j .LBB42_3715 +.LBB42_3712: # %lpad14.i10081 .Ltmp3802: lui a1, 1 addiw a1, a1, 504 add s5, sp, a1 li s4, 0 mv s1, s2 - j .LBB42_3712 -.LBB42_3711: # %lpad9.i10069 + j .LBB42_3714 +.LBB42_3713: # %lpad9.i10069 .Ltmp3799: lui a1, 1 addiw a1, a1, 504 add s5, sp, a1 li s4, 0 -.LBB42_3712: # %ehcleanup39.i10070 +.LBB42_3714: # %ehcleanup39.i10070 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_3713: # %ehcleanup39.i10070 +.LBB42_3715: # %ehcleanup39.i10070 ld a0, 1032(s5) lui a1, 1 addiw a1, a1, 1552 add a1, sp, a1 - beq a0, a1, .LBB42_3718 -# %bb.3714: # %if.then.i.i80.i10075 + beq a0, a1, .LBB42_3720 +# %bb.3716: # %if.then.i.i80.i10075 call _ZdlPv@plt - j .LBB42_3718 -.LBB42_3715: # %lpad7.i10065 + j .LBB42_3720 +.LBB42_3717: # %lpad7.i10065 .Ltmp3796: - j .LBB42_3717 -.LBB42_3716: # %lpad3.i10045 + j .LBB42_3719 +.LBB42_3718: # %lpad3.i10045 .Ltmp3793: -.LBB42_3717: # %ehcleanup42.i10046 +.LBB42_3719: # %ehcleanup42.i10046 lui a1, 1 addiw a1, a1, 504 add s5, sp, a1 li s4, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_3718: # %ehcleanup42.i10046 +.LBB42_3720: # %ehcleanup42.i10046 ld a0, 1064(s5) lui a1, 1 addiw a1, a1, 1584 add a1, sp, a1 - beq a0, a1, .LBB42_3720 -# %bb.3719: # %if.then.i.i86.i10051 + beq a0, a1, .LBB42_3722 +# %bb.3721: # %if.then.i.i86.i10051 call _ZdlPv@plt -.LBB42_3720: # %ehcleanup43.i10052 +.LBB42_3722: # %ehcleanup43.i10052 addi s0, sp, 552 xor a0, s0, s1 seqz a0, a0 or a0, s4, a0 - beqz a0, .LBB42_3721 - j .LBB42_5497 -.LBB42_3721: # %arraydestroy.body46.i10055 + beqz a0, .LBB42_3723 + j .LBB42_5499 +.LBB42_3723: # %arraydestroy.body46.i10055 # =>This Inner Loop Header: Depth=1 addi s1, s1, -88 mv a0, s1 call _ZN8TestCaseD2Ev - bne s1, s0, .LBB42_3721 - j .LBB42_5497 -.LBB42_3722: # %lpad.i10027 + bne s1, s0, .LBB42_3723 + j .LBB42_5499 +.LBB42_3724: # %lpad.i10027 .Ltmp3790: - j .LBB42_5163 -.LBB42_3723: # %lpad25.i9843 + j .LBB42_5165 +.LBB42_3725: # %lpad25.i9843 .Ltmp3787: mv s0, a0 mv a0, s3 @@ -62046,108 +62037,108 @@ call _ZN8TestCaseD2Ev li s4, 1 sd s0, 112(sp) # 8-byte Folded Spill - j .LBB42_3725 -.LBB42_3724: # %lpad23.i9831 + j .LBB42_3727 +.LBB42_3726: # %lpad23.i9831 .Ltmp3784: li s4, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_3725: # %ehcleanup.i9832 +.LBB42_3727: # %ehcleanup.i9832 ld a0, 968(s5) lui a1, 1 addiw a1, a1, 1488 add a1, sp, a1 - beq a0, a1, .LBB42_3727 -# %bb.3726: # %if.then.i.i68.i9836 + beq a0, a1, .LBB42_3729 +# %bb.3728: # %if.then.i.i68.i9836 call _ZdlPv@plt -.LBB42_3727: # %ehcleanup36.i9816 +.LBB42_3729: # %ehcleanup36.i9816 mv s2, s3 - j .LBB42_3731 -.LBB42_3728: # %lpad21.i9827 + j .LBB42_3733 +.LBB42_3730: # %lpad21.i9827 .Ltmp3781: lui a1, 1 addiw a1, a1, 504 add s5, sp, a1 li s4, 0 mv s2, s3 - j .LBB42_3730 -.LBB42_3729: # %lpad16.i9815 + j .LBB42_3732 +.LBB42_3731: # %lpad16.i9815 .Ltmp3778: lui a1, 1 addiw a1, a1, 504 add s5, sp, a1 li s4, 0 -.LBB42_3730: # %ehcleanup36.i9816 +.LBB42_3732: # %ehcleanup36.i9816 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_3731: # %ehcleanup36.i9816 +.LBB42_3733: # %ehcleanup36.i9816 ld a0, 1000(s5) lui a1, 1 addiw a1, a1, 1520 add a1, sp, a1 - beq a0, a1, .LBB42_3733 -# %bb.3732: # %if.then.i.i74.i9821 + beq a0, a1, .LBB42_3735 +# %bb.3734: # %if.then.i.i74.i9821 call _ZdlPv@plt -.LBB42_3733: # %ehcleanup39.i9800 +.LBB42_3735: # %ehcleanup39.i9800 mv s1, s2 - j .LBB42_3737 -.LBB42_3734: # %lpad14.i9811 + j .LBB42_3739 +.LBB42_3736: # %lpad14.i9811 .Ltmp3775: lui a1, 1 addiw a1, a1, 504 add s5, sp, a1 li s4, 0 mv s1, s2 - j .LBB42_3736 -.LBB42_3735: # %lpad9.i9799 + j .LBB42_3738 +.LBB42_3737: # %lpad9.i9799 .Ltmp3772: lui a1, 1 addiw a1, a1, 504 add s5, sp, a1 li s4, 0 -.LBB42_3736: # %ehcleanup39.i9800 +.LBB42_3738: # %ehcleanup39.i9800 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_3737: # %ehcleanup39.i9800 +.LBB42_3739: # %ehcleanup39.i9800 ld a0, 1032(s5) lui a1, 1 addiw a1, a1, 1552 add a1, sp, a1 - beq a0, a1, .LBB42_3742 -# %bb.3738: # %if.then.i.i80.i9805 + beq a0, a1, .LBB42_3744 +# %bb.3740: # %if.then.i.i80.i9805 call _ZdlPv@plt - j .LBB42_3742 -.LBB42_3739: # %lpad7.i9795 + j .LBB42_3744 +.LBB42_3741: # %lpad7.i9795 .Ltmp3769: - j .LBB42_3741 -.LBB42_3740: # %lpad3.i9775 + j .LBB42_3743 +.LBB42_3742: # %lpad3.i9775 .Ltmp3766: -.LBB42_3741: # %ehcleanup42.i9776 +.LBB42_3743: # %ehcleanup42.i9776 lui a1, 1 addiw a1, a1, 504 add s5, sp, a1 li s4, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_3742: # %ehcleanup42.i9776 +.LBB42_3744: # %ehcleanup42.i9776 ld a0, 1064(s5) lui a1, 1 addiw a1, a1, 1584 add a1, sp, a1 - beq a0, a1, .LBB42_3744 -# %bb.3743: # %if.then.i.i86.i9781 + beq a0, a1, .LBB42_3746 +# %bb.3745: # %if.then.i.i86.i9781 call _ZdlPv@plt -.LBB42_3744: # %ehcleanup43.i9782 +.LBB42_3746: # %ehcleanup43.i9782 addi s0, sp, 552 xor a0, s0, s1 seqz a0, a0 or a0, s4, a0 - beqz a0, .LBB42_3745 - j .LBB42_5497 -.LBB42_3745: # %arraydestroy.body46.i9785 + beqz a0, .LBB42_3747 + j .LBB42_5499 +.LBB42_3747: # %arraydestroy.body46.i9785 # =>This Inner Loop Header: Depth=1 addi s1, s1, -88 mv a0, s1 call _ZN8TestCaseD2Ev - bne s1, s0, .LBB42_3745 - j .LBB42_5497 -.LBB42_3746: # %lpad214.i9533 + bne s1, s0, .LBB42_3747 + j .LBB42_5499 +.LBB42_3748: # %lpad214.i9533 .Ltmp3763: mv s4, a0 mv a0, s3 @@ -62220,404 +62211,404 @@ call _ZN8TestCaseD2Ev li s2, 0 sd s4, 112(sp) # 8-byte Folded Spill - j .LBB42_3748 -.LBB42_3747: # %lpad212.i9521 + j .LBB42_3750 +.LBB42_3749: # %lpad212.i9521 .Ltmp3760: sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_3748: # %ehcleanup.i9522 +.LBB42_3750: # %ehcleanup.i9522 ld a0, 104(s7) lui a1, 1 addiw a1, a1, 624 add a1, sp, a1 - beq a0, a1, .LBB42_3750 -# %bb.3749: # %if.then.i.i608.i9526 + beq a0, a1, .LBB42_3752 +# %bb.3751: # %if.then.i.i608.i9526 call _ZdlPv@plt -.LBB42_3750: # %ehcleanup225.i9506 +.LBB42_3752: # %ehcleanup225.i9506 mv s0, s3 - j .LBB42_3754 -.LBB42_3751: # %lpad210.i9517 + j .LBB42_3756 +.LBB42_3753: # %lpad210.i9517 .Ltmp3757: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 mv s0, s3 - j .LBB42_3753 -.LBB42_3752: # %lpad205.i9505 + j .LBB42_3755 +.LBB42_3754: # %lpad205.i9505 .Ltmp3754: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 -.LBB42_3753: # %ehcleanup225.i9506 +.LBB42_3755: # %ehcleanup225.i9506 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_3754: # %ehcleanup225.i9506 +.LBB42_3756: # %ehcleanup225.i9506 ld a0, 136(s7) lui a1, 1 addiw a1, a1, 656 add a1, sp, a1 - beq a0, a1, .LBB42_3756 -# %bb.3755: # %if.then.i.i614.i9511 + beq a0, a1, .LBB42_3758 +# %bb.3757: # %if.then.i.i614.i9511 call _ZdlPv@plt -.LBB42_3756: # %ehcleanup228.i9490 +.LBB42_3758: # %ehcleanup228.i9490 mv s11, s0 - j .LBB42_3760 -.LBB42_3757: # %lpad203.i9501 + j .LBB42_3762 +.LBB42_3759: # %lpad203.i9501 .Ltmp3751: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 mv s11, s0 - j .LBB42_3759 -.LBB42_3758: # %lpad198.i9489 + j .LBB42_3761 +.LBB42_3760: # %lpad198.i9489 .Ltmp3748: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 -.LBB42_3759: # %ehcleanup228.i9490 +.LBB42_3761: # %ehcleanup228.i9490 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_3760: # %ehcleanup228.i9490 +.LBB42_3762: # %ehcleanup228.i9490 ld a0, 168(s7) lui a1, 1 addiw a1, a1, 688 add a1, sp, a1 - beq a0, a1, .LBB42_3762 -# %bb.3761: # %if.then.i.i620.i9495 + beq a0, a1, .LBB42_3764 +# %bb.3763: # %if.then.i.i620.i9495 call _ZdlPv@plt -.LBB42_3762: # %ehcleanup231.i9474 +.LBB42_3764: # %ehcleanup231.i9474 mv s10, s11 -.LBB42_3763: # %ehcleanup231.i9474 +.LBB42_3765: # %ehcleanup231.i9474 ld a0, 200(s7) lui a1, 1 addiw a1, a1, 720 add a1, sp, a1 - beq a0, a1, .LBB42_3765 -# %bb.3764: # %if.then.i.i626.i9479 + beq a0, a1, .LBB42_3767 +# %bb.3766: # %if.then.i.i626.i9479 call _ZdlPv@plt -.LBB42_3765: # %ehcleanup234.i9461 +.LBB42_3767: # %ehcleanup234.i9461 mv s9, s10 -.LBB42_3766: # %ehcleanup234.i9461 +.LBB42_3768: # %ehcleanup234.i9461 ld a0, 232(s7) lui a1, 1 addiw a1, a1, 752 add a1, sp, a1 - beq a0, a1, .LBB42_3768 -# %bb.3767: # %if.then.i.i632.i9466 + beq a0, a1, .LBB42_3770 +# %bb.3769: # %if.then.i.i632.i9466 call _ZdlPv@plt -.LBB42_3768: # %ehcleanup237.i9445 +.LBB42_3770: # %ehcleanup237.i9445 mv s8, s9 -.LBB42_3769: # %ehcleanup237.i9445 +.LBB42_3771: # %ehcleanup237.i9445 ld a0, 264(s7) lui a1, 1 addiw a1, a1, 784 add a1, sp, a1 - beq a0, a1, .LBB42_3771 -# %bb.3770: # %if.then.i.i638.i9450 + beq a0, a1, .LBB42_3773 +# %bb.3772: # %if.then.i.i638.i9450 call _ZdlPv@plt -.LBB42_3771: # %ehcleanup240.i9429 +.LBB42_3773: # %ehcleanup240.i9429 mv s6, s8 -.LBB42_3772: # %ehcleanup240.i9429 +.LBB42_3774: # %ehcleanup240.i9429 ld a0, 296(s7) lui a1, 1 addiw a1, a1, 816 add a1, sp, a1 - beq a0, a1, .LBB42_3774 -# %bb.3773: # %if.then.i.i644.i9434 + beq a0, a1, .LBB42_3776 +# %bb.3775: # %if.then.i.i644.i9434 call _ZdlPv@plt -.LBB42_3774: # %ehcleanup243.i9413 +.LBB42_3776: # %ehcleanup243.i9413 mv s5, s6 -.LBB42_3775: # %ehcleanup243.i9413 +.LBB42_3777: # %ehcleanup243.i9413 ld a0, 328(s7) lui a1, 1 addiw a1, a1, 848 add a1, sp, a1 - beq a0, a1, .LBB42_3777 -# %bb.3776: # %if.then.i.i650.i9418 + beq a0, a1, .LBB42_3779 +# %bb.3778: # %if.then.i.i650.i9418 call _ZdlPv@plt -.LBB42_3777: # %ehcleanup246.i9397 +.LBB42_3779: # %ehcleanup246.i9397 mv s1, s5 -.LBB42_3778: # %ehcleanup246.i9397 +.LBB42_3780: # %ehcleanup246.i9397 ld a0, 360(s7) lui a1, 1 addiw a1, a1, 880 add a1, sp, a1 - beq a0, a1, .LBB42_3780 -# %bb.3779: # %if.then.i.i656.i9402 + beq a0, a1, .LBB42_3782 +# %bb.3781: # %if.then.i.i656.i9402 call _ZdlPv@plt -.LBB42_3780: # %ehcleanup249.i9381 +.LBB42_3782: # %ehcleanup249.i9381 ld a0, 392(s7) lui a1, 1 addiw a1, a1, 912 add a1, sp, a1 - beq a0, a1, .LBB42_3782 -# %bb.3781: # %if.then.i.i662.i9386 + beq a0, a1, .LBB42_3784 +# %bb.3783: # %if.then.i.i662.i9386 call _ZdlPv@plt -.LBB42_3782: # %ehcleanup252.i9365 +.LBB42_3784: # %ehcleanup252.i9365 ld a0, 424(s7) lui a1, 1 addiw a1, a1, 944 add a1, sp, a1 - beq a0, a1, .LBB42_3784 -# %bb.3783: # %if.then.i.i668.i9370 + beq a0, a1, .LBB42_3786 +# %bb.3785: # %if.then.i.i668.i9370 call _ZdlPv@plt -.LBB42_3784: # %ehcleanup255.i9349 +.LBB42_3786: # %ehcleanup255.i9349 ld a0, 456(s7) lui a1, 1 addiw a1, a1, 976 add a1, sp, a1 - beq a0, a1, .LBB42_3786 -# %bb.3785: # %if.then.i.i674.i9354 + beq a0, a1, .LBB42_3788 +# %bb.3787: # %if.then.i.i674.i9354 call _ZdlPv@plt -.LBB42_3786: # %ehcleanup258.i9333 +.LBB42_3788: # %ehcleanup258.i9333 ld a0, 488(s7) lui a1, 1 addiw a1, a1, 1008 add a1, sp, a1 - beq a0, a1, .LBB42_3788 -# %bb.3787: # %if.then.i.i680.i9338 + beq a0, a1, .LBB42_3790 +# %bb.3789: # %if.then.i.i680.i9338 call _ZdlPv@plt -.LBB42_3788: # %ehcleanup261.i9317 +.LBB42_3790: # %ehcleanup261.i9317 ld a0, 520(s7) lui a1, 1 addiw a1, a1, 1040 add a1, sp, a1 - beq a0, a1, .LBB42_3790 -# %bb.3789: # %if.then.i.i686.i9322 + beq a0, a1, .LBB42_3792 +# %bb.3791: # %if.then.i.i686.i9322 call _ZdlPv@plt -.LBB42_3790: # %ehcleanup264.i9304 +.LBB42_3792: # %ehcleanup264.i9304 ld a0, 552(s7) lui a1, 1 addiw a1, a1, 1072 add a1, sp, a1 - beq a0, a1, .LBB42_3792 -# %bb.3791: # %if.then.i.i692.i9309 + beq a0, a1, .LBB42_3794 +# %bb.3793: # %if.then.i.i692.i9309 call _ZdlPv@plt -.LBB42_3792: # %ehcleanup267.i9288 +.LBB42_3794: # %ehcleanup267.i9288 ld a0, 584(s7) lui a1, 1 addiw a1, a1, 1104 add a1, sp, a1 - beq a0, a1, .LBB42_3794 -# %bb.3793: # %if.then.i.i698.i9293 + beq a0, a1, .LBB42_3796 +# %bb.3795: # %if.then.i.i698.i9293 call _ZdlPv@plt -.LBB42_3794: # %ehcleanup270.i9271 +.LBB42_3796: # %ehcleanup270.i9271 ld a0, 616(s7) lui a1, 1 addiw a1, a1, 1136 add a1, sp, a1 - beq a0, a1, .LBB42_3796 -# %bb.3795: # %if.then.i.i704.i9276 + beq a0, a1, .LBB42_3798 +# %bb.3797: # %if.then.i.i704.i9276 call _ZdlPv@plt -.LBB42_3796: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit708.i9277 +.LBB42_3798: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit708.i9277 xori s0, s2, 1 -.LBB42_3797: # %ehcleanup273.i9255 +.LBB42_3799: # %ehcleanup273.i9255 ld a0, 648(s7) lui a1, 1 addiw a1, a1, 1168 add a1, sp, a1 - beq a0, a1, .LBB42_3799 -# %bb.3798: # %if.then.i.i710.i9260 + beq a0, a1, .LBB42_3801 +# %bb.3800: # %if.then.i.i710.i9260 call _ZdlPv@plt -.LBB42_3799: # %ehcleanup276.i9239 +.LBB42_3801: # %ehcleanup276.i9239 ld a0, 680(s7) lui a1, 1 addiw a1, a1, 1200 add a1, sp, a1 - beq a0, a1, .LBB42_3801 -# %bb.3800: # %if.then.i.i716.i9244 + beq a0, a1, .LBB42_3803 +# %bb.3802: # %if.then.i.i716.i9244 call _ZdlPv@plt -.LBB42_3801: # %ehcleanup279.i9223 +.LBB42_3803: # %ehcleanup279.i9223 ld a0, 712(s7) lui a1, 1 addiw a1, a1, 1232 add a1, sp, a1 - beq a0, a1, .LBB42_3803 -# %bb.3802: # %if.then.i.i722.i9228 + beq a0, a1, .LBB42_3805 +# %bb.3804: # %if.then.i.i722.i9228 call _ZdlPv@plt -.LBB42_3803: # %ehcleanup282.i9207 +.LBB42_3805: # %ehcleanup282.i9207 ld a0, 744(s7) lui a1, 1 addiw a1, a1, 1264 add a1, sp, a1 - beq a0, a1, .LBB42_3805 -# %bb.3804: # %if.then.i.i728.i9212 + beq a0, a1, .LBB42_3807 +# %bb.3806: # %if.then.i.i728.i9212 call _ZdlPv@plt -.LBB42_3805: # %ehcleanup285.i9191 +.LBB42_3807: # %ehcleanup285.i9191 ld a0, 776(s7) lui a1, 1 addiw a1, a1, 1296 add a1, sp, a1 - beq a0, a1, .LBB42_3807 -# %bb.3806: # %if.then.i.i734.i9196 + beq a0, a1, .LBB42_3809 +# %bb.3808: # %if.then.i.i734.i9196 call _ZdlPv@plt -.LBB42_3807: # %ehcleanup288.i9175 +.LBB42_3809: # %ehcleanup288.i9175 ld a0, 808(s7) lui a1, 1 addiw a1, a1, 1328 add a1, sp, a1 - beq a0, a1, .LBB42_3809 -# %bb.3808: # %if.then.i.i740.i9180 + beq a0, a1, .LBB42_3811 +# %bb.3810: # %if.then.i.i740.i9180 call _ZdlPv@plt -.LBB42_3809: # %ehcleanup291.i9159 +.LBB42_3811: # %ehcleanup291.i9159 ld a0, 840(s7) lui a1, 1 addiw a1, a1, 1360 add a1, sp, a1 - beq a0, a1, .LBB42_3811 -# %bb.3810: # %if.then.i.i746.i9164 + beq a0, a1, .LBB42_3813 +# %bb.3812: # %if.then.i.i746.i9164 call _ZdlPv@plt -.LBB42_3811: # %ehcleanup294.i9146 +.LBB42_3813: # %ehcleanup294.i9146 ld a0, 872(s7) lui a1, 1 addiw a1, a1, 1392 add a1, sp, a1 - beq a0, a1, .LBB42_3813 -# %bb.3812: # %if.then.i.i752.i9151 + beq a0, a1, .LBB42_3815 +# %bb.3814: # %if.then.i.i752.i9151 call _ZdlPv@plt -.LBB42_3813: # %ehcleanup297.i9130 +.LBB42_3815: # %ehcleanup297.i9130 ld a0, 904(s7) lui a1, 1 addiw a1, a1, 1424 add a1, sp, a1 - beq a0, a1, .LBB42_3815 -# %bb.3814: # %if.then.i.i758.i9135 + beq a0, a1, .LBB42_3817 +# %bb.3816: # %if.then.i.i758.i9135 call _ZdlPv@plt -.LBB42_3815: # %ehcleanup300.i9114 +.LBB42_3817: # %ehcleanup300.i9114 ld a0, 936(s7) lui a1, 1 addiw a1, a1, 1456 add a1, sp, a1 - beq a0, a1, .LBB42_3817 -# %bb.3816: # %if.then.i.i764.i9119 + beq a0, a1, .LBB42_3819 +# %bb.3818: # %if.then.i.i764.i9119 call _ZdlPv@plt -.LBB42_3817: # %ehcleanup303.i9098 +.LBB42_3819: # %ehcleanup303.i9098 ld a0, 968(s7) lui a1, 1 addiw a1, a1, 1488 add a1, sp, a1 - beq a0, a1, .LBB42_3819 -# %bb.3818: # %if.then.i.i770.i9103 + beq a0, a1, .LBB42_3821 +# %bb.3820: # %if.then.i.i770.i9103 call _ZdlPv@plt -.LBB42_3819: # %ehcleanup306.i9082 +.LBB42_3821: # %ehcleanup306.i9082 ld a0, 1000(s7) lui a1, 1 addiw a1, a1, 1520 add a1, sp, a1 - beq a0, a1, .LBB42_3821 -# %bb.3820: # %if.then.i.i776.i9087 + beq a0, a1, .LBB42_3823 +# %bb.3822: # %if.then.i.i776.i9087 call _ZdlPv@plt -.LBB42_3821: # %ehcleanup309.i9066 +.LBB42_3823: # %ehcleanup309.i9066 ld a0, 1032(s7) lui a1, 1 addiw a1, a1, 1552 add a1, sp, a1 - beq a0, a1, .LBB42_3823 -# %bb.3822: # %if.then.i.i782.i9071 + beq a0, a1, .LBB42_3825 +# %bb.3824: # %if.then.i.i782.i9071 call _ZdlPv@plt -.LBB42_3823: # %ehcleanup312.i9042 +.LBB42_3825: # %ehcleanup312.i9042 ld a0, 1064(s7) lui a1, 1 addiw a1, a1, 1584 add a1, sp, a1 - beq a0, a1, .LBB42_3825 -# %bb.3824: # %if.then.i.i788.i9047 + beq a0, a1, .LBB42_3827 +# %bb.3826: # %if.then.i.i788.i9047 call _ZdlPv@plt -.LBB42_3825: # %ehcleanup313.i9048 +.LBB42_3827: # %ehcleanup313.i9048 addi s2, sp, 552 xor a0, s2, s1 seqz a0, a0 or a0, s0, a0 - beqz a0, .LBB42_3826 - j .LBB42_5497 -.LBB42_3826: # %arraydestroy.body316.i9051 + beqz a0, .LBB42_3828 + j .LBB42_5499 +.LBB42_3828: # %arraydestroy.body316.i9051 # =>This Inner Loop Header: Depth=1 addi s1, s1, -88 mv a0, s1 call _ZN8TestCaseD2Ev - bne s1, s2, .LBB42_3826 - j .LBB42_5497 -.LBB42_3827: # %lpad196.i9485 + bne s1, s2, .LBB42_3828 + j .LBB42_5499 +.LBB42_3829: # %lpad196.i9485 .Ltmp3745: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 mv s10, s11 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3763 -.LBB42_3828: # %lpad191.i9473 + j .LBB42_3765 +.LBB42_3830: # %lpad191.i9473 .Ltmp3742: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3763 -.LBB42_3829: # %lpad184.i9460 + j .LBB42_3765 +.LBB42_3831: # %lpad184.i9460 .Ltmp3739: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3766 -.LBB42_3830: # %lpad182.i9456 + j .LBB42_3768 +.LBB42_3832: # %lpad182.i9456 .Ltmp3736: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 mv s8, s9 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3769 -.LBB42_3831: # %lpad177.i9444 + j .LBB42_3771 +.LBB42_3833: # %lpad177.i9444 .Ltmp3733: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3769 -.LBB42_3832: # %lpad175.i9440 + j .LBB42_3771 +.LBB42_3834: # %lpad175.i9440 .Ltmp3730: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 mv s6, s8 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3772 -.LBB42_3833: # %lpad170.i9428 + j .LBB42_3774 +.LBB42_3835: # %lpad170.i9428 .Ltmp3727: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3772 -.LBB42_3834: # %lpad168.i9424 + j .LBB42_3774 +.LBB42_3836: # %lpad168.i9424 .Ltmp3724: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 mv s5, s6 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3775 -.LBB42_3835: # %lpad163.i9412 + j .LBB42_3777 +.LBB42_3837: # %lpad163.i9412 .Ltmp3721: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3775 -.LBB42_3836: # %lpad161.i9408 + j .LBB42_3777 +.LBB42_3838: # %lpad161.i9408 .Ltmp3718: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 mv s1, s5 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3778 -.LBB42_3837: # %lpad156.i9396 + j .LBB42_3780 +.LBB42_3839: # %lpad156.i9396 .Ltmp3715: mv s1, s3 lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3778 -.LBB42_3838: # %lpad154.i9392 + j .LBB42_3780 +.LBB42_3840: # %lpad154.i9392 .Ltmp3712: lui a1, 1 addiw a1, a1, 504 @@ -62625,8 +62616,8 @@ li s2, 1 mv s1, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3780 -.LBB42_3839: # %lpad149.i9380 + j .LBB42_3782 +.LBB42_3841: # %lpad149.i9380 .Ltmp3709: mv s1, s3 lui a1, 1 @@ -62634,108 +62625,108 @@ add s7, sp, a1 li s2, 1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3780 -.LBB42_3840: # %lpad147.i9376 + j .LBB42_3782 +.LBB42_3842: # %lpad147.i9376 .Ltmp3706: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 mv s1, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3782 -.LBB42_3841: # %lpad142.i9364 + j .LBB42_3784 +.LBB42_3843: # %lpad142.i9364 .Ltmp3703: mv s1, s3 lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3782 -.LBB42_3842: # %lpad140.i9360 + j .LBB42_3784 +.LBB42_3844: # %lpad140.i9360 .Ltmp3700: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 mv s1, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3784 -.LBB42_3843: # %lpad135.i9348 + j .LBB42_3786 +.LBB42_3845: # %lpad135.i9348 .Ltmp3697: mv s1, s3 lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3784 -.LBB42_3844: # %lpad133.i9344 + j .LBB42_3786 +.LBB42_3846: # %lpad133.i9344 .Ltmp3694: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 mv s1, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3786 -.LBB42_3845: # %lpad128.i9332 + j .LBB42_3788 +.LBB42_3847: # %lpad128.i9332 .Ltmp3691: mv s1, s3 lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3786 -.LBB42_3846: # %lpad126.i9328 + j .LBB42_3788 +.LBB42_3848: # %lpad126.i9328 .Ltmp3688: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 mv s1, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3788 -.LBB42_3847: # %lpad121.i9316 + j .LBB42_3790 +.LBB42_3849: # %lpad121.i9316 .Ltmp3685: mv s1, s3 lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3788 -.LBB42_3848: # %lpad114.i9303 + j .LBB42_3790 +.LBB42_3850: # %lpad114.i9303 .Ltmp3682: mv s1, s3 lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3790 -.LBB42_3849: # %lpad112.i9299 + j .LBB42_3792 +.LBB42_3851: # %lpad112.i9299 .Ltmp3679: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 mv s1, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3792 -.LBB42_3850: # %lpad107.i9287 + j .LBB42_3794 +.LBB42_3852: # %lpad107.i9287 .Ltmp3676: mv s1, s3 lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3792 -.LBB42_3851: # %lpad105.i9283 + j .LBB42_3794 +.LBB42_3853: # %lpad105.i9283 .Ltmp3673: - j .LBB42_3853 -.LBB42_3852: # %lpad100.i9270 + j .LBB42_3855 +.LBB42_3854: # %lpad100.i9270 .Ltmp3670: -.LBB42_3853: # %ehcleanup270.i9271 +.LBB42_3855: # %ehcleanup270.i9271 lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 mv s1, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3794 -.LBB42_3854: # %lpad98.i9266 + j .LBB42_3796 +.LBB42_3856: # %lpad98.i9266 .Ltmp3667: lui a1, 1 addiw a1, a1, 504 @@ -62743,8 +62734,8 @@ li s0, 0 mv s1, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3797 -.LBB42_3855: # %lpad93.i9254 + j .LBB42_3799 +.LBB42_3857: # %lpad93.i9254 .Ltmp3664: mv s1, s3 lui a1, 1 @@ -62752,8 +62743,8 @@ add s7, sp, a1 li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3797 -.LBB42_3856: # %lpad91.i9250 + j .LBB42_3799 +.LBB42_3858: # %lpad91.i9250 .Ltmp3661: lui a1, 1 addiw a1, a1, 504 @@ -62761,8 +62752,8 @@ li s0, 0 mv s1, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3799 -.LBB42_3857: # %lpad86.i9238 + j .LBB42_3801 +.LBB42_3859: # %lpad86.i9238 .Ltmp3658: mv s1, s3 lui a1, 1 @@ -62770,8 +62761,8 @@ add s7, sp, a1 li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3799 -.LBB42_3858: # %lpad84.i9234 + j .LBB42_3801 +.LBB42_3860: # %lpad84.i9234 .Ltmp3655: lui a1, 1 addiw a1, a1, 504 @@ -62779,8 +62770,8 @@ li s0, 0 mv s1, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3801 -.LBB42_3859: # %lpad79.i9222 + j .LBB42_3803 +.LBB42_3861: # %lpad79.i9222 .Ltmp3652: mv s1, s3 lui a1, 1 @@ -62788,8 +62779,8 @@ add s7, sp, a1 li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3801 -.LBB42_3860: # %lpad77.i9218 + j .LBB42_3803 +.LBB42_3862: # %lpad77.i9218 .Ltmp3649: lui a1, 1 addiw a1, a1, 504 @@ -62797,8 +62788,8 @@ li s0, 0 mv s1, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3803 -.LBB42_3861: # %lpad72.i9206 + j .LBB42_3805 +.LBB42_3863: # %lpad72.i9206 .Ltmp3646: mv s1, s3 lui a1, 1 @@ -62806,8 +62797,8 @@ add s7, sp, a1 li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3803 -.LBB42_3862: # %lpad70.i9202 + j .LBB42_3805 +.LBB42_3864: # %lpad70.i9202 .Ltmp3643: lui a1, 1 addiw a1, a1, 504 @@ -62815,8 +62806,8 @@ li s0, 0 mv s1, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3805 -.LBB42_3863: # %lpad65.i9190 + j .LBB42_3807 +.LBB42_3865: # %lpad65.i9190 .Ltmp3640: mv s1, s3 lui a1, 1 @@ -62824,8 +62815,8 @@ add s7, sp, a1 li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3805 -.LBB42_3864: # %lpad63.i9186 + j .LBB42_3807 +.LBB42_3866: # %lpad63.i9186 .Ltmp3637: lui a1, 1 addiw a1, a1, 504 @@ -62833,8 +62824,8 @@ li s0, 0 mv s1, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3807 -.LBB42_3865: # %lpad58.i9174 + j .LBB42_3809 +.LBB42_3867: # %lpad58.i9174 .Ltmp3634: mv s1, s3 lui a1, 1 @@ -62842,8 +62833,8 @@ add s7, sp, a1 li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3807 -.LBB42_3866: # %lpad56.i9170 + j .LBB42_3809 +.LBB42_3868: # %lpad56.i9170 .Ltmp3631: lui a1, 1 addiw a1, a1, 504 @@ -62851,8 +62842,8 @@ li s0, 0 mv s1, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3809 -.LBB42_3867: # %lpad51.i9158 + j .LBB42_3811 +.LBB42_3869: # %lpad51.i9158 .Ltmp3628: mv s1, s3 lui a1, 1 @@ -62860,8 +62851,8 @@ add s7, sp, a1 li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3809 -.LBB42_3868: # %lpad44.i9145 + j .LBB42_3811 +.LBB42_3870: # %lpad44.i9145 .Ltmp3625: mv s1, s2 lui a1, 1 @@ -62869,8 +62860,8 @@ add s7, sp, a1 li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3811 -.LBB42_3869: # %lpad42.i9141 + j .LBB42_3813 +.LBB42_3871: # %lpad42.i9141 .Ltmp3622: lui a1, 1 addiw a1, a1, 504 @@ -62878,8 +62869,8 @@ li s0, 0 mv s1, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3813 -.LBB42_3870: # %lpad37.i9129 + j .LBB42_3815 +.LBB42_3872: # %lpad37.i9129 .Ltmp3619: mv s1, s2 lui a1, 1 @@ -62887,8 +62878,8 @@ add s7, sp, a1 li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3813 -.LBB42_3871: # %lpad35.i9125 + j .LBB42_3815 +.LBB42_3873: # %lpad35.i9125 .Ltmp3616: lui a1, 1 addiw a1, a1, 504 @@ -62896,8 +62887,8 @@ li s0, 0 mv s1, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3815 -.LBB42_3872: # %lpad30.i9113 + j .LBB42_3817 +.LBB42_3874: # %lpad30.i9113 .Ltmp3613: mv s1, s2 lui a1, 1 @@ -62905,8 +62896,8 @@ add s7, sp, a1 li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3815 -.LBB42_3873: # %lpad28.i9109 + j .LBB42_3817 +.LBB42_3875: # %lpad28.i9109 .Ltmp3610: lui a1, 1 addiw a1, a1, 504 @@ -62914,8 +62905,8 @@ li s0, 0 mv s1, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3817 -.LBB42_3874: # %lpad23.i9097 + j .LBB42_3819 +.LBB42_3876: # %lpad23.i9097 .Ltmp3607: mv s1, s2 lui a1, 1 @@ -62923,8 +62914,8 @@ add s7, sp, a1 li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3817 -.LBB42_3875: # %lpad21.i9093 + j .LBB42_3819 +.LBB42_3877: # %lpad21.i9093 .Ltmp3604: lui a1, 1 addiw a1, a1, 504 @@ -62932,8 +62923,8 @@ li s0, 0 mv s1, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3819 -.LBB42_3876: # %lpad16.i9081 + j .LBB42_3821 +.LBB42_3878: # %lpad16.i9081 .Ltmp3601: mv s1, s2 lui a1, 1 @@ -62941,8 +62932,8 @@ add s7, sp, a1 li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3819 -.LBB42_3877: # %lpad14.i9077 + j .LBB42_3821 +.LBB42_3879: # %lpad14.i9077 .Ltmp3598: lui a1, 1 addiw a1, a1, 504 @@ -62950,28 +62941,28 @@ li s0, 0 mv s1, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3821 -.LBB42_3878: # %lpad9.i9065 + j .LBB42_3823 +.LBB42_3880: # %lpad9.i9065 .Ltmp3595: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3821 -.LBB42_3879: # %lpad7.i9061 + j .LBB42_3823 +.LBB42_3881: # %lpad7.i9061 .Ltmp3592: - j .LBB42_3881 -.LBB42_3880: # %lpad3.i9041 + j .LBB42_3883 +.LBB42_3882: # %lpad3.i9041 .Ltmp3589: -.LBB42_3881: # %ehcleanup312.i9042 +.LBB42_3883: # %ehcleanup312.i9042 lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3823 -.LBB42_3882: # %lpad25.i8795 + j .LBB42_3825 +.LBB42_3884: # %lpad25.i8795 .Ltmp3586: mv s0, a0 mv a0, s3 @@ -62984,111 +62975,111 @@ call _ZN8TestCaseD2Ev li s4, 1 sd s0, 112(sp) # 8-byte Folded Spill - j .LBB42_3884 -.LBB42_3883: # %lpad23.i8783 + j .LBB42_3886 +.LBB42_3885: # %lpad23.i8783 .Ltmp3583: li s4, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_3884: # %ehcleanup.i8784 +.LBB42_3886: # %ehcleanup.i8784 ld a0, 968(s5) lui a1, 1 addiw a1, a1, 1488 add a1, sp, a1 - beq a0, a1, .LBB42_3886 -# %bb.3885: # %if.then.i.i68.i8788 + beq a0, a1, .LBB42_3888 +# %bb.3887: # %if.then.i.i68.i8788 call _ZdlPv@plt -.LBB42_3886: # %ehcleanup36.i8768 +.LBB42_3888: # %ehcleanup36.i8768 mv s2, s3 - j .LBB42_3890 -.LBB42_3887: # %lpad21.i8779 + j .LBB42_3892 +.LBB42_3889: # %lpad21.i8779 .Ltmp3580: lui a1, 1 addiw a1, a1, 504 add s5, sp, a1 li s4, 0 mv s2, s3 - j .LBB42_3889 -.LBB42_3888: # %lpad16.i8767 + j .LBB42_3891 +.LBB42_3890: # %lpad16.i8767 .Ltmp3577: lui a1, 1 addiw a1, a1, 504 add s5, sp, a1 li s4, 0 -.LBB42_3889: # %ehcleanup36.i8768 +.LBB42_3891: # %ehcleanup36.i8768 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_3890: # %ehcleanup36.i8768 +.LBB42_3892: # %ehcleanup36.i8768 ld a0, 1000(s5) lui a1, 1 addiw a1, a1, 1520 add a1, sp, a1 - beq a0, a1, .LBB42_3892 -# %bb.3891: # %if.then.i.i74.i8773 + beq a0, a1, .LBB42_3894 +# %bb.3893: # %if.then.i.i74.i8773 call _ZdlPv@plt -.LBB42_3892: # %ehcleanup39.i8752 +.LBB42_3894: # %ehcleanup39.i8752 mv s1, s2 - j .LBB42_3896 -.LBB42_3893: # %lpad14.i8763 + j .LBB42_3898 +.LBB42_3895: # %lpad14.i8763 .Ltmp3574: lui a1, 1 addiw a1, a1, 504 add s5, sp, a1 li s4, 0 mv s1, s2 - j .LBB42_3895 -.LBB42_3894: # %lpad9.i8751 + j .LBB42_3897 +.LBB42_3896: # %lpad9.i8751 .Ltmp3571: lui a1, 1 addiw a1, a1, 504 add s5, sp, a1 li s4, 0 -.LBB42_3895: # %ehcleanup39.i8752 +.LBB42_3897: # %ehcleanup39.i8752 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_3896: # %ehcleanup39.i8752 +.LBB42_3898: # %ehcleanup39.i8752 ld a0, 1032(s5) lui a1, 1 addiw a1, a1, 1552 add a1, sp, a1 - beq a0, a1, .LBB42_3901 -# %bb.3897: # %if.then.i.i80.i8757 + beq a0, a1, .LBB42_3903 +# %bb.3899: # %if.then.i.i80.i8757 call _ZdlPv@plt - j .LBB42_3901 -.LBB42_3898: # %lpad7.i8747 + j .LBB42_3903 +.LBB42_3900: # %lpad7.i8747 .Ltmp3568: - j .LBB42_3900 -.LBB42_3899: # %lpad3.i8727 + j .LBB42_3902 +.LBB42_3901: # %lpad3.i8727 .Ltmp3565: -.LBB42_3900: # %ehcleanup42.i8728 +.LBB42_3902: # %ehcleanup42.i8728 lui a1, 1 addiw a1, a1, 504 add s5, sp, a1 li s4, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_3901: # %ehcleanup42.i8728 +.LBB42_3903: # %ehcleanup42.i8728 ld a0, 1064(s5) lui a1, 1 addiw a1, a1, 1584 add a1, sp, a1 - beq a0, a1, .LBB42_3903 -# %bb.3902: # %if.then.i.i86.i8733 + beq a0, a1, .LBB42_3905 +# %bb.3904: # %if.then.i.i86.i8733 call _ZdlPv@plt -.LBB42_3903: # %ehcleanup43.i8734 +.LBB42_3905: # %ehcleanup43.i8734 addi s0, sp, 552 xor a0, s0, s1 seqz a0, a0 or a0, s4, a0 - beqz a0, .LBB42_3904 - j .LBB42_5497 -.LBB42_3904: # %arraydestroy.body46.i8737 + beqz a0, .LBB42_3906 + j .LBB42_5499 +.LBB42_3906: # %arraydestroy.body46.i8737 # =>This Inner Loop Header: Depth=1 addi s1, s1, -88 mv a0, s1 call _ZN8TestCaseD2Ev - bne s1, s0, .LBB42_3904 - j .LBB42_5497 -.LBB42_3905: # %lpad.i8709 + bne s1, s0, .LBB42_3906 + j .LBB42_5499 +.LBB42_3907: # %lpad.i8709 .Ltmp3562: - j .LBB42_5163 -.LBB42_3906: # %lpad25.i8525 + j .LBB42_5165 +.LBB42_3908: # %lpad25.i8525 .Ltmp3559: mv s0, a0 mv a0, s3 @@ -63101,113 +63092,111 @@ call _ZN8TestCaseD2Ev li s4, 1 sd s0, 112(sp) # 8-byte Folded Spill - j .LBB42_3908 -.LBB42_3907: # %lpad23.i8513 + j .LBB42_3910 +.LBB42_3909: # %lpad23.i8513 .Ltmp3556: li s4, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_3908: # %ehcleanup.i8514 +.LBB42_3910: # %ehcleanup.i8514 ld a0, 968(s5) lui a1, 1 addiw a1, a1, 1488 add a1, sp, a1 - beq a0, a1, .LBB42_3910 -# %bb.3909: # %if.then.i.i68.i8518 + beq a0, a1, .LBB42_3912 +# %bb.3911: # %if.then.i.i68.i8518 call _ZdlPv@plt -.LBB42_3910: # %ehcleanup36.i8498 +.LBB42_3912: # %ehcleanup36.i8498 mv s2, s3 - j .LBB42_3914 -.LBB42_3911: # %lpad21.i8509 + j .LBB42_3916 +.LBB42_3913: # %lpad21.i8509 .Ltmp3553: lui a1, 1 addiw a1, a1, 504 add s5, sp, a1 li s4, 0 mv s2, s3 - j .LBB42_3913 -.LBB42_3912: # %lpad16.i8497 + j .LBB42_3915 +.LBB42_3914: # %lpad16.i8497 .Ltmp3550: lui a1, 1 addiw a1, a1, 504 add s5, sp, a1 li s4, 0 -.LBB42_3913: # %ehcleanup36.i8498 +.LBB42_3915: # %ehcleanup36.i8498 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_3914: # %ehcleanup36.i8498 +.LBB42_3916: # %ehcleanup36.i8498 ld a0, 1000(s5) lui a1, 1 addiw a1, a1, 1520 add a1, sp, a1 - beq a0, a1, .LBB42_3916 -# %bb.3915: # %if.then.i.i74.i8503 + beq a0, a1, .LBB42_3918 +# %bb.3917: # %if.then.i.i74.i8503 call _ZdlPv@plt -.LBB42_3916: # %ehcleanup39.i8482 +.LBB42_3918: # %ehcleanup39.i8482 mv s1, s2 - j .LBB42_3920 -.LBB42_3917: # %lpad14.i8493 + j .LBB42_3922 +.LBB42_3919: # %lpad14.i8493 .Ltmp3547: lui a1, 1 addiw a1, a1, 504 add s5, sp, a1 li s4, 0 mv s1, s2 - j .LBB42_3919 -.LBB42_3918: # %lpad9.i8481 + j .LBB42_3921 +.LBB42_3920: # %lpad9.i8481 .Ltmp3544: lui a1, 1 addiw a1, a1, 504 add s5, sp, a1 li s4, 0 -.LBB42_3919: # %ehcleanup39.i8482 +.LBB42_3921: # %ehcleanup39.i8482 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_3920: # %ehcleanup39.i8482 +.LBB42_3922: # %ehcleanup39.i8482 ld a0, 1032(s5) lui a1, 1 addiw a1, a1, 1552 add a1, sp, a1 - beq a0, a1, .LBB42_3925 -# %bb.3921: # %if.then.i.i80.i8487 + beq a0, a1, .LBB42_3927 +# %bb.3923: # %if.then.i.i80.i8487 call _ZdlPv@plt - j .LBB42_3925 -.LBB42_3922: # %lpad7.i8477 + j .LBB42_3927 +.LBB42_3924: # %lpad7.i8477 .Ltmp3541: - j .LBB42_3924 -.LBB42_3923: # %lpad3.i8457 + j .LBB42_3926 +.LBB42_3925: # %lpad3.i8457 .Ltmp3538: -.LBB42_3924: # %ehcleanup42.i8458 +.LBB42_3926: # %ehcleanup42.i8458 lui a1, 1 addiw a1, a1, 504 add s5, sp, a1 li s4, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_3925: # %ehcleanup42.i8458 +.LBB42_3927: # %ehcleanup42.i8458 ld a0, 1064(s5) lui a1, 1 addiw a1, a1, 1584 add a1, sp, a1 - beq a0, a1, .LBB42_3927 -# %bb.3926: # %if.then.i.i86.i8463 + beq a0, a1, .LBB42_3929 +# %bb.3928: # %if.then.i.i86.i8463 call _ZdlPv@plt -.LBB42_3927: # %ehcleanup43.i8464 +.LBB42_3929: # %ehcleanup43.i8464 addi s0, sp, 552 xor a0, s0, s1 seqz a0, a0 or a0, s4, a0 - beqz a0, .LBB42_3928 - j .LBB42_5497 -.LBB42_3928: # %arraydestroy.body46.i8467 + beqz a0, .LBB42_3930 + j .LBB42_5499 +.LBB42_3930: # %arraydestroy.body46.i8467 # =>This Inner Loop Header: Depth=1 addi s1, s1, -88 mv a0, s1 call _ZN8TestCaseD2Ev - bne s1, s0, .LBB42_3928 - j .LBB42_5497 -.LBB42_3929: # %lpad214.i + bne s1, s0, .LBB42_3930 + j .LBB42_5499 +.LBB42_3931: # %lpad214.i .Ltmp3535: mv s4, a0 - mv a0, s3 - call _ZN8TestCaseD2Ev - mv a0, s0 + mv a0, s2 call _ZN8TestCaseD2Ev mv a0, s11 call _ZN8TestCaseD2Ev @@ -63217,6 +63206,8 @@ call _ZN8TestCaseD2Ev mv a0, s8 call _ZN8TestCaseD2Ev + mv a0, s7 + call _ZN8TestCaseD2Ev mv a0, s6 call _ZN8TestCaseD2Ev mv a0, s5 @@ -63273,760 +63264,760 @@ call _ZN8TestCaseD2Ev addi a0, sp, 552 call _ZN8TestCaseD2Ev - li s2, 0 + li s3, 0 sd s4, 112(sp) # 8-byte Folded Spill - j .LBB42_3931 -.LBB42_3930: # %lpad212.i8392 + j .LBB42_3933 +.LBB42_3932: # %lpad212.i8392 .Ltmp3532: sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_3931: # %ehcleanup.i8393 - ld a0, 104(s7) +.LBB42_3933: # %ehcleanup.i8393 + ld a0, 104(s0) lui a1, 1 addiw a1, a1, 624 add a1, sp, a1 - beq a0, a1, .LBB42_3933 -# %bb.3932: # %if.then.i.i608.i + beq a0, a1, .LBB42_3935 +# %bb.3934: # %if.then.i.i608.i call _ZdlPv@plt -.LBB42_3933: # %ehcleanup225.i - mv s0, s3 - j .LBB42_3937 -.LBB42_3934: # %lpad210.i8391 +.LBB42_3935: # %ehcleanup225.i + mv s11, s2 + j .LBB42_3939 +.LBB42_3936: # %lpad210.i8391 .Ltmp3529: lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - mv s0, s3 - j .LBB42_3936 -.LBB42_3935: # %lpad205.i8385 + add s0, sp, a1 + mv s11, s2 + j .LBB42_3938 +.LBB42_3937: # %lpad205.i8385 .Ltmp3526: lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 -.LBB42_3936: # %ehcleanup225.i + add s0, sp, a1 +.LBB42_3938: # %ehcleanup225.i sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_3937: # %ehcleanup225.i - ld a0, 136(s7) +.LBB42_3939: # %ehcleanup225.i + ld a0, 136(s0) lui a1, 1 addiw a1, a1, 656 add a1, sp, a1 - beq a0, a1, .LBB42_3939 -# %bb.3938: # %if.then.i.i614.i + beq a0, a1, .LBB42_3941 +# %bb.3940: # %if.then.i.i614.i call _ZdlPv@plt -.LBB42_3939: # %ehcleanup228.i - mv s11, s0 - j .LBB42_3943 -.LBB42_3940: # %lpad203.i8384 +.LBB42_3941: # %ehcleanup228.i + mv s10, s11 + j .LBB42_3945 +.LBB42_3942: # %lpad203.i8384 .Ltmp3523: lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - mv s11, s0 - j .LBB42_3942 -.LBB42_3941: # %lpad198.i8378 + add s0, sp, a1 + mv s10, s11 + j .LBB42_3944 +.LBB42_3943: # %lpad198.i8378 .Ltmp3520: lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 -.LBB42_3942: # %ehcleanup228.i + add s0, sp, a1 +.LBB42_3944: # %ehcleanup228.i sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_3943: # %ehcleanup228.i - ld a0, 168(s7) +.LBB42_3945: # %ehcleanup228.i + ld a0, 168(s0) lui a1, 1 addiw a1, a1, 688 add a1, sp, a1 - beq a0, a1, .LBB42_3945 -# %bb.3944: # %if.then.i.i620.i + beq a0, a1, .LBB42_3947 +# %bb.3946: # %if.then.i.i620.i call _ZdlPv@plt -.LBB42_3945: # %ehcleanup231.i - mv s10, s11 -.LBB42_3946: # %ehcleanup231.i - ld a0, 200(s7) +.LBB42_3947: # %ehcleanup231.i + mv s9, s10 +.LBB42_3948: # %ehcleanup231.i + ld a0, 200(s0) lui a1, 1 addiw a1, a1, 720 add a1, sp, a1 - beq a0, a1, .LBB42_3948 -# %bb.3947: # %if.then.i.i626.i + beq a0, a1, .LBB42_3950 +# %bb.3949: # %if.then.i.i626.i call _ZdlPv@plt -.LBB42_3948: # %ehcleanup234.i - mv s9, s10 -.LBB42_3949: # %ehcleanup234.i - ld a0, 232(s7) +.LBB42_3950: # %ehcleanup234.i + mv s8, s9 +.LBB42_3951: # %ehcleanup234.i + ld a0, 232(s0) lui a1, 1 addiw a1, a1, 752 add a1, sp, a1 - beq a0, a1, .LBB42_3951 -# %bb.3950: # %if.then.i.i632.i + beq a0, a1, .LBB42_3953 +# %bb.3952: # %if.then.i.i632.i call _ZdlPv@plt -.LBB42_3951: # %ehcleanup237.i - mv s8, s9 -.LBB42_3952: # %ehcleanup237.i - ld a0, 264(s7) +.LBB42_3953: # %ehcleanup237.i + mv s7, s8 +.LBB42_3954: # %ehcleanup237.i + ld a0, 264(s0) lui a1, 1 addiw a1, a1, 784 add a1, sp, a1 - beq a0, a1, .LBB42_3954 -# %bb.3953: # %if.then.i.i638.i8359 + beq a0, a1, .LBB42_3956 +# %bb.3955: # %if.then.i.i638.i8359 call _ZdlPv@plt -.LBB42_3954: # %ehcleanup240.i - mv s6, s8 -.LBB42_3955: # %ehcleanup240.i - ld a0, 296(s7) +.LBB42_3956: # %ehcleanup240.i + mv s6, s7 +.LBB42_3957: # %ehcleanup240.i + ld a0, 296(s0) lui a1, 1 addiw a1, a1, 816 add a1, sp, a1 - beq a0, a1, .LBB42_3957 -# %bb.3956: # %if.then.i.i644.i8348 + beq a0, a1, .LBB42_3959 +# %bb.3958: # %if.then.i.i644.i8348 call _ZdlPv@plt -.LBB42_3957: # %ehcleanup243.i +.LBB42_3959: # %ehcleanup243.i mv s5, s6 -.LBB42_3958: # %ehcleanup243.i - ld a0, 328(s7) +.LBB42_3960: # %ehcleanup243.i + ld a0, 328(s0) lui a1, 1 addiw a1, a1, 848 add a1, sp, a1 - beq a0, a1, .LBB42_3960 -# %bb.3959: # %if.then.i.i650.i8337 + beq a0, a1, .LBB42_3962 +# %bb.3961: # %if.then.i.i650.i8337 call _ZdlPv@plt -.LBB42_3960: # %ehcleanup246.i +.LBB42_3962: # %ehcleanup246.i mv s1, s5 -.LBB42_3961: # %ehcleanup246.i - ld a0, 360(s7) +.LBB42_3963: # %ehcleanup246.i + ld a0, 360(s0) lui a1, 1 addiw a1, a1, 880 add a1, sp, a1 - beq a0, a1, .LBB42_3963 -# %bb.3962: # %if.then.i.i656.i8326 + beq a0, a1, .LBB42_3965 +# %bb.3964: # %if.then.i.i656.i8326 call _ZdlPv@plt -.LBB42_3963: # %ehcleanup249.i - ld a0, 392(s7) +.LBB42_3965: # %ehcleanup249.i + ld a0, 392(s0) lui a1, 1 addiw a1, a1, 912 add a1, sp, a1 - beq a0, a1, .LBB42_3965 -# %bb.3964: # %if.then.i.i662.i8316 + beq a0, a1, .LBB42_3967 +# %bb.3966: # %if.then.i.i662.i8316 call _ZdlPv@plt -.LBB42_3965: # %ehcleanup252.i - ld a0, 424(s7) +.LBB42_3967: # %ehcleanup252.i + ld a0, 424(s0) lui a1, 1 addiw a1, a1, 944 add a1, sp, a1 - beq a0, a1, .LBB42_3967 -# %bb.3966: # %if.then.i.i668.i8305 + beq a0, a1, .LBB42_3969 +# %bb.3968: # %if.then.i.i668.i8305 call _ZdlPv@plt -.LBB42_3967: # %ehcleanup255.i - ld a0, 456(s7) +.LBB42_3969: # %ehcleanup255.i + ld a0, 456(s0) lui a1, 1 addiw a1, a1, 976 add a1, sp, a1 - beq a0, a1, .LBB42_3969 -# %bb.3968: # %if.then.i.i674.i8294 + beq a0, a1, .LBB42_3971 +# %bb.3970: # %if.then.i.i674.i8294 call _ZdlPv@plt -.LBB42_3969: # %ehcleanup258.i - ld a0, 488(s7) +.LBB42_3971: # %ehcleanup258.i + ld a0, 488(s0) lui a1, 1 addiw a1, a1, 1008 add a1, sp, a1 - beq a0, a1, .LBB42_3971 -# %bb.3970: # %if.then.i.i680.i8283 + beq a0, a1, .LBB42_3973 +# %bb.3972: # %if.then.i.i680.i8283 call _ZdlPv@plt -.LBB42_3971: # %ehcleanup261.i - ld a0, 520(s7) +.LBB42_3973: # %ehcleanup261.i + ld a0, 520(s0) lui a1, 1 addiw a1, a1, 1040 add a1, sp, a1 - beq a0, a1, .LBB42_3973 -# %bb.3972: # %if.then.i.i686.i8272 + beq a0, a1, .LBB42_3975 +# %bb.3974: # %if.then.i.i686.i8272 call _ZdlPv@plt -.LBB42_3973: # %ehcleanup264.i - ld a0, 552(s7) +.LBB42_3975: # %ehcleanup264.i + ld a0, 552(s0) lui a1, 1 addiw a1, a1, 1072 add a1, sp, a1 - beq a0, a1, .LBB42_3975 -# %bb.3974: # %if.then.i.i692.i8262 + beq a0, a1, .LBB42_3977 +# %bb.3976: # %if.then.i.i692.i8262 call _ZdlPv@plt -.LBB42_3975: # %ehcleanup267.i - ld a0, 584(s7) +.LBB42_3977: # %ehcleanup267.i + ld a0, 584(s0) lui a1, 1 addiw a1, a1, 1104 add a1, sp, a1 - beq a0, a1, .LBB42_3977 -# %bb.3976: # %if.then.i.i698.i8251 + beq a0, a1, .LBB42_3979 +# %bb.3978: # %if.then.i.i698.i8251 call _ZdlPv@plt -.LBB42_3977: # %ehcleanup270.i - ld a0, 616(s7) +.LBB42_3979: # %ehcleanup270.i + ld a0, 616(s0) lui a1, 1 addiw a1, a1, 1136 add a1, sp, a1 - beq a0, a1, .LBB42_3979 -# %bb.3978: # %if.then.i.i704.i8240 + beq a0, a1, .LBB42_3981 +# %bb.3980: # %if.then.i.i704.i8240 call _ZdlPv@plt -.LBB42_3979: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit708.i8241 - xori s0, s2, 1 -.LBB42_3980: # %ehcleanup273.i - ld a0, 648(s7) +.LBB42_3981: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit708.i8241 + xori s3, s3, 1 +.LBB42_3982: # %ehcleanup273.i + ld a0, 648(s0) lui a1, 1 addiw a1, a1, 1168 add a1, sp, a1 - beq a0, a1, .LBB42_3982 -# %bb.3981: # %if.then.i.i710.i8229 + beq a0, a1, .LBB42_3984 +# %bb.3983: # %if.then.i.i710.i8229 call _ZdlPv@plt -.LBB42_3982: # %ehcleanup276.i - ld a0, 680(s7) +.LBB42_3984: # %ehcleanup276.i + ld a0, 680(s0) lui a1, 1 addiw a1, a1, 1200 add a1, sp, a1 - beq a0, a1, .LBB42_3984 -# %bb.3983: # %if.then.i.i716.i8218 + beq a0, a1, .LBB42_3986 +# %bb.3985: # %if.then.i.i716.i8218 call _ZdlPv@plt -.LBB42_3984: # %ehcleanup279.i - ld a0, 712(s7) +.LBB42_3986: # %ehcleanup279.i + ld a0, 712(s0) lui a1, 1 addiw a1, a1, 1232 add a1, sp, a1 - beq a0, a1, .LBB42_3986 -# %bb.3985: # %if.then.i.i722.i8207 + beq a0, a1, .LBB42_3988 +# %bb.3987: # %if.then.i.i722.i8207 call _ZdlPv@plt -.LBB42_3986: # %ehcleanup282.i - ld a0, 744(s7) +.LBB42_3988: # %ehcleanup282.i + ld a0, 744(s0) lui a1, 1 addiw a1, a1, 1264 add a1, sp, a1 - beq a0, a1, .LBB42_3988 -# %bb.3987: # %if.then.i.i728.i8196 + beq a0, a1, .LBB42_3990 +# %bb.3989: # %if.then.i.i728.i8196 call _ZdlPv@plt -.LBB42_3988: # %ehcleanup285.i - ld a0, 776(s7) +.LBB42_3990: # %ehcleanup285.i + ld a0, 776(s0) lui a1, 1 addiw a1, a1, 1296 add a1, sp, a1 - beq a0, a1, .LBB42_3990 -# %bb.3989: # %if.then.i.i734.i8185 + beq a0, a1, .LBB42_3992 +# %bb.3991: # %if.then.i.i734.i8185 call _ZdlPv@plt -.LBB42_3990: # %ehcleanup288.i - ld a0, 808(s7) +.LBB42_3992: # %ehcleanup288.i + ld a0, 808(s0) lui a1, 1 addiw a1, a1, 1328 add a1, sp, a1 - beq a0, a1, .LBB42_3992 -# %bb.3991: # %if.then.i.i740.i8172 + beq a0, a1, .LBB42_3994 +# %bb.3993: # %if.then.i.i740.i8172 call _ZdlPv@plt -.LBB42_3992: # %ehcleanup291.i - ld a0, 840(s7) +.LBB42_3994: # %ehcleanup291.i + ld a0, 840(s0) lui a1, 1 addiw a1, a1, 1360 add a1, sp, a1 - beq a0, a1, .LBB42_3994 -# %bb.3993: # %if.then.i.i746.i8157 + beq a0, a1, .LBB42_3996 +# %bb.3995: # %if.then.i.i746.i8157 call _ZdlPv@plt -.LBB42_3994: # %ehcleanup294.i - ld a0, 872(s7) +.LBB42_3996: # %ehcleanup294.i + ld a0, 872(s0) lui a1, 1 addiw a1, a1, 1392 add a1, sp, a1 - beq a0, a1, .LBB42_3996 -# %bb.3995: # %if.then.i.i752.i8145 + beq a0, a1, .LBB42_3998 +# %bb.3997: # %if.then.i.i752.i8145 call _ZdlPv@plt -.LBB42_3996: # %ehcleanup297.i - ld a0, 904(s7) +.LBB42_3998: # %ehcleanup297.i + ld a0, 904(s0) lui a1, 1 addiw a1, a1, 1424 add a1, sp, a1 - beq a0, a1, .LBB42_3998 -# %bb.3997: # %if.then.i.i758.i8130 + beq a0, a1, .LBB42_4000 +# %bb.3999: # %if.then.i.i758.i8130 call _ZdlPv@plt -.LBB42_3998: # %ehcleanup300.i - ld a0, 936(s7) +.LBB42_4000: # %ehcleanup300.i + ld a0, 936(s0) lui a1, 1 addiw a1, a1, 1456 add a1, sp, a1 - beq a0, a1, .LBB42_4000 -# %bb.3999: # %if.then.i.i764.i8115 + beq a0, a1, .LBB42_4002 +# %bb.4001: # %if.then.i.i764.i8115 call _ZdlPv@plt -.LBB42_4000: # %ehcleanup303.i - ld a0, 968(s7) +.LBB42_4002: # %ehcleanup303.i + ld a0, 968(s0) lui a1, 1 addiw a1, a1, 1488 add a1, sp, a1 - beq a0, a1, .LBB42_4002 -# %bb.4001: # %if.then.i.i770.i8102 + beq a0, a1, .LBB42_4004 +# %bb.4003: # %if.then.i.i770.i8102 call _ZdlPv@plt -.LBB42_4002: # %ehcleanup306.i - ld a0, 1000(s7) +.LBB42_4004: # %ehcleanup306.i + ld a0, 1000(s0) lui a1, 1 addiw a1, a1, 1520 add a1, sp, a1 - beq a0, a1, .LBB42_4004 -# %bb.4003: # %if.then.i.i776.i8087 + beq a0, a1, .LBB42_4006 +# %bb.4005: # %if.then.i.i776.i8087 call _ZdlPv@plt -.LBB42_4004: # %ehcleanup309.i - ld a0, 1032(s7) +.LBB42_4006: # %ehcleanup309.i + ld a0, 1032(s0) lui a1, 1 addiw a1, a1, 1552 add a1, sp, a1 - beq a0, a1, .LBB42_4006 -# %bb.4005: # %if.then.i.i782.i8072 + beq a0, a1, .LBB42_4008 +# %bb.4007: # %if.then.i.i782.i8072 call _ZdlPv@plt -.LBB42_4006: # %ehcleanup312.i - ld a0, 1064(s7) +.LBB42_4008: # %ehcleanup312.i + ld a0, 1064(s0) lui a1, 1 addiw a1, a1, 1584 add a1, sp, a1 - beq a0, a1, .LBB42_4008 -# %bb.4007: # %if.then.i.i788.i8054 + beq a0, a1, .LBB42_4010 +# %bb.4009: # %if.then.i.i788.i8054 call _ZdlPv@plt -.LBB42_4008: # %ehcleanup313.i +.LBB42_4010: # %ehcleanup313.i addi s2, sp, 552 xor a0, s2, s1 seqz a0, a0 - or a0, s0, a0 - beqz a0, .LBB42_4009 - j .LBB42_5497 -.LBB42_4009: # %arraydestroy.body316.i + or a0, s3, a0 + beqz a0, .LBB42_4011 + j .LBB42_5499 +.LBB42_4011: # %arraydestroy.body316.i # =>This Inner Loop Header: Depth=1 addi s1, s1, -88 mv a0, s1 call _ZN8TestCaseD2Ev - bne s1, s2, .LBB42_4009 - j .LBB42_5497 -.LBB42_4010: # %lpad196.i8377 + bne s1, s2, .LBB42_4011 + j .LBB42_5499 +.LBB42_4012: # %lpad196.i8377 .Ltmp3517: lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - mv s10, s11 + add s0, sp, a1 + mv s9, s10 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3946 -.LBB42_4011: # %lpad191.i8371 + j .LBB42_3948 +.LBB42_4013: # %lpad191.i8371 .Ltmp3514: lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 + add s0, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3946 -.LBB42_4012: # %lpad184.i8365 + j .LBB42_3948 +.LBB42_4014: # %lpad184.i8365 .Ltmp3511: lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 + add s0, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3949 -.LBB42_4013: # %lpad182.i8364 + j .LBB42_3951 +.LBB42_4015: # %lpad182.i8364 .Ltmp3508: lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - mv s8, s9 + add s0, sp, a1 + mv s7, s8 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3952 -.LBB42_4014: # %lpad177.i8354 + j .LBB42_3954 +.LBB42_4016: # %lpad177.i8354 .Ltmp3505: lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 + add s0, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3952 -.LBB42_4015: # %lpad175.i8353 + j .LBB42_3954 +.LBB42_4017: # %lpad175.i8353 .Ltmp3502: lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - mv s6, s8 + add s0, sp, a1 + mv s6, s7 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3955 -.LBB42_4016: # %lpad170.i8343 + j .LBB42_3957 +.LBB42_4018: # %lpad170.i8343 .Ltmp3499: lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 + add s0, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3955 -.LBB42_4017: # %lpad168.i8342 + j .LBB42_3957 +.LBB42_4019: # %lpad168.i8342 .Ltmp3496: lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 + add s0, sp, a1 mv s5, s6 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3958 -.LBB42_4018: # %lpad163.i8332 + j .LBB42_3960 +.LBB42_4020: # %lpad163.i8332 .Ltmp3493: lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 + add s0, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3958 -.LBB42_4019: # %lpad161.i8331 + j .LBB42_3960 +.LBB42_4021: # %lpad161.i8331 .Ltmp3490: lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 + add s0, sp, a1 mv s1, s5 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3961 -.LBB42_4020: # %lpad156.i8321 + j .LBB42_3963 +.LBB42_4022: # %lpad156.i8321 .Ltmp3487: - mv s1, s3 + mv s1, s2 lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 + add s0, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3961 -.LBB42_4021: # %lpad154.i + j .LBB42_3963 +.LBB42_4023: # %lpad154.i .Ltmp3484: lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - li s2, 1 - mv s1, s3 + add s0, sp, a1 + li s3, 1 + mv s1, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3963 -.LBB42_4022: # %lpad149.i8311 + j .LBB42_3965 +.LBB42_4024: # %lpad149.i8311 .Ltmp3481: - mv s1, s3 + mv s1, s2 lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - li s2, 1 + add s0, sp, a1 + li s3, 1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3963 -.LBB42_4023: # %lpad147.i8310 + j .LBB42_3965 +.LBB42_4025: # %lpad147.i8310 .Ltmp3478: lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - mv s1, s3 + add s0, sp, a1 + mv s1, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3965 -.LBB42_4024: # %lpad142.i8300 + j .LBB42_3967 +.LBB42_4026: # %lpad142.i8300 .Ltmp3475: - mv s1, s3 + mv s1, s2 lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 + add s0, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3965 -.LBB42_4025: # %lpad140.i8299 + j .LBB42_3967 +.LBB42_4027: # %lpad140.i8299 .Ltmp3472: lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - mv s1, s3 + add s0, sp, a1 + mv s1, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3967 -.LBB42_4026: # %lpad135.i8289 + j .LBB42_3969 +.LBB42_4028: # %lpad135.i8289 .Ltmp3469: - mv s1, s3 + mv s1, s2 lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 + add s0, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3967 -.LBB42_4027: # %lpad133.i8288 + j .LBB42_3969 +.LBB42_4029: # %lpad133.i8288 .Ltmp3466: lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - mv s1, s3 + add s0, sp, a1 + mv s1, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3969 -.LBB42_4028: # %lpad128.i8278 + j .LBB42_3971 +.LBB42_4030: # %lpad128.i8278 .Ltmp3463: - mv s1, s3 + mv s1, s2 lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 + add s0, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3969 -.LBB42_4029: # %lpad126.i8277 + j .LBB42_3971 +.LBB42_4031: # %lpad126.i8277 .Ltmp3460: lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - mv s1, s3 + add s0, sp, a1 + mv s1, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3971 -.LBB42_4030: # %lpad121.i8267 + j .LBB42_3973 +.LBB42_4032: # %lpad121.i8267 .Ltmp3457: - mv s1, s3 + mv s1, s5 lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 + add s0, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3971 -.LBB42_4031: # %lpad114.i8257 + j .LBB42_3973 +.LBB42_4033: # %lpad114.i8257 .Ltmp3454: - mv s1, s3 + mv s1, s2 lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 + add s0, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3973 -.LBB42_4032: # %lpad112.i8256 + j .LBB42_3975 +.LBB42_4034: # %lpad112.i8256 .Ltmp3451: lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - mv s1, s3 + add s0, sp, a1 + mv s1, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3975 -.LBB42_4033: # %lpad107.i8246 + j .LBB42_3977 +.LBB42_4035: # %lpad107.i8246 .Ltmp3448: - mv s1, s3 + mv s1, s2 lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 + add s0, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3975 -.LBB42_4034: # %lpad105.i + j .LBB42_3977 +.LBB42_4036: # %lpad105.i .Ltmp3445: - j .LBB42_4036 -.LBB42_4035: # %lpad100.i8235 + j .LBB42_4038 +.LBB42_4037: # %lpad100.i8235 .Ltmp3442: -.LBB42_4036: # %ehcleanup270.i +.LBB42_4038: # %ehcleanup270.i lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - mv s1, s3 + add s0, sp, a1 + mv s1, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3977 -.LBB42_4037: # %lpad98.i8234 + j .LBB42_3979 +.LBB42_4039: # %lpad98.i8234 .Ltmp3439: lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - li s0, 0 - mv s1, s3 + add s0, sp, a1 + li s3, 0 + mv s1, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3980 -.LBB42_4038: # %lpad93.i8224 + j .LBB42_3982 +.LBB42_4040: # %lpad93.i8224 .Ltmp3436: - mv s1, s3 + mv s1, s5 lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - li s0, 0 + add s0, sp, a1 + li s3, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3980 -.LBB42_4039: # %lpad91.i8223 + j .LBB42_3982 +.LBB42_4041: # %lpad91.i8223 .Ltmp3433: lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - li s0, 0 - mv s1, s3 + add s0, sp, a1 + li s3, 0 + mv s1, s5 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3982 -.LBB42_4040: # %lpad86.i8213 + j .LBB42_3984 +.LBB42_4042: # %lpad86.i8213 .Ltmp3430: - mv s1, s3 + mv s1, s5 lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - li s0, 0 + add s0, sp, a1 + li s3, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3982 -.LBB42_4041: # %lpad84.i8212 + j .LBB42_3984 +.LBB42_4043: # %lpad84.i8212 .Ltmp3427: lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - li s0, 0 - mv s1, s3 + add s0, sp, a1 + li s3, 0 + mv s1, s5 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3984 -.LBB42_4042: # %lpad79.i8202 + j .LBB42_3986 +.LBB42_4044: # %lpad79.i8202 .Ltmp3424: - mv s1, s3 + mv s1, s5 lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - li s0, 0 + add s0, sp, a1 + li s3, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3984 -.LBB42_4043: # %lpad77.i8201 + j .LBB42_3986 +.LBB42_4045: # %lpad77.i8201 .Ltmp3421: lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - li s0, 0 - mv s1, s3 + add s0, sp, a1 + li s3, 0 + mv s1, s5 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3986 -.LBB42_4044: # %lpad72.i8191 + j .LBB42_3988 +.LBB42_4046: # %lpad72.i8191 .Ltmp3418: - mv s1, s3 + mv s1, s5 lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - li s0, 0 + add s0, sp, a1 + li s3, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3986 -.LBB42_4045: # %lpad70.i8190 + j .LBB42_3988 +.LBB42_4047: # %lpad70.i8190 .Ltmp3415: lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - li s0, 0 - mv s1, s3 + add s0, sp, a1 + li s3, 0 + mv s1, s5 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3988 -.LBB42_4046: # %lpad65.i8180 + j .LBB42_3990 +.LBB42_4048: # %lpad65.i8180 .Ltmp3412: - mv s1, s3 + mv s1, s5 lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - li s0, 0 + add s0, sp, a1 + li s3, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3988 -.LBB42_4047: # %lpad63.i8177 + j .LBB42_3990 +.LBB42_4049: # %lpad63.i8177 .Ltmp3409: lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - li s0, 0 - mv s1, s3 + add s0, sp, a1 + li s3, 0 + mv s1, s5 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3990 -.LBB42_4048: # %lpad58.i8167 + j .LBB42_3992 +.LBB42_4050: # %lpad58.i8167 .Ltmp3406: - mv s1, s3 + mv s1, s5 lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - li s0, 0 + add s0, sp, a1 + li s3, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3990 -.LBB42_4049: # %lpad56.i8163 + j .LBB42_3992 +.LBB42_4051: # %lpad56.i8163 .Ltmp3403: lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - li s0, 0 - mv s1, s3 + add s0, sp, a1 + li s3, 0 + mv s1, s5 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3992 -.LBB42_4050: # %lpad51.i8152 + j .LBB42_3994 +.LBB42_4052: # %lpad51.i8152 .Ltmp3400: mv s1, s3 lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - li s0, 0 + add s0, sp, a1 + li s3, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3992 -.LBB42_4051: # %lpad44.i8140 + j .LBB42_3994 +.LBB42_4053: # %lpad44.i8140 .Ltmp3397: mv s1, s2 lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - li s0, 0 + add s0, sp, a1 + li s3, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3994 -.LBB42_4052: # %lpad42.i8136 + j .LBB42_3996 +.LBB42_4054: # %lpad42.i8136 .Ltmp3394: lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - li s0, 0 + add s0, sp, a1 + li s3, 0 mv s1, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3996 -.LBB42_4053: # %lpad37.i8125 + j .LBB42_3998 +.LBB42_4055: # %lpad37.i8125 .Ltmp3391: mv s1, s2 lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - li s0, 0 + add s0, sp, a1 + li s3, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3996 -.LBB42_4054: # %lpad35.i8121 + j .LBB42_3998 +.LBB42_4056: # %lpad35.i8121 .Ltmp3388: lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - li s0, 0 + add s0, sp, a1 + li s3, 0 mv s1, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3998 -.LBB42_4055: # %lpad30.i8110 + j .LBB42_4000 +.LBB42_4057: # %lpad30.i8110 .Ltmp3385: mv s1, s2 lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - li s0, 0 + add s0, sp, a1 + li s3, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_3998 -.LBB42_4056: # %lpad28.i8107 + j .LBB42_4000 +.LBB42_4058: # %lpad28.i8107 .Ltmp3382: lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - li s0, 0 + add s0, sp, a1 + li s3, 0 mv s1, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4000 -.LBB42_4057: # %lpad23.i8097 + j .LBB42_4002 +.LBB42_4059: # %lpad23.i8097 .Ltmp3379: mv s1, s2 lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - li s0, 0 + add s0, sp, a1 + li s3, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4000 -.LBB42_4058: # %lpad21.i8093 + j .LBB42_4002 +.LBB42_4060: # %lpad21.i8093 .Ltmp3376: lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - li s0, 0 + add s0, sp, a1 + li s3, 0 mv s1, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4002 -.LBB42_4059: # %lpad16.i8082 + j .LBB42_4004 +.LBB42_4061: # %lpad16.i8082 .Ltmp3373: mv s1, s2 lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - li s0, 0 + add s0, sp, a1 + li s3, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4002 -.LBB42_4060: # %lpad14.i8078 + j .LBB42_4004 +.LBB42_4062: # %lpad14.i8078 .Ltmp3370: lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - li s0, 0 + add s0, sp, a1 + li s3, 0 mv s1, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4004 -.LBB42_4061: # %lpad9.i8067 + j .LBB42_4006 +.LBB42_4063: # %lpad9.i8067 .Ltmp3367: lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - li s0, 0 + add s0, sp, a1 + li s3, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4004 -.LBB42_4062: # %lpad7.i8063 + j .LBB42_4006 +.LBB42_4064: # %lpad7.i8063 .Ltmp3364: - j .LBB42_4064 -.LBB42_4063: # %lpad3.i8049 + j .LBB42_4066 +.LBB42_4065: # %lpad3.i8049 .Ltmp3361: -.LBB42_4064: # %ehcleanup312.i +.LBB42_4066: # %ehcleanup312.i lui a1, 1 addiw a1, a1, 504 - add s7, sp, a1 - li s0, 0 + add s0, sp, a1 + li s3, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4006 -.LBB42_4065: # %lpad25.i + j .LBB42_4008 +.LBB42_4067: # %lpad25.i .Ltmp3358: mv s0, a0 mv a0, s3 @@ -64039,117 +64030,117 @@ call _ZN8TestCaseD2Ev li s4, 1 sd s0, 112(sp) # 8-byte Folded Spill - j .LBB42_4067 -.LBB42_4066: # %lpad23.i7842 + j .LBB42_4069 +.LBB42_4068: # %lpad23.i7842 .Ltmp3355: li s4, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4067: # %ehcleanup.i7843 +.LBB42_4069: # %ehcleanup.i7843 ld a0, 968(s5) lui a1, 1 addiw a1, a1, 1488 add a1, sp, a1 - beq a0, a1, .LBB42_4069 -# %bb.4068: # %if.then.i.i68.i + beq a0, a1, .LBB42_4071 +# %bb.4070: # %if.then.i.i68.i call _ZdlPv@plt -.LBB42_4069: # %ehcleanup36.i +.LBB42_4071: # %ehcleanup36.i mv s2, s3 - j .LBB42_4073 -.LBB42_4070: # %lpad21.i7838 + j .LBB42_4075 +.LBB42_4072: # %lpad21.i7838 .Ltmp3352: lui a1, 1 addiw a1, a1, 504 add s5, sp, a1 li s4, 0 mv s2, s3 - j .LBB42_4072 -.LBB42_4071: # %lpad16.i7831 + j .LBB42_4074 +.LBB42_4073: # %lpad16.i7831 .Ltmp3349: lui a1, 1 addiw a1, a1, 504 add s5, sp, a1 li s4, 0 -.LBB42_4072: # %ehcleanup36.i +.LBB42_4074: # %ehcleanup36.i sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4073: # %ehcleanup36.i +.LBB42_4075: # %ehcleanup36.i ld a0, 1000(s5) lui a1, 1 addiw a1, a1, 1520 add a1, sp, a1 - beq a0, a1, .LBB42_4075 -# %bb.4074: # %if.then.i.i74.i + beq a0, a1, .LBB42_4077 +# %bb.4076: # %if.then.i.i74.i call _ZdlPv@plt -.LBB42_4075: # %ehcleanup39.i +.LBB42_4077: # %ehcleanup39.i mv s1, s2 - j .LBB42_4079 -.LBB42_4076: # %lpad14.i7827 + j .LBB42_4081 +.LBB42_4078: # %lpad14.i7827 .Ltmp3346: lui a1, 1 addiw a1, a1, 504 add s5, sp, a1 li s4, 0 mv s1, s2 - j .LBB42_4078 -.LBB42_4077: # %lpad9.i7820 + j .LBB42_4080 +.LBB42_4079: # %lpad9.i7820 .Ltmp3343: lui a1, 1 addiw a1, a1, 504 add s5, sp, a1 li s4, 0 -.LBB42_4078: # %ehcleanup39.i +.LBB42_4080: # %ehcleanup39.i sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4079: # %ehcleanup39.i +.LBB42_4081: # %ehcleanup39.i ld a0, 1032(s5) lui a1, 1 addiw a1, a1, 1552 add a1, sp, a1 - beq a0, a1, .LBB42_4084 -# %bb.4080: # %if.then.i.i80.i + beq a0, a1, .LBB42_4086 +# %bb.4082: # %if.then.i.i80.i call _ZdlPv@plt - j .LBB42_4084 -.LBB42_4081: # %lpad7.i7819 + j .LBB42_4086 +.LBB42_4083: # %lpad7.i7819 .Ltmp3340: - j .LBB42_4083 -.LBB42_4082: # %lpad3.i7809 + j .LBB42_4085 +.LBB42_4084: # %lpad3.i7809 .Ltmp3337: -.LBB42_4083: # %ehcleanup42.i +.LBB42_4085: # %ehcleanup42.i lui a1, 1 addiw a1, a1, 504 add s5, sp, a1 li s4, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4084: # %ehcleanup42.i +.LBB42_4086: # %ehcleanup42.i ld a0, 1064(s5) lui a1, 1 addiw a1, a1, 1584 add a1, sp, a1 - beq a0, a1, .LBB42_4086 -# %bb.4085: # %if.then.i.i86.i + beq a0, a1, .LBB42_4088 +# %bb.4087: # %if.then.i.i86.i call _ZdlPv@plt -.LBB42_4086: # %ehcleanup43.i7813 +.LBB42_4088: # %ehcleanup43.i7813 addi s0, sp, 552 xor a0, s0, s1 seqz a0, a0 or a0, s4, a0 - beqz a0, .LBB42_4087 - j .LBB42_5497 -.LBB42_4087: # %arraydestroy.body46.i + beqz a0, .LBB42_4089 + j .LBB42_5499 +.LBB42_4089: # %arraydestroy.body46.i # =>This Inner Loop Header: Depth=1 addi s1, s1, -88 mv a0, s1 call _ZN8TestCaseD2Ev - bne s1, s0, .LBB42_4087 - j .LBB42_5497 -.LBB42_4088: # %lpad.i7793 + bne s1, s0, .LBB42_4089 + j .LBB42_5499 +.LBB42_4090: # %lpad.i7793 .Ltmp3334: - j .LBB42_5163 -.LBB42_4089: # %lpad5.i7746 -.Ltmp3331: j .LBB42_5165 -.LBB42_4090: # %lpad3.i7734 +.LBB42_4091: # %lpad5.i7746 +.Ltmp3331: + j .LBB42_5167 +.LBB42_4092: # %lpad3.i7734 .Ltmp3328: - j .LBB42_5374 -.LBB42_4091: # %lpad53.i7636 + j .LBB42_5376 +.LBB42_4093: # %lpad53.i7636 .Ltmp3325: mv s5, a0 mv a0, s7 @@ -64170,106 +64161,106 @@ call _ZN8TestCaseD2Ev li s8, 1 sd s5, 112(sp) # 8-byte Folded Spill - j .LBB42_4093 -.LBB42_4092: # %lpad51.i7624 + j .LBB42_4095 +.LBB42_4094: # %lpad51.i7624 .Ltmp3322: li s8, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4093: # %ehcleanup.i7625 +.LBB42_4095: # %ehcleanup.i7625 ld a0, 840(s9) lui a1, 1 addiw a1, a1, 1360 add a1, sp, a1 - beq a0, a1, .LBB42_4095 -# %bb.4094: # %if.then.i.i148.i7629 + beq a0, a1, .LBB42_4097 +# %bb.4096: # %if.then.i.i148.i7629 call _ZdlPv@plt -.LBB42_4095: # %ehcleanup64.i7612 +.LBB42_4097: # %ehcleanup64.i7612 mv s6, s7 - j .LBB42_4097 -.LBB42_4096: # %lpad44.i7611 + j .LBB42_4099 +.LBB42_4098: # %lpad44.i7611 .Ltmp3319: lui a1, 1 addiw a1, a1, 504 add s9, sp, a1 li s8, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4097: # %ehcleanup64.i7612 +.LBB42_4099: # %ehcleanup64.i7612 ld a0, 872(s9) lui a1, 1 addiw a1, a1, 1392 add a1, sp, a1 - beq a0, a1, .LBB42_4099 -# %bb.4098: # %if.then.i.i154.i7617 + beq a0, a1, .LBB42_4101 +# %bb.4100: # %if.then.i.i154.i7617 call _ZdlPv@plt -.LBB42_4099: # %ehcleanup67.i7596 +.LBB42_4101: # %ehcleanup67.i7596 mv s4, s6 - j .LBB42_4103 -.LBB42_4100: # %lpad42.i7607 + j .LBB42_4105 +.LBB42_4102: # %lpad42.i7607 .Ltmp3316: lui a1, 1 addiw a1, a1, 504 add s9, sp, a1 li s8, 0 mv s4, s6 - j .LBB42_4102 -.LBB42_4101: # %lpad37.i7595 + j .LBB42_4104 +.LBB42_4103: # %lpad37.i7595 .Ltmp3313: lui a1, 1 addiw a1, a1, 504 add s9, sp, a1 li s8, 0 -.LBB42_4102: # %ehcleanup67.i7596 +.LBB42_4104: # %ehcleanup67.i7596 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4103: # %ehcleanup67.i7596 +.LBB42_4105: # %ehcleanup67.i7596 ld a0, 904(s9) lui a1, 1 addiw a1, a1, 1424 add a1, sp, a1 - beq a0, a1, .LBB42_4105 -# %bb.4104: # %if.then.i.i160.i7601 + beq a0, a1, .LBB42_4107 +# %bb.4106: # %if.then.i.i160.i7601 call _ZdlPv@plt -.LBB42_4105: # %ehcleanup70.i7580 +.LBB42_4107: # %ehcleanup70.i7580 mv s3, s4 -.LBB42_4106: # %ehcleanup70.i7580 +.LBB42_4108: # %ehcleanup70.i7580 ld a0, 936(s9) lui a1, 1 addiw a1, a1, 1456 add a1, sp, a1 - beq a0, a1, .LBB42_4108 -# %bb.4107: # %if.then.i.i166.i7585 + beq a0, a1, .LBB42_4110 +# %bb.4109: # %if.then.i.i166.i7585 call _ZdlPv@plt -.LBB42_4108: # %ehcleanup73.i7564 +.LBB42_4110: # %ehcleanup73.i7564 mv s2, s3 -.LBB42_4109: # %ehcleanup73.i7564 +.LBB42_4111: # %ehcleanup73.i7564 ld a0, 968(s9) lui a1, 1 addiw a1, a1, 1488 add a1, sp, a1 - beq a0, a1, .LBB42_4111 -# %bb.4110: # %if.then.i.i172.i7569 + beq a0, a1, .LBB42_4113 +# %bb.4112: # %if.then.i.i172.i7569 call _ZdlPv@plt -.LBB42_4111: # %ehcleanup76.i7548 +.LBB42_4113: # %ehcleanup76.i7548 mv s1, s2 -.LBB42_4112: # %ehcleanup76.i7548 +.LBB42_4114: # %ehcleanup76.i7548 ld a0, 1000(s9) lui a1, 1 addiw a1, a1, 1520 add a1, sp, a1 - beq a0, a1, .LBB42_4114 -# %bb.4113: # %if.then.i.i178.i7553 + beq a0, a1, .LBB42_4116 +# %bb.4115: # %if.then.i.i178.i7553 call _ZdlPv@plt -.LBB42_4114: # %ehcleanup79.i7532 +.LBB42_4116: # %ehcleanup79.i7532 mv s0, s1 -.LBB42_4115: # %ehcleanup79.i7532 +.LBB42_4117: # %ehcleanup79.i7532 ld a0, 1032(s9) lui a1, 1 addiw a1, a1, 1552 add a1, sp, a1 - beq a0, a1, .LBB42_4128 -# %bb.4116: # %if.then.i.i184.i7537 + beq a0, a1, .LBB42_4130 +# %bb.4118: # %if.then.i.i184.i7537 call _ZdlPv@plt - j .LBB42_4128 -.LBB42_4117: # %lpad35.i7591 + j .LBB42_4130 +.LBB42_4119: # %lpad35.i7591 .Ltmp3310: lui a1, 1 addiw a1, a1, 504 @@ -64277,16 +64268,16 @@ li s8, 0 mv s3, s4 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4106 -.LBB42_4118: # %lpad30.i7579 + j .LBB42_4108 +.LBB42_4120: # %lpad30.i7579 .Ltmp3307: lui a1, 1 addiw a1, a1, 504 add s9, sp, a1 li s8, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4106 -.LBB42_4119: # %lpad28.i7575 + j .LBB42_4108 +.LBB42_4121: # %lpad28.i7575 .Ltmp3304: lui a1, 1 addiw a1, a1, 504 @@ -64294,16 +64285,16 @@ li s8, 0 mv s2, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4109 -.LBB42_4120: # %lpad23.i7563 + j .LBB42_4111 +.LBB42_4122: # %lpad23.i7563 .Ltmp3301: lui a1, 1 addiw a1, a1, 504 add s9, sp, a1 li s8, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4109 -.LBB42_4121: # %lpad21.i7559 + j .LBB42_4111 +.LBB42_4123: # %lpad21.i7559 .Ltmp3298: lui a1, 1 addiw a1, a1, 504 @@ -64311,16 +64302,16 @@ li s8, 0 mv s1, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4112 -.LBB42_4122: # %lpad16.i7547 + j .LBB42_4114 +.LBB42_4124: # %lpad16.i7547 .Ltmp3295: lui a1, 1 addiw a1, a1, 504 add s9, sp, a1 li s8, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4112 -.LBB42_4123: # %lpad14.i7543 + j .LBB42_4114 +.LBB42_4125: # %lpad14.i7543 .Ltmp3292: lui a1, 1 addiw a1, a1, 504 @@ -64328,58 +64319,58 @@ li s8, 0 mv s0, s1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4115 -.LBB42_4124: # %lpad9.i7531 + j .LBB42_4117 +.LBB42_4126: # %lpad9.i7531 .Ltmp3289: lui a1, 1 addiw a1, a1, 504 add s9, sp, a1 li s8, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4115 -.LBB42_4125: # %lpad7.i7527 + j .LBB42_4117 +.LBB42_4127: # %lpad7.i7527 .Ltmp3286: - j .LBB42_4127 -.LBB42_4126: # %lpad3.i7507 + j .LBB42_4129 +.LBB42_4128: # %lpad3.i7507 .Ltmp3283: -.LBB42_4127: # %ehcleanup82.i7508 +.LBB42_4129: # %ehcleanup82.i7508 lui a1, 1 addiw a1, a1, 504 add s9, sp, a1 li s8, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4128: # %ehcleanup82.i7508 +.LBB42_4130: # %ehcleanup82.i7508 ld a0, 1064(s9) lui a1, 1 addiw a1, a1, 1584 add a1, sp, a1 - beq a0, a1, .LBB42_4130 -# %bb.4129: # %if.then.i.i190.i7513 + beq a0, a1, .LBB42_4132 +# %bb.4131: # %if.then.i.i190.i7513 call _ZdlPv@plt -.LBB42_4130: # %ehcleanup83.i7514 +.LBB42_4132: # %ehcleanup83.i7514 addi s1, sp, 552 xor a0, s1, s0 seqz a0, a0 or a0, s8, a0 - beqz a0, .LBB42_4131 - j .LBB42_5497 -.LBB42_4131: # %arraydestroy.body86.i7517 + beqz a0, .LBB42_4133 + j .LBB42_5499 +.LBB42_4133: # %arraydestroy.body86.i7517 # =>This Inner Loop Header: Depth=1 addi s0, s0, -88 mv a0, s0 call _ZN8TestCaseD2Ev - bne s0, s1, .LBB42_4131 - j .LBB42_5497 -.LBB42_4132: # %lpad5.i7442 + bne s0, s1, .LBB42_4133 + j .LBB42_5499 +.LBB42_4134: # %lpad5.i7442 .Ltmp3280: - j .LBB42_5165 -.LBB42_4133: # %lpad3.i7430 + j .LBB42_5167 +.LBB42_4135: # %lpad3.i7430 .Ltmp3277: - j .LBB42_5374 -.LBB42_4134: # %lpad.i7418 + j .LBB42_5376 +.LBB42_4136: # %lpad.i7418 .Ltmp3274: - j .LBB42_5163 -.LBB42_4135: # %lpad46.i7331 + j .LBB42_5165 +.LBB42_4137: # %lpad46.i7331 .Ltmp3271: mv s5, a0 mv a0, s6 @@ -64398,105 +64389,105 @@ call _ZN8TestCaseD2Ev li s7, 1 sd s5, 112(sp) # 8-byte Folded Spill - j .LBB42_4137 -.LBB42_4136: # %lpad44.i7319 + j .LBB42_4139 +.LBB42_4138: # %lpad44.i7319 .Ltmp3268: li s7, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4137: # %ehcleanup.i7320 +.LBB42_4139: # %ehcleanup.i7320 ld a0, 872(s8) lui a1, 1 addiw a1, a1, 1392 add a1, sp, a1 - beq a0, a1, .LBB42_4139 -# %bb.4138: # %if.then.i.i128.i7324 + beq a0, a1, .LBB42_4141 +# %bb.4140: # %if.then.i.i128.i7324 call _ZdlPv@plt -.LBB42_4139: # %ehcleanup57.i7304 +.LBB42_4141: # %ehcleanup57.i7304 mv s4, s6 - j .LBB42_4143 -.LBB42_4140: # %lpad42.i7315 + j .LBB42_4145 +.LBB42_4142: # %lpad42.i7315 .Ltmp3265: lui a1, 1 addiw a1, a1, 504 add s8, sp, a1 li s7, 0 mv s4, s6 - j .LBB42_4142 -.LBB42_4141: # %lpad37.i7303 + j .LBB42_4144 +.LBB42_4143: # %lpad37.i7303 .Ltmp3262: lui a1, 1 addiw a1, a1, 504 add s8, sp, a1 li s7, 0 -.LBB42_4142: # %ehcleanup57.i7304 +.LBB42_4144: # %ehcleanup57.i7304 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4143: # %ehcleanup57.i7304 +.LBB42_4145: # %ehcleanup57.i7304 ld a0, 904(s8) lui a1, 1 addiw a1, a1, 1424 add a1, sp, a1 - beq a0, a1, .LBB42_4145 -# %bb.4144: # %if.then.i.i134.i7309 + beq a0, a1, .LBB42_4147 +# %bb.4146: # %if.then.i.i134.i7309 call _ZdlPv@plt -.LBB42_4145: # %ehcleanup60.i7288 +.LBB42_4147: # %ehcleanup60.i7288 mv s3, s4 - j .LBB42_4149 -.LBB42_4146: # %lpad35.i7299 + j .LBB42_4151 +.LBB42_4148: # %lpad35.i7299 .Ltmp3259: lui a1, 1 addiw a1, a1, 504 add s8, sp, a1 li s7, 0 mv s3, s4 - j .LBB42_4148 -.LBB42_4147: # %lpad30.i7287 + j .LBB42_4150 +.LBB42_4149: # %lpad30.i7287 .Ltmp3256: lui a1, 1 addiw a1, a1, 504 add s8, sp, a1 li s7, 0 -.LBB42_4148: # %ehcleanup60.i7288 +.LBB42_4150: # %ehcleanup60.i7288 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4149: # %ehcleanup60.i7288 +.LBB42_4151: # %ehcleanup60.i7288 ld a0, 936(s8) lui a1, 1 addiw a1, a1, 1456 add a1, sp, a1 - beq a0, a1, .LBB42_4151 -# %bb.4150: # %if.then.i.i140.i7293 + beq a0, a1, .LBB42_4153 +# %bb.4152: # %if.then.i.i140.i7293 call _ZdlPv@plt -.LBB42_4151: # %ehcleanup63.i7272 +.LBB42_4153: # %ehcleanup63.i7272 mv s2, s3 -.LBB42_4152: # %ehcleanup63.i7272 +.LBB42_4154: # %ehcleanup63.i7272 ld a0, 968(s8) lui a1, 1 addiw a1, a1, 1488 add a1, sp, a1 - beq a0, a1, .LBB42_4154 -# %bb.4153: # %if.then.i.i146.i7277 + beq a0, a1, .LBB42_4156 +# %bb.4155: # %if.then.i.i146.i7277 call _ZdlPv@plt -.LBB42_4154: # %ehcleanup66.i7256 +.LBB42_4156: # %ehcleanup66.i7256 mv s1, s2 -.LBB42_4155: # %ehcleanup66.i7256 +.LBB42_4157: # %ehcleanup66.i7256 ld a0, 1000(s8) lui a1, 1 addiw a1, a1, 1520 add a1, sp, a1 - beq a0, a1, .LBB42_4157 -# %bb.4156: # %if.then.i.i152.i7261 + beq a0, a1, .LBB42_4159 +# %bb.4158: # %if.then.i.i152.i7261 call _ZdlPv@plt -.LBB42_4157: # %ehcleanup69.i7240 +.LBB42_4159: # %ehcleanup69.i7240 mv s0, s1 -.LBB42_4158: # %ehcleanup69.i7240 +.LBB42_4160: # %ehcleanup69.i7240 ld a0, 1032(s8) lui a1, 1 addiw a1, a1, 1552 add a1, sp, a1 - beq a0, a1, .LBB42_4169 -# %bb.4159: # %if.then.i.i158.i7245 + beq a0, a1, .LBB42_4171 +# %bb.4161: # %if.then.i.i158.i7245 call _ZdlPv@plt - j .LBB42_4169 -.LBB42_4160: # %lpad28.i7283 + j .LBB42_4171 +.LBB42_4162: # %lpad28.i7283 .Ltmp3253: lui a1, 1 addiw a1, a1, 504 @@ -64504,16 +64495,16 @@ li s7, 0 mv s2, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4152 -.LBB42_4161: # %lpad23.i7271 + j .LBB42_4154 +.LBB42_4163: # %lpad23.i7271 .Ltmp3250: lui a1, 1 addiw a1, a1, 504 add s8, sp, a1 li s7, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4152 -.LBB42_4162: # %lpad21.i7267 + j .LBB42_4154 +.LBB42_4164: # %lpad21.i7267 .Ltmp3247: lui a1, 1 addiw a1, a1, 504 @@ -64521,16 +64512,16 @@ li s7, 0 mv s1, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4155 -.LBB42_4163: # %lpad16.i7255 + j .LBB42_4157 +.LBB42_4165: # %lpad16.i7255 .Ltmp3244: lui a1, 1 addiw a1, a1, 504 add s8, sp, a1 li s7, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4155 -.LBB42_4164: # %lpad14.i7251 + j .LBB42_4157 +.LBB42_4166: # %lpad14.i7251 .Ltmp3241: lui a1, 1 addiw a1, a1, 504 @@ -64538,49 +64529,49 @@ li s7, 0 mv s0, s1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4158 -.LBB42_4165: # %lpad9.i7239 + j .LBB42_4160 +.LBB42_4167: # %lpad9.i7239 .Ltmp3238: lui a1, 1 addiw a1, a1, 504 add s8, sp, a1 li s7, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4158 -.LBB42_4166: # %lpad7.i7235 + j .LBB42_4160 +.LBB42_4168: # %lpad7.i7235 .Ltmp3235: - j .LBB42_4168 -.LBB42_4167: # %lpad3.i7215 + j .LBB42_4170 +.LBB42_4169: # %lpad3.i7215 .Ltmp3232: -.LBB42_4168: # %ehcleanup72.i7216 +.LBB42_4170: # %ehcleanup72.i7216 lui a1, 1 addiw a1, a1, 504 add s8, sp, a1 li s7, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4169: # %ehcleanup72.i7216 +.LBB42_4171: # %ehcleanup72.i7216 ld a0, 1064(s8) lui a1, 1 addiw a1, a1, 1584 add a1, sp, a1 - beq a0, a1, .LBB42_4171 -# %bb.4170: # %if.then.i.i164.i7221 + beq a0, a1, .LBB42_4173 +# %bb.4172: # %if.then.i.i164.i7221 call _ZdlPv@plt -.LBB42_4171: # %ehcleanup73.i7222 +.LBB42_4173: # %ehcleanup73.i7222 addi s1, sp, 552 xor a0, s1, s0 seqz a0, a0 or a0, s7, a0 - beqz a0, .LBB42_4172 - j .LBB42_5497 -.LBB42_4172: # %arraydestroy.body76.i7225 + beqz a0, .LBB42_4174 + j .LBB42_5499 +.LBB42_4174: # %arraydestroy.body76.i7225 # =>This Inner Loop Header: Depth=1 addi s0, s0, -88 mv a0, s0 call _ZN8TestCaseD2Ev - bne s0, s1, .LBB42_4172 - j .LBB42_5497 -.LBB42_4173: # %lpad46.i + bne s0, s1, .LBB42_4174 + j .LBB42_5499 +.LBB42_4175: # %lpad46.i .Ltmp3229: mv s5, a0 mv a0, s6 @@ -64599,105 +64590,105 @@ call _ZN8TestCaseD2Ev li s7, 1 sd s5, 112(sp) # 8-byte Folded Spill - j .LBB42_4175 -.LBB42_4174: # %lpad44.i7142 + j .LBB42_4177 +.LBB42_4176: # %lpad44.i7142 .Ltmp3226: li s7, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4175: # %ehcleanup.i7143 +.LBB42_4177: # %ehcleanup.i7143 ld a0, 872(s8) lui a1, 1 addiw a1, a1, 1392 add a1, sp, a1 - beq a0, a1, .LBB42_4177 -# %bb.4176: # %if.then.i.i128.i + beq a0, a1, .LBB42_4179 +# %bb.4178: # %if.then.i.i128.i call _ZdlPv@plt -.LBB42_4177: # %ehcleanup57.i +.LBB42_4179: # %ehcleanup57.i mv s4, s6 - j .LBB42_4181 -.LBB42_4178: # %lpad42.i7138 + j .LBB42_4183 +.LBB42_4180: # %lpad42.i7138 .Ltmp3223: lui a1, 1 addiw a1, a1, 504 add s8, sp, a1 li s7, 0 mv s4, s6 - j .LBB42_4180 -.LBB42_4179: # %lpad37.i7127 + j .LBB42_4182 +.LBB42_4181: # %lpad37.i7127 .Ltmp3220: lui a1, 1 addiw a1, a1, 504 add s8, sp, a1 li s7, 0 -.LBB42_4180: # %ehcleanup57.i +.LBB42_4182: # %ehcleanup57.i sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4181: # %ehcleanup57.i +.LBB42_4183: # %ehcleanup57.i ld a0, 904(s8) lui a1, 1 addiw a1, a1, 1424 add a1, sp, a1 - beq a0, a1, .LBB42_4183 -# %bb.4182: # %if.then.i.i134.i7132 + beq a0, a1, .LBB42_4185 +# %bb.4184: # %if.then.i.i134.i7132 call _ZdlPv@plt -.LBB42_4183: # %ehcleanup60.i +.LBB42_4185: # %ehcleanup60.i mv s3, s4 - j .LBB42_4187 -.LBB42_4184: # %lpad35.i7123 + j .LBB42_4189 +.LBB42_4186: # %lpad35.i7123 .Ltmp3217: lui a1, 1 addiw a1, a1, 504 add s8, sp, a1 li s7, 0 mv s3, s4 - j .LBB42_4186 -.LBB42_4185: # %lpad30.i7112 + j .LBB42_4188 +.LBB42_4187: # %lpad30.i7112 .Ltmp3214: lui a1, 1 addiw a1, a1, 504 add s8, sp, a1 li s7, 0 -.LBB42_4186: # %ehcleanup60.i +.LBB42_4188: # %ehcleanup60.i sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4187: # %ehcleanup60.i +.LBB42_4189: # %ehcleanup60.i ld a0, 936(s8) lui a1, 1 addiw a1, a1, 1456 add a1, sp, a1 - beq a0, a1, .LBB42_4189 -# %bb.4188: # %if.then.i.i140.i7117 + beq a0, a1, .LBB42_4191 +# %bb.4190: # %if.then.i.i140.i7117 call _ZdlPv@plt -.LBB42_4189: # %ehcleanup63.i7097 +.LBB42_4191: # %ehcleanup63.i7097 mv s2, s3 -.LBB42_4190: # %ehcleanup63.i7097 +.LBB42_4192: # %ehcleanup63.i7097 ld a0, 968(s8) lui a1, 1 addiw a1, a1, 1488 add a1, sp, a1 - beq a0, a1, .LBB42_4192 -# %bb.4191: # %if.then.i.i146.i7102 + beq a0, a1, .LBB42_4194 +# %bb.4193: # %if.then.i.i146.i7102 call _ZdlPv@plt -.LBB42_4192: # %ehcleanup66.i +.LBB42_4194: # %ehcleanup66.i mv s1, s2 -.LBB42_4193: # %ehcleanup66.i +.LBB42_4195: # %ehcleanup66.i ld a0, 1000(s8) lui a1, 1 addiw a1, a1, 1520 add a1, sp, a1 - beq a0, a1, .LBB42_4195 -# %bb.4194: # %if.then.i.i152.i7086 + beq a0, a1, .LBB42_4197 +# %bb.4196: # %if.then.i.i152.i7086 call _ZdlPv@plt -.LBB42_4195: # %ehcleanup69.i +.LBB42_4197: # %ehcleanup69.i mv s0, s1 -.LBB42_4196: # %ehcleanup69.i +.LBB42_4198: # %ehcleanup69.i ld a0, 1032(s8) lui a1, 1 addiw a1, a1, 1552 add a1, sp, a1 - beq a0, a1, .LBB42_4207 -# %bb.4197: # %if.then.i.i158.i7071 + beq a0, a1, .LBB42_4209 +# %bb.4199: # %if.then.i.i158.i7071 call _ZdlPv@plt - j .LBB42_4207 -.LBB42_4198: # %lpad28.i7108 + j .LBB42_4209 +.LBB42_4200: # %lpad28.i7108 .Ltmp3211: lui a1, 1 addiw a1, a1, 504 @@ -64705,16 +64696,16 @@ li s7, 0 mv s2, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4190 -.LBB42_4199: # %lpad23.i7096 + j .LBB42_4192 +.LBB42_4201: # %lpad23.i7096 .Ltmp3208: lui a1, 1 addiw a1, a1, 504 add s8, sp, a1 li s7, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4190 -.LBB42_4200: # %lpad21.i7092 + j .LBB42_4192 +.LBB42_4202: # %lpad21.i7092 .Ltmp3205: lui a1, 1 addiw a1, a1, 504 @@ -64722,16 +64713,16 @@ li s7, 0 mv s1, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4193 -.LBB42_4201: # %lpad16.i7081 + j .LBB42_4195 +.LBB42_4203: # %lpad16.i7081 .Ltmp3202: lui a1, 1 addiw a1, a1, 504 add s8, sp, a1 li s7, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4193 -.LBB42_4202: # %lpad14.i7077 + j .LBB42_4195 +.LBB42_4204: # %lpad14.i7077 .Ltmp3199: lui a1, 1 addiw a1, a1, 504 @@ -64739,52 +64730,52 @@ li s7, 0 mv s0, s1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4196 -.LBB42_4203: # %lpad9.i7066 + j .LBB42_4198 +.LBB42_4205: # %lpad9.i7066 .Ltmp3196: lui a1, 1 addiw a1, a1, 504 add s8, sp, a1 li s7, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4196 -.LBB42_4204: # %lpad7.i7065 + j .LBB42_4198 +.LBB42_4206: # %lpad7.i7065 .Ltmp3193: - j .LBB42_4206 -.LBB42_4205: # %lpad3.i7051 + j .LBB42_4208 +.LBB42_4207: # %lpad3.i7051 .Ltmp3190: -.LBB42_4206: # %ehcleanup72.i +.LBB42_4208: # %ehcleanup72.i lui a1, 1 addiw a1, a1, 504 add s8, sp, a1 li s7, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4207: # %ehcleanup72.i +.LBB42_4209: # %ehcleanup72.i ld a0, 1064(s8) lui a1, 1 addiw a1, a1, 1584 add a1, sp, a1 - beq a0, a1, .LBB42_4209 -# %bb.4208: # %if.then.i.i164.i7056 + beq a0, a1, .LBB42_4211 +# %bb.4210: # %if.then.i.i164.i7056 call _ZdlPv@plt -.LBB42_4209: # %ehcleanup73.i7057 +.LBB42_4211: # %ehcleanup73.i7057 addi s1, sp, 552 xor a0, s1, s0 seqz a0, a0 or a0, s7, a0 - beqz a0, .LBB42_4210 - j .LBB42_5497 -.LBB42_4210: # %arraydestroy.body76.i + beqz a0, .LBB42_4212 + j .LBB42_5499 +.LBB42_4212: # %arraydestroy.body76.i # =>This Inner Loop Header: Depth=1 addi s0, s0, -88 mv a0, s0 call _ZN8TestCaseD2Ev - bne s0, s1, .LBB42_4210 - j .LBB42_5497 -.LBB42_4211: # %lpad.i7030 + bne s0, s1, .LBB42_4212 + j .LBB42_5499 +.LBB42_4213: # %lpad.i7030 .Ltmp3187: - j .LBB42_5163 -.LBB42_4212: # %lpad39.i6754 + j .LBB42_5165 +.LBB42_4214: # %lpad39.i6754 .Ltmp3184: mv s0, a0 mv a0, s5 @@ -64801,95 +64792,95 @@ call _ZN8TestCaseD2Ev li s6, 1 sd s0, 112(sp) # 8-byte Folded Spill - j .LBB42_4214 -.LBB42_4213: # %lpad37.i6742 + j .LBB42_4216 +.LBB42_4215: # %lpad37.i6742 .Ltmp3181: li s6, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4214: # %ehcleanup.i6743 +.LBB42_4216: # %ehcleanup.i6743 ld a0, 904(s7) lui a1, 1 addiw a1, a1, 1424 add a1, sp, a1 - beq a0, a1, .LBB42_4216 -# %bb.4215: # %if.then.i.i108.i6747 + beq a0, a1, .LBB42_4218 +# %bb.4217: # %if.then.i.i108.i6747 call _ZdlPv@plt -.LBB42_4216: # %ehcleanup50.i6727 +.LBB42_4218: # %ehcleanup50.i6727 mv s4, s5 - j .LBB42_4220 -.LBB42_4217: # %lpad35.i6738 + j .LBB42_4222 +.LBB42_4219: # %lpad35.i6738 .Ltmp3178: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 li s6, 0 mv s4, s5 - j .LBB42_4219 -.LBB42_4218: # %lpad30.i6726 + j .LBB42_4221 +.LBB42_4220: # %lpad30.i6726 .Ltmp3175: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 li s6, 0 -.LBB42_4219: # %ehcleanup50.i6727 +.LBB42_4221: # %ehcleanup50.i6727 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4220: # %ehcleanup50.i6727 +.LBB42_4222: # %ehcleanup50.i6727 ld a0, 936(s7) lui a1, 1 addiw a1, a1, 1456 add a1, sp, a1 - beq a0, a1, .LBB42_4222 -# %bb.4221: # %if.then.i.i114.i6732 + beq a0, a1, .LBB42_4224 +# %bb.4223: # %if.then.i.i114.i6732 call _ZdlPv@plt -.LBB42_4222: # %ehcleanup53.i6711 +.LBB42_4224: # %ehcleanup53.i6711 mv s3, s4 - j .LBB42_4226 -.LBB42_4223: # %lpad28.i6722 + j .LBB42_4228 +.LBB42_4225: # %lpad28.i6722 .Ltmp3172: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 li s6, 0 mv s3, s4 - j .LBB42_4225 -.LBB42_4224: # %lpad23.i6710 + j .LBB42_4227 +.LBB42_4226: # %lpad23.i6710 .Ltmp3169: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 li s6, 0 -.LBB42_4225: # %ehcleanup53.i6711 +.LBB42_4227: # %ehcleanup53.i6711 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4226: # %ehcleanup53.i6711 +.LBB42_4228: # %ehcleanup53.i6711 ld a0, 968(s7) lui a1, 1 addiw a1, a1, 1488 add a1, sp, a1 - beq a0, a1, .LBB42_4228 -# %bb.4227: # %if.then.i.i120.i6716 + beq a0, a1, .LBB42_4230 +# %bb.4229: # %if.then.i.i120.i6716 call _ZdlPv@plt -.LBB42_4228: # %ehcleanup56.i6695 +.LBB42_4230: # %ehcleanup56.i6695 mv s2, s3 -.LBB42_4229: # %ehcleanup56.i6695 +.LBB42_4231: # %ehcleanup56.i6695 ld a0, 1000(s7) lui a1, 1 addiw a1, a1, 1520 add a1, sp, a1 - beq a0, a1, .LBB42_4231 -# %bb.4230: # %if.then.i.i126.i6700 + beq a0, a1, .LBB42_4233 +# %bb.4232: # %if.then.i.i126.i6700 call _ZdlPv@plt -.LBB42_4231: # %ehcleanup59.i6679 +.LBB42_4233: # %ehcleanup59.i6679 mv s1, s2 -.LBB42_4232: # %ehcleanup59.i6679 +.LBB42_4234: # %ehcleanup59.i6679 ld a0, 1032(s7) lui a1, 1 addiw a1, a1, 1552 add a1, sp, a1 - beq a0, a1, .LBB42_4241 -# %bb.4233: # %if.then.i.i132.i6684 + beq a0, a1, .LBB42_4243 +# %bb.4235: # %if.then.i.i132.i6684 call _ZdlPv@plt - j .LBB42_4241 -.LBB42_4234: # %lpad21.i6706 + j .LBB42_4243 +.LBB42_4236: # %lpad21.i6706 .Ltmp3166: lui a1, 1 addiw a1, a1, 504 @@ -64897,16 +64888,16 @@ li s6, 0 mv s2, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4229 -.LBB42_4235: # %lpad16.i6694 + j .LBB42_4231 +.LBB42_4237: # %lpad16.i6694 .Ltmp3163: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 li s6, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4229 -.LBB42_4236: # %lpad14.i6690 + j .LBB42_4231 +.LBB42_4238: # %lpad14.i6690 .Ltmp3160: lui a1, 1 addiw a1, a1, 504 @@ -64914,49 +64905,49 @@ li s6, 0 mv s1, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4232 -.LBB42_4237: # %lpad9.i6678 + j .LBB42_4234 +.LBB42_4239: # %lpad9.i6678 .Ltmp3157: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 li s6, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4232 -.LBB42_4238: # %lpad7.i6674 + j .LBB42_4234 +.LBB42_4240: # %lpad7.i6674 .Ltmp3154: - j .LBB42_4240 -.LBB42_4239: # %lpad3.i6654 + j .LBB42_4242 +.LBB42_4241: # %lpad3.i6654 .Ltmp3151: -.LBB42_4240: # %ehcleanup62.i6655 +.LBB42_4242: # %ehcleanup62.i6655 lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 li s6, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4241: # %ehcleanup62.i6655 +.LBB42_4243: # %ehcleanup62.i6655 ld a0, 1064(s7) lui a1, 1 addiw a1, a1, 1584 add a1, sp, a1 - beq a0, a1, .LBB42_4243 -# %bb.4242: # %if.then.i.i138.i6660 + beq a0, a1, .LBB42_4245 +# %bb.4244: # %if.then.i.i138.i6660 call _ZdlPv@plt -.LBB42_4243: # %ehcleanup63.i6661 +.LBB42_4245: # %ehcleanup63.i6661 addi s0, sp, 552 xor a0, s0, s1 seqz a0, a0 or a0, s6, a0 - beqz a0, .LBB42_4244 - j .LBB42_5497 -.LBB42_4244: # %arraydestroy.body66.i6664 + beqz a0, .LBB42_4246 + j .LBB42_5499 +.LBB42_4246: # %arraydestroy.body66.i6664 # =>This Inner Loop Header: Depth=1 addi s1, s1, -88 mv a0, s1 call _ZN8TestCaseD2Ev - bne s1, s0, .LBB42_4244 - j .LBB42_5497 -.LBB42_4245: # %lpad39.i + bne s1, s0, .LBB42_4246 + j .LBB42_5499 +.LBB42_4247: # %lpad39.i .Ltmp3148: mv s0, a0 mv a0, s5 @@ -64973,95 +64964,95 @@ call _ZN8TestCaseD2Ev li s6, 1 sd s0, 112(sp) # 8-byte Folded Spill - j .LBB42_4247 -.LBB42_4246: # %lpad37.i6435 + j .LBB42_4249 +.LBB42_4248: # %lpad37.i6435 .Ltmp3145: li s6, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4247: # %ehcleanup.i6436 +.LBB42_4249: # %ehcleanup.i6436 ld a0, 904(s7) lui a1, 1 addiw a1, a1, 1424 add a1, sp, a1 - beq a0, a1, .LBB42_4249 -# %bb.4248: # %if.then.i.i108.i + beq a0, a1, .LBB42_4251 +# %bb.4250: # %if.then.i.i108.i call _ZdlPv@plt -.LBB42_4249: # %ehcleanup50.i +.LBB42_4251: # %ehcleanup50.i mv s4, s5 - j .LBB42_4253 -.LBB42_4250: # %lpad35.i6434 + j .LBB42_4255 +.LBB42_4252: # %lpad35.i6434 .Ltmp3142: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 li s6, 0 mv s4, s5 - j .LBB42_4252 -.LBB42_4251: # %lpad30.i6428 + j .LBB42_4254 +.LBB42_4253: # %lpad30.i6428 .Ltmp3139: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 li s6, 0 -.LBB42_4252: # %ehcleanup50.i +.LBB42_4254: # %ehcleanup50.i sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4253: # %ehcleanup50.i +.LBB42_4255: # %ehcleanup50.i ld a0, 936(s7) lui a1, 1 addiw a1, a1, 1456 add a1, sp, a1 - beq a0, a1, .LBB42_4255 -# %bb.4254: # %if.then.i.i114.i + beq a0, a1, .LBB42_4257 +# %bb.4256: # %if.then.i.i114.i call _ZdlPv@plt -.LBB42_4255: # %ehcleanup53.i6421 +.LBB42_4257: # %ehcleanup53.i6421 mv s3, s4 - j .LBB42_4259 -.LBB42_4256: # %lpad28.i6427 + j .LBB42_4261 +.LBB42_4258: # %lpad28.i6427 .Ltmp3136: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 li s6, 0 mv s3, s4 - j .LBB42_4258 -.LBB42_4257: # %lpad23.i6420 + j .LBB42_4260 +.LBB42_4259: # %lpad23.i6420 .Ltmp3133: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 li s6, 0 -.LBB42_4258: # %ehcleanup53.i6421 +.LBB42_4260: # %ehcleanup53.i6421 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4259: # %ehcleanup53.i6421 +.LBB42_4261: # %ehcleanup53.i6421 ld a0, 968(s7) lui a1, 1 addiw a1, a1, 1488 add a1, sp, a1 - beq a0, a1, .LBB42_4261 -# %bb.4260: # %if.then.i.i120.i + beq a0, a1, .LBB42_4263 +# %bb.4262: # %if.then.i.i120.i call _ZdlPv@plt -.LBB42_4261: # %ehcleanup56.i6413 +.LBB42_4263: # %ehcleanup56.i6413 mv s2, s3 -.LBB42_4262: # %ehcleanup56.i6413 +.LBB42_4264: # %ehcleanup56.i6413 ld a0, 1000(s7) lui a1, 1 addiw a1, a1, 1520 add a1, sp, a1 - beq a0, a1, .LBB42_4264 -# %bb.4263: # %if.then.i.i126.i + beq a0, a1, .LBB42_4266 +# %bb.4265: # %if.then.i.i126.i call _ZdlPv@plt -.LBB42_4264: # %ehcleanup59.i +.LBB42_4266: # %ehcleanup59.i mv s1, s2 -.LBB42_4265: # %ehcleanup59.i +.LBB42_4267: # %ehcleanup59.i ld a0, 1032(s7) lui a1, 1 addiw a1, a1, 1552 add a1, sp, a1 - beq a0, a1, .LBB42_4274 -# %bb.4266: # %if.then.i.i132.i6408 + beq a0, a1, .LBB42_4276 +# %bb.4268: # %if.then.i.i132.i6408 call _ZdlPv@plt - j .LBB42_4274 -.LBB42_4267: # %lpad21.i6419 + j .LBB42_4276 +.LBB42_4269: # %lpad21.i6419 .Ltmp3130: lui a1, 1 addiw a1, a1, 504 @@ -65069,16 +65060,16 @@ li s6, 0 mv s2, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4262 -.LBB42_4268: # %lpad16.i6412 + j .LBB42_4264 +.LBB42_4270: # %lpad16.i6412 .Ltmp3127: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 li s6, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4262 -.LBB42_4269: # %lpad14.i6411 + j .LBB42_4264 +.LBB42_4271: # %lpad14.i6411 .Ltmp3124: lui a1, 1 addiw a1, a1, 504 @@ -65086,52 +65077,52 @@ li s6, 0 mv s1, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4265 -.LBB42_4270: # %lpad9.i6404 + j .LBB42_4267 +.LBB42_4272: # %lpad9.i6404 .Ltmp3121: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 li s6, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4265 -.LBB42_4271: # %lpad7.i6402 + j .LBB42_4267 +.LBB42_4273: # %lpad7.i6402 .Ltmp3118: - j .LBB42_4273 -.LBB42_4272: # %lpad3.i6392 + j .LBB42_4275 +.LBB42_4274: # %lpad3.i6392 .Ltmp3115: -.LBB42_4273: # %ehcleanup62.i +.LBB42_4275: # %ehcleanup62.i lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 li s6, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4274: # %ehcleanup62.i +.LBB42_4276: # %ehcleanup62.i ld a0, 1064(s7) lui a1, 1 addiw a1, a1, 1584 add a1, sp, a1 - beq a0, a1, .LBB42_4276 -# %bb.4275: # %if.then.i.i138.i + beq a0, a1, .LBB42_4278 +# %bb.4277: # %if.then.i.i138.i call _ZdlPv@plt -.LBB42_4276: # %ehcleanup63.i +.LBB42_4278: # %ehcleanup63.i addi s0, sp, 552 xor a0, s0, s1 seqz a0, a0 or a0, s6, a0 - beqz a0, .LBB42_4277 - j .LBB42_5497 -.LBB42_4277: # %arraydestroy.body66.i + beqz a0, .LBB42_4279 + j .LBB42_5499 +.LBB42_4279: # %arraydestroy.body66.i # =>This Inner Loop Header: Depth=1 addi s1, s1, -88 mv a0, s1 call _ZN8TestCaseD2Ev - bne s1, s0, .LBB42_4277 - j .LBB42_5497 -.LBB42_4278: # %lpad.i6377 + bne s1, s0, .LBB42_4279 + j .LBB42_5499 +.LBB42_4280: # %lpad.i6377 .Ltmp3112: - j .LBB42_5163 -.LBB42_4279: # %lpad32.i6147 + j .LBB42_5165 +.LBB42_4281: # %lpad32.i6147 .Ltmp3109: mv s0, a0 mv a0, s4 @@ -65146,85 +65137,85 @@ call _ZN8TestCaseD2Ev li s5, 1 sd s0, 112(sp) # 8-byte Folded Spill - j .LBB42_4281 -.LBB42_4280: # %lpad30.i6135 + j .LBB42_4283 +.LBB42_4282: # %lpad30.i6135 .Ltmp3106: li s5, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4281: # %ehcleanup.i6136 +.LBB42_4283: # %ehcleanup.i6136 ld a0, 936(s6) lui a1, 1 addiw a1, a1, 1456 add a1, sp, a1 - beq a0, a1, .LBB42_4283 -# %bb.4282: # %if.then.i.i88.i6140 + beq a0, a1, .LBB42_4285 +# %bb.4284: # %if.then.i.i88.i6140 call _ZdlPv@plt -.LBB42_4283: # %ehcleanup43.i6120 +.LBB42_4285: # %ehcleanup43.i6120 mv s3, s4 - j .LBB42_4287 -.LBB42_4284: # %lpad28.i6131 + j .LBB42_4289 +.LBB42_4286: # %lpad28.i6131 .Ltmp3103: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s5, 0 mv s3, s4 - j .LBB42_4286 -.LBB42_4285: # %lpad23.i6119 + j .LBB42_4288 +.LBB42_4287: # %lpad23.i6119 .Ltmp3100: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s5, 0 -.LBB42_4286: # %ehcleanup43.i6120 +.LBB42_4288: # %ehcleanup43.i6120 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4287: # %ehcleanup43.i6120 +.LBB42_4289: # %ehcleanup43.i6120 ld a0, 968(s6) lui a1, 1 addiw a1, a1, 1488 add a1, sp, a1 - beq a0, a1, .LBB42_4289 -# %bb.4288: # %if.then.i.i94.i6125 + beq a0, a1, .LBB42_4291 +# %bb.4290: # %if.then.i.i94.i6125 call _ZdlPv@plt -.LBB42_4289: # %ehcleanup46.i6104 +.LBB42_4291: # %ehcleanup46.i6104 mv s2, s3 - j .LBB42_4293 -.LBB42_4290: # %lpad21.i6115 + j .LBB42_4295 +.LBB42_4292: # %lpad21.i6115 .Ltmp3097: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s5, 0 mv s2, s3 - j .LBB42_4292 -.LBB42_4291: # %lpad16.i6103 + j .LBB42_4294 +.LBB42_4293: # %lpad16.i6103 .Ltmp3094: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s5, 0 -.LBB42_4292: # %ehcleanup46.i6104 +.LBB42_4294: # %ehcleanup46.i6104 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4293: # %ehcleanup46.i6104 +.LBB42_4295: # %ehcleanup46.i6104 ld a0, 1000(s6) lui a1, 1 addiw a1, a1, 1520 add a1, sp, a1 - beq a0, a1, .LBB42_4295 -# %bb.4294: # %if.then.i.i100.i6109 + beq a0, a1, .LBB42_4297 +# %bb.4296: # %if.then.i.i100.i6109 call _ZdlPv@plt -.LBB42_4295: # %ehcleanup49.i6088 +.LBB42_4297: # %ehcleanup49.i6088 mv s1, s2 -.LBB42_4296: # %ehcleanup49.i6088 +.LBB42_4298: # %ehcleanup49.i6088 ld a0, 1032(s6) lui a1, 1 addiw a1, a1, 1552 add a1, sp, a1 - beq a0, a1, .LBB42_4303 -# %bb.4297: # %if.then.i.i106.i6093 + beq a0, a1, .LBB42_4305 +# %bb.4299: # %if.then.i.i106.i6093 call _ZdlPv@plt - j .LBB42_4303 -.LBB42_4298: # %lpad14.i6099 + j .LBB42_4305 +.LBB42_4300: # %lpad14.i6099 .Ltmp3091: lui a1, 1 addiw a1, a1, 504 @@ -65232,49 +65223,49 @@ li s5, 0 mv s1, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4296 -.LBB42_4299: # %lpad9.i6087 + j .LBB42_4298 +.LBB42_4301: # %lpad9.i6087 .Ltmp3088: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s5, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4296 -.LBB42_4300: # %lpad7.i6083 + j .LBB42_4298 +.LBB42_4302: # %lpad7.i6083 .Ltmp3085: - j .LBB42_4302 -.LBB42_4301: # %lpad3.i6063 + j .LBB42_4304 +.LBB42_4303: # %lpad3.i6063 .Ltmp3082: -.LBB42_4302: # %ehcleanup52.i6064 +.LBB42_4304: # %ehcleanup52.i6064 lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s5, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4303: # %ehcleanup52.i6064 +.LBB42_4305: # %ehcleanup52.i6064 ld a0, 1064(s6) lui a1, 1 addiw a1, a1, 1584 add a1, sp, a1 - beq a0, a1, .LBB42_4305 -# %bb.4304: # %if.then.i.i112.i6069 + beq a0, a1, .LBB42_4307 +# %bb.4306: # %if.then.i.i112.i6069 call _ZdlPv@plt -.LBB42_4305: # %ehcleanup53.i6070 +.LBB42_4307: # %ehcleanup53.i6070 addi s0, sp, 552 xor a0, s0, s1 seqz a0, a0 or a0, s5, a0 - beqz a0, .LBB42_4306 - j .LBB42_5497 -.LBB42_4306: # %arraydestroy.body56.i6073 + beqz a0, .LBB42_4308 + j .LBB42_5499 +.LBB42_4308: # %arraydestroy.body56.i6073 # =>This Inner Loop Header: Depth=1 addi s1, s1, -88 mv a0, s1 call _ZN8TestCaseD2Ev - bne s1, s0, .LBB42_4306 - j .LBB42_5497 -.LBB42_4307: # %lpad319.i + bne s1, s0, .LBB42_4308 + j .LBB42_5499 +.LBB42_4309: # %lpad319.i .Ltmp3079: mv s9, a0 mv a0, s4 @@ -65378,612 +65369,612 @@ call _ZN8TestCaseD2Ev li s8, 0 sd s9, 112(sp) # 8-byte Folded Spill - j .LBB42_4309 -.LBB42_4308: # %lpad317.i + j .LBB42_4311 +.LBB42_4310: # %lpad317.i .Ltmp3076: sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4309: # %ehcleanup.i5998 +.LBB42_4311: # %ehcleanup.i5998 ld a0, 168(sp) addi a1, sp, 184 - beq a0, a1, .LBB42_4311 -# %bb.4310: # %if.then.i.i908.i + beq a0, a1, .LBB42_4313 +# %bb.4312: # %if.then.i.i908.i call _ZdlPv@plt -.LBB42_4311: # %ehcleanup330.i +.LBB42_4313: # %ehcleanup330.i mv s0, s4 - j .LBB42_4315 -.LBB42_4312: # %lpad315.i + j .LBB42_4317 +.LBB42_4314: # %lpad315.i .Ltmp3073: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 mv s0, s4 - j .LBB42_4314 -.LBB42_4313: # %lpad310.i + j .LBB42_4316 +.LBB42_4315: # %lpad310.i .Ltmp3070: -.LBB42_4314: # %ehcleanup330.i +.LBB42_4316: # %ehcleanup330.i sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4315: # %ehcleanup330.i +.LBB42_4317: # %ehcleanup330.i ld a0, 200(sp) addi a1, sp, 216 - beq a0, a1, .LBB42_4317 -# %bb.4316: # %if.then.i.i914.i + beq a0, a1, .LBB42_4319 +# %bb.4318: # %if.then.i.i914.i call _ZdlPv@plt -.LBB42_4317: # %ehcleanup333.i +.LBB42_4319: # %ehcleanup333.i mv s3, s0 - j .LBB42_4321 -.LBB42_4318: # %lpad308.i + j .LBB42_4323 +.LBB42_4320: # %lpad308.i .Ltmp3067: mv s3, s0 - j .LBB42_4320 -.LBB42_4319: # %lpad303.i + j .LBB42_4322 +.LBB42_4321: # %lpad303.i .Ltmp3064: -.LBB42_4320: # %ehcleanup333.i +.LBB42_4322: # %ehcleanup333.i sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4321: # %ehcleanup333.i +.LBB42_4323: # %ehcleanup333.i ld a0, 232(sp) addi a1, sp, 248 - beq a0, a1, .LBB42_4323 -# %bb.4322: # %if.then.i.i920.i + beq a0, a1, .LBB42_4325 +# %bb.4324: # %if.then.i.i920.i call _ZdlPv@plt -.LBB42_4323: # %ehcleanup336.i +.LBB42_4325: # %ehcleanup336.i mv s2, s3 -.LBB42_4324: # %ehcleanup336.i +.LBB42_4326: # %ehcleanup336.i ld a0, 264(sp) addi a1, sp, 280 - beq a0, a1, .LBB42_4326 -# %bb.4325: # %if.then.i.i926.i + beq a0, a1, .LBB42_4328 +# %bb.4327: # %if.then.i.i926.i call _ZdlPv@plt -.LBB42_4326: # %ehcleanup339.i +.LBB42_4328: # %ehcleanup339.i mv s1, s2 ld a0, 296(sp) addi a1, sp, 312 - beq a0, a1, .LBB42_4328 -.LBB42_4327: # %if.then.i.i932.i + beq a0, a1, .LBB42_4330 +.LBB42_4329: # %if.then.i.i932.i call _ZdlPv@plt -.LBB42_4328: # %ehcleanup342.i +.LBB42_4330: # %ehcleanup342.i mv s10, s1 -.LBB42_4329: # %ehcleanup342.i +.LBB42_4331: # %ehcleanup342.i ld a0, 328(sp) addi a1, sp, 344 - beq a0, a1, .LBB42_4331 -# %bb.4330: # %if.then.i.i938.i + beq a0, a1, .LBB42_4333 +# %bb.4332: # %if.then.i.i938.i call _ZdlPv@plt -.LBB42_4331: # %ehcleanup345.i +.LBB42_4333: # %ehcleanup345.i mv s2, s10 -.LBB42_4332: # %ehcleanup345.i +.LBB42_4334: # %ehcleanup345.i ld a0, 360(sp) addi a1, sp, 376 - bne a0, a1, .LBB42_4419 -# %bb.4333: # %ehcleanup348.i + bne a0, a1, .LBB42_4421 +# %bb.4335: # %ehcleanup348.i ld a0, 392(sp) addi a1, sp, 408 - bne a0, a1, .LBB42_4420 -.LBB42_4334: # %ehcleanup351.i + bne a0, a1, .LBB42_4422 +.LBB42_4336: # %ehcleanup351.i ld a0, 424(sp) addi a1, sp, 440 - beq a0, a1, .LBB42_4336 -.LBB42_4335: # %if.then.i.i956.i + beq a0, a1, .LBB42_4338 +.LBB42_4337: # %if.then.i.i956.i call _ZdlPv@plt -.LBB42_4336: # %ehcleanup354.i +.LBB42_4338: # %ehcleanup354.i sd s2, 120(sp) # 8-byte Folded Spill -.LBB42_4337: # %ehcleanup354.i +.LBB42_4339: # %ehcleanup354.i ld a0, 456(sp) addi a1, sp, 472 - beq a0, a1, .LBB42_4339 -# %bb.4338: # %if.then.i.i962.i + beq a0, a1, .LBB42_4341 +# %bb.4340: # %if.then.i.i962.i call _ZdlPv@plt -.LBB42_4339: # %ehcleanup357.i +.LBB42_4341: # %ehcleanup357.i ld s2, 120(sp) # 8-byte Folded Reload -.LBB42_4340: # %ehcleanup357.i +.LBB42_4342: # %ehcleanup357.i ld a0, 488(sp) addi a1, sp, 504 - beq a0, a1, .LBB42_4342 -# %bb.4341: # %if.then.i.i968.i + beq a0, a1, .LBB42_4344 +# %bb.4343: # %if.then.i.i968.i call _ZdlPv@plt -.LBB42_4342: # %ehcleanup360.i +.LBB42_4344: # %ehcleanup360.i ld a0, 520(sp) addi a1, sp, 536 - beq a0, a1, .LBB42_4344 -# %bb.4343: # %if.then.i.i974.i + beq a0, a1, .LBB42_4346 +# %bb.4345: # %if.then.i.i974.i call _ZdlPv@plt -.LBB42_4344: # %ehcleanup363.i +.LBB42_4346: # %ehcleanup363.i ld a0, 8(s7) lui a1, 1 addiw a1, a1, 528 add a1, sp, a1 - beq a0, a1, .LBB42_4346 -# %bb.4345: # %if.then.i.i980.i + beq a0, a1, .LBB42_4348 +# %bb.4347: # %if.then.i.i980.i call _ZdlPv@plt -.LBB42_4346: # %ehcleanup366.i +.LBB42_4348: # %ehcleanup366.i sd s2, 128(sp) # 8-byte Folded Spill -.LBB42_4347: # %ehcleanup366.i +.LBB42_4349: # %ehcleanup366.i ld a0, 40(s7) lui a1, 1 addiw a1, a1, 560 add a1, sp, a1 - beq a0, a1, .LBB42_4349 -# %bb.4348: # %if.then.i.i986.i + beq a0, a1, .LBB42_4351 +# %bb.4350: # %if.then.i.i986.i call _ZdlPv@plt -.LBB42_4349: # %ehcleanup369.i +.LBB42_4351: # %ehcleanup369.i ld s11, 128(sp) # 8-byte Folded Reload -.LBB42_4350: # %ehcleanup369.i +.LBB42_4352: # %ehcleanup369.i ld a0, 72(s7) lui a1, 1 addiw a1, a1, 592 add a1, sp, a1 - beq a0, a1, .LBB42_4352 -# %bb.4351: # %if.then.i.i992.i + beq a0, a1, .LBB42_4354 +# %bb.4353: # %if.then.i.i992.i call _ZdlPv@plt -.LBB42_4352: # %ehcleanup372.i +.LBB42_4354: # %ehcleanup372.i sd s11, 136(sp) # 8-byte Folded Spill -.LBB42_4353: # %ehcleanup372.i +.LBB42_4355: # %ehcleanup372.i ld a0, 104(s7) lui a1, 1 addiw a1, a1, 624 add a1, sp, a1 - beq a0, a1, .LBB42_4355 -# %bb.4354: # %if.then.i.i998.i + beq a0, a1, .LBB42_4357 +# %bb.4356: # %if.then.i.i998.i call _ZdlPv@plt -.LBB42_4355: # %ehcleanup375.i +.LBB42_4357: # %ehcleanup375.i ld s6, 136(sp) # 8-byte Folded Reload -.LBB42_4356: # %ehcleanup375.i +.LBB42_4358: # %ehcleanup375.i ld a0, 136(s7) lui a1, 1 addiw a1, a1, 656 add a1, sp, a1 - beq a0, a1, .LBB42_4358 -# %bb.4357: # %if.then.i.i1004.i + beq a0, a1, .LBB42_4360 +# %bb.4359: # %if.then.i.i1004.i call _ZdlPv@plt -.LBB42_4358: # %ehcleanup378.i +.LBB42_4360: # %ehcleanup378.i ld a0, 168(s7) lui a1, 1 addiw a1, a1, 688 add a1, sp, a1 - beq a0, a1, .LBB42_4360 -# %bb.4359: # %if.then.i.i1010.i + beq a0, a1, .LBB42_4362 +# %bb.4361: # %if.then.i.i1010.i call _ZdlPv@plt -.LBB42_4360: # %ehcleanup381.i +.LBB42_4362: # %ehcleanup381.i ld a0, 200(s7) lui a1, 1 addiw a1, a1, 720 add a1, sp, a1 - beq a0, a1, .LBB42_4362 -# %bb.4361: # %if.then.i.i1016.i + beq a0, a1, .LBB42_4364 +# %bb.4363: # %if.then.i.i1016.i call _ZdlPv@plt -.LBB42_4362: # %ehcleanup384.i +.LBB42_4364: # %ehcleanup384.i ld a0, 232(s7) lui a1, 1 addiw a1, a1, 752 add a1, sp, a1 - beq a0, a1, .LBB42_4364 -# %bb.4363: # %if.then.i.i1022.i + beq a0, a1, .LBB42_4366 +# %bb.4365: # %if.then.i.i1022.i call _ZdlPv@plt -.LBB42_4364: # %ehcleanup387.i +.LBB42_4366: # %ehcleanup387.i ld a0, 264(s7) lui a1, 1 addiw a1, a1, 784 add a1, sp, a1 - beq a0, a1, .LBB42_4366 -# %bb.4365: # %if.then.i.i1028.i + beq a0, a1, .LBB42_4368 +# %bb.4367: # %if.then.i.i1028.i call _ZdlPv@plt -.LBB42_4366: # %ehcleanup390.i +.LBB42_4368: # %ehcleanup390.i ld a0, 296(s7) lui a1, 1 addiw a1, a1, 816 add a1, sp, a1 - beq a0, a1, .LBB42_4368 -# %bb.4367: # %if.then.i.i1034.i + beq a0, a1, .LBB42_4370 +# %bb.4369: # %if.then.i.i1034.i call _ZdlPv@plt -.LBB42_4368: # %ehcleanup393.i +.LBB42_4370: # %ehcleanup393.i ld a0, 328(s7) lui a1, 1 addiw a1, a1, 848 add a1, sp, a1 - beq a0, a1, .LBB42_4370 -# %bb.4369: # %if.then.i.i1040.i + beq a0, a1, .LBB42_4372 +# %bb.4371: # %if.then.i.i1040.i call _ZdlPv@plt -.LBB42_4370: # %ehcleanup396.i +.LBB42_4372: # %ehcleanup396.i ld a0, 360(s7) lui a1, 1 addiw a1, a1, 880 add a1, sp, a1 - beq a0, a1, .LBB42_4372 -# %bb.4371: # %if.then.i.i1046.i + beq a0, a1, .LBB42_4374 +# %bb.4373: # %if.then.i.i1046.i call _ZdlPv@plt -.LBB42_4372: # %ehcleanup399.i +.LBB42_4374: # %ehcleanup399.i ld a0, 392(s7) lui a1, 1 addiw a1, a1, 912 add a1, sp, a1 - beq a0, a1, .LBB42_4374 -# %bb.4373: # %if.then.i.i1052.i + beq a0, a1, .LBB42_4376 +# %bb.4375: # %if.then.i.i1052.i call _ZdlPv@plt -.LBB42_4374: # %ehcleanup402.i +.LBB42_4376: # %ehcleanup402.i ld a0, 424(s7) lui a1, 1 addiw a1, a1, 944 add a1, sp, a1 - beq a0, a1, .LBB42_4376 -# %bb.4375: # %if.then.i.i1058.i + beq a0, a1, .LBB42_4378 +# %bb.4377: # %if.then.i.i1058.i call _ZdlPv@plt -.LBB42_4376: # %ehcleanup405.i +.LBB42_4378: # %ehcleanup405.i ld a0, 456(s7) lui a1, 1 addiw a1, a1, 976 add a1, sp, a1 - beq a0, a1, .LBB42_4378 -# %bb.4377: # %if.then.i.i1064.i + beq a0, a1, .LBB42_4380 +# %bb.4379: # %if.then.i.i1064.i call _ZdlPv@plt -.LBB42_4378: # %ehcleanup408.i +.LBB42_4380: # %ehcleanup408.i ld a0, 488(s7) lui a1, 1 addiw a1, a1, 1008 add a1, sp, a1 - beq a0, a1, .LBB42_4380 -# %bb.4379: # %if.then.i.i1070.i + beq a0, a1, .LBB42_4382 +# %bb.4381: # %if.then.i.i1070.i call _ZdlPv@plt -.LBB42_4380: # %ehcleanup411.i +.LBB42_4382: # %ehcleanup411.i ld a0, 520(s7) lui a1, 1 addiw a1, a1, 1040 add a1, sp, a1 - beq a0, a1, .LBB42_4382 -# %bb.4381: # %if.then.i.i1076.i + beq a0, a1, .LBB42_4384 +# %bb.4383: # %if.then.i.i1076.i call _ZdlPv@plt -.LBB42_4382: # %ehcleanup414.i +.LBB42_4384: # %ehcleanup414.i ld a0, 552(s7) lui a1, 1 addiw a1, a1, 1072 add a1, sp, a1 - beq a0, a1, .LBB42_4384 -# %bb.4383: # %if.then.i.i1082.i + beq a0, a1, .LBB42_4386 +# %bb.4385: # %if.then.i.i1082.i call _ZdlPv@plt -.LBB42_4384: # %ehcleanup417.i +.LBB42_4386: # %ehcleanup417.i ld a0, 584(s7) lui a1, 1 addiw a1, a1, 1104 add a1, sp, a1 - beq a0, a1, .LBB42_4386 -# %bb.4385: # %if.then.i.i1088.i + beq a0, a1, .LBB42_4388 +# %bb.4387: # %if.then.i.i1088.i call _ZdlPv@plt -.LBB42_4386: # %ehcleanup420.i +.LBB42_4388: # %ehcleanup420.i ld a0, 616(s7) lui a1, 1 addiw a1, a1, 1136 add a1, sp, a1 - beq a0, a1, .LBB42_4388 -# %bb.4387: # %if.then.i.i1094.i + beq a0, a1, .LBB42_4390 +# %bb.4389: # %if.then.i.i1094.i call _ZdlPv@plt -.LBB42_4388: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit1098.i +.LBB42_4390: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit1098.i xori s0, s8, 1 -.LBB42_4389: # %ehcleanup423.i +.LBB42_4391: # %ehcleanup423.i ld a0, 648(s7) lui a1, 1 addiw a1, a1, 1168 add a1, sp, a1 - beq a0, a1, .LBB42_4391 -# %bb.4390: # %if.then.i.i1100.i + beq a0, a1, .LBB42_4393 +# %bb.4392: # %if.then.i.i1100.i call _ZdlPv@plt -.LBB42_4391: # %ehcleanup426.i +.LBB42_4393: # %ehcleanup426.i ld a0, 680(s7) lui a1, 1 addiw a1, a1, 1200 add a1, sp, a1 - beq a0, a1, .LBB42_4393 -# %bb.4392: # %if.then.i.i1106.i + beq a0, a1, .LBB42_4395 +# %bb.4394: # %if.then.i.i1106.i call _ZdlPv@plt -.LBB42_4393: # %ehcleanup429.i +.LBB42_4395: # %ehcleanup429.i ld a0, 712(s7) lui a1, 1 addiw a1, a1, 1232 add a1, sp, a1 - beq a0, a1, .LBB42_4395 -# %bb.4394: # %if.then.i.i1112.i + beq a0, a1, .LBB42_4397 +# %bb.4396: # %if.then.i.i1112.i call _ZdlPv@plt -.LBB42_4395: # %ehcleanup432.i +.LBB42_4397: # %ehcleanup432.i ld a0, 744(s7) lui a1, 1 addiw a1, a1, 1264 add a1, sp, a1 - beq a0, a1, .LBB42_4397 -# %bb.4396: # %if.then.i.i1118.i + beq a0, a1, .LBB42_4399 +# %bb.4398: # %if.then.i.i1118.i call _ZdlPv@plt -.LBB42_4397: # %ehcleanup435.i +.LBB42_4399: # %ehcleanup435.i ld a0, 776(s7) lui a1, 1 addiw a1, a1, 1296 add a1, sp, a1 - beq a0, a1, .LBB42_4399 -# %bb.4398: # %if.then.i.i1124.i + beq a0, a1, .LBB42_4401 +# %bb.4400: # %if.then.i.i1124.i call _ZdlPv@plt -.LBB42_4399: # %ehcleanup438.i +.LBB42_4401: # %ehcleanup438.i ld a0, 808(s7) lui a1, 1 addiw a1, a1, 1328 add a1, sp, a1 - beq a0, a1, .LBB42_4401 -# %bb.4400: # %if.then.i.i1130.i + beq a0, a1, .LBB42_4403 +# %bb.4402: # %if.then.i.i1130.i call _ZdlPv@plt -.LBB42_4401: # %ehcleanup441.i +.LBB42_4403: # %ehcleanup441.i ld a0, 840(s7) lui a1, 1 addiw a1, a1, 1360 add a1, sp, a1 - beq a0, a1, .LBB42_4403 -# %bb.4402: # %if.then.i.i1136.i + beq a0, a1, .LBB42_4405 +# %bb.4404: # %if.then.i.i1136.i call _ZdlPv@plt -.LBB42_4403: # %ehcleanup444.i +.LBB42_4405: # %ehcleanup444.i ld a0, 872(s7) lui a1, 1 addiw a1, a1, 1392 add a1, sp, a1 - beq a0, a1, .LBB42_4405 -# %bb.4404: # %if.then.i.i1142.i + beq a0, a1, .LBB42_4407 +# %bb.4406: # %if.then.i.i1142.i call _ZdlPv@plt -.LBB42_4405: # %ehcleanup447.i +.LBB42_4407: # %ehcleanup447.i ld a0, 904(s7) lui a1, 1 addiw a1, a1, 1424 add a1, sp, a1 - beq a0, a1, .LBB42_4407 -# %bb.4406: # %if.then.i.i1148.i + beq a0, a1, .LBB42_4409 +# %bb.4408: # %if.then.i.i1148.i call _ZdlPv@plt -.LBB42_4407: # %ehcleanup450.i +.LBB42_4409: # %ehcleanup450.i ld a0, 936(s7) lui a1, 1 addiw a1, a1, 1456 add a1, sp, a1 - beq a0, a1, .LBB42_4409 -# %bb.4408: # %if.then.i.i1154.i + beq a0, a1, .LBB42_4411 +# %bb.4410: # %if.then.i.i1154.i call _ZdlPv@plt -.LBB42_4409: # %ehcleanup453.i +.LBB42_4411: # %ehcleanup453.i ld a0, 968(s7) lui a1, 1 addiw a1, a1, 1488 add a1, sp, a1 - beq a0, a1, .LBB42_4411 -# %bb.4410: # %if.then.i.i1160.i + beq a0, a1, .LBB42_4413 +# %bb.4412: # %if.then.i.i1160.i call _ZdlPv@plt -.LBB42_4411: # %ehcleanup456.i +.LBB42_4413: # %ehcleanup456.i ld a0, 1000(s7) lui a1, 1 addiw a1, a1, 1520 add a1, sp, a1 - beq a0, a1, .LBB42_4413 -# %bb.4412: # %if.then.i.i1166.i + beq a0, a1, .LBB42_4415 +# %bb.4414: # %if.then.i.i1166.i call _ZdlPv@plt -.LBB42_4413: # %ehcleanup459.i +.LBB42_4415: # %ehcleanup459.i ld a0, 1032(s7) lui a1, 1 addiw a1, a1, 1552 add a1, sp, a1 - beq a0, a1, .LBB42_4415 -# %bb.4414: # %if.then.i.i1172.i + beq a0, a1, .LBB42_4417 +# %bb.4416: # %if.then.i.i1172.i call _ZdlPv@plt -.LBB42_4415: # %ehcleanup462.i +.LBB42_4417: # %ehcleanup462.i ld a0, 1064(s7) lui a1, 1 addiw a1, a1, 1584 add a1, sp, a1 - beq a0, a1, .LBB42_4417 -# %bb.4416: # %if.then.i.i1178.i + beq a0, a1, .LBB42_4419 +# %bb.4418: # %if.then.i.i1178.i call _ZdlPv@plt -.LBB42_4417: # %ehcleanup463.i +.LBB42_4419: # %ehcleanup463.i addi s1, sp, 552 xor a0, s1, s6 seqz a0, a0 or a0, s0, a0 - beqz a0, .LBB42_4418 - j .LBB42_5497 -.LBB42_4418: # %arraydestroy.body466.i + beqz a0, .LBB42_4420 + j .LBB42_5499 +.LBB42_4420: # %arraydestroy.body466.i # =>This Inner Loop Header: Depth=1 addi s6, s6, -88 mv a0, s6 call _ZN8TestCaseD2Ev - bne s6, s1, .LBB42_4418 - j .LBB42_5497 -.LBB42_4419: # %if.then.i.i944.i + bne s6, s1, .LBB42_4420 + j .LBB42_5499 +.LBB42_4421: # %if.then.i.i944.i call _ZdlPv@plt ld a0, 392(sp) addi a1, sp, 408 - beq a0, a1, .LBB42_4334 -.LBB42_4420: # %if.then.i.i950.i + beq a0, a1, .LBB42_4336 +.LBB42_4422: # %if.then.i.i950.i call _ZdlPv@plt ld a0, 424(sp) addi a1, sp, 440 - bne a0, a1, .LBB42_4335 - j .LBB42_4336 -.LBB42_4421: # %lpad301.i + bne a0, a1, .LBB42_4337 + j .LBB42_4338 +.LBB42_4423: # %lpad301.i .Ltmp3061: mv s2, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4324 -.LBB42_4422: # %lpad296.i + j .LBB42_4326 +.LBB42_4424: # %lpad296.i .Ltmp3058: sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4324 -.LBB42_4423: # %lpad289.i + j .LBB42_4326 +.LBB42_4425: # %lpad289.i .Ltmp3055: sd a0, 112(sp) # 8-byte Folded Spill ld a0, 296(sp) addi a1, sp, 312 - bne a0, a1, .LBB42_4327 - j .LBB42_4328 -.LBB42_4424: # %lpad287.i + bne a0, a1, .LBB42_4329 + j .LBB42_4330 +.LBB42_4426: # %lpad287.i .Ltmp3052: mv s10, s1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4329 -.LBB42_4425: # %lpad282.i + j .LBB42_4331 +.LBB42_4427: # %lpad282.i .Ltmp3049: sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4329 -.LBB42_4426: # %lpad280.i + j .LBB42_4331 +.LBB42_4428: # %lpad280.i .Ltmp3046: mv s2, s10 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4332 -.LBB42_4427: # %lpad275.i + j .LBB42_4334 +.LBB42_4429: # %lpad275.i .Ltmp3043: mv s2, s1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4332 -.LBB42_4428: # %lpad273.i + j .LBB42_4334 +.LBB42_4430: # %lpad273.i .Ltmp3040: mv s2, s1 sd a0, 112(sp) # 8-byte Folded Spill ld a0, 392(sp) addi a1, sp, 408 - beq a0, a1, .LBB42_4334 - j .LBB42_4420 -.LBB42_4429: # %lpad268.i + beq a0, a1, .LBB42_4336 + j .LBB42_4422 +.LBB42_4431: # %lpad268.i .Ltmp3037: sd a0, 112(sp) # 8-byte Folded Spill ld a0, 392(sp) addi a1, sp, 408 - beq a0, a1, .LBB42_4334 - j .LBB42_4420 -.LBB42_4430: # %lpad266.i + beq a0, a1, .LBB42_4336 + j .LBB42_4422 +.LBB42_4432: # %lpad266.i .Ltmp3034: sd a0, 112(sp) # 8-byte Folded Spill ld a0, 424(sp) addi a1, sp, 440 - bne a0, a1, .LBB42_4335 - j .LBB42_4336 -.LBB42_4431: # %lpad261.i + bne a0, a1, .LBB42_4337 + j .LBB42_4338 +.LBB42_4433: # %lpad261.i .Ltmp3031: mv s2, s9 sd a0, 112(sp) # 8-byte Folded Spill ld a0, 424(sp) addi a1, sp, 440 - bne a0, a1, .LBB42_4335 - j .LBB42_4336 -.LBB42_4432: # %lpad259.i + bne a0, a1, .LBB42_4337 + j .LBB42_4338 +.LBB42_4434: # %lpad259.i .Ltmp3028: li s8, 1 sd s9, 120(sp) # 8-byte Folded Spill sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4337 -.LBB42_4433: # %lpad254.i + j .LBB42_4339 +.LBB42_4435: # %lpad254.i .Ltmp3025: li s8, 1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4337 -.LBB42_4434: # %lpad252.i + j .LBB42_4339 +.LBB42_4436: # %lpad252.i .Ltmp3022: sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4340 -.LBB42_4435: # %lpad247.i + j .LBB42_4342 +.LBB42_4437: # %lpad247.i .Ltmp3019: mv s2, s1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4340 -.LBB42_4436: # %lpad245.i + j .LBB42_4342 +.LBB42_4438: # %lpad245.i .Ltmp3016: mv s2, s1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4342 -.LBB42_4437: # %lpad240.i + j .LBB42_4344 +.LBB42_4439: # %lpad240.i .Ltmp3013: mv s2, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4342 -.LBB42_4438: # %lpad238.i + j .LBB42_4344 +.LBB42_4440: # %lpad238.i .Ltmp3010: mv s2, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4344 -.LBB42_4439: # %lpad233.i + j .LBB42_4346 +.LBB42_4441: # %lpad233.i .Ltmp3007: mv s2, s4 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4344 -.LBB42_4440: # %lpad231.i + j .LBB42_4346 +.LBB42_4442: # %lpad231.i .Ltmp3004: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 sd s4, 128(sp) # 8-byte Folded Spill sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4347 -.LBB42_4441: # %lpad226.i + j .LBB42_4349 +.LBB42_4443: # %lpad226.i .Ltmp3001: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4347 -.LBB42_4442: # %lpad219.i + j .LBB42_4349 +.LBB42_4444: # %lpad219.i .Ltmp2998: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4350 -.LBB42_4443: # %lpad217.i + j .LBB42_4352 +.LBB42_4445: # %lpad217.i .Ltmp2995: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 sd s11, 136(sp) # 8-byte Folded Spill sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4353 -.LBB42_4444: # %lpad212.i + j .LBB42_4355 +.LBB42_4446: # %lpad212.i .Ltmp2992: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4353 -.LBB42_4445: # %lpad210.i + j .LBB42_4355 +.LBB42_4447: # %lpad210.i .Ltmp2989: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 mv s6, s11 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4356 -.LBB42_4446: # %lpad205.i + j .LBB42_4358 +.LBB42_4448: # %lpad205.i .Ltmp2986: mv s6, s1 lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4356 -.LBB42_4447: # %lpad203.i + j .LBB42_4358 +.LBB42_4449: # %lpad203.i .Ltmp2983: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 mv s6, s1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4358 -.LBB42_4448: # %lpad198.i + j .LBB42_4360 +.LBB42_4450: # %lpad198.i .Ltmp2980: mv s6, s2 lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4358 -.LBB42_4449: # %lpad196.i + j .LBB42_4360 +.LBB42_4451: # %lpad196.i .Ltmp2977: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 mv s6, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4360 -.LBB42_4450: # %lpad191.i + j .LBB42_4362 +.LBB42_4452: # %lpad191.i .Ltmp2974: mv s6, s10 lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4360 -.LBB42_4451: # %lpad189.i + j .LBB42_4362 +.LBB42_4453: # %lpad189.i .Ltmp2971: lui a1, 1 addiw a1, a1, 504 @@ -65991,8 +65982,8 @@ li s8, 1 mv s6, s10 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4362 -.LBB42_4452: # %lpad184.i + j .LBB42_4364 +.LBB42_4454: # %lpad184.i .Ltmp2968: mv s6, s9 lui a1, 1 @@ -66000,144 +65991,144 @@ add s7, sp, a1 li s8, 1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4362 -.LBB42_4453: # %lpad182.i + j .LBB42_4364 +.LBB42_4455: # %lpad182.i .Ltmp2965: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 mv s6, s9 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4364 -.LBB42_4454: # %lpad177.i + j .LBB42_4366 +.LBB42_4456: # %lpad177.i .Ltmp2962: mv s6, s5 lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4364 -.LBB42_4455: # %lpad175.i + j .LBB42_4366 +.LBB42_4457: # %lpad175.i .Ltmp2959: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 mv s6, s5 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4366 -.LBB42_4456: # %lpad170.i + j .LBB42_4368 +.LBB42_4458: # %lpad170.i .Ltmp2956: mv s6, s4 lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4366 -.LBB42_4457: # %lpad168.i + j .LBB42_4368 +.LBB42_4459: # %lpad168.i .Ltmp2953: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 mv s6, s4 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4368 -.LBB42_4458: # %lpad163.i + j .LBB42_4370 +.LBB42_4460: # %lpad163.i .Ltmp2950: mv s6, s1 lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4368 -.LBB42_4459: # %lpad161.i + j .LBB42_4370 +.LBB42_4461: # %lpad161.i .Ltmp2947: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 mv s6, s1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4370 -.LBB42_4460: # %lpad156.i + j .LBB42_4372 +.LBB42_4462: # %lpad156.i .Ltmp2944: mv s6, s2 lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4370 -.LBB42_4461: # %lpad149.i + j .LBB42_4372 +.LBB42_4463: # %lpad149.i .Ltmp2941: mv s6, s1 lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4372 -.LBB42_4462: # %lpad147.i + j .LBB42_4374 +.LBB42_4464: # %lpad147.i .Ltmp2938: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 mv s6, s1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4374 -.LBB42_4463: # %lpad142.i + j .LBB42_4376 +.LBB42_4465: # %lpad142.i .Ltmp2935: mv s6, s1 lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4374 -.LBB42_4464: # %lpad140.i + j .LBB42_4376 +.LBB42_4466: # %lpad140.i .Ltmp2932: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 mv s6, s1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4376 -.LBB42_4465: # %lpad135.i + j .LBB42_4378 +.LBB42_4467: # %lpad135.i .Ltmp2929: mv s6, s1 lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4376 -.LBB42_4466: # %lpad133.i + j .LBB42_4378 +.LBB42_4468: # %lpad133.i .Ltmp2926: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 mv s6, s1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4378 -.LBB42_4467: # %lpad128.i + j .LBB42_4380 +.LBB42_4469: # %lpad128.i .Ltmp2923: mv s6, s2 lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4378 -.LBB42_4468: # %lpad126.i + j .LBB42_4380 +.LBB42_4470: # %lpad126.i .Ltmp2920: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 mv s6, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4380 -.LBB42_4469: # %lpad121.i + j .LBB42_4382 +.LBB42_4471: # %lpad121.i .Ltmp2917: mv s6, s1 lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4380 -.LBB42_4470: # %lpad119.i + j .LBB42_4382 +.LBB42_4472: # %lpad119.i .Ltmp2914: lui a1, 1 addiw a1, a1, 504 @@ -66145,8 +66136,8 @@ li s8, 1 mv s6, s1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4382 -.LBB42_4471: # %lpad114.i + j .LBB42_4384 +.LBB42_4473: # %lpad114.i .Ltmp2911: mv s6, s2 lui a1, 1 @@ -66154,32 +66145,32 @@ add s7, sp, a1 li s8, 1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4382 -.LBB42_4472: # %lpad112.i + j .LBB42_4384 +.LBB42_4474: # %lpad112.i .Ltmp2908: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 mv s6, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4384 -.LBB42_4473: # %lpad107.i + j .LBB42_4386 +.LBB42_4475: # %lpad107.i .Ltmp2905: mv s6, s2 lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4384 -.LBB42_4474: # %lpad100.i + j .LBB42_4386 +.LBB42_4476: # %lpad100.i .Ltmp2902: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 mv s6, s1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4386 -.LBB42_4475: # %lpad98.i + j .LBB42_4388 +.LBB42_4477: # %lpad98.i .Ltmp2899: lui a1, 1 addiw a1, a1, 504 @@ -66187,8 +66178,8 @@ li s0, 0 mv s6, s1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4389 -.LBB42_4476: # %lpad93.i5957 + j .LBB42_4391 +.LBB42_4478: # %lpad93.i5957 .Ltmp2896: mv s6, s1 lui a1, 1 @@ -66196,8 +66187,8 @@ add s7, sp, a1 li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4389 -.LBB42_4477: # %lpad91.i + j .LBB42_4391 +.LBB42_4479: # %lpad91.i .Ltmp2893: lui a1, 1 addiw a1, a1, 504 @@ -66205,8 +66196,8 @@ li s0, 0 mv s6, s1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4391 -.LBB42_4478: # %lpad86.i5954 + j .LBB42_4393 +.LBB42_4480: # %lpad86.i5954 .Ltmp2890: mv s6, s2 lui a1, 1 @@ -66214,8 +66205,8 @@ add s7, sp, a1 li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4391 -.LBB42_4479: # %lpad84.i5953 + j .LBB42_4393 +.LBB42_4481: # %lpad84.i5953 .Ltmp2887: lui a1, 1 addiw a1, a1, 504 @@ -66223,8 +66214,8 @@ li s0, 0 mv s6, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4393 -.LBB42_4480: # %lpad79.i5950 + j .LBB42_4395 +.LBB42_4482: # %lpad79.i5950 .Ltmp2884: mv s6, s2 lui a1, 1 @@ -66232,8 +66223,8 @@ add s7, sp, a1 li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4393 -.LBB42_4481: # %lpad77.i5949 + j .LBB42_4395 +.LBB42_4483: # %lpad77.i5949 .Ltmp2881: lui a1, 1 addiw a1, a1, 504 @@ -66241,8 +66232,8 @@ li s0, 0 mv s6, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4395 -.LBB42_4482: # %lpad72.i5946 + j .LBB42_4397 +.LBB42_4484: # %lpad72.i5946 .Ltmp2878: mv s6, s2 lui a1, 1 @@ -66250,8 +66241,8 @@ add s7, sp, a1 li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4395 -.LBB42_4483: # %lpad70.i5945 + j .LBB42_4397 +.LBB42_4485: # %lpad70.i5945 .Ltmp2875: lui a1, 1 addiw a1, a1, 504 @@ -66259,8 +66250,8 @@ li s0, 0 mv s6, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4397 -.LBB42_4484: # %lpad65.i5942 + j .LBB42_4399 +.LBB42_4486: # %lpad65.i5942 .Ltmp2872: mv s6, s2 lui a1, 1 @@ -66268,8 +66259,8 @@ add s7, sp, a1 li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4397 -.LBB42_4485: # %lpad63.i5941 + j .LBB42_4399 +.LBB42_4487: # %lpad63.i5941 .Ltmp2869: lui a1, 1 addiw a1, a1, 504 @@ -66277,8 +66268,8 @@ li s0, 0 mv s6, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4399 -.LBB42_4486: # %lpad58.i5938 + j .LBB42_4401 +.LBB42_4488: # %lpad58.i5938 .Ltmp2866: mv s6, s2 lui a1, 1 @@ -66286,8 +66277,8 @@ add s7, sp, a1 li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4399 -.LBB42_4487: # %lpad56.i5937 + j .LBB42_4401 +.LBB42_4489: # %lpad56.i5937 .Ltmp2863: lui a1, 1 addiw a1, a1, 504 @@ -66295,8 +66286,8 @@ li s0, 0 mv s6, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4401 -.LBB42_4488: # %lpad51.i5934 + j .LBB42_4403 +.LBB42_4490: # %lpad51.i5934 .Ltmp2860: mv s6, s2 lui a1, 1 @@ -66304,8 +66295,8 @@ add s7, sp, a1 li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4401 -.LBB42_4489: # %lpad44.i5931 + j .LBB42_4403 +.LBB42_4491: # %lpad44.i5931 .Ltmp2857: mv s6, s2 lui a1, 1 @@ -66313,8 +66304,8 @@ add s7, sp, a1 li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4403 -.LBB42_4490: # %lpad42.i5930 + j .LBB42_4405 +.LBB42_4492: # %lpad42.i5930 .Ltmp2854: lui a1, 1 addiw a1, a1, 504 @@ -66322,8 +66313,8 @@ li s0, 0 mv s6, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4405 -.LBB42_4491: # %lpad37.i5927 + j .LBB42_4407 +.LBB42_4493: # %lpad37.i5927 .Ltmp2851: mv s6, s2 lui a1, 1 @@ -66331,8 +66322,8 @@ add s7, sp, a1 li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4405 -.LBB42_4492: # %lpad35.i5926 + j .LBB42_4407 +.LBB42_4494: # %lpad35.i5926 .Ltmp2848: lui a1, 1 addiw a1, a1, 504 @@ -66340,8 +66331,8 @@ li s0, 0 mv s6, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4407 -.LBB42_4493: # %lpad30.i5923 + j .LBB42_4409 +.LBB42_4495: # %lpad30.i5923 .Ltmp2845: mv s6, s2 lui a1, 1 @@ -66349,8 +66340,8 @@ add s7, sp, a1 li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4407 -.LBB42_4494: # %lpad28.i5922 + j .LBB42_4409 +.LBB42_4496: # %lpad28.i5922 .Ltmp2842: lui a1, 1 addiw a1, a1, 504 @@ -66358,8 +66349,8 @@ li s0, 0 mv s6, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4409 -.LBB42_4495: # %lpad23.i5919 + j .LBB42_4411 +.LBB42_4497: # %lpad23.i5919 .Ltmp2839: mv s6, s2 lui a1, 1 @@ -66367,8 +66358,8 @@ add s7, sp, a1 li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4409 -.LBB42_4496: # %lpad21.i5915 + j .LBB42_4411 +.LBB42_4498: # %lpad21.i5915 .Ltmp2836: lui a1, 1 addiw a1, a1, 504 @@ -66376,8 +66367,8 @@ li s0, 0 mv s6, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4411 -.LBB42_4497: # %lpad16.i5911 + j .LBB42_4413 +.LBB42_4499: # %lpad16.i5911 .Ltmp2833: mv s6, s2 lui a1, 1 @@ -66385,8 +66376,8 @@ add s7, sp, a1 li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4411 -.LBB42_4498: # %lpad14.i5907 + j .LBB42_4413 +.LBB42_4500: # %lpad14.i5907 .Ltmp2830: lui a1, 1 addiw a1, a1, 504 @@ -66394,28 +66385,28 @@ li s0, 0 mv s6, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4413 -.LBB42_4499: # %lpad9.i5903 + j .LBB42_4415 +.LBB42_4501: # %lpad9.i5903 .Ltmp2827: lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4413 -.LBB42_4500: # %lpad7.i5900 + j .LBB42_4415 +.LBB42_4502: # %lpad7.i5900 .Ltmp2824: - j .LBB42_4502 -.LBB42_4501: # %lpad3.i5894 + j .LBB42_4504 +.LBB42_4503: # %lpad3.i5894 .Ltmp2821: -.LBB42_4502: # %ehcleanup462.i +.LBB42_4504: # %ehcleanup462.i lui a1, 1 addiw a1, a1, 504 add s7, sp, a1 li s0, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4415 -.LBB42_4503: # %lpad32.i + j .LBB42_4417 +.LBB42_4505: # %lpad32.i .Ltmp2818: mv s0, a0 mv a0, s4 @@ -66430,85 +66421,85 @@ call _ZN8TestCaseD2Ev li s5, 1 sd s0, 112(sp) # 8-byte Folded Spill - j .LBB42_4505 -.LBB42_4504: # %lpad30.i5747 + j .LBB42_4507 +.LBB42_4506: # %lpad30.i5747 .Ltmp2815: li s5, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4505: # %ehcleanup.i5748 +.LBB42_4507: # %ehcleanup.i5748 ld a0, 936(s6) lui a1, 1 addiw a1, a1, 1456 add a1, sp, a1 - beq a0, a1, .LBB42_4507 -# %bb.4506: # %if.then.i.i88.i + beq a0, a1, .LBB42_4509 +# %bb.4508: # %if.then.i.i88.i call _ZdlPv@plt -.LBB42_4507: # %ehcleanup43.i +.LBB42_4509: # %ehcleanup43.i mv s3, s4 - j .LBB42_4511 -.LBB42_4508: # %lpad28.i5746 + j .LBB42_4513 +.LBB42_4510: # %lpad28.i5746 .Ltmp2812: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s5, 0 mv s3, s4 - j .LBB42_4510 -.LBB42_4509: # %lpad23.i5740 + j .LBB42_4512 +.LBB42_4511: # %lpad23.i5740 .Ltmp2809: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s5, 0 -.LBB42_4510: # %ehcleanup43.i +.LBB42_4512: # %ehcleanup43.i sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4511: # %ehcleanup43.i +.LBB42_4513: # %ehcleanup43.i ld a0, 968(s6) lui a1, 1 addiw a1, a1, 1488 add a1, sp, a1 - beq a0, a1, .LBB42_4513 -# %bb.4512: # %if.then.i.i94.i + beq a0, a1, .LBB42_4515 +# %bb.4514: # %if.then.i.i94.i call _ZdlPv@plt -.LBB42_4513: # %ehcleanup46.i +.LBB42_4515: # %ehcleanup46.i mv s2, s3 - j .LBB42_4517 -.LBB42_4514: # %lpad21.i5739 + j .LBB42_4519 +.LBB42_4516: # %lpad21.i5739 .Ltmp2806: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s5, 0 mv s2, s3 - j .LBB42_4516 -.LBB42_4515: # %lpad16.i5733 + j .LBB42_4518 +.LBB42_4517: # %lpad16.i5733 .Ltmp2803: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s5, 0 -.LBB42_4516: # %ehcleanup46.i +.LBB42_4518: # %ehcleanup46.i sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4517: # %ehcleanup46.i +.LBB42_4519: # %ehcleanup46.i ld a0, 1000(s6) lui a1, 1 addiw a1, a1, 1520 add a1, sp, a1 - beq a0, a1, .LBB42_4519 -# %bb.4518: # %if.then.i.i100.i + beq a0, a1, .LBB42_4521 +# %bb.4520: # %if.then.i.i100.i call _ZdlPv@plt -.LBB42_4519: # %ehcleanup49.i +.LBB42_4521: # %ehcleanup49.i mv s1, s2 -.LBB42_4520: # %ehcleanup49.i +.LBB42_4522: # %ehcleanup49.i ld a0, 1032(s6) lui a1, 1 addiw a1, a1, 1552 add a1, sp, a1 - beq a0, a1, .LBB42_4527 -# %bb.4521: # %if.then.i.i106.i5727 + beq a0, a1, .LBB42_4529 +# %bb.4523: # %if.then.i.i106.i5727 call _ZdlPv@plt - j .LBB42_4527 -.LBB42_4522: # %lpad14.i5732 + j .LBB42_4529 +.LBB42_4524: # %lpad14.i5732 .Ltmp2800: lui a1, 1 addiw a1, a1, 504 @@ -66516,52 +66507,52 @@ li s5, 0 mv s1, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4520 -.LBB42_4523: # %lpad9.i5722 + j .LBB42_4522 +.LBB42_4525: # %lpad9.i5722 .Ltmp2797: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s5, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4520 -.LBB42_4524: # %lpad7.i5721 + j .LBB42_4522 +.LBB42_4526: # %lpad7.i5721 .Ltmp2794: - j .LBB42_4526 -.LBB42_4525: # %lpad3.i5708 + j .LBB42_4528 +.LBB42_4527: # %lpad3.i5708 .Ltmp2791: -.LBB42_4526: # %ehcleanup52.i +.LBB42_4528: # %ehcleanup52.i lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s5, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4527: # %ehcleanup52.i +.LBB42_4529: # %ehcleanup52.i ld a0, 1064(s6) lui a1, 1 addiw a1, a1, 1584 add a1, sp, a1 - beq a0, a1, .LBB42_4529 -# %bb.4528: # %if.then.i.i112.i5713 + beq a0, a1, .LBB42_4531 +# %bb.4530: # %if.then.i.i112.i5713 call _ZdlPv@plt -.LBB42_4529: # %ehcleanup53.i +.LBB42_4531: # %ehcleanup53.i addi s0, sp, 552 xor a0, s0, s1 seqz a0, a0 or a0, s5, a0 - beqz a0, .LBB42_4530 - j .LBB42_5497 -.LBB42_4530: # %arraydestroy.body56.i + beqz a0, .LBB42_4532 + j .LBB42_5499 +.LBB42_4532: # %arraydestroy.body56.i # =>This Inner Loop Header: Depth=1 addi s1, s1, -88 mv a0, s1 call _ZN8TestCaseD2Ev - bne s1, s0, .LBB42_4530 - j .LBB42_5497 -.LBB42_4531: # %lpad.i5694 + bne s1, s0, .LBB42_4532 + j .LBB42_5499 +.LBB42_4533: # %lpad.i5694 .Ltmp2788: - j .LBB42_5163 -.LBB42_4532: # %lpad11.i5602 + j .LBB42_5165 +.LBB42_4534: # %lpad11.i5602 .Ltmp2785: mv s0, a0 mv a0, s1 @@ -66570,54 +66561,54 @@ call _ZN8TestCaseD2Ev li s2, 1 sd s0, 112(sp) # 8-byte Folded Spill - j .LBB42_4534 -.LBB42_4533: # %lpad9.i5590 + j .LBB42_4536 +.LBB42_4535: # %lpad9.i5590 .Ltmp2782: li s2, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4534: # %ehcleanup.i5591 +.LBB42_4536: # %ehcleanup.i5591 ld a0, 1032(s3) lui a1, 1 addiw a1, a1, 1552 add a1, sp, a1 - beq a0, a1, .LBB42_4539 -# %bb.4535: # %if.then.i.i28.i5595 + beq a0, a1, .LBB42_4541 +# %bb.4537: # %if.then.i.i28.i5595 call _ZdlPv@plt - j .LBB42_4539 -.LBB42_4536: # %lpad7.i5586 + j .LBB42_4541 +.LBB42_4538: # %lpad7.i5586 .Ltmp2779: - j .LBB42_4538 -.LBB42_4537: # %lpad3.i5566 + j .LBB42_4540 +.LBB42_4539: # %lpad3.i5566 .Ltmp2776: -.LBB42_4538: # %ehcleanup22.i5567 +.LBB42_4540: # %ehcleanup22.i5567 lui a1, 1 addiw a1, a1, 504 add s3, sp, a1 li s2, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4539: # %ehcleanup22.i5567 +.LBB42_4541: # %ehcleanup22.i5567 ld a0, 1064(s3) lui a1, 1 addiw a1, a1, 1584 add a1, sp, a1 - beq a0, a1, .LBB42_4541 -# %bb.4540: # %if.then.i.i34.i5572 + beq a0, a1, .LBB42_4543 +# %bb.4542: # %if.then.i.i34.i5572 call _ZdlPv@plt -.LBB42_4541: # %ehcleanup23.i5573 +.LBB42_4543: # %ehcleanup23.i5573 addi s0, sp, 552 xor a0, s0, s1 seqz a0, a0 or a0, s2, a0 - beqz a0, .LBB42_4542 - j .LBB42_5497 -.LBB42_4542: # %arraydestroy.body26.i5576 + beqz a0, .LBB42_4544 + j .LBB42_5499 +.LBB42_4544: # %arraydestroy.body26.i5576 # =>This Inner Loop Header: Depth=1 addi s1, s1, -88 mv a0, s1 call _ZN8TestCaseD2Ev - bne s1, s0, .LBB42_4542 - j .LBB42_5497 -.LBB42_4543: # %lpad3.i5541 + bne s1, s0, .LBB42_4544 + j .LBB42_5499 +.LBB42_4545: # %lpad3.i5541 .Ltmp2773: mv s0, a0 mv a0, s1 @@ -66627,17 +66618,17 @@ call _ZNSt4pairINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEES5_ED2Ev ld a0, 112(sp) # 8-byte Folded Reload call _Unwind_Resume@plt -.LBB42_4544: # %lpad.i5535 +.LBB42_4546: # %lpad.i5535 .Ltmp2770: sd a0, 112(sp) # 8-byte Folded Spill addi a0, sp, 552 call _ZNSt4pairINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEES5_ED2Ev ld a0, 112(sp) # 8-byte Folded Reload call _Unwind_Resume@plt -.LBB42_4545: # %lpad.i5527 +.LBB42_4547: # %lpad.i5527 .Ltmp2767: - j .LBB42_5163 -.LBB42_4546: # %lpad11.i + j .LBB42_5165 +.LBB42_4548: # %lpad11.i .Ltmp2764: mv s0, a0 mv a0, s1 @@ -66646,63 +66637,63 @@ call _ZN8TestCaseD2Ev li s2, 1 sd s0, 112(sp) # 8-byte Folded Spill - j .LBB42_4548 -.LBB42_4547: # %lpad9.i5439 + j .LBB42_4550 +.LBB42_4549: # %lpad9.i5439 .Ltmp2761: li s2, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4548: # %ehcleanup.i5440 +.LBB42_4550: # %ehcleanup.i5440 ld a0, 1032(s3) lui a1, 1 addiw a1, a1, 1552 add a1, sp, a1 - beq a0, a1, .LBB42_4553 -# %bb.4549: # %if.then.i.i28.i + beq a0, a1, .LBB42_4555 +# %bb.4551: # %if.then.i.i28.i call _ZdlPv@plt - j .LBB42_4553 -.LBB42_4550: # %lpad7.i5438 + j .LBB42_4555 +.LBB42_4552: # %lpad7.i5438 .Ltmp2758: - j .LBB42_4552 -.LBB42_4551: # %lpad3.i5428 + j .LBB42_4554 +.LBB42_4553: # %lpad3.i5428 .Ltmp2755: -.LBB42_4552: # %ehcleanup22.i +.LBB42_4554: # %ehcleanup22.i lui a1, 1 addiw a1, a1, 504 add s3, sp, a1 li s2, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4553: # %ehcleanup22.i +.LBB42_4555: # %ehcleanup22.i ld a0, 1064(s3) lui a1, 1 addiw a1, a1, 1584 add a1, sp, a1 - beq a0, a1, .LBB42_4555 -# %bb.4554: # %if.then.i.i34.i5432 + beq a0, a1, .LBB42_4557 +# %bb.4556: # %if.then.i.i34.i5432 call _ZdlPv@plt -.LBB42_4555: # %ehcleanup23.i +.LBB42_4557: # %ehcleanup23.i addi s0, sp, 552 xor a0, s0, s1 seqz a0, a0 or a0, s2, a0 - beqz a0, .LBB42_4556 - j .LBB42_5497 -.LBB42_4556: # %arraydestroy.body26.i + beqz a0, .LBB42_4558 + j .LBB42_5499 +.LBB42_4558: # %arraydestroy.body26.i # =>This Inner Loop Header: Depth=1 addi s1, s1, -88 mv a0, s1 call _ZN8TestCaseD2Ev - bne s1, s0, .LBB42_4556 - j .LBB42_5497 -.LBB42_4557: # %lpad.i5417 + bne s1, s0, .LBB42_4558 + j .LBB42_5499 +.LBB42_4559: # %lpad.i5417 .Ltmp2752: - j .LBB42_5163 -.LBB42_4558: # %lpad5.i5370 -.Ltmp2749: j .LBB42_5165 -.LBB42_4559: # %lpad3.i5358 +.LBB42_4560: # %lpad5.i5370 +.Ltmp2749: + j .LBB42_5167 +.LBB42_4561: # %lpad3.i5358 .Ltmp2746: - j .LBB42_5374 -.LBB42_4560: # %lpad88.i5230 + j .LBB42_5376 +.LBB42_4562: # %lpad88.i5230 .Ltmp2743: mv s2, a0 mv a0, s1 @@ -66733,171 +66724,171 @@ call _ZN8TestCaseD2Ev li s9, 1 sd s2, 112(sp) # 8-byte Folded Spill - j .LBB42_4562 -.LBB42_4561: # %lpad86.i5218 + j .LBB42_4564 +.LBB42_4563: # %lpad86.i5218 .Ltmp2740: li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4562: # %ehcleanup.i5219 +.LBB42_4564: # %ehcleanup.i5219 ld a0, 680(s6) lui a1, 1 addiw a1, a1, 1200 add a1, sp, a1 - beq a0, a1, .LBB42_4564 -# %bb.4563: # %if.then.i.i248.i5223 + beq a0, a1, .LBB42_4566 +# %bb.4565: # %if.then.i.i248.i5223 call _ZdlPv@plt -.LBB42_4564: # %ehcleanup99.i5206 +.LBB42_4566: # %ehcleanup99.i5206 mv s11, s1 - j .LBB42_4566 -.LBB42_4565: # %lpad79.i5205 + j .LBB42_4568 +.LBB42_4567: # %lpad79.i5205 .Ltmp2737: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4566: # %ehcleanup99.i5206 +.LBB42_4568: # %ehcleanup99.i5206 ld a0, 712(s6) lui a1, 1 addiw a1, a1, 1232 add a1, sp, a1 - beq a0, a1, .LBB42_4568 -# %bb.4567: # %if.then.i.i254.i5211 + beq a0, a1, .LBB42_4570 +# %bb.4569: # %if.then.i.i254.i5211 call _ZdlPv@plt -.LBB42_4568: # %ehcleanup102.i5190 +.LBB42_4570: # %ehcleanup102.i5190 mv s10, s11 - j .LBB42_4572 -.LBB42_4569: # %lpad77.i5201 + j .LBB42_4574 +.LBB42_4571: # %lpad77.i5201 .Ltmp2734: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 mv s10, s11 - j .LBB42_4571 -.LBB42_4570: # %lpad72.i5189 + j .LBB42_4573 +.LBB42_4572: # %lpad72.i5189 .Ltmp2731: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 -.LBB42_4571: # %ehcleanup102.i5190 +.LBB42_4573: # %ehcleanup102.i5190 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4572: # %ehcleanup102.i5190 +.LBB42_4574: # %ehcleanup102.i5190 ld a0, 744(s6) lui a1, 1 addiw a1, a1, 1264 add a1, sp, a1 - beq a0, a1, .LBB42_4574 -# %bb.4573: # %if.then.i.i260.i5195 + beq a0, a1, .LBB42_4576 +# %bb.4575: # %if.then.i.i260.i5195 call _ZdlPv@plt -.LBB42_4574: # %ehcleanup105.i5174 +.LBB42_4576: # %ehcleanup105.i5174 mv s8, s10 -.LBB42_4575: # %ehcleanup105.i5174 +.LBB42_4577: # %ehcleanup105.i5174 ld a0, 776(s6) lui a1, 1 addiw a1, a1, 1296 add a1, sp, a1 - beq a0, a1, .LBB42_4577 -# %bb.4576: # %if.then.i.i266.i5179 + beq a0, a1, .LBB42_4579 +# %bb.4578: # %if.then.i.i266.i5179 call _ZdlPv@plt -.LBB42_4577: # %ehcleanup108.i5158 +.LBB42_4579: # %ehcleanup108.i5158 mv s7, s8 -.LBB42_4578: # %ehcleanup108.i5158 +.LBB42_4580: # %ehcleanup108.i5158 ld a0, 808(s6) lui a1, 1 addiw a1, a1, 1328 add a1, sp, a1 - beq a0, a1, .LBB42_4580 -# %bb.4579: # %if.then.i.i272.i5163 + beq a0, a1, .LBB42_4582 +# %bb.4581: # %if.then.i.i272.i5163 call _ZdlPv@plt -.LBB42_4580: # %ehcleanup111.i5142 +.LBB42_4582: # %ehcleanup111.i5142 mv s5, s7 -.LBB42_4581: # %ehcleanup111.i5142 +.LBB42_4583: # %ehcleanup111.i5142 ld a0, 840(s6) lui a1, 1 addiw a1, a1, 1360 add a1, sp, a1 - beq a0, a1, .LBB42_4583 -# %bb.4582: # %if.then.i.i278.i5147 + beq a0, a1, .LBB42_4585 +# %bb.4584: # %if.then.i.i278.i5147 call _ZdlPv@plt -.LBB42_4583: # %ehcleanup114.i5129 +.LBB42_4585: # %ehcleanup114.i5129 mv s4, s5 -.LBB42_4584: # %ehcleanup114.i5129 +.LBB42_4586: # %ehcleanup114.i5129 ld a0, 872(s6) lui a1, 1 addiw a1, a1, 1392 add a1, sp, a1 - beq a0, a1, .LBB42_4586 -# %bb.4585: # %if.then.i.i284.i5134 + beq a0, a1, .LBB42_4588 +# %bb.4587: # %if.then.i.i284.i5134 call _ZdlPv@plt -.LBB42_4586: # %ehcleanup117.i5113 +.LBB42_4588: # %ehcleanup117.i5113 mv s3, s4 -.LBB42_4587: # %ehcleanup117.i5113 +.LBB42_4589: # %ehcleanup117.i5113 ld a0, 904(s6) lui a1, 1 addiw a1, a1, 1424 add a1, sp, a1 - beq a0, a1, .LBB42_4589 -# %bb.4588: # %if.then.i.i290.i5118 + beq a0, a1, .LBB42_4591 +# %bb.4590: # %if.then.i.i290.i5118 call _ZdlPv@plt -.LBB42_4589: # %ehcleanup120.i5097 +.LBB42_4591: # %ehcleanup120.i5097 mv s0, s3 -.LBB42_4590: # %ehcleanup120.i5097 +.LBB42_4592: # %ehcleanup120.i5097 ld a0, 936(s6) lui a1, 1 addiw a1, a1, 1456 add a1, sp, a1 - beq a0, a1, .LBB42_4592 -# %bb.4591: # %if.then.i.i296.i5102 + beq a0, a1, .LBB42_4594 +# %bb.4593: # %if.then.i.i296.i5102 call _ZdlPv@plt -.LBB42_4592: # %ehcleanup123.i5081 +.LBB42_4594: # %ehcleanup123.i5081 ld a0, 968(s6) lui a1, 1 addiw a1, a1, 1488 add a1, sp, a1 - beq a0, a1, .LBB42_4594 -# %bb.4593: # %if.then.i.i302.i5086 + beq a0, a1, .LBB42_4596 +# %bb.4595: # %if.then.i.i302.i5086 call _ZdlPv@plt -.LBB42_4594: # %ehcleanup126.i5065 +.LBB42_4596: # %ehcleanup126.i5065 ld a0, 1000(s6) lui a1, 1 addiw a1, a1, 1520 add a1, sp, a1 - beq a0, a1, .LBB42_4596 -# %bb.4595: # %if.then.i.i308.i5070 + beq a0, a1, .LBB42_4598 +# %bb.4597: # %if.then.i.i308.i5070 call _ZdlPv@plt -.LBB42_4596: # %ehcleanup129.i5049 +.LBB42_4598: # %ehcleanup129.i5049 ld a0, 1032(s6) lui a1, 1 addiw a1, a1, 1552 add a1, sp, a1 - beq a0, a1, .LBB42_4598 -# %bb.4597: # %if.then.i.i314.i5054 + beq a0, a1, .LBB42_4600 +# %bb.4599: # %if.then.i.i314.i5054 call _ZdlPv@plt -.LBB42_4598: # %ehcleanup132.i5025 +.LBB42_4600: # %ehcleanup132.i5025 ld a0, 1064(s6) lui a1, 1 addiw a1, a1, 1584 add a1, sp, a1 - beq a0, a1, .LBB42_4600 -# %bb.4599: # %if.then.i.i320.i5030 + beq a0, a1, .LBB42_4602 +# %bb.4601: # %if.then.i.i320.i5030 call _ZdlPv@plt -.LBB42_4600: # %ehcleanup133.i5031 +.LBB42_4602: # %ehcleanup133.i5031 addi s1, sp, 552 xor a0, s1, s0 seqz a0, a0 or a0, s9, a0 - beqz a0, .LBB42_4601 - j .LBB42_5497 -.LBB42_4601: # %arraydestroy.body136.i5034 + beqz a0, .LBB42_4603 + j .LBB42_5499 +.LBB42_4603: # %arraydestroy.body136.i5034 # =>This Inner Loop Header: Depth=1 addi s0, s0, -88 mv a0, s0 call _ZN8TestCaseD2Ev - bne s0, s1, .LBB42_4601 - j .LBB42_5497 -.LBB42_4602: # %lpad70.i5185 + bne s0, s1, .LBB42_4603 + j .LBB42_5499 +.LBB42_4604: # %lpad70.i5185 .Ltmp2728: lui a1, 1 addiw a1, a1, 504 @@ -66905,16 +66896,16 @@ li s9, 0 mv s8, s10 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4575 -.LBB42_4603: # %lpad65.i5173 + j .LBB42_4577 +.LBB42_4605: # %lpad65.i5173 .Ltmp2725: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4575 -.LBB42_4604: # %lpad63.i5169 + j .LBB42_4577 +.LBB42_4606: # %lpad63.i5169 .Ltmp2722: lui a1, 1 addiw a1, a1, 504 @@ -66922,16 +66913,16 @@ li s9, 0 mv s7, s8 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4578 -.LBB42_4605: # %lpad58.i5157 + j .LBB42_4580 +.LBB42_4607: # %lpad58.i5157 .Ltmp2719: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4578 -.LBB42_4606: # %lpad56.i5153 + j .LBB42_4580 +.LBB42_4608: # %lpad56.i5153 .Ltmp2716: lui a1, 1 addiw a1, a1, 504 @@ -66939,24 +66930,24 @@ li s9, 0 mv s5, s7 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4581 -.LBB42_4607: # %lpad51.i5141 + j .LBB42_4583 +.LBB42_4609: # %lpad51.i5141 .Ltmp2713: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4581 -.LBB42_4608: # %lpad44.i5128 + j .LBB42_4583 +.LBB42_4610: # %lpad44.i5128 .Ltmp2710: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4584 -.LBB42_4609: # %lpad42.i5124 + j .LBB42_4586 +.LBB42_4611: # %lpad42.i5124 .Ltmp2707: lui a1, 1 addiw a1, a1, 504 @@ -66964,16 +66955,16 @@ li s9, 0 mv s3, s4 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4587 -.LBB42_4610: # %lpad37.i5112 + j .LBB42_4589 +.LBB42_4612: # %lpad37.i5112 .Ltmp2704: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4587 -.LBB42_4611: # %lpad35.i5108 + j .LBB42_4589 +.LBB42_4613: # %lpad35.i5108 .Ltmp2701: lui a1, 1 addiw a1, a1, 504 @@ -66981,8 +66972,8 @@ li s9, 0 mv s0, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4590 -.LBB42_4612: # %lpad30.i5096 + j .LBB42_4592 +.LBB42_4614: # %lpad30.i5096 .Ltmp2698: mv s0, s1 lui a1, 1 @@ -66990,8 +66981,8 @@ add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4590 -.LBB42_4613: # %lpad28.i5092 + j .LBB42_4592 +.LBB42_4615: # %lpad28.i5092 .Ltmp2695: lui a1, 1 addiw a1, a1, 504 @@ -66999,8 +66990,8 @@ li s9, 0 mv s0, s1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4592 -.LBB42_4614: # %lpad23.i5080 + j .LBB42_4594 +.LBB42_4616: # %lpad23.i5080 .Ltmp2692: mv s0, s1 lui a1, 1 @@ -67008,8 +66999,8 @@ add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4592 -.LBB42_4615: # %lpad21.i5076 + j .LBB42_4594 +.LBB42_4617: # %lpad21.i5076 .Ltmp2689: lui a1, 1 addiw a1, a1, 504 @@ -67017,8 +67008,8 @@ li s9, 0 mv s0, s1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4594 -.LBB42_4616: # %lpad16.i5064 + j .LBB42_4596 +.LBB42_4618: # %lpad16.i5064 .Ltmp2686: mv s0, s3 lui a1, 1 @@ -67026,8 +67017,8 @@ add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4594 -.LBB42_4617: # %lpad14.i5060 + j .LBB42_4596 +.LBB42_4619: # %lpad14.i5060 .Ltmp2683: lui a1, 1 addiw a1, a1, 504 @@ -67035,51 +67026,51 @@ li s9, 0 mv s0, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4596 -.LBB42_4618: # %lpad9.i5048 + j .LBB42_4598 +.LBB42_4620: # %lpad9.i5048 .Ltmp2680: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4596 -.LBB42_4619: # %lpad7.i5044 + j .LBB42_4598 +.LBB42_4621: # %lpad7.i5044 .Ltmp2677: - j .LBB42_4621 -.LBB42_4620: # %lpad3.i5024 + j .LBB42_4623 +.LBB42_4622: # %lpad3.i5024 .Ltmp2674: -.LBB42_4621: # %ehcleanup132.i5025 +.LBB42_4623: # %ehcleanup132.i5025 lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4598 -.LBB42_4622: # %lpad5.i4950 + j .LBB42_4600 +.LBB42_4624: # %lpad5.i4950 .Ltmp2671: - j .LBB42_5165 -.LBB42_4623: # %lpad3.i4938 + j .LBB42_5167 +.LBB42_4625: # %lpad3.i4938 .Ltmp2668: - j .LBB42_5374 -.LBB42_4624: # %lpad5.i4920 + j .LBB42_5376 +.LBB42_4626: # %lpad5.i4920 .Ltmp2665: ld a1, 552(sp) sd a0, 112(sp) # 8-byte Folded Spill - beq a1, s2, .LBB42_5591 - j .LBB42_5461 -.LBB42_5591: # %lpad5.i4920 - j .LBB42_5497 -.LBB42_4625: # %lpad.i4911 + beq a1, s2, .LBB42_5593 + j .LBB42_5463 +.LBB42_5593: # %lpad5.i4920 + j .LBB42_5499 +.LBB42_4627: # %lpad.i4911 .Ltmp2662: - j .LBB42_5163 -.LBB42_4626: # %lpad5.i4863 -.Ltmp2659: j .LBB42_5165 -.LBB42_4627: # %lpad3.i4851 +.LBB42_4628: # %lpad5.i4863 +.Ltmp2659: + j .LBB42_5167 +.LBB42_4629: # %lpad3.i4851 .Ltmp2656: - j .LBB42_5374 -.LBB42_4628: # %lpad53.i4753 + j .LBB42_5376 +.LBB42_4630: # %lpad53.i4753 .Ltmp2653: mv s5, a0 mv a0, s7 @@ -67100,106 +67091,106 @@ call _ZN8TestCaseD2Ev li s8, 1 sd s5, 112(sp) # 8-byte Folded Spill - j .LBB42_4630 -.LBB42_4629: # %lpad51.i4741 + j .LBB42_4632 +.LBB42_4631: # %lpad51.i4741 .Ltmp2650: li s8, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4630: # %ehcleanup.i4742 +.LBB42_4632: # %ehcleanup.i4742 ld a0, 840(s9) lui a1, 1 addiw a1, a1, 1360 add a1, sp, a1 - beq a0, a1, .LBB42_4632 -# %bb.4631: # %if.then.i.i148.i4746 + beq a0, a1, .LBB42_4634 +# %bb.4633: # %if.then.i.i148.i4746 call _ZdlPv@plt -.LBB42_4632: # %ehcleanup64.i4729 +.LBB42_4634: # %ehcleanup64.i4729 mv s6, s7 - j .LBB42_4634 -.LBB42_4633: # %lpad44.i4728 + j .LBB42_4636 +.LBB42_4635: # %lpad44.i4728 .Ltmp2647: lui a1, 1 addiw a1, a1, 504 add s9, sp, a1 li s8, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4634: # %ehcleanup64.i4729 +.LBB42_4636: # %ehcleanup64.i4729 ld a0, 872(s9) lui a1, 1 addiw a1, a1, 1392 add a1, sp, a1 - beq a0, a1, .LBB42_4636 -# %bb.4635: # %if.then.i.i154.i4734 + beq a0, a1, .LBB42_4638 +# %bb.4637: # %if.then.i.i154.i4734 call _ZdlPv@plt -.LBB42_4636: # %ehcleanup67.i4713 +.LBB42_4638: # %ehcleanup67.i4713 mv s4, s6 - j .LBB42_4640 -.LBB42_4637: # %lpad42.i4724 + j .LBB42_4642 +.LBB42_4639: # %lpad42.i4724 .Ltmp2644: lui a1, 1 addiw a1, a1, 504 add s9, sp, a1 li s8, 0 mv s4, s6 - j .LBB42_4639 -.LBB42_4638: # %lpad37.i4712 + j .LBB42_4641 +.LBB42_4640: # %lpad37.i4712 .Ltmp2641: lui a1, 1 addiw a1, a1, 504 add s9, sp, a1 li s8, 0 -.LBB42_4639: # %ehcleanup67.i4713 +.LBB42_4641: # %ehcleanup67.i4713 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4640: # %ehcleanup67.i4713 +.LBB42_4642: # %ehcleanup67.i4713 ld a0, 904(s9) lui a1, 1 addiw a1, a1, 1424 add a1, sp, a1 - beq a0, a1, .LBB42_4642 -# %bb.4641: # %if.then.i.i160.i4718 + beq a0, a1, .LBB42_4644 +# %bb.4643: # %if.then.i.i160.i4718 call _ZdlPv@plt -.LBB42_4642: # %ehcleanup70.i4697 +.LBB42_4644: # %ehcleanup70.i4697 mv s3, s4 -.LBB42_4643: # %ehcleanup70.i4697 +.LBB42_4645: # %ehcleanup70.i4697 ld a0, 936(s9) lui a1, 1 addiw a1, a1, 1456 add a1, sp, a1 - beq a0, a1, .LBB42_4645 -# %bb.4644: # %if.then.i.i166.i4702 + beq a0, a1, .LBB42_4647 +# %bb.4646: # %if.then.i.i166.i4702 call _ZdlPv@plt -.LBB42_4645: # %ehcleanup73.i4681 +.LBB42_4647: # %ehcleanup73.i4681 mv s2, s3 -.LBB42_4646: # %ehcleanup73.i4681 +.LBB42_4648: # %ehcleanup73.i4681 ld a0, 968(s9) lui a1, 1 addiw a1, a1, 1488 add a1, sp, a1 - beq a0, a1, .LBB42_4648 -# %bb.4647: # %if.then.i.i172.i4686 + beq a0, a1, .LBB42_4650 +# %bb.4649: # %if.then.i.i172.i4686 call _ZdlPv@plt -.LBB42_4648: # %ehcleanup76.i4665 +.LBB42_4650: # %ehcleanup76.i4665 mv s1, s2 -.LBB42_4649: # %ehcleanup76.i4665 +.LBB42_4651: # %ehcleanup76.i4665 ld a0, 1000(s9) lui a1, 1 addiw a1, a1, 1520 add a1, sp, a1 - beq a0, a1, .LBB42_4651 -# %bb.4650: # %if.then.i.i178.i4670 + beq a0, a1, .LBB42_4653 +# %bb.4652: # %if.then.i.i178.i4670 call _ZdlPv@plt -.LBB42_4651: # %ehcleanup79.i4649 +.LBB42_4653: # %ehcleanup79.i4649 mv s0, s1 -.LBB42_4652: # %ehcleanup79.i4649 +.LBB42_4654: # %ehcleanup79.i4649 ld a0, 1032(s9) lui a1, 1 addiw a1, a1, 1552 add a1, sp, a1 - beq a0, a1, .LBB42_4665 -# %bb.4653: # %if.then.i.i184.i4654 + beq a0, a1, .LBB42_4667 +# %bb.4655: # %if.then.i.i184.i4654 call _ZdlPv@plt - j .LBB42_4665 -.LBB42_4654: # %lpad35.i4708 + j .LBB42_4667 +.LBB42_4656: # %lpad35.i4708 .Ltmp2638: lui a1, 1 addiw a1, a1, 504 @@ -67207,16 +67198,16 @@ li s8, 0 mv s3, s4 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4643 -.LBB42_4655: # %lpad30.i4696 + j .LBB42_4645 +.LBB42_4657: # %lpad30.i4696 .Ltmp2635: lui a1, 1 addiw a1, a1, 504 add s9, sp, a1 li s8, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4643 -.LBB42_4656: # %lpad28.i4692 + j .LBB42_4645 +.LBB42_4658: # %lpad28.i4692 .Ltmp2632: lui a1, 1 addiw a1, a1, 504 @@ -67224,16 +67215,16 @@ li s8, 0 mv s2, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4646 -.LBB42_4657: # %lpad23.i4680 + j .LBB42_4648 +.LBB42_4659: # %lpad23.i4680 .Ltmp2629: lui a1, 1 addiw a1, a1, 504 add s9, sp, a1 li s8, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4646 -.LBB42_4658: # %lpad21.i4676 + j .LBB42_4648 +.LBB42_4660: # %lpad21.i4676 .Ltmp2626: lui a1, 1 addiw a1, a1, 504 @@ -67241,16 +67232,16 @@ li s8, 0 mv s1, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4649 -.LBB42_4659: # %lpad16.i4664 + j .LBB42_4651 +.LBB42_4661: # %lpad16.i4664 .Ltmp2623: lui a1, 1 addiw a1, a1, 504 add s9, sp, a1 li s8, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4649 -.LBB42_4660: # %lpad14.i4660 + j .LBB42_4651 +.LBB42_4662: # %lpad14.i4660 .Ltmp2620: lui a1, 1 addiw a1, a1, 504 @@ -67258,55 +67249,55 @@ li s8, 0 mv s0, s1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4652 -.LBB42_4661: # %lpad9.i4648 + j .LBB42_4654 +.LBB42_4663: # %lpad9.i4648 .Ltmp2617: lui a1, 1 addiw a1, a1, 504 add s9, sp, a1 li s8, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4652 -.LBB42_4662: # %lpad7.i4644 + j .LBB42_4654 +.LBB42_4664: # %lpad7.i4644 .Ltmp2614: - j .LBB42_4664 -.LBB42_4663: # %lpad3.i4624 + j .LBB42_4666 +.LBB42_4665: # %lpad3.i4624 .Ltmp2611: -.LBB42_4664: # %ehcleanup82.i4625 +.LBB42_4666: # %ehcleanup82.i4625 lui a1, 1 addiw a1, a1, 504 add s9, sp, a1 li s8, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4665: # %ehcleanup82.i4625 +.LBB42_4667: # %ehcleanup82.i4625 ld a0, 1064(s9) lui a1, 1 addiw a1, a1, 1584 add a1, sp, a1 - beq a0, a1, .LBB42_4667 -# %bb.4666: # %if.then.i.i190.i4630 + beq a0, a1, .LBB42_4669 +# %bb.4668: # %if.then.i.i190.i4630 call _ZdlPv@plt -.LBB42_4667: # %ehcleanup83.i4631 +.LBB42_4669: # %ehcleanup83.i4631 addi s1, sp, 552 xor a0, s1, s0 seqz a0, a0 or a0, s8, a0 - beqz a0, .LBB42_4668 - j .LBB42_5497 -.LBB42_4668: # %arraydestroy.body86.i4634 + beqz a0, .LBB42_4670 + j .LBB42_5499 +.LBB42_4670: # %arraydestroy.body86.i4634 # =>This Inner Loop Header: Depth=1 addi s0, s0, -88 mv a0, s0 call _ZN8TestCaseD2Ev - bne s0, s1, .LBB42_4668 - j .LBB42_5497 -.LBB42_4669: # %lpad5.i4559 + bne s0, s1, .LBB42_4670 + j .LBB42_5499 +.LBB42_4671: # %lpad5.i4559 .Ltmp2608: - j .LBB42_5165 -.LBB42_4670: # %lpad3.i4547 + j .LBB42_5167 +.LBB42_4672: # %lpad3.i4547 .Ltmp2605: - j .LBB42_5374 -.LBB42_4671: # %lpad29.i + j .LBB42_5376 +.LBB42_4673: # %lpad29.i .Ltmp2602: lui a1, 1 addiw a1, a1, 504 @@ -67318,36 +67309,36 @@ call _ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EED2Ev sd s0, 112(sp) # 8-byte Folded Spill ld a0, 616(sp) - bne a0, s5, .LBB42_5592 - j .LBB42_5453 -.LBB42_5592: # %lpad29.i - j .LBB42_5457 -.LBB42_4672: # %lpad6.i + bne a0, s5, .LBB42_5594 + j .LBB42_5455 +.LBB42_5594: # %lpad29.i + j .LBB42_5459 +.LBB42_4674: # %lpad6.i .Ltmp2594: lui a1, 1 addiw a1, a1, 504 add s2, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill ld a0, 1064(s2) - beqz a0, .LBB42_5593 - j .LBB42_5498 -.LBB42_5593: # %lpad6.i - j .LBB42_5497 -.LBB42_4673: # %lpad.i.i + beqz a0, .LBB42_5595 + j .LBB42_5500 +.LBB42_5595: # %lpad6.i + j .LBB42_5499 +.LBB42_4675: # %lpad.i.i .Ltmp2591: sd a0, 112(sp) # 8-byte Folded Spill ld a0, 112(sp) # 8-byte Folded Reload call _Unwind_Resume@plt -.LBB42_4674: # %lpad.i4516 +.LBB42_4676: # %lpad.i4516 .Ltmp2588: - j .LBB42_5163 -.LBB42_4675: # %lpad5.i4468 -.Ltmp2585: j .LBB42_5165 -.LBB42_4676: # %lpad3.i4456 +.LBB42_4677: # %lpad5.i4468 +.Ltmp2585: + j .LBB42_5167 +.LBB42_4678: # %lpad3.i4456 .Ltmp2582: - j .LBB42_5374 -.LBB42_4677: # %lpad53.i4358 + j .LBB42_5376 +.LBB42_4679: # %lpad53.i4358 .Ltmp2579: mv s5, a0 mv a0, s7 @@ -67368,106 +67359,106 @@ call _ZN8TestCaseD2Ev li s8, 1 sd s5, 112(sp) # 8-byte Folded Spill - j .LBB42_4679 -.LBB42_4678: # %lpad51.i4346 + j .LBB42_4681 +.LBB42_4680: # %lpad51.i4346 .Ltmp2576: li s8, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4679: # %ehcleanup.i4347 +.LBB42_4681: # %ehcleanup.i4347 ld a0, 840(s9) lui a1, 1 addiw a1, a1, 1360 add a1, sp, a1 - beq a0, a1, .LBB42_4681 -# %bb.4680: # %if.then.i.i148.i4351 + beq a0, a1, .LBB42_4683 +# %bb.4682: # %if.then.i.i148.i4351 call _ZdlPv@plt -.LBB42_4681: # %ehcleanup64.i4334 +.LBB42_4683: # %ehcleanup64.i4334 mv s6, s7 - j .LBB42_4683 -.LBB42_4682: # %lpad44.i4333 + j .LBB42_4685 +.LBB42_4684: # %lpad44.i4333 .Ltmp2573: lui a1, 1 addiw a1, a1, 504 add s9, sp, a1 li s8, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4683: # %ehcleanup64.i4334 +.LBB42_4685: # %ehcleanup64.i4334 ld a0, 872(s9) lui a1, 1 addiw a1, a1, 1392 add a1, sp, a1 - beq a0, a1, .LBB42_4685 -# %bb.4684: # %if.then.i.i154.i4339 + beq a0, a1, .LBB42_4687 +# %bb.4686: # %if.then.i.i154.i4339 call _ZdlPv@plt -.LBB42_4685: # %ehcleanup67.i4318 +.LBB42_4687: # %ehcleanup67.i4318 mv s4, s6 - j .LBB42_4689 -.LBB42_4686: # %lpad42.i4329 + j .LBB42_4691 +.LBB42_4688: # %lpad42.i4329 .Ltmp2570: lui a1, 1 addiw a1, a1, 504 add s9, sp, a1 li s8, 0 mv s4, s6 - j .LBB42_4688 -.LBB42_4687: # %lpad37.i4317 + j .LBB42_4690 +.LBB42_4689: # %lpad37.i4317 .Ltmp2567: lui a1, 1 addiw a1, a1, 504 add s9, sp, a1 li s8, 0 -.LBB42_4688: # %ehcleanup67.i4318 +.LBB42_4690: # %ehcleanup67.i4318 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4689: # %ehcleanup67.i4318 +.LBB42_4691: # %ehcleanup67.i4318 ld a0, 904(s9) lui a1, 1 addiw a1, a1, 1424 add a1, sp, a1 - beq a0, a1, .LBB42_4691 -# %bb.4690: # %if.then.i.i160.i4323 + beq a0, a1, .LBB42_4693 +# %bb.4692: # %if.then.i.i160.i4323 call _ZdlPv@plt -.LBB42_4691: # %ehcleanup70.i4302 +.LBB42_4693: # %ehcleanup70.i4302 mv s3, s4 -.LBB42_4692: # %ehcleanup70.i4302 +.LBB42_4694: # %ehcleanup70.i4302 ld a0, 936(s9) lui a1, 1 addiw a1, a1, 1456 add a1, sp, a1 - beq a0, a1, .LBB42_4694 -# %bb.4693: # %if.then.i.i166.i4307 + beq a0, a1, .LBB42_4696 +# %bb.4695: # %if.then.i.i166.i4307 call _ZdlPv@plt -.LBB42_4694: # %ehcleanup73.i4286 +.LBB42_4696: # %ehcleanup73.i4286 mv s2, s3 -.LBB42_4695: # %ehcleanup73.i4286 +.LBB42_4697: # %ehcleanup73.i4286 ld a0, 968(s9) lui a1, 1 addiw a1, a1, 1488 add a1, sp, a1 - beq a0, a1, .LBB42_4697 -# %bb.4696: # %if.then.i.i172.i4291 + beq a0, a1, .LBB42_4699 +# %bb.4698: # %if.then.i.i172.i4291 call _ZdlPv@plt -.LBB42_4697: # %ehcleanup76.i4270 +.LBB42_4699: # %ehcleanup76.i4270 mv s1, s2 -.LBB42_4698: # %ehcleanup76.i4270 +.LBB42_4700: # %ehcleanup76.i4270 ld a0, 1000(s9) lui a1, 1 addiw a1, a1, 1520 add a1, sp, a1 - beq a0, a1, .LBB42_4700 -# %bb.4699: # %if.then.i.i178.i4275 + beq a0, a1, .LBB42_4702 +# %bb.4701: # %if.then.i.i178.i4275 call _ZdlPv@plt -.LBB42_4700: # %ehcleanup79.i4254 +.LBB42_4702: # %ehcleanup79.i4254 mv s0, s1 -.LBB42_4701: # %ehcleanup79.i4254 +.LBB42_4703: # %ehcleanup79.i4254 ld a0, 1032(s9) lui a1, 1 addiw a1, a1, 1552 add a1, sp, a1 - beq a0, a1, .LBB42_4714 -# %bb.4702: # %if.then.i.i184.i4259 + beq a0, a1, .LBB42_4716 +# %bb.4704: # %if.then.i.i184.i4259 call _ZdlPv@plt - j .LBB42_4714 -.LBB42_4703: # %lpad35.i4313 + j .LBB42_4716 +.LBB42_4705: # %lpad35.i4313 .Ltmp2564: lui a1, 1 addiw a1, a1, 504 @@ -67475,16 +67466,16 @@ li s8, 0 mv s3, s4 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4692 -.LBB42_4704: # %lpad30.i4301 + j .LBB42_4694 +.LBB42_4706: # %lpad30.i4301 .Ltmp2561: lui a1, 1 addiw a1, a1, 504 add s9, sp, a1 li s8, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4692 -.LBB42_4705: # %lpad28.i4297 + j .LBB42_4694 +.LBB42_4707: # %lpad28.i4297 .Ltmp2558: lui a1, 1 addiw a1, a1, 504 @@ -67492,16 +67483,16 @@ li s8, 0 mv s2, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4695 -.LBB42_4706: # %lpad23.i4285 + j .LBB42_4697 +.LBB42_4708: # %lpad23.i4285 .Ltmp2555: lui a1, 1 addiw a1, a1, 504 add s9, sp, a1 li s8, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4695 -.LBB42_4707: # %lpad21.i4281 + j .LBB42_4697 +.LBB42_4709: # %lpad21.i4281 .Ltmp2552: lui a1, 1 addiw a1, a1, 504 @@ -67509,16 +67500,16 @@ li s8, 0 mv s1, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4698 -.LBB42_4708: # %lpad16.i4269 + j .LBB42_4700 +.LBB42_4710: # %lpad16.i4269 .Ltmp2549: lui a1, 1 addiw a1, a1, 504 add s9, sp, a1 li s8, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4698 -.LBB42_4709: # %lpad14.i4265 + j .LBB42_4700 +.LBB42_4711: # %lpad14.i4265 .Ltmp2546: lui a1, 1 addiw a1, a1, 504 @@ -67526,64 +67517,64 @@ li s8, 0 mv s0, s1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4701 -.LBB42_4710: # %lpad9.i4253 + j .LBB42_4703 +.LBB42_4712: # %lpad9.i4253 .Ltmp2543: lui a1, 1 addiw a1, a1, 504 add s9, sp, a1 li s8, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4701 -.LBB42_4711: # %lpad7.i4249 + j .LBB42_4703 +.LBB42_4713: # %lpad7.i4249 .Ltmp2540: - j .LBB42_4713 -.LBB42_4712: # %lpad3.i4229 + j .LBB42_4715 +.LBB42_4714: # %lpad3.i4229 .Ltmp2537: -.LBB42_4713: # %ehcleanup82.i4230 +.LBB42_4715: # %ehcleanup82.i4230 lui a1, 1 addiw a1, a1, 504 add s9, sp, a1 li s8, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4714: # %ehcleanup82.i4230 +.LBB42_4716: # %ehcleanup82.i4230 ld a0, 1064(s9) lui a1, 1 addiw a1, a1, 1584 add a1, sp, a1 - beq a0, a1, .LBB42_4716 -# %bb.4715: # %if.then.i.i190.i4235 + beq a0, a1, .LBB42_4718 +# %bb.4717: # %if.then.i.i190.i4235 call _ZdlPv@plt -.LBB42_4716: # %ehcleanup83.i4236 +.LBB42_4718: # %ehcleanup83.i4236 addi s1, sp, 552 xor a0, s1, s0 seqz a0, a0 or a0, s8, a0 - beqz a0, .LBB42_4717 - j .LBB42_5497 -.LBB42_4717: # %arraydestroy.body86.i4239 + beqz a0, .LBB42_4719 + j .LBB42_5499 +.LBB42_4719: # %arraydestroy.body86.i4239 # =>This Inner Loop Header: Depth=1 addi s0, s0, -88 mv a0, s0 call _ZN8TestCaseD2Ev - bne s0, s1, .LBB42_4717 - j .LBB42_5497 -.LBB42_4718: # %lpad5.i4164 + bne s0, s1, .LBB42_4719 + j .LBB42_5499 +.LBB42_4720: # %lpad5.i4164 .Ltmp2534: - j .LBB42_5165 -.LBB42_4719: # %lpad3.i4152 + j .LBB42_5167 +.LBB42_4721: # %lpad3.i4152 .Ltmp2531: - j .LBB42_5374 -.LBB42_4720: # %lpad.i4133 + j .LBB42_5376 +.LBB42_4722: # %lpad.i4133 .Ltmp2523: - j .LBB42_5163 -.LBB42_4721: # %lpad5.i4085 -.Ltmp2520: j .LBB42_5165 -.LBB42_4722: # %lpad3.i4073 +.LBB42_4723: # %lpad5.i4085 +.Ltmp2520: + j .LBB42_5167 +.LBB42_4724: # %lpad3.i4073 .Ltmp2517: - j .LBB42_5374 -.LBB42_4723: # %lpad53.i + j .LBB42_5376 +.LBB42_4725: # %lpad53.i .Ltmp2514: mv s5, a0 mv a0, s7 @@ -67604,106 +67595,106 @@ call _ZN8TestCaseD2Ev li s8, 1 sd s5, 112(sp) # 8-byte Folded Spill - j .LBB42_4725 -.LBB42_4724: # %lpad51.i4014 + j .LBB42_4727 +.LBB42_4726: # %lpad51.i4014 .Ltmp2511: li s8, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4725: # %ehcleanup.i4015 +.LBB42_4727: # %ehcleanup.i4015 ld a0, 840(s9) lui a1, 1 addiw a1, a1, 1360 add a1, sp, a1 - beq a0, a1, .LBB42_4727 -# %bb.4726: # %if.then.i.i148.i + beq a0, a1, .LBB42_4729 +# %bb.4728: # %if.then.i.i148.i call _ZdlPv@plt -.LBB42_4727: # %ehcleanup64.i +.LBB42_4729: # %ehcleanup64.i mv s6, s7 - j .LBB42_4729 -.LBB42_4728: # %lpad44.i4006 + j .LBB42_4731 +.LBB42_4730: # %lpad44.i4006 .Ltmp2508: lui a1, 1 addiw a1, a1, 504 add s9, sp, a1 li s8, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4729: # %ehcleanup64.i +.LBB42_4731: # %ehcleanup64.i ld a0, 872(s9) lui a1, 1 addiw a1, a1, 1392 add a1, sp, a1 - beq a0, a1, .LBB42_4731 -# %bb.4730: # %if.then.i.i154.i + beq a0, a1, .LBB42_4733 +# %bb.4732: # %if.then.i.i154.i call _ZdlPv@plt -.LBB42_4731: # %ehcleanup67.i +.LBB42_4733: # %ehcleanup67.i mv s4, s6 - j .LBB42_4735 -.LBB42_4732: # %lpad42.i4002 + j .LBB42_4737 +.LBB42_4734: # %lpad42.i4002 .Ltmp2505: lui a1, 1 addiw a1, a1, 504 add s9, sp, a1 li s8, 0 mv s4, s6 - j .LBB42_4734 -.LBB42_4733: # %lpad37.i3995 + j .LBB42_4736 +.LBB42_4735: # %lpad37.i3995 .Ltmp2502: lui a1, 1 addiw a1, a1, 504 add s9, sp, a1 li s8, 0 -.LBB42_4734: # %ehcleanup67.i +.LBB42_4736: # %ehcleanup67.i sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4735: # %ehcleanup67.i +.LBB42_4737: # %ehcleanup67.i ld a0, 904(s9) lui a1, 1 addiw a1, a1, 1424 add a1, sp, a1 - beq a0, a1, .LBB42_4737 -# %bb.4736: # %if.then.i.i160.i + beq a0, a1, .LBB42_4739 +# %bb.4738: # %if.then.i.i160.i call _ZdlPv@plt -.LBB42_4737: # %ehcleanup70.i +.LBB42_4739: # %ehcleanup70.i mv s3, s4 -.LBB42_4738: # %ehcleanup70.i +.LBB42_4740: # %ehcleanup70.i ld a0, 936(s9) lui a1, 1 addiw a1, a1, 1456 add a1, sp, a1 - beq a0, a1, .LBB42_4740 -# %bb.4739: # %if.then.i.i166.i + beq a0, a1, .LBB42_4742 +# %bb.4741: # %if.then.i.i166.i call _ZdlPv@plt -.LBB42_4740: # %ehcleanup73.i +.LBB42_4742: # %ehcleanup73.i mv s2, s3 -.LBB42_4741: # %ehcleanup73.i +.LBB42_4743: # %ehcleanup73.i ld a0, 968(s9) lui a1, 1 addiw a1, a1, 1488 add a1, sp, a1 - beq a0, a1, .LBB42_4743 -# %bb.4742: # %if.then.i.i172.i + beq a0, a1, .LBB42_4745 +# %bb.4744: # %if.then.i.i172.i call _ZdlPv@plt -.LBB42_4743: # %ehcleanup76.i +.LBB42_4745: # %ehcleanup76.i mv s1, s2 -.LBB42_4744: # %ehcleanup76.i +.LBB42_4746: # %ehcleanup76.i ld a0, 1000(s9) lui a1, 1 addiw a1, a1, 1520 add a1, sp, a1 - beq a0, a1, .LBB42_4746 -# %bb.4745: # %if.then.i.i178.i + beq a0, a1, .LBB42_4748 +# %bb.4747: # %if.then.i.i178.i call _ZdlPv@plt -.LBB42_4746: # %ehcleanup79.i +.LBB42_4748: # %ehcleanup79.i mv s0, s1 -.LBB42_4747: # %ehcleanup79.i +.LBB42_4749: # %ehcleanup79.i ld a0, 1032(s9) lui a1, 1 addiw a1, a1, 1552 add a1, sp, a1 - beq a0, a1, .LBB42_4760 -# %bb.4748: # %if.then.i.i184.i + beq a0, a1, .LBB42_4762 +# %bb.4750: # %if.then.i.i184.i call _ZdlPv@plt - j .LBB42_4760 -.LBB42_4749: # %lpad35.i3991 + j .LBB42_4762 +.LBB42_4751: # %lpad35.i3991 .Ltmp2499: lui a1, 1 addiw a1, a1, 504 @@ -67711,16 +67702,16 @@ li s8, 0 mv s3, s4 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4738 -.LBB42_4750: # %lpad30.i3984 + j .LBB42_4740 +.LBB42_4752: # %lpad30.i3984 .Ltmp2496: lui a1, 1 addiw a1, a1, 504 add s9, sp, a1 li s8, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4738 -.LBB42_4751: # %lpad28.i3980 + j .LBB42_4740 +.LBB42_4753: # %lpad28.i3980 .Ltmp2493: lui a1, 1 addiw a1, a1, 504 @@ -67728,16 +67719,16 @@ li s8, 0 mv s2, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4741 -.LBB42_4752: # %lpad23.i3973 + j .LBB42_4743 +.LBB42_4754: # %lpad23.i3973 .Ltmp2490: lui a1, 1 addiw a1, a1, 504 add s9, sp, a1 li s8, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4741 -.LBB42_4753: # %lpad21.i3969 + j .LBB42_4743 +.LBB42_4755: # %lpad21.i3969 .Ltmp2487: lui a1, 1 addiw a1, a1, 504 @@ -67745,16 +67736,16 @@ li s8, 0 mv s1, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4744 -.LBB42_4754: # %lpad16.i3962 + j .LBB42_4746 +.LBB42_4756: # %lpad16.i3962 .Ltmp2484: lui a1, 1 addiw a1, a1, 504 add s9, sp, a1 li s8, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4744 -.LBB42_4755: # %lpad14.i3958 + j .LBB42_4746 +.LBB42_4757: # %lpad14.i3958 .Ltmp2481: lui a1, 1 addiw a1, a1, 504 @@ -67762,64 +67753,64 @@ li s8, 0 mv s0, s1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4747 -.LBB42_4756: # %lpad9.i3951 + j .LBB42_4749 +.LBB42_4758: # %lpad9.i3951 .Ltmp2478: lui a1, 1 addiw a1, a1, 504 add s9, sp, a1 li s8, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4747 -.LBB42_4757: # %lpad7.i3950 + j .LBB42_4749 +.LBB42_4759: # %lpad7.i3950 .Ltmp2475: - j .LBB42_4759 -.LBB42_4758: # %lpad3.i3937 + j .LBB42_4761 +.LBB42_4760: # %lpad3.i3937 .Ltmp2472: -.LBB42_4759: # %ehcleanup82.i +.LBB42_4761: # %ehcleanup82.i lui a1, 1 addiw a1, a1, 504 add s9, sp, a1 li s8, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4760: # %ehcleanup82.i +.LBB42_4762: # %ehcleanup82.i ld a0, 1064(s9) lui a1, 1 addiw a1, a1, 1584 add a1, sp, a1 - beq a0, a1, .LBB42_4762 -# %bb.4761: # %if.then.i.i190.i3942 + beq a0, a1, .LBB42_4764 +# %bb.4763: # %if.then.i.i190.i3942 call _ZdlPv@plt -.LBB42_4762: # %ehcleanup83.i +.LBB42_4764: # %ehcleanup83.i addi s1, sp, 552 xor a0, s1, s0 seqz a0, a0 or a0, s8, a0 - beqz a0, .LBB42_4763 - j .LBB42_5497 -.LBB42_4763: # %arraydestroy.body86.i + beqz a0, .LBB42_4765 + j .LBB42_5499 +.LBB42_4765: # %arraydestroy.body86.i # =>This Inner Loop Header: Depth=1 addi s0, s0, -88 mv a0, s0 call _ZN8TestCaseD2Ev - bne s0, s1, .LBB42_4763 - j .LBB42_5497 -.LBB42_4764: # %lpad5.i3874 + bne s0, s1, .LBB42_4765 + j .LBB42_5499 +.LBB42_4766: # %lpad5.i3874 .Ltmp2469: - j .LBB42_5165 -.LBB42_4765: # %lpad3.i3862 + j .LBB42_5167 +.LBB42_4767: # %lpad3.i3862 .Ltmp2466: - j .LBB42_5374 -.LBB42_4766: # %lpad.i3852 + j .LBB42_5376 +.LBB42_4768: # %lpad.i3852 .Ltmp2463: - j .LBB42_5163 -.LBB42_4767: # %lpad5.i3805 -.Ltmp2460: j .LBB42_5165 -.LBB42_4768: # %lpad3.i3793 +.LBB42_4769: # %lpad5.i3805 +.Ltmp2460: + j .LBB42_5167 +.LBB42_4770: # %lpad3.i3793 .Ltmp2457: - j .LBB42_5374 -.LBB42_4769: # %lpad67.i + j .LBB42_5376 +.LBB42_4771: # %lpad67.i .Ltmp2454: mv s7, a0 mv a0, s9 @@ -67844,164 +67835,164 @@ call _ZN8TestCaseD2Ev li s10, 1 sd s7, 112(sp) # 8-byte Folded Spill - j .LBB42_4771 -.LBB42_4770: # %lpad65.i3719 + j .LBB42_4773 +.LBB42_4772: # %lpad65.i3719 .Ltmp2451: li s10, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4771: # %ehcleanup.i3720 +.LBB42_4773: # %ehcleanup.i3720 ld a0, 776(s11) lui a1, 1 addiw a1, a1, 1296 add a1, sp, a1 - beq a0, a1, .LBB42_4773 -# %bb.4772: # %if.then.i.i188.i3724 + beq a0, a1, .LBB42_4775 +# %bb.4774: # %if.then.i.i188.i3724 call _ZdlPv@plt -.LBB42_4773: # %ehcleanup78.i +.LBB42_4775: # %ehcleanup78.i mv s8, s9 - j .LBB42_4777 -.LBB42_4774: # %lpad63.i3718 + j .LBB42_4779 +.LBB42_4776: # %lpad63.i3718 .Ltmp2448: lui a1, 1 addiw a1, a1, 504 add s11, sp, a1 li s10, 0 mv s8, s9 - j .LBB42_4776 -.LBB42_4775: # %lpad58.i3708 + j .LBB42_4778 +.LBB42_4777: # %lpad58.i3708 .Ltmp2445: lui a1, 1 addiw a1, a1, 504 add s11, sp, a1 li s10, 0 -.LBB42_4776: # %ehcleanup78.i +.LBB42_4778: # %ehcleanup78.i sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4777: # %ehcleanup78.i +.LBB42_4779: # %ehcleanup78.i ld a0, 808(s11) lui a1, 1 addiw a1, a1, 1328 add a1, sp, a1 - beq a0, a1, .LBB42_4779 -# %bb.4778: # %if.then.i.i194.i3713 + beq a0, a1, .LBB42_4781 +# %bb.4780: # %if.then.i.i194.i3713 call _ZdlPv@plt -.LBB42_4779: # %ehcleanup81.i +.LBB42_4781: # %ehcleanup81.i mv s6, s8 - j .LBB42_4783 -.LBB42_4780: # %lpad56.i3707 + j .LBB42_4785 +.LBB42_4782: # %lpad56.i3707 .Ltmp2442: lui a1, 1 addiw a1, a1, 504 add s11, sp, a1 li s10, 0 mv s6, s8 - j .LBB42_4782 -.LBB42_4781: # %lpad51.i3697 + j .LBB42_4784 +.LBB42_4783: # %lpad51.i3697 .Ltmp2439: lui a1, 1 addiw a1, a1, 504 add s11, sp, a1 li s10, 0 -.LBB42_4782: # %ehcleanup81.i +.LBB42_4784: # %ehcleanup81.i sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4783: # %ehcleanup81.i +.LBB42_4785: # %ehcleanup81.i ld a0, 840(s11) lui a1, 1 addiw a1, a1, 1360 add a1, sp, a1 - beq a0, a1, .LBB42_4785 -# %bb.4784: # %if.then.i.i200.i3702 + beq a0, a1, .LBB42_4787 +# %bb.4786: # %if.then.i.i200.i3702 call _ZdlPv@plt -.LBB42_4785: # %ehcleanup84.i +.LBB42_4787: # %ehcleanup84.i mv s5, s6 -.LBB42_4786: # %ehcleanup84.i +.LBB42_4788: # %ehcleanup84.i ld a0, 872(s11) lui a1, 1 addiw a1, a1, 1392 add a1, sp, a1 - beq a0, a1, .LBB42_4788 -# %bb.4787: # %if.then.i.i206.i3692 + beq a0, a1, .LBB42_4790 +# %bb.4789: # %if.then.i.i206.i3692 call _ZdlPv@plt -.LBB42_4788: # %ehcleanup87.i +.LBB42_4790: # %ehcleanup87.i mv s4, s5 -.LBB42_4789: # %ehcleanup87.i +.LBB42_4791: # %ehcleanup87.i ld a0, 904(s11) lui a1, 1 addiw a1, a1, 1424 add a1, sp, a1 - beq a0, a1, .LBB42_4791 -# %bb.4790: # %if.then.i.i212.i3681 + beq a0, a1, .LBB42_4793 +# %bb.4792: # %if.then.i.i212.i3681 call _ZdlPv@plt -.LBB42_4791: # %ehcleanup90.i +.LBB42_4793: # %ehcleanup90.i mv s3, s4 -.LBB42_4792: # %ehcleanup90.i +.LBB42_4794: # %ehcleanup90.i ld a0, 936(s11) lui a1, 1 addiw a1, a1, 1456 add a1, sp, a1 - beq a0, a1, .LBB42_4794 -# %bb.4793: # %if.then.i.i218.i3670 + beq a0, a1, .LBB42_4796 +# %bb.4795: # %if.then.i.i218.i3670 call _ZdlPv@plt -.LBB42_4794: # %ehcleanup93.i +.LBB42_4796: # %ehcleanup93.i mv s2, s3 -.LBB42_4795: # %ehcleanup93.i +.LBB42_4797: # %ehcleanup93.i ld a0, 968(s11) lui a1, 1 addiw a1, a1, 1488 add a1, sp, a1 - beq a0, a1, .LBB42_4797 -# %bb.4796: # %if.then.i.i224.i3659 + beq a0, a1, .LBB42_4799 +# %bb.4798: # %if.then.i.i224.i3659 call _ZdlPv@plt -.LBB42_4797: # %ehcleanup96.i +.LBB42_4799: # %ehcleanup96.i mv s1, s2 -.LBB42_4798: # %ehcleanup96.i +.LBB42_4800: # %ehcleanup96.i ld a0, 1000(s11) lui a1, 1 addiw a1, a1, 1520 add a1, sp, a1 - beq a0, a1, .LBB42_4800 -# %bb.4799: # %if.then.i.i230.i3648 + beq a0, a1, .LBB42_4802 +# %bb.4801: # %if.then.i.i230.i3648 call _ZdlPv@plt -.LBB42_4800: # %ehcleanup99.i3632 +.LBB42_4802: # %ehcleanup99.i3632 mv s0, s1 -.LBB42_4801: # %ehcleanup99.i3632 +.LBB42_4803: # %ehcleanup99.i3632 ld a0, 1032(s11) lui a1, 1 addiw a1, a1, 1552 add a1, sp, a1 - beq a0, a1, .LBB42_4803 -# %bb.4802: # %if.then.i.i236.i3637 + beq a0, a1, .LBB42_4805 +# %bb.4804: # %if.then.i.i236.i3637 call _ZdlPv@plt -.LBB42_4803: # %ehcleanup102.i3617 +.LBB42_4805: # %ehcleanup102.i3617 ld a0, 1064(s11) lui a1, 1 addiw a1, a1, 1584 add a1, sp, a1 - beq a0, a1, .LBB42_4805 -# %bb.4804: # %if.then.i.i242.i3622 + beq a0, a1, .LBB42_4807 +# %bb.4806: # %if.then.i.i242.i3622 call _ZdlPv@plt -.LBB42_4805: # %ehcleanup103.i +.LBB42_4807: # %ehcleanup103.i addi s1, sp, 552 xor a0, s1, s0 seqz a0, a0 or a0, s10, a0 - beqz a0, .LBB42_4806 - j .LBB42_5497 -.LBB42_4806: # %arraydestroy.body106.i + beqz a0, .LBB42_4808 + j .LBB42_5499 +.LBB42_4808: # %arraydestroy.body106.i # =>This Inner Loop Header: Depth=1 addi s0, s0, -88 mv a0, s0 call _ZN8TestCaseD2Ev - bne s0, s1, .LBB42_4806 - j .LBB42_5497 -.LBB42_4807: # %lpad44.i3687 + bne s0, s1, .LBB42_4808 + j .LBB42_5499 +.LBB42_4809: # %lpad44.i3687 .Ltmp2436: lui a1, 1 addiw a1, a1, 504 add s11, sp, a1 li s10, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4786 -.LBB42_4808: # %lpad42.i3686 + j .LBB42_4788 +.LBB42_4810: # %lpad42.i3686 .Ltmp2433: lui a1, 1 addiw a1, a1, 504 @@ -68009,16 +68000,16 @@ li s10, 0 mv s4, s5 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4789 -.LBB42_4809: # %lpad37.i3676 + j .LBB42_4791 +.LBB42_4811: # %lpad37.i3676 .Ltmp2430: lui a1, 1 addiw a1, a1, 504 add s11, sp, a1 li s10, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4789 -.LBB42_4810: # %lpad35.i3675 + j .LBB42_4791 +.LBB42_4812: # %lpad35.i3675 .Ltmp2427: lui a1, 1 addiw a1, a1, 504 @@ -68026,16 +68017,16 @@ li s10, 0 mv s3, s4 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4792 -.LBB42_4811: # %lpad30.i3665 + j .LBB42_4794 +.LBB42_4813: # %lpad30.i3665 .Ltmp2424: lui a1, 1 addiw a1, a1, 504 add s11, sp, a1 li s10, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4792 -.LBB42_4812: # %lpad28.i3664 + j .LBB42_4794 +.LBB42_4814: # %lpad28.i3664 .Ltmp2421: lui a1, 1 addiw a1, a1, 504 @@ -68043,16 +68034,16 @@ li s10, 0 mv s2, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4795 -.LBB42_4813: # %lpad23.i3654 + j .LBB42_4797 +.LBB42_4815: # %lpad23.i3654 .Ltmp2418: lui a1, 1 addiw a1, a1, 504 add s11, sp, a1 li s10, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4795 -.LBB42_4814: # %lpad21.i3653 + j .LBB42_4797 +.LBB42_4816: # %lpad21.i3653 .Ltmp2415: lui a1, 1 addiw a1, a1, 504 @@ -68060,16 +68051,16 @@ li s10, 0 mv s1, s2 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4798 -.LBB42_4815: # %lpad16.i3643 + j .LBB42_4800 +.LBB42_4817: # %lpad16.i3643 .Ltmp2412: lui a1, 1 addiw a1, a1, 504 add s11, sp, a1 li s10, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4798 -.LBB42_4816: # %lpad14.i3642 + j .LBB42_4800 +.LBB42_4818: # %lpad14.i3642 .Ltmp2409: lui a1, 1 addiw a1, a1, 504 @@ -68077,43 +68068,43 @@ li s10, 0 mv s0, s1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4801 -.LBB42_4817: # %lpad9.i3631 + j .LBB42_4803 +.LBB42_4819: # %lpad9.i3631 .Ltmp2406: lui a1, 1 addiw a1, a1, 504 add s11, sp, a1 li s10, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4801 -.LBB42_4818: # %lpad7.i3630 + j .LBB42_4803 +.LBB42_4820: # %lpad7.i3630 .Ltmp2403: - j .LBB42_4820 -.LBB42_4819: # %lpad3.i3616 + j .LBB42_4822 +.LBB42_4821: # %lpad3.i3616 .Ltmp2400: -.LBB42_4820: # %ehcleanup102.i3617 +.LBB42_4822: # %ehcleanup102.i3617 lui a1, 1 addiw a1, a1, 504 add s11, sp, a1 li s10, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4803 -.LBB42_4821: # %lpad5.i3556 + j .LBB42_4805 +.LBB42_4823: # %lpad5.i3556 .Ltmp2397: - j .LBB42_5165 -.LBB42_4822: # %lpad3.i3544 + j .LBB42_5167 +.LBB42_4824: # %lpad3.i3544 .Ltmp2394: - j .LBB42_5374 -.LBB42_4823: # %lpad.i3535 + j .LBB42_5376 +.LBB42_4825: # %lpad.i3535 .Ltmp2391: - j .LBB42_5163 -.LBB42_4824: # %lpad5.i3488 -.Ltmp2388: j .LBB42_5165 -.LBB42_4825: # %lpad3.i3476 +.LBB42_4826: # %lpad5.i3488 +.Ltmp2388: + j .LBB42_5167 +.LBB42_4827: # %lpad3.i3476 .Ltmp2385: - j .LBB42_5374 -.LBB42_4826: # %lpad88.i3348 + j .LBB42_5376 +.LBB42_4828: # %lpad88.i3348 .Ltmp2382: mv s2, a0 mv a0, s1 @@ -68144,171 +68135,171 @@ call _ZN8TestCaseD2Ev li s9, 1 sd s2, 112(sp) # 8-byte Folded Spill - j .LBB42_4828 -.LBB42_4827: # %lpad86.i3336 + j .LBB42_4830 +.LBB42_4829: # %lpad86.i3336 .Ltmp2379: li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4828: # %ehcleanup.i3337 +.LBB42_4830: # %ehcleanup.i3337 ld a0, 680(s6) lui a1, 1 addiw a1, a1, 1200 add a1, sp, a1 - beq a0, a1, .LBB42_4830 -# %bb.4829: # %if.then.i.i248.i3341 + beq a0, a1, .LBB42_4832 +# %bb.4831: # %if.then.i.i248.i3341 call _ZdlPv@plt -.LBB42_4830: # %ehcleanup99.i3324 +.LBB42_4832: # %ehcleanup99.i3324 mv s11, s1 - j .LBB42_4832 -.LBB42_4831: # %lpad79.i3323 + j .LBB42_4834 +.LBB42_4833: # %lpad79.i3323 .Ltmp2376: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4832: # %ehcleanup99.i3324 +.LBB42_4834: # %ehcleanup99.i3324 ld a0, 712(s6) lui a1, 1 addiw a1, a1, 1232 add a1, sp, a1 - beq a0, a1, .LBB42_4834 -# %bb.4833: # %if.then.i.i254.i3329 + beq a0, a1, .LBB42_4836 +# %bb.4835: # %if.then.i.i254.i3329 call _ZdlPv@plt -.LBB42_4834: # %ehcleanup102.i3308 +.LBB42_4836: # %ehcleanup102.i3308 mv s10, s11 - j .LBB42_4838 -.LBB42_4835: # %lpad77.i3319 + j .LBB42_4840 +.LBB42_4837: # %lpad77.i3319 .Ltmp2373: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 mv s10, s11 - j .LBB42_4837 -.LBB42_4836: # %lpad72.i3307 + j .LBB42_4839 +.LBB42_4838: # %lpad72.i3307 .Ltmp2370: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 -.LBB42_4837: # %ehcleanup102.i3308 +.LBB42_4839: # %ehcleanup102.i3308 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4838: # %ehcleanup102.i3308 +.LBB42_4840: # %ehcleanup102.i3308 ld a0, 744(s6) lui a1, 1 addiw a1, a1, 1264 add a1, sp, a1 - beq a0, a1, .LBB42_4840 -# %bb.4839: # %if.then.i.i260.i3313 + beq a0, a1, .LBB42_4842 +# %bb.4841: # %if.then.i.i260.i3313 call _ZdlPv@plt -.LBB42_4840: # %ehcleanup105.i3292 +.LBB42_4842: # %ehcleanup105.i3292 mv s8, s10 -.LBB42_4841: # %ehcleanup105.i3292 +.LBB42_4843: # %ehcleanup105.i3292 ld a0, 776(s6) lui a1, 1 addiw a1, a1, 1296 add a1, sp, a1 - beq a0, a1, .LBB42_4843 -# %bb.4842: # %if.then.i.i266.i3297 + beq a0, a1, .LBB42_4845 +# %bb.4844: # %if.then.i.i266.i3297 call _ZdlPv@plt -.LBB42_4843: # %ehcleanup108.i3276 +.LBB42_4845: # %ehcleanup108.i3276 mv s7, s8 -.LBB42_4844: # %ehcleanup108.i3276 +.LBB42_4846: # %ehcleanup108.i3276 ld a0, 808(s6) lui a1, 1 addiw a1, a1, 1328 add a1, sp, a1 - beq a0, a1, .LBB42_4846 -# %bb.4845: # %if.then.i.i272.i3281 + beq a0, a1, .LBB42_4848 +# %bb.4847: # %if.then.i.i272.i3281 call _ZdlPv@plt -.LBB42_4846: # %ehcleanup111.i3260 +.LBB42_4848: # %ehcleanup111.i3260 mv s5, s7 -.LBB42_4847: # %ehcleanup111.i3260 +.LBB42_4849: # %ehcleanup111.i3260 ld a0, 840(s6) lui a1, 1 addiw a1, a1, 1360 add a1, sp, a1 - beq a0, a1, .LBB42_4849 -# %bb.4848: # %if.then.i.i278.i3265 + beq a0, a1, .LBB42_4851 +# %bb.4850: # %if.then.i.i278.i3265 call _ZdlPv@plt -.LBB42_4849: # %ehcleanup114.i3247 +.LBB42_4851: # %ehcleanup114.i3247 mv s4, s5 -.LBB42_4850: # %ehcleanup114.i3247 +.LBB42_4852: # %ehcleanup114.i3247 ld a0, 872(s6) lui a1, 1 addiw a1, a1, 1392 add a1, sp, a1 - beq a0, a1, .LBB42_4852 -# %bb.4851: # %if.then.i.i284.i3252 + beq a0, a1, .LBB42_4854 +# %bb.4853: # %if.then.i.i284.i3252 call _ZdlPv@plt -.LBB42_4852: # %ehcleanup117.i3231 +.LBB42_4854: # %ehcleanup117.i3231 mv s3, s4 -.LBB42_4853: # %ehcleanup117.i3231 +.LBB42_4855: # %ehcleanup117.i3231 ld a0, 904(s6) lui a1, 1 addiw a1, a1, 1424 add a1, sp, a1 - beq a0, a1, .LBB42_4855 -# %bb.4854: # %if.then.i.i290.i3236 + beq a0, a1, .LBB42_4857 +# %bb.4856: # %if.then.i.i290.i3236 call _ZdlPv@plt -.LBB42_4855: # %ehcleanup120.i3215 +.LBB42_4857: # %ehcleanup120.i3215 mv s0, s3 -.LBB42_4856: # %ehcleanup120.i3215 +.LBB42_4858: # %ehcleanup120.i3215 ld a0, 936(s6) lui a1, 1 addiw a1, a1, 1456 add a1, sp, a1 - beq a0, a1, .LBB42_4858 -# %bb.4857: # %if.then.i.i296.i3220 + beq a0, a1, .LBB42_4860 +# %bb.4859: # %if.then.i.i296.i3220 call _ZdlPv@plt -.LBB42_4858: # %ehcleanup123.i3199 +.LBB42_4860: # %ehcleanup123.i3199 ld a0, 968(s6) lui a1, 1 addiw a1, a1, 1488 add a1, sp, a1 - beq a0, a1, .LBB42_4860 -# %bb.4859: # %if.then.i.i302.i3204 + beq a0, a1, .LBB42_4862 +# %bb.4861: # %if.then.i.i302.i3204 call _ZdlPv@plt -.LBB42_4860: # %ehcleanup126.i3183 +.LBB42_4862: # %ehcleanup126.i3183 ld a0, 1000(s6) lui a1, 1 addiw a1, a1, 1520 add a1, sp, a1 - beq a0, a1, .LBB42_4862 -# %bb.4861: # %if.then.i.i308.i3188 + beq a0, a1, .LBB42_4864 +# %bb.4863: # %if.then.i.i308.i3188 call _ZdlPv@plt -.LBB42_4862: # %ehcleanup129.i3167 +.LBB42_4864: # %ehcleanup129.i3167 ld a0, 1032(s6) lui a1, 1 addiw a1, a1, 1552 add a1, sp, a1 - beq a0, a1, .LBB42_4864 -# %bb.4863: # %if.then.i.i314.i3172 + beq a0, a1, .LBB42_4866 +# %bb.4865: # %if.then.i.i314.i3172 call _ZdlPv@plt -.LBB42_4864: # %ehcleanup132.i3143 +.LBB42_4866: # %ehcleanup132.i3143 ld a0, 1064(s6) lui a1, 1 addiw a1, a1, 1584 add a1, sp, a1 - beq a0, a1, .LBB42_4866 -# %bb.4865: # %if.then.i.i320.i3148 + beq a0, a1, .LBB42_4868 +# %bb.4867: # %if.then.i.i320.i3148 call _ZdlPv@plt -.LBB42_4866: # %ehcleanup133.i3149 +.LBB42_4868: # %ehcleanup133.i3149 addi s1, sp, 552 xor a0, s1, s0 seqz a0, a0 or a0, s9, a0 - beqz a0, .LBB42_4867 - j .LBB42_5497 -.LBB42_4867: # %arraydestroy.body136.i3152 + beqz a0, .LBB42_4869 + j .LBB42_5499 +.LBB42_4869: # %arraydestroy.body136.i3152 # =>This Inner Loop Header: Depth=1 addi s0, s0, -88 mv a0, s0 call _ZN8TestCaseD2Ev - bne s0, s1, .LBB42_4867 - j .LBB42_5497 -.LBB42_4868: # %lpad70.i3303 + bne s0, s1, .LBB42_4869 + j .LBB42_5499 +.LBB42_4870: # %lpad70.i3303 .Ltmp2367: lui a1, 1 addiw a1, a1, 504 @@ -68316,16 +68307,16 @@ li s9, 0 mv s8, s10 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4841 -.LBB42_4869: # %lpad65.i3291 + j .LBB42_4843 +.LBB42_4871: # %lpad65.i3291 .Ltmp2364: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4841 -.LBB42_4870: # %lpad63.i3287 + j .LBB42_4843 +.LBB42_4872: # %lpad63.i3287 .Ltmp2361: lui a1, 1 addiw a1, a1, 504 @@ -68333,16 +68324,16 @@ li s9, 0 mv s7, s8 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4844 -.LBB42_4871: # %lpad58.i3275 + j .LBB42_4846 +.LBB42_4873: # %lpad58.i3275 .Ltmp2358: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4844 -.LBB42_4872: # %lpad56.i3271 + j .LBB42_4846 +.LBB42_4874: # %lpad56.i3271 .Ltmp2355: lui a1, 1 addiw a1, a1, 504 @@ -68350,24 +68341,24 @@ li s9, 0 mv s5, s7 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4847 -.LBB42_4873: # %lpad51.i3259 + j .LBB42_4849 +.LBB42_4875: # %lpad51.i3259 .Ltmp2352: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4847 -.LBB42_4874: # %lpad44.i3246 + j .LBB42_4849 +.LBB42_4876: # %lpad44.i3246 .Ltmp2349: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4850 -.LBB42_4875: # %lpad42.i3242 + j .LBB42_4852 +.LBB42_4877: # %lpad42.i3242 .Ltmp2346: lui a1, 1 addiw a1, a1, 504 @@ -68375,16 +68366,16 @@ li s9, 0 mv s3, s4 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4853 -.LBB42_4876: # %lpad37.i3230 + j .LBB42_4855 +.LBB42_4878: # %lpad37.i3230 .Ltmp2343: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4853 -.LBB42_4877: # %lpad35.i3226 + j .LBB42_4855 +.LBB42_4879: # %lpad35.i3226 .Ltmp2340: lui a1, 1 addiw a1, a1, 504 @@ -68392,8 +68383,8 @@ li s9, 0 mv s0, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4856 -.LBB42_4878: # %lpad30.i3214 + j .LBB42_4858 +.LBB42_4880: # %lpad30.i3214 .Ltmp2337: mv s0, s1 lui a1, 1 @@ -68401,8 +68392,8 @@ add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4856 -.LBB42_4879: # %lpad28.i3210 + j .LBB42_4858 +.LBB42_4881: # %lpad28.i3210 .Ltmp2334: lui a1, 1 addiw a1, a1, 504 @@ -68410,8 +68401,8 @@ li s9, 0 mv s0, s1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4858 -.LBB42_4880: # %lpad23.i3198 + j .LBB42_4860 +.LBB42_4882: # %lpad23.i3198 .Ltmp2331: mv s0, s3 lui a1, 1 @@ -68419,8 +68410,8 @@ add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4858 -.LBB42_4881: # %lpad21.i3194 + j .LBB42_4860 +.LBB42_4883: # %lpad21.i3194 .Ltmp2328: lui a1, 1 addiw a1, a1, 504 @@ -68428,8 +68419,8 @@ li s9, 0 mv s0, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4860 -.LBB42_4882: # %lpad16.i3182 + j .LBB42_4862 +.LBB42_4884: # %lpad16.i3182 .Ltmp2325: mv s0, s3 lui a1, 1 @@ -68437,8 +68428,8 @@ add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4860 -.LBB42_4883: # %lpad14.i3178 + j .LBB42_4862 +.LBB42_4885: # %lpad14.i3178 .Ltmp2322: lui a1, 1 addiw a1, a1, 504 @@ -68446,43 +68437,43 @@ li s9, 0 mv s0, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4862 -.LBB42_4884: # %lpad9.i3166 + j .LBB42_4864 +.LBB42_4886: # %lpad9.i3166 .Ltmp2319: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4862 -.LBB42_4885: # %lpad7.i3162 + j .LBB42_4864 +.LBB42_4887: # %lpad7.i3162 .Ltmp2316: - j .LBB42_4887 -.LBB42_4886: # %lpad3.i3142 + j .LBB42_4889 +.LBB42_4888: # %lpad3.i3142 .Ltmp2313: -.LBB42_4887: # %ehcleanup132.i3143 +.LBB42_4889: # %ehcleanup132.i3143 lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4864 -.LBB42_4888: # %lpad5.i3068 + j .LBB42_4866 +.LBB42_4890: # %lpad5.i3068 .Ltmp2310: - j .LBB42_5165 -.LBB42_4889: # %lpad3.i3056 + j .LBB42_5167 +.LBB42_4891: # %lpad3.i3056 .Ltmp2307: - j .LBB42_5374 -.LBB42_4890: # %lpad.i3046 + j .LBB42_5376 +.LBB42_4892: # %lpad.i3046 .Ltmp2304: - j .LBB42_5163 -.LBB42_4891: # %lpad5.i2999 -.Ltmp2301: j .LBB42_5165 -.LBB42_4892: # %lpad3.i2987 +.LBB42_4893: # %lpad5.i2999 +.Ltmp2301: + j .LBB42_5167 +.LBB42_4894: # %lpad3.i2987 .Ltmp2298: - j .LBB42_5374 -.LBB42_4893: # %lpad88.i2859 + j .LBB42_5376 +.LBB42_4895: # %lpad88.i2859 .Ltmp2295: mv s2, a0 mv a0, s1 @@ -68513,171 +68504,171 @@ call _ZN8TestCaseD2Ev li s9, 1 sd s2, 112(sp) # 8-byte Folded Spill - j .LBB42_4895 -.LBB42_4894: # %lpad86.i2847 + j .LBB42_4897 +.LBB42_4896: # %lpad86.i2847 .Ltmp2292: li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4895: # %ehcleanup.i2848 +.LBB42_4897: # %ehcleanup.i2848 ld a0, 680(s6) lui a1, 1 addiw a1, a1, 1200 add a1, sp, a1 - beq a0, a1, .LBB42_4897 -# %bb.4896: # %if.then.i.i248.i2852 + beq a0, a1, .LBB42_4899 +# %bb.4898: # %if.then.i.i248.i2852 call _ZdlPv@plt -.LBB42_4897: # %ehcleanup99.i2835 +.LBB42_4899: # %ehcleanup99.i2835 mv s11, s1 - j .LBB42_4899 -.LBB42_4898: # %lpad79.i2834 + j .LBB42_4901 +.LBB42_4900: # %lpad79.i2834 .Ltmp2289: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4899: # %ehcleanup99.i2835 +.LBB42_4901: # %ehcleanup99.i2835 ld a0, 712(s6) lui a1, 1 addiw a1, a1, 1232 add a1, sp, a1 - beq a0, a1, .LBB42_4901 -# %bb.4900: # %if.then.i.i254.i2840 + beq a0, a1, .LBB42_4903 +# %bb.4902: # %if.then.i.i254.i2840 call _ZdlPv@plt -.LBB42_4901: # %ehcleanup102.i2819 +.LBB42_4903: # %ehcleanup102.i2819 mv s10, s11 - j .LBB42_4905 -.LBB42_4902: # %lpad77.i2830 + j .LBB42_4907 +.LBB42_4904: # %lpad77.i2830 .Ltmp2286: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 mv s10, s11 - j .LBB42_4904 -.LBB42_4903: # %lpad72.i2818 + j .LBB42_4906 +.LBB42_4905: # %lpad72.i2818 .Ltmp2283: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 -.LBB42_4904: # %ehcleanup102.i2819 +.LBB42_4906: # %ehcleanup102.i2819 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4905: # %ehcleanup102.i2819 +.LBB42_4907: # %ehcleanup102.i2819 ld a0, 744(s6) lui a1, 1 addiw a1, a1, 1264 add a1, sp, a1 - beq a0, a1, .LBB42_4907 -# %bb.4906: # %if.then.i.i260.i2824 + beq a0, a1, .LBB42_4909 +# %bb.4908: # %if.then.i.i260.i2824 call _ZdlPv@plt -.LBB42_4907: # %ehcleanup105.i2803 +.LBB42_4909: # %ehcleanup105.i2803 mv s8, s10 -.LBB42_4908: # %ehcleanup105.i2803 +.LBB42_4910: # %ehcleanup105.i2803 ld a0, 776(s6) lui a1, 1 addiw a1, a1, 1296 add a1, sp, a1 - beq a0, a1, .LBB42_4910 -# %bb.4909: # %if.then.i.i266.i2808 + beq a0, a1, .LBB42_4912 +# %bb.4911: # %if.then.i.i266.i2808 call _ZdlPv@plt -.LBB42_4910: # %ehcleanup108.i2787 +.LBB42_4912: # %ehcleanup108.i2787 mv s7, s8 -.LBB42_4911: # %ehcleanup108.i2787 +.LBB42_4913: # %ehcleanup108.i2787 ld a0, 808(s6) lui a1, 1 addiw a1, a1, 1328 add a1, sp, a1 - beq a0, a1, .LBB42_4913 -# %bb.4912: # %if.then.i.i272.i2792 + beq a0, a1, .LBB42_4915 +# %bb.4914: # %if.then.i.i272.i2792 call _ZdlPv@plt -.LBB42_4913: # %ehcleanup111.i2771 +.LBB42_4915: # %ehcleanup111.i2771 mv s5, s7 -.LBB42_4914: # %ehcleanup111.i2771 +.LBB42_4916: # %ehcleanup111.i2771 ld a0, 840(s6) lui a1, 1 addiw a1, a1, 1360 add a1, sp, a1 - beq a0, a1, .LBB42_4916 -# %bb.4915: # %if.then.i.i278.i2776 + beq a0, a1, .LBB42_4918 +# %bb.4917: # %if.then.i.i278.i2776 call _ZdlPv@plt -.LBB42_4916: # %ehcleanup114.i2758 +.LBB42_4918: # %ehcleanup114.i2758 mv s4, s5 -.LBB42_4917: # %ehcleanup114.i2758 +.LBB42_4919: # %ehcleanup114.i2758 ld a0, 872(s6) lui a1, 1 addiw a1, a1, 1392 add a1, sp, a1 - beq a0, a1, .LBB42_4919 -# %bb.4918: # %if.then.i.i284.i2763 + beq a0, a1, .LBB42_4921 +# %bb.4920: # %if.then.i.i284.i2763 call _ZdlPv@plt -.LBB42_4919: # %ehcleanup117.i2742 +.LBB42_4921: # %ehcleanup117.i2742 mv s3, s4 -.LBB42_4920: # %ehcleanup117.i2742 +.LBB42_4922: # %ehcleanup117.i2742 ld a0, 904(s6) lui a1, 1 addiw a1, a1, 1424 add a1, sp, a1 - beq a0, a1, .LBB42_4922 -# %bb.4921: # %if.then.i.i290.i2747 + beq a0, a1, .LBB42_4924 +# %bb.4923: # %if.then.i.i290.i2747 call _ZdlPv@plt -.LBB42_4922: # %ehcleanup120.i2726 +.LBB42_4924: # %ehcleanup120.i2726 mv s0, s3 -.LBB42_4923: # %ehcleanup120.i2726 +.LBB42_4925: # %ehcleanup120.i2726 ld a0, 936(s6) lui a1, 1 addiw a1, a1, 1456 add a1, sp, a1 - beq a0, a1, .LBB42_4925 -# %bb.4924: # %if.then.i.i296.i2731 + beq a0, a1, .LBB42_4927 +# %bb.4926: # %if.then.i.i296.i2731 call _ZdlPv@plt -.LBB42_4925: # %ehcleanup123.i2710 +.LBB42_4927: # %ehcleanup123.i2710 ld a0, 968(s6) lui a1, 1 addiw a1, a1, 1488 add a1, sp, a1 - beq a0, a1, .LBB42_4927 -# %bb.4926: # %if.then.i.i302.i2715 + beq a0, a1, .LBB42_4929 +# %bb.4928: # %if.then.i.i302.i2715 call _ZdlPv@plt -.LBB42_4927: # %ehcleanup126.i2694 +.LBB42_4929: # %ehcleanup126.i2694 ld a0, 1000(s6) lui a1, 1 addiw a1, a1, 1520 add a1, sp, a1 - beq a0, a1, .LBB42_4929 -# %bb.4928: # %if.then.i.i308.i2699 + beq a0, a1, .LBB42_4931 +# %bb.4930: # %if.then.i.i308.i2699 call _ZdlPv@plt -.LBB42_4929: # %ehcleanup129.i2678 +.LBB42_4931: # %ehcleanup129.i2678 ld a0, 1032(s6) lui a1, 1 addiw a1, a1, 1552 add a1, sp, a1 - beq a0, a1, .LBB42_4931 -# %bb.4930: # %if.then.i.i314.i2683 + beq a0, a1, .LBB42_4933 +# %bb.4932: # %if.then.i.i314.i2683 call _ZdlPv@plt -.LBB42_4931: # %ehcleanup132.i2654 +.LBB42_4933: # %ehcleanup132.i2654 ld a0, 1064(s6) lui a1, 1 addiw a1, a1, 1584 add a1, sp, a1 - beq a0, a1, .LBB42_4933 -# %bb.4932: # %if.then.i.i320.i2659 + beq a0, a1, .LBB42_4935 +# %bb.4934: # %if.then.i.i320.i2659 call _ZdlPv@plt -.LBB42_4933: # %ehcleanup133.i2660 +.LBB42_4935: # %ehcleanup133.i2660 addi s1, sp, 552 xor a0, s1, s0 seqz a0, a0 or a0, s9, a0 - beqz a0, .LBB42_4934 - j .LBB42_5497 -.LBB42_4934: # %arraydestroy.body136.i2663 + beqz a0, .LBB42_4936 + j .LBB42_5499 +.LBB42_4936: # %arraydestroy.body136.i2663 # =>This Inner Loop Header: Depth=1 addi s0, s0, -88 mv a0, s0 call _ZN8TestCaseD2Ev - bne s0, s1, .LBB42_4934 - j .LBB42_5497 -.LBB42_4935: # %lpad70.i2814 + bne s0, s1, .LBB42_4936 + j .LBB42_5499 +.LBB42_4937: # %lpad70.i2814 .Ltmp2280: lui a1, 1 addiw a1, a1, 504 @@ -68685,16 +68676,16 @@ li s9, 0 mv s8, s10 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4908 -.LBB42_4936: # %lpad65.i2802 + j .LBB42_4910 +.LBB42_4938: # %lpad65.i2802 .Ltmp2277: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4908 -.LBB42_4937: # %lpad63.i2798 + j .LBB42_4910 +.LBB42_4939: # %lpad63.i2798 .Ltmp2274: lui a1, 1 addiw a1, a1, 504 @@ -68702,16 +68693,16 @@ li s9, 0 mv s7, s8 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4911 -.LBB42_4938: # %lpad58.i2786 + j .LBB42_4913 +.LBB42_4940: # %lpad58.i2786 .Ltmp2271: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4911 -.LBB42_4939: # %lpad56.i2782 + j .LBB42_4913 +.LBB42_4941: # %lpad56.i2782 .Ltmp2268: lui a1, 1 addiw a1, a1, 504 @@ -68719,24 +68710,24 @@ li s9, 0 mv s5, s7 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4914 -.LBB42_4940: # %lpad51.i2770 + j .LBB42_4916 +.LBB42_4942: # %lpad51.i2770 .Ltmp2265: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4914 -.LBB42_4941: # %lpad44.i2757 + j .LBB42_4916 +.LBB42_4943: # %lpad44.i2757 .Ltmp2262: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4917 -.LBB42_4942: # %lpad42.i2753 + j .LBB42_4919 +.LBB42_4944: # %lpad42.i2753 .Ltmp2259: lui a1, 1 addiw a1, a1, 504 @@ -68744,16 +68735,16 @@ li s9, 0 mv s3, s4 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4920 -.LBB42_4943: # %lpad37.i2741 + j .LBB42_4922 +.LBB42_4945: # %lpad37.i2741 .Ltmp2256: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4920 -.LBB42_4944: # %lpad35.i2737 + j .LBB42_4922 +.LBB42_4946: # %lpad35.i2737 .Ltmp2253: lui a1, 1 addiw a1, a1, 504 @@ -68761,8 +68752,8 @@ li s9, 0 mv s0, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4923 -.LBB42_4945: # %lpad30.i2725 + j .LBB42_4925 +.LBB42_4947: # %lpad30.i2725 .Ltmp2250: mv s0, s1 lui a1, 1 @@ -68770,8 +68761,8 @@ add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4923 -.LBB42_4946: # %lpad28.i2721 + j .LBB42_4925 +.LBB42_4948: # %lpad28.i2721 .Ltmp2247: lui a1, 1 addiw a1, a1, 504 @@ -68779,8 +68770,8 @@ li s9, 0 mv s0, s1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4925 -.LBB42_4947: # %lpad23.i2709 + j .LBB42_4927 +.LBB42_4949: # %lpad23.i2709 .Ltmp2244: mv s0, s1 lui a1, 1 @@ -68788,8 +68779,8 @@ add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4925 -.LBB42_4948: # %lpad21.i2705 + j .LBB42_4927 +.LBB42_4950: # %lpad21.i2705 .Ltmp2241: lui a1, 1 addiw a1, a1, 504 @@ -68797,8 +68788,8 @@ li s9, 0 mv s0, s1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4927 -.LBB42_4949: # %lpad16.i2693 + j .LBB42_4929 +.LBB42_4951: # %lpad16.i2693 .Ltmp2238: mv s0, s3 lui a1, 1 @@ -68806,8 +68797,8 @@ add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4927 -.LBB42_4950: # %lpad14.i2689 + j .LBB42_4929 +.LBB42_4952: # %lpad14.i2689 .Ltmp2235: lui a1, 1 addiw a1, a1, 504 @@ -68815,43 +68806,43 @@ li s9, 0 mv s0, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4929 -.LBB42_4951: # %lpad9.i2677 + j .LBB42_4931 +.LBB42_4953: # %lpad9.i2677 .Ltmp2232: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4929 -.LBB42_4952: # %lpad7.i2673 + j .LBB42_4931 +.LBB42_4954: # %lpad7.i2673 .Ltmp2229: - j .LBB42_4954 -.LBB42_4953: # %lpad3.i2653 + j .LBB42_4956 +.LBB42_4955: # %lpad3.i2653 .Ltmp2226: -.LBB42_4954: # %ehcleanup132.i2654 +.LBB42_4956: # %ehcleanup132.i2654 lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4931 -.LBB42_4955: # %lpad5.i2579 + j .LBB42_4933 +.LBB42_4957: # %lpad5.i2579 .Ltmp2223: - j .LBB42_5165 -.LBB42_4956: # %lpad3.i2567 + j .LBB42_5167 +.LBB42_4958: # %lpad3.i2567 .Ltmp2220: - j .LBB42_5374 -.LBB42_4957: # %lpad.i2557 + j .LBB42_5376 +.LBB42_4959: # %lpad.i2557 .Ltmp2217: - j .LBB42_5163 -.LBB42_4958: # %lpad5.i2510 -.Ltmp2214: j .LBB42_5165 -.LBB42_4959: # %lpad3.i2498 +.LBB42_4960: # %lpad5.i2510 +.Ltmp2214: + j .LBB42_5167 +.LBB42_4961: # %lpad3.i2498 .Ltmp2211: - j .LBB42_5374 -.LBB42_4960: # %lpad88.i2370 + j .LBB42_5376 +.LBB42_4962: # %lpad88.i2370 .Ltmp2208: mv s2, a0 mv a0, s1 @@ -68882,171 +68873,171 @@ call _ZN8TestCaseD2Ev li s9, 1 sd s2, 112(sp) # 8-byte Folded Spill - j .LBB42_4962 -.LBB42_4961: # %lpad86.i2358 + j .LBB42_4964 +.LBB42_4963: # %lpad86.i2358 .Ltmp2205: li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4962: # %ehcleanup.i2359 +.LBB42_4964: # %ehcleanup.i2359 ld a0, 680(s6) lui a1, 1 addiw a1, a1, 1200 add a1, sp, a1 - beq a0, a1, .LBB42_4964 -# %bb.4963: # %if.then.i.i248.i2363 + beq a0, a1, .LBB42_4966 +# %bb.4965: # %if.then.i.i248.i2363 call _ZdlPv@plt -.LBB42_4964: # %ehcleanup99.i2346 +.LBB42_4966: # %ehcleanup99.i2346 mv s11, s1 - j .LBB42_4966 -.LBB42_4965: # %lpad79.i2345 + j .LBB42_4968 +.LBB42_4967: # %lpad79.i2345 .Ltmp2202: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4966: # %ehcleanup99.i2346 +.LBB42_4968: # %ehcleanup99.i2346 ld a0, 712(s6) lui a1, 1 addiw a1, a1, 1232 add a1, sp, a1 - beq a0, a1, .LBB42_4968 -# %bb.4967: # %if.then.i.i254.i2351 + beq a0, a1, .LBB42_4970 +# %bb.4969: # %if.then.i.i254.i2351 call _ZdlPv@plt -.LBB42_4968: # %ehcleanup102.i2330 +.LBB42_4970: # %ehcleanup102.i2330 mv s10, s11 - j .LBB42_4972 -.LBB42_4969: # %lpad77.i2341 + j .LBB42_4974 +.LBB42_4971: # %lpad77.i2341 .Ltmp2199: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 mv s10, s11 - j .LBB42_4971 -.LBB42_4970: # %lpad72.i2329 + j .LBB42_4973 +.LBB42_4972: # %lpad72.i2329 .Ltmp2196: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 -.LBB42_4971: # %ehcleanup102.i2330 +.LBB42_4973: # %ehcleanup102.i2330 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_4972: # %ehcleanup102.i2330 +.LBB42_4974: # %ehcleanup102.i2330 ld a0, 744(s6) lui a1, 1 addiw a1, a1, 1264 add a1, sp, a1 - beq a0, a1, .LBB42_4974 -# %bb.4973: # %if.then.i.i260.i2335 + beq a0, a1, .LBB42_4976 +# %bb.4975: # %if.then.i.i260.i2335 call _ZdlPv@plt -.LBB42_4974: # %ehcleanup105.i2314 +.LBB42_4976: # %ehcleanup105.i2314 mv s8, s10 -.LBB42_4975: # %ehcleanup105.i2314 +.LBB42_4977: # %ehcleanup105.i2314 ld a0, 776(s6) lui a1, 1 addiw a1, a1, 1296 add a1, sp, a1 - beq a0, a1, .LBB42_4977 -# %bb.4976: # %if.then.i.i266.i2319 + beq a0, a1, .LBB42_4979 +# %bb.4978: # %if.then.i.i266.i2319 call _ZdlPv@plt -.LBB42_4977: # %ehcleanup108.i2298 +.LBB42_4979: # %ehcleanup108.i2298 mv s7, s8 -.LBB42_4978: # %ehcleanup108.i2298 +.LBB42_4980: # %ehcleanup108.i2298 ld a0, 808(s6) lui a1, 1 addiw a1, a1, 1328 add a1, sp, a1 - beq a0, a1, .LBB42_4980 -# %bb.4979: # %if.then.i.i272.i2303 + beq a0, a1, .LBB42_4982 +# %bb.4981: # %if.then.i.i272.i2303 call _ZdlPv@plt -.LBB42_4980: # %ehcleanup111.i2282 +.LBB42_4982: # %ehcleanup111.i2282 mv s5, s7 -.LBB42_4981: # %ehcleanup111.i2282 +.LBB42_4983: # %ehcleanup111.i2282 ld a0, 840(s6) lui a1, 1 addiw a1, a1, 1360 add a1, sp, a1 - beq a0, a1, .LBB42_4983 -# %bb.4982: # %if.then.i.i278.i2287 + beq a0, a1, .LBB42_4985 +# %bb.4984: # %if.then.i.i278.i2287 call _ZdlPv@plt -.LBB42_4983: # %ehcleanup114.i2269 +.LBB42_4985: # %ehcleanup114.i2269 mv s4, s5 -.LBB42_4984: # %ehcleanup114.i2269 +.LBB42_4986: # %ehcleanup114.i2269 ld a0, 872(s6) lui a1, 1 addiw a1, a1, 1392 add a1, sp, a1 - beq a0, a1, .LBB42_4986 -# %bb.4985: # %if.then.i.i284.i2274 + beq a0, a1, .LBB42_4988 +# %bb.4987: # %if.then.i.i284.i2274 call _ZdlPv@plt -.LBB42_4986: # %ehcleanup117.i2253 +.LBB42_4988: # %ehcleanup117.i2253 mv s3, s4 -.LBB42_4987: # %ehcleanup117.i2253 +.LBB42_4989: # %ehcleanup117.i2253 ld a0, 904(s6) lui a1, 1 addiw a1, a1, 1424 add a1, sp, a1 - beq a0, a1, .LBB42_4989 -# %bb.4988: # %if.then.i.i290.i2258 + beq a0, a1, .LBB42_4991 +# %bb.4990: # %if.then.i.i290.i2258 call _ZdlPv@plt -.LBB42_4989: # %ehcleanup120.i2237 +.LBB42_4991: # %ehcleanup120.i2237 mv s0, s3 -.LBB42_4990: # %ehcleanup120.i2237 +.LBB42_4992: # %ehcleanup120.i2237 ld a0, 936(s6) lui a1, 1 addiw a1, a1, 1456 add a1, sp, a1 - beq a0, a1, .LBB42_4992 -# %bb.4991: # %if.then.i.i296.i2242 + beq a0, a1, .LBB42_4994 +# %bb.4993: # %if.then.i.i296.i2242 call _ZdlPv@plt -.LBB42_4992: # %ehcleanup123.i2221 +.LBB42_4994: # %ehcleanup123.i2221 ld a0, 968(s6) lui a1, 1 addiw a1, a1, 1488 add a1, sp, a1 - beq a0, a1, .LBB42_4994 -# %bb.4993: # %if.then.i.i302.i2226 + beq a0, a1, .LBB42_4996 +# %bb.4995: # %if.then.i.i302.i2226 call _ZdlPv@plt -.LBB42_4994: # %ehcleanup126.i2205 +.LBB42_4996: # %ehcleanup126.i2205 ld a0, 1000(s6) lui a1, 1 addiw a1, a1, 1520 add a1, sp, a1 - beq a0, a1, .LBB42_4996 -# %bb.4995: # %if.then.i.i308.i2210 + beq a0, a1, .LBB42_4998 +# %bb.4997: # %if.then.i.i308.i2210 call _ZdlPv@plt -.LBB42_4996: # %ehcleanup129.i2189 +.LBB42_4998: # %ehcleanup129.i2189 ld a0, 1032(s6) lui a1, 1 addiw a1, a1, 1552 add a1, sp, a1 - beq a0, a1, .LBB42_4998 -# %bb.4997: # %if.then.i.i314.i2194 + beq a0, a1, .LBB42_5000 +# %bb.4999: # %if.then.i.i314.i2194 call _ZdlPv@plt -.LBB42_4998: # %ehcleanup132.i2165 +.LBB42_5000: # %ehcleanup132.i2165 ld a0, 1064(s6) lui a1, 1 addiw a1, a1, 1584 add a1, sp, a1 - beq a0, a1, .LBB42_5000 -# %bb.4999: # %if.then.i.i320.i2170 + beq a0, a1, .LBB42_5002 +# %bb.5001: # %if.then.i.i320.i2170 call _ZdlPv@plt -.LBB42_5000: # %ehcleanup133.i2171 +.LBB42_5002: # %ehcleanup133.i2171 addi s1, sp, 552 xor a0, s1, s0 seqz a0, a0 or a0, s9, a0 - beqz a0, .LBB42_5001 - j .LBB42_5497 -.LBB42_5001: # %arraydestroy.body136.i2174 + beqz a0, .LBB42_5003 + j .LBB42_5499 +.LBB42_5003: # %arraydestroy.body136.i2174 # =>This Inner Loop Header: Depth=1 addi s0, s0, -88 mv a0, s0 call _ZN8TestCaseD2Ev - bne s0, s1, .LBB42_5001 - j .LBB42_5497 -.LBB42_5002: # %lpad70.i2325 + bne s0, s1, .LBB42_5003 + j .LBB42_5499 +.LBB42_5004: # %lpad70.i2325 .Ltmp2193: lui a1, 1 addiw a1, a1, 504 @@ -69054,16 +69045,16 @@ li s9, 0 mv s8, s10 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4975 -.LBB42_5003: # %lpad65.i2313 + j .LBB42_4977 +.LBB42_5005: # %lpad65.i2313 .Ltmp2190: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4975 -.LBB42_5004: # %lpad63.i2309 + j .LBB42_4977 +.LBB42_5006: # %lpad63.i2309 .Ltmp2187: lui a1, 1 addiw a1, a1, 504 @@ -69071,16 +69062,16 @@ li s9, 0 mv s7, s8 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4978 -.LBB42_5005: # %lpad58.i2297 + j .LBB42_4980 +.LBB42_5007: # %lpad58.i2297 .Ltmp2184: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4978 -.LBB42_5006: # %lpad56.i2293 + j .LBB42_4980 +.LBB42_5008: # %lpad56.i2293 .Ltmp2181: lui a1, 1 addiw a1, a1, 504 @@ -69088,24 +69079,24 @@ li s9, 0 mv s5, s7 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4981 -.LBB42_5007: # %lpad51.i2281 + j .LBB42_4983 +.LBB42_5009: # %lpad51.i2281 .Ltmp2178: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4981 -.LBB42_5008: # %lpad44.i2268 + j .LBB42_4983 +.LBB42_5010: # %lpad44.i2268 .Ltmp2175: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4984 -.LBB42_5009: # %lpad42.i2264 + j .LBB42_4986 +.LBB42_5011: # %lpad42.i2264 .Ltmp2172: lui a1, 1 addiw a1, a1, 504 @@ -69113,16 +69104,16 @@ li s9, 0 mv s3, s4 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4987 -.LBB42_5010: # %lpad37.i2252 + j .LBB42_4989 +.LBB42_5012: # %lpad37.i2252 .Ltmp2169: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4987 -.LBB42_5011: # %lpad35.i2248 + j .LBB42_4989 +.LBB42_5013: # %lpad35.i2248 .Ltmp2166: lui a1, 1 addiw a1, a1, 504 @@ -69130,8 +69121,8 @@ li s9, 0 mv s0, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4990 -.LBB42_5012: # %lpad30.i2236 + j .LBB42_4992 +.LBB42_5014: # %lpad30.i2236 .Ltmp2163: mv s0, s1 lui a1, 1 @@ -69139,8 +69130,8 @@ add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4990 -.LBB42_5013: # %lpad28.i2232 + j .LBB42_4992 +.LBB42_5015: # %lpad28.i2232 .Ltmp2160: lui a1, 1 addiw a1, a1, 504 @@ -69148,8 +69139,8 @@ li s9, 0 mv s0, s1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4992 -.LBB42_5014: # %lpad23.i2220 + j .LBB42_4994 +.LBB42_5016: # %lpad23.i2220 .Ltmp2157: mv s0, s1 lui a1, 1 @@ -69157,8 +69148,8 @@ add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4992 -.LBB42_5015: # %lpad21.i2216 + j .LBB42_4994 +.LBB42_5017: # %lpad21.i2216 .Ltmp2154: lui a1, 1 addiw a1, a1, 504 @@ -69166,8 +69157,8 @@ li s9, 0 mv s0, s1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4994 -.LBB42_5016: # %lpad16.i2204 + j .LBB42_4996 +.LBB42_5018: # %lpad16.i2204 .Ltmp2151: mv s0, s3 lui a1, 1 @@ -69175,8 +69166,8 @@ add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4994 -.LBB42_5017: # %lpad14.i2200 + j .LBB42_4996 +.LBB42_5019: # %lpad14.i2200 .Ltmp2148: lui a1, 1 addiw a1, a1, 504 @@ -69184,43 +69175,43 @@ li s9, 0 mv s0, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4996 -.LBB42_5018: # %lpad9.i2188 + j .LBB42_4998 +.LBB42_5020: # %lpad9.i2188 .Ltmp2145: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4996 -.LBB42_5019: # %lpad7.i2184 + j .LBB42_4998 +.LBB42_5021: # %lpad7.i2184 .Ltmp2142: - j .LBB42_5021 -.LBB42_5020: # %lpad3.i2164 + j .LBB42_5023 +.LBB42_5022: # %lpad3.i2164 .Ltmp2139: -.LBB42_5021: # %ehcleanup132.i2165 +.LBB42_5023: # %ehcleanup132.i2165 lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_4998 -.LBB42_5022: # %lpad5.i2090 + j .LBB42_5000 +.LBB42_5024: # %lpad5.i2090 .Ltmp2136: - j .LBB42_5165 -.LBB42_5023: # %lpad3.i2078 + j .LBB42_5167 +.LBB42_5025: # %lpad3.i2078 .Ltmp2133: - j .LBB42_5374 -.LBB42_5024: # %lpad.i2068 + j .LBB42_5376 +.LBB42_5026: # %lpad.i2068 .Ltmp2130: - j .LBB42_5163 -.LBB42_5025: # %lpad5.i2021 -.Ltmp2127: j .LBB42_5165 -.LBB42_5026: # %lpad3.i2009 +.LBB42_5027: # %lpad5.i2021 +.Ltmp2127: + j .LBB42_5167 +.LBB42_5028: # %lpad3.i2009 .Ltmp2124: - j .LBB42_5374 -.LBB42_5027: # %lpad88.i1881 + j .LBB42_5376 +.LBB42_5029: # %lpad88.i1881 .Ltmp2121: mv s2, a0 mv a0, s1 @@ -69251,171 +69242,171 @@ call _ZN8TestCaseD2Ev li s9, 1 sd s2, 112(sp) # 8-byte Folded Spill - j .LBB42_5029 -.LBB42_5028: # %lpad86.i1869 + j .LBB42_5031 +.LBB42_5030: # %lpad86.i1869 .Ltmp2118: li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_5029: # %ehcleanup.i1870 +.LBB42_5031: # %ehcleanup.i1870 ld a0, 680(s6) lui a1, 1 addiw a1, a1, 1200 add a1, sp, a1 - beq a0, a1, .LBB42_5031 -# %bb.5030: # %if.then.i.i248.i1874 + beq a0, a1, .LBB42_5033 +# %bb.5032: # %if.then.i.i248.i1874 call _ZdlPv@plt -.LBB42_5031: # %ehcleanup99.i1857 +.LBB42_5033: # %ehcleanup99.i1857 mv s11, s1 - j .LBB42_5033 -.LBB42_5032: # %lpad79.i1856 + j .LBB42_5035 +.LBB42_5034: # %lpad79.i1856 .Ltmp2115: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_5033: # %ehcleanup99.i1857 +.LBB42_5035: # %ehcleanup99.i1857 ld a0, 712(s6) lui a1, 1 addiw a1, a1, 1232 add a1, sp, a1 - beq a0, a1, .LBB42_5035 -# %bb.5034: # %if.then.i.i254.i1862 + beq a0, a1, .LBB42_5037 +# %bb.5036: # %if.then.i.i254.i1862 call _ZdlPv@plt -.LBB42_5035: # %ehcleanup102.i1841 +.LBB42_5037: # %ehcleanup102.i1841 mv s10, s11 - j .LBB42_5039 -.LBB42_5036: # %lpad77.i1852 + j .LBB42_5041 +.LBB42_5038: # %lpad77.i1852 .Ltmp2112: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 mv s10, s11 - j .LBB42_5038 -.LBB42_5037: # %lpad72.i1840 + j .LBB42_5040 +.LBB42_5039: # %lpad72.i1840 .Ltmp2109: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 -.LBB42_5038: # %ehcleanup102.i1841 +.LBB42_5040: # %ehcleanup102.i1841 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_5039: # %ehcleanup102.i1841 +.LBB42_5041: # %ehcleanup102.i1841 ld a0, 744(s6) lui a1, 1 addiw a1, a1, 1264 add a1, sp, a1 - beq a0, a1, .LBB42_5041 -# %bb.5040: # %if.then.i.i260.i1846 + beq a0, a1, .LBB42_5043 +# %bb.5042: # %if.then.i.i260.i1846 call _ZdlPv@plt -.LBB42_5041: # %ehcleanup105.i1825 +.LBB42_5043: # %ehcleanup105.i1825 mv s8, s10 -.LBB42_5042: # %ehcleanup105.i1825 +.LBB42_5044: # %ehcleanup105.i1825 ld a0, 776(s6) lui a1, 1 addiw a1, a1, 1296 add a1, sp, a1 - beq a0, a1, .LBB42_5044 -# %bb.5043: # %if.then.i.i266.i1830 + beq a0, a1, .LBB42_5046 +# %bb.5045: # %if.then.i.i266.i1830 call _ZdlPv@plt -.LBB42_5044: # %ehcleanup108.i1809 +.LBB42_5046: # %ehcleanup108.i1809 mv s7, s8 -.LBB42_5045: # %ehcleanup108.i1809 +.LBB42_5047: # %ehcleanup108.i1809 ld a0, 808(s6) lui a1, 1 addiw a1, a1, 1328 add a1, sp, a1 - beq a0, a1, .LBB42_5047 -# %bb.5046: # %if.then.i.i272.i1814 + beq a0, a1, .LBB42_5049 +# %bb.5048: # %if.then.i.i272.i1814 call _ZdlPv@plt -.LBB42_5047: # %ehcleanup111.i1793 +.LBB42_5049: # %ehcleanup111.i1793 mv s5, s7 -.LBB42_5048: # %ehcleanup111.i1793 +.LBB42_5050: # %ehcleanup111.i1793 ld a0, 840(s6) lui a1, 1 addiw a1, a1, 1360 add a1, sp, a1 - beq a0, a1, .LBB42_5050 -# %bb.5049: # %if.then.i.i278.i1798 + beq a0, a1, .LBB42_5052 +# %bb.5051: # %if.then.i.i278.i1798 call _ZdlPv@plt -.LBB42_5050: # %ehcleanup114.i1780 +.LBB42_5052: # %ehcleanup114.i1780 mv s4, s5 -.LBB42_5051: # %ehcleanup114.i1780 +.LBB42_5053: # %ehcleanup114.i1780 ld a0, 872(s6) lui a1, 1 addiw a1, a1, 1392 add a1, sp, a1 - beq a0, a1, .LBB42_5053 -# %bb.5052: # %if.then.i.i284.i1785 + beq a0, a1, .LBB42_5055 +# %bb.5054: # %if.then.i.i284.i1785 call _ZdlPv@plt -.LBB42_5053: # %ehcleanup117.i1764 +.LBB42_5055: # %ehcleanup117.i1764 mv s3, s4 -.LBB42_5054: # %ehcleanup117.i1764 +.LBB42_5056: # %ehcleanup117.i1764 ld a0, 904(s6) lui a1, 1 addiw a1, a1, 1424 add a1, sp, a1 - beq a0, a1, .LBB42_5056 -# %bb.5055: # %if.then.i.i290.i1769 + beq a0, a1, .LBB42_5058 +# %bb.5057: # %if.then.i.i290.i1769 call _ZdlPv@plt -.LBB42_5056: # %ehcleanup120.i1748 +.LBB42_5058: # %ehcleanup120.i1748 mv s0, s3 -.LBB42_5057: # %ehcleanup120.i1748 +.LBB42_5059: # %ehcleanup120.i1748 ld a0, 936(s6) lui a1, 1 addiw a1, a1, 1456 add a1, sp, a1 - beq a0, a1, .LBB42_5059 -# %bb.5058: # %if.then.i.i296.i1753 + beq a0, a1, .LBB42_5061 +# %bb.5060: # %if.then.i.i296.i1753 call _ZdlPv@plt -.LBB42_5059: # %ehcleanup123.i1732 +.LBB42_5061: # %ehcleanup123.i1732 ld a0, 968(s6) lui a1, 1 addiw a1, a1, 1488 add a1, sp, a1 - beq a0, a1, .LBB42_5061 -# %bb.5060: # %if.then.i.i302.i1737 + beq a0, a1, .LBB42_5063 +# %bb.5062: # %if.then.i.i302.i1737 call _ZdlPv@plt -.LBB42_5061: # %ehcleanup126.i1716 +.LBB42_5063: # %ehcleanup126.i1716 ld a0, 1000(s6) lui a1, 1 addiw a1, a1, 1520 add a1, sp, a1 - beq a0, a1, .LBB42_5063 -# %bb.5062: # %if.then.i.i308.i1721 + beq a0, a1, .LBB42_5065 +# %bb.5064: # %if.then.i.i308.i1721 call _ZdlPv@plt -.LBB42_5063: # %ehcleanup129.i1700 +.LBB42_5065: # %ehcleanup129.i1700 ld a0, 1032(s6) lui a1, 1 addiw a1, a1, 1552 add a1, sp, a1 - beq a0, a1, .LBB42_5065 -# %bb.5064: # %if.then.i.i314.i1705 + beq a0, a1, .LBB42_5067 +# %bb.5066: # %if.then.i.i314.i1705 call _ZdlPv@plt -.LBB42_5065: # %ehcleanup132.i1676 +.LBB42_5067: # %ehcleanup132.i1676 ld a0, 1064(s6) lui a1, 1 addiw a1, a1, 1584 add a1, sp, a1 - beq a0, a1, .LBB42_5067 -# %bb.5066: # %if.then.i.i320.i1681 + beq a0, a1, .LBB42_5069 +# %bb.5068: # %if.then.i.i320.i1681 call _ZdlPv@plt -.LBB42_5067: # %ehcleanup133.i1682 +.LBB42_5069: # %ehcleanup133.i1682 addi s1, sp, 552 xor a0, s1, s0 seqz a0, a0 or a0, s9, a0 - beqz a0, .LBB42_5068 - j .LBB42_5497 -.LBB42_5068: # %arraydestroy.body136.i1685 + beqz a0, .LBB42_5070 + j .LBB42_5499 +.LBB42_5070: # %arraydestroy.body136.i1685 # =>This Inner Loop Header: Depth=1 addi s0, s0, -88 mv a0, s0 call _ZN8TestCaseD2Ev - bne s0, s1, .LBB42_5068 - j .LBB42_5497 -.LBB42_5069: # %lpad70.i1836 + bne s0, s1, .LBB42_5070 + j .LBB42_5499 +.LBB42_5071: # %lpad70.i1836 .Ltmp2106: lui a1, 1 addiw a1, a1, 504 @@ -69423,16 +69414,16 @@ li s9, 0 mv s8, s10 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5042 -.LBB42_5070: # %lpad65.i1824 + j .LBB42_5044 +.LBB42_5072: # %lpad65.i1824 .Ltmp2103: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5042 -.LBB42_5071: # %lpad63.i1820 + j .LBB42_5044 +.LBB42_5073: # %lpad63.i1820 .Ltmp2100: lui a1, 1 addiw a1, a1, 504 @@ -69440,16 +69431,16 @@ li s9, 0 mv s7, s8 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5045 -.LBB42_5072: # %lpad58.i1808 + j .LBB42_5047 +.LBB42_5074: # %lpad58.i1808 .Ltmp2097: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5045 -.LBB42_5073: # %lpad56.i1804 + j .LBB42_5047 +.LBB42_5075: # %lpad56.i1804 .Ltmp2094: lui a1, 1 addiw a1, a1, 504 @@ -69457,24 +69448,24 @@ li s9, 0 mv s5, s7 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5048 -.LBB42_5074: # %lpad51.i1792 + j .LBB42_5050 +.LBB42_5076: # %lpad51.i1792 .Ltmp2091: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5048 -.LBB42_5075: # %lpad44.i1779 + j .LBB42_5050 +.LBB42_5077: # %lpad44.i1779 .Ltmp2088: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5051 -.LBB42_5076: # %lpad42.i1775 + j .LBB42_5053 +.LBB42_5078: # %lpad42.i1775 .Ltmp2085: lui a1, 1 addiw a1, a1, 504 @@ -69482,16 +69473,16 @@ li s9, 0 mv s3, s4 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5054 -.LBB42_5077: # %lpad37.i1763 + j .LBB42_5056 +.LBB42_5079: # %lpad37.i1763 .Ltmp2082: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5054 -.LBB42_5078: # %lpad35.i1759 + j .LBB42_5056 +.LBB42_5080: # %lpad35.i1759 .Ltmp2079: lui a1, 1 addiw a1, a1, 504 @@ -69499,8 +69490,8 @@ li s9, 0 mv s0, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5057 -.LBB42_5079: # %lpad30.i1747 + j .LBB42_5059 +.LBB42_5081: # %lpad30.i1747 .Ltmp2076: mv s0, s1 lui a1, 1 @@ -69508,8 +69499,8 @@ add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5057 -.LBB42_5080: # %lpad28.i1743 + j .LBB42_5059 +.LBB42_5082: # %lpad28.i1743 .Ltmp2073: lui a1, 1 addiw a1, a1, 504 @@ -69517,8 +69508,8 @@ li s9, 0 mv s0, s1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5059 -.LBB42_5081: # %lpad23.i1731 + j .LBB42_5061 +.LBB42_5083: # %lpad23.i1731 .Ltmp2070: mv s0, s1 lui a1, 1 @@ -69526,8 +69517,8 @@ add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5059 -.LBB42_5082: # %lpad21.i1727 + j .LBB42_5061 +.LBB42_5084: # %lpad21.i1727 .Ltmp2067: lui a1, 1 addiw a1, a1, 504 @@ -69535,8 +69526,8 @@ li s9, 0 mv s0, s1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5061 -.LBB42_5083: # %lpad16.i1715 + j .LBB42_5063 +.LBB42_5085: # %lpad16.i1715 .Ltmp2064: mv s0, s3 lui a1, 1 @@ -69544,8 +69535,8 @@ add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5061 -.LBB42_5084: # %lpad14.i1711 + j .LBB42_5063 +.LBB42_5086: # %lpad14.i1711 .Ltmp2061: lui a1, 1 addiw a1, a1, 504 @@ -69553,43 +69544,43 @@ li s9, 0 mv s0, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5063 -.LBB42_5085: # %lpad9.i1699 + j .LBB42_5065 +.LBB42_5087: # %lpad9.i1699 .Ltmp2058: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5063 -.LBB42_5086: # %lpad7.i1695 + j .LBB42_5065 +.LBB42_5088: # %lpad7.i1695 .Ltmp2055: - j .LBB42_5088 -.LBB42_5087: # %lpad3.i1675 + j .LBB42_5090 +.LBB42_5089: # %lpad3.i1675 .Ltmp2052: -.LBB42_5088: # %ehcleanup132.i1676 +.LBB42_5090: # %ehcleanup132.i1676 lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s9, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5065 -.LBB42_5089: # %lpad5.i1601 + j .LBB42_5067 +.LBB42_5091: # %lpad5.i1601 .Ltmp2049: - j .LBB42_5165 -.LBB42_5090: # %lpad3.i1589 + j .LBB42_5167 +.LBB42_5092: # %lpad3.i1589 .Ltmp2046: - j .LBB42_5374 -.LBB42_5091: # %lpad.i1580 + j .LBB42_5376 +.LBB42_5093: # %lpad.i1580 .Ltmp2043: - j .LBB42_5163 -.LBB42_5092: # %lpad5.i1533 -.Ltmp2040: j .LBB42_5165 -.LBB42_5093: # %lpad3.i1521 +.LBB42_5094: # %lpad5.i1533 +.Ltmp2040: + j .LBB42_5167 +.LBB42_5095: # %lpad3.i1521 .Ltmp2037: - j .LBB42_5374 -.LBB42_5094: # %lpad95.i1387 + j .LBB42_5376 +.LBB42_5096: # %lpad95.i1387 .Ltmp2034: mv s2, a0 mv a0, s1 @@ -69622,179 +69613,179 @@ call _ZN8TestCaseD2Ev li s10, 1 sd s2, 112(sp) # 8-byte Folded Spill - j .LBB42_5096 -.LBB42_5095: # %lpad93.i1375 + j .LBB42_5098 +.LBB42_5097: # %lpad93.i1375 .Ltmp2031: li s10, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_5096: # %ehcleanup.i1376 +.LBB42_5098: # %ehcleanup.i1376 ld a0, 648(s6) lui a1, 1 addiw a1, a1, 1168 add a1, sp, a1 - beq a0, a1, .LBB42_5098 -# %bb.5097: # %if.then.i.i268.i1380 + beq a0, a1, .LBB42_5100 +# %bb.5099: # %if.then.i.i268.i1380 call _ZdlPv@plt -.LBB42_5098: # %ehcleanup106.i1363 +.LBB42_5100: # %ehcleanup106.i1363 mv s11, s1 - j .LBB42_5100 -.LBB42_5099: # %lpad86.i1362 + j .LBB42_5102 +.LBB42_5101: # %lpad86.i1362 .Ltmp2028: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s10, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_5100: # %ehcleanup106.i1363 +.LBB42_5102: # %ehcleanup106.i1363 ld a0, 680(s6) lui a1, 1 addiw a1, a1, 1200 add a1, sp, a1 - beq a0, a1, .LBB42_5102 -# %bb.5101: # %if.then.i.i274.i1368 + beq a0, a1, .LBB42_5104 +# %bb.5103: # %if.then.i.i274.i1368 call _ZdlPv@plt -.LBB42_5102: # %ehcleanup109.i1347 +.LBB42_5104: # %ehcleanup109.i1347 mv s9, s11 - j .LBB42_5106 -.LBB42_5103: # %lpad84.i1358 + j .LBB42_5108 +.LBB42_5105: # %lpad84.i1358 .Ltmp2025: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s10, 0 mv s9, s11 - j .LBB42_5105 -.LBB42_5104: # %lpad79.i1346 + j .LBB42_5107 +.LBB42_5106: # %lpad79.i1346 .Ltmp2022: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s10, 0 -.LBB42_5105: # %ehcleanup109.i1347 +.LBB42_5107: # %ehcleanup109.i1347 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_5106: # %ehcleanup109.i1347 +.LBB42_5108: # %ehcleanup109.i1347 ld a0, 712(s6) lui a1, 1 addiw a1, a1, 1232 add a1, sp, a1 - beq a0, a1, .LBB42_5108 -# %bb.5107: # %if.then.i.i280.i1352 + beq a0, a1, .LBB42_5110 +# %bb.5109: # %if.then.i.i280.i1352 call _ZdlPv@plt -.LBB42_5108: # %ehcleanup112.i1331 +.LBB42_5110: # %ehcleanup112.i1331 mv s8, s9 -.LBB42_5109: # %ehcleanup112.i1331 +.LBB42_5111: # %ehcleanup112.i1331 ld a0, 744(s6) lui a1, 1 addiw a1, a1, 1264 add a1, sp, a1 - beq a0, a1, .LBB42_5111 -# %bb.5110: # %if.then.i.i286.i1336 + beq a0, a1, .LBB42_5113 +# %bb.5112: # %if.then.i.i286.i1336 call _ZdlPv@plt -.LBB42_5111: # %ehcleanup115.i1315 +.LBB42_5113: # %ehcleanup115.i1315 mv s7, s8 -.LBB42_5112: # %ehcleanup115.i1315 +.LBB42_5114: # %ehcleanup115.i1315 ld a0, 776(s6) lui a1, 1 addiw a1, a1, 1296 add a1, sp, a1 - beq a0, a1, .LBB42_5114 -# %bb.5113: # %if.then.i.i292.i1320 + beq a0, a1, .LBB42_5116 +# %bb.5115: # %if.then.i.i292.i1320 call _ZdlPv@plt -.LBB42_5114: # %ehcleanup118.i1299 +.LBB42_5116: # %ehcleanup118.i1299 mv s5, s7 -.LBB42_5115: # %ehcleanup118.i1299 +.LBB42_5117: # %ehcleanup118.i1299 ld a0, 808(s6) lui a1, 1 addiw a1, a1, 1328 add a1, sp, a1 - beq a0, a1, .LBB42_5117 -# %bb.5116: # %if.then.i.i298.i1304 + beq a0, a1, .LBB42_5119 +# %bb.5118: # %if.then.i.i298.i1304 call _ZdlPv@plt -.LBB42_5117: # %ehcleanup121.i1283 +.LBB42_5119: # %ehcleanup121.i1283 mv s4, s5 -.LBB42_5118: # %ehcleanup121.i1283 +.LBB42_5120: # %ehcleanup121.i1283 ld a0, 840(s6) lui a1, 1 addiw a1, a1, 1360 add a1, sp, a1 - beq a0, a1, .LBB42_5120 -# %bb.5119: # %if.then.i.i304.i1288 + beq a0, a1, .LBB42_5122 +# %bb.5121: # %if.then.i.i304.i1288 call _ZdlPv@plt -.LBB42_5120: # %ehcleanup124.i1270 +.LBB42_5122: # %ehcleanup124.i1270 mv s3, s4 -.LBB42_5121: # %ehcleanup124.i1270 +.LBB42_5123: # %ehcleanup124.i1270 ld a0, 872(s6) lui a1, 1 addiw a1, a1, 1392 add a1, sp, a1 - beq a0, a1, .LBB42_5123 -# %bb.5122: # %if.then.i.i310.i1275 + beq a0, a1, .LBB42_5125 +# %bb.5124: # %if.then.i.i310.i1275 call _ZdlPv@plt -.LBB42_5123: # %ehcleanup127.i1254 +.LBB42_5125: # %ehcleanup127.i1254 mv s0, s3 -.LBB42_5124: # %ehcleanup127.i1254 +.LBB42_5126: # %ehcleanup127.i1254 ld a0, 904(s6) lui a1, 1 addiw a1, a1, 1424 add a1, sp, a1 - beq a0, a1, .LBB42_5126 -# %bb.5125: # %if.then.i.i316.i1259 + beq a0, a1, .LBB42_5128 +# %bb.5127: # %if.then.i.i316.i1259 call _ZdlPv@plt -.LBB42_5126: # %ehcleanup130.i1238 +.LBB42_5128: # %ehcleanup130.i1238 ld a0, 936(s6) lui a1, 1 addiw a1, a1, 1456 add a1, sp, a1 - beq a0, a1, .LBB42_5128 -# %bb.5127: # %if.then.i.i322.i1243 + beq a0, a1, .LBB42_5130 +# %bb.5129: # %if.then.i.i322.i1243 call _ZdlPv@plt -.LBB42_5128: # %ehcleanup133.i1222 +.LBB42_5130: # %ehcleanup133.i1222 ld a0, 968(s6) lui a1, 1 addiw a1, a1, 1488 add a1, sp, a1 - beq a0, a1, .LBB42_5130 -# %bb.5129: # %if.then.i.i328.i1227 + beq a0, a1, .LBB42_5132 +# %bb.5131: # %if.then.i.i328.i1227 call _ZdlPv@plt -.LBB42_5130: # %ehcleanup136.i1206 +.LBB42_5132: # %ehcleanup136.i1206 ld a0, 1000(s6) lui a1, 1 addiw a1, a1, 1520 add a1, sp, a1 - beq a0, a1, .LBB42_5132 -# %bb.5131: # %if.then.i.i334.i1211 + beq a0, a1, .LBB42_5134 +# %bb.5133: # %if.then.i.i334.i1211 call _ZdlPv@plt -.LBB42_5132: # %ehcleanup139.i1190 +.LBB42_5134: # %ehcleanup139.i1190 ld a0, 1032(s6) lui a1, 1 addiw a1, a1, 1552 add a1, sp, a1 - beq a0, a1, .LBB42_5134 -# %bb.5133: # %if.then.i.i340.i1195 + beq a0, a1, .LBB42_5136 +# %bb.5135: # %if.then.i.i340.i1195 call _ZdlPv@plt -.LBB42_5134: # %ehcleanup142.i1166 +.LBB42_5136: # %ehcleanup142.i1166 ld a0, 1064(s6) lui a1, 1 addiw a1, a1, 1584 add a1, sp, a1 - beq a0, a1, .LBB42_5136 -# %bb.5135: # %if.then.i.i346.i1171 + beq a0, a1, .LBB42_5138 +# %bb.5137: # %if.then.i.i346.i1171 call _ZdlPv@plt -.LBB42_5136: # %ehcleanup143.i1172 +.LBB42_5138: # %ehcleanup143.i1172 addi s1, sp, 552 xor a0, s1, s0 seqz a0, a0 or a0, s10, a0 - beqz a0, .LBB42_5137 - j .LBB42_5497 -.LBB42_5137: # %arraydestroy.body146.i1175 + beqz a0, .LBB42_5139 + j .LBB42_5499 +.LBB42_5139: # %arraydestroy.body146.i1175 # =>This Inner Loop Header: Depth=1 addi s0, s0, -88 mv a0, s0 call _ZN8TestCaseD2Ev - bne s0, s1, .LBB42_5137 - j .LBB42_5497 -.LBB42_5138: # %lpad77.i1342 + bne s0, s1, .LBB42_5139 + j .LBB42_5499 +.LBB42_5140: # %lpad77.i1342 .Ltmp2019: lui a1, 1 addiw a1, a1, 504 @@ -69802,16 +69793,16 @@ li s10, 0 mv s8, s9 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5109 -.LBB42_5139: # %lpad72.i1330 + j .LBB42_5111 +.LBB42_5141: # %lpad72.i1330 .Ltmp2016: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s10, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5109 -.LBB42_5140: # %lpad70.i1326 + j .LBB42_5111 +.LBB42_5142: # %lpad70.i1326 .Ltmp2013: lui a1, 1 addiw a1, a1, 504 @@ -69819,16 +69810,16 @@ li s10, 0 mv s7, s8 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5112 -.LBB42_5141: # %lpad65.i1314 + j .LBB42_5114 +.LBB42_5143: # %lpad65.i1314 .Ltmp2010: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s10, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5112 -.LBB42_5142: # %lpad63.i1310 + j .LBB42_5114 +.LBB42_5144: # %lpad63.i1310 .Ltmp2007: lui a1, 1 addiw a1, a1, 504 @@ -69836,16 +69827,16 @@ li s10, 0 mv s5, s7 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5115 -.LBB42_5143: # %lpad58.i1298 + j .LBB42_5117 +.LBB42_5145: # %lpad58.i1298 .Ltmp2004: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s10, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5115 -.LBB42_5144: # %lpad56.i1294 + j .LBB42_5117 +.LBB42_5146: # %lpad56.i1294 .Ltmp2001: lui a1, 1 addiw a1, a1, 504 @@ -69853,24 +69844,24 @@ li s10, 0 mv s4, s5 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5118 -.LBB42_5145: # %lpad51.i1282 + j .LBB42_5120 +.LBB42_5147: # %lpad51.i1282 .Ltmp1998: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s10, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5118 -.LBB42_5146: # %lpad44.i1269 + j .LBB42_5120 +.LBB42_5148: # %lpad44.i1269 .Ltmp1995: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s10, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5121 -.LBB42_5147: # %lpad42.i1265 + j .LBB42_5123 +.LBB42_5149: # %lpad42.i1265 .Ltmp1992: lui a1, 1 addiw a1, a1, 504 @@ -69878,8 +69869,8 @@ li s10, 0 mv s0, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5124 -.LBB42_5148: # %lpad37.i1253 + j .LBB42_5126 +.LBB42_5150: # %lpad37.i1253 .Ltmp1989: mv s0, s1 lui a1, 1 @@ -69887,8 +69878,8 @@ add s6, sp, a1 li s10, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5124 -.LBB42_5149: # %lpad35.i1249 + j .LBB42_5126 +.LBB42_5151: # %lpad35.i1249 .Ltmp1986: lui a1, 1 addiw a1, a1, 504 @@ -69896,8 +69887,8 @@ li s10, 0 mv s0, s1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5126 -.LBB42_5150: # %lpad30.i1237 + j .LBB42_5128 +.LBB42_5152: # %lpad30.i1237 .Ltmp1983: mv s0, s1 lui a1, 1 @@ -69905,8 +69896,8 @@ add s6, sp, a1 li s10, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5126 -.LBB42_5151: # %lpad28.i1233 + j .LBB42_5128 +.LBB42_5153: # %lpad28.i1233 .Ltmp1980: lui a1, 1 addiw a1, a1, 504 @@ -69914,8 +69905,8 @@ li s10, 0 mv s0, s1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5128 -.LBB42_5152: # %lpad23.i1221 + j .LBB42_5130 +.LBB42_5154: # %lpad23.i1221 .Ltmp1977: mv s0, s1 lui a1, 1 @@ -69923,8 +69914,8 @@ add s6, sp, a1 li s10, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5128 -.LBB42_5153: # %lpad21.i1217 + j .LBB42_5130 +.LBB42_5155: # %lpad21.i1217 .Ltmp1974: lui a1, 1 addiw a1, a1, 504 @@ -69932,8 +69923,8 @@ li s10, 0 mv s0, s1 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5130 -.LBB42_5154: # %lpad16.i1205 + j .LBB42_5132 +.LBB42_5156: # %lpad16.i1205 .Ltmp1971: mv s0, s3 lui a1, 1 @@ -69941,8 +69932,8 @@ add s6, sp, a1 li s10, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5130 -.LBB42_5155: # %lpad14.i1201 + j .LBB42_5132 +.LBB42_5157: # %lpad14.i1201 .Ltmp1968: lui a1, 1 addiw a1, a1, 504 @@ -69950,54 +69941,54 @@ li s10, 0 mv s0, s3 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5132 -.LBB42_5156: # %lpad9.i1189 + j .LBB42_5134 +.LBB42_5158: # %lpad9.i1189 .Ltmp1965: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s10, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5132 -.LBB42_5157: # %lpad7.i1185 + j .LBB42_5134 +.LBB42_5159: # %lpad7.i1185 .Ltmp1962: - j .LBB42_5159 -.LBB42_5158: # %lpad3.i1165 + j .LBB42_5161 +.LBB42_5160: # %lpad3.i1165 .Ltmp1959: -.LBB42_5159: # %ehcleanup142.i1166 +.LBB42_5161: # %ehcleanup142.i1166 lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 li s10, 0 sd a0, 112(sp) # 8-byte Folded Spill - j .LBB42_5134 -.LBB42_5160: # %lpad5.i1089 + j .LBB42_5136 +.LBB42_5162: # %lpad5.i1089 .Ltmp1956: - j .LBB42_5165 -.LBB42_5161: # %lpad3.i1077 + j .LBB42_5167 +.LBB42_5163: # %lpad3.i1077 .Ltmp1953: - j .LBB42_5374 -.LBB42_5162: # %lpad.i1068 + j .LBB42_5376 +.LBB42_5164: # %lpad.i1068 .Ltmp1950: -.LBB42_5163: # %common.resume +.LBB42_5165: # %common.resume mv s1, a0 mv a0, s0 call _ZdlPv@plt sd s1, 112(sp) # 8-byte Folded Spill ld a0, 112(sp) # 8-byte Folded Reload call _Unwind_Resume@plt -.LBB42_5164: # %lpad5.i1021 +.LBB42_5166: # %lpad5.i1021 .Ltmp1947: -.LBB42_5165: # %ehcleanup.i12289 +.LBB42_5167: # %ehcleanup.i12289 mv s0, a0 addi a0, sp, 552 call _ZN8TestCaseD2Ev sd s0, 112(sp) # 8-byte Folded Spill - j .LBB42_5375 -.LBB42_5166: # %lpad3.i1009 + j .LBB42_5377 +.LBB42_5168: # %lpad3.i1009 .Ltmp1944: - j .LBB42_5374 -.LBB42_5167: # %lpad95.i875 + j .LBB42_5376 +.LBB42_5169: # %lpad95.i875 .Ltmp1941: mv s2, a0 mv a0, s1 @@ -70030,258 +70021,258 @@ call _ZN8TestCaseD2Ev li s10, 1 sd s2, 112(sp) # 8-byte Folded Spill - j .LBB42_5169 -.LBB42_5168: # %lpad93.i863 + j .LBB42_5171 +.LBB42_5170: # %lpad93.i863 .Ltmp1938: li s10, 0 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_5169: # %ehcleanup.i864 +.LBB42_5171: # %ehcleanup.i864 ld a0, 648(s6) lui a1, 1 addiw a1, a1, 1168 add a1, sp, a1 - beq a0, a1, .LBB42_5171 -# %bb.5170: # %if.then.i.i268.i868 + beq a0, a1, .LBB42_5173 +# %bb.5172: # %if.then.i.i268.i868 call _ZdlPv@plt -.LBB42_5171: # %ehcleanup106.i851 +.LBB42_5173: # %ehcleanup106.i851 mv s11, s1 - j .LBB42_5173 -.LBB42_5172: # %lpad86.i850 + j .LBB42_5175 +.LBB42_5174: # %lpad86.i850 .Ltmp1935: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 -.LBB42_5173: # %ehcleanup106.i851 +.LBB42_5175: # %ehcleanup106.i851 ld a0, 680(s6) lui a1, 1 addiw a1, a1, 1200 add a1, sp, a1 - beq a0, a1, .LBB42_5176 -# %bb.5174: # %if.then.i.i274.i856 + beq a0, a1, .LBB42_5178 +# %bb.5176: # %if.then.i.i274.i856 call _ZdlPv@plt - j .LBB42_5176 -.LBB42_5175: # %lpad84.i846 + j .LBB42_5178 +.LBB42_5177: # %lpad84.i846 .Ltmp1932: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 -.LBB42_5176: # %ehcleanup109.i835 +.LBB42_5178: # %ehcleanup109.i835 mv s9, s11 - j .LBB42_5178 -.LBB42_5177: # %lpad79.i834 + j .LBB42_5180 +.LBB42_5179: # %lpad79.i834 .Ltmp1929: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 -.LBB42_5178: # %ehcleanup109.i835 +.LBB42_5180: # %ehcleanup109.i835 ld a0, 712(s6) lui a1, 1 addiw a1, a1, 1232 add a1, sp, a1 - beq a0, a1, .LBB42_5181 -# %bb.5179: # %if.then.i.i280.i840 + beq a0, a1, .LBB42_5183 +# %bb.5181: # %if.then.i.i280.i840 call _ZdlPv@plt - j .LBB42_5181 -.LBB42_5180: # %lpad77.i830 + j .LBB42_5183 +.LBB42_5182: # %lpad77.i830 .Ltmp1926: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 -.LBB42_5181: # %ehcleanup112.i819 +.LBB42_5183: # %ehcleanup112.i819 mv s8, s9 -.LBB42_5182: # %ehcleanup112.i819 +.LBB42_5184: # %ehcleanup112.i819 ld a0, 744(s6) lui a1, 1 addiw a1, a1, 1264 add a1, sp, a1 - beq a0, a1, .LBB42_5186 -# %bb.5183: # %if.then.i.i286.i824 + beq a0, a1, .LBB42_5188 +# %bb.5185: # %if.then.i.i286.i824 call _ZdlPv@plt - j .LBB42_5186 -.LBB42_5184: # %lpad72.i818 + j .LBB42_5188 +.LBB42_5186: # %lpad72.i818 .Ltmp1923: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 - j .LBB42_5182 -.LBB42_5185: # %lpad70.i814 + j .LBB42_5184 +.LBB42_5187: # %lpad70.i814 .Ltmp1920: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 -.LBB42_5186: # %ehcleanup115.i803 +.LBB42_5188: # %ehcleanup115.i803 mv s7, s8 -.LBB42_5187: # %ehcleanup115.i803 +.LBB42_5189: # %ehcleanup115.i803 ld a0, 776(s6) lui a1, 1 addiw a1, a1, 1296 add a1, sp, a1 - beq a0, a1, .LBB42_5189 -# %bb.5188: # %if.then.i.i292.i808 + beq a0, a1, .LBB42_5191 +# %bb.5190: # %if.then.i.i292.i808 call _ZdlPv@plt -.LBB42_5189: # %ehcleanup118.i787 +.LBB42_5191: # %ehcleanup118.i787 mv s5, s7 -.LBB42_5190: # %ehcleanup118.i787 +.LBB42_5192: # %ehcleanup118.i787 ld a0, 808(s6) lui a1, 1 addiw a1, a1, 1328 add a1, sp, a1 - beq a0, a1, .LBB42_5192 -# %bb.5191: # %if.then.i.i298.i792 + beq a0, a1, .LBB42_5194 +# %bb.5193: # %if.then.i.i298.i792 call _ZdlPv@plt -.LBB42_5192: # %ehcleanup121.i771 +.LBB42_5194: # %ehcleanup121.i771 mv s4, s5 -.LBB42_5193: # %ehcleanup121.i771 +.LBB42_5195: # %ehcleanup121.i771 ld a0, 840(s6) lui a1, 1 addiw a1, a1, 1360 add a1, sp, a1 - beq a0, a1, .LBB42_5195 -# %bb.5194: # %if.then.i.i304.i776 + beq a0, a1, .LBB42_5197 +# %bb.5196: # %if.then.i.i304.i776 call _ZdlPv@plt -.LBB42_5195: # %ehcleanup124.i758 +.LBB42_5197: # %ehcleanup124.i758 mv s3, s4 -.LBB42_5196: # %ehcleanup124.i758 +.LBB42_5198: # %ehcleanup124.i758 ld a0, 872(s6) lui a1, 1 addiw a1, a1, 1392 add a1, sp, a1 - beq a0, a1, .LBB42_5198 -# %bb.5197: # %if.then.i.i310.i763 + beq a0, a1, .LBB42_5200 +# %bb.5199: # %if.then.i.i310.i763 call _ZdlPv@plt -.LBB42_5198: # %ehcleanup127.i742 +.LBB42_5200: # %ehcleanup127.i742 mv s0, s3 -.LBB42_5199: # %ehcleanup127.i742 +.LBB42_5201: # %ehcleanup127.i742 ld a0, 904(s6) lui a1, 1 addiw a1, a1, 1424 add a1, sp, a1 - beq a0, a1, .LBB42_5201 -# %bb.5200: # %if.then.i.i316.i747 + beq a0, a1, .LBB42_5203 +# %bb.5202: # %if.then.i.i316.i747 call _ZdlPv@plt -.LBB42_5201: # %ehcleanup130.i726 +.LBB42_5203: # %ehcleanup130.i726 ld a0, 936(s6) lui a1, 1 addiw a1, a1, 1456 add a1, sp, a1 - beq a0, a1, .LBB42_5203 -# %bb.5202: # %if.then.i.i322.i731 + beq a0, a1, .LBB42_5205 +# %bb.5204: # %if.then.i.i322.i731 call _ZdlPv@plt -.LBB42_5203: # %ehcleanup133.i710 +.LBB42_5205: # %ehcleanup133.i710 ld a0, 968(s6) lui a1, 1 addiw a1, a1, 1488 add a1, sp, a1 - beq a0, a1, .LBB42_5205 -# %bb.5204: # %if.then.i.i328.i715 + beq a0, a1, .LBB42_5207 +# %bb.5206: # %if.then.i.i328.i715 call _ZdlPv@plt -.LBB42_5205: # %ehcleanup136.i694 +.LBB42_5207: # %ehcleanup136.i694 ld a0, 1000(s6) lui a1, 1 addiw a1, a1, 1520 add a1, sp, a1 - beq a0, a1, .LBB42_5207 -# %bb.5206: # %if.then.i.i334.i699 + beq a0, a1, .LBB42_5209 +# %bb.5208: # %if.then.i.i334.i699 call _ZdlPv@plt -.LBB42_5207: # %ehcleanup139.i678 +.LBB42_5209: # %ehcleanup139.i678 ld a0, 1032(s6) lui a1, 1 addiw a1, a1, 1552 add a1, sp, a1 - beq a0, a1, .LBB42_5209 -# %bb.5208: # %if.then.i.i340.i683 + beq a0, a1, .LBB42_5211 +# %bb.5210: # %if.then.i.i340.i683 call _ZdlPv@plt -.LBB42_5209: # %ehcleanup142.i654 +.LBB42_5211: # %ehcleanup142.i654 ld a0, 1064(s6) lui a1, 1 addiw a1, a1, 1584 add a1, sp, a1 - beq a0, a1, .LBB42_5211 -# %bb.5210: # %if.then.i.i346.i659 + beq a0, a1, .LBB42_5213 +# %bb.5212: # %if.then.i.i346.i659 call _ZdlPv@plt -.LBB42_5211: # %ehcleanup143.i660 +.LBB42_5213: # %ehcleanup143.i660 addi s1, sp, 552 xor a0, s1, s0 seqz a0, a0 or a0, s10, a0 - beqz a0, .LBB42_5212 - j .LBB42_5497 -.LBB42_5212: # %arraydestroy.body146.i663 + beqz a0, .LBB42_5214 + j .LBB42_5499 +.LBB42_5214: # %arraydestroy.body146.i663 # =>This Inner Loop Header: Depth=1 addi s0, s0, -88 mv a0, s0 call _ZN8TestCaseD2Ev - bne s0, s1, .LBB42_5212 - j .LBB42_5497 -.LBB42_5213: # %lpad65.i802 + bne s0, s1, .LBB42_5214 + j .LBB42_5499 +.LBB42_5215: # %lpad65.i802 .Ltmp1917: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 - j .LBB42_5187 -.LBB42_5214: # %lpad63.i798 + j .LBB42_5189 +.LBB42_5216: # %lpad63.i798 .Ltmp1914: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 - j .LBB42_5189 -.LBB42_5215: # %lpad58.i786 + j .LBB42_5191 +.LBB42_5217: # %lpad58.i786 .Ltmp1911: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 - j .LBB42_5190 -.LBB42_5216: # %lpad56.i782 + j .LBB42_5192 +.LBB42_5218: # %lpad56.i782 .Ltmp1908: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 - j .LBB42_5192 -.LBB42_5217: # %lpad51.i770 + j .LBB42_5194 +.LBB42_5219: # %lpad51.i770 .Ltmp1905: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 - j .LBB42_5193 -.LBB42_5218: # %lpad44.i757 + j .LBB42_5195 +.LBB42_5220: # %lpad44.i757 .Ltmp1902: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 - j .LBB42_5196 -.LBB42_5219: # %lpad42.i753 + j .LBB42_5198 +.LBB42_5221: # %lpad42.i753 .Ltmp1899: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 - j .LBB42_5198 -.LBB42_5220: # %lpad37.i741 + j .LBB42_5200 +.LBB42_5222: # %lpad37.i741 .Ltmp1896: mv s0, s1 lui a1, 1 @@ -70289,8 +70280,8 @@ add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 - j .LBB42_5199 -.LBB42_5221: # %lpad35.i737 + j .LBB42_5201 +.LBB42_5223: # %lpad35.i737 .Ltmp1893: lui a1, 1 addiw a1, a1, 504 @@ -70298,8 +70289,8 @@ sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 mv s0, s1 - j .LBB42_5201 -.LBB42_5222: # %lpad30.i725 + j .LBB42_5203 +.LBB42_5224: # %lpad30.i725 .Ltmp1890: mv s0, s1 lui a1, 1 @@ -70307,8 +70298,8 @@ add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 - j .LBB42_5201 -.LBB42_5223: # %lpad28.i721 + j .LBB42_5203 +.LBB42_5225: # %lpad28.i721 .Ltmp1887: lui a1, 1 addiw a1, a1, 504 @@ -70316,8 +70307,8 @@ sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 mv s0, s1 - j .LBB42_5203 -.LBB42_5224: # %lpad23.i709 + j .LBB42_5205 +.LBB42_5226: # %lpad23.i709 .Ltmp1884: mv s0, s1 lui a1, 1 @@ -70325,8 +70316,8 @@ add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 - j .LBB42_5203 -.LBB42_5225: # %lpad21.i705 + j .LBB42_5205 +.LBB42_5227: # %lpad21.i705 .Ltmp1881: lui a1, 1 addiw a1, a1, 504 @@ -70334,8 +70325,8 @@ sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 mv s0, s1 - j .LBB42_5205 -.LBB42_5226: # %lpad16.i693 + j .LBB42_5207 +.LBB42_5228: # %lpad16.i693 .Ltmp1878: mv s0, s3 lui a1, 1 @@ -70343,8 +70334,8 @@ add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 - j .LBB42_5205 -.LBB42_5227: # %lpad14.i689 + j .LBB42_5207 +.LBB42_5229: # %lpad14.i689 .Ltmp1875: lui a1, 1 addiw a1, a1, 504 @@ -70352,49 +70343,49 @@ sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 mv s0, s3 - j .LBB42_5207 -.LBB42_5228: # %lpad9.i677 + j .LBB42_5209 +.LBB42_5230: # %lpad9.i677 .Ltmp1872: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 - j .LBB42_5207 -.LBB42_5229: # %lpad7.i673 + j .LBB42_5209 +.LBB42_5231: # %lpad7.i673 .Ltmp1869: - j .LBB42_5231 -.LBB42_5230: # %lpad3.i653 + j .LBB42_5233 +.LBB42_5232: # %lpad3.i653 .Ltmp1866: -.LBB42_5231: # %ehcleanup142.i654 +.LBB42_5233: # %ehcleanup142.i654 lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 - j .LBB42_5209 -.LBB42_5232: # %lpad5.i577 + j .LBB42_5211 +.LBB42_5234: # %lpad5.i577 .Ltmp1863: sd a0, 112(sp) # 8-byte Folded Spill addi a0, sp, 552 call _ZN8TestCaseD2Ev - j .LBB42_5375 -.LBB42_5233: # %lpad3.i565 + j .LBB42_5377 +.LBB42_5235: # %lpad3.i565 .Ltmp1860: - j .LBB42_5374 -.LBB42_5234: # %lpad.i556 + j .LBB42_5376 +.LBB42_5236: # %lpad.i556 .Ltmp1857: - j .LBB42_5371 -.LBB42_5235: # %lpad5.i509 + j .LBB42_5373 +.LBB42_5237: # %lpad5.i509 .Ltmp1854: sd a0, 112(sp) # 8-byte Folded Spill addi a0, sp, 552 call _ZN8TestCaseD2Ev - j .LBB42_5375 -.LBB42_5236: # %lpad3.i497 + j .LBB42_5377 +.LBB42_5238: # %lpad3.i497 .Ltmp1851: - j .LBB42_5374 -.LBB42_5237: # %lpad95.i + j .LBB42_5376 +.LBB42_5239: # %lpad95.i .Ltmp1848: sd a0, 112(sp) # 8-byte Folded Spill mv a0, s1 @@ -70426,257 +70417,257 @@ addi a0, sp, 552 call _ZN8TestCaseD2Ev li s10, 1 - j .LBB42_5239 -.LBB42_5238: # %lpad93.i + j .LBB42_5241 +.LBB42_5240: # %lpad93.i .Ltmp1845: sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 -.LBB42_5239: # %ehcleanup.i439 +.LBB42_5241: # %ehcleanup.i439 ld a0, 648(s6) lui a1, 1 addiw a1, a1, 1168 add a1, sp, a1 - beq a0, a1, .LBB42_5241 -# %bb.5240: # %if.then.i.i268.i + beq a0, a1, .LBB42_5243 +# %bb.5242: # %if.then.i.i268.i call _ZdlPv@plt -.LBB42_5241: # %ehcleanup106.i +.LBB42_5243: # %ehcleanup106.i mv s11, s1 - j .LBB42_5243 -.LBB42_5242: # %lpad86.i434 + j .LBB42_5245 +.LBB42_5244: # %lpad86.i434 .Ltmp1842: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 -.LBB42_5243: # %ehcleanup106.i +.LBB42_5245: # %ehcleanup106.i ld a0, 680(s6) lui a1, 1 addiw a1, a1, 1200 add a1, sp, a1 - beq a0, a1, .LBB42_5246 -# %bb.5244: # %if.then.i.i274.i + beq a0, a1, .LBB42_5248 +# %bb.5246: # %if.then.i.i274.i call _ZdlPv@plt - j .LBB42_5246 -.LBB42_5245: # %lpad84.i + j .LBB42_5248 +.LBB42_5247: # %lpad84.i .Ltmp1839: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 -.LBB42_5246: # %ehcleanup109.i +.LBB42_5248: # %ehcleanup109.i mv s9, s11 - j .LBB42_5248 -.LBB42_5247: # %lpad79.i428 + j .LBB42_5250 +.LBB42_5249: # %lpad79.i428 .Ltmp1836: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 -.LBB42_5248: # %ehcleanup109.i +.LBB42_5250: # %ehcleanup109.i ld a0, 712(s6) lui a1, 1 addiw a1, a1, 1232 add a1, sp, a1 - beq a0, a1, .LBB42_5251 -# %bb.5249: # %if.then.i.i280.i + beq a0, a1, .LBB42_5253 +# %bb.5251: # %if.then.i.i280.i call _ZdlPv@plt - j .LBB42_5251 -.LBB42_5250: # %lpad77.i427 + j .LBB42_5253 +.LBB42_5252: # %lpad77.i427 .Ltmp1833: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 -.LBB42_5251: # %ehcleanup112.i +.LBB42_5253: # %ehcleanup112.i mv s8, s9 -.LBB42_5252: # %ehcleanup112.i +.LBB42_5254: # %ehcleanup112.i ld a0, 744(s6) lui a1, 1 addiw a1, a1, 1264 add a1, sp, a1 - beq a0, a1, .LBB42_5256 -# %bb.5253: # %if.then.i.i286.i + beq a0, a1, .LBB42_5258 +# %bb.5255: # %if.then.i.i286.i call _ZdlPv@plt - j .LBB42_5256 -.LBB42_5254: # %lpad72.i421 + j .LBB42_5258 +.LBB42_5256: # %lpad72.i421 .Ltmp1830: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 - j .LBB42_5252 -.LBB42_5255: # %lpad70.i420 + j .LBB42_5254 +.LBB42_5257: # %lpad70.i420 .Ltmp1827: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 -.LBB42_5256: # %ehcleanup115.i +.LBB42_5258: # %ehcleanup115.i mv s7, s8 -.LBB42_5257: # %ehcleanup115.i +.LBB42_5259: # %ehcleanup115.i ld a0, 776(s6) lui a1, 1 addiw a1, a1, 1296 add a1, sp, a1 - beq a0, a1, .LBB42_5259 -# %bb.5258: # %if.then.i.i292.i + beq a0, a1, .LBB42_5261 +# %bb.5260: # %if.then.i.i292.i call _ZdlPv@plt -.LBB42_5259: # %ehcleanup118.i +.LBB42_5261: # %ehcleanup118.i mv s5, s7 -.LBB42_5260: # %ehcleanup118.i +.LBB42_5262: # %ehcleanup118.i ld a0, 808(s6) lui a1, 1 addiw a1, a1, 1328 add a1, sp, a1 - beq a0, a1, .LBB42_5262 -# %bb.5261: # %if.then.i.i298.i + beq a0, a1, .LBB42_5264 +# %bb.5263: # %if.then.i.i298.i call _ZdlPv@plt -.LBB42_5262: # %ehcleanup121.i +.LBB42_5264: # %ehcleanup121.i mv s4, s5 -.LBB42_5263: # %ehcleanup121.i +.LBB42_5265: # %ehcleanup121.i ld a0, 840(s6) lui a1, 1 addiw a1, a1, 1360 add a1, sp, a1 - beq a0, a1, .LBB42_5265 -# %bb.5264: # %if.then.i.i304.i + beq a0, a1, .LBB42_5267 +# %bb.5266: # %if.then.i.i304.i call _ZdlPv@plt -.LBB42_5265: # %ehcleanup124.i +.LBB42_5267: # %ehcleanup124.i mv s3, s4 -.LBB42_5266: # %ehcleanup124.i +.LBB42_5268: # %ehcleanup124.i ld a0, 872(s6) lui a1, 1 addiw a1, a1, 1392 add a1, sp, a1 - beq a0, a1, .LBB42_5268 -# %bb.5267: # %if.then.i.i310.i + beq a0, a1, .LBB42_5270 +# %bb.5269: # %if.then.i.i310.i call _ZdlPv@plt -.LBB42_5268: # %ehcleanup127.i +.LBB42_5270: # %ehcleanup127.i mv s0, s3 -.LBB42_5269: # %ehcleanup127.i +.LBB42_5271: # %ehcleanup127.i ld a0, 904(s6) lui a1, 1 addiw a1, a1, 1424 add a1, sp, a1 - beq a0, a1, .LBB42_5271 -# %bb.5270: # %if.then.i.i316.i + beq a0, a1, .LBB42_5273 +# %bb.5272: # %if.then.i.i316.i call _ZdlPv@plt -.LBB42_5271: # %ehcleanup130.i +.LBB42_5273: # %ehcleanup130.i ld a0, 936(s6) lui a1, 1 addiw a1, a1, 1456 add a1, sp, a1 - beq a0, a1, .LBB42_5273 -# %bb.5272: # %if.then.i.i322.i + beq a0, a1, .LBB42_5275 +# %bb.5274: # %if.then.i.i322.i call _ZdlPv@plt -.LBB42_5273: # %ehcleanup133.i373 +.LBB42_5275: # %ehcleanup133.i373 ld a0, 968(s6) lui a1, 1 addiw a1, a1, 1488 add a1, sp, a1 - beq a0, a1, .LBB42_5275 -# %bb.5274: # %if.then.i.i328.i + beq a0, a1, .LBB42_5277 +# %bb.5276: # %if.then.i.i328.i call _ZdlPv@plt -.LBB42_5275: # %ehcleanup136.i +.LBB42_5277: # %ehcleanup136.i ld a0, 1000(s6) lui a1, 1 addiw a1, a1, 1520 add a1, sp, a1 - beq a0, a1, .LBB42_5277 -# %bb.5276: # %if.then.i.i334.i + beq a0, a1, .LBB42_5279 +# %bb.5278: # %if.then.i.i334.i call _ZdlPv@plt -.LBB42_5277: # %ehcleanup139.i +.LBB42_5279: # %ehcleanup139.i ld a0, 1032(s6) lui a1, 1 addiw a1, a1, 1552 add a1, sp, a1 - beq a0, a1, .LBB42_5279 -# %bb.5278: # %if.then.i.i340.i + beq a0, a1, .LBB42_5281 +# %bb.5280: # %if.then.i.i340.i call _ZdlPv@plt -.LBB42_5279: # %ehcleanup142.i +.LBB42_5281: # %ehcleanup142.i ld a0, 1064(s6) lui a1, 1 addiw a1, a1, 1584 add a1, sp, a1 - beq a0, a1, .LBB42_5281 -# %bb.5280: # %if.then.i.i346.i + beq a0, a1, .LBB42_5283 +# %bb.5282: # %if.then.i.i346.i call _ZdlPv@plt -.LBB42_5281: # %ehcleanup143.i +.LBB42_5283: # %ehcleanup143.i addi s1, sp, 552 xor a0, s1, s0 seqz a0, a0 or a0, s10, a0 - bnez a0, .LBB42_5497 -.LBB42_5282: # %arraydestroy.body146.i + bnez a0, .LBB42_5499 +.LBB42_5284: # %arraydestroy.body146.i # =>This Inner Loop Header: Depth=1 addi s0, s0, -88 mv a0, s0 call _ZN8TestCaseD2Ev - bne s0, s1, .LBB42_5282 - j .LBB42_5497 -.LBB42_5283: # %lpad65.i414 + bne s0, s1, .LBB42_5284 + j .LBB42_5499 +.LBB42_5285: # %lpad65.i414 .Ltmp1824: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 - j .LBB42_5257 -.LBB42_5284: # %lpad63.i413 + j .LBB42_5259 +.LBB42_5286: # %lpad63.i413 .Ltmp1821: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 - j .LBB42_5259 -.LBB42_5285: # %lpad58.i407 + j .LBB42_5261 +.LBB42_5287: # %lpad58.i407 .Ltmp1818: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 - j .LBB42_5260 -.LBB42_5286: # %lpad56.i406 + j .LBB42_5262 +.LBB42_5288: # %lpad56.i406 .Ltmp1815: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 - j .LBB42_5262 -.LBB42_5287: # %lpad51.i400 + j .LBB42_5264 +.LBB42_5289: # %lpad51.i400 .Ltmp1812: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 - j .LBB42_5263 -.LBB42_5288: # %lpad44.i394 + j .LBB42_5265 +.LBB42_5290: # %lpad44.i394 .Ltmp1809: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 - j .LBB42_5266 -.LBB42_5289: # %lpad42.i393 + j .LBB42_5268 +.LBB42_5291: # %lpad42.i393 .Ltmp1806: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 - j .LBB42_5268 -.LBB42_5290: # %lpad37.i387 + j .LBB42_5270 +.LBB42_5292: # %lpad37.i387 .Ltmp1803: mv s0, s1 lui a1, 1 @@ -70684,8 +70675,8 @@ add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 - j .LBB42_5269 -.LBB42_5291: # %lpad35.i386 + j .LBB42_5271 +.LBB42_5293: # %lpad35.i386 .Ltmp1800: lui a1, 1 addiw a1, a1, 504 @@ -70693,8 +70684,8 @@ sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 mv s0, s1 - j .LBB42_5271 -.LBB42_5292: # %lpad30.i380 + j .LBB42_5273 +.LBB42_5294: # %lpad30.i380 .Ltmp1797: mv s0, s1 lui a1, 1 @@ -70702,8 +70693,8 @@ add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 - j .LBB42_5271 -.LBB42_5293: # %lpad28.i379 + j .LBB42_5273 +.LBB42_5295: # %lpad28.i379 .Ltmp1794: lui a1, 1 addiw a1, a1, 504 @@ -70711,8 +70702,8 @@ sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 mv s0, s1 - j .LBB42_5273 -.LBB42_5294: # %lpad23.i372 + j .LBB42_5275 +.LBB42_5296: # %lpad23.i372 .Ltmp1791: mv s0, s1 lui a1, 1 @@ -70720,8 +70711,8 @@ add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 - j .LBB42_5273 -.LBB42_5295: # %lpad21.i371 + j .LBB42_5275 +.LBB42_5297: # %lpad21.i371 .Ltmp1788: lui a1, 1 addiw a1, a1, 504 @@ -70729,8 +70720,8 @@ sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 mv s0, s1 - j .LBB42_5275 -.LBB42_5296: # %lpad16.i365 + j .LBB42_5277 +.LBB42_5298: # %lpad16.i365 .Ltmp1785: mv s0, s3 lui a1, 1 @@ -70738,8 +70729,8 @@ add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 - j .LBB42_5275 -.LBB42_5297: # %lpad14.i364 + j .LBB42_5277 +.LBB42_5299: # %lpad14.i364 .Ltmp1782: lui a1, 1 addiw a1, a1, 504 @@ -70747,49 +70738,49 @@ sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 mv s0, s3 - j .LBB42_5277 -.LBB42_5298: # %lpad9.i358 + j .LBB42_5279 +.LBB42_5300: # %lpad9.i358 .Ltmp1779: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 - j .LBB42_5277 -.LBB42_5299: # %lpad7.i357 + j .LBB42_5279 +.LBB42_5301: # %lpad7.i357 .Ltmp1776: - j .LBB42_5301 -.LBB42_5300: # %lpad3.i351 + j .LBB42_5303 +.LBB42_5302: # %lpad3.i351 .Ltmp1773: -.LBB42_5301: # %ehcleanup142.i +.LBB42_5303: # %ehcleanup142.i lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s10, 0 - j .LBB42_5279 -.LBB42_5302: # %lpad5.i288 + j .LBB42_5281 +.LBB42_5304: # %lpad5.i288 .Ltmp1770: sd a0, 112(sp) # 8-byte Folded Spill addi a0, sp, 552 call _ZN8TestCaseD2Ev - j .LBB42_5375 -.LBB42_5303: # %lpad3.i276 + j .LBB42_5377 +.LBB42_5305: # %lpad3.i276 .Ltmp1767: - j .LBB42_5374 -.LBB42_5304: # %lpad.i267 + j .LBB42_5376 +.LBB42_5306: # %lpad.i267 .Ltmp1764: - j .LBB42_5371 -.LBB42_5305: # %lpad5.i220 + j .LBB42_5373 +.LBB42_5307: # %lpad5.i220 .Ltmp1761: sd a0, 112(sp) # 8-byte Folded Spill addi a0, sp, 552 call _ZN8TestCaseD2Ev - j .LBB42_5375 -.LBB42_5306: # %lpad3.i208 + j .LBB42_5377 +.LBB42_5308: # %lpad3.i208 .Ltmp1758: - j .LBB42_5374 -.LBB42_5307: # %lpad88.i + j .LBB42_5376 +.LBB42_5309: # %lpad88.i .Ltmp1755: sd a0, 112(sp) # 8-byte Folded Spill mv a0, s1 @@ -70819,249 +70810,249 @@ addi a0, sp, 552 call _ZN8TestCaseD2Ev li s9, 1 - j .LBB42_5309 -.LBB42_5308: # %lpad86.i + j .LBB42_5311 +.LBB42_5310: # %lpad86.i .Ltmp1752: sd a0, 112(sp) # 8-byte Folded Spill li s9, 0 -.LBB42_5309: # %ehcleanup.i154 +.LBB42_5311: # %ehcleanup.i154 ld a0, 680(s6) lui a1, 1 addiw a1, a1, 1200 add a1, sp, a1 - beq a0, a1, .LBB42_5311 -# %bb.5310: # %if.then.i.i248.i + beq a0, a1, .LBB42_5313 +# %bb.5312: # %if.then.i.i248.i call _ZdlPv@plt -.LBB42_5311: # %ehcleanup99.i +.LBB42_5313: # %ehcleanup99.i mv s11, s1 - j .LBB42_5313 -.LBB42_5312: # %lpad79.i + j .LBB42_5315 +.LBB42_5314: # %lpad79.i .Ltmp1749: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s9, 0 -.LBB42_5313: # %ehcleanup99.i +.LBB42_5315: # %ehcleanup99.i ld a0, 712(s6) lui a1, 1 addiw a1, a1, 1232 add a1, sp, a1 - beq a0, a1, .LBB42_5316 -# %bb.5314: # %if.then.i.i254.i + beq a0, a1, .LBB42_5318 +# %bb.5316: # %if.then.i.i254.i call _ZdlPv@plt - j .LBB42_5316 -.LBB42_5315: # %lpad77.i + j .LBB42_5318 +.LBB42_5317: # %lpad77.i .Ltmp1746: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s9, 0 -.LBB42_5316: # %ehcleanup102.i +.LBB42_5318: # %ehcleanup102.i mv s10, s11 - j .LBB42_5318 -.LBB42_5317: # %lpad72.i + j .LBB42_5320 +.LBB42_5319: # %lpad72.i .Ltmp1743: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s9, 0 -.LBB42_5318: # %ehcleanup102.i +.LBB42_5320: # %ehcleanup102.i ld a0, 744(s6) lui a1, 1 addiw a1, a1, 1264 add a1, sp, a1 - beq a0, a1, .LBB42_5321 -# %bb.5319: # %if.then.i.i260.i + beq a0, a1, .LBB42_5323 +# %bb.5321: # %if.then.i.i260.i call _ZdlPv@plt - j .LBB42_5321 -.LBB42_5320: # %lpad70.i + j .LBB42_5323 +.LBB42_5322: # %lpad70.i .Ltmp1740: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s9, 0 -.LBB42_5321: # %ehcleanup105.i +.LBB42_5323: # %ehcleanup105.i mv s8, s10 -.LBB42_5322: # %ehcleanup105.i +.LBB42_5324: # %ehcleanup105.i ld a0, 776(s6) lui a1, 1 addiw a1, a1, 1296 add a1, sp, a1 - beq a0, a1, .LBB42_5326 -# %bb.5323: # %if.then.i.i266.i + beq a0, a1, .LBB42_5328 +# %bb.5325: # %if.then.i.i266.i call _ZdlPv@plt - j .LBB42_5326 -.LBB42_5324: # %lpad65.i + j .LBB42_5328 +.LBB42_5326: # %lpad65.i .Ltmp1737: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s9, 0 - j .LBB42_5322 -.LBB42_5325: # %lpad63.i + j .LBB42_5324 +.LBB42_5327: # %lpad63.i .Ltmp1734: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s9, 0 -.LBB42_5326: # %ehcleanup108.i +.LBB42_5328: # %ehcleanup108.i mv s7, s8 -.LBB42_5327: # %ehcleanup108.i +.LBB42_5329: # %ehcleanup108.i ld a0, 808(s6) lui a1, 1 addiw a1, a1, 1328 add a1, sp, a1 - beq a0, a1, .LBB42_5329 -# %bb.5328: # %if.then.i.i272.i + beq a0, a1, .LBB42_5331 +# %bb.5330: # %if.then.i.i272.i call _ZdlPv@plt -.LBB42_5329: # %ehcleanup111.i +.LBB42_5331: # %ehcleanup111.i mv s5, s7 -.LBB42_5330: # %ehcleanup111.i +.LBB42_5332: # %ehcleanup111.i ld a0, 840(s6) lui a1, 1 addiw a1, a1, 1360 add a1, sp, a1 - beq a0, a1, .LBB42_5332 -# %bb.5331: # %if.then.i.i278.i + beq a0, a1, .LBB42_5334 +# %bb.5333: # %if.then.i.i278.i call _ZdlPv@plt -.LBB42_5332: # %ehcleanup114.i +.LBB42_5334: # %ehcleanup114.i mv s4, s5 -.LBB42_5333: # %ehcleanup114.i +.LBB42_5335: # %ehcleanup114.i ld a0, 872(s6) lui a1, 1 addiw a1, a1, 1392 add a1, sp, a1 - beq a0, a1, .LBB42_5335 -# %bb.5334: # %if.then.i.i284.i + beq a0, a1, .LBB42_5337 +# %bb.5336: # %if.then.i.i284.i call _ZdlPv@plt -.LBB42_5335: # %ehcleanup117.i +.LBB42_5337: # %ehcleanup117.i mv s3, s4 -.LBB42_5336: # %ehcleanup117.i +.LBB42_5338: # %ehcleanup117.i ld a0, 904(s6) lui a1, 1 addiw a1, a1, 1424 add a1, sp, a1 - beq a0, a1, .LBB42_5338 -# %bb.5337: # %if.then.i.i290.i + beq a0, a1, .LBB42_5340 +# %bb.5339: # %if.then.i.i290.i call _ZdlPv@plt -.LBB42_5338: # %ehcleanup120.i +.LBB42_5340: # %ehcleanup120.i mv s0, s3 -.LBB42_5339: # %ehcleanup120.i +.LBB42_5341: # %ehcleanup120.i ld a0, 936(s6) lui a1, 1 addiw a1, a1, 1456 add a1, sp, a1 - beq a0, a1, .LBB42_5341 -# %bb.5340: # %if.then.i.i296.i + beq a0, a1, .LBB42_5343 +# %bb.5342: # %if.then.i.i296.i call _ZdlPv@plt -.LBB42_5341: # %ehcleanup123.i +.LBB42_5343: # %ehcleanup123.i ld a0, 968(s6) lui a1, 1 addiw a1, a1, 1488 add a1, sp, a1 - beq a0, a1, .LBB42_5343 -# %bb.5342: # %if.then.i.i302.i + beq a0, a1, .LBB42_5345 +# %bb.5344: # %if.then.i.i302.i call _ZdlPv@plt -.LBB42_5343: # %ehcleanup126.i +.LBB42_5345: # %ehcleanup126.i ld a0, 1000(s6) lui a1, 1 addiw a1, a1, 1520 add a1, sp, a1 - beq a0, a1, .LBB42_5345 -# %bb.5344: # %if.then.i.i308.i + beq a0, a1, .LBB42_5347 +# %bb.5346: # %if.then.i.i308.i call _ZdlPv@plt -.LBB42_5345: # %ehcleanup129.i +.LBB42_5347: # %ehcleanup129.i ld a0, 1032(s6) lui a1, 1 addiw a1, a1, 1552 add a1, sp, a1 - beq a0, a1, .LBB42_5347 -# %bb.5346: # %if.then.i.i314.i + beq a0, a1, .LBB42_5349 +# %bb.5348: # %if.then.i.i314.i call _ZdlPv@plt -.LBB42_5347: # %ehcleanup132.i +.LBB42_5349: # %ehcleanup132.i ld a0, 1064(s6) lui a1, 1 addiw a1, a1, 1584 add a1, sp, a1 - beq a0, a1, .LBB42_5349 -# %bb.5348: # %if.then.i.i320.i + beq a0, a1, .LBB42_5351 +# %bb.5350: # %if.then.i.i320.i call _ZdlPv@plt -.LBB42_5349: # %ehcleanup133.i +.LBB42_5351: # %ehcleanup133.i addi s1, sp, 552 xor a0, s1, s0 seqz a0, a0 or a0, s9, a0 - bnez a0, .LBB42_5497 -.LBB42_5350: # %arraydestroy.body136.i + bnez a0, .LBB42_5499 +.LBB42_5352: # %arraydestroy.body136.i # =>This Inner Loop Header: Depth=1 addi s0, s0, -88 mv a0, s0 call _ZN8TestCaseD2Ev - bne s0, s1, .LBB42_5350 - j .LBB42_5497 -.LBB42_5351: # %lpad58.i + bne s0, s1, .LBB42_5352 + j .LBB42_5499 +.LBB42_5353: # %lpad58.i .Ltmp1731: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s9, 0 - j .LBB42_5327 -.LBB42_5352: # %lpad56.i + j .LBB42_5329 +.LBB42_5354: # %lpad56.i .Ltmp1728: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s9, 0 - j .LBB42_5329 -.LBB42_5353: # %lpad51.i + j .LBB42_5331 +.LBB42_5355: # %lpad51.i .Ltmp1725: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s9, 0 - j .LBB42_5330 -.LBB42_5354: # %lpad44.i + j .LBB42_5332 +.LBB42_5356: # %lpad44.i .Ltmp1722: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s9, 0 - j .LBB42_5333 -.LBB42_5355: # %lpad42.i + j .LBB42_5335 +.LBB42_5357: # %lpad42.i .Ltmp1719: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s9, 0 - j .LBB42_5335 -.LBB42_5356: # %lpad37.i + j .LBB42_5337 +.LBB42_5358: # %lpad37.i .Ltmp1716: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s9, 0 - j .LBB42_5336 -.LBB42_5357: # %lpad35.i + j .LBB42_5338 +.LBB42_5359: # %lpad35.i .Ltmp1713: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s9, 0 - j .LBB42_5338 -.LBB42_5358: # %lpad30.i + j .LBB42_5340 +.LBB42_5360: # %lpad30.i .Ltmp1710: mv s0, s1 lui a1, 1 @@ -71069,8 +71060,8 @@ add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s9, 0 - j .LBB42_5339 -.LBB42_5359: # %lpad28.i + j .LBB42_5341 +.LBB42_5361: # %lpad28.i .Ltmp1707: lui a1, 1 addiw a1, a1, 504 @@ -71078,8 +71069,8 @@ sd a0, 112(sp) # 8-byte Folded Spill li s9, 0 mv s0, s1 - j .LBB42_5341 -.LBB42_5360: # %lpad23.i + j .LBB42_5343 +.LBB42_5362: # %lpad23.i .Ltmp1704: mv s0, s1 lui a1, 1 @@ -71087,8 +71078,8 @@ add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s9, 0 - j .LBB42_5341 -.LBB42_5361: # %lpad21.i + j .LBB42_5343 +.LBB42_5363: # %lpad21.i .Ltmp1701: lui a1, 1 addiw a1, a1, 504 @@ -71096,8 +71087,8 @@ sd a0, 112(sp) # 8-byte Folded Spill li s9, 0 mv s0, s1 - j .LBB42_5343 -.LBB42_5362: # %lpad16.i146 + j .LBB42_5345 +.LBB42_5364: # %lpad16.i146 .Ltmp1698: mv s0, s3 lui a1, 1 @@ -71105,8 +71096,8 @@ add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s9, 0 - j .LBB42_5343 -.LBB42_5363: # %lpad14.i + j .LBB42_5345 +.LBB42_5365: # %lpad14.i .Ltmp1695: lui a1, 1 addiw a1, a1, 504 @@ -71114,99 +71105,99 @@ sd a0, 112(sp) # 8-byte Folded Spill li s9, 0 mv s0, s3 - j .LBB42_5345 -.LBB42_5364: # %lpad9.i143 + j .LBB42_5347 +.LBB42_5366: # %lpad9.i143 .Ltmp1692: lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s9, 0 - j .LBB42_5345 -.LBB42_5365: # %lpad7.i141 + j .LBB42_5347 +.LBB42_5367: # %lpad7.i141 .Ltmp1689: - j .LBB42_5367 -.LBB42_5366: # %lpad3.i135 + j .LBB42_5369 +.LBB42_5368: # %lpad3.i135 .Ltmp1686: -.LBB42_5367: # %ehcleanup132.i +.LBB42_5369: # %ehcleanup132.i lui a1, 1 addiw a1, a1, 504 add s6, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s9, 0 - j .LBB42_5347 -.LBB42_5368: # %lpad5.i82 + j .LBB42_5349 +.LBB42_5370: # %lpad5.i82 .Ltmp1683: sd a0, 112(sp) # 8-byte Folded Spill addi a0, sp, 552 call _ZN8TestCaseD2Ev - j .LBB42_5375 -.LBB42_5369: # %lpad3.i70 + j .LBB42_5377 +.LBB42_5371: # %lpad3.i70 .Ltmp1680: - j .LBB42_5374 -.LBB42_5370: # %lpad.i + j .LBB42_5376 +.LBB42_5372: # %lpad.i .Ltmp1677: -.LBB42_5371: # %common.resume +.LBB42_5373: # %common.resume sd a0, 112(sp) # 8-byte Folded Spill mv a0, s0 call _ZdlPv@plt ld a0, 112(sp) # 8-byte Folded Reload call _Unwind_Resume@plt -.LBB42_5372: # %lpad5.i +.LBB42_5374: # %lpad5.i .Ltmp1674: sd a0, 112(sp) # 8-byte Folded Spill addi a0, sp, 552 call _ZN8TestCaseD2Ev - j .LBB42_5375 -.LBB42_5373: # %lpad3.i17 + j .LBB42_5377 +.LBB42_5375: # %lpad3.i17 .Ltmp1671: -.LBB42_5374: # %ehcleanup.i12289 +.LBB42_5376: # %ehcleanup.i12289 sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_5375: # %ehcleanup.i12289 +.LBB42_5377: # %ehcleanup.i12289 ld a0, 1064(s3) lui a1, 1 addiw a1, a1, 1584 add a1, sp, a1 - bne a0, a1, .LBB42_5498 - j .LBB42_5497 -.LBB42_5376: # %lpad453.i.i + bne a0, a1, .LBB42_5500 + j .LBB42_5499 +.LBB42_5378: # %lpad453.i.i .Ltmp1668: sd a0, 112(sp) # 8-byte Folded Spill addi a0, sp, 552 call _ZN8TestCaseD2Ev - j .LBB42_5378 -.LBB42_5377: # %lpad447.i.i + j .LBB42_5380 +.LBB42_5379: # %lpad447.i.i .Ltmp1665: sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_5378: # %ehcleanup469.i.i +.LBB42_5380: # %ehcleanup469.i.i ld a0, 392(s2) lui a1, 1 addiw a1, a1, 912 add a1, sp, a1 - bne a0, a1, .LBB42_5498 - j .LBB42_5497 -.LBB42_5379: # %lpad445.i.i + bne a0, a1, .LBB42_5500 + j .LBB42_5499 +.LBB42_5381: # %lpad445.i.i .Ltmp1662: sd a0, 112(sp) # 8-byte Folded Spill ld a0, 112(sp) # 8-byte Folded Reload call _Unwind_Resume@plt -.LBB42_5380: # %lpad362.i.i +.LBB42_5382: # %lpad362.i.i .Ltmp1650: sd a0, 112(sp) # 8-byte Folded Spill addi a0, sp, 552 call _ZN8TestCaseD2Ev - j .LBB42_5382 -.LBB42_5381: # %lpad356.i.i + j .LBB42_5384 +.LBB42_5383: # %lpad356.i.i .Ltmp1647: sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_5382: # %ehcleanup378.i.i +.LBB42_5384: # %ehcleanup378.i.i ld a0, 680(s3) lui a1, 1 addiw a1, a1, 1200 add a1, sp, a1 - bne a0, a1, .LBB42_5498 - j .LBB42_5497 -.LBB42_5383: # %lpad105.i.i + bne a0, a1, .LBB42_5500 + j .LBB42_5499 +.LBB42_5385: # %lpad105.i.i .Ltmp1598: sd a0, 112(sp) # 8-byte Folded Spill mv a0, s6 @@ -71226,181 +71217,181 @@ addi a0, sp, 552 call _ZN8TestCaseD2Ev li s7, 1 - j .LBB42_5385 -.LBB42_5384: # %lpad99.i.i + j .LBB42_5387 +.LBB42_5386: # %lpad99.i.i .Ltmp1595: sd a0, 112(sp) # 8-byte Folded Spill li s7, 0 -.LBB42_5385: # %ehcleanup121.i.i +.LBB42_5387: # %ehcleanup121.i.i ld a0, 744(s8) lui a1, 1 addiw a1, a1, 1264 add a1, sp, a1 - beq a0, a1, .LBB42_5387 -# %bb.5386: # %if.then.i.i383.i.i + beq a0, a1, .LBB42_5389 +# %bb.5388: # %if.then.i.i383.i.i call _ZdlPv@plt -.LBB42_5387: # %ehcleanup124.i.i +.LBB42_5389: # %ehcleanup124.i.i mv s5, s6 - j .LBB42_5389 -.LBB42_5388: # %lpad92.i.i + j .LBB42_5391 +.LBB42_5390: # %lpad92.i.i .Ltmp1592: lui a1, 1 addiw a1, a1, 504 add s8, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s7, 0 -.LBB42_5389: # %ehcleanup124.i.i +.LBB42_5391: # %ehcleanup124.i.i ld a0, 776(s8) lui a1, 1 addiw a1, a1, 1296 add a1, sp, a1 - beq a0, a1, .LBB42_5392 -# %bb.5390: # %if.then.i.i389.i.i + beq a0, a1, .LBB42_5394 +# %bb.5392: # %if.then.i.i389.i.i call _ZdlPv@plt - j .LBB42_5392 -.LBB42_5391: # %lpad90.i.i + j .LBB42_5394 +.LBB42_5393: # %lpad90.i.i .Ltmp1589: lui a1, 1 addiw a1, a1, 504 add s8, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s7, 0 -.LBB42_5392: # %ehcleanup127.i.i +.LBB42_5394: # %ehcleanup127.i.i mv s4, s5 - j .LBB42_5394 -.LBB42_5393: # %lpad85.i.i + j .LBB42_5396 +.LBB42_5395: # %lpad85.i.i .Ltmp1586: lui a1, 1 addiw a1, a1, 504 add s8, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s7, 0 -.LBB42_5394: # %ehcleanup127.i.i +.LBB42_5396: # %ehcleanup127.i.i ld a0, 808(s8) lui a1, 1 addiw a1, a1, 1328 add a1, sp, a1 - beq a0, a1, .LBB42_5397 -# %bb.5395: # %if.then.i.i395.i.i + beq a0, a1, .LBB42_5399 +# %bb.5397: # %if.then.i.i395.i.i call _ZdlPv@plt - j .LBB42_5397 -.LBB42_5396: # %lpad83.i.i + j .LBB42_5399 +.LBB42_5398: # %lpad83.i.i .Ltmp1583: lui a1, 1 addiw a1, a1, 504 add s8, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s7, 0 -.LBB42_5397: # %ehcleanup130.i.i +.LBB42_5399: # %ehcleanup130.i.i mv s3, s4 -.LBB42_5398: # %ehcleanup130.i.i +.LBB42_5400: # %ehcleanup130.i.i ld a0, 840(s8) lui a1, 1 addiw a1, a1, 1360 add a1, sp, a1 - beq a0, a1, .LBB42_5402 -# %bb.5399: # %if.then.i.i401.i.i + beq a0, a1, .LBB42_5404 +# %bb.5401: # %if.then.i.i401.i.i call _ZdlPv@plt - j .LBB42_5402 -.LBB42_5400: # %lpad78.i.i + j .LBB42_5404 +.LBB42_5402: # %lpad78.i.i .Ltmp1580: lui a1, 1 addiw a1, a1, 504 add s8, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s7, 0 - j .LBB42_5398 -.LBB42_5401: # %lpad76.i.i + j .LBB42_5400 +.LBB42_5403: # %lpad76.i.i .Ltmp1577: lui a1, 1 addiw a1, a1, 504 add s8, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s7, 0 -.LBB42_5402: # %ehcleanup133.i.i +.LBB42_5404: # %ehcleanup133.i.i mv s2, s3 -.LBB42_5403: # %ehcleanup133.i.i +.LBB42_5405: # %ehcleanup133.i.i ld a0, 872(s8) lui a1, 1 addiw a1, a1, 1392 add a1, sp, a1 - beq a0, a1, .LBB42_5405 -# %bb.5404: # %if.then.i.i407.i.i + beq a0, a1, .LBB42_5407 +# %bb.5406: # %if.then.i.i407.i.i call _ZdlPv@plt -.LBB42_5405: # %ehcleanup136.i.i +.LBB42_5407: # %ehcleanup136.i.i mv s1, s2 -.LBB42_5406: # %ehcleanup136.i.i +.LBB42_5408: # %ehcleanup136.i.i ld a0, 904(s8) lui a1, 1 addiw a1, a1, 1424 add a1, sp, a1 - beq a0, a1, .LBB42_5408 -# %bb.5407: # %if.then.i.i413.i.i + beq a0, a1, .LBB42_5410 +# %bb.5409: # %if.then.i.i413.i.i call _ZdlPv@plt -.LBB42_5408: # %ehcleanup139.i.i +.LBB42_5410: # %ehcleanup139.i.i mv s0, s1 -.LBB42_5409: # %ehcleanup139.i.i +.LBB42_5411: # %ehcleanup139.i.i ld a0, 936(s8) lui a1, 1 addiw a1, a1, 1456 add a1, sp, a1 - beq a0, a1, .LBB42_5411 -# %bb.5410: # %if.then.i.i419.i.i + beq a0, a1, .LBB42_5413 +# %bb.5412: # %if.then.i.i419.i.i call _ZdlPv@plt -.LBB42_5411: # %ehcleanup142.i.i +.LBB42_5413: # %ehcleanup142.i.i ld a0, 968(s8) lui a1, 1 addiw a1, a1, 1488 add a1, sp, a1 - beq a0, a1, .LBB42_5413 -# %bb.5412: # %if.then.i.i425.i.i + beq a0, a1, .LBB42_5415 +# %bb.5414: # %if.then.i.i425.i.i call _ZdlPv@plt -.LBB42_5413: # %ehcleanup143.i.i +.LBB42_5415: # %ehcleanup143.i.i addi s1, sp, 552 xor a0, s1, s0 seqz a0, a0 or a0, s7, a0 - bnez a0, .LBB42_5497 -.LBB42_5414: # %arraydestroy.body149.i.i + bnez a0, .LBB42_5499 +.LBB42_5416: # %arraydestroy.body149.i.i # =>This Inner Loop Header: Depth=1 addi s0, s0, -88 mv a0, s0 call _ZN8TestCaseD2Ev - bne s0, s1, .LBB42_5414 - j .LBB42_5497 -.LBB42_5415: # %lpad71.i.i + bne s0, s1, .LBB42_5416 + j .LBB42_5499 +.LBB42_5417: # %lpad71.i.i .Ltmp1574: lui a1, 1 addiw a1, a1, 504 add s8, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s7, 0 - j .LBB42_5403 -.LBB42_5416: # %lpad64.i.i + j .LBB42_5405 +.LBB42_5418: # %lpad64.i.i .Ltmp1571: lui a1, 1 addiw a1, a1, 504 add s8, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s7, 0 - j .LBB42_5406 -.LBB42_5417: # %lpad57.i.i + j .LBB42_5408 +.LBB42_5419: # %lpad57.i.i .Ltmp1568: lui a1, 1 addiw a1, a1, 504 add s8, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s7, 0 - j .LBB42_5409 -.LBB42_5418: # %lpad50.i.i + j .LBB42_5411 +.LBB42_5420: # %lpad50.i.i .Ltmp1565: lui a1, 1 addiw a1, a1, 504 add s8, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s7, 0 - j .LBB42_5411 -.LBB42_5419: # %lpad18.i.i + j .LBB42_5413 +.LBB42_5421: # %lpad18.i.i .Ltmp1562: sd a0, 112(sp) # 8-byte Folded Spill mv a0, s1 @@ -71409,84 +71400,84 @@ call _ZN8TestCaseD2Ev addi a0, sp, 552 call _ZN8TestCaseD2Ev - j .LBB42_5421 -.LBB42_5420: # %lpad16.i.i + j .LBB42_5423 +.LBB42_5422: # %lpad16.i.i .Ltmp1559: sd a0, 112(sp) # 8-byte Folded Spill li s2, 0 -.LBB42_5421: # %ehcleanup.i.i +.LBB42_5423: # %ehcleanup.i.i ld a0, 1000(s3) lui a1, 1 addiw a1, a1, 1520 add a1, sp, a1 - beq a0, a1, .LBB42_5424 -# %bb.5422: # %if.then.i.i365.i.i + beq a0, a1, .LBB42_5426 +# %bb.5424: # %if.then.i.i365.i.i call _ZdlPv@plt - j .LBB42_5424 -.LBB42_5423: # %lpad14.i.i + j .LBB42_5426 +.LBB42_5425: # %lpad14.i.i .Ltmp1556: lui a1, 1 addiw a1, a1, 504 add s3, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s2, 0 -.LBB42_5424: # %ehcleanup29.i.i +.LBB42_5426: # %ehcleanup29.i.i mv s0, s1 - j .LBB42_5426 -.LBB42_5425: # %lpad9.i.i + j .LBB42_5428 +.LBB42_5427: # %lpad9.i.i .Ltmp1553: lui a1, 1 addiw a1, a1, 504 add s3, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s2, 0 -.LBB42_5426: # %ehcleanup29.i.i +.LBB42_5428: # %ehcleanup29.i.i ld a0, 1032(s3) lui a1, 1 addiw a1, a1, 1552 add a1, sp, a1 - beq a0, a1, .LBB42_5431 -# %bb.5427: # %if.then.i.i371.i.i + beq a0, a1, .LBB42_5433 +# %bb.5429: # %if.then.i.i371.i.i call _ZdlPv@plt - j .LBB42_5431 -.LBB42_5428: # %lpad7.i.i + j .LBB42_5433 +.LBB42_5430: # %lpad7.i.i .Ltmp1550: - j .LBB42_5430 -.LBB42_5429: # %lpad3.i.i + j .LBB42_5432 +.LBB42_5431: # %lpad3.i.i .Ltmp1547: -.LBB42_5430: # %ehcleanup32.i.i +.LBB42_5432: # %ehcleanup32.i.i lui a1, 1 addiw a1, a1, 504 add s3, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s2, 0 -.LBB42_5431: # %ehcleanup32.i.i +.LBB42_5433: # %ehcleanup32.i.i ld a0, 1064(s3) lui a1, 1 addiw a1, a1, 1584 add a1, sp, a1 - beq a0, a1, .LBB42_5433 -# %bb.5432: # %if.then.i.i377.i.i + beq a0, a1, .LBB42_5435 +# %bb.5434: # %if.then.i.i377.i.i call _ZdlPv@plt -.LBB42_5433: # %ehcleanup33.i.i +.LBB42_5435: # %ehcleanup33.i.i addi s1, sp, 552 xor a0, s1, s0 seqz a0, a0 or a0, s2, a0 - bnez a0, .LBB42_5497 -.LBB42_5434: # %arraydestroy.body36.i.i + bnez a0, .LBB42_5499 +.LBB42_5436: # %arraydestroy.body36.i.i # =>This Inner Loop Header: Depth=1 addi s0, s0, -88 mv a0, s0 call _ZN8TestCaseD2Ev - bne s0, s1, .LBB42_5434 - j .LBB42_5497 -.LBB42_5435: # %ehcleanup33.thread.i.i + bne s0, s1, .LBB42_5436 + j .LBB42_5499 +.LBB42_5437: # %ehcleanup33.thread.i.i .Ltmp1544: sd a0, 112(sp) # 8-byte Folded Spill ld a0, 112(sp) # 8-byte Folded Reload call _Unwind_Resume@plt -.LBB42_5436: # %lpad18.i +.LBB42_5438: # %lpad18.i .Ltmp1541: sd a0, 112(sp) # 8-byte Folded Spill mv a0, s2 @@ -71496,132 +71487,132 @@ addi a0, sp, 552 call _ZN8TestCaseD2Ev li s0, 1 - j .LBB42_5438 -.LBB42_5437: # %lpad16.i + j .LBB42_5440 +.LBB42_5439: # %lpad16.i .Ltmp1538: sd a0, 112(sp) # 8-byte Folded Spill li s0, 0 -.LBB42_5438: # %ehcleanup.i +.LBB42_5440: # %ehcleanup.i ld a0, 1000(s3) lui a1, 1 addiw a1, a1, 1520 add a1, sp, a1 - beq a0, a1, .LBB42_5440 -# %bb.5439: # %if.then.i.i48.i + beq a0, a1, .LBB42_5442 +# %bb.5441: # %if.then.i.i48.i call _ZdlPv@plt -.LBB42_5440: # %ehcleanup29.i +.LBB42_5442: # %ehcleanup29.i mv s1, s2 - j .LBB42_5442 -.LBB42_5441: # %lpad9.i + j .LBB42_5444 +.LBB42_5443: # %lpad9.i .Ltmp1535: lui a1, 1 addiw a1, a1, 504 add s3, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s0, 0 -.LBB42_5442: # %ehcleanup29.i +.LBB42_5444: # %ehcleanup29.i ld a0, 1032(s3) lui a1, 1 addiw a1, a1, 1552 add a1, sp, a1 - beq a0, a1, .LBB42_5447 -# %bb.5443: # %if.then.i.i54.i + beq a0, a1, .LBB42_5449 +# %bb.5445: # %if.then.i.i54.i call _ZdlPv@plt - j .LBB42_5447 -.LBB42_5444: # %lpad7.i + j .LBB42_5449 +.LBB42_5446: # %lpad7.i .Ltmp1532: - j .LBB42_5446 -.LBB42_5445: # %lpad3.i + j .LBB42_5448 +.LBB42_5447: # %lpad3.i .Ltmp1529: -.LBB42_5446: # %ehcleanup32.i +.LBB42_5448: # %ehcleanup32.i lui a1, 1 addiw a1, a1, 504 add s3, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s0, 0 -.LBB42_5447: # %ehcleanup32.i +.LBB42_5449: # %ehcleanup32.i ld a0, 1064(s3) lui a1, 1 addiw a1, a1, 1584 add a1, sp, a1 - beq a0, a1, .LBB42_5449 -# %bb.5448: # %if.then.i.i60.i + beq a0, a1, .LBB42_5451 +# %bb.5450: # %if.then.i.i60.i call _ZdlPv@plt -.LBB42_5449: # %ehcleanup33.i +.LBB42_5451: # %ehcleanup33.i addi s2, sp, 552 xor a0, s2, s1 seqz a0, a0 or a0, s0, a0 - bnez a0, .LBB42_5497 -.LBB42_5450: # %arraydestroy.body36.i + bnez a0, .LBB42_5499 +.LBB42_5452: # %arraydestroy.body36.i # =>This Inner Loop Header: Depth=1 addi s1, s1, -88 mv a0, s1 call _ZN8TestCaseD2Ev - bne s1, s2, .LBB42_5450 - j .LBB42_5497 -.LBB42_5451: # %lpad.i38.i + bne s1, s2, .LBB42_5452 + j .LBB42_5499 +.LBB42_5453: # %lpad.i38.i .Ltmp2599: lui a1, 1 addiw a1, a1, 504 add s2, sp, a1 ld a1, 1032(s1) sd a0, 112(sp) # 8-byte Folded Spill - bnez a1, .LBB42_5456 -# %bb.5452: # %ehcleanup.i4527 + bnez a1, .LBB42_5458 +# %bb.5454: # %ehcleanup.i4527 ld a0, 616(sp) - bne a0, s5, .LBB42_5457 -.LBB42_5453: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit58.i + bne a0, s5, .LBB42_5459 +.LBB42_5455: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit58.i ld a0, 584(sp) - bne a0, s4, .LBB42_5458 -.LBB42_5454: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit58.1.i + bne a0, s4, .LBB42_5460 +.LBB42_5456: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit58.1.i ld a0, 552(sp) addi a1, sp, 568 - bne a0, a1, .LBB42_5459 -.LBB42_5455: # %ehcleanup55.i + bne a0, a1, .LBB42_5461 +.LBB42_5457: # %ehcleanup55.i ld a0, 1064(s2) - bnez a0, .LBB42_5498 - j .LBB42_5497 -.LBB42_5456: # %if.then.i.i4.i.i4526 + bnez a0, .LBB42_5500 + j .LBB42_5499 +.LBB42_5458: # %if.then.i.i4.i.i4526 mv a0, a1 call _ZdlPv@plt ld a0, 616(sp) - beq a0, s5, .LBB42_5453 -.LBB42_5457: # %if.then.i.i53.i + beq a0, s5, .LBB42_5455 +.LBB42_5459: # %if.then.i.i53.i call _ZdlPv@plt ld a0, 584(sp) - beq a0, s4, .LBB42_5454 -.LBB42_5458: # %if.then.i.i53.1.i + beq a0, s4, .LBB42_5456 +.LBB42_5460: # %if.then.i.i53.1.i call _ZdlPv@plt ld a0, 552(sp) addi a1, sp, 568 - beq a0, a1, .LBB42_5455 -.LBB42_5459: # %if.then.i.i53.2.i + beq a0, a1, .LBB42_5457 +.LBB42_5461: # %if.then.i.i53.2.i call _ZdlPv@plt ld a0, 1064(s2) - bnez a0, .LBB42_5498 - j .LBB42_5497 -.LBB42_5460: # %lpad5.i4138 + bnez a0, .LBB42_5500 + j .LBB42_5499 +.LBB42_5462: # %lpad5.i4138 .Ltmp2528: ld a1, 552(sp) sd a0, 112(sp) # 8-byte Folded Spill addi a0, sp, 568 - beq a1, a0, .LBB42_5497 -.LBB42_5461: # %if.then.i.i6.i4139 + beq a1, a0, .LBB42_5499 +.LBB42_5463: # %if.then.i.i6.i4139 mv a0, a1 call _ZdlPv@plt ld a0, 112(sp) # 8-byte Folded Reload call _Unwind_Resume@plt -.LBB42_5462: # %lpad217.i.i +.LBB42_5464: # %lpad217.i.i .Ltmp1614: - j .LBB42_5493 -.LBB42_5463: # %lpad223.i.i + j .LBB42_5495 +.LBB42_5465: # %lpad223.i.i .Ltmp1617: sd a0, 112(sp) # 8-byte Folded Spill addi a0, sp, 552 call _ZN8TestCaseD2Ev - j .LBB42_5494 -.LBB42_5464: # %lpad259.i.i + j .LBB42_5496 +.LBB42_5466: # %lpad259.i.i .Ltmp1620: lui a1, 1 addiw a1, a1, 504 @@ -71629,32 +71620,32 @@ sd a0, 112(sp) # 8-byte Folded Spill li s1, 0 addi s0, sp, 552 - j .LBB42_5487 -.LBB42_5465: # %lpad266.i.i + j .LBB42_5489 +.LBB42_5467: # %lpad266.i.i .Ltmp1623: lui a1, 1 addiw a1, a1, 504 add s5, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s1, 0 - j .LBB42_5485 -.LBB42_5466: # %lpad273.i.i + j .LBB42_5487 +.LBB42_5468: # %lpad273.i.i .Ltmp1626: lui a1, 1 addiw a1, a1, 504 add s5, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s1, 0 - j .LBB42_5482 -.LBB42_5467: # %lpad280.i.i + j .LBB42_5484 +.LBB42_5469: # %lpad280.i.i .Ltmp1629: lui a1, 1 addiw a1, a1, 504 add s5, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s1, 0 - j .LBB42_5479 -.LBB42_5468: # %lpad285.i.i + j .LBB42_5481 +.LBB42_5470: # %lpad285.i.i .Ltmp1632: lui a1, 1 addiw a1, a1, 504 @@ -71662,21 +71653,21 @@ sd a0, 112(sp) # 8-byte Folded Spill li s1, 0 addi a0, sp, 904 - j .LBB42_5478 -.LBB42_5469: # %lpad287.i.i + j .LBB42_5480 +.LBB42_5471: # %lpad287.i.i .Ltmp1635: lui a1, 1 addiw a1, a1, 504 add s5, sp, a1 sd a0, 112(sp) # 8-byte Folded Spill li s1, 0 - j .LBB42_5475 -.LBB42_5470: # %lpad294.i.i + j .LBB42_5477 +.LBB42_5472: # %lpad294.i.i .Ltmp1638: sd a0, 112(sp) # 8-byte Folded Spill li s1, 0 - j .LBB42_5472 -.LBB42_5471: # %lpad300.i.i + j .LBB42_5474 +.LBB42_5473: # %lpad300.i.i .Ltmp1641: sd a0, 112(sp) # 8-byte Folded Spill addi a0, sp, 992 @@ -71692,104 +71683,104 @@ addi a0, sp, 552 call _ZN8TestCaseD2Ev li s1, 1 -.LBB42_5472: # %ehcleanup316.i.i +.LBB42_5474: # %ehcleanup316.i.i ld a0, 456(s5) lui a1, 1 addiw a1, a1, 976 add a1, sp, a1 - beq a0, a1, .LBB42_5474 -# %bb.5473: # %if.then.i.i668.i.i + beq a0, a1, .LBB42_5476 +# %bb.5475: # %if.then.i.i668.i.i call _ZdlPv@plt -.LBB42_5474: # %ehcleanup319.i.i +.LBB42_5476: # %ehcleanup319.i.i addi a0, sp, 992 sd a0, 144(sp) # 8-byte Folded Spill -.LBB42_5475: # %ehcleanup319.i.i +.LBB42_5477: # %ehcleanup319.i.i ld a0, 488(s5) lui a1, 1 addiw a1, a1, 1008 add a1, sp, a1 - beq a0, a1, .LBB42_5477 -# %bb.5476: # %if.then.i.i674.i.i + beq a0, a1, .LBB42_5479 +# %bb.5478: # %if.then.i.i674.i.i call _ZdlPv@plt -.LBB42_5477: # %ehcleanup322.i.i +.LBB42_5479: # %ehcleanup322.i.i ld a0, 144(sp) # 8-byte Folded Reload -.LBB42_5478: # %ehcleanup322.i.i +.LBB42_5480: # %ehcleanup322.i.i sd a0, 152(sp) # 8-byte Folded Spill -.LBB42_5479: # %ehcleanup322.i.i +.LBB42_5481: # %ehcleanup322.i.i ld a0, 520(s5) lui a1, 1 addiw a1, a1, 1040 add a1, sp, a1 - beq a0, a1, .LBB42_5481 -# %bb.5480: # %if.then.i.i680.i.i + beq a0, a1, .LBB42_5483 +# %bb.5482: # %if.then.i.i680.i.i call _ZdlPv@plt -.LBB42_5481: # %ehcleanup325.i.i +.LBB42_5483: # %ehcleanup325.i.i ld a0, 152(sp) # 8-byte Folded Reload sd a0, 160(sp) # 8-byte Folded Spill -.LBB42_5482: # %ehcleanup325.i.i +.LBB42_5484: # %ehcleanup325.i.i ld a0, 552(s5) lui a1, 1 addiw a1, a1, 1072 add a1, sp, a1 - beq a0, a1, .LBB42_5484 -# %bb.5483: # %if.then.i.i686.i.i + beq a0, a1, .LBB42_5486 +# %bb.5485: # %if.then.i.i686.i.i call _ZdlPv@plt -.LBB42_5484: # %ehcleanup328.i.i +.LBB42_5486: # %ehcleanup328.i.i ld s0, 160(sp) # 8-byte Folded Reload -.LBB42_5485: # %ehcleanup328.i.i +.LBB42_5487: # %ehcleanup328.i.i ld a0, 584(s5) lui a1, 1 addiw a1, a1, 1104 add a1, sp, a1 - beq a0, a1, .LBB42_5487 -# %bb.5486: # %if.then.i.i692.i.i + beq a0, a1, .LBB42_5489 +# %bb.5488: # %if.then.i.i692.i.i call _ZdlPv@plt -.LBB42_5487: # %ehcleanup331.i.i +.LBB42_5489: # %ehcleanup331.i.i ld a0, 616(s5) lui a1, 1 addiw a1, a1, 1136 add a1, sp, a1 - beq a0, a1, .LBB42_5489 -# %bb.5488: # %if.then.i.i698.i.i + beq a0, a1, .LBB42_5491 +# %bb.5490: # %if.then.i.i698.i.i call _ZdlPv@plt -.LBB42_5489: # %ehcleanup332.i.i +.LBB42_5491: # %ehcleanup332.i.i addi s2, sp, 552 xor a0, s2, s0 seqz a0, a0 or a0, s1, a0 - bnez a0, .LBB42_5496 -.LBB42_5490: # %arraydestroy.body338.i.i + bnez a0, .LBB42_5498 +.LBB42_5492: # %arraydestroy.body338.i.i # =>This Inner Loop Header: Depth=1 addi s0, s0, -88 mv a0, s0 call _ZN8TestCaseD2Ev - bne s0, s2, .LBB42_5490 - j .LBB42_5496 -.LBB42_5491: # %lpad.i.i.loopexit.split-lp.i.i + bne s0, s2, .LBB42_5492 + j .LBB42_5498 +.LBB42_5493: # %lpad.i.i.loopexit.split-lp.i.i .Ltmp1644: - j .LBB42_5493 -.LBB42_5492: # %lpad.i.i.loopexit.i.i + j .LBB42_5495 +.LBB42_5494: # %lpad.i.i.loopexit.i.i .Ltmp1611: -.LBB42_5493: # %ehcleanup239.i.i +.LBB42_5495: # %ehcleanup239.i.i sd a0, 112(sp) # 8-byte Folded Spill -.LBB42_5494: # %ehcleanup239.i.i +.LBB42_5496: # %ehcleanup239.i.i ld a0, 648(s5) lui a1, 1 addiw a1, a1, 1168 add a1, sp, a1 - beq a0, a1, .LBB42_5496 -# %bb.5495: # %if.then.i.i662.i.i + beq a0, a1, .LBB42_5498 +# %bb.5497: # %if.then.i.i662.i.i call _ZdlPv@plt -.LBB42_5496: # %cleanup.done343.i.i +.LBB42_5498: # %cleanup.done343.i.i lui a0, 1 addiw a0, a0, 1200 add a1, sp, a0 ld a0, 680(s5) - bne a0, a1, .LBB42_5498 -.LBB42_5497: # %common.resume + bne a0, a1, .LBB42_5500 +.LBB42_5499: # %common.resume ld a0, 112(sp) # 8-byte Folded Reload call _Unwind_Resume@plt -.LBB42_5498: # %if.then.i.i431.i.i +.LBB42_5500: # %if.then.i.i431.i.i call _ZdlPv@plt ld a0, 112(sp) # 8-byte Folded Reload call _Unwind_Resume@plt --- build.head//MultiSource/Benchmarks/BitBench/uuencode/CMakeFiles/uuencode.dir/uuencode.s 2023-11-13 08:03:22.423556782 +0000 +++ build//MultiSource/Benchmarks/BitBench/uuencode/CMakeFiles/uuencode.dir/uuencode.s 2023-11-13 08:03:17.463700154 +0000 @@ -610,12 +610,12 @@ sb a0, 120(sp) sext.w a0, s2 vsetvli a1, zero, e64, m8, ta, ma + csrr a1, vlenb + slli a1, a1, 1 + add a1, sp, a1 + addi a1, a1, 192 + vl8r.v v24, (a1) # Unknown-size Folded Reload ld a1, 88(sp) # 8-byte Folded Reload - csrr a2, vlenb - slli a2, a2, 1 - add a2, sp, a2 - addi a2, a2, 192 - vl8r.v v24, (a2) # Unknown-size Folded Reload vadd.vx v8, v24, a1 vor.vi v16, v8, 1 vor.vi v24, v24, 1 --- build.head//MultiSource/Benchmarks/Prolangs-C/football/CMakeFiles/football.dir/io.s 2023-11-13 08:03:22.687549152 +0000 +++ build//MultiSource/Benchmarks/Prolangs-C/football/CMakeFiles/football.dir/io.s 2023-11-13 08:03:17.719692754 +0000 @@ -2290,9 +2290,9 @@ vmv.v.i v8, 0 li s5, 8 li a5, 29 - sd a4, 56(sp) # 8-byte Folded Spill addi a0, sp, 80 vs2r.v v8, (a0) # Unknown-size Folded Spill + sd a4, 56(sp) # 8-byte Folded Spill ld s10, 64(sp) # 8-byte Folded Reload j .LBB15_14 .LBB15_11: # %if.else --- build.head//MultiSource/Benchmarks/Trimaran/enc-md5/CMakeFiles/enc-md5.dir/md5.s 2023-11-13 08:03:22.759547070 +0000 +++ build//MultiSource/Benchmarks/Trimaran/enc-md5/CMakeFiles/enc-md5.dir/md5.s 2023-11-13 08:03:17.811690094 +0000 @@ -1588,12 +1588,12 @@ vse64.v v8, (a0) vsetivli zero, 4, e64, m2, ta, ma lui a0, 24 + addiw a0, a0, 1872 + add a0, sp, a0 + vl2r.v v8, (a0) # Unknown-size Folded Reload + lui a0, 24 addiw a0, a0, 1760 add a0, sp, a0 - lui a1, 24 - addiw a1, a1, 1872 - add a1, sp, a1 - vl2r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) sd a2, 24(sp) # 8-byte Folded Spill ld a0, 16(sp) # 8-byte Folded Reload --- build.head//MultiSource/Applications/JM/ldecod/CMakeFiles/ldecod.dir/erc_do_i.s 2023-11-13 08:03:22.231562332 +0000 +++ build//MultiSource/Applications/JM/ldecod/CMakeFiles/ldecod.dir/erc_do_i.s 2023-11-13 08:03:17.283705356 +0000 @@ -315,9 +315,9 @@ .LBB1_18: # %for.body120.us # in Loop: Header=BB1_16 Depth=3 vsetivli zero, 2, e64, m1, ta, ma + addi a0, sp, 320 + vl1r.v v8, (a0) # Unknown-size Folded Reload addi a0, sp, 288 - addi a2, sp, 320 - vl1r.v v8, (a2) # Unknown-size Folded Reload vse64.v v8, (a0) addi a0, sp, 272 vse64.v v8, (a0) @@ -545,9 +545,9 @@ # Parent Loop BB1_7 Depth=2 # => This Inner Loop Header: Depth=3 vsetivli zero, 2, e64, m1, ta, ma + addi a0, sp, 320 + vl1r.v v8, (a0) # Unknown-size Folded Reload addi a0, sp, 288 - addi a1, sp, 320 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) addi a0, sp, 272 vse64.v v8, (a0) @@ -736,9 +736,9 @@ # Parent Loop BB1_7 Depth=2 # => This Inner Loop Header: Depth=3 vsetivli zero, 2, e64, m1, ta, ma + addi a0, sp, 320 + vl1r.v v8, (a0) # Unknown-size Folded Reload addi a0, sp, 288 - addi a1, sp, 320 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) addi a0, sp, 272 vse64.v v8, (a0) --- build.head//MultiSource/Applications/JM/ldecod/CMakeFiles/ldecod.dir/macroblock.s 2023-11-13 08:03:22.235562217 +0000 +++ build//MultiSource/Applications/JM/ldecod/CMakeFiles/ldecod.dir/macroblock.s 2023-11-13 08:03:17.287705241 +0000 @@ -10939,9 +10939,9 @@ # in Loop: Header=BB15_251 Depth=1 sd s11, 256(sp) # 8-byte Folded Spill vsetivli zero, 2, e64, m1, ta, ma + addi a0, sp, 576 + vl1r.v v8, (a0) # Unknown-size Folded Reload addi a0, sp, 336 - addi a1, sp, 576 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) ld a0, 288(sp) # 8-byte Folded Reload ld a0, %pcrel_lo(.Lpcrel_hi130)(a0) --- build.head//MultiSource/Benchmarks/FreeBench/distray/CMakeFiles/distray.dir/distray.s 2023-11-13 08:03:22.551553082 +0000 +++ build//MultiSource/Benchmarks/FreeBench/distray/CMakeFiles/distray.dir/distray.s 2023-11-13 08:03:17.583696685 +0000 @@ -189,7 +189,7 @@ fsd fa5, 56(sp) # 8-byte Folded Spill .Lpcrel_hi19: auipc a1, %pcrel_hi(.LCPI0_3) - fld fs8, %pcrel_lo(.Lpcrel_hi19)(a1) + fld fs4, %pcrel_lo(.Lpcrel_hi19)(a1) .Lpcrel_hi20: auipc a1, %pcrel_hi(.LCPI0_4) fld fa5, %pcrel_lo(.Lpcrel_hi20)(a1) @@ -202,7 +202,7 @@ auipc s2, %pcrel_hi(rnd) .Lpcrel_hi23: auipc a1, %pcrel_hi(.LCPI0_6) - fld fs2, %pcrel_lo(.Lpcrel_hi23)(a1) + fld fs7, %pcrel_lo(.Lpcrel_hi23)(a1) .Lpcrel_hi24: auipc a1, %pcrel_hi(Camerapos) addi s1, a1, %pcrel_lo(.Lpcrel_hi24) @@ -245,7 +245,7 @@ .LBB0_5: # %for.end.i # in Loop: Header=BB0_6 Depth=2 fcvt.d.w fa5, a0 - fdiv.d fa5, fs8, fa5 + fdiv.d fa5, fs4, fa5 fmul.d fa4, fa5, fs6 ld a1, 96(sp) # 8-byte Folded Reload add a1, s6, a1 @@ -296,13 +296,13 @@ fmadd.d fa5, fa5, fa2, fa4 fmadd.d fs11, fa3, ft2, fa5 fmadd.d fa5, fa1, fa2, fa0 - fmadd.d fs7, ft0, ft2, fa5 - fabs.d fa5, fs7 + fmadd.d fs2, ft0, ft2, fa5 + fabs.d fa5, fs2 fld fa4, 56(sp) # 8-byte Folded Reload flt.d a0, fa4, fa5 fneg.d fa3, fs1 - fmul.d fa5, fs11, fs7 - fmul.d fa4, fs7, fa3 + fmul.d fa5, fs11, fs2 + fmul.d fa4, fs2, fa3 fmv.d fs0, fa4 fmv.d fs5, fa5 bnez a0, .LBB0_9 @@ -315,25 +315,25 @@ bnez a0, .LBB0_11 # %bb.10: # %for.body29.lr.ph.i # in Loop: Header=BB0_6 Depth=2 - fmv.d fs4, fs8 + fmv.d fs8, fs4 fsd fs3, 104(sp) # 8-byte Folded Spill fsd fs3, 112(sp) # 8-byte Folded Spill j .LBB0_12 .LBB0_11: # in Loop: Header=BB0_6 Depth=2 - fmul.d fa3, fs7, fa4 + fmul.d fa3, fs2, fa4 fsd fa3, 112(sp) # 8-byte Folded Spill fneg.d fa3, fa5 - fmul.d fa3, fs7, fa3 + fmul.d fa3, fs2, fa3 fsd fa3, 104(sp) # 8-byte Folded Spill fneg.d fa4, fa4 fmul.d fa4, fs1, fa4 - fmadd.d fs4, fa5, fs11, fa4 + fmadd.d fs8, fa5, fs11, fa4 .LBB0_12: # %for.body29.lr.ph.i # in Loop: Header=BB0_6 Depth=2 li s8, 0 fmul.d fa5, fs11, fs11 fmadd.d fa5, fs1, fs1, fa5 - fmadd.d fa5, fs7, fs7, fa5 + fmadd.d fa5, fs2, fs2, fa5 fsqrt.d fa5, fa5 fmul.d fa4, fs0, fs0 fmadd.d fa4, fs5, fs5, fa4 @@ -345,7 +345,7 @@ fmul.d fa4, fa4, fa4 fld fa3, 112(sp) # 8-byte Folded Reload fmadd.d fa4, fa3, fa3, fa4 - fmadd.d fa4, fs4, fs4, fa4 + fmadd.d fa4, fs8, fs8, fa4 fsqrt.d fa4, fa4 fdiv.d fa5, fa5, fa4 fld fa4, 40(sp) # 8-byte Folded Reload @@ -366,8 +366,8 @@ add a0, a0, s5 and a1, a0, s3 fcvt.d.wu fa5, a1 - fdiv.d fa5, fa5, fs2 - fsub.d fa5, fs8, fa5 + fdiv.d fa5, fa5, fs7 + fsub.d fa5, fs4, fa5 fmul.d fa5, fs9, fa5 fmul.d fa4, fs5, fa5 fmul.d fa3, fs0, fa5 @@ -377,14 +377,14 @@ and a0, a0, s3 sd a0, %pcrel_lo(.Lpcrel_hi22)(s2) fcvt.d.wu fa2, a0 - fdiv.d fa2, fa2, fs2 - fsub.d fa2, fs8, fa2 + fdiv.d fa2, fa2, fs7 + fsub.d fa2, fs4, fa2 fmul.d fa2, fs10, fa2 fld fa1, 112(sp) # 8-byte Folded Reload fmul.d fa1, fa1, fa2 fld fa0, 104(sp) # 8-byte Folded Reload fmul.d fa0, fa0, fa2 - fmul.d fa2, fs4, fa2 + fmul.d fa2, fs8, fa2 fadd.d fa4, fa4, fa1 fadd.d fa3, fa3, fa0 fadd.d fa5, fa5, fa2 @@ -392,7 +392,7 @@ fsd fa4, 120(sp) fadd.d fa4, fs11, fa3 fsd fa4, 128(sp) - fadd.d fa5, fs7, fa5 + fadd.d fa5, fs2, fa5 fsd fa5, 136(sp) addi a1, sp, 120 addi a2, sp, 144 @@ -815,9 +815,9 @@ addw s5, s5, a0 blt s6, a1, .LBB1_17 .LBB1_18: # %if.end44 - ld s8, 72(sp) # 8-byte Folded Reload addi a0, sp, 352 vl1r.v v8, (a0) # Unknown-size Folded Reload + ld s8, 72(sp) # 8-byte Folded Reload fld fs1, 64(sp) # 8-byte Folded Reload fld fs2, 56(sp) # 8-byte Folded Reload fld fs3, 48(sp) # 8-byte Folded Reload @@ -1293,21 +1293,21 @@ .LBB2_7: # %call.sqrt fmv.d fs5, fa0 fmv.d fa0, fa4 + addi a5, sp, 32 + vs1r.v v9, (a5) # Unknown-size Folded Spill mv s1, a4 mv s4, a2 mv s2, a1 mv s5, a0 mv s3, a3 - addi a0, sp, 32 - vs1r.v v9, (a0) # Unknown-size Folded Spill call sqrt@plt - addi a0, sp, 32 - vl1r.v v9, (a0) # Unknown-size Folded Reload mv a3, s3 mv a0, s5 mv a1, s2 mv a2, s4 mv a4, s1 + addi a5, sp, 32 + vl1r.v v9, (a5) # Unknown-size Folded Reload fmv.d fa5, fa0 fmv.d fa0, fs5 fsub.d fa4, fs4, fa5 @@ -1393,21 +1393,21 @@ .LBB2_15: # %call.sqrt85 fmv.d fs5, fa0 fmv.d fa0, fa4 + addi a5, sp, 32 + vs1r.v v9, (a5) # Unknown-size Folded Spill mv s1, a4 mv s4, a2 mv s2, a1 mv s5, a0 mv s3, a3 - addi a0, sp, 32 - vs1r.v v9, (a0) # Unknown-size Folded Spill call sqrt@plt - addi a0, sp, 32 - vl1r.v v9, (a0) # Unknown-size Folded Reload mv a3, s3 mv a0, s5 mv a1, s2 mv a2, s4 mv a4, s1 + addi a5, sp, 32 + vl1r.v v9, (a5) # Unknown-size Folded Reload fmv.d fa5, fa0 fmv.d fa0, fs5 fsub.d fa4, fs4, fa5 @@ -1493,21 +1493,21 @@ .LBB2_23: # %call.sqrt86 fmv.d fs5, fa0 fmv.d fa0, fa4 + addi a5, sp, 32 + vs1r.v v9, (a5) # Unknown-size Folded Spill mv s1, a4 mv s4, a2 mv s2, a1 mv s5, a0 mv s3, a3 - addi a0, sp, 32 - vs1r.v v9, (a0) # Unknown-size Folded Spill call sqrt@plt - addi a0, sp, 32 - vl1r.v v9, (a0) # Unknown-size Folded Reload mv a3, s3 mv a0, s5 mv a1, s2 mv a2, s4 mv a4, s1 + addi a5, sp, 32 + vl1r.v v9, (a5) # Unknown-size Folded Reload fmv.d fa5, fa0 fmv.d fa0, fs5 fsub.d fa4, fs4, fa5 @@ -1593,21 +1593,21 @@ .LBB2_31: # %call.sqrt87 fmv.d fs4, fa0 fmv.d fa0, fa4 + addi a5, sp, 32 + vs1r.v v9, (a5) # Unknown-size Folded Spill mv s1, a4 mv s4, a2 mv s2, a1 mv s5, a0 mv s3, a3 - addi a0, sp, 32 - vs1r.v v9, (a0) # Unknown-size Folded Spill call sqrt@plt - addi a0, sp, 32 - vl1r.v v9, (a0) # Unknown-size Folded Reload mv a3, s3 mv a0, s5 mv a1, s2 mv a2, s4 mv a4, s1 + addi a5, sp, 32 + vl1r.v v9, (a5) # Unknown-size Folded Reload fmv.d fa5, fa0 fmv.d fa0, fs4 fsub.d fa4, fs2, fa5 --- build.head//SingleSource/Benchmarks/Misc-C++/Large/CMakeFiles/ray.dir/ray.s 2023-11-13 08:03:22.887543370 +0000 +++ build//SingleSource/Benchmarks/Misc-C++/Large/CMakeFiles/ray.dir/ray.s 2023-11-13 08:03:17.951686047 +0000 @@ -1072,9 +1072,9 @@ sd s5, 192(sp) sd s1, 200(sp) fsd fa5, 280(sp) + addi a0, sp, 320 + vl1r.v v8, (a0) # Unknown-size Folded Reload addi a0, sp, 288 - addi a1, sp, 320 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) sd zero, 16(a0) ld a0, 0(s0) --- build.head//MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/CMakeFiles/timberwolfmc.dir/addpins.s 2023-11-13 08:03:22.695548920 +0000 +++ build//MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/CMakeFiles/timberwolfmc.dir/addpins.s 2023-11-13 08:03:17.731692407 +0000 @@ -47,12 +47,12 @@ ld s8, %pcrel_lo(.Lpcrel_hi0)(a0) .Lpcrel_hi2: auipc a0, %got_pcrel_hi(numnets) - ld s3, %pcrel_lo(.Lpcrel_hi2)(a0) + ld s0, %pcrel_lo(.Lpcrel_hi2)(a0) lw s5, 0(s8) .Lpcrel_hi1: auipc a0, %got_pcrel_hi(netarray) ld s4, %pcrel_lo(.Lpcrel_hi1)(a0) - lw a1, 0(s3) + lw a1, 0(s0) ld a0, 0(s4) add a1, s5, a1 addiw a1, a1, 1 @@ -61,7 +61,7 @@ sd a0, 0(s4) blez s5, .LBB0_3 # %bb.1: # %for.body.lr.ph - lw s1, 0(s3) + lw s1, 0(s0) .Lpcrel_hi3: auipc a0, %got_pcrel_hi(Hdefault) ld a0, %pcrel_lo(.Lpcrel_hi3)(a0) @@ -71,8 +71,8 @@ fld fs0, 0(a0) addw s2, s1, s5 fld fs1, 0(a1) - slli s0, s1, 3 - addi s0, s0, 8 + slli s3, s1, 3 + addi s3, s3, 8 vsetivli zero, 2, e64, m1, ta, ma vmv.v.i v8, 0 addi a0, sp, 80 @@ -83,7 +83,7 @@ li a0, 72 call malloc@plt ld a1, 0(s4) - add a1, a1, s0 + add a1, a1, s3 sd a0, 0(a1) sd zero, 64(a0) vsetivli zero, 2, e64, m1, ta, ma @@ -96,11 +96,11 @@ vse64.v v8, (a1) fsd fs0, 48(a0) fsd fs1, 56(a0) - addi s0, s0, 8 + addi s3, s3, 8 blt s1, s2, .LBB0_2 .LBB0_3: # %for.end sd s4, 64(sp) # 8-byte Folded Spill - sd s3, 24(sp) # 8-byte Folded Spill + sd s0, 24(sp) # 8-byte Folded Spill .Lpcrel_hi6: auipc a0, %got_pcrel_hi(maxterm) ld s4, %pcrel_lo(.Lpcrel_hi6)(a0) --- build.head//MultiSource/Benchmarks/MallocBench/espresso/CMakeFiles/espresso.dir/pair.s 2023-11-13 08:03:22.583552157 +0000 +++ build//MultiSource/Benchmarks/MallocBench/espresso/CMakeFiles/espresso.dir/pair.s 2023-11-13 08:03:17.615695760 +0000 @@ -1428,9 +1428,9 @@ .LBB5_14: # %if.end128 # in Loop: Header=BB5_16 Depth=2 vsetivli zero, 2, e32, mf2, ta, ma + addi a0, sp, 96 + vl1r.v v8, (a0) # Unknown-size Folded Reload ld a0, 80(sp) # 8-byte Folded Reload - addi a1, sp, 96 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse32.v v8, (a0) sd s6, 32(s8) call cube_setup@plt --- build.head//MultiSource/Benchmarks/DOE-ProxyApps-C++/PENNANT/CMakeFiles/PENNANT.dir/GenMesh.s 2023-11-13 08:03:22.547553198 +0000 +++ build//MultiSource/Benchmarks/DOE-ProxyApps-C++/PENNANT/CMakeFiles/PENNANT.dir/GenMesh.s 2023-11-13 08:03:17.575696916 +0000 @@ -1115,9 +1115,9 @@ # in Loop: Header=BB4_20 Depth=1 ld a2, 96(sp) # 8-byte Folded Reload addiw a0, a2, 1 + addi a1, sp, 144 + vl1r.v v8, (a1) # Unknown-size Folded Reload ld a1, 64(sp) # 8-byte Folded Reload - addi a3, sp, 144 - vl1r.v v8, (a3) # Unknown-size Folded Reload beq a2, a1, .LBB4_40 .LBB4_20: # %for.body # =>This Loop Header: Depth=1 --- build.head//MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/CMakeFiles/timberwolfmc.dir/uloop.s 2023-11-13 08:03:22.711548458 +0000 +++ build//MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/CMakeFiles/timberwolfmc.dir/uloop.s 2023-11-13 08:03:17.751691829 +0000 @@ -750,11 +750,11 @@ fld fa0, 8(t0) mv a1, s5 mv a2, t3 + addi a3, sp, 352 + vs1r.v v9, (a3) # Unknown-size Folded Spill mv s8, a0 sd t3, 240(sp) # 8-byte Folded Spill sd t0, 232(sp) # 8-byte Folded Spill - addi a3, sp, 352 - vs1r.v v9, (a3) # Unknown-size Folded Spill call wireestx@plt ld a1, 232(sp) # 8-byte Folded Reload fld fa0, 16(a1) @@ -780,9 +780,9 @@ sd s11, 176(sp) # 8-byte Folded Spill mv a2, s11 call wireesty@plt + ld t3, 240(sp) # 8-byte Folded Reload addi a1, sp, 352 vl1r.v v9, (a1) # Unknown-size Folded Reload - ld t3, 240(sp) # 8-byte Folded Reload lw a2, 56(s6) ld a1, 288(sp) # 8-byte Folded Reload lw a1, 0(a1) @@ -1299,12 +1299,12 @@ # in Loop: Header=BB0_7 Depth=1 fld fa0, 8(s8) mv a2, t5 + addi a3, sp, 352 + vs1r.v v9, (a3) # Unknown-size Folded Spill mv s10, a0 sd t5, 240(sp) # 8-byte Folded Spill sd s5, 72(sp) # 8-byte Folded Spill mv s5, a1 - addi a3, sp, 352 - vs1r.v v9, (a3) # Unknown-size Folded Spill call wireestx@plt fld fa0, 16(s8) subw s10, s10, a0 @@ -1328,9 +1328,9 @@ sd s11, 88(sp) # 8-byte Folded Spill mv a2, s11 call wireesty@plt + ld t5, 240(sp) # 8-byte Folded Reload addi a1, sp, 352 vl1r.v v9, (a1) # Unknown-size Folded Reload - ld t5, 240(sp) # 8-byte Folded Reload ld a1, 288(sp) # 8-byte Folded Reload lw t1, 0(a1) addw t5, a0, t5 --- build.head//MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/CMakeFiles/timberwolfmc.dir/loadbins.s 2023-11-13 08:03:22.703548689 +0000 +++ build//MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/CMakeFiles/timberwolfmc.dir/loadbins.s 2023-11-13 08:03:17.743692060 +0000 @@ -52,7 +52,7 @@ .Lpcrel_hi4: auipc a1, %got_pcrel_hi(blockl) ld a1, %pcrel_lo(.Lpcrel_hi4)(a1) - lw s4, 0(a1) + lw s8, 0(a1) .Lpcrel_hi5: auipc a1, %got_pcrel_hi(blockr) ld a1, %pcrel_lo(.Lpcrel_hi5)(a1) @@ -65,7 +65,7 @@ lw t2, 0(a1) lw s10, 0(a2) lw s9, 0(a3) - subw s6, t2, s4 + subw s6, t2, s8 srliw a1, s6, 31 add a1, s6, a1 subw s2, s9, s10 @@ -77,7 +77,7 @@ mv s1, s2 .LBB0_3: # %for.end16 sraiw t0, a1, 1 - sraiw s8, a2, 1 + sraiw s4, a2, 1 sd t3, 64(sp) # 8-byte Folded Spill beqz a0, .LBB0_16 # %bb.4: # %if.then @@ -108,7 +108,7 @@ srliw a0, s1, 31 add a0, s1, a0 sraiw s3, a0, 1 - subw a0, s4, s3 + subw a0, s8, s3 sw a0, 12(s0) add a0, s9, s10 srliw a1, a0, 31 @@ -137,17 +137,17 @@ addi a1, s0, 192 vse64.v v8, (a1) sd zero, 208(s0) - sd s4, 24(sp) # 8-byte Folded Spill - neg s4, s3 - sw s4, 56(s1) - sw s4, 56(a0) + sd s8, 24(sp) # 8-byte Folded Spill + neg s8, s3 + sw s8, 56(s1) + sw s8, 56(a0) sw s3, 60(s1) sw s3, 60(a0) sd s10, 32(sp) # 8-byte Folded Spill - negw s10, s8 + negw s10, s4 sw s10, 64(s1) sw s10, 64(a0) - subw s2, s2, s8 + subw s2, s2, s4 sw s2, 68(s1) sw s2, 68(a0) li a0, 224 @@ -159,8 +159,8 @@ li a0, 1 sw a0, 60(s0) sw zero, 68(s0) - ld s8, 40(sp) # 8-byte Folded Reload - add a0, s3, s8 + ld s4, 40(sp) # 8-byte Folded Reload + add a0, s3, s4 sw a0, 12(s0) sw s9, 16(s0) li a0, 104 @@ -183,8 +183,8 @@ addi a1, s0, 192 vse64.v v8, (a1) sd zero, 208(s0) - sw s4, 56(s1) - sw s4, 56(a0) + sw s8, 56(s1) + sw s8, 56(a0) sw s3, 60(s1) sw s3, 60(a0) sw s10, 64(s1) @@ -202,7 +202,7 @@ li s10, 1 sw zero, 68(s0) ld a0, 24(sp) # 8-byte Folded Reload - add a0, s8, a0 + add a0, s4, a0 srliw a1, a0, 31 add a0, a0, a1 sraiw s9, a0, 1 @@ -230,17 +230,17 @@ addi a1, s0, 192 vse64.v v8, (a1) sd zero, 208(s0) - sw s4, 64(s1) - sw s4, 64(a0) + sw s8, 64(s1) + sw s8, 64(a0) sw s3, 68(s1) sw s3, 68(a0) ld a1, 56(sp) # 8-byte Folded Reload neg s2, a1 sw s2, 56(s1) sw s2, 56(a0) - subw s8, s6, a1 - sw s8, 60(s1) - sw s8, 60(a0) + subw s4, s6, a1 + sw s4, 60(s1) + sw s4, 60(a0) li a0, 224 call malloc@plt ld a1, 0(s11) @@ -360,7 +360,7 @@ srliw a2, s1, 31 add a2, s1, a2 sraiw s3, a2, 1 - subw a2, s4, s3 + subw a2, s8, s3 sw a2, 12(a1) add a2, s9, s10 ld a3, 152(a1) @@ -369,17 +369,17 @@ sraiw a2, a2, 1 ld a4, 0(a3) sw a2, 16(a1) - mv t1, s4 - neg s4, s3 - sw s4, 56(a3) - sw s4, 56(a4) + mv t1, s8 + neg s8, s3 + sw s8, 56(a3) + sw s8, 56(a4) sw s3, 60(a3) sw s3, 60(a4) - negw a1, s8 + negw a1, s4 ld a5, 16(a0) sw a1, 64(a3) sw a1, 64(a4) - subw a6, s2, s8 + subw a6, s2, s4 ld a7, 152(a5) sw a6, 68(a3) sw a6, 68(a4) @@ -387,8 +387,8 @@ ld a4, 0(a7) sw a3, 12(a5) sw a2, 16(a5) - sw s4, 56(a7) - sw s4, 56(a4) + sw s8, 56(a7) + sw s8, 56(a4) sw s3, 60(a7) sw s3, 60(a4) sw a1, 64(a7) @@ -405,25 +405,25 @@ ld a3, 0(a4) subw a5, s10, s3 sw a5, 16(a1) - sw s4, 64(a4) - sw s4, 64(a3) + sw s8, 64(a4) + sw s8, 64(a3) sw s3, 68(a4) sw s3, 68(a3) neg s2, t0 ld a1, 32(a0) sw s2, 56(a4) sw s2, 56(a3) - subw s8, s6, t0 + subw s4, s6, t0 ld s0, 152(a1) - sw s8, 60(a4) - sw s8, 60(a3) + sw s4, 60(a4) + sw s4, 60(a3) sw a2, 12(a1) ld a0, 0(s0) add a2, s3, s9 sw a2, 16(a1) .LBB0_17: # %if.end - sw s4, 64(s0) - sw s4, 64(a0) + sw s8, 64(s0) + sw s8, 64(a0) .Lpcrel_hi14: auipc a1, %got_pcrel_hi(numcells) ld t0, %pcrel_lo(.Lpcrel_hi14)(a1) @@ -436,10 +436,10 @@ lw a2, 0(s10) sw s2, 56(s0) sw s2, 56(a0) - sw s8, 60(s0) + sw s4, 60(s0) addw a3, a2, a1 li a4, -3 - sw s8, 60(a0) + sw s4, 60(a0) bge a3, a4, .LBB0_19 .LBB0_18: # %for.end492 csrr a0, vlenb --- build.head//MultiSource/Benchmarks/ASCI_Purple/SMG2000/CMakeFiles/smg2000.dir/smg_axpy.s 2023-11-13 08:03:22.415557013 +0000 +++ build//MultiSource/Benchmarks/ASCI_Purple/SMG2000/CMakeFiles/smg2000.dir/smg_axpy.s 2023-11-13 08:03:17.455700385 +0000 @@ -60,9 +60,9 @@ srli s8, s7, 2 slli a0, s7, 1 sd a0, 24(sp) # 8-byte Folded Spill - sd a2, 40(sp) # 8-byte Folded Spill addi a0, sp, 96 vs2r.v v12, (a0) # Unknown-size Folded Spill + sd a2, 40(sp) # 8-byte Folded Spill j .LBB0_3 .LBB0_2: # %for.end373 # in Loop: Header=BB0_3 Depth=1 @@ -127,19 +127,19 @@ # in Loop: Header=BB0_3 Depth=1 add s3, s3, s2 add s9, s9, s2 - lw t1, 0(s4) + lw t0, 0(s4) lw a7, 0(s3) - lw t2, 4(s4) - lw a3, 4(s3) - lw t3, 8(s4) + lw t1, 4(s4) + lw ra, 4(s3) + lw t2, 8(s4) lw s2, 8(s3) lw s11, 16(s3) lw s3, 12(s3) - lw t0, 0(s9) - lw t5, 4(s9) - lw t6, 8(s9) - lw ra, 16(s9) - lw t4, 12(s9) + lw a3, 0(s9) + lw t4, 4(s9) + lw t5, 8(s9) + lw t6, 16(s9) + lw t3, 12(s9) lw a2, 92(sp) lw s9, 0(s0) mv a5, a2 @@ -177,55 +177,55 @@ add a5, a6, a5 slli a6, s5, 3 add a6, s10, a6 - subw s1, s11, a3 + subw s1, s11, ra addi s5, s1, 1 slti s1, s1, 0 addi s1, s1, -1 and s1, s1, s5 - subw s5, t1, a7 - subw a3, t2, a3 - subw s2, t3, s2 + subw s5, t0, a7 + subw s10, t1, ra + subw s2, t2, s2 mul s2, s1, s2 - add a3, a3, s2 + add s2, s10, s2 subw a7, s3, a7 - addi s2, a7, 1 + addi s3, a7, 1 slti a7, a7, 0 addi a7, a7, -1 - and s2, a7, s2 - mul a3, a3, s2 - addw a7, s5, a3 - subw a3, t1, t0 - subw t1, t2, t5 - subw t2, t3, t6 - subw t3, ra, t5 - addi t5, t3, 1 - slti t3, t3, 0 - addi t3, t3, -1 - and t3, t3, t5 - mul t2, t3, t2 + and s3, a7, s3 + mul a7, s2, s3 + addw a7, s5, a7 + subw t0, t0, a3 + subw t1, t1, t4 + subw t2, t2, t5 + subw t4, t6, t4 + addi t5, t4, 1 + slti t4, t4, 0 + addi t4, t4, -1 + and t4, t4, t5 + mul t2, t4, t2 add t1, t1, t2 - subw t0, t4, t0 - addi t2, t0, 1 - slti t0, t0, 0 - addi t0, t0, -1 - and t2, t0, t2 - mul t0, t1, t2 - lw t1, 8(s0) - lw t4, 4(s0) - addw t0, a3, t0 - mul a3, t2, t3 - mul a3, a3, t1 - mul t5, t2, t4 - mul t2, s2, s1 - mul t3, t2, t1 - mul t4, t4, s2 + subw a3, t3, a3 + addi t2, a3, 1 + slti a3, a3, 0 + addi a3, a3, -1 + and a3, a3, t2 + mul t1, t1, a3 + lw t2, 8(s0) + lw t3, 4(s0) + addw t0, t0, t1 + mul t1, a3, t4 + mul t4, t1, t2 + mul a3, a3, t3 + mul t1, s3, s1 + mul t5, t1, t2 + mul t3, t3, s3 mul t2, s9, a0 - subw t1, t4, t2 - subw t2, t5, t2 - mul t4, a1, t4 - subw t3, t3, t4 - mul t4, a1, t5 - subw t4, a3, t4 + subw t1, t3, t2 + subw t2, a3, t2 + mul t3, a1, t3 + subw t3, t5, t3 + mul a3, a1, a3 + subw t4, t4, a3 addi a3, a0, -1 slli a3, a3, 32 srli a3, a3, 29 --- build.head//MultiSource/Benchmarks/Prolangs-C/agrep/CMakeFiles/agrep.dir/main.s 2023-11-13 08:03:22.671549614 +0000 +++ build//MultiSource/Benchmarks/Prolangs-C/agrep/CMakeFiles/agrep.dir/main.s 2023-11-13 08:03:17.707693101 +0000 @@ -4260,16 +4260,16 @@ addiw a1, a1, 884 add a1, sp, a1 mv a2, a0 + lui a3, 141 + addiw a3, a3, 912 + add a3, sp, a3 + vl2r.v v8, (a3) # Unknown-size Folded Reload ld a3, 96(sp) # 8-byte Folded Reload ld t3, 168(sp) # 8-byte Folded Reload ld s3, 104(sp) # 8-byte Folded Reload lui a5, 141 addiw a5, a5, 864 add s8, sp, a5 - lui a5, 141 - addiw a5, a5, 912 - add a5, sp, a5 - vl2r.v v8, (a5) # Unknown-size Folded Reload .LBB7_91: # %vector.body631 # Parent Loop BB7_26 Depth=1 # Parent Loop BB7_33 Depth=2 --- build.head//MultiSource/Benchmarks/FreeBench/pifft/CMakeFiles/pifft.dir/fftsg.s 2023-11-13 08:03:22.555552966 +0000 +++ build//MultiSource/Benchmarks/FreeBench/pifft/CMakeFiles/pifft.dir/fftsg.s 2023-11-13 08:03:17.587696569 +0000 @@ -3272,9 +3272,9 @@ vsetivli zero, 4, e16, mf2, ta, ma vid.v v8 vrsub.vi v14, v8, 3 - sd s5, 56(sp) # 8-byte Folded Spill addi a0, sp, 112 vs1r.v v14, (a0) # Unknown-size Folded Spill + sd s5, 56(sp) # 8-byte Folded Spill .LBB12_43: # %while.body # =>This Loop Header: Depth=1 # Child Loop BB12_45 Depth 2 @@ -3342,6 +3342,8 @@ li t1, 5 bne s6, t1, .LBB12_64 # %bb.48: # in Loop: Header=BB12_43 Depth=1 + addi a0, sp, 112 + vl1r.v v14, (a0) # Unknown-size Folded Reload ld ra, 72(sp) # 8-byte Folded Reload ld t5, 88(sp) # 8-byte Folded Reload mv t6, s3 @@ -3350,8 +3352,6 @@ li t0, 3 li t2, 1 li t3, 96 - addi a0, sp, 112 - vl1r.v v14, (a0) # Unknown-size Folded Reload j .LBB12_50 .LBB12_49: # %if.else129.thread # in Loop: Header=BB12_43 Depth=1 @@ -3540,11 +3540,11 @@ sub a3, s3, a0 li a4, 2 ld a5, 96(sp) # 8-byte Folded Reload + addi a6, sp, 112 + vl1r.v v14, (a6) # Unknown-size Folded Reload li t0, 3 li t2, 1 li t3, 96 - addi a6, sp, 112 - vl1r.v v14, (a6) # Unknown-size Folded Reload .LBB12_65: # %for.body.i264 # Parent Loop BB12_43 Depth=1 # => This Inner Loop Header: Depth=2 @@ -3819,34 +3819,34 @@ mv s10, a4 mv s1, a2 mv s0, a1 - mv s3, a0 + sd a0, 72(sp) # 8-byte Folded Spill bge a3, a0, .LBB13_2 # %bb.1: # %if.then - srai s4, s3, 3 + ld a0, 72(sp) # 8-byte Folded Reload + srai s4, a0, 3 mv a0, s4 mv a1, s5 mv a2, s10 call makewt .LBB13_2: # %if.end - lw a0, 4(s5) - sd a0, 72(sp) # 8-byte Folded Spill - slliw a0, a0, 1 + lw s7, 4(s5) + slliw a0, s7, 1 sext.w s9, s4 - bge a0, s3, .LBB13_9 + ld a1, 72(sp) # 8-byte Folded Reload + bge a0, a1, .LBB13_9 # %bb.3: # %if.then4 - srai a1, s3, 1 + ld a0, 72(sp) # 8-byte Folded Reload + srai s7, a0, 1 li a0, 2 - sw a1, 4(s5) - sd a1, 72(sp) # 8-byte Folded Spill - blt a1, a0, .LBB13_9 + sw s7, 4(s5) + blt s7, a0, .LBB13_9 # %bb.4: # %if.then.i slli s6, s9, 3 .Lpcrel_hi23: auipc a0, %pcrel_hi(.LCPI13_0) fld fa5, %pcrel_lo(.Lpcrel_hi23)(a0) add s6, s10, s6 - ld a0, 72(sp) # 8-byte Folded Reload - srliw s2, a0, 1 + srliw s2, s7, 1 fcvt.d.w fa4, s2 fdiv.d fs1, fa5, fa4 fmul.d fa0, fs1, fa4 @@ -3860,7 +3860,8 @@ add a0, s6, a0 li a1, 7 fsd fa5, 0(a0) - bgeu a1, s3, .LBB13_22 + ld a0, 72(sp) # 8-byte Folded Reload + bgeu a1, a0, .LBB13_22 # %bb.5: # %for.body.preheader.i li a0, 2 bltu a0, s2, .LBB13_7 @@ -3868,8 +3869,7 @@ li s2, 2 .LBB13_7: # %for.body.preheader.i addi s2, s2, -1 - ld a0, 72(sp) # 8-byte Folded Reload - slli a0, a0, 32 + slli a0, s7, 32 srli a0, a0, 29 add a0, s6, a0 addi s4, a0, -8 @@ -3894,17 +3894,20 @@ bnez s2, .LBB13_8 .LBB13_9: # %if.end6 li a0, 3 - blt s3, a0, .LBB13_74 + ld a1, 72(sp) # 8-byte Folded Reload + blt a1, a0, .LBB13_74 # %bb.10: # %if.then8 - srliw s6, s3, 1 + ld a1, 72(sp) # 8-byte Folded Reload + srliw s6, a1, 1 li a0, 8 - srliw s8, s3, 2 - bltu s3, a0, .LBB13_21 + srliw s8, a1, 2 + bltu a1, a0, .LBB13_21 # %bb.11: # %for.body.preheader - sltiu a2, s3, 8 - slli a1, s3, 32 + ld a1, 72(sp) # 8-byte Folded Reload + sltiu a2, a1, 8 + slli a1, a1, 32 li a3, 2 - srli s7, a1, 32 + srli s3, a1, 32 mv a0, s8 bltu a3, s8, .LBB13_13 # %bb.12: # %for.body.preheader @@ -3913,9 +3916,10 @@ xori s11, a2, 1 li a4, 1 li a5, 196 - slli a3, s7, 3 + slli a3, s3, 3 slli a2, s6, 3 - bltu s3, a5, .LBB13_19 + ld a1, 72(sp) # 8-byte Folded Reload + bltu a1, a5, .LBB13_19 # %bb.14: # %vector.scevcheck addi a5, a0, -2 addi a6, a2, -8 @@ -3958,7 +3962,7 @@ sub t0, s0, t0 add t0, t0, t3 sltu t3, a6, t2 - sd s10, 64(sp) # 8-byte Folded Spill + sd s10, 56(sp) # 8-byte Folded Spill sltu s10, a7, t1 and t3, t3, s10 sltu s10, a6, t5 @@ -3997,7 +4001,7 @@ sltu t3, t4, s4 sltu s10, s2, t5 and t3, t3, s10 - ld s10, 64(sp) # 8-byte Folded Reload + ld s10, 56(sp) # 8-byte Folded Reload or t2, t2, t3 sltu t3, t4, s9 sltu t4, t6, t5 @@ -4070,7 +4074,7 @@ .LBB13_19: # %for.body.preheader568 slli a5, a4, 3 sub a3, a3, a5 - add a1, a4, s7 + add a1, a4, s3 sub a1, a1, s6 slli a1, a1, 3 sub a2, a2, a5 @@ -4109,13 +4113,15 @@ j .LBB13_23 .LBB13_22: # %if.then8.thread li s11, 0 - srliw s6, s3, 1 + ld a0, 72(sp) # 8-byte Folded Reload + srliw s6, a0, 1 li s8, 1 .LBB13_23: # %for.end slli a0, s8, 3 add a0, s0, a0 fld fa5, 0(a0) - subw a1, s3, s8 + ld a1, 72(sp) # 8-byte Folded Reload + subw a1, a1, s8 slli a1, a1, 3 add a1, s0, a1 fld fa4, 0(a1) @@ -4133,9 +4139,8 @@ add ra, s10, s4 beqz s11, .LBB13_26 # %bb.24: # %for.body.preheader.i186 - ld a2, 72(sp) # 8-byte Folded Reload - divw a1, a2, s6 - sext.w a2, a2 + divw a1, s7, s6 + sext.w a2, s7 slli a2, a2, 3 add a2, s4, a2 slli a1, a1, 3 @@ -4169,41 +4174,47 @@ addi a7, a7, -8 bnez a5, .LBB13_25 .LBB13_26: # %dstsub.exit - sd s10, 64(sp) # 8-byte Folded Spill + sd s10, 56(sp) # 8-byte Folded Spill fld fa5, 0(ra) fld fa4, 0(a0) fmul.d fa5, fa5, fa4 fsd fa5, 0(a0) li a0, 10 .Lpcrel_hi25: - auipc s10, %pcrel_hi(.LCPI13_1) - bltu s3, a0, .LBB13_30 + auipc a1, %pcrel_hi(.LCPI13_1) + sd a1, 64(sp) # 8-byte Folded Spill + ld a1, 72(sp) # 8-byte Folded Reload + bltu a1, a0, .LBB13_30 # %bb.27: # %if.then63 addi a2, s5, 8 mv a0, s6 mv a1, s0 mv a3, s9 - ld a4, 64(sp) # 8-byte Folded Reload - mv s7, s5 + ld a4, 56(sp) # 8-byte Folded Reload + mv s3, s6 + mv s6, s5 mv s5, s4 mv s4, s9 mv s9, s11 - mv s11, ra + mv s11, s7 + mv s7, ra call cftfsub - mv ra, s11 + mv ra, s7 + mv s7, s11 mv s11, s9 mv s9, s4 mv s4, s5 - mv s5, s7 + mv s5, s6 + mv s6, s3 + ld a1, 72(sp) # 8-byte Folded Reload li a0, 12 - bltu s3, a0, .LBB13_32 + bltu a1, a0, .LBB13_32 # %bb.28: # %for.body.preheader.i197 - ld a2, 72(sp) # 8-byte Folded Reload - slli a0, a2, 1 + slli a0, s7, 1 divw a0, a0, s8 - sext.w a2, a2 + sext.w a2, s7 slli a0, a0, 3 - ld a3, 64(sp) # 8-byte Folded Reload + ld a3, 56(sp) # 8-byte Folded Reload add a1, a3, s4 add a1, a1, a0 slli a2, a2, 3 @@ -4211,7 +4222,8 @@ sub a2, a2, a0 add a2, a3, a2 neg a3, a0 - fld fa5, %pcrel_lo(.Lpcrel_hi25)(s10) + ld a4, 64(sp) # 8-byte Folded Reload + fld fa5, %pcrel_lo(.Lpcrel_hi25)(a4) addi s2, s2, -8 addi a4, s0, 24 li a5, 2 @@ -4268,7 +4280,8 @@ fld fa5, 8(s0) fld fa4, 0(s0) fsub.d fa5, fa5, fa4 - addi a0, s3, -1 + ld a0, 72(sp) # 8-byte Folded Reload + addi a0, a0, -1 slli a0, a0, 32 srli a0, a0, 29 add a0, s0, a0 @@ -4301,7 +4314,7 @@ mv a2, s6 j .LBB13_43 .LBB13_39: # %vector.scevcheck422 - sd s11, 56(sp) # 8-byte Folded Spill + sd s11, 48(sp) # 8-byte Folded Spill mv s11, s9 li a3, 5 mv a2, s6 @@ -4363,7 +4376,7 @@ # %bb.42: mv a2, s6 mv s9, s11 - ld s11, 56(sp) # 8-byte Folded Reload + ld s11, 48(sp) # 8-byte Folded Reload .LBB13_43: # %for.body85.preheader567 addi a0, a2, 2 slli a1, a2, 1 @@ -4401,32 +4414,32 @@ beqz s11, .LBB13_72 # %bb.46: # %while.body.lr.ph sd s9, 48(sp) # 8-byte Folded Spill - ld a1, 72(sp) # 8-byte Folded Reload - sext.w a0, a1 + sext.w a0, s7 addi s5, s5, 8 sd s5, 40(sp) # 8-byte Folded Spill - slli a1, a1, 1 + slli a1, s7, 1 sd a1, 24(sp) # 8-byte Folded Spill addi t6, s1, -8 - addi s5, s1, 8 + addi s2, s1, 8 slli a0, a0, 3 - ld a1, 64(sp) # 8-byte Folded Reload + ld a1, 56(sp) # 8-byte Folded Reload add s4, a1, s4 - add s2, s4, a0 - addi s7, s1, 24 + add s3, s4, a0 + addi s5, s1, 24 addi a0, s1, -32 sd a0, 16(sp) # 8-byte Folded Spill li s9, 2 - li t3, 3 - li t4, 5 - li t5, 4 + li s10, 3 + li t3, 5 + li t4, 4 + li t5, 106 vsetivli zero, 4, e16, mf2, ta, ma vid.v v8 vrsub.vi v14, v8, 3 li s4, 2 addi a0, sp, 80 vs1r.v v14, (a0) # Unknown-size Folded Spill - sd s7, 32(sp) # 8-byte Folded Spill + sd s3, 32(sp) # 8-byte Folded Spill .LBB13_47: # %while.body # =>This Loop Header: Depth=1 # Child Loop BB13_49 Depth 2 @@ -4437,20 +4450,19 @@ mv s6, s8 srliw s8, s8, 1 slli t0, s6, 32 - bgeu t3, s6, .LBB13_54 + bgeu s10, s6, .LBB13_54 # %bb.48: # %for.body.preheader.i214 # in Loop: Header=BB13_47 Depth=1 - ld a0, 72(sp) # 8-byte Folded Reload - divw a0, a0, s6 + divw a0, s7, s6 slli a0, a0, 3 neg a1, a0 - sub a2, s2, a0 + sub a2, s3, a0 add a3, ra, a0 srli s11, t0, 29 add s11, t6, s11 addi a4, s8, -1 mv a5, s11 - mv a6, s5 + mv a6, s2 .LBB13_49: # %for.body.i217 # Parent Loop BB13_47 Depth=1 # => This Inner Loop Header: Depth=2 @@ -4481,39 +4493,38 @@ fld fa4, 0(a0) fmul.d fa5, fa5, fa4 fsd fa5, 0(a0) - bltu s6, t4, .LBB13_70 + bltu s6, t3, .LBB13_70 # %bb.51: # %if.then112 # in Loop: Header=BB13_47 Depth=1 mv a0, s6 mv a1, s1 ld a2, 40(sp) # 8-byte Folded Reload ld a3, 48(sp) # 8-byte Folded Reload - ld a4, 64(sp) # 8-byte Folded Reload - sd s8, 56(sp) # 8-byte Folded Spill + ld a4, 56(sp) # 8-byte Folded Reload + mv s3, s2 + mv s2, s7 mv s7, ra - mv s9, s10 - mv s10, s3 - mv s3, s5 - mv s5, s2 - mv s2, t6 + mv s9, s5 + mv s5, t6 + mv s10, s8 mv s8, t0 call cftfsub mv t0, s8 - addi a0, sp, 80 - vl1r.v v14, (a0) # Unknown-size Folded Reload - li t5, 4 - li t4, 5 - li t3, 3 - mv t6, s2 - mv s2, s5 - mv s5, s3 - mv s3, s10 - mv s10, s9 + mv s8, s10 + li t5, 106 + li t4, 4 + li t3, 5 + mv t6, s5 + mv s5, s9 li s9, 2 mv ra, s7 - ld s7, 32(sp) # 8-byte Folded Reload - ld s8, 56(sp) # 8-byte Folded Reload - beq s6, t4, .LBB13_55 + mv s7, s2 + mv s2, s3 + ld s3, 32(sp) # 8-byte Folded Reload + li s10, 3 + addi a0, sp, 80 + vl1r.v v14, (a0) # Unknown-size Folded Reload + beq s6, t3, .LBB13_55 # %bb.52: # %for.body.preheader.i234 # in Loop: Header=BB13_47 Depth=1 ld a0, 24(sp) # 8-byte Folded Reload @@ -4521,14 +4532,15 @@ slli a0, a0, 3 add a1, ra, a0 neg a2, a0 - sub a3, s2, a0 + sub a3, s3, a0 li a4, 2 - mv a5, s7 + mv a5, s5 .LBB13_53: # %for.body.i238 # Parent Loop BB13_47 Depth=1 # => This Inner Loop Header: Depth=2 fld fa5, 0(a3) - fld fa4, %pcrel_lo(.Lpcrel_hi25)(s10) + ld a6, 64(sp) # 8-byte Folded Reload + fld fa4, %pcrel_lo(.Lpcrel_hi25)(a6) fld fa3, -8(a5) fld fa2, -8(s11) fld fa1, 0(a5) @@ -4572,7 +4584,8 @@ fld fa5, 8(s1) fld fa4, 0(s1) fsub.d fa5, fa5, fa4 - subw a0, s3, s4 + ld a0, 72(sp) # 8-byte Folded Reload + subw a0, a0, s4 slli a0, a0, 3 add a0, s0, a0 fsd fa5, 0(a0) @@ -4593,7 +4606,7 @@ sub a2, a0, a2 add a2, s0, a2 li a4, 2 - mv a5, s7 + mv a5, s5 .LBB13_57: # %for.body135 # Parent Loop BB13_47 Depth=1 # => This Inner Loop Header: Depth=2 @@ -4614,7 +4627,7 @@ # %bb.58: # %for.end159 # in Loop: Header=BB13_47 Depth=1 slliw s4, s4, 1 - bltu s6, t5, .LBB13_82 + bltu s6, t4, .LBB13_82 # %bb.59: # %for.body164.preheader # in Loop: Header=BB13_47 Depth=1 li a1, 2 @@ -4628,8 +4641,7 @@ li a1, 1 slli a2, a3, 3 slli a3, a3, 4 - li a4, 106 - bltu s6, a4, .LBB13_67 + bltu s6, t5, .LBB13_67 # %bb.62: # %vector.scevcheck497 # in Loop: Header=BB13_47 Depth=1 addi a4, a0, -2 @@ -4651,31 +4663,31 @@ add a4, s1, a4 slli a5, a0, 3 add a6, s1, a5 - add a7, s5, a2 + add a7, s2, a2 add t0, a6, a2 sub t1, a2, a5 - add t1, s5, t1 + add t1, s2, t1 sub a5, a3, a5 - add a5, s5, a5 + add a5, s2, a5 add t2, s1, a3 - sltu t3, s5, t0 + sltu t3, s2, t0 sltu t4, a7, a6 and t3, t3, t4 - sltu t4, s5, a4 + sltu t4, s2, a4 sltu t5, t1, a6 and t4, t4, t5 - li t5, 4 + li t5, 106 or t3, t3, t4 - sltu t4, s5, t2 + sltu t4, s2, t2 sltu a6, a5, a6 and a6, t4, a6 - li t4, 5 + li t4, 4 sltu a7, a7, a4 sltu t0, t1, t0 and a7, a7, t0 or a6, a6, a7 or a6, t3, a6 - li t3, 3 + li t3, 5 sltu a7, t1, t2 sltu a4, a5, a4 and a4, a7, a4 @@ -4691,7 +4703,7 @@ add a7, a7, a3 vsetivli zero, 4, e64, m2, ta, ma mv t0, a5 - mv t1, s5 + mv t1, s2 .LBB13_65: # %vector.body547 # Parent Loop BB13_47 Depth=1 # => This Inner Loop Header: Depth=2 @@ -4747,11 +4759,11 @@ add a0, s1, a0 fld fa5, 0(a0) fsd fa5, 0(s1) - bltu t3, s6, .LBB13_47 + bltu s10, s6, .LBB13_47 j .LBB13_73 .LBB13_70: # %if.else116 # in Loop: Header=BB13_47 Depth=1 - bne s6, t5, .LBB13_55 + bne s6, t4, .LBB13_55 # %bb.71: # %if.then118 # in Loop: Header=BB13_47 Depth=1 fld fa5, 0(s1) @@ -4847,7 +4859,7 @@ sltu a2, t0, a2 and a2, a3, a2 or a2, a4, a2 - ld s11, 56(sp) # 8-byte Folded Reload + ld s11, 48(sp) # 8-byte Folded Reload bnez a2, .LBB13_38 # %bb.78: # %vector.ph484 srli a4, a1, 3 --- build.head//MultiSource/Benchmarks/DOE-ProxyApps-C++/CLAMR/CMakeFiles/CLAMR.dir/Cmd.s 2023-11-13 08:03:22.499554585 +0000 +++ build//MultiSource/Benchmarks/DOE-ProxyApps-C++/CLAMR/CMakeFiles/CLAMR.dir/Cmd.s 2023-11-13 08:03:17.531698188 +0000 @@ -54,8 +54,8 @@ sd zero, 16(s4) sb zero, 24(s4) addi s1, s4, 48 - addi s9, s4, 64 - sd s9, 48(s4) + addi s10, s4, 64 + sd s10, 48(s4) sd zero, 56(s4) sb zero, 64(s4) addi s2, s4, 96 @@ -117,7 +117,7 @@ vsetivli zero, 2, e64, m1, ta, ma ld a2, 56(s4) addi a0, s4, 384 - addi s10, s4, 392 + addi s9, s4, 392 vse64.v v8, (a0) .Ltmp3: .Lpcrel_hi0: @@ -193,7 +193,7 @@ .LBB0_7: # %lpad2 .Ltmp11: sd a0, 16(sp) # 8-byte Folded Spill - mv a0, s10 + mv a0, s9 call _ZNSt13_Bvector_baseISaIbEED2Ev ld a0, 24(sp) # 8-byte Folded Reload call _ZNSt13_Bvector_baseISaIbEED2Ev @@ -221,7 +221,7 @@ bne a0, s7, .LBB0_18 .LBB0_14: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit33 ld a0, 0(s1) - bne a0, s9, .LBB0_19 + bne a0, s10, .LBB0_19 .LBB0_15: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit39 ld a0, 48(sp) # 8-byte Folded Reload ld a0, 0(a0) @@ -237,7 +237,7 @@ .LBB0_18: # %if.then.i.i29 call _ZdlPv@plt ld a0, 0(s1) - beq a0, s9, .LBB0_15 + beq a0, s10, .LBB0_15 .LBB0_19: # %if.then.i.i35 call _ZdlPv@plt ld a0, 48(sp) # 8-byte Folded Reload --- build.head//MultiSource/Benchmarks/VersaBench/beamformer/CMakeFiles/beamformer.dir/beamformer.s 2023-11-13 08:03:22.839544758 +0000 +++ build//MultiSource/Benchmarks/VersaBench/beamformer/CMakeFiles/beamformer.dir/beamformer.s 2023-11-13 08:03:17.899687550 +0000 @@ -443,6 +443,11 @@ # in Loop: Header=BB1_9 Depth=3 fmv.d fa0, fa5 call sqrt@plt + lui a0, 159 + addiw a0, a0, -1520 + add a7, sp, a0 + li a3, 12 + lui a2, 2 csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 @@ -450,11 +455,6 @@ addiw a1, a1, -624 add a0, a0, a1 vl1r.v v12, (a0) # Unknown-size Folded Reload - lui a0, 159 - addiw a0, a0, -1520 - add a7, sp, a0 - li a3, 12 - lui a2, 2 j .LBB1_11 .LBB1_13: # %for.body18.preheader # in Loop: Header=BB1_4 Depth=1 @@ -487,6 +487,9 @@ # in Loop: Header=BB1_14 Depth=2 fmv.d fa0, fa5 call sqrt@plt + lui a0, 159 + addiw a0, a0, -1520 + add a7, sp, a0 csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 @@ -494,9 +497,6 @@ addiw a1, a1, -624 add a0, a0, a1 vl1r.v v12, (a0) # Unknown-size Folded Reload - lui a0, 159 - addiw a0, a0, -1520 - add a7, sp, a0 j .LBB1_15 .LBB1_17: # %for.body.us.i.1.preheader # in Loop: Header=BB1_4 Depth=1 @@ -527,6 +527,9 @@ # in Loop: Header=BB1_18 Depth=2 fmv.d fa0, fa5 call sqrt@plt + lui a0, 159 + addiw a0, a0, -1520 + add a7, sp, a0 csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 @@ -534,9 +537,6 @@ addiw a1, a1, -624 add a0, a0, a1 vl1r.v v12, (a0) # Unknown-size Folded Reload - lui a0, 159 - addiw a0, a0, -1520 - add a7, sp, a0 vsetivli zero, 2, e32, mf2, ta, ma j .LBB1_19 .LBB1_21: # %for.body.us.i.2.preheader @@ -568,6 +568,9 @@ # in Loop: Header=BB1_22 Depth=2 fmv.d fa0, fa5 call sqrt@plt + lui a0, 159 + addiw a0, a0, -1520 + add a7, sp, a0 csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 @@ -575,9 +578,6 @@ addiw a1, a1, -624 add a0, a0, a1 vl1r.v v12, (a0) # Unknown-size Folded Reload - lui a0, 159 - addiw a0, a0, -1520 - add a7, sp, a0 vsetivli zero, 2, e32, mf2, ta, ma j .LBB1_23 .LBB1_25: # %for.body.us.i.3.preheader @@ -609,6 +609,9 @@ # in Loop: Header=BB1_26 Depth=2 fmv.d fa0, fa5 call sqrt@plt + lui a0, 159 + addiw a0, a0, -1520 + add a7, sp, a0 csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 @@ -616,9 +619,6 @@ addiw a1, a1, -624 add a0, a0, a1 vl1r.v v12, (a0) # Unknown-size Folded Reload - lui a0, 159 - addiw a0, a0, -1520 - add a7, sp, a0 vsetivli zero, 2, e32, mf2, ta, ma j .LBB1_27 .LBB1_29: # %for.body.us.i.4.preheader @@ -650,6 +650,9 @@ # in Loop: Header=BB1_30 Depth=2 fmv.d fa0, fa5 call sqrt@plt + lui a0, 159 + addiw a0, a0, -1520 + add a7, sp, a0 csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 @@ -657,9 +660,6 @@ addiw a1, a1, -624 add a0, a0, a1 vl1r.v v12, (a0) # Unknown-size Folded Reload - lui a0, 159 - addiw a0, a0, -1520 - add a7, sp, a0 vsetivli zero, 2, e32, mf2, ta, ma j .LBB1_31 .LBB1_33: # %for.body.us.i.5.preheader @@ -691,6 +691,9 @@ # in Loop: Header=BB1_34 Depth=2 fmv.d fa0, fa5 call sqrt@plt + lui a0, 159 + addiw a0, a0, -1520 + add a7, sp, a0 csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 @@ -698,9 +701,6 @@ addiw a1, a1, -624 add a0, a0, a1 vl1r.v v12, (a0) # Unknown-size Folded Reload - lui a0, 159 - addiw a0, a0, -1520 - add a7, sp, a0 vsetivli zero, 2, e32, mf2, ta, ma j .LBB1_35 .LBB1_37: # %for.body.us.i.6.preheader @@ -732,6 +732,9 @@ # in Loop: Header=BB1_38 Depth=2 fmv.d fa0, fa5 call sqrt@plt + lui a0, 159 + addiw a0, a0, -1520 + add a7, sp, a0 csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 @@ -739,9 +742,6 @@ addiw a1, a1, -624 add a0, a0, a1 vl1r.v v12, (a0) # Unknown-size Folded Reload - lui a0, 159 - addiw a0, a0, -1520 - add a7, sp, a0 vsetivli zero, 2, e32, mf2, ta, ma j .LBB1_39 .LBB1_41: # %for.body.us.i.7.preheader @@ -773,6 +773,9 @@ # in Loop: Header=BB1_42 Depth=2 fmv.d fa0, fa5 call sqrt@plt + lui a0, 159 + addiw a0, a0, -1520 + add a7, sp, a0 csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 @@ -780,9 +783,6 @@ addiw a1, a1, -624 add a0, a0, a1 vl1r.v v12, (a0) # Unknown-size Folded Reload - lui a0, 159 - addiw a0, a0, -1520 - add a7, sp, a0 vsetivli zero, 2, e32, mf2, ta, ma j .LBB1_43 .LBB1_45: # %for.body.us.i.8.preheader @@ -814,6 +814,9 @@ # in Loop: Header=BB1_46 Depth=2 fmv.d fa0, fa5 call sqrt@plt + lui a0, 159 + addiw a0, a0, -1520 + add a7, sp, a0 csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 @@ -821,9 +824,6 @@ addiw a1, a1, -624 add a0, a0, a1 vl1r.v v12, (a0) # Unknown-size Folded Reload - lui a0, 159 - addiw a0, a0, -1520 - add a7, sp, a0 vsetivli zero, 2, e32, mf2, ta, ma j .LBB1_47 .LBB1_49: # %for.body.us.i.9.preheader @@ -855,6 +855,9 @@ # in Loop: Header=BB1_50 Depth=2 fmv.d fa0, fa5 call sqrt@plt + lui a0, 159 + addiw a0, a0, -1520 + add a7, sp, a0 csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 @@ -862,9 +865,6 @@ addiw a1, a1, -624 add a0, a0, a1 vl1r.v v12, (a0) # Unknown-size Folded Reload - lui a0, 159 - addiw a0, a0, -1520 - add a7, sp, a0 vsetivli zero, 2, e32, mf2, ta, ma j .LBB1_51 .LBB1_53: # %for.body.us.i.10.preheader @@ -896,6 +896,9 @@ # in Loop: Header=BB1_54 Depth=2 fmv.d fa0, fa5 call sqrt@plt + lui a0, 159 + addiw a0, a0, -1520 + add a7, sp, a0 csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 @@ -903,9 +906,6 @@ addiw a1, a1, -624 add a0, a0, a1 vl1r.v v12, (a0) # Unknown-size Folded Reload - lui a0, 159 - addiw a0, a0, -1520 - add a7, sp, a0 vsetivli zero, 2, e32, mf2, ta, ma j .LBB1_55 .LBB1_57: # %for.body.us.i.11.preheader @@ -937,6 +937,9 @@ # in Loop: Header=BB1_58 Depth=2 fmv.d fa0, fa5 call sqrt@plt + lui a0, 159 + addiw a0, a0, -1520 + add a7, sp, a0 csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 @@ -944,9 +947,6 @@ addiw a1, a1, -624 add a0, a0, a1 vl1r.v v12, (a0) # Unknown-size Folded Reload - lui a0, 159 - addiw a0, a0, -1520 - add a7, sp, a0 vsetivli zero, 2, e32, mf2, ta, ma j .LBB1_59 .LBB1_61: # %for.cond24.preheader @@ -986,6 +986,9 @@ li a1, 0 mv a2, s1 call memset@plt + lui a0, 159 + addiw a0, a0, -1520 + add a7, sp, a0 csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 @@ -993,9 +996,6 @@ addiw a1, a1, -624 add a0, a0, a1 vl1r.v v12, (a0) # Unknown-size Folded Reload - lui a0, 159 - addiw a0, a0, -1520 - add a7, sp, a0 li a2, 0 li a0, 0 addi s3, s3, 1 @@ -1116,6 +1116,9 @@ li a1, 0 ld a2, 136(sp) # 8-byte Folded Reload call memset@plt + lui a0, 159 + addiw a0, a0, -1520 + add a7, sp, a0 csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 @@ -1123,9 +1126,6 @@ addiw a1, a1, -624 add a0, a0, a1 vl1r.v v12, (a0) # Unknown-size Folded Reload - lui a0, 159 - addiw a0, a0, -1520 - add a7, sp, a0 li a3, 0 li a1, 0 addi s5, s5, 1 @@ -2922,16 +2922,16 @@ j .LBB2_62 .LBB2_64: # %for.cond26.preheader # in Loop: Header=BB2_7 Depth=2 - slli s3, a2, 5 + slli s10, a2, 5 lui a0, 209 addiw a0, a0, -744 add s11, sp, a0 - add s11, s11, s3 - lw s10, 0(s11) + add s11, s11, s10 + lw s3, 0(s11) ld s0, 24(s11) lw a0, 8(s11) lw a2, 4(s11) - slliw s8, s10, 1 + slliw s8, s3, 1 mv s1, s8 bgtz s8, .LBB2_66 # %bb.65: # %for.cond26.preheader @@ -2940,7 +2940,7 @@ .LBB2_66: # %for.cond26.preheader # in Loop: Header=BB2_7 Depth=2 li s5, 0 - addi s6, s10, -1 + addi s6, s3, -1 addiw s9, s8, -1 addi a1, s11, 8 sd a1, 384(sp) # 8-byte Folded Spill @@ -2978,7 +2978,7 @@ add a4, s0, a4 fsw fa5, 0(a4) fsw fa4, 4(a4) - blez s10, .LBB2_71 + blez s3, .LBB2_71 # %bb.69: # %for.body.lr.ph.i # in Loop: Header=BB2_68 Depth=3 ld a5, 0(s11) @@ -3023,7 +3023,7 @@ addiw a3, a3, -1256 add a3, sp, a3 add a3, a3, a1 - slti a4, s10, 1 + slti a4, s3, 1 addiw a2, a2, 1 addi a1, a2, -1024 snez a1, a1 @@ -3044,14 +3044,14 @@ lui a1, 209 addiw a1, a1, -1128 add s11, sp, a1 - add s11, s11, s3 - lw s3, 0(s11) + add s11, s11, s10 + lw s10, 0(s11) ld s0, 24(s11) lw a1, 8(s11) lw a3, 4(s11) ld a4, 384(sp) # 8-byte Folded Reload sw a0, 0(a4) - slliw s9, s3, 1 + slliw s9, s10, 1 ld a0, 392(sp) # 8-byte Folded Reload sw a2, 0(a0) mv s1, s9 @@ -3069,8 +3069,8 @@ addiw a0, a0, -1256 add a0, sp, a0 add s5, a0, s5 - addi s6, s3, -1 - addiw s10, s9, -1 + addi s6, s10, -1 + addiw s3, s9, -1 addi a0, s11, 8 sd a0, 392(sp) # 8-byte Folded Spill addi a0, s11, 4 @@ -3107,7 +3107,7 @@ add a2, s0, a2 fsw fa5, 0(a2) fsw fa4, 4(a2) - blez s3, .LBB2_81 + blez s10, .LBB2_81 # %bb.79: # %for.body.lr.ph.i113 # in Loop: Header=BB2_78 Depth=3 ld a4, 0(s11) @@ -3131,7 +3131,7 @@ vfmacc.vf v11, fa4, v9 vfadd.vv v8, v8, v11 addiw a0, a0, 2 - and a0, a0, s10 + and a0, a0, s3 addi a2, a2, 2 addi a4, a4, 8 blt a2, s9, .LBB2_80 @@ -3150,7 +3150,7 @@ # in Loop: Header=BB2_78 Depth=3 slli a0, s8, 3 add a2, s5, a0 - slti a4, s3, 1 + slti a4, s10, 1 addiw a3, a3, 2 addi a0, a3, -1024 snez a0, a0 @@ -3509,28 +3509,28 @@ flw ft5, 4(a0) flw fa5, 0(a0) fsw fa5, 348(sp) # 4-byte Folded Spill - flw ft2, 12(a0) - fneg.s fa6, ft5 + flw fa0, 12(a0) + fneg.s ft2, ft5 flw fa5, 8(a0) fsw fa5, 344(sp) # 4-byte Folded Spill - flw ft6, 20(a0) - fneg.s fa7, ft2 + flw fa6, 20(a0) + fneg.s fa7, fa0 flw fa5, 16(a0) fsw fa5, 340(sp) # 4-byte Folded Spill flw ft9, 28(a0) - fneg.s ft10, ft6 + fneg.s ft10, fa6 flw ft7, 24(a0) flw fa5, 36(a0) - fneg.s fa3, ft9 + fneg.s ft3, ft9 flw ft8, 32(a0) flw fs1, 44(a0) - fneg.s ft3, fa5 + fneg.s fs2, fa5 flw ft11, 40(a0) - flw fs2, 52(a0) + flw fa3, 52(a0) fneg.s ft0, fs1 flw fs4, 48(a0) flw fs3, 60(a0) - fneg.s fa2, fs2 + fneg.s fa2, fa3 flw fa4, 68(a0) flw fs6, 56(a0) fneg.s fs5, fs3 @@ -3538,10 +3538,10 @@ fneg.s fs9, fa4 flw fs10, 72(a0) flw fs7, 76(a0) - flw fa0, 80(a0) + flw fs11, 80(a0) flw fa1, 84(a0) flw ft1, 92(a0) - flw fs11, 88(a0) + flw ft6, 88(a0) fneg.s ft4, fs7 fsw ft4, 328(sp) # 4-byte Folded Spill fsw fa1, 336(sp) # 4-byte Folded Spill @@ -3552,16 +3552,16 @@ fsw fa1, 320(sp) # 4-byte Folded Spill ld a0, 288(sp) # 8-byte Folded Reload li a1, 128 - fsw ft3, 400(sp) # 4-byte Folded Spill + fsw fs5, 400(sp) # 4-byte Folded Spill fsw fs2, 392(sp) # 4-byte Folded Spill - fsw fs5, 384(sp) # 4-byte Folded Spill - fsw fs7, 380(sp) # 4-byte Folded Spill - fsw fa3, 376(sp) # 4-byte Folded Spill - fsw fa5, 372(sp) # 4-byte Folded Spill - fsw fs9, 368(sp) # 4-byte Folded Spill + fsw fs7, 384(sp) # 4-byte Folded Spill + fsw fa3, 380(sp) # 4-byte Folded Spill + fsw fs9, 376(sp) # 4-byte Folded Spill + fsw ft3, 372(sp) # 4-byte Folded Spill + fsw fa5, 368(sp) # 4-byte Folded Spill fsw fs1, 364(sp) # 4-byte Folded Spill - fsw fa2, 360(sp) # 4-byte Folded Spill - fsw ft0, 356(sp) # 4-byte Folded Spill + fsw ft0, 360(sp) # 4-byte Folded Spill + fsw fa2, 356(sp) # 4-byte Folded Spill fsw fa4, 352(sp) # 4-byte Folded Spill bgeu a1, a0, .LBB2_111 # %bb.110: # in Loop: Header=BB2_109 Depth=2 @@ -3569,8 +3569,8 @@ lui a1, 4 addiw a1, a1, -1636 add t0, sp, a1 - fmv.s fs2, ft2 - fmv.s fs5, ft6 + fmv.s fs2, fa0 + fmv.s fs5, fa6 fmv.s fs7, fa7 fmv.s fs1, ft9 flw fa1, 348(sp) # 4-byte Folded Reload @@ -3578,10 +3578,10 @@ flw ft4, 340(sp) # 4-byte Folded Reload fmv.s fa2, fs3 fmv.s fs3, ft10 - fmv.s ft3, fa0 - flw ft0, 336(sp) # 4-byte Folded Reload - flw fs9, 332(sp) # 4-byte Folded Reload - flw fa3, 328(sp) # 4-byte Folded Reload + fmv.s ft0, ft6 + flw fs9, 336(sp) # 4-byte Folded Reload + flw fa3, 332(sp) # 4-byte Folded Reload + flw ft3, 328(sp) # 4-byte Folded Reload flw fa5, 324(sp) # 4-byte Folded Reload flw fa4, 320(sp) # 4-byte Folded Reload j .LBB2_114 @@ -3683,10 +3683,10 @@ vs2r.v v12, (a0) # Unknown-size Folded Spill fsw fs10, 228(sp) # 4-byte Folded Spill vfmv.v.f v30, fs10 - fsw fa0, 224(sp) # 4-byte Folded Spill - vfmv.v.f v0, fa0 - fsw fs11, 220(sp) # 4-byte Folded Spill - vfmv.v.f v2, fs11 + fsw fs11, 224(sp) # 4-byte Folded Spill + vfmv.v.f v0, fs11 + fsw ft6, 220(sp) # 4-byte Folded Spill + vfmv.v.f v2, ft6 lui a0, 5 addiw a0, a0, -1640 add a1, sp, a0 @@ -3704,8 +3704,8 @@ li s10, 52 li s11, 56 li ra, 60 - li s3, 64 - li a0, 68 + li a0, 64 + li s3, 68 li t5, 48 li t6, 72 li s0, 76 @@ -3733,7 +3733,7 @@ vlse32.v v16, (a1), t2 vsetvli zero, zero, e32, m2, ta, ma vluxei64.v v18, (s1), v12 - vfmul.vf v20, v18, fa6 + vfmul.vf v20, v18, ft2 csrr a2, vlenb li s5, 20 mul a2, a2, s5 @@ -3743,14 +3743,14 @@ add a2, a2, s5 vl2r.v v26, (a2) # Unknown-size Folded Reload vfmacc.vv v20, v26, v16 - fmv.w.x fa0, zero - vfadd.vf v20, v20, fa0 + fmv.w.x ft6, zero + vfadd.vf v20, v20, ft6 vfmul.vf v16, v16, ft5 li s5, 12 vluxei64.v v22, (s5), v12 vluxei64.v v24, (s2), v12 vfmacc.vv v16, v26, v18 - vfadd.vf v16, v16, fa0 + vfadd.vf v16, v16, ft6 vfmul.vf v18, v22, fa7 csrr a2, vlenb li s5, 18 @@ -3762,7 +3762,7 @@ vl2r.v v28, (a2) # Unknown-size Folded Reload vfmacc.vv v18, v28, v24 vfadd.vv v18, v20, v18 - vfmul.vf v20, v24, ft2 + vfmul.vf v20, v24, fa0 li s5, 20 vluxei64.v v24, (s5), v12 li s5, 16 @@ -3779,14 +3779,14 @@ vl2r.v v28, (a2) # Unknown-size Folded Reload vfmacc.vv v20, v28, v26 vfadd.vv v18, v18, v20 - vfmul.vf v20, v26, ft6 + vfmul.vf v20, v26, fa6 li s5, 28 vluxei64.v v22, (s5), v12 li s5, 24 vluxei64.v v26, (s5), v12 vfmacc.vv v20, v28, v24 vfadd.vv v16, v16, v20 - vfmul.vf v20, v22, fa3 + vfmul.vf v20, v22, ft3 csrr a2, vlenb li s5, 14 mul a2, a2, s5 @@ -3803,7 +3803,7 @@ vluxei64.v v26, (s5), v12 vfmacc.vv v20, v28, v22 vfadd.vv v16, v16, v20 - vfmul.vf v20, v24, ft3 + vfmul.vf v20, v24, fs2 csrr a2, vlenb li s5, 12 mul a2, a2, s5 @@ -3845,7 +3845,7 @@ vl2r.v v28, (a2) # Unknown-size Folded Reload vfmacc.vv v20, v28, v26 vfadd.vv v18, v18, v20 - vfmul.vf v20, v26, fs2 + vfmul.vf v20, v26, fa3 vluxei64.v v22, (ra), v12 vluxei64.v v26, (s11), v12 vfmacc.vv v20, v28, v24 @@ -3862,8 +3862,8 @@ vfmacc.vv v20, v28, v26 vfadd.vv v18, v18, v20 vfmul.vf v20, v26, fs3 - vluxei64.v v24, (a0), v12 - vluxei64.v v26, (s3), v12 + vluxei64.v v24, (s3), v12 + vluxei64.v v26, (a0), v12 vfmacc.vv v20, v28, v22 vfadd.vv v16, v16, v20 vfmul.vf v20, v24, fs9 @@ -3915,17 +3915,17 @@ # %bb.113: # %middle.block307 # in Loop: Header=BB2_109 Depth=2 ld s3, 256(sp) # 8-byte Folded Reload - fmv.s fs2, ft2 - fmv.s fs5, ft6 + fmv.s fs2, fa0 + fmv.s fs5, fa6 fmv.s fs7, fa7 fmv.s fs1, ft9 fmv.s fa2, fs3 fmv.s fs3, ft10 - fmv.s ft0, fa1 + fmv.s fs9, fa1 flw fa1, 348(sp) # 4-byte Folded Reload - fmv.s fs9, ft1 + fmv.s fa3, ft1 flw ft1, 344(sp) # 4-byte Folded Reload - fmv.s fa3, ft4 + fmv.s ft3, ft4 flw ft4, 340(sp) # 4-byte Folded Reload fmv.s fa5, ft7 flw ft7, 252(sp) # 4-byte Folded Reload @@ -3936,8 +3936,8 @@ flw fs6, 236(sp) # 4-byte Folded Reload flw fs8, 232(sp) # 4-byte Folded Reload flw fs10, 228(sp) # 4-byte Folded Reload - flw ft3, 224(sp) # 4-byte Folded Reload - flw fs11, 220(sp) # 4-byte Folded Reload + flw fs11, 224(sp) # 4-byte Folded Reload + flw ft0, 220(sp) # 4-byte Folded Reload ld a0, 208(sp) # 8-byte Folded Reload bnez a0, .LBB2_116 .LBB2_114: # %for.body105.preheader @@ -3954,18 +3954,18 @@ # Parent Loop BB2_3 Depth=1 # Parent Loop BB2_109 Depth=2 # => This Inner Loop Header: Depth=3 - flw fa0, -44(a0) - flw ft6, -48(a0) - fmul.s ft2, fa0, fa6 - fmadd.s ft2, fa1, ft6, ft2 + flw ft6, -44(a0) + flw fa0, -48(a0) + fmv.s ft9, ft2 + fmul.s ft2, ft6, ft2 + fmadd.s ft2, fa1, fa0, ft2 fmv.w.x fa7, zero fadd.s ft2, ft2, fa7 - fmul.s ft6, ft6, ft5 - fmv.s ft9, fa6 + fmul.s fa0, fa0, ft5 fmv.s fa6, ft5 flw ft5, -36(a0) flw ft10, -40(a0) - fmadd.s fa0, fa1, fa0, ft6 + fmadd.s fa0, fa1, ft6, fa0 fadd.s fa0, fa0, fa7 fmul.s ft6, ft5, fs7 fmadd.s ft6, ft1, ft10, ft6 @@ -3983,7 +3983,7 @@ flw ft10, -24(a0) fmadd.s ft5, ft4, fa7, ft5 fadd.s fa0, fa0, ft5 - flw ft5, 376(sp) # 4-byte Folded Reload + flw ft5, 372(sp) # 4-byte Folded Reload fmul.s ft5, ft6, ft5 fmadd.s ft5, ft7, ft10, ft5 fadd.s ft2, ft2, ft5 @@ -3992,17 +3992,17 @@ flw ft10, -16(a0) fmadd.s ft5, ft7, ft6, ft5 fadd.s fa0, fa0, ft5 - flw ft5, 400(sp) # 4-byte Folded Reload + flw ft5, 392(sp) # 4-byte Folded Reload fmul.s ft5, fa7, ft5 fmadd.s ft5, ft8, ft10, ft5 fadd.s ft2, ft2, ft5 - flw ft5, 372(sp) # 4-byte Folded Reload + flw ft5, 368(sp) # 4-byte Folded Reload fmul.s ft5, ft10, ft5 flw ft6, -4(a0) flw ft10, -8(a0) fmadd.s ft5, ft8, fa7, ft5 fadd.s fa0, fa0, ft5 - flw ft5, 356(sp) # 4-byte Folded Reload + flw ft5, 360(sp) # 4-byte Folded Reload fmul.s ft5, ft6, ft5 fmadd.s ft5, ft11, ft10, ft5 fadd.s ft2, ft2, ft5 @@ -4012,17 +4012,17 @@ flw ft10, 0(a0) fmadd.s ft5, ft11, ft6, ft5 fadd.s fa0, fa0, ft5 - flw ft5, 360(sp) # 4-byte Folded Reload + flw ft5, 356(sp) # 4-byte Folded Reload fmul.s ft5, fa7, ft5 fmadd.s ft5, fs4, ft10, ft5 fadd.s ft2, ft2, ft5 - flw ft5, 392(sp) # 4-byte Folded Reload + flw ft5, 380(sp) # 4-byte Folded Reload fmul.s ft5, ft10, ft5 flw ft6, 12(a0) flw ft10, 8(a0) fmadd.s ft5, fs4, fa7, ft5 fadd.s fa0, fa0, ft5 - flw ft5, 384(sp) # 4-byte Folded Reload + flw ft5, 400(sp) # 4-byte Folded Reload fmul.s ft5, ft6, ft5 fmadd.s ft5, fs6, ft10, ft5 fadd.s ft2, ft2, ft5 @@ -4031,7 +4031,7 @@ flw ft10, 16(a0) fmadd.s ft5, fs6, ft6, ft5 fadd.s fa0, fa0, ft5 - flw ft5, 368(sp) # 4-byte Folded Reload + flw ft5, 376(sp) # 4-byte Folded Reload fmul.s ft5, fa7, ft5 fmadd.s ft5, fs8, ft10, ft5 fadd.s ft2, ft2, ft5 @@ -4041,32 +4041,32 @@ flw ft10, 24(a0) fmadd.s ft5, fs8, fa7, ft5 fadd.s fa0, fa0, ft5 - fmul.s ft5, ft6, fa3 + fmul.s ft5, ft6, ft3 fmadd.s ft5, fs10, ft10, ft5 fadd.s ft2, ft2, ft5 - flw ft5, 380(sp) # 4-byte Folded Reload + flw ft5, 384(sp) # 4-byte Folded Reload fmul.s ft5, ft10, ft5 flw fa7, 36(a0) flw ft10, 32(a0) fmadd.s ft5, fs10, ft6, ft5 fadd.s fa0, fa0, ft5 fmul.s ft5, fa7, fa5 - fmadd.s ft5, ft3, ft10, ft5 + fmadd.s ft5, fs11, ft10, ft5 fadd.s ft2, ft2, ft5 - fmul.s ft5, ft10, ft0 + fmul.s ft5, ft10, fs9 flw ft6, 44(a0) flw ft10, 40(a0) - fmadd.s ft5, ft3, fa7, ft5 + fmadd.s ft5, fs11, fa7, ft5 fadd.s fa0, fa0, ft5 fmul.s ft5, ft6, fa4 - fmadd.s ft5, fs11, ft10, ft5 + fmadd.s ft5, ft0, ft10, ft5 fadd.s ft2, ft2, ft5 - fmul.s ft5, ft10, fs9 - fmadd.s ft5, fs11, ft6, ft5 + fmul.s ft5, ft10, fa3 + fmadd.s ft5, ft0, ft6, ft5 fadd.s fa0, fa0, ft5 fmv.s ft5, fa6 - fmv.s fa6, ft9 fsw ft2, -4(a2) + fmv.s ft2, ft9 fsw fa0, 0(a2) addi a1, a1, 1 addi a2, a2, 8 --- build.head//MultiSource/Benchmarks/MiBench/consumer-lame/CMakeFiles/consumer-lame.dir/psymodel.s 2023-11-13 08:03:22.631550770 +0000 +++ build//MultiSource/Benchmarks/MiBench/consumer-lame/CMakeFiles/consumer-lame.dir/psymodel.s 2023-11-13 08:03:17.663694372 +0000 @@ -1084,14 +1084,14 @@ sd a1, 96(sp) # 8-byte Folded Spill andi a0, a1, 64 sd a0, 88(sp) # 8-byte Folded Spill - ld s5, 312(sp) # 8-byte Folded Reload - sd a3, 224(sp) # 8-byte Folded Spill csrr a0, vlenb slli a1, a0, 3 add a0, a1, a0 add a0, sp, a0 addi a0, a0, 1088 vs1r.v v18, (a0) # Unknown-size Folded Spill + ld s5, 312(sp) # 8-byte Folded Reload + sd a3, 224(sp) # 8-byte Folded Spill j .LBB0_104 .LBB0_103: # %for.inc1281 # in Loop: Header=BB0_104 Depth=1 --- build.head//MultiSource/Benchmarks/DOE-ProxyApps-C++/miniFE/CMakeFiles/miniFE.dir/main.s 2023-11-13 08:03:22.535553545 +0000 +++ build//MultiSource/Benchmarks/DOE-ProxyApps-C++/miniFE/CMakeFiles/miniFE.dir/main.s 2023-11-13 08:03:17.567697148 +0000 @@ -8020,13 +8020,13 @@ add a0, sp, a0 addi a0, a0, 656 vs1r.v v8, (a0) # Unknown-size Folded Spill + csrr a0, vlenb + slli a2, a0, 1 + add a0, a2, a0 + add a0, sp, a0 + addi a0, a0, 656 + vs2r.v v10, (a0) # Unknown-size Folded Spill ld a0, 88(sp) # 8-byte Folded Reload - csrr a2, vlenb - slli a6, a2, 1 - add a2, a6, a2 - add a2, sp, a2 - addi a2, a2, 656 - vs2r.v v10, (a2) # Unknown-size Folded Spill vmul.vx v8, v10, a0 csrr a0, vlenb li a2, 25 --- build.head//MultiSource/Benchmarks/ASCI_Purple/SMG2000/CMakeFiles/smg2000.dir/cyclic_reduction.s 2023-11-13 08:03:22.411557129 +0000 +++ build//MultiSource/Benchmarks/ASCI_Purple/SMG2000/CMakeFiles/smg2000.dir/cyclic_reduction.s 2023-11-13 08:03:17.451700501 +0000 @@ -1215,9 +1215,9 @@ # in Loop: Header=BB2_55 Depth=1 lw a2, 300(sp) mv a4, a2 - ld s5, 72(sp) # 8-byte Folded Reload addi a5, sp, 336 vl2r.v v14, (a5) # Unknown-size Folded Reload + ld s5, 72(sp) # 8-byte Folded Reload blt a3, a2, .LBB2_61 # %bb.60: # %if.else1117 # in Loop: Header=BB2_55 Depth=1 --- build.head//MultiSource/Benchmarks/ASCI_Purple/SMG2000/CMakeFiles/smg2000.dir/smg2_setup_rap.s 2023-11-13 08:03:22.415557013 +0000 +++ build//MultiSource/Benchmarks/ASCI_Purple/SMG2000/CMakeFiles/smg2000.dir/smg2_setup_rap.s 2023-11-13 08:03:17.455700385 +0000 @@ -204,12 +204,12 @@ # kill: killed $x10 # implicit-def: $x10 # kill: killed $x10 + addi a0, sp, 1120 + vs2r.v v28, (a0) # Unknown-size Folded Spill sd s1, 40(sp) # 8-byte Folded Spill sd a7, 32(sp) # 8-byte Folded Spill sd a6, 184(sp) # 8-byte Folded Spill sd t0, 176(sp) # 8-byte Folded Spill - addi a0, sp, 1120 - vs2r.v v28, (a0) # Unknown-size Folded Spill j .LBB1_3 .LBB1_2: # %for.inc1649 # in Loop: Header=BB1_3 Depth=1 @@ -2425,11 +2425,11 @@ # kill: killed $x10 # implicit-def: $x10 # kill: killed $x10 + addi a0, sp, 1072 + vs2r.v v30, (a0) # Unknown-size Folded Spill sd a7, 40(sp) # 8-byte Folded Spill sd a1, 328(sp) # 8-byte Folded Spill sd t0, 344(sp) # 8-byte Folded Spill - addi a0, sp, 1072 - vs2r.v v30, (a0) # Unknown-size Folded Spill j .LBB2_3 .LBB2_2: # %for.inc1559 # in Loop: Header=BB2_3 Depth=1 @@ -2654,7 +2654,7 @@ lw a3, -12(s5) lw a6, 4(s4) lw a1, -8(s5) - lw a2, 8(s4) + lw a7, 8(s4) lw t2, -4(s5) lw ra, 4(s5) lw a0, 0(s5) @@ -2663,17 +2663,17 @@ lw s10, -4(s1) lw s11, 4(s1) lw a5, 0(s1) - lw a7, 1040(sp) - sd a7, 992(sp) # 8-byte Folded Spill + lw a2, 1040(sp) + sd a2, 992(sp) # 8-byte Folded Spill lw t6, -12(s6) lw s1, 1044(sp) lw s4, -8(s6) lw s5, 1048(sp) lw t4, -4(s6) lw t5, 4(s6) - lw a7, 0(s6) - sd a7, 976(sp) # 8-byte Folded Spill - lw a7, 0(s2) + lw a2, 0(s6) + sd a2, 976(sp) # 8-byte Folded Spill + lw a2, 0(s2) lw t1, 4(s2) lw t0, 8(s2) sd t0, 984(sp) # 8-byte Folded Spill @@ -2727,7 +2727,7 @@ addi t0, t0, -1 and s0, t0, s0 subw a1, a6, a1 - subw t0, a2, t2 + subw t0, a7, t2 mul t0, s0, t0 add t0, a1, t0 subw a0, a0, a3 @@ -2744,7 +2744,7 @@ addi a0, a0, -1 and a3, a0, a3 subw a0, a6, s9 - subw t0, a2, s10 + subw t0, a7, s10 mul t0, a3, t0 add a0, a0, t0 subw a5, a5, t3 @@ -2775,25 +2775,25 @@ mul a0, a0, t4 addw s5, t0, a0 ld a0, 984(sp) # 8-byte Folded Reload - subw a0, a2, a0 - subw a2, a6, t1 - ld a6, 1000(sp) # 8-byte Folded Reload + subw a0, a7, a0 subw a6, a6, t1 - addi t0, a6, 1 - slti a6, a6, 0 - addi a6, a6, -1 - and t1, a6, t0 + ld a7, 1000(sp) # 8-byte Folded Reload + subw a7, a7, t1 + addi t0, a7, 1 + slti a7, a7, 0 + addi a7, a7, -1 + and t1, a7, t0 mul a0, t1, a0 - add a0, a2, a0 - subw a2, a4, a7 - ld a4, 1016(sp) # 8-byte Folded Reload - subw a4, a4, a7 - addi a6, a4, 1 - slti a4, a4, 0 - addi a4, a4, -1 - and t2, a4, a6 + add a0, a6, a0 + subw a4, a4, a2 + ld a6, 1016(sp) # 8-byte Folded Reload + subw a2, a6, a2 + addi a6, a2, 1 + slti a2, a2, 0 + addi a2, a2, -1 + and t2, a2, a6 mul a0, a0, t2 - addw s6, a2, a0 + addw s6, a4, a0 ld a0, 96(sp) # 8-byte Folded Reload li a2, 5 bne a0, a2, .LBB2_58 @@ -5136,10 +5136,10 @@ sd a0, 40(sp) # 8-byte Folded Spill vsetvli a0, zero, e64, m2, ta, ma vmv.v.i v14, 0 - sd s4, 24(sp) # 8-byte Folded Spill - sd s0, 64(sp) # 8-byte Folded Spill addi a0, sp, 128 vs2r.v v14, (a0) # Unknown-size Folded Spill + sd s4, 24(sp) # 8-byte Folded Spill + sd s0, 64(sp) # 8-byte Folded Spill j .LBB3_4 .LBB3_3: # %for.end511 # in Loop: Header=BB3_4 Depth=1 @@ -5620,9 +5620,9 @@ slli s10, s10, 1 vsetvli a0, zero, e64, m2, ta, ma vmv.v.i v14, 0 - sd a1, 24(sp) # 8-byte Folded Spill addi a0, sp, 144 vs2r.v v14, (a0) # Unknown-size Folded Spill + sd a1, 24(sp) # 8-byte Folded Spill j .LBB4_4 .LBB4_3: # %for.end281 # in Loop: Header=BB4_4 Depth=1 --- build.head//MultiSource/Benchmarks/MallocBench/gs/CMakeFiles/gs.dir/gxstroke.s 2023-11-13 08:03:22.587552041 +0000 +++ build//MultiSource/Benchmarks/MallocBench/gs/CMakeFiles/gs.dir/gxstroke.s 2023-11-13 08:03:17.619695644 +0000 @@ -295,9 +295,9 @@ .LBB1_26: # %if.else316.thread # in Loop: Header=BB1_22 Depth=2 vsetivli zero, 2, e64, m1, ta, ma + addi a0, sp, 768 + vl1r.v v8, (a0) # Unknown-size Folded Reload addi a0, sp, 576 - addi a1, sp, 768 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) addi a0, a0, 16 vse64.v v8, (a0) --- build.head//MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/CMakeFiles/timberwolfmc.dir/mshortest.s 2023-11-13 08:03:22.703548689 +0000 +++ build//MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/CMakeFiles/timberwolfmc.dir/mshortest.s 2023-11-13 08:03:17.743692060 +0000 @@ -1753,9 +1753,9 @@ # in Loop: Header=BB0_61 Depth=2 slli a1, s5, 32 srli a1, a1, 32 + addi a2, sp, 480 + vl2r.v v14, (a2) # Unknown-size Folded Reload li a2, 49 - addi a3, sp, 480 - vl2r.v v14, (a3) # Unknown-size Folded Reload bltu s3, a2, .LBB0_170 # %bb.169: # %vector.memcheck617 # in Loop: Header=BB0_61 Depth=2 --- build.head//MicroBenchmarks/libs/benchmark/test/CMakeFiles/user_counters_tabular_test.dir/user_counters_tabular_test.s 2023-11-13 08:03:22.155564529 +0000 +++ build//MicroBenchmarks/libs/benchmark/test/CMakeFiles/user_counters_tabular_test.dir/user_counters_tabular_test.s 2023-11-13 08:03:17.215707322 +0000 @@ -12350,7 +12350,7 @@ # %bb.46: # %invoke.cont171.i addi a0, sp, 776 addi a0, a0, 2047 - addi s6, a0, 153 + addi s7, a0, 153 addi a0, sp, 600 sd a0, 584(sp) li a0, 92 @@ -12400,7 +12400,7 @@ addi a1, sp, 584 li a2, 1 li s4, 1 - mv a0, s6 + mv a0, s7 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1433: # %bb.48: # %invoke.cont178.i @@ -12462,7 +12462,7 @@ # %bb.50: # %invoke.cont185.i addi a0, sp, 776 addi a0, a0, 2047 - addi s7, a0, 329 + addi s11, a0, 329 addi a0, sp, 536 sd a0, 520(sp) li a0, 92 @@ -12512,13 +12512,13 @@ addi a1, sp, 520 li a2, 1 li s4, 1 - mv a0, s7 + mv a0, s11 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1445: # %bb.52: # %invoke.cont192.i addi a0, sp, 776 addi a0, a0, 2047 - addi s11, a0, 417 + addi s9, a0, 417 addi a0, sp, 504 sd a0, 488(sp) li a0, 92 @@ -12576,13 +12576,13 @@ addi a1, sp, 488 li a2, 1 li s4, 1 - mv a0, s11 + mv a0, s9 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1451: # %bb.54: # %invoke.cont199.i addi a0, sp, 776 addi a0, a0, 2047 - addi s9, a0, 505 + addi s6, a0, 505 addi a0, sp, 472 sd a0, 456(sp) li a0, 92 @@ -12632,7 +12632,7 @@ addi a1, sp, 456 li a2, 1 li s4, 1 - mv a0, s9 + mv a0, s6 call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1457: # %bb.56: # %invoke.cont206.i @@ -12892,8 +12892,8 @@ call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1487: # %bb.66: # %invoke.cont248.i - sd s5, 56(sp) # 8-byte Folded Spill - sd s8, 64(sp) # 8-byte Folded Spill + sd s8, 56(sp) # 8-byte Folded Spill + sd s6, 64(sp) # 8-byte Folded Spill addi s0, s0, 1121 addi a0, sp, 248 sd a0, 232(sp) @@ -12916,8 +12916,8 @@ vsetvli zero, a2, e8, m2, ta, ma vle8.v v8, (s8) vse8.v v8, (a0) - addi s5, s8, 48 - vle8.v v8, (s5) + addi s6, s8, 48 + vle8.v v8, (s6) addi a2, a0, 48 vse8.v v8, (a2) addi a2, s8, 32 @@ -12979,7 +12979,7 @@ vsetvli zero, a2, e8, m2, ta, ma vle8.v v8, (s8) vse8.v v8, (a0) - vle8.v v8, (s5) + vle8.v v8, (s6) addi a2, a0, 48 vse8.v v8, (a2) addi a2, a0, 32 @@ -13028,8 +13028,8 @@ call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm@plt .Ltmp1502: # %bb.71: # %call2.i5.i.noexc537.i - sd s1, 32(sp) # 8-byte Folded Spill - sd s11, 40(sp) # 8-byte Folded Spill + sd s11, 32(sp) # 8-byte Folded Spill + sd s2, 40(sp) # 8-byte Folded Spill ld a1, 136(sp) sd a0, 168(sp) sd a1, 184(sp) @@ -13037,7 +13037,7 @@ vsetvli zero, a2, e8, m2, ta, ma vle8.v v8, (s8) vse8.v v8, (a0) - vle8.v v8, (s5) + vle8.v v8, (s6) addi a2, a0, 48 vse8.v v8, (a2) addi a2, a0, 32 @@ -13072,8 +13072,8 @@ call _ZN8TestCaseC1ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEi@plt .Ltmp1505: # %bb.72: # %invoke.cont269.i - mv s1, s7 - sd s2, 24(sp) # 8-byte Folded Spill + mv s2, s1 + sd s7, 24(sp) # 8-byte Folded Spill addi a0, sp, 776 addi a0, a0, 2047 addi s11, a0, 1385 @@ -13088,7 +13088,7 @@ call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm@plt .Ltmp1508: # %bb.73: # %call2.i5.i.noexc549.i - mv s2, s6 + mv s1, s5 mv s7, s3 ld a1, 104(sp) sd a0, 136(sp) @@ -13097,7 +13097,7 @@ vsetvli zero, a2, e8, m2, ta, ma vle8.v v8, (s8) vse8.v v8, (a0) - vle8.v v8, (s5) + vle8.v v8, (s6) addi a2, a0, 48 vse8.v v8, (a2) addi a2, a0, 32 @@ -13140,8 +13140,8 @@ li a0, 92 lui a1, 1 addiw a1, a1, 288 - add s6, sp, a1 - sd a0, 0(s6) + add s5, sp, a1 + sd a0, 0(s5) .Ltmp1513: addi a0, sp, 104 lui a1, 1 @@ -13151,14 +13151,14 @@ call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm@plt .Ltmp1514: # %bb.75: # %call2.i5.i.noexc561.i - ld a1, 0(s6) + ld a1, 0(s5) sd a0, 104(sp) sd a1, 120(sp) li a2, 32 vsetvli zero, a2, e8, m2, ta, ma vle8.v v8, (s8) vse8.v v8, (a0) - vle8.v v8, (s5) + vle8.v v8, (s6) addi a2, a0, 48 vse8.v v8, (a2) addi a2, a0, 32 @@ -13195,18 +13195,18 @@ .Ltmp1519: addi a1, sp, 776 li a2, 41 - addi s5, sp, 776 + addi s6, sp, 776 li a0, 0 call _Z8AddCases10TestCaseIDSt16initializer_listI8TestCaseE@plt .Ltmp1520: # %bb.77: # %invoke.cont285.i mv s4, a0 - addi a0, s5, 2047 + addi a0, s6, 2047 addi s1, a0, 1561 lui a0, 1048575 addiw s2, a0, 488 li s3, -1 - li s5, 1 + li s6, 1 j .LBB24_79 .LBB24_78: # %_ZN8TestCaseD2Ev.exit.i # in Loop: Header=BB24_79 Depth=1 @@ -13221,8 +13221,8 @@ # in Loop: Header=BB24_79 Depth=1 .Lpcrel_hi658: auipc a0, %got_pcrel_hi(__libc_single_threaded) - ld s6, %pcrel_lo(.Lpcrel_hi658)(a0) - lbu a0, 0(s6) + ld s7, %pcrel_lo(.Lpcrel_hi658)(a0) + lbu a0, 0(s7) beqz a0, .LBB24_82 # %bb.81: # %if.then.i.i.i.i.i.i # in Loop: Header=BB24_79 Depth=1 @@ -13230,14 +13230,14 @@ addi a1, a0, -1 sw a1, 48(s0) sext.w a0, a0 - beq a0, s5, .LBB24_83 + beq a0, s6, .LBB24_83 j .LBB24_86 .LBB24_82: # %if.else.i.i.i.i.i.i # in Loop: Header=BB24_79 Depth=1 addi a0, s0, 48 amoadd.w.aqrl a0, s3, (a0) sext.w a0, a0 - bne a0, s5, .LBB24_86 + bne a0, s6, .LBB24_86 .LBB24_83: # %if.then.i.i.i.i565.i # in Loop: Header=BB24_79 Depth=1 ld a0, 0(s0) @@ -13245,7 +13245,7 @@ mv a0, s0 jalr a1 fence.tso - lbu a0, 0(s6) + lbu a0, 0(s7) beqz a0, .LBB24_90 # %bb.84: # %if.then.i.i.i.i.i.i.i # in Loop: Header=BB24_79 Depth=1 @@ -13253,7 +13253,7 @@ addi a1, a0, -1 sw a1, 52(s0) sext.w a0, a0 - bne a0, s5, .LBB24_86 + bne a0, s6, .LBB24_86 .LBB24_85: # %if.then.i1.i.i.i.i.i # in Loop: Header=BB24_79 Depth=1 ld a0, 0(s0) @@ -13282,7 +13282,7 @@ addi a0, s0, 52 amoadd.w.aqrl a0, s3, (a0) sext.w a0, a0 - beq a0, s5, .LBB24_85 + beq a0, s6, .LBB24_85 j .LBB24_86 .LBB24_91: # %arraydestroy.done286.i ld a0, 104(sp) @@ -38480,24 +38480,24 @@ call _ZN8TestCaseD2Ev ld a0, 88(sp) # 8-byte Folded Reload call _ZN8TestCaseD2Ev - ld a0, 32(sp) # 8-byte Folded Reload + mv a0, s2 call _ZN8TestCaseD2Ev - ld a0, 56(sp) # 8-byte Folded Reload + mv a0, s1 call _ZN8TestCaseD2Ev ld a0, 96(sp) # 8-byte Folded Reload call _ZN8TestCaseD2Ev + ld a0, 56(sp) # 8-byte Folded Reload + call _ZN8TestCaseD2Ev ld a0, 64(sp) # 8-byte Folded Reload call _ZN8TestCaseD2Ev ld a0, 48(sp) # 8-byte Folded Reload call _ZN8TestCaseD2Ev - ld a0, 40(sp) # 8-byte Folded Reload + ld a0, 32(sp) # 8-byte Folded Reload call _ZN8TestCaseD2Ev - mv a0, s1 + ld a0, 40(sp) # 8-byte Folded Reload call _ZN8TestCaseD2Ev ld a0, 24(sp) # 8-byte Folded Reload call _ZN8TestCaseD2Ev - mv a0, s2 - call _ZN8TestCaseD2Ev mv a0, s7 call _ZN8TestCaseD2Ev addi a0, sp, 2047 @@ -39079,7 +39079,7 @@ j .LBB24_3053 .LBB24_3120: # %lpad205.i .Ltmp1458: - mv s10, s9 + mv s10, s6 sd a0, 16(sp) # 8-byte Folded Spill ld a0, 456(sp) addi a1, sp, 472 @@ -39088,14 +39088,14 @@ .LBB24_3121: # %lpad203.i .Ltmp1455: sd a0, 16(sp) # 8-byte Folded Spill - mv s10, s9 + mv s10, s6 ld a0, 488(sp) addi a1, sp, 504 beq a0, a1, .LBB24_3044 j .LBB24_3054 .LBB24_3122: # %lpad198.i .Ltmp1452: - mv s10, s11 + mv s10, s9 sd a0, 16(sp) # 8-byte Folded Spill ld a0, 488(sp) addi a1, sp, 504 @@ -39104,14 +39104,14 @@ .LBB24_3123: # %lpad196.i .Ltmp1449: sd a0, 16(sp) # 8-byte Folded Spill - mv s10, s11 + mv s10, s9 ld a0, 520(sp) addi a1, sp, 536 beq a0, a1, .LBB24_3045 j .LBB24_3055 .LBB24_3124: # %lpad191.i .Ltmp1446: - mv s10, s7 + mv s10, s11 sd a0, 16(sp) # 8-byte Folded Spill ld a0, 520(sp) addi a1, sp, 536 @@ -39120,7 +39120,7 @@ .LBB24_3125: # %lpad189.i .Ltmp1443: sd a0, 16(sp) # 8-byte Folded Spill - mv s10, s7 + mv s10, s11 ld a0, 552(sp) addi a1, sp, 568 beq a0, a1, .LBB24_3046 @@ -39143,7 +39143,7 @@ j .LBB24_3057 .LBB24_3128: # %lpad177.i .Ltmp1434: - mv s10, s6 + mv s10, s7 sd a0, 16(sp) # 8-byte Folded Spill ld a0, 584(sp) addi a1, sp, 600 @@ -39152,7 +39152,7 @@ .LBB24_3129: # %lpad175.i .Ltmp1431: sd a0, 16(sp) # 8-byte Folded Spill - mv s10, s6 + mv s10, s7 ld a0, 616(sp) addi a1, sp, 632 beq a0, a1, .LBB24_3048 --- build.head//MultiSource/Benchmarks/MiBench/office-ispell/CMakeFiles/office-ispell.dir/defmt.s 2023-11-13 08:03:22.655550077 +0000 +++ build//MultiSource/Benchmarks/MiBench/office-ispell/CMakeFiles/office-ispell.dir/defmt.s 2023-11-13 08:03:17.687693679 +0000 @@ -1971,9 +1971,9 @@ # %bb.258: # %while.body189.preheader not a1, a0 add a2, a1, s3 + addi a3, sp, 112 + vl2r.v v12, (a3) # Unknown-size Folded Reload ld a3, 48(sp) # 8-byte Folded Reload - addi a4, sp, 112 - vl2r.v v12, (a4) # Unknown-size Folded Reload bltu a2, a3, .LBB1_262 # %bb.259: # %while.body189.preheader ld a2, 48(sp) # 8-byte Folded Reload --- build.head//MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/CMakeFiles/timberwolfmc.dir/readcells.s 2023-11-13 08:03:22.707548573 +0000 +++ build//MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/CMakeFiles/timberwolfmc.dir/readcells.s 2023-11-13 08:03:17.747691944 +0000 @@ -2715,9 +2715,6 @@ slti a3, a1, 0 slt a2, a2, a1 or a2, a3, a2 - ld t0, 40(sp) # 8-byte Folded Reload - ld t1, 48(sp) # 8-byte Folded Reload - addi t3, sp, 1328 csrr a3, vlenb slli a3, a3, 2 add a3, sp, a3 @@ -2728,6 +2725,9 @@ add a3, sp, a3 addi a3, a3, 1360 vl2r.v v12, (a3) # Unknown-size Folded Reload + ld t0, 40(sp) # 8-byte Folded Reload + ld t1, 48(sp) # 8-byte Folded Reload + addi t3, sp, 1328 ld a4, 24(sp) # 8-byte Folded Reload ld t4, 144(sp) # 8-byte Folded Reload bnez a2, .LBB0_253 --- build.head//MultiSource/Benchmarks/DOE-ProxyApps-C/miniGMG/CMakeFiles/miniGMG.dir/solver.s 2023-11-13 08:03:22.539553429 +0000 +++ build//MultiSource/Benchmarks/DOE-ProxyApps-C/miniGMG/CMakeFiles/miniGMG.dir/solver.s 2023-11-13 08:03:17.571697032 +0000 @@ -408,9 +408,6 @@ .LBB0_12: # %for.body68.preheader # in Loop: Header=BB0_6 Depth=1 li a1, 0 - ld a5, 24(sp) # 8-byte Folded Reload - li a6, 144 - ld a7, 104(sp) # 8-byte Folded Reload csrr a2, vlenb slli a2, a2, 2 add a2, sp, a2 @@ -418,6 +415,9 @@ addiw a3, a3, -1312 add a2, a2, a3 vl2r.v v16, (a2) # Unknown-size Folded Reload + ld a5, 24(sp) # 8-byte Folded Reload + li a6, 144 + ld a7, 104(sp) # 8-byte Folded Reload li t0, 136 li t1, 272 ld t4, 112(sp) # 8-byte Folded Reload @@ -3179,35 +3179,35 @@ li a2, 136 call memcpy@plt fld fa5, 1120(sp) - fsd fa5, 672(sp) # 8-byte Folded Spill + fsd fa5, 664(sp) # 8-byte Folded Spill li a2, 136 addi a0, sp, 2047 addi a0, a0, 1521 addi a1, sp, 1128 call memcpy@plt fld fa5, 1264(sp) - fsd fa5, 664(sp) # 8-byte Folded Spill + fsd fa5, 656(sp) # 8-byte Folded Spill li a2, 136 addi a0, sp, 2047 addi a0, a0, 1657 addi a1, sp, 1272 call memcpy@plt fld fa5, 1408(sp) - fsd fa5, 656(sp) # 8-byte Folded Spill + fsd fa5, 648(sp) # 8-byte Folded Spill li a2, 136 addi a0, sp, 2047 addi a0, a0, 1793 addi a1, sp, 1416 call memcpy@plt fld fa5, 1552(sp) - fsd fa5, 648(sp) # 8-byte Folded Spill + fsd fa5, 640(sp) # 8-byte Folded Spill li a2, 136 addi a0, sp, 2047 addi a0, a0, 1929 addi a1, sp, 1560 call memcpy@plt fld fa5, 1696(sp) - fsd fa5, 640(sp) # 8-byte Folded Spill + fsd fa5, 632(sp) # 8-byte Folded Spill li a2, 136 lui a0, 1 addiw a0, a0, 16 @@ -3215,7 +3215,7 @@ addi a1, sp, 1704 call memcpy@plt fld fa5, 1840(sp) - fsd fa5, 632(sp) # 8-byte Folded Spill + fsd fa5, 624(sp) # 8-byte Folded Spill li a2, 136 lui a0, 1 addiw a0, a0, 152 @@ -3224,7 +3224,7 @@ call memcpy@plt addi s3, sp, 1984 fld fa5, 0(s3) - fsd fa5, 624(sp) # 8-byte Folded Spill + fsd fa5, 616(sp) # 8-byte Folded Spill li a2, 136 lui a0, 1 addiw a0, a0, 288 @@ -3232,7 +3232,7 @@ addi a1, sp, 1992 call memcpy@plt fld fa5, 144(s3) - fsd fa5, 616(sp) # 8-byte Folded Spill + fsd fa5, 608(sp) # 8-byte Folded Spill li a2, 136 lui a0, 1 addiw a0, a0, 424 @@ -3241,7 +3241,7 @@ addi a1, a1, 89 call memcpy@plt fld fa5, 288(s3) - fsd fa5, 608(sp) # 8-byte Folded Spill + fsd fa5, 600(sp) # 8-byte Folded Spill li a2, 136 lui a0, 1 addiw a0, a0, 560 @@ -3250,7 +3250,7 @@ addi a1, a1, 233 call memcpy@plt fld fa5, 432(s3) - fsd fa5, 600(sp) # 8-byte Folded Spill + fsd fa5, 592(sp) # 8-byte Folded Spill li a2, 136 lui a0, 1 addiw a0, a0, 696 @@ -3259,7 +3259,7 @@ addi a1, a1, 377 call memcpy@plt fld fa5, 576(s3) - fsd fa5, 592(sp) # 8-byte Folded Spill + fsd fa5, 584(sp) # 8-byte Folded Spill li a2, 136 lui a0, 1 addiw a0, a0, 832 @@ -3268,7 +3268,7 @@ addi a1, a1, 521 call memcpy@plt fld fa5, 720(s3) - fsd fa5, 584(sp) # 8-byte Folded Spill + fsd fa5, 576(sp) # 8-byte Folded Spill li a2, 136 lui a0, 1 addiw a0, a0, 968 @@ -3277,7 +3277,7 @@ addi a1, a1, 665 call memcpy@plt fld fa5, 864(s3) - fsd fa5, 576(sp) # 8-byte Folded Spill + fsd fa5, 568(sp) # 8-byte Folded Spill li a2, 136 lui a0, 1 addiw a0, a0, 1104 @@ -3286,7 +3286,7 @@ addi a1, a1, 809 call memcpy@plt fld fa5, 1008(s3) - fsd fa5, 568(sp) # 8-byte Folded Spill + fsd fa5, 560(sp) # 8-byte Folded Spill li a2, 136 lui a0, 1 addiw a0, a0, 1240 @@ -3296,7 +3296,7 @@ call memcpy@plt ld s3, 40(sp) # 8-byte Folded Reload fld fa5, 0(s3) - fsd fa5, 560(sp) # 8-byte Folded Spill + fsd fa5, 552(sp) # 8-byte Folded Spill li a2, 136 lui a0, 1 addiw a0, a0, 1376 @@ -3304,13 +3304,13 @@ ld a1, 32(sp) # 8-byte Folded Reload call memcpy@plt fld fa5, 144(s3) - fsd fa5, 552(sp) # 8-byte Folded Spill + fsd fa5, 544(sp) # 8-byte Folded Spill li a2, 136 ld a0, 24(sp) # 8-byte Folded Reload ld a1, 16(sp) # 8-byte Folded Reload call memcpy@plt fld fa5, 288(s3) - fsd fa5, 544(sp) # 8-byte Folded Spill + fsd fa5, 536(sp) # 8-byte Folded Spill vsetivli zero, 2, e64, m1, tu, ma lui a0, 3 addiw a0, a0, -1232 @@ -3891,14 +3891,14 @@ bnez a2, .LBB1_11 # %bb.12: # %for.cond276.preheader.preheader # in Loop: Header=BB1_6 Depth=2 - fsd fs2, 696(sp) # 8-byte Folded Spill - fsd fs0, 728(sp) # 8-byte Folded Spill - fsd fs4, 736(sp) # 8-byte Folded Spill + fsd fs2, 688(sp) # 8-byte Folded Spill + fsd fs0, 720(sp) # 8-byte Folded Spill + fsd fs4, 728(sp) # 8-byte Folded Spill fsd fs1, 896(sp) # 8-byte Folded Spill - fsd ft10, 712(sp) # 8-byte Folded Spill - fsd ft11, 720(sp) # 8-byte Folded Spill - fsd ft9, 688(sp) # 8-byte Folded Spill - fsd ft0, 680(sp) # 8-byte Folded Spill + fsd ft10, 704(sp) # 8-byte Folded Spill + fsd ft11, 712(sp) # 8-byte Folded Spill + fsd ft9, 680(sp) # 8-byte Folded Spill + fsd ft0, 672(sp) # 8-byte Folded Spill fsd fs3, 760(sp) # 8-byte Folded Spill bgeu t5, s10, .LBB1_14 # %bb.13: # in Loop: Header=BB1_6 Depth=2 @@ -4226,9 +4226,9 @@ vfmv.f.s fs4, v8 vsetivli zero, 1, e64, m2, ta, ma vslidedown.vi v8, v10, 2 - vfmv.f.s fs6, v8 - vslidedown.vi v8, v10, 3 vfmv.f.s fs3, v8 + vslidedown.vi v8, v10, 3 + vfmv.f.s fs6, v8 csrr a1, vlenb li a2, 24 mul a1, a1, a2 @@ -4240,10 +4240,10 @@ vfmv.f.s ft9, v10 vsetivli zero, 1, e64, m1, ta, ma vslidedown.vi v8, v10, 1 - vfmv.f.s ft11, v8 + vfmv.f.s ft10, v8 vsetivli zero, 1, e64, m2, ta, ma vslidedown.vi v8, v10, 2 - vfmv.f.s ft10, v8 + vfmv.f.s ft11, v8 vslidedown.vi v8, v10, 3 vfmv.f.s fs0, v8 csrr a1, vlenb @@ -4288,15 +4288,15 @@ fld fa3, -8(a0) fld fa2, 0(a0) fld fa1, 8(a0) - fmadd.d fa5, fa4, fs6, fa5 - fmadd.d fa5, fa3, fs3, fa5 + fmadd.d fa5, fa4, fs3, fa5 + fmadd.d fa5, fa3, fs6, fa5 fmadd.d fa5, fa2, ft9, fa5 - fmadd.d fa5, fa1, ft11, fa5 + fmadd.d fa5, fa1, ft10, fa5 fld fa4, 16(a0) fld fa3, 24(a0) fld fa2, 32(a0) fld fa1, 40(a0) - fmadd.d fa5, fa4, ft10, fa5 + fmadd.d fa5, fa4, ft11, fa5 fmadd.d fa5, fa3, fs0, fa5 fmadd.d fa5, fa2, fs2, fa5 fmadd.d fa5, fa1, ft0, fa5 @@ -4319,14 +4319,14 @@ fmv.d fa2, ft8 fmv.d fa4, fs0 fmv.d fa5, fs2 - fsd fs9, 704(sp) # 8-byte Folded Spill + fsd fs9, 696(sp) # 8-byte Folded Spill fsd fs8, 768(sp) # 8-byte Folded Spill fsd fs7, 776(sp) # 8-byte Folded Spill fsd fs5, 784(sp) # 8-byte Folded Spill fsd fs1, 792(sp) # 8-byte Folded Spill fsd fs4, 808(sp) # 8-byte Folded Spill - fsd fs6, 816(sp) # 8-byte Folded Spill - fsd fs3, 824(sp) # 8-byte Folded Spill + fsd fs3, 816(sp) # 8-byte Folded Spill + fsd fs6, 824(sp) # 8-byte Folded Spill bgeu t5, s10, .LBB1_20 # %bb.19: # in Loop: Header=BB1_6 Depth=2 li a0, 0 @@ -4338,12 +4338,12 @@ fmv.d fs10, fa5 fmv.d fs11, fa4 fmv.d fs3, ft11 - fmv.d fs6, ft10 + fmv.d fs4, ft10 fmv.d fs2, ft9 - fld fs0, 680(sp) # 8-byte Folded Reload - fld fs4, 688(sp) # 8-byte Folded Reload - fld ft10, 720(sp) # 8-byte Folded Reload - fld ft8, 696(sp) # 8-byte Folded Reload + fld fs0, 672(sp) # 8-byte Folded Reload + fld fs6, 680(sp) # 8-byte Folded Reload + fld ft10, 712(sp) # 8-byte Folded Reload + fld ft8, 688(sp) # 8-byte Folded Reload j .LBB1_23 .LBB1_20: # %vector.ph1094 # in Loop: Header=BB1_6 Depth=2 @@ -4360,7 +4360,7 @@ addiw a2, a2, -1232 add a1, a1, a2 vs2r.v v8, (a1) # Unknown-size Folded Spill - fld fs0, 680(sp) # 8-byte Folded Reload + fld fs0, 672(sp) # 8-byte Folded Reload vfmv.v.f v8, fs0 csrr a1, vlenb li a2, 52 @@ -4370,8 +4370,8 @@ addiw a2, a2, -1232 add a1, a1, a2 vs2r.v v8, (a1) # Unknown-size Folded Spill - fld fs4, 688(sp) # 8-byte Folded Reload - vfmv.v.f v8, fs4 + fld fs6, 680(sp) # 8-byte Folded Reload + vfmv.v.f v8, fs6 csrr a1, vlenb li a2, 50 mul a1, a1, a2 @@ -4380,7 +4380,7 @@ addiw a2, a2, -1232 add a1, a1, a2 vs2r.v v8, (a1) # Unknown-size Folded Spill - fld fa3, 720(sp) # 8-byte Folded Reload + fld fa3, 712(sp) # 8-byte Folded Reload vfmv.v.f v8, fa3 csrr a1, vlenb li a2, 48 @@ -4390,7 +4390,7 @@ addiw a2, a2, -1232 add a1, a1, a2 vs2r.v v8, (a1) # Unknown-size Folded Spill - fld fa3, 728(sp) # 8-byte Folded Reload + fld fa3, 720(sp) # 8-byte Folded Reload vfmv.v.f v8, fa3 csrr a1, vlenb li a2, 46 @@ -4400,7 +4400,7 @@ addiw a2, a2, -1232 add a1, a1, a2 vs2r.v v8, (a1) # Unknown-size Folded Spill - fld ft8, 696(sp) # 8-byte Folded Reload + fld ft8, 688(sp) # 8-byte Folded Reload vfmv.v.f v8, ft8 csrr a1, vlenb li a2, 44 @@ -4410,7 +4410,7 @@ addiw a2, a2, -1232 add a1, a1, a2 vs2r.v v8, (a1) # Unknown-size Folded Spill - fld fa3, 736(sp) # 8-byte Folded Reload + fld fa3, 728(sp) # 8-byte Folded Reload vfmv.v.f v8, fa3 csrr a1, vlenb li a2, 42 @@ -4442,7 +4442,7 @@ fmv.d fs8, fs11 fmv.d fs9, ft0 fmv.d fs3, ft11 - fmv.d fs6, ft10 + fmv.d fs4, ft10 fmv.d fs2, ft9 .LBB1_21: # %vector.body1099 # Parent Loop BB1_5 Depth=1 @@ -4566,7 +4566,7 @@ # %bb.22: # in Loop: Header=BB1_6 Depth=2 fmv.d fs10, fa5 fmv.d fs11, fa4 - fld ft10, 720(sp) # 8-byte Folded Reload + fld ft10, 712(sp) # 8-byte Folded Reload .LBB1_23: # %for.cond308.preheader.preheader1300 # in Loop: Header=BB1_6 Depth=2 fsd fa2, 800(sp) # 8-byte Folded Spill @@ -4575,8 +4575,8 @@ addi a2, a0, -17 mul a0, a0, s7 add a0, a7, a0 - fld ft0, 728(sp) # 8-byte Folded Reload - fld ft11, 736(sp) # 8-byte Folded Reload + fld ft0, 720(sp) # 8-byte Folded Reload + fld ft11, 728(sp) # 8-byte Folded Reload .LBB1_24: # %for.cond308.preheader # Parent Loop BB1_5 Depth=1 # Parent Loop BB1_6 Depth=2 @@ -4589,7 +4589,7 @@ fld fa3, -40(a0) fld fa2, -32(a0) fld fa1, -24(a0) - fmadd.d fa5, fa4, fs4, fa5 + fmadd.d fa5, fa4, fs6, fa5 fmadd.d fa5, fa3, ft10, fa5 fmadd.d fa5, fa2, ft0, fa5 fmadd.d fa5, fa1, ft8, fa5 @@ -4626,55 +4626,55 @@ # %bb.25: # %for.body.i.preheader # in Loop: Header=BB1_6 Depth=2 fld fa5, 240(s6) - fld fa4, 672(sp) # 8-byte Folded Reload + fld fa4, 664(sp) # 8-byte Folded Reload fmadd.d fa5, fa4, fa5, fa0 fld fa4, 248(s6) fld fa3, 256(s6) fld fa2, 264(s6) fld fa1, 272(s6) - fld ft0, 664(sp) # 8-byte Folded Reload + fld ft0, 656(sp) # 8-byte Folded Reload fmadd.d fa5, ft0, fa4, fa5 - fld fa4, 656(sp) # 8-byte Folded Reload - fmadd.d fa5, fa4, fa3, fa5 fld fa4, 648(sp) # 8-byte Folded Reload - fmadd.d fa5, fa4, fa2, fa5 + fmadd.d fa5, fa4, fa3, fa5 fld fa4, 640(sp) # 8-byte Folded Reload + fmadd.d fa5, fa4, fa2, fa5 + fld fa4, 632(sp) # 8-byte Folded Reload fmadd.d fa5, fa4, fa1, fa5 fld fa4, 280(s6) fld fa3, 288(s6) fld fa2, 296(s6) fld fa1, 304(s6) - fld ft0, 632(sp) # 8-byte Folded Reload + fld ft0, 624(sp) # 8-byte Folded Reload fmadd.d fa5, ft0, fa4, fa5 - fld fa4, 624(sp) # 8-byte Folded Reload - fmadd.d fa5, fa4, fa3, fa5 fld fa4, 616(sp) # 8-byte Folded Reload - fmadd.d fa5, fa4, fa2, fa5 + fmadd.d fa5, fa4, fa3, fa5 fld fa4, 608(sp) # 8-byte Folded Reload + fmadd.d fa5, fa4, fa2, fa5 + fld fa4, 600(sp) # 8-byte Folded Reload fmadd.d fa5, fa4, fa1, fa5 fld fa4, 312(s6) fld fa3, 320(s6) fld fa2, 328(s6) fld fa1, 336(s6) - fld ft0, 600(sp) # 8-byte Folded Reload + fld ft0, 592(sp) # 8-byte Folded Reload fmadd.d fa5, ft0, fa4, fa5 - fld fa4, 592(sp) # 8-byte Folded Reload - fmadd.d fa5, fa4, fa3, fa5 fld fa4, 584(sp) # 8-byte Folded Reload - fmadd.d fa5, fa4, fa2, fa5 + fmadd.d fa5, fa4, fa3, fa5 fld fa4, 576(sp) # 8-byte Folded Reload + fmadd.d fa5, fa4, fa2, fa5 + fld fa4, 568(sp) # 8-byte Folded Reload fmadd.d fa5, fa4, fa1, fa5 fld fa4, 344(s6) fld fa3, 352(s6) fld fa2, 360(s6) fld fa1, 368(s6) - fld ft0, 568(sp) # 8-byte Folded Reload + fld ft0, 560(sp) # 8-byte Folded Reload fmadd.d fa5, ft0, fa4, fa5 - fld fa4, 560(sp) # 8-byte Folded Reload - fmadd.d fa5, fa4, fa3, fa5 fld fa4, 552(sp) # 8-byte Folded Reload - fmadd.d fa5, fa4, fa2, fa5 + fmadd.d fa5, fa4, fa3, fa5 fld fa4, 544(sp) # 8-byte Folded Reload + fmadd.d fa5, fa4, fa2, fa5 + fld fa4, 536(sp) # 8-byte Folded Reload fmadd.d fa5, fa4, fa1, fa5 feq.d a0, fa5, fa0 li s4, 1 @@ -4704,9 +4704,9 @@ .LBB1_27: # %for.body.i266.preheader # in Loop: Header=BB1_6 Depth=2 fsd fs7, 880(sp) # 8-byte Folded Spill - fsd fs6, 888(sp) # 8-byte Folded Spill - fsd fs3, 840(sp) # 8-byte Folded Spill + fsd fs3, 888(sp) # 8-byte Folded Spill fsd fs2, 904(sp) # 8-byte Folded Spill + fsd fs4, 840(sp) # 8-byte Folded Spill vsetivli zero, 4, e64, m2, ta, ma vle64.v v8, (t3) vle64.v v10, (t2) @@ -4729,17 +4729,17 @@ fld fa2, 24(s6) fld fa1, 160(s6) fmul.d fa5, ft0, fa5 - fsub.d fs6, fa3, fa5 + fsub.d fs3, fa3, fa5 fmul.d fa5, ft0, fa2 - fsub.d fs3, fa1, fa5 + fsub.d fs4, fa1, fa5 fld fa5, 32(s6) fld fa3, 168(s6) fld fa2, 40(s6) fld fa1, 176(s6) fmul.d fa5, ft0, fa5 - fsub.d fs7, fa3, fa5 + fsub.d fs2, fa3, fa5 fmul.d fa5, ft0, fa2 - fsub.d fs2, fa1, fa5 + fsub.d fs7, fa1, fa5 fld fa5, 48(s6) fld fa3, 184(s6) fld fa2, 56(s6) @@ -4773,8 +4773,9 @@ fmul.d fa3, ft0, fa3 fsub.d ft7, fa5, fa3 fsd fa4, 904(s5) - fsd fs6, 752(sp) # 8-byte Folded Spill - fsd fa1, 744(sp) # 8-byte Folded Spill + fsd fs3, 752(sp) # 8-byte Folded Spill + fsd fs2, 744(sp) # 8-byte Folded Spill + fsd fa1, 736(sp) # 8-byte Folded Spill bgeu t5, s10, .LBB1_29 # %bb.28: # in Loop: Header=BB1_6 Depth=2 li a0, 0 @@ -4782,7 +4783,7 @@ addiw a1, a1, 1920 add t1, sp, a1 fmv.d fa1, ft11 - fmv.d ft3, fs3 + fmv.d ft3, fs4 j .LBB1_32 .LBB1_29: # %vector.ph1026 # in Loop: Header=BB1_6 Depth=2 @@ -4843,7 +4844,7 @@ addiw a2, a2, -1232 add a1, a1, a2 vs2r.v v8, (a1) # Unknown-size Folded Spill - vfmv.v.f v8, fs6 + vfmv.v.f v8, fs3 csrr a1, vlenb li a2, 42 mul a1, a1, a2 @@ -4852,9 +4853,9 @@ addiw a2, a2, -1232 add a1, a1, a2 vs2r.v v8, (a1) # Unknown-size Folded Spill - vfmv.v.f v22, fs3 - vfmv.v.f v24, fs7 - vfmv.v.f v26, fs2 + vfmv.v.f v22, fs4 + vfmv.v.f v24, fs2 + vfmv.v.f v26, fs7 vfmv.v.f v28, ft2 vfmv.v.f v30, ft1 vfmv.v.f v0, ft4 @@ -4869,7 +4870,7 @@ mv a3, a5 vfmv.v.f v8, ft7 fmv.d fa1, ft11 - fmv.d ft3, fs3 + fmv.d ft3, fs4 .LBB1_30: # %vector.body1031 # Parent Loop BB1_5 Depth=1 # Parent Loop BB1_6 Depth=2 @@ -5006,6 +5007,7 @@ add a0, t0, a0 fld fs0, 752(sp) # 8-byte Folded Reload fld fs1, 744(sp) # 8-byte Folded Reload + fld fs2, 736(sp) # 8-byte Folded Reload .LBB1_33: # %for.cond356.preheader # Parent Loop BB1_5 Depth=1 # Parent Loop BB1_6 Depth=2 @@ -5028,8 +5030,8 @@ fld ft11, 8(a0) fmadd.d fa5, fa3, fs0, fa5 fmadd.d fa5, fa2, ft3, fa5 - fmadd.d fa5, ft10, fs7, fa5 - fmadd.d fa5, ft11, fs2, fa5 + fmadd.d fa5, ft10, fs1, fa5 + fmadd.d fa5, ft11, fs7, fa5 fld fa3, 16(a0) fld fa2, 24(a0) fld ft10, 32(a0) @@ -5037,7 +5039,7 @@ fmadd.d fa5, fa3, ft2, fa5 fmadd.d fa5, fa2, ft1, fa5 fmadd.d fa5, ft10, ft4, fa5 - fmadd.d fa5, ft11, fs1, fa5 + fmadd.d fa5, ft11, fs2, fa5 fld fa3, 48(a0) fld fa2, 56(a0) fld ft10, 64(a0) @@ -5055,11 +5057,10 @@ # %bb.34: # %for.body.i272.preheader # in Loop: Header=BB1_6 Depth=2 fsd fs7, 504(sp) # 8-byte Folded Spill - fsd fs2, 512(sp) # 8-byte Folded Spill - fsd fa1, 528(sp) # 8-byte Folded Spill + fsd fa1, 520(sp) # 8-byte Folded Spill fld fa5, 240(s6) fmul.d fa5, ft0, fa5 - fld fa3, 704(sp) # 8-byte Folded Reload + fld fa3, 696(sp) # 8-byte Folded Reload fsub.d ft10, fa3, fa5 fld fa5, 248(s6) fsd fa5, 376(sp) # 8-byte Folded Spill @@ -5128,8 +5129,8 @@ fmul.d fa5, ft0, fa5 fld fa3, 304(s6) fld fa2, 824(sp) # 8-byte Folded Reload - fsub.d fs9, fa2, fa5 - fsd fs9, 928(s5) + fsub.d fs3, fa2, fa5 + fsd fs3, 928(s5) fld fa5, 312(s6) fmul.d fa3, ft0, fa3 fld fa2, 904(sp) # 8-byte Folded Reload @@ -5137,9 +5138,9 @@ fsd fs10, 936(s5) fmul.d fa5, ft0, fa5 fld fa3, 320(s6) - fld fs3, 840(sp) # 8-byte Folded Reload - fsub.d fs3, fs3, fa5 - fsd fs3, 944(s5) + fld fa2, 840(sp) # 8-byte Folded Reload + fsub.d fs9, fa2, fa5 + fsd fs9, 944(s5) fld fa5, 328(s6) fmul.d fa3, ft0, fa3 fld fa2, 888(sp) # 8-byte Folded Reload @@ -5203,12 +5204,12 @@ fld fa1, 856(s5) fsd fa1, 368(sp) # 8-byte Folded Spill fld fa1, 864(s5) - fsd fa1, 536(sp) # 8-byte Folded Spill + fsd fa1, 528(sp) # 8-byte Folded Spill fmul.d fa2, ft0, fa2 fld fa1, 800(sp) # 8-byte Folded Reload fsub.d fa2, fa1, fa2 fsd fa2, 1000(s5) - fsd ft3, 520(sp) # 8-byte Folded Spill + fsd ft3, 512(sp) # 8-byte Folded Spill fsd ft1, 240(sp) # 8-byte Folded Spill fsd ft2, 232(sp) # 8-byte Folded Spill bgeu t5, s10, .LBB1_36 @@ -5283,9 +5284,9 @@ addiw a2, a2, -1232 add a1, a1, a2 vs2r.v v8, (a1) # Unknown-size Folded Spill - vfmv.v.f v22, fs9 + vfmv.v.f v22, fs3 vfmv.v.f v24, fs10 - vfmv.v.f v26, fs3 + vfmv.v.f v26, fs9 vfmv.v.f v28, fs11 vfmv.v.f v30, fs0 vfmv.v.f v0, fs5 @@ -5462,7 +5463,7 @@ fsub.d fa6, fa7, fa6 fld fa7, 288(sp) # 8-byte Folded Reload fmadd.d fa1, fa6, fa7, fa1 - fld ft0, 528(sp) # 8-byte Folded Reload + fld ft0, 520(sp) # 8-byte Folded Reload fmadd.d fa4, ft0, fa7, fa4 fld ft0, 416(sp) # 8-byte Folded Reload fmul.d fa6, ft3, ft0 @@ -5478,7 +5479,7 @@ fsub.d fa6, fa7, fa6 fld fa7, 304(sp) # 8-byte Folded Reload fmadd.d fa1, fa6, fa7, fa1 - fld ft0, 520(sp) # 8-byte Folded Reload + fld ft0, 512(sp) # 8-byte Folded Reload fmadd.d fa4, ft0, fa7, fa4 fld ft0, 440(sp) # 8-byte Folded Reload fmul.d fa6, ft3, ft0 @@ -5486,7 +5487,7 @@ fsub.d fa6, fa7, fa6 fld fa7, 312(sp) # 8-byte Folded Reload fmadd.d fa1, fa6, fa7, fa1 - fld ft0, 504(sp) # 8-byte Folded Reload + fld ft0, 744(sp) # 8-byte Folded Reload fmadd.d fa4, ft0, fa7, fa4 fld ft0, 448(sp) # 8-byte Folded Reload fmul.d ft0, ft3, ft0 @@ -5494,7 +5495,7 @@ fsub.d ft0, fa6, ft0 fld fa6, 320(sp) # 8-byte Folded Reload fmadd.d fa1, ft0, fa6, fa1 - fld ft0, 512(sp) # 8-byte Folded Reload + fld ft0, 504(sp) # 8-byte Folded Reload fmadd.d fa4, ft0, fa6, fa4 fld ft0, 464(sp) # 8-byte Folded Reload fmul.d ft0, ft3, ft0 @@ -5525,7 +5526,7 @@ fsub.d ft0, ft1, ft0 fld ft1, 352(sp) # 8-byte Folded Reload fmadd.d fa1, ft0, ft1, fa1 - fld ft0, 744(sp) # 8-byte Folded Reload + fld ft0, 736(sp) # 8-byte Folded Reload fmadd.d fa4, ft0, ft1, fa4 fld ft0, 496(sp) # 8-byte Folded Reload fmul.d ft0, ft3, ft0 @@ -5543,9 +5544,9 @@ fmadd.d fa4, ft5, ft1, fa4 fld fa1, 896(sp) # 8-byte Folded Reload fmul.d fa1, ft3, fa1 - fld ft5, 712(sp) # 8-byte Folded Reload + fld ft5, 704(sp) # 8-byte Folded Reload fadd.d ft5, ft5, fa1 - fld ft6, 536(sp) # 8-byte Folded Reload + fld ft6, 528(sp) # 8-byte Folded Reload fmadd.d ft7, ft7, ft6, fa4 fld fa4, 456(sp) # 8-byte Folded Reload fmul.d fa4, ft3, fa4 @@ -5682,9 +5683,9 @@ fld ft1, 0(a0) fld ft2, 8(a0) fmadd.d fa4, fa1, fs8, fa4 - fmadd.d fa4, ft0, fs9, fa4 + fmadd.d fa4, ft0, fs3, fa4 fmadd.d fa4, ft1, fs10, fa4 - fmadd.d fa4, ft2, fs3, fa4 + fmadd.d fa4, ft2, fs9, fa4 fld fa1, 16(a0) fld ft0, 24(a0) fld ft1, 32(a0) @@ -5725,13 +5726,13 @@ fld ft2, 800(s5) fmadd.d fa4, fs4, fa1, fa4 fmadd.d fa4, fs8, ft0, fa4 - fmadd.d fa4, fs9, ft1, fa4 + fmadd.d fa4, fs3, ft1, fa4 fmadd.d fa4, fs10, ft2, fa4 fld fa1, 808(s5) fld ft0, 816(s5) fld ft1, 824(s5) fld ft2, 832(s5) - fmadd.d fa4, fs3, fa1, fa4 + fmadd.d fa4, fs9, fa1, fa4 fmadd.d fa4, fs11, ft0, fa4 fmadd.d fa4, fs0, ft1, fa4 fmadd.d fa4, fs5, ft2, fa4 @@ -5762,8 +5763,8 @@ fld fs9, 848(sp) # 8-byte Folded Reload fld fs10, 872(sp) # 8-byte Folded Reload fld fs11, 864(sp) # 8-byte Folded Reload - fld fs6, 888(sp) # 8-byte Folded Reload - fld fs3, 840(sp) # 8-byte Folded Reload + fld fs3, 888(sp) # 8-byte Folded Reload + fld fs4, 840(sp) # 8-byte Folded Reload fld fs2, 904(sp) # 8-byte Folded Reload beqz a0, .LBB1_43 j .LBB1_63 @@ -6524,40 +6525,40 @@ # in Loop: Header=BB1_6 Depth=2 fmv.d.x fa5, zero feq.d a0, fs6, fa5 - fld fa4, 672(sp) # 8-byte Folded Reload - fmadd.d fa5, fa4, ft9, fa5 fld fa4, 664(sp) # 8-byte Folded Reload - fmadd.d fa5, fa4, ft8, fa5 + fmadd.d fa5, fa4, ft9, fa5 fld fa4, 656(sp) # 8-byte Folded Reload - fmadd.d fa5, fa4, fa7, fa5 + fmadd.d fa5, fa4, ft8, fa5 fld fa4, 648(sp) # 8-byte Folded Reload - fmadd.d fa5, fa4, fa6, fa5 + fmadd.d fa5, fa4, fa7, fa5 fld fa4, 640(sp) # 8-byte Folded Reload - fmadd.d fa5, fa4, ft7, fa5 + fmadd.d fa5, fa4, fa6, fa5 fld fa4, 632(sp) # 8-byte Folded Reload - fmadd.d fa5, fa4, ft6, fa5 + fmadd.d fa5, fa4, ft7, fa5 fld fa4, 624(sp) # 8-byte Folded Reload - fmadd.d fa5, fa4, ft5, fa5 + fmadd.d fa5, fa4, ft6, fa5 fld fa4, 616(sp) # 8-byte Folded Reload + fmadd.d fa5, fa4, ft5, fa5 + fld fa4, 608(sp) # 8-byte Folded Reload fmadd.d fa5, fa4, ft4, fa5 fld fa4, 904(sp) # 8-byte Folded Reload - fld fa3, 608(sp) # 8-byte Folded Reload + fld fa3, 600(sp) # 8-byte Folded Reload fmadd.d fa5, fa3, fa4, fa5 - fld fa4, 600(sp) # 8-byte Folded Reload - fmadd.d fa5, fa4, fs4, fa5 fld fa4, 592(sp) # 8-byte Folded Reload - fmadd.d fa5, fa4, fs3, fa5 + fmadd.d fa5, fa4, fs4, fa5 fld fa4, 584(sp) # 8-byte Folded Reload - fmadd.d fa5, fa4, fs11, fa5 + fmadd.d fa5, fa4, fs3, fa5 fld fa4, 576(sp) # 8-byte Folded Reload - fmadd.d fa5, fa4, fs10, fa5 + fmadd.d fa5, fa4, fs11, fa5 fld fa4, 568(sp) # 8-byte Folded Reload - fmadd.d fa5, fa4, fs9, fa5 + fmadd.d fa5, fa4, fs10, fa5 fld fa4, 560(sp) # 8-byte Folded Reload - fmadd.d fa5, fa4, fs8, fa5 + fmadd.d fa5, fa4, fs9, fa5 fld fa4, 552(sp) # 8-byte Folded Reload - fmadd.d fa5, fa4, fs7, fa5 + fmadd.d fa5, fa4, fs8, fa5 fld fa4, 544(sp) # 8-byte Folded Reload + fmadd.d fa5, fa4, fs7, fa5 + fld fa4, 536(sp) # 8-byte Folded Reload fmadd.d fa5, fa4, fs2, fa5 fclass.d a1, fa5 andi a1, a1, 153 @@ -6718,7 +6719,7 @@ fmv.d fa7, fs3 fmv.d ft7, fs2 fmv.d fa6, fs1 - fld ft6, 536(sp) # 8-byte Folded Reload + fld ft6, 528(sp) # 8-byte Folded Reload fld ft4, 800(sp) # 8-byte Folded Reload fmv.d ft5, fs0 li t6, 30 @@ -6748,20 +6749,6 @@ .LBB1_59: # %call.sqrt2242 # in Loop: Header=BB1_6 Depth=2 fmv.d fa0, fa5 - fsd ft10, 712(sp) # 8-byte Folded Spill - fsd ft4, 824(sp) # 8-byte Folded Spill - fsd ft5, 816(sp) # 8-byte Folded Spill - fsd ft6, 808(sp) # 8-byte Folded Spill - fmv.d fs1, ft7 - fmv.d fs5, fa6 - fsd fs7, 880(sp) # 8-byte Folded Spill - fmv.d fs7, fa7 - fsd fs11, 864(sp) # 8-byte Folded Spill - fmv.d fs11, fs8 - fmv.d fs8, ft8 - fsd fs10, 872(sp) # 8-byte Folded Spill - fmv.d fs10, fs9 - fmv.d fs9, ft9 csrr a0, vlenb slli a0, a0, 4 add a0, sp, a0 @@ -6793,38 +6780,21 @@ addiw a1, a1, -1232 add a0, a0, a1 vs2r.v v24, (a0) # Unknown-size Folded Spill + fsd ft10, 704(sp) # 8-byte Folded Spill + fsd ft4, 824(sp) # 8-byte Folded Spill + fsd ft5, 816(sp) # 8-byte Folded Spill + fsd ft6, 808(sp) # 8-byte Folded Spill + fmv.d fs1, ft7 + fmv.d fs5, fa6 + fsd fs7, 880(sp) # 8-byte Folded Spill + fmv.d fs7, fa7 + fsd fs11, 864(sp) # 8-byte Folded Spill + fmv.d fs11, fs8 + fmv.d fs8, ft8 + fsd fs10, 872(sp) # 8-byte Folded Spill + fmv.d fs10, fs9 + fmv.d fs9, ft9 call sqrt@plt - csrr a0, vlenb - li a1, 10 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 3 - addiw a1, a1, -1232 - add a0, a0, a1 - vl2r.v v24, (a0) # Unknown-size Folded Reload - csrr a0, vlenb - li a1, 12 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 3 - addiw a1, a1, -1232 - add a0, a0, a1 - vl2r.v v22, (a0) # Unknown-size Folded Reload - csrr a0, vlenb - li a1, 14 - mul a0, a0, a1 - add a0, sp, a0 - lui a1, 3 - addiw a1, a1, -1232 - add a0, a0, a1 - vl2r.v v20, (a0) # Unknown-size Folded Reload - csrr a0, vlenb - slli a0, a0, 4 - add a0, sp, a0 - lui a1, 3 - addiw a1, a1, -1232 - add a0, a0, a1 - vl2r.v v18, (a0) # Unknown-size Folded Reload fmv.d ft9, fs9 fmv.d fs9, fs10 fld fs10, 872(sp) # 8-byte Folded Reload @@ -6841,7 +6811,7 @@ fld ft5, 816(sp) # 8-byte Folded Reload fld ft4, 824(sp) # 8-byte Folded Reload fld ft2, 832(sp) # 8-byte Folded Reload - fld ft10, 712(sp) # 8-byte Folded Reload + fld ft10, 704(sp) # 8-byte Folded Reload li t6, 30 lui a0, 3 addiw a0, a0, -1512 @@ -6858,12 +6828,43 @@ addiw a0, a0, 336 add a6, sp, a0 ld a5, 48(sp) # 8-byte Folded Reload + csrr a0, vlenb + li a1, 10 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 3 + addiw a1, a1, -1232 + add a0, a0, a1 + vl2r.v v24, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 12 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 3 + addiw a1, a1, -1232 + add a0, a0, a1 + vl2r.v v22, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + li a1, 14 + mul a0, a0, a1 + add a0, sp, a0 + lui a1, 3 + addiw a1, a1, -1232 + add a0, a0, a1 + vl2r.v v20, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + slli a0, a0, 4 + add a0, sp, a0 + lui a1, 3 + addiw a1, a1, -1232 + add a0, a0, a1 + vl2r.v v18, (a0) # Unknown-size Folded Reload fld fa5, 216(sp) # 8-byte Folded Reload flt.d a0, fa0, fa5 fld fa2, 752(sp) # 8-byte Folded Reload beqz a0, .LBB1_55 .LBB1_60: # in Loop: Header=BB1_5 Depth=1 - fsd ft9, 704(sp) # 8-byte Folded Spill + fsd ft9, 696(sp) # 8-byte Folded Spill fsd ft8, 768(sp) # 8-byte Folded Spill fsd fa7, 776(sp) # 8-byte Folded Spill fsd fa6, 784(sp) # 8-byte Folded Spill @@ -6871,13 +6872,13 @@ fsd ft6, 808(sp) # 8-byte Folded Spill fsd ft5, 816(sp) # 8-byte Folded Spill fsd ft4, 824(sp) # 8-byte Folded Spill - fsd ft10, 712(sp) # 8-byte Folded Spill + fsd ft10, 704(sp) # 8-byte Folded Spill li s4, 0 li a0, 1 sd a0, 752(sp) # 8-byte Folded Spill j .LBB1_62 .LBB1_61: # in Loop: Header=BB1_5 Depth=1 - fsd ft9, 704(sp) # 8-byte Folded Spill + fsd ft9, 696(sp) # 8-byte Folded Spill fsd ft8, 768(sp) # 8-byte Folded Spill fsd fa7, 776(sp) # 8-byte Folded Spill fsd fa6, 784(sp) # 8-byte Folded Spill @@ -6885,37 +6886,35 @@ fsd ft6, 808(sp) # 8-byte Folded Spill fsd ft5, 816(sp) # 8-byte Folded Spill fsd ft4, 824(sp) # 8-byte Folded Spill - fsd ft10, 712(sp) # 8-byte Folded Spill + fsd ft10, 704(sp) # 8-byte Folded Spill sd zero, 752(sp) # 8-byte Folded Spill .LBB1_62: # %for.end574 # in Loop: Header=BB1_5 Depth=1 fsd fs2, 800(sp) # 8-byte Folded Spill li s3, 1 - fmv.d fs6, fs3 j .LBB1_68 .LBB1_63: # in Loop: Header=BB1_5 Depth=1 - fsd ft5, 712(sp) # 8-byte Folded Spill + fsd ft5, 704(sp) # 8-byte Folded Spill li s4, 0 li a0, 1 sd a0, 752(sp) # 8-byte Folded Spill li s3, 1 j .LBB1_69 .LBB1_64: # in Loop: Header=BB1_5 Depth=1 - fsd ft5, 712(sp) # 8-byte Folded Spill + fsd ft5, 704(sp) # 8-byte Folded Spill .LBB1_65: # in Loop: Header=BB1_5 Depth=1 sd zero, 752(sp) # 8-byte Folded Spill li s3, 1 j .LBB1_69 .LBB1_66: # in Loop: Header=BB1_5 Depth=1 - fsd ft5, 712(sp) # 8-byte Folded Spill + fsd ft5, 704(sp) # 8-byte Folded Spill sd zero, 752(sp) # 8-byte Folded Spill li s3, 1 - fld fs6, 888(sp) # 8-byte Folded Reload + fld fs3, 888(sp) # 8-byte Folded Reload j .LBB1_69 .LBB1_67: # %for.end574.split.loop.exit1707 # in Loop: Header=BB1_5 Depth=1 - fmv.d fs6, fs3 - fsd ft9, 704(sp) # 8-byte Folded Spill + fsd ft9, 696(sp) # 8-byte Folded Spill fsd ft8, 768(sp) # 8-byte Folded Spill fsd fa7, 776(sp) # 8-byte Folded Spill fsd fa6, 784(sp) # 8-byte Folded Spill @@ -6923,7 +6922,7 @@ fsd ft6, 808(sp) # 8-byte Folded Spill fsd ft5, 816(sp) # 8-byte Folded Spill fsd ft4, 824(sp) # 8-byte Folded Spill - fsd ft10, 712(sp) # 8-byte Folded Spill + fsd ft10, 704(sp) # 8-byte Folded Spill li s3, 0 csrr a0, vlenb slli a0, a0, 5 @@ -6936,14 +6935,14 @@ vsetivli zero, 1, e64, m1, ta, ma vslidedown.vi v8, v10, 1 vfmv.f.s fa4, v8 - fsd fa4, 680(sp) # 8-byte Folded Spill + fsd fa4, 672(sp) # 8-byte Folded Spill vsetivli zero, 1, e64, m2, ta, ma vslidedown.vi v8, v10, 2 vfmv.f.s fa4, v8 - fsd fa4, 688(sp) # 8-byte Folded Spill + fsd fa4, 680(sp) # 8-byte Folded Spill vslidedown.vi v8, v10, 3 vfmv.f.s fa4, v8 - fsd fa4, 720(sp) # 8-byte Folded Spill + fsd fa4, 712(sp) # 8-byte Folded Spill csrr a0, vlenb li a1, 28 mul a0, a0, a1 @@ -6953,15 +6952,15 @@ add a0, a0, a1 vl2r.v v10, (a0) # Unknown-size Folded Reload vfmv.f.s fa4, v10 - fsd fa4, 728(sp) # 8-byte Folded Spill + fsd fa4, 720(sp) # 8-byte Folded Spill vsetivli zero, 1, e64, m1, ta, ma vslidedown.vi v8, v10, 1 vfmv.f.s fa4, v8 - fsd fa4, 696(sp) # 8-byte Folded Spill + fsd fa4, 688(sp) # 8-byte Folded Spill vsetivli zero, 1, e64, m2, ta, ma vslidedown.vi v8, v10, 2 vfmv.f.s fa4, v8 - fsd fa4, 736(sp) # 8-byte Folded Spill + fsd fa4, 728(sp) # 8-byte Folded Spill vslidedown.vi v8, v10, 3 vfmv.f.s fa4, v8 fsd fa4, 128(sp) # 8-byte Folded Spill @@ -7014,7 +7013,6 @@ sd a0, 752(sp) # 8-byte Folded Spill .LBB1_68: # %for.end574 # in Loop: Header=BB1_5 Depth=1 - fmv.d fs3, fs4 fld fs2, 904(sp) # 8-byte Folded Reload .LBB1_69: # %for.end574 # in Loop: Header=BB1_5 Depth=1 @@ -7341,19 +7339,19 @@ mv a2, s0 fmv.d fa0, fs0 mv a3, s0 - fld fa1, 712(sp) # 8-byte Folded Reload + fld fa1, 704(sp) # 8-byte Folded Reload call add_grids@plt beqz s3, .LBB1_70 j .LBB1_4 .LBB1_70: # %if.then590 # in Loop: Header=BB1_5 Depth=1 lw a4, 912(sp) - fmv.d.x fs4, zero + fmv.d.x fs6, zero li a2, 14 li a3, 14 mv a0, s2 mv a1, s1 - fmv.d fa0, fs4 + fmv.d fa0, fs6 fmv.d fa1, fs5 call add_grids@plt lw a4, 916(sp) @@ -7363,7 +7361,7 @@ mv a1, s1 fld fs0, 88(sp) # 8-byte Folded Reload fmv.d fa0, fs0 - fld fa1, 680(sp) # 8-byte Folded Reload + fld fa1, 672(sp) # 8-byte Folded Reload call add_grids@plt lw a4, 920(sp) li a2, 14 @@ -7371,7 +7369,7 @@ mv a0, s2 mv a1, s1 fmv.d fa0, fs0 - fld fa1, 688(sp) # 8-byte Folded Reload + fld fa1, 680(sp) # 8-byte Folded Reload call add_grids@plt lw a4, 924(sp) li a2, 14 @@ -7379,7 +7377,7 @@ mv a0, s2 mv a1, s1 fmv.d fa0, fs0 - fld fa1, 720(sp) # 8-byte Folded Reload + fld fa1, 712(sp) # 8-byte Folded Reload call add_grids@plt lw a4, 928(sp) li a2, 14 @@ -7387,7 +7385,7 @@ mv a0, s2 mv a1, s1 fmv.d fa0, fs0 - fld fa1, 728(sp) # 8-byte Folded Reload + fld fa1, 720(sp) # 8-byte Folded Reload call add_grids@plt lw a4, 932(sp) li a2, 14 @@ -7395,7 +7393,7 @@ mv a0, s2 mv a1, s1 fmv.d fa0, fs0 - fld fa1, 696(sp) # 8-byte Folded Reload + fld fa1, 688(sp) # 8-byte Folded Reload call add_grids@plt lw a4, 936(sp) li a2, 14 @@ -7403,7 +7401,7 @@ mv a0, s2 mv a1, s1 fmv.d fa0, fs0 - fld fa1, 736(sp) # 8-byte Folded Reload + fld fa1, 728(sp) # 8-byte Folded Reload call add_grids@plt lw a4, 940(sp) li a2, 14 @@ -7490,8 +7488,8 @@ li a3, 13 mv a0, s2 mv a1, s1 - fmv.d fa0, fs4 - fld fa1, 704(sp) # 8-byte Folded Reload + fmv.d fa0, fs6 + fld fa1, 696(sp) # 8-byte Folded Reload call add_grids@plt lw a4, 916(sp) li a2, 13 @@ -7563,7 +7561,7 @@ mv a0, s2 mv a1, s1 fmv.d fa0, fs0 - fmv.d fa1, fs3 + fmv.d fa1, fs4 call add_grids@plt lw a4, 952(sp) li a2, 13 @@ -7571,7 +7569,7 @@ mv a0, s2 mv a1, s1 fmv.d fa0, fs0 - fmv.d fa1, fs6 + fmv.d fa1, fs3 call add_grids@plt lw a4, 956(sp) li a2, 13 @@ -7977,19 +7975,19 @@ .cfi_offset fs9, -184 .cfi_offset fs10, -192 .cfi_offset fs11, -200 - addi sp, sp, -656 - .cfi_def_cfa_offset 2688 + addi sp, sp, -640 + .cfi_def_cfa_offset 2672 csrr a4, vlenb li a5, 10 mul a4, a4, a5 sub sp, sp, a4 - .cfi_escape 0x0f, 0x0e, 0x72, 0x00, 0x11, 0x80, 0x15, 0x22, 0x11, 0x0a, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 2688 + 10 * vlenb + .cfi_escape 0x0f, 0x0e, 0x72, 0x00, 0x11, 0xf0, 0x14, 0x22, 0x11, 0x0a, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 2672 + 10 * vlenb fmv.d fs0, fa2 mv a4, a3 mv s0, a2 mv s1, a1 mv s2, a0 - addi s3, sp, 1888 + addi s3, sp, 1872 li a2, 12 mv a3, s0 fsd fa0, 40(sp) # 8-byte Folded Spill @@ -8028,17 +8026,17 @@ feq.d a1, fs1, fs1 or s4, a0, s4 bnez a1, .LBB3_1 - j .LBB3_30 + j .LBB3_32 .LBB3_1: # %entry.split - addi a0, sp, 1576 + addi a0, sp, 1560 li a2, 648 li a1, 0 call memset@plt li a0, 1023 slli a0, a0, 52 - sd a0, 1648(sp) - sd a0, 1728(sp) - sd a0, 1808(sp) + sd a0, 1632(sp) + sd a0, 1712(sp) + sd a0, 1792(sp) sd a0, 0(s3) sd a0, 160(s3) sd a0, 240(s3) @@ -8046,17 +8044,17 @@ vsetivli zero, 8, e32, m2, ta, ma vid.v v8 vadd.vi v8, v8, 15 - addi a0, sp, 244 + addi a0, sp, 228 vse32.v v8, (a0) li a0, 23 - sw a0, 276(sp) + sw a0, 260(sp) beqz s4, .LBB3_3 .LBB3_2: # %while.end csrr a0, vlenb li a1, 10 mul a0, a0, a1 add sp, sp, a0 - addi sp, sp, 656 + addi sp, sp, 640 ld ra, 2024(sp) # 8-byte Folded Reload ld s0, 2016(sp) # 8-byte Folded Reload ld s1, 2008(sp) # 8-byte Folded Reload @@ -8095,7 +8093,7 @@ vsetvli zero, zero, e64, m4, ta, ma vmv.v.i v8, 0 addi a1, sp, 2047 - addi a1, a1, 433 + addi a1, a1, 417 vs4r.v v8, (a1) # Unknown-size Folded Spill srli s11, a0, 2 addi s8, s11, 8 @@ -8105,7 +8103,7 @@ slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 2047 - addi a0, a0, 433 + addi a0, a0, 417 vs2r.v v8, (a0) # Unknown-size Folded Spill li s9, 72 vmv.v.i v8, 0 @@ -8114,7 +8112,7 @@ mul a0, a0, a1 add a0, sp, a0 addi a0, a0, 2047 - addi a0, a0, 433 + addi a0, a0, 417 vs2r.v v8, (a0) # Unknown-size Folded Spill j .LBB3_5 .LBB3_4: # %if.end317 @@ -8136,19 +8134,19 @@ sd a2, 56(sp) # 8-byte Folded Spill vsetivli zero, 8, e64, m4, ta, ma addi a0, sp, 2047 - addi a0, a0, 433 + addi a0, a0, 417 vl4r.v v8, (a0) # Unknown-size Folded Reload addi a0, sp, 2047 - addi a0, a0, 177 + addi a0, a0, 161 vse64.v v8, (a0) sd zero, 400(s3) addi a0, sp, 2047 - addi a0, a0, 337 + addi a0, a0, 321 vse64.v v8, (a0) - lw a2, 244(sp) + lw a2, 228(sp) sd zero, 560(s3) addi a0, sp, 2047 - addi a0, a0, 257 + addi a0, a0, 241 vse64.v v8, (a0) sd zero, 480(s3) li a3, 14 @@ -8157,8 +8155,8 @@ fld fs9, 24(sp) # 8-byte Folded Reload fmv.d fa0, fs9 call scale_grid@plt - lw a2, 248(sp) - lw a3, 244(sp) + lw a2, 232(sp) + lw a3, 228(sp) mv a0, s2 mv a1, s1 fld fs1, 40(sp) # 8-byte Folded Reload @@ -8166,49 +8164,49 @@ fld fs0, 48(sp) # 8-byte Folded Reload fmv.d fa1, fs0 call apply_op@plt - lw a2, 252(sp) - lw a3, 248(sp) + lw a2, 236(sp) + lw a3, 232(sp) mv a0, s2 mv a1, s1 fmv.d fa0, fs1 fmv.d fa1, fs0 call apply_op@plt - lw a2, 256(sp) - lw a3, 252(sp) + lw a2, 240(sp) + lw a3, 236(sp) mv a0, s2 mv a1, s1 fmv.d fa0, fs1 fmv.d fa1, fs0 call apply_op@plt - lw a2, 260(sp) - lw a3, 256(sp) + lw a2, 244(sp) + lw a3, 240(sp) mv a0, s2 mv a1, s1 fmv.d fa0, fs1 fmv.d fa1, fs0 call apply_op@plt - lw a2, 264(sp) + lw a2, 248(sp) li a3, 13 mv a0, s2 mv a1, s1 fmv.d fa0, fs9 call scale_grid@plt - lw a2, 268(sp) - lw a3, 264(sp) + lw a2, 252(sp) + lw a3, 248(sp) mv a0, s2 mv a1, s1 fmv.d fa0, fs1 fmv.d fa1, fs0 call apply_op@plt - lw a2, 272(sp) - lw a3, 268(sp) + lw a2, 256(sp) + lw a3, 252(sp) mv a0, s2 mv a1, s1 fmv.d fa0, fs1 fmv.d fa1, fs0 call apply_op@plt - lw a2, 276(sp) - lw a3, 272(sp) + lw a2, 260(sp) + lw a3, 256(sp) mv a0, s2 mv a1, s1 fmv.d fa0, fs1 @@ -8217,32 +8215,32 @@ lw a0, 1316(s2) addi a0, a0, 1 sw a0, 1316(s2) - addi a2, sp, 280 - addi a3, sp, 244 - addi a4, sp, 244 + addi a2, sp, 264 + addi a3, sp, 228 + addi a4, sp, 228 li a5, 9 li a6, 9 li a7, 1 mv a0, s2 mv a1, s1 call matmul_grids@plt - addi a0, sp, 928 - addi a1, sp, 280 + addi a0, sp, 912 + addi a1, sp, 264 li a2, 648 call memcpy@plt li s4, 0 neg a0, s11 and s10, s8, a0 - fmv.d fs10, fs9 - fmv.d fs1, fs7 - fmv.d fs6, fs7 - fmv.d fs8, fs7 + fmv.d ft6, fs9 + fmv.d fs10, fs7 fmv.d fs2, fs7 + fmv.d fs11, fs7 fmv.d fs5, fs7 - fmv.d fa3, fs7 fmv.d fs4, fs7 + fmv.d fs3, fs7 + fmv.d fs1, fs7 fmv.d fs0, fs7 - fmv.d fs11, fs7 + fmv.d ft5, fs7 fmv.d ft4, fs7 fmv.d ft10, fs7 fmv.d ft9, fs7 @@ -8251,20 +8249,20 @@ fmv.d fa6, fs7 fmv.d fs9, fs7 fmv.d ft11, fs7 - fmv.d ft7, fs7 + fsd fs7, 136(sp) # 8-byte Folded Spill + fsd fs7, 144(sp) # 8-byte Folded Spill + fsd fs7, 152(sp) # 8-byte Folded Spill fsd fs7, 160(sp) # 8-byte Folded Spill fsd fs7, 168(sp) # 8-byte Folded Spill fsd fs7, 176(sp) # 8-byte Folded Spill fsd fs7, 184(sp) # 8-byte Folded Spill fsd fs7, 192(sp) # 8-byte Folded Spill fsd fs7, 200(sp) # 8-byte Folded Spill - fsd fs7, 208(sp) # 8-byte Folded Spill - fsd fs7, 216(sp) # 8-byte Folded Spill csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 2047 - addi a0, a0, 433 + addi a0, a0, 417 vl2r.v v26, (a0) # Unknown-size Folded Reload li a5, 4 .LBB3_6: # %for.body131 @@ -8279,31 +8277,30 @@ addi a1, a1, 1 sw a1, 1312(s2) vsetvli a1, zero, e64, m2, ta, ma - vfmv.v.f v8, fs10 + vfmv.v.f v8, ft6 csrr a1, vlenb slli a1, a1, 3 add a1, sp, a1 addi a1, a1, 2047 - addi a1, a1, 433 + addi a1, a1, 417 vs2r.v v8, (a1) # Unknown-size Folded Spill - vfmv.v.f v10, fs1 - vfmv.v.f v12, fs6 - vfmv.v.f v14, fs8 - vfmv.v.f v16, fs2 - vfmv.v.f v18, fs5 - fsd fa3, 232(sp) # 8-byte Folded Spill - vfmv.v.f v20, fa3 - vfmv.v.f v22, fs4 + vfmv.v.f v10, fs10 + vfmv.v.f v12, fs2 + vfmv.v.f v14, fs11 + vfmv.v.f v16, fs5 + vfmv.v.f v18, fs4 + vfmv.v.f v20, fs3 + vfmv.v.f v22, fs1 vfmv.v.f v24, fs0 addi a1, sp, 2047 - addi a1, a1, 177 - addi a2, sp, 1576 + addi a1, a1, 161 + addi a2, sp, 1560 csrr a3, vlenb li a4, 6 mul a3, a3, a4 add a3, sp, a3 addi a3, a3, 2047 - addi a3, a3, 433 + addi a3, a3, 417 vl2r.v v6, (a3) # Unknown-size Folded Reload .LBB3_7: # %vector.body508 # Parent Loop BB3_5 Depth=1 @@ -8319,7 +8316,7 @@ slli a3, a3, 3 add a3, sp, a3 addi a3, a3, 2047 - addi a3, a3, 433 + addi a3, a3, 417 vl2r.v v30, (a3) # Unknown-size Folded Reload vfmadd.vv v26, v30, v6 vfmadd.vv v28, v10, v26 @@ -8360,29 +8357,29 @@ fld ft2, 344(s3) fld ft1, 352(s3) fld ft0, 360(s3) - fld fa5, 368(s3) + fld fa1, 368(s3) fld fa2, 376(s3) fld fa3, 384(s3) fld fa4, 392(s3) - fld fa1, 400(s3) + fld fa5, 400(s3) vfmv.v.f v10, ft3 csrr a1, vlenb slli a1, a1, 3 add a1, sp, a1 addi a1, a1, 2047 - addi a1, a1, 433 + addi a1, a1, 417 vs2r.v v10, (a1) # Unknown-size Folded Spill vfmv.v.f v10, ft2 vfmv.v.f v12, ft1 vfmv.v.f v14, ft0 - vfmv.v.f v16, fa5 + vfmv.v.f v16, fa1 vfmv.v.f v18, fa2 vfmv.v.f v20, fa3 vfmv.v.f v22, fa4 - vfmv.v.f v24, fa1 + vfmv.v.f v24, fa5 addi a1, sp, 2047 - addi a1, a1, 337 - addi a2, sp, 928 + addi a1, a1, 321 + addi a2, sp, 912 .LBB3_9: # %vector.body464 # Parent Loop BB3_5 Depth=1 # Parent Loop BB3_6 Depth=2 @@ -8396,7 +8393,7 @@ slli a3, a3, 3 add a3, sp, a3 addi a3, a3, 2047 - addi a3, a3, 433 + addi a3, a3, 417 vl2r.v v30, (a3) # Unknown-size Folded Reload vfmadd.vv v26, v30, v6 vfmadd.vv v28, v10, v26 @@ -8432,32 +8429,33 @@ bne s10, a0, .LBB3_9 # %bb.10: # %vector.ph415 # in Loop: Header=BB3_6 Depth=2 - fsd ft7, 104(sp) # 8-byte Folded Spill + fsd ft6, 216(sp) # 8-byte Folded Spill li a0, 0 - vfmv.v.f v10, fs11 + fsd ft5, 80(sp) # 8-byte Folded Spill + vfmv.v.f v10, ft5 csrr a1, vlenb slli a1, a1, 3 add a1, sp, a1 addi a1, a1, 2047 - addi a1, a1, 433 + addi a1, a1, 417 vs2r.v v10, (a1) # Unknown-size Folded Spill - fsd ft4, 112(sp) # 8-byte Folded Spill + fsd ft4, 88(sp) # 8-byte Folded Spill vfmv.v.f v10, ft4 - fsd ft10, 120(sp) # 8-byte Folded Spill + fsd ft10, 96(sp) # 8-byte Folded Spill vfmv.v.f v12, ft10 - fsd ft9, 128(sp) # 8-byte Folded Spill + fsd ft9, 104(sp) # 8-byte Folded Spill vfmv.v.f v14, ft9 - fsd ft8, 136(sp) # 8-byte Folded Spill + fsd ft8, 112(sp) # 8-byte Folded Spill vfmv.v.f v16, ft8 - fsd fa7, 144(sp) # 8-byte Folded Spill + fsd fa7, 120(sp) # 8-byte Folded Spill vfmv.v.f v18, fa7 - fsd fa6, 152(sp) # 8-byte Folded Spill + fsd fa6, 128(sp) # 8-byte Folded Spill vfmv.v.f v20, fa6 vfmv.v.f v22, fs9 vfmv.v.f v24, ft11 addi a1, sp, 2047 - addi a1, a1, 257 - addi a2, sp, 928 + addi a1, a1, 241 + addi a2, sp, 912 .LBB3_11: # %vector.body420 # Parent Loop BB3_5 Depth=1 # Parent Loop BB3_6 Depth=2 @@ -8471,7 +8469,7 @@ slli a3, a3, 3 add a3, sp, a3 addi a3, a3, 2047 - addi a3, a3, 433 + addi a3, a3, 417 vl2r.v v30, (a3) # Unknown-size Folded Reload vfmadd.vv v26, v30, v6 vfmadd.vv v28, v10, v26 @@ -8515,46 +8513,49 @@ fld ft8, 544(s3) fld ft9, 552(s3) fld ft10, 560(s3) - fmadd.d ft4, fs10, ft4, fa0 - fmadd.d ft4, fs1, ft5, ft4 - fmadd.d ft4, fs6, ft6, ft4 - fmadd.d ft4, fs8, ft7, ft4 - fmadd.d ft4, fs2, fa6, ft4 - fmadd.d ft4, fs5, fa7, ft4 - fld ft5, 232(sp) # 8-byte Folded Reload - fmadd.d ft4, ft5, ft8, ft4 - fmv.d fs3, fs4 - fmadd.d ft4, fs4, ft9, ft4 - fsd fs0, 224(sp) # 8-byte Folded Spill + fld fs6, 216(sp) # 8-byte Folded Reload + fmadd.d ft4, fs6, ft4, fa0 + fmadd.d ft4, fs10, ft5, ft4 + fmadd.d ft4, fs2, ft6, ft4 + fmadd.d ft4, fs11, ft7, ft4 + fmadd.d ft4, fs5, fa6, ft4 + fmadd.d ft4, fs4, fa7, ft4 + fmadd.d ft4, fs3, ft8, ft4 + fmadd.d ft4, fs1, ft9, ft4 + fsd fs0, 208(sp) # 8-byte Folded Spill fmadd.d ft4, fs0, ft10, ft4 feq.d a0, ft4, fa0 li s6, 1 - bnez a0, .LBB3_25 + bnez a0, .LBB3_24 # %bb.13: # %if.end216 # in Loop: Header=BB3_6 Depth=2 - fmv.d fs4, fs10 - fmv.d fs10, fs1 + fmv.d fs8, fs2 + fmv.d fs2, fs11 + fmv.d fs6, fs5 + fmv.d fs5, fs4 + fmv.d fs4, fs3 + fmv.d fs11, fs1 fld ft5, 416(s3) fld ft6, 424(s3) fld ft7, 432(s3) - fmadd.d ft5, fs11, ft5, fa0 + fld fs3, 80(sp) # 8-byte Folded Reload + fmadd.d ft5, fs3, ft5, fa0 fld fa6, 440(s3) - fmv.d fs1, fs11 - fld fs11, 112(sp) # 8-byte Folded Reload - fmadd.d ft5, fs11, ft6, ft5 - fld ft10, 120(sp) # 8-byte Folded Reload + fld fs1, 88(sp) # 8-byte Folded Reload + fmadd.d ft5, fs1, ft6, ft5 + fld ft10, 96(sp) # 8-byte Folded Reload fmadd.d ft5, ft10, ft7, ft5 fld ft6, 448(s3) - fld ft9, 128(sp) # 8-byte Folded Reload + fld ft9, 104(sp) # 8-byte Folded Reload fmadd.d ft5, ft9, fa6, ft5 fld ft7, 456(s3) fld fa6, 464(s3) - fld ft8, 136(sp) # 8-byte Folded Reload + fld ft8, 112(sp) # 8-byte Folded Reload fmadd.d ft5, ft8, ft6, ft5 fld ft6, 472(s3) - fld fa7, 144(sp) # 8-byte Folded Reload + fld fa7, 120(sp) # 8-byte Folded Reload fmadd.d ft5, fa7, ft7, ft5 - fld ft7, 152(sp) # 8-byte Folded Reload + fld ft7, 128(sp) # 8-byte Folded Reload fmadd.d ft5, ft7, fa6, ft5 fmv.d fa6, ft7 fld ft7, 480(s3) @@ -8566,81 +8567,75 @@ fdiv.d ft4, fs0, ft4 fabs.d ft5, ft4 feq.d a0, ft5, ft6 - bnez a0, .LBB3_26 + bnez a0, .LBB3_25 # %bb.14: # %for.body.i147.preheader # in Loop: Header=BB3_6 Depth=2 - fmul.d ft5, ft4, fs4 - fld ft7, 104(sp) # 8-byte Folded Reload + fld ft6, 216(sp) # 8-byte Folded Reload + fmul.d ft5, ft4, ft6 + fld ft7, 136(sp) # 8-byte Folded Reload fadd.d ft7, ft7, ft5 + fsd ft7, 136(sp) # 8-byte Folded Spill fmul.d ft5, ft4, fs10 - fld ft6, 160(sp) # 8-byte Folded Reload - fadd.d ft6, ft6, ft5 - fsd ft6, 160(sp) # 8-byte Folded Spill - fsd fs6, 104(sp) # 8-byte Folded Spill - fmul.d ft5, ft4, fs6 - fld ft6, 168(sp) # 8-byte Folded Reload - fadd.d ft6, ft6, ft5 - fsd ft6, 168(sp) # 8-byte Folded Spill - fsd fs8, 88(sp) # 8-byte Folded Spill + fld ft7, 144(sp) # 8-byte Folded Reload + fadd.d ft7, ft7, ft5 + fsd ft7, 144(sp) # 8-byte Folded Spill fmul.d ft5, ft4, fs8 - fld ft6, 176(sp) # 8-byte Folded Reload - fadd.d ft6, ft6, ft5 - fsd ft6, 176(sp) # 8-byte Folded Spill - fsd fs2, 72(sp) # 8-byte Folded Spill + fld ft7, 152(sp) # 8-byte Folded Reload + fadd.d ft7, ft7, ft5 + fsd ft7, 152(sp) # 8-byte Folded Spill fmul.d ft5, ft4, fs2 - fld ft6, 184(sp) # 8-byte Folded Reload - fadd.d ft6, ft6, ft5 - fsd ft6, 184(sp) # 8-byte Folded Spill - fsd fs5, 80(sp) # 8-byte Folded Spill + fld ft7, 160(sp) # 8-byte Folded Reload + fadd.d ft7, ft7, ft5 + fsd ft7, 160(sp) # 8-byte Folded Spill + fmul.d ft5, ft4, fs6 + fld ft7, 168(sp) # 8-byte Folded Reload + fadd.d ft7, ft7, ft5 + fsd ft7, 168(sp) # 8-byte Folded Spill fmul.d ft5, ft4, fs5 - fld ft6, 192(sp) # 8-byte Folded Reload - fadd.d ft6, ft6, ft5 - fsd ft6, 192(sp) # 8-byte Folded Spill - fld ft5, 232(sp) # 8-byte Folded Reload - fmv.d fs2, ft5 - fmul.d ft5, ft4, ft5 - fld ft6, 200(sp) # 8-byte Folded Reload - fadd.d ft6, ft6, ft5 - fsd ft6, 200(sp) # 8-byte Folded Spill - fmv.d fs5, fs3 - fmul.d ft5, ft4, fs3 - fld ft6, 208(sp) # 8-byte Folded Reload - fadd.d ft6, ft6, ft5 - fsd ft6, 208(sp) # 8-byte Folded Spill - fld ft5, 224(sp) # 8-byte Folded Reload + fld ft7, 176(sp) # 8-byte Folded Reload + fadd.d ft7, ft7, ft5 + fsd ft7, 176(sp) # 8-byte Folded Spill + fmul.d ft5, ft4, fs4 + fld ft7, 184(sp) # 8-byte Folded Reload + fadd.d ft7, ft7, ft5 + fsd ft7, 184(sp) # 8-byte Folded Spill + fmul.d ft5, ft4, fs11 + fld ft7, 192(sp) # 8-byte Folded Reload + fadd.d ft7, ft7, ft5 + fsd ft7, 192(sp) # 8-byte Folded Spill + fld ft5, 208(sp) # 8-byte Folded Reload fmul.d ft5, ft4, ft5 - fld ft6, 216(sp) # 8-byte Folded Reload - fadd.d ft6, ft6, ft5 - fsd ft6, 216(sp) # 8-byte Folded Spill + fld ft7, 200(sp) # 8-byte Folded Reload + fadd.d ft7, ft7, ft5 + fsd ft7, 200(sp) # 8-byte Folded Spill fmul.d ft3, ft4, ft3 - fsub.d fs1, fs1, ft3 + fsub.d fs3, fs3, ft3 fmul.d ft2, ft4, ft2 - fsub.d fs11, fs11, ft2 + fsub.d fs1, fs1, ft2 fmul.d ft1, ft4, ft1 fsub.d ft10, ft10, ft1 fmul.d ft0, ft4, ft0 fsub.d ft9, ft9, ft0 - fmul.d ft0, ft4, fa5 - fsub.d ft8, ft8, ft0 + fmul.d fa1, ft4, fa1 + fsub.d ft8, ft8, fa1 fmul.d fa2, ft4, fa2 fsub.d fa7, fa7, fa2 fmul.d fa3, ft4, fa3 fsub.d fa6, fa6, fa3 fmul.d fa4, ft4, fa4 fsub.d fs9, fs9, fa4 - fmul.d fa5, ft4, fa1 + fmul.d fa5, ft4, fa5 fsub.d ft11, ft11, fa5 neg a1, s11 and a1, s8, a1 - fmv.d fs3, fs1 - vfmv.v.f v10, fs1 + vfmv.v.f v10, fs3 csrr a2, vlenb slli a2, a2, 3 add a2, sp, a2 addi a2, a2, 2047 - addi a2, a2, 433 + addi a2, a2, 417 vs2r.v v10, (a2) # Unknown-size Folded Spill - vfmv.v.f v10, fs11 + vfmv.v.f v10, fs1 vfmv.v.f v12, ft10 vfmv.v.f v14, ft9 vfmv.v.f v16, ft8 @@ -8649,16 +8644,17 @@ vfmv.v.f v22, fs9 vfmv.v.f v24, ft11 addi a2, sp, 2047 - addi a2, a2, 257 - addi a3, sp, 928 + addi a2, a2, 241 + addi a3, sp, 912 csrr a4, vlenb li a6, 6 mul a4, a4, a6 add a4, sp, a4 addi a4, a4, 2047 - addi a4, a4, 433 + addi a4, a4, 417 vl2r.v v6, (a4) # Unknown-size Folded Reload - fmv.d ft4, fs11 + fmv.d ft4, fs1 + fmv.d ft5, fs3 .LBB3_15: # %vector.body # Parent Loop BB3_5 Depth=1 # Parent Loop BB3_6 Depth=2 @@ -8672,7 +8668,7 @@ slli a4, a4, 3 add a4, sp, a4 addi a4, a4, 2047 - addi a4, a4, 433 + addi a4, a4, 417 vl2r.v v30, (a4) # Unknown-size Folded Reload vfmadd.vv v26, v30, v6 vfmadd.vv v28, v10, v26 @@ -8709,26 +8705,26 @@ # in Loop: Header=BB3_6 Depth=2 vmv2r.v v26, v8 fld fa5, 416(s3) - fmv.d fs11, fs3 - fmadd.d fa5, fs3, fa5, fa0 + fmadd.d fa5, ft5, fa5, fa0 fld fa4, 424(s3) fld fa3, 432(s3) fld fa2, 440(s3) - fld ft0, 448(s3) + fld fa1, 448(s3) fmadd.d fa5, ft4, fa4, fa5 fmadd.d fa5, ft10, fa3, fa5 fmadd.d fa5, ft9, fa2, fa5 - fmadd.d fa5, ft8, ft0, fa5 + fmadd.d fa5, ft8, fa1, fa5 fld fa4, 456(s3) fld fa3, 464(s3) fld fa2, 472(s3) - fld ft0, 480(s3) + fld fa1, 480(s3) fmadd.d fa5, fa7, fa4, fa5 fmadd.d fa5, fa6, fa3, fa5 - fsd fs9, 96(sp) # 8-byte Folded Spill + fsd fs9, 72(sp) # 8-byte Folded Spill fmadd.d fa5, fs9, fa2, fa5 - fmadd.d fs9, ft11, ft0, fa5 + fmadd.d fs9, ft11, fa1, fa5 flt.d a0, fa0, fs9 + fmv.d fs1, fs11 beqz a0, .LBB3_18 # %bb.17: # %if.then256 # in Loop: Header=BB3_6 Depth=2 @@ -8739,151 +8735,158 @@ # in Loop: Header=BB3_6 Depth=2 fld fa5, 64(sp) # 8-byte Folded Reload flt.d a0, fa0, fa5 - fmv.d fs1, fs10 bnez a0, .LBB3_23 .LBB3_19: # %if.end261 # in Loop: Header=BB3_6 Depth=2 fmv.d.x fa5, zero feq.d a0, fs9, fa5 li s6, 1 - fmv.d fs3, fs5 - fmv.d fs10, fs4 - bnez a0, .LBB3_24 + fmv.d fs3, fs4 + fmv.d fs11, fs2 + bnez a0, .LBB3_27 # %bb.20: # %if.end264 # in Loop: Header=BB3_6 Depth=2 fdiv.d fa5, fs9, fs0 fclass.d a0, fa5 andi a0, a0, 153 - bnez a0, .LBB3_24 + fmv.d fs4, fs5 + fmv.d fs2, fs8 + bnez a0, .LBB3_28 # %bb.21: # %for.body.i170.preheader # in Loop: Header=BB3_6 Depth=2 - fmv.d fa2, fs2 + fmul.d fa4, fa5, ft6 + fadd.d ft6, ft5, fa4 fmul.d fa4, fa5, fs10 - fadd.d fs10, fs11, fa4 - fmul.d fa4, fa5, fs1 - fadd.d fs1, ft4, fa4 - fld fa4, 104(sp) # 8-byte Folded Reload - fmul.d fa4, fa5, fa4 - fadd.d fs6, ft10, fa4 - fld fa4, 88(sp) # 8-byte Folded Reload - fmul.d fa4, fa5, fa4 - fadd.d fs8, ft9, fa4 - fld fa4, 72(sp) # 8-byte Folded Reload - fmul.d fa4, fa5, fa4 - fadd.d fs2, ft8, fa4 - fld fa4, 80(sp) # 8-byte Folded Reload - fmul.d fa4, fa5, fa4 - fadd.d fs5, fa7, fa4 - fmul.d fa4, fa5, fa2 - fadd.d fa3, fa6, fa4 + fadd.d fs10, ft4, fa4 + fmul.d fa4, fa5, fs2 + fadd.d fs2, ft10, fa4 + fmul.d fa4, fa5, fs11 + fadd.d fs11, ft9, fa4 + fmul.d fa4, fa5, fs6 + fadd.d fs5, ft8, fa4 + fmul.d fa4, fa5, fs4 + fadd.d fs4, fa7, fa4 fmul.d fa4, fa5, fs3 - fld fs9, 96(sp) # 8-byte Folded Reload - fadd.d fs4, fs9, fa4 - fld fa4, 224(sp) # 8-byte Folded Reload + fadd.d fs3, fa6, fa4 + fmul.d fa4, fa5, fs1 + fld fs9, 72(sp) # 8-byte Folded Reload + fadd.d fs1, fs9, fa4 + fld fa4, 208(sp) # 8-byte Folded Reload fmul.d fa5, fa5, fa4 addiw s4, s4, 1 fadd.d fs0, ft11, fa5 bne s4, a5, .LBB3_6 - j .LBB3_27 + j .LBB3_29 .LBB3_22: # %call.sqrt658 # in Loop: Header=BB3_6 Depth=2 fmv.d fa0, fs9 - fsd ft11, 112(sp) # 8-byte Folded Spill - fsd fa6, 152(sp) # 8-byte Folded Spill - fsd fa7, 144(sp) # 8-byte Folded Spill - fsd ft8, 136(sp) # 8-byte Folded Spill - fsd ft9, 128(sp) # 8-byte Folded Spill - fsd ft10, 120(sp) # 8-byte Folded Spill - fmv.d fs11, ft4 - fmv.d fs1, ft7 + fsd ft11, 88(sp) # 8-byte Folded Spill + fsd fa6, 128(sp) # 8-byte Folded Spill + fsd fa7, 120(sp) # 8-byte Folded Spill + fsd ft8, 112(sp) # 8-byte Folded Spill + fsd ft9, 104(sp) # 8-byte Folded Spill + fsd ft10, 96(sp) # 8-byte Folded Spill + fmv.d fs1, ft4 + fmv.d fs3, ft5 call sqrt@plt - fmv.d ft7, fs1 - fmv.d ft4, fs11 - fmv.d fs11, fs3 - fld ft10, 120(sp) # 8-byte Folded Reload - fld ft9, 128(sp) # 8-byte Folded Reload - fld ft8, 136(sp) # 8-byte Folded Reload - fld fa7, 144(sp) # 8-byte Folded Reload - fld fa6, 152(sp) # 8-byte Folded Reload - fld ft11, 112(sp) # 8-byte Folded Reload + fld ft6, 216(sp) # 8-byte Folded Reload + fmv.d ft5, fs3 + fmv.d ft4, fs1 + fmv.d fs1, fs11 + fld ft10, 96(sp) # 8-byte Folded Reload + fld ft9, 104(sp) # 8-byte Folded Reload + fld ft8, 112(sp) # 8-byte Folded Reload + fld fa7, 120(sp) # 8-byte Folded Reload + fld fa6, 128(sp) # 8-byte Folded Reload + fld ft11, 88(sp) # 8-byte Folded Reload li a5, 4 csrr a0, vlenb slli a0, a0, 2 add a0, sp, a0 addi a0, a0, 2047 - addi a0, a0, 433 + addi a0, a0, 417 vl2r.v v26, (a0) # Unknown-size Folded Reload fld fa5, 64(sp) # 8-byte Folded Reload flt.d a0, fa0, fa5 - fmv.d fs1, fs10 beqz a0, .LBB3_19 .LBB3_23: # in Loop: Header=BB3_5 Depth=1 - fsd ft4, 112(sp) # 8-byte Folded Spill - fsd ft10, 120(sp) # 8-byte Folded Spill - fsd ft9, 128(sp) # 8-byte Folded Spill - fsd ft8, 136(sp) # 8-byte Folded Spill - fsd fa7, 144(sp) # 8-byte Folded Spill - fsd fa6, 152(sp) # 8-byte Folded Spill + fsd ft5, 80(sp) # 8-byte Folded Spill + fsd ft4, 88(sp) # 8-byte Folded Spill + fsd ft10, 96(sp) # 8-byte Folded Spill + fsd ft9, 104(sp) # 8-byte Folded Spill + fsd ft8, 112(sp) # 8-byte Folded Spill + fsd fa7, 120(sp) # 8-byte Folded Spill + fsd fa6, 128(sp) # 8-byte Folded Spill fmv.d fs0, ft11 li s6, 0 li s4, 1 li s10, 1 - fmv.d fs3, fs5 - fld fs5, 80(sp) # 8-byte Folded Reload - fld fs2, 72(sp) # 8-byte Folded Reload - fld fs8, 88(sp) # 8-byte Folded Reload - fld fs6, 104(sp) # 8-byte Folded Reload - fmv.d fs10, fs4 - j .LBB3_28 + j .LBB3_26 .LBB3_24: # in Loop: Header=BB3_5 Depth=1 - fsd ft4, 112(sp) # 8-byte Folded Spill - fsd ft10, 120(sp) # 8-byte Folded Spill - fsd ft9, 128(sp) # 8-byte Folded Spill - fsd ft8, 136(sp) # 8-byte Folded Spill - fsd fa7, 144(sp) # 8-byte Folded Spill - fsd fa6, 152(sp) # 8-byte Folded Spill + fsd fs9, 72(sp) # 8-byte Folded Spill fmv.d fs0, ft11 li s4, 0 li s10, 1 - fld fs5, 80(sp) # 8-byte Folded Reload - fld fs2, 72(sp) # 8-byte Folded Reload - fld fs8, 88(sp) # 8-byte Folded Reload - fld fs6, 104(sp) # 8-byte Folded Reload - j .LBB3_28 + j .LBB3_30 .LBB3_25: # in Loop: Header=BB3_5 Depth=1 - fsd fs9, 96(sp) # 8-byte Folded Spill + fsd fs9, 72(sp) # 8-byte Folded Spill fmv.d fs0, ft11 li s4, 0 li s10, 1 - fld ft7, 104(sp) # 8-byte Folded Reload - j .LBB3_28 -.LBB3_26: # in Loop: Header=BB3_5 Depth=1 - fsd fs9, 96(sp) # 8-byte Folded Spill + fmv.d fs1, fs11 +.LBB3_26: # %for.end278 + # in Loop: Header=BB3_5 Depth=1 + fmv.d fs3, fs4 + fmv.d fs4, fs5 + fmv.d fs5, fs6 + fmv.d fs11, fs2 + fmv.d fs2, fs8 + j .LBB3_30 +.LBB3_27: # in Loop: Header=BB3_5 Depth=1 + fsd ft5, 80(sp) # 8-byte Folded Spill + fsd ft4, 88(sp) # 8-byte Folded Spill + fsd ft10, 96(sp) # 8-byte Folded Spill + fsd ft9, 104(sp) # 8-byte Folded Spill + fsd ft8, 112(sp) # 8-byte Folded Spill + fsd fa7, 120(sp) # 8-byte Folded Spill + fsd fa6, 128(sp) # 8-byte Folded Spill fmv.d fs0, ft11 li s4, 0 li s10, 1 - fmv.d fs11, fs1 - fmv.d fs1, fs10 - fmv.d fs10, fs4 - fld ft7, 104(sp) # 8-byte Folded Reload - j .LBB3_28 -.LBB3_27: # in Loop: Header=BB3_5 Depth=1 - fsd fa3, 232(sp) # 8-byte Folded Spill - fmv.d fs3, fs4 - fsd ft4, 112(sp) # 8-byte Folded Spill - fsd fs0, 224(sp) # 8-byte Folded Spill - fsd ft10, 120(sp) # 8-byte Folded Spill - fsd ft9, 128(sp) # 8-byte Folded Spill - fsd ft8, 136(sp) # 8-byte Folded Spill - fsd fa7, 144(sp) # 8-byte Folded Spill - fsd fa6, 152(sp) # 8-byte Folded Spill + fmv.d fs4, fs5 + fmv.d fs5, fs6 + fmv.d fs2, fs8 + j .LBB3_30 +.LBB3_28: # in Loop: Header=BB3_5 Depth=1 + fsd ft5, 80(sp) # 8-byte Folded Spill + fsd ft4, 88(sp) # 8-byte Folded Spill + fsd ft10, 96(sp) # 8-byte Folded Spill + fsd ft9, 104(sp) # 8-byte Folded Spill + fsd ft8, 112(sp) # 8-byte Folded Spill + fsd fa7, 120(sp) # 8-byte Folded Spill + fsd fa6, 128(sp) # 8-byte Folded Spill + fmv.d fs0, ft11 + li s4, 0 + li s10, 1 + fmv.d fs5, fs6 + j .LBB3_30 +.LBB3_29: # in Loop: Header=BB3_5 Depth=1 + fsd ft6, 216(sp) # 8-byte Folded Spill + fsd ft5, 80(sp) # 8-byte Folded Spill + fsd ft4, 88(sp) # 8-byte Folded Spill + fsd fs0, 208(sp) # 8-byte Folded Spill + fsd ft10, 96(sp) # 8-byte Folded Spill + fsd ft9, 104(sp) # 8-byte Folded Spill + fsd ft8, 112(sp) # 8-byte Folded Spill + fsd fa7, 120(sp) # 8-byte Folded Spill + fsd fa6, 128(sp) # 8-byte Folded Spill fmv.d fs0, ft11 li s10, 0 li s6, 1 li s4, 1 -.LBB3_28: # %for.end278 +.LBB3_30: # %for.end278 # in Loop: Header=BB3_5 Depth=1 - lw a4, 244(sp) + lw a4, 228(sp) ld a0, 32(sp) # 8-byte Folded Reload fld fs9, %pcrel_lo(.Lpcrel_hi7)(a0) mv a0, s2 @@ -8891,213 +8894,213 @@ mv a2, s0 fmv.d fa0, fs9 mv a3, s0 - fmv.d fa1, ft7 + fld fa1, 136(sp) # 8-byte Folded Reload call add_grids@plt - lw a4, 248(sp) + lw a4, 232(sp) mv a0, s2 mv a1, s1 mv a2, s0 fmv.d fa0, fs9 mv a3, s0 - fld fa1, 160(sp) # 8-byte Folded Reload + fld fa1, 144(sp) # 8-byte Folded Reload call add_grids@plt - lw a4, 252(sp) + lw a4, 236(sp) mv a0, s2 mv a1, s1 mv a2, s0 fmv.d fa0, fs9 mv a3, s0 - fld fa1, 168(sp) # 8-byte Folded Reload + fld fa1, 152(sp) # 8-byte Folded Reload call add_grids@plt - lw a4, 256(sp) + lw a4, 240(sp) mv a0, s2 mv a1, s1 mv a2, s0 fmv.d fa0, fs9 mv a3, s0 - fld fa1, 176(sp) # 8-byte Folded Reload + fld fa1, 160(sp) # 8-byte Folded Reload call add_grids@plt - lw a4, 260(sp) + lw a4, 244(sp) mv a0, s2 mv a1, s1 mv a2, s0 fmv.d fa0, fs9 mv a3, s0 - fld fa1, 184(sp) # 8-byte Folded Reload + fld fa1, 168(sp) # 8-byte Folded Reload call add_grids@plt - lw a4, 264(sp) + lw a4, 248(sp) mv a0, s2 mv a1, s1 mv a2, s0 fmv.d fa0, fs9 mv a3, s0 - fld fa1, 192(sp) # 8-byte Folded Reload + fld fa1, 176(sp) # 8-byte Folded Reload call add_grids@plt - lw a4, 268(sp) + lw a4, 252(sp) mv a0, s2 mv a1, s1 mv a2, s0 fmv.d fa0, fs9 mv a3, s0 - fld fa1, 200(sp) # 8-byte Folded Reload + fld fa1, 184(sp) # 8-byte Folded Reload call add_grids@plt - lw a4, 272(sp) + lw a4, 256(sp) mv a0, s2 mv a1, s1 mv a2, s0 fmv.d fa0, fs9 mv a3, s0 - fld fa1, 208(sp) # 8-byte Folded Reload + fld fa1, 192(sp) # 8-byte Folded Reload call add_grids@plt - lw a4, 276(sp) + lw a4, 260(sp) mv a0, s2 mv a1, s1 mv a2, s0 fmv.d fa0, fs9 mv a3, s0 - fld fa1, 216(sp) # 8-byte Folded Reload + fld fa1, 200(sp) # 8-byte Folded Reload call add_grids@plt bnez s10, .LBB3_4 -# %bb.29: # %if.then292 +# %bb.31: # %if.then292 # in Loop: Header=BB3_5 Depth=1 - lw a4, 244(sp) - fmv.d.x fs4, zero + lw a4, 228(sp) + fmv.d.x fs6, zero li a2, 14 li a3, 14 mv a0, s2 mv a1, s1 - fmv.d fa0, fs4 - fmv.d fa1, fs10 + fmv.d fa0, fs6 + fld fa1, 216(sp) # 8-byte Folded Reload call add_grids@plt - lw a4, 248(sp) + lw a4, 232(sp) li a2, 14 li a3, 14 mv a0, s2 mv a1, s1 fmv.d fa0, fs9 - fmv.d fa1, fs1 + fmv.d fa1, fs10 call add_grids@plt - lw a4, 252(sp) + lw a4, 236(sp) li a2, 14 li a3, 14 mv a0, s2 mv a1, s1 fmv.d fa0, fs9 - fmv.d fa1, fs6 + fmv.d fa1, fs2 call add_grids@plt - lw a4, 256(sp) + lw a4, 240(sp) li a2, 14 li a3, 14 mv a0, s2 mv a1, s1 fmv.d fa0, fs9 - fmv.d fa1, fs8 + fmv.d fa1, fs11 call add_grids@plt - lw a4, 260(sp) + lw a4, 244(sp) li a2, 14 li a3, 14 mv a0, s2 mv a1, s1 fmv.d fa0, fs9 - fmv.d fa1, fs2 + fmv.d fa1, fs5 call add_grids@plt - lw a4, 264(sp) + lw a4, 248(sp) li a2, 14 li a3, 14 mv a0, s2 mv a1, s1 fmv.d fa0, fs9 - fmv.d fa1, fs5 + fmv.d fa1, fs4 call add_grids@plt - lw a4, 268(sp) + lw a4, 252(sp) li a2, 14 li a3, 14 mv a0, s2 mv a1, s1 fmv.d fa0, fs9 - fld fa1, 232(sp) # 8-byte Folded Reload + fmv.d fa1, fs3 call add_grids@plt - lw a4, 272(sp) + lw a4, 256(sp) li a2, 14 li a3, 14 mv a0, s2 mv a1, s1 fmv.d fa0, fs9 - fmv.d fa1, fs3 + fmv.d fa1, fs1 call add_grids@plt - lw a4, 276(sp) + lw a4, 260(sp) li a2, 14 li a3, 14 mv a0, s2 mv a1, s1 fmv.d fa0, fs9 - fld fa1, 224(sp) # 8-byte Folded Reload + fld fa1, 208(sp) # 8-byte Folded Reload call add_grids@plt - lw a4, 244(sp) + lw a4, 228(sp) li a2, 13 li a3, 13 mv a0, s2 mv a1, s1 - fmv.d fa0, fs4 - fmv.d fa1, fs11 + fmv.d fa0, fs6 + fld fa1, 80(sp) # 8-byte Folded Reload call add_grids@plt - lw a4, 248(sp) + lw a4, 232(sp) li a2, 13 li a3, 13 mv a0, s2 mv a1, s1 fmv.d fa0, fs9 - fld fa1, 112(sp) # 8-byte Folded Reload + fld fa1, 88(sp) # 8-byte Folded Reload call add_grids@plt - lw a4, 252(sp) + lw a4, 236(sp) li a2, 13 li a3, 13 mv a0, s2 mv a1, s1 fmv.d fa0, fs9 - fld fa1, 120(sp) # 8-byte Folded Reload + fld fa1, 96(sp) # 8-byte Folded Reload call add_grids@plt - lw a4, 256(sp) + lw a4, 240(sp) li a2, 13 li a3, 13 mv a0, s2 mv a1, s1 fmv.d fa0, fs9 - fld fa1, 128(sp) # 8-byte Folded Reload + fld fa1, 104(sp) # 8-byte Folded Reload call add_grids@plt - lw a4, 260(sp) + lw a4, 244(sp) li a2, 13 li a3, 13 mv a0, s2 mv a1, s1 fmv.d fa0, fs9 - fld fa1, 136(sp) # 8-byte Folded Reload + fld fa1, 112(sp) # 8-byte Folded Reload call add_grids@plt - lw a4, 264(sp) + lw a4, 248(sp) li a2, 13 li a3, 13 mv a0, s2 mv a1, s1 fmv.d fa0, fs9 - fld fa1, 144(sp) # 8-byte Folded Reload + fld fa1, 120(sp) # 8-byte Folded Reload call add_grids@plt - lw a4, 268(sp) + lw a4, 252(sp) li a2, 13 li a3, 13 mv a0, s2 mv a1, s1 fmv.d fa0, fs9 - fld fa1, 152(sp) # 8-byte Folded Reload + fld fa1, 128(sp) # 8-byte Folded Reload call add_grids@plt - lw a4, 272(sp) + lw a4, 256(sp) li a2, 13 li a3, 13 mv a0, s2 mv a1, s1 fmv.d fa0, fs9 - fld fa1, 96(sp) # 8-byte Folded Reload + fld fa1, 72(sp) # 8-byte Folded Reload call add_grids@plt - lw a4, 276(sp) + lw a4, 260(sp) li a2, 13 li a3, 13 mv a0, s2 @@ -9106,7 +9109,7 @@ fmv.d fa1, fs0 call add_grids@plt j .LBB3_4 -.LBB3_30: # %call.sqrt +.LBB3_32: # %call.sqrt call sqrt@plt fmv.d fs1, fa0 j .LBB3_1 --- build.head//MultiSource/Benchmarks/ASCI_Purple/SMG2000/CMakeFiles/smg2000.dir/struct_axpy.s 2023-11-13 08:03:22.419556898 +0000 +++ build//MultiSource/Benchmarks/ASCI_Purple/SMG2000/CMakeFiles/smg2000.dir/struct_axpy.s 2023-11-13 08:03:17.455700385 +0000 @@ -54,9 +54,9 @@ csrr s5, vlenb slli s6, s5, 1 srli s7, s5, 2 - sd a2, 24(sp) # 8-byte Folded Spill addi a0, sp, 64 vs2r.v v12, (a0) # Unknown-size Folded Spill + sd a2, 24(sp) # 8-byte Folded Spill j .LBB0_3 .LBB0_2: # %for.end335 # in Loop: Header=BB0_3 Depth=1 --- build.head//MultiSource/Benchmarks/Olden/bh/CMakeFiles/bh.dir/newbh.s 2023-11-13 08:03:22.663549845 +0000 +++ build//MultiSource/Benchmarks/Olden/bh/CMakeFiles/bh.dir/newbh.s 2023-11-13 08:03:17.699693332 +0000 @@ -141,12 +141,12 @@ add a1, sp, a1 addi a1, a1, 800 vs1r.v v10, (a1) # Unknown-size Folded Spill - fadd.d fs1, fs1, fa5 + fadd.d fs1, fs1, fa4 addi a1, sp, 800 vl1r.v v8, (a1) # Unknown-size Folded Reload vfadd.vv v8, v8, v9 vs1r.v v8, (a1) # Unknown-size Folded Spill - fadd.d fs0, fs0, fa4 + fadd.d fs0, fs0, fa5 addi s6, s6, 8 addi s9, s9, -1 addiw s1, s1, 1 @@ -174,9 +174,9 @@ call uniform_testdata vsetivli zero, 2, e64, m1, ta, ma vle64.v v8, (s8) - fld fa5, 32(sp) + fld fa4, 32(sp) vle64.v v9, (s5) - fld fa4, 56(sp) + fld fa5, 56(sp) ld a1, 64(sp) ld a0, 72(sp) sd a1, 0(s6) @@ -2274,17 +2274,17 @@ ret .LBB18_2: # %call.sqrt fmv.d fa0, fs0 + addi a3, sp, 32 + vs1r.v v9, (a3) # Unknown-size Folded Spill mv s1, a2 mv s3, a0 mv s2, a1 - addi a0, sp, 32 - vs1r.v v9, (a0) # Unknown-size Folded Spill call sqrt@plt - addi a0, sp, 32 - vl1r.v v9, (a0) # Unknown-size Folded Reload mv a1, s2 mv a0, s3 mv a2, s1 + addi a3, sp, 32 + vl1r.v v9, (a3) # Unknown-size Folded Reload vsetivli zero, 2, e64, m1, ta, ma j .LBB18_1 .Lfunc_end18: --- build.head//MultiSource/Benchmarks/DOE-ProxyApps-C++/CLAMR/CMakeFiles/CLAMR.dir/PowerParser.s 2023-11-13 08:03:22.515554123 +0000 +++ build//MultiSource/Benchmarks/DOE-ProxyApps-C++/CLAMR/CMakeFiles/CLAMR.dir/PowerParser.s 2023-11-13 08:03:17.551697610 +0000 @@ -14604,7 +14604,7 @@ mul a2, a2, a3 sub sp, sp, a2 .cfi_escape 0x0f, 0x0e, 0x72, 0x00, 0x11, 0x80, 0x02, 0x22, 0x11, 0x06, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 256 + 6 * vlenb - mv s10, a1 + mv s9, a1 mv s0, a0 call _ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev@plt addi s3, s0, 544 @@ -14764,7 +14764,7 @@ call _ZNSt11_Deque_baseIN2PP8WhenthenESaIS1_EE17_M_initialize_mapEm .Ltmp755: # %bb.8: # %invoke.cont15 - addi s9, s1, 329 + addi s10, s1, 329 addi a0, s1, 393 vsetivli zero, 2, e64, m1, ta, ma csrr a1, vlenb @@ -14776,9 +14776,9 @@ vsetivli zero, 8, e64, m4, ta, ma addi a0, sp, 144 vl4r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (s9) + vse64.v v8, (s10) .Ltmp757: - mv a0, s9 + mv a0, s10 li a1, 0 call _ZNSt11_Deque_baseIN2PP12RestartblockESaIS1_EE17_M_initialize_mapEm .Ltmp758: @@ -14877,8 +14877,8 @@ # %bb.16: # %invoke.cont30 sw zero, 192(s7) addi s3, sp, 112 - ld s1, 8(s10) - ld s10, 0(s10) + ld s1, 8(s9) + ld s9, 0(s9) sd s3, 96(sp) li a1, 16 sd s1, 128(sp) @@ -14901,11 +14901,11 @@ li a1, 1 bne s1, a1, .LBB17_22 # %bb.21: # %if.then.i.i.i.i - lbu a1, 0(s10) + lbu a1, 0(s9) sb a1, 0(a0) j .LBB17_23 .LBB17_22: # %if.end.i.i.i.i.i - mv a1, s10 + mv a1, s9 mv a2, s1 call memcpy@plt .LBB17_23: # %invoke.cont31 @@ -14948,73 +14948,73 @@ .LBB17_27: # %lpad32 .Ltmp784: ld a1, 96(sp) - mv s10, a0 + mv s9, a0 beq a1, s3, .LBB17_45 # %bb.28: # %if.then.i.i33 mv a0, a1 j .LBB17_30 .LBB17_29: # %lpad28 .Ltmp776: - mv s10, a0 + mv s9, a0 mv a0, s1 .LBB17_30: # %ehcleanup call _ZdlPv@plt j .LBB17_45 .LBB17_31: # %lpad24 .Ltmp771: - mv s10, a0 + mv s9, a0 j .LBB17_46 .LBB17_32: # %lpad22 .Ltmp768: - mv s10, a0 + mv s9, a0 j .LBB17_47 .LBB17_33: # %lpad20 .Ltmp765: - mv s10, a0 + mv s9, a0 j .LBB17_48 .LBB17_34: # %lpad18 .Ltmp762: - mv s10, a0 + mv s9, a0 j .LBB17_49 .LBB17_35: # %lpad16 .Ltmp759: - mv s10, a0 + mv s9, a0 j .LBB17_50 .LBB17_36: # %lpad14 .Ltmp756: - mv s10, a0 + mv s9, a0 j .LBB17_51 .LBB17_37: # %lpad12 .Ltmp753: - mv s10, a0 + mv s9, a0 j .LBB17_54 .LBB17_38: # %lpad10 .Ltmp750: - mv s10, a0 + mv s9, a0 j .LBB17_55 .LBB17_39: # %lpad8 .Ltmp747: - mv s10, a0 + mv s9, a0 j .LBB17_56 .LBB17_40: # %lpad6 .Ltmp744: - mv s10, a0 + mv s9, a0 j .LBB17_57 .LBB17_41: # %lpad4 .Ltmp741: - mv s10, a0 + mv s9, a0 j .LBB17_58 .LBB17_42: # %lpad2 .Ltmp738: - mv s10, a0 + mv s9, a0 j .LBB17_59 .LBB17_43: # %lpad .Ltmp735: - mv s10, a0 + mv s9, a0 j .LBB17_60 .LBB17_44: # %lpad26 .Ltmp781: - mv s10, a0 + mv s9, a0 .LBB17_45: # %ehcleanup mv a0, s6 call _ZNSt5dequeIiSaIiEED2Ev @@ -15028,7 +15028,7 @@ mv a0, s11 call _ZNSt5dequeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EED2Ev .LBB17_49: # %ehcleanup37 - mv a0, s9 + mv a0, s10 call _ZNSt5dequeIN2PP12RestartblockESaIS1_EED2Ev .LBB17_50: # %ehcleanup38 mv a0, s8 @@ -15079,7 +15079,7 @@ .LBB17_62: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit55 mv a0, s0 call _ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@plt - mv a0, s10 + mv a0, s9 call _Unwind_Resume@plt .LBB17_63: # %if.then.i.i45 call _ZdlPv@plt @@ -15090,7 +15090,7 @@ call _ZdlPv@plt mv a0, s0 call _ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@plt - mv a0, s10 + mv a0, s9 call _Unwind_Resume@plt .Lfunc_end17: .size _ZN2PP11PowerParserC2ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE, .Lfunc_end17-_ZN2PP11PowerParserC2ENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE @@ -15513,7 +15513,7 @@ mul a2, a2, a3 sub sp, sp, a2 .cfi_escape 0x0f, 0x0e, 0x72, 0x00, 0x11, 0xa0, 0x02, 0x22, 0x11, 0x06, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 288 + 6 * vlenb - mv s2, a1 + mv s11, a1 mv s0, a0 call _ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev@plt addi s4, s0, 544 @@ -15565,7 +15565,7 @@ sd a0, 800(s0) sd a0, 808(s0) addi a0, s0, 816 - addi s7, s0, 824 + addi s2, s0, 824 sd zero, 896(s0) vsetivli zero, 2, e64, m1, ta, ma csrr a1, vlenb @@ -15580,13 +15580,13 @@ vl4r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) .Ltmp804: - mv a0, s7 + mv a0, s2 li a1, 0 sd s6, 72(sp) # 8-byte Folded Spill call _ZNSt11_Deque_baseIN2PP3CmdESaIS1_EE17_M_initialize_mapEm .Ltmp805: # %bb.2: # %invoke.cont3 - addi s10, s0, 904 + addi s1, s0, 904 addi a0, s0, 968 vsetivli zero, 2, e64, m1, ta, ma csrr a1, vlenb @@ -15598,15 +15598,15 @@ vsetivli zero, 8, e64, m4, ta, ma addi a0, sp, 176 vl4r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (s10) + vse64.v v8, (s1) .Ltmp807: - mv a0, s10 + mv a0, s1 li a1, 0 - sd s7, 64(sp) # 8-byte Folded Spill + sd s2, 64(sp) # 8-byte Folded Spill call _ZNSt11_Deque_baseIN2PP3CmdESaIS1_EE17_M_initialize_mapEm .Ltmp808: # %bb.3: # %invoke.cont5 - addi s11, s0, 992 + addi s3, s0, 992 addi a0, s0, 1056 vsetivli zero, 2, e64, m1, ta, ma csrr a1, vlenb @@ -15618,29 +15618,29 @@ vsetivli zero, 8, e64, m4, ta, ma addi a0, sp, 176 vl4r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (s11) + vse64.v v8, (s3) .Ltmp810: - mv a0, s11 + mv a0, s3 li a1, 0 - sd s10, 56(sp) # 8-byte Folded Spill + sd s1, 56(sp) # 8-byte Folded Spill call _ZNSt11_Deque_baseINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE17_M_initialize_mapEm .Ltmp811: # %bb.4: # %invoke.cont7 - addi s1, s0, 1080 + addi s7, s0, 1080 .Ltmp813: - mv a0, s1 - sd s11, 48(sp) # 8-byte Folded Spill + mv a0, s7 + sd s3, 48(sp) # 8-byte Folded Spill call _ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEC1Ev@plt .Ltmp814: # %bb.5: # %invoke.cont9 - addi s3, s0, 1472 + addi s8, s0, 1472 .Ltmp816: - mv a0, s3 - sd s1, 40(sp) # 8-byte Folded Spill + mv a0, s8 + sd s7, 40(sp) # 8-byte Folded Spill call _ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEC1Ev@plt .Ltmp817: # %bb.6: # %invoke.cont11 - sd s3, 32(sp) # 8-byte Folded Spill + sd s8, 32(sp) # 8-byte Folded Spill addi s1, s0, 1864 .Ltmp819: mv a0, s1 @@ -15712,7 +15712,7 @@ call _ZNSt11_Deque_baseINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE17_M_initialize_mapEm .Ltmp829: # %bb.10: # %invoke.cont19 - addi s11, s3, 497 + addi s2, s3, 497 addi a0, s3, 561 vsetivli zero, 2, e64, m1, ta, ma csrr a1, vlenb @@ -15724,9 +15724,9 @@ vsetivli zero, 8, e64, m4, ta, ma addi a0, sp, 176 vl4r.v v8, (a0) # Unknown-size Folded Reload - vse64.v v8, (s11) + vse64.v v8, (s2) .Ltmp831: - mv a0, s11 + mv a0, s2 li a1, 0 call _ZNSt11_Deque_baseIbSaIbEE17_M_initialize_mapEm .Ltmp832: @@ -15782,9 +15782,9 @@ sd s7, 520(s0) addi s3, sp, 144 sd s3, 128(sp) - beqz s2, .LBB19_37 + beqz s11, .LBB19_37 # %bb.16: # %if.end.i - mv a0, s2 + mv a0, s11 call strlen@plt mv s7, a0 li a1, 16 @@ -15808,11 +15808,11 @@ li a1, 1 bne s7, a1, .LBB19_22 # %bb.21: # %if.then.i.i.i.i - lbu a1, 0(s2) + lbu a1, 0(s11) sb a1, 0(a0) j .LBB19_23 .LBB19_22: # %if.end.i.i.i.i.i - mv a1, s2 + mv a1, s11 mv a2, s7 call memcpy@plt .LBB19_23: # %invoke.cont31 @@ -15828,13 +15828,13 @@ # %bb.24: # %invoke.cont33 sw zero, 192(s1) addi s4, sp, 112 - ld s2, 136(sp) + ld s11, 136(sp) ld s7, 128(sp) sd s4, 96(sp) li a1, 16 - sd s2, 160(sp) + sd s11, 160(sp) mv a0, s4 - bltu s2, a1, .LBB19_27 + bltu s11, a1, .LBB19_27 # %bb.25: # %if.then.i.i39 .Ltmp850: addi a0, sp, 96 @@ -15847,17 +15847,17 @@ sd a0, 96(sp) sd a1, 112(sp) .LBB19_27: # %if.end.i.i34 - beqz s2, .LBB19_31 + beqz s11, .LBB19_31 # %bb.28: # %if.end.i.i34 li a1, 1 - bne s2, a1, .LBB19_30 + bne s11, a1, .LBB19_30 # %bb.29: # %if.then.i.i.i.i37 lbu a1, 0(s7) sb a1, 0(a0) j .LBB19_31 .LBB19_30: # %if.end.i.i.i.i.i38 mv a1, s7 - mv a2, s2 + mv a2, s11 call memcpy@plt .LBB19_31: # %invoke.cont34 ld a0, 160(sp) @@ -15912,7 +15912,7 @@ .LBB19_39: # %lpad35 .Ltmp855: ld a1, 96(sp) - mv s2, a0 + mv s11, a0 beq a1, s4, .LBB19_57 # %bb.40: # %if.then.i.i50 mv a0, a1 @@ -15920,7 +15920,7 @@ j .LBB19_57 .LBB19_41: # %lpad28 .Ltmp845: - mv s2, a0 + mv s11, a0 mv a0, s7 j .LBB19_58 .LBB19_42: # %lpad26 @@ -15928,59 +15928,59 @@ j .LBB19_60 .LBB19_43: # %lpad24 .Ltmp839: - mv s2, a0 + mv s11, a0 j .LBB19_62 .LBB19_44: # %lpad22 .Ltmp836: - mv s2, a0 + mv s11, a0 j .LBB19_63 .LBB19_45: # %lpad20 .Ltmp833: - mv s2, a0 + mv s11, a0 j .LBB19_64 .LBB19_46: # %lpad18 .Ltmp830: - mv s2, a0 + mv s11, a0 j .LBB19_65 .LBB19_47: # %lpad16 .Ltmp827: - mv s2, a0 + mv s11, a0 j .LBB19_66 .LBB19_48: # %lpad14 .Ltmp824: - mv s2, a0 + mv s11, a0 j .LBB19_67 .LBB19_49: # %lpad12 .Ltmp821: - mv s2, a0 + mv s11, a0 j .LBB19_70 .LBB19_50: # %lpad10 .Ltmp818: - mv s2, a0 + mv s11, a0 j .LBB19_71 .LBB19_51: # %lpad8 .Ltmp815: - mv s2, a0 + mv s11, a0 j .LBB19_72 .LBB19_52: # %lpad6 .Ltmp812: - mv s2, a0 + mv s11, a0 j .LBB19_73 .LBB19_53: # %lpad4 .Ltmp809: - mv s2, a0 + mv s11, a0 j .LBB19_74 .LBB19_54: # %lpad2 .Ltmp806: - mv s2, a0 + mv s11, a0 j .LBB19_75 .LBB19_55: # %lpad .Ltmp803: - mv s2, a0 + mv s11, a0 j .LBB19_76 .LBB19_56: # %lpad32 .Ltmp852: - mv s2, a0 + mv s11, a0 .LBB19_57: # %ehcleanup ld a0, 128(sp) beq a0, s3, .LBB19_61 @@ -15990,7 +15990,7 @@ .LBB19_59: # %lpad30 .Ltmp858: .LBB19_60: # %ehcleanup38 - mv s2, a0 + mv s11, a0 .LBB19_61: # %ehcleanup38 mv a0, s6 call _ZNSt5dequeIiSaIiEED2Ev @@ -15998,7 +15998,7 @@ mv a0, s5 call _ZNSt5dequeIbSaIbEED2Ev .LBB19_63: # %ehcleanup40 - mv a0, s11 + mv a0, s2 call _ZNSt5dequeIbSaIbEED2Ev .LBB19_64: # %ehcleanup41 mv a0, s10 @@ -16034,13 +16034,13 @@ ld a0, 64(sp) # 8-byte Folded Reload call _ZNSt5dequeIN2PP3CmdESaIS1_EED2Ev .LBB19_75: # %ehcleanup51 - addi s3, s0, 680 - addi s4, s0, 728 + addi s2, s0, 680 + addi s3, s0, 728 addi a0, s0, 776 call _ZNSt3mapINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEN2PP8FunctionESt4lessIS5_ESaISt4pairIKS5_S7_EEED2Ev - mv a0, s4 - call _ZNSt3mapIiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4lessIiESaISt4pairIKiS5_EEED2Ev mv a0, s3 + call _ZNSt3mapIiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4lessIiESaISt4pairIKiS5_EEED2Ev + mv a0, s2 call _ZNSt3mapINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEN2PP8VariableESt4lessIS5_ESaISt4pairIKS5_S7_EEED2Ev ld a0, 72(sp) # 8-byte Folded Reload call _ZNSt5dequeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EED2Ev @@ -16055,7 +16055,7 @@ .LBB19_78: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit78 mv a0, s0 call _ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@plt - mv a0, s2 + mv a0, s11 call _Unwind_Resume@plt .LBB19_79: # %if.then.i.i68 call _ZdlPv@plt @@ -16066,7 +16066,7 @@ call _ZdlPv@plt mv a0, s0 call _ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@plt - mv a0, s2 + mv a0, s11 call _Unwind_Resume@plt .Lfunc_end19: .size _ZN2PP11PowerParserC2EPKc, .Lfunc_end19-_ZN2PP11PowerParserC2EPKc @@ -18520,10 +18520,10 @@ sh zero, 8(s8) vsetivli zero, 2, e64, m1, ta, ma addi a0, sp, 2047 + addi a0, a0, 129 + vl1r.v v8, (a0) # Unknown-size Folded Reload + addi a0, sp, 2047 addi a0, a0, 25 - addi a1, sp, 2047 - addi a1, a1, 129 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse64.v v8, (a0) addi a0, a0, 16 vse64.v v8, (a0) @@ -18581,10 +18581,10 @@ addi s9, a2, 16 sd s9, 1736(sp) vsetivli zero, 2, e64, m1, ta, ma - addi a1, sp, 1744 addi a0, sp, 2047 addi a0, a0, 129 vl1r.v v8, (a0) # Unknown-size Folded Reload + addi a1, sp, 1744 vse64.v v8, (a1) addi a0, a1, 16 vse64.v v8, (a0) --- build.head//MultiSource/Benchmarks/DOE-ProxyApps-C++/CLAMR/CMakeFiles/CLAMR.dir/mesh.s 2023-11-13 08:03:22.507554354 +0000 +++ build//MultiSource/Benchmarks/DOE-ProxyApps-C++/CLAMR/CMakeFiles/CLAMR.dir/mesh.s 2023-11-13 08:03:17.539697957 +0000 @@ -4604,8 +4604,8 @@ ld a0, 184(sp) ld s4, 176(sp) sd zero, 160(sp) - lw s7, 172(sp) - lw s8, 168(sp) + lw s6, 172(sp) + lw s7, 168(sp) sub s9, a0, s4 vsetivli zero, 2, e64, m1, ta, ma addi a1, sp, 208 @@ -4625,22 +4625,22 @@ call _Znwm@plt .Ltmp101: # %bb.78: # in Loop: Header=BB14_53 Depth=1 - mv s6, a0 + mv s8, a0 j .LBB14_80 .LBB14_79: # in Loop: Header=BB14_53 Depth=1 - li s6, 0 + li s8, 0 .LBB14_80: # %invoke.cont.i # in Loop: Header=BB14_53 Depth=1 srai a0, s9, 2 - sd s6, 48(sp) + sd s8, 48(sp) slli s11, a0, 2 - add s11, s6, s11 + add s11, s8, s11 sd s11, 64(sp) li a1, 2 blt a0, a1, .LBB14_92 # %bb.81: # %if.then.i.i.i.i.i.i.i.i.i # in Loop: Header=BB14_53 Depth=1 - mv a0, s6 + mv a0, s8 mv a1, s4 mv a2, s9 call memmove@plt @@ -4651,17 +4651,17 @@ addi a3, sp, 48 addi a5, sp, 72 mv a0, s0 - mv a1, s7 - mv a2, s8 + mv a1, s6 + mv a2, s7 li a4, 0 call _ZN4Mesh10rezone_allEiiSt6vectorIiSaIiEEiR10MallocPlus .Ltmp106: # %bb.83: # %invoke.cont220 # in Loop: Header=BB14_53 Depth=1 - beqz s6, .LBB14_85 + beqz s8, .LBB14_85 # %bb.84: # %if.then.i.i.i # in Loop: Header=BB14_53 Depth=1 - mv a0, s6 + mv a0, s8 call _ZdlPv@plt .LBB14_85: # %_ZNSt6vectorIiSaIiEED2Ev.exit # in Loop: Header=BB14_53 Depth=1 @@ -4707,7 +4707,7 @@ # %bb.93: # %if.then2.i.i.i.i.i.i.i.i.i # in Loop: Header=BB14_53 Depth=1 lw a0, 0(s4) - sw a0, 0(s6) + sw a0, 0(s8) j .LBB14_82 .LBB14_94: # %for.cond.cleanup171 ld a1, 1304(s0) @@ -5113,9 +5113,9 @@ .LBB14_153: # %lpad219 .Ltmp107: mv s0, a0 - beqz s6, .LBB14_162 + beqz s8, .LBB14_162 # %bb.154: # %if.then.i.i.i193 - mv a0, s6 + mv a0, s8 call _ZdlPv@plt j .LBB14_162 .LBB14_155: # %lpad211 --- build.head//MultiSource/Benchmarks/MiBench/consumer-jpeg/CMakeFiles/consumer-jpeg.dir/jfdctflt.s 2023-11-13 08:03:22.623551000 +0000 +++ build//MultiSource/Benchmarks/MiBench/consumer-jpeg/CMakeFiles/consumer-jpeg.dir/jfdctflt.s 2023-11-13 08:03:17.655694604 +0000 @@ -29,8 +29,8 @@ vsll.vi v8, v16, 5 vadd.vx v8, v8, a0 vmsleu.vi v0, v16, 7 - li a5, 32 - vlse32.v v16, (a0), a5, v0.t + li a6, 32 + vlse32.v v16, (a0), a6, v0.t csrr a1, vlenb li a2, 44 mul a1, a1, a2 @@ -54,8 +54,8 @@ add a3, sp, a3 addi a3, a3, 16 vs4r.v v16, (a3) # Unknown-size Folded Spill - li a6, 24 - vluxei64.v v16, (a6), v8, v0.t + li a5, 24 + vluxei64.v v16, (a5), v8, v0.t csrr a3, vlenb slli a3, a3, 5 add a3, sp, a3 @@ -148,104 +148,104 @@ vfadd.vv v24, v28, v20 vfadd.vv v20, v4, v16 vfadd.vv v4, v20, v24 - vsse32.v v4, (a0), a5, v0.t + vsse32.v v4, (a0), a6, v0.t vfsub.vv v16, v24, v20 vsoxei64.v v16, (t0), v8, v0.t .Lpcrel_hi0: - auipc a5, %pcrel_hi(.LCPI0_0) - flw fa5, %pcrel_lo(.Lpcrel_hi0)(a5) - csrr a5, vlenb - slli a5, a5, 3 - add a5, sp, a5 - addi a5, a5, 16 - vl4r.v v16, (a5) # Unknown-size Folded Reload + auipc a6, %pcrel_hi(.LCPI0_0) + flw fa5, %pcrel_lo(.Lpcrel_hi0)(a6) + csrr a6, vlenb + slli a6, a6, 3 + add a6, sp, a6 + addi a6, a6, 16 + vl4r.v v16, (a6) # Unknown-size Folded Reload vfsub.vv v20, v28, v16 - csrr a5, vlenb + csrr a6, vlenb li t0, 12 - mul a5, a5, t0 - add a5, sp, a5 - addi a5, a5, 16 - vl4r.v v16, (a5) # Unknown-size Folded Reload - csrr a5, vlenb - slli a5, a5, 2 - add a5, sp, a5 - addi a5, a5, 16 - vl4r.v v24, (a5) # Unknown-size Folded Reload + mul a6, a6, t0 + add a6, sp, a6 + addi a6, a6, 16 + vl4r.v v16, (a6) # Unknown-size Folded Reload + csrr a6, vlenb + slli a6, a6, 2 + add a6, sp, a6 + addi a6, a6, 16 + vl4r.v v24, (a6) # Unknown-size Folded Reload vfsub.vv v16, v16, v24 vfadd.vv v16, v16, v20 vfmul.vf v16, v16, fa5 - csrr a5, vlenb + csrr a6, vlenb li t0, 12 - mul a5, a5, t0 - add a5, sp, a5 - addi a5, a5, 16 - vs4r.v v16, (a5) # Unknown-size Folded Spill + mul a6, a6, t0 + add a6, sp, a6 + addi a6, a6, 16 + vs4r.v v16, (a6) # Unknown-size Folded Spill vfadd.vv v16, v20, v16 vsoxei64.v v16, (a7), v8, v0.t - csrr a5, vlenb + csrr a6, vlenb li a7, 44 - mul a5, a5, a7 - add a5, sp, a5 - addi a5, a5, 16 - vl4r.v v16, (a5) # Unknown-size Folded Reload - csrr a5, vlenb + mul a6, a6, a7 + add a6, sp, a6 + addi a6, a6, 16 + vl4r.v v16, (a6) # Unknown-size Folded Reload + csrr a6, vlenb li a7, 40 - mul a5, a5, a7 - add a5, sp, a5 - addi a5, a5, 16 - vl4r.v v28, (a5) # Unknown-size Folded Reload + mul a6, a6, a7 + add a6, sp, a6 + addi a6, a6, 16 + vl4r.v v28, (a6) # Unknown-size Folded Reload vfsub.vv v16, v16, v28 - csrr a5, vlenb + csrr a6, vlenb li a7, 44 - mul a5, a5, a7 - add a5, sp, a5 - addi a5, a5, 16 - vs4r.v v16, (a5) # Unknown-size Folded Spill - csrr a5, vlenb + mul a6, a6, a7 + add a6, sp, a6 + addi a6, a6, 16 + vs4r.v v16, (a6) # Unknown-size Folded Spill + csrr a6, vlenb li a7, 36 - mul a5, a5, a7 - add a5, sp, a5 - addi a5, a5, 16 - vl4r.v v28, (a5) # Unknown-size Folded Reload - csrr a5, vlenb - slli a5, a5, 5 - add a5, sp, a5 - addi a5, a5, 16 - vl4r.v v4, (a5) # Unknown-size Folded Reload + mul a6, a6, a7 + add a6, sp, a6 + addi a6, a6, 16 + vl4r.v v28, (a6) # Unknown-size Folded Reload + csrr a6, vlenb + slli a6, a6, 5 + add a6, sp, a6 + addi a6, a6, 16 + vl4r.v v4, (a6) # Unknown-size Folded Reload vfsub.vv v28, v28, v4 - csrr a5, vlenb + csrr a6, vlenb li a7, 28 - mul a5, a5, a7 - add a5, sp, a5 - addi a5, a5, 16 - vl4r.v v4, (a5) # Unknown-size Folded Reload - csrr a5, vlenb + mul a6, a6, a7 + add a6, sp, a6 + addi a6, a6, 16 + vl4r.v v4, (a6) # Unknown-size Folded Reload + csrr a6, vlenb li a7, 24 - mul a5, a5, a7 - add a5, sp, a5 - addi a5, a5, 16 - vl4r.v v16, (a5) # Unknown-size Folded Reload + mul a6, a6, a7 + add a6, sp, a6 + addi a6, a6, 16 + vl4r.v v16, (a6) # Unknown-size Folded Reload vfsub.vv v4, v4, v16 - csrr a5, vlenb + csrr a6, vlenb li a7, 20 - mul a5, a5, a7 - add a5, sp, a5 - addi a5, a5, 16 - vl4r.v v16, (a5) # Unknown-size Folded Reload - csrr a5, vlenb - slli a5, a5, 4 - add a5, sp, a5 - addi a5, a5, 16 - vl4r.v v24, (a5) # Unknown-size Folded Reload + mul a6, a6, a7 + add a6, sp, a6 + addi a6, a6, 16 + vl4r.v v16, (a6) # Unknown-size Folded Reload + csrr a6, vlenb + slli a6, a6, 4 + add a6, sp, a6 + addi a6, a6, 16 + vl4r.v v24, (a6) # Unknown-size Folded Reload vfsub.vv v24, v16, v24 - csrr a5, vlenb + csrr a6, vlenb li a7, 12 - mul a5, a5, a7 - add a5, sp, a5 - addi a5, a5, 16 - vl4r.v v16, (a5) # Unknown-size Folded Reload + mul a6, a6, a7 + add a6, sp, a6 + addi a6, a6, 16 + vl4r.v v16, (a6) # Unknown-size Folded Reload vfsub.vv v20, v20, v16 - vsoxei64.v v20, (a6), v8, v0.t + vsoxei64.v v20, (a5), v8, v0.t vfadd.vv v20, v4, v24 vfadd.vv v24, v28, v4 csrr a5, vlenb @@ -302,31 +302,31 @@ add a3, sp, a3 addi a3, a3, 16 vs4r.v v8, (a3) # Unknown-size Folded Spill - addi a3, a0, 192 - vle32.v v8, (a3), v0.t + addi a5, a0, 192 + vle32.v v8, (a5), v0.t + csrr a3, vlenb + slli a3, a3, 5 + add a3, sp, a3 + addi a3, a3, 16 + vs4r.v v8, (a3) # Unknown-size Folded Spill + addi a6, a0, 64 + vle32.v v8, (a6), v0.t + csrr a3, vlenb + li a4, 28 + mul a3, a3, a4 + add a3, sp, a3 + addi a3, a3, 16 + vs4r.v v8, (a3) # Unknown-size Folded Spill + addi a3, a0, 160 + vle32.v v24, (a3), v0.t csrr a4, vlenb - slli a4, a4, 5 + li a7, 24 + mul a4, a4, a7 add a4, sp, a4 addi a4, a4, 16 - vs4r.v v8, (a4) # Unknown-size Folded Spill - addi a4, a0, 64 - vle32.v v8, (a4), v0.t - csrr a5, vlenb - li a6, 28 - mul a5, a5, a6 - add a5, sp, a5 - addi a5, a5, 16 - vs4r.v v8, (a5) # Unknown-size Folded Spill - addi a5, a0, 160 - vle32.v v24, (a5), v0.t - csrr a6, vlenb - li a7, 24 - mul a6, a6, a7 - add a6, sp, a6 - addi a6, a6, 16 - vs4r.v v24, (a6) # Unknown-size Folded Spill - addi a6, a0, 96 - vle32.v v20, (a6), v0.t + vs4r.v v24, (a4) # Unknown-size Folded Spill + addi a4, a0, 96 + vle32.v v20, (a4), v0.t csrr a7, vlenb slli a7, a7, 4 add a7, sp, a7 @@ -478,20 +478,20 @@ vfadd.vv v8, v12, v16 vfmul.vf v8, v8, fa5 vfadd.vv v12, v16, v8 - vse32.v v12, (a4), v0.t + vse32.v v12, (a6), v0.t vfsub.vv v8, v16, v8 - vse32.v v8, (a3), v0.t + vse32.v v8, (a5), v0.t vfadd.vv v16, v24, v28 csrr a0, vlenb - li a3, 40 - mul a0, a0, a3 + li a5, 40 + mul a0, a0, a5 add a0, sp, a0 addi a0, a0, 16 vl4r.v v12, (a0) # Unknown-size Folded Reload vfadd.vv v8, v12, v24 csrr a0, vlenb - li a3, 44 - mul a0, a0, a3 + li a5, 44 + mul a0, a0, a5 add a0, sp, a0 addi a0, a0, 16 vl4r.v v28, (a0) # Unknown-size Folded Reload @@ -503,11 +503,11 @@ vfsub.vv v24, v28, v8 vmv4r.v v4, v28 vfadd.vv v28, v24, v16 - vse32.v v28, (a5), v0.t + vse32.v v28, (a3), v0.t vfmacc.vf v12, fa4, v20 vfadd.vv v8, v4, v8 vfsub.vv v16, v24, v16 - vse32.v v16, (a6), v0.t + vse32.v v16, (a4), v0.t vfadd.vv v16, v8, v12 vse32.v v16, (a2), v0.t vfsub.vv v8, v8, v12 --- build.head//MicroBenchmarks/libs/benchmark/test/CMakeFiles/output_test_helper.dir/output_test_helper.s 2023-11-13 08:03:22.139564992 +0000 +++ build//MicroBenchmarks/libs/benchmark/test/CMakeFiles/output_test_helper.dir/output_test_helper.s 2023-11-13 08:03:17.199707784 +0000 @@ -872,9 +872,9 @@ addi a3, a3, 8 add a1, a0, a1 vsetivli zero, 2, e64, m1, ta, ma + addi a2, sp, 160 + vl1r.v v8, (a2) # Unknown-size Folded Reload addi a2, sp, 128 - addi a4, sp, 160 - vl1r.v v8, (a4) # Unknown-size Folded Reload vse64.v v8, (a2) addi a2, sp, 112 vse64.v v8, (a2) --- build.head//MultiSource/Benchmarks/MiBench/consumer-lame/CMakeFiles/consumer-lame.dir/layer3.s 2023-11-13 08:03:22.627550886 +0000 +++ build//MultiSource/Benchmarks/MiBench/consumer-lame/CMakeFiles/consumer-lame.dir/layer3.s 2023-11-13 08:03:17.659694488 +0000 @@ -2132,8 +2132,8 @@ bne a1, s1, .LBB0_26 # %bb.27: # %for.cond466.preheader.preheader li a1, 0 - csrr a6, vlenb - srli a2, a6, 3 + csrr s4, vlenb + srli a2, s4, 3 vsetvli a0, zero, e32, m2, ta, ma vmv.v.x v8, s0 vsetivli zero, 8, e32, m2, ta, ma @@ -2142,8 +2142,8 @@ vmv.v.x v12, s0 vsetivli zero, 2, e32, mf2, ta, ma vmv.v.x v13, s0 - slli a3, a6, 1 - srli a0, a6, 1 + slli a3, s4, 1 + srli a0, s4, 1 .Lpcrel_hi117: auipc a4, %pcrel_hi(longLimit) addi a4, a4, %pcrel_lo(.Lpcrel_hi117) @@ -2243,7 +2243,7 @@ vmv2r.v v16, v8 vadd.vi v16, v14, 1, v0.t vs2r.v v16, (s1) - add s2, s2, a6 + add s2, s2, s4 sub t6, t6, a0 add s1, s1, a3 bnez t6, .LBB0_32 @@ -2339,24 +2339,24 @@ vle32.v v8, (a2) .Lpcrel_hi129: auipc a2, %pcrel_hi(n_slen2) - addi a3, a2, %pcrel_lo(.Lpcrel_hi129) - addi a2, a3, 2000 + addi a6, a2, %pcrel_lo(.Lpcrel_hi129) + addi a2, a6, 2000 vse32.v v8, (a2) lui a2, 10 addi a4, a2, 18 - sw a4, 2032(a3) + sw a4, 2032(a6) addi a4, a2, 3 - sw a4, 2036(a3) + sw a4, 2036(a6) addi a4, a2, 11 - sw a4, 2040(a3) + sw a4, 2040(a6) addi a2, a2, 19 - sw a2, 2044(a3) + sw a2, 2044(a6) neg a4, a0 and a4, a0, a4 vsetvli a2, zero, e32, m2, ta, ma vid.v v8 li a2, 160 - mul a6, a6, a2 + mul s3, s4, a2 vsetvli zero, zero, e64, m4, ta, ma vid.v v12 li a7, 320 @@ -2386,305 +2386,305 @@ vsetvli zero, zero, e64, m4, ta, ma vsaddu.vx v16, v12, a1 vmsleu.vi v0, v16, 4 - vsse32.v v8, (a3), a7, v0.t + vsse32.v v8, (a6), a7, v0.t vsetvli zero, zero, e32, m2, ta, ma - li s3, 512 - vor.vx v10, v8, s3 - addi s3, a3, 4 - vsse32.v v10, (s3), a7, v0.t - li s3, 1024 - vor.vx v10, v8, s3 - addi s3, a3, 8 - vsse32.v v10, (s3), a7, v0.t - li s3, 1536 - vor.vx v10, v8, s3 - addi s3, a3, 12 - vsse32.v v10, (s3), a7, v0.t - li s3, 64 - vor.vx v10, v8, s3 - addi s3, a3, 16 - vsse32.v v10, (s3), a7, v0.t - li s3, 576 - vor.vx v10, v8, s3 - addi s3, a3, 20 - vsse32.v v10, (s3), a7, v0.t - li s3, 1088 - vor.vx v10, v8, s3 - addi s3, a3, 24 - vsse32.v v10, (s3), a7, v0.t - li s3, 1600 - vor.vx v10, v8, s3 - addi s3, a3, 28 - vsse32.v v10, (s3), a7, v0.t - li s3, 128 - vor.vx v10, v8, s3 - addi s3, a3, 32 - vsse32.v v10, (s3), a7, v0.t - li s3, 640 - vor.vx v10, v8, s3 - addi s3, a3, 36 - vsse32.v v10, (s3), a7, v0.t - li s3, 1152 - vor.vx v10, v8, s3 - addi s3, a3, 40 - vsse32.v v10, (s3), a7, v0.t - li s3, 1664 - vor.vx v10, v8, s3 - addi s3, a3, 44 - vsse32.v v10, (s3), a7, v0.t - li s3, 192 - vor.vx v10, v8, s3 - addi s3, a3, 48 - vsse32.v v10, (s3), a7, v0.t - li s3, 704 - vor.vx v10, v8, s3 - addi s3, a3, 52 - vsse32.v v10, (s3), a7, v0.t - li s3, 1216 - vor.vx v10, v8, s3 - addi s3, a3, 56 - vsse32.v v10, (s3), a7, v0.t - li s3, 1728 - vor.vx v10, v8, s3 - addi s3, a3, 60 - vsse32.v v10, (s3), a7, v0.t + li a3, 512 + vor.vx v10, v8, a3 + addi a3, a6, 4 + vsse32.v v10, (a3), a7, v0.t + li a3, 1024 + vor.vx v10, v8, a3 + addi a3, a6, 8 + vsse32.v v10, (a3), a7, v0.t + li a3, 1536 + vor.vx v10, v8, a3 + addi a3, a6, 12 + vsse32.v v10, (a3), a7, v0.t + li a3, 64 + vor.vx v10, v8, a3 + addi a3, a6, 16 + vsse32.v v10, (a3), a7, v0.t + li a3, 576 + vor.vx v10, v8, a3 + addi a3, a6, 20 + vsse32.v v10, (a3), a7, v0.t + li a3, 1088 + vor.vx v10, v8, a3 + addi a3, a6, 24 + vsse32.v v10, (a3), a7, v0.t + li a3, 1600 + vor.vx v10, v8, a3 + addi a3, a6, 28 + vsse32.v v10, (a3), a7, v0.t + li a3, 128 + vor.vx v10, v8, a3 + addi a3, a6, 32 + vsse32.v v10, (a3), a7, v0.t + li a3, 640 + vor.vx v10, v8, a3 + addi a3, a6, 36 + vsse32.v v10, (a3), a7, v0.t + li a3, 1152 + vor.vx v10, v8, a3 + addi a3, a6, 40 + vsse32.v v10, (a3), a7, v0.t + li a3, 1664 + vor.vx v10, v8, a3 + addi a3, a6, 44 + vsse32.v v10, (a3), a7, v0.t + li a3, 192 + vor.vx v10, v8, a3 + addi a3, a6, 48 + vsse32.v v10, (a3), a7, v0.t + li a3, 704 + vor.vx v10, v8, a3 + addi a3, a6, 52 + vsse32.v v10, (a3), a7, v0.t + li a3, 1216 + vor.vx v10, v8, a3 + addi a3, a6, 56 + vsse32.v v10, (a3), a7, v0.t + li a3, 1728 + vor.vx v10, v8, a3 + addi a3, a6, 60 + vsse32.v v10, (a3), a7, v0.t vor.vi v10, v8, 8 - addi s3, a3, 64 - vsse32.v v10, (s3), a7, v0.t - li s3, 520 - vor.vx v10, v8, s3 - addi s3, a3, 68 - vsse32.v v10, (s3), a7, v0.t - li s3, 1032 - vor.vx v10, v8, s3 - addi s3, a3, 72 - vsse32.v v10, (s3), a7, v0.t - li s3, 1544 - vor.vx v10, v8, s3 - addi s3, a3, 76 - vsse32.v v10, (s3), a7, v0.t - li s3, 72 - vor.vx v10, v8, s3 - addi s3, a3, 80 - vsse32.v v10, (s3), a7, v0.t - li s3, 584 - vor.vx v10, v8, s3 - addi s3, a3, 84 - vsse32.v v10, (s3), a7, v0.t - li s3, 1096 - vor.vx v10, v8, s3 - addi s3, a3, 88 - vsse32.v v10, (s3), a7, v0.t - li s3, 1608 - vor.vx v10, v8, s3 - addi s3, a3, 92 - vsse32.v v10, (s3), a7, v0.t - li s3, 136 - vor.vx v10, v8, s3 - addi s3, a3, 96 - vsse32.v v10, (s3), a7, v0.t - li s3, 648 - vor.vx v10, v8, s3 - addi s3, a3, 100 - vsse32.v v10, (s3), a7, v0.t - li s3, 1160 - vor.vx v10, v8, s3 - addi s3, a3, 104 - vsse32.v v10, (s3), a7, v0.t - li s3, 1672 - vor.vx v10, v8, s3 - addi s3, a3, 108 - vsse32.v v10, (s3), a7, v0.t - li s3, 200 - vor.vx v10, v8, s3 - addi s3, a3, 112 - vsse32.v v10, (s3), a7, v0.t - li s3, 712 - vor.vx v10, v8, s3 - addi s3, a3, 116 - vsse32.v v10, (s3), a7, v0.t - li s3, 1224 - vor.vx v10, v8, s3 - addi s3, a3, 120 - vsse32.v v10, (s3), a7, v0.t - li s3, 1736 - vor.vx v10, v8, s3 - addi s3, a3, 124 - vsse32.v v10, (s3), a7, v0.t - li s3, 16 - vor.vx v10, v8, s3 - addi s3, a3, 128 - vsse32.v v10, (s3), a7, v0.t - li s3, 528 - vor.vx v10, v8, s3 - addi s3, a3, 132 - vsse32.v v10, (s3), a7, v0.t - li s3, 1040 - vor.vx v10, v8, s3 - addi s3, a3, 136 - vsse32.v v10, (s3), a7, v0.t - li s3, 1552 - vor.vx v10, v8, s3 - addi s3, a3, 140 - vsse32.v v10, (s3), a7, v0.t - li s3, 80 - vor.vx v10, v8, s3 - addi s3, a3, 144 - vsse32.v v10, (s3), a7, v0.t - li s3, 592 - vor.vx v10, v8, s3 - addi s3, a3, 148 - vsse32.v v10, (s3), a7, v0.t - li s3, 1104 - vor.vx v10, v8, s3 - addi s3, a3, 152 - vsse32.v v10, (s3), a7, v0.t - li s3, 1616 - vor.vx v10, v8, s3 - addi s3, a3, 156 - vsse32.v v10, (s3), a7, v0.t - li s3, 144 - vor.vx v10, v8, s3 - addi s3, a3, 160 - vsse32.v v10, (s3), a7, v0.t - li s3, 656 - vor.vx v10, v8, s3 - addi s3, a3, 164 - vsse32.v v10, (s3), a7, v0.t - li s3, 1168 - vor.vx v10, v8, s3 - addi s3, a3, 168 - vsse32.v v10, (s3), a7, v0.t - li s3, 1680 - vor.vx v10, v8, s3 - addi s3, a3, 172 - vsse32.v v10, (s3), a7, v0.t - li s3, 208 - vor.vx v10, v8, s3 - addi s3, a3, 176 - vsse32.v v10, (s3), a7, v0.t - li s3, 720 - vor.vx v10, v8, s3 - addi s3, a3, 180 - vsse32.v v10, (s3), a7, v0.t - li s3, 1232 - vor.vx v10, v8, s3 - addi s3, a3, 184 - vsse32.v v10, (s3), a7, v0.t - li s3, 1744 - vor.vx v10, v8, s3 - addi s3, a3, 188 - vsse32.v v10, (s3), a7, v0.t - li s3, 24 - vor.vx v10, v8, s3 - addi s3, a3, 192 - vsse32.v v10, (s3), a7, v0.t - li s3, 536 - vor.vx v10, v8, s3 - addi s3, a3, 196 - vsse32.v v10, (s3), a7, v0.t - li s3, 1048 - vor.vx v10, v8, s3 - addi s3, a3, 200 - vsse32.v v10, (s3), a7, v0.t - li s3, 1560 - vor.vx v10, v8, s3 - addi s3, a3, 204 - vsse32.v v10, (s3), a7, v0.t - li s3, 88 - vor.vx v10, v8, s3 - addi s3, a3, 208 - vsse32.v v10, (s3), a7, v0.t - li s3, 600 - vor.vx v10, v8, s3 - addi s3, a3, 212 - vsse32.v v10, (s3), a7, v0.t - li s3, 1112 - vor.vx v10, v8, s3 - addi s3, a3, 216 - vsse32.v v10, (s3), a7, v0.t - li s3, 1624 - vor.vx v10, v8, s3 - addi s3, a3, 220 - vsse32.v v10, (s3), a7, v0.t - li s3, 152 - vor.vx v10, v8, s3 - addi s3, a3, 224 - vsse32.v v10, (s3), a7, v0.t + addi a3, a6, 64 + vsse32.v v10, (a3), a7, v0.t + li a3, 520 + vor.vx v10, v8, a3 + addi a3, a6, 68 + vsse32.v v10, (a3), a7, v0.t + li a3, 1032 + vor.vx v10, v8, a3 + addi a3, a6, 72 + vsse32.v v10, (a3), a7, v0.t + li a3, 1544 + vor.vx v10, v8, a3 + addi a3, a6, 76 + vsse32.v v10, (a3), a7, v0.t + li a3, 72 + vor.vx v10, v8, a3 + addi a3, a6, 80 + vsse32.v v10, (a3), a7, v0.t + li a3, 584 + vor.vx v10, v8, a3 + addi a3, a6, 84 + vsse32.v v10, (a3), a7, v0.t + li a3, 1096 + vor.vx v10, v8, a3 + addi a3, a6, 88 + vsse32.v v10, (a3), a7, v0.t + li a3, 1608 + vor.vx v10, v8, a3 + addi a3, a6, 92 + vsse32.v v10, (a3), a7, v0.t + li a3, 136 + vor.vx v10, v8, a3 + addi a3, a6, 96 + vsse32.v v10, (a3), a7, v0.t + li a3, 648 + vor.vx v10, v8, a3 + addi a3, a6, 100 + vsse32.v v10, (a3), a7, v0.t + li a3, 1160 + vor.vx v10, v8, a3 + addi a3, a6, 104 + vsse32.v v10, (a3), a7, v0.t + li a3, 1672 + vor.vx v10, v8, a3 + addi a3, a6, 108 + vsse32.v v10, (a3), a7, v0.t + li a3, 200 + vor.vx v10, v8, a3 + addi a3, a6, 112 + vsse32.v v10, (a3), a7, v0.t + li a3, 712 + vor.vx v10, v8, a3 + addi a3, a6, 116 + vsse32.v v10, (a3), a7, v0.t + li a3, 1224 + vor.vx v10, v8, a3 + addi a3, a6, 120 + vsse32.v v10, (a3), a7, v0.t + li a3, 1736 + vor.vx v10, v8, a3 + addi a3, a6, 124 + vsse32.v v10, (a3), a7, v0.t + li a3, 16 + vor.vx v10, v8, a3 + addi a3, a6, 128 + vsse32.v v10, (a3), a7, v0.t + li a3, 528 + vor.vx v10, v8, a3 + addi a3, a6, 132 + vsse32.v v10, (a3), a7, v0.t + li a3, 1040 + vor.vx v10, v8, a3 + addi a3, a6, 136 + vsse32.v v10, (a3), a7, v0.t + li a3, 1552 + vor.vx v10, v8, a3 + addi a3, a6, 140 + vsse32.v v10, (a3), a7, v0.t + li a3, 80 + vor.vx v10, v8, a3 + addi a3, a6, 144 + vsse32.v v10, (a3), a7, v0.t + li a3, 592 + vor.vx v10, v8, a3 + addi a3, a6, 148 + vsse32.v v10, (a3), a7, v0.t + li a3, 1104 + vor.vx v10, v8, a3 + addi a3, a6, 152 + vsse32.v v10, (a3), a7, v0.t + li a3, 1616 + vor.vx v10, v8, a3 + addi a3, a6, 156 + vsse32.v v10, (a3), a7, v0.t + li a3, 144 + vor.vx v10, v8, a3 + addi a3, a6, 160 + vsse32.v v10, (a3), a7, v0.t + li a3, 656 + vor.vx v10, v8, a3 + addi a3, a6, 164 + vsse32.v v10, (a3), a7, v0.t + li a3, 1168 + vor.vx v10, v8, a3 + addi a3, a6, 168 + vsse32.v v10, (a3), a7, v0.t + li a3, 1680 + vor.vx v10, v8, a3 + addi a3, a6, 172 + vsse32.v v10, (a3), a7, v0.t + li a3, 208 + vor.vx v10, v8, a3 + addi a3, a6, 176 + vsse32.v v10, (a3), a7, v0.t + li a3, 720 + vor.vx v10, v8, a3 + addi a3, a6, 180 + vsse32.v v10, (a3), a7, v0.t + li a3, 1232 + vor.vx v10, v8, a3 + addi a3, a6, 184 + vsse32.v v10, (a3), a7, v0.t + li a3, 1744 + vor.vx v10, v8, a3 + addi a3, a6, 188 + vsse32.v v10, (a3), a7, v0.t + li a3, 24 + vor.vx v10, v8, a3 + addi a3, a6, 192 + vsse32.v v10, (a3), a7, v0.t + li a3, 536 + vor.vx v10, v8, a3 + addi a3, a6, 196 + vsse32.v v10, (a3), a7, v0.t + li a3, 1048 + vor.vx v10, v8, a3 + addi a3, a6, 200 + vsse32.v v10, (a3), a7, v0.t + li a3, 1560 + vor.vx v10, v8, a3 + addi a3, a6, 204 + vsse32.v v10, (a3), a7, v0.t + li a3, 88 + vor.vx v10, v8, a3 + addi a3, a6, 208 + vsse32.v v10, (a3), a7, v0.t + li a3, 600 + vor.vx v10, v8, a3 + addi a3, a6, 212 + vsse32.v v10, (a3), a7, v0.t + li a3, 1112 + vor.vx v10, v8, a3 + addi a3, a6, 216 + vsse32.v v10, (a3), a7, v0.t + li a3, 1624 + vor.vx v10, v8, a3 + addi a3, a6, 220 + vsse32.v v10, (a3), a7, v0.t + li a3, 152 + vor.vx v10, v8, a3 + addi a3, a6, 224 + vsse32.v v10, (a3), a7, v0.t vor.vx v10, v8, s4 - addi s3, a3, 228 - vsse32.v v10, (s3), a7, v0.t + addi a3, a6, 228 + vsse32.v v10, (a3), a7, v0.t vor.vx v10, v8, s5 - addi s3, a3, 232 - vsse32.v v10, (s3), a7, v0.t + addi a3, a6, 232 + vsse32.v v10, (a3), a7, v0.t vor.vx v10, v8, s6 - addi s3, a3, 236 - vsse32.v v10, (s3), a7, v0.t + addi a3, a6, 236 + vsse32.v v10, (a3), a7, v0.t vor.vx v10, v8, s7 - addi s3, a3, 240 - vsse32.v v10, (s3), a7, v0.t + addi a3, a6, 240 + vsse32.v v10, (a3), a7, v0.t vor.vx v10, v8, s8 - addi s3, a3, 244 - vsse32.v v10, (s3), a7, v0.t + addi a3, a6, 244 + vsse32.v v10, (a3), a7, v0.t vor.vx v10, v8, s9 - addi s3, a3, 248 - vsse32.v v10, (s3), a7, v0.t + addi a3, a6, 248 + vsse32.v v10, (a3), a7, v0.t vor.vx v10, v8, s10 - addi s3, a3, 252 - vsse32.v v10, (s3), a7, v0.t - li s3, 32 - vor.vx v10, v8, s3 - addi s3, a3, 256 - vsse32.v v10, (s3), a7, v0.t + addi a3, a6, 252 + vsse32.v v10, (a3), a7, v0.t + li a3, 32 + vor.vx v10, v8, a3 + addi a3, a6, 256 + vsse32.v v10, (a3), a7, v0.t vor.vx v10, v8, s11 - addi s3, a3, 260 - vsse32.v v10, (s3), a7, v0.t + addi a3, a6, 260 + vsse32.v v10, (a3), a7, v0.t vor.vx v10, v8, ra - addi s3, a3, 264 - vsse32.v v10, (s3), a7, v0.t + addi a3, a6, 264 + vsse32.v v10, (a3), a7, v0.t vor.vx v10, v8, a2 - addi s3, a3, 268 - vsse32.v v10, (s3), a7, v0.t + addi a3, a6, 268 + vsse32.v v10, (a3), a7, v0.t vor.vx v10, v8, t0 - addi s3, a3, 272 - vsse32.v v10, (s3), a7, v0.t + addi a3, a6, 272 + vsse32.v v10, (a3), a7, v0.t vor.vx v10, v8, t1 - addi s3, a3, 276 - vsse32.v v10, (s3), a7, v0.t + addi a3, a6, 276 + vsse32.v v10, (a3), a7, v0.t vor.vx v10, v8, t2 - addi s3, a3, 280 - vsse32.v v10, (s3), a7, v0.t + addi a3, a6, 280 + vsse32.v v10, (a3), a7, v0.t vor.vx v10, v8, t3 - addi s3, a3, 284 - vsse32.v v10, (s3), a7, v0.t - li s3, 160 - vor.vx v10, v8, s3 - addi s3, a3, 288 - vsse32.v v10, (s3), a7, v0.t + addi a3, a6, 284 + vsse32.v v10, (a3), a7, v0.t + li a3, 160 + vor.vx v10, v8, a3 + addi a3, a6, 288 + vsse32.v v10, (a3), a7, v0.t vor.vx v10, v8, t4 - addi s3, a3, 292 - vsse32.v v10, (s3), a7, v0.t + addi a3, a6, 292 + vsse32.v v10, (a3), a7, v0.t vor.vx v10, v8, t5 - addi s3, a3, 296 - vsse32.v v10, (s3), a7, v0.t + addi a3, a6, 296 + vsse32.v v10, (a3), a7, v0.t vor.vx v10, v8, t6 - addi s3, a3, 300 - vsse32.v v10, (s3), a7, v0.t + addi a3, a6, 300 + vsse32.v v10, (a3), a7, v0.t vor.vx v10, v8, s0 - addi s3, a3, 304 - vsse32.v v10, (s3), a7, v0.t + addi a3, a6, 304 + vsse32.v v10, (a3), a7, v0.t vor.vx v10, v8, a5 - addi s3, a3, 308 - vsse32.v v10, (s3), a7, v0.t + addi a3, a6, 308 + vsse32.v v10, (a3), a7, v0.t vor.vx v10, v8, s1 - addi s3, a3, 312 - vsse32.v v10, (s3), a7, v0.t + addi a3, a6, 312 + vsse32.v v10, (a3), a7, v0.t vor.vx v10, v8, s2 - addi s3, a3, 316 - vsse32.v v10, (s3), a7, v0.t + addi a3, a6, 316 + vsse32.v v10, (a3), a7, v0.t add a1, a1, a0 vadd.vx v8, v8, a0 - add a3, a3, a6 + add a6, a6, s3 bne a4, a1, .LBB0_39 # %bb.40: # %for.cond673.preheader.preheader li a0, 32 @@ -3435,9 +3435,9 @@ vsetvli a0, zero, e64, m2, ta, ma vid.v v8 vmul.vx v8, v8, s8 - sd s11, 216(sp) # 8-byte Folded Spill addi a0, sp, 1072 vs2r.v v8, (a0) # Unknown-size Folded Spill + sd s11, 216(sp) # 8-byte Folded Spill j .LBB1_47 .LBB1_46: # %for.inc212 # in Loop: Header=BB1_47 Depth=1 @@ -3515,10 +3515,10 @@ ld s4, 96(sp) # 8-byte Folded Reload addi a0, s4, -1 sd a0, 192(sp) # 8-byte Folded Spill + addi a0, sp, 1072 + vl2r.v v0, (a0) # Unknown-size Folded Reload li a0, 2 li ra, 24 - addi a1, sp, 1072 - vl2r.v v0, (a1) # Unknown-size Folded Reload bne s7, a0, .LBB1_187 # %bb.52: # %if.then50 # in Loop: Header=BB1_47 Depth=1 @@ -3553,12 +3553,12 @@ bnez a0, .LBB1_43 # %bb.56: # %if.end77 # in Loop: Header=BB1_47 Depth=1 + addi a0, sp, 1072 + vl2r.v v0, (a0) # Unknown-size Folded Reload ld a0, 120(sp) # 8-byte Folded Reload ld t6, 208(sp) # 8-byte Folded Reload li s7, 1 li ra, 24 - addi a1, sp, 1072 - vl2r.v v0, (a1) # Unknown-size Folded Reload beqz a0, .LBB1_64 # %bb.57: # %for.body83.preheader # in Loop: Header=BB1_47 Depth=1 @@ -4557,9 +4557,9 @@ ld a1, 208(sp) # 8-byte Folded Reload add a1, a0, a1 call memmove@plt + li ra, 24 addi a0, sp, 1072 vl2r.v v0, (a0) # Unknown-size Folded Reload - li ra, 24 j .LBB1_187 .LBB1_178: # %if.else121 # in Loop: Header=BB1_47 Depth=1 @@ -5097,16 +5097,16 @@ .LBB1_208: # in Loop: Header=BB1_189 Depth=2 ld a1, 248(sp) # 8-byte Folded Reload sext.w s1, s1 - li ra, 24 addi a0, sp, 1072 vl2r.v v0, (a0) # Unknown-size Folded Reload + li ra, 24 li a0, 31 blt a0, s1, .LBB1_188 j .LBB1_210 .LBB1_209: # in Loop: Header=BB1_189 Depth=2 - li ra, 24 addi a0, sp, 1072 vl2r.v v0, (a0) # Unknown-size Folded Reload + li ra, 24 ld a1, 248(sp) # 8-byte Folded Reload .LBB1_210: # %for.cond69.preheader.i.preheader # in Loop: Header=BB1_189 Depth=2 --- build.head//MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/transform8x8.s 2023-11-13 08:03:22.271561176 +0000 +++ build//MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/transform8x8.s 2023-11-13 08:03:17.323704200 +0000 @@ -417,13 +417,13 @@ sd a6, 104(sp) # 8-byte Folded Spill slli a6, a6, 5 sd a6, 280(sp) # 8-byte Folded Spill - li t0, 2 csrr a0, vlenb slli a0, a0, 1 add a0, sp, a0 addi a0, a0, 2047 addi a0, a0, 609 vs2r.v v18, (a0) # Unknown-size Folded Spill + li t0, 2 j .LBB1_29 .LBB1_26: # %if.end287 # in Loop: Header=BB1_29 Depth=1 @@ -437,13 +437,13 @@ .LBB1_27: # %if.end288 # in Loop: Header=BB1_29 Depth=1 call reset_coding_state_cs_cm@plt - li t0, 2 csrr a0, vlenb slli a0, a0, 1 add a0, sp, a0 addi a0, a0, 2047 addi a0, a0, 609 vl2r.v v18, (a0) # Unknown-size Folded Reload + li t0, 2 li ra, 24 .LBB1_28: # %for.inc291 # in Loop: Header=BB1_29 Depth=1 @@ -667,18 +667,19 @@ fmv.d fs1, fa0 .Lpcrel_hi9: auipc a0, %got_pcrel_hi(cofAC8x8) - ld s0, %pcrel_lo(.Lpcrel_hi9)(a0) + sd s1, 272(sp) # 8-byte Folded Spill + ld s1, %pcrel_lo(.Lpcrel_hi9)(a0) ld a0, 0(s7) - ld a1, 0(s0) + ld a1, 0(s1) lui a2, 3 add a0, a0, a2 ld a0, 1872(a0) - sd s1, 272(sp) # 8-byte Folded Spill - ld s1, 384(sp) # 8-byte Folded Reload - slli s1, s1, 3 - add a1, a1, s1 + mv s0, s7 + ld s7, 384(sp) # 8-byte Folded Reload + slli s7, s7, 3 + add a1, a1, s7 ld a1, 0(a1) - add a0, a0, s1 + add a0, a0, s7 ld a0, 0(a0) ld a1, 0(a1) ld a2, 0(a0) @@ -686,14 +687,14 @@ ld a1, 0(a2) li a2, 260 call memcpy@plt - ld a0, 0(s7) - ld a1, 0(s0) + ld a0, 0(s0) + ld a1, 0(s1) lui a2, 3 add a0, a0, a2 ld a0, 1872(a0) - add a1, a1, s1 + add a1, a1, s7 ld a1, 0(a1) - add a0, a0, s1 + add a0, a0, s7 ld a0, 0(a0) ld a1, 0(a1) ld a2, 0(a0) @@ -701,14 +702,14 @@ ld a1, 8(a2) li a2, 260 call memcpy@plt - ld a0, 0(s7) - ld a1, 0(s0) + ld a0, 0(s0) + ld a1, 0(s1) lui a2, 3 add a0, a0, a2 ld a0, 1872(a0) - add a1, a1, s1 + add a1, a1, s7 ld a1, 0(a1) - add a0, a0, s1 + add a0, a0, s7 ld a0, 0(a0) ld a1, 8(a1) ld a2, 8(a0) @@ -716,14 +717,14 @@ ld a1, 0(a2) li a2, 260 call memcpy@plt - ld a0, 0(s7) - ld a1, 0(s0) + ld a0, 0(s0) + ld a1, 0(s1) lui a2, 3 add a0, a0, a2 ld a0, 1872(a0) - add a1, a1, s1 + add a1, a1, s7 ld a1, 0(a1) - add a0, a0, s1 + add a0, a0, s7 ld a0, 0(a0) ld a1, 8(a1) ld a2, 8(a0) @@ -731,14 +732,14 @@ ld a1, 8(a2) li a2, 260 call memcpy@plt - ld a0, 0(s7) - ld a1, 0(s0) + ld a0, 0(s0) + ld a1, 0(s1) lui a2, 3 add a0, a0, a2 ld a0, 1872(a0) - add a1, a1, s1 + add a1, a1, s7 ld a1, 0(a1) - add a0, a0, s1 + add a0, a0, s7 ld a0, 0(a0) ld a1, 16(a1) ld a2, 16(a0) @@ -746,14 +747,14 @@ ld a1, 0(a2) li a2, 260 call memcpy@plt - ld a0, 0(s7) - ld a1, 0(s0) + ld a0, 0(s0) + ld a1, 0(s1) lui a2, 3 add a0, a0, a2 ld a0, 1872(a0) - add a1, a1, s1 + add a1, a1, s7 ld a1, 0(a1) - add a0, a0, s1 + add a0, a0, s7 ld a0, 0(a0) ld a1, 16(a1) ld a2, 16(a0) @@ -761,14 +762,14 @@ ld a1, 8(a2) li a2, 260 call memcpy@plt - ld a0, 0(s7) - ld a1, 0(s0) + ld a0, 0(s0) + ld a1, 0(s1) lui a2, 3 add a0, a0, a2 ld a0, 1872(a0) - add a1, a1, s1 + add a1, a1, s7 ld a1, 0(a1) - add a0, a0, s1 + add a0, a0, s7 ld a0, 0(a0) ld a1, 24(a1) ld a2, 24(a0) @@ -776,16 +777,16 @@ ld a1, 0(a2) li a2, 260 call memcpy@plt - ld a0, 0(s7) - ld a1, 0(s0) + ld a0, 0(s0) + ld a1, 0(s1) + ld s1, 272(sp) # 8-byte Folded Reload lui a2, 3 add a0, a0, a2 - lui s0, 3 ld a0, 1872(a0) - add a1, a1, s1 + add a1, a1, s7 ld a1, 0(a1) - add a0, a0, s1 - ld s1, 272(sp) # 8-byte Folded Reload + add a0, a0, s7 + mv s7, s0 ld a0, 0(a0) ld a1, 24(a1) ld a2, 24(a0) @@ -840,10 +841,11 @@ ld a0, 56(a0) add a1, a1, a2 vle16.v v9, (a1) - ld a1, 0(s7) + ld a1, 0(s0) add a0, a0, a2 vle16.v v10, (a0) - addiw a0, s0, 1896 + lui a0, 3 + addiw a0, a0, 1896 add a0, a1, a0 lw a1, 1076(a0) addi a2, sp, 2047 @@ -1009,14 +1011,14 @@ sw a0, 0(a2) sd s5, 256(sp) # 8-byte Folded Spill .LBB1_41: # in Loop: Header=BB1_29 Depth=1 - mv s1, s0 - li t0, 2 csrr a0, vlenb slli a0, a0, 1 add a0, sp, a0 addi a0, a0, 2047 addi a0, a0, 609 vl2r.v v18, (a0) # Unknown-size Folded Reload + mv s1, s0 + li t0, 2 li ra, 24 ld s0, 360(sp) # 8-byte Folded Reload j .LBB1_28 @@ -3676,7 +3678,7 @@ addiw a5, a3, 876 add a5, a4, a5 ld a3, 996(a5) - sd a2, 128(sp) # 8-byte Folded Spill + sd a2, 136(sp) # 8-byte Folded Spill slli t0, a0, 3 add a3, a3, t0 ld a2, 0(a3) @@ -3715,14 +3717,13 @@ addi s0, a6, %pcrel_lo(.Lpcrel_hi25) .LBB4_6: # %land.end sd a0, 48(sp) # 8-byte Folded Spill - sd a7, 152(sp) # 8-byte Folded Spill andi a6, t0, 8 ld a0, 0(a3) - sd a0, 120(sp) # 8-byte Folded Spill + sd a0, 128(sp) # 8-byte Folded Spill ld a0, 8(a3) sd a0, 96(sp) # 8-byte Folded Spill andi a2, a2, -8 - sd a2, 144(sp) # 8-byte Folded Spill + sd a2, 152(sp) # 8-byte Folded Spill addi t2, sp, 328 addi t1, sp, 216 sd t3, 40(sp) # 8-byte Folded Spill @@ -3732,108 +3733,106 @@ # %bb.7: # %if.else572 li a0, 0 li s2, 0 - sd zero, 136(sp) # 8-byte Folded Spill + sd zero, 144(sp) # 8-byte Folded Spill lui a2, 244 - addi a3, a2, 575 + addi t0, a2, 575 vsetivli zero, 16, e8, m1, ta, ma vmv.v.i v8, -1 - addi t0, sp, 160 - vse8.v v8, (t0) + addi t3, sp, 160 + vse8.v v8, (t3) li a2, 536 mul a2, t5, a2 .Lpcrel_hi36: - auipc a7, %got_pcrel_hi(input) - ld a7, %pcrel_lo(.Lpcrel_hi36)(a7) + auipc a3, %got_pcrel_hi(input) + ld a3, %pcrel_lo(.Lpcrel_hi36)(a3) add a2, t4, a2 - addi t3, a2, 472 + addi t4, a2, 472 vsetivli zero, 2, e64, m1, ta, ma - ld a2, 0(a7) + ld a2, 0(a3) vmv.v.i v8, 0 - addi t4, sp, 176 - vse64.v v8, (t4) + addi t5, sp, 176 + vse64.v v8, (t5) addi a2, a2, 2047 - addi t5, a2, 1961 - addi t6, s0, 1 - li s0, -1 + addi t6, a2, 1961 + addi s0, s0, 1 lui a2, 3 - addiw s1, a2, 848 - li s3, 64 - li s4, -1 + addiw s3, a2, 848 + li s4, 64 + li s5, -1 j .LBB4_11 .LBB4_8: # %if.else661 # in Loop: Header=BB4_11 Depth=1 slli a2, s2, 2 - ld a7, 120(sp) # 8-byte Folded Reload - add a7, a7, a2 - sw s8, 0(a7) - ld a7, 96(sp) # 8-byte Folded Reload - add a2, a7, a2 - sw s4, 0(a2) + ld a3, 128(sp) # 8-byte Folded Reload + add a3, a3, a2 + sw s8, 0(a3) + ld a3, 96(sp) # 8-byte Folded Reload + add a2, a3, a2 + sw s5, 0(a2) addiw s2, s2, 1 - li s4, -1 + li s5, -1 .LBB4_9: # %for.inc682 # in Loop: Header=BB4_11 Depth=1 li a2, 1 - sd a2, 136(sp) # 8-byte Folded Spill + sd a2, 144(sp) # 8-byte Folded Spill .LBB4_10: # %for.inc682 # in Loop: Header=BB4_11 Depth=1 addi a0, a0, 1 - addi t6, t6, 2 - beq a0, s3, .LBB4_45 + addi s0, s0, 2 + beq a0, s4, .LBB4_45 .LBB4_11: # %for.body584 # =>This Inner Loop Header: Depth=1 - lbu s8, -1(t6) - lbu s11, 0(t6) + lbu s8, -1(s0) + lbu s11, 0(s0) andi s6, a0, 3 - slli s5, s6, 2 - or a2, t0, s5 + slli a3, s6, 2 + or a2, t3, a3 lw s7, 0(a2) - slli a7, s11, 6 - add a7, a4, a7 - slli s9, s8, 2 - add s9, s9, s1 - add s9, a7, s9 - ld a7, 152(sp) # 8-byte Folded Reload - lw a7, 0(a7) + slli s9, s11, 6 + add s9, a4, s9 + slli s10, s8, 2 + add s10, s10, s3 + add s9, s9, s10 + lw ra, 0(a7) lw s10, 0(s9) addi s7, s7, 1 sw s7, 0(a2) - beqz a7, .LBB4_13 + beqz ra, .LBB4_13 # %bb.12: # %if.then606 # in Loop: Header=BB4_11 Depth=1 - ld a7, 1020(a5) - ld ra, 128(sp) # 8-byte Folded Reload - slli ra, ra, 3 - add a7, a7, ra - ld a7, 0(a7) - ld ra, 144(sp) # 8-byte Folded Reload + ld ra, 1020(a5) + ld s1, 136(sp) # 8-byte Folded Reload + slli s1, s1, 3 + add s1, ra, s1 + ld s1, 0(s1) + ld ra, 152(sp) # 8-byte Folded Reload addw s11, ra, s11 slli s11, s11, 3 - add a7, a7, s11 - ld a7, 0(a7) + add s1, s1, s11 + ld s1, 0(s1) add s8, a6, s8 slli s8, s8, 2 - add a7, a7, s8 - sw zero, 0(a7) + add s1, s1, s8 + sw zero, 0(s1) .LBB4_13: # %if.end616 # in Loop: Header=BB4_11 Depth=1 - addi s4, s4, 1 + addi s5, s5, 1 beqz s10, .LBB4_10 # %bb.14: # %if.then619 # in Loop: Header=BB4_11 Depth=1 - lw a7, 0(t3) + lw s1, 0(t4) sraiw s8, s10, 31 xor s10, s10, s8 subw s8, s10, s8 - beqz a7, .LBB4_16 + beqz s1, .LBB4_16 # %bb.15: # %land.lhs.true622 # in Loop: Header=BB4_11 Depth=1 - lw a7, 0(t5) - beqz a7, .LBB4_18 + lw s1, 0(t6) + beqz s1, .LBB4_18 .LBB4_16: # %if.else661 # in Loop: Header=BB4_11 Depth=1 lw a2, 0(a1) - add a2, a2, a3 + add a2, a2, t0 sw a2, 0(a1) lw a2, 0(s9) bgez a2, .LBB4_8 @@ -3842,31 +3841,32 @@ j .LBB4_8 .LBB4_18: # %if.then626 # in Loop: Header=BB4_11 Depth=1 - lw a7, 0(a1) - add a7, a7, a3 - sw a7, 0(a1) - lw a7, 0(s9) - bgez a7, .LBB4_20 + lw s1, 0(a1) + add s1, s1, t0 + sw s1, 0(a1) + lw s1, 0(s9) + bgez s1, .LBB4_20 # %bb.19: # in Loop: Header=BB4_11 Depth=1 neg s8, s8 .LBB4_20: # %if.then626 # in Loop: Header=BB4_11 Depth=1 slli s6, s6, 3 - ld a7, 72(sp) # 8-byte Folded Reload - add s6, a7, s6 - ld a7, 0(s6) - or s5, t4, s5 - lw s6, 0(s5) - ld s9, 0(a7) + ld s1, 72(sp) # 8-byte Folded Reload + add s6, s1, s6 + ld s1, 0(s6) + or a3, t5, a3 + lw s6, 0(a3) + ld s9, 0(s1) slli s10, s6, 2 add s9, s9, s10 sw s8, 0(s9) - ld a7, 8(a7) - add a7, a7, s10 - sw s7, 0(a7) + ld s1, 8(s1) + add s1, s1, s10 + sw s7, 0(s1) addi s6, s6, 1 - sw s6, 0(s5) - sw s0, 0(a2) + sw s6, 0(a3) + li a3, -1 + sw a3, 0(a2) j .LBB4_9 .LBB4_21: # %vector.ph .Lpcrel_hi27: @@ -3874,7 +3874,7 @@ ld s6, %pcrel_lo(.Lpcrel_hi27)(a0) li s4, 0 li s2, 0 - sd zero, 136(sp) # 8-byte Folded Spill + sd zero, 144(sp) # 8-byte Folded Spill ld a0, 0(s6) .Lpcrel_hi28: auipc a2, %got_pcrel_hi(qp_rem_matrix) @@ -3885,11 +3885,11 @@ ld a3, %pcrel_lo(.Lpcrel_hi29)(a3) ld a2, 0(a2) add a0, a0, s5 - lw a7, 0(a0) + lw t6, 0(a0) ld a0, 0(a3) add a2, a2, s5 lw a2, 0(a2) - ld a3, 128(sp) # 8-byte Folded Reload + ld a3, 136(sp) # 8-byte Folded Reload slli a3, a3, 3 add a0, a0, a3 ld a0, 0(a0) @@ -3904,176 +3904,177 @@ add a0, a0, a2 ld t3, 0(t3) ld a0, 0(a0) - sd a0, 112(sp) # 8-byte Folded Spill + sd a0, 120(sp) # 8-byte Folded Spill add t0, t0, a3 ld a0, 0(t0) add a3, t3, a3 ld a3, 0(a3) - slli t0, a7, 3 + slli t0, t6, 3 add a0, a0, t0 ld a0, 0(a0) - sd a0, 104(sp) # 8-byte Folded Spill + sd a0, 112(sp) # 8-byte Folded Spill add a2, a3, a2 ld a0, 0(a2) sd a0, 88(sp) # 8-byte Folded Spill vsetvli a0, zero, e64, m8, ta, ma vid.v v8 vmsleu.vi v0, v8, 7 - lui a0, 3 - addiw s9, a0, 848 - add a3, a4, s9 - li t3, 64 - vlse32.v v8, (a3), t3, v0.t + lui s11, 3 + addiw a0, s11, 848 + sd a0, 104(sp) # 8-byte Folded Spill + add a0, a4, a0 + li t0, 64 + vlse32.v v8, (a0), t0, v0.t csrr a2, vlenb - li t0, 44 - mul a2, a2, t0 + li a3, 44 + mul a2, a2, a3 add a2, sp, a2 addi a2, a2, 464 vs4r.v v8, (a2) # Unknown-size Folded Spill - addi a2, a3, 28 - vlse32.v v24, (a2), t3, v0.t + addi a2, a0, 28 + vlse32.v v24, (a2), t0, v0.t csrr a2, vlenb - li t0, 20 - mul a2, a2, t0 + li a3, 20 + mul a2, a2, a3 add a2, sp, a2 addi a2, a2, 464 vs4r.v v24, (a2) # Unknown-size Folded Spill vsetvli zero, zero, e32, m4, ta, ma - addi a2, a3, 4 - vlse32.v v8, (a2), t3, v0.t + addi a2, a0, 4 + vlse32.v v8, (a2), t0, v0.t csrr a2, vlenb - li t0, 40 - mul a2, a2, t0 + li a3, 40 + mul a2, a2, a3 add a2, sp, a2 addi a2, a2, 464 vs4r.v v8, (a2) # Unknown-size Folded Spill - addi a2, a3, 24 - vlse32.v v20, (a2), t3, v0.t + addi a2, a0, 24 + vlse32.v v20, (a2), t0, v0.t csrr a2, vlenb slli a2, a2, 4 add a2, sp, a2 addi a2, a2, 464 vs4r.v v20, (a2) # Unknown-size Folded Spill - addi a2, a3, 8 - vlse32.v v4, (a2), t3, v0.t + addi a2, a0, 8 + vlse32.v v4, (a2), t0, v0.t csrr a2, vlenb slli a2, a2, 3 add a2, sp, a2 addi a2, a2, 464 vs4r.v v4, (a2) # Unknown-size Folded Spill - addi a2, a3, 20 - vlse32.v v16, (a2), t3, v0.t + addi a2, a0, 20 + vlse32.v v16, (a2), t0, v0.t csrr a2, vlenb - li t0, 12 - mul a2, a2, t0 + li a3, 12 + mul a2, a2, a3 add a2, sp, a2 addi a2, a2, 464 vs4r.v v16, (a2) # Unknown-size Folded Spill - addi a2, a3, 12 - vlse32.v v12, (a2), t3, v0.t + addi a2, a0, 12 + vlse32.v v12, (a2), t0, v0.t csrr a2, vlenb slli a2, a2, 2 add a2, sp, a2 addi a2, a2, 464 vs4r.v v12, (a2) # Unknown-size Folded Spill - addi t0, a3, 16 + addi a3, a0, 16 addi a2, sp, 200 - vlse32.v v8, (t0), t3, v0.t - addi t0, sp, 464 - vs4r.v v8, (t0) # Unknown-size Folded Spill - csrr t0, vlenb - li t3, 44 - mul t0, t0, t3 - add t0, sp, t0 - addi t0, t0, 464 - vl4r.v v28, (t0) # Unknown-size Folded Reload + vlse32.v v8, (a3), t0, v0.t + addi a3, sp, 464 + vs4r.v v8, (a3) # Unknown-size Folded Spill + csrr a3, vlenb + li t0, 44 + mul a3, a3, t0 + add a3, sp, a3 + addi a3, a3, 464 + vl4r.v v28, (a3) # Unknown-size Folded Reload vadd.vv v28, v24, v28 - csrr t0, vlenb - li t3, 40 - mul t0, t0, t3 - add t0, sp, t0 - addi t0, t0, 464 - vl4r.v v24, (t0) # Unknown-size Folded Reload + csrr a3, vlenb + li t0, 40 + mul a3, a3, t0 + add a3, sp, a3 + addi a3, a3, 464 + vl4r.v v24, (a3) # Unknown-size Folded Reload vadd.vv v24, v20, v24 vadd.vv v20, v16, v4 vadd.vv v16, v8, v12 vadd.vv v12, v16, v28 - csrr t0, vlenb - slli t0, t0, 5 - add t0, sp, t0 - addi t0, t0, 464 - vs4r.v v12, (t0) # Unknown-size Folded Spill + csrr a3, vlenb + slli a3, a3, 5 + add a3, sp, a3 + addi a3, a3, 464 + vs4r.v v12, (a3) # Unknown-size Folded Spill vadd.vv v8, v20, v24 - csrr t0, vlenb - li t3, 36 - mul t0, t0, t3 - add t0, sp, t0 - addi t0, t0, 464 - vs4r.v v8, (t0) # Unknown-size Folded Spill + csrr a3, vlenb + li t0, 36 + mul a3, a3, t0 + add a3, sp, a3 + addi a3, a3, 464 + vs4r.v v8, (a3) # Unknown-size Folded Spill vadd.vv v4, v12, v8 vse32.v v4, (a2), v0.t vsub.vv v12, v28, v16 - csrr t0, vlenb - li t3, 24 - mul t0, t0, t3 - add t0, sp, t0 - addi t0, t0, 464 - vs4r.v v12, (t0) # Unknown-size Folded Spill + csrr a3, vlenb + li t0, 24 + mul a3, a3, t0 + add a3, sp, a3 + addi a3, a3, 464 + vs4r.v v12, (a3) # Unknown-size Folded Spill vsub.vv v8, v24, v20 - csrr t0, vlenb - li t3, 28 - mul t0, t0, t3 - add t0, sp, t0 - addi t0, t0, 464 - vs4r.v v8, (t0) # Unknown-size Folded Spill + csrr a3, vlenb + li t0, 28 + mul a3, a3, t0 + add a3, sp, a3 + addi a3, a3, 464 + vs4r.v v8, (a3) # Unknown-size Folded Spill vsra.vi v8, v8, 1 vadd.vv v8, v12, v8 - addi t0, sp, 264 - vse32.v v8, (t0), v0.t - csrr t0, vlenb - li t3, 44 - mul t0, t0, t3 - add t0, sp, t0 - addi t0, t0, 464 - vl4r.v v8, (t0) # Unknown-size Folded Reload - csrr t0, vlenb - li t3, 20 - mul t0, t0, t3 - add t0, sp, t0 - addi t0, t0, 464 - vl4r.v v12, (t0) # Unknown-size Folded Reload + addi a3, sp, 264 + vse32.v v8, (a3), v0.t + csrr a3, vlenb + li t0, 44 + mul a3, a3, t0 + add a3, sp, a3 + addi a3, a3, 464 + vl4r.v v8, (a3) # Unknown-size Folded Reload + csrr a3, vlenb + li t0, 20 + mul a3, a3, t0 + add a3, sp, a3 + addi a3, a3, 464 + vl4r.v v12, (a3) # Unknown-size Folded Reload vsub.vv v8, v8, v12 - csrr t0, vlenb - li t3, 40 - mul t0, t0, t3 - add t0, sp, t0 - addi t0, t0, 464 - vl4r.v v12, (t0) # Unknown-size Folded Reload - csrr t0, vlenb - slli t0, t0, 4 - add t0, sp, t0 - addi t0, t0, 464 - vl4r.v v16, (t0) # Unknown-size Folded Reload + csrr a3, vlenb + li t0, 40 + mul a3, a3, t0 + add a3, sp, a3 + addi a3, a3, 464 + vl4r.v v12, (a3) # Unknown-size Folded Reload + csrr a3, vlenb + slli a3, a3, 4 + add a3, sp, a3 + addi a3, a3, 464 + vl4r.v v16, (a3) # Unknown-size Folded Reload vsub.vv v12, v12, v16 - csrr t0, vlenb - li t3, 12 - mul t0, t0, t3 - add t0, sp, t0 - addi t0, t0, 464 - vl4r.v v16, (t0) # Unknown-size Folded Reload - csrr t0, vlenb - slli t0, t0, 3 - add t0, sp, t0 - addi t0, t0, 464 - vl4r.v v20, (t0) # Unknown-size Folded Reload + csrr a3, vlenb + li t0, 12 + mul a3, a3, t0 + add a3, sp, a3 + addi a3, a3, 464 + vl4r.v v16, (a3) # Unknown-size Folded Reload + csrr a3, vlenb + slli a3, a3, 3 + add a3, sp, a3 + addi a3, a3, 464 + vl4r.v v20, (a3) # Unknown-size Folded Reload vsub.vv v20, v20, v16 - csrr t0, vlenb - slli t0, t0, 2 - add t0, sp, t0 - addi t0, t0, 464 - vl4r.v v16, (t0) # Unknown-size Folded Reload - addi t0, sp, 464 - vl4r.v v24, (t0) # Unknown-size Folded Reload + csrr a3, vlenb + slli a3, a3, 2 + add a3, sp, a3 + addi a3, a3, 464 + vl4r.v v16, (a3) # Unknown-size Folded Reload + addi a3, sp, 464 + vl4r.v v24, (a3) # Unknown-size Folded Reload vsub.vv v4, v16, v24 vsra.vi v16, v8, 1 vadd.vv v24, v16, v8 @@ -4091,127 +4092,127 @@ vadd.vv v12, v4, v12 vsra.vi v20, v4, 1 vadd.vv v12, v12, v20 - csrr t0, vlenb - li t3, 36 - mul t0, t0, t3 - add t0, sp, t0 - addi t0, t0, 464 - vl4r.v v20, (t0) # Unknown-size Folded Reload - csrr t0, vlenb - slli t0, t0, 5 - add t0, sp, t0 - addi t0, t0, 464 - vl4r.v v28, (t0) # Unknown-size Folded Reload + csrr a3, vlenb + li t0, 36 + mul a3, a3, t0 + add a3, sp, a3 + addi a3, a3, 464 + vl4r.v v20, (a3) # Unknown-size Folded Reload + csrr a3, vlenb + slli a3, a3, 5 + add a3, sp, a3 + addi a3, a3, 464 + vl4r.v v28, (a3) # Unknown-size Folded Reload vsub.vv v20, v28, v20 vse32.v v20, (t2), v0.t - csrr t0, vlenb - li t3, 24 - mul t0, t0, t3 - add t0, sp, t0 - addi t0, t0, 464 - vl4r.v v20, (t0) # Unknown-size Folded Reload + csrr a3, vlenb + li t0, 24 + mul a3, a3, t0 + add a3, sp, a3 + addi a3, a3, 464 + vl4r.v v20, (a3) # Unknown-size Folded Reload vsra.vi v20, v20, 1 - csrr t0, vlenb - li t3, 28 - mul t0, t0, t3 - add t0, sp, t0 - addi t0, t0, 464 - vl4r.v v28, (t0) # Unknown-size Folded Reload + csrr a3, vlenb + li t0, 28 + mul a3, a3, t0 + add a3, sp, a3 + addi a3, a3, 464 + vl4r.v v28, (a3) # Unknown-size Folded Reload vsub.vv v20, v20, v28 - addi t0, sp, 392 - vse32.v v20, (t0), v0.t + addi a3, sp, 392 + vse32.v v20, (a3), v0.t vsra.vi v20, v12, 2 vadd.vv v20, v20, v8 - addi t0, sp, 232 - vse32.v v20, (t0), v0.t + addi a3, sp, 232 + vse32.v v20, (a3), v0.t vsra.vi v20, v24, 2 vadd.vv v20, v16, v20 - addi t0, sp, 296 - vse32.v v20, (t0), v0.t + addi a3, sp, 296 + vse32.v v20, (a3), v0.t vsra.vi v16, v16, 2 vsub.vv v16, v24, v16 - addi t0, sp, 360 - vse32.v v16, (t0), v0.t + addi a3, sp, 360 + vse32.v v16, (a3), v0.t vsra.vi v8, v8, 2 vsub.vv v8, v8, v12 - addi t0, sp, 424 - vse32.v v8, (t0), v0.t - li t0, 32 - vlse32.v v8, (a2), t0, v0.t + addi a3, sp, 424 + vse32.v v8, (a3), v0.t + li a3, 32 + vlse32.v v8, (a2), a3, v0.t csrr a2, vlenb - li t3, 44 - mul a2, a2, t3 + li t0, 44 + mul a2, a2, t0 add a2, sp, a2 addi a2, a2, 464 vs4r.v v8, (a2) # Unknown-size Folded Spill addi a2, sp, 228 - vlse32.v v8, (a2), t0, v0.t + vlse32.v v8, (a2), a3, v0.t csrr a2, vlenb - li t3, 40 - mul a2, a2, t3 + li t0, 40 + mul a2, a2, t0 add a2, sp, a2 addi a2, a2, 464 vs4r.v v8, (a2) # Unknown-size Folded Spill addi a2, sp, 204 - vlse32.v v8, (a2), t0, v0.t + vlse32.v v8, (a2), a3, v0.t csrr a2, vlenb - li t3, 36 - mul a2, a2, t3 + li t0, 36 + mul a2, a2, t0 add a2, sp, a2 addi a2, a2, 464 vs4r.v v8, (a2) # Unknown-size Folded Spill addi a2, sp, 224 - vlse32.v v8, (a2), t0, v0.t + vlse32.v v8, (a2), a3, v0.t csrr a2, vlenb slli a2, a2, 5 add a2, sp, a2 addi a2, a2, 464 vs4r.v v8, (a2) # Unknown-size Folded Spill addi a2, sp, 208 - vlse32.v v4, (a2), t0, v0.t + vlse32.v v4, (a2), a3, v0.t csrr a2, vlenb slli a2, a2, 4 add a2, sp, a2 addi a2, a2, 464 vs4r.v v4, (a2) # Unknown-size Folded Spill addi a2, sp, 220 - vlse32.v v20, (a2), t0, v0.t + vlse32.v v20, (a2), a3, v0.t csrr a2, vlenb - li t3, 20 - mul a2, a2, t3 + li t0, 20 + mul a2, a2, t0 add a2, sp, a2 addi a2, a2, 464 vs4r.v v20, (a2) # Unknown-size Folded Spill addi a2, sp, 212 - vlse32.v v12, (a2), t0, v0.t + vlse32.v v12, (a2), a3, v0.t csrr a2, vlenb slli a2, a2, 3 add a2, sp, a2 addi a2, a2, 464 vs4r.v v12, (a2) # Unknown-size Folded Spill - vlse32.v v8, (t1), t0, v0.t + vlse32.v v8, (t1), a3, v0.t csrr a2, vlenb - li t0, 12 - mul a2, a2, t0 + li a3, 12 + mul a2, a2, a3 add a2, sp, a2 addi a2, a2, 464 vs4r.v v8, (a2) # Unknown-size Folded Spill csrr a2, vlenb - li t0, 44 - mul a2, a2, t0 + li a3, 44 + mul a2, a2, a3 add a2, sp, a2 addi a2, a2, 464 vl4r.v v16, (a2) # Unknown-size Folded Reload csrr a2, vlenb - li t0, 40 - mul a2, a2, t0 + li a3, 40 + mul a2, a2, a3 add a2, sp, a2 addi a2, a2, 464 vl4r.v v28, (a2) # Unknown-size Folded Reload vadd.vv v16, v28, v16 csrr a2, vlenb - li t0, 36 - mul a2, a2, t0 + li a3, 36 + mul a2, a2, a3 add a2, sp, a2 addi a2, a2, 464 vl4r.v v28, (a2) # Unknown-size Folded Reload @@ -4231,84 +4232,84 @@ vs4r.v v8, (a2) # Unknown-size Folded Spill vadd.vv v12, v28, v24 vadd.vv v8, v8, v12 - vse32.v v8, (a3), v0.t + vse32.v v8, (a0), v0.t vsub.vv v16, v16, v20 - csrr a2, vlenb - li a3, 24 - mul a2, a2, a3 - add a2, sp, a2 - addi a2, a2, 464 - vs4r.v v16, (a2) # Unknown-size Folded Spill + csrr a0, vlenb + li a2, 24 + mul a0, a0, a2 + add a0, sp, a0 + addi a0, a0, 464 + vs4r.v v16, (a0) # Unknown-size Folded Spill vsub.vv v8, v24, v28 - csrr a2, vlenb - li a3, 28 - mul a2, a2, a3 - add a2, sp, a2 - addi a2, a2, 464 - vs4r.v v8, (a2) # Unknown-size Folded Spill + csrr a0, vlenb + li a2, 28 + mul a0, a0, a2 + add a0, sp, a0 + addi a0, a0, 464 + vs4r.v v8, (a0) # Unknown-size Folded Spill vsra.vi v8, v8, 1 vadd.vv v8, v16, v8 - addiw a2, a0, 976 - add a2, a4, a2 - vse32.v v8, (a2), v0.t - csrr a2, vlenb - li a3, 44 - mul a2, a2, a3 - add a2, sp, a2 - addi a2, a2, 464 - vl4r.v v8, (a2) # Unknown-size Folded Reload - csrr a2, vlenb - li a3, 40 - mul a2, a2, a3 - add a2, sp, a2 - addi a2, a2, 464 - vl4r.v v16, (a2) # Unknown-size Folded Reload + addiw a0, s11, 976 + add a0, a4, a0 + vse32.v v8, (a0), v0.t + csrr a0, vlenb + li a2, 44 + mul a0, a0, a2 + add a0, sp, a0 + addi a0, a0, 464 + vl4r.v v8, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + li a2, 40 + mul a0, a0, a2 + add a0, sp, a0 + addi a0, a0, 464 + vl4r.v v16, (a0) # Unknown-size Folded Reload vsub.vv v8, v8, v16 - csrr a2, vlenb - li a3, 36 - mul a2, a2, a3 - add a2, sp, a2 - addi a2, a2, 464 - vl4r.v v16, (a2) # Unknown-size Folded Reload - csrr a2, vlenb - slli a2, a2, 5 - add a2, sp, a2 - addi a2, a2, 464 - vl4r.v v20, (a2) # Unknown-size Folded Reload + csrr a0, vlenb + li a2, 36 + mul a0, a0, a2 + add a0, sp, a0 + addi a0, a0, 464 + vl4r.v v16, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + slli a0, a0, 5 + add a0, sp, a0 + addi a0, a0, 464 + vl4r.v v20, (a0) # Unknown-size Folded Reload vsub.vv v28, v16, v20 - csrr a2, vlenb - li a3, 20 - mul a2, a2, a3 - add a2, sp, a2 - addi a2, a2, 464 - vl4r.v v16, (a2) # Unknown-size Folded Reload - csrr a2, vlenb - slli a2, a2, 4 - add a2, sp, a2 - addi a2, a2, 464 - vl4r.v v20, (a2) # Unknown-size Folded Reload + csrr a0, vlenb + li a2, 20 + mul a0, a0, a2 + add a0, sp, a0 + addi a0, a0, 464 + vl4r.v v16, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + slli a0, a0, 4 + add a0, sp, a0 + addi a0, a0, 464 + vl4r.v v20, (a0) # Unknown-size Folded Reload vsub.vv v4, v20, v16 - csrr a2, vlenb - li a3, 12 - mul a2, a2, a3 - add a2, sp, a2 - addi a2, a2, 464 - vl4r.v v16, (a2) # Unknown-size Folded Reload - csrr a2, vlenb - slli a2, a2, 3 - add a2, sp, a2 - addi a2, a2, 464 - vl4r.v v20, (a2) # Unknown-size Folded Reload + csrr a0, vlenb + li a2, 12 + mul a0, a0, a2 + add a0, sp, a0 + addi a0, a0, 464 + vl4r.v v16, (a0) # Unknown-size Folded Reload + csrr a0, vlenb + slli a0, a0, 3 + add a0, sp, a0 + addi a0, a0, 464 + vl4r.v v20, (a0) # Unknown-size Folded Reload vsub.vv v16, v20, v16 - csrr a2, vlenb - slli a2, a2, 2 - add a2, sp, a2 - addi a2, a2, 464 - vl4r.v v20, (a2) # Unknown-size Folded Reload + csrr a0, vlenb + slli a0, a0, 2 + add a0, sp, a0 + addi a0, a0, 464 + vl4r.v v20, (a0) # Unknown-size Folded Reload vsub.vv v12, v20, v12 - addiw a2, a0, 1104 - add a2, a4, a2 - vse32.v v12, (a2), v0.t + addiw a0, s11, 1104 + add a0, a4, a0 + vse32.v v12, (a0), v0.t vsra.vi v12, v8, 1 vadd.vv v20, v12, v8 vsra.vi v12, v4, 1 @@ -4325,41 +4326,41 @@ vadd.vv v20, v16, v20 vsra.vi v16, v16, 1 vadd.vv v16, v20, v16 - csrr a2, vlenb - li a3, 24 - mul a2, a2, a3 - add a2, sp, a2 - addi a2, a2, 464 - vl4r.v v20, (a2) # Unknown-size Folded Reload + csrr a0, vlenb + li a2, 24 + mul a0, a0, a2 + add a0, sp, a0 + addi a0, a0, 464 + vl4r.v v20, (a0) # Unknown-size Folded Reload vsra.vi v20, v20, 1 - csrr a2, vlenb - li a3, 28 - mul a2, a2, a3 - add a2, sp, a2 - addi a2, a2, 464 - vl4r.v v24, (a2) # Unknown-size Folded Reload + csrr a0, vlenb + li a2, 28 + mul a0, a0, a2 + add a0, sp, a0 + addi a0, a0, 464 + vl4r.v v24, (a0) # Unknown-size Folded Reload vsub.vv v20, v20, v24 - addiw a2, a0, 1232 - add a2, a4, a2 - vse32.v v20, (a2), v0.t + addiw a0, s11, 1232 + add a0, a4, a0 + vse32.v v20, (a0), v0.t vsra.vi v20, v16, 2 vadd.vv v20, v20, v8 - addiw a2, a0, 912 - add a2, a4, a2 - vse32.v v20, (a2), v0.t + addiw a0, s11, 912 + add a0, a4, a0 + vse32.v v20, (a0), v0.t vsra.vi v20, v28, 2 vadd.vv v20, v12, v20 - addiw a2, a0, 1040 - add a2, a4, a2 - vse32.v v20, (a2), v0.t + addiw a0, s11, 1040 + add a0, a4, a0 + vse32.v v20, (a0), v0.t vsra.vi v12, v12, 2 vsub.vv v12, v28, v12 - addiw a2, a0, 1168 - add a2, a4, a2 - vse32.v v12, (a2), v0.t + addiw a0, s11, 1168 + add a0, a4, a0 + vse32.v v12, (a0), v0.t vsra.vi v8, v8, 2 vsub.vv v8, v8, v16 - addiw a0, a0, 1296 + addiw a0, s11, 1296 add a0, a4, a0 vse32.v v8, (a0), v0.t vsetivli zero, 16, e8, m1, ta, ma @@ -4370,10 +4371,10 @@ vmv.v.i v8, 0 addi a0, sp, 176 vse64.v v8, (a0) - addi s5, a7, 16 - mv s6, a7 - addi a7, a7, 17 - sd a7, 64(sp) # 8-byte Folded Spill + addi s5, t6, 16 + mv s1, t6 + addi t6, t6, 17 + sd t6, 64(sp) # 8-byte Folded Spill .Lpcrel_hi32: auipc a0, %got_pcrel_hi(input) ld a0, %pcrel_lo(.Lpcrel_hi32)(a0) @@ -4398,14 +4399,14 @@ ld a2, 88(sp) # 8-byte Folded Reload add s11, a2, s11 ld a2, 0(s11) - add a2, a2, t5 - lw a2, 0(a2) - mul a0, a0, a2 - sllw a0, a0, s6 + add a0, a2, a0 + lw a0, 0(a0) + mul a0, t3, a0 + sllw a0, a0, s1 addi a0, a0, 32 sraiw a0, a0, 6 li a2, 1 - sd a2, 136(sp) # 8-byte Folded Spill + sd a2, 144(sp) # 8-byte Folded Spill .LBB4_23: # %if.end563 # in Loop: Header=BB4_24 Depth=1 sw a0, 0(t0) @@ -4415,127 +4416,127 @@ beq s4, a0, .LBB4_45 .LBB4_24: # %for.body414 # =>This Inner Loop Header: Depth=1 - lbu a3, 0(t4) - lbu a0, -1(t4) - andi s10, s4, 3 - slli a2, s10, 2 - slli t0, a3, 6 - add t0, a4, t0 - slli t5, a0, 2 - add t3, t5, s9 - add t0, t0, t3 + lbu s8, 0(t4) + lbu s10, -1(t4) + andi a3, s4, 3 + slli t5, a3, 2 + slli a0, s8, 6 + add t0, a4, a0 + slli a0, s10, 2 + ld a2, 104(sp) # 8-byte Folded Reload + add a2, a0, a2 + add t0, t0, a2 lw t3, 0(t0) - slli s11, a3, 3 - ld s1, 112(sp) # 8-byte Folded Reload - add s1, s1, s11 - ld s1, 0(s1) - addi a7, sp, 160 - or s8, a7, a2 - sraiw s3, t3, 31 - xor t3, t3, s3 - add s1, s1, t5 - lw s1, 0(s1) - ld s7, 104(sp) # 8-byte Folded Reload - add s7, s7, s11 - ld s7, 0(s7) - subw t3, t3, s3 - lw s3, 0(s8) - mul s1, s1, t3 - add s7, s7, t5 - lw t3, 0(s7) - ld a7, 152(sp) # 8-byte Folded Reload - lw s7, 0(a7) - addiw s3, s3, 1 - sw s3, 0(s8) - add t3, t3, s1 + slli s11, s8, 3 + ld a2, 120(sp) # 8-byte Folded Reload + add a2, a2, s11 + ld s3, 0(a2) + addi a2, sp, 160 + or a2, a2, t5 + sraiw s7, t3, 31 + xor t3, t3, s7 + add s3, s3, a0 + lw s3, 0(s3) + ld s6, 112(sp) # 8-byte Folded Reload + add s6, s6, s11 + ld s6, 0(s6) + subw t3, t3, s7 + lw s9, 0(a2) + mul s7, s3, t3 + add s6, s6, a0 + lw t3, 0(s6) + lw s6, 0(a7) + addiw s3, s9, 1 + sw s3, 0(a2) + add t3, t3, s7 sraw t3, t3, s5 - beqz s7, .LBB4_29 + beqz s6, .LBB4_29 # %bb.25: # %if.then444 # in Loop: Header=BB4_24 Depth=1 beqz t3, .LBB4_27 # %bb.26: # %cond.false # in Loop: Header=BB4_24 Depth=1 .Lpcrel_hi33: - auipc s7, %got_pcrel_hi(AdaptRndWeight) - ld s7, %pcrel_lo(.Lpcrel_hi33)(s7) - lw s7, 0(s7) - sllw a7, t3, s5 - subw a7, s1, a7 - mul a7, s7, a7 - ld s1, 56(sp) # 8-byte Folded Reload - add a7, a7, s1 - ld s1, 64(sp) # 8-byte Folded Reload - sraw s1, a7, s1 + auipc s6, %got_pcrel_hi(AdaptRndWeight) + ld s6, %pcrel_lo(.Lpcrel_hi33)(s6) + lw s6, 0(s6) + sllw s9, t3, s5 + subw s7, s7, s9 + mul s6, s6, s7 + ld s7, 56(sp) # 8-byte Folded Reload + add s6, s6, s7 + ld s7, 64(sp) # 8-byte Folded Reload + sraw s7, s6, s7 j .LBB4_28 .LBB4_27: # in Loop: Header=BB4_24 Depth=1 - li s1, 0 + li s7, 0 .LBB4_28: # %cond.end # in Loop: Header=BB4_24 Depth=1 - ld a7, 1020(a5) - ld s7, 128(sp) # 8-byte Folded Reload - slli s7, s7, 3 - add a7, a7, s7 - ld a7, 0(a7) - ld s7, 144(sp) # 8-byte Folded Reload - addw a3, s7, a3 - slli a3, a3, 3 - add a3, a7, a3 - ld a3, 0(a3) - add a0, a6, a0 - slli a0, a0, 2 - add a0, a3, a0 - sw s1, 0(a0) + ld s6, 1020(a5) + ld s9, 136(sp) # 8-byte Folded Reload + slli s9, s9, 3 + add s6, s6, s9 + ld s6, 0(s6) + ld s9, 152(sp) # 8-byte Folded Reload + addw s8, s9, s8 + slli s8, s8, 3 + add s6, s6, s8 + ld s6, 0(s6) + add s10, a6, s10 + slli s10, s10, 2 + add s6, s6, s10 + sw s7, 0(s6) .LBB4_29: # %if.end # in Loop: Header=BB4_24 Depth=1 addiw s0, s0, 1 beqz t3, .LBB4_37 # %bb.30: # %if.then473 # in Loop: Header=BB4_24 Depth=1 - lw a0, 0(t6) - beqz a0, .LBB4_32 + lw s6, 0(t6) + beqz s6, .LBB4_32 # %bb.31: # %land.lhs.true # in Loop: Header=BB4_24 Depth=1 - lw a0, 0(ra) - beqz a0, .LBB4_38 + lw s6, 0(ra) + beqz s6, .LBB4_38 .LBB4_32: # %if.else # in Loop: Header=BB4_24 Depth=1 - ld a0, 80(sp) # 8-byte Folded Reload - li a2, 1 - blt a2, t3, .LBB4_34 + ld a2, 80(sp) # 8-byte Folded Reload + li a3, 1 + blt a3, t3, .LBB4_34 # %bb.33: # %cond.false528 # in Loop: Header=BB4_24 Depth=1 - lw a0, 172(ra) - slli a0, a0, 6 + lw a2, 172(ra) + slli a2, a2, 6 .Lpcrel_hi35: - auipc a2, %pcrel_hi(COEFF_COST8x8) - addi a2, a2, %pcrel_lo(.Lpcrel_hi35) - add a2, a2, s0 - add a0, a2, a0 - lbu a0, 0(a0) + auipc a3, %pcrel_hi(COEFF_COST8x8) + addi a3, a3, %pcrel_lo(.Lpcrel_hi35) + add a3, a3, s0 + add a2, a3, a2 + lbu a2, 0(a2) .LBB4_34: # %cond.end535 # in Loop: Header=BB4_24 Depth=1 - lw a2, 0(a1) - add a0, a2, a0 - sw a0, 0(a1) - lw a7, 0(t0) - sraiw a0, t3, 31 - xor a3, t3, a0 - subw a3, a3, a0 - negw a0, a3 - mv a2, a0 - bltz a7, .LBB4_36 + lw a3, 0(a1) + add a2, a3, a2 + sw a2, 0(a1) + lw a3, 0(t0) + sraiw a2, t3, 31 + xor t3, t3, a2 + subw s8, t3, a2 + negw t3, s8 + mv a2, t3 + bltz a3, .LBB4_36 # %bb.35: # %cond.end535 # in Loop: Header=BB4_24 Depth=1 - mv a2, a3 + mv a2, s8 .LBB4_36: # %cond.end535 # in Loop: Header=BB4_24 Depth=1 - slli a7, s2, 2 - ld t3, 120(sp) # 8-byte Folded Reload - add t3, t3, a7 - sw a2, 0(t3) + slli a3, s2, 2 + ld t5, 128(sp) # 8-byte Folded Reload + add t5, t5, a3 + sw a2, 0(t5) ld a2, 96(sp) # 8-byte Folded Reload - add a7, a2, a7 - sw s0, 0(a7) + add a3, a2, a3 + sw s0, 0(a3) addiw s2, s2, 1 li s0, -1 lw a2, 0(t0) @@ -4546,62 +4547,62 @@ j .LBB4_23 .LBB4_38: # %if.then477 # in Loop: Header=BB4_24 Depth=1 - li a0, 1 - bge a0, t3, .LBB4_40 + li s6, 1 + bge s6, t3, .LBB4_40 # %bb.39: # in Loop: Header=BB4_24 Depth=1 - lui a0, 244 - addi a0, a0, 575 + lui s6, 244 + addi s7, s6, 575 j .LBB4_41 .LBB4_40: # %cond.false481 # in Loop: Header=BB4_24 Depth=1 - lw a0, 172(ra) - slli a0, a0, 6 + lw s6, 172(ra) + slli s6, s6, 6 .Lpcrel_hi34: - auipc a3, %pcrel_hi(COEFF_COST8x8) - addi a3, a3, %pcrel_lo(.Lpcrel_hi34) - add a0, a3, a0 - add a0, a0, s3 - lbu a0, 0(a0) + auipc s7, %pcrel_hi(COEFF_COST8x8) + addi s7, s7, %pcrel_lo(.Lpcrel_hi34) + add s6, s7, s6 + add s6, s6, s3 + lbu s7, 0(s6) .LBB4_41: # %cond.end489 # in Loop: Header=BB4_24 Depth=1 - lw a3, 0(a1) - add a0, a3, a0 - sw a0, 0(a1) - lw a7, 0(t0) - sraiw a0, t3, 31 - xor a3, t3, a0 - subw a3, a3, a0 - negw a0, a3 - mv t3, a0 - bltz a7, .LBB4_43 + lw s6, 0(a1) + add s6, s6, s7 + sw s6, 0(a1) + lw s6, 0(t0) + sraiw s7, t3, 31 + xor t3, t3, s7 + subw s8, t3, s7 + negw t3, s8 + mv s7, t3 + bltz s6, .LBB4_43 # %bb.42: # %cond.end489 # in Loop: Header=BB4_24 Depth=1 - mv t3, a3 + mv s7, s8 .LBB4_43: # %cond.end489 # in Loop: Header=BB4_24 Depth=1 - slli s10, s10, 3 - ld a7, 72(sp) # 8-byte Folded Reload - add s10, a7, s10 - ld a7, 0(s10) - addi s1, sp, 176 - or a2, s1, a2 - lw s1, 0(a2) - ld s7, 0(a7) - slli s10, s1, 2 - add s7, s7, s10 - sw t3, 0(s7) - ld a7, 8(a7) - add a7, a7, s10 - sw s3, 0(a7) - addi s1, s1, 1 - sw s1, 0(a2) - li a2, -1 - sw a2, 0(s8) + slli a3, a3, 3 + ld s6, 72(sp) # 8-byte Folded Reload + add a3, s6, a3 + ld a3, 0(a3) + addi s6, sp, 176 + or t5, s6, t5 + lw s6, 0(t5) + ld s9, 0(a3) + slli s10, s6, 2 + add s9, s9, s10 + sw s7, 0(s9) + ld a3, 8(a3) + add a3, a3, s10 + sw s3, 0(a3) + addi s6, s6, 1 + sw s6, 0(t5) + li a3, -1 + sw a3, 0(a2) lw a2, 0(t0) bltz a2, .LBB4_22 .LBB4_44: # %if.end549 # in Loop: Header=BB4_24 Depth=1 - mv a0, a3 + mv t3, s8 j .LBB4_22 .LBB4_45: # %if.end685 li a0, 536 @@ -4622,7 +4623,7 @@ # %bb.47: # %for.body698.preheader lw a0, 176(sp) slli a0, a0, 2 - ld a1, 120(sp) # 8-byte Folded Reload + ld a1, 128(sp) # 8-byte Folded Reload add a0, a1, a0 sw zero, 0(a0) ld a2, 72(sp) # 8-byte Folded Reload @@ -4640,13 +4641,13 @@ sw zero, 0(a0) ld a0, 24(a2) ld a0, 0(a0) - sd a0, 120(sp) # 8-byte Folded Spill + sd a0, 128(sp) # 8-byte Folded Spill lw s2, 188(sp) .LBB4_48: # %if.end712 lui a0, 3 addiw t3, a0, 350 slli s2, s2, 2 - ld a0, 120(sp) # 8-byte Folded Reload + ld a0, 128(sp) # 8-byte Folded Reload add s2, a0, s2 sw zero, 0(s2) ld a0, 40(sp) # 8-byte Folded Reload @@ -4667,7 +4668,7 @@ ori a7, a6, 5 ori t0, a6, 6 ori t1, a6, 7 - ld t6, 144(sp) # 8-byte Folded Reload + ld t6, 152(sp) # 8-byte Folded Reload slli t5, t6, 3 add t4, t4, t5 slli t5, t6, 5 @@ -4755,7 +4756,7 @@ addi t3, t3, 32 bnez t5, .LBB4_50 .LBB4_51: # %if.end1240 - ld a0, 136(sp) # 8-byte Folded Reload + ld a0, 144(sp) # 8-byte Folded Reload csrr a1, vlenb li a2, 48 mul a1, a1, a2 @@ -4782,26 +4783,93 @@ # =>This Inner Loop Header: Depth=1 lw a2, -28(a1) lw a3, -12(a1) - lw a7, -20(a1) - lw t0, -4(a1) + lw t0, -20(a1) + lw t4, -4(a1) + add t5, a3, a2 + subw a2, a2, a3 + srli a3, t0, 1 + subw a3, a3, t4 + srli t4, t4, 1 + add t0, t4, t0 + add t4, t0, t5 + add t6, a3, a2 + subw a2, a2, a3 + lw a3, 0(a1) + lw s0, -16(a1) + subw t0, t5, t0 + lw t5, -8(a1) + srli s1, a3, 1 + add s2, s0, a3 + add s1, s2, s1 + subw s1, t5, s1 + lw s2, -24(a1) + srli s3, s0, 1 + subw s4, a3, s0 + subw s3, s4, s3 + add s3, s3, s2 + srai s4, t5, 1 + add a3, a3, t5 + add a3, a3, s4 + subw a3, a3, s2 + add t5, t5, s0 + add t5, t5, s2 + srli s0, s2, 1 + add t5, t5, s0 + sraiw s0, t5, 2 + add s0, s0, s1 + sraiw s1, s1, 2 + subw t5, t5, s1 + sraiw s1, a3, 2 + add s1, s1, s3 + sraiw s2, s3, 2 + subw a3, s2, a3 + add s2, t5, t4 + sw s2, -128(t2) + add s2, a3, t6 + sw s2, -96(t2) + add s2, s1, a2 + sw s2, -64(t2) + add s2, s0, t0 + sw s2, -32(t2) + subw t0, t0, s0 + sw t0, 0(t2) + subw a2, a2, s1 + sw a2, 32(t2) + subw a2, t6, a3 + sw a2, 64(t2) + subw a2, t4, t5 + sw a2, 96(t2) + addi a0, a0, -1 + addi t2, t2, 4 + addi a1, a1, 64 + bnez a0, .LBB4_53 +# %bb.54: # %for.cond935.preheader + addi a0, a5, 228 + li a1, 8 +.LBB4_55: # %for.body938 + # =>This Inner Loop Header: Depth=1 + lw a2, -16(t1) + lw a3, 0(t1) + lw t0, -8(t1) + lw t2, 8(t1) add t4, a3, a2 subw a2, a2, a3 - srli a3, a7, 1 - subw a3, a3, t0 - srli t0, t0, 1 - add a7, t0, a7 - add t0, a7, t4 + srli a3, t0, 1 + subw a3, a3, t2 + srli t2, t2, 1 + add t0, t2, t0 + add t2, t0, t4 add t5, a3, a2 subw a2, a2, a3 - lw a3, 0(a1) - lw t6, -16(a1) - subw a7, t4, a7 - lw t4, -8(a1) + lw a3, 12(t1) + lw t6, -4(t1) + subw t0, t4, t0 + lw t4, 4(t1) srli s0, a3, 1 add s1, t6, a3 add s0, s1, s0 subw s0, t4, s0 - lw s1, -24(a1) + lw s1, -12(t1) srli s2, t6, 1 subw s3, a3, t6 subw s2, s3, s2 @@ -4822,88 +4890,21 @@ add s0, s0, s2 sraiw s1, s2, 2 subw s1, s1, a3 - add a3, t4, t0 - sw a3, -128(t2) - add a3, s1, t5 - sw a3, -96(t2) - add a3, s0, a2 - sw a3, -64(t2) - add a3, t6, a7 - sw a3, -32(t2) - subw a3, a7, t6 - sw a3, 0(t2) - subw a2, a2, s0 - sw a2, 32(t2) - subw a2, t5, s1 - sw a2, 64(t2) - subw a2, t0, t4 - sw a2, 96(t2) - addi a0, a0, -1 - addi t2, t2, 4 - addi a1, a1, 64 - bnez a0, .LBB4_53 -# %bb.54: # %for.cond935.preheader - addi a0, a5, 228 - li a1, 8 -.LBB4_55: # %for.body938 - # =>This Inner Loop Header: Depth=1 - lw a2, -16(t1) - lw a3, 0(t1) - lw a7, -8(t1) - lw t0, 8(t1) - add t2, a3, a2 - subw a2, a2, a3 - srli a3, a7, 1 - subw a3, a3, t0 - srli t0, t0, 1 - add a7, t0, a7 - add t0, a7, t2 - add t4, a3, a2 - subw a2, a2, a3 - lw a3, 12(t1) - lw t5, -4(t1) - subw a7, t2, a7 - lw t2, 4(t1) - srli t6, a3, 1 - add s0, t5, a3 - add t6, s0, t6 - subw t6, t2, t6 - lw s0, -12(t1) - srli s1, t5, 1 - subw s2, a3, t5 - subw s1, s2, s1 - add s1, s1, s0 - srai s2, t2, 1 - add a3, a3, t2 - add a3, a3, s2 - subw a3, a3, s0 - add t2, t2, t5 - add t2, t2, s0 - srli s0, s0, 1 - add t2, t2, s0 - sraiw t5, t2, 2 - add t5, t5, t6 - sraiw t6, t6, 2 - subw t2, t2, t6 - sraiw t6, a3, 2 - add t6, t6, s1 - sraiw s0, s1, 2 - subw s0, s0, a3 - add a3, t2, t0 + add a3, t4, t2 sw a3, -256(a0) - add a3, s0, t4 + add a3, s1, t5 sw a3, -192(a0) - add a3, t6, a2 + add a3, s0, a2 sw a3, -128(a0) - add a3, t5, a7 + add a3, t6, t0 sw a3, -64(a0) - subw a3, a7, t5 + subw a3, t0, t6 sw a3, 0(a0) - subw a2, a2, t6 + subw a2, a2, s0 sw a2, 64(a0) - subw a2, t4, s0 + subw a2, t5, s1 sw a2, 128(a0) - subw a2, t0, t2 + subw a2, t2, t4 sw a2, 192(a0) addi a1, a1, -1 addi a0, a0, 4 @@ -4917,8 +4918,7 @@ lui a1, 2 add a0, a0, a1 ld t6, -1752(a0) - ld s3, 152(sp) # 8-byte Folded Reload - lw s0, 260(s3) + lw s0, 260(a7) lw s1, 176(a4) ori a0, a6, 1 ori a1, a6, 2 @@ -4927,25 +4927,25 @@ ori t2, a6, 5 ori t4, a6, 6 ori t5, a6, 7 - ld a7, 144(sp) # 8-byte Folded Reload - slli a3, a7, 3 + ld t0, 152(sp) # 8-byte Folded Reload + slli a3, t0, 3 add t6, t6, a3 - slli a3, a7, 5 - ld a7, 48(sp) # 8-byte Folded Reload - andi a7, a7, 1 - slli a7, a7, 4 - or a3, a3, a7 + slli a3, t0, 5 + ld t0, 48(sp) # 8-byte Folded Reload + andi t0, t0, 1 + slli t0, t0, 4 + or a3, a3, t0 add a3, a3, t3 add t0, a4, a3 li t3, 8 j .LBB4_58 .LBB4_57: # %for.body1142 # in Loop: Header=BB4_58 Depth=1 - sw s2, 0(a5) - addw a7, s1, t5 - slli a7, a7, 1 - add a3, a3, a7 - sh s2, 0(a3) + sw a3, 0(a5) + addw s3, s1, t5 + slli s3, s3, 1 + add s2, s2, s3 + sh a3, 0(s2) addi t6, t6, 8 addi t3, t3, -1 addi a5, a5, 64 @@ -4954,164 +4954,164 @@ .LBB4_58: # %for.body1142 # =>This Inner Loop Header: Depth=1 lhu a3, -14(t0) - lw a7, -28(a5) + lw s2, -28(a5) slli a3, a3, 6 - add a3, a7, a3 + add a3, s2, a3 addi a3, a3, 32 sraiw a3, a3, 6 - sgtz a7, a3 - neg a7, a7 - and s2, a7, a3 - blt s2, s0, .LBB4_60 + sgtz s2, a3 + neg s2, s2 + and a3, s2, a3 + blt a3, s0, .LBB4_60 # %bb.59: # %for.body1142 # in Loop: Header=BB4_58 Depth=1 - mv s2, s0 + mv a3, s0 .LBB4_60: # %for.body1142 # in Loop: Header=BB4_58 Depth=1 - lw a3, 180(a4) - slli a3, a3, 3 - add a3, t6, a3 - ld a3, 0(a3) - sw s2, -28(a5) - addw a7, s1, a6 - slli a7, a7, 1 - add a7, a3, a7 - sh s2, 0(a7) - lhu a7, -12(t0) - lw s2, -24(a5) - slli a7, a7, 6 - add a7, s2, a7 - addi a7, a7, 32 - sraiw a7, a7, 6 - sgtz s2, a7 - neg s2, s2 - and s2, s2, a7 - blt s2, s0, .LBB4_62 + lw s2, 180(a4) + slli s2, s2, 3 + add s2, t6, s2 + ld s2, 0(s2) + sw a3, -28(a5) + addw s3, s1, a6 + slli s3, s3, 1 + add s3, s2, s3 + sh a3, 0(s3) + lhu a3, -12(t0) + lw s3, -24(a5) + slli a3, a3, 6 + add a3, s3, a3 + addi a3, a3, 32 + sraiw a3, a3, 6 + sgtz s3, a3 + neg s3, s3 + and a3, s3, a3 + blt a3, s0, .LBB4_62 # %bb.61: # %for.body1142 # in Loop: Header=BB4_58 Depth=1 - mv s2, s0 + mv a3, s0 .LBB4_62: # %for.body1142 # in Loop: Header=BB4_58 Depth=1 - sw s2, -24(a5) - addw a7, s1, a0 - slli a7, a7, 1 - add a7, a3, a7 - sh s2, 0(a7) - lhu a7, -10(t0) - lw s2, -20(a5) - slli a7, a7, 6 - add a7, s2, a7 - addi a7, a7, 32 - sraiw a7, a7, 6 - sgtz s2, a7 - neg s2, s2 - and s2, s2, a7 - blt s2, s0, .LBB4_64 + sw a3, -24(a5) + addw s3, s1, a0 + slli s3, s3, 1 + add s3, s2, s3 + sh a3, 0(s3) + lhu a3, -10(t0) + lw s3, -20(a5) + slli a3, a3, 6 + add a3, s3, a3 + addi a3, a3, 32 + sraiw a3, a3, 6 + sgtz s3, a3 + neg s3, s3 + and a3, s3, a3 + blt a3, s0, .LBB4_64 # %bb.63: # %for.body1142 # in Loop: Header=BB4_58 Depth=1 - mv s2, s0 + mv a3, s0 .LBB4_64: # %for.body1142 # in Loop: Header=BB4_58 Depth=1 - sw s2, -20(a5) - addw a7, s1, a1 - slli a7, a7, 1 - add a7, a3, a7 - sh s2, 0(a7) - lhu a7, -8(t0) - lw s2, -16(a5) - slli a7, a7, 6 - add a7, s2, a7 - addi a7, a7, 32 - sraiw a7, a7, 6 - sgtz s2, a7 - neg s2, s2 - and s2, s2, a7 - blt s2, s0, .LBB4_66 + sw a3, -20(a5) + addw s3, s1, a1 + slli s3, s3, 1 + add s3, s2, s3 + sh a3, 0(s3) + lhu a3, -8(t0) + lw s3, -16(a5) + slli a3, a3, 6 + add a3, s3, a3 + addi a3, a3, 32 + sraiw a3, a3, 6 + sgtz s3, a3 + neg s3, s3 + and a3, s3, a3 + blt a3, s0, .LBB4_66 # %bb.65: # %for.body1142 # in Loop: Header=BB4_58 Depth=1 - mv s2, s0 + mv a3, s0 .LBB4_66: # %for.body1142 # in Loop: Header=BB4_58 Depth=1 - sw s2, -16(a5) - addw a7, s1, a2 - slli a7, a7, 1 - add a7, a3, a7 - sh s2, 0(a7) - lhu a7, -6(t0) - lw s2, -12(a5) - slli a7, a7, 6 - add a7, s2, a7 - addi a7, a7, 32 - sraiw a7, a7, 6 - sgtz s2, a7 - neg s2, s2 - and s2, s2, a7 - blt s2, s0, .LBB4_68 + sw a3, -16(a5) + addw s3, s1, a2 + slli s3, s3, 1 + add s3, s2, s3 + sh a3, 0(s3) + lhu a3, -6(t0) + lw s3, -12(a5) + slli a3, a3, 6 + add a3, s3, a3 + addi a3, a3, 32 + sraiw a3, a3, 6 + sgtz s3, a3 + neg s3, s3 + and a3, s3, a3 + blt a3, s0, .LBB4_68 # %bb.67: # %for.body1142 # in Loop: Header=BB4_58 Depth=1 - mv s2, s0 + mv a3, s0 .LBB4_68: # %for.body1142 # in Loop: Header=BB4_58 Depth=1 - sw s2, -12(a5) - addw a7, s1, t1 - slli a7, a7, 1 - add a7, a3, a7 - sh s2, 0(a7) - lhu a7, -4(t0) + sw a3, -12(a5) + addw s0, s1, t1 + slli s0, s0, 1 + add s0, s2, s0 + sh a3, 0(s0) + lhu a3, -4(t0) lw s1, -8(a5) - lw s0, 260(s3) - slli a7, a7, 6 - add a7, s1, a7 - addi a7, a7, 32 - sraiw a7, a7, 6 - sgtz s1, a7 + lw s0, 260(a7) + slli a3, a3, 6 + add a3, s1, a3 + addi a3, a3, 32 + sraiw a3, a3, 6 + sgtz s1, a3 neg s1, s1 - and s2, s1, a7 - blt s2, s0, .LBB4_70 + and a3, s1, a3 + blt a3, s0, .LBB4_70 # %bb.69: # %for.body1142 # in Loop: Header=BB4_58 Depth=1 - mv s2, s0 + mv a3, s0 .LBB4_70: # %for.body1142 # in Loop: Header=BB4_58 Depth=1 - sw s2, -8(a5) + sw a3, -8(a5) lw s1, 176(a4) - addw a7, s1, t2 - slli a7, a7, 1 - add a7, a3, a7 - sh s2, 0(a7) - lhu a7, -2(t0) - lw s2, -4(a5) - slli a7, a7, 6 - add a7, s2, a7 - addi a7, a7, 32 - sraiw a7, a7, 6 - sgtz s2, a7 - neg s2, s2 - and s2, s2, a7 - blt s2, s0, .LBB4_72 + addw s3, s1, t2 + slli s3, s3, 1 + add s3, s2, s3 + sh a3, 0(s3) + lhu a3, -2(t0) + lw s3, -4(a5) + slli a3, a3, 6 + add a3, s3, a3 + addi a3, a3, 32 + sraiw a3, a3, 6 + sgtz s3, a3 + neg s3, s3 + and a3, s3, a3 + blt a3, s0, .LBB4_72 # %bb.71: # %for.body1142 # in Loop: Header=BB4_58 Depth=1 - mv s2, s0 + mv a3, s0 .LBB4_72: # %for.body1142 # in Loop: Header=BB4_58 Depth=1 - sw s2, -4(a5) - addw a7, s1, t4 - slli a7, a7, 1 - add a7, a3, a7 - sh s2, 0(a7) - lhu a7, 0(t0) - lw s2, 0(a5) - slli a7, a7, 6 - add a7, s2, a7 - addi a7, a7, 32 - sraiw a7, a7, 6 - sgtz s2, a7 - neg s2, s2 - and s2, s2, a7 - blt s2, s0, .LBB4_57 + sw a3, -4(a5) + addw s3, s1, t4 + slli s3, s3, 1 + add s3, s2, s3 + sh a3, 0(s3) + lhu a3, 0(t0) + lw s3, 0(a5) + slli a3, a3, 6 + add a3, s3, a3 + addi a3, a3, 32 + sraiw a3, a3, 6 + sgtz s3, a3 + neg s3, s3 + and a3, s3, a3 + blt a3, s0, .LBB4_57 # %bb.73: # %for.body1142 # in Loop: Header=BB4_58 Depth=1 - mv s2, s0 + mv a3, s0 j .LBB4_57 .Lfunc_end4: .size dct_luma8x8, .Lfunc_end4-dct_luma8x8 --- build.head//MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/CMakeFiles/timberwolfmc.dir/procesnet.s 2023-11-13 08:03:22.707548573 +0000 +++ build//MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/CMakeFiles/timberwolfmc.dir/procesnet.s 2023-11-13 08:03:17.747691944 +0000 @@ -84,9 +84,9 @@ vsetvli a0, zero, e32, m2, ta, ma vmv.v.i v8, 0 # implicit-def: $x27 - sd s4, 40(sp) # 8-byte Folded Spill addi a0, sp, 128 vs2r.v v8, (a0) # Unknown-size Folded Spill + sd s4, 40(sp) # 8-byte Folded Spill j .LBB0_3 .LBB0_2: # %for.end523 # in Loop: Header=BB0_3 Depth=1 @@ -832,8 +832,8 @@ li s2, 2 blt a6, s2, .LBB1_49 # %bb.1: # %for.body.preheader - slli a5, a6, 48 - srli a5, a5, 48 + slli a4, a6, 48 + srli a4, a4, 48 li s0, 1 .Lpcrel_hi12: auipc a2, %got_pcrel_hi(numnodes) @@ -855,9 +855,9 @@ .LBB1_3: # %for.inc109 # in Loop: Header=BB1_4 Depth=1 addiw s0, s0, 1 - slli a5, a6, 48 - srai a5, a5, 48 - bge s0, a5, .LBB1_49 + slli a4, a6, 48 + srai a4, a4, 48 + bge s0, a4, .LBB1_49 .LBB1_4: # %for.body # =>This Loop Header: Depth=1 # Child Loop BB1_8 Depth 2 @@ -873,19 +873,19 @@ add a2, a0, a2 ld a3, 0(a2) lh a7, 2(a3) - lw a4, 0(s3) - bge a4, a7, .LBB1_12 + lw a5, 0(s3) + bge a5, a7, .LBB1_12 # %bb.5: # %for.cond8.preheader # in Loop: Header=BB1_4 Depth=1 - blt s0, a5, .LBB1_7 + blt s0, a4, .LBB1_7 # %bb.6: # %for.cond8.preheader # in Loop: Header=BB1_4 Depth=1 - mv a5, s0 + mv a4, s0 .LBB1_7: # %for.cond8.preheader # in Loop: Header=BB1_4 Depth=1 slli a7, a7, 48 srli a7, a7, 48 - sub t0, a5, s0 + sub t0, a4, s0 addi t1, a2, 8 li t2, -1 .LBB1_8: # %for.cond8 @@ -894,7 +894,7 @@ beqz t0, .LBB1_12 # %bb.9: # %for.body14 # in Loop: Header=BB1_8 Depth=2 - mv a5, t2 + mv a4, t2 ld t2, 0(t1) lhu t3, 2(t2) beq a7, t3, .LBB1_29 @@ -905,7 +905,7 @@ add t2, t2, t3 lhu t3, 0(t2) addi t0, t0, -1 - addi t2, a5, -1 + addi t2, a4, -1 addi t1, t1, 8 bne a7, t3, .LBB1_8 # %bb.11: # in Loop: Header=BB1_4 Depth=1 @@ -916,21 +916,21 @@ lh a7, 0(a3) slli t1, a7, 1 add t1, a3, t1 - lh a5, 0(t1) - bge a4, a5, .LBB1_3 + lh a4, 0(t1) + bge a5, a4, .LBB1_3 # %bb.13: # %for.cond59.preheader # in Loop: Header=BB1_4 Depth=1 - slli a4, a6, 48 - srai a4, a4, 48 + slli a5, a6, 48 + srai a5, a5, 48 mv t4, s0 - blt a4, s0, .LBB1_15 + blt a5, s0, .LBB1_15 # %bb.14: # %for.cond59.preheader # in Loop: Header=BB1_4 Depth=1 - mv t4, a4 + mv t4, a5 .LBB1_15: # %for.cond59.preheader # in Loop: Header=BB1_4 Depth=1 and t2, a7, s4 - and t5, a5, s4 + and t5, a4, s4 addi t6, a2, 8 mv a4, s0 mv a2, s0 @@ -1035,7 +1035,7 @@ li a3, -1 .LBB1_30: # %if.then44 # in Loop: Header=BB1_4 Depth=1 - subw a2, s0, a5 + subw a2, s0, a4 li a1, -1 mv a0, s0 call joinSeg --- build.head//MultiSource/Benchmarks/mediabench/jpeg/jpeg-6a/CMakeFiles/cjpeg.dir/jquant1.s 2023-11-13 08:03:22.611551348 +0000 +++ build//MultiSource/Benchmarks/mediabench/jpeg/jpeg-6a/CMakeFiles/cjpeg.dir/jquant1.s 2023-11-13 08:03:17.643694951 +0000 @@ -1834,19 +1834,19 @@ addi a0, a0, -2 slli a1, s4, 32 srli s5, a1, 32 - addi s0, s3, 112 + addi s7, s3, 112 csrr a1, vlenb - slli s7, a1, 1 - srli s8, a1, 2 + slli s8, a1, 1 + srli s9, a1, 2 srli a1, a1, 3 - mul s9, a1, a0 - and s10, s9, s4 + mul s10, a1, a0 + and s11, s10, s4 vsetvli a0, zero, e16, mf2, ta, ma vmv.v.i v10, 0 slli s6, s6, 1 - mv a1, a2 addi a0, sp, 48 vs1r.v v10, (a0) # Unknown-size Folded Spill + mv a1, a2 j .LBB9_17 .LBB9_16: # %for.cond2.for.end71_crit_edge.split.us.us.us # in Loop: Header=BB9_17 Depth=1 @@ -1870,34 +1870,34 @@ beqz a0, .LBB9_20 # %bb.18: # %for.body5.us.us76.us.preheader # in Loop: Header=BB9_17 Depth=1 - bgeu s4, s8, .LBB9_22 + bgeu s4, s9, .LBB9_22 # %bb.19: # in Loop: Header=BB9_17 Depth=1 li a1, 0 ld a4, 32(sp) # 8-byte Folded Reload j .LBB9_25 .LBB9_20: # %for.body5.us.us.us.us.preheader # in Loop: Header=BB9_17 Depth=1 - bgeu s4, s8, .LBB9_27 + bgeu s4, s9, .LBB9_27 # %bb.21: # in Loop: Header=BB9_17 Depth=1 li a2, 0 ld a4, 32(sp) # 8-byte Folded Reload j .LBB9_30 .LBB9_22: # %vector.ph116 # in Loop: Header=BB9_17 Depth=1 - and a1, s9, s4 + and a1, s10, s4 vsetvli a2, zero, e16, mf2, ta, ma mv a2, a1 - mv a3, s0 + mv a3, s7 + addi a4, sp, 48 + vl1r.v v10, (a4) # Unknown-size Folded Reload ld a4, 32(sp) # 8-byte Folded Reload - addi a5, sp, 48 - vl1r.v v10, (a5) # Unknown-size Folded Reload .LBB9_23: # %vector.body121 # Parent Loop BB9_17 Depth=1 # => This Inner Loop Header: Depth=2 vl2re64.v v8, (a3) vsoxei64.v v10, (s6), v8 - sub a2, a2, s8 - add a3, a3, s7 + sub a2, a2, s9 + add a3, a3, s8 bnez a2, .LBB9_23 # %bb.24: # %middle.block113 # in Loop: Header=BB9_17 Depth=1 @@ -1905,7 +1905,7 @@ .LBB9_25: # %for.body5.us.us76.us.preheader127 # in Loop: Header=BB9_17 Depth=1 slli a2, a1, 3 - add a2, s0, a2 + add a2, s7, a2 sub a1, s4, a1 .LBB9_26: # %for.body5.us.us76.us # Parent Loop BB9_17 Depth=1 @@ -1920,27 +1920,27 @@ .LBB9_27: # %vector.ph # in Loop: Header=BB9_17 Depth=1 vsetvli a1, zero, e16, mf2, ta, ma - mv a1, s10 - mv a2, s0 - ld a4, 32(sp) # 8-byte Folded Reload + mv a1, s11 + mv a2, s7 addi a3, sp, 48 vl1r.v v10, (a3) # Unknown-size Folded Reload + ld a4, 32(sp) # 8-byte Folded Reload .LBB9_28: # %vector.body # Parent Loop BB9_17 Depth=1 # => This Inner Loop Header: Depth=2 vl2re64.v v8, (a2) vsoxei64.v v10, (zero), v8 - sub a1, a1, s8 - add a2, a2, s7 + sub a1, a1, s9 + add a2, a2, s8 bnez a1, .LBB9_28 # %bb.29: # %middle.block # in Loop: Header=BB9_17 Depth=1 - mv a2, s10 - beq s10, s4, .LBB9_16 + mv a2, s11 + beq s11, s4, .LBB9_16 .LBB9_30: # %for.body5.us.us.us.us.preheader126 # in Loop: Header=BB9_17 Depth=1 slli a1, a2, 3 - add a1, s0, a1 + add a1, s7, a1 sub a2, s5, a2 .LBB9_31: # %for.body5.us.us.us.us # Parent Loop BB9_17 Depth=1 --- build.head//MultiSource/Benchmarks/mediabench/jpeg/jpeg-6a/CMakeFiles/cjpeg.dir/jfdctflt.s 2023-11-13 08:03:22.607551463 +0000 +++ build//MultiSource/Benchmarks/mediabench/jpeg/jpeg-6a/CMakeFiles/cjpeg.dir/jfdctflt.s 2023-11-13 08:03:17.639695066 +0000 @@ -29,8 +29,8 @@ vsll.vi v8, v16, 5 vadd.vx v8, v8, a0 vmsleu.vi v0, v16, 7 - li a5, 32 - vlse32.v v16, (a0), a5, v0.t + li a6, 32 + vlse32.v v16, (a0), a6, v0.t csrr a1, vlenb li a2, 44 mul a1, a1, a2 @@ -54,8 +54,8 @@ add a3, sp, a3 addi a3, a3, 16 vs4r.v v16, (a3) # Unknown-size Folded Spill - li a6, 24 - vluxei64.v v16, (a6), v8, v0.t + li a5, 24 + vluxei64.v v16, (a5), v8, v0.t csrr a3, vlenb slli a3, a3, 5 add a3, sp, a3 @@ -148,104 +148,104 @@ vfadd.vv v24, v28, v20 vfadd.vv v20, v4, v16 vfadd.vv v4, v20, v24 - vsse32.v v4, (a0), a5, v0.t + vsse32.v v4, (a0), a6, v0.t vfsub.vv v16, v24, v20 vsoxei64.v v16, (t0), v8, v0.t .Lpcrel_hi0: - auipc a5, %pcrel_hi(.LCPI0_0) - flw fa5, %pcrel_lo(.Lpcrel_hi0)(a5) - csrr a5, vlenb - slli a5, a5, 3 - add a5, sp, a5 - addi a5, a5, 16 - vl4r.v v16, (a5) # Unknown-size Folded Reload + auipc a6, %pcrel_hi(.LCPI0_0) + flw fa5, %pcrel_lo(.Lpcrel_hi0)(a6) + csrr a6, vlenb + slli a6, a6, 3 + add a6, sp, a6 + addi a6, a6, 16 + vl4r.v v16, (a6) # Unknown-size Folded Reload vfsub.vv v20, v28, v16 - csrr a5, vlenb + csrr a6, vlenb li t0, 12 - mul a5, a5, t0 - add a5, sp, a5 - addi a5, a5, 16 - vl4r.v v16, (a5) # Unknown-size Folded Reload - csrr a5, vlenb - slli a5, a5, 2 - add a5, sp, a5 - addi a5, a5, 16 - vl4r.v v24, (a5) # Unknown-size Folded Reload + mul a6, a6, t0 + add a6, sp, a6 + addi a6, a6, 16 + vl4r.v v16, (a6) # Unknown-size Folded Reload + csrr a6, vlenb + slli a6, a6, 2 + add a6, sp, a6 + addi a6, a6, 16 + vl4r.v v24, (a6) # Unknown-size Folded Reload vfsub.vv v16, v16, v24 vfadd.vv v16, v16, v20 vfmul.vf v16, v16, fa5 - csrr a5, vlenb + csrr a6, vlenb li t0, 12 - mul a5, a5, t0 - add a5, sp, a5 - addi a5, a5, 16 - vs4r.v v16, (a5) # Unknown-size Folded Spill + mul a6, a6, t0 + add a6, sp, a6 + addi a6, a6, 16 + vs4r.v v16, (a6) # Unknown-size Folded Spill vfadd.vv v16, v20, v16 vsoxei64.v v16, (a7), v8, v0.t - csrr a5, vlenb + csrr a6, vlenb li a7, 44 - mul a5, a5, a7 - add a5, sp, a5 - addi a5, a5, 16 - vl4r.v v16, (a5) # Unknown-size Folded Reload - csrr a5, vlenb + mul a6, a6, a7 + add a6, sp, a6 + addi a6, a6, 16 + vl4r.v v16, (a6) # Unknown-size Folded Reload + csrr a6, vlenb li a7, 40 - mul a5, a5, a7 - add a5, sp, a5 - addi a5, a5, 16 - vl4r.v v28, (a5) # Unknown-size Folded Reload + mul a6, a6, a7 + add a6, sp, a6 + addi a6, a6, 16 + vl4r.v v28, (a6) # Unknown-size Folded Reload vfsub.vv v16, v16, v28 - csrr a5, vlenb + csrr a6, vlenb li a7, 44 - mul a5, a5, a7 - add a5, sp, a5 - addi a5, a5, 16 - vs4r.v v16, (a5) # Unknown-size Folded Spill - csrr a5, vlenb + mul a6, a6, a7 + add a6, sp, a6 + addi a6, a6, 16 + vs4r.v v16, (a6) # Unknown-size Folded Spill + csrr a6, vlenb li a7, 36 - mul a5, a5, a7 - add a5, sp, a5 - addi a5, a5, 16 - vl4r.v v28, (a5) # Unknown-size Folded Reload - csrr a5, vlenb - slli a5, a5, 5 - add a5, sp, a5 - addi a5, a5, 16 - vl4r.v v4, (a5) # Unknown-size Folded Reload + mul a6, a6, a7 + add a6, sp, a6 + addi a6, a6, 16 + vl4r.v v28, (a6) # Unknown-size Folded Reload + csrr a6, vlenb + slli a6, a6, 5 + add a6, sp, a6 + addi a6, a6, 16 + vl4r.v v4, (a6) # Unknown-size Folded Reload vfsub.vv v28, v28, v4 - csrr a5, vlenb + csrr a6, vlenb li a7, 28 - mul a5, a5, a7 - add a5, sp, a5 - addi a5, a5, 16 - vl4r.v v4, (a5) # Unknown-size Folded Reload - csrr a5, vlenb + mul a6, a6, a7 + add a6, sp, a6 + addi a6, a6, 16 + vl4r.v v4, (a6) # Unknown-size Folded Reload + csrr a6, vlenb li a7, 24 - mul a5, a5, a7 - add a5, sp, a5 - addi a5, a5, 16 - vl4r.v v16, (a5) # Unknown-size Folded Reload + mul a6, a6, a7 + add a6, sp, a6 + addi a6, a6, 16 + vl4r.v v16, (a6) # Unknown-size Folded Reload vfsub.vv v4, v4, v16 - csrr a5, vlenb + csrr a6, vlenb li a7, 20 - mul a5, a5, a7 - add a5, sp, a5 - addi a5, a5, 16 - vl4r.v v16, (a5) # Unknown-size Folded Reload - csrr a5, vlenb - slli a5, a5, 4 - add a5, sp, a5 - addi a5, a5, 16 - vl4r.v v24, (a5) # Unknown-size Folded Reload + mul a6, a6, a7 + add a6, sp, a6 + addi a6, a6, 16 + vl4r.v v16, (a6) # Unknown-size Folded Reload + csrr a6, vlenb + slli a6, a6, 4 + add a6, sp, a6 + addi a6, a6, 16 + vl4r.v v24, (a6) # Unknown-size Folded Reload vfsub.vv v24, v16, v24 - csrr a5, vlenb + csrr a6, vlenb li a7, 12 - mul a5, a5, a7 - add a5, sp, a5 - addi a5, a5, 16 - vl4r.v v16, (a5) # Unknown-size Folded Reload + mul a6, a6, a7 + add a6, sp, a6 + addi a6, a6, 16 + vl4r.v v16, (a6) # Unknown-size Folded Reload vfsub.vv v20, v20, v16 - vsoxei64.v v20, (a6), v8, v0.t + vsoxei64.v v20, (a5), v8, v0.t vfadd.vv v20, v4, v24 vfadd.vv v24, v28, v4 csrr a5, vlenb @@ -302,31 +302,31 @@ add a3, sp, a3 addi a3, a3, 16 vs4r.v v8, (a3) # Unknown-size Folded Spill - addi a3, a0, 192 - vle32.v v8, (a3), v0.t + addi a5, a0, 192 + vle32.v v8, (a5), v0.t + csrr a3, vlenb + slli a3, a3, 5 + add a3, sp, a3 + addi a3, a3, 16 + vs4r.v v8, (a3) # Unknown-size Folded Spill + addi a6, a0, 64 + vle32.v v8, (a6), v0.t + csrr a3, vlenb + li a4, 28 + mul a3, a3, a4 + add a3, sp, a3 + addi a3, a3, 16 + vs4r.v v8, (a3) # Unknown-size Folded Spill + addi a3, a0, 160 + vle32.v v24, (a3), v0.t csrr a4, vlenb - slli a4, a4, 5 + li a7, 24 + mul a4, a4, a7 add a4, sp, a4 addi a4, a4, 16 - vs4r.v v8, (a4) # Unknown-size Folded Spill - addi a4, a0, 64 - vle32.v v8, (a4), v0.t - csrr a5, vlenb - li a6, 28 - mul a5, a5, a6 - add a5, sp, a5 - addi a5, a5, 16 - vs4r.v v8, (a5) # Unknown-size Folded Spill - addi a5, a0, 160 - vle32.v v24, (a5), v0.t - csrr a6, vlenb - li a7, 24 - mul a6, a6, a7 - add a6, sp, a6 - addi a6, a6, 16 - vs4r.v v24, (a6) # Unknown-size Folded Spill - addi a6, a0, 96 - vle32.v v20, (a6), v0.t + vs4r.v v24, (a4) # Unknown-size Folded Spill + addi a4, a0, 96 + vle32.v v20, (a4), v0.t csrr a7, vlenb slli a7, a7, 4 add a7, sp, a7 @@ -478,20 +478,20 @@ vfadd.vv v8, v12, v16 vfmul.vf v8, v8, fa5 vfadd.vv v12, v16, v8 - vse32.v v12, (a4), v0.t + vse32.v v12, (a6), v0.t vfsub.vv v8, v16, v8 - vse32.v v8, (a3), v0.t + vse32.v v8, (a5), v0.t vfadd.vv v16, v24, v28 csrr a0, vlenb - li a3, 40 - mul a0, a0, a3 + li a5, 40 + mul a0, a0, a5 add a0, sp, a0 addi a0, a0, 16 vl4r.v v12, (a0) # Unknown-size Folded Reload vfadd.vv v8, v12, v24 csrr a0, vlenb - li a3, 44 - mul a0, a0, a3 + li a5, 44 + mul a0, a0, a5 add a0, sp, a0 addi a0, a0, 16 vl4r.v v28, (a0) # Unknown-size Folded Reload @@ -503,11 +503,11 @@ vfsub.vv v24, v28, v8 vmv4r.v v4, v28 vfadd.vv v28, v24, v16 - vse32.v v28, (a5), v0.t + vse32.v v28, (a3), v0.t vfmacc.vf v12, fa4, v20 vfadd.vv v8, v4, v8 vfsub.vv v16, v24, v16 - vse32.v v16, (a6), v0.t + vse32.v v16, (a4), v0.t vfadd.vv v16, v8, v12 vse32.v v16, (a2), v0.t vfsub.vv v8, v8, v12 --- build.head//MultiSource/Benchmarks/mediabench/jpeg/jpeg-6a/CMakeFiles/cjpeg.dir/jdmarker.s 2023-11-13 08:03:22.607551463 +0000 +++ build//MultiSource/Benchmarks/mediabench/jpeg/jpeg-6a/CMakeFiles/cjpeg.dir/jdmarker.s 2023-11-13 08:03:17.639695066 +0000 @@ -726,22 +726,22 @@ .LBB4_45: # %get_soi.exit # in Loop: Header=BB4_4 Depth=1 vsetivli zero, 16, e8, m1, ta, ma + csrr a1, vlenb + slli a1, a1, 1 + add a1, sp, a1 + addi a1, a1, 448 + vl1r.v v8, (a1) # Unknown-size Folded Reload ld a1, 80(sp) # 8-byte Folded Reload - csrr a2, vlenb - slli a2, a2, 1 - add a2, sp, a2 - addi a2, a2, 448 - vl1r.v v8, (a2) # Unknown-size Folded Reload vse8.v v8, (a1) + csrr a1, vlenb + add a1, sp, a1 + addi a1, a1, 448 + vl1r.v v8, (a1) # Unknown-size Folded Reload ld a1, 72(sp) # 8-byte Folded Reload - csrr a2, vlenb - add a2, sp, a2 - addi a2, a2, 448 - vl1r.v v8, (a2) # Unknown-size Folded Reload vse8.v v8, (a1) + addi a1, sp, 448 + vl1r.v v8, (a1) # Unknown-size Folded Reload ld a1, 64(sp) # 8-byte Folded Reload - addi a2, sp, 448 - vl1r.v v8, (a2) # Unknown-size Folded Reload vse8.v v8, (a1) sw zero, 52(s0) sw zero, 384(s0) --- build.head//MultiSource/Benchmarks/mediabench/mpeg2/mpeg2dec/CMakeFiles/mpeg2decode.dir/idctref.s 2023-11-13 08:03:22.611551348 +0000 +++ build//MultiSource/Benchmarks/mediabench/mpeg2/mpeg2dec/CMakeFiles/mpeg2decode.dir/idctref.s 2023-11-13 08:03:17.643694951 +0000 @@ -172,41 +172,41 @@ addi a3, a1, 384 addi a6, a1, 376 sd a6, 208(sp) # 8-byte Folded Spill - addi t0, a1, 320 - addi a6, a1, 312 - sd a6, 200(sp) # 8-byte Folded Spill - addi t1, a1, 256 - addi a6, a1, 248 - sd a6, 192(sp) # 8-byte Folded Spill - addi a6, a1, 192 - addi a7, a1, 184 - sd a7, 184(sp) # 8-byte Folded Spill - addi a7, a1, 128 + addi a6, a1, 320 + addi a7, a1, 312 + sd a7, 200(sp) # 8-byte Folded Spill + addi a7, a1, 256 + addi t0, a1, 248 + sd t0, 192(sp) # 8-byte Folded Spill + addi t0, a1, 192 + addi t1, a1, 184 + sd t1, 184(sp) # 8-byte Folded Spill + addi t1, a1, 128 addi t2, a1, 120 sd t2, 176(sp) # 8-byte Folded Spill - addi ra, a1, 64 - addi t2, a1, 56 - sd t2, 168(sp) # 8-byte Folded Spill - addi t2, a1, 496 - sd t2, 160(sp) # 8-byte Folded Spill - addi t2, a1, 432 - sd t2, 152(sp) # 8-byte Folded Spill - addi t2, a1, 368 - sd t2, 144(sp) # 8-byte Folded Spill - addi t2, a1, 304 - sd t2, 136(sp) # 8-byte Folded Spill - addi t2, a1, 240 - sd t2, 128(sp) # 8-byte Folded Spill - addi t2, a1, 176 - sd t2, 120(sp) # 8-byte Folded Spill - addi t2, a1, 112 - sd t2, 112(sp) # 8-byte Folded Spill - addi t2, a1, 48 - sd t2, 104(sp) # 8-byte Folded Spill - addi t2, a1, 488 - sd t2, 96(sp) # 8-byte Folded Spill - vsetvli t2, zero, e64, m2, ta, ma - vlse64.v v8, (ra), zero + addi t2, a1, 64 + addi t3, a1, 56 + sd t3, 168(sp) # 8-byte Folded Spill + addi t3, a1, 496 + sd t3, 160(sp) # 8-byte Folded Spill + addi t3, a1, 432 + sd t3, 152(sp) # 8-byte Folded Spill + addi t3, a1, 368 + sd t3, 144(sp) # 8-byte Folded Spill + addi t3, a1, 304 + sd t3, 136(sp) # 8-byte Folded Spill + addi t3, a1, 240 + sd t3, 128(sp) # 8-byte Folded Spill + addi t3, a1, 176 + sd t3, 120(sp) # 8-byte Folded Spill + addi t3, a1, 112 + sd t3, 112(sp) # 8-byte Folded Spill + addi t3, a1, 48 + sd t3, 104(sp) # 8-byte Folded Spill + addi t3, a1, 488 + sd t3, 96(sp) # 8-byte Folded Spill + vsetvli t3, zero, e64, m2, ta, ma + vlse64.v v8, (t2), zero csrr t2, vlenb li t3, 120 mul t2, t2, t3 @@ -215,100 +215,100 @@ vs2r.v v8, (t2) # Unknown-size Folded Spill addi t2, a1, 424 sd t2, 88(sp) # 8-byte Folded Spill + vlse64.v v8, (t1), zero + csrr t1, vlenb + li t2, 118 + mul t1, t1, t2 + add t1, sp, t1 + addi t1, t1, 768 + vs2r.v v8, (t1) # Unknown-size Folded Spill + addi t1, a1, 360 + sd t1, 80(sp) # 8-byte Folded Spill + vlse64.v v8, (t0), zero + csrr t0, vlenb + li t1, 116 + mul t0, t0, t1 + add t0, sp, t0 + addi t0, t0, 768 + vs2r.v v8, (t0) # Unknown-size Folded Spill + addi t0, a1, 296 + sd t0, 72(sp) # 8-byte Folded Spill vlse64.v v8, (a7), zero csrr a7, vlenb - li t2, 118 - mul a7, a7, t2 + li t0, 114 + mul a7, a7, t0 add a7, sp, a7 addi a7, a7, 768 vs2r.v v8, (a7) # Unknown-size Folded Spill - addi a7, a1, 360 - sd a7, 80(sp) # 8-byte Folded Spill + addi a7, a1, 16 vlse64.v v8, (a6), zero csrr a6, vlenb - li a7, 116 - mul a6, a6, a7 - add a6, sp, a6 - addi a6, a6, 768 - vs2r.v v8, (a6) # Unknown-size Folded Spill - addi a6, a1, 296 - sd a6, 72(sp) # 8-byte Folded Spill - vlse64.v v8, (t1), zero - csrr a6, vlenb - li a7, 114 - mul a6, a6, a7 + li t0, 112 + mul a6, a6, t0 add a6, sp, a6 addi a6, a6, 768 vs2r.v v8, (a6) # Unknown-size Folded Spill - addi a6, a1, 16 - vlse64.v v8, (t0), zero - csrr a7, vlenb - li t0, 112 - mul a7, a7, t0 - add a7, sp, a7 - addi a7, a7, 768 - vs2r.v v8, (a7) # Unknown-size Folded Spill - addi t0, a1, 456 + addi a6, a1, 456 vlse64.v v8, (a3), zero csrr a3, vlenb - li a7, 110 - mul a3, a3, a7 + li t0, 110 + mul a3, a3, t0 add a3, sp, a3 addi a3, a3, 768 vs2r.v v8, (a3) # Unknown-size Folded Spill addi a3, a1, 392 vlse64.v v8, (a2), zero csrr a2, vlenb - li a7, 108 - mul a2, a2, a7 + li t0, 108 + mul a2, a2, t0 add a2, sp, a2 addi a2, a2, 768 vs2r.v v8, (a2) # Unknown-size Folded Spill addi a2, a1, 8 vlse64.v v8, (a2), zero csrr a2, vlenb - li a7, 106 - mul a2, a2, a7 + li t0, 106 + mul a2, a2, t0 add a2, sp, a2 addi a2, a2, 768 vs2r.v v8, (a2) # Unknown-size Folded Spill addi a2, a1, 72 vlse64.v v8, (a2), zero csrr a2, vlenb - li a7, 104 - mul a2, a2, a7 + li t0, 104 + mul a2, a2, t0 add a2, sp, a2 addi a2, a2, 768 vs2r.v v8, (a2) # Unknown-size Folded Spill addi a2, a1, 136 vlse64.v v8, (a2), zero csrr a2, vlenb - li a7, 102 - mul a2, a2, a7 + li t0, 102 + mul a2, a2, t0 add a2, sp, a2 addi a2, a2, 768 vs2r.v v8, (a2) # Unknown-size Folded Spill addi a2, a1, 200 vlse64.v v8, (a2), zero csrr a2, vlenb - li a7, 100 - mul a2, a2, a7 + li t0, 100 + mul a2, a2, t0 add a2, sp, a2 addi a2, a2, 768 vs2r.v v8, (a2) # Unknown-size Folded Spill addi a2, a1, 264 vlse64.v v8, (a2), zero csrr a2, vlenb - li a7, 98 - mul a2, a2, a7 + li t0, 98 + mul a2, a2, t0 add a2, sp, a2 addi a2, a2, 768 vs2r.v v8, (a2) # Unknown-size Folded Spill addi a2, a1, 328 vlse64.v v8, (a2), zero csrr a2, vlenb - li a7, 96 - mul a2, a2, a7 + li t0, 96 + mul a2, a2, t0 add a2, sp, a2 addi a2, a2, 768 vs2r.v v8, (a2) # Unknown-size Folded Spill @@ -321,15 +321,15 @@ addi a2, a2, 768 vs2r.v v8, (a2) # Unknown-size Folded Spill srli a2, t1, 2 - vlse64.v v8, (t0), zero + vlse64.v v8, (a6), zero csrr a3, vlenb - li a7, 92 - mul a3, a3, a7 + li a6, 92 + mul a3, a3, a6 add a3, sp, a3 addi a3, a3, 768 vs2r.v v8, (a3) # Unknown-size Folded Spill neg a3, a2 - vlse64.v v8, (a6), zero + vlse64.v v8, (a7), zero csrr a6, vlenb li a7, 90 mul a6, a6, a7 @@ -741,8 +741,8 @@ vsext.vf2 v11, v10 vfwcvt.f.x.v v20, v11 vsetvli zero, zero, e64, m2, ta, ma - addi s0, t5, 4 - vlse16.v v10, (s0), t2, v0.t + addi s1, t5, 4 + vlse16.v v10, (s1), t2, v0.t csrr a6, vlenb li a7, 120 mul a6, a6, a7 @@ -754,8 +754,8 @@ vsext.vf2 v12, v10 vfwcvt.f.x.v v10, v12 vsetvli zero, zero, e64, m2, ta, ma - addi s1, t5, 6 - vlse16.v v12, (s1), t2, v0.t + addi s0, t5, 6 + vlse16.v v12, (s0), t2, v0.t csrr a6, vlenb li a7, 118 mul a6, a6, a7 @@ -1073,7 +1073,7 @@ addi a6, t6, 32 vsse64.v v26, (a6), t4, v0.t vmv2r.v v18, v6 - vlse16.v v10, (s0), t2, v0.t + vlse16.v v10, (s1), t2, v0.t csrr a6, vlenb li a7, 42 mul a6, a6, a7 @@ -1092,7 +1092,7 @@ vsext.vf2 v12, v10 vfwcvt.f.x.v v10, v12 vsetvli zero, zero, e64, m2, ta, ma - vlse16.v v12, (s1), t2, v0.t + vlse16.v v12, (s0), t2, v0.t csrr a6, vlenb li a7, 38 mul a6, a6, a7 --- build.head//MultiSource/Benchmarks/mediabench/jpeg/jpeg-6a/CMakeFiles/cjpeg.dir/jdsample.s 2023-11-13 08:03:22.607551463 +0000 +++ build//MultiSource/Benchmarks/mediabench/jpeg/jpeg-6a/CMakeFiles/cjpeg.dir/jdsample.s 2023-11-13 08:03:17.639695066 +0000 @@ -800,20 +800,20 @@ add t4, a3, t6 ld t4, 0(t4) lbu s3, 0(t2) - slli s7, t5, 1 + slli s8, t5, 1 lbu s4, 1(a6) lbu s5, 1(t2) add t5, t5, s3 - add s7, s7, t5 + add s8, s8, t5 slli s6, s4, 1 add s4, s4, s5 add s6, s6, s4 - slli t5, s7, 2 + slli t5, s8, 2 addi t5, t5, 8 srli t5, t5, 4 sb t5, 0(t4) - slli t5, s7, 1 - add s3, s7, s6 + slli t5, s8, 1 + add s3, s8, s6 add t5, t5, s3 addi t5, t5, 7 srli t5, t5, 4 @@ -850,25 +850,25 @@ beqz a6, .LBB7_19 .LBB7_7: # in Loop: Header=BB7_4 Depth=1 mv s5, s4 - mv s8, t4 + mv s7, t4 mv s9, ra mv s10, s11 .LBB7_8: # %for.body32.preheader196 # in Loop: Header=BB7_4 Depth=1 - mv a6, s7 + mv a6, s8 .LBB7_9: # %for.body32 # Parent Loop BB7_4 Depth=1 # => This Inner Loop Header: Depth=2 lbu t2, 0(s10) - mv s7, s6 + mv s8, s6 lbu t4, 0(s9) addi s10, s10, 1 slli s6, t2, 1 addi s9, s9, 1 add t2, t2, t4 add s6, s6, t2 - slli t2, s7, 1 - add t2, t2, s7 + slli t2, s8, 1 + add t2, t2, s8 add a6, a6, t2 addi a6, a6, 8 srli a6, a6, 4 @@ -876,11 +876,11 @@ add t2, t2, s6 addi t2, t2, 7 srli a6, t2, 4 - sb a6, 3(s8) + sb a6, 3(s7) addiw s3, s3, -1 - mv s8, s5 + mv s7, s5 addi s5, s5, 2 - mv a6, s7 + mv a6, s8 bnez s3, .LBB7_9 # %bb.10: # %for.end.loopexit # in Loop: Header=BB7_4 Depth=1 @@ -892,8 +892,8 @@ # in Loop: Header=BB7_4 Depth=1 addi a4, a4, 1 slli a6, s6, 1 - add s7, s7, s6 - add a6, s7, a6 + add s8, s8, s6 + add a6, s8, a6 addi a6, a6, 8 srli a6, a6, 4 sb a6, 0(s5) @@ -1005,12 +1005,12 @@ slli t2, a6, 1 add s5, s4, t2 subw s3, s3, a6 - add s8, t4, t2 + add s7, t4, t2 add s9, ra, a6 add s10, s11, a6 li a7, 32 vsetvli zero, a7, e32, m8, ta, ma - vmv.v.x v16, s7 + vmv.v.x v16, s8 vmv.v.x v8, s6 mv s6, a6 .LBB7_20: # %vector.body142 @@ -1088,7 +1088,7 @@ addi a7, sp, 256 vse32.v v8, (a7) lw s6, 380(sp) - lw s7, 376(sp) + lw s8, 376(sp) bne a6, t5, .LBB7_8 # %bb.22: # in Loop: Header=BB7_4 Depth=1 add t4, t4, t2 --- build.head//SingleSource/Regression/C/gcc-c-torture/execute/CMakeFiles/GCC-C-execute-memset-2.dir/memset-2.s 2023-11-13 08:03:22.963541173 +0000 +++ build//SingleSource/Regression/C/gcc-c-torture/execute/CMakeFiles/GCC-C-execute-memset-2.dir/memset-2.s 2023-11-13 08:03:18.035683620 +0000 @@ -185,7 +185,7 @@ vse8.v v8, (s6) sb zero, 1(s5) addi a0, s5, 1 - sd a0, 40(sp) # 8-byte Folded Spill + sd a0, 48(sp) # 8-byte Folded Spill li a0, 1 li a1, 1 li a2, 0 @@ -229,7 +229,7 @@ vse8.v v8, (s6) sb zero, 3(s5) addi a0, s5, 3 - sd a0, 48(sp) # 8-byte Folded Spill + sd a0, 56(sp) # 8-byte Folded Spill li a0, 3 li a1, 1 li a2, 0 @@ -273,7 +273,7 @@ vse8.v v8, (s6) sb zero, 5(s5) addi a0, s5, 5 - sd a0, 72(sp) # 8-byte Folded Spill + sd a0, 64(sp) # 8-byte Folded Spill li a0, 5 li a1, 1 li a2, 0 @@ -317,7 +317,7 @@ vse8.v v8, (s6) sb zero, 7(s5) addi a0, s5, 7 - sd a0, 80(sp) # 8-byte Folded Spill + sd a0, 72(sp) # 8-byte Folded Spill li a0, 7 li a1, 1 li a2, 0 @@ -1745,8 +1745,9 @@ lbu a0, %pcrel_lo(.Lpcrel_hi4)(s8) slli a1, s3, 32 add s11, s3, a1 + sd s3, 80(sp) # 8-byte Folded Spill mul a0, a0, s11 - sd s11, 32(sp) # 8-byte Folded Spill + sd s11, 40(sp) # 8-byte Folded Spill sd a0, 0(s5) li a1, 8 li a2, 65 @@ -1754,8 +1755,8 @@ call check slli s1, s0, 32 add s1, s0, s1 - sd s1, 56(sp) # 8-byte Folded Spill sd s1, 0(s5) + sd s1, 32(sp) # 8-byte Folded Spill li a1, 8 li a2, 66 li a0, 0 @@ -1889,8 +1890,6 @@ call check lbu a0, %pcrel_lo(.Lpcrel_hi4)(s8) mul a0, a0, s3 - mv s1, s3 - sd s3, 64(sp) # 8-byte Folded Spill sw a0, 4(s5) sw a0, 8(s5) li a0, 4 @@ -2039,8 +2038,7 @@ li a0, 0 call check sb s9, 8(s5) - ld a0, 56(sp) # 8-byte Folded Reload - sd a0, 0(s5) + sd s1, 0(s5) li a1, 9 li a2, 66 li a0, 0 @@ -2051,7 +2049,7 @@ vse8.v v8, (s6) vse8.v v8, (s5) li a2, 9 - ld s11, 40(sp) # 8-byte Folded Reload + ld s11, 48(sp) # 8-byte Folded Reload mv a0, s11 li a1, 0 call memset@plt @@ -2116,7 +2114,7 @@ vse8.v v8, (s6) vse8.v v8, (s5) li a2, 9 - ld s11, 48(sp) # 8-byte Folded Reload + ld s11, 56(sp) # 8-byte Folded Reload mv a0, s11 li a1, 0 call memset@plt @@ -2154,7 +2152,8 @@ call check lbu a0, %pcrel_lo(.Lpcrel_hi4)(s8) sb a0, 12(s5) - mul a0, a0, s3 + ld a1, 80(sp) # 8-byte Folded Reload + mul a0, a0, a1 sw a0, 4(s5) sw a0, 8(s5) li a0, 4 @@ -2175,7 +2174,7 @@ vse8.v v8, (s6) vse8.v v8, (s5) li a2, 9 - ld s1, 72(sp) # 8-byte Folded Reload + ld s1, 64(sp) # 8-byte Folded Reload mv a0, s1 li a1, 0 call memset@plt @@ -2240,7 +2239,7 @@ vse8.v v8, (s6) vse8.v v8, (s5) li a2, 9 - ld s0, 80(sp) # 8-byte Folded Reload + ld s0, 72(sp) # 8-byte Folded Reload mv a0, s0 li a1, 0 call memset@plt @@ -2276,7 +2275,7 @@ li a2, 0 call check lbu a0, %pcrel_lo(.Lpcrel_hi4)(s8) - ld s1, 32(sp) # 8-byte Folded Reload + ld s1, 40(sp) # 8-byte Folded Reload mul a1, a0, s1 sd a1, 0(s5) slli a1, a0, 8 @@ -2287,7 +2286,7 @@ li a0, 0 call check sh s10, 8(s5) - ld s3, 56(sp) # 8-byte Folded Reload + ld s3, 32(sp) # 8-byte Folded Reload sd s3, 0(s5) li a1, 10 li a2, 66 @@ -2299,7 +2298,7 @@ vse8.v v8, (s6) vse8.v v8, (s5) li a2, 10 - ld s0, 40(sp) # 8-byte Folded Reload + ld s0, 48(sp) # 8-byte Folded Reload mv a0, s0 li a1, 0 call memset@plt @@ -2400,7 +2399,7 @@ li a2, 0 call check lbu a0, %pcrel_lo(.Lpcrel_hi4)(s8) - ld a1, 64(sp) # 8-byte Folded Reload + ld a1, 80(sp) # 8-byte Folded Reload mul a1, a0, a1 sw a1, 4(s5) sw a1, 8(s5) @@ -2425,7 +2424,7 @@ vse8.v v8, (s6) vse8.v v8, (s5) li a2, 10 - ld s11, 72(sp) # 8-byte Folded Reload + ld s11, 64(sp) # 8-byte Folded Reload mv a0, s11 li a1, 0 call memset@plt @@ -2490,7 +2489,7 @@ vse8.v v8, (s6) vse8.v v8, (s5) li a2, 10 - ld s11, 80(sp) # 8-byte Folded Reload + ld s11, 72(sp) # 8-byte Folded Reload mv a0, s11 li a1, 0 call memset@plt @@ -2550,7 +2549,7 @@ vse8.v v8, (s6) vse8.v v8, (s5) li a2, 11 - ld s1, 40(sp) # 8-byte Folded Reload + ld s1, 48(sp) # 8-byte Folded Reload mv a0, s1 li a1, 0 call memset@plt @@ -2618,7 +2617,7 @@ vse8.v v8, (s6) vse8.v v8, (s5) li a2, 11 - ld s11, 48(sp) # 8-byte Folded Reload + ld s11, 56(sp) # 8-byte Folded Reload mv a0, s11 li a1, 0 call memset@plt @@ -2657,7 +2656,7 @@ call check lbu a0, %pcrel_lo(.Lpcrel_hi4)(s8) sb a0, 14(s5) - ld a1, 64(sp) # 8-byte Folded Reload + ld a1, 80(sp) # 8-byte Folded Reload mul a1, a0, a1 sw a1, 4(s5) sw a1, 8(s5) @@ -2682,7 +2681,7 @@ vse8.v v8, (s6) vse8.v v8, (s5) li a2, 11 - ld s3, 72(sp) # 8-byte Folded Reload + ld s3, 64(sp) # 8-byte Folded Reload mv a0, s3 li a1, 0 call memset@plt @@ -2750,7 +2749,7 @@ vse8.v v8, (s6) vse8.v v8, (s5) li a2, 11 - ld s11, 80(sp) # 8-byte Folded Reload + ld s11, 72(sp) # 8-byte Folded Reload mv a0, s11 li a1, 0 call memset@plt @@ -2786,7 +2785,7 @@ li a2, 0 call check lbu a0, %pcrel_lo(.Lpcrel_hi4)(s8) - ld a1, 32(sp) # 8-byte Folded Reload + ld a1, 40(sp) # 8-byte Folded Reload mul a0, a0, a1 sd a0, 0(s5) sw a0, 8(s5) @@ -2794,7 +2793,7 @@ li a2, 65 li a0, 0 call check - ld a0, 56(sp) # 8-byte Folded Reload + ld a0, 32(sp) # 8-byte Folded Reload sw a0, 8(s5) sd a0, 0(s5) li a1, 12 @@ -2874,7 +2873,7 @@ vse8.v v8, (s6) vse8.v v8, (s5) li a2, 12 - ld s11, 48(sp) # 8-byte Folded Reload + ld s11, 56(sp) # 8-byte Folded Reload mv a0, s11 li a1, 0 call memset@plt @@ -2911,7 +2910,7 @@ li a2, 0 call check lbu a0, %pcrel_lo(.Lpcrel_hi4)(s8) - ld a1, 64(sp) # 8-byte Folded Reload + ld a1, 80(sp) # 8-byte Folded Reload mul a0, a0, a1 sw a0, 4(s5) sw a0, 8(s5) @@ -3000,7 +2999,7 @@ vse8.v v8, (s6) vse8.v v8, (s5) li a2, 12 - ld s3, 80(sp) # 8-byte Folded Reload + ld s3, 72(sp) # 8-byte Folded Reload mv a0, s3 li a1, 0 call memset@plt @@ -3038,7 +3037,7 @@ call check lbu a0, %pcrel_lo(.Lpcrel_hi4)(s8) sb a0, 12(s5) - ld a1, 32(sp) # 8-byte Folded Reload + ld a1, 40(sp) # 8-byte Folded Reload mul a0, a0, a1 sd a0, 0(s5) sw a0, 8(s5) @@ -3047,7 +3046,7 @@ li a0, 0 call check sb s9, 12(s5) - ld a0, 56(sp) # 8-byte Folded Reload + ld a0, 32(sp) # 8-byte Folded Reload sw a0, 8(s5) sd a0, 0(s5) li a1, 13 @@ -3168,7 +3167,7 @@ call check lbu a0, %pcrel_lo(.Lpcrel_hi4)(s8) sb a0, 16(s5) - ld a1, 64(sp) # 8-byte Folded Reload + ld a1, 80(sp) # 8-byte Folded Reload mul a0, a0, a1 sw a0, 4(s5) sw a0, 8(s5) @@ -3191,7 +3190,7 @@ vse8.v v8, (s6) vse8.v v8, (s5) li a2, 13 - ld s0, 72(sp) # 8-byte Folded Reload + ld s0, 64(sp) # 8-byte Folded Reload mv a0, s0 li a1, 0 call memset@plt --- build.head//SingleSource/Regression/C/gcc-c-torture/execute/CMakeFiles/GCC-C-execute-memcpy-2.dir/memcpy-2.s 2023-11-13 08:03:22.963541173 +0000 +++ build//SingleSource/Regression/C/gcc-c-torture/execute/CMakeFiles/GCC-C-execute-memcpy-2.dir/memcpy-2.s 2023-11-13 08:03:18.035683620 +0000 @@ -278,9 +278,9 @@ vl4r.v v8, (a0) # Unknown-size Folded Reload vse8.v v8, (s5) vsetivli zero, 16, e8, m1, ta, ma + addi a0, sp, 96 + vl1r.v v8, (a0) # Unknown-size Folded Reload ld a0, 72(sp) # 8-byte Folded Reload - addi a1, sp, 96 - vl1r.v v8, (a1) # Unknown-size Folded Reload vse8.v v8, (a0) ld a0, 64(sp) # 8-byte Folded Reload vse8.v v8, (a0) --- build.head//SingleSource/Benchmarks/Polybench/datamining/covariance/CMakeFiles/covariance.dir/covariance.s 2023-11-13 08:03:22.891543255 +0000 +++ build//SingleSource/Benchmarks/Polybench/datamining/covariance/CMakeFiles/covariance.dir/covariance.s 2023-11-13 08:03:17.955685932 +0000 @@ -198,7 +198,7 @@ # %bb.3: # %polybench_alloc_data.exit22 csrr s9, vlenb srli s4, s9, 3 - slli s7, s9, 1 + slli t4, s9, 1 srli s8, s9, 2 li a1, 500 .Lpcrel_hi13: @@ -242,7 +242,7 @@ vsetvli zero, zero, e32, m1, ta, ma vadd.vx v9, v9, s8 sub a5, a5, s8 - add a6, a6, s7 + add a6, a6, t4 bnez a5, .LBB6_8 # %bb.9: # %middle.block # in Loop: Header=BB6_5 Depth=1 @@ -365,9 +365,9 @@ vsetvli zero, zero, e64, m2, ta, ma vfsub.vv v8, v10, v8 vs2r.v v8, (t1) - add t2, t2, s7 + add t2, t2, t4 sub t0, t0, s8 - add t1, t1, s7 + add t1, t1, t4 bnez t0, .LBB6_24 # %bb.25: # %middle.block36 # in Loop: Header=BB6_18 Depth=1 @@ -375,7 +375,7 @@ beq a6, a5, .LBB6_17 j .LBB6_21 .LBB6_26: # %for.cond36.preheader.i.preheader - sd t3, 56(sp) # 8-byte Folded Spill + sd t3, 48(sp) # 8-byte Folded Spill li a0, 0 lui a1, 2 addiw a1, a1, -192 @@ -430,7 +430,8 @@ addi a3, a3, 8 bne a0, a2, .LBB6_27 # %bb.32: # %kernel_covariance.exit - sd s2, 72(sp) # 8-byte Folded Spill + sd t4, 72(sp) # 8-byte Folded Spill + sd s2, 64(sp) # 8-byte Folded Spill lui s2, 4 addiw a0, s2, -383 call malloc@plt @@ -471,7 +472,7 @@ li t6, 40 li ra, 10 mv a0, s3 - sd s3, 64(sp) # 8-byte Folded Spill + sd s3, 56(sp) # 8-byte Folded Spill .LBB6_33: # %for.cond3.preheader.i # =>This Loop Header: Depth=1 # Child Loop BB6_36 Depth 2 @@ -493,9 +494,10 @@ addi s3, sp, 224 vl2r.v v8, (s3) # Unknown-size Folded Reload li s11, 12 + li s4, 56 li s10, 14 - li s4, 15 - li s3, 13 + li s7, 15 + ld s3, 72(sp) # 8-byte Folded Reload .LBB6_36: # %vector.body56 # Parent Loop BB6_33 Depth=1 # => This Inner Loop Header: Depth=2 @@ -574,10 +576,10 @@ vand.vi v14, v14, 15 vor.vx v14, v14, s2 vsoxei64.v v14, (s11), v12 - vsoxei64.v v14, (s3), v12 + li s6, 13 + vsoxei64.v v14, (s6), v12 vsetvli zero, zero, e32, m1, ta, ma - li s6, 56 - vnsrl.wx v14, v10, s6 + vnsrl.wx v14, v10, s4 vsetvli zero, zero, e16, mf2, ta, ma vnsrl.wi v10, v14, 0 vsetvli zero, zero, e8, mf4, ta, ma @@ -585,10 +587,10 @@ vand.vi v10, v10, 15 vor.vx v10, v10, s2 vsoxei64.v v10, (s10), v12 - vsoxei64.v v10, (s4), v12 + vsoxei64.v v10, (s7), v12 vsetvli zero, zero, e64, m2, ta, ma vadd.vx v8, v8, s8 - add a2, a2, s7 + add a2, a2, s3 sub a1, a1, s8 add a0, a0, s9 bnez a1, .LBB6_36 @@ -670,12 +672,12 @@ # %bb.41: # %print_array.exit mv a0, s5 call free@plt - ld a0, 72(sp) # 8-byte Folded Reload - call free@plt ld a0, 64(sp) # 8-byte Folded Reload call free@plt ld a0, 56(sp) # 8-byte Folded Reload call free@plt + ld a0, 48(sp) # 8-byte Folded Reload + call free@plt li a0, 0 addi sp, s0, -320 ld ra, 312(sp) # 8-byte Folded Reload --- build.head//MultiSource/Benchmarks/mediabench/jpeg/jpeg-6a/CMakeFiles/cjpeg.dir/jfdctint.s 2023-11-13 08:03:22.607551463 +0000 +++ build//MultiSource/Benchmarks/mediabench/jpeg/jpeg-6a/CMakeFiles/cjpeg.dir/jfdctint.s 2023-11-13 08:03:17.639695066 +0000 @@ -30,9 +30,9 @@ vmsleu.vi v0, v8, 7 li a1, 32 vlse32.v v8, (a0), a1, v0.t - li t1, 28 + li t0, 28 vsetvli zero, zero, e32, m4, ta, ma - vluxei64.v v12, (t1), v16, v0.t + vluxei64.v v12, (t0), v16, v0.t sd s5, 8(sp) sd s6, 0(sp) csrr a2, vlenb @@ -60,57 +60,57 @@ add a2, sp, a2 addi a2, a2, 32 vs8r.v v24, (a2) # Unknown-size Folded Spill - li a5, 4 + li a4, 4 vsetvli zero, zero, e32, m4, ta, ma - vluxei64.v v8, (a5), v16, v0.t - li a3, 24 - vluxei64.v v12, (a3), v16, v0.t + vluxei64.v v8, (a4), v16, v0.t + li a2, 24 + vluxei64.v v12, (a2), v16, v0.t vadd.vv v4, v12, v8 vsetvli zero, zero, e64, m8, ta, ma vsext.vf2 v24, v4 - csrr a2, vlenb - li a4, 28 - mul a2, a2, a4 - add a2, sp, a2 - addi a2, a2, 32 - vs8r.v v24, (a2) # Unknown-size Folded Spill + csrr a3, vlenb + li a5, 28 + mul a3, a3, a5 + add a3, sp, a3 + addi a3, a3, 32 + vs8r.v v24, (a3) # Unknown-size Folded Spill vsetvli zero, zero, e32, m4, ta, ma vsub.vv v8, v8, v12 vsetvli zero, zero, e64, m8, ta, ma - li a4, 8 + li a5, 8 vsext.vf2 v24, v8 - csrr a2, vlenb + csrr a3, vlenb li a6, 60 - mul a2, a2, a6 - add a2, sp, a2 - addi a2, a2, 32 - vs8r.v v24, (a2) # Unknown-size Folded Spill + mul a3, a3, a6 + add a3, sp, a3 + addi a3, a3, 32 + vs8r.v v24, (a3) # Unknown-size Folded Spill vsetvli zero, zero, e32, m4, ta, ma li t3, 20 - vluxei64.v v8, (a4), v16, v0.t + vluxei64.v v8, (a5), v16, v0.t vluxei64.v v12, (t3), v16, v0.t vadd.vv v4, v12, v8 vsetvli zero, zero, e64, m8, ta, ma vsext.vf2 v24, v4 - csrr a2, vlenb + csrr a3, vlenb li a6, 20 - mul a2, a2, a6 - add a2, sp, a2 - addi a2, a2, 32 - vs8r.v v24, (a2) # Unknown-size Folded Spill + mul a3, a3, a6 + add a3, sp, a3 + addi a3, a3, 32 + vs8r.v v24, (a3) # Unknown-size Folded Spill vsetvli zero, zero, e32, m4, ta, ma vsub.vv v8, v8, v12 vsetvli zero, zero, e64, m8, ta, ma li t4, 12 vsext.vf2 v24, v8 - csrr a2, vlenb + csrr a3, vlenb li a6, 44 - mul a2, a2, a6 - add a2, sp, a2 - addi a2, a2, 32 - vs8r.v v24, (a2) # Unknown-size Folded Spill + mul a3, a3, a6 + add a3, sp, a3 + addi a3, a3, 32 + vs8r.v v24, (a3) # Unknown-size Folded Spill vsetvli zero, zero, e32, m4, ta, ma - li a2, 16 + li a3, 16 csrr a6, vlenb li a7, 68 mul a6, a6, a7 @@ -118,7 +118,7 @@ addi a6, a6, 32 vs1r.v v0, (a6) # Unknown-size Folded Spill vluxei64.v v8, (t4), v16, v0.t - vluxei64.v v12, (a2), v16, v0.t + vluxei64.v v12, (a3), v16, v0.t vadd.vv v4, v12, v8 vsetvli zero, zero, e64, m8, ta, ma vsext.vf2 v16, v4 @@ -193,11 +193,11 @@ add a1, sp, a1 addi a1, a1, 32 vl8r.v v16, (a1) # Unknown-size Folded Reload - vsoxei64.v v8, (a2), v16, v0.t + vsoxei64.v v8, (a3), v16, v0.t vsetvli zero, zero, e64, m8, ta, ma - li a2, 1024 - lui t0, 1 - addiw a1, t0, 337 + li a3, 1024 + lui t1, 1 + addiw a1, t1, 337 csrr a6, vlenb li a7, 28 mul a6, a6, a7 @@ -210,17 +210,17 @@ addi a6, a6, 32 vl8r.v v24, (a6) # Unknown-size Folded Reload vadd.vv v16, v24, v16 - vmv.v.x v0, a2 - csrr a2, vlenb + vmv.v.x v0, a3 + csrr a3, vlenb li a6, 36 - mul a2, a2, a6 - add a2, sp, a2 - addi a2, a2, 32 - vs8r.v v0, (a2) # Unknown-size Folded Spill + mul a3, a3, a6 + add a3, sp, a3 + addi a3, a3, 32 + vs8r.v v0, (a3) # Unknown-size Folded Spill vmadd.vx v16, a1, v0 lui a6, 2 - addiw a2, a6, -1922 - vmadd.vx v24, a2, v16 + addiw a3, a6, -1922 + vmadd.vx v24, a3, v16 vsetvli zero, zero, e32, m4, ta, ma vnsrl.wi v8, v24, 11 vmv1r.v v0, v12 @@ -230,10 +230,10 @@ add a7, sp, a7 addi a7, a7, 32 vl8r.v v24, (a7) # Unknown-size Folded Reload - vsoxei64.v v8, (a4), v24, v0.t - lui a4, 1033439 - slli a4, a4, 9 - srli a4, a4, 21 + vsoxei64.v v8, (a5), v24, v0.t + lui a5, 1033439 + slli a5, a5, 9 + srli a5, a5, 21 vsetvli zero, zero, e64, m8, ta, ma csrr a7, vlenb li t2, 28 @@ -241,44 +241,44 @@ add a7, sp, a7 addi a7, a7, 32 vl8r.v v0, (a7) # Unknown-size Folded Reload - vmacc.vx v16, a4, v0 + vmacc.vx v16, a5, v0 vsetvli zero, zero, e32, m4, ta, ma vnsrl.wi v8, v16, 11 vmv1r.v v0, v12 - vsoxei64.v v8, (a3), v24, v0.t + vsoxei64.v v8, (a2), v24, v0.t vsetvli zero, zero, e64, m8, ta, ma - addiw a3, a6, 1441 - csrr a4, vlenb + addiw a2, a6, 1441 + csrr a5, vlenb li a6, 60 - mul a4, a4, a6 - add a4, sp, a4 - addi a4, a4, 32 - vl8r.v v8, (a4) # Unknown-size Folded Reload - csrr a4, vlenb + mul a5, a5, a6 + add a5, sp, a5 + addi a5, a5, 32 + vl8r.v v8, (a5) # Unknown-size Folded Reload + csrr a5, vlenb li a6, 12 - mul a4, a4, a6 - add a4, sp, a4 - addi a4, a4, 32 - vl8r.v v24, (a4) # Unknown-size Folded Reload + mul a5, a5, a6 + add a5, sp, a5 + addi a5, a5, 32 + vl8r.v v24, (a5) # Unknown-size Folded Reload vadd.vv v8, v24, v8 - csrr a4, vlenb + csrr a5, vlenb li a6, 44 - mul a4, a4, a6 - add a4, sp, a4 - addi a4, a4, 32 - vl8r.v v16, (a4) # Unknown-size Folded Reload - csrr a4, vlenb + mul a5, a5, a6 + add a5, sp, a5 + addi a5, a5, 32 + vl8r.v v16, (a5) # Unknown-size Folded Reload + csrr a5, vlenb li a6, 52 - mul a4, a4, a6 - add a4, sp, a4 - addi a4, a4, 32 - vl8r.v v0, (a4) # Unknown-size Folded Reload + mul a5, a5, a6 + add a5, sp, a5 + addi a5, a5, 32 + vl8r.v v0, (a5) # Unknown-size Folded Reload vadd.vv v0, v16, v0 vadd.vv v16, v8, v0 - vmul.vx v16, v16, a3 - lui a4, 1048572 - addiw a4, a4, 315 - vmadd.vx v8, a4, v16 + vmul.vx v16, v16, a2 + lui a5, 1048572 + addiw a5, a5, 315 + vmadd.vx v8, a5, v16 csrr a6, vlenb li a7, 20 mul a6, a6, a7 @@ -286,16 +286,16 @@ addi a6, a6, 32 vs8r.v v8, (a6) # Unknown-size Folded Spill lui a6, 1048575 - addiw a6, a6, 900 - vmacc.vx v16, a6, v0 - csrr a7, vlenb + addiw a7, a6, 900 + vmacc.vx v16, a7, v0 + csrr a6, vlenb li t2, 28 - mul a7, a7, t2 - add a7, sp, a7 - addi a7, a7, 32 - vs8r.v v16, (a7) # Unknown-size Folded Spill - lui a7, 1048574 - addiw a7, a7, 819 + mul a6, a6, t2 + add a6, sp, a6 + addi a6, a6, 32 + vs8r.v v16, (a6) # Unknown-size Folded Spill + lui a6, 1048574 + addiw a6, a6, 819 csrr t2, vlenb li t5, 52 mul t2, t2, t5 @@ -309,14 +309,14 @@ add t2, sp, t2 addi t2, t2, 32 vl8r.v v8, (t2) # Unknown-size Folded Reload - vmadd.vx v16, a7, v8 + vmadd.vx v16, a6, v8 csrr t2, vlenb slli t2, t2, 2 add t2, sp, t2 addi t2, t2, 32 vs8r.v v16, (t2) # Unknown-size Folded Spill - addiw t0, t0, -1650 - vmadd.vx v24, t0, v16 + addiw t1, t1, -1650 + vmadd.vx v24, t1, v16 csrr t2, vlenb li t5, 20 mul t2, t2, t5 @@ -364,9 +364,9 @@ add t2, sp, t2 addi t2, t2, 32 vl8r.v v24, (t2) # Unknown-size Folded Reload - vsoxei64.v v4, (t1), v24, v0.t - lui t1, 1048571 - addiw t1, t1, -515 + vsoxei64.v v4, (t0), v24, v0.t + lui t0, 1048571 + addiw t0, t0, -515 vsetvli zero, zero, e64, m8, ta, ma csrr t2, vlenb li t5, 36 @@ -374,13 +374,13 @@ add t2, sp, t2 addi t2, t2, 32 vl8r.v v24, (t2) # Unknown-size Folded Reload - vmadd.vx v16, t1, v24 - lui t6, 4 - addiw t2, t6, 435 + vmadd.vx v16, t0, v24 + lui s1, 4 + addiw t2, s1, 435 vmadd.vx v8, t2, v16 csrr t5, vlenb - li s0, 28 - mul t5, t5, s0 + li t6, 28 + mul t5, t5, t6 add t5, sp, t5 addi t5, t5, 32 vl8r.v v24, (t5) # Unknown-size Folded Reload @@ -388,8 +388,8 @@ vsetvli zero, zero, e32, m4, ta, ma vnsrl.wi v4, v8, 11 csrr t5, vlenb - li s0, 69 - mul t5, t5, s0 + li t6, 69 + mul t5, t5, t6 add t5, sp, t5 addi t5, t5, 32 vl8r.v v24, (t5) # Unknown-size Folded Reload @@ -398,15 +398,15 @@ addiw t3, t3, 596 vsetvli zero, zero, e64, m8, ta, ma csrr t5, vlenb - li s0, 60 - mul t5, t5, s0 + li t6, 60 + mul t5, t5, t6 add t5, sp, t5 addi t5, t5, 32 vl8r.v v24, (t5) # Unknown-size Folded Reload vmacc.vx v16, t3, v24 csrr t5, vlenb - li s0, 20 - mul t5, t5, s0 + li t6, 20 + mul t5, t5, t6 add t5, sp, t5 addi t5, t5, 32 vl8r.v v24, (t5) # Unknown-size Folded Reload @@ -414,8 +414,8 @@ vsetvli zero, zero, e32, m4, ta, ma vnsrl.wi v4, v8, 11 csrr t5, vlenb - li s0, 69 - mul t5, t5, s0 + li t6, 69 + mul t5, t5, t6 add t5, sp, t5 addi t5, t5, 32 vl8r.v v24, (t5) # Unknown-size Folded Reload @@ -424,8 +424,8 @@ addiw t4, t4, 11 vsetvli zero, zero, e64, m8, ta, ma csrr t5, vlenb - li s0, 52 - mul t5, t5, s0 + li t6, 52 + mul t5, t5, t6 add t5, sp, t5 addi t5, t5, 32 vl8r.v v8, (t5) # Unknown-size Folded Reload @@ -436,81 +436,81 @@ vl8r.v v16, (t5) # Unknown-size Folded Reload vmacc.vx v16, t4, v8 csrr t5, vlenb - li s0, 28 - mul t5, t5, s0 + li t6, 28 + mul t5, t5, t6 add t5, sp, t5 addi t5, t5, 32 vl8r.v v8, (t5) # Unknown-size Folded Reload vadd.vv v8, v16, v8 vsetvli zero, zero, e32, m4, ta, ma vnsrl.wi v16, v8, 11 - vsoxei64.v v16, (a5), v24, v0.t + vsoxei64.v v16, (a4), v24, v0.t vle32.v v8, (a0), v0.t addi t5, a0, 224 vle32.v v12, (t5), v0.t vadd.vv v24, v12, v8 vsetvli zero, zero, e64, m8, ta, ma vsext.vf2 v16, v24 - csrr a5, vlenb - li s0, 44 - mul a5, a5, s0 - add a5, sp, a5 - addi a5, a5, 32 - vs8r.v v16, (a5) # Unknown-size Folded Spill + csrr a4, vlenb + li t6, 44 + mul a4, a4, t6 + add a4, sp, a4 + addi a4, a4, 32 + vs8r.v v16, (a4) # Unknown-size Folded Spill vsetvli zero, zero, e32, m4, ta, ma vsub.vv v8, v8, v12 vsetvli zero, zero, e64, m8, ta, ma - addi a5, a0, 32 - vle32.v v12, (a5), v0.t + addi a4, a0, 32 + vle32.v v12, (a4), v0.t addi s2, a0, 192 vle32.v v24, (s2), v0.t vsext.vf2 v16, v8 - csrr s0, vlenb - li s1, 52 - mul s0, s0, s1 - add s0, sp, s0 - addi s0, s0, 32 - vs8r.v v16, (s0) # Unknown-size Folded Spill + csrr t6, vlenb + li s0, 52 + mul t6, t6, s0 + add t6, sp, t6 + addi t6, t6, 32 + vs8r.v v16, (t6) # Unknown-size Folded Spill vsetvli zero, zero, e32, m4, ta, ma vadd.vv v8, v24, v12 vsetvli zero, zero, e64, m8, ta, ma vsext.vf2 v16, v8 - csrr s0, vlenb - li s1, 36 - mul s0, s0, s1 - add s0, sp, s0 - addi s0, s0, 32 - vs8r.v v16, (s0) # Unknown-size Folded Spill + csrr t6, vlenb + li s0, 36 + mul t6, t6, s0 + add t6, sp, t6 + addi t6, t6, 32 + vs8r.v v16, (t6) # Unknown-size Folded Spill vsetvli zero, zero, e32, m4, ta, ma vsub.vv v8, v12, v24 vsetvli zero, zero, e64, m8, ta, ma addi s3, a0, 64 - addi s0, a0, 160 + addi t6, a0, 160 vle32.v v12, (s3), v0.t - vle32.v v24, (s0), v0.t + vle32.v v24, (t6), v0.t vsext.vf2 v16, v8 - csrr s1, vlenb + csrr s0, vlenb li s4, 69 - mul s1, s1, s4 - add s1, sp, s1 - addi s1, s1, 32 - vs8r.v v16, (s1) # Unknown-size Folded Spill + mul s0, s0, s4 + add s0, sp, s0 + addi s0, s0, 32 + vs8r.v v16, (s0) # Unknown-size Folded Spill vsetvli zero, zero, e32, m4, ta, ma vadd.vv v8, v24, v12 vsetvli zero, zero, e64, m8, ta, ma vsext.vf2 v16, v8 - csrr s1, vlenb + csrr s0, vlenb li s4, 28 - mul s1, s1, s4 - add s1, sp, s1 - addi s1, s1, 32 - vs8r.v v16, (s1) # Unknown-size Folded Spill + mul s0, s0, s4 + add s0, sp, s0 + addi s0, s0, 32 + vs8r.v v16, (s0) # Unknown-size Folded Spill vsetvli zero, zero, e32, m4, ta, ma vsub.vv v8, v12, v24 vsetvli zero, zero, e64, m8, ta, ma - addi s1, a0, 96 + addi s0, a0, 96 addi s4, a0, 128 - vle32.v v28, (s1), v0.t + vle32.v v28, (s0), v0.t vle32.v v24, (s4), v0.t vsext.vf2 v16, v8 csrr s5, vlenb @@ -617,15 +617,15 @@ addi a0, a0, 32 vl8r.v v16, (a0) # Unknown-size Folded Reload vadd.vv v24, v16, v24 - vmv.v.x v0, t6 + vmv.v.x v0, s1 csrr a0, vlenb - li t6, 44 - mul a0, a0, t6 + li s1, 44 + mul a0, a0, s1 add a0, sp, a0 addi a0, a0, 32 vs8r.v v0, (a0) # Unknown-size Folded Spill vmadd.vx v24, a1, v0 - vmadd.vx v16, a2, v24 + vmadd.vx v16, a3, v24 vsetvli zero, zero, e32, m4, ta, ma vnsrl.wi v8, v16, 15 vmv1r.v v0, v12 @@ -634,8 +634,8 @@ srli a0, a0, 17 vsetvli zero, zero, e64, m8, ta, ma csrr a1, vlenb - li a2, 36 - mul a1, a1, a2 + li a3, 36 + mul a1, a1, a3 add a1, sp, a1 addi a1, a1, 32 vl8r.v v8, (a1) # Unknown-size Folded Reload @@ -683,8 +683,8 @@ addi a0, a0, 32 vl8r.v v16, (a0) # Unknown-size Folded Reload vadd.vv v16, v8, v16 - vmul.vx v16, v16, a3 - vmadd.vx v8, a4, v16 + vmul.vx v16, v16, a2 + vmadd.vx v8, a5, v16 csrr a0, vlenb li a1, 28 mul a0, a0, a1 @@ -697,7 +697,7 @@ add a0, sp, a0 addi a0, a0, 32 vl8r.v v8, (a0) # Unknown-size Folded Reload - vmacc.vx v16, a6, v8 + vmacc.vx v16, a7, v8 csrr a0, vlenb li a1, 36 mul a0, a0, a1 @@ -711,8 +711,8 @@ add a0, sp, a0 addi a0, a0, 32 vl8r.v v8, (a0) # Unknown-size Folded Reload - vmadd.vx v16, a7, v8 - vmadd.vx v24, t0, v16 + vmadd.vx v16, a6, v8 + vmadd.vx v24, t1, v16 csrr a0, vlenb li a1, 28 mul a0, a0, a1 @@ -761,7 +761,7 @@ add a0, sp, a0 addi a0, a0, 32 vl8r.v v0, (a0) # Unknown-size Folded Reload - vmadd.vx v8, t1, v0 + vmadd.vx v8, t0, v0 csrr a0, vlenb li a1, 60 mul a0, a0, a1 @@ -785,7 +785,7 @@ addi a0, a0, 32 vl1r.v v28, (a0) # Unknown-size Folded Reload vmv1r.v v0, v28 - vse32.v v4, (s0), v0.t + vse32.v v4, (t6), v0.t vsetvli zero, zero, e64, m8, ta, ma csrr a0, vlenb li a1, 69 @@ -804,7 +804,7 @@ vsetvli zero, zero, e32, m4, ta, ma vnsrl.wi v24, v8, 15 vmv1r.v v0, v28 - vse32.v v24, (s1), v0.t + vse32.v v24, (s0), v0.t vsetvli zero, zero, e64, m8, ta, ma csrr a0, vlenb li a1, 52 @@ -822,7 +822,7 @@ vadd.vv v8, v16, v8 vsetvli zero, zero, e32, m4, ta, ma vnsrl.wi v16, v8, 15 - vse32.v v16, (a5), v0.t + vse32.v v16, (a4), v0.t csrr a0, vlenb li a1, 78 mul a0, a0, a1 --- build.head//MultiSource/Benchmarks/mediabench/jpeg/jpeg-6a/CMakeFiles/cjpeg.dir/jddctmgr.s 2023-11-13 08:03:22.607551463 +0000 +++ build//MultiSource/Benchmarks/mediabench/jpeg/jpeg-6a/CMakeFiles/cjpeg.dir/jddctmgr.s 2023-11-13 08:03:17.639695066 +0000 @@ -162,12 +162,12 @@ vs2r.v v8, (a0) # Unknown-size Folded Spill li t3, 16 li t4, 32 - sd t0, 48(sp) # 8-byte Folded Spill csrr a0, vlenb slli a0, a0, 1 add a0, sp, a0 addi a0, a0, 64 vs2r.v v20, (a0) # Unknown-size Folded Spill + sd t0, 48(sp) # 8-byte Folded Spill j .LBB1_4 .LBB1_2: # %sw.default84 # in Loop: Header=BB1_4 Depth=1 @@ -179,14 +179,14 @@ jalr a1 li t4, 32 li t3, 16 + li t2, 1 + li t1, 3 + ld t0, 48(sp) # 8-byte Folded Reload csrr a0, vlenb slli a0, a0, 1 add a0, sp, a0 addi a0, a0, 64 vl2r.v v20, (a0) # Unknown-size Folded Reload - li t2, 1 - li t1, 3 - ld t0, 48(sp) # 8-byte Folded Reload .LBB1_3: # %for.inc90 # in Loop: Header=BB1_4 Depth=1 lw a0, 48(s0) @@ -270,14 +270,14 @@ # in Loop: Header=BB1_4 Depth=1 li t4, 32 li t3, 16 + li t2, 1 + li t1, 3 + ld t0, 48(sp) # 8-byte Folded Reload csrr a0, vlenb slli a0, a0, 1 add a0, sp, a0 addi a0, a0, 64 vl2r.v v20, (a0) # Unknown-size Folded Reload - li t2, 1 - li t1, 3 - ld t0, 48(sp) # 8-byte Folded Reload .LBB1_17: # %sw.epilog16 # in Loop: Header=BB1_4 Depth=1 lw a0, 48(s3) --- build.head//SingleSource/Regression/C/gcc-c-torture/execute/CMakeFiles/GCC-C-execute-regstack-1.dir/regstack-1.s 2023-11-13 08:03:22.995540248 +0000 +++ build//SingleSource/Regression/C/gcc-c-torture/execute/CMakeFiles/GCC-C-execute-regstack-1.dir/regstack-1.s 2023-11-13 08:03:18.071682579 +0000 @@ -6,21 +6,21 @@ main: # @main .cfi_startproc # %bb.0: # %entry - addi sp, sp, -208 - .cfi_def_cfa_offset 208 - sd ra, 200(sp) # 8-byte Folded Spill - sd s0, 192(sp) # 8-byte Folded Spill - sd s1, 184(sp) # 8-byte Folded Spill - sd s2, 176(sp) # 8-byte Folded Spill - sd s3, 168(sp) # 8-byte Folded Spill - sd s4, 160(sp) # 8-byte Folded Spill - sd s5, 152(sp) # 8-byte Folded Spill - sd s6, 144(sp) # 8-byte Folded Spill - sd s7, 136(sp) # 8-byte Folded Spill - sd s8, 128(sp) # 8-byte Folded Spill - sd s9, 120(sp) # 8-byte Folded Spill - sd s10, 112(sp) # 8-byte Folded Spill - sd s11, 104(sp) # 8-byte Folded Spill + addi sp, sp, -192 + .cfi_def_cfa_offset 192 + sd ra, 184(sp) # 8-byte Folded Spill + sd s0, 176(sp) # 8-byte Folded Spill + sd s1, 168(sp) # 8-byte Folded Spill + sd s2, 160(sp) # 8-byte Folded Spill + sd s3, 152(sp) # 8-byte Folded Spill + sd s4, 144(sp) # 8-byte Folded Spill + sd s5, 136(sp) # 8-byte Folded Spill + sd s6, 128(sp) # 8-byte Folded Spill + sd s7, 120(sp) # 8-byte Folded Spill + sd s8, 112(sp) # 8-byte Folded Spill + sd s9, 104(sp) # 8-byte Folded Spill + sd s10, 96(sp) # 8-byte Folded Spill + sd s11, 88(sp) # 8-byte Folded Spill .cfi_offset ra, -8 .cfi_offset s0, -16 .cfi_offset s1, -24 @@ -37,7 +37,7 @@ csrr a0, vlenb slli a0, a0, 2 sub sp, sp, a0 - .cfi_escape 0x0f, 0x0e, 0x72, 0x00, 0x11, 0xd0, 0x01, 0x22, 0x11, 0x04, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 208 + 4 * vlenb + .cfi_escape 0x0f, 0x0e, 0x72, 0x00, 0x11, 0xc0, 0x01, 0x22, 0x11, 0x04, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 192 + 4 * vlenb .Lpcrel_hi0: auipc a0, %pcrel_hi(C) addi a0, a0, %pcrel_lo(.Lpcrel_hi0) @@ -57,9 +57,9 @@ auipc a2, %pcrel_hi(Y2) addi a3, a2, %pcrel_lo(.Lpcrel_hi2) ld a2, 0(a3) - sd a2, 80(sp) # 8-byte Folded Spill + sd a2, 56(sp) # 8-byte Folded Spill ld a3, 8(a3) - sd a3, 72(sp) # 8-byte Folded Spill + sd a3, 64(sp) # 8-byte Folded Spill mv s4, a0 mv s5, a1 call __multf3@plt @@ -95,8 +95,8 @@ mv a2, s10 mv a3, s11 call __multf3@plt - sd a0, 64(sp) # 8-byte Folded Spill - sd a1, 56(sp) # 8-byte Folded Spill + sd a0, 48(sp) # 8-byte Folded Spill + sd a1, 40(sp) # 8-byte Folded Spill mv a0, s8 mv a1, s9 mv a2, s4 @@ -110,7 +110,7 @@ mv a3, s7 call __subtf3@plt sd a0, 24(sp) # 8-byte Folded Spill - sd a1, 48(sp) # 8-byte Folded Spill + sd a1, 32(sp) # 8-byte Folded Spill .Lpcrel_hi4: auipc a2, %pcrel_hi(X) addi a2, a2, %pcrel_lo(.Lpcrel_hi4) @@ -123,27 +123,25 @@ call __multf3@plt mv s0, a0 mv s1, a1 - ld a0, 80(sp) # 8-byte Folded Reload - ld a1, 72(sp) # 8-byte Folded Reload + ld a0, 56(sp) # 8-byte Folded Reload + ld a1, 64(sp) # 8-byte Folded Reload mv a2, s4 mv a3, s5 call __multf3@plt - mv s5, a0 - mv s4, a1 + mv s4, a0 + mv s5, a1 .Lpcrel_hi5: - auipc a2, %pcrel_hi(S) - addi a2, a2, %pcrel_lo(.Lpcrel_hi5) - sd a1, 8(a2) - sd a1, 40(sp) # 8-byte Folded Spill - sd a0, 0(a2) - sd a0, 32(sp) # 8-byte Folded Spill - ld a0, 64(sp) # 8-byte Folded Reload - ld a1, 56(sp) # 8-byte Folded Reload + auipc a0, %pcrel_hi(S) + addi a0, a0, %pcrel_lo(.Lpcrel_hi5) + sd a1, 8(a0) + sd s4, 0(a0) + ld a0, 48(sp) # 8-byte Folded Reload + ld a1, 40(sp) # 8-byte Folded Reload mv a2, s2 mv a3, s3 call __subtf3@plt - sd a0, 56(sp) # 8-byte Folded Spill - sd a1, 64(sp) # 8-byte Folded Spill + sd a0, 40(sp) # 8-byte Folded Spill + sd a1, 48(sp) # 8-byte Folded Spill .Lpcrel_hi6: auipc a2, %pcrel_hi(T) addi a2, a2, %pcrel_lo(.Lpcrel_hi6) @@ -171,21 +169,21 @@ call __addtf3@plt mv a2, a0 mv a3, a1 - mv a0, s5 - mv a1, s4 + mv a0, s4 + mv a1, s5 call __subtf3@plt - mv s4, a0 - mv s5, a1 + mv s6, a0 + mv s7, a1 .Lpcrel_hi8: auipc a0, %pcrel_hi(Z) addi a0, a0, %pcrel_lo(.Lpcrel_hi8) sd a1, 8(a0) - sd s4, 0(a0) + sd s6, 0(a0) mv a0, s8 mv a1, s9 - ld s8, 80(sp) # 8-byte Folded Reload + ld s8, 56(sp) # 8-byte Folded Reload mv a2, s8 - ld s9, 72(sp) # 8-byte Folded Reload + ld s9, 64(sp) # 8-byte Folded Reload mv a3, s9 call __addtf3@plt mv a2, s10 @@ -198,14 +196,13 @@ mv a2, s10 mv a3, s11 call __multf3@plt - mv s6, a0 - mv s7, a1 + mv s10, a0 + mv s11, a1 mv a0, s0 mv a1, s1 mv a2, s8 mv s1, s8 mv a3, s9 - mv s10, s9 call __subtf3@plt mv s8, a0 mv s9, a1 @@ -216,19 +213,19 @@ sd s8, 0(a0) lui a3, 1040383 slli a3, a3, 37 - mv a0, s6 - mv a1, s7 + mv a0, s10 + mv a1, s11 li a2, 0 call __addtf3@plt - mv s7, a0 - mv s6, a1 + mv s11, a0 + mv s10, a1 ld a0, 16(sp) # 8-byte Folded Reload - sd s7, 0(a0) + sd s11, 0(a0) sd a1, 8(a0) lui a3, 262225 slli a3, a3, 32 - mv a0, s4 - mv a1, s5 + mv a0, s6 + mv a1, s7 li a2, 0 call __netf2@plt snez a0, a0 @@ -240,10 +237,10 @@ csrr a0, vlenb slli a0, a0, 1 add a0, sp, a0 - addi a0, a0, 96 + addi a0, a0, 80 vs1r.v v8, (a0) # Unknown-size Folded Spill vmerge.vim v8, v8, 1, v0 - addi a0, sp, 96 + addi a0, sp, 80 vs1r.v v8, (a0) # Unknown-size Folded Spill lui a0, 128 addi a3, a0, 145 @@ -261,11 +258,11 @@ vmv.v.i v9, 0 csrr a0, vlenb add a0, sp, a0 - addi a0, a0, 96 + addi a0, a0, 80 vs1r.v v9, (a0) # Unknown-size Folded Spill vmerge.vim v8, v9, 1, v0 vsetivli zero, 2, e8, mf2, tu, ma - addi a0, sp, 96 + addi a0, sp, 80 vl1r.v v10, (a0) # Unknown-size Folded Reload vslideup.vi v8, v10, 1 vsetivli zero, 8, e8, mf2, ta, ma @@ -275,7 +272,7 @@ lui a3, 262221 slli a3, a3, 32 ld a0, 24(sp) # 8-byte Folded Reload - ld a1, 48(sp) # 8-byte Folded Reload + ld a1, 32(sp) # 8-byte Folded Reload li a2, 0 call __netf2@plt snez a0, a0 @@ -286,27 +283,27 @@ csrr a0, vlenb slli a0, a0, 1 add a0, sp, a0 - addi a0, a0, 96 + addi a0, a0, 80 vl1r.v v8, (a0) # Unknown-size Folded Reload vmerge.vim v8, v8, 1, v0 vsetivli zero, 3, e8, mf2, tu, ma - addi a0, sp, 96 + addi a0, sp, 80 vl1r.v v9, (a0) # Unknown-size Folded Reload vslideup.vi v9, v8, 2 vsetivli zero, 8, e8, mf2, ta, ma vmsne.vi v0, v9, 0 csrr a0, vlenb add a0, sp, a0 - addi a0, a0, 96 + addi a0, a0, 80 vl1r.v v8, (a0) # Unknown-size Folded Reload vmerge.vim v8, v8, 1, v0 - addi a0, sp, 96 + addi a0, sp, 80 vs1r.v v8, (a0) # Unknown-size Folded Spill lui a0, 1024 addi a3, a0, 1653 slli a3, a3, 40 - mv a0, s7 - mv a1, s6 + mv a0, s11 + mv a1, s10 li a2, 0 call __netf2@plt snez a0, a0 @@ -317,21 +314,21 @@ csrr a0, vlenb slli a0, a0, 1 add a0, sp, a0 - addi a0, a0, 96 + addi a0, a0, 80 vl1r.v v8, (a0) # Unknown-size Folded Reload vmerge.vim v8, v8, 1, v0 vsetivli zero, 4, e8, mf2, tu, ma - addi a0, sp, 96 + addi a0, sp, 80 vl1r.v v9, (a0) # Unknown-size Folded Reload vslideup.vi v9, v8, 3 vsetivli zero, 8, e8, mf2, ta, ma vmsne.vi v0, v9, 0 csrr a0, vlenb add a0, sp, a0 - addi a0, a0, 96 + addi a0, a0, 80 vl1r.v v8, (a0) # Unknown-size Folded Reload vmerge.vim v8, v8, 1, v0 - addi a0, sp, 96 + addi a0, sp, 80 vs1r.v v8, (a0) # Unknown-size Folded Spill lui a0, 512 addi a3, a0, 833 @@ -348,27 +345,27 @@ csrr a0, vlenb slli a0, a0, 1 add a0, sp, a0 - addi a0, a0, 96 + addi a0, a0, 80 vl1r.v v8, (a0) # Unknown-size Folded Reload vmerge.vim v8, v8, 1, v0 vsetivli zero, 5, e8, mf2, tu, ma - addi a0, sp, 96 + addi a0, sp, 80 vl1r.v v9, (a0) # Unknown-size Folded Reload vslideup.vi v9, v8, 4 vsetivli zero, 8, e8, mf2, ta, ma vmsne.vi v0, v9, 0 csrr a0, vlenb add a0, sp, a0 - addi a0, a0, 96 + addi a0, a0, 80 vl1r.v v8, (a0) # Unknown-size Folded Reload vmerge.vim v8, v8, 1, v0 - addi a0, sp, 96 + addi a0, sp, 80 vs1r.v v8, (a0) # Unknown-size Folded Spill lui s0, 256 addi a3, s0, 333 slli a3, a3, 42 - ld a0, 32(sp) # 8-byte Folded Reload - ld a1, 40(sp) # 8-byte Folded Reload + mv a0, s4 + mv a1, s5 li a2, 0 call __netf2@plt snez a0, a0 @@ -379,26 +376,26 @@ csrr a0, vlenb slli a0, a0, 1 add a0, sp, a0 - addi a0, a0, 96 + addi a0, a0, 80 vl1r.v v8, (a0) # Unknown-size Folded Reload vmerge.vim v8, v8, 1, v0 vsetivli zero, 6, e8, mf2, tu, ma - addi a0, sp, 96 + addi a0, sp, 80 vl1r.v v9, (a0) # Unknown-size Folded Reload vslideup.vi v9, v8, 5 vsetivli zero, 8, e8, mf2, ta, ma vmsne.vi v0, v9, 0 csrr a0, vlenb add a0, sp, a0 - addi a0, a0, 96 + addi a0, a0, 80 vl1r.v v8, (a0) # Unknown-size Folded Reload vmerge.vim v8, v8, 1, v0 - addi a0, sp, 96 + addi a0, sp, 80 vs1r.v v8, (a0) # Unknown-size Folded Spill addi a3, s0, 321 slli a3, a3, 42 - ld a0, 56(sp) # 8-byte Folded Reload - ld a1, 64(sp) # 8-byte Folded Reload + ld a0, 40(sp) # 8-byte Folded Reload + ld a1, 48(sp) # 8-byte Folded Reload li a2, 0 call __netf2@plt snez a0, a0 @@ -409,28 +406,28 @@ csrr a0, vlenb slli a0, a0, 1 add a0, sp, a0 - addi a0, a0, 96 + addi a0, a0, 80 vl1r.v v8, (a0) # Unknown-size Folded Reload vmerge.vim v8, v8, 1, v0 vsetivli zero, 7, e8, mf2, tu, ma - addi a0, sp, 96 + addi a0, sp, 80 vl1r.v v9, (a0) # Unknown-size Folded Reload vslideup.vi v9, v8, 6 vsetivli zero, 8, e8, mf2, ta, ma vmsne.vi v0, v9, 0 csrr a0, vlenb add a0, sp, a0 - addi a0, a0, 96 + addi a0, a0, 80 vl1r.v v8, (a0) # Unknown-size Folded Reload vmerge.vim v8, v8, 1, v0 csrr a0, vlenb add a0, sp, a0 - addi a0, a0, 96 + addi a0, a0, 80 vs1r.v v8, (a0) # Unknown-size Folded Spill lui a3, 131091 slli a3, a3, 33 mv a0, s1 - mv a1, s10 + ld a1, 64(sp) # 8-byte Folded Reload li a2, 0 call __netf2@plt snez a0, a0 @@ -441,13 +438,13 @@ csrr a0, vlenb slli a0, a0, 1 add a0, sp, a0 - addi a0, a0, 96 + addi a0, a0, 80 vl1r.v v8, (a0) # Unknown-size Folded Reload vmerge.vim v8, v8, 1, v0 vsetivli zero, 8, e8, mf2, ta, ma csrr a0, vlenb add a0, sp, a0 - addi a0, a0, 96 + addi a0, a0, 80 vl1r.v v9, (a0) # Unknown-size Folded Reload vslideup.vi v9, v8, 7 vmsne.vi v8, v9, 0 --- build.head//SingleSource/Benchmarks/Polybench/linear-algebra/kernels/doitgen/CMakeFiles/doitgen.dir/doitgen.s 2023-11-13 08:03:22.891543255 +0000 +++ build//SingleSource/Benchmarks/Polybench/linear-algebra/kernels/doitgen/CMakeFiles/doitgen.dir/doitgen.s 2023-11-13 08:03:17.959685816 +0000 @@ -1110,9 +1110,9 @@ mv a0, s4 call fputs@plt li ra, 16 + li a2, 128 addi a0, s1, 224 vl2r.v v16, (a0) # Unknown-size Folded Reload - li a2, 128 ld a1, 48(s1) # 8-byte Folded Reload addi a1, a1, 1 lui a0, 32 --- build.head//SingleSource/Benchmarks/Polybench/linear-algebra/solvers/lu/CMakeFiles/lu.dir/lu.s 2023-11-13 08:03:22.891543255 +0000 +++ build//SingleSource/Benchmarks/Polybench/linear-algebra/solvers/lu/CMakeFiles/lu.dir/lu.s 2023-11-13 08:03:17.959685816 +0000 @@ -740,10 +740,10 @@ mv a2, s5 addi a3, s1, 224 vl2r.v v8, (a3) # Unknown-size Folded Reload - li s8, 13 - li s5, 14 li s11, 12 - li s2, 11 + li s2, 14 + li a3, 15 + li s8, 13 .LBB6_61: # %vector.body177 # Parent Loop BB6_58 Depth=1 # => This Inner Loop Header: Depth=2 @@ -810,9 +810,10 @@ vnsrl.wi v14, v14, 0 vand.vi v14, v14, 15 vor.vx v14, v14, s9 - li a3, 10 - vsoxei64.v v14, (a3), v12 - vsoxei64.v v14, (s2), v12 + li s5, 10 + vsoxei64.v v14, (s5), v12 + li s5, 11 + vsoxei64.v v14, (s5), v12 vsetvli zero, zero, e32, m1, ta, ma vnsrl.wx v14, v10, s9 vsetvli zero, zero, e16, mf2, ta, ma @@ -824,16 +825,15 @@ vsoxei64.v v14, (s11), v12 vsoxei64.v v14, (s8), v12 vsetvli zero, zero, e32, m1, ta, ma - li a3, 56 - vnsrl.wx v14, v10, a3 + li s5, 56 + vnsrl.wx v14, v10, s5 vsetvli zero, zero, e16, mf2, ta, ma vnsrl.wi v10, v14, 0 vsetvli zero, zero, e8, mf4, ta, ma vnsrl.wi v10, v10, 0 vand.vi v10, v10, 15 vor.vx v10, v10, s9 - vsoxei64.v v10, (s5), v12 - li a3, 15 + vsoxei64.v v10, (s2), v12 vsoxei64.v v10, (a3), v12 vsetvli zero, zero, e64, m2, ta, ma vadd.vx v8, v8, s10