[AggressiveInstCombine] Miscompilation at O3 #169921
Description
Reproducer: https://alive2.llvm.org/ce/z/msNmWC
; bin/opt -passes=aggressive-instcombine test.ll -S
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@g_374 = global ptr @g_375
@g_375 = global { i32, i8, [3 x i8] } { i32 8, i8 -9, [3 x i8] zeroinitializer }
define i32 @main() {
entry:
%0 = load ptr, ptr @g_374, align 8
%l_1162.sroa.3.8.copyload.i.i = load i32, ptr %0, align 4
%l_1162.sroa.6.8..sroa_idx.i.i = getelementptr i8, ptr %0, i64 4
%l_1162.sroa.8.8..sroa_idx.i.i = getelementptr i8, ptr %0, i64 5
store i8 0, ptr getelementptr inbounds nuw (i8, ptr @g_375, i64 4), align 4
%l_1162.sroa.6.8.copyload.i.i = load i8, ptr %l_1162.sroa.6.8..sroa_idx.i.i, align 4
%l_1162.sroa.8.8.copyload.i.i = load i24, ptr %l_1162.sroa.8.8..sroa_idx.i.i, align 1
%1 = zext i24 %l_1162.sroa.8.8.copyload.i.i to i64
%2 = shl i64 %1, 40
%3 = zext i8 %l_1162.sroa.6.8.copyload.i.i to i64
%4 = shl i64 %3, 32
%5 = or i64 %2, %4
%6 = zext i32 %l_1162.sroa.3.8.copyload.i.i to i64
%7 = or i64 %5, %6
store i64 %7, ptr %0, align 4
%8 = load i32, ptr getelementptr inbounds nuw (i8, ptr @g_375, i64 4), align 4
ret i32 %8
}
; ModuleID = 'reduced.ll'
source_filename = "reduced.ll"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@g_374 = global ptr @g_375
@g_375 = global { i32, i8, [3 x i8] } { i32 8, i8 -9, [3 x i8] zeroinitializer }
define i32 @main() {
entry:
%0 = load ptr, ptr @g_374, align 8
%l_1162.sroa.3.8.copyload.i.i = load i64, ptr %0, align 4
store i8 0, ptr getelementptr inbounds nuw (i8, ptr @g_375, i64 4), align 4
store i64 %l_1162.sroa.3.8.copyload.i.i, ptr %0, align 4
%1 = load i32, ptr getelementptr inbounds nuw (i8, ptr @g_375, i64 4), align 4
ret i32 %1
}
llubi output:
src:
Entering function main
%0 = load ptr, ptr @g_374, align 8 -> Ptr 2056[@g_375] captures(address, provenance) RW
%l_1162.sroa.3.8.copyload.i.i = load i32, ptr %0, align 4 -> i32 8
%l_1162.sroa.6.8..sroa_idx.i.i = getelementptr i8, ptr %0, i64 4 -> Ptr 2060[@g_375 + 4] captures(address, provenance) RW
%l_1162.sroa.8.8..sroa_idx.i.i = getelementptr i8, ptr %0, i64 5 -> Ptr 2061[@g_375 + 5] captures(address, provenance) RW
%1 = getelementptr inbounds nuw i8, ptr @g_375, i64 4 -> Ptr 2060[@g_375 + 4] captures(address, provenance) RW
store i8 0, ptr %1, align 4
%l_1162.sroa.6.8.copyload.i.i = load i8, ptr %l_1162.sroa.6.8..sroa_idx.i.i, align 4 -> i8 0
%l_1162.sroa.8.8.copyload.i.i = load i24, ptr %l_1162.sroa.8.8..sroa_idx.i.i, align 1 -> i24 0
%2 = zext i24 %l_1162.sroa.8.8.copyload.i.i to i64 -> i64 0
%3 = shl i64 %2, 40 -> i64 0
%4 = zext i8 %l_1162.sroa.6.8.copyload.i.i to i64 -> i64 0
%5 = shl i64 %4, 32 -> i64 0
%6 = or i64 %3, %5 -> i64 0
%7 = zext i32 %l_1162.sroa.3.8.copyload.i.i to i64 -> i64 8
%8 = or i64 %6, %7 -> i64 8
store i64 %8, ptr %0, align 4
%9 = getelementptr inbounds nuw i8, ptr @g_375, i64 4 -> Ptr 2060[@g_375 + 4] captures(address, provenance) RW
%10 = load i32, ptr %9, align 4 -> i32 0
ret i32 %10
Exiting function main
tgt:
Entering function main
%0 = load ptr, ptr @g_374, align 8 -> Ptr 2056[@g_375] captures(address, provenance) RW
%l_1162.sroa.3.8.copyload.i.i = load i64, ptr %0, align 4 -> i64 1060856922120
%1 = getelementptr inbounds nuw i8, ptr @g_375, i64 4 -> Ptr 2060[@g_375 + 4] captures(address, provenance) RW
store i8 0, ptr %1, align 4
store i64 %l_1162.sroa.3.8.copyload.i.i, ptr %0, align 4
%2 = getelementptr inbounds nuw i8, ptr @g_375, i64 4 -> Ptr 2060[@g_375 + 4] captures(address, provenance) RW
%3 = load i32, ptr %2, align 4 -> i32 247
ret i32 %3
Exiting function main