miscompile from arm64 backend

[regehr]

this function (a simple variant of an InstCombine test case) is getting miscompiled by top of tree:

define i1 @test14(i8 %X) {
  %1 = shl i8 -113, %X
  %cmp = icmp slt i8 undef, %1
  ret i1 %cmp
}

When %X==7, the IR clearly returns false, since %1 == -128 and it's not possible for an undef to be smaller than that.

However, the arm64 backend gives this:

Johns-MacBook-Pro:~ regehr$ llc foo.ll -o -
	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 12, 0
	.globl	_test14                         ; -- Begin function test14
	.p2align	2
_test14:                                ; @test14
	.cfi_startproc
; %bb.0:
	mov	w8, #-113
                                        ; kill: def $w0 killed $w0 def $x0
	lsl	w8, w8, w0
	cmp	w8, w8, sxtb
	cset	w0, lt
	ret
	.cfi_endproc
                                        ; -- End function
.subsections_via_symbols
Johns-MacBook-Pro:~ regehr$ 

together with a little driver, we can see that it returns 1 for that same input:

Johns-MacBook-Pro:~ regehr$ llc foo.ll && clang foo.c foo.s && ./a.out 
1
Johns-MacBook-Pro:~ regehr$ cat foo.c
#include <stdio.h>

unsigned test14(unsigned char);

int main(void) {
  printf("%u\n", test14(7));
  return 0;
}

Johns-MacBook-Pro:~ regehr$ 

cc @ornata @nunoplopes @ryan-berger @nbushehri @zhengyang92 @aqjune

[llvmbot]

@llvm/issue-subscribers-backend-aarch64

[efriedma-quic]

llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Line 6200 in 4a31af8

case ISD::SIGN_EXTEND_INREG:

[topperc]

I'll take this unless @efriedma-quic has already done something.

[topperc]

Candidate patch https://reviews.llvm.org/D124696