miscompilation of smul.with.overflow.i2 by arm64 backend

[regehr]

here's a function:

define i1 @f(i2 %0) {
  %2 = call { i2, i1 } @llvm.smul.with.overflow.i2(i2 %0, i2 -2)
  %3 = extractvalue { i2, i1 } %2, 1
  ret i1 %3
}

declare { i2, i1 } @llvm.smul.with.overflow.i2(i2, i2)

clearly f(1) -> 0 because you can't get an overflow when multiplying by 1 but using this driver:

#include <stdio.h>

unsigned f(unsigned);

int main(void) {
  printf("%u\n", f(1));
}

we get:

Johns-MacBook-Pro:~ regehr$ llc foo.ll
Johns-MacBook-Pro:~ regehr$ clang foo.c foo.s && ./a.out
1
Johns-MacBook-Pro:~ regehr$ 

cc @ornata @nunoplopes @ryan-berger @nbushehri @zhengyang92 @aqjune

[llvmbot]

@llvm/issue-subscribers-backend-aarch64

[topperc]

Probably this in visitMULO

  // (mulo x, 2) -> (addo x, x)
  if (N1C && N1C->getAPIntValue() == 2)
    return DAG.getNode(IsSigned ? ISD::SADDO : ISD::UADDO, DL,
                       N->getVTList(), N0, N0);

We need to check the bitwidth is more than 2.

And we also need a freeze, but that's not the bug here.

[topperc]

Will submit patch to phabricator when the ssl certificate is fixed.

[topperc]

Fixed by 569d894