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[mlir] add option to print SSA IDs using NameLocs as prefixes #119996

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Dec 17, 2024
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[mlir] add option to print SSA IDs using NameLocs as prefixes #119996

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447bce7
[mlir] retain identifier names
makslevental Dec 14, 2024
bbca902
add mlir-use-nameloc-as-prefix and set to true and "fix" tests that b…
makslevental Dec 15, 2024
ca084f9
fix result groups
makslevental Dec 15, 2024
26c0de4
turn off by default
makslevental Dec 15, 2024
93be82c
add test
makslevental Dec 15, 2024
8a59bed
factor out maybeGetValueNameFromLoc
makslevental Dec 16, 2024
892f813
add doc
makslevental Dec 16, 2024
4168f8e
comments
makslevental Dec 17, 2024
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add mlir-use-nameloc-as-prefix and set to true and "fix" tests that b… 
…reak
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@makslevental
makslevental committed Dec 15, 2024
commit bbca902568bfb047ef67a96dad631314669fd6f9
41 changes: 27 additions & 14 deletions flang/test/Lower/OpenMP/map-component-ref.f90
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@@ -1,19 +1,32 @@
! RUN: %flang_fc1 -emit-hlfir -fopenmp %s -o - | FileCheck %s
! RUN: bbc -fopenmp -emit-hlfir %s -o - | FileCheck %s
! RUN: %flang_fc1 -emit-hlfir -fopenmp %s -o - | FileCheck %s --check-prefix=CHECK-FLANG
! RUN: bbc -fopenmp -emit-hlfir %s -o - | FileCheck %s --check-prefix=CHECK-BBC

! CHECK-LABEL: func.func @_QPfoo1
! CHECK: %[[V0:[0-9]+]] = fir.alloca !fir.type<_QFfoo1Tt0{a0:i32,a1:i32}> {bindc_name = "a", uniq_name = "_QFfoo1Ea"}
! CHECK: %[[V1:[0-9]+]]:2 = hlfir.declare %[[V0]] {uniq_name = "_QFfoo1Ea"} : (!fir.ref<!fir.type<_QFfoo1Tt0{a0:i32,a1:i32}>>) -> (!fir.ref<!fir.type<_QFfoo1Tt0{a0:i32,a1:i32}>>, !fir.ref<!fir.type<_QFfoo1Tt0{a0:i32,a1:i32}>>)
! CHECK: %[[V2:[0-9]+]] = hlfir.designate %[[V1]]#0{"a1"} : (!fir.ref<!fir.type<_QFfoo1Tt0{a0:i32,a1:i32}>>) -> !fir.ref<i32>
! CHECK: %[[V3:[0-9]+]] = omp.map.info var_ptr(%[[V2]] : !fir.ref<i32>, i32) map_clauses(tofrom) capture(ByRef) -> !fir.ref<i32> {name = "a%a1"}
! CHECK: %[[V4:[0-9]+]] = omp.map.info var_ptr(%[[V1]]#1 : !fir.ref<!fir.type<_QFfoo1Tt0{a0:i32,a1:i32}>>, !fir.type<_QFfoo1Tt0{a0:i32,a1:i32}>) map_clauses(tofrom) capture(ByRef) members(%[[V3]] : [1] : !fir.ref<i32>) -> !fir.ref<!fir.type<_QFfoo1Tt0{a0:i32,a1:i32}>> {name = "a", partial_map = true}
! CHECK: omp.target map_entries(%[[V4]] -> %arg0, %[[V3]] -> %arg1 : !fir.ref<!fir.type<_QFfoo1Tt0{a0:i32,a1:i32}>>, !fir.ref<i32>) {
! CHECK: %[[V5:[0-9]+]]:2 = hlfir.declare %arg0 {uniq_name = "_QFfoo1Ea"} : (!fir.ref<!fir.type<_QFfoo1Tt0{a0:i32,a1:i32}>>) -> (!fir.ref<!fir.type<_QFfoo1Tt0{a0:i32,a1:i32}>>, !fir.ref<!fir.type<_QFfoo1Tt0{a0:i32,a1:i32}>>)
! CHECK: %c0_i32 = arith.constant 0 : i32
! CHECK: %[[V6:[0-9]+]] = hlfir.designate %[[V5]]#0{"a1"} : (!fir.ref<!fir.type<_QFfoo1Tt0{a0:i32,a1:i32}>>) -> !fir.ref<i32>
! CHECK: hlfir.assign %c0_i32 to %[[V6]] : i32, !fir.ref<i32>
! CHECK: omp.terminator
! CHECK: }
! CHECK-FLANG: %[[V0:[0-9]+]] = fir.alloca !fir.type<_QFfoo1Tt0{a0:i32,a1:i32}> {bindc_name = "a", uniq_name = "_QFfoo1Ea"}
! CHECK-FLANG: %[[V1:[0-9]+]]:2 = hlfir.declare %[[V0]] {uniq_name = "_QFfoo1Ea"} : (!fir.ref<!fir.type<_QFfoo1Tt0{a0:i32,a1:i32}>>) -> (!fir.ref<!fir.type<_QFfoo1Tt0{a0:i32,a1:i32}>>, !fir.ref<!fir.type<_QFfoo1Tt0{a0:i32,a1:i32}>>)
! CHECK-FLANG: %[[V2:[0-9]+]] = hlfir.designate %[[V1]]#0{"a1"} : (!fir.ref<!fir.type<_QFfoo1Tt0{a0:i32,a1:i32}>>) -> !fir.ref<i32>
! CHECK-FLANG: %[[V3:[0-9]+]] = omp.map.info var_ptr(%[[V2]] : !fir.ref<i32>, i32) map_clauses(tofrom) capture(ByRef) -> !fir.ref<i32> {name = "a%a1"}
! CHECK-FLANG: %[[V4:[0-9]+]] = omp.map.info var_ptr(%[[V1]]#1 : !fir.ref<!fir.type<_QFfoo1Tt0{a0:i32,a1:i32}>>, !fir.type<_QFfoo1Tt0{a0:i32,a1:i32}>) map_clauses(tofrom) capture(ByRef) members(%[[V3]] : [1] : !fir.ref<i32>) -> !fir.ref<!fir.type<_QFfoo1Tt0{a0:i32,a1:i32}>> {name = "a", partial_map = true}
! CHECK-FLANG: omp.target map_entries(%[[V4]] -> %arg0, %[[V3]] -> %arg1 : !fir.ref<!fir.type<_QFfoo1Tt0{a0:i32,a1:i32}>>, !fir.ref<i32>) {
! CHECK-FLANG: %[[V5:[0-9]+]]:2 = hlfir.declare %arg0 {uniq_name = "_QFfoo1Ea"} : (!fir.ref<!fir.type<_QFfoo1Tt0{a0:i32,a1:i32}>>) -> (!fir.ref<!fir.type<_QFfoo1Tt0{a0:i32,a1:i32}>>, !fir.ref<!fir.type<_QFfoo1Tt0{a0:i32,a1:i32}>>)
! CHECK-FLANG: %c0_i32 = arith.constant 0 : i32
! CHECK-FLANG: %[[V6:[0-9]+]] = hlfir.designate %[[V5]]#0{"a1"} : (!fir.ref<!fir.type<_QFfoo1Tt0{a0:i32,a1:i32}>>) -> !fir.ref<i32>
! CHECK-FLANG: hlfir.assign %c0_i32 to %[[V6]] : i32, !fir.ref<i32>
! CHECK-FLANG: omp.terminator
! CHECK-FLANG: }

! CHECK-BBC: %[[V0:[0-9]+]] = fir.alloca !fir.type<_QFfoo1Tt0{a0:i32,a1:i32}> {bindc_name = "a", uniq_name = "_QFfoo1Ea"}
! CHECK-BBC: %[[V1:[0-9]+]]:2 = hlfir.declare %[[V0]] {uniq_name = "_QFfoo1Ea"} : (!fir.ref<!fir.type<_QFfoo1Tt0{a0:i32,a1:i32}>>) -> (!fir.ref<!fir.type<_QFfoo1Tt0{a0:i32,a1:i32}>>, !fir.ref<!fir.type<_QFfoo1Tt0{a0:i32,a1:i32}>>)
! CHECK-BBC: %[[V2:[0-9]+]] = hlfir.designate %[[V1]]#0{"a1"} : (!fir.ref<!fir.type<_QFfoo1Tt0{a0:i32,a1:i32}>>) -> !fir.ref<i32>
! CHECK-BBC: %a25a1 = omp.map.info var_ptr(%[[V2]] : !fir.ref<i32>, i32) map_clauses(tofrom) capture(ByRef) -> !fir.ref<i32> {name = "a%a1"}
! CHECK-BBC: %[[V4:[0-9]+]] = omp.map.info var_ptr(%[[V1]]#1 : !fir.ref<!fir.type<_QFfoo1Tt0{a0:i32,a1:i32}>>, !fir.type<_QFfoo1Tt0{a0:i32,a1:i32}>) map_clauses(tofrom) capture(ByRef) members(%a25a1 : [1] : !fir.ref<i32>) -> !fir.ref<!fir.type<_QFfoo1Tt0{a0:i32,a1:i32}>> {name = "a", partial_map = true}
! CHECK-BBC: omp.target map_entries(%[[V4]] -> %arg0, %a25a1 -> %a25a1_3 : !fir.ref<!fir.type<_QFfoo1Tt0{a0:i32,a1:i32}>>, !fir.ref<i32>) {
! CHECK-BBC: %[[V5:[0-9]+]]:2 = hlfir.declare %arg0 {uniq_name = "_QFfoo1Ea"} : (!fir.ref<!fir.type<_QFfoo1Tt0{a0:i32,a1:i32}>>) -> (!fir.ref<!fir.type<_QFfoo1Tt0{a0:i32,a1:i32}>>, !fir.ref<!fir.type<_QFfoo1Tt0{a0:i32,a1:i32}>>)
! CHECK-BBC: %c0_i32 = arith.constant 0 : i32
! CHECK-BBC: %[[V6:[0-9]+]] = hlfir.designate %[[V5]]#0{"a1"} : (!fir.ref<!fir.type<_QFfoo1Tt0{a0:i32,a1:i32}>>) -> !fir.ref<i32>
! CHECK-BBC: hlfir.assign %c0_i32 to %[[V6]] : i32, !fir.ref<i32>
! CHECK-BBC: omp.terminator
! CHECK-BBC: }

subroutine foo1()
implicit none
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6 changes: 3 additions & 3 deletions mlir/lib/IR/AsmPrinter.cpp
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Expand Up @@ -196,9 +196,9 @@ struct AsmPrinterOptions {
llvm::cl::desc("Print unique SSA ID numbers for values, block arguments "
"and naming conflicts across all regions")};

llvm::cl::opt<bool> useNameLocAsPrefix{
"mlir-use-nameloc-as-prefix", llvm::cl::init(false),
llvm::cl::desc("TODO")};
llvm::cl::opt<bool> useNameLocAsPrefix{"mlir-use-nameloc-as-prefix",
llvm::cl::init(true),
llvm::cl::desc("TODO")};
};
} // namespace

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14 changes: 7 additions & 7 deletions mlir/test/IR/locations.mlir
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Expand Up @@ -13,7 +13,7 @@ func.func @inline_notation() -> i32 {
// CHECK: arith.constant 4 : index loc(callsite("foo" at "mysource.cc":10:8))
%2 = arith.constant 4 : index loc(callsite("foo" at "mysource.cc":10:8))

// CHECK: affine.for %arg0 loc("IVlocation") = 0 to 8 {
// CHECK: affine.for %IVlocation loc("IVlocation") = 0 to 8 {
// CHECK: } loc(fused["foo", "mysource.cc":10:8])
affine.for %i0 loc("IVlocation") = 0 to 8 {
} loc(fused["foo", "mysource.cc":10:8])
Expand All @@ -26,7 +26,7 @@ func.func @inline_notation() -> i32 {
affine.if #set0(%2) {
} loc(fused<"myPass">["foo"])

// CHECK: return %0 : i32 loc(unknown)
// CHECK: return %foo : i32 loc(unknown)
return %1 : i32 loc(unknown)
}

Expand Down Expand Up @@ -62,7 +62,7 @@ func.func @escape_strings() {
// CHECK-LABEL: func @argLocs(
// CHECK-SAME: %arg0: i32 loc({{.*}}locations.mlir":[[# @LINE+1]]:20),
func.func @argLocs(%x: i32,
// CHECK-SAME: %arg1: i64 loc("hotdog")
// CHECK-SAME: %hotdog: i64 loc("hotdog")
%y: i64 loc("hotdog")) {
return
}
Expand All @@ -73,11 +73,11 @@ func.func @argLocs(%x: i32,
// CHECK-NEXT: ^bb0(%arg0: i32 loc({{.*}}locations.mlir":[[# @LINE+2]]:7),
// CHECK-ALIAS-NEXT: ^bb0(%arg0: i32 loc({{.*}}locations.mlir":[[# @LINE+1]]:7),
^bb0(%x: i32,
// CHECK-SAME: %arg1: i32 loc("cheetos"),
// CHECK-ALIAS-SAME: %arg1: i32 loc("cheetos"),
// CHECK-SAME: %cheetos: i32 loc("cheetos"),
// CHECK-ALIAS-SAME: %cheetos: i32 loc("cheetos"),
%y: i32 loc("cheetos"),
// CHECK-SAME: %arg2: i32 loc("out_of_line_location2")):
// CHECK-ALIAS-SAME: %arg2: i32 loc("out_of_line_location2")):
// CHECK-SAME: %out_of_line_location2: i32 loc("out_of_line_location2")):
// CHECK-ALIAS-SAME: %out_of_line_location2: i32 loc("out_of_line_location2")):
%z: i32 loc("out_of_line_location2")):
%1 = arith.addi %x, %y : i32
"foo.yield"(%1) : (i32) -> ()
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2 changes: 1 addition & 1 deletion mlir/test/IR/pretty-locations.mlir
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Expand Up @@ -27,6 +27,6 @@ func.func @inline_notation() -> i32 {
// CHECK: "foo.op"() : () -> () #test.custom_location<"foo.mlir" * 1234>
"foo.op"() : () -> () loc(#test.custom_location<"foo.mlir" * 1234>)

// CHECK: return %0 : i32 [unknown]
// CHECK: return %foo : i32 [unknown]
return %1 : i32 loc(unknown)
}
12 changes: 6 additions & 6 deletions mlir/test/IR/pretty_printed_region_op.mlir
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Expand Up @@ -6,9 +6,9 @@

func.func @pretty_printed_region_op(%arg0 : f32, %arg1 : f32) -> (f32) {
// CHECK-CUSTOM: test.pretty_printed_region %arg1, %arg0 start test.special.op end : (f32, f32) -> f32
// CHECK-GENERIC: "test.pretty_printed_region"(%arg1, %arg0)
// CHECK-GENERIC: ^bb0(%arg[[x:[0-9]+]]: f32, %arg[[y:[0-9]+]]: f32
// CHECK-GENERIC: %[[RES:.*]] = "test.special.op"(%arg[[x]], %arg[[y]]) : (f32, f32) -> f32
// CHECK-GENERIC: %some_NameLoc = "test.pretty_printed_region"(%arg1, %arg0)
// CHECK-GENERIC: ^bb0(%some_NameLoc_[[x:[0-9]+]]: f32, %some_NameLoc_[[y:[0-9]+]]: f32
// CHECK-GENERIC: %[[RES:.*]] = "test.special.op"(%some_NameLoc_[[x]], %some_NameLoc_[[y]]) : (f32, f32) -> f32
// CHECK-GENERIC: "test.return"(%[[RES]]) : (f32) -> ()
// CHECK-GENERIC: : (f32, f32) -> f32

Expand Down Expand Up @@ -37,9 +37,9 @@ func.func @pretty_printed_region_op(%arg0 : f32, %arg1 : f32) -> (f32) {
// -----

func.func @pretty_printed_region_op_deferred_loc(%arg0 : f32, %arg1 : f32) -> (f32) {
// CHECK-LOCATION: "test.pretty_printed_region"(%arg1, %arg0)
// CHECK-LOCATION: ^bb0(%arg[[x:[0-9]+]]: f32 loc("foo"), %arg[[y:[0-9]+]]: f32 loc("foo")
// CHECK-LOCATION: %[[RES:.*]] = "test.special.op"(%arg[[x]], %arg[[y]]) : (f32, f32) -> f32
// CHECK-LOCATION: %foo = "test.pretty_printed_region"(%arg1, %arg0)
// CHECK-LOCATION: ^bb0(%foo_[[x:[0-9]+]]: f32 loc("foo"), %foo_[[y:[0-9]+]]: f32 loc("foo")
// CHECK-LOCATION: %[[RES:.*]] = "test.special.op"(%foo_[[x]], %foo_[[y]]) : (f32, f32) -> f32
// CHECK-LOCATION: "test.return"(%[[RES]]) : (f32) -> ()
// CHECK-LOCATION: : (f32, f32) -> f32

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6 changes: 3 additions & 3 deletions mlir/test/IR/wrapping_op.mlir
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Expand Up @@ -5,10 +5,10 @@
// CHECK-GENERIC: "func.func"
// CHECK-GENERIC-SAME: sym_name = "wrapping_op"
func.func @wrapping_op(%arg0 : i32, %arg1 : f32) -> (i3, i2, i1) {
// CHECK: %0:3 = test.wrapping_region wraps "some.op"(%arg1, %arg0) {test.attr = "attr"} : (f32, i32) -> (i1, i2, i3)
// CHECK: %some_NameLoc, %some_NameLoc_0, %some_NameLoc_1 = test.wrapping_region wraps "some.op"(%arg1, %arg0) {test.attr = "attr"} : (f32, i32) -> (i1, i2, i3)
// CHECK-GENERIC: "test.wrapping_region"() ({
// CHECK-GENERIC: %[[NESTED_RES:.*]]:3 = "some.op"(%arg1, %arg0) {test.attr = "attr"} : (f32, i32) -> (i1, i2, i3) loc("some_NameLoc")
// CHECK-GENERIC: "test.return"(%[[NESTED_RES]]#0, %[[NESTED_RES]]#1, %[[NESTED_RES]]#2) : (i1, i2, i3) -> () loc("some_NameLoc")
// CHECK-GENERIC: %some_NameLoc_2, %some_NameLoc_3, %some_NameLoc_4 = "some.op"(%arg1, %arg0) {test.attr = "attr"} : (f32, i32) -> (i1, i2, i3) loc("some_NameLoc")
// CHECK-GENERIC: "test.return"(%some_NameLoc_2, %some_NameLoc_3, %some_NameLoc_4) : (i1, i2, i3) -> () loc("some_NameLoc")
// CHECK-GENERIC: }) : () -> (i1, i2, i3) loc("some_NameLoc")
%res:3 = test.wrapping_region wraps "some.op"(%arg1, %arg0) { test.attr = "attr" } : (f32, i32) -> (i1, i2, i3) loc("some_NameLoc")
return %res#2, %res#1, %res#0 : i3, i2, i1
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2 changes: 1 addition & 1 deletion mlir/test/mlir-tblgen/pattern.mlir
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Expand Up @@ -678,7 +678,7 @@ func.func @returnTypeAndLocation(%arg0 : i32) -> i1 {
%0 = "test.source_op"(%arg0) {tag = 66 : i32} : (i32) -> i1
// CHECK: "test.op_x"(%arg0) : (i32) -> i32 loc("loc1")
// CHECK: "test.op_x"(%arg0) : (i32) -> i32 loc("loc2")
// CHECK: "test.two_to_one"(%0, %1) : (i32, i32) -> i1
// CHECK: "test.two_to_one"(%loc1, %loc2) : (i32, i32) -> i1
return %0 : i1
}

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