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[mlir] add option to print SSA IDs using NameLocs as prefixes #119996

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merged 8 commits into from
Dec 17, 2024
Merged

[mlir] add option to print SSA IDs using NameLocs as prefixes #119996

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447bce7
[mlir] retain identifier names
makslevental Dec 14, 2024
bbca902
add mlir-use-nameloc-as-prefix and set to true and "fix" tests that b…
makslevental Dec 15, 2024
ca084f9
fix result groups
makslevental Dec 15, 2024
26c0de4
turn off by default
makslevental Dec 15, 2024
93be82c
add test
makslevental Dec 15, 2024
8a59bed
factor out maybeGetValueNameFromLoc
makslevental Dec 16, 2024
892f813
add doc
makslevental Dec 16, 2024
4168f8e
comments
makslevental Dec 17, 2024
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fix result groups
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@makslevental
makslevental committed Dec 15, 2024
commit ca084f95b2c1a424392049bc4a8555f4f23d83fe
14 changes: 8 additions & 6 deletions mlir/lib/IR/AsmPrinter.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -73,7 +73,8 @@ OpAsmParser::~OpAsmParser() = default;
MLIRContext *AsmParser::getContext() const { return getBuilder().getContext(); }

/// Parse a type list.
/// This is out-of-line to work-around https://github.com/llvm/llvm-project/issues/62918
/// This is out-of-line to work-around
/// https://github.com/llvm/llvm-project/issues/62918
ParseResult AsmParser::parseTypeList(SmallVectorImpl<Type> &result) {
return parseCommaSeparatedList(
[&]() { return parseType(result.emplace_back()); });
Expand Down Expand Up @@ -1626,16 +1627,17 @@ void SSANameState::numberValuesInOp(Operation &op) {
}
}

unsigned numResults = op.getNumResults();
if (printerFlags.shouldUseNameLocAsPrefix() && !alreadySetNames) {
for (Value opResult : op.getResults()) {
if (isa<NameLoc>(opResult.getLoc())) {
auto nameLoc = cast<NameLoc>(opResult.getLoc());
setResultNameFn(opResult, nameLoc.getName());
if (numResults > 0) {
Value resultBegin = op.getResult(0);
if (isa<NameLoc>(resultBegin.getLoc())) {
auto nameLoc = cast<NameLoc>(resultBegin.getLoc());
setResultNameFn(resultBegin, nameLoc.getName());
}
}
}

unsigned numResults = op.getNumResults();
if (numResults == 0) {
// If value users should be printed, operations with no result need an id.
if (printerFlags.shouldPrintValueUsers()) {
Expand Down
6 changes: 3 additions & 3 deletions mlir/test/IR/wrapping_op.mlir
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Original file line number Diff line number Diff line change
Expand Up @@ -5,10 +5,10 @@
// CHECK-GENERIC: "func.func"
// CHECK-GENERIC-SAME: sym_name = "wrapping_op"
func.func @wrapping_op(%arg0 : i32, %arg1 : f32) -> (i3, i2, i1) {
// CHECK: %some_NameLoc, %some_NameLoc_0, %some_NameLoc_1 = test.wrapping_region wraps "some.op"(%arg1, %arg0) {test.attr = "attr"} : (f32, i32) -> (i1, i2, i3)
// CHECK: %some_NameLoc:3 = test.wrapping_region wraps "some.op"(%arg1, %arg0) {test.attr = "attr"} : (f32, i32) -> (i1, i2, i3)
// CHECK-GENERIC: "test.wrapping_region"() ({
// CHECK-GENERIC: %some_NameLoc_2, %some_NameLoc_3, %some_NameLoc_4 = "some.op"(%arg1, %arg0) {test.attr = "attr"} : (f32, i32) -> (i1, i2, i3) loc("some_NameLoc")
// CHECK-GENERIC: "test.return"(%some_NameLoc_2, %some_NameLoc_3, %some_NameLoc_4) : (i1, i2, i3) -> () loc("some_NameLoc")
// CHECK-GENERIC: %[[NESTED_RES:.*]]:3 = "some.op"(%arg1, %arg0) {test.attr = "attr"} : (f32, i32) -> (i1, i2, i3) loc("some_NameLoc")
// CHECK-GENERIC: "test.return"(%[[NESTED_RES]]#0, %[[NESTED_RES]]#1, %[[NESTED_RES]]#2) : (i1, i2, i3) -> () loc("some_NameLoc")
// CHECK-GENERIC: }) : () -> (i1, i2, i3) loc("some_NameLoc")
%res:3 = test.wrapping_region wraps "some.op"(%arg1, %arg0) { test.attr = "attr" } : (f32, i32) -> (i1, i2, i3) loc("some_NameLoc")
return %res#2, %res#1, %res#0 : i3, i2, i1
Expand Down
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