diff --git a/mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp b/mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp index b11511f21d03d..dbaac030aa0a2 100644 --- a/mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp +++ b/mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp @@ -1253,8 +1253,8 @@ class GroupReducePattern : public SPIRVToLLVMConversion { Operation *symbolTable = op->template getParentWithTrait(); - LLVM::LLVMFuncOp func = lookupOrCreateSPIRVFn( - symbolTable, funcName, paramTypes, retTy, !NonUniform); + LLVM::LLVMFuncOp func = + lookupOrCreateSPIRVFn(symbolTable, funcName, paramTypes, retTy); Location loc = op.getLoc(); Value scope = rewriter.create( diff --git a/mlir/test/Conversion/SPIRVToLLVM/non-uniform-ops-to-llvm.mlir b/mlir/test/Conversion/SPIRVToLLVM/non-uniform-ops-to-llvm.mlir index e81048792c45d..ab174ba2b41e4 100644 --- a/mlir/test/Conversion/SPIRVToLLVM/non-uniform-ops-to-llvm.mlir +++ b/mlir/test/Conversion/SPIRVToLLVM/non-uniform-ops-to-llvm.mlir @@ -2,30 +2,30 @@ // NOTE: Assertions have been autogenerated by utils/generate-test-checks.py -// CHECK-LABEL: llvm.func spir_funccc @_Z33__spirv_GroupNonUniformLogicalXoriib(i32, i32, i1) -> i1 attributes {no_unwind, will_return} -// CHECK: llvm.func spir_funccc @_Z32__spirv_GroupNonUniformLogicalOriib(i32, i32, i1) -> i1 attributes {no_unwind, will_return} -// CHECK: llvm.func spir_funccc @_Z33__spirv_GroupNonUniformLogicalAndiib(i32, i32, i1) -> i1 attributes {no_unwind, will_return} -// CHECK: llvm.func spir_funccc @_Z33__spirv_GroupNonUniformBitwiseXoriij(i32, i32, i32) -> i32 attributes {no_unwind, will_return} -// CHECK: llvm.func spir_funccc @_Z32__spirv_GroupNonUniformBitwiseOriij(i32, i32, i32) -> i32 attributes {no_unwind, will_return} -// CHECK: llvm.func spir_funccc @_Z33__spirv_GroupNonUniformBitwiseAndiij(i32, i32, i32) -> i32 attributes {no_unwind, will_return} -// CHECK: llvm.func spir_funccc @_Z27__spirv_GroupNonUniformSMaxiijj(i32, i32, i32, i32) -> i32 attributes {no_unwind, will_return} -// CHECK: llvm.func spir_funccc @_Z27__spirv_GroupNonUniformFMaxiif(i32, i32, f32) -> f32 attributes {no_unwind, will_return} -// CHECK: llvm.func spir_funccc @_Z27__spirv_GroupNonUniformUMaxiij(i32, i32, i32) -> i32 attributes {no_unwind, will_return} -// CHECK: llvm.func spir_funccc @_Z27__spirv_GroupNonUniformSMaxiij(i32, i32, i32) -> i32 attributes {no_unwind, will_return} -// CHECK: llvm.func spir_funccc @_Z27__spirv_GroupNonUniformFMiniifj(i32, i32, f32, i32) -> f32 attributes {no_unwind, will_return} -// CHECK: llvm.func spir_funccc @_Z27__spirv_GroupNonUniformFMiniif(i32, i32, f32) -> f32 attributes {no_unwind, will_return} -// CHECK: llvm.func spir_funccc @_Z27__spirv_GroupNonUniformUMiniij(i32, i32, i32) -> i32 attributes {no_unwind, will_return} -// CHECK: llvm.func spir_funccc @_Z27__spirv_GroupNonUniformSMiniij(i32, i32, i32) -> i32 attributes {no_unwind, will_return} -// CHECK: llvm.func spir_funccc @_Z27__spirv_GroupNonUniformFMuliif(i32, i32, f32) -> f32 attributes {no_unwind, will_return} -// CHECK: llvm.func spir_funccc @_Z27__spirv_GroupNonUniformIMuliijj(i32, i32, i32, i32) -> i32 attributes {no_unwind, will_return} -// CHECK: llvm.func spir_funccc @_Z27__spirv_GroupNonUniformFAddiifj(i32, i32, f32, i32) -> f32 attributes {no_unwind, will_return} -// CHECK: llvm.func spir_funccc @_Z27__spirv_GroupNonUniformIAddiij(i32, i32, i32) -> i32 attributes {no_unwind, will_return} +// CHECK-LABEL: llvm.func spir_funccc @_Z33__spirv_GroupNonUniformLogicalXoriib(i32, i32, i1) -> i1 attributes {convergent, no_unwind, will_return} +// CHECK: llvm.func spir_funccc @_Z32__spirv_GroupNonUniformLogicalOriib(i32, i32, i1) -> i1 attributes {convergent, no_unwind, will_return} +// CHECK: llvm.func spir_funccc @_Z33__spirv_GroupNonUniformLogicalAndiib(i32, i32, i1) -> i1 attributes {convergent, no_unwind, will_return} +// CHECK: llvm.func spir_funccc @_Z33__spirv_GroupNonUniformBitwiseXoriij(i32, i32, i32) -> i32 attributes {convergent, no_unwind, will_return} +// CHECK: llvm.func spir_funccc @_Z32__spirv_GroupNonUniformBitwiseOriij(i32, i32, i32) -> i32 attributes {convergent, no_unwind, will_return} +// CHECK: llvm.func spir_funccc @_Z33__spirv_GroupNonUniformBitwiseAndiij(i32, i32, i32) -> i32 attributes {convergent, no_unwind, will_return} +// CHECK: llvm.func spir_funccc @_Z27__spirv_GroupNonUniformSMaxiijj(i32, i32, i32, i32) -> i32 attributes {convergent, no_unwind, will_return} +// CHECK: llvm.func spir_funccc @_Z27__spirv_GroupNonUniformFMaxiif(i32, i32, f32) -> f32 attributes {convergent, no_unwind, will_return} +// CHECK: llvm.func spir_funccc @_Z27__spirv_GroupNonUniformUMaxiij(i32, i32, i32) -> i32 attributes {convergent, no_unwind, will_return} +// CHECK: llvm.func spir_funccc @_Z27__spirv_GroupNonUniformSMaxiij(i32, i32, i32) -> i32 attributes {convergent, no_unwind, will_return} +// CHECK: llvm.func spir_funccc @_Z27__spirv_GroupNonUniformFMiniifj(i32, i32, f32, i32) -> f32 attributes {convergent, no_unwind, will_return} +// CHECK: llvm.func spir_funccc @_Z27__spirv_GroupNonUniformFMiniif(i32, i32, f32) -> f32 attributes {convergent, no_unwind, will_return} +// CHECK: llvm.func spir_funccc @_Z27__spirv_GroupNonUniformUMiniij(i32, i32, i32) -> i32 attributes {convergent, no_unwind, will_return} +// CHECK: llvm.func spir_funccc @_Z27__spirv_GroupNonUniformSMiniij(i32, i32, i32) -> i32 attributes {convergent, no_unwind, will_return} +// CHECK: llvm.func spir_funccc @_Z27__spirv_GroupNonUniformFMuliif(i32, i32, f32) -> f32 attributes {convergent, no_unwind, will_return} +// CHECK: llvm.func spir_funccc @_Z27__spirv_GroupNonUniformIMuliijj(i32, i32, i32, i32) -> i32 attributes {convergent, no_unwind, will_return} +// CHECK: llvm.func spir_funccc @_Z27__spirv_GroupNonUniformFAddiifj(i32, i32, f32, i32) -> f32 attributes {convergent, no_unwind, will_return} +// CHECK: llvm.func spir_funccc @_Z27__spirv_GroupNonUniformIAddiij(i32, i32, i32) -> i32 attributes {convergent, no_unwind, will_return} // CHECK-LABEL: llvm.func @non_uniform_iadd( // CHECK-SAME: %[[VAL_0:.*]]: i32) -> i32 { // CHECK: %[[VAL_1:.*]] = llvm.mlir.constant(3 : i32) : i32 // CHECK: %[[VAL_2:.*]] = llvm.mlir.constant(0 : i32) : i32 -// CHECK: %[[VAL_3:.*]] = llvm.call spir_funccc @_Z27__spirv_GroupNonUniformIAddiij(%[[VAL_1]], %[[VAL_2]], %[[VAL_0]]) {no_unwind, will_return} : (i32, i32, i32) -> i32 +// CHECK: %[[VAL_3:.*]] = llvm.call spir_funccc @_Z27__spirv_GroupNonUniformIAddiij(%[[VAL_1]], %[[VAL_2]], %[[VAL_0]]) {convergent, no_unwind, will_return} : (i32, i32, i32) -> i32 // CHECK: llvm.return %[[VAL_3]] : i32 // CHECK: } spirv.func @non_uniform_iadd(%arg0: i32) -> i32 "None" { @@ -38,7 +38,7 @@ spirv.func @non_uniform_iadd(%arg0: i32) -> i32 "None" { // CHECK: %[[VAL_1:.*]] = llvm.mlir.constant(16 : i32) : i32 // CHECK: %[[VAL_2:.*]] = llvm.mlir.constant(3 : i32) : i32 // CHECK: %[[VAL_3:.*]] = llvm.mlir.constant(3 : i32) : i32 -// CHECK: %[[VAL_4:.*]] = llvm.call spir_funccc @_Z27__spirv_GroupNonUniformFAddiifj(%[[VAL_2]], %[[VAL_3]], %[[VAL_0]], %[[VAL_1]]) {no_unwind, will_return} : (i32, i32, f32, i32) -> f32 +// CHECK: %[[VAL_4:.*]] = llvm.call spir_funccc @_Z27__spirv_GroupNonUniformFAddiifj(%[[VAL_2]], %[[VAL_3]], %[[VAL_0]], %[[VAL_1]]) {convergent, no_unwind, will_return} : (i32, i32, f32, i32) -> f32 // CHECK: llvm.return %[[VAL_4]] : f32 // CHECK: } spirv.func @non_uniform_fadd(%arg0: f32) -> f32 "None" { @@ -52,7 +52,7 @@ spirv.func @non_uniform_fadd(%arg0: f32) -> f32 "None" { // CHECK: %[[VAL_1:.*]] = llvm.mlir.constant(16 : i32) : i32 // CHECK: %[[VAL_2:.*]] = llvm.mlir.constant(3 : i32) : i32 // CHECK: %[[VAL_3:.*]] = llvm.mlir.constant(3 : i32) : i32 -// CHECK: %[[VAL_4:.*]] = llvm.call spir_funccc @_Z27__spirv_GroupNonUniformIMuliijj(%[[VAL_2]], %[[VAL_3]], %[[VAL_0]], %[[VAL_1]]) {no_unwind, will_return} : (i32, i32, i32, i32) -> i32 +// CHECK: %[[VAL_4:.*]] = llvm.call spir_funccc @_Z27__spirv_GroupNonUniformIMuliijj(%[[VAL_2]], %[[VAL_3]], %[[VAL_0]], %[[VAL_1]]) {convergent, no_unwind, will_return} : (i32, i32, i32, i32) -> i32 // CHECK: llvm.return %[[VAL_4]] : i32 // CHECK: } spirv.func @non_uniform_imul(%arg0: i32) -> i32 "None" { @@ -65,7 +65,7 @@ spirv.func @non_uniform_imul(%arg0: i32) -> i32 "None" { // CHECK-SAME: %[[VAL_0:.*]]: f32) -> f32 { // CHECK: %[[VAL_1:.*]] = llvm.mlir.constant(3 : i32) : i32 // CHECK: %[[VAL_2:.*]] = llvm.mlir.constant(0 : i32) : i32 -// CHECK: %[[VAL_3:.*]] = llvm.call spir_funccc @_Z27__spirv_GroupNonUniformFMuliif(%[[VAL_1]], %[[VAL_2]], %[[VAL_0]]) {no_unwind, will_return} : (i32, i32, f32) -> f32 +// CHECK: %[[VAL_3:.*]] = llvm.call spir_funccc @_Z27__spirv_GroupNonUniformFMuliif(%[[VAL_1]], %[[VAL_2]], %[[VAL_0]]) {convergent, no_unwind, will_return} : (i32, i32, f32) -> f32 // CHECK: llvm.return %[[VAL_3]] : f32 // CHECK: } spirv.func @non_uniform_fmul(%arg0: f32) -> f32 "None" { @@ -77,7 +77,7 @@ spirv.func @non_uniform_fmul(%arg0: f32) -> f32 "None" { // CHECK-SAME: %[[VAL_0:.*]]: i32) -> i32 { // CHECK: %[[VAL_1:.*]] = llvm.mlir.constant(3 : i32) : i32 // CHECK: %[[VAL_2:.*]] = llvm.mlir.constant(0 : i32) : i32 -// CHECK: %[[VAL_3:.*]] = llvm.call spir_funccc @_Z27__spirv_GroupNonUniformSMiniij(%[[VAL_1]], %[[VAL_2]], %[[VAL_0]]) {no_unwind, will_return} : (i32, i32, i32) -> i32 +// CHECK: %[[VAL_3:.*]] = llvm.call spir_funccc @_Z27__spirv_GroupNonUniformSMiniij(%[[VAL_1]], %[[VAL_2]], %[[VAL_0]]) {convergent, no_unwind, will_return} : (i32, i32, i32) -> i32 // CHECK: llvm.return %[[VAL_3]] : i32 // CHECK: } spirv.func @non_uniform_smin(%arg0: i32) -> i32 "None" { @@ -89,7 +89,7 @@ spirv.func @non_uniform_smin(%arg0: i32) -> i32 "None" { // CHECK-SAME: %[[VAL_0:.*]]: i32) -> i32 { // CHECK: %[[VAL_1:.*]] = llvm.mlir.constant(3 : i32) : i32 // CHECK: %[[VAL_2:.*]] = llvm.mlir.constant(0 : i32) : i32 -// CHECK: %[[VAL_3:.*]] = llvm.call spir_funccc @_Z27__spirv_GroupNonUniformUMiniij(%[[VAL_1]], %[[VAL_2]], %[[VAL_0]]) {no_unwind, will_return} : (i32, i32, i32) -> i32 +// CHECK: %[[VAL_3:.*]] = llvm.call spir_funccc @_Z27__spirv_GroupNonUniformUMiniij(%[[VAL_1]], %[[VAL_2]], %[[VAL_0]]) {convergent, no_unwind, will_return} : (i32, i32, i32) -> i32 // CHECK: llvm.return %[[VAL_3]] : i32 // CHECK: } spirv.func @non_uniform_umin(%arg0: i32) -> i32 "None" { @@ -101,7 +101,7 @@ spirv.func @non_uniform_umin(%arg0: i32) -> i32 "None" { // CHECK-SAME: %[[VAL_0:.*]]: f32) -> f32 { // CHECK: %[[VAL_1:.*]] = llvm.mlir.constant(3 : i32) : i32 // CHECK: %[[VAL_2:.*]] = llvm.mlir.constant(0 : i32) : i32 -// CHECK: %[[VAL_3:.*]] = llvm.call spir_funccc @_Z27__spirv_GroupNonUniformFMiniif(%[[VAL_1]], %[[VAL_2]], %[[VAL_0]]) {no_unwind, will_return} : (i32, i32, f32) -> f32 +// CHECK: %[[VAL_3:.*]] = llvm.call spir_funccc @_Z27__spirv_GroupNonUniformFMiniif(%[[VAL_1]], %[[VAL_2]], %[[VAL_0]]) {convergent, no_unwind, will_return} : (i32, i32, f32) -> f32 // CHECK: llvm.return %[[VAL_3]] : f32 // CHECK: } spirv.func @non_uniform_fmin(%arg0: f32) -> f32 "None" { @@ -114,7 +114,7 @@ spirv.func @non_uniform_fmin(%arg0: f32) -> f32 "None" { // CHECK: %[[VAL_1:.*]] = llvm.mlir.constant(16 : i32) : i32 // CHECK: %[[VAL_2:.*]] = llvm.mlir.constant(3 : i32) : i32 // CHECK: %[[VAL_3:.*]] = llvm.mlir.constant(3 : i32) : i32 -// CHECK: %[[VAL_4:.*]] = llvm.call spir_funccc @_Z27__spirv_GroupNonUniformFMiniifj(%[[VAL_2]], %[[VAL_3]], %[[VAL_0]], %[[VAL_1]]) {no_unwind, will_return} : (i32, i32, f32, i32) -> f32 +// CHECK: %[[VAL_4:.*]] = llvm.call spir_funccc @_Z27__spirv_GroupNonUniformFMiniifj(%[[VAL_2]], %[[VAL_3]], %[[VAL_0]], %[[VAL_1]]) {convergent, no_unwind, will_return} : (i32, i32, f32, i32) -> f32 // CHECK: llvm.return %[[VAL_4]] : f32 // CHECK: } spirv.func @non_uniform_fmin_cluster(%arg0: f32) -> f32 "None" { @@ -127,7 +127,7 @@ spirv.func @non_uniform_fmin_cluster(%arg0: f32) -> f32 "None" { // CHECK-SAME: %[[VAL_0:.*]]: i32) -> i32 { // CHECK: %[[VAL_1:.*]] = llvm.mlir.constant(3 : i32) : i32 // CHECK: %[[VAL_2:.*]] = llvm.mlir.constant(0 : i32) : i32 -// CHECK: %[[VAL_3:.*]] = llvm.call spir_funccc @_Z27__spirv_GroupNonUniformSMaxiij(%[[VAL_1]], %[[VAL_2]], %[[VAL_0]]) {no_unwind, will_return} : (i32, i32, i32) -> i32 +// CHECK: %[[VAL_3:.*]] = llvm.call spir_funccc @_Z27__spirv_GroupNonUniformSMaxiij(%[[VAL_1]], %[[VAL_2]], %[[VAL_0]]) {convergent, no_unwind, will_return} : (i32, i32, i32) -> i32 // CHECK: llvm.return %[[VAL_3]] : i32 // CHECK: } spirv.func @non_uniform_smax(%arg0: i32) -> i32 "None" { @@ -139,7 +139,7 @@ spirv.func @non_uniform_smax(%arg0: i32) -> i32 "None" { // CHECK-SAME: %[[VAL_0:.*]]: i32) -> i32 { // CHECK: %[[VAL_1:.*]] = llvm.mlir.constant(3 : i32) : i32 // CHECK: %[[VAL_2:.*]] = llvm.mlir.constant(0 : i32) : i32 -// CHECK: %[[VAL_3:.*]] = llvm.call spir_funccc @_Z27__spirv_GroupNonUniformUMaxiij(%[[VAL_1]], %[[VAL_2]], %[[VAL_0]]) {no_unwind, will_return} : (i32, i32, i32) -> i32 +// CHECK: %[[VAL_3:.*]] = llvm.call spir_funccc @_Z27__spirv_GroupNonUniformUMaxiij(%[[VAL_1]], %[[VAL_2]], %[[VAL_0]]) {convergent, no_unwind, will_return} : (i32, i32, i32) -> i32 // CHECK: llvm.return %[[VAL_3]] : i32 // CHECK: } spirv.func @non_uniform_umax(%arg0: i32) -> i32 "None" { @@ -151,7 +151,7 @@ spirv.func @non_uniform_umax(%arg0: i32) -> i32 "None" { // CHECK-SAME: %[[VAL_0:.*]]: f32) -> f32 { // CHECK: %[[VAL_1:.*]] = llvm.mlir.constant(3 : i32) : i32 // CHECK: %[[VAL_2:.*]] = llvm.mlir.constant(0 : i32) : i32 -// CHECK: %[[VAL_3:.*]] = llvm.call spir_funccc @_Z27__spirv_GroupNonUniformFMaxiif(%[[VAL_1]], %[[VAL_2]], %[[VAL_0]]) {no_unwind, will_return} : (i32, i32, f32) -> f32 +// CHECK: %[[VAL_3:.*]] = llvm.call spir_funccc @_Z27__spirv_GroupNonUniformFMaxiif(%[[VAL_1]], %[[VAL_2]], %[[VAL_0]]) {convergent, no_unwind, will_return} : (i32, i32, f32) -> f32 // CHECK: llvm.return %[[VAL_3]] : f32 // CHECK: } spirv.func @non_uniform_fmax(%arg0: f32) -> f32 "None" { @@ -164,7 +164,7 @@ spirv.func @non_uniform_fmax(%arg0: f32) -> f32 "None" { // CHECK: %[[VAL_1:.*]] = llvm.mlir.constant(16 : i32) : i32 // CHECK: %[[VAL_2:.*]] = llvm.mlir.constant(3 : i32) : i32 // CHECK: %[[VAL_3:.*]] = llvm.mlir.constant(3 : i32) : i32 -// CHECK: %[[VAL_4:.*]] = llvm.call spir_funccc @_Z27__spirv_GroupNonUniformSMaxiijj(%[[VAL_2]], %[[VAL_3]], %[[VAL_0]], %[[VAL_1]]) {no_unwind, will_return} : (i32, i32, i32, i32) -> i32 +// CHECK: %[[VAL_4:.*]] = llvm.call spir_funccc @_Z27__spirv_GroupNonUniformSMaxiijj(%[[VAL_2]], %[[VAL_3]], %[[VAL_0]], %[[VAL_1]]) {convergent, no_unwind, will_return} : (i32, i32, i32, i32) -> i32 // CHECK: llvm.return %[[VAL_4]] : i32 // CHECK: } spirv.func @non_uniform_smax_cluster(%arg0: i32) -> i32 "None" { @@ -177,7 +177,7 @@ spirv.func @non_uniform_smax_cluster(%arg0: i32) -> i32 "None" { // CHECK-SAME: %[[VAL_0:.*]]: i32) -> i32 { // CHECK: %[[VAL_1:.*]] = llvm.mlir.constant(3 : i32) : i32 // CHECK: %[[VAL_2:.*]] = llvm.mlir.constant(0 : i32) : i32 -// CHECK: %[[VAL_3:.*]] = llvm.call spir_funccc @_Z33__spirv_GroupNonUniformBitwiseAndiij(%[[VAL_1]], %[[VAL_2]], %[[VAL_0]]) {no_unwind, will_return} : (i32, i32, i32) -> i32 +// CHECK: %[[VAL_3:.*]] = llvm.call spir_funccc @_Z33__spirv_GroupNonUniformBitwiseAndiij(%[[VAL_1]], %[[VAL_2]], %[[VAL_0]]) {convergent, no_unwind, will_return} : (i32, i32, i32) -> i32 // CHECK: llvm.return %[[VAL_3]] : i32 // CHECK: } spirv.func @non_uniform_bitwise_and(%arg0: i32) -> i32 "None" { @@ -189,7 +189,7 @@ spirv.func @non_uniform_bitwise_and(%arg0: i32) -> i32 "None" { // CHECK-SAME: %[[VAL_0:.*]]: i32) -> i32 { // CHECK: %[[VAL_1:.*]] = llvm.mlir.constant(3 : i32) : i32 // CHECK: %[[VAL_2:.*]] = llvm.mlir.constant(0 : i32) : i32 -// CHECK: %[[VAL_3:.*]] = llvm.call spir_funccc @_Z32__spirv_GroupNonUniformBitwiseOriij(%[[VAL_1]], %[[VAL_2]], %[[VAL_0]]) {no_unwind, will_return} : (i32, i32, i32) -> i32 +// CHECK: %[[VAL_3:.*]] = llvm.call spir_funccc @_Z32__spirv_GroupNonUniformBitwiseOriij(%[[VAL_1]], %[[VAL_2]], %[[VAL_0]]) {convergent, no_unwind, will_return} : (i32, i32, i32) -> i32 // CHECK: llvm.return %[[VAL_3]] : i32 // CHECK: } spirv.func @non_uniform_bitwise_or(%arg0: i32) -> i32 "None" { @@ -201,7 +201,7 @@ spirv.func @non_uniform_bitwise_or(%arg0: i32) -> i32 "None" { // CHECK-SAME: %[[VAL_0:.*]]: i32) -> i32 { // CHECK: %[[VAL_1:.*]] = llvm.mlir.constant(3 : i32) : i32 // CHECK: %[[VAL_2:.*]] = llvm.mlir.constant(0 : i32) : i32 -// CHECK: %[[VAL_3:.*]] = llvm.call spir_funccc @_Z33__spirv_GroupNonUniformBitwiseXoriij(%[[VAL_1]], %[[VAL_2]], %[[VAL_0]]) {no_unwind, will_return} : (i32, i32, i32) -> i32 +// CHECK: %[[VAL_3:.*]] = llvm.call spir_funccc @_Z33__spirv_GroupNonUniformBitwiseXoriij(%[[VAL_1]], %[[VAL_2]], %[[VAL_0]]) {convergent, no_unwind, will_return} : (i32, i32, i32) -> i32 // CHECK: llvm.return %[[VAL_3]] : i32 // CHECK: } spirv.func @non_uniform_bitwise_xor(%arg0: i32) -> i32 "None" { @@ -213,7 +213,7 @@ spirv.func @non_uniform_bitwise_xor(%arg0: i32) -> i32 "None" { // CHECK-SAME: %[[VAL_0:.*]]: i1) -> i1 { // CHECK: %[[VAL_1:.*]] = llvm.mlir.constant(3 : i32) : i32 // CHECK: %[[VAL_2:.*]] = llvm.mlir.constant(0 : i32) : i32 -// CHECK: %[[VAL_3:.*]] = llvm.call spir_funccc @_Z33__spirv_GroupNonUniformLogicalAndiib(%[[VAL_1]], %[[VAL_2]], %[[VAL_0]]) {no_unwind, will_return} : (i32, i32, i1) -> i1 +// CHECK: %[[VAL_3:.*]] = llvm.call spir_funccc @_Z33__spirv_GroupNonUniformLogicalAndiib(%[[VAL_1]], %[[VAL_2]], %[[VAL_0]]) {convergent, no_unwind, will_return} : (i32, i32, i1) -> i1 // CHECK: llvm.return %[[VAL_3]] : i1 // CHECK: } spirv.func @non_uniform_logical_and(%arg0: i1) -> i1 "None" { @@ -225,7 +225,7 @@ spirv.func @non_uniform_logical_and(%arg0: i1) -> i1 "None" { // CHECK-SAME: %[[VAL_0:.*]]: i1) -> i1 { // CHECK: %[[VAL_1:.*]] = llvm.mlir.constant(3 : i32) : i32 // CHECK: %[[VAL_2:.*]] = llvm.mlir.constant(0 : i32) : i32 -// CHECK: %[[VAL_3:.*]] = llvm.call spir_funccc @_Z32__spirv_GroupNonUniformLogicalOriib(%[[VAL_1]], %[[VAL_2]], %[[VAL_0]]) {no_unwind, will_return} : (i32, i32, i1) -> i1 +// CHECK: %[[VAL_3:.*]] = llvm.call spir_funccc @_Z32__spirv_GroupNonUniformLogicalOriib(%[[VAL_1]], %[[VAL_2]], %[[VAL_0]]) {convergent, no_unwind, will_return} : (i32, i32, i1) -> i1 // CHECK: llvm.return %[[VAL_3]] : i1 // CHECK: } spirv.func @non_uniform_logical_or(%arg0: i1) -> i1 "None" { @@ -237,7 +237,7 @@ spirv.func @non_uniform_logical_or(%arg0: i1) -> i1 "None" { // CHECK-SAME: %[[VAL_0:.*]]: i1) -> i1 { // CHECK: %[[VAL_1:.*]] = llvm.mlir.constant(3 : i32) : i32 // CHECK: %[[VAL_2:.*]] = llvm.mlir.constant(0 : i32) : i32 -// CHECK: %[[VAL_3:.*]] = llvm.call spir_funccc @_Z33__spirv_GroupNonUniformLogicalXoriib(%[[VAL_1]], %[[VAL_2]], %[[VAL_0]]) {no_unwind, will_return} : (i32, i32, i1) -> i1 +// CHECK: %[[VAL_3:.*]] = llvm.call spir_funccc @_Z33__spirv_GroupNonUniformLogicalXoriib(%[[VAL_1]], %[[VAL_2]], %[[VAL_0]]) {convergent, no_unwind, will_return} : (i32, i32, i1) -> i1 // CHECK: llvm.return %[[VAL_3]] : i1 // CHECK: } spirv.func @non_uniform_logical_xor(%arg0: i1) -> i1 "None" {