diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp index 625052be657ca..8c38b993cba13 100644 --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp @@ -566,6 +566,29 @@ SDValue DAGTypeLegalizer::PromoteIntRes_BITCAST(SDNode *N) { } } + // TODO: Handle big endian + if (!NOutVT.isVector() && InOp.getValueType().isVector() && + DAG.getDataLayout().isLittleEndian()) { + // Pad the vector operand with undef and cast to a wider integer. + EVT EltVT = InOp.getValueType().getVectorElementType(); + TypeSize EltSize = EltVT.getSizeInBits(); + TypeSize OutSize = NOutVT.getSizeInBits(); + + if (OutSize.hasKnownScalarFactor(EltSize)) { + unsigned NumEltsWithPadding = OutSize.getKnownScalarFactor(EltSize); + EVT WideVecVT = + EVT::getVectorVT(*DAG.getContext(), EltVT, NumEltsWithPadding); + + if (isTypeLegal(WideVecVT)) { + SDValue Inserted = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, WideVecVT, + DAG.getUNDEF(WideVecVT), InOp, + DAG.getVectorIdxConstant(0, dl)); + + return DAG.getNode(ISD::BITCAST, dl, NOutVT, Inserted); + } + } + } + return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, CreateStackStoreLoad(InOp, OutVT)); } diff --git a/llvm/test/CodeGen/AMDGPU/bitcast_vector_bigint.ll b/llvm/test/CodeGen/AMDGPU/bitcast_vector_bigint.ll new file mode 100644 index 0000000000000..ab89bb293f6e6 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/bitcast_vector_bigint.ll @@ -0,0 +1,511 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 +; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefix=GFX9 %s +; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 < %s | FileCheck -check-prefix=GFX12 %s + +; Make sure stack use isn't introduced for these bitcasts. + +define i160 @bitcast_v5i32_to_i160(<5 x i32> %vec) { +; GFX9-LABEL: bitcast_v5i32_to_i160: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX12-LABEL: bitcast_v5i32_to_i160: +; GFX12: ; %bb.0: +; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX12-NEXT: s_wait_expcnt 0x0 +; GFX12-NEXT: s_wait_samplecnt 0x0 +; GFX12-NEXT: s_wait_bvhcnt 0x0 +; GFX12-NEXT: s_wait_kmcnt 0x0 +; GFX12-NEXT: s_setpc_b64 s[30:31] + %bitcast = bitcast <5 x i32> %vec to i160 + ret i160 %bitcast +} + +define i192 @bitcast_v6i32_to_i192(<6 x i32> %vec) { +; GFX9-LABEL: bitcast_v6i32_to_i192: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX12-LABEL: bitcast_v6i32_to_i192: +; GFX12: ; %bb.0: +; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX12-NEXT: s_wait_expcnt 0x0 +; GFX12-NEXT: s_wait_samplecnt 0x0 +; GFX12-NEXT: s_wait_bvhcnt 0x0 +; GFX12-NEXT: s_wait_kmcnt 0x0 +; GFX12-NEXT: s_setpc_b64 s[30:31] + %bitcast = bitcast <6 x i32> %vec to i192 + ret i192 %bitcast +} + +define i224 @bitcast_v7i32_to_i224(<7 x i32> %vec) { +; GFX9-LABEL: bitcast_v7i32_to_i224: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX12-LABEL: bitcast_v7i32_to_i224: +; GFX12: ; %bb.0: +; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX12-NEXT: s_wait_expcnt 0x0 +; GFX12-NEXT: s_wait_samplecnt 0x0 +; GFX12-NEXT: s_wait_bvhcnt 0x0 +; GFX12-NEXT: s_wait_kmcnt 0x0 +; GFX12-NEXT: s_setpc_b64 s[30:31] + %bitcast = bitcast <7 x i32> %vec to i224 + ret i224 %bitcast +} + +define i256 @bitcast_v8i32_to_i256(<8 x i32> %vec) { +; GFX9-LABEL: bitcast_v8i32_to_i256: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX12-LABEL: bitcast_v8i32_to_i256: +; GFX12: ; %bb.0: +; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX12-NEXT: s_wait_expcnt 0x0 +; GFX12-NEXT: s_wait_samplecnt 0x0 +; GFX12-NEXT: s_wait_bvhcnt 0x0 +; GFX12-NEXT: s_wait_kmcnt 0x0 +; GFX12-NEXT: s_setpc_b64 s[30:31] + %bitcast = bitcast <8 x i32> %vec to i256 + ret i256 %bitcast +} + +define <5 x i32> @bitcast_i160_to_v5i32(i160 %int) { +; GFX9-LABEL: bitcast_i160_to_v5i32: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: s_mov_b32 s4, s33 +; GFX9-NEXT: s_add_i32 s33, s32, 0x7c0 +; GFX9-NEXT: s_and_b32 s33, s33, 0xfffff800 +; GFX9-NEXT: s_mov_b32 s5, s34 +; GFX9-NEXT: s_mov_b32 s34, s32 +; GFX9-NEXT: s_addk_i32 s32, 0x1000 +; GFX9-NEXT: s_mov_b32 s32, s34 +; GFX9-NEXT: s_mov_b32 s34, s5 +; GFX9-NEXT: s_mov_b32 s33, s4 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX12-LABEL: bitcast_i160_to_v5i32: +; GFX12: ; %bb.0: +; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX12-NEXT: s_wait_expcnt 0x0 +; GFX12-NEXT: s_wait_samplecnt 0x0 +; GFX12-NEXT: s_wait_bvhcnt 0x0 +; GFX12-NEXT: s_wait_kmcnt 0x0 +; GFX12-NEXT: s_mov_b32 s0, s33 +; GFX12-NEXT: s_add_co_i32 s33, s32, 31 +; GFX12-NEXT: s_mov_b32 s1, s34 +; GFX12-NEXT: s_wait_alu 0xfffe +; GFX12-NEXT: s_and_not1_b32 s33, s33, 31 +; GFX12-NEXT: s_clause 0x1 +; GFX12-NEXT: scratch_store_b64 off, v[2:3], s33 offset:8 +; GFX12-NEXT: scratch_store_b64 off, v[0:1], s33 +; GFX12-NEXT: scratch_load_b128 v[0:3], off, s33 +; GFX12-NEXT: s_mov_b32 s34, s32 +; GFX12-NEXT: s_add_co_i32 s32, s32, 64 +; GFX12-NEXT: s_wait_alu 0xfffe +; GFX12-NEXT: s_mov_b32 s32, s34 +; GFX12-NEXT: s_mov_b32 s34, s1 +; GFX12-NEXT: s_mov_b32 s33, s0 +; GFX12-NEXT: s_wait_loadcnt 0x0 +; GFX12-NEXT: s_wait_alu 0xfffe +; GFX12-NEXT: s_setpc_b64 s[30:31] + %bitcast = bitcast i160 %int to <5 x i32> + ret <5 x i32> %bitcast +} + +define <6 x i32> @bitcast_i192_to_v6i32(i192 %int) { +; GFX9-LABEL: bitcast_i192_to_v6i32: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: s_mov_b32 s4, s33 +; GFX9-NEXT: s_add_i32 s33, s32, 0x7c0 +; GFX9-NEXT: s_and_b32 s33, s33, 0xfffff800 +; GFX9-NEXT: s_mov_b32 s5, s34 +; GFX9-NEXT: s_mov_b32 s34, s32 +; GFX9-NEXT: s_addk_i32 s32, 0x1000 +; GFX9-NEXT: s_mov_b32 s32, s34 +; GFX9-NEXT: s_mov_b32 s34, s5 +; GFX9-NEXT: s_mov_b32 s33, s4 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX12-LABEL: bitcast_i192_to_v6i32: +; GFX12: ; %bb.0: +; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX12-NEXT: s_wait_expcnt 0x0 +; GFX12-NEXT: s_wait_samplecnt 0x0 +; GFX12-NEXT: s_wait_bvhcnt 0x0 +; GFX12-NEXT: s_wait_kmcnt 0x0 +; GFX12-NEXT: s_mov_b32 s0, s33 +; GFX12-NEXT: s_add_co_i32 s33, s32, 31 +; GFX12-NEXT: s_mov_b32 s1, s34 +; GFX12-NEXT: s_wait_alu 0xfffe +; GFX12-NEXT: s_and_not1_b32 s33, s33, 31 +; GFX12-NEXT: s_clause 0x1 +; GFX12-NEXT: scratch_store_b64 off, v[2:3], s33 offset:8 +; GFX12-NEXT: scratch_store_b64 off, v[0:1], s33 +; GFX12-NEXT: scratch_load_b128 v[0:3], off, s33 +; GFX12-NEXT: s_mov_b32 s34, s32 +; GFX12-NEXT: s_add_co_i32 s32, s32, 64 +; GFX12-NEXT: s_wait_alu 0xfffe +; GFX12-NEXT: s_mov_b32 s32, s34 +; GFX12-NEXT: s_mov_b32 s34, s1 +; GFX12-NEXT: s_mov_b32 s33, s0 +; GFX12-NEXT: s_wait_loadcnt 0x0 +; GFX12-NEXT: s_wait_alu 0xfffe +; GFX12-NEXT: s_setpc_b64 s[30:31] + %bitcast = bitcast i192 %int to <6 x i32> + ret <6 x i32> %bitcast +} + +define <7 x i32> @bitcast_i224_to_v7i32(i224 %int) { +; GFX9-LABEL: bitcast_i224_to_v7i32: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: s_mov_b32 s4, s33 +; GFX9-NEXT: s_add_i32 s33, s32, 0x7c0 +; GFX9-NEXT: s_and_b32 s33, s33, 0xfffff800 +; GFX9-NEXT: s_mov_b32 s5, s34 +; GFX9-NEXT: s_mov_b32 s34, s32 +; GFX9-NEXT: s_addk_i32 s32, 0x1000 +; GFX9-NEXT: s_mov_b32 s32, s34 +; GFX9-NEXT: s_mov_b32 s34, s5 +; GFX9-NEXT: s_mov_b32 s33, s4 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX12-LABEL: bitcast_i224_to_v7i32: +; GFX12: ; %bb.0: +; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX12-NEXT: s_wait_expcnt 0x0 +; GFX12-NEXT: s_wait_samplecnt 0x0 +; GFX12-NEXT: s_wait_bvhcnt 0x0 +; GFX12-NEXT: s_wait_kmcnt 0x0 +; GFX12-NEXT: s_mov_b32 s0, s33 +; GFX12-NEXT: s_add_co_i32 s33, s32, 31 +; GFX12-NEXT: s_mov_b32 s1, s34 +; GFX12-NEXT: s_wait_alu 0xfffe +; GFX12-NEXT: s_and_not1_b32 s33, s33, 31 +; GFX12-NEXT: s_clause 0x1 +; GFX12-NEXT: scratch_store_b64 off, v[2:3], s33 offset:8 +; GFX12-NEXT: scratch_store_b64 off, v[0:1], s33 +; GFX12-NEXT: scratch_load_b128 v[0:3], off, s33 +; GFX12-NEXT: s_clause 0x1 +; GFX12-NEXT: scratch_store_b32 off, v6, s33 offset:24 +; GFX12-NEXT: scratch_store_b64 off, v[4:5], s33 offset:16 +; GFX12-NEXT: scratch_load_b96 v[4:6], off, s33 offset:16 +; GFX12-NEXT: s_mov_b32 s34, s32 +; GFX12-NEXT: s_add_co_i32 s32, s32, 64 +; GFX12-NEXT: s_wait_alu 0xfffe +; GFX12-NEXT: s_mov_b32 s32, s34 +; GFX12-NEXT: s_mov_b32 s34, s1 +; GFX12-NEXT: s_mov_b32 s33, s0 +; GFX12-NEXT: s_wait_loadcnt 0x0 +; GFX12-NEXT: s_wait_alu 0xfffe +; GFX12-NEXT: s_setpc_b64 s[30:31] + %bitcast = bitcast i224 %int to <7 x i32> + ret <7 x i32> %bitcast +} + +define <8 x i32> @bitcast_i256_to_v8i32(i256 %int) { +; GFX9-LABEL: bitcast_i256_to_v8i32: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX12-LABEL: bitcast_i256_to_v8i32: +; GFX12: ; %bb.0: +; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX12-NEXT: s_wait_expcnt 0x0 +; GFX12-NEXT: s_wait_samplecnt 0x0 +; GFX12-NEXT: s_wait_bvhcnt 0x0 +; GFX12-NEXT: s_wait_kmcnt 0x0 +; GFX12-NEXT: s_setpc_b64 s[30:31] + %bitcast = bitcast i256 %int to <8 x i32> + ret <8 x i32> %bitcast +} + +define i192 @bitcast_v3i64_to_i192(<3 x i64> %vec) { +; GFX9-LABEL: bitcast_v3i64_to_i192: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX12-LABEL: bitcast_v3i64_to_i192: +; GFX12: ; %bb.0: +; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX12-NEXT: s_wait_expcnt 0x0 +; GFX12-NEXT: s_wait_samplecnt 0x0 +; GFX12-NEXT: s_wait_bvhcnt 0x0 +; GFX12-NEXT: s_wait_kmcnt 0x0 +; GFX12-NEXT: s_setpc_b64 s[30:31] + %bitcast = bitcast <3 x i64> %vec to i192 + ret i192 %bitcast +} + +define <3 x i64> @bitcast_i192_to_v3i64(i192 %int) { +; GFX9-LABEL: bitcast_i192_to_v3i64: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: s_mov_b32 s4, s33 +; GFX9-NEXT: s_add_i32 s33, s32, 0x7c0 +; GFX9-NEXT: s_and_b32 s33, s33, 0xfffff800 +; GFX9-NEXT: s_mov_b32 s5, s34 +; GFX9-NEXT: s_mov_b32 s34, s32 +; GFX9-NEXT: s_addk_i32 s32, 0x1000 +; GFX9-NEXT: s_mov_b32 s32, s34 +; GFX9-NEXT: s_mov_b32 s34, s5 +; GFX9-NEXT: s_mov_b32 s33, s4 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX12-LABEL: bitcast_i192_to_v3i64: +; GFX12: ; %bb.0: +; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX12-NEXT: s_wait_expcnt 0x0 +; GFX12-NEXT: s_wait_samplecnt 0x0 +; GFX12-NEXT: s_wait_bvhcnt 0x0 +; GFX12-NEXT: s_wait_kmcnt 0x0 +; GFX12-NEXT: s_mov_b32 s0, s33 +; GFX12-NEXT: s_add_co_i32 s33, s32, 31 +; GFX12-NEXT: s_mov_b32 s1, s34 +; GFX12-NEXT: s_wait_alu 0xfffe +; GFX12-NEXT: s_and_not1_b32 s33, s33, 31 +; GFX12-NEXT: s_clause 0x1 +; GFX12-NEXT: scratch_store_b64 off, v[2:3], s33 offset:8 +; GFX12-NEXT: scratch_store_b64 off, v[0:1], s33 +; GFX12-NEXT: scratch_load_b128 v[0:3], off, s33 +; GFX12-NEXT: s_mov_b32 s34, s32 +; GFX12-NEXT: s_add_co_i32 s32, s32, 64 +; GFX12-NEXT: s_wait_alu 0xfffe +; GFX12-NEXT: s_mov_b32 s32, s34 +; GFX12-NEXT: s_mov_b32 s34, s1 +; GFX12-NEXT: s_mov_b32 s33, s0 +; GFX12-NEXT: s_wait_loadcnt 0x0 +; GFX12-NEXT: s_wait_alu 0xfffe +; GFX12-NEXT: s_setpc_b64 s[30:31] + %bitcast = bitcast i192 %int to <3 x i64> + ret <3 x i64> %bitcast +} + +define <10 x i16> @bitcast_i160_to_v10i16(i160 %int) { +; GFX9-LABEL: bitcast_i160_to_v10i16: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: s_mov_b32 s4, 0xffff +; GFX9-NEXT: v_bfi_b32 v0, s4, v0, v0 +; GFX9-NEXT: v_bfi_b32 v2, s4, v2, v2 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX12-LABEL: bitcast_i160_to_v10i16: +; GFX12: ; %bb.0: +; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX12-NEXT: s_wait_expcnt 0x0 +; GFX12-NEXT: s_wait_samplecnt 0x0 +; GFX12-NEXT: s_wait_bvhcnt 0x0 +; GFX12-NEXT: s_wait_kmcnt 0x0 +; GFX12-NEXT: v_bfi_b32 v0, 0xffff, v0, v0 +; GFX12-NEXT: v_bfi_b32 v2, 0xffff, v2, v2 +; GFX12-NEXT: s_setpc_b64 s[30:31] + %bitcast = bitcast i160 %int to <10 x i16> + ret <10 x i16> %bitcast +} + +define i160 @bitcast_v10i16_to_i160(<10 x i16> %vec) { +; GFX9-LABEL: bitcast_v10i16_to_i160: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX12-LABEL: bitcast_v10i16_to_i160: +; GFX12: ; %bb.0: +; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX12-NEXT: s_wait_expcnt 0x0 +; GFX12-NEXT: s_wait_samplecnt 0x0 +; GFX12-NEXT: s_wait_bvhcnt 0x0 +; GFX12-NEXT: s_wait_kmcnt 0x0 +; GFX12-NEXT: s_setpc_b64 s[30:31] + %bitcast = bitcast <10 x i16> %vec to i160 + ret i160 %bitcast +} + +define i12 @bitcast_v2i6_to_i12(<2 x i6> %vec) { +; GFX9-LABEL: bitcast_v2i6_to_i12: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: v_lshlrev_b16_e32 v1, 6, v1 +; GFX9-NEXT: v_and_b32_e32 v0, 63, v0 +; GFX9-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX9-NEXT: v_and_b32_e32 v0, 0xfff, v0 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX12-LABEL: bitcast_v2i6_to_i12: +; GFX12: ; %bb.0: +; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX12-NEXT: s_wait_expcnt 0x0 +; GFX12-NEXT: s_wait_samplecnt 0x0 +; GFX12-NEXT: s_wait_bvhcnt 0x0 +; GFX12-NEXT: s_wait_kmcnt 0x0 +; GFX12-NEXT: v_lshlrev_b16 v1, 6, v1 +; GFX12-NEXT: v_and_b32_e32 v0, 63, v0 +; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX12-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX12-NEXT: v_and_b32_e32 v0, 0xfff, v0 +; GFX12-NEXT: s_setpc_b64 s[30:31] + %bitcast = bitcast <2 x i6> %vec to i12 + ret i12 %bitcast +} + +define <2 x i6> @bitcast_i12_to_v2i6(i12 %int) { +; GFX9-LABEL: bitcast_i12_to_v2i6: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: v_and_b32_e32 v2, 63, v0 +; GFX9-NEXT: v_lshrrev_b16_e32 v0, 6, v0 +; GFX9-NEXT: v_and_b32_e32 v1, 63, v0 +; GFX9-NEXT: v_mov_b32_e32 v0, v2 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX12-LABEL: bitcast_i12_to_v2i6: +; GFX12: ; %bb.0: +; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX12-NEXT: s_wait_expcnt 0x0 +; GFX12-NEXT: s_wait_samplecnt 0x0 +; GFX12-NEXT: s_wait_bvhcnt 0x0 +; GFX12-NEXT: s_wait_kmcnt 0x0 +; GFX12-NEXT: v_lshrrev_b16 v1, 6, v0 +; GFX12-NEXT: v_and_b32_e32 v0, 63, v0 +; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) +; GFX12-NEXT: v_and_b32_e32 v1, 63, v1 +; GFX12-NEXT: s_setpc_b64 s[30:31] + %bitcast = bitcast i12 %int to <2 x i6> + ret <2 x i6> %bitcast +} + +define i160 @bitcast_v5f32_to_i160(<5 x float> %vec) { +; GFX9-LABEL: bitcast_v5f32_to_i160: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX12-LABEL: bitcast_v5f32_to_i160: +; GFX12: ; %bb.0: +; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX12-NEXT: s_wait_expcnt 0x0 +; GFX12-NEXT: s_wait_samplecnt 0x0 +; GFX12-NEXT: s_wait_bvhcnt 0x0 +; GFX12-NEXT: s_wait_kmcnt 0x0 +; GFX12-NEXT: s_setpc_b64 s[30:31] + %bitcast = bitcast <5 x float> %vec to i160 + ret i160 %bitcast +} + +define <5 x float> @bitcast_i160_to_v5f32(i160 %int) { +; GFX9-LABEL: bitcast_i160_to_v5f32: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: s_mov_b32 s4, s33 +; GFX9-NEXT: s_add_i32 s33, s32, 0x7c0 +; GFX9-NEXT: s_and_b32 s33, s33, 0xfffff800 +; GFX9-NEXT: s_mov_b32 s5, s34 +; GFX9-NEXT: s_mov_b32 s34, s32 +; GFX9-NEXT: s_addk_i32 s32, 0x1000 +; GFX9-NEXT: s_mov_b32 s32, s34 +; GFX9-NEXT: s_mov_b32 s34, s5 +; GFX9-NEXT: s_mov_b32 s33, s4 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX12-LABEL: bitcast_i160_to_v5f32: +; GFX12: ; %bb.0: +; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX12-NEXT: s_wait_expcnt 0x0 +; GFX12-NEXT: s_wait_samplecnt 0x0 +; GFX12-NEXT: s_wait_bvhcnt 0x0 +; GFX12-NEXT: s_wait_kmcnt 0x0 +; GFX12-NEXT: s_mov_b32 s0, s33 +; GFX12-NEXT: s_add_co_i32 s33, s32, 31 +; GFX12-NEXT: s_mov_b32 s1, s34 +; GFX12-NEXT: s_wait_alu 0xfffe +; GFX12-NEXT: s_and_not1_b32 s33, s33, 31 +; GFX12-NEXT: s_clause 0x1 +; GFX12-NEXT: scratch_store_b64 off, v[2:3], s33 offset:8 +; GFX12-NEXT: scratch_store_b64 off, v[0:1], s33 +; GFX12-NEXT: scratch_load_b128 v[0:3], off, s33 +; GFX12-NEXT: s_mov_b32 s34, s32 +; GFX12-NEXT: s_add_co_i32 s32, s32, 64 +; GFX12-NEXT: s_wait_alu 0xfffe +; GFX12-NEXT: s_mov_b32 s32, s34 +; GFX12-NEXT: s_mov_b32 s34, s1 +; GFX12-NEXT: s_mov_b32 s33, s0 +; GFX12-NEXT: s_wait_loadcnt 0x0 +; GFX12-NEXT: s_wait_alu 0xfffe +; GFX12-NEXT: s_setpc_b64 s[30:31] + %bitcast = bitcast i160 %int to <5 x float> + ret <5 x float> %bitcast +} + +define <6 x float> @bitcast_i192_to_v6f32(i192 %int) { +; GFX9-LABEL: bitcast_i192_to_v6f32: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: s_mov_b32 s4, s33 +; GFX9-NEXT: s_add_i32 s33, s32, 0x7c0 +; GFX9-NEXT: s_and_b32 s33, s33, 0xfffff800 +; GFX9-NEXT: s_mov_b32 s5, s34 +; GFX9-NEXT: s_mov_b32 s34, s32 +; GFX9-NEXT: s_addk_i32 s32, 0x1000 +; GFX9-NEXT: s_mov_b32 s32, s34 +; GFX9-NEXT: s_mov_b32 s34, s5 +; GFX9-NEXT: s_mov_b32 s33, s4 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX12-LABEL: bitcast_i192_to_v6f32: +; GFX12: ; %bb.0: +; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX12-NEXT: s_wait_expcnt 0x0 +; GFX12-NEXT: s_wait_samplecnt 0x0 +; GFX12-NEXT: s_wait_bvhcnt 0x0 +; GFX12-NEXT: s_wait_kmcnt 0x0 +; GFX12-NEXT: s_mov_b32 s0, s33 +; GFX12-NEXT: s_add_co_i32 s33, s32, 31 +; GFX12-NEXT: s_mov_b32 s1, s34 +; GFX12-NEXT: s_wait_alu 0xfffe +; GFX12-NEXT: s_and_not1_b32 s33, s33, 31 +; GFX12-NEXT: s_clause 0x1 +; GFX12-NEXT: scratch_store_b64 off, v[2:3], s33 offset:8 +; GFX12-NEXT: scratch_store_b64 off, v[0:1], s33 +; GFX12-NEXT: scratch_load_b128 v[0:3], off, s33 +; GFX12-NEXT: s_mov_b32 s34, s32 +; GFX12-NEXT: s_add_co_i32 s32, s32, 64 +; GFX12-NEXT: s_wait_alu 0xfffe +; GFX12-NEXT: s_mov_b32 s32, s34 +; GFX12-NEXT: s_mov_b32 s34, s1 +; GFX12-NEXT: s_mov_b32 s33, s0 +; GFX12-NEXT: s_wait_loadcnt 0x0 +; GFX12-NEXT: s_wait_alu 0xfffe +; GFX12-NEXT: s_setpc_b64 s[30:31] + %bitcast = bitcast i192 %int to <6 x float> + ret <6 x float> %bitcast +} + +define i192 @bitcast_v6f32_to_i192(<6 x float> %vec) { +; GFX9-LABEL: bitcast_v6f32_to_i192: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX12-LABEL: bitcast_v6f32_to_i192: +; GFX12: ; %bb.0: +; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX12-NEXT: s_wait_expcnt 0x0 +; GFX12-NEXT: s_wait_samplecnt 0x0 +; GFX12-NEXT: s_wait_bvhcnt 0x0 +; GFX12-NEXT: s_wait_kmcnt 0x0 +; GFX12-NEXT: s_setpc_b64 s[30:31] + %bitcast = bitcast <6 x float> %vec to i192 + ret i192 %bitcast +} diff --git a/llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll b/llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll index 7eaa52d89b9b6..5f49e69a58ed8 100644 --- a/llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll +++ b/llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll @@ -3091,15 +3091,6 @@ define i160 @load_i160(ptr addrspace(8) inreg %buf) { ; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SDAG-NEXT: buffer_load_dwordx4 v[0:3], off, s[16:19], 0 ; SDAG-NEXT: buffer_load_dword v4, off, s[16:19], 0 offset:16 -; SDAG-NEXT: s_mov_b32 s4, s33 -; SDAG-NEXT: s_add_i32 s33, s32, 0x7c0 -; SDAG-NEXT: s_and_b32 s33, s33, 0xfffff800 -; SDAG-NEXT: s_mov_b32 s5, s34 -; SDAG-NEXT: s_mov_b32 s34, s32 -; SDAG-NEXT: s_addk_i32 s32, 0x1800 -; SDAG-NEXT: s_mov_b32 s32, s34 -; SDAG-NEXT: s_mov_b32 s34, s5 -; SDAG-NEXT: s_mov_b32 s33, s4 ; SDAG-NEXT: s_waitcnt vmcnt(0) ; SDAG-NEXT: s_setpc_b64 s[30:31] ; diff --git a/llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-lastuse-metadata.ll b/llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-lastuse-metadata.ll index e8744c7828d41..2b10d469acf5c 100644 --- a/llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-lastuse-metadata.ll +++ b/llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-lastuse-metadata.ll @@ -6,76 +6,37 @@ define amdgpu_kernel void @buffer_last_use_load_0(ptr addrspace(7) %in, ptr addrspace(7) %out) { ; GFX12-LABEL: buffer_last_use_load_0: ; GFX12: ; %bb.0: ; %entry -; GFX12-NEXT: s_clause 0x2 +; GFX12-NEXT: s_clause 0x1 ; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x0 -; GFX12-NEXT: s_load_b128 s[8:11], s[4:5], 0x20 -; GFX12-NEXT: s_load_b32 s6, s[4:5], 0x10 +; GFX12-NEXT: s_load_b32 s13, s[4:5], 0x10 +; GFX12-NEXT: s_mov_b32 s12, 0 +; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX12-NEXT: s_mov_b32 s7, s12 +; GFX12-NEXT: s_mov_b32 s9, s12 ; GFX12-NEXT: s_wait_kmcnt 0x0 -; GFX12-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1 -; GFX12-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3 -; GFX12-NEXT: v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, s9 -; GFX12-NEXT: v_dual_mov_b32 v9, s10 :: v_dual_mov_b32 v10, s11 -; GFX12-NEXT: scratch_store_b128 off, v[0:3], off offset:32 -; GFX12-NEXT: s_clause 0x1 -; GFX12-NEXT: scratch_load_b64 v[5:6], off, off offset:40 -; GFX12-NEXT: scratch_load_b32 v4, off, off offset:36 -; GFX12-NEXT: s_load_b32 s1, s[4:5], 0x30 -; GFX12-NEXT: scratch_store_b128 off, v[7:10], off +; GFX12-NEXT: s_mov_b32 s6, s3 +; GFX12-NEXT: v_mov_b32_e32 v0, s0 +; GFX12-NEXT: s_mov_b32 s8, s1 +; GFX12-NEXT: s_or_b64 s[10:11], s[6:7], s[12:13] +; GFX12-NEXT: s_mov_b32 s13, s2 +; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX12-NEXT: s_or_b64 s[8:9], s[8:9], s[12:13] +; GFX12-NEXT: buffer_load_b32 v0, v0, s[8:11], null offen th:TH_LOAD_LU ; GFX12-NEXT: s_clause 0x1 -; GFX12-NEXT: scratch_load_b64 v[1:2], off, off offset:8 -; GFX12-NEXT: scratch_load_b32 v0, off, off offset:4 -; GFX12-NEXT: v_mov_b32_e32 v7, s6 -; GFX12-NEXT: v_mov_b32_e32 v9, s0 +; GFX12-NEXT: s_load_b32 s13, s[4:5], 0x30 +; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x20 +; GFX12-NEXT: s_mov_b32 s5, s12 ; GFX12-NEXT: s_wait_kmcnt 0x0 -; GFX12-NEXT: v_mov_b32_e32 v3, s1 -; GFX12-NEXT: s_mov_b32 s1, exec_lo -; GFX12-NEXT: .LBB0_1: ; =>This Inner Loop Header: Depth=1 -; GFX12-NEXT: s_wait_loadcnt 0x2 -; GFX12-NEXT: v_readfirstlane_b32 s4, v4 -; GFX12-NEXT: v_readfirstlane_b32 s5, v5 -; GFX12-NEXT: v_readfirstlane_b32 s6, v6 -; GFX12-NEXT: v_readfirstlane_b32 s7, v7 -; GFX12-NEXT: s_wait_alu 0xf1ff -; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[4:5] -; GFX12-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[6:7] -; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX12-NEXT: s_and_b32 s0, vcc_lo, s0 -; GFX12-NEXT: s_wait_alu 0xfffe -; GFX12-NEXT: s_and_saveexec_b32 s0, s0 -; GFX12-NEXT: s_wait_loadcnt 0x0 -; GFX12-NEXT: buffer_load_b32 v8, v9, s[4:7], null offen th:TH_LOAD_LU -; GFX12-NEXT: ; implicit-def: $vgpr4_vgpr5_vgpr6_vgpr7 -; GFX12-NEXT: ; implicit-def: $vgpr9 -; GFX12-NEXT: s_xor_b32 exec_lo, exec_lo, s0 -; GFX12-NEXT: s_cbranch_execnz .LBB0_1 -; GFX12-NEXT: ; %bb.2: -; GFX12-NEXT: s_mov_b32 exec_lo, s1 -; GFX12-NEXT: v_mov_b32_e32 v4, s8 -; GFX12-NEXT: s_mov_b32 s0, exec_lo -; GFX12-NEXT: .LBB0_3: ; =>This Inner Loop Header: Depth=1 -; GFX12-NEXT: s_wait_loadcnt 0x1 -; GFX12-NEXT: v_readfirstlane_b32 s4, v0 -; GFX12-NEXT: v_readfirstlane_b32 s5, v1 -; GFX12-NEXT: v_readfirstlane_b32 s6, v2 -; GFX12-NEXT: v_readfirstlane_b32 s7, v3 -; GFX12-NEXT: s_wait_alu 0xf1ff -; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[0:1] -; GFX12-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[2:3] -; GFX12-NEXT: s_wait_alu 0xfffe -; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX12-NEXT: s_and_b32 s0, vcc_lo, s0 -; GFX12-NEXT: s_wait_alu 0xfffe -; GFX12-NEXT: s_and_saveexec_b32 s0, s0 +; GFX12-NEXT: v_mov_b32_e32 v1, s0 +; GFX12-NEXT: s_mov_b32 s4, s3 +; GFX12-NEXT: s_mov_b32 s3, s12 +; GFX12-NEXT: s_or_b64 s[6:7], s[4:5], s[12:13] +; GFX12-NEXT: s_mov_b32 s13, s2 +; GFX12-NEXT: s_mov_b32 s2, s1 +; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX12-NEXT: s_or_b64 s[4:5], s[2:3], s[12:13] ; GFX12-NEXT: s_wait_loadcnt 0x0 -; GFX12-NEXT: buffer_store_b32 v8, v4, s[4:7], null offen -; GFX12-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3 -; GFX12-NEXT: ; implicit-def: $vgpr8 -; GFX12-NEXT: ; implicit-def: $vgpr4 -; GFX12-NEXT: s_xor_b32 exec_lo, exec_lo, s0 -; GFX12-NEXT: s_cbranch_execnz .LBB0_3 -; GFX12-NEXT: ; %bb.4: +; GFX12-NEXT: buffer_store_b32 v0, v1, s[4:7], null offen ; GFX12-NEXT: s_endpgm entry: %val = load i32, ptr addrspace(7) %in, !amdgpu.last.use !{} @@ -86,77 +47,38 @@ entry: define amdgpu_kernel void @buffer_last_use_load_1(ptr addrspace(7) %in, ptr addrspace(7) %out) { ; GFX12-LABEL: buffer_last_use_load_1: ; GFX12: ; %bb.0: ; %entry -; GFX12-NEXT: s_clause 0x2 +; GFX12-NEXT: s_clause 0x1 ; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x0 -; GFX12-NEXT: s_load_b128 s[8:11], s[4:5], 0x20 -; GFX12-NEXT: s_load_b32 s6, s[4:5], 0x10 +; GFX12-NEXT: s_load_b32 s13, s[4:5], 0x10 ; GFX12-NEXT: v_and_b32_e32 v0, 0x3ff, v0 +; GFX12-NEXT: s_mov_b32 s12, 0 +; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX12-NEXT: s_mov_b32 s7, s12 +; GFX12-NEXT: s_mov_b32 s9, s12 ; GFX12-NEXT: s_wait_kmcnt 0x0 -; GFX12-NEXT: v_dual_mov_b32 v4, s3 :: v_dual_mov_b32 v3, s2 -; GFX12-NEXT: v_dual_mov_b32 v2, s1 :: v_dual_mov_b32 v1, s0 -; GFX12-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9 -; GFX12-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11 -; GFX12-NEXT: scratch_store_b128 off, v[1:4], off offset:32 -; GFX12-NEXT: s_clause 0x1 -; GFX12-NEXT: scratch_load_b64 v[6:7], off, off offset:40 -; GFX12-NEXT: scratch_load_b32 v5, off, off offset:36 -; GFX12-NEXT: s_load_b32 s1, s[4:5], 0x30 -; GFX12-NEXT: scratch_store_b128 off, v[8:11], off +; GFX12-NEXT: s_mov_b32 s6, s3 +; GFX12-NEXT: v_lshl_add_u32 v0, v0, 2, s0 +; GFX12-NEXT: s_mov_b32 s8, s1 +; GFX12-NEXT: s_or_b64 s[10:11], s[6:7], s[12:13] +; GFX12-NEXT: s_mov_b32 s13, s2 +; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX12-NEXT: s_or_b64 s[8:9], s[8:9], s[12:13] +; GFX12-NEXT: buffer_load_b32 v0, v0, s[8:11], null offen th:TH_LOAD_LU ; GFX12-NEXT: s_clause 0x1 -; GFX12-NEXT: scratch_load_b64 v[2:3], off, off offset:8 -; GFX12-NEXT: scratch_load_b32 v1, off, off offset:4 -; GFX12-NEXT: v_mov_b32_e32 v8, s6 -; GFX12-NEXT: v_lshl_add_u32 v9, v0, 2, s0 +; GFX12-NEXT: s_load_b32 s13, s[4:5], 0x30 +; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x20 +; GFX12-NEXT: s_mov_b32 s5, s12 ; GFX12-NEXT: s_wait_kmcnt 0x0 -; GFX12-NEXT: v_mov_b32_e32 v4, s1 -; GFX12-NEXT: s_mov_b32 s1, exec_lo -; GFX12-NEXT: .LBB1_1: ; =>This Inner Loop Header: Depth=1 -; GFX12-NEXT: s_wait_loadcnt 0x2 -; GFX12-NEXT: v_readfirstlane_b32 s4, v5 -; GFX12-NEXT: v_readfirstlane_b32 s5, v6 -; GFX12-NEXT: v_readfirstlane_b32 s6, v7 -; GFX12-NEXT: v_readfirstlane_b32 s7, v8 -; GFX12-NEXT: s_wait_alu 0xf1ff -; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[5:6] -; GFX12-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[7:8] -; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX12-NEXT: s_and_b32 s0, vcc_lo, s0 -; GFX12-NEXT: s_wait_alu 0xfffe -; GFX12-NEXT: s_and_saveexec_b32 s0, s0 -; GFX12-NEXT: s_wait_loadcnt 0x0 -; GFX12-NEXT: buffer_load_b32 v0, v9, s[4:7], null offen th:TH_LOAD_LU -; GFX12-NEXT: ; implicit-def: $vgpr5_vgpr6_vgpr7_vgpr8 -; GFX12-NEXT: ; implicit-def: $vgpr9 -; GFX12-NEXT: s_xor_b32 exec_lo, exec_lo, s0 -; GFX12-NEXT: s_cbranch_execnz .LBB1_1 -; GFX12-NEXT: ; %bb.2: -; GFX12-NEXT: s_mov_b32 exec_lo, s1 -; GFX12-NEXT: v_mov_b32_e32 v5, s8 -; GFX12-NEXT: s_mov_b32 s0, exec_lo -; GFX12-NEXT: .LBB1_3: ; =>This Inner Loop Header: Depth=1 -; GFX12-NEXT: s_wait_loadcnt 0x1 -; GFX12-NEXT: v_readfirstlane_b32 s4, v1 -; GFX12-NEXT: v_readfirstlane_b32 s5, v2 -; GFX12-NEXT: v_readfirstlane_b32 s6, v3 -; GFX12-NEXT: v_readfirstlane_b32 s7, v4 -; GFX12-NEXT: s_wait_alu 0xf1ff -; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[1:2] -; GFX12-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[3:4] -; GFX12-NEXT: s_wait_alu 0xfffe -; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX12-NEXT: s_and_b32 s0, vcc_lo, s0 -; GFX12-NEXT: s_wait_alu 0xfffe -; GFX12-NEXT: s_and_saveexec_b32 s0, s0 +; GFX12-NEXT: v_mov_b32_e32 v1, s0 +; GFX12-NEXT: s_mov_b32 s4, s3 +; GFX12-NEXT: s_mov_b32 s3, s12 +; GFX12-NEXT: s_or_b64 s[6:7], s[4:5], s[12:13] +; GFX12-NEXT: s_mov_b32 s13, s2 +; GFX12-NEXT: s_mov_b32 s2, s1 +; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX12-NEXT: s_or_b64 s[4:5], s[2:3], s[12:13] ; GFX12-NEXT: s_wait_loadcnt 0x0 -; GFX12-NEXT: buffer_store_b32 v0, v5, s[4:7], null offen -; GFX12-NEXT: ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4 -; GFX12-NEXT: ; implicit-def: $vgpr0 -; GFX12-NEXT: ; implicit-def: $vgpr5 -; GFX12-NEXT: s_xor_b32 exec_lo, exec_lo, s0 -; GFX12-NEXT: s_cbranch_execnz .LBB1_3 -; GFX12-NEXT: ; %bb.4: +; GFX12-NEXT: buffer_store_b32 v0, v1, s[4:7], null offen ; GFX12-NEXT: s_endpgm entry: %tid = call i32 @llvm.amdgcn.workitem.id.x() @@ -169,76 +91,37 @@ entry: define amdgpu_kernel void @buffer_last_use_and_volatile_load(ptr addrspace(7) %in, ptr addrspace(7) %out) { ; GFX12-LABEL: buffer_last_use_and_volatile_load: ; GFX12: ; %bb.0: ; %entry -; GFX12-NEXT: s_clause 0x2 +; GFX12-NEXT: s_clause 0x1 ; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x0 -; GFX12-NEXT: s_load_b128 s[8:11], s[4:5], 0x20 -; GFX12-NEXT: s_load_b32 s6, s[4:5], 0x10 +; GFX12-NEXT: s_load_b32 s13, s[4:5], 0x10 +; GFX12-NEXT: s_mov_b32 s12, 0 +; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX12-NEXT: s_mov_b32 s7, s12 +; GFX12-NEXT: s_mov_b32 s9, s12 ; GFX12-NEXT: s_wait_kmcnt 0x0 -; GFX12-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1 -; GFX12-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3 -; GFX12-NEXT: v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, s9 -; GFX12-NEXT: v_dual_mov_b32 v9, s10 :: v_dual_mov_b32 v10, s11 -; GFX12-NEXT: scratch_store_b128 off, v[0:3], off offset:32 -; GFX12-NEXT: s_clause 0x1 -; GFX12-NEXT: scratch_load_b64 v[5:6], off, off offset:40 -; GFX12-NEXT: scratch_load_b32 v4, off, off offset:36 -; GFX12-NEXT: s_load_b32 s1, s[4:5], 0x30 -; GFX12-NEXT: scratch_store_b128 off, v[7:10], off +; GFX12-NEXT: s_mov_b32 s6, s3 +; GFX12-NEXT: v_mov_b32_e32 v0, s0 +; GFX12-NEXT: s_mov_b32 s8, s1 +; GFX12-NEXT: s_or_b64 s[10:11], s[6:7], s[12:13] +; GFX12-NEXT: s_mov_b32 s13, s2 +; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX12-NEXT: s_or_b64 s[8:9], s[8:9], s[12:13] +; GFX12-NEXT: buffer_load_b32 v0, v0, s[8:11], null offen th:TH_LOAD_BYPASS scope:SCOPE_SYS ; GFX12-NEXT: s_clause 0x1 -; GFX12-NEXT: scratch_load_b64 v[1:2], off, off offset:8 -; GFX12-NEXT: scratch_load_b32 v0, off, off offset:4 -; GFX12-NEXT: v_mov_b32_e32 v7, s6 -; GFX12-NEXT: v_mov_b32_e32 v9, s0 +; GFX12-NEXT: s_load_b32 s13, s[4:5], 0x30 +; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x20 +; GFX12-NEXT: s_mov_b32 s5, s12 ; GFX12-NEXT: s_wait_kmcnt 0x0 -; GFX12-NEXT: v_mov_b32_e32 v3, s1 -; GFX12-NEXT: s_mov_b32 s1, exec_lo -; GFX12-NEXT: .LBB2_1: ; =>This Inner Loop Header: Depth=1 -; GFX12-NEXT: s_wait_loadcnt 0x2 -; GFX12-NEXT: v_readfirstlane_b32 s4, v4 -; GFX12-NEXT: v_readfirstlane_b32 s5, v5 -; GFX12-NEXT: v_readfirstlane_b32 s6, v6 -; GFX12-NEXT: v_readfirstlane_b32 s7, v7 -; GFX12-NEXT: s_wait_alu 0xf1ff -; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[4:5] -; GFX12-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[6:7] -; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX12-NEXT: s_and_b32 s0, vcc_lo, s0 -; GFX12-NEXT: s_wait_alu 0xfffe -; GFX12-NEXT: s_and_saveexec_b32 s0, s0 -; GFX12-NEXT: s_wait_loadcnt 0x0 -; GFX12-NEXT: buffer_load_b32 v8, v9, s[4:7], null offen th:TH_LOAD_BYPASS scope:SCOPE_SYS -; GFX12-NEXT: ; implicit-def: $vgpr4_vgpr5_vgpr6_vgpr7 -; GFX12-NEXT: ; implicit-def: $vgpr9 -; GFX12-NEXT: s_xor_b32 exec_lo, exec_lo, s0 -; GFX12-NEXT: s_cbranch_execnz .LBB2_1 -; GFX12-NEXT: ; %bb.2: -; GFX12-NEXT: s_mov_b32 exec_lo, s1 -; GFX12-NEXT: v_mov_b32_e32 v4, s8 -; GFX12-NEXT: s_mov_b32 s0, exec_lo -; GFX12-NEXT: .LBB2_3: ; =>This Inner Loop Header: Depth=1 -; GFX12-NEXT: s_wait_loadcnt 0x1 -; GFX12-NEXT: v_readfirstlane_b32 s4, v0 -; GFX12-NEXT: v_readfirstlane_b32 s5, v1 -; GFX12-NEXT: v_readfirstlane_b32 s6, v2 -; GFX12-NEXT: v_readfirstlane_b32 s7, v3 -; GFX12-NEXT: s_wait_alu 0xf1ff -; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[0:1] -; GFX12-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[2:3] -; GFX12-NEXT: s_wait_alu 0xfffe -; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX12-NEXT: s_and_b32 s0, vcc_lo, s0 -; GFX12-NEXT: s_wait_alu 0xfffe -; GFX12-NEXT: s_and_saveexec_b32 s0, s0 +; GFX12-NEXT: v_mov_b32_e32 v1, s0 +; GFX12-NEXT: s_mov_b32 s4, s3 +; GFX12-NEXT: s_mov_b32 s3, s12 +; GFX12-NEXT: s_or_b64 s[6:7], s[4:5], s[12:13] +; GFX12-NEXT: s_mov_b32 s13, s2 +; GFX12-NEXT: s_mov_b32 s2, s1 +; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX12-NEXT: s_or_b64 s[4:5], s[2:3], s[12:13] ; GFX12-NEXT: s_wait_loadcnt 0x0 -; GFX12-NEXT: buffer_store_b32 v8, v4, s[4:7], null offen -; GFX12-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3 -; GFX12-NEXT: ; implicit-def: $vgpr8 -; GFX12-NEXT: ; implicit-def: $vgpr4 -; GFX12-NEXT: s_xor_b32 exec_lo, exec_lo, s0 -; GFX12-NEXT: s_cbranch_execnz .LBB2_3 -; GFX12-NEXT: ; %bb.4: +; GFX12-NEXT: buffer_store_b32 v0, v1, s[4:7], null offen ; GFX12-NEXT: s_endpgm entry: %val = load volatile i32, ptr addrspace(7) %in, !amdgpu.last.use !{} @@ -249,76 +132,37 @@ entry: define amdgpu_kernel void @buffer_last_use_and_nontemporal_load(ptr addrspace(7) %in, ptr addrspace(7) %out) { ; GFX12-LABEL: buffer_last_use_and_nontemporal_load: ; GFX12: ; %bb.0: ; %entry -; GFX12-NEXT: s_clause 0x2 +; GFX12-NEXT: s_clause 0x1 ; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x0 -; GFX12-NEXT: s_load_b128 s[8:11], s[4:5], 0x20 -; GFX12-NEXT: s_load_b32 s6, s[4:5], 0x10 +; GFX12-NEXT: s_load_b32 s13, s[4:5], 0x10 +; GFX12-NEXT: s_mov_b32 s12, 0 +; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX12-NEXT: s_mov_b32 s7, s12 +; GFX12-NEXT: s_mov_b32 s9, s12 ; GFX12-NEXT: s_wait_kmcnt 0x0 -; GFX12-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1 -; GFX12-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3 -; GFX12-NEXT: v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, s9 -; GFX12-NEXT: v_dual_mov_b32 v9, s10 :: v_dual_mov_b32 v10, s11 -; GFX12-NEXT: scratch_store_b128 off, v[0:3], off offset:32 -; GFX12-NEXT: s_clause 0x1 -; GFX12-NEXT: scratch_load_b64 v[5:6], off, off offset:40 -; GFX12-NEXT: scratch_load_b32 v4, off, off offset:36 -; GFX12-NEXT: s_load_b32 s1, s[4:5], 0x30 -; GFX12-NEXT: scratch_store_b128 off, v[7:10], off +; GFX12-NEXT: s_mov_b32 s6, s3 +; GFX12-NEXT: v_mov_b32_e32 v0, s0 +; GFX12-NEXT: s_mov_b32 s8, s1 +; GFX12-NEXT: s_or_b64 s[10:11], s[6:7], s[12:13] +; GFX12-NEXT: s_mov_b32 s13, s2 +; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX12-NEXT: s_or_b64 s[8:9], s[8:9], s[12:13] +; GFX12-NEXT: buffer_load_b32 v0, v0, s[8:11], null offen th:TH_LOAD_LU ; GFX12-NEXT: s_clause 0x1 -; GFX12-NEXT: scratch_load_b64 v[1:2], off, off offset:8 -; GFX12-NEXT: scratch_load_b32 v0, off, off offset:4 -; GFX12-NEXT: v_mov_b32_e32 v7, s6 -; GFX12-NEXT: v_mov_b32_e32 v9, s0 +; GFX12-NEXT: s_load_b32 s13, s[4:5], 0x30 +; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x20 +; GFX12-NEXT: s_mov_b32 s5, s12 ; GFX12-NEXT: s_wait_kmcnt 0x0 -; GFX12-NEXT: v_mov_b32_e32 v3, s1 -; GFX12-NEXT: s_mov_b32 s1, exec_lo -; GFX12-NEXT: .LBB3_1: ; =>This Inner Loop Header: Depth=1 -; GFX12-NEXT: s_wait_loadcnt 0x2 -; GFX12-NEXT: v_readfirstlane_b32 s4, v4 -; GFX12-NEXT: v_readfirstlane_b32 s5, v5 -; GFX12-NEXT: v_readfirstlane_b32 s6, v6 -; GFX12-NEXT: v_readfirstlane_b32 s7, v7 -; GFX12-NEXT: s_wait_alu 0xf1ff -; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[4:5] -; GFX12-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[6:7] -; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX12-NEXT: s_and_b32 s0, vcc_lo, s0 -; GFX12-NEXT: s_wait_alu 0xfffe -; GFX12-NEXT: s_and_saveexec_b32 s0, s0 -; GFX12-NEXT: s_wait_loadcnt 0x0 -; GFX12-NEXT: buffer_load_b32 v8, v9, s[4:7], null offen th:TH_LOAD_LU -; GFX12-NEXT: ; implicit-def: $vgpr4_vgpr5_vgpr6_vgpr7 -; GFX12-NEXT: ; implicit-def: $vgpr9 -; GFX12-NEXT: s_xor_b32 exec_lo, exec_lo, s0 -; GFX12-NEXT: s_cbranch_execnz .LBB3_1 -; GFX12-NEXT: ; %bb.2: -; GFX12-NEXT: s_mov_b32 exec_lo, s1 -; GFX12-NEXT: v_mov_b32_e32 v4, s8 -; GFX12-NEXT: s_mov_b32 s0, exec_lo -; GFX12-NEXT: .LBB3_3: ; =>This Inner Loop Header: Depth=1 -; GFX12-NEXT: s_wait_loadcnt 0x1 -; GFX12-NEXT: v_readfirstlane_b32 s4, v0 -; GFX12-NEXT: v_readfirstlane_b32 s5, v1 -; GFX12-NEXT: v_readfirstlane_b32 s6, v2 -; GFX12-NEXT: v_readfirstlane_b32 s7, v3 -; GFX12-NEXT: s_wait_alu 0xf1ff -; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[0:1] -; GFX12-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[2:3] -; GFX12-NEXT: s_wait_alu 0xfffe -; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX12-NEXT: s_and_b32 s0, vcc_lo, s0 -; GFX12-NEXT: s_wait_alu 0xfffe -; GFX12-NEXT: s_and_saveexec_b32 s0, s0 +; GFX12-NEXT: v_mov_b32_e32 v1, s0 +; GFX12-NEXT: s_mov_b32 s4, s3 +; GFX12-NEXT: s_mov_b32 s3, s12 +; GFX12-NEXT: s_or_b64 s[6:7], s[4:5], s[12:13] +; GFX12-NEXT: s_mov_b32 s13, s2 +; GFX12-NEXT: s_mov_b32 s2, s1 +; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX12-NEXT: s_or_b64 s[4:5], s[2:3], s[12:13] ; GFX12-NEXT: s_wait_loadcnt 0x0 -; GFX12-NEXT: buffer_store_b32 v8, v4, s[4:7], null offen -; GFX12-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3 -; GFX12-NEXT: ; implicit-def: $vgpr8 -; GFX12-NEXT: ; implicit-def: $vgpr4 -; GFX12-NEXT: s_xor_b32 exec_lo, exec_lo, s0 -; GFX12-NEXT: s_cbranch_execnz .LBB3_3 -; GFX12-NEXT: ; %bb.4: +; GFX12-NEXT: buffer_store_b32 v0, v1, s[4:7], null offen ; GFX12-NEXT: s_endpgm entry: %val = load i32, ptr addrspace(7) %in, !amdgpu.last.use !{}, !nontemporal !0 diff --git a/llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-nontemporal-metadata.ll b/llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-nontemporal-metadata.ll index a5f6c2fe5d264..a62910e4e5711 100644 --- a/llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-nontemporal-metadata.ll +++ b/llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-nontemporal-metadata.ll @@ -13,30 +13,32 @@ define amdgpu_kernel void @buffer_nontemporal_load_store(ptr addrspace(7) %in, ptr addrspace(7) %out) { ; GFX9-SDAG-LABEL: buffer_nontemporal_load_store: ; GFX9-SDAG: ; %bb.0: ; %entry -; GFX9-SDAG-NEXT: s_load_dwordx4 s[4:7], s[8:9], 0x0 +; GFX9-SDAG-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0 ; GFX9-SDAG-NEXT: s_load_dword s11, s[8:9], 0x10 ; GFX9-SDAG-NEXT: s_mov_b32 s10, 0 -; GFX9-SDAG-NEXT: s_add_u32 s0, s0, s15 -; GFX9-SDAG-NEXT: s_mov_b32 s15, s10 +; GFX9-SDAG-NEXT: s_mov_b32 s5, s10 ; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-SDAG-NEXT: s_mov_b32 s14, s7 -; GFX9-SDAG-NEXT: s_addc_u32 s1, s1, 0 -; GFX9-SDAG-NEXT: s_mov_b32 s12, s5 -; GFX9-SDAG-NEXT: s_or_b64 s[14:15], s[14:15], s[10:11] -; GFX9-SDAG-NEXT: s_mov_b32 s13, s6 -; GFX9-SDAG-NEXT: v_mov_b32_e32 v0, s4 -; GFX9-SDAG-NEXT: buffer_load_dword v0, v0, s[12:15], 0 offen glc slc +; GFX9-SDAG-NEXT: s_mov_b32 s4, s3 +; GFX9-SDAG-NEXT: s_or_b64 s[6:7], s[4:5], s[10:11] +; GFX9-SDAG-NEXT: s_mov_b32 s11, s2 +; GFX9-SDAG-NEXT: s_mov_b32 s2, s1 +; GFX9-SDAG-NEXT: s_mov_b32 s3, s10 +; GFX9-SDAG-NEXT: s_or_b64 s[4:5], s[2:3], s[10:11] +; GFX9-SDAG-NEXT: v_mov_b32_e32 v0, s0 +; GFX9-SDAG-NEXT: buffer_load_dword v0, v0, s[4:7], 0 offen glc slc ; GFX9-SDAG-NEXT: s_load_dword s11, s[8:9], 0x30 -; GFX9-SDAG-NEXT: s_load_dwordx4 s[4:7], s[8:9], 0x20 -; GFX9-SDAG-NEXT: s_mov_b32 s9, s10 +; GFX9-SDAG-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x20 +; GFX9-SDAG-NEXT: s_mov_b32 s5, s10 ; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-SDAG-NEXT: s_mov_b32 s8, s7 -; GFX9-SDAG-NEXT: s_or_b64 s[10:11], s[8:9], s[10:11] -; GFX9-SDAG-NEXT: s_mov_b32 s8, s5 -; GFX9-SDAG-NEXT: s_mov_b32 s9, s6 -; GFX9-SDAG-NEXT: v_mov_b32_e32 v1, s4 +; GFX9-SDAG-NEXT: s_mov_b32 s4, s3 +; GFX9-SDAG-NEXT: s_or_b64 s[6:7], s[4:5], s[10:11] +; GFX9-SDAG-NEXT: s_mov_b32 s11, s2 +; GFX9-SDAG-NEXT: s_mov_b32 s2, s1 +; GFX9-SDAG-NEXT: s_mov_b32 s3, s10 +; GFX9-SDAG-NEXT: s_or_b64 s[4:5], s[2:3], s[10:11] +; GFX9-SDAG-NEXT: v_mov_b32_e32 v1, s0 ; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) -; GFX9-SDAG-NEXT: buffer_store_dword v0, v1, s[8:11], 0 offen glc slc +; GFX9-SDAG-NEXT: buffer_store_dword v0, v1, s[4:7], 0 offen glc slc ; GFX9-SDAG-NEXT: s_endpgm ; ; GFX9-GISEL-LABEL: buffer_nontemporal_load_store: @@ -72,68 +74,31 @@ define amdgpu_kernel void @buffer_nontemporal_load_store(ptr addrspace(7) %in, p ; GFX940-SDAG-LABEL: buffer_nontemporal_load_store: ; GFX940-SDAG: ; %bb.0: ; %entry ; GFX940-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 -; GFX940-SDAG-NEXT: s_load_dword s6, s[4:5], 0x10 -; GFX940-SDAG-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x20 -; GFX940-SDAG-NEXT: s_load_dword s7, s[4:5], 0x30 +; GFX940-SDAG-NEXT: s_load_dword s13, s[4:5], 0x10 +; GFX940-SDAG-NEXT: s_mov_b32 s12, 0 +; GFX940-SDAG-NEXT: s_mov_b32 s7, s12 ; GFX940-SDAG-NEXT: s_waitcnt lgkmcnt(0) -; GFX940-SDAG-NEXT: v_mov_b64_e32 v[0:1], s[0:1] -; GFX940-SDAG-NEXT: v_mov_b64_e32 v[2:3], s[2:3] -; GFX940-SDAG-NEXT: scratch_store_dwordx4 off, v[0:3], off offset:32 sc0 sc1 -; GFX940-SDAG-NEXT: scratch_load_dwordx2 v[10:11], off, off offset:40 -; GFX940-SDAG-NEXT: scratch_load_dword v4, off, off offset:36 -; GFX940-SDAG-NEXT: v_mov_b64_e32 v[0:1], s[8:9] -; GFX940-SDAG-NEXT: v_mov_b64_e32 v[2:3], s[10:11] -; GFX940-SDAG-NEXT: scratch_store_dwordx4 off, v[0:3], off sc0 sc1 -; GFX940-SDAG-NEXT: scratch_load_dwordx2 v[12:13], off, off offset:8 -; GFX940-SDAG-NEXT: s_nop 0 -; GFX940-SDAG-NEXT: scratch_load_dword v0, off, off offset:4 -; GFX940-SDAG-NEXT: v_mov_b32_e32 v7, s6 -; GFX940-SDAG-NEXT: v_mov_b32_e32 v3, s7 -; GFX940-SDAG-NEXT: v_mov_b32_e32 v9, s0 -; GFX940-SDAG-NEXT: s_mov_b64 s[2:3], exec -; GFX940-SDAG-NEXT: s_waitcnt vmcnt(4) -; GFX940-SDAG-NEXT: v_mov_b32_e32 v5, v10 -; GFX940-SDAG-NEXT: v_mov_b32_e32 v6, v11 -; GFX940-SDAG-NEXT: s_waitcnt vmcnt(1) -; GFX940-SDAG-NEXT: v_mov_b32_e32 v1, v12 -; GFX940-SDAG-NEXT: v_mov_b32_e32 v2, v13 -; GFX940-SDAG-NEXT: .LBB0_1: ; =>This Inner Loop Header: Depth=1 -; GFX940-SDAG-NEXT: v_readfirstlane_b32 s4, v4 -; GFX940-SDAG-NEXT: v_readfirstlane_b32 s5, v5 -; GFX940-SDAG-NEXT: v_readfirstlane_b32 s6, v6 -; GFX940-SDAG-NEXT: v_readfirstlane_b32 s7, v7 -; GFX940-SDAG-NEXT: v_cmp_eq_u64_e32 vcc, s[4:5], v[4:5] -; GFX940-SDAG-NEXT: s_nop 0 -; GFX940-SDAG-NEXT: v_cmp_eq_u64_e64 s[0:1], s[6:7], v[6:7] -; GFX940-SDAG-NEXT: s_and_b64 s[0:1], vcc, s[0:1] -; GFX940-SDAG-NEXT: s_and_saveexec_b64 s[0:1], s[0:1] -; GFX940-SDAG-NEXT: buffer_load_dword v8, v9, s[4:7], 0 offen nt -; GFX940-SDAG-NEXT: ; implicit-def: $vgpr4_vgpr5_vgpr6_vgpr7 -; GFX940-SDAG-NEXT: ; implicit-def: $vgpr9 -; GFX940-SDAG-NEXT: s_xor_b64 exec, exec, s[0:1] -; GFX940-SDAG-NEXT: s_cbranch_execnz .LBB0_1 -; GFX940-SDAG-NEXT: ; %bb.2: -; GFX940-SDAG-NEXT: s_mov_b64 exec, s[2:3] -; GFX940-SDAG-NEXT: v_mov_b32_e32 v4, s8 -; GFX940-SDAG-NEXT: s_mov_b64 s[0:1], exec +; GFX940-SDAG-NEXT: s_mov_b32 s6, s3 +; GFX940-SDAG-NEXT: s_or_b64 s[10:11], s[6:7], s[12:13] +; GFX940-SDAG-NEXT: s_mov_b32 s13, s2 +; GFX940-SDAG-NEXT: s_mov_b32 s2, s1 +; GFX940-SDAG-NEXT: s_mov_b32 s3, s12 +; GFX940-SDAG-NEXT: s_or_b64 s[8:9], s[2:3], s[12:13] +; GFX940-SDAG-NEXT: v_mov_b32_e32 v0, s0 +; GFX940-SDAG-NEXT: buffer_load_dword v0, v0, s[8:11], 0 offen nt +; GFX940-SDAG-NEXT: s_load_dword s13, s[4:5], 0x30 +; GFX940-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x20 +; GFX940-SDAG-NEXT: s_mov_b32 s5, s12 +; GFX940-SDAG-NEXT: s_waitcnt lgkmcnt(0) +; GFX940-SDAG-NEXT: s_mov_b32 s4, s3 +; GFX940-SDAG-NEXT: s_or_b64 s[6:7], s[4:5], s[12:13] +; GFX940-SDAG-NEXT: s_mov_b32 s13, s2 +; GFX940-SDAG-NEXT: s_mov_b32 s2, s1 +; GFX940-SDAG-NEXT: s_mov_b32 s3, s12 +; GFX940-SDAG-NEXT: s_or_b64 s[4:5], s[2:3], s[12:13] +; GFX940-SDAG-NEXT: v_mov_b32_e32 v1, s0 ; GFX940-SDAG-NEXT: s_waitcnt vmcnt(0) -; GFX940-SDAG-NEXT: .LBB0_3: ; =>This Inner Loop Header: Depth=1 -; GFX940-SDAG-NEXT: v_readfirstlane_b32 s4, v0 -; GFX940-SDAG-NEXT: v_readfirstlane_b32 s5, v1 -; GFX940-SDAG-NEXT: v_readfirstlane_b32 s6, v2 -; GFX940-SDAG-NEXT: v_readfirstlane_b32 s7, v3 -; GFX940-SDAG-NEXT: v_cmp_eq_u64_e32 vcc, s[4:5], v[0:1] -; GFX940-SDAG-NEXT: s_nop 0 -; GFX940-SDAG-NEXT: v_cmp_eq_u64_e64 s[0:1], s[6:7], v[2:3] -; GFX940-SDAG-NEXT: s_and_b64 s[0:1], vcc, s[0:1] -; GFX940-SDAG-NEXT: s_and_saveexec_b64 s[0:1], s[0:1] -; GFX940-SDAG-NEXT: buffer_store_dword v8, v4, s[4:7], 0 offen sc0 nt sc1 -; GFX940-SDAG-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3 -; GFX940-SDAG-NEXT: ; implicit-def: $vgpr8 -; GFX940-SDAG-NEXT: ; implicit-def: $vgpr4 -; GFX940-SDAG-NEXT: s_xor_b64 exec, exec, s[0:1] -; GFX940-SDAG-NEXT: s_cbranch_execnz .LBB0_3 -; GFX940-SDAG-NEXT: ; %bb.4: +; GFX940-SDAG-NEXT: buffer_store_dword v0, v1, s[4:7], 0 offen sc0 nt sc1 ; GFX940-SDAG-NEXT: s_endpgm ; ; GFX940-GISEL-LABEL: buffer_nontemporal_load_store: @@ -169,31 +134,34 @@ define amdgpu_kernel void @buffer_nontemporal_load_store(ptr addrspace(7) %in, p ; GFX10-SDAG-LABEL: buffer_nontemporal_load_store: ; GFX10-SDAG: ; %bb.0: ; %entry ; GFX10-SDAG-NEXT: s_clause 0x1 -; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[8:9], 0x0 +; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0 ; GFX10-SDAG-NEXT: s_load_dword s11, s[8:9], 0x10 ; GFX10-SDAG-NEXT: s_mov_b32 s10, 0 -; GFX10-SDAG-NEXT: s_add_u32 s0, s0, s15 +; GFX10-SDAG-NEXT: s_mov_b32 s5, s10 ; GFX10-SDAG-NEXT: s_mov_b32 s13, s10 -; GFX10-SDAG-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0) -; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s4 -; GFX10-SDAG-NEXT: s_mov_b32 s12, s7 -; GFX10-SDAG-NEXT: s_or_b64 s[14:15], s[12:13], s[10:11] -; GFX10-SDAG-NEXT: s_mov_b32 s12, s5 -; GFX10-SDAG-NEXT: s_mov_b32 s13, s6 -; GFX10-SDAG-NEXT: buffer_load_dword v0, v0, s[12:15], 0 offen slc +; GFX10-SDAG-NEXT: s_mov_b32 s4, s3 +; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s0 +; GFX10-SDAG-NEXT: s_mov_b32 s12, s1 +; GFX10-SDAG-NEXT: s_or_b64 s[6:7], s[4:5], s[10:11] +; GFX10-SDAG-NEXT: s_mov_b32 s11, s2 +; GFX10-SDAG-NEXT: s_or_b64 s[4:5], s[12:13], s[10:11] +; GFX10-SDAG-NEXT: buffer_load_dword v0, v0, s[4:7], 0 offen slc ; GFX10-SDAG-NEXT: s_clause 0x1 ; GFX10-SDAG-NEXT: s_load_dword s11, s[8:9], 0x30 -; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[8:9], 0x20 -; GFX10-SDAG-NEXT: s_mov_b32 s9, s10 +; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x20 +; GFX10-SDAG-NEXT: s_waitcnt_depctr 0xffe3 +; GFX10-SDAG-NEXT: s_mov_b32 s5, s10 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0) -; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s4 -; GFX10-SDAG-NEXT: s_mov_b32 s8, s7 -; GFX10-SDAG-NEXT: s_or_b64 s[10:11], s[8:9], s[10:11] -; GFX10-SDAG-NEXT: s_mov_b32 s8, s5 -; GFX10-SDAG-NEXT: s_mov_b32 s9, s6 +; GFX10-SDAG-NEXT: s_mov_b32 s4, s3 +; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s0 +; GFX10-SDAG-NEXT: s_or_b64 s[6:7], s[4:5], s[10:11] +; GFX10-SDAG-NEXT: s_mov_b32 s11, s2 +; GFX10-SDAG-NEXT: s_mov_b32 s2, s1 +; GFX10-SDAG-NEXT: s_mov_b32 s3, s10 +; GFX10-SDAG-NEXT: s_or_b64 s[4:5], s[2:3], s[10:11] ; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) -; GFX10-SDAG-NEXT: buffer_store_dword v0, v1, s[8:11], 0 offen glc slc +; GFX10-SDAG-NEXT: buffer_store_dword v0, v1, s[4:7], 0 offen glc slc ; GFX10-SDAG-NEXT: s_endpgm ; ; GFX10-GISEL-LABEL: buffer_nontemporal_load_store: @@ -229,69 +197,37 @@ define amdgpu_kernel void @buffer_nontemporal_load_store(ptr addrspace(7) %in, p ; ; GFX11-SDAG-LABEL: buffer_nontemporal_load_store: ; GFX11-SDAG: ; %bb.0: ; %entry -; GFX11-SDAG-NEXT: s_clause 0x2 +; GFX11-SDAG-NEXT: s_clause 0x1 ; GFX11-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x0 -; GFX11-SDAG-NEXT: s_load_b128 s[8:11], s[4:5], 0x20 -; GFX11-SDAG-NEXT: s_load_b32 s6, s[4:5], 0x10 +; GFX11-SDAG-NEXT: s_load_b32 s13, s[4:5], 0x10 +; GFX11-SDAG-NEXT: s_mov_b32 s12, 0 +; GFX11-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-SDAG-NEXT: s_mov_b32 s7, s12 +; GFX11-SDAG-NEXT: s_mov_b32 s9, s12 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0) -; GFX11-SDAG-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1 -; GFX11-SDAG-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3 -; GFX11-SDAG-NEXT: v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, s9 -; GFX11-SDAG-NEXT: v_dual_mov_b32 v9, s10 :: v_dual_mov_b32 v10, s11 -; GFX11-SDAG-NEXT: scratch_store_b128 off, v[0:3], off offset:32 +; GFX11-SDAG-NEXT: s_mov_b32 s6, s3 +; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, s0 +; GFX11-SDAG-NEXT: s_mov_b32 s8, s1 +; GFX11-SDAG-NEXT: s_or_b64 s[10:11], s[6:7], s[12:13] +; GFX11-SDAG-NEXT: s_mov_b32 s13, s2 +; GFX11-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-SDAG-NEXT: s_or_b64 s[8:9], s[8:9], s[12:13] +; GFX11-SDAG-NEXT: buffer_load_b32 v0, v0, s[8:11], 0 offen slc dlc ; GFX11-SDAG-NEXT: s_clause 0x1 -; GFX11-SDAG-NEXT: scratch_load_b64 v[5:6], off, off offset:40 -; GFX11-SDAG-NEXT: scratch_load_b32 v4, off, off offset:36 -; GFX11-SDAG-NEXT: s_load_b32 s1, s[4:5], 0x30 -; GFX11-SDAG-NEXT: scratch_store_b128 off, v[7:10], off -; GFX11-SDAG-NEXT: s_clause 0x1 -; GFX11-SDAG-NEXT: scratch_load_b64 v[1:2], off, off offset:8 -; GFX11-SDAG-NEXT: scratch_load_b32 v0, off, off offset:4 -; GFX11-SDAG-NEXT: v_mov_b32_e32 v7, s6 -; GFX11-SDAG-NEXT: v_mov_b32_e32 v9, s0 +; GFX11-SDAG-NEXT: s_load_b32 s13, s[4:5], 0x30 +; GFX11-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x20 +; GFX11-SDAG-NEXT: s_mov_b32 s5, s12 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0) -; GFX11-SDAG-NEXT: v_mov_b32_e32 v3, s1 -; GFX11-SDAG-NEXT: s_mov_b32 s1, exec_lo -; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) -; GFX11-SDAG-NEXT: .LBB0_1: ; =>This Inner Loop Header: Depth=1 -; GFX11-SDAG-NEXT: v_readfirstlane_b32 s4, v4 -; GFX11-SDAG-NEXT: v_readfirstlane_b32 s5, v5 -; GFX11-SDAG-NEXT: v_readfirstlane_b32 s6, v6 -; GFX11-SDAG-NEXT: v_readfirstlane_b32 s7, v7 -; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-SDAG-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[4:5] -; GFX11-SDAG-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[6:7] -; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) -; GFX11-SDAG-NEXT: s_and_b32 s0, vcc_lo, s0 -; GFX11-SDAG-NEXT: s_and_saveexec_b32 s0, s0 -; GFX11-SDAG-NEXT: buffer_load_b32 v8, v9, s[4:7], 0 offen slc dlc -; GFX11-SDAG-NEXT: ; implicit-def: $vgpr4_vgpr5_vgpr6_vgpr7 -; GFX11-SDAG-NEXT: ; implicit-def: $vgpr9 -; GFX11-SDAG-NEXT: s_xor_b32 exec_lo, exec_lo, s0 -; GFX11-SDAG-NEXT: s_cbranch_execnz .LBB0_1 -; GFX11-SDAG-NEXT: ; %bb.2: -; GFX11-SDAG-NEXT: s_mov_b32 exec_lo, s1 -; GFX11-SDAG-NEXT: v_mov_b32_e32 v4, s8 -; GFX11-SDAG-NEXT: s_mov_b32 s0, exec_lo -; GFX11-SDAG-NEXT: .LBB0_3: ; =>This Inner Loop Header: Depth=1 -; GFX11-SDAG-NEXT: v_readfirstlane_b32 s4, v0 -; GFX11-SDAG-NEXT: v_readfirstlane_b32 s5, v1 -; GFX11-SDAG-NEXT: v_readfirstlane_b32 s6, v2 -; GFX11-SDAG-NEXT: v_readfirstlane_b32 s7, v3 -; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-SDAG-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[0:1] -; GFX11-SDAG-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[2:3] -; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) -; GFX11-SDAG-NEXT: s_and_b32 s0, vcc_lo, s0 -; GFX11-SDAG-NEXT: s_and_saveexec_b32 s0, s0 +; GFX11-SDAG-NEXT: v_mov_b32_e32 v1, s0 +; GFX11-SDAG-NEXT: s_mov_b32 s4, s3 +; GFX11-SDAG-NEXT: s_mov_b32 s3, s12 +; GFX11-SDAG-NEXT: s_or_b64 s[6:7], s[4:5], s[12:13] +; GFX11-SDAG-NEXT: s_mov_b32 s13, s2 +; GFX11-SDAG-NEXT: s_mov_b32 s2, s1 +; GFX11-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-SDAG-NEXT: s_or_b64 s[4:5], s[2:3], s[12:13] ; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) -; GFX11-SDAG-NEXT: buffer_store_b32 v8, v4, s[4:7], 0 offen glc slc dlc -; GFX11-SDAG-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3 -; GFX11-SDAG-NEXT: ; implicit-def: $vgpr8 -; GFX11-SDAG-NEXT: ; implicit-def: $vgpr4 -; GFX11-SDAG-NEXT: s_xor_b32 exec_lo, exec_lo, s0 -; GFX11-SDAG-NEXT: s_cbranch_execnz .LBB0_3 -; GFX11-SDAG-NEXT: ; %bb.4: +; GFX11-SDAG-NEXT: buffer_store_b32 v0, v1, s[4:7], 0 offen glc slc dlc ; GFX11-SDAG-NEXT: s_endpgm ; ; GFX11-GISEL-LABEL: buffer_nontemporal_load_store: @@ -330,76 +266,37 @@ define amdgpu_kernel void @buffer_nontemporal_load_store(ptr addrspace(7) %in, p ; ; GFX12-SDAG-LABEL: buffer_nontemporal_load_store: ; GFX12-SDAG: ; %bb.0: ; %entry -; GFX12-SDAG-NEXT: s_clause 0x2 +; GFX12-SDAG-NEXT: s_clause 0x1 ; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x0 -; GFX12-SDAG-NEXT: s_load_b128 s[8:11], s[4:5], 0x20 -; GFX12-SDAG-NEXT: s_load_b32 s6, s[4:5], 0x10 +; GFX12-SDAG-NEXT: s_load_b32 s13, s[4:5], 0x10 +; GFX12-SDAG-NEXT: s_mov_b32 s12, 0 +; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX12-SDAG-NEXT: s_mov_b32 s7, s12 +; GFX12-SDAG-NEXT: s_mov_b32 s9, s12 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0 -; GFX12-SDAG-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1 -; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3 -; GFX12-SDAG-NEXT: v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, s9 -; GFX12-SDAG-NEXT: v_dual_mov_b32 v9, s10 :: v_dual_mov_b32 v10, s11 -; GFX12-SDAG-NEXT: scratch_store_b128 off, v[0:3], off offset:32 -; GFX12-SDAG-NEXT: s_clause 0x1 -; GFX12-SDAG-NEXT: scratch_load_b64 v[5:6], off, off offset:40 -; GFX12-SDAG-NEXT: scratch_load_b32 v4, off, off offset:36 -; GFX12-SDAG-NEXT: s_load_b32 s1, s[4:5], 0x30 -; GFX12-SDAG-NEXT: scratch_store_b128 off, v[7:10], off +; GFX12-SDAG-NEXT: s_mov_b32 s6, s3 +; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s0 +; GFX12-SDAG-NEXT: s_mov_b32 s8, s1 +; GFX12-SDAG-NEXT: s_or_b64 s[10:11], s[6:7], s[12:13] +; GFX12-SDAG-NEXT: s_mov_b32 s13, s2 +; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX12-SDAG-NEXT: s_or_b64 s[8:9], s[8:9], s[12:13] +; GFX12-SDAG-NEXT: buffer_load_b32 v0, v0, s[8:11], null offen th:TH_LOAD_NT ; GFX12-SDAG-NEXT: s_clause 0x1 -; GFX12-SDAG-NEXT: scratch_load_b64 v[1:2], off, off offset:8 -; GFX12-SDAG-NEXT: scratch_load_b32 v0, off, off offset:4 -; GFX12-SDAG-NEXT: v_mov_b32_e32 v7, s6 -; GFX12-SDAG-NEXT: v_mov_b32_e32 v9, s0 +; GFX12-SDAG-NEXT: s_load_b32 s13, s[4:5], 0x30 +; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x20 +; GFX12-SDAG-NEXT: s_mov_b32 s5, s12 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0 -; GFX12-SDAG-NEXT: v_mov_b32_e32 v3, s1 -; GFX12-SDAG-NEXT: s_mov_b32 s1, exec_lo -; GFX12-SDAG-NEXT: .LBB0_1: ; =>This Inner Loop Header: Depth=1 -; GFX12-SDAG-NEXT: s_wait_loadcnt 0x2 -; GFX12-SDAG-NEXT: v_readfirstlane_b32 s4, v4 -; GFX12-SDAG-NEXT: v_readfirstlane_b32 s5, v5 -; GFX12-SDAG-NEXT: v_readfirstlane_b32 s6, v6 -; GFX12-SDAG-NEXT: v_readfirstlane_b32 s7, v7 -; GFX12-SDAG-NEXT: s_wait_alu 0xf1ff -; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX12-SDAG-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[4:5] -; GFX12-SDAG-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[6:7] -; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX12-SDAG-NEXT: s_and_b32 s0, vcc_lo, s0 -; GFX12-SDAG-NEXT: s_wait_alu 0xfffe -; GFX12-SDAG-NEXT: s_and_saveexec_b32 s0, s0 -; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0 -; GFX12-SDAG-NEXT: buffer_load_b32 v8, v9, s[4:7], null offen th:TH_LOAD_NT -; GFX12-SDAG-NEXT: ; implicit-def: $vgpr4_vgpr5_vgpr6_vgpr7 -; GFX12-SDAG-NEXT: ; implicit-def: $vgpr9 -; GFX12-SDAG-NEXT: s_xor_b32 exec_lo, exec_lo, s0 -; GFX12-SDAG-NEXT: s_cbranch_execnz .LBB0_1 -; GFX12-SDAG-NEXT: ; %bb.2: -; GFX12-SDAG-NEXT: s_mov_b32 exec_lo, s1 -; GFX12-SDAG-NEXT: v_mov_b32_e32 v4, s8 -; GFX12-SDAG-NEXT: s_mov_b32 s0, exec_lo -; GFX12-SDAG-NEXT: .LBB0_3: ; =>This Inner Loop Header: Depth=1 -; GFX12-SDAG-NEXT: s_wait_loadcnt 0x1 -; GFX12-SDAG-NEXT: v_readfirstlane_b32 s4, v0 -; GFX12-SDAG-NEXT: v_readfirstlane_b32 s5, v1 -; GFX12-SDAG-NEXT: v_readfirstlane_b32 s6, v2 -; GFX12-SDAG-NEXT: v_readfirstlane_b32 s7, v3 -; GFX12-SDAG-NEXT: s_wait_alu 0xf1ff -; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX12-SDAG-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[0:1] -; GFX12-SDAG-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[2:3] -; GFX12-SDAG-NEXT: s_wait_alu 0xfffe -; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX12-SDAG-NEXT: s_and_b32 s0, vcc_lo, s0 -; GFX12-SDAG-NEXT: s_wait_alu 0xfffe -; GFX12-SDAG-NEXT: s_and_saveexec_b32 s0, s0 +; GFX12-SDAG-NEXT: v_mov_b32_e32 v1, s0 +; GFX12-SDAG-NEXT: s_mov_b32 s4, s3 +; GFX12-SDAG-NEXT: s_mov_b32 s3, s12 +; GFX12-SDAG-NEXT: s_or_b64 s[6:7], s[4:5], s[12:13] +; GFX12-SDAG-NEXT: s_mov_b32 s13, s2 +; GFX12-SDAG-NEXT: s_mov_b32 s2, s1 +; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX12-SDAG-NEXT: s_or_b64 s[4:5], s[2:3], s[12:13] ; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0 -; GFX12-SDAG-NEXT: buffer_store_b32 v8, v4, s[4:7], null offen th:TH_STORE_NT -; GFX12-SDAG-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3 -; GFX12-SDAG-NEXT: ; implicit-def: $vgpr8 -; GFX12-SDAG-NEXT: ; implicit-def: $vgpr4 -; GFX12-SDAG-NEXT: s_xor_b32 exec_lo, exec_lo, s0 -; GFX12-SDAG-NEXT: s_cbranch_execnz .LBB0_3 -; GFX12-SDAG-NEXT: ; %bb.4: +; GFX12-SDAG-NEXT: buffer_store_b32 v0, v1, s[4:7], null offen th:TH_STORE_NT ; GFX12-SDAG-NEXT: s_endpgm ; ; GFX12-GISEL-LABEL: buffer_nontemporal_load_store: @@ -444,30 +341,32 @@ entry: define amdgpu_kernel void @buffer_nontemporal_and_volatile_load_store(ptr addrspace(7) %in, ptr addrspace(7) %out) { ; GFX9-SDAG-LABEL: buffer_nontemporal_and_volatile_load_store: ; GFX9-SDAG: ; %bb.0: ; %entry -; GFX9-SDAG-NEXT: s_load_dwordx4 s[4:7], s[8:9], 0x0 +; GFX9-SDAG-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0 ; GFX9-SDAG-NEXT: s_load_dword s11, s[8:9], 0x10 ; GFX9-SDAG-NEXT: s_mov_b32 s10, 0 -; GFX9-SDAG-NEXT: s_add_u32 s0, s0, s15 -; GFX9-SDAG-NEXT: s_mov_b32 s15, s10 +; GFX9-SDAG-NEXT: s_mov_b32 s5, s10 ; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-SDAG-NEXT: s_mov_b32 s14, s7 -; GFX9-SDAG-NEXT: s_addc_u32 s1, s1, 0 -; GFX9-SDAG-NEXT: s_mov_b32 s12, s5 -; GFX9-SDAG-NEXT: s_or_b64 s[14:15], s[14:15], s[10:11] -; GFX9-SDAG-NEXT: s_mov_b32 s13, s6 -; GFX9-SDAG-NEXT: v_mov_b32_e32 v0, s4 -; GFX9-SDAG-NEXT: buffer_load_dword v0, v0, s[12:15], 0 offen glc +; GFX9-SDAG-NEXT: s_mov_b32 s4, s3 +; GFX9-SDAG-NEXT: s_or_b64 s[6:7], s[4:5], s[10:11] +; GFX9-SDAG-NEXT: s_mov_b32 s11, s2 +; GFX9-SDAG-NEXT: s_mov_b32 s2, s1 +; GFX9-SDAG-NEXT: s_mov_b32 s3, s10 +; GFX9-SDAG-NEXT: s_or_b64 s[4:5], s[2:3], s[10:11] +; GFX9-SDAG-NEXT: v_mov_b32_e32 v0, s0 +; GFX9-SDAG-NEXT: buffer_load_dword v0, v0, s[4:7], 0 offen glc ; GFX9-SDAG-NEXT: s_load_dword s11, s[8:9], 0x30 -; GFX9-SDAG-NEXT: s_load_dwordx4 s[4:7], s[8:9], 0x20 -; GFX9-SDAG-NEXT: s_mov_b32 s9, s10 +; GFX9-SDAG-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x20 +; GFX9-SDAG-NEXT: s_mov_b32 s5, s10 ; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0) -; GFX9-SDAG-NEXT: s_mov_b32 s8, s7 -; GFX9-SDAG-NEXT: s_or_b64 s[10:11], s[8:9], s[10:11] -; GFX9-SDAG-NEXT: s_mov_b32 s8, s5 -; GFX9-SDAG-NEXT: s_mov_b32 s9, s6 -; GFX9-SDAG-NEXT: v_mov_b32_e32 v1, s4 +; GFX9-SDAG-NEXT: s_mov_b32 s4, s3 +; GFX9-SDAG-NEXT: s_or_b64 s[6:7], s[4:5], s[10:11] +; GFX9-SDAG-NEXT: s_mov_b32 s11, s2 +; GFX9-SDAG-NEXT: s_mov_b32 s2, s1 +; GFX9-SDAG-NEXT: s_mov_b32 s3, s10 +; GFX9-SDAG-NEXT: s_or_b64 s[4:5], s[2:3], s[10:11] +; GFX9-SDAG-NEXT: v_mov_b32_e32 v1, s0 ; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) -; GFX9-SDAG-NEXT: buffer_store_dword v0, v1, s[8:11], 0 offen +; GFX9-SDAG-NEXT: buffer_store_dword v0, v1, s[4:7], 0 offen ; GFX9-SDAG-NEXT: s_endpgm ; ; GFX9-GISEL-LABEL: buffer_nontemporal_and_volatile_load_store: @@ -503,68 +402,31 @@ define amdgpu_kernel void @buffer_nontemporal_and_volatile_load_store(ptr addrsp ; GFX940-SDAG-LABEL: buffer_nontemporal_and_volatile_load_store: ; GFX940-SDAG: ; %bb.0: ; %entry ; GFX940-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 -; GFX940-SDAG-NEXT: s_load_dword s6, s[4:5], 0x10 -; GFX940-SDAG-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x20 -; GFX940-SDAG-NEXT: s_load_dword s7, s[4:5], 0x30 +; GFX940-SDAG-NEXT: s_load_dword s13, s[4:5], 0x10 +; GFX940-SDAG-NEXT: s_mov_b32 s12, 0 +; GFX940-SDAG-NEXT: s_mov_b32 s7, s12 ; GFX940-SDAG-NEXT: s_waitcnt lgkmcnt(0) -; GFX940-SDAG-NEXT: v_mov_b64_e32 v[0:1], s[0:1] -; GFX940-SDAG-NEXT: v_mov_b64_e32 v[2:3], s[2:3] -; GFX940-SDAG-NEXT: scratch_store_dwordx4 off, v[0:3], off offset:32 sc0 sc1 -; GFX940-SDAG-NEXT: scratch_load_dwordx2 v[10:11], off, off offset:40 -; GFX940-SDAG-NEXT: scratch_load_dword v4, off, off offset:36 -; GFX940-SDAG-NEXT: v_mov_b64_e32 v[0:1], s[8:9] -; GFX940-SDAG-NEXT: v_mov_b64_e32 v[2:3], s[10:11] -; GFX940-SDAG-NEXT: scratch_store_dwordx4 off, v[0:3], off sc0 sc1 -; GFX940-SDAG-NEXT: scratch_load_dwordx2 v[12:13], off, off offset:8 -; GFX940-SDAG-NEXT: s_nop 0 -; GFX940-SDAG-NEXT: scratch_load_dword v0, off, off offset:4 -; GFX940-SDAG-NEXT: v_mov_b32_e32 v7, s6 -; GFX940-SDAG-NEXT: v_mov_b32_e32 v3, s7 -; GFX940-SDAG-NEXT: v_mov_b32_e32 v9, s0 -; GFX940-SDAG-NEXT: s_mov_b64 s[2:3], exec -; GFX940-SDAG-NEXT: s_waitcnt vmcnt(4) -; GFX940-SDAG-NEXT: v_mov_b32_e32 v5, v10 -; GFX940-SDAG-NEXT: v_mov_b32_e32 v6, v11 -; GFX940-SDAG-NEXT: s_waitcnt vmcnt(1) -; GFX940-SDAG-NEXT: v_mov_b32_e32 v1, v12 -; GFX940-SDAG-NEXT: v_mov_b32_e32 v2, v13 -; GFX940-SDAG-NEXT: .LBB1_1: ; =>This Inner Loop Header: Depth=1 -; GFX940-SDAG-NEXT: v_readfirstlane_b32 s4, v4 -; GFX940-SDAG-NEXT: v_readfirstlane_b32 s5, v5 -; GFX940-SDAG-NEXT: v_readfirstlane_b32 s6, v6 -; GFX940-SDAG-NEXT: v_readfirstlane_b32 s7, v7 -; GFX940-SDAG-NEXT: v_cmp_eq_u64_e32 vcc, s[4:5], v[4:5] -; GFX940-SDAG-NEXT: s_nop 0 -; GFX940-SDAG-NEXT: v_cmp_eq_u64_e64 s[0:1], s[6:7], v[6:7] -; GFX940-SDAG-NEXT: s_and_b64 s[0:1], vcc, s[0:1] -; GFX940-SDAG-NEXT: s_and_saveexec_b64 s[0:1], s[0:1] -; GFX940-SDAG-NEXT: buffer_load_dword v8, v9, s[4:7], 0 offen sc0 sc1 -; GFX940-SDAG-NEXT: ; implicit-def: $vgpr4_vgpr5_vgpr6_vgpr7 -; GFX940-SDAG-NEXT: ; implicit-def: $vgpr9 -; GFX940-SDAG-NEXT: s_xor_b64 exec, exec, s[0:1] -; GFX940-SDAG-NEXT: s_cbranch_execnz .LBB1_1 -; GFX940-SDAG-NEXT: ; %bb.2: -; GFX940-SDAG-NEXT: s_mov_b64 exec, s[2:3] -; GFX940-SDAG-NEXT: v_mov_b32_e32 v4, s8 -; GFX940-SDAG-NEXT: s_mov_b64 s[0:1], exec +; GFX940-SDAG-NEXT: s_mov_b32 s6, s3 +; GFX940-SDAG-NEXT: s_or_b64 s[10:11], s[6:7], s[12:13] +; GFX940-SDAG-NEXT: s_mov_b32 s13, s2 +; GFX940-SDAG-NEXT: s_mov_b32 s2, s1 +; GFX940-SDAG-NEXT: s_mov_b32 s3, s12 +; GFX940-SDAG-NEXT: s_or_b64 s[8:9], s[2:3], s[12:13] +; GFX940-SDAG-NEXT: v_mov_b32_e32 v0, s0 +; GFX940-SDAG-NEXT: buffer_load_dword v0, v0, s[8:11], 0 offen sc0 sc1 +; GFX940-SDAG-NEXT: s_load_dword s13, s[4:5], 0x30 +; GFX940-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x20 +; GFX940-SDAG-NEXT: s_mov_b32 s5, s12 +; GFX940-SDAG-NEXT: s_waitcnt lgkmcnt(0) +; GFX940-SDAG-NEXT: s_mov_b32 s4, s3 +; GFX940-SDAG-NEXT: s_or_b64 s[6:7], s[4:5], s[12:13] +; GFX940-SDAG-NEXT: s_mov_b32 s13, s2 +; GFX940-SDAG-NEXT: s_mov_b32 s2, s1 +; GFX940-SDAG-NEXT: s_mov_b32 s3, s12 +; GFX940-SDAG-NEXT: s_or_b64 s[4:5], s[2:3], s[12:13] +; GFX940-SDAG-NEXT: v_mov_b32_e32 v1, s0 ; GFX940-SDAG-NEXT: s_waitcnt vmcnt(0) -; GFX940-SDAG-NEXT: .LBB1_3: ; =>This Inner Loop Header: Depth=1 -; GFX940-SDAG-NEXT: v_readfirstlane_b32 s4, v0 -; GFX940-SDAG-NEXT: v_readfirstlane_b32 s5, v1 -; GFX940-SDAG-NEXT: v_readfirstlane_b32 s6, v2 -; GFX940-SDAG-NEXT: v_readfirstlane_b32 s7, v3 -; GFX940-SDAG-NEXT: v_cmp_eq_u64_e32 vcc, s[4:5], v[0:1] -; GFX940-SDAG-NEXT: s_nop 0 -; GFX940-SDAG-NEXT: v_cmp_eq_u64_e64 s[0:1], s[6:7], v[2:3] -; GFX940-SDAG-NEXT: s_and_b64 s[0:1], vcc, s[0:1] -; GFX940-SDAG-NEXT: s_and_saveexec_b64 s[0:1], s[0:1] -; GFX940-SDAG-NEXT: buffer_store_dword v8, v4, s[4:7], 0 offen sc0 sc1 -; GFX940-SDAG-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3 -; GFX940-SDAG-NEXT: ; implicit-def: $vgpr8 -; GFX940-SDAG-NEXT: ; implicit-def: $vgpr4 -; GFX940-SDAG-NEXT: s_xor_b64 exec, exec, s[0:1] -; GFX940-SDAG-NEXT: s_cbranch_execnz .LBB1_3 -; GFX940-SDAG-NEXT: ; %bb.4: +; GFX940-SDAG-NEXT: buffer_store_dword v0, v1, s[4:7], 0 offen sc0 sc1 ; GFX940-SDAG-NEXT: s_endpgm ; ; GFX940-GISEL-LABEL: buffer_nontemporal_and_volatile_load_store: @@ -600,31 +462,34 @@ define amdgpu_kernel void @buffer_nontemporal_and_volatile_load_store(ptr addrsp ; GFX10-SDAG-LABEL: buffer_nontemporal_and_volatile_load_store: ; GFX10-SDAG: ; %bb.0: ; %entry ; GFX10-SDAG-NEXT: s_clause 0x1 -; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[8:9], 0x0 +; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0 ; GFX10-SDAG-NEXT: s_load_dword s11, s[8:9], 0x10 ; GFX10-SDAG-NEXT: s_mov_b32 s10, 0 -; GFX10-SDAG-NEXT: s_add_u32 s0, s0, s15 +; GFX10-SDAG-NEXT: s_mov_b32 s5, s10 ; GFX10-SDAG-NEXT: s_mov_b32 s13, s10 -; GFX10-SDAG-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0) -; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s4 -; GFX10-SDAG-NEXT: s_mov_b32 s12, s7 -; GFX10-SDAG-NEXT: s_or_b64 s[14:15], s[12:13], s[10:11] -; GFX10-SDAG-NEXT: s_mov_b32 s12, s5 -; GFX10-SDAG-NEXT: s_mov_b32 s13, s6 -; GFX10-SDAG-NEXT: buffer_load_dword v0, v0, s[12:15], 0 offen glc dlc +; GFX10-SDAG-NEXT: s_mov_b32 s4, s3 +; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s0 +; GFX10-SDAG-NEXT: s_mov_b32 s12, s1 +; GFX10-SDAG-NEXT: s_or_b64 s[6:7], s[4:5], s[10:11] +; GFX10-SDAG-NEXT: s_mov_b32 s11, s2 +; GFX10-SDAG-NEXT: s_or_b64 s[4:5], s[12:13], s[10:11] +; GFX10-SDAG-NEXT: buffer_load_dword v0, v0, s[4:7], 0 offen glc dlc ; GFX10-SDAG-NEXT: s_clause 0x1 ; GFX10-SDAG-NEXT: s_load_dword s11, s[8:9], 0x30 -; GFX10-SDAG-NEXT: s_load_dwordx4 s[4:7], s[8:9], 0x20 -; GFX10-SDAG-NEXT: s_mov_b32 s9, s10 +; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x20 +; GFX10-SDAG-NEXT: s_waitcnt_depctr 0xffe3 +; GFX10-SDAG-NEXT: s_mov_b32 s5, s10 ; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0) -; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s4 -; GFX10-SDAG-NEXT: s_mov_b32 s8, s7 -; GFX10-SDAG-NEXT: s_or_b64 s[10:11], s[8:9], s[10:11] -; GFX10-SDAG-NEXT: s_mov_b32 s8, s5 -; GFX10-SDAG-NEXT: s_mov_b32 s9, s6 +; GFX10-SDAG-NEXT: s_mov_b32 s4, s3 +; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s0 +; GFX10-SDAG-NEXT: s_or_b64 s[6:7], s[4:5], s[10:11] +; GFX10-SDAG-NEXT: s_mov_b32 s11, s2 +; GFX10-SDAG-NEXT: s_mov_b32 s2, s1 +; GFX10-SDAG-NEXT: s_mov_b32 s3, s10 +; GFX10-SDAG-NEXT: s_or_b64 s[4:5], s[2:3], s[10:11] ; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) -; GFX10-SDAG-NEXT: buffer_store_dword v0, v1, s[8:11], 0 offen +; GFX10-SDAG-NEXT: buffer_store_dword v0, v1, s[4:7], 0 offen ; GFX10-SDAG-NEXT: s_endpgm ; ; GFX10-GISEL-LABEL: buffer_nontemporal_and_volatile_load_store: @@ -660,69 +525,37 @@ define amdgpu_kernel void @buffer_nontemporal_and_volatile_load_store(ptr addrsp ; ; GFX11-SDAG-LABEL: buffer_nontemporal_and_volatile_load_store: ; GFX11-SDAG: ; %bb.0: ; %entry -; GFX11-SDAG-NEXT: s_clause 0x2 +; GFX11-SDAG-NEXT: s_clause 0x1 ; GFX11-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x0 -; GFX11-SDAG-NEXT: s_load_b128 s[8:11], s[4:5], 0x20 -; GFX11-SDAG-NEXT: s_load_b32 s6, s[4:5], 0x10 +; GFX11-SDAG-NEXT: s_load_b32 s13, s[4:5], 0x10 +; GFX11-SDAG-NEXT: s_mov_b32 s12, 0 +; GFX11-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-SDAG-NEXT: s_mov_b32 s7, s12 +; GFX11-SDAG-NEXT: s_mov_b32 s9, s12 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0) -; GFX11-SDAG-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1 -; GFX11-SDAG-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3 -; GFX11-SDAG-NEXT: v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, s9 -; GFX11-SDAG-NEXT: v_dual_mov_b32 v9, s10 :: v_dual_mov_b32 v10, s11 -; GFX11-SDAG-NEXT: scratch_store_b128 off, v[0:3], off offset:32 +; GFX11-SDAG-NEXT: s_mov_b32 s6, s3 +; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, s0 +; GFX11-SDAG-NEXT: s_mov_b32 s8, s1 +; GFX11-SDAG-NEXT: s_or_b64 s[10:11], s[6:7], s[12:13] +; GFX11-SDAG-NEXT: s_mov_b32 s13, s2 +; GFX11-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-SDAG-NEXT: s_or_b64 s[8:9], s[8:9], s[12:13] +; GFX11-SDAG-NEXT: buffer_load_b32 v0, v0, s[8:11], 0 offen glc dlc ; GFX11-SDAG-NEXT: s_clause 0x1 -; GFX11-SDAG-NEXT: scratch_load_b64 v[5:6], off, off offset:40 -; GFX11-SDAG-NEXT: scratch_load_b32 v4, off, off offset:36 -; GFX11-SDAG-NEXT: s_load_b32 s1, s[4:5], 0x30 -; GFX11-SDAG-NEXT: scratch_store_b128 off, v[7:10], off -; GFX11-SDAG-NEXT: s_clause 0x1 -; GFX11-SDAG-NEXT: scratch_load_b64 v[1:2], off, off offset:8 -; GFX11-SDAG-NEXT: scratch_load_b32 v0, off, off offset:4 -; GFX11-SDAG-NEXT: v_mov_b32_e32 v7, s6 -; GFX11-SDAG-NEXT: v_mov_b32_e32 v9, s0 +; GFX11-SDAG-NEXT: s_load_b32 s13, s[4:5], 0x30 +; GFX11-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x20 +; GFX11-SDAG-NEXT: s_mov_b32 s5, s12 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0) -; GFX11-SDAG-NEXT: v_mov_b32_e32 v3, s1 -; GFX11-SDAG-NEXT: s_mov_b32 s1, exec_lo -; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) -; GFX11-SDAG-NEXT: .LBB1_1: ; =>This Inner Loop Header: Depth=1 -; GFX11-SDAG-NEXT: v_readfirstlane_b32 s4, v4 -; GFX11-SDAG-NEXT: v_readfirstlane_b32 s5, v5 -; GFX11-SDAG-NEXT: v_readfirstlane_b32 s6, v6 -; GFX11-SDAG-NEXT: v_readfirstlane_b32 s7, v7 -; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-SDAG-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[4:5] -; GFX11-SDAG-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[6:7] -; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) -; GFX11-SDAG-NEXT: s_and_b32 s0, vcc_lo, s0 -; GFX11-SDAG-NEXT: s_and_saveexec_b32 s0, s0 -; GFX11-SDAG-NEXT: buffer_load_b32 v8, v9, s[4:7], 0 offen glc dlc -; GFX11-SDAG-NEXT: ; implicit-def: $vgpr4_vgpr5_vgpr6_vgpr7 -; GFX11-SDAG-NEXT: ; implicit-def: $vgpr9 -; GFX11-SDAG-NEXT: s_xor_b32 exec_lo, exec_lo, s0 -; GFX11-SDAG-NEXT: s_cbranch_execnz .LBB1_1 -; GFX11-SDAG-NEXT: ; %bb.2: -; GFX11-SDAG-NEXT: s_mov_b32 exec_lo, s1 -; GFX11-SDAG-NEXT: v_mov_b32_e32 v4, s8 -; GFX11-SDAG-NEXT: s_mov_b32 s0, exec_lo -; GFX11-SDAG-NEXT: .LBB1_3: ; =>This Inner Loop Header: Depth=1 -; GFX11-SDAG-NEXT: v_readfirstlane_b32 s4, v0 -; GFX11-SDAG-NEXT: v_readfirstlane_b32 s5, v1 -; GFX11-SDAG-NEXT: v_readfirstlane_b32 s6, v2 -; GFX11-SDAG-NEXT: v_readfirstlane_b32 s7, v3 -; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-SDAG-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[0:1] -; GFX11-SDAG-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[2:3] -; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) -; GFX11-SDAG-NEXT: s_and_b32 s0, vcc_lo, s0 -; GFX11-SDAG-NEXT: s_and_saveexec_b32 s0, s0 +; GFX11-SDAG-NEXT: v_mov_b32_e32 v1, s0 +; GFX11-SDAG-NEXT: s_mov_b32 s4, s3 +; GFX11-SDAG-NEXT: s_mov_b32 s3, s12 +; GFX11-SDAG-NEXT: s_or_b64 s[6:7], s[4:5], s[12:13] +; GFX11-SDAG-NEXT: s_mov_b32 s13, s2 +; GFX11-SDAG-NEXT: s_mov_b32 s2, s1 +; GFX11-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-SDAG-NEXT: s_or_b64 s[4:5], s[2:3], s[12:13] ; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) -; GFX11-SDAG-NEXT: buffer_store_b32 v8, v4, s[4:7], 0 offen dlc -; GFX11-SDAG-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3 -; GFX11-SDAG-NEXT: ; implicit-def: $vgpr8 -; GFX11-SDAG-NEXT: ; implicit-def: $vgpr4 -; GFX11-SDAG-NEXT: s_xor_b32 exec_lo, exec_lo, s0 -; GFX11-SDAG-NEXT: s_cbranch_execnz .LBB1_3 -; GFX11-SDAG-NEXT: ; %bb.4: +; GFX11-SDAG-NEXT: buffer_store_b32 v0, v1, s[4:7], 0 offen dlc ; GFX11-SDAG-NEXT: s_endpgm ; ; GFX11-GISEL-LABEL: buffer_nontemporal_and_volatile_load_store: @@ -761,77 +594,37 @@ define amdgpu_kernel void @buffer_nontemporal_and_volatile_load_store(ptr addrsp ; ; GFX12-SDAG-LABEL: buffer_nontemporal_and_volatile_load_store: ; GFX12-SDAG: ; %bb.0: ; %entry -; GFX12-SDAG-NEXT: s_clause 0x2 +; GFX12-SDAG-NEXT: s_clause 0x1 ; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x0 -; GFX12-SDAG-NEXT: s_load_b128 s[8:11], s[4:5], 0x20 -; GFX12-SDAG-NEXT: s_load_b32 s6, s[4:5], 0x10 +; GFX12-SDAG-NEXT: s_load_b32 s13, s[4:5], 0x10 +; GFX12-SDAG-NEXT: s_mov_b32 s12, 0 +; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX12-SDAG-NEXT: s_mov_b32 s7, s12 +; GFX12-SDAG-NEXT: s_mov_b32 s9, s12 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0 -; GFX12-SDAG-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1 -; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3 -; GFX12-SDAG-NEXT: v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, s9 -; GFX12-SDAG-NEXT: v_dual_mov_b32 v9, s10 :: v_dual_mov_b32 v10, s11 -; GFX12-SDAG-NEXT: scratch_store_b128 off, v[0:3], off offset:32 -; GFX12-SDAG-NEXT: s_clause 0x1 -; GFX12-SDAG-NEXT: scratch_load_b64 v[5:6], off, off offset:40 -; GFX12-SDAG-NEXT: scratch_load_b32 v4, off, off offset:36 -; GFX12-SDAG-NEXT: s_load_b32 s1, s[4:5], 0x30 -; GFX12-SDAG-NEXT: scratch_store_b128 off, v[7:10], off +; GFX12-SDAG-NEXT: s_mov_b32 s6, s3 +; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s0 +; GFX12-SDAG-NEXT: s_mov_b32 s8, s1 +; GFX12-SDAG-NEXT: s_or_b64 s[10:11], s[6:7], s[12:13] +; GFX12-SDAG-NEXT: s_mov_b32 s13, s2 +; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX12-SDAG-NEXT: s_or_b64 s[8:9], s[8:9], s[12:13] +; GFX12-SDAG-NEXT: buffer_load_b32 v0, v0, s[8:11], null offen th:TH_LOAD_NT scope:SCOPE_SYS ; GFX12-SDAG-NEXT: s_clause 0x1 -; GFX12-SDAG-NEXT: scratch_load_b64 v[1:2], off, off offset:8 -; GFX12-SDAG-NEXT: scratch_load_b32 v0, off, off offset:4 -; GFX12-SDAG-NEXT: v_mov_b32_e32 v7, s6 -; GFX12-SDAG-NEXT: v_mov_b32_e32 v9, s0 +; GFX12-SDAG-NEXT: s_load_b32 s13, s[4:5], 0x30 +; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x20 +; GFX12-SDAG-NEXT: s_mov_b32 s5, s12 ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0 -; GFX12-SDAG-NEXT: v_mov_b32_e32 v3, s1 -; GFX12-SDAG-NEXT: s_mov_b32 s1, exec_lo -; GFX12-SDAG-NEXT: .LBB1_1: ; =>This Inner Loop Header: Depth=1 -; GFX12-SDAG-NEXT: s_wait_loadcnt 0x2 -; GFX12-SDAG-NEXT: v_readfirstlane_b32 s4, v4 -; GFX12-SDAG-NEXT: v_readfirstlane_b32 s5, v5 -; GFX12-SDAG-NEXT: v_readfirstlane_b32 s6, v6 -; GFX12-SDAG-NEXT: v_readfirstlane_b32 s7, v7 -; GFX12-SDAG-NEXT: s_wait_alu 0xf1ff -; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX12-SDAG-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[4:5] -; GFX12-SDAG-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[6:7] -; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX12-SDAG-NEXT: s_and_b32 s0, vcc_lo, s0 -; GFX12-SDAG-NEXT: s_wait_alu 0xfffe -; GFX12-SDAG-NEXT: s_and_saveexec_b32 s0, s0 -; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0 -; GFX12-SDAG-NEXT: buffer_load_b32 v8, v9, s[4:7], null offen th:TH_LOAD_NT scope:SCOPE_SYS -; GFX12-SDAG-NEXT: ; implicit-def: $vgpr4_vgpr5_vgpr6_vgpr7 -; GFX12-SDAG-NEXT: ; implicit-def: $vgpr9 -; GFX12-SDAG-NEXT: s_xor_b32 exec_lo, exec_lo, s0 -; GFX12-SDAG-NEXT: s_cbranch_execnz .LBB1_1 -; GFX12-SDAG-NEXT: ; %bb.2: -; GFX12-SDAG-NEXT: s_mov_b32 exec_lo, s1 -; GFX12-SDAG-NEXT: v_mov_b32_e32 v4, s8 -; GFX12-SDAG-NEXT: s_mov_b32 s0, exec_lo -; GFX12-SDAG-NEXT: .LBB1_3: ; =>This Inner Loop Header: Depth=1 -; GFX12-SDAG-NEXT: s_wait_loadcnt 0x1 -; GFX12-SDAG-NEXT: v_readfirstlane_b32 s4, v0 -; GFX12-SDAG-NEXT: v_readfirstlane_b32 s5, v1 -; GFX12-SDAG-NEXT: v_readfirstlane_b32 s6, v2 -; GFX12-SDAG-NEXT: v_readfirstlane_b32 s7, v3 -; GFX12-SDAG-NEXT: s_wait_alu 0xf1ff -; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX12-SDAG-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[0:1] -; GFX12-SDAG-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[2:3] -; GFX12-SDAG-NEXT: s_wait_alu 0xfffe -; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX12-SDAG-NEXT: s_and_b32 s0, vcc_lo, s0 -; GFX12-SDAG-NEXT: s_wait_alu 0xfffe -; GFX12-SDAG-NEXT: s_and_saveexec_b32 s0, s0 +; GFX12-SDAG-NEXT: v_mov_b32_e32 v1, s0 +; GFX12-SDAG-NEXT: s_mov_b32 s4, s3 +; GFX12-SDAG-NEXT: s_mov_b32 s3, s12 +; GFX12-SDAG-NEXT: s_or_b64 s[6:7], s[4:5], s[12:13] +; GFX12-SDAG-NEXT: s_mov_b32 s13, s2 +; GFX12-SDAG-NEXT: s_mov_b32 s2, s1 +; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX12-SDAG-NEXT: s_or_b64 s[4:5], s[2:3], s[12:13] ; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0 -; GFX12-SDAG-NEXT: s_wait_storecnt 0x0 -; GFX12-SDAG-NEXT: buffer_store_b32 v8, v4, s[4:7], null offen th:TH_STORE_NT scope:SCOPE_SYS -; GFX12-SDAG-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3 -; GFX12-SDAG-NEXT: ; implicit-def: $vgpr8 -; GFX12-SDAG-NEXT: ; implicit-def: $vgpr4 -; GFX12-SDAG-NEXT: s_xor_b32 exec_lo, exec_lo, s0 -; GFX12-SDAG-NEXT: s_cbranch_execnz .LBB1_3 -; GFX12-SDAG-NEXT: ; %bb.4: +; GFX12-SDAG-NEXT: buffer_store_b32 v0, v1, s[4:7], null offen th:TH_STORE_NT scope:SCOPE_SYS ; GFX12-SDAG-NEXT: s_endpgm ; ; GFX12-GISEL-LABEL: buffer_nontemporal_and_volatile_load_store: