From a8467fd772fa6f49d45649df3e549ee1e49842f9 Mon Sep 17 00:00:00 2001 From: Luke Lau Date: Tue, 4 Feb 2025 16:44:41 +0800 Subject: [PATCH 1/4] Precommit tests --- llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll | 400 +++++++++++++++++++ 1 file changed, 400 insertions(+) diff --git a/llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll b/llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll index 163166c1df743..216810997e4a9 100644 --- a/llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll +++ b/llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll @@ -4031,3 +4031,403 @@ define @vfsgnjx_vf( %a, float %b, iXLen %2 = call @llvm.riscv.vfadd.nxv4f32.nxv4f32( poison, %1, %a, iXLen 7, iXLen %vl) ret %2 } + +define @vfmacc_vv( %a, %b, %c, iXLen %vl) { +; NOVLOPT-LABEL: vfmacc_vv: +; NOVLOPT: # %bb.0: +; NOVLOPT-NEXT: fsrmi a1, 3 +; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; NOVLOPT-NEXT: vfmacc.vv v8, v10, v12 +; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma +; NOVLOPT-NEXT: vfadd.vv v8, v8, v12 +; NOVLOPT-NEXT: fsrm a1 +; NOVLOPT-NEXT: ret +; +; VLOPT-LABEL: vfmacc_vv: +; VLOPT: # %bb.0: +; VLOPT-NEXT: fsrmi a1, 3 +; VLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; VLOPT-NEXT: vfmacc.vv v8, v10, v12 +; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma +; VLOPT-NEXT: vfadd.vv v8, v8, v12 +; VLOPT-NEXT: fsrm a1 +; VLOPT-NEXT: ret + %1 = call @llvm.riscv.vfmacc( %a, %b, %c, iXLen 3, iXLen -1, iXLen 0) + %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 3, iXLen %vl) + ret %2 +} + +define @vfmacc_vf( %a, float %b, %c, iXLen %vl) { +; NOVLOPT-LABEL: vfmacc_vf: +; NOVLOPT: # %bb.0: +; NOVLOPT-NEXT: fsrmi a1, 3 +; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; NOVLOPT-NEXT: vfmacc.vf v8, fa0, v10 +; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma +; NOVLOPT-NEXT: vfadd.vv v8, v8, v10 +; NOVLOPT-NEXT: fsrm a1 +; NOVLOPT-NEXT: ret +; +; VLOPT-LABEL: vfmacc_vf: +; VLOPT: # %bb.0: +; VLOPT-NEXT: fsrmi a1, 3 +; VLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; VLOPT-NEXT: vfmacc.vf v8, fa0, v10 +; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma +; VLOPT-NEXT: vfadd.vv v8, v8, v10 +; VLOPT-NEXT: fsrm a1 +; VLOPT-NEXT: ret + %1 = call @llvm.riscv.vfmacc( %a, float %b, %c, iXLen 3, iXLen -1, iXLen 0) + %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 3, iXLen %vl) + ret %2 +} + +define @vfnmacc_vv( %a, %b, %c, iXLen %vl) { +; NOVLOPT-LABEL: vfnmacc_vv: +; NOVLOPT: # %bb.0: +; NOVLOPT-NEXT: fsrmi a1, 3 +; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; NOVLOPT-NEXT: vfnmacc.vv v8, v10, v12 +; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma +; NOVLOPT-NEXT: vfadd.vv v8, v8, v12 +; NOVLOPT-NEXT: fsrm a1 +; NOVLOPT-NEXT: ret +; +; VLOPT-LABEL: vfnmacc_vv: +; VLOPT: # %bb.0: +; VLOPT-NEXT: fsrmi a1, 3 +; VLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; VLOPT-NEXT: vfnmacc.vv v8, v10, v12 +; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma +; VLOPT-NEXT: vfadd.vv v8, v8, v12 +; VLOPT-NEXT: fsrm a1 +; VLOPT-NEXT: ret + %1 = call @llvm.riscv.vfnmacc( %a, %b, %c, iXLen 3, iXLen -1, iXLen 0) + %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 3, iXLen %vl) + ret %2 +} + +define @vfnmacc_vf( %a, float %b, %c, iXLen %vl) { +; NOVLOPT-LABEL: vfnmacc_vf: +; NOVLOPT: # %bb.0: +; NOVLOPT-NEXT: fsrmi a1, 3 +; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; NOVLOPT-NEXT: vfnmacc.vf v8, fa0, v10 +; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma +; NOVLOPT-NEXT: vfadd.vv v8, v8, v10 +; NOVLOPT-NEXT: fsrm a1 +; NOVLOPT-NEXT: ret +; +; VLOPT-LABEL: vfnmacc_vf: +; VLOPT: # %bb.0: +; VLOPT-NEXT: fsrmi a1, 3 +; VLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; VLOPT-NEXT: vfnmacc.vf v8, fa0, v10 +; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma +; VLOPT-NEXT: vfadd.vv v8, v8, v10 +; VLOPT-NEXT: fsrm a1 +; VLOPT-NEXT: ret + %1 = call @llvm.riscv.vfnmacc( %a, float %b, %c, iXLen 3, iXLen -1, iXLen 0) + %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 3, iXLen %vl) + ret %2 +} + +define @vfmsac_vv( %a, %b, %c, iXLen %vl) { +; NOVLOPT-LABEL: vfmsac_vv: +; NOVLOPT: # %bb.0: +; NOVLOPT-NEXT: fsrmi a1, 3 +; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; NOVLOPT-NEXT: vfmsac.vv v8, v10, v12 +; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma +; NOVLOPT-NEXT: vfadd.vv v8, v8, v12 +; NOVLOPT-NEXT: fsrm a1 +; NOVLOPT-NEXT: ret +; +; VLOPT-LABEL: vfmsac_vv: +; VLOPT: # %bb.0: +; VLOPT-NEXT: fsrmi a1, 3 +; VLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; VLOPT-NEXT: vfmsac.vv v8, v10, v12 +; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma +; VLOPT-NEXT: vfadd.vv v8, v8, v12 +; VLOPT-NEXT: fsrm a1 +; VLOPT-NEXT: ret + %1 = call @llvm.riscv.vfmsac( %a, %b, %c, iXLen 3, iXLen -1, iXLen 0) + %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 3, iXLen %vl) + ret %2 +} + +define @vfmsac_vf( %a, float %b, %c, iXLen %vl) { +; NOVLOPT-LABEL: vfmsac_vf: +; NOVLOPT: # %bb.0: +; NOVLOPT-NEXT: fsrmi a1, 3 +; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; NOVLOPT-NEXT: vfmsac.vf v8, fa0, v10 +; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma +; NOVLOPT-NEXT: vfadd.vv v8, v8, v10 +; NOVLOPT-NEXT: fsrm a1 +; NOVLOPT-NEXT: ret +; +; VLOPT-LABEL: vfmsac_vf: +; VLOPT: # %bb.0: +; VLOPT-NEXT: fsrmi a1, 3 +; VLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; VLOPT-NEXT: vfmsac.vf v8, fa0, v10 +; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma +; VLOPT-NEXT: vfadd.vv v8, v8, v10 +; VLOPT-NEXT: fsrm a1 +; VLOPT-NEXT: ret + %1 = call @llvm.riscv.vfmsac( %a, float %b, %c, iXLen 3, iXLen -1, iXLen 0) + %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 3, iXLen %vl) + ret %2 +} + +define @vfnmsac_vv( %a, %b, %c, iXLen %vl) { +; NOVLOPT-LABEL: vfnmsac_vv: +; NOVLOPT: # %bb.0: +; NOVLOPT-NEXT: fsrmi a1, 3 +; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; NOVLOPT-NEXT: vfnmsac.vv v8, v10, v12 +; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma +; NOVLOPT-NEXT: vfadd.vv v8, v8, v12 +; NOVLOPT-NEXT: fsrm a1 +; NOVLOPT-NEXT: ret +; +; VLOPT-LABEL: vfnmsac_vv: +; VLOPT: # %bb.0: +; VLOPT-NEXT: fsrmi a1, 3 +; VLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; VLOPT-NEXT: vfnmsac.vv v8, v10, v12 +; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma +; VLOPT-NEXT: vfadd.vv v8, v8, v12 +; VLOPT-NEXT: fsrm a1 +; VLOPT-NEXT: ret + %1 = call @llvm.riscv.vfnmsac( %a, %b, %c, iXLen 3, iXLen -1, iXLen 0) + %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 3, iXLen %vl) + ret %2 +} + +define @vfnmsac_vf( %a, float %b, %c, iXLen %vl) { +; NOVLOPT-LABEL: vfnmsac_vf: +; NOVLOPT: # %bb.0: +; NOVLOPT-NEXT: fsrmi a1, 3 +; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; NOVLOPT-NEXT: vfnmsac.vf v8, fa0, v10 +; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma +; NOVLOPT-NEXT: vfadd.vv v8, v8, v10 +; NOVLOPT-NEXT: fsrm a1 +; NOVLOPT-NEXT: ret +; +; VLOPT-LABEL: vfnmsac_vf: +; VLOPT: # %bb.0: +; VLOPT-NEXT: fsrmi a1, 3 +; VLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; VLOPT-NEXT: vfnmsac.vf v8, fa0, v10 +; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma +; VLOPT-NEXT: vfadd.vv v8, v8, v10 +; VLOPT-NEXT: fsrm a1 +; VLOPT-NEXT: ret + %1 = call @llvm.riscv.vfnmsac( %a, float %b, %c, iXLen 3, iXLen -1, iXLen 0) + %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 3, iXLen %vl) + ret %2 +} + +define @vfmadd_vv( %a, %b, %c, iXLen %vl) { +; NOVLOPT-LABEL: vfmadd_vv: +; NOVLOPT: # %bb.0: +; NOVLOPT-NEXT: fsrmi a1, 3 +; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; NOVLOPT-NEXT: vfmadd.vv v8, v10, v12 +; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma +; NOVLOPT-NEXT: vfadd.vv v8, v8, v12 +; NOVLOPT-NEXT: fsrm a1 +; NOVLOPT-NEXT: ret +; +; VLOPT-LABEL: vfmadd_vv: +; VLOPT: # %bb.0: +; VLOPT-NEXT: fsrmi a1, 3 +; VLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; VLOPT-NEXT: vfmadd.vv v8, v10, v12 +; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma +; VLOPT-NEXT: vfadd.vv v8, v8, v12 +; VLOPT-NEXT: fsrm a1 +; VLOPT-NEXT: ret + %1 = call @llvm.riscv.vfmadd( %a, %b, %c, iXLen 3, iXLen -1, iXLen 0) + %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 3, iXLen %vl) + ret %2 +} + +define @vfmadd_vf( %a, float %b, %c, iXLen %vl) { +; NOVLOPT-LABEL: vfmadd_vf: +; NOVLOPT: # %bb.0: +; NOVLOPT-NEXT: fsrmi a1, 3 +; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; NOVLOPT-NEXT: vfmadd.vf v8, fa0, v10 +; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma +; NOVLOPT-NEXT: vfadd.vv v8, v8, v10 +; NOVLOPT-NEXT: fsrm a1 +; NOVLOPT-NEXT: ret +; +; VLOPT-LABEL: vfmadd_vf: +; VLOPT: # %bb.0: +; VLOPT-NEXT: fsrmi a1, 3 +; VLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; VLOPT-NEXT: vfmadd.vf v8, fa0, v10 +; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma +; VLOPT-NEXT: vfadd.vv v8, v8, v10 +; VLOPT-NEXT: fsrm a1 +; VLOPT-NEXT: ret + %1 = call @llvm.riscv.vfmadd( %a, float %b, %c, iXLen 3, iXLen -1, iXLen 0) + %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 3, iXLen %vl) + ret %2 +} + +define @vfnmadd_vv( %a, %b, %c, iXLen %vl) { +; NOVLOPT-LABEL: vfnmadd_vv: +; NOVLOPT: # %bb.0: +; NOVLOPT-NEXT: fsrmi a1, 3 +; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; NOVLOPT-NEXT: vfnmadd.vv v8, v10, v12 +; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma +; NOVLOPT-NEXT: vfadd.vv v8, v8, v12 +; NOVLOPT-NEXT: fsrm a1 +; NOVLOPT-NEXT: ret +; +; VLOPT-LABEL: vfnmadd_vv: +; VLOPT: # %bb.0: +; VLOPT-NEXT: fsrmi a1, 3 +; VLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; VLOPT-NEXT: vfnmadd.vv v8, v10, v12 +; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma +; VLOPT-NEXT: vfadd.vv v8, v8, v12 +; VLOPT-NEXT: fsrm a1 +; VLOPT-NEXT: ret + %1 = call @llvm.riscv.vfnmadd( %a, %b, %c, iXLen 3, iXLen -1, iXLen 0) + %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 3, iXLen %vl) + ret %2 +} + +define @vfnmadd_vf( %a, float %b, %c, iXLen %vl) { +; NOVLOPT-LABEL: vfnmadd_vf: +; NOVLOPT: # %bb.0: +; NOVLOPT-NEXT: fsrmi a1, 3 +; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; NOVLOPT-NEXT: vfnmadd.vf v8, fa0, v10 +; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma +; NOVLOPT-NEXT: vfadd.vv v8, v8, v10 +; NOVLOPT-NEXT: fsrm a1 +; NOVLOPT-NEXT: ret +; +; VLOPT-LABEL: vfnmadd_vf: +; VLOPT: # %bb.0: +; VLOPT-NEXT: fsrmi a1, 3 +; VLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; VLOPT-NEXT: vfnmadd.vf v8, fa0, v10 +; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma +; VLOPT-NEXT: vfadd.vv v8, v8, v10 +; VLOPT-NEXT: fsrm a1 +; VLOPT-NEXT: ret + %1 = call @llvm.riscv.vfnmadd( %a, float %b, %c, iXLen 3, iXLen -1, iXLen 0) + %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 3, iXLen %vl) + ret %2 +} + +define @vfmsub_vv( %a, %b, %c, iXLen %vl) { +; NOVLOPT-LABEL: vfmsub_vv: +; NOVLOPT: # %bb.0: +; NOVLOPT-NEXT: fsrmi a1, 3 +; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; NOVLOPT-NEXT: vfmsub.vv v8, v10, v12 +; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma +; NOVLOPT-NEXT: vfadd.vv v8, v8, v12 +; NOVLOPT-NEXT: fsrm a1 +; NOVLOPT-NEXT: ret +; +; VLOPT-LABEL: vfmsub_vv: +; VLOPT: # %bb.0: +; VLOPT-NEXT: fsrmi a1, 3 +; VLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; VLOPT-NEXT: vfmsub.vv v8, v10, v12 +; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma +; VLOPT-NEXT: vfadd.vv v8, v8, v12 +; VLOPT-NEXT: fsrm a1 +; VLOPT-NEXT: ret + %1 = call @llvm.riscv.vfmsub( %a, %b, %c, iXLen 3, iXLen -1, iXLen 0) + %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 3, iXLen %vl) + ret %2 +} + +define @vfmsub_vf( %a, float %b, %c, iXLen %vl) { +; NOVLOPT-LABEL: vfmsub_vf: +; NOVLOPT: # %bb.0: +; NOVLOPT-NEXT: fsrmi a1, 3 +; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; NOVLOPT-NEXT: vfmsub.vf v8, fa0, v10 +; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma +; NOVLOPT-NEXT: vfadd.vv v8, v8, v10 +; NOVLOPT-NEXT: fsrm a1 +; NOVLOPT-NEXT: ret +; +; VLOPT-LABEL: vfmsub_vf: +; VLOPT: # %bb.0: +; VLOPT-NEXT: fsrmi a1, 3 +; VLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; VLOPT-NEXT: vfmsub.vf v8, fa0, v10 +; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma +; VLOPT-NEXT: vfadd.vv v8, v8, v10 +; VLOPT-NEXT: fsrm a1 +; VLOPT-NEXT: ret + %1 = call @llvm.riscv.vfmsub( %a, float %b, %c, iXLen 3, iXLen -1, iXLen 0) + %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 3, iXLen %vl) + ret %2 +} + +define @vfnmsub_vv( %a, %b, %c, iXLen %vl) { +; NOVLOPT-LABEL: vfnmsub_vv: +; NOVLOPT: # %bb.0: +; NOVLOPT-NEXT: fsrmi a1, 3 +; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; NOVLOPT-NEXT: vfnmsub.vv v8, v10, v12 +; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma +; NOVLOPT-NEXT: vfadd.vv v8, v8, v12 +; NOVLOPT-NEXT: fsrm a1 +; NOVLOPT-NEXT: ret +; +; VLOPT-LABEL: vfnmsub_vv: +; VLOPT: # %bb.0: +; VLOPT-NEXT: fsrmi a1, 3 +; VLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; VLOPT-NEXT: vfnmsub.vv v8, v10, v12 +; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma +; VLOPT-NEXT: vfadd.vv v8, v8, v12 +; VLOPT-NEXT: fsrm a1 +; VLOPT-NEXT: ret + %1 = call @llvm.riscv.vfnmsub( %a, %b, %c, iXLen 3, iXLen -1, iXLen 0) + %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 3, iXLen %vl) + ret %2 +} + +define @vfnmsub_vf( %a, float %b, %c, iXLen %vl) { +; NOVLOPT-LABEL: vfnmsub_vf: +; NOVLOPT: # %bb.0: +; NOVLOPT-NEXT: fsrmi a1, 3 +; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; NOVLOPT-NEXT: vfnmsub.vf v8, fa0, v10 +; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma +; NOVLOPT-NEXT: vfadd.vv v8, v8, v10 +; NOVLOPT-NEXT: fsrm a1 +; NOVLOPT-NEXT: ret +; +; VLOPT-LABEL: vfnmsub_vf: +; VLOPT: # %bb.0: +; VLOPT-NEXT: fsrmi a1, 3 +; VLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; VLOPT-NEXT: vfnmsub.vf v8, fa0, v10 +; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma +; VLOPT-NEXT: vfadd.vv v8, v8, v10 +; VLOPT-NEXT: fsrm a1 +; VLOPT-NEXT: ret + %1 = call @llvm.riscv.vfnmsub( %a, float %b, %c, iXLen 3, iXLen -1, iXLen 0) + %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 3, iXLen %vl) + ret %2 +} From 5bc1337ab5f01babfc8f861d63ae87d74218b418 Mon Sep 17 00:00:00 2001 From: Luke Lau Date: Tue, 4 Feb 2025 16:46:34 +0800 Subject: [PATCH 2/4] [RISCV][VLOPT] Add support for Single-Width Floating-Point Fused Multiply-Add Instructions Strangely enough we already had support for widening vfwmadd and friends, but not vfmadd yet. --- llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp | 34 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll | 64 ++++++++++---------- 2 files changed, 66 insertions(+), 32 deletions(-) diff --git a/llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp b/llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp index 0960245b8362d..d4829bced2470 100644 --- a/llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp +++ b/llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp @@ -451,6 +451,23 @@ getOperandLog2EEW(const MachineOperand &MO, const MachineRegisterInfo *MRI) { case RISCV::VFDIV_VF: case RISCV::VFDIV_VV: case RISCV::VFRDIV_VF: + // Vector Single-Width Floating-Point Fused Multiply-Add Instructions + case RISCV::VFMACC_VV: + case RISCV::VFMACC_VF: + case RISCV::VFNMACC_VV: + case RISCV::VFNMACC_VF: + case RISCV::VFMSAC_VV: + case RISCV::VFMSAC_VF: + case RISCV::VFNMSAC_VV: + case RISCV::VFNMSAC_VF: + case RISCV::VFMADD_VV: + case RISCV::VFMADD_VF: + case RISCV::VFNMADD_VV: + case RISCV::VFNMADD_VF: + case RISCV::VFMSUB_VV: + case RISCV::VFMSUB_VF: + case RISCV::VFNMSUB_VV: + case RISCV::VFNMSUB_VF: // Vector Floating-Point Square-Root Instruction case RISCV::VFSQRT_V: // Vector Floating-Point Reciprocal Square-Root Estimate Instruction @@ -1016,6 +1033,23 @@ static bool isSupportedInstr(const MachineInstr &MI) { // Vector Widening Floating-Point Multiply case RISCV::VFWMUL_VF: case RISCV::VFWMUL_VV: + // Vector Single-Width Floating-Point Fused Multiply-Add Instructions + case RISCV::VFMACC_VV: + case RISCV::VFMACC_VF: + case RISCV::VFNMACC_VV: + case RISCV::VFNMACC_VF: + case RISCV::VFMSAC_VV: + case RISCV::VFMSAC_VF: + case RISCV::VFNMSAC_VV: + case RISCV::VFNMSAC_VF: + case RISCV::VFMADD_VV: + case RISCV::VFMADD_VF: + case RISCV::VFNMADD_VV: + case RISCV::VFNMADD_VF: + case RISCV::VFMSUB_VV: + case RISCV::VFMSUB_VF: + case RISCV::VFNMSUB_VV: + case RISCV::VFNMSUB_VF: // Vector Floating-Point MIN/MAX Instructions case RISCV::VFMIN_VF: case RISCV::VFMIN_VV: diff --git a/llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll b/llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll index 216810997e4a9..b2166da42a5c9 100644 --- a/llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll +++ b/llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll @@ -4046,9 +4046,9 @@ define @vfmacc_vv( %a, @vfmacc_vf( %a, float %b, @vfnmacc_vv( %a, @vfnmacc_vf( %a, float %b, @vfmsac_vv( %a, @vfmsac_vf( %a, float %b, @vfnmsac_vv( %a, @vfnmsac_vf( %a, float %b, @vfmadd_vv( %a, @vfmadd_vf( %a, float %b, @vfnmadd_vv( %a, @vfnmadd_vf( %a, float %b, @vfmsub_vv( %a, @vfmsub_vf( %a, float %b, @vfnmsub_vv( %a, @vfnmsub_vf( %a, float %b, Date: Tue, 4 Feb 2025 17:13:09 +0800 Subject: [PATCH 3/4] Update fixed-vectors-fp.ll --- .../CodeGen/RISCV/rvv/fixed-vectors-fp.ll | 30 +++++++------------ 1 file changed, 10 insertions(+), 20 deletions(-) diff --git a/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll index 9dbe261b7cd05..585a331e55094 100644 --- a/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll +++ b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll @@ -1444,13 +1444,12 @@ define void @fma_v6bf16(ptr %x, ptr %y, ptr %z) { ; CHECK-NEXT: vle16.v v8, (a2) ; CHECK-NEXT: vle16.v v9, (a0) ; CHECK-NEXT: vle16.v v10, (a1) -; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma ; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v8 ; CHECK-NEXT: vfwcvtbf16.f.f.v v14, v9 ; CHECK-NEXT: vfwcvtbf16.f.f.v v8, v10 ; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma ; CHECK-NEXT: vfmadd.vv v8, v14, v12 -; CHECK-NEXT: vsetivli zero, 6, e16, m1, ta, ma +; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma ; CHECK-NEXT: vfncvtbf16.f.f.w v10, v8 ; CHECK-NEXT: vse16.v v10, (a0) ; CHECK-NEXT: ret @@ -1513,13 +1512,12 @@ define void @fma_v6f16(ptr %x, ptr %y, ptr %z) { ; ZVFHMIN-NEXT: vle16.v v8, (a2) ; ZVFHMIN-NEXT: vle16.v v9, (a0) ; ZVFHMIN-NEXT: vle16.v v10, (a1) -; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v14, v9 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v10 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma ; ZVFHMIN-NEXT: vfmadd.vv v8, v14, v12 -; ZVFHMIN-NEXT: vsetivli zero, 6, e16, m1, ta, ma +; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v10, v8 ; ZVFHMIN-NEXT: vse16.v v10, (a0) ; ZVFHMIN-NEXT: ret @@ -1602,14 +1600,13 @@ define void @fmsub_v6bf16(ptr %x, ptr %y, ptr %z) { ; CHECK-NEXT: vle16.v v9, (a0) ; CHECK-NEXT: vle16.v v10, (a1) ; CHECK-NEXT: lui a1, 8 -; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma ; CHECK-NEXT: vxor.vx v8, v8, a1 ; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v9 ; CHECK-NEXT: vfwcvtbf16.f.f.v v14, v8 ; CHECK-NEXT: vfwcvtbf16.f.f.v v8, v10 ; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma ; CHECK-NEXT: vfmadd.vv v8, v12, v14 -; CHECK-NEXT: vsetivli zero, 6, e16, m1, ta, ma +; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma ; CHECK-NEXT: vfncvtbf16.f.f.w v10, v8 ; CHECK-NEXT: vse16.v v10, (a0) ; CHECK-NEXT: ret @@ -1677,14 +1674,13 @@ define void @fmsub_v6f16(ptr %x, ptr %y, ptr %z) { ; ZVFHMIN-NEXT: vle16.v v9, (a0) ; ZVFHMIN-NEXT: vle16.v v10, (a1) ; ZVFHMIN-NEXT: lui a1, 8 -; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma ; ZVFHMIN-NEXT: vxor.vx v8, v8, a1 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v14, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v10 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma ; ZVFHMIN-NEXT: vfmadd.vv v8, v12, v14 -; ZVFHMIN-NEXT: vsetivli zero, 6, e16, m1, ta, ma +; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v10, v8 ; ZVFHMIN-NEXT: vse16.v v10, (a0) ; ZVFHMIN-NEXT: ret @@ -3381,14 +3377,13 @@ define void @fma_vf_v6bf16(ptr %x, ptr %y, bfloat %z) { ; CHECK-NEXT: vle16.v v8, (a1) ; CHECK-NEXT: vle16.v v9, (a0) ; CHECK-NEXT: fmv.x.w a1, fa0 -; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma ; CHECK-NEXT: vmv.v.x v10, a1 ; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v8 ; CHECK-NEXT: vfwcvtbf16.f.f.v v14, v9 ; CHECK-NEXT: vfwcvtbf16.f.f.v v8, v10 ; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma ; CHECK-NEXT: vfmadd.vv v8, v14, v12 -; CHECK-NEXT: vsetivli zero, 6, e16, m1, ta, ma +; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma ; CHECK-NEXT: vfncvtbf16.f.f.w v10, v8 ; CHECK-NEXT: vse16.v v10, (a0) ; CHECK-NEXT: ret @@ -3452,14 +3447,13 @@ define void @fma_vf_v6f16(ptr %x, ptr %y, half %z) { ; ZVFHMIN-NEXT: vle16.v v8, (a1) ; ZVFHMIN-NEXT: vle16.v v9, (a0) ; ZVFHMIN-NEXT: fmv.x.w a1, fa0 -; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma ; ZVFHMIN-NEXT: vmv.v.x v10, a1 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v14, v9 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v10 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma ; ZVFHMIN-NEXT: vfmadd.vv v8, v14, v12 -; ZVFHMIN-NEXT: vsetivli zero, 6, e16, m1, ta, ma +; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v10, v8 ; ZVFHMIN-NEXT: vse16.v v10, (a0) ; ZVFHMIN-NEXT: ret @@ -3541,14 +3535,13 @@ define void @fma_fv_v6bf16(ptr %x, ptr %y, bfloat %z) { ; CHECK-NEXT: vle16.v v8, (a1) ; CHECK-NEXT: vle16.v v9, (a0) ; CHECK-NEXT: fmv.x.w a1, fa0 -; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma ; CHECK-NEXT: vmv.v.x v10, a1 ; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v8 ; CHECK-NEXT: vfwcvtbf16.f.f.v v14, v9 ; CHECK-NEXT: vfwcvtbf16.f.f.v v8, v10 ; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma ; CHECK-NEXT: vfmadd.vv v8, v14, v12 -; CHECK-NEXT: vsetivli zero, 6, e16, m1, ta, ma +; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma ; CHECK-NEXT: vfncvtbf16.f.f.w v10, v8 ; CHECK-NEXT: vse16.v v10, (a0) ; CHECK-NEXT: ret @@ -3612,14 +3605,13 @@ define void @fma_fv_v6f16(ptr %x, ptr %y, half %z) { ; ZVFHMIN-NEXT: vle16.v v8, (a1) ; ZVFHMIN-NEXT: vle16.v v9, (a0) ; ZVFHMIN-NEXT: fmv.x.w a1, fa0 -; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma ; ZVFHMIN-NEXT: vmv.v.x v10, a1 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v14, v9 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v10 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma ; ZVFHMIN-NEXT: vfmadd.vv v8, v14, v12 -; ZVFHMIN-NEXT: vsetivli zero, 6, e16, m1, ta, ma +; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v10, v8 ; ZVFHMIN-NEXT: vse16.v v10, (a0) ; ZVFHMIN-NEXT: ret @@ -3705,7 +3697,6 @@ define void @fmsub_vf_v6bf16(ptr %x, ptr %y, bfloat %z) { ; CHECK-NEXT: vle16.v v8, (a1) ; CHECK-NEXT: vle16.v v9, (a0) ; CHECK-NEXT: lui a1, 8 -; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma ; CHECK-NEXT: vmv.v.x v10, a2 ; CHECK-NEXT: vxor.vx v8, v8, a1 ; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v9 @@ -3713,7 +3704,7 @@ define void @fmsub_vf_v6bf16(ptr %x, ptr %y, bfloat %z) { ; CHECK-NEXT: vfwcvtbf16.f.f.v v8, v10 ; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma ; CHECK-NEXT: vfmadd.vv v8, v12, v14 -; CHECK-NEXT: vsetivli zero, 6, e16, m1, ta, ma +; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma ; CHECK-NEXT: vfncvtbf16.f.f.w v10, v8 ; CHECK-NEXT: vse16.v v10, (a0) ; CHECK-NEXT: ret @@ -3782,7 +3773,6 @@ define void @fmsub_vf_v6f16(ptr %x, ptr %y, half %z) { ; ZVFHMIN-NEXT: vle16.v v8, (a1) ; ZVFHMIN-NEXT: vle16.v v9, (a0) ; ZVFHMIN-NEXT: lui a1, 8 -; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma ; ZVFHMIN-NEXT: vmv.v.x v10, a2 ; ZVFHMIN-NEXT: vxor.vx v8, v8, a1 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9 @@ -3790,7 +3780,7 @@ define void @fmsub_vf_v6f16(ptr %x, ptr %y, half %z) { ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v10 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma ; ZVFHMIN-NEXT: vfmadd.vv v8, v12, v14 -; ZVFHMIN-NEXT: vsetivli zero, 6, e16, m1, ta, ma +; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma ; ZVFHMIN-NEXT: vfncvt.f.f.w v10, v8 ; ZVFHMIN-NEXT: vse16.v v10, (a0) ; ZVFHMIN-NEXT: ret From 8beb25415e856d369d68756874ddd08325afb35a Mon Sep 17 00:00:00 2001 From: Luke Lau Date: Tue, 4 Feb 2025 23:52:00 +0800 Subject: [PATCH 4/4] Fix FRM + policy ops --- llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll | 224 ++++++------------- 1 file changed, 72 insertions(+), 152 deletions(-) diff --git a/llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll b/llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll index b2166da42a5c9..053f1209cf214 100644 --- a/llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll +++ b/llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll @@ -4035,399 +4035,319 @@ define @vfsgnjx_vf( %a, float %b, iXLen define @vfmacc_vv( %a, %b, %c, iXLen %vl) { ; NOVLOPT-LABEL: vfmacc_vv: ; NOVLOPT: # %bb.0: -; NOVLOPT-NEXT: fsrmi a1, 3 -; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma -; NOVLOPT-NEXT: vfmacc.vv v8, v10, v12 +; NOVLOPT-NEXT: vsetvli a1, zero, e32, m2, ta, ma +; NOVLOPT-NEXT: vfmacc.vv v8, v12, v10 ; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma ; NOVLOPT-NEXT: vfadd.vv v8, v8, v12 -; NOVLOPT-NEXT: fsrm a1 ; NOVLOPT-NEXT: ret ; ; VLOPT-LABEL: vfmacc_vv: ; VLOPT: # %bb.0: -; VLOPT-NEXT: fsrmi a1, 3 -; VLOPT-NEXT: vsetvli zero, a0, e32, m2, tu, ma -; VLOPT-NEXT: vfmacc.vv v8, v10, v12 -; VLOPT-NEXT: vsetvli zero, zero, e32, m2, ta, ma +; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma +; VLOPT-NEXT: vfmacc.vv v8, v12, v10 ; VLOPT-NEXT: vfadd.vv v8, v8, v12 -; VLOPT-NEXT: fsrm a1 ; VLOPT-NEXT: ret - %1 = call @llvm.riscv.vfmacc( %a, %b, %c, iXLen 3, iXLen -1, iXLen 0) - %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 3, iXLen %vl) + %1 = call @llvm.riscv.vfmacc( %a, %b, %c, iXLen 7, iXLen -1, iXLen 3) + %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 7, iXLen %vl) ret %2 } define @vfmacc_vf( %a, float %b, %c, iXLen %vl) { ; NOVLOPT-LABEL: vfmacc_vf: ; NOVLOPT: # %bb.0: -; NOVLOPT-NEXT: fsrmi a1, 3 -; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; NOVLOPT-NEXT: vsetvli a1, zero, e32, m2, ta, ma ; NOVLOPT-NEXT: vfmacc.vf v8, fa0, v10 ; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma ; NOVLOPT-NEXT: vfadd.vv v8, v8, v10 -; NOVLOPT-NEXT: fsrm a1 ; NOVLOPT-NEXT: ret ; ; VLOPT-LABEL: vfmacc_vf: ; VLOPT: # %bb.0: -; VLOPT-NEXT: fsrmi a1, 3 -; VLOPT-NEXT: vsetvli zero, a0, e32, m2, tu, ma +; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma ; VLOPT-NEXT: vfmacc.vf v8, fa0, v10 -; VLOPT-NEXT: vsetvli zero, zero, e32, m2, ta, ma ; VLOPT-NEXT: vfadd.vv v8, v8, v10 -; VLOPT-NEXT: fsrm a1 ; VLOPT-NEXT: ret - %1 = call @llvm.riscv.vfmacc( %a, float %b, %c, iXLen 3, iXLen -1, iXLen 0) - %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 3, iXLen %vl) + %1 = call @llvm.riscv.vfmacc( %a, float %b, %c, iXLen 7, iXLen -1, iXLen 3) + %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 7, iXLen %vl) ret %2 } define @vfnmacc_vv( %a, %b, %c, iXLen %vl) { ; NOVLOPT-LABEL: vfnmacc_vv: ; NOVLOPT: # %bb.0: -; NOVLOPT-NEXT: fsrmi a1, 3 -; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma -; NOVLOPT-NEXT: vfnmacc.vv v8, v10, v12 +; NOVLOPT-NEXT: vsetvli a1, zero, e32, m2, ta, ma +; NOVLOPT-NEXT: vfnmacc.vv v8, v12, v10 ; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma ; NOVLOPT-NEXT: vfadd.vv v8, v8, v12 -; NOVLOPT-NEXT: fsrm a1 ; NOVLOPT-NEXT: ret ; ; VLOPT-LABEL: vfnmacc_vv: ; VLOPT: # %bb.0: -; VLOPT-NEXT: fsrmi a1, 3 -; VLOPT-NEXT: vsetvli zero, a0, e32, m2, tu, ma -; VLOPT-NEXT: vfnmacc.vv v8, v10, v12 -; VLOPT-NEXT: vsetvli zero, zero, e32, m2, ta, ma +; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma +; VLOPT-NEXT: vfnmacc.vv v8, v12, v10 ; VLOPT-NEXT: vfadd.vv v8, v8, v12 -; VLOPT-NEXT: fsrm a1 ; VLOPT-NEXT: ret - %1 = call @llvm.riscv.vfnmacc( %a, %b, %c, iXLen 3, iXLen -1, iXLen 0) - %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 3, iXLen %vl) + %1 = call @llvm.riscv.vfnmacc( %a, %b, %c, iXLen 7, iXLen -1, iXLen 3) + %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 7, iXLen %vl) ret %2 } define @vfnmacc_vf( %a, float %b, %c, iXLen %vl) { ; NOVLOPT-LABEL: vfnmacc_vf: ; NOVLOPT: # %bb.0: -; NOVLOPT-NEXT: fsrmi a1, 3 -; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; NOVLOPT-NEXT: vsetvli a1, zero, e32, m2, ta, ma ; NOVLOPT-NEXT: vfnmacc.vf v8, fa0, v10 ; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma ; NOVLOPT-NEXT: vfadd.vv v8, v8, v10 -; NOVLOPT-NEXT: fsrm a1 ; NOVLOPT-NEXT: ret ; ; VLOPT-LABEL: vfnmacc_vf: ; VLOPT: # %bb.0: -; VLOPT-NEXT: fsrmi a1, 3 -; VLOPT-NEXT: vsetvli zero, a0, e32, m2, tu, ma +; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma ; VLOPT-NEXT: vfnmacc.vf v8, fa0, v10 -; VLOPT-NEXT: vsetvli zero, zero, e32, m2, ta, ma ; VLOPT-NEXT: vfadd.vv v8, v8, v10 -; VLOPT-NEXT: fsrm a1 ; VLOPT-NEXT: ret - %1 = call @llvm.riscv.vfnmacc( %a, float %b, %c, iXLen 3, iXLen -1, iXLen 0) - %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 3, iXLen %vl) + %1 = call @llvm.riscv.vfnmacc( %a, float %b, %c, iXLen 7, iXLen -1, iXLen 3) + %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 7, iXLen %vl) ret %2 } define @vfmsac_vv( %a, %b, %c, iXLen %vl) { ; NOVLOPT-LABEL: vfmsac_vv: ; NOVLOPT: # %bb.0: -; NOVLOPT-NEXT: fsrmi a1, 3 -; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma -; NOVLOPT-NEXT: vfmsac.vv v8, v10, v12 +; NOVLOPT-NEXT: vsetvli a1, zero, e32, m2, ta, ma +; NOVLOPT-NEXT: vfmsac.vv v8, v12, v10 ; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma ; NOVLOPT-NEXT: vfadd.vv v8, v8, v12 -; NOVLOPT-NEXT: fsrm a1 ; NOVLOPT-NEXT: ret ; ; VLOPT-LABEL: vfmsac_vv: ; VLOPT: # %bb.0: -; VLOPT-NEXT: fsrmi a1, 3 -; VLOPT-NEXT: vsetvli zero, a0, e32, m2, tu, ma -; VLOPT-NEXT: vfmsac.vv v8, v10, v12 -; VLOPT-NEXT: vsetvli zero, zero, e32, m2, ta, ma +; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma +; VLOPT-NEXT: vfmsac.vv v8, v12, v10 ; VLOPT-NEXT: vfadd.vv v8, v8, v12 -; VLOPT-NEXT: fsrm a1 ; VLOPT-NEXT: ret - %1 = call @llvm.riscv.vfmsac( %a, %b, %c, iXLen 3, iXLen -1, iXLen 0) - %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 3, iXLen %vl) + %1 = call @llvm.riscv.vfmsac( %a, %b, %c, iXLen 7, iXLen -1, iXLen 3) + %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 7, iXLen %vl) ret %2 } define @vfmsac_vf( %a, float %b, %c, iXLen %vl) { ; NOVLOPT-LABEL: vfmsac_vf: ; NOVLOPT: # %bb.0: -; NOVLOPT-NEXT: fsrmi a1, 3 -; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; NOVLOPT-NEXT: vsetvli a1, zero, e32, m2, ta, ma ; NOVLOPT-NEXT: vfmsac.vf v8, fa0, v10 ; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma ; NOVLOPT-NEXT: vfadd.vv v8, v8, v10 -; NOVLOPT-NEXT: fsrm a1 ; NOVLOPT-NEXT: ret ; ; VLOPT-LABEL: vfmsac_vf: ; VLOPT: # %bb.0: -; VLOPT-NEXT: fsrmi a1, 3 -; VLOPT-NEXT: vsetvli zero, a0, e32, m2, tu, ma +; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma ; VLOPT-NEXT: vfmsac.vf v8, fa0, v10 -; VLOPT-NEXT: vsetvli zero, zero, e32, m2, ta, ma ; VLOPT-NEXT: vfadd.vv v8, v8, v10 -; VLOPT-NEXT: fsrm a1 ; VLOPT-NEXT: ret - %1 = call @llvm.riscv.vfmsac( %a, float %b, %c, iXLen 3, iXLen -1, iXLen 0) - %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 3, iXLen %vl) + %1 = call @llvm.riscv.vfmsac( %a, float %b, %c, iXLen 7, iXLen -1, iXLen 3) + %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 7, iXLen %vl) ret %2 } define @vfnmsac_vv( %a, %b, %c, iXLen %vl) { ; NOVLOPT-LABEL: vfnmsac_vv: ; NOVLOPT: # %bb.0: -; NOVLOPT-NEXT: fsrmi a1, 3 -; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma -; NOVLOPT-NEXT: vfnmsac.vv v8, v10, v12 +; NOVLOPT-NEXT: vsetvli a1, zero, e32, m2, ta, ma +; NOVLOPT-NEXT: vfnmsac.vv v8, v12, v10 ; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma ; NOVLOPT-NEXT: vfadd.vv v8, v8, v12 -; NOVLOPT-NEXT: fsrm a1 ; NOVLOPT-NEXT: ret ; ; VLOPT-LABEL: vfnmsac_vv: ; VLOPT: # %bb.0: -; VLOPT-NEXT: fsrmi a1, 3 -; VLOPT-NEXT: vsetvli zero, a0, e32, m2, tu, ma -; VLOPT-NEXT: vfnmsac.vv v8, v10, v12 -; VLOPT-NEXT: vsetvli zero, zero, e32, m2, ta, ma +; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma +; VLOPT-NEXT: vfnmsac.vv v8, v12, v10 ; VLOPT-NEXT: vfadd.vv v8, v8, v12 -; VLOPT-NEXT: fsrm a1 ; VLOPT-NEXT: ret - %1 = call @llvm.riscv.vfnmsac( %a, %b, %c, iXLen 3, iXLen -1, iXLen 0) - %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 3, iXLen %vl) + %1 = call @llvm.riscv.vfnmsac( %a, %b, %c, iXLen 7, iXLen -1, iXLen 3) + %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 7, iXLen %vl) ret %2 } define @vfnmsac_vf( %a, float %b, %c, iXLen %vl) { ; NOVLOPT-LABEL: vfnmsac_vf: ; NOVLOPT: # %bb.0: -; NOVLOPT-NEXT: fsrmi a1, 3 -; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; NOVLOPT-NEXT: vsetvli a1, zero, e32, m2, ta, ma ; NOVLOPT-NEXT: vfnmsac.vf v8, fa0, v10 ; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma ; NOVLOPT-NEXT: vfadd.vv v8, v8, v10 -; NOVLOPT-NEXT: fsrm a1 ; NOVLOPT-NEXT: ret ; ; VLOPT-LABEL: vfnmsac_vf: ; VLOPT: # %bb.0: -; VLOPT-NEXT: fsrmi a1, 3 -; VLOPT-NEXT: vsetvli zero, a0, e32, m2, tu, ma +; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma ; VLOPT-NEXT: vfnmsac.vf v8, fa0, v10 -; VLOPT-NEXT: vsetvli zero, zero, e32, m2, ta, ma ; VLOPT-NEXT: vfadd.vv v8, v8, v10 -; VLOPT-NEXT: fsrm a1 ; VLOPT-NEXT: ret - %1 = call @llvm.riscv.vfnmsac( %a, float %b, %c, iXLen 3, iXLen -1, iXLen 0) - %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 3, iXLen %vl) + %1 = call @llvm.riscv.vfnmsac( %a, float %b, %c, iXLen 7, iXLen -1, iXLen 3) + %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 7, iXLen %vl) ret %2 } define @vfmadd_vv( %a, %b, %c, iXLen %vl) { ; NOVLOPT-LABEL: vfmadd_vv: ; NOVLOPT: # %bb.0: -; NOVLOPT-NEXT: fsrmi a1, 3 -; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; NOVLOPT-NEXT: vsetvli a1, zero, e32, m2, ta, ma ; NOVLOPT-NEXT: vfmadd.vv v8, v10, v12 ; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma ; NOVLOPT-NEXT: vfadd.vv v8, v8, v12 -; NOVLOPT-NEXT: fsrm a1 ; NOVLOPT-NEXT: ret ; ; VLOPT-LABEL: vfmadd_vv: ; VLOPT: # %bb.0: -; VLOPT-NEXT: fsrmi a1, 3 -; VLOPT-NEXT: vsetvli zero, a0, e32, m2, tu, ma +; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma ; VLOPT-NEXT: vfmadd.vv v8, v10, v12 -; VLOPT-NEXT: vsetvli zero, zero, e32, m2, ta, ma ; VLOPT-NEXT: vfadd.vv v8, v8, v12 -; VLOPT-NEXT: fsrm a1 ; VLOPT-NEXT: ret - %1 = call @llvm.riscv.vfmadd( %a, %b, %c, iXLen 3, iXLen -1, iXLen 0) - %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 3, iXLen %vl) + %1 = call @llvm.riscv.vfmadd( %a, %b, %c, iXLen 7, iXLen -1, iXLen 3) + %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 7, iXLen %vl) ret %2 } define @vfmadd_vf( %a, float %b, %c, iXLen %vl) { ; NOVLOPT-LABEL: vfmadd_vf: ; NOVLOPT: # %bb.0: -; NOVLOPT-NEXT: fsrmi a1, 3 -; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; NOVLOPT-NEXT: vsetvli a1, zero, e32, m2, ta, ma ; NOVLOPT-NEXT: vfmadd.vf v8, fa0, v10 ; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma ; NOVLOPT-NEXT: vfadd.vv v8, v8, v10 -; NOVLOPT-NEXT: fsrm a1 ; NOVLOPT-NEXT: ret ; ; VLOPT-LABEL: vfmadd_vf: ; VLOPT: # %bb.0: -; VLOPT-NEXT: fsrmi a1, 3 -; VLOPT-NEXT: vsetvli zero, a0, e32, m2, tu, ma +; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma ; VLOPT-NEXT: vfmadd.vf v8, fa0, v10 -; VLOPT-NEXT: vsetvli zero, zero, e32, m2, ta, ma ; VLOPT-NEXT: vfadd.vv v8, v8, v10 -; VLOPT-NEXT: fsrm a1 ; VLOPT-NEXT: ret - %1 = call @llvm.riscv.vfmadd( %a, float %b, %c, iXLen 3, iXLen -1, iXLen 0) - %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 3, iXLen %vl) + %1 = call @llvm.riscv.vfmadd( %a, float %b, %c, iXLen 7, iXLen -1, iXLen 3) + %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 7, iXLen %vl) ret %2 } define @vfnmadd_vv( %a, %b, %c, iXLen %vl) { ; NOVLOPT-LABEL: vfnmadd_vv: ; NOVLOPT: # %bb.0: -; NOVLOPT-NEXT: fsrmi a1, 3 -; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; NOVLOPT-NEXT: vsetvli a1, zero, e32, m2, ta, ma ; NOVLOPT-NEXT: vfnmadd.vv v8, v10, v12 ; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma ; NOVLOPT-NEXT: vfadd.vv v8, v8, v12 -; NOVLOPT-NEXT: fsrm a1 ; NOVLOPT-NEXT: ret ; ; VLOPT-LABEL: vfnmadd_vv: ; VLOPT: # %bb.0: -; VLOPT-NEXT: fsrmi a1, 3 -; VLOPT-NEXT: vsetvli zero, a0, e32, m2, tu, ma +; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma ; VLOPT-NEXT: vfnmadd.vv v8, v10, v12 -; VLOPT-NEXT: vsetvli zero, zero, e32, m2, ta, ma ; VLOPT-NEXT: vfadd.vv v8, v8, v12 -; VLOPT-NEXT: fsrm a1 ; VLOPT-NEXT: ret - %1 = call @llvm.riscv.vfnmadd( %a, %b, %c, iXLen 3, iXLen -1, iXLen 0) - %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 3, iXLen %vl) + %1 = call @llvm.riscv.vfnmadd( %a, %b, %c, iXLen 7, iXLen -1, iXLen 3) + %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 7, iXLen %vl) ret %2 } define @vfnmadd_vf( %a, float %b, %c, iXLen %vl) { ; NOVLOPT-LABEL: vfnmadd_vf: ; NOVLOPT: # %bb.0: -; NOVLOPT-NEXT: fsrmi a1, 3 -; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; NOVLOPT-NEXT: vsetvli a1, zero, e32, m2, ta, ma ; NOVLOPT-NEXT: vfnmadd.vf v8, fa0, v10 ; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma ; NOVLOPT-NEXT: vfadd.vv v8, v8, v10 -; NOVLOPT-NEXT: fsrm a1 ; NOVLOPT-NEXT: ret ; ; VLOPT-LABEL: vfnmadd_vf: ; VLOPT: # %bb.0: -; VLOPT-NEXT: fsrmi a1, 3 -; VLOPT-NEXT: vsetvli zero, a0, e32, m2, tu, ma +; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma ; VLOPT-NEXT: vfnmadd.vf v8, fa0, v10 -; VLOPT-NEXT: vsetvli zero, zero, e32, m2, ta, ma ; VLOPT-NEXT: vfadd.vv v8, v8, v10 -; VLOPT-NEXT: fsrm a1 ; VLOPT-NEXT: ret - %1 = call @llvm.riscv.vfnmadd( %a, float %b, %c, iXLen 3, iXLen -1, iXLen 0) - %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 3, iXLen %vl) + %1 = call @llvm.riscv.vfnmadd( %a, float %b, %c, iXLen 7, iXLen -1, iXLen 3) + %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 7, iXLen %vl) ret %2 } define @vfmsub_vv( %a, %b, %c, iXLen %vl) { ; NOVLOPT-LABEL: vfmsub_vv: ; NOVLOPT: # %bb.0: -; NOVLOPT-NEXT: fsrmi a1, 3 -; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; NOVLOPT-NEXT: vsetvli a1, zero, e32, m2, ta, ma ; NOVLOPT-NEXT: vfmsub.vv v8, v10, v12 ; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma ; NOVLOPT-NEXT: vfadd.vv v8, v8, v12 -; NOVLOPT-NEXT: fsrm a1 ; NOVLOPT-NEXT: ret ; ; VLOPT-LABEL: vfmsub_vv: ; VLOPT: # %bb.0: -; VLOPT-NEXT: fsrmi a1, 3 -; VLOPT-NEXT: vsetvli zero, a0, e32, m2, tu, ma +; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma ; VLOPT-NEXT: vfmsub.vv v8, v10, v12 -; VLOPT-NEXT: vsetvli zero, zero, e32, m2, ta, ma ; VLOPT-NEXT: vfadd.vv v8, v8, v12 -; VLOPT-NEXT: fsrm a1 ; VLOPT-NEXT: ret - %1 = call @llvm.riscv.vfmsub( %a, %b, %c, iXLen 3, iXLen -1, iXLen 0) - %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 3, iXLen %vl) + %1 = call @llvm.riscv.vfmsub( %a, %b, %c, iXLen 7, iXLen -1, iXLen 3) + %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 7, iXLen %vl) ret %2 } define @vfmsub_vf( %a, float %b, %c, iXLen %vl) { ; NOVLOPT-LABEL: vfmsub_vf: ; NOVLOPT: # %bb.0: -; NOVLOPT-NEXT: fsrmi a1, 3 -; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; NOVLOPT-NEXT: vsetvli a1, zero, e32, m2, ta, ma ; NOVLOPT-NEXT: vfmsub.vf v8, fa0, v10 ; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma ; NOVLOPT-NEXT: vfadd.vv v8, v8, v10 -; NOVLOPT-NEXT: fsrm a1 ; NOVLOPT-NEXT: ret ; ; VLOPT-LABEL: vfmsub_vf: ; VLOPT: # %bb.0: -; VLOPT-NEXT: fsrmi a1, 3 -; VLOPT-NEXT: vsetvli zero, a0, e32, m2, tu, ma +; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma ; VLOPT-NEXT: vfmsub.vf v8, fa0, v10 -; VLOPT-NEXT: vsetvli zero, zero, e32, m2, ta, ma ; VLOPT-NEXT: vfadd.vv v8, v8, v10 -; VLOPT-NEXT: fsrm a1 ; VLOPT-NEXT: ret - %1 = call @llvm.riscv.vfmsub( %a, float %b, %c, iXLen 3, iXLen -1, iXLen 0) - %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 3, iXLen %vl) + %1 = call @llvm.riscv.vfmsub( %a, float %b, %c, iXLen 7, iXLen -1, iXLen 3) + %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 7, iXLen %vl) ret %2 } define @vfnmsub_vv( %a, %b, %c, iXLen %vl) { ; NOVLOPT-LABEL: vfnmsub_vv: ; NOVLOPT: # %bb.0: -; NOVLOPT-NEXT: fsrmi a1, 3 -; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; NOVLOPT-NEXT: vsetvli a1, zero, e32, m2, ta, ma ; NOVLOPT-NEXT: vfnmsub.vv v8, v10, v12 ; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma ; NOVLOPT-NEXT: vfadd.vv v8, v8, v12 -; NOVLOPT-NEXT: fsrm a1 ; NOVLOPT-NEXT: ret ; ; VLOPT-LABEL: vfnmsub_vv: ; VLOPT: # %bb.0: -; VLOPT-NEXT: fsrmi a1, 3 -; VLOPT-NEXT: vsetvli zero, a0, e32, m2, tu, ma +; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma ; VLOPT-NEXT: vfnmsub.vv v8, v10, v12 -; VLOPT-NEXT: vsetvli zero, zero, e32, m2, ta, ma ; VLOPT-NEXT: vfadd.vv v8, v8, v12 -; VLOPT-NEXT: fsrm a1 ; VLOPT-NEXT: ret - %1 = call @llvm.riscv.vfnmsub( %a, %b, %c, iXLen 3, iXLen -1, iXLen 0) - %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 3, iXLen %vl) + %1 = call @llvm.riscv.vfnmsub( %a, %b, %c, iXLen 7, iXLen -1, iXLen 3) + %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 7, iXLen %vl) ret %2 } define @vfnmsub_vf( %a, float %b, %c, iXLen %vl) { ; NOVLOPT-LABEL: vfnmsub_vf: ; NOVLOPT: # %bb.0: -; NOVLOPT-NEXT: fsrmi a1, 3 -; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma +; NOVLOPT-NEXT: vsetvli a1, zero, e32, m2, ta, ma ; NOVLOPT-NEXT: vfnmsub.vf v8, fa0, v10 ; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma ; NOVLOPT-NEXT: vfadd.vv v8, v8, v10 -; NOVLOPT-NEXT: fsrm a1 ; NOVLOPT-NEXT: ret ; ; VLOPT-LABEL: vfnmsub_vf: ; VLOPT: # %bb.0: -; VLOPT-NEXT: fsrmi a1, 3 -; VLOPT-NEXT: vsetvli zero, a0, e32, m2, tu, ma +; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma ; VLOPT-NEXT: vfnmsub.vf v8, fa0, v10 -; VLOPT-NEXT: vsetvli zero, zero, e32, m2, ta, ma ; VLOPT-NEXT: vfadd.vv v8, v8, v10 -; VLOPT-NEXT: fsrm a1 ; VLOPT-NEXT: ret - %1 = call @llvm.riscv.vfnmsub( %a, float %b, %c, iXLen 3, iXLen -1, iXLen 0) - %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 3, iXLen %vl) + %1 = call @llvm.riscv.vfnmsub( %a, float %b, %c, iXLen 7, iXLen -1, iXLen 3) + %2 = call @llvm.riscv.vfadd( poison, %1, %c, iXLen 7, iXLen %vl) ret %2 }