From 373682239bf5f62fa8a9665771175053a10fd38e Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Thu, 8 May 2025 12:30:04 -0700 Subject: [PATCH 1/4] [RISCV] Correct the SDTypeProfile for RISCVISD::PROBED_ALLOCA --- llvm/lib/Target/RISCV/RISCVInstrInfo.td | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.td b/llvm/lib/Target/RISCV/RISCVInstrInfo.td index 4a4290483e94b..76bf3be7861c5 100644 --- a/llvm/lib/Target/RISCV/RISCVInstrInfo.td +++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.td @@ -103,8 +103,7 @@ def riscv_add_tprel : SDNode<"RISCVISD::ADD_TPREL", SDTCisInt<0>]>>; def riscv_probed_alloca : SDNode<"RISCVISD::PROBED_ALLOCA", - SDTypeProfile<1, 1, [SDTCisSameAs<0, 1>, - SDTCisVT<0, i32>]>, + SDTypeProfile<0, 1, [SDTCisVT<0, XLenVT>]>, [SDNPHasChain, SDNPMayStore]>; //===----------------------------------------------------------------------===// From 16f648fddff86a61e6443428f217ae8de9f80085 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Thu, 8 May 2025 13:05:20 -0700 Subject: [PATCH 2/4] fixup! Use SDTCisPtrTy --- llvm/lib/Target/RISCV/RISCVInstrInfo.td | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.td b/llvm/lib/Target/RISCV/RISCVInstrInfo.td index 76bf3be7861c5..efe50dcaa88ab 100644 --- a/llvm/lib/Target/RISCV/RISCVInstrInfo.td +++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.td @@ -103,7 +103,7 @@ def riscv_add_tprel : SDNode<"RISCVISD::ADD_TPREL", SDTCisInt<0>]>>; def riscv_probed_alloca : SDNode<"RISCVISD::PROBED_ALLOCA", - SDTypeProfile<0, 1, [SDTCisVT<0, XLenVT>]>, + SDTypeProfile<0, 1, [SDTCisPtrTy<0>]>, [SDNPHasChain, SDNPMayStore]>; //===----------------------------------------------------------------------===// From 759124e81723ab44085bde02a1f4eb9ff5679599 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Thu, 8 May 2025 13:14:17 -0700 Subject: [PATCH 3/4] fixup! Update PROBED_STACKALLOC_DYN --- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 2 +- llvm/lib/Target/RISCV/RISCVInstrInfo.td | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp index d65e921dfc660..81d58543b456f 100644 --- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp +++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp @@ -24504,7 +24504,7 @@ RISCVTargetLowering::emitDynamicProbedAlloc(MachineInstr &MI, MachineFunction &MF = *MBB->getParent(); MachineBasicBlock::iterator MBBI = MI.getIterator(); DebugLoc DL = MBB->findDebugLoc(MBBI); - Register TargetReg = MI.getOperand(1).getReg(); + Register TargetReg = MI.getOperand(0).getReg(); const RISCVInstrInfo *TII = Subtarget.getInstrInfo(); bool IsRV64 = Subtarget.is64Bit(); diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.td b/llvm/lib/Target/RISCV/RISCVInstrInfo.td index efe50dcaa88ab..7523763690fee 100644 --- a/llvm/lib/Target/RISCV/RISCVInstrInfo.td +++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.td @@ -1463,9 +1463,9 @@ def PROBED_STACKALLOC_RVV : Pseudo<(outs GPR:$sp), []>, Sched<[]>; let usesCustomInserter = 1 in -def PROBED_STACKALLOC_DYN : Pseudo<(outs GPR:$rd), +def PROBED_STACKALLOC_DYN : Pseudo<(outs), (ins GPR:$scratch), - [(set GPR:$rd, (riscv_probed_alloca GPR:$scratch))]>, + [(riscv_probed_alloca GPR:$scratch)]>, Sched<[]>; } From 849bec8badb8083d98c45d5e1ec79d84617d306b Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Thu, 8 May 2025 13:30:48 -0700 Subject: [PATCH 4/4] fixup! Rename $scratch->$target --- llvm/lib/Target/RISCV/RISCVInstrInfo.td | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.td b/llvm/lib/Target/RISCV/RISCVInstrInfo.td index 7523763690fee..91903a9ea1f78 100644 --- a/llvm/lib/Target/RISCV/RISCVInstrInfo.td +++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.td @@ -1455,17 +1455,17 @@ let hasSideEffects = 1, mayLoad = 1, mayStore = 1, isCodeGenOnly = 1 in { // Probed stack allocation of a constant size, used in function prologues when // stack-clash protection is enabled. def PROBED_STACKALLOC : Pseudo<(outs GPR:$sp), - (ins GPR:$scratch), + (ins GPR:$target), []>, Sched<[]>; def PROBED_STACKALLOC_RVV : Pseudo<(outs GPR:$sp), - (ins GPR:$scratch), + (ins GPR:$target), []>, Sched<[]>; let usesCustomInserter = 1 in def PROBED_STACKALLOC_DYN : Pseudo<(outs), - (ins GPR:$scratch), - [(riscv_probed_alloca GPR:$scratch)]>, + (ins GPR:$target), + [(riscv_probed_alloca GPR:$target)]>, Sched<[]>; }