From 5fa2318a6886427186027ea86b88e4aedef9257b Mon Sep 17 00:00:00 2001 From: AZero13 Date: Mon, 11 Aug 2025 14:28:47 -0400 Subject: [PATCH 1/4] [AArch64] Adjust comparison constant if adjusting it means less instructions Prefer constants that require less instructions to materialize, in both Global-ISel and Selection-DAG --- .../Target/AArch64/AArch64ISelLowering.cpp | 45 +- .../GISel/AArch64PostLegalizerLowering.cpp | 10 +- llvm/test/CodeGen/AArch64/icmp-cst.ll | 727 ++++++------------ llvm/test/CodeGen/AArch64/srem-seteq.ll | 10 +- .../CodeGen/AArch64/urem-seteq-optsize.ll | 5 +- llvm/test/CodeGen/AArch64/urem-seteq.ll | 5 +- 6 files changed, 262 insertions(+), 540 deletions(-) diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp index f9d36a29d493c..bc054d576fa12 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -3493,6 +3493,13 @@ bool isLegalCmpImmed(APInt C) { return isLegalArithImmed(C.abs().getZExtValue()); } +unsigned numberOfInstrToLoadImm(APInt C) { + uint64_t Imm = C.getZExtValue(); + SmallVector Insn; + AArch64_IMM::expandMOVImm(Imm, 32, Insn); + return Insn.size(); +} + static bool isSafeSignedCMN(SDValue Op, SelectionDAG &DAG) { // 0 - INT_MIN sign wraps, so no signed wrap means cmn is safe. if (Op->getFlags().hasNoSignedWrap()) @@ -3962,6 +3969,7 @@ static SDValue getAArch64Cmp(SDValue LHS, SDValue RHS, ISD::CondCode CC, // CC has already been adjusted. RHS = DAG.getConstant(0, DL, VT); } else if (!isLegalCmpImmed(C)) { + unsigned NumImmForC = numberOfInstrToLoadImm(C); // Constant does not fit, try adjusting it by one? switch (CC) { default: @@ -3970,43 +3978,48 @@ static SDValue getAArch64Cmp(SDValue LHS, SDValue RHS, ISD::CondCode CC, case ISD::SETGE: if (!C.isMinSignedValue()) { APInt CMinusOne = C - 1; - if (isLegalCmpImmed(CMinusOne)) { + if (isLegalCmpImmed(CMinusOne) || + (NumImmForC > numberOfInstrToLoadImm(CMinusOne))) { CC = (CC == ISD::SETLT) ? ISD::SETLE : ISD::SETGT; RHS = DAG.getConstant(CMinusOne, DL, VT); } } break; case ISD::SETULT: - case ISD::SETUGE: - if (!C.isZero()) { - APInt CMinusOne = C - 1; - if (isLegalCmpImmed(CMinusOne)) { - CC = (CC == ISD::SETULT) ? ISD::SETULE : ISD::SETUGT; - RHS = DAG.getConstant(CMinusOne, DL, VT); - } + case ISD::SETUGE: { + // C is not 0 because it is a legal immediate. + assert(!C.isZero() && "C should not be zero here"); + APInt CMinusOne = C - 1; + if (isLegalCmpImmed(CMinusOne) || + (NumImmForC > numberOfInstrToLoadImm(CMinusOne))) { + CC = (CC == ISD::SETULT) ? ISD::SETULE : ISD::SETUGT; + RHS = DAG.getConstant(CMinusOne, DL, VT); } break; + } case ISD::SETLE: case ISD::SETGT: if (!C.isMaxSignedValue()) { APInt CPlusOne = C + 1; - if (isLegalCmpImmed(CPlusOne)) { + if (isLegalCmpImmed(CPlusOne) || + (NumImmForC > numberOfInstrToLoadImm(CPlusOne))) { CC = (CC == ISD::SETLE) ? ISD::SETLT : ISD::SETGE; RHS = DAG.getConstant(CPlusOne, DL, VT); } } break; case ISD::SETULE: - case ISD::SETUGT: - if (!C.isAllOnes()) { - APInt CPlusOne = C + 1; - if (isLegalCmpImmed(CPlusOne)) { - CC = (CC == ISD::SETULE) ? ISD::SETULT : ISD::SETUGE; - RHS = DAG.getConstant(CPlusOne, DL, VT); - } + case ISD::SETUGT: { + assert(!C.isAllOnes() && "C should not be -1 here"); + APInt CPlusOne = C + 1; + if (isLegalCmpImmed(CPlusOne) || + (NumImmForC > numberOfInstrToLoadImm(CPlusOne))) { + CC = (CC == ISD::SETULE) ? ISD::SETULT : ISD::SETUGE; + RHS = DAG.getConstant(CPlusOne, DL, VT); } break; } + } } } diff --git a/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp b/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp index 3ba08c8c1d988..63b87360313af 100644 --- a/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp +++ b/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp @@ -614,8 +614,7 @@ tryAdjustICmpImmAndPred(Register RHS, CmpInst::Predicate P, // x uge c => x ugt c - 1 // // When c is not zero. - if (C == 0) - return std::nullopt; + assert(C != 0 && "Expected non-zero unsigned immediate"); P = (P == CmpInst::ICMP_ULT) ? CmpInst::ICMP_ULE : CmpInst::ICMP_UGT; C -= 1; break; @@ -656,14 +655,13 @@ tryAdjustICmpImmAndPred(Register RHS, CmpInst::Predicate P, if (isLegalArithImmed(C)) return {{C, P}}; - auto IsMaterializableInSingleInstruction = [=](uint64_t Imm) { + auto NumberOfInstrToLoadImm = [=](uint64_t Imm) { SmallVector Insn; AArch64_IMM::expandMOVImm(Imm, 32, Insn); - return Insn.size() == 1; + return Insn.size(); }; - if (!IsMaterializableInSingleInstruction(OriginalC) && - IsMaterializableInSingleInstruction(C)) + if (NumberOfInstrToLoadImm(OriginalC) > NumberOfInstrToLoadImm(C)) return {{C, P}}; return std::nullopt; diff --git a/llvm/test/CodeGen/AArch64/icmp-cst.ll b/llvm/test/CodeGen/AArch64/icmp-cst.ll index b6f452bb42cec..b49da44920db0 100644 --- a/llvm/test/CodeGen/AArch64/icmp-cst.ll +++ b/llvm/test/CodeGen/AArch64/icmp-cst.ll @@ -1,687 +1,402 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 -; RUN: llc -mtriple=aarch64-linux-gnu -global-isel=0 < %s | FileCheck %s --check-prefix=CHECK-SD -; RUN: llc -mtriple=aarch64-linux-gnu -global-isel=1 < %s | FileCheck %s --check-prefix=CHECK-GI +; RUN: llc -mtriple=aarch64-linux-gnu -global-isel=0 < %s | FileCheck %s --check-prefixes=CHECK,CHECK-SD +; RUN: llc -mtriple=aarch64-linux-gnu -global-isel=1 < %s | FileCheck %s --check-prefixes=CHECK,CHECK-GI define i1 @ule_11111111(i32 noundef %in) { -; CHECK-SD-LABEL: ule_11111111: -; CHECK-SD: // %bb.0: -; CHECK-SD-NEXT: mov w8, #4370 // =0x1112 -; CHECK-SD-NEXT: movk w8, #4369, lsl #16 -; CHECK-SD-NEXT: cmp w0, w8 -; CHECK-SD-NEXT: cset w0, lo -; CHECK-SD-NEXT: ret -; -; CHECK-GI-LABEL: ule_11111111: -; CHECK-GI: // %bb.0: -; CHECK-GI-NEXT: mov w8, #286331153 // =0x11111111 -; CHECK-GI-NEXT: cmp w0, w8 -; CHECK-GI-NEXT: cset w0, ls -; CHECK-GI-NEXT: ret +; CHECK-LABEL: ule_11111111: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #286331153 // =0x11111111 +; CHECK-NEXT: cmp w0, w8 +; CHECK-NEXT: cset w0, ls +; CHECK-NEXT: ret %out = icmp ult i32 %in, 286331154 ret i1 %out } define i1 @ule_22222222(i32 noundef %in) { -; CHECK-SD-LABEL: ule_22222222: -; CHECK-SD: // %bb.0: -; CHECK-SD-NEXT: mov w8, #8739 // =0x2223 -; CHECK-SD-NEXT: movk w8, #8738, lsl #16 -; CHECK-SD-NEXT: cmp w0, w8 -; CHECK-SD-NEXT: cset w0, lo -; CHECK-SD-NEXT: ret -; -; CHECK-GI-LABEL: ule_22222222: -; CHECK-GI: // %bb.0: -; CHECK-GI-NEXT: mov w8, #572662306 // =0x22222222 -; CHECK-GI-NEXT: cmp w0, w8 -; CHECK-GI-NEXT: cset w0, ls -; CHECK-GI-NEXT: ret +; CHECK-LABEL: ule_22222222: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #572662306 // =0x22222222 +; CHECK-NEXT: cmp w0, w8 +; CHECK-NEXT: cset w0, ls +; CHECK-NEXT: ret %out = icmp ult i32 %in, 572662307 ret i1 %out } define i1 @ule_33333333(i32 noundef %in) { -; CHECK-SD-LABEL: ule_33333333: -; CHECK-SD: // %bb.0: -; CHECK-SD-NEXT: mov w8, #13108 // =0x3334 -; CHECK-SD-NEXT: movk w8, #13107, lsl #16 -; CHECK-SD-NEXT: cmp w0, w8 -; CHECK-SD-NEXT: cset w0, lo -; CHECK-SD-NEXT: ret -; -; CHECK-GI-LABEL: ule_33333333: -; CHECK-GI: // %bb.0: -; CHECK-GI-NEXT: mov w8, #858993459 // =0x33333333 -; CHECK-GI-NEXT: cmp w0, w8 -; CHECK-GI-NEXT: cset w0, ls -; CHECK-GI-NEXT: ret +; CHECK-LABEL: ule_33333333: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #858993459 // =0x33333333 +; CHECK-NEXT: cmp w0, w8 +; CHECK-NEXT: cset w0, ls +; CHECK-NEXT: ret %out = icmp ult i32 %in, 858993460 ret i1 %out } define i1 @ule_44444444(i32 noundef %in) { -; CHECK-SD-LABEL: ule_44444444: -; CHECK-SD: // %bb.0: -; CHECK-SD-NEXT: mov w8, #17477 // =0x4445 -; CHECK-SD-NEXT: movk w8, #17476, lsl #16 -; CHECK-SD-NEXT: cmp w0, w8 -; CHECK-SD-NEXT: cset w0, lo -; CHECK-SD-NEXT: ret -; -; CHECK-GI-LABEL: ule_44444444: -; CHECK-GI: // %bb.0: -; CHECK-GI-NEXT: mov w8, #1145324612 // =0x44444444 -; CHECK-GI-NEXT: cmp w0, w8 -; CHECK-GI-NEXT: cset w0, ls -; CHECK-GI-NEXT: ret +; CHECK-LABEL: ule_44444444: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #1145324612 // =0x44444444 +; CHECK-NEXT: cmp w0, w8 +; CHECK-NEXT: cset w0, ls +; CHECK-NEXT: ret %out = icmp ult i32 %in, 1145324613 ret i1 %out } define i1 @ule_55555555(i32 noundef %in) { -; CHECK-SD-LABEL: ule_55555555: -; CHECK-SD: // %bb.0: -; CHECK-SD-NEXT: mov w8, #21846 // =0x5556 -; CHECK-SD-NEXT: movk w8, #21845, lsl #16 -; CHECK-SD-NEXT: cmp w0, w8 -; CHECK-SD-NEXT: cset w0, lo -; CHECK-SD-NEXT: ret -; -; CHECK-GI-LABEL: ule_55555555: -; CHECK-GI: // %bb.0: -; CHECK-GI-NEXT: mov w8, #1431655765 // =0x55555555 -; CHECK-GI-NEXT: cmp w0, w8 -; CHECK-GI-NEXT: cset w0, ls -; CHECK-GI-NEXT: ret +; CHECK-LABEL: ule_55555555: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #1431655765 // =0x55555555 +; CHECK-NEXT: cmp w0, w8 +; CHECK-NEXT: cset w0, ls +; CHECK-NEXT: ret %out = icmp ult i32 %in, 1431655766 ret i1 %out } define i1 @ule_66666666(i32 noundef %in) { -; CHECK-SD-LABEL: ule_66666666: -; CHECK-SD: // %bb.0: -; CHECK-SD-NEXT: mov w8, #26215 // =0x6667 -; CHECK-SD-NEXT: movk w8, #26214, lsl #16 -; CHECK-SD-NEXT: cmp w0, w8 -; CHECK-SD-NEXT: cset w0, lo -; CHECK-SD-NEXT: ret -; -; CHECK-GI-LABEL: ule_66666666: -; CHECK-GI: // %bb.0: -; CHECK-GI-NEXT: mov w8, #1717986918 // =0x66666666 -; CHECK-GI-NEXT: cmp w0, w8 -; CHECK-GI-NEXT: cset w0, ls -; CHECK-GI-NEXT: ret +; CHECK-LABEL: ule_66666666: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #1717986918 // =0x66666666 +; CHECK-NEXT: cmp w0, w8 +; CHECK-NEXT: cset w0, ls +; CHECK-NEXT: ret %out = icmp ult i32 %in, 1717986919 ret i1 %out } define i1 @ule_77777777(i32 noundef %in) { -; CHECK-SD-LABEL: ule_77777777: -; CHECK-SD: // %bb.0: -; CHECK-SD-NEXT: mov w8, #30584 // =0x7778 -; CHECK-SD-NEXT: movk w8, #30583, lsl #16 -; CHECK-SD-NEXT: cmp w0, w8 -; CHECK-SD-NEXT: cset w0, lo -; CHECK-SD-NEXT: ret -; -; CHECK-GI-LABEL: ule_77777777: -; CHECK-GI: // %bb.0: -; CHECK-GI-NEXT: mov w8, #2004318071 // =0x77777777 -; CHECK-GI-NEXT: cmp w0, w8 -; CHECK-GI-NEXT: cset w0, ls -; CHECK-GI-NEXT: ret +; CHECK-LABEL: ule_77777777: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #2004318071 // =0x77777777 +; CHECK-NEXT: cmp w0, w8 +; CHECK-NEXT: cset w0, ls +; CHECK-NEXT: ret %out = icmp ult i32 %in, 2004318072 ret i1 %out } define i1 @ule_88888888(i32 noundef %in) { -; CHECK-SD-LABEL: ule_88888888: -; CHECK-SD: // %bb.0: -; CHECK-SD-NEXT: mov w8, #34953 // =0x8889 -; CHECK-SD-NEXT: movk w8, #34952, lsl #16 -; CHECK-SD-NEXT: cmp w0, w8 -; CHECK-SD-NEXT: cset w0, lo -; CHECK-SD-NEXT: ret -; -; CHECK-GI-LABEL: ule_88888888: -; CHECK-GI: // %bb.0: -; CHECK-GI-NEXT: mov w8, #-2004318072 // =0x88888888 -; CHECK-GI-NEXT: cmp w0, w8 -; CHECK-GI-NEXT: cset w0, ls -; CHECK-GI-NEXT: ret +; CHECK-LABEL: ule_88888888: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #-2004318072 // =0x88888888 +; CHECK-NEXT: cmp w0, w8 +; CHECK-NEXT: cset w0, ls +; CHECK-NEXT: ret %out = icmp ult i32 %in, -2004318071 ret i1 %out } define i1 @ule_99999999(i32 noundef %in) { -; CHECK-SD-LABEL: ule_99999999: -; CHECK-SD: // %bb.0: -; CHECK-SD-NEXT: mov w8, #39322 // =0x999a -; CHECK-SD-NEXT: movk w8, #39321, lsl #16 -; CHECK-SD-NEXT: cmp w0, w8 -; CHECK-SD-NEXT: cset w0, lo -; CHECK-SD-NEXT: ret -; -; CHECK-GI-LABEL: ule_99999999: -; CHECK-GI: // %bb.0: -; CHECK-GI-NEXT: mov w8, #-1717986919 // =0x99999999 -; CHECK-GI-NEXT: cmp w0, w8 -; CHECK-GI-NEXT: cset w0, ls -; CHECK-GI-NEXT: ret +; CHECK-LABEL: ule_99999999: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #-1717986919 // =0x99999999 +; CHECK-NEXT: cmp w0, w8 +; CHECK-NEXT: cset w0, ls +; CHECK-NEXT: ret %out = icmp ult i32 %in, -1717986918 ret i1 %out } define i1 @uge_11111111(i32 noundef %in) { -; CHECK-SD-LABEL: uge_11111111: -; CHECK-SD: // %bb.0: -; CHECK-SD-NEXT: mov w8, #4368 // =0x1110 -; CHECK-SD-NEXT: movk w8, #4369, lsl #16 -; CHECK-SD-NEXT: cmp w0, w8 -; CHECK-SD-NEXT: cset w0, hi -; CHECK-SD-NEXT: ret -; -; CHECK-GI-LABEL: uge_11111111: -; CHECK-GI: // %bb.0: -; CHECK-GI-NEXT: mov w8, #286331153 // =0x11111111 -; CHECK-GI-NEXT: cmp w0, w8 -; CHECK-GI-NEXT: cset w0, hs -; CHECK-GI-NEXT: ret +; CHECK-LABEL: uge_11111111: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #286331153 // =0x11111111 +; CHECK-NEXT: cmp w0, w8 +; CHECK-NEXT: cset w0, hs +; CHECK-NEXT: ret %out = icmp ugt i32 %in, 286331152 ret i1 %out } define i1 @uge_22222222(i32 noundef %in) { -; CHECK-SD-LABEL: uge_22222222: -; CHECK-SD: // %bb.0: -; CHECK-SD-NEXT: mov w8, #8737 // =0x2221 -; CHECK-SD-NEXT: movk w8, #8738, lsl #16 -; CHECK-SD-NEXT: cmp w0, w8 -; CHECK-SD-NEXT: cset w0, hi -; CHECK-SD-NEXT: ret -; -; CHECK-GI-LABEL: uge_22222222: -; CHECK-GI: // %bb.0: -; CHECK-GI-NEXT: mov w8, #572662306 // =0x22222222 -; CHECK-GI-NEXT: cmp w0, w8 -; CHECK-GI-NEXT: cset w0, hs -; CHECK-GI-NEXT: ret +; CHECK-LABEL: uge_22222222: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #572662306 // =0x22222222 +; CHECK-NEXT: cmp w0, w8 +; CHECK-NEXT: cset w0, hs +; CHECK-NEXT: ret %out = icmp ugt i32 %in, 572662305 ret i1 %out } define i1 @uge_33333333(i32 noundef %in) { -; CHECK-SD-LABEL: uge_33333333: -; CHECK-SD: // %bb.0: -; CHECK-SD-NEXT: mov w8, #13106 // =0x3332 -; CHECK-SD-NEXT: movk w8, #13107, lsl #16 -; CHECK-SD-NEXT: cmp w0, w8 -; CHECK-SD-NEXT: cset w0, hi -; CHECK-SD-NEXT: ret -; -; CHECK-GI-LABEL: uge_33333333: -; CHECK-GI: // %bb.0: -; CHECK-GI-NEXT: mov w8, #858993459 // =0x33333333 -; CHECK-GI-NEXT: cmp w0, w8 -; CHECK-GI-NEXT: cset w0, hs -; CHECK-GI-NEXT: ret +; CHECK-LABEL: uge_33333333: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #858993459 // =0x33333333 +; CHECK-NEXT: cmp w0, w8 +; CHECK-NEXT: cset w0, hs +; CHECK-NEXT: ret %out = icmp ugt i32 %in, 858993458 ret i1 %out } define i1 @uge_44444444(i32 noundef %in) { -; CHECK-SD-LABEL: uge_44444444: -; CHECK-SD: // %bb.0: -; CHECK-SD-NEXT: mov w8, #17475 // =0x4443 -; CHECK-SD-NEXT: movk w8, #17476, lsl #16 -; CHECK-SD-NEXT: cmp w0, w8 -; CHECK-SD-NEXT: cset w0, hi -; CHECK-SD-NEXT: ret -; -; CHECK-GI-LABEL: uge_44444444: -; CHECK-GI: // %bb.0: -; CHECK-GI-NEXT: mov w8, #1145324612 // =0x44444444 -; CHECK-GI-NEXT: cmp w0, w8 -; CHECK-GI-NEXT: cset w0, hs -; CHECK-GI-NEXT: ret +; CHECK-LABEL: uge_44444444: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #1145324612 // =0x44444444 +; CHECK-NEXT: cmp w0, w8 +; CHECK-NEXT: cset w0, hs +; CHECK-NEXT: ret %out = icmp ugt i32 %in, 1145324611 ret i1 %out } define i1 @uge_55555555(i32 noundef %in) { -; CHECK-SD-LABEL: uge_55555555: -; CHECK-SD: // %bb.0: -; CHECK-SD-NEXT: mov w8, #21844 // =0x5554 -; CHECK-SD-NEXT: movk w8, #21845, lsl #16 -; CHECK-SD-NEXT: cmp w0, w8 -; CHECK-SD-NEXT: cset w0, hi -; CHECK-SD-NEXT: ret -; -; CHECK-GI-LABEL: uge_55555555: -; CHECK-GI: // %bb.0: -; CHECK-GI-NEXT: mov w8, #1431655765 // =0x55555555 -; CHECK-GI-NEXT: cmp w0, w8 -; CHECK-GI-NEXT: cset w0, hs -; CHECK-GI-NEXT: ret +; CHECK-LABEL: uge_55555555: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #1431655765 // =0x55555555 +; CHECK-NEXT: cmp w0, w8 +; CHECK-NEXT: cset w0, hs +; CHECK-NEXT: ret %out = icmp ugt i32 %in, 1431655764 ret i1 %out } define i1 @uge_66666666(i32 noundef %in) { -; CHECK-SD-LABEL: uge_66666666: -; CHECK-SD: // %bb.0: -; CHECK-SD-NEXT: mov w8, #26213 // =0x6665 -; CHECK-SD-NEXT: movk w8, #26214, lsl #16 -; CHECK-SD-NEXT: cmp w0, w8 -; CHECK-SD-NEXT: cset w0, hi -; CHECK-SD-NEXT: ret -; -; CHECK-GI-LABEL: uge_66666666: -; CHECK-GI: // %bb.0: -; CHECK-GI-NEXT: mov w8, #1717986918 // =0x66666666 -; CHECK-GI-NEXT: cmp w0, w8 -; CHECK-GI-NEXT: cset w0, hs -; CHECK-GI-NEXT: ret +; CHECK-LABEL: uge_66666666: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #1717986918 // =0x66666666 +; CHECK-NEXT: cmp w0, w8 +; CHECK-NEXT: cset w0, hs +; CHECK-NEXT: ret %out = icmp ugt i32 %in, 1717986917 ret i1 %out } define i1 @uge_77777777(i32 noundef %in) { -; CHECK-SD-LABEL: uge_77777777: -; CHECK-SD: // %bb.0: -; CHECK-SD-NEXT: mov w8, #30582 // =0x7776 -; CHECK-SD-NEXT: movk w8, #30583, lsl #16 -; CHECK-SD-NEXT: cmp w0, w8 -; CHECK-SD-NEXT: cset w0, hi -; CHECK-SD-NEXT: ret -; -; CHECK-GI-LABEL: uge_77777777: -; CHECK-GI: // %bb.0: -; CHECK-GI-NEXT: mov w8, #2004318071 // =0x77777777 -; CHECK-GI-NEXT: cmp w0, w8 -; CHECK-GI-NEXT: cset w0, hs -; CHECK-GI-NEXT: ret +; CHECK-LABEL: uge_77777777: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #2004318071 // =0x77777777 +; CHECK-NEXT: cmp w0, w8 +; CHECK-NEXT: cset w0, hs +; CHECK-NEXT: ret %out = icmp ugt i32 %in, 2004318070 ret i1 %out } define i1 @uge_88888888(i32 noundef %in) { -; CHECK-SD-LABEL: uge_88888888: -; CHECK-SD: // %bb.0: -; CHECK-SD-NEXT: mov w8, #34951 // =0x8887 -; CHECK-SD-NEXT: movk w8, #34952, lsl #16 -; CHECK-SD-NEXT: cmp w0, w8 -; CHECK-SD-NEXT: cset w0, hi -; CHECK-SD-NEXT: ret -; -; CHECK-GI-LABEL: uge_88888888: -; CHECK-GI: // %bb.0: -; CHECK-GI-NEXT: mov w8, #-2004318072 // =0x88888888 -; CHECK-GI-NEXT: cmp w0, w8 -; CHECK-GI-NEXT: cset w0, hs -; CHECK-GI-NEXT: ret +; CHECK-LABEL: uge_88888888: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #-2004318072 // =0x88888888 +; CHECK-NEXT: cmp w0, w8 +; CHECK-NEXT: cset w0, hs +; CHECK-NEXT: ret %out = icmp ugt i32 %in, -2004318073 ret i1 %out } define i1 @uge_99999999(i32 noundef %in) { -; CHECK-SD-LABEL: uge_99999999: -; CHECK-SD: // %bb.0: -; CHECK-SD-NEXT: mov w8, #39320 // =0x9998 -; CHECK-SD-NEXT: movk w8, #39321, lsl #16 -; CHECK-SD-NEXT: cmp w0, w8 -; CHECK-SD-NEXT: cset w0, hi -; CHECK-SD-NEXT: ret -; -; CHECK-GI-LABEL: uge_99999999: -; CHECK-GI: // %bb.0: -; CHECK-GI-NEXT: mov w8, #-1717986919 // =0x99999999 -; CHECK-GI-NEXT: cmp w0, w8 -; CHECK-GI-NEXT: cset w0, hs -; CHECK-GI-NEXT: ret +; CHECK-LABEL: uge_99999999: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #-1717986919 // =0x99999999 +; CHECK-NEXT: cmp w0, w8 +; CHECK-NEXT: cset w0, hs +; CHECK-NEXT: ret %out = icmp ugt i32 %in, -1717986920 ret i1 %out } define i1 @sle_11111111(i32 noundef %in) { -; CHECK-SD-LABEL: sle_11111111: -; CHECK-SD: // %bb.0: -; CHECK-SD-NEXT: mov w8, #4370 // =0x1112 -; CHECK-SD-NEXT: movk w8, #4369, lsl #16 -; CHECK-SD-NEXT: cmp w0, w8 -; CHECK-SD-NEXT: cset w0, lt -; CHECK-SD-NEXT: ret -; -; CHECK-GI-LABEL: sle_11111111: -; CHECK-GI: // %bb.0: -; CHECK-GI-NEXT: mov w8, #286331153 // =0x11111111 -; CHECK-GI-NEXT: cmp w0, w8 -; CHECK-GI-NEXT: cset w0, le -; CHECK-GI-NEXT: ret +; CHECK-LABEL: sle_11111111: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #286331153 // =0x11111111 +; CHECK-NEXT: cmp w0, w8 +; CHECK-NEXT: cset w0, le +; CHECK-NEXT: ret %out = icmp slt i32 %in, 286331154 ret i1 %out } define i1 @sle_22222222(i32 noundef %in) { -; CHECK-SD-LABEL: sle_22222222: -; CHECK-SD: // %bb.0: -; CHECK-SD-NEXT: mov w8, #8739 // =0x2223 -; CHECK-SD-NEXT: movk w8, #8738, lsl #16 -; CHECK-SD-NEXT: cmp w0, w8 -; CHECK-SD-NEXT: cset w0, lt -; CHECK-SD-NEXT: ret -; -; CHECK-GI-LABEL: sle_22222222: -; CHECK-GI: // %bb.0: -; CHECK-GI-NEXT: mov w8, #572662306 // =0x22222222 -; CHECK-GI-NEXT: cmp w0, w8 -; CHECK-GI-NEXT: cset w0, le -; CHECK-GI-NEXT: ret +; CHECK-LABEL: sle_22222222: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #572662306 // =0x22222222 +; CHECK-NEXT: cmp w0, w8 +; CHECK-NEXT: cset w0, le +; CHECK-NEXT: ret %out = icmp slt i32 %in, 572662307 ret i1 %out } define i1 @sle_33333333(i32 noundef %in) { -; CHECK-SD-LABEL: sle_33333333: -; CHECK-SD: // %bb.0: -; CHECK-SD-NEXT: mov w8, #13108 // =0x3334 -; CHECK-SD-NEXT: movk w8, #13107, lsl #16 -; CHECK-SD-NEXT: cmp w0, w8 -; CHECK-SD-NEXT: cset w0, lt -; CHECK-SD-NEXT: ret -; -; CHECK-GI-LABEL: sle_33333333: -; CHECK-GI: // %bb.0: -; CHECK-GI-NEXT: mov w8, #858993459 // =0x33333333 -; CHECK-GI-NEXT: cmp w0, w8 -; CHECK-GI-NEXT: cset w0, le -; CHECK-GI-NEXT: ret +; CHECK-LABEL: sle_33333333: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #858993459 // =0x33333333 +; CHECK-NEXT: cmp w0, w8 +; CHECK-NEXT: cset w0, le +; CHECK-NEXT: ret %out = icmp slt i32 %in, 858993460 ret i1 %out } define i1 @sle_44444444(i32 noundef %in) { -; CHECK-SD-LABEL: sle_44444444: -; CHECK-SD: // %bb.0: -; CHECK-SD-NEXT: mov w8, #17477 // =0x4445 -; CHECK-SD-NEXT: movk w8, #17476, lsl #16 -; CHECK-SD-NEXT: cmp w0, w8 -; CHECK-SD-NEXT: cset w0, lt -; CHECK-SD-NEXT: ret -; -; CHECK-GI-LABEL: sle_44444444: -; CHECK-GI: // %bb.0: -; CHECK-GI-NEXT: mov w8, #1145324612 // =0x44444444 -; CHECK-GI-NEXT: cmp w0, w8 -; CHECK-GI-NEXT: cset w0, le -; CHECK-GI-NEXT: ret +; CHECK-LABEL: sle_44444444: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #1145324612 // =0x44444444 +; CHECK-NEXT: cmp w0, w8 +; CHECK-NEXT: cset w0, le +; CHECK-NEXT: ret %out = icmp slt i32 %in, 1145324613 ret i1 %out } define i1 @sle_55555555(i32 noundef %in) { -; CHECK-SD-LABEL: sle_55555555: -; CHECK-SD: // %bb.0: -; CHECK-SD-NEXT: mov w8, #21846 // =0x5556 -; CHECK-SD-NEXT: movk w8, #21845, lsl #16 -; CHECK-SD-NEXT: cmp w0, w8 -; CHECK-SD-NEXT: cset w0, lt -; CHECK-SD-NEXT: ret -; -; CHECK-GI-LABEL: sle_55555555: -; CHECK-GI: // %bb.0: -; CHECK-GI-NEXT: mov w8, #1431655765 // =0x55555555 -; CHECK-GI-NEXT: cmp w0, w8 -; CHECK-GI-NEXT: cset w0, le -; CHECK-GI-NEXT: ret +; CHECK-LABEL: sle_55555555: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #1431655765 // =0x55555555 +; CHECK-NEXT: cmp w0, w8 +; CHECK-NEXT: cset w0, le +; CHECK-NEXT: ret %out = icmp slt i32 %in, 1431655766 ret i1 %out } define i1 @sle_66666666(i32 noundef %in) { -; CHECK-SD-LABEL: sle_66666666: -; CHECK-SD: // %bb.0: -; CHECK-SD-NEXT: mov w8, #26215 // =0x6667 -; CHECK-SD-NEXT: movk w8, #26214, lsl #16 -; CHECK-SD-NEXT: cmp w0, w8 -; CHECK-SD-NEXT: cset w0, lt -; CHECK-SD-NEXT: ret -; -; CHECK-GI-LABEL: sle_66666666: -; CHECK-GI: // %bb.0: -; CHECK-GI-NEXT: mov w8, #1717986918 // =0x66666666 -; CHECK-GI-NEXT: cmp w0, w8 -; CHECK-GI-NEXT: cset w0, le -; CHECK-GI-NEXT: ret +; CHECK-LABEL: sle_66666666: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #1717986918 // =0x66666666 +; CHECK-NEXT: cmp w0, w8 +; CHECK-NEXT: cset w0, le +; CHECK-NEXT: ret %out = icmp slt i32 %in, 1717986919 ret i1 %out } define i1 @sle_77777777(i32 noundef %in) { -; CHECK-SD-LABEL: sle_77777777: -; CHECK-SD: // %bb.0: -; CHECK-SD-NEXT: mov w8, #30584 // =0x7778 -; CHECK-SD-NEXT: movk w8, #30583, lsl #16 -; CHECK-SD-NEXT: cmp w0, w8 -; CHECK-SD-NEXT: cset w0, lt -; CHECK-SD-NEXT: ret -; -; CHECK-GI-LABEL: sle_77777777: -; CHECK-GI: // %bb.0: -; CHECK-GI-NEXT: mov w8, #2004318071 // =0x77777777 -; CHECK-GI-NEXT: cmp w0, w8 -; CHECK-GI-NEXT: cset w0, le -; CHECK-GI-NEXT: ret +; CHECK-LABEL: sle_77777777: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #2004318071 // =0x77777777 +; CHECK-NEXT: cmp w0, w8 +; CHECK-NEXT: cset w0, le +; CHECK-NEXT: ret %out = icmp slt i32 %in, 2004318072 ret i1 %out } define i1 @sle_88888888(i32 noundef %in) { -; CHECK-SD-LABEL: sle_88888888: -; CHECK-SD: // %bb.0: -; CHECK-SD-NEXT: mov w8, #34953 // =0x8889 -; CHECK-SD-NEXT: movk w8, #34952, lsl #16 -; CHECK-SD-NEXT: cmp w0, w8 -; CHECK-SD-NEXT: cset w0, lo -; CHECK-SD-NEXT: ret -; -; CHECK-GI-LABEL: sle_88888888: -; CHECK-GI: // %bb.0: -; CHECK-GI-NEXT: mov w8, #-2004318072 // =0x88888888 -; CHECK-GI-NEXT: cmp w0, w8 -; CHECK-GI-NEXT: cset w0, ls -; CHECK-GI-NEXT: ret +; CHECK-LABEL: sle_88888888: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #-2004318072 // =0x88888888 +; CHECK-NEXT: cmp w0, w8 +; CHECK-NEXT: cset w0, ls +; CHECK-NEXT: ret %out = icmp ult i32 %in, -2004318071 ret i1 %out } define i1 @sle_99999999(i32 noundef %in) { -; CHECK-SD-LABEL: sle_99999999: -; CHECK-SD: // %bb.0: -; CHECK-SD-NEXT: mov w8, #39322 // =0x999a -; CHECK-SD-NEXT: movk w8, #39321, lsl #16 -; CHECK-SD-NEXT: cmp w0, w8 -; CHECK-SD-NEXT: cset w0, lo -; CHECK-SD-NEXT: ret -; -; CHECK-GI-LABEL: sle_99999999: -; CHECK-GI: // %bb.0: -; CHECK-GI-NEXT: mov w8, #-1717986919 // =0x99999999 -; CHECK-GI-NEXT: cmp w0, w8 -; CHECK-GI-NEXT: cset w0, ls -; CHECK-GI-NEXT: ret +; CHECK-LABEL: sle_99999999: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #-1717986919 // =0x99999999 +; CHECK-NEXT: cmp w0, w8 +; CHECK-NEXT: cset w0, ls +; CHECK-NEXT: ret %out = icmp ult i32 %in, -1717986918 ret i1 %out } define i1 @sge_11111111(i32 noundef %in) { -; CHECK-SD-LABEL: sge_11111111: -; CHECK-SD: // %bb.0: -; CHECK-SD-NEXT: mov w8, #4368 // =0x1110 -; CHECK-SD-NEXT: movk w8, #4369, lsl #16 -; CHECK-SD-NEXT: cmp w0, w8 -; CHECK-SD-NEXT: cset w0, gt -; CHECK-SD-NEXT: ret -; -; CHECK-GI-LABEL: sge_11111111: -; CHECK-GI: // %bb.0: -; CHECK-GI-NEXT: mov w8, #286331153 // =0x11111111 -; CHECK-GI-NEXT: cmp w0, w8 -; CHECK-GI-NEXT: cset w0, ge -; CHECK-GI-NEXT: ret +; CHECK-LABEL: sge_11111111: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #286331153 // =0x11111111 +; CHECK-NEXT: cmp w0, w8 +; CHECK-NEXT: cset w0, ge +; CHECK-NEXT: ret %out = icmp sgt i32 %in, 286331152 ret i1 %out } define i1 @sge_22222222(i32 noundef %in) { -; CHECK-SD-LABEL: sge_22222222: -; CHECK-SD: // %bb.0: -; CHECK-SD-NEXT: mov w8, #8737 // =0x2221 -; CHECK-SD-NEXT: movk w8, #8738, lsl #16 -; CHECK-SD-NEXT: cmp w0, w8 -; CHECK-SD-NEXT: cset w0, gt -; CHECK-SD-NEXT: ret -; -; CHECK-GI-LABEL: sge_22222222: -; CHECK-GI: // %bb.0: -; CHECK-GI-NEXT: mov w8, #572662306 // =0x22222222 -; CHECK-GI-NEXT: cmp w0, w8 -; CHECK-GI-NEXT: cset w0, ge -; CHECK-GI-NEXT: ret +; CHECK-LABEL: sge_22222222: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #572662306 // =0x22222222 +; CHECK-NEXT: cmp w0, w8 +; CHECK-NEXT: cset w0, ge +; CHECK-NEXT: ret %out = icmp sgt i32 %in, 572662305 ret i1 %out } define i1 @sge_33333333(i32 noundef %in) { -; CHECK-SD-LABEL: sge_33333333: -; CHECK-SD: // %bb.0: -; CHECK-SD-NEXT: mov w8, #13106 // =0x3332 -; CHECK-SD-NEXT: movk w8, #13107, lsl #16 -; CHECK-SD-NEXT: cmp w0, w8 -; CHECK-SD-NEXT: cset w0, gt -; CHECK-SD-NEXT: ret -; -; CHECK-GI-LABEL: sge_33333333: -; CHECK-GI: // %bb.0: -; CHECK-GI-NEXT: mov w8, #858993459 // =0x33333333 -; CHECK-GI-NEXT: cmp w0, w8 -; CHECK-GI-NEXT: cset w0, ge -; CHECK-GI-NEXT: ret +; CHECK-LABEL: sge_33333333: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #858993459 // =0x33333333 +; CHECK-NEXT: cmp w0, w8 +; CHECK-NEXT: cset w0, ge +; CHECK-NEXT: ret %out = icmp sgt i32 %in, 858993458 ret i1 %out } define i1 @sge_44444444(i32 noundef %in) { -; CHECK-SD-LABEL: sge_44444444: -; CHECK-SD: // %bb.0: -; CHECK-SD-NEXT: mov w8, #17475 // =0x4443 -; CHECK-SD-NEXT: movk w8, #17476, lsl #16 -; CHECK-SD-NEXT: cmp w0, w8 -; CHECK-SD-NEXT: cset w0, gt -; CHECK-SD-NEXT: ret -; -; CHECK-GI-LABEL: sge_44444444: -; CHECK-GI: // %bb.0: -; CHECK-GI-NEXT: mov w8, #1145324612 // =0x44444444 -; CHECK-GI-NEXT: cmp w0, w8 -; CHECK-GI-NEXT: cset w0, ge -; CHECK-GI-NEXT: ret +; CHECK-LABEL: sge_44444444: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #1145324612 // =0x44444444 +; CHECK-NEXT: cmp w0, w8 +; CHECK-NEXT: cset w0, ge +; CHECK-NEXT: ret %out = icmp sgt i32 %in, 1145324611 ret i1 %out } define i1 @sge_55555555(i32 noundef %in) { -; CHECK-SD-LABEL: sge_55555555: -; CHECK-SD: // %bb.0: -; CHECK-SD-NEXT: mov w8, #21844 // =0x5554 -; CHECK-SD-NEXT: movk w8, #21845, lsl #16 -; CHECK-SD-NEXT: cmp w0, w8 -; CHECK-SD-NEXT: cset w0, gt -; CHECK-SD-NEXT: ret -; -; CHECK-GI-LABEL: sge_55555555: -; CHECK-GI: // %bb.0: -; CHECK-GI-NEXT: mov w8, #1431655765 // =0x55555555 -; CHECK-GI-NEXT: cmp w0, w8 -; CHECK-GI-NEXT: cset w0, ge -; CHECK-GI-NEXT: ret +; CHECK-LABEL: sge_55555555: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #1431655765 // =0x55555555 +; CHECK-NEXT: cmp w0, w8 +; CHECK-NEXT: cset w0, ge +; CHECK-NEXT: ret %out = icmp sgt i32 %in, 1431655764 ret i1 %out } define i1 @sge_66666666(i32 noundef %in) { -; CHECK-SD-LABEL: sge_66666666: -; CHECK-SD: // %bb.0: -; CHECK-SD-NEXT: mov w8, #26213 // =0x6665 -; CHECK-SD-NEXT: movk w8, #26214, lsl #16 -; CHECK-SD-NEXT: cmp w0, w8 -; CHECK-SD-NEXT: cset w0, gt -; CHECK-SD-NEXT: ret -; -; CHECK-GI-LABEL: sge_66666666: -; CHECK-GI: // %bb.0: -; CHECK-GI-NEXT: mov w8, #1717986918 // =0x66666666 -; CHECK-GI-NEXT: cmp w0, w8 -; CHECK-GI-NEXT: cset w0, ge -; CHECK-GI-NEXT: ret +; CHECK-LABEL: sge_66666666: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #1717986918 // =0x66666666 +; CHECK-NEXT: cmp w0, w8 +; CHECK-NEXT: cset w0, ge +; CHECK-NEXT: ret %out = icmp sgt i32 %in, 1717986917 ret i1 %out } define i1 @sge_77777777(i32 noundef %in) { -; CHECK-SD-LABEL: sge_77777777: -; CHECK-SD: // %bb.0: -; CHECK-SD-NEXT: mov w8, #30582 // =0x7776 -; CHECK-SD-NEXT: movk w8, #30583, lsl #16 -; CHECK-SD-NEXT: cmp w0, w8 -; CHECK-SD-NEXT: cset w0, gt -; CHECK-SD-NEXT: ret -; -; CHECK-GI-LABEL: sge_77777777: -; CHECK-GI: // %bb.0: -; CHECK-GI-NEXT: mov w8, #2004318071 // =0x77777777 -; CHECK-GI-NEXT: cmp w0, w8 -; CHECK-GI-NEXT: cset w0, ge -; CHECK-GI-NEXT: ret +; CHECK-LABEL: sge_77777777: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #2004318071 // =0x77777777 +; CHECK-NEXT: cmp w0, w8 +; CHECK-NEXT: cset w0, ge +; CHECK-NEXT: ret %out = icmp sgt i32 %in, 2004318070 ret i1 %out } define i1 @sge_88888888(i32 noundef %in) { -; CHECK-SD-LABEL: sge_88888888: -; CHECK-SD: // %bb.0: -; CHECK-SD-NEXT: mov w8, #34951 // =0x8887 -; CHECK-SD-NEXT: movk w8, #34952, lsl #16 -; CHECK-SD-NEXT: cmp w0, w8 -; CHECK-SD-NEXT: cset w0, hi -; CHECK-SD-NEXT: ret -; -; CHECK-GI-LABEL: sge_88888888: -; CHECK-GI: // %bb.0: -; CHECK-GI-NEXT: mov w8, #-2004318072 // =0x88888888 -; CHECK-GI-NEXT: cmp w0, w8 -; CHECK-GI-NEXT: cset w0, hs -; CHECK-GI-NEXT: ret +; CHECK-LABEL: sge_88888888: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #-2004318072 // =0x88888888 +; CHECK-NEXT: cmp w0, w8 +; CHECK-NEXT: cset w0, hs +; CHECK-NEXT: ret %out = icmp ugt i32 %in, -2004318073 ret i1 %out } define i1 @sge_99999999(i32 noundef %in) { -; CHECK-SD-LABEL: sge_99999999: -; CHECK-SD: // %bb.0: -; CHECK-SD-NEXT: mov w8, #39320 // =0x9998 -; CHECK-SD-NEXT: movk w8, #39321, lsl #16 -; CHECK-SD-NEXT: cmp w0, w8 -; CHECK-SD-NEXT: cset w0, hi -; CHECK-SD-NEXT: ret -; -; CHECK-GI-LABEL: sge_99999999: -; CHECK-GI: // %bb.0: -; CHECK-GI-NEXT: mov w8, #-1717986919 // =0x99999999 -; CHECK-GI-NEXT: cmp w0, w8 -; CHECK-GI-NEXT: cset w0, hs -; CHECK-GI-NEXT: ret +; CHECK-LABEL: sge_99999999: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #-1717986919 // =0x99999999 +; CHECK-NEXT: cmp w0, w8 +; CHECK-NEXT: cset w0, hs +; CHECK-NEXT: ret %out = icmp ugt i32 %in, -1717986920 ret i1 %out } +;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: +; CHECK-GI: {{.*}} +; CHECK-SD: {{.*}} diff --git a/llvm/test/CodeGen/AArch64/srem-seteq.ll b/llvm/test/CodeGen/AArch64/srem-seteq.ll index 4b8cbc46a6102..3b344feebb58e 100644 --- a/llvm/test/CodeGen/AArch64/srem-seteq.ll +++ b/llvm/test/CodeGen/AArch64/srem-seteq.ll @@ -166,10 +166,9 @@ define i32 @test_srem_odd_setne(i32 %X) nounwind { ; CHECK-NEXT: movk w8, #52428, lsl #16 ; CHECK-NEXT: movk w9, #6553, lsl #16 ; CHECK-NEXT: madd w8, w0, w8, w9 -; CHECK-NEXT: mov w9, #13106 // =0x3332 -; CHECK-NEXT: movk w9, #13107, lsl #16 +; CHECK-NEXT: mov w9, #858993459 // =0x33333333 ; CHECK-NEXT: cmp w8, w9 -; CHECK-NEXT: cset w0, hi +; CHECK-NEXT: cset w0, hs ; CHECK-NEXT: ret %srem = srem i32 %X, 5 %cmp = icmp ne i32 %srem, 0 @@ -186,10 +185,9 @@ define i32 @test_srem_negative_odd(i32 %X) nounwind { ; CHECK-NEXT: movk w8, #52428, lsl #16 ; CHECK-NEXT: movk w9, #6553, lsl #16 ; CHECK-NEXT: madd w8, w0, w8, w9 -; CHECK-NEXT: mov w9, #13106 // =0x3332 -; CHECK-NEXT: movk w9, #13107, lsl #16 +; CHECK-NEXT: mov w9, #858993459 // =0x33333333 ; CHECK-NEXT: cmp w8, w9 -; CHECK-NEXT: cset w0, hi +; CHECK-NEXT: cset w0, hs ; CHECK-NEXT: ret %srem = srem i32 %X, -5 %cmp = icmp ne i32 %srem, 0 diff --git a/llvm/test/CodeGen/AArch64/urem-seteq-optsize.ll b/llvm/test/CodeGen/AArch64/urem-seteq-optsize.ll index 45726e92463b9..bb5aa1fd0684d 100644 --- a/llvm/test/CodeGen/AArch64/urem-seteq-optsize.ll +++ b/llvm/test/CodeGen/AArch64/urem-seteq-optsize.ll @@ -22,14 +22,13 @@ define i32 @test_optsize(i32 %X) optsize nounwind readnone { ; CHECK-LABEL: test_optsize: ; CHECK: // %bb.0: ; CHECK-NEXT: mov w8, #52429 // =0xcccd -; CHECK-NEXT: mov w9, #13108 // =0x3334 +; CHECK-NEXT: mov w9, #858993459 // =0x33333333 ; CHECK-NEXT: movk w8, #52428, lsl #16 -; CHECK-NEXT: movk w9, #13107, lsl #16 ; CHECK-NEXT: mul w8, w0, w8 ; CHECK-NEXT: cmp w8, w9 ; CHECK-NEXT: mov w8, #-10 // =0xfffffff6 ; CHECK-NEXT: mov w9, #42 // =0x2a -; CHECK-NEXT: csel w0, w9, w8, lo +; CHECK-NEXT: csel w0, w9, w8, ls ; CHECK-NEXT: ret %rem = urem i32 %X, 5 %cmp = icmp eq i32 %rem, 0 diff --git a/llvm/test/CodeGen/AArch64/urem-seteq.ll b/llvm/test/CodeGen/AArch64/urem-seteq.ll index df87e60c4f8d5..5473991e77c3e 100644 --- a/llvm/test/CodeGen/AArch64/urem-seteq.ll +++ b/llvm/test/CodeGen/AArch64/urem-seteq.ll @@ -9,12 +9,11 @@ define i32 @test_urem_odd(i32 %X) nounwind { ; CHECK-LABEL: test_urem_odd: ; CHECK: // %bb.0: ; CHECK-NEXT: mov w8, #52429 // =0xcccd -; CHECK-NEXT: mov w9, #13108 // =0x3334 +; CHECK-NEXT: mov w9, #858993459 // =0x33333333 ; CHECK-NEXT: movk w8, #52428, lsl #16 -; CHECK-NEXT: movk w9, #13107, lsl #16 ; CHECK-NEXT: mul w8, w0, w8 ; CHECK-NEXT: cmp w8, w9 -; CHECK-NEXT: cset w0, lo +; CHECK-NEXT: cset w0, ls ; CHECK-NEXT: ret %urem = urem i32 %X, 5 %cmp = icmp eq i32 %urem, 0 From f7e1482d1fcd0b4f8e103c1c6190f732576527cd Mon Sep 17 00:00:00 2001 From: AZero13 Date: Thu, 14 Aug 2025 11:59:04 -0400 Subject: [PATCH 2/4] ult --- llvm/test/CodeGen/AArch64/icmp-cst.ll | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/llvm/test/CodeGen/AArch64/icmp-cst.ll b/llvm/test/CodeGen/AArch64/icmp-cst.ll index b49da44920db0..b75e3535bf821 100644 --- a/llvm/test/CodeGen/AArch64/icmp-cst.ll +++ b/llvm/test/CodeGen/AArch64/icmp-cst.ll @@ -397,6 +397,19 @@ define i1 @sge_99999999(i32 noundef %in) { %out = icmp ugt i32 %in, -1717986920 ret i1 %out } + +define i1 @ult_20014852997121(i64 noundef %in) { +; CHECK-LABEL: ult_20014852997121: +; CHECK: // %bb.0: +; CHECK-NEXT: mov x8, #305397760 // =0x12340000 +; CHECK-NEXT: movk x8, #4660, lsl #32 +; CHECK-NEXT: cmp x0, x8 +; CHECK-NEXT: cset w0, ls +; CHECK-NEXT: ret + %out = icmp ult i64 %in, 20014852997121 + ret i1 %out +} + ;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: ; CHECK-GI: {{.*}} ; CHECK-SD: {{.*}} From 72233a24d55bb6d41d42e7453d7d70943fbe2716 Mon Sep 17 00:00:00 2001 From: AZero13 Date: Thu, 14 Aug 2025 12:03:38 -0400 Subject: [PATCH 3/4] Fix --- .../Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp b/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp index 63b87360313af..0b2edd2f16d81 100644 --- a/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp +++ b/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp @@ -614,7 +614,7 @@ tryAdjustICmpImmAndPred(Register RHS, CmpInst::Predicate P, // x uge c => x ugt c - 1 // // When c is not zero. - assert(C != 0 && "Expected non-zero unsigned immediate"); + assert(C != 0 && "C should not be zero here!"); P = (P == CmpInst::ICMP_ULT) ? CmpInst::ICMP_ULE : CmpInst::ICMP_UGT; C -= 1; break; @@ -639,10 +639,7 @@ tryAdjustICmpImmAndPred(Register RHS, CmpInst::Predicate P, // x ule c => x ult c + 1 // x ugt c => s uge c + 1 // - // When c is not the largest possible unsigned integer. - if ((Size == 32 && static_cast(C) == UINT32_MAX) || - (Size == 64 && C == UINT64_MAX)) - return std::nullopt; + assert(C != (Size == 32 ? UINT32_MAX : UINT64_MAX) && "C should not be -1 here!"); P = (P == CmpInst::ICMP_ULE) ? CmpInst::ICMP_ULT : CmpInst::ICMP_UGE; C += 1; break; From 293e0a0810ba29734d5193c516aa66d93d9209c6 Mon Sep 17 00:00:00 2001 From: AZero13 Date: Thu, 14 Aug 2025 12:04:32 -0400 Subject: [PATCH 4/4] Update AArch64PostLegalizerLowering.cpp --- llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp b/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp index 0b2edd2f16d81..2abe0dd0bbdc2 100644 --- a/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp +++ b/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp @@ -639,7 +639,8 @@ tryAdjustICmpImmAndPred(Register RHS, CmpInst::Predicate P, // x ule c => x ult c + 1 // x ugt c => s uge c + 1 // - assert(C != (Size == 32 ? UINT32_MAX : UINT64_MAX) && "C should not be -1 here!"); + assert(C != (Size == 32 ? UINT32_MAX : UINT64_MAX) && + "C should not be -1 here!"); P = (P == CmpInst::ICMP_ULE) ? CmpInst::ICMP_ULT : CmpInst::ICMP_UGE; C += 1; break;