diff --git a/llvm/lib/Target/NVPTX/NVVMIntrRange.cpp b/llvm/lib/Target/NVPTX/NVVMIntrRange.cpp
index 2c81989932a97..6ad1bd83a01b7 100644
--- a/llvm/lib/Target/NVPTX/NVVMIntrRange.cpp
+++ b/llvm/lib/Target/NVPTX/NVVMIntrRange.cpp
@@ -130,6 +130,10 @@ static bool runNVVMIntrRange(Function &F) {
       if (OverallClusterRank)
         return addRangeAttr(1, FunctionClusterRank + 1, II);
       break;
+
+    // Lane ID
+    case Intrinsic::nvvm_read_ptx_sreg_laneid:
+      return addRangeAttr(0, 32, II);
     default:
       return false;
     }
diff --git a/llvm/test/CodeGen/NVPTX/intr-range.ll b/llvm/test/CodeGen/NVPTX/intr-range.ll
index 48fa3e06629b4..fb9488e7e5ab8 100644
--- a/llvm/test/CodeGen/NVPTX/intr-range.ll
+++ b/llvm/test/CodeGen/NVPTX/intr-range.ll
@@ -135,6 +135,16 @@ define ptx_kernel i32 @test_cluster_dim() "nvvm.cluster_dim"="4,4,1" {
   ret i32 %11
 }
 
+define ptx_kernel i32 @test_laneid() "nvvm.cluster_dim"="4,4,1" {
+; CHECK-LABEL: define ptx_kernel i32 @test_laneid(
+; CHECK-SAME: ) #[[ATTR4]] {
+; CHECK-NEXT:    [[TMP1:%.*]] = call range(i32 0, 32) i32 @llvm.nvvm.read.ptx.sreg.laneid()
+; CHECK-NEXT:    ret i32 [[TMP1]]
+;
+  %1 = call i32 @llvm.nvvm.read.ptx.sreg.laneid()
+  ret i32 %1
+}
+
 
 ; DEFAULT-DAG: declare noundef range(i32 0, 1024) i32 @llvm.nvvm.read.ptx.sreg.tid.x()
 ; DEFAULT-DAG: declare noundef range(i32 0, 1024) i32 @llvm.nvvm.read.ptx.sreg.tid.y()