diff --git a/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp b/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
index 6f2ea8ad1ff01..263f7127fbf10 100644
--- a/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
+++ b/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
@@ -2466,6 +2466,9 @@ SILoadStoreOptimizer::collectMergeableInsts(
       continue;
 
     if (CI.InstClass == DS_WRITE && CI.IsAGPR) {
+      LLVM_DEBUG(
+          dbgs() << "cannot merge ds writes with mixed AGPR and VGPR data\n");
+
       // FIXME: nothing is illegal in a ds_write2 opcode with two AGPR data
       //        operands. However we are reporting that ds_write2 shall have
       //        only VGPR data so that machine copy propagation does not