From 1d284cdc17104c2ddc55be7b00d7489214299535 Mon Sep 17 00:00:00 2001 From: Rahul Joshi Date: Mon, 1 Sep 2025 14:33:29 -0700 Subject: [PATCH 1/2] [MC][DecoderEmitter] Fix buuld warning: explicit specialization cannot have a storage class --- llvm/include/llvm/MC/MCDecoder.h | 7 ------- .../AMDGPU/Disassembler/AMDGPUDisassembler.cpp | 12 ++++++------ .../Target/RISCV/Disassembler/RISCVDisassembler.cpp | 8 +++++--- llvm/utils/TableGen/DecoderEmitter.cpp | 8 ++++++++ 4 files changed, 19 insertions(+), 16 deletions(-) diff --git a/llvm/include/llvm/MC/MCDecoder.h b/llvm/include/llvm/MC/MCDecoder.h index 459c8a6a5ea34..87df6c10d8bb2 100644 --- a/llvm/include/llvm/MC/MCDecoder.h +++ b/llvm/include/llvm/MC/MCDecoder.h @@ -72,13 +72,6 @@ insertBits(IntType &field, IntType bits, unsigned startBit, unsigned numBits) { field |= bits << startBit; } -// InsnBitWidth is essentially a type trait used by the decoder emitter to query -// the supported bitwidth for a given type. But default, the value is 0, making -// it an invalid type for use as `InsnType` when instantiating the decoder. -// Individual targets are expected to provide specializations for these based -// on their usage. -template static constexpr uint32_t InsnBitWidth = 0; - } // namespace llvm::MCD #endif // LLVM_MC_MCDECODER_H diff --git a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp index 2dc607608b80c..bb9f811683255 100644 --- a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp +++ b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp @@ -447,13 +447,13 @@ static DecodeStatus decodeVersionImm(MCInst &Inst, unsigned Imm, #include "AMDGPUGenDisassemblerTables.inc" +namespace { // Define bitwidths for various types used to instantiate the decoder. -template <> inline constexpr uint32_t llvm::MCD::InsnBitWidth = 32; -template <> inline constexpr uint32_t llvm::MCD::InsnBitWidth = 64; -template <> -inline constexpr uint32_t llvm::MCD::InsnBitWidth> = 96; -template <> -inline constexpr uint32_t llvm::MCD::InsnBitWidth> = 128; +template <> constexpr uint32_t InsnBitWidth = 32; +template <> constexpr uint32_t InsnBitWidth = 64; +template <> constexpr uint32_t InsnBitWidth> = 96; +template <> constexpr uint32_t InsnBitWidth> = 128; +} // namespace //===----------------------------------------------------------------------===// // diff --git a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp index 987d6c7e1900a..b1b7ea5246fda 100644 --- a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp +++ b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp @@ -701,11 +701,13 @@ static constexpr DecoderListEntry DecoderList32[]{ {DecoderTableZdinxRV32Only32, {}, "RV32-only Zdinx (Double in Integer)"}, }; +namespace { // Define bitwidths for various types used to instantiate the decoder. -template <> inline constexpr uint32_t llvm::MCD::InsnBitWidth = 16; -template <> inline constexpr uint32_t llvm::MCD::InsnBitWidth = 32; +template <> constexpr uint32_t InsnBitWidth = 16; +template <> constexpr uint32_t InsnBitWidth = 32; // Use uint64_t to represent 48 bit instructions. -template <> inline constexpr uint32_t llvm::MCD::InsnBitWidth = 48; +template <> constexpr uint32_t InsnBitWidth = 48; +} // namespace DecodeStatus RISCVDisassembler::getInstruction32(MCInst &MI, uint64_t &Size, ArrayRef Bytes, diff --git a/llvm/utils/TableGen/DecoderEmitter.cpp b/llvm/utils/TableGen/DecoderEmitter.cpp index 354c2a788d5b1..6d28fa98ba9a3 100644 --- a/llvm/utils/TableGen/DecoderEmitter.cpp +++ b/llvm/utils/TableGen/DecoderEmitter.cpp @@ -2479,6 +2479,14 @@ void DecoderEmitter::run(raw_ostream &o) const { #include namespace { + +// InsnBitWidth is essentially a type trait used by the decoder emitter to query +// the supported bitwidth for a given type. But default, the value is 0, making +// it an invalid type for use as `InsnType` when instantiating the decoder. +// Individual targets are expected to provide specializations for these based +// on their usage. +template static constexpr uint32_t InsnBitWidth = 0; + )"; // Do extra bookkeeping for variable-length encodings. From bbc3d886e3aa73e9f7a56b4a61effe67ad8d373f Mon Sep 17 00:00:00 2001 From: Rahul Joshi Date: Mon, 1 Sep 2025 16:08:38 -0700 Subject: [PATCH 2/2] Remove one more static for InstBitWidth --- llvm/utils/TableGen/DecoderEmitter.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/llvm/utils/TableGen/DecoderEmitter.cpp b/llvm/utils/TableGen/DecoderEmitter.cpp index 6d28fa98ba9a3..fcaf433918092 100644 --- a/llvm/utils/TableGen/DecoderEmitter.cpp +++ b/llvm/utils/TableGen/DecoderEmitter.cpp @@ -2485,7 +2485,7 @@ namespace { // it an invalid type for use as `InsnType` when instantiating the decoder. // Individual targets are expected to provide specializations for these based // on their usage. -template static constexpr uint32_t InsnBitWidth = 0; +template constexpr uint32_t InsnBitWidth = 0; )";