diff --git a/llvm/test/CodeGen/PowerPC/recipest.ll b/llvm/test/CodeGen/PowerPC/recipest.ll index 2598a410b8761..4bf572bb02942 100644 --- a/llvm/test/CodeGen/PowerPC/recipest.ll +++ b/llvm/test/CodeGen/PowerPC/recipest.ll @@ -1,7 +1,10 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-vsx | FileCheck --check-prefix=CHECK-P7 %s -; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 | FileCheck --check-prefix=CHECK-P8 %s -; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 | FileCheck --check-prefix=CHECK-P9 %s +; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-vsx \ +; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr | FileCheck --check-prefix=CHECK-P7 %s +; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 \ +; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr | FileCheck --check-prefix=CHECK-P8 %s +; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 \ +; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr | FileCheck --check-prefix=CHECK-P9 %s target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" @@ -14,58 +17,58 @@ declare <2 x double> @llvm.sqrt.v2f64(<2 x double>) define double @foo_fmf(double %a, double %b) nounwind { ; CHECK-P7-LABEL: foo_fmf: ; CHECK-P7: # %bb.0: -; CHECK-P7-NEXT: frsqrte 0, 2 -; CHECK-P7-NEXT: addis 3, 2, .LCPI0_0@toc@ha -; CHECK-P7-NEXT: lfs 4, .LCPI0_0@toc@l(3) -; CHECK-P7-NEXT: addis 3, 2, .LCPI0_1@toc@ha -; CHECK-P7-NEXT: lfs 5, .LCPI0_1@toc@l(3) -; CHECK-P7-NEXT: fmul 3, 2, 0 -; CHECK-P7-NEXT: fmadd 3, 3, 0, 4 -; CHECK-P7-NEXT: fmul 0, 0, 5 -; CHECK-P7-NEXT: fmul 0, 0, 3 -; CHECK-P7-NEXT: fmul 2, 2, 0 -; CHECK-P7-NEXT: fmadd 2, 2, 0, 4 -; CHECK-P7-NEXT: fmul 0, 0, 5 -; CHECK-P7-NEXT: fmul 0, 0, 2 -; CHECK-P7-NEXT: fmul 1, 1, 0 +; CHECK-P7-NEXT: frsqrte f0, f2 +; CHECK-P7-NEXT: addis r3, r2, .LCPI0_0@toc@ha +; CHECK-P7-NEXT: lfs f4, .LCPI0_0@toc@l(r3) +; CHECK-P7-NEXT: addis r3, r2, .LCPI0_1@toc@ha +; CHECK-P7-NEXT: lfs f5, .LCPI0_1@toc@l(r3) +; CHECK-P7-NEXT: fmul f3, f2, f0 +; CHECK-P7-NEXT: fmadd f3, f3, f0, f4 +; CHECK-P7-NEXT: fmul f0, f0, f5 +; CHECK-P7-NEXT: fmul f0, f0, f3 +; CHECK-P7-NEXT: fmul f2, f2, f0 +; CHECK-P7-NEXT: fmadd f2, f2, f0, f4 +; CHECK-P7-NEXT: fmul f0, f0, f5 +; CHECK-P7-NEXT: fmul f0, f0, f2 +; CHECK-P7-NEXT: fmul f1, f1, f0 ; CHECK-P7-NEXT: blr ; ; CHECK-P8-LABEL: foo_fmf: ; CHECK-P8: # %bb.0: -; CHECK-P8-NEXT: vspltisw 2, -3 -; CHECK-P8-NEXT: xsrsqrtedp 0, 2 -; CHECK-P8-NEXT: addis 3, 2, .LCPI0_0@toc@ha -; CHECK-P8-NEXT: xvcvsxwdp 4, 34 -; CHECK-P8-NEXT: xsmuldp 3, 2, 0 -; CHECK-P8-NEXT: fmr 5, 4 -; CHECK-P8-NEXT: xsmaddadp 5, 3, 0 -; CHECK-P8-NEXT: lfs 3, .LCPI0_0@toc@l(3) -; CHECK-P8-NEXT: xsmuldp 0, 0, 3 -; CHECK-P8-NEXT: xsmuldp 0, 0, 5 -; CHECK-P8-NEXT: xsmuldp 2, 2, 0 -; CHECK-P8-NEXT: xsmaddadp 4, 2, 0 -; CHECK-P8-NEXT: xsmuldp 0, 0, 3 -; CHECK-P8-NEXT: xsmuldp 0, 0, 4 -; CHECK-P8-NEXT: xsmuldp 1, 1, 0 +; CHECK-P8-NEXT: vspltisw v2, -3 +; CHECK-P8-NEXT: xsrsqrtedp f0, f2 +; CHECK-P8-NEXT: addis r3, r2, .LCPI0_0@toc@ha +; CHECK-P8-NEXT: xvcvsxwdp vs4, v2 +; CHECK-P8-NEXT: xsmuldp f3, f2, f0 +; CHECK-P8-NEXT: fmr f5, f4 +; CHECK-P8-NEXT: xsmaddadp f5, f3, f0 +; CHECK-P8-NEXT: lfs f3, .LCPI0_0@toc@l(r3) +; CHECK-P8-NEXT: xsmuldp f0, f0, f3 +; CHECK-P8-NEXT: xsmuldp f0, f0, f5 +; CHECK-P8-NEXT: xsmuldp f2, f2, f0 +; CHECK-P8-NEXT: xsmaddadp f4, f2, f0 +; CHECK-P8-NEXT: xsmuldp f0, f0, f3 +; CHECK-P8-NEXT: xsmuldp f0, f0, f4 +; CHECK-P8-NEXT: xsmuldp f1, f1, f0 ; CHECK-P8-NEXT: blr ; ; CHECK-P9-LABEL: foo_fmf: ; CHECK-P9: # %bb.0: -; CHECK-P9-NEXT: xsrsqrtedp 0, 2 -; CHECK-P9-NEXT: vspltisw 2, -3 -; CHECK-P9-NEXT: addis 3, 2, .LCPI0_0@toc@ha -; CHECK-P9-NEXT: xsmuldp 3, 2, 0 -; CHECK-P9-NEXT: xvcvsxwdp 4, 34 -; CHECK-P9-NEXT: fmr 5, 4 -; CHECK-P9-NEXT: xsmaddadp 5, 3, 0 -; CHECK-P9-NEXT: lfs 3, .LCPI0_0@toc@l(3) -; CHECK-P9-NEXT: xsmuldp 0, 0, 3 -; CHECK-P9-NEXT: xsmuldp 0, 0, 5 -; CHECK-P9-NEXT: xsmuldp 2, 2, 0 -; CHECK-P9-NEXT: xsmaddadp 4, 2, 0 -; CHECK-P9-NEXT: xsmuldp 0, 0, 3 -; CHECK-P9-NEXT: xsmuldp 0, 0, 4 -; CHECK-P9-NEXT: xsmuldp 1, 1, 0 +; CHECK-P9-NEXT: xsrsqrtedp f0, f2 +; CHECK-P9-NEXT: vspltisw v2, -3 +; CHECK-P9-NEXT: addis r3, r2, .LCPI0_0@toc@ha +; CHECK-P9-NEXT: xsmuldp f3, f2, f0 +; CHECK-P9-NEXT: xvcvsxwdp vs4, v2 +; CHECK-P9-NEXT: fmr f5, f4 +; CHECK-P9-NEXT: xsmaddadp f5, f3, f0 +; CHECK-P9-NEXT: lfs f3, .LCPI0_0@toc@l(r3) +; CHECK-P9-NEXT: xsmuldp f0, f0, f3 +; CHECK-P9-NEXT: xsmuldp f0, f0, f5 +; CHECK-P9-NEXT: xsmuldp f2, f2, f0 +; CHECK-P9-NEXT: xsmaddadp f4, f2, f0 +; CHECK-P9-NEXT: xsmuldp f0, f0, f3 +; CHECK-P9-NEXT: xsmuldp f0, f0, f4 +; CHECK-P9-NEXT: xsmuldp f1, f1, f0 ; CHECK-P9-NEXT: blr %x = call arcp contract reassoc double @llvm.sqrt.f64(double %b) %r = fdiv arcp contract reassoc double %a, %x @@ -75,20 +78,20 @@ define double @foo_fmf(double %a, double %b) nounwind { define double @foo_safe(double %a, double %b) nounwind { ; CHECK-P7-LABEL: foo_safe: ; CHECK-P7: # %bb.0: -; CHECK-P7-NEXT: fsqrt 0, 2 -; CHECK-P7-NEXT: fdiv 1, 1, 0 +; CHECK-P7-NEXT: fsqrt f0, f2 +; CHECK-P7-NEXT: fdiv f1, f1, f0 ; CHECK-P7-NEXT: blr ; ; CHECK-P8-LABEL: foo_safe: ; CHECK-P8: # %bb.0: -; CHECK-P8-NEXT: xssqrtdp 0, 2 -; CHECK-P8-NEXT: xsdivdp 1, 1, 0 +; CHECK-P8-NEXT: xssqrtdp f0, f2 +; CHECK-P8-NEXT: xsdivdp f1, f1, f0 ; CHECK-P8-NEXT: blr ; ; CHECK-P9-LABEL: foo_safe: ; CHECK-P9: # %bb.0: -; CHECK-P9-NEXT: xssqrtdp 0, 2 -; CHECK-P9-NEXT: xsdivdp 1, 1, 0 +; CHECK-P9-NEXT: xssqrtdp f0, f2 +; CHECK-P9-NEXT: xsdivdp f1, f1, f0 ; CHECK-P9-NEXT: blr %x = call double @llvm.sqrt.f64(double %b) %r = fdiv double %a, %x @@ -98,20 +101,20 @@ define double @foo_safe(double %a, double %b) nounwind { define double @no_estimate_refinement_f64(double %a, double %b) #0 { ; CHECK-P7-LABEL: no_estimate_refinement_f64: ; CHECK-P7: # %bb.0: -; CHECK-P7-NEXT: frsqrte 0, 2 -; CHECK-P7-NEXT: fmul 1, 1, 0 +; CHECK-P7-NEXT: frsqrte f0, f2 +; CHECK-P7-NEXT: fmul f1, f1, f0 ; CHECK-P7-NEXT: blr ; ; CHECK-P8-LABEL: no_estimate_refinement_f64: ; CHECK-P8: # %bb.0: -; CHECK-P8-NEXT: xsrsqrtedp 0, 2 -; CHECK-P8-NEXT: xsmuldp 1, 1, 0 +; CHECK-P8-NEXT: xsrsqrtedp f0, f2 +; CHECK-P8-NEXT: xsmuldp f1, f1, f0 ; CHECK-P8-NEXT: blr ; ; CHECK-P9-LABEL: no_estimate_refinement_f64: ; CHECK-P9: # %bb.0: -; CHECK-P9-NEXT: xsrsqrtedp 0, 2 -; CHECK-P9-NEXT: xsmuldp 1, 1, 0 +; CHECK-P9-NEXT: xsrsqrtedp f0, f2 +; CHECK-P9-NEXT: xsmuldp f1, f1, f0 ; CHECK-P9-NEXT: blr %x = call arcp reassoc double @llvm.sqrt.f64(double %b) %r = fdiv arcp reassoc double %a, %x @@ -121,44 +124,44 @@ define double @no_estimate_refinement_f64(double %a, double %b) #0 { define double @foof_fmf(double %a, float %b) nounwind { ; CHECK-P7-LABEL: foof_fmf: ; CHECK-P7: # %bb.0: -; CHECK-P7-NEXT: frsqrtes 0, 2 -; CHECK-P7-NEXT: addis 3, 2, .LCPI3_0@toc@ha -; CHECK-P7-NEXT: lfs 3, .LCPI3_0@toc@l(3) -; CHECK-P7-NEXT: addis 3, 2, .LCPI3_1@toc@ha -; CHECK-P7-NEXT: fmuls 2, 2, 0 -; CHECK-P7-NEXT: fmadds 2, 2, 0, 3 -; CHECK-P7-NEXT: lfs 3, .LCPI3_1@toc@l(3) -; CHECK-P7-NEXT: fmuls 0, 0, 3 -; CHECK-P7-NEXT: fmuls 0, 0, 2 -; CHECK-P7-NEXT: fmul 1, 1, 0 +; CHECK-P7-NEXT: frsqrtes f0, f2 +; CHECK-P7-NEXT: addis r3, r2, .LCPI3_0@toc@ha +; CHECK-P7-NEXT: lfs f3, .LCPI3_0@toc@l(r3) +; CHECK-P7-NEXT: addis r3, r2, .LCPI3_1@toc@ha +; CHECK-P7-NEXT: fmuls f2, f2, f0 +; CHECK-P7-NEXT: fmadds f2, f2, f0, f3 +; CHECK-P7-NEXT: lfs f3, .LCPI3_1@toc@l(r3) +; CHECK-P7-NEXT: fmuls f0, f0, f3 +; CHECK-P7-NEXT: fmuls f0, f0, f2 +; CHECK-P7-NEXT: fmul f1, f1, f0 ; CHECK-P7-NEXT: blr ; ; CHECK-P8-LABEL: foof_fmf: ; CHECK-P8: # %bb.0: -; CHECK-P8-NEXT: xsrsqrtesp 0, 2 -; CHECK-P8-NEXT: vspltisw 2, -3 -; CHECK-P8-NEXT: addis 3, 2, .LCPI3_0@toc@ha -; CHECK-P8-NEXT: xvcvsxwdp 3, 34 -; CHECK-P8-NEXT: xsmulsp 2, 2, 0 -; CHECK-P8-NEXT: xsmaddasp 3, 2, 0 -; CHECK-P8-NEXT: lfs 2, .LCPI3_0@toc@l(3) -; CHECK-P8-NEXT: xsmulsp 0, 0, 2 -; CHECK-P8-NEXT: xsmulsp 0, 0, 3 -; CHECK-P8-NEXT: xsmuldp 1, 1, 0 +; CHECK-P8-NEXT: xsrsqrtesp f0, f2 +; CHECK-P8-NEXT: vspltisw v2, -3 +; CHECK-P8-NEXT: addis r3, r2, .LCPI3_0@toc@ha +; CHECK-P8-NEXT: xvcvsxwdp vs3, v2 +; CHECK-P8-NEXT: xsmulsp f2, f2, f0 +; CHECK-P8-NEXT: xsmaddasp f3, f2, f0 +; CHECK-P8-NEXT: lfs f2, .LCPI3_0@toc@l(r3) +; CHECK-P8-NEXT: xsmulsp f0, f0, f2 +; CHECK-P8-NEXT: xsmulsp f0, f0, f3 +; CHECK-P8-NEXT: xsmuldp f1, f1, f0 ; CHECK-P8-NEXT: blr ; ; CHECK-P9-LABEL: foof_fmf: ; CHECK-P9: # %bb.0: -; CHECK-P9-NEXT: xsrsqrtesp 0, 2 -; CHECK-P9-NEXT: vspltisw 2, -3 -; CHECK-P9-NEXT: addis 3, 2, .LCPI3_0@toc@ha -; CHECK-P9-NEXT: xsmulsp 2, 2, 0 -; CHECK-P9-NEXT: xvcvsxwdp 3, 34 -; CHECK-P9-NEXT: xsmaddasp 3, 2, 0 -; CHECK-P9-NEXT: lfs 2, .LCPI3_0@toc@l(3) -; CHECK-P9-NEXT: xsmulsp 0, 0, 2 -; CHECK-P9-NEXT: xsmulsp 0, 0, 3 -; CHECK-P9-NEXT: xsmuldp 1, 1, 0 +; CHECK-P9-NEXT: xsrsqrtesp f0, f2 +; CHECK-P9-NEXT: vspltisw v2, -3 +; CHECK-P9-NEXT: addis r3, r2, .LCPI3_0@toc@ha +; CHECK-P9-NEXT: xsmulsp f2, f2, f0 +; CHECK-P9-NEXT: xvcvsxwdp vs3, v2 +; CHECK-P9-NEXT: xsmaddasp f3, f2, f0 +; CHECK-P9-NEXT: lfs f2, .LCPI3_0@toc@l(r3) +; CHECK-P9-NEXT: xsmulsp f0, f0, f2 +; CHECK-P9-NEXT: xsmulsp f0, f0, f3 +; CHECK-P9-NEXT: xsmuldp f1, f1, f0 ; CHECK-P9-NEXT: blr %x = call contract reassoc arcp float @llvm.sqrt.f32(float %b) %y = fpext float %x to double @@ -169,20 +172,20 @@ define double @foof_fmf(double %a, float %b) nounwind { define double @foof_safe(double %a, float %b) nounwind { ; CHECK-P7-LABEL: foof_safe: ; CHECK-P7: # %bb.0: -; CHECK-P7-NEXT: fsqrts 0, 2 -; CHECK-P7-NEXT: fdiv 1, 1, 0 +; CHECK-P7-NEXT: fsqrts f0, f2 +; CHECK-P7-NEXT: fdiv f1, f1, f0 ; CHECK-P7-NEXT: blr ; ; CHECK-P8-LABEL: foof_safe: ; CHECK-P8: # %bb.0: -; CHECK-P8-NEXT: xssqrtsp 0, 2 -; CHECK-P8-NEXT: xsdivdp 1, 1, 0 +; CHECK-P8-NEXT: xssqrtsp f0, f2 +; CHECK-P8-NEXT: xsdivdp f1, f1, f0 ; CHECK-P8-NEXT: blr ; ; CHECK-P9-LABEL: foof_safe: ; CHECK-P9: # %bb.0: -; CHECK-P9-NEXT: xssqrtsp 0, 2 -; CHECK-P9-NEXT: xsdivdp 1, 1, 0 +; CHECK-P9-NEXT: xssqrtsp f0, f2 +; CHECK-P9-NEXT: xsdivdp f1, f1, f0 ; CHECK-P9-NEXT: blr %x = call float @llvm.sqrt.f32(float %b) %y = fpext float %x to double @@ -193,61 +196,61 @@ define double @foof_safe(double %a, float %b) nounwind { define float @food_fmf(float %a, double %b) nounwind { ; CHECK-P7-LABEL: food_fmf: ; CHECK-P7: # %bb.0: -; CHECK-P7-NEXT: frsqrte 0, 2 -; CHECK-P7-NEXT: addis 3, 2, .LCPI5_0@toc@ha -; CHECK-P7-NEXT: lfs 4, .LCPI5_0@toc@l(3) -; CHECK-P7-NEXT: addis 3, 2, .LCPI5_1@toc@ha -; CHECK-P7-NEXT: lfs 5, .LCPI5_1@toc@l(3) -; CHECK-P7-NEXT: fmul 3, 2, 0 -; CHECK-P7-NEXT: fmadd 3, 3, 0, 4 -; CHECK-P7-NEXT: fmul 0, 0, 5 -; CHECK-P7-NEXT: fmul 0, 0, 3 -; CHECK-P7-NEXT: fmul 2, 2, 0 -; CHECK-P7-NEXT: fmadd 2, 2, 0, 4 -; CHECK-P7-NEXT: fmul 0, 0, 5 -; CHECK-P7-NEXT: fmul 0, 0, 2 -; CHECK-P7-NEXT: frsp 0, 0 -; CHECK-P7-NEXT: fmuls 1, 1, 0 +; CHECK-P7-NEXT: frsqrte f0, f2 +; CHECK-P7-NEXT: addis r3, r2, .LCPI5_0@toc@ha +; CHECK-P7-NEXT: lfs f4, .LCPI5_0@toc@l(r3) +; CHECK-P7-NEXT: addis r3, r2, .LCPI5_1@toc@ha +; CHECK-P7-NEXT: lfs f5, .LCPI5_1@toc@l(r3) +; CHECK-P7-NEXT: fmul f3, f2, f0 +; CHECK-P7-NEXT: fmadd f3, f3, f0, f4 +; CHECK-P7-NEXT: fmul f0, f0, f5 +; CHECK-P7-NEXT: fmul f0, f0, f3 +; CHECK-P7-NEXT: fmul f2, f2, f0 +; CHECK-P7-NEXT: fmadd f2, f2, f0, f4 +; CHECK-P7-NEXT: fmul f0, f0, f5 +; CHECK-P7-NEXT: fmul f0, f0, f2 +; CHECK-P7-NEXT: frsp f0, f0 +; CHECK-P7-NEXT: fmuls f1, f1, f0 ; CHECK-P7-NEXT: blr ; ; CHECK-P8-LABEL: food_fmf: ; CHECK-P8: # %bb.0: -; CHECK-P8-NEXT: vspltisw 2, -3 -; CHECK-P8-NEXT: xsrsqrtedp 0, 2 -; CHECK-P8-NEXT: addis 3, 2, .LCPI5_0@toc@ha -; CHECK-P8-NEXT: xvcvsxwdp 4, 34 -; CHECK-P8-NEXT: xsmuldp 3, 2, 0 -; CHECK-P8-NEXT: fmr 5, 4 -; CHECK-P8-NEXT: xsmaddadp 5, 3, 0 -; CHECK-P8-NEXT: lfs 3, .LCPI5_0@toc@l(3) -; CHECK-P8-NEXT: xsmuldp 0, 0, 3 -; CHECK-P8-NEXT: xsmuldp 0, 0, 5 -; CHECK-P8-NEXT: xsmuldp 2, 2, 0 -; CHECK-P8-NEXT: xsmaddadp 4, 2, 0 -; CHECK-P8-NEXT: xsmuldp 0, 0, 3 -; CHECK-P8-NEXT: xsmuldp 0, 0, 4 -; CHECK-P8-NEXT: xsrsp 0, 0 -; CHECK-P8-NEXT: xsmulsp 1, 1, 0 +; CHECK-P8-NEXT: vspltisw v2, -3 +; CHECK-P8-NEXT: xsrsqrtedp f0, f2 +; CHECK-P8-NEXT: addis r3, r2, .LCPI5_0@toc@ha +; CHECK-P8-NEXT: xvcvsxwdp vs4, v2 +; CHECK-P8-NEXT: xsmuldp f3, f2, f0 +; CHECK-P8-NEXT: fmr f5, f4 +; CHECK-P8-NEXT: xsmaddadp f5, f3, f0 +; CHECK-P8-NEXT: lfs f3, .LCPI5_0@toc@l(r3) +; CHECK-P8-NEXT: xsmuldp f0, f0, f3 +; CHECK-P8-NEXT: xsmuldp f0, f0, f5 +; CHECK-P8-NEXT: xsmuldp f2, f2, f0 +; CHECK-P8-NEXT: xsmaddadp f4, f2, f0 +; CHECK-P8-NEXT: xsmuldp f0, f0, f3 +; CHECK-P8-NEXT: xsmuldp f0, f0, f4 +; CHECK-P8-NEXT: xsrsp f0, f0 +; CHECK-P8-NEXT: xsmulsp f1, f1, f0 ; CHECK-P8-NEXT: blr ; ; CHECK-P9-LABEL: food_fmf: ; CHECK-P9: # %bb.0: -; CHECK-P9-NEXT: xsrsqrtedp 0, 2 -; CHECK-P9-NEXT: vspltisw 2, -3 -; CHECK-P9-NEXT: addis 3, 2, .LCPI5_0@toc@ha -; CHECK-P9-NEXT: xsmuldp 3, 2, 0 -; CHECK-P9-NEXT: xvcvsxwdp 4, 34 -; CHECK-P9-NEXT: fmr 5, 4 -; CHECK-P9-NEXT: xsmaddadp 5, 3, 0 -; CHECK-P9-NEXT: lfs 3, .LCPI5_0@toc@l(3) -; CHECK-P9-NEXT: xsmuldp 0, 0, 3 -; CHECK-P9-NEXT: xsmuldp 0, 0, 5 -; CHECK-P9-NEXT: xsmuldp 2, 2, 0 -; CHECK-P9-NEXT: xsmaddadp 4, 2, 0 -; CHECK-P9-NEXT: xsmuldp 0, 0, 3 -; CHECK-P9-NEXT: xsmuldp 0, 0, 4 -; CHECK-P9-NEXT: xsrsp 0, 0 -; CHECK-P9-NEXT: xsmulsp 1, 1, 0 +; CHECK-P9-NEXT: xsrsqrtedp f0, f2 +; CHECK-P9-NEXT: vspltisw v2, -3 +; CHECK-P9-NEXT: addis r3, r2, .LCPI5_0@toc@ha +; CHECK-P9-NEXT: xsmuldp f3, f2, f0 +; CHECK-P9-NEXT: xvcvsxwdp vs4, v2 +; CHECK-P9-NEXT: fmr f5, f4 +; CHECK-P9-NEXT: xsmaddadp f5, f3, f0 +; CHECK-P9-NEXT: lfs f3, .LCPI5_0@toc@l(r3) +; CHECK-P9-NEXT: xsmuldp f0, f0, f3 +; CHECK-P9-NEXT: xsmuldp f0, f0, f5 +; CHECK-P9-NEXT: xsmuldp f2, f2, f0 +; CHECK-P9-NEXT: xsmaddadp f4, f2, f0 +; CHECK-P9-NEXT: xsmuldp f0, f0, f3 +; CHECK-P9-NEXT: xsmuldp f0, f0, f4 +; CHECK-P9-NEXT: xsrsp f0, f0 +; CHECK-P9-NEXT: xsmulsp f1, f1, f0 ; CHECK-P9-NEXT: blr %x = call contract reassoc arcp double @llvm.sqrt.f64(double %b) %y = fptrunc double %x to float @@ -258,23 +261,23 @@ define float @food_fmf(float %a, double %b) nounwind { define float @food_safe(float %a, double %b) nounwind { ; CHECK-P7-LABEL: food_safe: ; CHECK-P7: # %bb.0: -; CHECK-P7-NEXT: fsqrt 0, 2 -; CHECK-P7-NEXT: frsp 0, 0 -; CHECK-P7-NEXT: fdivs 1, 1, 0 +; CHECK-P7-NEXT: fsqrt f0, f2 +; CHECK-P7-NEXT: frsp f0, f0 +; CHECK-P7-NEXT: fdivs f1, f1, f0 ; CHECK-P7-NEXT: blr ; ; CHECK-P8-LABEL: food_safe: ; CHECK-P8: # %bb.0: -; CHECK-P8-NEXT: xssqrtdp 0, 2 -; CHECK-P8-NEXT: xsrsp 0, 0 -; CHECK-P8-NEXT: xsdivsp 1, 1, 0 +; CHECK-P8-NEXT: xssqrtdp f0, f2 +; CHECK-P8-NEXT: xsrsp f0, f0 +; CHECK-P8-NEXT: xsdivsp f1, f1, f0 ; CHECK-P8-NEXT: blr ; ; CHECK-P9-LABEL: food_safe: ; CHECK-P9: # %bb.0: -; CHECK-P9-NEXT: xssqrtdp 0, 2 -; CHECK-P9-NEXT: xsrsp 0, 0 -; CHECK-P9-NEXT: xsdivsp 1, 1, 0 +; CHECK-P9-NEXT: xssqrtdp f0, f2 +; CHECK-P9-NEXT: xsrsp f0, f0 +; CHECK-P9-NEXT: xsdivsp f1, f1, f0 ; CHECK-P9-NEXT: blr %x = call double @llvm.sqrt.f64(double %b) %y = fptrunc double %x to float @@ -285,44 +288,44 @@ define float @food_safe(float %a, double %b) nounwind { define float @goo_fmf(float %a, float %b) nounwind { ; CHECK-P7-LABEL: goo_fmf: ; CHECK-P7: # %bb.0: -; CHECK-P7-NEXT: frsqrtes 0, 2 -; CHECK-P7-NEXT: addis 3, 2, .LCPI7_0@toc@ha -; CHECK-P7-NEXT: lfs 3, .LCPI7_0@toc@l(3) -; CHECK-P7-NEXT: addis 3, 2, .LCPI7_1@toc@ha -; CHECK-P7-NEXT: fmuls 2, 2, 0 -; CHECK-P7-NEXT: fmadds 2, 2, 0, 3 -; CHECK-P7-NEXT: lfs 3, .LCPI7_1@toc@l(3) -; CHECK-P7-NEXT: fmuls 0, 0, 3 -; CHECK-P7-NEXT: fmuls 0, 0, 2 -; CHECK-P7-NEXT: fmuls 1, 1, 0 +; CHECK-P7-NEXT: frsqrtes f0, f2 +; CHECK-P7-NEXT: addis r3, r2, .LCPI7_0@toc@ha +; CHECK-P7-NEXT: lfs f3, .LCPI7_0@toc@l(r3) +; CHECK-P7-NEXT: addis r3, r2, .LCPI7_1@toc@ha +; CHECK-P7-NEXT: fmuls f2, f2, f0 +; CHECK-P7-NEXT: fmadds f2, f2, f0, f3 +; CHECK-P7-NEXT: lfs f3, .LCPI7_1@toc@l(r3) +; CHECK-P7-NEXT: fmuls f0, f0, f3 +; CHECK-P7-NEXT: fmuls f0, f0, f2 +; CHECK-P7-NEXT: fmuls f1, f1, f0 ; CHECK-P7-NEXT: blr ; ; CHECK-P8-LABEL: goo_fmf: ; CHECK-P8: # %bb.0: -; CHECK-P8-NEXT: xsrsqrtesp 0, 2 -; CHECK-P8-NEXT: vspltisw 2, -3 -; CHECK-P8-NEXT: addis 3, 2, .LCPI7_0@toc@ha -; CHECK-P8-NEXT: xvcvsxwdp 3, 34 -; CHECK-P8-NEXT: xsmulsp 2, 2, 0 -; CHECK-P8-NEXT: xsmaddasp 3, 2, 0 -; CHECK-P8-NEXT: lfs 2, .LCPI7_0@toc@l(3) -; CHECK-P8-NEXT: xsmulsp 0, 0, 2 -; CHECK-P8-NEXT: xsmulsp 0, 0, 3 -; CHECK-P8-NEXT: xsmulsp 1, 1, 0 +; CHECK-P8-NEXT: xsrsqrtesp f0, f2 +; CHECK-P8-NEXT: vspltisw v2, -3 +; CHECK-P8-NEXT: addis r3, r2, .LCPI7_0@toc@ha +; CHECK-P8-NEXT: xvcvsxwdp vs3, v2 +; CHECK-P8-NEXT: xsmulsp f2, f2, f0 +; CHECK-P8-NEXT: xsmaddasp f3, f2, f0 +; CHECK-P8-NEXT: lfs f2, .LCPI7_0@toc@l(r3) +; CHECK-P8-NEXT: xsmulsp f0, f0, f2 +; CHECK-P8-NEXT: xsmulsp f0, f0, f3 +; CHECK-P8-NEXT: xsmulsp f1, f1, f0 ; CHECK-P8-NEXT: blr ; ; CHECK-P9-LABEL: goo_fmf: ; CHECK-P9: # %bb.0: -; CHECK-P9-NEXT: xsrsqrtesp 0, 2 -; CHECK-P9-NEXT: vspltisw 2, -3 -; CHECK-P9-NEXT: addis 3, 2, .LCPI7_0@toc@ha -; CHECK-P9-NEXT: xsmulsp 2, 2, 0 -; CHECK-P9-NEXT: xvcvsxwdp 3, 34 -; CHECK-P9-NEXT: xsmaddasp 3, 2, 0 -; CHECK-P9-NEXT: lfs 2, .LCPI7_0@toc@l(3) -; CHECK-P9-NEXT: xsmulsp 0, 0, 2 -; CHECK-P9-NEXT: xsmulsp 0, 0, 3 -; CHECK-P9-NEXT: xsmulsp 1, 1, 0 +; CHECK-P9-NEXT: xsrsqrtesp f0, f2 +; CHECK-P9-NEXT: vspltisw v2, -3 +; CHECK-P9-NEXT: addis r3, r2, .LCPI7_0@toc@ha +; CHECK-P9-NEXT: xsmulsp f2, f2, f0 +; CHECK-P9-NEXT: xvcvsxwdp vs3, v2 +; CHECK-P9-NEXT: xsmaddasp f3, f2, f0 +; CHECK-P9-NEXT: lfs f2, .LCPI7_0@toc@l(r3) +; CHECK-P9-NEXT: xsmulsp f0, f0, f2 +; CHECK-P9-NEXT: xsmulsp f0, f0, f3 +; CHECK-P9-NEXT: xsmulsp f1, f1, f0 ; CHECK-P9-NEXT: blr %x = call contract reassoc arcp float @llvm.sqrt.f32(float %b) %r = fdiv contract reassoc arcp float %a, %x @@ -332,20 +335,20 @@ define float @goo_fmf(float %a, float %b) nounwind { define float @goo_safe(float %a, float %b) nounwind { ; CHECK-P7-LABEL: goo_safe: ; CHECK-P7: # %bb.0: -; CHECK-P7-NEXT: fsqrts 0, 2 -; CHECK-P7-NEXT: fdivs 1, 1, 0 +; CHECK-P7-NEXT: fsqrts f0, f2 +; CHECK-P7-NEXT: fdivs f1, f1, f0 ; CHECK-P7-NEXT: blr ; ; CHECK-P8-LABEL: goo_safe: ; CHECK-P8: # %bb.0: -; CHECK-P8-NEXT: xssqrtsp 0, 2 -; CHECK-P8-NEXT: xsdivsp 1, 1, 0 +; CHECK-P8-NEXT: xssqrtsp f0, f2 +; CHECK-P8-NEXT: xsdivsp f1, f1, f0 ; CHECK-P8-NEXT: blr ; ; CHECK-P9-LABEL: goo_safe: ; CHECK-P9: # %bb.0: -; CHECK-P9-NEXT: xssqrtsp 0, 2 -; CHECK-P9-NEXT: xsdivsp 1, 1, 0 +; CHECK-P9-NEXT: xssqrtsp f0, f2 +; CHECK-P9-NEXT: xsdivsp f1, f1, f0 ; CHECK-P9-NEXT: blr %x = call float @llvm.sqrt.f32(float %b) %r = fdiv float %a, %x @@ -355,20 +358,20 @@ define float @goo_safe(float %a, float %b) nounwind { define float @no_estimate_refinement_f32(float %a, float %b) #0 { ; CHECK-P7-LABEL: no_estimate_refinement_f32: ; CHECK-P7: # %bb.0: -; CHECK-P7-NEXT: frsqrtes 0, 2 -; CHECK-P7-NEXT: fmuls 1, 1, 0 +; CHECK-P7-NEXT: frsqrtes f0, f2 +; CHECK-P7-NEXT: fmuls f1, f1, f0 ; CHECK-P7-NEXT: blr ; ; CHECK-P8-LABEL: no_estimate_refinement_f32: ; CHECK-P8: # %bb.0: -; CHECK-P8-NEXT: xsrsqrtesp 0, 2 -; CHECK-P8-NEXT: xsmulsp 1, 1, 0 +; CHECK-P8-NEXT: xsrsqrtesp f0, f2 +; CHECK-P8-NEXT: xsmulsp f1, f1, f0 ; CHECK-P8-NEXT: blr ; ; CHECK-P9-LABEL: no_estimate_refinement_f32: ; CHECK-P9: # %bb.0: -; CHECK-P9-NEXT: xsrsqrtesp 0, 2 -; CHECK-P9-NEXT: xsmulsp 1, 1, 0 +; CHECK-P9-NEXT: xsrsqrtesp f0, f2 +; CHECK-P9-NEXT: xsmulsp f1, f1, f0 ; CHECK-P9-NEXT: blr %x = call reassoc arcp float @llvm.sqrt.f32(float %b) %r = fdiv reassoc arcp float %a, %x @@ -378,56 +381,56 @@ define float @no_estimate_refinement_f32(float %a, float %b) #0 { define float @rsqrt_fmul_fmf(float %a, float %b, float %c) { ; CHECK-P7-LABEL: rsqrt_fmul_fmf: ; CHECK-P7: # %bb.0: -; CHECK-P7-NEXT: frsqrtes 0, 1 -; CHECK-P7-NEXT: addis 3, 2, .LCPI10_0@toc@ha -; CHECK-P7-NEXT: lfs 4, .LCPI10_0@toc@l(3) -; CHECK-P7-NEXT: addis 3, 2, .LCPI10_1@toc@ha -; CHECK-P7-NEXT: fmuls 1, 1, 0 -; CHECK-P7-NEXT: fmadds 1, 1, 0, 4 -; CHECK-P7-NEXT: lfs 4, .LCPI10_1@toc@l(3) -; CHECK-P7-NEXT: fmuls 0, 0, 4 -; CHECK-P7-NEXT: fmuls 0, 0, 1 -; CHECK-P7-NEXT: fres 1, 2 -; CHECK-P7-NEXT: fmuls 4, 0, 1 -; CHECK-P7-NEXT: fnmsubs 0, 2, 4, 0 -; CHECK-P7-NEXT: fmadds 0, 1, 0, 4 -; CHECK-P7-NEXT: fmuls 1, 3, 0 +; CHECK-P7-NEXT: frsqrtes f0, f1 +; CHECK-P7-NEXT: addis r3, r2, .LCPI10_0@toc@ha +; CHECK-P7-NEXT: lfs f4, .LCPI10_0@toc@l(r3) +; CHECK-P7-NEXT: addis r3, r2, .LCPI10_1@toc@ha +; CHECK-P7-NEXT: fmuls f1, f1, f0 +; CHECK-P7-NEXT: fmadds f1, f1, f0, f4 +; CHECK-P7-NEXT: lfs f4, .LCPI10_1@toc@l(r3) +; CHECK-P7-NEXT: fmuls f0, f0, f4 +; CHECK-P7-NEXT: fmuls f0, f0, f1 +; CHECK-P7-NEXT: fres f1, f2 +; CHECK-P7-NEXT: fmuls f4, f0, f1 +; CHECK-P7-NEXT: fnmsubs f0, f2, f4, f0 +; CHECK-P7-NEXT: fmadds f0, f1, f0, f4 +; CHECK-P7-NEXT: fmuls f1, f3, f0 ; CHECK-P7-NEXT: blr ; ; CHECK-P8-LABEL: rsqrt_fmul_fmf: ; CHECK-P8: # %bb.0: -; CHECK-P8-NEXT: xsrsqrtesp 0, 1 -; CHECK-P8-NEXT: vspltisw 2, -3 -; CHECK-P8-NEXT: addis 3, 2, .LCPI10_0@toc@ha -; CHECK-P8-NEXT: xvcvsxwdp 4, 34 -; CHECK-P8-NEXT: xsmulsp 1, 1, 0 -; CHECK-P8-NEXT: xsmaddasp 4, 1, 0 -; CHECK-P8-NEXT: lfs 1, .LCPI10_0@toc@l(3) -; CHECK-P8-NEXT: xsmulsp 0, 0, 1 -; CHECK-P8-NEXT: xsresp 1, 2 -; CHECK-P8-NEXT: xsmulsp 0, 0, 4 -; CHECK-P8-NEXT: xsmulsp 4, 0, 1 -; CHECK-P8-NEXT: xsnmsubasp 0, 2, 4 -; CHECK-P8-NEXT: xsmaddasp 4, 1, 0 -; CHECK-P8-NEXT: xsmulsp 1, 3, 4 +; CHECK-P8-NEXT: xsrsqrtesp f0, f1 +; CHECK-P8-NEXT: vspltisw v2, -3 +; CHECK-P8-NEXT: addis r3, r2, .LCPI10_0@toc@ha +; CHECK-P8-NEXT: xvcvsxwdp vs4, v2 +; CHECK-P8-NEXT: xsmulsp f1, f1, f0 +; CHECK-P8-NEXT: xsmaddasp f4, f1, f0 +; CHECK-P8-NEXT: lfs f1, .LCPI10_0@toc@l(r3) +; CHECK-P8-NEXT: xsmulsp f0, f0, f1 +; CHECK-P8-NEXT: xsresp f1, f2 +; CHECK-P8-NEXT: xsmulsp f0, f0, f4 +; CHECK-P8-NEXT: xsmulsp f4, f0, f1 +; CHECK-P8-NEXT: xsnmsubasp f0, f2, f4 +; CHECK-P8-NEXT: xsmaddasp f4, f1, f0 +; CHECK-P8-NEXT: xsmulsp f1, f3, f4 ; CHECK-P8-NEXT: blr ; ; CHECK-P9-LABEL: rsqrt_fmul_fmf: ; CHECK-P9: # %bb.0: -; CHECK-P9-NEXT: xsrsqrtesp 0, 1 -; CHECK-P9-NEXT: vspltisw 2, -3 -; CHECK-P9-NEXT: addis 3, 2, .LCPI10_0@toc@ha -; CHECK-P9-NEXT: xsmulsp 1, 1, 0 -; CHECK-P9-NEXT: xvcvsxwdp 4, 34 -; CHECK-P9-NEXT: xsmaddasp 4, 1, 0 -; CHECK-P9-NEXT: lfs 1, .LCPI10_0@toc@l(3) -; CHECK-P9-NEXT: xsmulsp 0, 0, 1 -; CHECK-P9-NEXT: xsresp 1, 2 -; CHECK-P9-NEXT: xsmulsp 0, 0, 4 -; CHECK-P9-NEXT: xsmulsp 4, 0, 1 -; CHECK-P9-NEXT: xsnmsubasp 0, 2, 4 -; CHECK-P9-NEXT: xsmaddasp 4, 1, 0 -; CHECK-P9-NEXT: xsmulsp 1, 3, 4 +; CHECK-P9-NEXT: xsrsqrtesp f0, f1 +; CHECK-P9-NEXT: vspltisw v2, -3 +; CHECK-P9-NEXT: addis r3, r2, .LCPI10_0@toc@ha +; CHECK-P9-NEXT: xsmulsp f1, f1, f0 +; CHECK-P9-NEXT: xvcvsxwdp vs4, v2 +; CHECK-P9-NEXT: xsmaddasp f4, f1, f0 +; CHECK-P9-NEXT: lfs f1, .LCPI10_0@toc@l(r3) +; CHECK-P9-NEXT: xsmulsp f0, f0, f1 +; CHECK-P9-NEXT: xsresp f1, f2 +; CHECK-P9-NEXT: xsmulsp f0, f0, f4 +; CHECK-P9-NEXT: xsmulsp f4, f0, f1 +; CHECK-P9-NEXT: xsnmsubasp f0, f2, f4 +; CHECK-P9-NEXT: xsmaddasp f4, f1, f0 +; CHECK-P9-NEXT: xsmulsp f1, f3, f4 ; CHECK-P9-NEXT: blr %x = call contract reassoc arcp nsz float @llvm.sqrt.f32(float %a) %y = fmul contract reassoc nsz float %x, %b @@ -438,23 +441,23 @@ define float @rsqrt_fmul_fmf(float %a, float %b, float %c) { define float @rsqrt_fmul_safe(float %a, float %b, float %c) { ; CHECK-P7-LABEL: rsqrt_fmul_safe: ; CHECK-P7: # %bb.0: -; CHECK-P7-NEXT: fsqrts 0, 1 -; CHECK-P7-NEXT: fmuls 0, 0, 2 -; CHECK-P7-NEXT: fdivs 1, 3, 0 +; CHECK-P7-NEXT: fsqrts f0, f1 +; CHECK-P7-NEXT: fmuls f0, f0, f2 +; CHECK-P7-NEXT: fdivs f1, f3, f0 ; CHECK-P7-NEXT: blr ; ; CHECK-P8-LABEL: rsqrt_fmul_safe: ; CHECK-P8: # %bb.0: -; CHECK-P8-NEXT: xssqrtsp 0, 1 -; CHECK-P8-NEXT: xsmulsp 0, 0, 2 -; CHECK-P8-NEXT: xsdivsp 1, 3, 0 +; CHECK-P8-NEXT: xssqrtsp f0, f1 +; CHECK-P8-NEXT: xsmulsp f0, f0, f2 +; CHECK-P8-NEXT: xsdivsp f1, f3, f0 ; CHECK-P8-NEXT: blr ; ; CHECK-P9-LABEL: rsqrt_fmul_safe: ; CHECK-P9: # %bb.0: -; CHECK-P9-NEXT: xssqrtsp 0, 1 -; CHECK-P9-NEXT: xsmulsp 0, 0, 2 -; CHECK-P9-NEXT: xsdivsp 1, 3, 0 +; CHECK-P9-NEXT: xssqrtsp f0, f1 +; CHECK-P9-NEXT: xsmulsp f0, f0, f2 +; CHECK-P9-NEXT: xsdivsp f1, f3, f0 ; CHECK-P9-NEXT: blr %x = call float @llvm.sqrt.f32(float %a) %y = fmul float %x, %b @@ -465,52 +468,52 @@ define float @rsqrt_fmul_safe(float %a, float %b, float %c) { define <4 x float> @hoo_fmf(<4 x float> %a, <4 x float> %b) nounwind { ; CHECK-P7-LABEL: hoo_fmf: ; CHECK-P7: # %bb.0: -; CHECK-P7-NEXT: addis 3, 2, .LCPI12_0@toc@ha -; CHECK-P7-NEXT: vspltisw 4, -1 -; CHECK-P7-NEXT: vrsqrtefp 5, 3 -; CHECK-P7-NEXT: addi 3, 3, .LCPI12_0@toc@l -; CHECK-P7-NEXT: vslw 4, 4, 4 -; CHECK-P7-NEXT: lvx 0, 0, 3 -; CHECK-P7-NEXT: addis 3, 2, .LCPI12_1@toc@ha -; CHECK-P7-NEXT: vmaddfp 3, 3, 5, 4 -; CHECK-P7-NEXT: addi 3, 3, .LCPI12_1@toc@l -; CHECK-P7-NEXT: vmaddfp 3, 3, 5, 0 -; CHECK-P7-NEXT: lvx 0, 0, 3 -; CHECK-P7-NEXT: vmaddfp 5, 5, 0, 4 -; CHECK-P7-NEXT: vmaddfp 3, 5, 3, 4 -; CHECK-P7-NEXT: vmaddfp 2, 2, 3, 4 +; CHECK-P7-NEXT: addis r3, r2, .LCPI12_0@toc@ha +; CHECK-P7-NEXT: vspltisw v4, -1 +; CHECK-P7-NEXT: vrsqrtefp v5, v3 +; CHECK-P7-NEXT: addi r3, r3, .LCPI12_0@toc@l +; CHECK-P7-NEXT: vslw v4, v4, v4 +; CHECK-P7-NEXT: lvx v0, 0, r3 +; CHECK-P7-NEXT: addis r3, r2, .LCPI12_1@toc@ha +; CHECK-P7-NEXT: vmaddfp v3, v3, v5, v4 +; CHECK-P7-NEXT: addi r3, r3, .LCPI12_1@toc@l +; CHECK-P7-NEXT: vmaddfp v3, v3, v5, v0 +; CHECK-P7-NEXT: lvx v0, 0, r3 +; CHECK-P7-NEXT: vmaddfp v5, v5, v0, v4 +; CHECK-P7-NEXT: vmaddfp v3, v5, v3, v4 +; CHECK-P7-NEXT: vmaddfp v2, v2, v3, v4 ; CHECK-P7-NEXT: blr ; ; CHECK-P8-LABEL: hoo_fmf: ; CHECK-P8: # %bb.0: -; CHECK-P8-NEXT: xvrsqrtesp 0, 35 -; CHECK-P8-NEXT: addis 3, 2, .LCPI12_0@toc@ha -; CHECK-P8-NEXT: addi 3, 3, .LCPI12_0@toc@l -; CHECK-P8-NEXT: lxvd2x 2, 0, 3 -; CHECK-P8-NEXT: addis 3, 2, .LCPI12_1@toc@ha -; CHECK-P8-NEXT: xvmulsp 1, 35, 0 -; CHECK-P8-NEXT: addi 3, 3, .LCPI12_1@toc@l -; CHECK-P8-NEXT: xvmaddasp 2, 1, 0 -; CHECK-P8-NEXT: lxvd2x 1, 0, 3 -; CHECK-P8-NEXT: xvmulsp 0, 0, 1 -; CHECK-P8-NEXT: xvmulsp 0, 0, 2 -; CHECK-P8-NEXT: xvmulsp 34, 34, 0 +; CHECK-P8-NEXT: xvrsqrtesp vs0, v3 +; CHECK-P8-NEXT: addis r3, r2, .LCPI12_0@toc@ha +; CHECK-P8-NEXT: addi r3, r3, .LCPI12_0@toc@l +; CHECK-P8-NEXT: lxvd2x vs2, 0, r3 +; CHECK-P8-NEXT: addis r3, r2, .LCPI12_1@toc@ha +; CHECK-P8-NEXT: xvmulsp vs1, v3, vs0 +; CHECK-P8-NEXT: addi r3, r3, .LCPI12_1@toc@l +; CHECK-P8-NEXT: xvmaddasp vs2, vs1, vs0 +; CHECK-P8-NEXT: lxvd2x vs1, 0, r3 +; CHECK-P8-NEXT: xvmulsp vs0, vs0, vs1 +; CHECK-P8-NEXT: xvmulsp vs0, vs0, vs2 +; CHECK-P8-NEXT: xvmulsp v2, v2, vs0 ; CHECK-P8-NEXT: blr ; ; CHECK-P9-LABEL: hoo_fmf: ; CHECK-P9: # %bb.0: -; CHECK-P9-NEXT: xvrsqrtesp 0, 35 -; CHECK-P9-NEXT: addis 3, 2, .LCPI12_0@toc@ha -; CHECK-P9-NEXT: addi 3, 3, .LCPI12_0@toc@l -; CHECK-P9-NEXT: lxv 2, 0(3) -; CHECK-P9-NEXT: addis 3, 2, .LCPI12_1@toc@ha -; CHECK-P9-NEXT: addi 3, 3, .LCPI12_1@toc@l -; CHECK-P9-NEXT: xvmulsp 1, 35, 0 -; CHECK-P9-NEXT: xvmaddasp 2, 1, 0 -; CHECK-P9-NEXT: lxv 1, 0(3) -; CHECK-P9-NEXT: xvmulsp 0, 0, 1 -; CHECK-P9-NEXT: xvmulsp 0, 0, 2 -; CHECK-P9-NEXT: xvmulsp 34, 34, 0 +; CHECK-P9-NEXT: xvrsqrtesp vs0, v3 +; CHECK-P9-NEXT: addis r3, r2, .LCPI12_0@toc@ha +; CHECK-P9-NEXT: addi r3, r3, .LCPI12_0@toc@l +; CHECK-P9-NEXT: lxv vs2, 0(r3) +; CHECK-P9-NEXT: addis r3, r2, .LCPI12_1@toc@ha +; CHECK-P9-NEXT: addi r3, r3, .LCPI12_1@toc@l +; CHECK-P9-NEXT: xvmulsp vs1, v3, vs0 +; CHECK-P9-NEXT: xvmaddasp vs2, vs1, vs0 +; CHECK-P9-NEXT: lxv vs1, 0(r3) +; CHECK-P9-NEXT: xvmulsp vs0, vs0, vs1 +; CHECK-P9-NEXT: xvmulsp vs0, vs0, vs2 +; CHECK-P9-NEXT: xvmulsp v2, v2, vs0 ; CHECK-P9-NEXT: blr %x = call contract reassoc arcp <4 x float> @llvm.sqrt.v4f32(<4 x float> %b) %r = fdiv contract reassoc arcp <4 x float> %a, %x @@ -520,44 +523,44 @@ define <4 x float> @hoo_fmf(<4 x float> %a, <4 x float> %b) nounwind { define <4 x float> @hoo_safe(<4 x float> %a, <4 x float> %b) nounwind { ; CHECK-P7-LABEL: hoo_safe: ; CHECK-P7: # %bb.0: -; CHECK-P7-NEXT: addi 3, 1, -32 -; CHECK-P7-NEXT: stvx 3, 0, 3 -; CHECK-P7-NEXT: addi 3, 1, -48 -; CHECK-P7-NEXT: lfs 3, -20(1) -; CHECK-P7-NEXT: lfs 2, -24(1) -; CHECK-P7-NEXT: lfs 0, -32(1) -; CHECK-P7-NEXT: lfs 1, -28(1) -; CHECK-P7-NEXT: fsqrts 3, 3 -; CHECK-P7-NEXT: stvx 2, 0, 3 -; CHECK-P7-NEXT: lfs 4, -36(1) -; CHECK-P7-NEXT: fsqrts 2, 2 -; CHECK-P7-NEXT: fsqrts 1, 1 -; CHECK-P7-NEXT: fsqrts 0, 0 -; CHECK-P7-NEXT: addi 3, 1, -16 -; CHECK-P7-NEXT: fdivs 3, 4, 3 -; CHECK-P7-NEXT: stfs 3, -4(1) -; CHECK-P7-NEXT: lfs 3, -40(1) -; CHECK-P7-NEXT: fdivs 2, 3, 2 -; CHECK-P7-NEXT: stfs 2, -8(1) -; CHECK-P7-NEXT: lfs 2, -44(1) -; CHECK-P7-NEXT: fdivs 1, 2, 1 -; CHECK-P7-NEXT: stfs 1, -12(1) -; CHECK-P7-NEXT: lfs 1, -48(1) -; CHECK-P7-NEXT: fdivs 0, 1, 0 -; CHECK-P7-NEXT: stfs 0, -16(1) -; CHECK-P7-NEXT: lvx 2, 0, 3 +; CHECK-P7-NEXT: addi r3, r1, -32 +; CHECK-P7-NEXT: stvx v3, 0, r3 +; CHECK-P7-NEXT: addi r3, r1, -48 +; CHECK-P7-NEXT: lfs f3, -20(r1) +; CHECK-P7-NEXT: lfs f2, -24(r1) +; CHECK-P7-NEXT: lfs f0, -32(r1) +; CHECK-P7-NEXT: lfs f1, -28(r1) +; CHECK-P7-NEXT: fsqrts f3, f3 +; CHECK-P7-NEXT: stvx v2, 0, r3 +; CHECK-P7-NEXT: lfs f4, -36(r1) +; CHECK-P7-NEXT: fsqrts f2, f2 +; CHECK-P7-NEXT: fsqrts f1, f1 +; CHECK-P7-NEXT: fsqrts f0, f0 +; CHECK-P7-NEXT: addi r3, r1, -16 +; CHECK-P7-NEXT: fdivs f3, f4, f3 +; CHECK-P7-NEXT: stfs f3, -4(r1) +; CHECK-P7-NEXT: lfs f3, -40(r1) +; CHECK-P7-NEXT: fdivs f2, f3, f2 +; CHECK-P7-NEXT: stfs f2, -8(r1) +; CHECK-P7-NEXT: lfs f2, -44(r1) +; CHECK-P7-NEXT: fdivs f1, f2, f1 +; CHECK-P7-NEXT: stfs f1, -12(r1) +; CHECK-P7-NEXT: lfs f1, -48(r1) +; CHECK-P7-NEXT: fdivs f0, f1, f0 +; CHECK-P7-NEXT: stfs f0, -16(r1) +; CHECK-P7-NEXT: lvx v2, 0, r3 ; CHECK-P7-NEXT: blr ; ; CHECK-P8-LABEL: hoo_safe: ; CHECK-P8: # %bb.0: -; CHECK-P8-NEXT: xvsqrtsp 0, 35 -; CHECK-P8-NEXT: xvdivsp 34, 34, 0 +; CHECK-P8-NEXT: xvsqrtsp vs0, v3 +; CHECK-P8-NEXT: xvdivsp v2, v2, vs0 ; CHECK-P8-NEXT: blr ; ; CHECK-P9-LABEL: hoo_safe: ; CHECK-P9: # %bb.0: -; CHECK-P9-NEXT: xvsqrtsp 0, 35 -; CHECK-P9-NEXT: xvdivsp 34, 34, 0 +; CHECK-P9-NEXT: xvsqrtsp vs0, v3 +; CHECK-P9-NEXT: xvdivsp v2, v2, vs0 ; CHECK-P9-NEXT: blr %x = call <4 x float> @llvm.sqrt.v4f32(<4 x float> %b) %r = fdiv <4 x float> %a, %x @@ -567,40 +570,40 @@ define <4 x float> @hoo_safe(<4 x float> %a, <4 x float> %b) nounwind { define double @foo2_fmf(double %a, double %b) nounwind { ; CHECK-P7-LABEL: foo2_fmf: ; CHECK-P7: # %bb.0: -; CHECK-P7-NEXT: fre 0, 2 -; CHECK-P7-NEXT: addis 3, 2, .LCPI14_0@toc@ha -; CHECK-P7-NEXT: lfs 3, .LCPI14_0@toc@l(3) -; CHECK-P7-NEXT: fmadd 3, 2, 0, 3 -; CHECK-P7-NEXT: fnmsub 0, 0, 3, 0 -; CHECK-P7-NEXT: fmul 3, 1, 0 -; CHECK-P7-NEXT: fnmsub 1, 2, 3, 1 -; CHECK-P7-NEXT: fmadd 1, 0, 1, 3 +; CHECK-P7-NEXT: fre f0, f2 +; CHECK-P7-NEXT: addis r3, r2, .LCPI14_0@toc@ha +; CHECK-P7-NEXT: lfs f3, .LCPI14_0@toc@l(r3) +; CHECK-P7-NEXT: fmadd f3, f2, f0, f3 +; CHECK-P7-NEXT: fnmsub f0, f0, f3, f0 +; CHECK-P7-NEXT: fmul f3, f1, f0 +; CHECK-P7-NEXT: fnmsub f1, f2, f3, f1 +; CHECK-P7-NEXT: fmadd f1, f0, f1, f3 ; CHECK-P7-NEXT: blr ; ; CHECK-P8-LABEL: foo2_fmf: ; CHECK-P8: # %bb.0: -; CHECK-P8-NEXT: vspltisw 2, -1 -; CHECK-P8-NEXT: xsredp 3, 2 -; CHECK-P8-NEXT: xvcvsxwdp 0, 34 -; CHECK-P8-NEXT: xsmaddadp 0, 2, 3 -; CHECK-P8-NEXT: xsnmsubadp 3, 3, 0 -; CHECK-P8-NEXT: xsmuldp 0, 1, 3 -; CHECK-P8-NEXT: xsnmsubadp 1, 2, 0 -; CHECK-P8-NEXT: xsmaddadp 0, 3, 1 -; CHECK-P8-NEXT: fmr 1, 0 +; CHECK-P8-NEXT: vspltisw v2, -1 +; CHECK-P8-NEXT: xsredp f3, f2 +; CHECK-P8-NEXT: xvcvsxwdp vs0, v2 +; CHECK-P8-NEXT: xsmaddadp f0, f2, f3 +; CHECK-P8-NEXT: xsnmsubadp f3, f3, f0 +; CHECK-P8-NEXT: xsmuldp f0, f1, f3 +; CHECK-P8-NEXT: xsnmsubadp f1, f2, f0 +; CHECK-P8-NEXT: xsmaddadp f0, f3, f1 +; CHECK-P8-NEXT: fmr f1, f0 ; CHECK-P8-NEXT: blr ; ; CHECK-P9-LABEL: foo2_fmf: ; CHECK-P9: # %bb.0: -; CHECK-P9-NEXT: vspltisw 2, -1 -; CHECK-P9-NEXT: xsredp 3, 2 -; CHECK-P9-NEXT: xvcvsxwdp 0, 34 -; CHECK-P9-NEXT: xsmaddadp 0, 2, 3 -; CHECK-P9-NEXT: xsnmsubadp 3, 3, 0 -; CHECK-P9-NEXT: xsmuldp 0, 1, 3 -; CHECK-P9-NEXT: xsnmsubadp 1, 2, 0 -; CHECK-P9-NEXT: xsmaddadp 0, 3, 1 -; CHECK-P9-NEXT: fmr 1, 0 +; CHECK-P9-NEXT: vspltisw v2, -1 +; CHECK-P9-NEXT: xsredp f3, f2 +; CHECK-P9-NEXT: xvcvsxwdp vs0, v2 +; CHECK-P9-NEXT: xsmaddadp f0, f2, f3 +; CHECK-P9-NEXT: xsnmsubadp f3, f3, f0 +; CHECK-P9-NEXT: xsmuldp f0, f1, f3 +; CHECK-P9-NEXT: xsnmsubadp f1, f2, f0 +; CHECK-P9-NEXT: xsmaddadp f0, f3, f1 +; CHECK-P9-NEXT: fmr f1, f0 ; CHECK-P9-NEXT: blr %r = fdiv contract reassoc arcp nsz ninf double %a, %b ret double %r @@ -609,17 +612,17 @@ define double @foo2_fmf(double %a, double %b) nounwind { define double @foo2_safe(double %a, double %b) nounwind { ; CHECK-P7-LABEL: foo2_safe: ; CHECK-P7: # %bb.0: -; CHECK-P7-NEXT: fdiv 1, 1, 2 +; CHECK-P7-NEXT: fdiv f1, f1, f2 ; CHECK-P7-NEXT: blr ; ; CHECK-P8-LABEL: foo2_safe: ; CHECK-P8: # %bb.0: -; CHECK-P8-NEXT: xsdivdp 1, 1, 2 +; CHECK-P8-NEXT: xsdivdp f1, f1, f2 ; CHECK-P8-NEXT: blr ; ; CHECK-P9-LABEL: foo2_safe: ; CHECK-P9: # %bb.0: -; CHECK-P9-NEXT: xsdivdp 1, 1, 2 +; CHECK-P9-NEXT: xsdivdp f1, f1, f2 ; CHECK-P9-NEXT: blr %r = fdiv double %a, %b ret double %r @@ -628,28 +631,28 @@ define double @foo2_safe(double %a, double %b) nounwind { define float @goo2_fmf(float %a, float %b) nounwind { ; CHECK-P7-LABEL: goo2_fmf: ; CHECK-P7: # %bb.0: -; CHECK-P7-NEXT: fres 0, 2 -; CHECK-P7-NEXT: fmuls 3, 1, 0 -; CHECK-P7-NEXT: fnmsubs 1, 2, 3, 1 -; CHECK-P7-NEXT: fmadds 1, 0, 1, 3 +; CHECK-P7-NEXT: fres f0, f2 +; CHECK-P7-NEXT: fmuls f3, f1, f0 +; CHECK-P7-NEXT: fnmsubs f1, f2, f3, f1 +; CHECK-P7-NEXT: fmadds f1, f0, f1, f3 ; CHECK-P7-NEXT: blr ; ; CHECK-P8-LABEL: goo2_fmf: ; CHECK-P8: # %bb.0: -; CHECK-P8-NEXT: xsresp 3, 2 -; CHECK-P8-NEXT: xsmulsp 0, 1, 3 -; CHECK-P8-NEXT: xsnmsubasp 1, 2, 0 -; CHECK-P8-NEXT: xsmaddasp 0, 3, 1 -; CHECK-P8-NEXT: fmr 1, 0 +; CHECK-P8-NEXT: xsresp f3, f2 +; CHECK-P8-NEXT: xsmulsp f0, f1, f3 +; CHECK-P8-NEXT: xsnmsubasp f1, f2, f0 +; CHECK-P8-NEXT: xsmaddasp f0, f3, f1 +; CHECK-P8-NEXT: fmr f1, f0 ; CHECK-P8-NEXT: blr ; ; CHECK-P9-LABEL: goo2_fmf: ; CHECK-P9: # %bb.0: -; CHECK-P9-NEXT: xsresp 3, 2 -; CHECK-P9-NEXT: xsmulsp 0, 1, 3 -; CHECK-P9-NEXT: xsnmsubasp 1, 2, 0 -; CHECK-P9-NEXT: xsmaddasp 0, 3, 1 -; CHECK-P9-NEXT: fmr 1, 0 +; CHECK-P9-NEXT: xsresp f3, f2 +; CHECK-P9-NEXT: xsmulsp f0, f1, f3 +; CHECK-P9-NEXT: xsnmsubasp f1, f2, f0 +; CHECK-P9-NEXT: xsmaddasp f0, f3, f1 +; CHECK-P9-NEXT: fmr f1, f0 ; CHECK-P9-NEXT: blr %r = fdiv contract reassoc arcp nsz ninf float %a, %b ret float %r @@ -658,17 +661,17 @@ define float @goo2_fmf(float %a, float %b) nounwind { define float @goo2_safe(float %a, float %b) nounwind { ; CHECK-P7-LABEL: goo2_safe: ; CHECK-P7: # %bb.0: -; CHECK-P7-NEXT: fdivs 1, 1, 2 +; CHECK-P7-NEXT: fdivs f1, f1, f2 ; CHECK-P7-NEXT: blr ; ; CHECK-P8-LABEL: goo2_safe: ; CHECK-P8: # %bb.0: -; CHECK-P8-NEXT: xsdivsp 1, 1, 2 +; CHECK-P8-NEXT: xsdivsp f1, f1, f2 ; CHECK-P8-NEXT: blr ; ; CHECK-P9-LABEL: goo2_safe: ; CHECK-P9: # %bb.0: -; CHECK-P9-NEXT: xsdivsp 1, 1, 2 +; CHECK-P9-NEXT: xsdivsp f1, f1, f2 ; CHECK-P9-NEXT: blr %r = fdiv float %a, %b ret float %r @@ -677,30 +680,30 @@ define float @goo2_safe(float %a, float %b) nounwind { define <4 x float> @hoo2_fmf(<4 x float> %a, <4 x float> %b) nounwind { ; CHECK-P7-LABEL: hoo2_fmf: ; CHECK-P7: # %bb.0: -; CHECK-P7-NEXT: vspltisw 4, -1 -; CHECK-P7-NEXT: vrefp 5, 3 -; CHECK-P7-NEXT: vslw 4, 4, 4 -; CHECK-P7-NEXT: vmaddfp 4, 2, 5, 4 -; CHECK-P7-NEXT: vnmsubfp 2, 3, 4, 2 -; CHECK-P7-NEXT: vmaddfp 2, 5, 2, 4 +; CHECK-P7-NEXT: vspltisw v4, -1 +; CHECK-P7-NEXT: vrefp v5, v3 +; CHECK-P7-NEXT: vslw v4, v4, v4 +; CHECK-P7-NEXT: vmaddfp v4, v2, v5, v4 +; CHECK-P7-NEXT: vnmsubfp v2, v3, v4, v2 +; CHECK-P7-NEXT: vmaddfp v2, v5, v2, v4 ; CHECK-P7-NEXT: blr ; ; CHECK-P8-LABEL: hoo2_fmf: ; CHECK-P8: # %bb.0: -; CHECK-P8-NEXT: xvresp 1, 35 -; CHECK-P8-NEXT: xvmulsp 0, 34, 1 -; CHECK-P8-NEXT: xvnmsubasp 34, 35, 0 -; CHECK-P8-NEXT: xvmaddasp 0, 1, 34 -; CHECK-P8-NEXT: xxlor 34, 0, 0 +; CHECK-P8-NEXT: xvresp vs1, v3 +; CHECK-P8-NEXT: xvmulsp vs0, v2, vs1 +; CHECK-P8-NEXT: xvnmsubasp v2, v3, vs0 +; CHECK-P8-NEXT: xvmaddasp vs0, vs1, v2 +; CHECK-P8-NEXT: xxlor v2, vs0, vs0 ; CHECK-P8-NEXT: blr ; ; CHECK-P9-LABEL: hoo2_fmf: ; CHECK-P9: # %bb.0: -; CHECK-P9-NEXT: xvresp 1, 35 -; CHECK-P9-NEXT: xvmulsp 0, 34, 1 -; CHECK-P9-NEXT: xvnmsubasp 34, 35, 0 -; CHECK-P9-NEXT: xvmaddasp 0, 1, 34 -; CHECK-P9-NEXT: xxlor 34, 0, 0 +; CHECK-P9-NEXT: xvresp vs1, v3 +; CHECK-P9-NEXT: xvmulsp vs0, v2, vs1 +; CHECK-P9-NEXT: xvnmsubasp v2, v3, vs0 +; CHECK-P9-NEXT: xvmaddasp vs0, vs1, v2 +; CHECK-P9-NEXT: xxlor v2, vs0, vs0 ; CHECK-P9-NEXT: blr %r = fdiv contract reassoc arcp nsz ninf <4 x float> %a, %b ret <4 x float> %r @@ -709,38 +712,38 @@ define <4 x float> @hoo2_fmf(<4 x float> %a, <4 x float> %b) nounwind { define <4 x float> @hoo2_safe(<4 x float> %a, <4 x float> %b) nounwind { ; CHECK-P7-LABEL: hoo2_safe: ; CHECK-P7: # %bb.0: -; CHECK-P7-NEXT: addi 3, 1, -32 -; CHECK-P7-NEXT: stvx 3, 0, 3 -; CHECK-P7-NEXT: addi 3, 1, -48 -; CHECK-P7-NEXT: stvx 2, 0, 3 -; CHECK-P7-NEXT: addi 3, 1, -16 -; CHECK-P7-NEXT: lfs 0, -20(1) -; CHECK-P7-NEXT: lfs 1, -36(1) -; CHECK-P7-NEXT: fdivs 0, 1, 0 -; CHECK-P7-NEXT: lfs 1, -40(1) -; CHECK-P7-NEXT: stfs 0, -4(1) -; CHECK-P7-NEXT: lfs 0, -24(1) -; CHECK-P7-NEXT: fdivs 0, 1, 0 -; CHECK-P7-NEXT: lfs 1, -44(1) -; CHECK-P7-NEXT: stfs 0, -8(1) -; CHECK-P7-NEXT: lfs 0, -28(1) -; CHECK-P7-NEXT: fdivs 0, 1, 0 -; CHECK-P7-NEXT: lfs 1, -48(1) -; CHECK-P7-NEXT: stfs 0, -12(1) -; CHECK-P7-NEXT: lfs 0, -32(1) -; CHECK-P7-NEXT: fdivs 0, 1, 0 -; CHECK-P7-NEXT: stfs 0, -16(1) -; CHECK-P7-NEXT: lvx 2, 0, 3 +; CHECK-P7-NEXT: addi r3, r1, -32 +; CHECK-P7-NEXT: stvx v3, 0, r3 +; CHECK-P7-NEXT: addi r3, r1, -48 +; CHECK-P7-NEXT: stvx v2, 0, r3 +; CHECK-P7-NEXT: addi r3, r1, -16 +; CHECK-P7-NEXT: lfs f0, -20(r1) +; CHECK-P7-NEXT: lfs f1, -36(r1) +; CHECK-P7-NEXT: fdivs f0, f1, f0 +; CHECK-P7-NEXT: lfs f1, -40(r1) +; CHECK-P7-NEXT: stfs f0, -4(r1) +; CHECK-P7-NEXT: lfs f0, -24(r1) +; CHECK-P7-NEXT: fdivs f0, f1, f0 +; CHECK-P7-NEXT: lfs f1, -44(r1) +; CHECK-P7-NEXT: stfs f0, -8(r1) +; CHECK-P7-NEXT: lfs f0, -28(r1) +; CHECK-P7-NEXT: fdivs f0, f1, f0 +; CHECK-P7-NEXT: lfs f1, -48(r1) +; CHECK-P7-NEXT: stfs f0, -12(r1) +; CHECK-P7-NEXT: lfs f0, -32(r1) +; CHECK-P7-NEXT: fdivs f0, f1, f0 +; CHECK-P7-NEXT: stfs f0, -16(r1) +; CHECK-P7-NEXT: lvx v2, 0, r3 ; CHECK-P7-NEXT: blr ; ; CHECK-P8-LABEL: hoo2_safe: ; CHECK-P8: # %bb.0: -; CHECK-P8-NEXT: xvdivsp 34, 34, 35 +; CHECK-P8-NEXT: xvdivsp v2, v2, v3 ; CHECK-P8-NEXT: blr ; ; CHECK-P9-LABEL: hoo2_safe: ; CHECK-P9: # %bb.0: -; CHECK-P9-NEXT: xvdivsp 34, 34, 35 +; CHECK-P9-NEXT: xvdivsp v2, v2, v3 ; CHECK-P9-NEXT: blr %r = fdiv <4 x float> %a, %b ret <4 x float> %r @@ -749,73 +752,73 @@ define <4 x float> @hoo2_safe(<4 x float> %a, <4 x float> %b) nounwind { define double @foo3_fmf(double %a) nounwind { ; CHECK-P7-LABEL: foo3_fmf: ; CHECK-P7: # %bb.0: -; CHECK-P7-NEXT: ftsqrt 0, 1 -; CHECK-P7-NEXT: bc 12, 2, .LBB20_2 +; CHECK-P7-NEXT: ftsqrt cr0, f1 +; CHECK-P7-NEXT: bc 12, eq, .LBB20_2 ; CHECK-P7-NEXT: # %bb.1: -; CHECK-P7-NEXT: frsqrte 0, 1 -; CHECK-P7-NEXT: addis 3, 2, .LCPI20_0@toc@ha -; CHECK-P7-NEXT: lfs 3, .LCPI20_0@toc@l(3) -; CHECK-P7-NEXT: addis 3, 2, .LCPI20_1@toc@ha -; CHECK-P7-NEXT: lfs 4, .LCPI20_1@toc@l(3) -; CHECK-P7-NEXT: fmul 2, 1, 0 -; CHECK-P7-NEXT: fmadd 2, 2, 0, 3 -; CHECK-P7-NEXT: fmul 0, 0, 4 -; CHECK-P7-NEXT: fmul 0, 0, 2 -; CHECK-P7-NEXT: fmul 1, 1, 0 -; CHECK-P7-NEXT: fmadd 0, 1, 0, 3 -; CHECK-P7-NEXT: fmul 1, 1, 4 -; CHECK-P7-NEXT: fmul 1, 1, 0 +; CHECK-P7-NEXT: frsqrte f0, f1 +; CHECK-P7-NEXT: addis r3, r2, .LCPI20_0@toc@ha +; CHECK-P7-NEXT: lfs f3, .LCPI20_0@toc@l(r3) +; CHECK-P7-NEXT: addis r3, r2, .LCPI20_1@toc@ha +; CHECK-P7-NEXT: lfs f4, .LCPI20_1@toc@l(r3) +; CHECK-P7-NEXT: fmul f2, f1, f0 +; CHECK-P7-NEXT: fmadd f2, f2, f0, f3 +; CHECK-P7-NEXT: fmul f0, f0, f4 +; CHECK-P7-NEXT: fmul f0, f0, f2 +; CHECK-P7-NEXT: fmul f1, f1, f0 +; CHECK-P7-NEXT: fmadd f0, f1, f0, f3 +; CHECK-P7-NEXT: fmul f1, f1, f4 +; CHECK-P7-NEXT: fmul f1, f1, f0 ; CHECK-P7-NEXT: blr ; CHECK-P7-NEXT: .LBB20_2: -; CHECK-P7-NEXT: fsqrt 1, 1 +; CHECK-P7-NEXT: fsqrt f1, f1 ; CHECK-P7-NEXT: blr ; ; CHECK-P8-LABEL: foo3_fmf: ; CHECK-P8: # %bb.0: -; CHECK-P8-NEXT: xstsqrtdp 0, 1 -; CHECK-P8-NEXT: bc 12, 2, .LBB20_2 +; CHECK-P8-NEXT: xstsqrtdp cr0, f1 +; CHECK-P8-NEXT: bc 12, eq, .LBB20_2 ; CHECK-P8-NEXT: # %bb.1: -; CHECK-P8-NEXT: vspltisw 2, -3 -; CHECK-P8-NEXT: xsrsqrtedp 0, 1 -; CHECK-P8-NEXT: addis 3, 2, .LCPI20_0@toc@ha -; CHECK-P8-NEXT: xvcvsxwdp 3, 34 -; CHECK-P8-NEXT: xsmuldp 2, 1, 0 -; CHECK-P8-NEXT: fmr 4, 3 -; CHECK-P8-NEXT: xsmaddadp 4, 2, 0 -; CHECK-P8-NEXT: lfs 2, .LCPI20_0@toc@l(3) -; CHECK-P8-NEXT: xsmuldp 0, 0, 2 -; CHECK-P8-NEXT: xsmuldp 0, 0, 4 -; CHECK-P8-NEXT: xsmuldp 1, 1, 0 -; CHECK-P8-NEXT: xsmaddadp 3, 1, 0 -; CHECK-P8-NEXT: xsmuldp 0, 1, 2 -; CHECK-P8-NEXT: xsmuldp 1, 0, 3 +; CHECK-P8-NEXT: vspltisw v2, -3 +; CHECK-P8-NEXT: xsrsqrtedp f0, f1 +; CHECK-P8-NEXT: addis r3, r2, .LCPI20_0@toc@ha +; CHECK-P8-NEXT: xvcvsxwdp vs3, v2 +; CHECK-P8-NEXT: xsmuldp f2, f1, f0 +; CHECK-P8-NEXT: fmr f4, f3 +; CHECK-P8-NEXT: xsmaddadp f4, f2, f0 +; CHECK-P8-NEXT: lfs f2, .LCPI20_0@toc@l(r3) +; CHECK-P8-NEXT: xsmuldp f0, f0, f2 +; CHECK-P8-NEXT: xsmuldp f0, f0, f4 +; CHECK-P8-NEXT: xsmuldp f1, f1, f0 +; CHECK-P8-NEXT: xsmaddadp f3, f1, f0 +; CHECK-P8-NEXT: xsmuldp f0, f1, f2 +; CHECK-P8-NEXT: xsmuldp f1, f0, f3 ; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: .LBB20_2: -; CHECK-P8-NEXT: xssqrtdp 1, 1 +; CHECK-P8-NEXT: xssqrtdp f1, f1 ; CHECK-P8-NEXT: blr ; ; CHECK-P9-LABEL: foo3_fmf: ; CHECK-P9: # %bb.0: -; CHECK-P9-NEXT: xstsqrtdp 0, 1 -; CHECK-P9-NEXT: bc 12, 2, .LBB20_2 +; CHECK-P9-NEXT: xstsqrtdp cr0, f1 +; CHECK-P9-NEXT: bc 12, eq, .LBB20_2 ; CHECK-P9-NEXT: # %bb.1: -; CHECK-P9-NEXT: xsrsqrtedp 0, 1 -; CHECK-P9-NEXT: vspltisw 2, -3 -; CHECK-P9-NEXT: addis 3, 2, .LCPI20_0@toc@ha -; CHECK-P9-NEXT: xsmuldp 2, 1, 0 -; CHECK-P9-NEXT: xvcvsxwdp 3, 34 -; CHECK-P9-NEXT: fmr 4, 3 -; CHECK-P9-NEXT: xsmaddadp 4, 2, 0 -; CHECK-P9-NEXT: lfs 2, .LCPI20_0@toc@l(3) -; CHECK-P9-NEXT: xsmuldp 0, 0, 2 -; CHECK-P9-NEXT: xsmuldp 0, 0, 4 -; CHECK-P9-NEXT: xsmuldp 1, 1, 0 -; CHECK-P9-NEXT: xsmaddadp 3, 1, 0 -; CHECK-P9-NEXT: xsmuldp 0, 1, 2 -; CHECK-P9-NEXT: xsmuldp 1, 0, 3 +; CHECK-P9-NEXT: xsrsqrtedp f0, f1 +; CHECK-P9-NEXT: vspltisw v2, -3 +; CHECK-P9-NEXT: addis r3, r2, .LCPI20_0@toc@ha +; CHECK-P9-NEXT: xsmuldp f2, f1, f0 +; CHECK-P9-NEXT: xvcvsxwdp vs3, v2 +; CHECK-P9-NEXT: fmr f4, f3 +; CHECK-P9-NEXT: xsmaddadp f4, f2, f0 +; CHECK-P9-NEXT: lfs f2, .LCPI20_0@toc@l(r3) +; CHECK-P9-NEXT: xsmuldp f0, f0, f2 +; CHECK-P9-NEXT: xsmuldp f0, f0, f4 +; CHECK-P9-NEXT: xsmuldp f1, f1, f0 +; CHECK-P9-NEXT: xsmaddadp f3, f1, f0 +; CHECK-P9-NEXT: xsmuldp f0, f1, f2 +; CHECK-P9-NEXT: xsmuldp f1, f0, f3 ; CHECK-P9-NEXT: blr ; CHECK-P9-NEXT: .LBB20_2: -; CHECK-P9-NEXT: xssqrtdp 1, 1 +; CHECK-P9-NEXT: xssqrtdp f1, f1 ; CHECK-P9-NEXT: blr %r = call contract reassoc ninf afn double @llvm.sqrt.f64(double %a) ret double %r @@ -824,82 +827,82 @@ define double @foo3_fmf(double %a) nounwind { define double @foo3_fmf_crbits_off(double %a) #2 { ; CHECK-P7-LABEL: foo3_fmf_crbits_off: ; CHECK-P7: # %bb.0: -; CHECK-P7-NEXT: fabs 0, 1 -; CHECK-P7-NEXT: addis 3, 2, .LCPI21_2@toc@ha -; CHECK-P7-NEXT: lfd 2, .LCPI21_2@toc@l(3) -; CHECK-P7-NEXT: fcmpu 0, 0, 2 -; CHECK-P7-NEXT: blt 0, .LBB21_2 +; CHECK-P7-NEXT: fabs f0, f1 +; CHECK-P7-NEXT: addis r3, r2, .LCPI21_2@toc@ha +; CHECK-P7-NEXT: lfd f2, .LCPI21_2@toc@l(r3) +; CHECK-P7-NEXT: fcmpu cr0, f0, f2 +; CHECK-P7-NEXT: blt cr0, .LBB21_2 ; CHECK-P7-NEXT: # %bb.1: -; CHECK-P7-NEXT: frsqrte 0, 1 -; CHECK-P7-NEXT: addis 3, 2, .LCPI21_0@toc@ha -; CHECK-P7-NEXT: lfs 3, .LCPI21_0@toc@l(3) -; CHECK-P7-NEXT: addis 3, 2, .LCPI21_1@toc@ha -; CHECK-P7-NEXT: lfs 4, .LCPI21_1@toc@l(3) -; CHECK-P7-NEXT: fmul 2, 1, 0 -; CHECK-P7-NEXT: fmadd 2, 2, 0, 3 -; CHECK-P7-NEXT: fmul 0, 0, 4 -; CHECK-P7-NEXT: fmul 0, 0, 2 -; CHECK-P7-NEXT: fmul 1, 1, 0 -; CHECK-P7-NEXT: fmadd 0, 1, 0, 3 -; CHECK-P7-NEXT: fmul 1, 1, 4 -; CHECK-P7-NEXT: fmul 1, 1, 0 +; CHECK-P7-NEXT: frsqrte f0, f1 +; CHECK-P7-NEXT: addis r3, r2, .LCPI21_0@toc@ha +; CHECK-P7-NEXT: lfs f3, .LCPI21_0@toc@l(r3) +; CHECK-P7-NEXT: addis r3, r2, .LCPI21_1@toc@ha +; CHECK-P7-NEXT: lfs f4, .LCPI21_1@toc@l(r3) +; CHECK-P7-NEXT: fmul f2, f1, f0 +; CHECK-P7-NEXT: fmadd f2, f2, f0, f3 +; CHECK-P7-NEXT: fmul f0, f0, f4 +; CHECK-P7-NEXT: fmul f0, f0, f2 +; CHECK-P7-NEXT: fmul f1, f1, f0 +; CHECK-P7-NEXT: fmadd f0, f1, f0, f3 +; CHECK-P7-NEXT: fmul f1, f1, f4 +; CHECK-P7-NEXT: fmul f1, f1, f0 ; CHECK-P7-NEXT: blr ; CHECK-P7-NEXT: .LBB21_2: -; CHECK-P7-NEXT: fsqrt 1, 1 +; CHECK-P7-NEXT: fsqrt f1, f1 ; CHECK-P7-NEXT: blr ; ; CHECK-P8-LABEL: foo3_fmf_crbits_off: ; CHECK-P8: # %bb.0: -; CHECK-P8-NEXT: addis 3, 2, .LCPI21_1@toc@ha -; CHECK-P8-NEXT: xsabsdp 0, 1 -; CHECK-P8-NEXT: lfd 2, .LCPI21_1@toc@l(3) -; CHECK-P8-NEXT: xscmpudp 0, 0, 2 -; CHECK-P8-NEXT: blt 0, .LBB21_2 +; CHECK-P8-NEXT: addis r3, r2, .LCPI21_1@toc@ha +; CHECK-P8-NEXT: xsabsdp f0, f1 +; CHECK-P8-NEXT: lfd f2, .LCPI21_1@toc@l(r3) +; CHECK-P8-NEXT: xscmpudp cr0, f0, f2 +; CHECK-P8-NEXT: blt cr0, .LBB21_2 ; CHECK-P8-NEXT: # %bb.1: -; CHECK-P8-NEXT: vspltisw 2, -3 -; CHECK-P8-NEXT: xsrsqrtedp 0, 1 -; CHECK-P8-NEXT: addis 3, 2, .LCPI21_0@toc@ha -; CHECK-P8-NEXT: xvcvsxwdp 3, 34 -; CHECK-P8-NEXT: xsmuldp 2, 1, 0 -; CHECK-P8-NEXT: fmr 4, 3 -; CHECK-P8-NEXT: xsmaddadp 4, 2, 0 -; CHECK-P8-NEXT: lfs 2, .LCPI21_0@toc@l(3) -; CHECK-P8-NEXT: xsmuldp 0, 0, 2 -; CHECK-P8-NEXT: xsmuldp 0, 0, 4 -; CHECK-P8-NEXT: xsmuldp 1, 1, 0 -; CHECK-P8-NEXT: xsmaddadp 3, 1, 0 -; CHECK-P8-NEXT: xsmuldp 0, 1, 2 -; CHECK-P8-NEXT: xsmuldp 1, 0, 3 +; CHECK-P8-NEXT: vspltisw v2, -3 +; CHECK-P8-NEXT: xsrsqrtedp f0, f1 +; CHECK-P8-NEXT: addis r3, r2, .LCPI21_0@toc@ha +; CHECK-P8-NEXT: xvcvsxwdp vs3, v2 +; CHECK-P8-NEXT: xsmuldp f2, f1, f0 +; CHECK-P8-NEXT: fmr f4, f3 +; CHECK-P8-NEXT: xsmaddadp f4, f2, f0 +; CHECK-P8-NEXT: lfs f2, .LCPI21_0@toc@l(r3) +; CHECK-P8-NEXT: xsmuldp f0, f0, f2 +; CHECK-P8-NEXT: xsmuldp f0, f0, f4 +; CHECK-P8-NEXT: xsmuldp f1, f1, f0 +; CHECK-P8-NEXT: xsmaddadp f3, f1, f0 +; CHECK-P8-NEXT: xsmuldp f0, f1, f2 +; CHECK-P8-NEXT: xsmuldp f1, f0, f3 ; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: .LBB21_2: -; CHECK-P8-NEXT: xssqrtdp 1, 1 +; CHECK-P8-NEXT: xssqrtdp f1, f1 ; CHECK-P8-NEXT: blr ; ; CHECK-P9-LABEL: foo3_fmf_crbits_off: ; CHECK-P9: # %bb.0: -; CHECK-P9-NEXT: addis 3, 2, .LCPI21_1@toc@ha -; CHECK-P9-NEXT: xsabsdp 0, 1 -; CHECK-P9-NEXT: lfd 2, .LCPI21_1@toc@l(3) -; CHECK-P9-NEXT: xscmpudp 0, 0, 2 -; CHECK-P9-NEXT: blt 0, .LBB21_2 +; CHECK-P9-NEXT: addis r3, r2, .LCPI21_1@toc@ha +; CHECK-P9-NEXT: xsabsdp f0, f1 +; CHECK-P9-NEXT: lfd f2, .LCPI21_1@toc@l(r3) +; CHECK-P9-NEXT: xscmpudp cr0, f0, f2 +; CHECK-P9-NEXT: blt cr0, .LBB21_2 ; CHECK-P9-NEXT: # %bb.1: -; CHECK-P9-NEXT: xsrsqrtedp 0, 1 -; CHECK-P9-NEXT: vspltisw 2, -3 -; CHECK-P9-NEXT: addis 3, 2, .LCPI21_0@toc@ha -; CHECK-P9-NEXT: xsmuldp 2, 1, 0 -; CHECK-P9-NEXT: xvcvsxwdp 3, 34 -; CHECK-P9-NEXT: fmr 4, 3 -; CHECK-P9-NEXT: xsmaddadp 4, 2, 0 -; CHECK-P9-NEXT: lfs 2, .LCPI21_0@toc@l(3) -; CHECK-P9-NEXT: xsmuldp 0, 0, 2 -; CHECK-P9-NEXT: xsmuldp 0, 0, 4 -; CHECK-P9-NEXT: xsmuldp 1, 1, 0 -; CHECK-P9-NEXT: xsmaddadp 3, 1, 0 -; CHECK-P9-NEXT: xsmuldp 0, 1, 2 -; CHECK-P9-NEXT: xsmuldp 1, 0, 3 +; CHECK-P9-NEXT: xsrsqrtedp f0, f1 +; CHECK-P9-NEXT: vspltisw v2, -3 +; CHECK-P9-NEXT: addis r3, r2, .LCPI21_0@toc@ha +; CHECK-P9-NEXT: xsmuldp f2, f1, f0 +; CHECK-P9-NEXT: xvcvsxwdp vs3, v2 +; CHECK-P9-NEXT: fmr f4, f3 +; CHECK-P9-NEXT: xsmaddadp f4, f2, f0 +; CHECK-P9-NEXT: lfs f2, .LCPI21_0@toc@l(r3) +; CHECK-P9-NEXT: xsmuldp f0, f0, f2 +; CHECK-P9-NEXT: xsmuldp f0, f0, f4 +; CHECK-P9-NEXT: xsmuldp f1, f1, f0 +; CHECK-P9-NEXT: xsmaddadp f3, f1, f0 +; CHECK-P9-NEXT: xsmuldp f0, f1, f2 +; CHECK-P9-NEXT: xsmuldp f1, f0, f3 ; CHECK-P9-NEXT: blr ; CHECK-P9-NEXT: .LBB21_2: -; CHECK-P9-NEXT: xssqrtdp 1, 1 +; CHECK-P9-NEXT: xssqrtdp f1, f1 ; CHECK-P9-NEXT: blr %r = call contract reassoc ninf afn double @llvm.sqrt.f64(double %a) ret double %r @@ -908,17 +911,17 @@ define double @foo3_fmf_crbits_off(double %a) #2 { define double @foo3_safe(double %a) nounwind { ; CHECK-P7-LABEL: foo3_safe: ; CHECK-P7: # %bb.0: -; CHECK-P7-NEXT: fsqrt 1, 1 +; CHECK-P7-NEXT: fsqrt f1, f1 ; CHECK-P7-NEXT: blr ; ; CHECK-P8-LABEL: foo3_safe: ; CHECK-P8: # %bb.0: -; CHECK-P8-NEXT: xssqrtdp 1, 1 +; CHECK-P8-NEXT: xssqrtdp f1, f1 ; CHECK-P8-NEXT: blr ; ; CHECK-P9-LABEL: foo3_safe: ; CHECK-P9: # %bb.0: -; CHECK-P9-NEXT: xssqrtdp 1, 1 +; CHECK-P9-NEXT: xssqrtdp f1, f1 ; CHECK-P9-NEXT: blr %r = call double @llvm.sqrt.f64(double %a) ret double %r @@ -927,69 +930,69 @@ define double @foo3_safe(double %a) nounwind { define float @goo3_fmf(float %a) nounwind { ; CHECK-P7-LABEL: goo3_fmf: ; CHECK-P7: # %bb.0: -; CHECK-P7-NEXT: fabs 0, 1 -; CHECK-P7-NEXT: addis 3, 2, .LCPI23_2@toc@ha -; CHECK-P7-NEXT: lfs 2, .LCPI23_2@toc@l(3) -; CHECK-P7-NEXT: fcmpu 0, 0, 2 -; CHECK-P7-NEXT: blt 0, .LBB23_2 +; CHECK-P7-NEXT: fabs f0, f1 +; CHECK-P7-NEXT: addis r3, r2, .LCPI23_2@toc@ha +; CHECK-P7-NEXT: lfs f2, .LCPI23_2@toc@l(r3) +; CHECK-P7-NEXT: fcmpu cr0, f0, f2 +; CHECK-P7-NEXT: blt cr0, .LBB23_2 ; CHECK-P7-NEXT: # %bb.1: -; CHECK-P7-NEXT: frsqrtes 0, 1 -; CHECK-P7-NEXT: addis 3, 2, .LCPI23_0@toc@ha -; CHECK-P7-NEXT: lfs 2, .LCPI23_0@toc@l(3) -; CHECK-P7-NEXT: addis 3, 2, .LCPI23_1@toc@ha -; CHECK-P7-NEXT: fmuls 1, 1, 0 -; CHECK-P7-NEXT: fmadds 0, 1, 0, 2 -; CHECK-P7-NEXT: lfs 2, .LCPI23_1@toc@l(3) -; CHECK-P7-NEXT: fmuls 1, 1, 2 -; CHECK-P7-NEXT: fmuls 1, 1, 0 +; CHECK-P7-NEXT: frsqrtes f0, f1 +; CHECK-P7-NEXT: addis r3, r2, .LCPI23_0@toc@ha +; CHECK-P7-NEXT: lfs f2, .LCPI23_0@toc@l(r3) +; CHECK-P7-NEXT: addis r3, r2, .LCPI23_1@toc@ha +; CHECK-P7-NEXT: fmuls f1, f1, f0 +; CHECK-P7-NEXT: fmadds f0, f1, f0, f2 +; CHECK-P7-NEXT: lfs f2, .LCPI23_1@toc@l(r3) +; CHECK-P7-NEXT: fmuls f1, f1, f2 +; CHECK-P7-NEXT: fmuls f1, f1, f0 ; CHECK-P7-NEXT: blr ; CHECK-P7-NEXT: .LBB23_2: -; CHECK-P7-NEXT: addis 3, 2, .LCPI23_3@toc@ha -; CHECK-P7-NEXT: lfs 1, .LCPI23_3@toc@l(3) +; CHECK-P7-NEXT: addis r3, r2, .LCPI23_3@toc@ha +; CHECK-P7-NEXT: lfs f1, .LCPI23_3@toc@l(r3) ; CHECK-P7-NEXT: blr ; ; CHECK-P8-LABEL: goo3_fmf: ; CHECK-P8: # %bb.0: -; CHECK-P8-NEXT: addis 3, 2, .LCPI23_1@toc@ha -; CHECK-P8-NEXT: xsabsdp 0, 1 -; CHECK-P8-NEXT: lfs 2, .LCPI23_1@toc@l(3) -; CHECK-P8-NEXT: fcmpu 0, 0, 2 -; CHECK-P8-NEXT: xxlxor 0, 0, 0 -; CHECK-P8-NEXT: blt 0, .LBB23_2 +; CHECK-P8-NEXT: addis r3, r2, .LCPI23_1@toc@ha +; CHECK-P8-NEXT: xsabsdp f0, f1 +; CHECK-P8-NEXT: lfs f2, .LCPI23_1@toc@l(r3) +; CHECK-P8-NEXT: fcmpu cr0, f0, f2 +; CHECK-P8-NEXT: xxlxor f0, f0, f0 +; CHECK-P8-NEXT: blt cr0, .LBB23_2 ; CHECK-P8-NEXT: # %bb.1: -; CHECK-P8-NEXT: xsrsqrtesp 0, 1 -; CHECK-P8-NEXT: vspltisw 2, -3 -; CHECK-P8-NEXT: addis 3, 2, .LCPI23_0@toc@ha -; CHECK-P8-NEXT: xvcvsxwdp 2, 34 -; CHECK-P8-NEXT: xsmulsp 1, 1, 0 -; CHECK-P8-NEXT: xsmaddasp 2, 1, 0 -; CHECK-P8-NEXT: lfs 0, .LCPI23_0@toc@l(3) -; CHECK-P8-NEXT: xsmulsp 0, 1, 0 -; CHECK-P8-NEXT: xsmulsp 0, 0, 2 +; CHECK-P8-NEXT: xsrsqrtesp f0, f1 +; CHECK-P8-NEXT: vspltisw v2, -3 +; CHECK-P8-NEXT: addis r3, r2, .LCPI23_0@toc@ha +; CHECK-P8-NEXT: xvcvsxwdp vs2, v2 +; CHECK-P8-NEXT: xsmulsp f1, f1, f0 +; CHECK-P8-NEXT: xsmaddasp f2, f1, f0 +; CHECK-P8-NEXT: lfs f0, .LCPI23_0@toc@l(r3) +; CHECK-P8-NEXT: xsmulsp f0, f1, f0 +; CHECK-P8-NEXT: xsmulsp f0, f0, f2 ; CHECK-P8-NEXT: .LBB23_2: -; CHECK-P8-NEXT: fmr 1, 0 +; CHECK-P8-NEXT: fmr f1, f0 ; CHECK-P8-NEXT: blr ; ; CHECK-P9-LABEL: goo3_fmf: ; CHECK-P9: # %bb.0: -; CHECK-P9-NEXT: addis 3, 2, .LCPI23_1@toc@ha -; CHECK-P9-NEXT: xsabsdp 0, 1 -; CHECK-P9-NEXT: lfs 2, .LCPI23_1@toc@l(3) -; CHECK-P9-NEXT: fcmpu 0, 0, 2 -; CHECK-P9-NEXT: xxlxor 0, 0, 0 -; CHECK-P9-NEXT: blt 0, .LBB23_2 +; CHECK-P9-NEXT: addis r3, r2, .LCPI23_1@toc@ha +; CHECK-P9-NEXT: xsabsdp f0, f1 +; CHECK-P9-NEXT: lfs f2, .LCPI23_1@toc@l(r3) +; CHECK-P9-NEXT: fcmpu cr0, f0, f2 +; CHECK-P9-NEXT: xxlxor f0, f0, f0 +; CHECK-P9-NEXT: blt cr0, .LBB23_2 ; CHECK-P9-NEXT: # %bb.1: -; CHECK-P9-NEXT: xsrsqrtesp 0, 1 -; CHECK-P9-NEXT: vspltisw 2, -3 -; CHECK-P9-NEXT: addis 3, 2, .LCPI23_0@toc@ha -; CHECK-P9-NEXT: xsmulsp 1, 1, 0 -; CHECK-P9-NEXT: xvcvsxwdp 2, 34 -; CHECK-P9-NEXT: xsmaddasp 2, 1, 0 -; CHECK-P9-NEXT: lfs 0, .LCPI23_0@toc@l(3) -; CHECK-P9-NEXT: xsmulsp 0, 1, 0 -; CHECK-P9-NEXT: xsmulsp 0, 0, 2 +; CHECK-P9-NEXT: xsrsqrtesp f0, f1 +; CHECK-P9-NEXT: vspltisw v2, -3 +; CHECK-P9-NEXT: addis r3, r2, .LCPI23_0@toc@ha +; CHECK-P9-NEXT: xsmulsp f1, f1, f0 +; CHECK-P9-NEXT: xvcvsxwdp vs2, v2 +; CHECK-P9-NEXT: xsmaddasp f2, f1, f0 +; CHECK-P9-NEXT: lfs f0, .LCPI23_0@toc@l(r3) +; CHECK-P9-NEXT: xsmulsp f0, f1, f0 +; CHECK-P9-NEXT: xsmulsp f0, f0, f2 ; CHECK-P9-NEXT: .LBB23_2: -; CHECK-P9-NEXT: fmr 1, 0 +; CHECK-P9-NEXT: fmr f1, f0 ; CHECK-P9-NEXT: blr %r = call contract reassoc ninf afn float @llvm.sqrt.f32(float %a) ret float %r @@ -998,17 +1001,17 @@ define float @goo3_fmf(float %a) nounwind { define float @goo3_safe(float %a) nounwind { ; CHECK-P7-LABEL: goo3_safe: ; CHECK-P7: # %bb.0: -; CHECK-P7-NEXT: fsqrts 1, 1 +; CHECK-P7-NEXT: fsqrts f1, f1 ; CHECK-P7-NEXT: blr ; ; CHECK-P8-LABEL: goo3_safe: ; CHECK-P8: # %bb.0: -; CHECK-P8-NEXT: xssqrtsp 1, 1 +; CHECK-P8-NEXT: xssqrtsp f1, f1 ; CHECK-P8-NEXT: blr ; ; CHECK-P9-LABEL: goo3_safe: ; CHECK-P9: # %bb.0: -; CHECK-P9-NEXT: xssqrtsp 1, 1 +; CHECK-P9-NEXT: xssqrtsp f1, f1 ; CHECK-P9-NEXT: blr %r = call float @llvm.sqrt.f32(float %a) ret float %r @@ -1017,65 +1020,65 @@ define float @goo3_safe(float %a) nounwind { define <4 x float> @hoo3_fmf(<4 x float> %a) #1 { ; CHECK-P7-LABEL: hoo3_fmf: ; CHECK-P7: # %bb.0: -; CHECK-P7-NEXT: addis 3, 2, .LCPI25_0@toc@ha -; CHECK-P7-NEXT: vspltisw 3, -1 -; CHECK-P7-NEXT: vrsqrtefp 4, 2 -; CHECK-P7-NEXT: addi 3, 3, .LCPI25_0@toc@l -; CHECK-P7-NEXT: vslw 3, 3, 3 -; CHECK-P7-NEXT: lvx 0, 0, 3 -; CHECK-P7-NEXT: addis 3, 2, .LCPI25_1@toc@ha -; CHECK-P7-NEXT: vmaddfp 5, 2, 4, 3 -; CHECK-P7-NEXT: addi 3, 3, .LCPI25_1@toc@l -; CHECK-P7-NEXT: vmaddfp 4, 5, 4, 0 -; CHECK-P7-NEXT: lvx 0, 0, 3 -; CHECK-P7-NEXT: vmaddfp 5, 5, 0, 3 -; CHECK-P7-NEXT: vmaddfp 3, 5, 4, 3 -; CHECK-P7-NEXT: vxor 4, 4, 4 -; CHECK-P7-NEXT: vcmpeqfp 2, 2, 4 -; CHECK-P7-NEXT: vnot 2, 2 -; CHECK-P7-NEXT: vand 2, 2, 3 +; CHECK-P7-NEXT: addis r3, r2, .LCPI25_0@toc@ha +; CHECK-P7-NEXT: vspltisw v3, -1 +; CHECK-P7-NEXT: vrsqrtefp v4, v2 +; CHECK-P7-NEXT: addi r3, r3, .LCPI25_0@toc@l +; CHECK-P7-NEXT: vslw v3, v3, v3 +; CHECK-P7-NEXT: lvx v0, 0, r3 +; CHECK-P7-NEXT: addis r3, r2, .LCPI25_1@toc@ha +; CHECK-P7-NEXT: vmaddfp v5, v2, v4, v3 +; CHECK-P7-NEXT: addi r3, r3, .LCPI25_1@toc@l +; CHECK-P7-NEXT: vmaddfp v4, v5, v4, v0 +; CHECK-P7-NEXT: lvx v0, 0, r3 +; CHECK-P7-NEXT: vmaddfp v5, v5, v0, v3 +; CHECK-P7-NEXT: vmaddfp v3, v5, v4, v3 +; CHECK-P7-NEXT: vxor v4, v4, v4 +; CHECK-P7-NEXT: vcmpeqfp v2, v2, v4 +; CHECK-P7-NEXT: vnot v2, v2 +; CHECK-P7-NEXT: vand v2, v2, v3 ; CHECK-P7-NEXT: blr ; ; CHECK-P8-LABEL: hoo3_fmf: ; CHECK-P8: # %bb.0: -; CHECK-P8-NEXT: xvtsqrtsp 0, 34 -; CHECK-P8-NEXT: bc 12, 2, .LBB25_2 +; CHECK-P8-NEXT: xvtsqrtsp cr0, v2 +; CHECK-P8-NEXT: bc 12, eq, .LBB25_2 ; CHECK-P8-NEXT: # %bb.1: -; CHECK-P8-NEXT: xvrsqrtesp 0, 34 -; CHECK-P8-NEXT: addis 3, 2, .LCPI25_0@toc@ha -; CHECK-P8-NEXT: addi 3, 3, .LCPI25_0@toc@l -; CHECK-P8-NEXT: lxvd2x 2, 0, 3 -; CHECK-P8-NEXT: addis 3, 2, .LCPI25_1@toc@ha -; CHECK-P8-NEXT: xvmulsp 1, 34, 0 -; CHECK-P8-NEXT: addi 3, 3, .LCPI25_1@toc@l -; CHECK-P8-NEXT: xvmaddasp 2, 1, 0 -; CHECK-P8-NEXT: lxvd2x 0, 0, 3 -; CHECK-P8-NEXT: xvmulsp 0, 1, 0 -; CHECK-P8-NEXT: xvmulsp 34, 0, 2 +; CHECK-P8-NEXT: xvrsqrtesp vs0, v2 +; CHECK-P8-NEXT: addis r3, r2, .LCPI25_0@toc@ha +; CHECK-P8-NEXT: addi r3, r3, .LCPI25_0@toc@l +; CHECK-P8-NEXT: lxvd2x vs2, 0, r3 +; CHECK-P8-NEXT: addis r3, r2, .LCPI25_1@toc@ha +; CHECK-P8-NEXT: xvmulsp vs1, v2, vs0 +; CHECK-P8-NEXT: addi r3, r3, .LCPI25_1@toc@l +; CHECK-P8-NEXT: xvmaddasp vs2, vs1, vs0 +; CHECK-P8-NEXT: lxvd2x vs0, 0, r3 +; CHECK-P8-NEXT: xvmulsp vs0, vs1, vs0 +; CHECK-P8-NEXT: xvmulsp v2, vs0, vs2 ; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: .LBB25_2: -; CHECK-P8-NEXT: xvsqrtsp 34, 34 +; CHECK-P8-NEXT: xvsqrtsp v2, v2 ; CHECK-P8-NEXT: blr ; ; CHECK-P9-LABEL: hoo3_fmf: ; CHECK-P9: # %bb.0: -; CHECK-P9-NEXT: xvtsqrtsp 0, 34 -; CHECK-P9-NEXT: bc 12, 2, .LBB25_2 +; CHECK-P9-NEXT: xvtsqrtsp cr0, v2 +; CHECK-P9-NEXT: bc 12, eq, .LBB25_2 ; CHECK-P9-NEXT: # %bb.1: -; CHECK-P9-NEXT: xvrsqrtesp 0, 34 -; CHECK-P9-NEXT: addis 3, 2, .LCPI25_0@toc@ha -; CHECK-P9-NEXT: addi 3, 3, .LCPI25_0@toc@l -; CHECK-P9-NEXT: lxv 2, 0(3) -; CHECK-P9-NEXT: addis 3, 2, .LCPI25_1@toc@ha -; CHECK-P9-NEXT: addi 3, 3, .LCPI25_1@toc@l -; CHECK-P9-NEXT: xvmulsp 1, 34, 0 -; CHECK-P9-NEXT: xvmaddasp 2, 1, 0 -; CHECK-P9-NEXT: lxv 0, 0(3) -; CHECK-P9-NEXT: xvmulsp 0, 1, 0 -; CHECK-P9-NEXT: xvmulsp 34, 0, 2 +; CHECK-P9-NEXT: xvrsqrtesp vs0, v2 +; CHECK-P9-NEXT: addis r3, r2, .LCPI25_0@toc@ha +; CHECK-P9-NEXT: addi r3, r3, .LCPI25_0@toc@l +; CHECK-P9-NEXT: lxv vs2, 0(r3) +; CHECK-P9-NEXT: addis r3, r2, .LCPI25_1@toc@ha +; CHECK-P9-NEXT: addi r3, r3, .LCPI25_1@toc@l +; CHECK-P9-NEXT: xvmulsp vs1, v2, vs0 +; CHECK-P9-NEXT: xvmaddasp vs2, vs1, vs0 +; CHECK-P9-NEXT: lxv vs0, 0(r3) +; CHECK-P9-NEXT: xvmulsp vs0, vs1, vs0 +; CHECK-P9-NEXT: xvmulsp v2, vs0, vs2 ; CHECK-P9-NEXT: blr ; CHECK-P9-NEXT: .LBB25_2: -; CHECK-P9-NEXT: xvsqrtsp 34, 34 +; CHECK-P9-NEXT: xvsqrtsp v2, v2 ; CHECK-P9-NEXT: blr %r = call contract reassoc ninf afn <4 x float> @llvm.sqrt.v4f32(<4 x float> %a) ret <4 x float> %r @@ -1084,32 +1087,32 @@ define <4 x float> @hoo3_fmf(<4 x float> %a) #1 { define <4 x float> @hoo3_safe(<4 x float> %a) nounwind { ; CHECK-P7-LABEL: hoo3_safe: ; CHECK-P7: # %bb.0: -; CHECK-P7-NEXT: addi 3, 1, -32 -; CHECK-P7-NEXT: stvx 2, 0, 3 -; CHECK-P7-NEXT: addi 3, 1, -16 -; CHECK-P7-NEXT: lfs 0, -20(1) -; CHECK-P7-NEXT: fsqrts 0, 0 -; CHECK-P7-NEXT: stfs 0, -4(1) -; CHECK-P7-NEXT: lfs 0, -24(1) -; CHECK-P7-NEXT: fsqrts 0, 0 -; CHECK-P7-NEXT: stfs 0, -8(1) -; CHECK-P7-NEXT: lfs 0, -28(1) -; CHECK-P7-NEXT: fsqrts 0, 0 -; CHECK-P7-NEXT: stfs 0, -12(1) -; CHECK-P7-NEXT: lfs 0, -32(1) -; CHECK-P7-NEXT: fsqrts 0, 0 -; CHECK-P7-NEXT: stfs 0, -16(1) -; CHECK-P7-NEXT: lvx 2, 0, 3 +; CHECK-P7-NEXT: addi r3, r1, -32 +; CHECK-P7-NEXT: stvx v2, 0, r3 +; CHECK-P7-NEXT: addi r3, r1, -16 +; CHECK-P7-NEXT: lfs f0, -20(r1) +; CHECK-P7-NEXT: fsqrts f0, f0 +; CHECK-P7-NEXT: stfs f0, -4(r1) +; CHECK-P7-NEXT: lfs f0, -24(r1) +; CHECK-P7-NEXT: fsqrts f0, f0 +; CHECK-P7-NEXT: stfs f0, -8(r1) +; CHECK-P7-NEXT: lfs f0, -28(r1) +; CHECK-P7-NEXT: fsqrts f0, f0 +; CHECK-P7-NEXT: stfs f0, -12(r1) +; CHECK-P7-NEXT: lfs f0, -32(r1) +; CHECK-P7-NEXT: fsqrts f0, f0 +; CHECK-P7-NEXT: stfs f0, -16(r1) +; CHECK-P7-NEXT: lvx v2, 0, r3 ; CHECK-P7-NEXT: blr ; ; CHECK-P8-LABEL: hoo3_safe: ; CHECK-P8: # %bb.0: -; CHECK-P8-NEXT: xvsqrtsp 34, 34 +; CHECK-P8-NEXT: xvsqrtsp v2, v2 ; CHECK-P8-NEXT: blr ; ; CHECK-P9-LABEL: hoo3_safe: ; CHECK-P9: # %bb.0: -; CHECK-P9-NEXT: xvsqrtsp 34, 34 +; CHECK-P9-NEXT: xvsqrtsp v2, v2 ; CHECK-P9-NEXT: blr %r = call <4 x float> @llvm.sqrt.v4f32(<4 x float> %a) ret <4 x float> %r @@ -1118,93 +1121,93 @@ define <4 x float> @hoo3_safe(<4 x float> %a) nounwind { define <2 x double> @hoo4_fmf(<2 x double> %a) #1 { ; CHECK-P7-LABEL: hoo4_fmf: ; CHECK-P7: # %bb.0: -; CHECK-P7-NEXT: ftsqrt 0, 1 -; CHECK-P7-NEXT: addis 3, 2, .LCPI27_0@toc@ha -; CHECK-P7-NEXT: lfs 0, .LCPI27_0@toc@l(3) -; CHECK-P7-NEXT: addis 3, 2, .LCPI27_1@toc@ha -; CHECK-P7-NEXT: lfs 3, .LCPI27_1@toc@l(3) -; CHECK-P7-NEXT: bc 12, 2, .LBB27_3 +; CHECK-P7-NEXT: ftsqrt cr0, f1 +; CHECK-P7-NEXT: addis r3, r2, .LCPI27_0@toc@ha +; CHECK-P7-NEXT: lfs f0, .LCPI27_0@toc@l(r3) +; CHECK-P7-NEXT: addis r3, r2, .LCPI27_1@toc@ha +; CHECK-P7-NEXT: lfs f3, .LCPI27_1@toc@l(r3) +; CHECK-P7-NEXT: bc 12, eq, .LBB27_3 ; CHECK-P7-NEXT: # %bb.1: -; CHECK-P7-NEXT: frsqrte 4, 1 -; CHECK-P7-NEXT: fmul 5, 1, 4 -; CHECK-P7-NEXT: fmadd 5, 5, 4, 0 -; CHECK-P7-NEXT: fmul 4, 4, 3 -; CHECK-P7-NEXT: fmul 4, 4, 5 -; CHECK-P7-NEXT: fmul 1, 1, 4 -; CHECK-P7-NEXT: fmadd 4, 1, 4, 0 -; CHECK-P7-NEXT: fmul 1, 1, 3 -; CHECK-P7-NEXT: fmul 1, 1, 4 -; CHECK-P7-NEXT: ftsqrt 0, 2 -; CHECK-P7-NEXT: bc 4, 2, .LBB27_4 +; CHECK-P7-NEXT: frsqrte f4, f1 +; CHECK-P7-NEXT: fmul f5, f1, f4 +; CHECK-P7-NEXT: fmadd f5, f5, f4, f0 +; CHECK-P7-NEXT: fmul f4, f4, f3 +; CHECK-P7-NEXT: fmul f4, f4, f5 +; CHECK-P7-NEXT: fmul f1, f1, f4 +; CHECK-P7-NEXT: fmadd f4, f1, f4, f0 +; CHECK-P7-NEXT: fmul f1, f1, f3 +; CHECK-P7-NEXT: fmul f1, f1, f4 +; CHECK-P7-NEXT: ftsqrt cr0, f2 +; CHECK-P7-NEXT: bc 4, eq, .LBB27_4 ; CHECK-P7-NEXT: .LBB27_2: -; CHECK-P7-NEXT: fsqrt 2, 2 +; CHECK-P7-NEXT: fsqrt f2, f2 ; CHECK-P7-NEXT: blr ; CHECK-P7-NEXT: .LBB27_3: -; CHECK-P7-NEXT: fsqrt 1, 1 -; CHECK-P7-NEXT: ftsqrt 0, 2 -; CHECK-P7-NEXT: bc 12, 2, .LBB27_2 +; CHECK-P7-NEXT: fsqrt f1, f1 +; CHECK-P7-NEXT: ftsqrt cr0, f2 +; CHECK-P7-NEXT: bc 12, eq, .LBB27_2 ; CHECK-P7-NEXT: .LBB27_4: -; CHECK-P7-NEXT: frsqrte 4, 2 -; CHECK-P7-NEXT: fmul 5, 2, 4 -; CHECK-P7-NEXT: fmadd 5, 5, 4, 0 -; CHECK-P7-NEXT: fmul 4, 4, 3 -; CHECK-P7-NEXT: fmul 4, 4, 5 -; CHECK-P7-NEXT: fmul 2, 2, 4 -; CHECK-P7-NEXT: fmadd 0, 2, 4, 0 -; CHECK-P7-NEXT: fmul 2, 2, 3 -; CHECK-P7-NEXT: fmul 2, 2, 0 +; CHECK-P7-NEXT: frsqrte f4, f2 +; CHECK-P7-NEXT: fmul f5, f2, f4 +; CHECK-P7-NEXT: fmadd f5, f5, f4, f0 +; CHECK-P7-NEXT: fmul f4, f4, f3 +; CHECK-P7-NEXT: fmul f4, f4, f5 +; CHECK-P7-NEXT: fmul f2, f2, f4 +; CHECK-P7-NEXT: fmadd f0, f2, f4, f0 +; CHECK-P7-NEXT: fmul f2, f2, f3 +; CHECK-P7-NEXT: fmul f2, f2, f0 ; CHECK-P7-NEXT: blr ; ; CHECK-P8-LABEL: hoo4_fmf: ; CHECK-P8: # %bb.0: -; CHECK-P8-NEXT: xvtsqrtdp 0, 34 -; CHECK-P8-NEXT: bc 12, 2, .LBB27_2 +; CHECK-P8-NEXT: xvtsqrtdp cr0, v2 +; CHECK-P8-NEXT: bc 12, eq, .LBB27_2 ; CHECK-P8-NEXT: # %bb.1: -; CHECK-P8-NEXT: xvrsqrtedp 0, 34 -; CHECK-P8-NEXT: addis 3, 2, .LCPI27_0@toc@ha -; CHECK-P8-NEXT: addi 3, 3, .LCPI27_0@toc@l -; CHECK-P8-NEXT: lxvd2x 2, 0, 3 -; CHECK-P8-NEXT: addis 3, 2, .LCPI27_1@toc@ha -; CHECK-P8-NEXT: xvmuldp 1, 34, 0 -; CHECK-P8-NEXT: addi 3, 3, .LCPI27_1@toc@l -; CHECK-P8-NEXT: xxlor 3, 2, 2 -; CHECK-P8-NEXT: xvmaddadp 3, 1, 0 -; CHECK-P8-NEXT: lxvd2x 1, 0, 3 -; CHECK-P8-NEXT: xvmuldp 0, 0, 1 -; CHECK-P8-NEXT: xvmuldp 0, 0, 3 -; CHECK-P8-NEXT: xvmuldp 3, 34, 0 -; CHECK-P8-NEXT: xvmaddadp 2, 3, 0 -; CHECK-P8-NEXT: xvmuldp 0, 3, 1 -; CHECK-P8-NEXT: xvmuldp 34, 0, 2 +; CHECK-P8-NEXT: xvrsqrtedp vs0, v2 +; CHECK-P8-NEXT: addis r3, r2, .LCPI27_0@toc@ha +; CHECK-P8-NEXT: addi r3, r3, .LCPI27_0@toc@l +; CHECK-P8-NEXT: lxvd2x vs2, 0, r3 +; CHECK-P8-NEXT: addis r3, r2, .LCPI27_1@toc@ha +; CHECK-P8-NEXT: xvmuldp vs1, v2, vs0 +; CHECK-P8-NEXT: addi r3, r3, .LCPI27_1@toc@l +; CHECK-P8-NEXT: xxlor vs3, vs2, vs2 +; CHECK-P8-NEXT: xvmaddadp vs3, vs1, vs0 +; CHECK-P8-NEXT: lxvd2x vs1, 0, r3 +; CHECK-P8-NEXT: xvmuldp vs0, vs0, vs1 +; CHECK-P8-NEXT: xvmuldp vs0, vs0, vs3 +; CHECK-P8-NEXT: xvmuldp vs3, v2, vs0 +; CHECK-P8-NEXT: xvmaddadp vs2, vs3, vs0 +; CHECK-P8-NEXT: xvmuldp vs0, vs3, vs1 +; CHECK-P8-NEXT: xvmuldp v2, vs0, vs2 ; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: .LBB27_2: -; CHECK-P8-NEXT: xvsqrtdp 34, 34 +; CHECK-P8-NEXT: xvsqrtdp v2, v2 ; CHECK-P8-NEXT: blr ; ; CHECK-P9-LABEL: hoo4_fmf: ; CHECK-P9: # %bb.0: -; CHECK-P9-NEXT: xvtsqrtdp 0, 34 -; CHECK-P9-NEXT: bc 12, 2, .LBB27_2 +; CHECK-P9-NEXT: xvtsqrtdp cr0, v2 +; CHECK-P9-NEXT: bc 12, eq, .LBB27_2 ; CHECK-P9-NEXT: # %bb.1: -; CHECK-P9-NEXT: xvrsqrtedp 0, 34 -; CHECK-P9-NEXT: addis 3, 2, .LCPI27_0@toc@ha -; CHECK-P9-NEXT: addi 3, 3, .LCPI27_0@toc@l -; CHECK-P9-NEXT: lxv 2, 0(3) -; CHECK-P9-NEXT: addis 3, 2, .LCPI27_1@toc@ha -; CHECK-P9-NEXT: addi 3, 3, .LCPI27_1@toc@l -; CHECK-P9-NEXT: xvmuldp 1, 34, 0 -; CHECK-P9-NEXT: xxlor 3, 2, 2 -; CHECK-P9-NEXT: xvmaddadp 3, 1, 0 -; CHECK-P9-NEXT: lxv 1, 0(3) -; CHECK-P9-NEXT: xvmuldp 0, 0, 1 -; CHECK-P9-NEXT: xvmuldp 0, 0, 3 -; CHECK-P9-NEXT: xvmuldp 3, 34, 0 -; CHECK-P9-NEXT: xvmaddadp 2, 3, 0 -; CHECK-P9-NEXT: xvmuldp 0, 3, 1 -; CHECK-P9-NEXT: xvmuldp 34, 0, 2 +; CHECK-P9-NEXT: xvrsqrtedp vs0, v2 +; CHECK-P9-NEXT: addis r3, r2, .LCPI27_0@toc@ha +; CHECK-P9-NEXT: addi r3, r3, .LCPI27_0@toc@l +; CHECK-P9-NEXT: lxv vs2, 0(r3) +; CHECK-P9-NEXT: addis r3, r2, .LCPI27_1@toc@ha +; CHECK-P9-NEXT: addi r3, r3, .LCPI27_1@toc@l +; CHECK-P9-NEXT: xvmuldp vs1, v2, vs0 +; CHECK-P9-NEXT: xxlor vs3, vs2, vs2 +; CHECK-P9-NEXT: xvmaddadp vs3, vs1, vs0 +; CHECK-P9-NEXT: lxv vs1, 0(r3) +; CHECK-P9-NEXT: xvmuldp vs0, vs0, vs1 +; CHECK-P9-NEXT: xvmuldp vs0, vs0, vs3 +; CHECK-P9-NEXT: xvmuldp vs3, v2, vs0 +; CHECK-P9-NEXT: xvmaddadp vs2, vs3, vs0 +; CHECK-P9-NEXT: xvmuldp vs0, vs3, vs1 +; CHECK-P9-NEXT: xvmuldp v2, vs0, vs2 ; CHECK-P9-NEXT: blr ; CHECK-P9-NEXT: .LBB27_2: -; CHECK-P9-NEXT: xvsqrtdp 34, 34 +; CHECK-P9-NEXT: xvsqrtdp v2, v2 ; CHECK-P9-NEXT: blr %r = call contract reassoc ninf afn <2 x double> @llvm.sqrt.v2f64(<2 x double> %a) ret <2 x double> %r @@ -1213,18 +1216,18 @@ define <2 x double> @hoo4_fmf(<2 x double> %a) #1 { define <2 x double> @hoo4_safe(<2 x double> %a) #1 { ; CHECK-P7-LABEL: hoo4_safe: ; CHECK-P7: # %bb.0: -; CHECK-P7-NEXT: fsqrt 1, 1 -; CHECK-P7-NEXT: fsqrt 2, 2 +; CHECK-P7-NEXT: fsqrt f1, f1 +; CHECK-P7-NEXT: fsqrt f2, f2 ; CHECK-P7-NEXT: blr ; ; CHECK-P8-LABEL: hoo4_safe: ; CHECK-P8: # %bb.0: -; CHECK-P8-NEXT: xvsqrtdp 34, 34 +; CHECK-P8-NEXT: xvsqrtdp v2, v2 ; CHECK-P8-NEXT: blr ; ; CHECK-P9-LABEL: hoo4_safe: ; CHECK-P9: # %bb.0: -; CHECK-P9-NEXT: xvsqrtdp 34, 34 +; CHECK-P9-NEXT: xvsqrtdp v2, v2 ; CHECK-P9-NEXT: blr %r = call <2 x double> @llvm.sqrt.v2f64(<2 x double> %a) ret <2 x double> %r @@ -1233,31 +1236,31 @@ define <2 x double> @hoo4_safe(<2 x double> %a) #1 { define fp128 @hoo5_fmf(fp128 %a) #1 { ; CHECK-P7-LABEL: hoo5_fmf: ; CHECK-P7: # %bb.0: -; CHECK-P7-NEXT: mflr 0 -; CHECK-P7-NEXT: stdu 1, -112(1) -; CHECK-P7-NEXT: std 0, 128(1) +; CHECK-P7-NEXT: mflr r0 +; CHECK-P7-NEXT: stdu r1, -112(r1) +; CHECK-P7-NEXT: std r0, 128(r1) ; CHECK-P7-NEXT: bl sqrtf128 ; CHECK-P7-NEXT: nop -; CHECK-P7-NEXT: addi 1, 1, 112 -; CHECK-P7-NEXT: ld 0, 16(1) -; CHECK-P7-NEXT: mtlr 0 +; CHECK-P7-NEXT: addi r1, r1, 112 +; CHECK-P7-NEXT: ld r0, 16(r1) +; CHECK-P7-NEXT: mtlr r0 ; CHECK-P7-NEXT: blr ; ; CHECK-P8-LABEL: hoo5_fmf: ; CHECK-P8: # %bb.0: -; CHECK-P8-NEXT: mflr 0 -; CHECK-P8-NEXT: stdu 1, -32(1) -; CHECK-P8-NEXT: std 0, 48(1) +; CHECK-P8-NEXT: mflr r0 +; CHECK-P8-NEXT: stdu r1, -32(r1) +; CHECK-P8-NEXT: std r0, 48(r1) ; CHECK-P8-NEXT: bl sqrtf128 ; CHECK-P8-NEXT: nop -; CHECK-P8-NEXT: addi 1, 1, 32 -; CHECK-P8-NEXT: ld 0, 16(1) -; CHECK-P8-NEXT: mtlr 0 +; CHECK-P8-NEXT: addi r1, r1, 32 +; CHECK-P8-NEXT: ld r0, 16(r1) +; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: blr ; ; CHECK-P9-LABEL: hoo5_fmf: ; CHECK-P9: # %bb.0: -; CHECK-P9-NEXT: xssqrtqp 2, 2 +; CHECK-P9-NEXT: xssqrtqp v2, v2 ; CHECK-P9-NEXT: blr %r = call contract reassoc ninf afn fp128 @llvm.sqrt.f128(fp128 %a) ret fp128 %r @@ -1266,31 +1269,31 @@ define fp128 @hoo5_fmf(fp128 %a) #1 { define fp128 @hoo5_safe(fp128 %a) #1 { ; CHECK-P7-LABEL: hoo5_safe: ; CHECK-P7: # %bb.0: -; CHECK-P7-NEXT: mflr 0 -; CHECK-P7-NEXT: stdu 1, -112(1) -; CHECK-P7-NEXT: std 0, 128(1) +; CHECK-P7-NEXT: mflr r0 +; CHECK-P7-NEXT: stdu r1, -112(r1) +; CHECK-P7-NEXT: std r0, 128(r1) ; CHECK-P7-NEXT: bl sqrtf128 ; CHECK-P7-NEXT: nop -; CHECK-P7-NEXT: addi 1, 1, 112 -; CHECK-P7-NEXT: ld 0, 16(1) -; CHECK-P7-NEXT: mtlr 0 +; CHECK-P7-NEXT: addi r1, r1, 112 +; CHECK-P7-NEXT: ld r0, 16(r1) +; CHECK-P7-NEXT: mtlr r0 ; CHECK-P7-NEXT: blr ; ; CHECK-P8-LABEL: hoo5_safe: ; CHECK-P8: # %bb.0: -; CHECK-P8-NEXT: mflr 0 -; CHECK-P8-NEXT: stdu 1, -32(1) -; CHECK-P8-NEXT: std 0, 48(1) +; CHECK-P8-NEXT: mflr r0 +; CHECK-P8-NEXT: stdu r1, -32(r1) +; CHECK-P8-NEXT: std r0, 48(r1) ; CHECK-P8-NEXT: bl sqrtf128 ; CHECK-P8-NEXT: nop -; CHECK-P8-NEXT: addi 1, 1, 32 -; CHECK-P8-NEXT: ld 0, 16(1) -; CHECK-P8-NEXT: mtlr 0 +; CHECK-P8-NEXT: addi r1, r1, 32 +; CHECK-P8-NEXT: ld r0, 16(r1) +; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: blr ; ; CHECK-P9-LABEL: hoo5_safe: ; CHECK-P9: # %bb.0: -; CHECK-P9-NEXT: xssqrtqp 2, 2 +; CHECK-P9-NEXT: xssqrtqp v2, v2 ; CHECK-P9-NEXT: blr %r = call fp128 @llvm.sqrt.f128(fp128 %a) ret fp128 %r diff --git a/llvm/test/CodeGen/PowerPC/setcc-logic.ll b/llvm/test/CodeGen/PowerPC/setcc-logic.ll index 1c3ac17666e26..5ebfec68695f0 100644 --- a/llvm/test/CodeGen/PowerPC/setcc-logic.ll +++ b/llvm/test/CodeGen/PowerPC/setcc-logic.ll @@ -1,12 +1,13 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -ppc-gpr-icmps=all -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown -ppc-convert-rr-to-ri=true | FileCheck %s +; RUN: llc < %s -ppc-gpr-icmps=all -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown -ppc-convert-rr-to-ri=true \ +; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr | FileCheck %s define zeroext i1 @all_bits_clear(i32 %P, i32 %Q) { ; CHECK-LABEL: all_bits_clear: ; CHECK: # %bb.0: -; CHECK-NEXT: or 3, 3, 4 -; CHECK-NEXT: cntlzw 3, 3 -; CHECK-NEXT: srwi 3, 3, 5 +; CHECK-NEXT: or r3, r3, r4 +; CHECK-NEXT: cntlzw r3, r3 +; CHECK-NEXT: srwi r3, r3, 5 ; CHECK-NEXT: blr %a = icmp eq i32 %P, 0 %b = icmp eq i32 %Q, 0 @@ -17,9 +18,9 @@ define zeroext i1 @all_bits_clear(i32 %P, i32 %Q) { define zeroext i1 @all_sign_bits_clear(i32 %P, i32 %Q) { ; CHECK-LABEL: all_sign_bits_clear: ; CHECK: # %bb.0: -; CHECK-NEXT: or 3, 3, 4 -; CHECK-NEXT: rlwinm 3, 3, 1, 31, 31 -; CHECK-NEXT: xori 3, 3, 1 +; CHECK-NEXT: or r3, r3, r4 +; CHECK-NEXT: rlwinm r3, r3, 1, 31, 31 +; CHECK-NEXT: xori r3, r3, 1 ; CHECK-NEXT: blr %a = icmp sgt i32 %P, -1 %b = icmp sgt i32 %Q, -1 @@ -30,11 +31,11 @@ define zeroext i1 @all_sign_bits_clear(i32 %P, i32 %Q) { define zeroext i1 @all_bits_set(i32 %P, i32 %Q) { ; CHECK-LABEL: all_bits_set: ; CHECK: # %bb.0: -; CHECK-NEXT: and 3, 3, 4 -; CHECK-NEXT: li 4, -1 -; CHECK-NEXT: xor 3, 3, 4 -; CHECK-NEXT: cntlzw 3, 3 -; CHECK-NEXT: srwi 3, 3, 5 +; CHECK-NEXT: and r3, r3, r4 +; CHECK-NEXT: li r4, -1 +; CHECK-NEXT: xor r3, r3, r4 +; CHECK-NEXT: cntlzw r3, r3 +; CHECK-NEXT: srwi r3, r3, 5 ; CHECK-NEXT: blr %a = icmp eq i32 %P, -1 %b = icmp eq i32 %Q, -1 @@ -45,8 +46,8 @@ define zeroext i1 @all_bits_set(i32 %P, i32 %Q) { define zeroext i1 @all_sign_bits_set(i32 %P, i32 %Q) { ; CHECK-LABEL: all_sign_bits_set: ; CHECK: # %bb.0: -; CHECK-NEXT: and 3, 3, 4 -; CHECK-NEXT: rlwinm 3, 3, 1, 31, 31 +; CHECK-NEXT: and r3, r3, r4 +; CHECK-NEXT: rlwinm r3, r3, 1, 31, 31 ; CHECK-NEXT: blr %a = icmp slt i32 %P, 0 %b = icmp slt i32 %Q, 0 @@ -57,10 +58,10 @@ define zeroext i1 @all_sign_bits_set(i32 %P, i32 %Q) { define zeroext i1 @any_bits_set(i32 %P, i32 %Q) { ; CHECK-LABEL: any_bits_set: ; CHECK: # %bb.0: -; CHECK-NEXT: or 3, 3, 4 -; CHECK-NEXT: cntlzw 3, 3 -; CHECK-NEXT: srwi 3, 3, 5 -; CHECK-NEXT: xori 3, 3, 1 +; CHECK-NEXT: or r3, r3, r4 +; CHECK-NEXT: cntlzw r3, r3 +; CHECK-NEXT: srwi r3, r3, 5 +; CHECK-NEXT: xori r3, r3, 1 ; CHECK-NEXT: blr %a = icmp ne i32 %P, 0 %b = icmp ne i32 %Q, 0 @@ -71,8 +72,8 @@ define zeroext i1 @any_bits_set(i32 %P, i32 %Q) { define zeroext i1 @any_sign_bits_set(i32 %P, i32 %Q) { ; CHECK-LABEL: any_sign_bits_set: ; CHECK: # %bb.0: -; CHECK-NEXT: or 3, 3, 4 -; CHECK-NEXT: rlwinm 3, 3, 1, 31, 31 +; CHECK-NEXT: or r3, r3, r4 +; CHECK-NEXT: rlwinm r3, r3, 1, 31, 31 ; CHECK-NEXT: blr %a = icmp slt i32 %P, 0 %b = icmp slt i32 %Q, 0 @@ -83,12 +84,12 @@ define zeroext i1 @any_sign_bits_set(i32 %P, i32 %Q) { define zeroext i1 @any_bits_clear(i32 %P, i32 %Q) { ; CHECK-LABEL: any_bits_clear: ; CHECK: # %bb.0: -; CHECK-NEXT: and 3, 3, 4 -; CHECK-NEXT: li 4, -1 -; CHECK-NEXT: xor 3, 3, 4 -; CHECK-NEXT: cntlzw 3, 3 -; CHECK-NEXT: srwi 3, 3, 5 -; CHECK-NEXT: xori 3, 3, 1 +; CHECK-NEXT: and r3, r3, r4 +; CHECK-NEXT: li r4, -1 +; CHECK-NEXT: xor r3, r3, r4 +; CHECK-NEXT: cntlzw r3, r3 +; CHECK-NEXT: srwi r3, r3, 5 +; CHECK-NEXT: xori r3, r3, 1 ; CHECK-NEXT: blr %a = icmp ne i32 %P, -1 %b = icmp ne i32 %Q, -1 @@ -99,9 +100,9 @@ define zeroext i1 @any_bits_clear(i32 %P, i32 %Q) { define zeroext i1 @any_sign_bits_clear(i32 %P, i32 %Q) { ; CHECK-LABEL: any_sign_bits_clear: ; CHECK: # %bb.0: -; CHECK-NEXT: and 3, 3, 4 -; CHECK-NEXT: rlwinm 3, 3, 1, 31, 31 -; CHECK-NEXT: xori 3, 3, 1 +; CHECK-NEXT: and r3, r3, r4 +; CHECK-NEXT: rlwinm r3, r3, 1, 31, 31 +; CHECK-NEXT: xori r3, r3, 1 ; CHECK-NEXT: blr %a = icmp sgt i32 %P, -1 %b = icmp sgt i32 %Q, -1 @@ -113,13 +114,13 @@ define zeroext i1 @any_sign_bits_clear(i32 %P, i32 %Q) { define i32 @all_bits_clear_branch(ptr %P, ptr %Q) { ; CHECK-LABEL: all_bits_clear_branch: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: or. 3, 3, 4 -; CHECK-NEXT: bne 0, .LBB8_2 +; CHECK-NEXT: or. r3, r3, r4 +; CHECK-NEXT: bne cr0, .LBB8_2 ; CHECK-NEXT: # %bb.1: # %bb1 -; CHECK-NEXT: li 3, 4 +; CHECK-NEXT: li r3, 4 ; CHECK-NEXT: blr ; CHECK-NEXT: .LBB8_2: # %return -; CHECK-NEXT: li 3, 192 +; CHECK-NEXT: li r3, 192 ; CHECK-NEXT: blr entry: %a = icmp eq ptr %P, null @@ -137,14 +138,14 @@ return: define i32 @all_sign_bits_clear_branch(i32 %P, i32 %Q) { ; CHECK-LABEL: all_sign_bits_clear_branch: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: or 3, 3, 4 -; CHECK-NEXT: cmpwi 3, 0 -; CHECK-NEXT: blt 0, .LBB9_2 +; CHECK-NEXT: or r3, r3, r4 +; CHECK-NEXT: cmpwi r3, 0 +; CHECK-NEXT: blt cr0, .LBB9_2 ; CHECK-NEXT: # %bb.1: # %bb1 -; CHECK-NEXT: li 3, 4 +; CHECK-NEXT: li r3, 4 ; CHECK-NEXT: blr ; CHECK-NEXT: .LBB9_2: # %return -; CHECK-NEXT: li 3, 192 +; CHECK-NEXT: li r3, 192 ; CHECK-NEXT: blr entry: %a = icmp sgt i32 %P, -1 @@ -162,14 +163,14 @@ return: define i32 @all_bits_set_branch(i32 %P, i32 %Q) { ; CHECK-LABEL: all_bits_set_branch: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: and 3, 3, 4 -; CHECK-NEXT: cmpwi 3, -1 -; CHECK-NEXT: bne 0, .LBB10_2 +; CHECK-NEXT: and r3, r3, r4 +; CHECK-NEXT: cmpwi r3, -1 +; CHECK-NEXT: bne cr0, .LBB10_2 ; CHECK-NEXT: # %bb.1: # %bb1 -; CHECK-NEXT: li 3, 4 +; CHECK-NEXT: li r3, 4 ; CHECK-NEXT: blr ; CHECK-NEXT: .LBB10_2: # %return -; CHECK-NEXT: li 3, 192 +; CHECK-NEXT: li r3, 192 ; CHECK-NEXT: blr entry: %a = icmp eq i32 %P, -1 @@ -187,14 +188,14 @@ return: define i32 @all_sign_bits_set_branch(i32 %P, i32 %Q) { ; CHECK-LABEL: all_sign_bits_set_branch: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: and 3, 3, 4 -; CHECK-NEXT: cmpwi 3, -1 -; CHECK-NEXT: bgt 0, .LBB11_2 +; CHECK-NEXT: and r3, r3, r4 +; CHECK-NEXT: cmpwi r3, -1 +; CHECK-NEXT: bgt cr0, .LBB11_2 ; CHECK-NEXT: # %bb.1: # %bb1 -; CHECK-NEXT: li 3, 4 +; CHECK-NEXT: li r3, 4 ; CHECK-NEXT: blr ; CHECK-NEXT: .LBB11_2: # %return -; CHECK-NEXT: li 3, 192 +; CHECK-NEXT: li r3, 192 ; CHECK-NEXT: blr entry: %a = icmp slt i32 %P, 0 @@ -213,13 +214,13 @@ return: define i32 @any_bits_set_branch(ptr %P, ptr %Q) { ; CHECK-LABEL: any_bits_set_branch: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: or. 3, 3, 4 -; CHECK-NEXT: beq 0, .LBB12_2 +; CHECK-NEXT: or. r3, r3, r4 +; CHECK-NEXT: beq cr0, .LBB12_2 ; CHECK-NEXT: # %bb.1: # %bb1 -; CHECK-NEXT: li 3, 4 +; CHECK-NEXT: li r3, 4 ; CHECK-NEXT: blr ; CHECK-NEXT: .LBB12_2: # %return -; CHECK-NEXT: li 3, 192 +; CHECK-NEXT: li r3, 192 ; CHECK-NEXT: blr entry: %a = icmp ne ptr %P, null @@ -237,14 +238,14 @@ return: define i32 @any_sign_bits_set_branch(i32 %P, i32 %Q) { ; CHECK-LABEL: any_sign_bits_set_branch: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: or 3, 3, 4 -; CHECK-NEXT: cmpwi 3, -1 -; CHECK-NEXT: bgt 0, .LBB13_2 +; CHECK-NEXT: or r3, r3, r4 +; CHECK-NEXT: cmpwi r3, -1 +; CHECK-NEXT: bgt cr0, .LBB13_2 ; CHECK-NEXT: # %bb.1: # %bb1 -; CHECK-NEXT: li 3, 4 +; CHECK-NEXT: li r3, 4 ; CHECK-NEXT: blr ; CHECK-NEXT: .LBB13_2: # %return -; CHECK-NEXT: li 3, 192 +; CHECK-NEXT: li r3, 192 ; CHECK-NEXT: blr entry: %a = icmp slt i32 %P, 0 @@ -262,14 +263,14 @@ return: define i32 @any_bits_clear_branch(i32 %P, i32 %Q) { ; CHECK-LABEL: any_bits_clear_branch: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: and 3, 3, 4 -; CHECK-NEXT: cmpwi 3, -1 -; CHECK-NEXT: beq 0, .LBB14_2 +; CHECK-NEXT: and r3, r3, r4 +; CHECK-NEXT: cmpwi r3, -1 +; CHECK-NEXT: beq cr0, .LBB14_2 ; CHECK-NEXT: # %bb.1: # %bb1 -; CHECK-NEXT: li 3, 4 +; CHECK-NEXT: li r3, 4 ; CHECK-NEXT: blr ; CHECK-NEXT: .LBB14_2: # %return -; CHECK-NEXT: li 3, 192 +; CHECK-NEXT: li r3, 192 ; CHECK-NEXT: blr entry: %a = icmp ne i32 %P, -1 @@ -287,14 +288,14 @@ return: define i32 @any_sign_bits_clear_branch(i32 %P, i32 %Q) { ; CHECK-LABEL: any_sign_bits_clear_branch: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: and 3, 3, 4 -; CHECK-NEXT: cmpwi 3, 0 -; CHECK-NEXT: blt 0, .LBB15_2 +; CHECK-NEXT: and r3, r3, r4 +; CHECK-NEXT: cmpwi r3, 0 +; CHECK-NEXT: blt cr0, .LBB15_2 ; CHECK-NEXT: # %bb.1: # %bb1 -; CHECK-NEXT: li 3, 4 +; CHECK-NEXT: li r3, 4 ; CHECK-NEXT: blr ; CHECK-NEXT: .LBB15_2: # %return -; CHECK-NEXT: li 3, 192 +; CHECK-NEXT: li r3, 192 ; CHECK-NEXT: blr entry: %a = icmp sgt i32 %P, -1 @@ -312,9 +313,9 @@ return: define <4 x i1> @all_bits_clear_vec(<4 x i32> %P, <4 x i32> %Q) { ; CHECK-LABEL: all_bits_clear_vec: ; CHECK: # %bb.0: -; CHECK-NEXT: xxlor 34, 34, 35 -; CHECK-NEXT: xxlxor 35, 35, 35 -; CHECK-NEXT: vcmpequw 2, 2, 3 +; CHECK-NEXT: xxlor v2, v2, v3 +; CHECK-NEXT: xxlxor v3, v3, v3 +; CHECK-NEXT: vcmpequw v2, v2, v3 ; CHECK-NEXT: blr %a = icmp eq <4 x i32> %P, zeroinitializer %b = icmp eq <4 x i32> %Q, zeroinitializer @@ -325,9 +326,9 @@ define <4 x i1> @all_bits_clear_vec(<4 x i32> %P, <4 x i32> %Q) { define <4 x i1> @all_sign_bits_clear_vec(<4 x i32> %P, <4 x i32> %Q) { ; CHECK-LABEL: all_sign_bits_clear_vec: ; CHECK: # %bb.0: -; CHECK-NEXT: xxlor 34, 34, 35 -; CHECK-NEXT: xxleqv 35, 35, 35 -; CHECK-NEXT: vcmpgtsw 2, 2, 3 +; CHECK-NEXT: xxlor v2, v2, v3 +; CHECK-NEXT: xxleqv v3, v3, v3 +; CHECK-NEXT: vcmpgtsw v2, v2, v3 ; CHECK-NEXT: blr %a = icmp sgt <4 x i32> %P, %b = icmp sgt <4 x i32> %Q, @@ -338,9 +339,9 @@ define <4 x i1> @all_sign_bits_clear_vec(<4 x i32> %P, <4 x i32> %Q) { define <4 x i1> @all_bits_set_vec(<4 x i32> %P, <4 x i32> %Q) { ; CHECK-LABEL: all_bits_set_vec: ; CHECK: # %bb.0: -; CHECK-NEXT: xxland 34, 34, 35 -; CHECK-NEXT: xxleqv 35, 35, 35 -; CHECK-NEXT: vcmpequw 2, 2, 3 +; CHECK-NEXT: xxland v2, v2, v3 +; CHECK-NEXT: xxleqv v3, v3, v3 +; CHECK-NEXT: vcmpequw v2, v2, v3 ; CHECK-NEXT: blr %a = icmp eq <4 x i32> %P, %b = icmp eq <4 x i32> %Q, @@ -351,9 +352,9 @@ define <4 x i1> @all_bits_set_vec(<4 x i32> %P, <4 x i32> %Q) { define <4 x i1> @all_sign_bits_set_vec(<4 x i32> %P, <4 x i32> %Q) { ; CHECK-LABEL: all_sign_bits_set_vec: ; CHECK: # %bb.0: -; CHECK-NEXT: xxland 34, 34, 35 -; CHECK-NEXT: xxlxor 35, 35, 35 -; CHECK-NEXT: vcmpgtsw 2, 3, 2 +; CHECK-NEXT: xxland v2, v2, v3 +; CHECK-NEXT: xxlxor v3, v3, v3 +; CHECK-NEXT: vcmpgtsw v2, v3, v2 ; CHECK-NEXT: blr %a = icmp slt <4 x i32> %P, zeroinitializer %b = icmp slt <4 x i32> %Q, zeroinitializer @@ -364,10 +365,10 @@ define <4 x i1> @all_sign_bits_set_vec(<4 x i32> %P, <4 x i32> %Q) { define <4 x i1> @any_bits_set_vec(<4 x i32> %P, <4 x i32> %Q) { ; CHECK-LABEL: any_bits_set_vec: ; CHECK: # %bb.0: -; CHECK-NEXT: xxlor 34, 34, 35 -; CHECK-NEXT: xxlxor 35, 35, 35 -; CHECK-NEXT: vcmpequw 2, 2, 3 -; CHECK-NEXT: xxlnor 34, 34, 34 +; CHECK-NEXT: xxlor v2, v2, v3 +; CHECK-NEXT: xxlxor v3, v3, v3 +; CHECK-NEXT: vcmpequw v2, v2, v3 +; CHECK-NEXT: xxlnor v2, v2, v2 ; CHECK-NEXT: blr %a = icmp ne <4 x i32> %P, zeroinitializer %b = icmp ne <4 x i32> %Q, zeroinitializer @@ -378,9 +379,9 @@ define <4 x i1> @any_bits_set_vec(<4 x i32> %P, <4 x i32> %Q) { define <4 x i1> @any_sign_bits_set_vec(<4 x i32> %P, <4 x i32> %Q) { ; CHECK-LABEL: any_sign_bits_set_vec: ; CHECK: # %bb.0: -; CHECK-NEXT: xxlor 34, 34, 35 -; CHECK-NEXT: xxlxor 35, 35, 35 -; CHECK-NEXT: vcmpgtsw 2, 3, 2 +; CHECK-NEXT: xxlor v2, v2, v3 +; CHECK-NEXT: xxlxor v3, v3, v3 +; CHECK-NEXT: vcmpgtsw v2, v3, v2 ; CHECK-NEXT: blr %a = icmp slt <4 x i32> %P, zeroinitializer %b = icmp slt <4 x i32> %Q, zeroinitializer @@ -391,10 +392,10 @@ define <4 x i1> @any_sign_bits_set_vec(<4 x i32> %P, <4 x i32> %Q) { define <4 x i1> @any_bits_clear_vec(<4 x i32> %P, <4 x i32> %Q) { ; CHECK-LABEL: any_bits_clear_vec: ; CHECK: # %bb.0: -; CHECK-NEXT: xxland 34, 34, 35 -; CHECK-NEXT: xxleqv 35, 35, 35 -; CHECK-NEXT: vcmpequw 2, 2, 3 -; CHECK-NEXT: xxlnor 34, 34, 34 +; CHECK-NEXT: xxland v2, v2, v3 +; CHECK-NEXT: xxleqv v3, v3, v3 +; CHECK-NEXT: vcmpequw v2, v2, v3 +; CHECK-NEXT: xxlnor v2, v2, v2 ; CHECK-NEXT: blr %a = icmp ne <4 x i32> %P, %b = icmp ne <4 x i32> %Q, @@ -405,9 +406,9 @@ define <4 x i1> @any_bits_clear_vec(<4 x i32> %P, <4 x i32> %Q) { define <4 x i1> @any_sign_bits_clear_vec(<4 x i32> %P, <4 x i32> %Q) { ; CHECK-LABEL: any_sign_bits_clear_vec: ; CHECK: # %bb.0: -; CHECK-NEXT: xxland 34, 34, 35 -; CHECK-NEXT: xxleqv 35, 35, 35 -; CHECK-NEXT: vcmpgtsw 2, 2, 3 +; CHECK-NEXT: xxland v2, v2, v3 +; CHECK-NEXT: xxleqv v3, v3, v3 +; CHECK-NEXT: vcmpgtsw v2, v2, v3 ; CHECK-NEXT: blr %a = icmp sgt <4 x i32> %P, %b = icmp sgt <4 x i32> %Q, @@ -418,11 +419,11 @@ define <4 x i1> @any_sign_bits_clear_vec(<4 x i32> %P, <4 x i32> %Q) { define zeroext i1 @ne_neg1_and_ne_zero(i64 %x) { ; CHECK-LABEL: ne_neg1_and_ne_zero: ; CHECK: # %bb.0: -; CHECK-NEXT: addi 3, 3, 1 -; CHECK-NEXT: li 4, 1 -; CHECK-NEXT: subfic 3, 3, 1 -; CHECK-NEXT: subfe 3, 4, 4 -; CHECK-NEXT: neg 3, 3 +; CHECK-NEXT: addi r3, r3, 1 +; CHECK-NEXT: li r4, 1 +; CHECK-NEXT: subfic r3, r3, 1 +; CHECK-NEXT: subfe r3, r4, r4 +; CHECK-NEXT: neg r3, r3 ; CHECK-NEXT: blr %cmp1 = icmp ne i64 %x, -1 %cmp2 = icmp ne i64 %x, 0 @@ -435,11 +436,11 @@ define zeroext i1 @ne_neg1_and_ne_zero(i64 %x) { define zeroext i1 @and_eq(i16 zeroext %a, i16 zeroext %b, i16 zeroext %c, i16 zeroext %d) { ; CHECK-LABEL: and_eq: ; CHECK: # %bb.0: -; CHECK-NEXT: xor 3, 3, 4 -; CHECK-NEXT: xor 4, 5, 6 -; CHECK-NEXT: or 3, 3, 4 -; CHECK-NEXT: cntlzw 3, 3 -; CHECK-NEXT: srwi 3, 3, 5 +; CHECK-NEXT: xor r3, r3, r4 +; CHECK-NEXT: xor r4, r5, r6 +; CHECK-NEXT: or r3, r3, r4 +; CHECK-NEXT: cntlzw r3, r3 +; CHECK-NEXT: srwi r3, r3, 5 ; CHECK-NEXT: blr %cmp1 = icmp eq i16 %a, %b %cmp2 = icmp eq i16 %c, %d @@ -450,12 +451,12 @@ define zeroext i1 @and_eq(i16 zeroext %a, i16 zeroext %b, i16 zeroext %c, i16 z define zeroext i1 @or_ne(i32 %a, i32 %b, i32 %c, i32 %d) { ; CHECK-LABEL: or_ne: ; CHECK: # %bb.0: -; CHECK-NEXT: xor 3, 3, 4 -; CHECK-NEXT: xor 4, 5, 6 -; CHECK-NEXT: or 3, 3, 4 -; CHECK-NEXT: cntlzw 3, 3 -; CHECK-NEXT: srwi 3, 3, 5 -; CHECK-NEXT: xori 3, 3, 1 +; CHECK-NEXT: xor r3, r3, r4 +; CHECK-NEXT: xor r4, r5, r6 +; CHECK-NEXT: or r3, r3, r4 +; CHECK-NEXT: cntlzw r3, r3 +; CHECK-NEXT: srwi r3, r3, 5 +; CHECK-NEXT: xori r3, r3, 1 ; CHECK-NEXT: blr %cmp1 = icmp ne i32 %a, %b %cmp2 = icmp ne i32 %c, %d @@ -468,9 +469,9 @@ define zeroext i1 @or_ne(i32 %a, i32 %b, i32 %c, i32 %d) { define <4 x i1> @and_eq_vec(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c, <4 x i32> %d) { ; CHECK-LABEL: and_eq_vec: ; CHECK: # %bb.0: -; CHECK-NEXT: vcmpequw 2, 2, 3 -; CHECK-NEXT: vcmpequw 3, 4, 5 -; CHECK-NEXT: xxland 34, 34, 35 +; CHECK-NEXT: vcmpequw v2, v2, v3 +; CHECK-NEXT: vcmpequw v3, v4, v5 +; CHECK-NEXT: xxland v2, v2, v3 ; CHECK-NEXT: blr %cmp1 = icmp eq <4 x i32> %a, %b %cmp2 = icmp eq <4 x i32> %c, %d @@ -481,11 +482,11 @@ define <4 x i1> @and_eq_vec(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c, <4 x i32> define i1 @or_icmps_const_1bit_diff(i64 %x) { ; CHECK-LABEL: or_icmps_const_1bit_diff: ; CHECK: # %bb.0: -; CHECK-NEXT: addi 3, 3, -13 -; CHECK-NEXT: rldicl 3, 3, 61, 1 -; CHECK-NEXT: rotldi 3, 3, 3 -; CHECK-NEXT: cntlzd 3, 3 -; CHECK-NEXT: rldicl 3, 3, 58, 63 +; CHECK-NEXT: addi r3, r3, -13 +; CHECK-NEXT: rldicl r3, r3, 61, 1 +; CHECK-NEXT: rotldi r3, r3, 3 +; CHECK-NEXT: cntlzd r3, r3 +; CHECK-NEXT: rldicl r3, r3, 58, 63 ; CHECK-NEXT: blr %a = icmp eq i64 %x, 17 %b = icmp eq i64 %x, 13 @@ -496,11 +497,11 @@ define i1 @or_icmps_const_1bit_diff(i64 %x) { define i1 @and_icmps_const_1bit_diff(i32 %x) { ; CHECK-LABEL: and_icmps_const_1bit_diff: ; CHECK: # %bb.0: -; CHECK-NEXT: addi 3, 3, -4625 -; CHECK-NEXT: rlwinm 3, 3, 0, 28, 26 -; CHECK-NEXT: cntlzw 3, 3 -; CHECK-NEXT: not 3, 3 -; CHECK-NEXT: rlwinm 3, 3, 27, 31, 31 +; CHECK-NEXT: addi r3, r3, -4625 +; CHECK-NEXT: rlwinm r3, r3, 0, 28, 26 +; CHECK-NEXT: cntlzw r3, r3 +; CHECK-NEXT: not r3, r3 +; CHECK-NEXT: rlwinm r3, r3, 27, 31, 31 ; CHECK-NEXT: blr %a = icmp ne i32 %x, 4625 %b = icmp ne i32 %x, 4641 diff --git a/llvm/test/CodeGen/PowerPC/vector-popcnt-128-ult-ugt.ll b/llvm/test/CodeGen/PowerPC/vector-popcnt-128-ult-ugt.ll index 43cbc62e0bb1c..56382092dc8ee 100644 --- a/llvm/test/CodeGen/PowerPC/vector-popcnt-128-ult-ugt.ll +++ b/llvm/test/CodeGen/PowerPC/vector-popcnt-128-ult-ugt.ll @@ -1,54 +1,58 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr5 < %s | FileCheck %s --check-prefix=PWR5 -; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr6 < %s | FileCheck %s --check-prefix=PWR6 -; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 < %s | FileCheck %s --check-prefix=PWR7 -; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s --check-prefix=PWR8 -; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr9 < %s | FileCheck %s --check-prefix=PWR9 - +; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr5 \ +; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | FileCheck %s --check-prefix=PWR5 +; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr6 \ +; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | FileCheck %s --check-prefix=PWR6 +; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 \ +; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | FileCheck %s --check-prefix=PWR7 +; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 \ +; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | FileCheck %s --check-prefix=PWR8 +; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr9 \ +; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | FileCheck %s --check-prefix=PWR9 define <16 x i8> @ugt_1_v16i8(<16 x i8> %0) { ; PWR5-LABEL: ugt_1_v16i8: ; PWR5: # %bb.0: -; PWR5-NEXT: vspltisb 3, -1 -; PWR5-NEXT: vaddubm 3, 2, 3 -; PWR5-NEXT: vand 2, 2, 3 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: vcmpequb 2, 2, 3 -; PWR5-NEXT: vnot 2, 2 +; PWR5-NEXT: vspltisb v3, -1 +; PWR5-NEXT: vaddubm v3, v2, v3 +; PWR5-NEXT: vand v2, v2, v3 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: vcmpequb v2, v2, v3 +; PWR5-NEXT: vnot v2, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_1_v16i8: ; PWR6: # %bb.0: -; PWR6-NEXT: vspltisb 3, -1 -; PWR6-NEXT: vaddubm 3, 2, 3 -; PWR6-NEXT: vand 2, 2, 3 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: vcmpequb 2, 2, 3 -; PWR6-NEXT: vnot 2, 2 +; PWR6-NEXT: vspltisb v3, -1 +; PWR6-NEXT: vaddubm v3, v2, v3 +; PWR6-NEXT: vand v2, v2, v3 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: vcmpequb v2, v2, v3 +; PWR6-NEXT: vnot v2, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_1_v16i8: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisb 3, -1 -; PWR7-NEXT: vaddubm 3, 2, 3 -; PWR7-NEXT: xxland 34, 34, 35 -; PWR7-NEXT: xxlxor 35, 35, 35 -; PWR7-NEXT: vcmpequb 2, 2, 3 -; PWR7-NEXT: xxlnor 34, 34, 34 +; PWR7-NEXT: vspltisb v3, -1 +; PWR7-NEXT: vaddubm v3, v2, v3 +; PWR7-NEXT: xxland v2, v2, v3 +; PWR7-NEXT: xxlxor v3, v3, v3 +; PWR7-NEXT: vcmpequb v2, v2, v3 +; PWR7-NEXT: xxlnor v2, v2, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_1_v16i8: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisb 3, 1 -; PWR8-NEXT: vpopcntb 2, 2 -; PWR8-NEXT: vcmpgtub 2, 2, 3 +; PWR8-NEXT: vspltisb v3, 1 +; PWR8-NEXT: vpopcntb v2, v2 +; PWR8-NEXT: vcmpgtub v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_1_v16i8: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 1 -; PWR9-NEXT: vpopcntb 2, 2 -; PWR9-NEXT: vcmpgtub 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 1 +; PWR9-NEXT: vpopcntb v2, v2 +; PWR9-NEXT: vcmpgtub v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %0) %3 = icmp ugt <16 x i8> %2, @@ -59,43 +63,43 @@ define <16 x i8> @ugt_1_v16i8(<16 x i8> %0) { define <16 x i8> @ult_2_v16i8(<16 x i8> %0) { ; PWR5-LABEL: ult_2_v16i8: ; PWR5: # %bb.0: -; PWR5-NEXT: vspltisb 3, -1 -; PWR5-NEXT: vaddubm 3, 2, 3 -; PWR5-NEXT: vand 2, 2, 3 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: vcmpequb 2, 2, 3 +; PWR5-NEXT: vspltisb v3, -1 +; PWR5-NEXT: vaddubm v3, v2, v3 +; PWR5-NEXT: vand v2, v2, v3 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: vcmpequb v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_2_v16i8: ; PWR6: # %bb.0: -; PWR6-NEXT: vspltisb 3, -1 -; PWR6-NEXT: vaddubm 3, 2, 3 -; PWR6-NEXT: vand 2, 2, 3 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: vcmpequb 2, 2, 3 +; PWR6-NEXT: vspltisb v3, -1 +; PWR6-NEXT: vaddubm v3, v2, v3 +; PWR6-NEXT: vand v2, v2, v3 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: vcmpequb v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_2_v16i8: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisb 3, -1 -; PWR7-NEXT: vaddubm 3, 2, 3 -; PWR7-NEXT: xxland 34, 34, 35 -; PWR7-NEXT: xxlxor 35, 35, 35 -; PWR7-NEXT: vcmpequb 2, 2, 3 +; PWR7-NEXT: vspltisb v3, -1 +; PWR7-NEXT: vaddubm v3, v2, v3 +; PWR7-NEXT: xxland v2, v2, v3 +; PWR7-NEXT: xxlxor v3, v3, v3 +; PWR7-NEXT: vcmpequb v2, v2, v3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_2_v16i8: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisb 3, 2 -; PWR8-NEXT: vpopcntb 2, 2 -; PWR8-NEXT: vcmpgtub 2, 3, 2 +; PWR8-NEXT: vspltisb v3, 2 +; PWR8-NEXT: vpopcntb v2, v2 +; PWR8-NEXT: vcmpgtub v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_2_v16i8: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 2 -; PWR9-NEXT: vpopcntb 2, 2 -; PWR9-NEXT: vcmpgtub 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 2 +; PWR9-NEXT: vpopcntb v2, v2 +; PWR9-NEXT: vcmpgtub v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %0) %3 = icmp ult <16 x i8> %2, @@ -106,91 +110,91 @@ define <16 x i8> @ult_2_v16i8(<16 x i8> %0) { define <16 x i8> @ugt_2_v16i8(<16 x i8> %0) { ; PWR5-LABEL: ugt_2_v16i8: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI2_0@toc@ha -; PWR5-NEXT: vspltisb 3, 1 -; PWR5-NEXT: addi 3, 3, .LCPI2_0@toc@l -; PWR5-NEXT: vsrb 3, 2, 3 -; PWR5-NEXT: lvx 4, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI2_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI2_1@toc@l -; PWR5-NEXT: vspltisb 5, 2 -; PWR5-NEXT: vand 3, 3, 4 -; PWR5-NEXT: lvx 4, 0, 3 -; PWR5-NEXT: vsububm 2, 2, 3 -; PWR5-NEXT: vand 3, 2, 4 -; PWR5-NEXT: vsrb 2, 2, 5 -; PWR5-NEXT: vand 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 4 -; PWR5-NEXT: vaddubm 2, 3, 2 -; PWR5-NEXT: vsrb 3, 2, 4 -; PWR5-NEXT: vspltisb 4, 15 -; PWR5-NEXT: vaddubm 2, 2, 3 -; PWR5-NEXT: vand 2, 2, 4 -; PWR5-NEXT: vcmpgtub 2, 2, 5 +; PWR5-NEXT: addis r3, r2, .LCPI2_0@toc@ha +; PWR5-NEXT: vspltisb v3, 1 +; PWR5-NEXT: addi r3, r3, .LCPI2_0@toc@l +; PWR5-NEXT: vsrb v3, v2, v3 +; PWR5-NEXT: lvx v4, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI2_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI2_1@toc@l +; PWR5-NEXT: vspltisb v5, 2 +; PWR5-NEXT: vand v3, v3, v4 +; PWR5-NEXT: lvx v4, 0, r3 +; PWR5-NEXT: vsububm v2, v2, v3 +; PWR5-NEXT: vand v3, v2, v4 +; PWR5-NEXT: vsrb v2, v2, v5 +; PWR5-NEXT: vand v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 4 +; PWR5-NEXT: vaddubm v2, v3, v2 +; PWR5-NEXT: vsrb v3, v2, v4 +; PWR5-NEXT: vspltisb v4, 15 +; PWR5-NEXT: vaddubm v2, v2, v3 +; PWR5-NEXT: vand v2, v2, v4 +; PWR5-NEXT: vcmpgtub v2, v2, v5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_2_v16i8: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI2_0@toc@ha -; PWR6-NEXT: vspltisb 3, 1 -; PWR6-NEXT: addi 3, 3, .LCPI2_0@toc@l -; PWR6-NEXT: vsrb 3, 2, 3 -; PWR6-NEXT: lvx 4, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI2_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI2_1@toc@l -; PWR6-NEXT: vspltisb 5, 2 -; PWR6-NEXT: vand 3, 3, 4 -; PWR6-NEXT: lvx 4, 0, 3 -; PWR6-NEXT: vsububm 2, 2, 3 -; PWR6-NEXT: vand 3, 2, 4 -; PWR6-NEXT: vsrb 2, 2, 5 -; PWR6-NEXT: vand 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 4 -; PWR6-NEXT: vaddubm 2, 3, 2 -; PWR6-NEXT: vsrb 3, 2, 4 -; PWR6-NEXT: vspltisb 4, 15 -; PWR6-NEXT: vaddubm 2, 2, 3 -; PWR6-NEXT: vand 2, 2, 4 -; PWR6-NEXT: vcmpgtub 2, 2, 5 +; PWR6-NEXT: addis r3, r2, .LCPI2_0@toc@ha +; PWR6-NEXT: vspltisb v3, 1 +; PWR6-NEXT: addi r3, r3, .LCPI2_0@toc@l +; PWR6-NEXT: vsrb v3, v2, v3 +; PWR6-NEXT: lvx v4, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI2_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI2_1@toc@l +; PWR6-NEXT: vspltisb v5, 2 +; PWR6-NEXT: vand v3, v3, v4 +; PWR6-NEXT: lvx v4, 0, r3 +; PWR6-NEXT: vsububm v2, v2, v3 +; PWR6-NEXT: vand v3, v2, v4 +; PWR6-NEXT: vsrb v2, v2, v5 +; PWR6-NEXT: vand v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 4 +; PWR6-NEXT: vaddubm v2, v3, v2 +; PWR6-NEXT: vsrb v3, v2, v4 +; PWR6-NEXT: vspltisb v4, 15 +; PWR6-NEXT: vaddubm v2, v2, v3 +; PWR6-NEXT: vand v2, v2, v4 +; PWR6-NEXT: vcmpgtub v2, v2, v5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_2_v16i8: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisb 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI2_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI2_0@toc@l -; PWR7-NEXT: vspltisb 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI2_1@toc@ha -; PWR7-NEXT: vspltisb 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI2_1@toc@l -; PWR7-NEXT: vsrb 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsububm 2, 2, 3 -; PWR7-NEXT: xxland 35, 34, 0 -; PWR7-NEXT: vsrb 2, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: vaddubm 2, 3, 2 -; PWR7-NEXT: vsrb 3, 2, 5 -; PWR7-NEXT: vaddubm 2, 2, 3 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vcmpgtub 2, 2, 4 +; PWR7-NEXT: vspltisb v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI2_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI2_0@toc@l +; PWR7-NEXT: vspltisb v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI2_1@toc@ha +; PWR7-NEXT: vspltisb v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI2_1@toc@l +; PWR7-NEXT: vsrb v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsububm v2, v2, v3 +; PWR7-NEXT: xxland v3, v2, vs0 +; PWR7-NEXT: vsrb v2, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: vaddubm v2, v3, v2 +; PWR7-NEXT: vsrb v3, v2, v5 +; PWR7-NEXT: vaddubm v2, v2, v3 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vcmpgtub v2, v2, v4 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_2_v16i8: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisb 3, 2 -; PWR8-NEXT: vpopcntb 2, 2 -; PWR8-NEXT: vcmpgtub 2, 2, 3 +; PWR8-NEXT: vspltisb v3, 2 +; PWR8-NEXT: vpopcntb v2, v2 +; PWR8-NEXT: vcmpgtub v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_2_v16i8: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 2 -; PWR9-NEXT: vpopcntb 2, 2 -; PWR9-NEXT: vcmpgtub 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 2 +; PWR9-NEXT: vpopcntb v2, v2 +; PWR9-NEXT: vcmpgtub v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %0) %3 = icmp ugt <16 x i8> %2, @@ -201,94 +205,94 @@ define <16 x i8> @ugt_2_v16i8(<16 x i8> %0) { define <16 x i8> @ult_3_v16i8(<16 x i8> %0) { ; PWR5-LABEL: ult_3_v16i8: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI3_0@toc@ha -; PWR5-NEXT: vspltisb 3, 1 -; PWR5-NEXT: addi 3, 3, .LCPI3_0@toc@l -; PWR5-NEXT: vsrb 3, 2, 3 -; PWR5-NEXT: lvx 4, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI3_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI3_1@toc@l -; PWR5-NEXT: vspltisb 5, 2 -; PWR5-NEXT: vand 3, 3, 4 -; PWR5-NEXT: lvx 4, 0, 3 -; PWR5-NEXT: vsububm 2, 2, 3 -; PWR5-NEXT: vand 3, 2, 4 -; PWR5-NEXT: vsrb 2, 2, 5 -; PWR5-NEXT: vand 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 4 -; PWR5-NEXT: vaddubm 2, 3, 2 -; PWR5-NEXT: vsrb 3, 2, 4 -; PWR5-NEXT: vspltisb 4, 15 -; PWR5-NEXT: vaddubm 2, 2, 3 -; PWR5-NEXT: vspltisb 3, 3 -; PWR5-NEXT: vand 2, 2, 4 -; PWR5-NEXT: vcmpgtub 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI3_0@toc@ha +; PWR5-NEXT: vspltisb v3, 1 +; PWR5-NEXT: addi r3, r3, .LCPI3_0@toc@l +; PWR5-NEXT: vsrb v3, v2, v3 +; PWR5-NEXT: lvx v4, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI3_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI3_1@toc@l +; PWR5-NEXT: vspltisb v5, 2 +; PWR5-NEXT: vand v3, v3, v4 +; PWR5-NEXT: lvx v4, 0, r3 +; PWR5-NEXT: vsububm v2, v2, v3 +; PWR5-NEXT: vand v3, v2, v4 +; PWR5-NEXT: vsrb v2, v2, v5 +; PWR5-NEXT: vand v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 4 +; PWR5-NEXT: vaddubm v2, v3, v2 +; PWR5-NEXT: vsrb v3, v2, v4 +; PWR5-NEXT: vspltisb v4, 15 +; PWR5-NEXT: vaddubm v2, v2, v3 +; PWR5-NEXT: vspltisb v3, 3 +; PWR5-NEXT: vand v2, v2, v4 +; PWR5-NEXT: vcmpgtub v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_3_v16i8: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI3_0@toc@ha -; PWR6-NEXT: vspltisb 3, 1 -; PWR6-NEXT: addi 3, 3, .LCPI3_0@toc@l -; PWR6-NEXT: vsrb 3, 2, 3 -; PWR6-NEXT: lvx 4, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI3_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI3_1@toc@l -; PWR6-NEXT: vspltisb 5, 2 -; PWR6-NEXT: vand 3, 3, 4 -; PWR6-NEXT: lvx 4, 0, 3 -; PWR6-NEXT: vsububm 2, 2, 3 -; PWR6-NEXT: vand 3, 2, 4 -; PWR6-NEXT: vsrb 2, 2, 5 -; PWR6-NEXT: vand 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 4 -; PWR6-NEXT: vaddubm 2, 3, 2 -; PWR6-NEXT: vsrb 3, 2, 4 -; PWR6-NEXT: vspltisb 4, 15 -; PWR6-NEXT: vaddubm 2, 2, 3 -; PWR6-NEXT: vspltisb 3, 3 -; PWR6-NEXT: vand 2, 2, 4 -; PWR6-NEXT: vcmpgtub 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI3_0@toc@ha +; PWR6-NEXT: vspltisb v3, 1 +; PWR6-NEXT: addi r3, r3, .LCPI3_0@toc@l +; PWR6-NEXT: vsrb v3, v2, v3 +; PWR6-NEXT: lvx v4, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI3_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI3_1@toc@l +; PWR6-NEXT: vspltisb v5, 2 +; PWR6-NEXT: vand v3, v3, v4 +; PWR6-NEXT: lvx v4, 0, r3 +; PWR6-NEXT: vsububm v2, v2, v3 +; PWR6-NEXT: vand v3, v2, v4 +; PWR6-NEXT: vsrb v2, v2, v5 +; PWR6-NEXT: vand v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 4 +; PWR6-NEXT: vaddubm v2, v3, v2 +; PWR6-NEXT: vsrb v3, v2, v4 +; PWR6-NEXT: vspltisb v4, 15 +; PWR6-NEXT: vaddubm v2, v2, v3 +; PWR6-NEXT: vspltisb v3, 3 +; PWR6-NEXT: vand v2, v2, v4 +; PWR6-NEXT: vcmpgtub v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_3_v16i8: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisb 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI3_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI3_0@toc@l -; PWR7-NEXT: vspltisb 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI3_1@toc@ha -; PWR7-NEXT: vspltisb 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI3_1@toc@l -; PWR7-NEXT: vsrb 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 3 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsububm 2, 2, 3 -; PWR7-NEXT: vsrb 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vaddubm 2, 2, 3 -; PWR7-NEXT: vsrb 3, 2, 5 -; PWR7-NEXT: vaddubm 2, 2, 3 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vcmpgtub 2, 1, 2 +; PWR7-NEXT: vspltisb v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI3_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI3_0@toc@l +; PWR7-NEXT: vspltisb v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI3_1@toc@ha +; PWR7-NEXT: vspltisb v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI3_1@toc@l +; PWR7-NEXT: vsrb v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 3 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsububm v2, v2, v3 +; PWR7-NEXT: vsrb v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vaddubm v2, v2, v3 +; PWR7-NEXT: vsrb v3, v2, v5 +; PWR7-NEXT: vaddubm v2, v2, v3 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vcmpgtub v2, v1, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_3_v16i8: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisb 3, 3 -; PWR8-NEXT: vpopcntb 2, 2 -; PWR8-NEXT: vcmpgtub 2, 3, 2 +; PWR8-NEXT: vspltisb v3, 3 +; PWR8-NEXT: vpopcntb v2, v2 +; PWR8-NEXT: vcmpgtub v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_3_v16i8: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 3 -; PWR9-NEXT: vpopcntb 2, 2 -; PWR9-NEXT: vcmpgtub 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 3 +; PWR9-NEXT: vpopcntb v2, v2 +; PWR9-NEXT: vcmpgtub v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %0) %3 = icmp ult <16 x i8> %2, @@ -299,94 +303,94 @@ define <16 x i8> @ult_3_v16i8(<16 x i8> %0) { define <16 x i8> @ugt_3_v16i8(<16 x i8> %0) { ; PWR5-LABEL: ugt_3_v16i8: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI4_0@toc@ha -; PWR5-NEXT: vspltisb 3, 1 -; PWR5-NEXT: addi 3, 3, .LCPI4_0@toc@l -; PWR5-NEXT: vsrb 3, 2, 3 -; PWR5-NEXT: lvx 4, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI4_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI4_1@toc@l -; PWR5-NEXT: vspltisb 5, 2 -; PWR5-NEXT: vand 3, 3, 4 -; PWR5-NEXT: lvx 4, 0, 3 -; PWR5-NEXT: vsububm 2, 2, 3 -; PWR5-NEXT: vand 3, 2, 4 -; PWR5-NEXT: vsrb 2, 2, 5 -; PWR5-NEXT: vand 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 4 -; PWR5-NEXT: vaddubm 2, 3, 2 -; PWR5-NEXT: vsrb 3, 2, 4 -; PWR5-NEXT: vspltisb 4, 15 -; PWR5-NEXT: vaddubm 2, 2, 3 -; PWR5-NEXT: vspltisb 3, 3 -; PWR5-NEXT: vand 2, 2, 4 -; PWR5-NEXT: vcmpgtub 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI4_0@toc@ha +; PWR5-NEXT: vspltisb v3, 1 +; PWR5-NEXT: addi r3, r3, .LCPI4_0@toc@l +; PWR5-NEXT: vsrb v3, v2, v3 +; PWR5-NEXT: lvx v4, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI4_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI4_1@toc@l +; PWR5-NEXT: vspltisb v5, 2 +; PWR5-NEXT: vand v3, v3, v4 +; PWR5-NEXT: lvx v4, 0, r3 +; PWR5-NEXT: vsububm v2, v2, v3 +; PWR5-NEXT: vand v3, v2, v4 +; PWR5-NEXT: vsrb v2, v2, v5 +; PWR5-NEXT: vand v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 4 +; PWR5-NEXT: vaddubm v2, v3, v2 +; PWR5-NEXT: vsrb v3, v2, v4 +; PWR5-NEXT: vspltisb v4, 15 +; PWR5-NEXT: vaddubm v2, v2, v3 +; PWR5-NEXT: vspltisb v3, 3 +; PWR5-NEXT: vand v2, v2, v4 +; PWR5-NEXT: vcmpgtub v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_3_v16i8: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI4_0@toc@ha -; PWR6-NEXT: vspltisb 3, 1 -; PWR6-NEXT: addi 3, 3, .LCPI4_0@toc@l -; PWR6-NEXT: vsrb 3, 2, 3 -; PWR6-NEXT: lvx 4, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI4_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI4_1@toc@l -; PWR6-NEXT: vspltisb 5, 2 -; PWR6-NEXT: vand 3, 3, 4 -; PWR6-NEXT: lvx 4, 0, 3 -; PWR6-NEXT: vsububm 2, 2, 3 -; PWR6-NEXT: vand 3, 2, 4 -; PWR6-NEXT: vsrb 2, 2, 5 -; PWR6-NEXT: vand 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 4 -; PWR6-NEXT: vaddubm 2, 3, 2 -; PWR6-NEXT: vsrb 3, 2, 4 -; PWR6-NEXT: vspltisb 4, 15 -; PWR6-NEXT: vaddubm 2, 2, 3 -; PWR6-NEXT: vspltisb 3, 3 -; PWR6-NEXT: vand 2, 2, 4 -; PWR6-NEXT: vcmpgtub 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI4_0@toc@ha +; PWR6-NEXT: vspltisb v3, 1 +; PWR6-NEXT: addi r3, r3, .LCPI4_0@toc@l +; PWR6-NEXT: vsrb v3, v2, v3 +; PWR6-NEXT: lvx v4, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI4_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI4_1@toc@l +; PWR6-NEXT: vspltisb v5, 2 +; PWR6-NEXT: vand v3, v3, v4 +; PWR6-NEXT: lvx v4, 0, r3 +; PWR6-NEXT: vsububm v2, v2, v3 +; PWR6-NEXT: vand v3, v2, v4 +; PWR6-NEXT: vsrb v2, v2, v5 +; PWR6-NEXT: vand v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 4 +; PWR6-NEXT: vaddubm v2, v3, v2 +; PWR6-NEXT: vsrb v3, v2, v4 +; PWR6-NEXT: vspltisb v4, 15 +; PWR6-NEXT: vaddubm v2, v2, v3 +; PWR6-NEXT: vspltisb v3, 3 +; PWR6-NEXT: vand v2, v2, v4 +; PWR6-NEXT: vcmpgtub v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_3_v16i8: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisb 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI4_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI4_0@toc@l -; PWR7-NEXT: vspltisb 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI4_1@toc@ha -; PWR7-NEXT: vspltisb 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI4_1@toc@l -; PWR7-NEXT: vsrb 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 3 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsububm 2, 2, 3 -; PWR7-NEXT: vsrb 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vaddubm 2, 2, 3 -; PWR7-NEXT: vsrb 3, 2, 5 -; PWR7-NEXT: vaddubm 2, 2, 3 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vcmpgtub 2, 2, 1 +; PWR7-NEXT: vspltisb v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI4_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI4_0@toc@l +; PWR7-NEXT: vspltisb v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI4_1@toc@ha +; PWR7-NEXT: vspltisb v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI4_1@toc@l +; PWR7-NEXT: vsrb v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 3 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsububm v2, v2, v3 +; PWR7-NEXT: vsrb v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vaddubm v2, v2, v3 +; PWR7-NEXT: vsrb v3, v2, v5 +; PWR7-NEXT: vaddubm v2, v2, v3 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vcmpgtub v2, v2, v1 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_3_v16i8: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisb 3, 3 -; PWR8-NEXT: vpopcntb 2, 2 -; PWR8-NEXT: vcmpgtub 2, 2, 3 +; PWR8-NEXT: vspltisb v3, 3 +; PWR8-NEXT: vpopcntb v2, v2 +; PWR8-NEXT: vcmpgtub v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_3_v16i8: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 3 -; PWR9-NEXT: vpopcntb 2, 2 -; PWR9-NEXT: vcmpgtub 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 3 +; PWR9-NEXT: vpopcntb v2, v2 +; PWR9-NEXT: vcmpgtub v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %0) %3 = icmp ugt <16 x i8> %2, @@ -397,91 +401,91 @@ define <16 x i8> @ugt_3_v16i8(<16 x i8> %0) { define <16 x i8> @ult_4_v16i8(<16 x i8> %0) { ; PWR5-LABEL: ult_4_v16i8: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI5_0@toc@ha -; PWR5-NEXT: vspltisb 3, 1 -; PWR5-NEXT: addi 3, 3, .LCPI5_0@toc@l -; PWR5-NEXT: vsrb 3, 2, 3 -; PWR5-NEXT: lvx 4, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI5_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI5_1@toc@l -; PWR5-NEXT: vspltisb 5, 2 -; PWR5-NEXT: vand 3, 3, 4 -; PWR5-NEXT: lvx 4, 0, 3 -; PWR5-NEXT: vsububm 2, 2, 3 -; PWR5-NEXT: vand 3, 2, 4 -; PWR5-NEXT: vsrb 2, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vand 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 4 -; PWR5-NEXT: vaddubm 2, 3, 2 -; PWR5-NEXT: vsrb 3, 2, 4 -; PWR5-NEXT: vaddubm 2, 2, 3 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vcmpgtub 2, 4, 2 +; PWR5-NEXT: addis r3, r2, .LCPI5_0@toc@ha +; PWR5-NEXT: vspltisb v3, 1 +; PWR5-NEXT: addi r3, r3, .LCPI5_0@toc@l +; PWR5-NEXT: vsrb v3, v2, v3 +; PWR5-NEXT: lvx v4, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI5_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI5_1@toc@l +; PWR5-NEXT: vspltisb v5, 2 +; PWR5-NEXT: vand v3, v3, v4 +; PWR5-NEXT: lvx v4, 0, r3 +; PWR5-NEXT: vsububm v2, v2, v3 +; PWR5-NEXT: vand v3, v2, v4 +; PWR5-NEXT: vsrb v2, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vand v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 4 +; PWR5-NEXT: vaddubm v2, v3, v2 +; PWR5-NEXT: vsrb v3, v2, v4 +; PWR5-NEXT: vaddubm v2, v2, v3 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vcmpgtub v2, v4, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_4_v16i8: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI5_0@toc@ha -; PWR6-NEXT: vspltisb 3, 1 -; PWR6-NEXT: addi 3, 3, .LCPI5_0@toc@l -; PWR6-NEXT: vsrb 3, 2, 3 -; PWR6-NEXT: lvx 4, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI5_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI5_1@toc@l -; PWR6-NEXT: vspltisb 5, 2 -; PWR6-NEXT: vand 3, 3, 4 -; PWR6-NEXT: lvx 4, 0, 3 -; PWR6-NEXT: vsububm 2, 2, 3 -; PWR6-NEXT: vand 3, 2, 4 -; PWR6-NEXT: vsrb 2, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vand 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 4 -; PWR6-NEXT: vaddubm 2, 3, 2 -; PWR6-NEXT: vsrb 3, 2, 4 -; PWR6-NEXT: vaddubm 2, 2, 3 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vcmpgtub 2, 4, 2 +; PWR6-NEXT: addis r3, r2, .LCPI5_0@toc@ha +; PWR6-NEXT: vspltisb v3, 1 +; PWR6-NEXT: addi r3, r3, .LCPI5_0@toc@l +; PWR6-NEXT: vsrb v3, v2, v3 +; PWR6-NEXT: lvx v4, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI5_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI5_1@toc@l +; PWR6-NEXT: vspltisb v5, 2 +; PWR6-NEXT: vand v3, v3, v4 +; PWR6-NEXT: lvx v4, 0, r3 +; PWR6-NEXT: vsububm v2, v2, v3 +; PWR6-NEXT: vand v3, v2, v4 +; PWR6-NEXT: vsrb v2, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vand v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 4 +; PWR6-NEXT: vaddubm v2, v3, v2 +; PWR6-NEXT: vsrb v3, v2, v4 +; PWR6-NEXT: vaddubm v2, v2, v3 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vcmpgtub v2, v4, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_4_v16i8: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisb 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI5_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI5_0@toc@l -; PWR7-NEXT: vspltisb 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI5_1@toc@ha -; PWR7-NEXT: vspltisb 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI5_1@toc@l -; PWR7-NEXT: vsrb 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsububm 2, 2, 3 -; PWR7-NEXT: vsrb 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vaddubm 2, 2, 3 -; PWR7-NEXT: vsrb 3, 2, 5 -; PWR7-NEXT: vaddubm 2, 2, 3 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vcmpgtub 2, 5, 2 +; PWR7-NEXT: vspltisb v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI5_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI5_0@toc@l +; PWR7-NEXT: vspltisb v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI5_1@toc@ha +; PWR7-NEXT: vspltisb v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI5_1@toc@l +; PWR7-NEXT: vsrb v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsububm v2, v2, v3 +; PWR7-NEXT: vsrb v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vaddubm v2, v2, v3 +; PWR7-NEXT: vsrb v3, v2, v5 +; PWR7-NEXT: vaddubm v2, v2, v3 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vcmpgtub v2, v5, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_4_v16i8: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisb 3, 4 -; PWR8-NEXT: vpopcntb 2, 2 -; PWR8-NEXT: vcmpgtub 2, 3, 2 +; PWR8-NEXT: vspltisb v3, 4 +; PWR8-NEXT: vpopcntb v2, v2 +; PWR8-NEXT: vcmpgtub v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_4_v16i8: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 4 -; PWR9-NEXT: vpopcntb 2, 2 -; PWR9-NEXT: vcmpgtub 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 4 +; PWR9-NEXT: vpopcntb v2, v2 +; PWR9-NEXT: vcmpgtub v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %0) %3 = icmp ult <16 x i8> %2, @@ -492,91 +496,91 @@ define <16 x i8> @ult_4_v16i8(<16 x i8> %0) { define <16 x i8> @ugt_4_v16i8(<16 x i8> %0) { ; PWR5-LABEL: ugt_4_v16i8: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI6_0@toc@ha -; PWR5-NEXT: vspltisb 3, 1 -; PWR5-NEXT: addi 3, 3, .LCPI6_0@toc@l -; PWR5-NEXT: vsrb 3, 2, 3 -; PWR5-NEXT: lvx 4, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI6_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI6_1@toc@l -; PWR5-NEXT: vspltisb 5, 2 -; PWR5-NEXT: vand 3, 3, 4 -; PWR5-NEXT: lvx 4, 0, 3 -; PWR5-NEXT: vsububm 2, 2, 3 -; PWR5-NEXT: vand 3, 2, 4 -; PWR5-NEXT: vsrb 2, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vand 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 4 -; PWR5-NEXT: vaddubm 2, 3, 2 -; PWR5-NEXT: vsrb 3, 2, 4 -; PWR5-NEXT: vaddubm 2, 2, 3 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vcmpgtub 2, 2, 4 +; PWR5-NEXT: addis r3, r2, .LCPI6_0@toc@ha +; PWR5-NEXT: vspltisb v3, 1 +; PWR5-NEXT: addi r3, r3, .LCPI6_0@toc@l +; PWR5-NEXT: vsrb v3, v2, v3 +; PWR5-NEXT: lvx v4, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI6_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI6_1@toc@l +; PWR5-NEXT: vspltisb v5, 2 +; PWR5-NEXT: vand v3, v3, v4 +; PWR5-NEXT: lvx v4, 0, r3 +; PWR5-NEXT: vsububm v2, v2, v3 +; PWR5-NEXT: vand v3, v2, v4 +; PWR5-NEXT: vsrb v2, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vand v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 4 +; PWR5-NEXT: vaddubm v2, v3, v2 +; PWR5-NEXT: vsrb v3, v2, v4 +; PWR5-NEXT: vaddubm v2, v2, v3 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vcmpgtub v2, v2, v4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_4_v16i8: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI6_0@toc@ha -; PWR6-NEXT: vspltisb 3, 1 -; PWR6-NEXT: addi 3, 3, .LCPI6_0@toc@l -; PWR6-NEXT: vsrb 3, 2, 3 -; PWR6-NEXT: lvx 4, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI6_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI6_1@toc@l -; PWR6-NEXT: vspltisb 5, 2 -; PWR6-NEXT: vand 3, 3, 4 -; PWR6-NEXT: lvx 4, 0, 3 -; PWR6-NEXT: vsububm 2, 2, 3 -; PWR6-NEXT: vand 3, 2, 4 -; PWR6-NEXT: vsrb 2, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vand 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 4 -; PWR6-NEXT: vaddubm 2, 3, 2 -; PWR6-NEXT: vsrb 3, 2, 4 -; PWR6-NEXT: vaddubm 2, 2, 3 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vcmpgtub 2, 2, 4 +; PWR6-NEXT: addis r3, r2, .LCPI6_0@toc@ha +; PWR6-NEXT: vspltisb v3, 1 +; PWR6-NEXT: addi r3, r3, .LCPI6_0@toc@l +; PWR6-NEXT: vsrb v3, v2, v3 +; PWR6-NEXT: lvx v4, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI6_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI6_1@toc@l +; PWR6-NEXT: vspltisb v5, 2 +; PWR6-NEXT: vand v3, v3, v4 +; PWR6-NEXT: lvx v4, 0, r3 +; PWR6-NEXT: vsububm v2, v2, v3 +; PWR6-NEXT: vand v3, v2, v4 +; PWR6-NEXT: vsrb v2, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vand v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 4 +; PWR6-NEXT: vaddubm v2, v3, v2 +; PWR6-NEXT: vsrb v3, v2, v4 +; PWR6-NEXT: vaddubm v2, v2, v3 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vcmpgtub v2, v2, v4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_4_v16i8: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisb 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI6_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI6_0@toc@l -; PWR7-NEXT: vspltisb 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI6_1@toc@ha -; PWR7-NEXT: vspltisb 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI6_1@toc@l -; PWR7-NEXT: vsrb 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsububm 2, 2, 3 -; PWR7-NEXT: vsrb 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vaddubm 2, 2, 3 -; PWR7-NEXT: vsrb 3, 2, 5 -; PWR7-NEXT: vaddubm 2, 2, 3 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vcmpgtub 2, 2, 5 +; PWR7-NEXT: vspltisb v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI6_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI6_0@toc@l +; PWR7-NEXT: vspltisb v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI6_1@toc@ha +; PWR7-NEXT: vspltisb v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI6_1@toc@l +; PWR7-NEXT: vsrb v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsububm v2, v2, v3 +; PWR7-NEXT: vsrb v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vaddubm v2, v2, v3 +; PWR7-NEXT: vsrb v3, v2, v5 +; PWR7-NEXT: vaddubm v2, v2, v3 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vcmpgtub v2, v2, v5 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_4_v16i8: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisb 3, 4 -; PWR8-NEXT: vpopcntb 2, 2 -; PWR8-NEXT: vcmpgtub 2, 2, 3 +; PWR8-NEXT: vspltisb v3, 4 +; PWR8-NEXT: vpopcntb v2, v2 +; PWR8-NEXT: vcmpgtub v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_4_v16i8: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 4 -; PWR9-NEXT: vpopcntb 2, 2 -; PWR9-NEXT: vcmpgtub 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 4 +; PWR9-NEXT: vpopcntb v2, v2 +; PWR9-NEXT: vcmpgtub v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %0) %3 = icmp ugt <16 x i8> %2, @@ -587,94 +591,94 @@ define <16 x i8> @ugt_4_v16i8(<16 x i8> %0) { define <16 x i8> @ult_5_v16i8(<16 x i8> %0) { ; PWR5-LABEL: ult_5_v16i8: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI7_0@toc@ha -; PWR5-NEXT: vspltisb 3, 1 -; PWR5-NEXT: addi 3, 3, .LCPI7_0@toc@l -; PWR5-NEXT: vsrb 3, 2, 3 -; PWR5-NEXT: lvx 4, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI7_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI7_1@toc@l -; PWR5-NEXT: vspltisb 5, 2 -; PWR5-NEXT: vand 3, 3, 4 -; PWR5-NEXT: lvx 4, 0, 3 -; PWR5-NEXT: vsububm 2, 2, 3 -; PWR5-NEXT: vand 3, 2, 4 -; PWR5-NEXT: vsrb 2, 2, 5 -; PWR5-NEXT: vand 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 4 -; PWR5-NEXT: vaddubm 2, 3, 2 -; PWR5-NEXT: vsrb 3, 2, 4 -; PWR5-NEXT: vspltisb 4, 15 -; PWR5-NEXT: vaddubm 2, 2, 3 -; PWR5-NEXT: vspltisb 3, 5 -; PWR5-NEXT: vand 2, 2, 4 -; PWR5-NEXT: vcmpgtub 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI7_0@toc@ha +; PWR5-NEXT: vspltisb v3, 1 +; PWR5-NEXT: addi r3, r3, .LCPI7_0@toc@l +; PWR5-NEXT: vsrb v3, v2, v3 +; PWR5-NEXT: lvx v4, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI7_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI7_1@toc@l +; PWR5-NEXT: vspltisb v5, 2 +; PWR5-NEXT: vand v3, v3, v4 +; PWR5-NEXT: lvx v4, 0, r3 +; PWR5-NEXT: vsububm v2, v2, v3 +; PWR5-NEXT: vand v3, v2, v4 +; PWR5-NEXT: vsrb v2, v2, v5 +; PWR5-NEXT: vand v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 4 +; PWR5-NEXT: vaddubm v2, v3, v2 +; PWR5-NEXT: vsrb v3, v2, v4 +; PWR5-NEXT: vspltisb v4, 15 +; PWR5-NEXT: vaddubm v2, v2, v3 +; PWR5-NEXT: vspltisb v3, 5 +; PWR5-NEXT: vand v2, v2, v4 +; PWR5-NEXT: vcmpgtub v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_5_v16i8: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI7_0@toc@ha -; PWR6-NEXT: vspltisb 3, 1 -; PWR6-NEXT: addi 3, 3, .LCPI7_0@toc@l -; PWR6-NEXT: vsrb 3, 2, 3 -; PWR6-NEXT: lvx 4, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI7_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI7_1@toc@l -; PWR6-NEXT: vspltisb 5, 2 -; PWR6-NEXT: vand 3, 3, 4 -; PWR6-NEXT: lvx 4, 0, 3 -; PWR6-NEXT: vsububm 2, 2, 3 -; PWR6-NEXT: vand 3, 2, 4 -; PWR6-NEXT: vsrb 2, 2, 5 -; PWR6-NEXT: vand 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 4 -; PWR6-NEXT: vaddubm 2, 3, 2 -; PWR6-NEXT: vsrb 3, 2, 4 -; PWR6-NEXT: vspltisb 4, 15 -; PWR6-NEXT: vaddubm 2, 2, 3 -; PWR6-NEXT: vspltisb 3, 5 -; PWR6-NEXT: vand 2, 2, 4 -; PWR6-NEXT: vcmpgtub 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI7_0@toc@ha +; PWR6-NEXT: vspltisb v3, 1 +; PWR6-NEXT: addi r3, r3, .LCPI7_0@toc@l +; PWR6-NEXT: vsrb v3, v2, v3 +; PWR6-NEXT: lvx v4, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI7_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI7_1@toc@l +; PWR6-NEXT: vspltisb v5, 2 +; PWR6-NEXT: vand v3, v3, v4 +; PWR6-NEXT: lvx v4, 0, r3 +; PWR6-NEXT: vsububm v2, v2, v3 +; PWR6-NEXT: vand v3, v2, v4 +; PWR6-NEXT: vsrb v2, v2, v5 +; PWR6-NEXT: vand v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 4 +; PWR6-NEXT: vaddubm v2, v3, v2 +; PWR6-NEXT: vsrb v3, v2, v4 +; PWR6-NEXT: vspltisb v4, 15 +; PWR6-NEXT: vaddubm v2, v2, v3 +; PWR6-NEXT: vspltisb v3, 5 +; PWR6-NEXT: vand v2, v2, v4 +; PWR6-NEXT: vcmpgtub v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_5_v16i8: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisb 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI7_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI7_0@toc@l -; PWR7-NEXT: vspltisb 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI7_1@toc@ha -; PWR7-NEXT: vspltisb 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI7_1@toc@l -; PWR7-NEXT: vsrb 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 5 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsububm 2, 2, 3 -; PWR7-NEXT: vsrb 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vaddubm 2, 2, 3 -; PWR7-NEXT: vsrb 3, 2, 5 -; PWR7-NEXT: vaddubm 2, 2, 3 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vcmpgtub 2, 1, 2 +; PWR7-NEXT: vspltisb v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI7_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI7_0@toc@l +; PWR7-NEXT: vspltisb v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI7_1@toc@ha +; PWR7-NEXT: vspltisb v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI7_1@toc@l +; PWR7-NEXT: vsrb v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 5 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsububm v2, v2, v3 +; PWR7-NEXT: vsrb v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vaddubm v2, v2, v3 +; PWR7-NEXT: vsrb v3, v2, v5 +; PWR7-NEXT: vaddubm v2, v2, v3 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vcmpgtub v2, v1, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_5_v16i8: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisb 3, 5 -; PWR8-NEXT: vpopcntb 2, 2 -; PWR8-NEXT: vcmpgtub 2, 3, 2 +; PWR8-NEXT: vspltisb v3, 5 +; PWR8-NEXT: vpopcntb v2, v2 +; PWR8-NEXT: vcmpgtub v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_5_v16i8: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 5 -; PWR9-NEXT: vpopcntb 2, 2 -; PWR9-NEXT: vcmpgtub 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 5 +; PWR9-NEXT: vpopcntb v2, v2 +; PWR9-NEXT: vcmpgtub v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %0) %3 = icmp ult <16 x i8> %2, @@ -685,94 +689,94 @@ define <16 x i8> @ult_5_v16i8(<16 x i8> %0) { define <16 x i8> @ugt_5_v16i8(<16 x i8> %0) { ; PWR5-LABEL: ugt_5_v16i8: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI8_0@toc@ha -; PWR5-NEXT: vspltisb 3, 1 -; PWR5-NEXT: addi 3, 3, .LCPI8_0@toc@l -; PWR5-NEXT: vsrb 3, 2, 3 -; PWR5-NEXT: lvx 4, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI8_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI8_1@toc@l -; PWR5-NEXT: vspltisb 5, 2 -; PWR5-NEXT: vand 3, 3, 4 -; PWR5-NEXT: lvx 4, 0, 3 -; PWR5-NEXT: vsububm 2, 2, 3 -; PWR5-NEXT: vand 3, 2, 4 -; PWR5-NEXT: vsrb 2, 2, 5 -; PWR5-NEXT: vand 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 4 -; PWR5-NEXT: vaddubm 2, 3, 2 -; PWR5-NEXT: vsrb 3, 2, 4 -; PWR5-NEXT: vspltisb 4, 15 -; PWR5-NEXT: vaddubm 2, 2, 3 -; PWR5-NEXT: vspltisb 3, 5 -; PWR5-NEXT: vand 2, 2, 4 -; PWR5-NEXT: vcmpgtub 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI8_0@toc@ha +; PWR5-NEXT: vspltisb v3, 1 +; PWR5-NEXT: addi r3, r3, .LCPI8_0@toc@l +; PWR5-NEXT: vsrb v3, v2, v3 +; PWR5-NEXT: lvx v4, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI8_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI8_1@toc@l +; PWR5-NEXT: vspltisb v5, 2 +; PWR5-NEXT: vand v3, v3, v4 +; PWR5-NEXT: lvx v4, 0, r3 +; PWR5-NEXT: vsububm v2, v2, v3 +; PWR5-NEXT: vand v3, v2, v4 +; PWR5-NEXT: vsrb v2, v2, v5 +; PWR5-NEXT: vand v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 4 +; PWR5-NEXT: vaddubm v2, v3, v2 +; PWR5-NEXT: vsrb v3, v2, v4 +; PWR5-NEXT: vspltisb v4, 15 +; PWR5-NEXT: vaddubm v2, v2, v3 +; PWR5-NEXT: vspltisb v3, 5 +; PWR5-NEXT: vand v2, v2, v4 +; PWR5-NEXT: vcmpgtub v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_5_v16i8: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI8_0@toc@ha -; PWR6-NEXT: vspltisb 3, 1 -; PWR6-NEXT: addi 3, 3, .LCPI8_0@toc@l -; PWR6-NEXT: vsrb 3, 2, 3 -; PWR6-NEXT: lvx 4, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI8_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI8_1@toc@l -; PWR6-NEXT: vspltisb 5, 2 -; PWR6-NEXT: vand 3, 3, 4 -; PWR6-NEXT: lvx 4, 0, 3 -; PWR6-NEXT: vsububm 2, 2, 3 -; PWR6-NEXT: vand 3, 2, 4 -; PWR6-NEXT: vsrb 2, 2, 5 -; PWR6-NEXT: vand 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 4 -; PWR6-NEXT: vaddubm 2, 3, 2 -; PWR6-NEXT: vsrb 3, 2, 4 -; PWR6-NEXT: vspltisb 4, 15 -; PWR6-NEXT: vaddubm 2, 2, 3 -; PWR6-NEXT: vspltisb 3, 5 -; PWR6-NEXT: vand 2, 2, 4 -; PWR6-NEXT: vcmpgtub 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI8_0@toc@ha +; PWR6-NEXT: vspltisb v3, 1 +; PWR6-NEXT: addi r3, r3, .LCPI8_0@toc@l +; PWR6-NEXT: vsrb v3, v2, v3 +; PWR6-NEXT: lvx v4, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI8_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI8_1@toc@l +; PWR6-NEXT: vspltisb v5, 2 +; PWR6-NEXT: vand v3, v3, v4 +; PWR6-NEXT: lvx v4, 0, r3 +; PWR6-NEXT: vsububm v2, v2, v3 +; PWR6-NEXT: vand v3, v2, v4 +; PWR6-NEXT: vsrb v2, v2, v5 +; PWR6-NEXT: vand v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 4 +; PWR6-NEXT: vaddubm v2, v3, v2 +; PWR6-NEXT: vsrb v3, v2, v4 +; PWR6-NEXT: vspltisb v4, 15 +; PWR6-NEXT: vaddubm v2, v2, v3 +; PWR6-NEXT: vspltisb v3, 5 +; PWR6-NEXT: vand v2, v2, v4 +; PWR6-NEXT: vcmpgtub v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_5_v16i8: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisb 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI8_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI8_0@toc@l -; PWR7-NEXT: vspltisb 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI8_1@toc@ha -; PWR7-NEXT: vspltisb 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI8_1@toc@l -; PWR7-NEXT: vsrb 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 5 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsububm 2, 2, 3 -; PWR7-NEXT: vsrb 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vaddubm 2, 2, 3 -; PWR7-NEXT: vsrb 3, 2, 5 -; PWR7-NEXT: vaddubm 2, 2, 3 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vcmpgtub 2, 2, 1 +; PWR7-NEXT: vspltisb v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI8_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI8_0@toc@l +; PWR7-NEXT: vspltisb v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI8_1@toc@ha +; PWR7-NEXT: vspltisb v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI8_1@toc@l +; PWR7-NEXT: vsrb v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 5 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsububm v2, v2, v3 +; PWR7-NEXT: vsrb v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vaddubm v2, v2, v3 +; PWR7-NEXT: vsrb v3, v2, v5 +; PWR7-NEXT: vaddubm v2, v2, v3 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vcmpgtub v2, v2, v1 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_5_v16i8: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisb 3, 5 -; PWR8-NEXT: vpopcntb 2, 2 -; PWR8-NEXT: vcmpgtub 2, 2, 3 +; PWR8-NEXT: vspltisb v3, 5 +; PWR8-NEXT: vpopcntb v2, v2 +; PWR8-NEXT: vcmpgtub v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_5_v16i8: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 5 -; PWR9-NEXT: vpopcntb 2, 2 -; PWR9-NEXT: vcmpgtub 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 5 +; PWR9-NEXT: vpopcntb v2, v2 +; PWR9-NEXT: vcmpgtub v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %0) %3 = icmp ugt <16 x i8> %2, @@ -783,94 +787,94 @@ define <16 x i8> @ugt_5_v16i8(<16 x i8> %0) { define <16 x i8> @ult_6_v16i8(<16 x i8> %0) { ; PWR5-LABEL: ult_6_v16i8: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI9_0@toc@ha -; PWR5-NEXT: vspltisb 3, 1 -; PWR5-NEXT: addi 3, 3, .LCPI9_0@toc@l -; PWR5-NEXT: vsrb 3, 2, 3 -; PWR5-NEXT: lvx 4, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI9_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI9_1@toc@l -; PWR5-NEXT: vspltisb 5, 2 -; PWR5-NEXT: vand 3, 3, 4 -; PWR5-NEXT: lvx 4, 0, 3 -; PWR5-NEXT: vsububm 2, 2, 3 -; PWR5-NEXT: vand 3, 2, 4 -; PWR5-NEXT: vsrb 2, 2, 5 -; PWR5-NEXT: vand 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 4 -; PWR5-NEXT: vaddubm 2, 3, 2 -; PWR5-NEXT: vsrb 3, 2, 4 -; PWR5-NEXT: vspltisb 4, 15 -; PWR5-NEXT: vaddubm 2, 2, 3 -; PWR5-NEXT: vspltisb 3, 6 -; PWR5-NEXT: vand 2, 2, 4 -; PWR5-NEXT: vcmpgtub 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI9_0@toc@ha +; PWR5-NEXT: vspltisb v3, 1 +; PWR5-NEXT: addi r3, r3, .LCPI9_0@toc@l +; PWR5-NEXT: vsrb v3, v2, v3 +; PWR5-NEXT: lvx v4, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI9_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI9_1@toc@l +; PWR5-NEXT: vspltisb v5, 2 +; PWR5-NEXT: vand v3, v3, v4 +; PWR5-NEXT: lvx v4, 0, r3 +; PWR5-NEXT: vsububm v2, v2, v3 +; PWR5-NEXT: vand v3, v2, v4 +; PWR5-NEXT: vsrb v2, v2, v5 +; PWR5-NEXT: vand v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 4 +; PWR5-NEXT: vaddubm v2, v3, v2 +; PWR5-NEXT: vsrb v3, v2, v4 +; PWR5-NEXT: vspltisb v4, 15 +; PWR5-NEXT: vaddubm v2, v2, v3 +; PWR5-NEXT: vspltisb v3, 6 +; PWR5-NEXT: vand v2, v2, v4 +; PWR5-NEXT: vcmpgtub v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_6_v16i8: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI9_0@toc@ha -; PWR6-NEXT: vspltisb 3, 1 -; PWR6-NEXT: addi 3, 3, .LCPI9_0@toc@l -; PWR6-NEXT: vsrb 3, 2, 3 -; PWR6-NEXT: lvx 4, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI9_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI9_1@toc@l -; PWR6-NEXT: vspltisb 5, 2 -; PWR6-NEXT: vand 3, 3, 4 -; PWR6-NEXT: lvx 4, 0, 3 -; PWR6-NEXT: vsububm 2, 2, 3 -; PWR6-NEXT: vand 3, 2, 4 -; PWR6-NEXT: vsrb 2, 2, 5 -; PWR6-NEXT: vand 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 4 -; PWR6-NEXT: vaddubm 2, 3, 2 -; PWR6-NEXT: vsrb 3, 2, 4 -; PWR6-NEXT: vspltisb 4, 15 -; PWR6-NEXT: vaddubm 2, 2, 3 -; PWR6-NEXT: vspltisb 3, 6 -; PWR6-NEXT: vand 2, 2, 4 -; PWR6-NEXT: vcmpgtub 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI9_0@toc@ha +; PWR6-NEXT: vspltisb v3, 1 +; PWR6-NEXT: addi r3, r3, .LCPI9_0@toc@l +; PWR6-NEXT: vsrb v3, v2, v3 +; PWR6-NEXT: lvx v4, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI9_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI9_1@toc@l +; PWR6-NEXT: vspltisb v5, 2 +; PWR6-NEXT: vand v3, v3, v4 +; PWR6-NEXT: lvx v4, 0, r3 +; PWR6-NEXT: vsububm v2, v2, v3 +; PWR6-NEXT: vand v3, v2, v4 +; PWR6-NEXT: vsrb v2, v2, v5 +; PWR6-NEXT: vand v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 4 +; PWR6-NEXT: vaddubm v2, v3, v2 +; PWR6-NEXT: vsrb v3, v2, v4 +; PWR6-NEXT: vspltisb v4, 15 +; PWR6-NEXT: vaddubm v2, v2, v3 +; PWR6-NEXT: vspltisb v3, 6 +; PWR6-NEXT: vand v2, v2, v4 +; PWR6-NEXT: vcmpgtub v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_6_v16i8: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisb 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI9_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI9_0@toc@l -; PWR7-NEXT: vspltisb 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI9_1@toc@ha -; PWR7-NEXT: vspltisb 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI9_1@toc@l -; PWR7-NEXT: vsrb 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 6 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsububm 2, 2, 3 -; PWR7-NEXT: vsrb 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vaddubm 2, 2, 3 -; PWR7-NEXT: vsrb 3, 2, 5 -; PWR7-NEXT: vaddubm 2, 2, 3 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vcmpgtub 2, 1, 2 +; PWR7-NEXT: vspltisb v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI9_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI9_0@toc@l +; PWR7-NEXT: vspltisb v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI9_1@toc@ha +; PWR7-NEXT: vspltisb v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI9_1@toc@l +; PWR7-NEXT: vsrb v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 6 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsububm v2, v2, v3 +; PWR7-NEXT: vsrb v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vaddubm v2, v2, v3 +; PWR7-NEXT: vsrb v3, v2, v5 +; PWR7-NEXT: vaddubm v2, v2, v3 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vcmpgtub v2, v1, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_6_v16i8: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisb 3, 6 -; PWR8-NEXT: vpopcntb 2, 2 -; PWR8-NEXT: vcmpgtub 2, 3, 2 +; PWR8-NEXT: vspltisb v3, 6 +; PWR8-NEXT: vpopcntb v2, v2 +; PWR8-NEXT: vcmpgtub v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_6_v16i8: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 6 -; PWR9-NEXT: vpopcntb 2, 2 -; PWR9-NEXT: vcmpgtub 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 6 +; PWR9-NEXT: vpopcntb v2, v2 +; PWR9-NEXT: vcmpgtub v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %0) %3 = icmp ult <16 x i8> %2, @@ -881,94 +885,94 @@ define <16 x i8> @ult_6_v16i8(<16 x i8> %0) { define <16 x i8> @ugt_6_v16i8(<16 x i8> %0) { ; PWR5-LABEL: ugt_6_v16i8: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI10_0@toc@ha -; PWR5-NEXT: vspltisb 3, 1 -; PWR5-NEXT: addi 3, 3, .LCPI10_0@toc@l -; PWR5-NEXT: vsrb 3, 2, 3 -; PWR5-NEXT: lvx 4, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI10_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI10_1@toc@l -; PWR5-NEXT: vspltisb 5, 2 -; PWR5-NEXT: vand 3, 3, 4 -; PWR5-NEXT: lvx 4, 0, 3 -; PWR5-NEXT: vsububm 2, 2, 3 -; PWR5-NEXT: vand 3, 2, 4 -; PWR5-NEXT: vsrb 2, 2, 5 -; PWR5-NEXT: vand 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 4 -; PWR5-NEXT: vaddubm 2, 3, 2 -; PWR5-NEXT: vsrb 3, 2, 4 -; PWR5-NEXT: vspltisb 4, 15 -; PWR5-NEXT: vaddubm 2, 2, 3 -; PWR5-NEXT: vspltisb 3, 6 -; PWR5-NEXT: vand 2, 2, 4 -; PWR5-NEXT: vcmpgtub 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI10_0@toc@ha +; PWR5-NEXT: vspltisb v3, 1 +; PWR5-NEXT: addi r3, r3, .LCPI10_0@toc@l +; PWR5-NEXT: vsrb v3, v2, v3 +; PWR5-NEXT: lvx v4, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI10_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI10_1@toc@l +; PWR5-NEXT: vspltisb v5, 2 +; PWR5-NEXT: vand v3, v3, v4 +; PWR5-NEXT: lvx v4, 0, r3 +; PWR5-NEXT: vsububm v2, v2, v3 +; PWR5-NEXT: vand v3, v2, v4 +; PWR5-NEXT: vsrb v2, v2, v5 +; PWR5-NEXT: vand v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 4 +; PWR5-NEXT: vaddubm v2, v3, v2 +; PWR5-NEXT: vsrb v3, v2, v4 +; PWR5-NEXT: vspltisb v4, 15 +; PWR5-NEXT: vaddubm v2, v2, v3 +; PWR5-NEXT: vspltisb v3, 6 +; PWR5-NEXT: vand v2, v2, v4 +; PWR5-NEXT: vcmpgtub v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_6_v16i8: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI10_0@toc@ha -; PWR6-NEXT: vspltisb 3, 1 -; PWR6-NEXT: addi 3, 3, .LCPI10_0@toc@l -; PWR6-NEXT: vsrb 3, 2, 3 -; PWR6-NEXT: lvx 4, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI10_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI10_1@toc@l -; PWR6-NEXT: vspltisb 5, 2 -; PWR6-NEXT: vand 3, 3, 4 -; PWR6-NEXT: lvx 4, 0, 3 -; PWR6-NEXT: vsububm 2, 2, 3 -; PWR6-NEXT: vand 3, 2, 4 -; PWR6-NEXT: vsrb 2, 2, 5 -; PWR6-NEXT: vand 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 4 -; PWR6-NEXT: vaddubm 2, 3, 2 -; PWR6-NEXT: vsrb 3, 2, 4 -; PWR6-NEXT: vspltisb 4, 15 -; PWR6-NEXT: vaddubm 2, 2, 3 -; PWR6-NEXT: vspltisb 3, 6 -; PWR6-NEXT: vand 2, 2, 4 -; PWR6-NEXT: vcmpgtub 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI10_0@toc@ha +; PWR6-NEXT: vspltisb v3, 1 +; PWR6-NEXT: addi r3, r3, .LCPI10_0@toc@l +; PWR6-NEXT: vsrb v3, v2, v3 +; PWR6-NEXT: lvx v4, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI10_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI10_1@toc@l +; PWR6-NEXT: vspltisb v5, 2 +; PWR6-NEXT: vand v3, v3, v4 +; PWR6-NEXT: lvx v4, 0, r3 +; PWR6-NEXT: vsububm v2, v2, v3 +; PWR6-NEXT: vand v3, v2, v4 +; PWR6-NEXT: vsrb v2, v2, v5 +; PWR6-NEXT: vand v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 4 +; PWR6-NEXT: vaddubm v2, v3, v2 +; PWR6-NEXT: vsrb v3, v2, v4 +; PWR6-NEXT: vspltisb v4, 15 +; PWR6-NEXT: vaddubm v2, v2, v3 +; PWR6-NEXT: vspltisb v3, 6 +; PWR6-NEXT: vand v2, v2, v4 +; PWR6-NEXT: vcmpgtub v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_6_v16i8: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisb 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI10_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI10_0@toc@l -; PWR7-NEXT: vspltisb 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI10_1@toc@ha -; PWR7-NEXT: vspltisb 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI10_1@toc@l -; PWR7-NEXT: vsrb 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 6 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsububm 2, 2, 3 -; PWR7-NEXT: vsrb 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vaddubm 2, 2, 3 -; PWR7-NEXT: vsrb 3, 2, 5 -; PWR7-NEXT: vaddubm 2, 2, 3 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vcmpgtub 2, 2, 1 +; PWR7-NEXT: vspltisb v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI10_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI10_0@toc@l +; PWR7-NEXT: vspltisb v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI10_1@toc@ha +; PWR7-NEXT: vspltisb v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI10_1@toc@l +; PWR7-NEXT: vsrb v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 6 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsububm v2, v2, v3 +; PWR7-NEXT: vsrb v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vaddubm v2, v2, v3 +; PWR7-NEXT: vsrb v3, v2, v5 +; PWR7-NEXT: vaddubm v2, v2, v3 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vcmpgtub v2, v2, v1 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_6_v16i8: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisb 3, 6 -; PWR8-NEXT: vpopcntb 2, 2 -; PWR8-NEXT: vcmpgtub 2, 2, 3 +; PWR8-NEXT: vspltisb v3, 6 +; PWR8-NEXT: vpopcntb v2, v2 +; PWR8-NEXT: vcmpgtub v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_6_v16i8: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 6 -; PWR9-NEXT: vpopcntb 2, 2 -; PWR9-NEXT: vcmpgtub 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 6 +; PWR9-NEXT: vpopcntb v2, v2 +; PWR9-NEXT: vcmpgtub v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %0) %3 = icmp ugt <16 x i8> %2, @@ -979,94 +983,94 @@ define <16 x i8> @ugt_6_v16i8(<16 x i8> %0) { define <16 x i8> @ult_7_v16i8(<16 x i8> %0) { ; PWR5-LABEL: ult_7_v16i8: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI11_0@toc@ha -; PWR5-NEXT: vspltisb 3, 1 -; PWR5-NEXT: addi 3, 3, .LCPI11_0@toc@l -; PWR5-NEXT: vsrb 3, 2, 3 -; PWR5-NEXT: lvx 4, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI11_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI11_1@toc@l -; PWR5-NEXT: vspltisb 5, 2 -; PWR5-NEXT: vand 3, 3, 4 -; PWR5-NEXT: lvx 4, 0, 3 -; PWR5-NEXT: vsububm 2, 2, 3 -; PWR5-NEXT: vand 3, 2, 4 -; PWR5-NEXT: vsrb 2, 2, 5 -; PWR5-NEXT: vand 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 4 -; PWR5-NEXT: vaddubm 2, 3, 2 -; PWR5-NEXT: vsrb 3, 2, 4 -; PWR5-NEXT: vspltisb 4, 15 -; PWR5-NEXT: vaddubm 2, 2, 3 -; PWR5-NEXT: vspltisb 3, 7 -; PWR5-NEXT: vand 2, 2, 4 -; PWR5-NEXT: vcmpgtub 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI11_0@toc@ha +; PWR5-NEXT: vspltisb v3, 1 +; PWR5-NEXT: addi r3, r3, .LCPI11_0@toc@l +; PWR5-NEXT: vsrb v3, v2, v3 +; PWR5-NEXT: lvx v4, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI11_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI11_1@toc@l +; PWR5-NEXT: vspltisb v5, 2 +; PWR5-NEXT: vand v3, v3, v4 +; PWR5-NEXT: lvx v4, 0, r3 +; PWR5-NEXT: vsububm v2, v2, v3 +; PWR5-NEXT: vand v3, v2, v4 +; PWR5-NEXT: vsrb v2, v2, v5 +; PWR5-NEXT: vand v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 4 +; PWR5-NEXT: vaddubm v2, v3, v2 +; PWR5-NEXT: vsrb v3, v2, v4 +; PWR5-NEXT: vspltisb v4, 15 +; PWR5-NEXT: vaddubm v2, v2, v3 +; PWR5-NEXT: vspltisb v3, 7 +; PWR5-NEXT: vand v2, v2, v4 +; PWR5-NEXT: vcmpgtub v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_7_v16i8: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI11_0@toc@ha -; PWR6-NEXT: vspltisb 3, 1 -; PWR6-NEXT: addi 3, 3, .LCPI11_0@toc@l -; PWR6-NEXT: vsrb 3, 2, 3 -; PWR6-NEXT: lvx 4, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI11_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI11_1@toc@l -; PWR6-NEXT: vspltisb 5, 2 -; PWR6-NEXT: vand 3, 3, 4 -; PWR6-NEXT: lvx 4, 0, 3 -; PWR6-NEXT: vsububm 2, 2, 3 -; PWR6-NEXT: vand 3, 2, 4 -; PWR6-NEXT: vsrb 2, 2, 5 -; PWR6-NEXT: vand 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 4 -; PWR6-NEXT: vaddubm 2, 3, 2 -; PWR6-NEXT: vsrb 3, 2, 4 -; PWR6-NEXT: vspltisb 4, 15 -; PWR6-NEXT: vaddubm 2, 2, 3 -; PWR6-NEXT: vspltisb 3, 7 -; PWR6-NEXT: vand 2, 2, 4 -; PWR6-NEXT: vcmpgtub 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI11_0@toc@ha +; PWR6-NEXT: vspltisb v3, 1 +; PWR6-NEXT: addi r3, r3, .LCPI11_0@toc@l +; PWR6-NEXT: vsrb v3, v2, v3 +; PWR6-NEXT: lvx v4, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI11_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI11_1@toc@l +; PWR6-NEXT: vspltisb v5, 2 +; PWR6-NEXT: vand v3, v3, v4 +; PWR6-NEXT: lvx v4, 0, r3 +; PWR6-NEXT: vsububm v2, v2, v3 +; PWR6-NEXT: vand v3, v2, v4 +; PWR6-NEXT: vsrb v2, v2, v5 +; PWR6-NEXT: vand v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 4 +; PWR6-NEXT: vaddubm v2, v3, v2 +; PWR6-NEXT: vsrb v3, v2, v4 +; PWR6-NEXT: vspltisb v4, 15 +; PWR6-NEXT: vaddubm v2, v2, v3 +; PWR6-NEXT: vspltisb v3, 7 +; PWR6-NEXT: vand v2, v2, v4 +; PWR6-NEXT: vcmpgtub v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_7_v16i8: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisb 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI11_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI11_0@toc@l -; PWR7-NEXT: vspltisb 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI11_1@toc@ha -; PWR7-NEXT: vspltisb 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI11_1@toc@l -; PWR7-NEXT: vsrb 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 7 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsububm 2, 2, 3 -; PWR7-NEXT: vsrb 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vaddubm 2, 2, 3 -; PWR7-NEXT: vsrb 3, 2, 5 -; PWR7-NEXT: vaddubm 2, 2, 3 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vcmpgtub 2, 1, 2 +; PWR7-NEXT: vspltisb v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI11_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI11_0@toc@l +; PWR7-NEXT: vspltisb v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI11_1@toc@ha +; PWR7-NEXT: vspltisb v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI11_1@toc@l +; PWR7-NEXT: vsrb v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 7 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsububm v2, v2, v3 +; PWR7-NEXT: vsrb v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vaddubm v2, v2, v3 +; PWR7-NEXT: vsrb v3, v2, v5 +; PWR7-NEXT: vaddubm v2, v2, v3 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vcmpgtub v2, v1, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_7_v16i8: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisb 3, 7 -; PWR8-NEXT: vpopcntb 2, 2 -; PWR8-NEXT: vcmpgtub 2, 3, 2 +; PWR8-NEXT: vspltisb v3, 7 +; PWR8-NEXT: vpopcntb v2, v2 +; PWR8-NEXT: vcmpgtub v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_7_v16i8: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 7 -; PWR9-NEXT: vpopcntb 2, 2 -; PWR9-NEXT: vcmpgtub 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 7 +; PWR9-NEXT: vpopcntb v2, v2 +; PWR9-NEXT: vcmpgtub v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %0) %3 = icmp ult <16 x i8> %2, @@ -1077,46 +1081,46 @@ define <16 x i8> @ult_7_v16i8(<16 x i8> %0) { define <8 x i16> @ugt_1_v8i16(<8 x i16> %0) { ; PWR5-LABEL: ugt_1_v8i16: ; PWR5: # %bb.0: -; PWR5-NEXT: vspltisb 3, -1 -; PWR5-NEXT: vadduhm 3, 2, 3 -; PWR5-NEXT: vand 2, 2, 3 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: vcmpequh 2, 2, 3 -; PWR5-NEXT: vnot 2, 2 +; PWR5-NEXT: vspltisb v3, -1 +; PWR5-NEXT: vadduhm v3, v2, v3 +; PWR5-NEXT: vand v2, v2, v3 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: vcmpequh v2, v2, v3 +; PWR5-NEXT: vnot v2, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_1_v8i16: ; PWR6: # %bb.0: -; PWR6-NEXT: vspltisb 3, -1 -; PWR6-NEXT: vadduhm 3, 2, 3 -; PWR6-NEXT: vand 2, 2, 3 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: vcmpequh 2, 2, 3 -; PWR6-NEXT: vnot 2, 2 +; PWR6-NEXT: vspltisb v3, -1 +; PWR6-NEXT: vadduhm v3, v2, v3 +; PWR6-NEXT: vand v2, v2, v3 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: vcmpequh v2, v2, v3 +; PWR6-NEXT: vnot v2, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_1_v8i16: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisb 3, -1 -; PWR7-NEXT: vadduhm 3, 2, 3 -; PWR7-NEXT: xxland 34, 34, 35 -; PWR7-NEXT: xxlxor 35, 35, 35 -; PWR7-NEXT: vcmpequh 2, 2, 3 -; PWR7-NEXT: xxlnor 34, 34, 34 +; PWR7-NEXT: vspltisb v3, -1 +; PWR7-NEXT: vadduhm v3, v2, v3 +; PWR7-NEXT: xxland v2, v2, v3 +; PWR7-NEXT: xxlxor v3, v3, v3 +; PWR7-NEXT: vcmpequh v2, v2, v3 +; PWR7-NEXT: xxlnor v2, v2, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_1_v8i16: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltish 3, 1 -; PWR8-NEXT: vpopcnth 2, 2 -; PWR8-NEXT: vcmpgtuh 2, 2, 3 +; PWR8-NEXT: vspltish v3, 1 +; PWR8-NEXT: vpopcnth v2, v2 +; PWR8-NEXT: vcmpgtuh v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_1_v8i16: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltish 3, 1 -; PWR9-NEXT: vpopcnth 2, 2 -; PWR9-NEXT: vcmpgtuh 2, 2, 3 +; PWR9-NEXT: vspltish v3, 1 +; PWR9-NEXT: vpopcnth v2, v2 +; PWR9-NEXT: vcmpgtuh v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0) %3 = icmp ugt <8 x i16> %2, @@ -1127,43 +1131,43 @@ define <8 x i16> @ugt_1_v8i16(<8 x i16> %0) { define <8 x i16> @ult_2_v8i16(<8 x i16> %0) { ; PWR5-LABEL: ult_2_v8i16: ; PWR5: # %bb.0: -; PWR5-NEXT: vspltisb 3, -1 -; PWR5-NEXT: vadduhm 3, 2, 3 -; PWR5-NEXT: vand 2, 2, 3 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: vcmpequh 2, 2, 3 +; PWR5-NEXT: vspltisb v3, -1 +; PWR5-NEXT: vadduhm v3, v2, v3 +; PWR5-NEXT: vand v2, v2, v3 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: vcmpequh v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_2_v8i16: ; PWR6: # %bb.0: -; PWR6-NEXT: vspltisb 3, -1 -; PWR6-NEXT: vadduhm 3, 2, 3 -; PWR6-NEXT: vand 2, 2, 3 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: vcmpequh 2, 2, 3 +; PWR6-NEXT: vspltisb v3, -1 +; PWR6-NEXT: vadduhm v3, v2, v3 +; PWR6-NEXT: vand v2, v2, v3 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: vcmpequh v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_2_v8i16: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisb 3, -1 -; PWR7-NEXT: vadduhm 3, 2, 3 -; PWR7-NEXT: xxland 34, 34, 35 -; PWR7-NEXT: xxlxor 35, 35, 35 -; PWR7-NEXT: vcmpequh 2, 2, 3 +; PWR7-NEXT: vspltisb v3, -1 +; PWR7-NEXT: vadduhm v3, v2, v3 +; PWR7-NEXT: xxland v2, v2, v3 +; PWR7-NEXT: xxlxor v3, v3, v3 +; PWR7-NEXT: vcmpequh v2, v2, v3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_2_v8i16: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltish 3, 2 -; PWR8-NEXT: vpopcnth 2, 2 -; PWR8-NEXT: vcmpgtuh 2, 3, 2 +; PWR8-NEXT: vspltish v3, 2 +; PWR8-NEXT: vpopcnth v2, v2 +; PWR8-NEXT: vcmpgtuh v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_2_v8i16: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltish 3, 2 -; PWR9-NEXT: vpopcnth 2, 2 -; PWR9-NEXT: vcmpgtuh 2, 3, 2 +; PWR9-NEXT: vspltish v3, 2 +; PWR9-NEXT: vpopcnth v2, v2 +; PWR9-NEXT: vcmpgtuh v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0) %3 = icmp ult <8 x i16> %2, @@ -1174,106 +1178,106 @@ define <8 x i16> @ult_2_v8i16(<8 x i16> %0) { define <8 x i16> @ugt_2_v8i16(<8 x i16> %0) { ; PWR5-LABEL: ugt_2_v8i16: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI14_0@toc@ha -; PWR5-NEXT: vspltish 3, 1 -; PWR5-NEXT: addi 3, 3, .LCPI14_0@toc@l -; PWR5-NEXT: vsrh 3, 2, 3 -; PWR5-NEXT: lvx 4, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI14_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI14_1@toc@l -; PWR5-NEXT: vspltish 5, 2 -; PWR5-NEXT: vand 3, 3, 4 -; PWR5-NEXT: lvx 4, 0, 3 -; PWR5-NEXT: vsubuhm 2, 2, 3 -; PWR5-NEXT: vand 3, 2, 4 -; PWR5-NEXT: vsrh 2, 2, 5 -; PWR5-NEXT: vand 2, 2, 4 -; PWR5-NEXT: vadduhm 2, 3, 2 -; PWR5-NEXT: vspltish 3, 4 -; PWR5-NEXT: vsrh 3, 2, 3 -; PWR5-NEXT: vadduhm 2, 2, 3 -; PWR5-NEXT: vspltisb 3, 15 -; PWR5-NEXT: vxor 4, 4, 4 -; PWR5-NEXT: vand 2, 2, 3 -; PWR5-NEXT: vspltisb 3, 1 -; PWR5-NEXT: vmladduhm 2, 2, 3, 4 -; PWR5-NEXT: vspltish 3, 8 -; PWR5-NEXT: vsrh 2, 2, 3 -; PWR5-NEXT: vcmpgtuh 2, 2, 5 +; PWR5-NEXT: addis r3, r2, .LCPI14_0@toc@ha +; PWR5-NEXT: vspltish v3, 1 +; PWR5-NEXT: addi r3, r3, .LCPI14_0@toc@l +; PWR5-NEXT: vsrh v3, v2, v3 +; PWR5-NEXT: lvx v4, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI14_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI14_1@toc@l +; PWR5-NEXT: vspltish v5, 2 +; PWR5-NEXT: vand v3, v3, v4 +; PWR5-NEXT: lvx v4, 0, r3 +; PWR5-NEXT: vsubuhm v2, v2, v3 +; PWR5-NEXT: vand v3, v2, v4 +; PWR5-NEXT: vsrh v2, v2, v5 +; PWR5-NEXT: vand v2, v2, v4 +; PWR5-NEXT: vadduhm v2, v3, v2 +; PWR5-NEXT: vspltish v3, 4 +; PWR5-NEXT: vsrh v3, v2, v3 +; PWR5-NEXT: vadduhm v2, v2, v3 +; PWR5-NEXT: vspltisb v3, 15 +; PWR5-NEXT: vxor v4, v4, v4 +; PWR5-NEXT: vand v2, v2, v3 +; PWR5-NEXT: vspltisb v3, 1 +; PWR5-NEXT: vmladduhm v2, v2, v3, v4 +; PWR5-NEXT: vspltish v3, 8 +; PWR5-NEXT: vsrh v2, v2, v3 +; PWR5-NEXT: vcmpgtuh v2, v2, v5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_2_v8i16: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI14_0@toc@ha -; PWR6-NEXT: vspltish 3, 1 -; PWR6-NEXT: addi 3, 3, .LCPI14_0@toc@l -; PWR6-NEXT: vsrh 3, 2, 3 -; PWR6-NEXT: lvx 4, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI14_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI14_1@toc@l -; PWR6-NEXT: vspltish 5, 2 -; PWR6-NEXT: vand 3, 3, 4 -; PWR6-NEXT: lvx 4, 0, 3 -; PWR6-NEXT: vsubuhm 2, 2, 3 -; PWR6-NEXT: vand 3, 2, 4 -; PWR6-NEXT: vsrh 2, 2, 5 -; PWR6-NEXT: vand 2, 2, 4 -; PWR6-NEXT: vadduhm 2, 3, 2 -; PWR6-NEXT: vspltish 3, 4 -; PWR6-NEXT: vsrh 3, 2, 3 -; PWR6-NEXT: vadduhm 2, 2, 3 -; PWR6-NEXT: vspltisb 3, 15 -; PWR6-NEXT: vxor 4, 4, 4 -; PWR6-NEXT: vand 2, 2, 3 -; PWR6-NEXT: vspltisb 3, 1 -; PWR6-NEXT: vmladduhm 2, 2, 3, 4 -; PWR6-NEXT: vspltish 3, 8 -; PWR6-NEXT: vsrh 2, 2, 3 -; PWR6-NEXT: vcmpgtuh 2, 2, 5 +; PWR6-NEXT: addis r3, r2, .LCPI14_0@toc@ha +; PWR6-NEXT: vspltish v3, 1 +; PWR6-NEXT: addi r3, r3, .LCPI14_0@toc@l +; PWR6-NEXT: vsrh v3, v2, v3 +; PWR6-NEXT: lvx v4, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI14_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI14_1@toc@l +; PWR6-NEXT: vspltish v5, 2 +; PWR6-NEXT: vand v3, v3, v4 +; PWR6-NEXT: lvx v4, 0, r3 +; PWR6-NEXT: vsubuhm v2, v2, v3 +; PWR6-NEXT: vand v3, v2, v4 +; PWR6-NEXT: vsrh v2, v2, v5 +; PWR6-NEXT: vand v2, v2, v4 +; PWR6-NEXT: vadduhm v2, v3, v2 +; PWR6-NEXT: vspltish v3, 4 +; PWR6-NEXT: vsrh v3, v2, v3 +; PWR6-NEXT: vadduhm v2, v2, v3 +; PWR6-NEXT: vspltisb v3, 15 +; PWR6-NEXT: vxor v4, v4, v4 +; PWR6-NEXT: vand v2, v2, v3 +; PWR6-NEXT: vspltisb v3, 1 +; PWR6-NEXT: vmladduhm v2, v2, v3, v4 +; PWR6-NEXT: vspltish v3, 8 +; PWR6-NEXT: vsrh v2, v2, v3 +; PWR6-NEXT: vcmpgtuh v2, v2, v5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_2_v8i16: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltish 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI14_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI14_0@toc@l -; PWR7-NEXT: vspltish 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI14_1@toc@ha -; PWR7-NEXT: vspltish 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI14_1@toc@l -; PWR7-NEXT: vsrh 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltish 6, 8 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuhm 2, 2, 3 -; PWR7-NEXT: xxland 35, 34, 0 -; PWR7-NEXT: vsrh 2, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: vadduhm 2, 3, 2 -; PWR7-NEXT: vsrh 3, 2, 5 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vxor 3, 3, 3 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmladduhm 2, 2, 1, 3 -; PWR7-NEXT: vsrh 2, 2, 6 -; PWR7-NEXT: vcmpgtuh 2, 2, 4 +; PWR7-NEXT: vspltish v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI14_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI14_0@toc@l +; PWR7-NEXT: vspltish v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI14_1@toc@ha +; PWR7-NEXT: vspltish v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI14_1@toc@l +; PWR7-NEXT: vsrh v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltish v6, 8 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuhm v2, v2, v3 +; PWR7-NEXT: xxland v3, v2, vs0 +; PWR7-NEXT: vsrh v2, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: vadduhm v2, v3, v2 +; PWR7-NEXT: vsrh v3, v2, v5 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vxor v3, v3, v3 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmladduhm v2, v2, v1, v3 +; PWR7-NEXT: vsrh v2, v2, v6 +; PWR7-NEXT: vcmpgtuh v2, v2, v4 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_2_v8i16: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltish 3, 2 -; PWR8-NEXT: vpopcnth 2, 2 -; PWR8-NEXT: vcmpgtuh 2, 2, 3 +; PWR8-NEXT: vspltish v3, 2 +; PWR8-NEXT: vpopcnth v2, v2 +; PWR8-NEXT: vcmpgtuh v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_2_v8i16: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltish 3, 2 -; PWR9-NEXT: vpopcnth 2, 2 -; PWR9-NEXT: vcmpgtuh 2, 2, 3 +; PWR9-NEXT: vspltish v3, 2 +; PWR9-NEXT: vpopcnth v2, v2 +; PWR9-NEXT: vcmpgtuh v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0) %3 = icmp ugt <8 x i16> %2, @@ -1284,109 +1288,109 @@ define <8 x i16> @ugt_2_v8i16(<8 x i16> %0) { define <8 x i16> @ult_3_v8i16(<8 x i16> %0) { ; PWR5-LABEL: ult_3_v8i16: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI15_0@toc@ha -; PWR5-NEXT: vspltish 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI15_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI15_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI15_1@toc@l -; PWR5-NEXT: vsrh 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 2 -; PWR5-NEXT: vsubuhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 4 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vmladduhm 2, 2, 4, 3 -; PWR5-NEXT: vspltish 3, 8 -; PWR5-NEXT: vsrh 2, 2, 3 -; PWR5-NEXT: vspltish 3, 3 -; PWR5-NEXT: vcmpgtuh 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI15_0@toc@ha +; PWR5-NEXT: vspltish v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI15_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI15_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI15_1@toc@l +; PWR5-NEXT: vsrh v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 2 +; PWR5-NEXT: vsubuhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 4 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vmladduhm v2, v2, v4, v3 +; PWR5-NEXT: vspltish v3, 8 +; PWR5-NEXT: vsrh v2, v2, v3 +; PWR5-NEXT: vspltish v3, 3 +; PWR5-NEXT: vcmpgtuh v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_3_v8i16: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI15_0@toc@ha -; PWR6-NEXT: vspltish 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI15_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI15_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI15_1@toc@l -; PWR6-NEXT: vsrh 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 2 -; PWR6-NEXT: vsubuhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 4 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vmladduhm 2, 2, 4, 3 -; PWR6-NEXT: vspltish 3, 8 -; PWR6-NEXT: vsrh 2, 2, 3 -; PWR6-NEXT: vspltish 3, 3 -; PWR6-NEXT: vcmpgtuh 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI15_0@toc@ha +; PWR6-NEXT: vspltish v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI15_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI15_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI15_1@toc@l +; PWR6-NEXT: vsrh v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 2 +; PWR6-NEXT: vsubuhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 4 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vmladduhm v2, v2, v4, v3 +; PWR6-NEXT: vspltish v3, 8 +; PWR6-NEXT: vsrh v2, v2, v3 +; PWR6-NEXT: vspltish v3, 3 +; PWR6-NEXT: vcmpgtuh v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_3_v8i16: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltish 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI15_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI15_0@toc@l -; PWR7-NEXT: vspltish 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI15_1@toc@ha -; PWR7-NEXT: vspltish 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI15_1@toc@l -; PWR7-NEXT: vsrh 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltish 6, 8 -; PWR7-NEXT: vspltish 7, 3 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 5 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vxor 3, 3, 3 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmladduhm 2, 2, 1, 3 -; PWR7-NEXT: vsrh 2, 2, 6 -; PWR7-NEXT: vcmpgtuh 2, 7, 2 +; PWR7-NEXT: vspltish v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI15_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI15_0@toc@l +; PWR7-NEXT: vspltish v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI15_1@toc@ha +; PWR7-NEXT: vspltish v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI15_1@toc@l +; PWR7-NEXT: vsrh v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltish v6, 8 +; PWR7-NEXT: vspltish v7, 3 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v5 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vxor v3, v3, v3 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmladduhm v2, v2, v1, v3 +; PWR7-NEXT: vsrh v2, v2, v6 +; PWR7-NEXT: vcmpgtuh v2, v7, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_3_v8i16: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltish 3, 3 -; PWR8-NEXT: vpopcnth 2, 2 -; PWR8-NEXT: vcmpgtuh 2, 3, 2 +; PWR8-NEXT: vspltish v3, 3 +; PWR8-NEXT: vpopcnth v2, v2 +; PWR8-NEXT: vcmpgtuh v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_3_v8i16: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltish 3, 3 -; PWR9-NEXT: vpopcnth 2, 2 -; PWR9-NEXT: vcmpgtuh 2, 3, 2 +; PWR9-NEXT: vspltish v3, 3 +; PWR9-NEXT: vpopcnth v2, v2 +; PWR9-NEXT: vcmpgtuh v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0) %3 = icmp ult <8 x i16> %2, @@ -1397,109 +1401,109 @@ define <8 x i16> @ult_3_v8i16(<8 x i16> %0) { define <8 x i16> @ugt_3_v8i16(<8 x i16> %0) { ; PWR5-LABEL: ugt_3_v8i16: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI16_0@toc@ha -; PWR5-NEXT: vspltish 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI16_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI16_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI16_1@toc@l -; PWR5-NEXT: vsrh 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 2 -; PWR5-NEXT: vsubuhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 4 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vmladduhm 2, 2, 4, 3 -; PWR5-NEXT: vspltish 3, 8 -; PWR5-NEXT: vsrh 2, 2, 3 -; PWR5-NEXT: vspltish 3, 3 -; PWR5-NEXT: vcmpgtuh 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI16_0@toc@ha +; PWR5-NEXT: vspltish v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI16_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI16_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI16_1@toc@l +; PWR5-NEXT: vsrh v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 2 +; PWR5-NEXT: vsubuhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 4 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vmladduhm v2, v2, v4, v3 +; PWR5-NEXT: vspltish v3, 8 +; PWR5-NEXT: vsrh v2, v2, v3 +; PWR5-NEXT: vspltish v3, 3 +; PWR5-NEXT: vcmpgtuh v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_3_v8i16: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI16_0@toc@ha -; PWR6-NEXT: vspltish 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI16_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI16_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI16_1@toc@l -; PWR6-NEXT: vsrh 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 2 -; PWR6-NEXT: vsubuhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 4 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vmladduhm 2, 2, 4, 3 -; PWR6-NEXT: vspltish 3, 8 -; PWR6-NEXT: vsrh 2, 2, 3 -; PWR6-NEXT: vspltish 3, 3 -; PWR6-NEXT: vcmpgtuh 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI16_0@toc@ha +; PWR6-NEXT: vspltish v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI16_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI16_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI16_1@toc@l +; PWR6-NEXT: vsrh v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 2 +; PWR6-NEXT: vsubuhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 4 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vmladduhm v2, v2, v4, v3 +; PWR6-NEXT: vspltish v3, 8 +; PWR6-NEXT: vsrh v2, v2, v3 +; PWR6-NEXT: vspltish v3, 3 +; PWR6-NEXT: vcmpgtuh v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_3_v8i16: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltish 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI16_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI16_0@toc@l -; PWR7-NEXT: vspltish 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI16_1@toc@ha -; PWR7-NEXT: vspltish 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI16_1@toc@l -; PWR7-NEXT: vsrh 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltish 6, 8 -; PWR7-NEXT: vspltish 7, 3 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 5 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vxor 3, 3, 3 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmladduhm 2, 2, 1, 3 -; PWR7-NEXT: vsrh 2, 2, 6 -; PWR7-NEXT: vcmpgtuh 2, 2, 7 +; PWR7-NEXT: vspltish v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI16_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI16_0@toc@l +; PWR7-NEXT: vspltish v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI16_1@toc@ha +; PWR7-NEXT: vspltish v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI16_1@toc@l +; PWR7-NEXT: vsrh v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltish v6, 8 +; PWR7-NEXT: vspltish v7, 3 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v5 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vxor v3, v3, v3 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmladduhm v2, v2, v1, v3 +; PWR7-NEXT: vsrh v2, v2, v6 +; PWR7-NEXT: vcmpgtuh v2, v2, v7 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_3_v8i16: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltish 3, 3 -; PWR8-NEXT: vpopcnth 2, 2 -; PWR8-NEXT: vcmpgtuh 2, 2, 3 +; PWR8-NEXT: vspltish v3, 3 +; PWR8-NEXT: vpopcnth v2, v2 +; PWR8-NEXT: vcmpgtuh v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_3_v8i16: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltish 3, 3 -; PWR9-NEXT: vpopcnth 2, 2 -; PWR9-NEXT: vcmpgtuh 2, 2, 3 +; PWR9-NEXT: vspltish v3, 3 +; PWR9-NEXT: vpopcnth v2, v2 +; PWR9-NEXT: vcmpgtuh v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0) %3 = icmp ugt <8 x i16> %2, @@ -1510,106 +1514,106 @@ define <8 x i16> @ugt_3_v8i16(<8 x i16> %0) { define <8 x i16> @ult_4_v8i16(<8 x i16> %0) { ; PWR5-LABEL: ult_4_v8i16: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI17_0@toc@ha -; PWR5-NEXT: vspltish 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI17_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI17_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI17_1@toc@l -; PWR5-NEXT: vsrh 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 2 -; PWR5-NEXT: vsubuhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 4 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 15 -; PWR5-NEXT: vand 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vmladduhm 2, 2, 4, 3 -; PWR5-NEXT: vspltish 3, 8 -; PWR5-NEXT: vsrh 2, 2, 3 -; PWR5-NEXT: vcmpgtuh 2, 5, 2 +; PWR5-NEXT: addis r3, r2, .LCPI17_0@toc@ha +; PWR5-NEXT: vspltish v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI17_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI17_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI17_1@toc@l +; PWR5-NEXT: vsrh v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 2 +; PWR5-NEXT: vsubuhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 4 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 15 +; PWR5-NEXT: vand v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vmladduhm v2, v2, v4, v3 +; PWR5-NEXT: vspltish v3, 8 +; PWR5-NEXT: vsrh v2, v2, v3 +; PWR5-NEXT: vcmpgtuh v2, v5, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_4_v8i16: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI17_0@toc@ha -; PWR6-NEXT: vspltish 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI17_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI17_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI17_1@toc@l -; PWR6-NEXT: vsrh 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 2 -; PWR6-NEXT: vsubuhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 4 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 15 -; PWR6-NEXT: vand 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vmladduhm 2, 2, 4, 3 -; PWR6-NEXT: vspltish 3, 8 -; PWR6-NEXT: vsrh 2, 2, 3 -; PWR6-NEXT: vcmpgtuh 2, 5, 2 +; PWR6-NEXT: addis r3, r2, .LCPI17_0@toc@ha +; PWR6-NEXT: vspltish v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI17_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI17_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI17_1@toc@l +; PWR6-NEXT: vsrh v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 2 +; PWR6-NEXT: vsubuhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 4 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 15 +; PWR6-NEXT: vand v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vmladduhm v2, v2, v4, v3 +; PWR6-NEXT: vspltish v3, 8 +; PWR6-NEXT: vsrh v2, v2, v3 +; PWR6-NEXT: vcmpgtuh v2, v5, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_4_v8i16: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltish 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI17_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI17_0@toc@l -; PWR7-NEXT: vspltish 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI17_1@toc@ha -; PWR7-NEXT: vspltish 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI17_1@toc@l -; PWR7-NEXT: vsrh 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltish 6, 8 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 5 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vxor 3, 3, 3 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmladduhm 2, 2, 1, 3 -; PWR7-NEXT: vsrh 2, 2, 6 -; PWR7-NEXT: vcmpgtuh 2, 5, 2 +; PWR7-NEXT: vspltish v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI17_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI17_0@toc@l +; PWR7-NEXT: vspltish v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI17_1@toc@ha +; PWR7-NEXT: vspltish v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI17_1@toc@l +; PWR7-NEXT: vsrh v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltish v6, 8 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v5 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vxor v3, v3, v3 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmladduhm v2, v2, v1, v3 +; PWR7-NEXT: vsrh v2, v2, v6 +; PWR7-NEXT: vcmpgtuh v2, v5, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_4_v8i16: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltish 3, 4 -; PWR8-NEXT: vpopcnth 2, 2 -; PWR8-NEXT: vcmpgtuh 2, 3, 2 +; PWR8-NEXT: vspltish v3, 4 +; PWR8-NEXT: vpopcnth v2, v2 +; PWR8-NEXT: vcmpgtuh v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_4_v8i16: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltish 3, 4 -; PWR9-NEXT: vpopcnth 2, 2 -; PWR9-NEXT: vcmpgtuh 2, 3, 2 +; PWR9-NEXT: vspltish v3, 4 +; PWR9-NEXT: vpopcnth v2, v2 +; PWR9-NEXT: vcmpgtuh v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0) %3 = icmp ult <8 x i16> %2, @@ -1620,106 +1624,106 @@ define <8 x i16> @ult_4_v8i16(<8 x i16> %0) { define <8 x i16> @ugt_4_v8i16(<8 x i16> %0) { ; PWR5-LABEL: ugt_4_v8i16: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI18_0@toc@ha -; PWR5-NEXT: vspltish 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI18_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI18_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI18_1@toc@l -; PWR5-NEXT: vsrh 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 2 -; PWR5-NEXT: vsubuhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 4 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 15 -; PWR5-NEXT: vand 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vmladduhm 2, 2, 4, 3 -; PWR5-NEXT: vspltish 3, 8 -; PWR5-NEXT: vsrh 2, 2, 3 -; PWR5-NEXT: vcmpgtuh 2, 2, 5 +; PWR5-NEXT: addis r3, r2, .LCPI18_0@toc@ha +; PWR5-NEXT: vspltish v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI18_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI18_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI18_1@toc@l +; PWR5-NEXT: vsrh v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 2 +; PWR5-NEXT: vsubuhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 4 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 15 +; PWR5-NEXT: vand v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vmladduhm v2, v2, v4, v3 +; PWR5-NEXT: vspltish v3, 8 +; PWR5-NEXT: vsrh v2, v2, v3 +; PWR5-NEXT: vcmpgtuh v2, v2, v5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_4_v8i16: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI18_0@toc@ha -; PWR6-NEXT: vspltish 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI18_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI18_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI18_1@toc@l -; PWR6-NEXT: vsrh 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 2 -; PWR6-NEXT: vsubuhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 4 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 15 -; PWR6-NEXT: vand 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vmladduhm 2, 2, 4, 3 -; PWR6-NEXT: vspltish 3, 8 -; PWR6-NEXT: vsrh 2, 2, 3 -; PWR6-NEXT: vcmpgtuh 2, 2, 5 +; PWR6-NEXT: addis r3, r2, .LCPI18_0@toc@ha +; PWR6-NEXT: vspltish v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI18_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI18_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI18_1@toc@l +; PWR6-NEXT: vsrh v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 2 +; PWR6-NEXT: vsubuhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 4 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 15 +; PWR6-NEXT: vand v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vmladduhm v2, v2, v4, v3 +; PWR6-NEXT: vspltish v3, 8 +; PWR6-NEXT: vsrh v2, v2, v3 +; PWR6-NEXT: vcmpgtuh v2, v2, v5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_4_v8i16: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltish 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI18_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI18_0@toc@l -; PWR7-NEXT: vspltish 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI18_1@toc@ha -; PWR7-NEXT: vspltish 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI18_1@toc@l -; PWR7-NEXT: vsrh 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltish 6, 8 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 5 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vxor 3, 3, 3 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmladduhm 2, 2, 1, 3 -; PWR7-NEXT: vsrh 2, 2, 6 -; PWR7-NEXT: vcmpgtuh 2, 2, 5 +; PWR7-NEXT: vspltish v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI18_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI18_0@toc@l +; PWR7-NEXT: vspltish v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI18_1@toc@ha +; PWR7-NEXT: vspltish v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI18_1@toc@l +; PWR7-NEXT: vsrh v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltish v6, 8 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v5 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vxor v3, v3, v3 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmladduhm v2, v2, v1, v3 +; PWR7-NEXT: vsrh v2, v2, v6 +; PWR7-NEXT: vcmpgtuh v2, v2, v5 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_4_v8i16: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltish 3, 4 -; PWR8-NEXT: vpopcnth 2, 2 -; PWR8-NEXT: vcmpgtuh 2, 2, 3 +; PWR8-NEXT: vspltish v3, 4 +; PWR8-NEXT: vpopcnth v2, v2 +; PWR8-NEXT: vcmpgtuh v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_4_v8i16: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltish 3, 4 -; PWR9-NEXT: vpopcnth 2, 2 -; PWR9-NEXT: vcmpgtuh 2, 2, 3 +; PWR9-NEXT: vspltish v3, 4 +; PWR9-NEXT: vpopcnth v2, v2 +; PWR9-NEXT: vcmpgtuh v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0) %3 = icmp ugt <8 x i16> %2, @@ -1730,109 +1734,109 @@ define <8 x i16> @ugt_4_v8i16(<8 x i16> %0) { define <8 x i16> @ult_5_v8i16(<8 x i16> %0) { ; PWR5-LABEL: ult_5_v8i16: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI19_0@toc@ha -; PWR5-NEXT: vspltish 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI19_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI19_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI19_1@toc@l -; PWR5-NEXT: vsrh 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 2 -; PWR5-NEXT: vsubuhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 4 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vmladduhm 2, 2, 4, 3 -; PWR5-NEXT: vspltish 3, 8 -; PWR5-NEXT: vsrh 2, 2, 3 -; PWR5-NEXT: vspltish 3, 5 -; PWR5-NEXT: vcmpgtuh 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI19_0@toc@ha +; PWR5-NEXT: vspltish v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI19_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI19_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI19_1@toc@l +; PWR5-NEXT: vsrh v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 2 +; PWR5-NEXT: vsubuhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 4 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vmladduhm v2, v2, v4, v3 +; PWR5-NEXT: vspltish v3, 8 +; PWR5-NEXT: vsrh v2, v2, v3 +; PWR5-NEXT: vspltish v3, 5 +; PWR5-NEXT: vcmpgtuh v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_5_v8i16: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI19_0@toc@ha -; PWR6-NEXT: vspltish 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI19_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI19_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI19_1@toc@l -; PWR6-NEXT: vsrh 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 2 -; PWR6-NEXT: vsubuhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 4 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vmladduhm 2, 2, 4, 3 -; PWR6-NEXT: vspltish 3, 8 -; PWR6-NEXT: vsrh 2, 2, 3 -; PWR6-NEXT: vspltish 3, 5 -; PWR6-NEXT: vcmpgtuh 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI19_0@toc@ha +; PWR6-NEXT: vspltish v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI19_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI19_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI19_1@toc@l +; PWR6-NEXT: vsrh v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 2 +; PWR6-NEXT: vsubuhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 4 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vmladduhm v2, v2, v4, v3 +; PWR6-NEXT: vspltish v3, 8 +; PWR6-NEXT: vsrh v2, v2, v3 +; PWR6-NEXT: vspltish v3, 5 +; PWR6-NEXT: vcmpgtuh v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_5_v8i16: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltish 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI19_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI19_0@toc@l -; PWR7-NEXT: vspltish 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI19_1@toc@ha -; PWR7-NEXT: vspltish 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI19_1@toc@l -; PWR7-NEXT: vsrh 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltish 6, 8 -; PWR7-NEXT: vspltish 7, 5 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 5 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vxor 3, 3, 3 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmladduhm 2, 2, 1, 3 -; PWR7-NEXT: vsrh 2, 2, 6 -; PWR7-NEXT: vcmpgtuh 2, 7, 2 +; PWR7-NEXT: vspltish v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI19_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI19_0@toc@l +; PWR7-NEXT: vspltish v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI19_1@toc@ha +; PWR7-NEXT: vspltish v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI19_1@toc@l +; PWR7-NEXT: vsrh v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltish v6, 8 +; PWR7-NEXT: vspltish v7, 5 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v5 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vxor v3, v3, v3 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmladduhm v2, v2, v1, v3 +; PWR7-NEXT: vsrh v2, v2, v6 +; PWR7-NEXT: vcmpgtuh v2, v7, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_5_v8i16: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltish 3, 5 -; PWR8-NEXT: vpopcnth 2, 2 -; PWR8-NEXT: vcmpgtuh 2, 3, 2 +; PWR8-NEXT: vspltish v3, 5 +; PWR8-NEXT: vpopcnth v2, v2 +; PWR8-NEXT: vcmpgtuh v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_5_v8i16: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltish 3, 5 -; PWR9-NEXT: vpopcnth 2, 2 -; PWR9-NEXT: vcmpgtuh 2, 3, 2 +; PWR9-NEXT: vspltish v3, 5 +; PWR9-NEXT: vpopcnth v2, v2 +; PWR9-NEXT: vcmpgtuh v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0) %3 = icmp ult <8 x i16> %2, @@ -1843,109 +1847,109 @@ define <8 x i16> @ult_5_v8i16(<8 x i16> %0) { define <8 x i16> @ugt_5_v8i16(<8 x i16> %0) { ; PWR5-LABEL: ugt_5_v8i16: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI20_0@toc@ha -; PWR5-NEXT: vspltish 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI20_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI20_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI20_1@toc@l -; PWR5-NEXT: vsrh 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 2 -; PWR5-NEXT: vsubuhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 4 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vmladduhm 2, 2, 4, 3 -; PWR5-NEXT: vspltish 3, 8 -; PWR5-NEXT: vsrh 2, 2, 3 -; PWR5-NEXT: vspltish 3, 5 -; PWR5-NEXT: vcmpgtuh 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI20_0@toc@ha +; PWR5-NEXT: vspltish v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI20_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI20_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI20_1@toc@l +; PWR5-NEXT: vsrh v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 2 +; PWR5-NEXT: vsubuhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 4 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vmladduhm v2, v2, v4, v3 +; PWR5-NEXT: vspltish v3, 8 +; PWR5-NEXT: vsrh v2, v2, v3 +; PWR5-NEXT: vspltish v3, 5 +; PWR5-NEXT: vcmpgtuh v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_5_v8i16: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI20_0@toc@ha -; PWR6-NEXT: vspltish 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI20_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI20_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI20_1@toc@l -; PWR6-NEXT: vsrh 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 2 -; PWR6-NEXT: vsubuhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 4 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vmladduhm 2, 2, 4, 3 -; PWR6-NEXT: vspltish 3, 8 -; PWR6-NEXT: vsrh 2, 2, 3 -; PWR6-NEXT: vspltish 3, 5 -; PWR6-NEXT: vcmpgtuh 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI20_0@toc@ha +; PWR6-NEXT: vspltish v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI20_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI20_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI20_1@toc@l +; PWR6-NEXT: vsrh v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 2 +; PWR6-NEXT: vsubuhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 4 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vmladduhm v2, v2, v4, v3 +; PWR6-NEXT: vspltish v3, 8 +; PWR6-NEXT: vsrh v2, v2, v3 +; PWR6-NEXT: vspltish v3, 5 +; PWR6-NEXT: vcmpgtuh v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_5_v8i16: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltish 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI20_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI20_0@toc@l -; PWR7-NEXT: vspltish 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI20_1@toc@ha -; PWR7-NEXT: vspltish 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI20_1@toc@l -; PWR7-NEXT: vsrh 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltish 6, 8 -; PWR7-NEXT: vspltish 7, 5 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 5 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vxor 3, 3, 3 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmladduhm 2, 2, 1, 3 -; PWR7-NEXT: vsrh 2, 2, 6 -; PWR7-NEXT: vcmpgtuh 2, 2, 7 +; PWR7-NEXT: vspltish v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI20_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI20_0@toc@l +; PWR7-NEXT: vspltish v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI20_1@toc@ha +; PWR7-NEXT: vspltish v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI20_1@toc@l +; PWR7-NEXT: vsrh v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltish v6, 8 +; PWR7-NEXT: vspltish v7, 5 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v5 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vxor v3, v3, v3 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmladduhm v2, v2, v1, v3 +; PWR7-NEXT: vsrh v2, v2, v6 +; PWR7-NEXT: vcmpgtuh v2, v2, v7 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_5_v8i16: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltish 3, 5 -; PWR8-NEXT: vpopcnth 2, 2 -; PWR8-NEXT: vcmpgtuh 2, 2, 3 +; PWR8-NEXT: vspltish v3, 5 +; PWR8-NEXT: vpopcnth v2, v2 +; PWR8-NEXT: vcmpgtuh v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_5_v8i16: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltish 3, 5 -; PWR9-NEXT: vpopcnth 2, 2 -; PWR9-NEXT: vcmpgtuh 2, 2, 3 +; PWR9-NEXT: vspltish v3, 5 +; PWR9-NEXT: vpopcnth v2, v2 +; PWR9-NEXT: vcmpgtuh v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0) %3 = icmp ugt <8 x i16> %2, @@ -1956,109 +1960,109 @@ define <8 x i16> @ugt_5_v8i16(<8 x i16> %0) { define <8 x i16> @ult_6_v8i16(<8 x i16> %0) { ; PWR5-LABEL: ult_6_v8i16: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI21_0@toc@ha -; PWR5-NEXT: vspltish 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI21_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI21_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI21_1@toc@l -; PWR5-NEXT: vsrh 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 2 -; PWR5-NEXT: vsubuhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 4 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vmladduhm 2, 2, 4, 3 -; PWR5-NEXT: vspltish 3, 8 -; PWR5-NEXT: vsrh 2, 2, 3 -; PWR5-NEXT: vspltish 3, 6 -; PWR5-NEXT: vcmpgtuh 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI21_0@toc@ha +; PWR5-NEXT: vspltish v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI21_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI21_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI21_1@toc@l +; PWR5-NEXT: vsrh v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 2 +; PWR5-NEXT: vsubuhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 4 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vmladduhm v2, v2, v4, v3 +; PWR5-NEXT: vspltish v3, 8 +; PWR5-NEXT: vsrh v2, v2, v3 +; PWR5-NEXT: vspltish v3, 6 +; PWR5-NEXT: vcmpgtuh v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_6_v8i16: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI21_0@toc@ha -; PWR6-NEXT: vspltish 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI21_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI21_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI21_1@toc@l -; PWR6-NEXT: vsrh 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 2 -; PWR6-NEXT: vsubuhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 4 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vmladduhm 2, 2, 4, 3 -; PWR6-NEXT: vspltish 3, 8 -; PWR6-NEXT: vsrh 2, 2, 3 -; PWR6-NEXT: vspltish 3, 6 -; PWR6-NEXT: vcmpgtuh 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI21_0@toc@ha +; PWR6-NEXT: vspltish v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI21_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI21_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI21_1@toc@l +; PWR6-NEXT: vsrh v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 2 +; PWR6-NEXT: vsubuhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 4 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vmladduhm v2, v2, v4, v3 +; PWR6-NEXT: vspltish v3, 8 +; PWR6-NEXT: vsrh v2, v2, v3 +; PWR6-NEXT: vspltish v3, 6 +; PWR6-NEXT: vcmpgtuh v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_6_v8i16: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltish 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI21_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI21_0@toc@l -; PWR7-NEXT: vspltish 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI21_1@toc@ha -; PWR7-NEXT: vspltish 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI21_1@toc@l -; PWR7-NEXT: vsrh 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltish 6, 8 -; PWR7-NEXT: vspltish 7, 6 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 5 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vxor 3, 3, 3 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmladduhm 2, 2, 1, 3 -; PWR7-NEXT: vsrh 2, 2, 6 -; PWR7-NEXT: vcmpgtuh 2, 7, 2 +; PWR7-NEXT: vspltish v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI21_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI21_0@toc@l +; PWR7-NEXT: vspltish v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI21_1@toc@ha +; PWR7-NEXT: vspltish v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI21_1@toc@l +; PWR7-NEXT: vsrh v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltish v6, 8 +; PWR7-NEXT: vspltish v7, 6 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v5 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vxor v3, v3, v3 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmladduhm v2, v2, v1, v3 +; PWR7-NEXT: vsrh v2, v2, v6 +; PWR7-NEXT: vcmpgtuh v2, v7, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_6_v8i16: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltish 3, 6 -; PWR8-NEXT: vpopcnth 2, 2 -; PWR8-NEXT: vcmpgtuh 2, 3, 2 +; PWR8-NEXT: vspltish v3, 6 +; PWR8-NEXT: vpopcnth v2, v2 +; PWR8-NEXT: vcmpgtuh v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_6_v8i16: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltish 3, 6 -; PWR9-NEXT: vpopcnth 2, 2 -; PWR9-NEXT: vcmpgtuh 2, 3, 2 +; PWR9-NEXT: vspltish v3, 6 +; PWR9-NEXT: vpopcnth v2, v2 +; PWR9-NEXT: vcmpgtuh v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0) %3 = icmp ult <8 x i16> %2, @@ -2069,109 +2073,109 @@ define <8 x i16> @ult_6_v8i16(<8 x i16> %0) { define <8 x i16> @ugt_6_v8i16(<8 x i16> %0) { ; PWR5-LABEL: ugt_6_v8i16: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI22_0@toc@ha -; PWR5-NEXT: vspltish 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI22_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI22_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI22_1@toc@l -; PWR5-NEXT: vsrh 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 2 -; PWR5-NEXT: vsubuhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 4 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vmladduhm 2, 2, 4, 3 -; PWR5-NEXT: vspltish 3, 8 -; PWR5-NEXT: vsrh 2, 2, 3 -; PWR5-NEXT: vspltish 3, 6 -; PWR5-NEXT: vcmpgtuh 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI22_0@toc@ha +; PWR5-NEXT: vspltish v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI22_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI22_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI22_1@toc@l +; PWR5-NEXT: vsrh v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 2 +; PWR5-NEXT: vsubuhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 4 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vmladduhm v2, v2, v4, v3 +; PWR5-NEXT: vspltish v3, 8 +; PWR5-NEXT: vsrh v2, v2, v3 +; PWR5-NEXT: vspltish v3, 6 +; PWR5-NEXT: vcmpgtuh v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_6_v8i16: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI22_0@toc@ha -; PWR6-NEXT: vspltish 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI22_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI22_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI22_1@toc@l -; PWR6-NEXT: vsrh 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 2 -; PWR6-NEXT: vsubuhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 4 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vmladduhm 2, 2, 4, 3 -; PWR6-NEXT: vspltish 3, 8 -; PWR6-NEXT: vsrh 2, 2, 3 -; PWR6-NEXT: vspltish 3, 6 -; PWR6-NEXT: vcmpgtuh 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI22_0@toc@ha +; PWR6-NEXT: vspltish v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI22_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI22_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI22_1@toc@l +; PWR6-NEXT: vsrh v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 2 +; PWR6-NEXT: vsubuhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 4 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vmladduhm v2, v2, v4, v3 +; PWR6-NEXT: vspltish v3, 8 +; PWR6-NEXT: vsrh v2, v2, v3 +; PWR6-NEXT: vspltish v3, 6 +; PWR6-NEXT: vcmpgtuh v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_6_v8i16: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltish 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI22_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI22_0@toc@l -; PWR7-NEXT: vspltish 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI22_1@toc@ha -; PWR7-NEXT: vspltish 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI22_1@toc@l -; PWR7-NEXT: vsrh 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltish 6, 8 -; PWR7-NEXT: vspltish 7, 6 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 5 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vxor 3, 3, 3 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmladduhm 2, 2, 1, 3 -; PWR7-NEXT: vsrh 2, 2, 6 -; PWR7-NEXT: vcmpgtuh 2, 2, 7 +; PWR7-NEXT: vspltish v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI22_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI22_0@toc@l +; PWR7-NEXT: vspltish v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI22_1@toc@ha +; PWR7-NEXT: vspltish v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI22_1@toc@l +; PWR7-NEXT: vsrh v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltish v6, 8 +; PWR7-NEXT: vspltish v7, 6 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v5 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vxor v3, v3, v3 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmladduhm v2, v2, v1, v3 +; PWR7-NEXT: vsrh v2, v2, v6 +; PWR7-NEXT: vcmpgtuh v2, v2, v7 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_6_v8i16: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltish 3, 6 -; PWR8-NEXT: vpopcnth 2, 2 -; PWR8-NEXT: vcmpgtuh 2, 2, 3 +; PWR8-NEXT: vspltish v3, 6 +; PWR8-NEXT: vpopcnth v2, v2 +; PWR8-NEXT: vcmpgtuh v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_6_v8i16: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltish 3, 6 -; PWR9-NEXT: vpopcnth 2, 2 -; PWR9-NEXT: vcmpgtuh 2, 2, 3 +; PWR9-NEXT: vspltish v3, 6 +; PWR9-NEXT: vpopcnth v2, v2 +; PWR9-NEXT: vcmpgtuh v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0) %3 = icmp ugt <8 x i16> %2, @@ -2182,109 +2186,109 @@ define <8 x i16> @ugt_6_v8i16(<8 x i16> %0) { define <8 x i16> @ult_7_v8i16(<8 x i16> %0) { ; PWR5-LABEL: ult_7_v8i16: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI23_0@toc@ha -; PWR5-NEXT: vspltish 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI23_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI23_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI23_1@toc@l -; PWR5-NEXT: vsrh 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 2 -; PWR5-NEXT: vsubuhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 4 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vmladduhm 2, 2, 4, 3 -; PWR5-NEXT: vspltish 3, 8 -; PWR5-NEXT: vsrh 2, 2, 3 -; PWR5-NEXT: vspltish 3, 7 -; PWR5-NEXT: vcmpgtuh 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI23_0@toc@ha +; PWR5-NEXT: vspltish v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI23_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI23_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI23_1@toc@l +; PWR5-NEXT: vsrh v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 2 +; PWR5-NEXT: vsubuhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 4 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vmladduhm v2, v2, v4, v3 +; PWR5-NEXT: vspltish v3, 8 +; PWR5-NEXT: vsrh v2, v2, v3 +; PWR5-NEXT: vspltish v3, 7 +; PWR5-NEXT: vcmpgtuh v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_7_v8i16: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI23_0@toc@ha -; PWR6-NEXT: vspltish 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI23_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI23_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI23_1@toc@l -; PWR6-NEXT: vsrh 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 2 -; PWR6-NEXT: vsubuhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 4 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vmladduhm 2, 2, 4, 3 -; PWR6-NEXT: vspltish 3, 8 -; PWR6-NEXT: vsrh 2, 2, 3 -; PWR6-NEXT: vspltish 3, 7 -; PWR6-NEXT: vcmpgtuh 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI23_0@toc@ha +; PWR6-NEXT: vspltish v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI23_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI23_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI23_1@toc@l +; PWR6-NEXT: vsrh v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 2 +; PWR6-NEXT: vsubuhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 4 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vmladduhm v2, v2, v4, v3 +; PWR6-NEXT: vspltish v3, 8 +; PWR6-NEXT: vsrh v2, v2, v3 +; PWR6-NEXT: vspltish v3, 7 +; PWR6-NEXT: vcmpgtuh v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_7_v8i16: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltish 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI23_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI23_0@toc@l -; PWR7-NEXT: vspltish 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI23_1@toc@ha -; PWR7-NEXT: vspltish 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI23_1@toc@l -; PWR7-NEXT: vsrh 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltish 6, 8 -; PWR7-NEXT: vspltish 7, 7 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 5 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vxor 3, 3, 3 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmladduhm 2, 2, 1, 3 -; PWR7-NEXT: vsrh 2, 2, 6 -; PWR7-NEXT: vcmpgtuh 2, 7, 2 +; PWR7-NEXT: vspltish v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI23_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI23_0@toc@l +; PWR7-NEXT: vspltish v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI23_1@toc@ha +; PWR7-NEXT: vspltish v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI23_1@toc@l +; PWR7-NEXT: vsrh v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltish v6, 8 +; PWR7-NEXT: vspltish v7, 7 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v5 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vxor v3, v3, v3 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmladduhm v2, v2, v1, v3 +; PWR7-NEXT: vsrh v2, v2, v6 +; PWR7-NEXT: vcmpgtuh v2, v7, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_7_v8i16: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltish 3, 7 -; PWR8-NEXT: vpopcnth 2, 2 -; PWR8-NEXT: vcmpgtuh 2, 3, 2 +; PWR8-NEXT: vspltish v3, 7 +; PWR8-NEXT: vpopcnth v2, v2 +; PWR8-NEXT: vcmpgtuh v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_7_v8i16: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltish 3, 7 -; PWR9-NEXT: vpopcnth 2, 2 -; PWR9-NEXT: vcmpgtuh 2, 3, 2 +; PWR9-NEXT: vspltish v3, 7 +; PWR9-NEXT: vpopcnth v2, v2 +; PWR9-NEXT: vcmpgtuh v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0) %3 = icmp ult <8 x i16> %2, @@ -2295,109 +2299,109 @@ define <8 x i16> @ult_7_v8i16(<8 x i16> %0) { define <8 x i16> @ugt_7_v8i16(<8 x i16> %0) { ; PWR5-LABEL: ugt_7_v8i16: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI24_0@toc@ha -; PWR5-NEXT: vspltish 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI24_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI24_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI24_1@toc@l -; PWR5-NEXT: vsrh 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 2 -; PWR5-NEXT: vsubuhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 4 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vmladduhm 2, 2, 4, 3 -; PWR5-NEXT: vspltish 3, 8 -; PWR5-NEXT: vsrh 2, 2, 3 -; PWR5-NEXT: vspltish 3, 7 -; PWR5-NEXT: vcmpgtuh 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI24_0@toc@ha +; PWR5-NEXT: vspltish v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI24_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI24_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI24_1@toc@l +; PWR5-NEXT: vsrh v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 2 +; PWR5-NEXT: vsubuhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 4 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vmladduhm v2, v2, v4, v3 +; PWR5-NEXT: vspltish v3, 8 +; PWR5-NEXT: vsrh v2, v2, v3 +; PWR5-NEXT: vspltish v3, 7 +; PWR5-NEXT: vcmpgtuh v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_7_v8i16: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI24_0@toc@ha -; PWR6-NEXT: vspltish 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI24_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI24_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI24_1@toc@l -; PWR6-NEXT: vsrh 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 2 -; PWR6-NEXT: vsubuhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 4 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vmladduhm 2, 2, 4, 3 -; PWR6-NEXT: vspltish 3, 8 -; PWR6-NEXT: vsrh 2, 2, 3 -; PWR6-NEXT: vspltish 3, 7 -; PWR6-NEXT: vcmpgtuh 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI24_0@toc@ha +; PWR6-NEXT: vspltish v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI24_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI24_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI24_1@toc@l +; PWR6-NEXT: vsrh v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 2 +; PWR6-NEXT: vsubuhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 4 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vmladduhm v2, v2, v4, v3 +; PWR6-NEXT: vspltish v3, 8 +; PWR6-NEXT: vsrh v2, v2, v3 +; PWR6-NEXT: vspltish v3, 7 +; PWR6-NEXT: vcmpgtuh v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_7_v8i16: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltish 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI24_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI24_0@toc@l -; PWR7-NEXT: vspltish 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI24_1@toc@ha -; PWR7-NEXT: vspltish 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI24_1@toc@l -; PWR7-NEXT: vsrh 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltish 6, 8 -; PWR7-NEXT: vspltish 7, 7 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 5 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vxor 3, 3, 3 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmladduhm 2, 2, 1, 3 -; PWR7-NEXT: vsrh 2, 2, 6 -; PWR7-NEXT: vcmpgtuh 2, 2, 7 +; PWR7-NEXT: vspltish v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI24_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI24_0@toc@l +; PWR7-NEXT: vspltish v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI24_1@toc@ha +; PWR7-NEXT: vspltish v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI24_1@toc@l +; PWR7-NEXT: vsrh v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltish v6, 8 +; PWR7-NEXT: vspltish v7, 7 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v5 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vxor v3, v3, v3 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmladduhm v2, v2, v1, v3 +; PWR7-NEXT: vsrh v2, v2, v6 +; PWR7-NEXT: vcmpgtuh v2, v2, v7 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_7_v8i16: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltish 3, 7 -; PWR8-NEXT: vpopcnth 2, 2 -; PWR8-NEXT: vcmpgtuh 2, 2, 3 +; PWR8-NEXT: vspltish v3, 7 +; PWR8-NEXT: vpopcnth v2, v2 +; PWR8-NEXT: vcmpgtuh v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_7_v8i16: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltish 3, 7 -; PWR9-NEXT: vpopcnth 2, 2 -; PWR9-NEXT: vcmpgtuh 2, 2, 3 +; PWR9-NEXT: vspltish v3, 7 +; PWR9-NEXT: vpopcnth v2, v2 +; PWR9-NEXT: vcmpgtuh v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0) %3 = icmp ugt <8 x i16> %2, @@ -2408,106 +2412,106 @@ define <8 x i16> @ugt_7_v8i16(<8 x i16> %0) { define <8 x i16> @ult_8_v8i16(<8 x i16> %0) { ; PWR5-LABEL: ult_8_v8i16: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI25_0@toc@ha -; PWR5-NEXT: vspltish 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI25_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI25_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI25_1@toc@l -; PWR5-NEXT: vsrh 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 2 -; PWR5-NEXT: vsubuhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 4 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vmladduhm 2, 2, 4, 3 -; PWR5-NEXT: vspltish 3, 8 -; PWR5-NEXT: vsrh 2, 2, 3 -; PWR5-NEXT: vcmpgtuh 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI25_0@toc@ha +; PWR5-NEXT: vspltish v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI25_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI25_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI25_1@toc@l +; PWR5-NEXT: vsrh v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 2 +; PWR5-NEXT: vsubuhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 4 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vmladduhm v2, v2, v4, v3 +; PWR5-NEXT: vspltish v3, 8 +; PWR5-NEXT: vsrh v2, v2, v3 +; PWR5-NEXT: vcmpgtuh v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_8_v8i16: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI25_0@toc@ha -; PWR6-NEXT: vspltish 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI25_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI25_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI25_1@toc@l -; PWR6-NEXT: vsrh 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 2 -; PWR6-NEXT: vsubuhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 4 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vmladduhm 2, 2, 4, 3 -; PWR6-NEXT: vspltish 3, 8 -; PWR6-NEXT: vsrh 2, 2, 3 -; PWR6-NEXT: vcmpgtuh 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI25_0@toc@ha +; PWR6-NEXT: vspltish v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI25_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI25_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI25_1@toc@l +; PWR6-NEXT: vsrh v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 2 +; PWR6-NEXT: vsubuhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 4 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vmladduhm v2, v2, v4, v3 +; PWR6-NEXT: vspltish v3, 8 +; PWR6-NEXT: vsrh v2, v2, v3 +; PWR6-NEXT: vcmpgtuh v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_8_v8i16: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltish 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI25_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI25_0@toc@l -; PWR7-NEXT: vspltish 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI25_1@toc@ha -; PWR7-NEXT: vspltish 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI25_1@toc@l -; PWR7-NEXT: vsrh 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltish 6, 8 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 5 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vxor 3, 3, 3 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmladduhm 2, 2, 1, 3 -; PWR7-NEXT: vsrh 2, 2, 6 -; PWR7-NEXT: vcmpgtuh 2, 6, 2 +; PWR7-NEXT: vspltish v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI25_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI25_0@toc@l +; PWR7-NEXT: vspltish v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI25_1@toc@ha +; PWR7-NEXT: vspltish v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI25_1@toc@l +; PWR7-NEXT: vsrh v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltish v6, 8 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v5 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vxor v3, v3, v3 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmladduhm v2, v2, v1, v3 +; PWR7-NEXT: vsrh v2, v2, v6 +; PWR7-NEXT: vcmpgtuh v2, v6, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_8_v8i16: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltish 3, 8 -; PWR8-NEXT: vpopcnth 2, 2 -; PWR8-NEXT: vcmpgtuh 2, 3, 2 +; PWR8-NEXT: vspltish v3, 8 +; PWR8-NEXT: vpopcnth v2, v2 +; PWR8-NEXT: vcmpgtuh v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_8_v8i16: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltish 3, 8 -; PWR9-NEXT: vpopcnth 2, 2 -; PWR9-NEXT: vcmpgtuh 2, 3, 2 +; PWR9-NEXT: vspltish v3, 8 +; PWR9-NEXT: vpopcnth v2, v2 +; PWR9-NEXT: vcmpgtuh v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0) %3 = icmp ult <8 x i16> %2, @@ -2518,106 +2522,106 @@ define <8 x i16> @ult_8_v8i16(<8 x i16> %0) { define <8 x i16> @ugt_8_v8i16(<8 x i16> %0) { ; PWR5-LABEL: ugt_8_v8i16: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI26_0@toc@ha -; PWR5-NEXT: vspltish 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI26_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI26_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI26_1@toc@l -; PWR5-NEXT: vsrh 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 2 -; PWR5-NEXT: vsubuhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 4 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vmladduhm 2, 2, 4, 3 -; PWR5-NEXT: vspltish 3, 8 -; PWR5-NEXT: vsrh 2, 2, 3 -; PWR5-NEXT: vcmpgtuh 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI26_0@toc@ha +; PWR5-NEXT: vspltish v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI26_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI26_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI26_1@toc@l +; PWR5-NEXT: vsrh v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 2 +; PWR5-NEXT: vsubuhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 4 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vmladduhm v2, v2, v4, v3 +; PWR5-NEXT: vspltish v3, 8 +; PWR5-NEXT: vsrh v2, v2, v3 +; PWR5-NEXT: vcmpgtuh v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_8_v8i16: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI26_0@toc@ha -; PWR6-NEXT: vspltish 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI26_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI26_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI26_1@toc@l -; PWR6-NEXT: vsrh 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 2 -; PWR6-NEXT: vsubuhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 4 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vmladduhm 2, 2, 4, 3 -; PWR6-NEXT: vspltish 3, 8 -; PWR6-NEXT: vsrh 2, 2, 3 -; PWR6-NEXT: vcmpgtuh 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI26_0@toc@ha +; PWR6-NEXT: vspltish v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI26_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI26_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI26_1@toc@l +; PWR6-NEXT: vsrh v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 2 +; PWR6-NEXT: vsubuhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 4 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vmladduhm v2, v2, v4, v3 +; PWR6-NEXT: vspltish v3, 8 +; PWR6-NEXT: vsrh v2, v2, v3 +; PWR6-NEXT: vcmpgtuh v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_8_v8i16: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltish 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI26_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI26_0@toc@l -; PWR7-NEXT: vspltish 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI26_1@toc@ha -; PWR7-NEXT: vspltish 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI26_1@toc@l -; PWR7-NEXT: vsrh 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltish 6, 8 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 5 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vxor 3, 3, 3 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmladduhm 2, 2, 1, 3 -; PWR7-NEXT: vsrh 2, 2, 6 -; PWR7-NEXT: vcmpgtuh 2, 2, 6 +; PWR7-NEXT: vspltish v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI26_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI26_0@toc@l +; PWR7-NEXT: vspltish v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI26_1@toc@ha +; PWR7-NEXT: vspltish v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI26_1@toc@l +; PWR7-NEXT: vsrh v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltish v6, 8 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v5 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vxor v3, v3, v3 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmladduhm v2, v2, v1, v3 +; PWR7-NEXT: vsrh v2, v2, v6 +; PWR7-NEXT: vcmpgtuh v2, v2, v6 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_8_v8i16: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltish 3, 8 -; PWR8-NEXT: vpopcnth 2, 2 -; PWR8-NEXT: vcmpgtuh 2, 2, 3 +; PWR8-NEXT: vspltish v3, 8 +; PWR8-NEXT: vpopcnth v2, v2 +; PWR8-NEXT: vcmpgtuh v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_8_v8i16: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltish 3, 8 -; PWR9-NEXT: vpopcnth 2, 2 -; PWR9-NEXT: vcmpgtuh 2, 2, 3 +; PWR9-NEXT: vspltish v3, 8 +; PWR9-NEXT: vpopcnth v2, v2 +; PWR9-NEXT: vcmpgtuh v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0) %3 = icmp ugt <8 x i16> %2, @@ -2628,109 +2632,109 @@ define <8 x i16> @ugt_8_v8i16(<8 x i16> %0) { define <8 x i16> @ult_9_v8i16(<8 x i16> %0) { ; PWR5-LABEL: ult_9_v8i16: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI27_0@toc@ha -; PWR5-NEXT: vspltish 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI27_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI27_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI27_1@toc@l -; PWR5-NEXT: vsrh 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 2 -; PWR5-NEXT: vsubuhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 4 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vmladduhm 2, 2, 4, 3 -; PWR5-NEXT: vspltish 3, 8 -; PWR5-NEXT: vsrh 2, 2, 3 -; PWR5-NEXT: vspltish 3, 9 -; PWR5-NEXT: vcmpgtuh 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI27_0@toc@ha +; PWR5-NEXT: vspltish v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI27_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI27_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI27_1@toc@l +; PWR5-NEXT: vsrh v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 2 +; PWR5-NEXT: vsubuhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 4 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vmladduhm v2, v2, v4, v3 +; PWR5-NEXT: vspltish v3, 8 +; PWR5-NEXT: vsrh v2, v2, v3 +; PWR5-NEXT: vspltish v3, 9 +; PWR5-NEXT: vcmpgtuh v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_9_v8i16: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI27_0@toc@ha -; PWR6-NEXT: vspltish 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI27_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI27_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI27_1@toc@l -; PWR6-NEXT: vsrh 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 2 -; PWR6-NEXT: vsubuhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 4 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vmladduhm 2, 2, 4, 3 -; PWR6-NEXT: vspltish 3, 8 -; PWR6-NEXT: vsrh 2, 2, 3 -; PWR6-NEXT: vspltish 3, 9 -; PWR6-NEXT: vcmpgtuh 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI27_0@toc@ha +; PWR6-NEXT: vspltish v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI27_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI27_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI27_1@toc@l +; PWR6-NEXT: vsrh v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 2 +; PWR6-NEXT: vsubuhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 4 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vmladduhm v2, v2, v4, v3 +; PWR6-NEXT: vspltish v3, 8 +; PWR6-NEXT: vsrh v2, v2, v3 +; PWR6-NEXT: vspltish v3, 9 +; PWR6-NEXT: vcmpgtuh v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_9_v8i16: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltish 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI27_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI27_0@toc@l -; PWR7-NEXT: vspltish 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI27_1@toc@ha -; PWR7-NEXT: vspltish 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI27_1@toc@l -; PWR7-NEXT: vsrh 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltish 6, 8 -; PWR7-NEXT: vspltish 7, 9 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 5 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vxor 3, 3, 3 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmladduhm 2, 2, 1, 3 -; PWR7-NEXT: vsrh 2, 2, 6 -; PWR7-NEXT: vcmpgtuh 2, 7, 2 +; PWR7-NEXT: vspltish v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI27_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI27_0@toc@l +; PWR7-NEXT: vspltish v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI27_1@toc@ha +; PWR7-NEXT: vspltish v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI27_1@toc@l +; PWR7-NEXT: vsrh v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltish v6, 8 +; PWR7-NEXT: vspltish v7, 9 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v5 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vxor v3, v3, v3 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmladduhm v2, v2, v1, v3 +; PWR7-NEXT: vsrh v2, v2, v6 +; PWR7-NEXT: vcmpgtuh v2, v7, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_9_v8i16: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltish 3, 9 -; PWR8-NEXT: vpopcnth 2, 2 -; PWR8-NEXT: vcmpgtuh 2, 3, 2 +; PWR8-NEXT: vspltish v3, 9 +; PWR8-NEXT: vpopcnth v2, v2 +; PWR8-NEXT: vcmpgtuh v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_9_v8i16: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltish 3, 9 -; PWR9-NEXT: vpopcnth 2, 2 -; PWR9-NEXT: vcmpgtuh 2, 3, 2 +; PWR9-NEXT: vspltish v3, 9 +; PWR9-NEXT: vpopcnth v2, v2 +; PWR9-NEXT: vcmpgtuh v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0) %3 = icmp ult <8 x i16> %2, @@ -2741,109 +2745,109 @@ define <8 x i16> @ult_9_v8i16(<8 x i16> %0) { define <8 x i16> @ugt_9_v8i16(<8 x i16> %0) { ; PWR5-LABEL: ugt_9_v8i16: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI28_0@toc@ha -; PWR5-NEXT: vspltish 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI28_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI28_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI28_1@toc@l -; PWR5-NEXT: vsrh 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 2 -; PWR5-NEXT: vsubuhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 4 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vmladduhm 2, 2, 4, 3 -; PWR5-NEXT: vspltish 3, 8 -; PWR5-NEXT: vsrh 2, 2, 3 -; PWR5-NEXT: vspltish 3, 9 -; PWR5-NEXT: vcmpgtuh 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI28_0@toc@ha +; PWR5-NEXT: vspltish v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI28_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI28_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI28_1@toc@l +; PWR5-NEXT: vsrh v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 2 +; PWR5-NEXT: vsubuhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 4 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vmladduhm v2, v2, v4, v3 +; PWR5-NEXT: vspltish v3, 8 +; PWR5-NEXT: vsrh v2, v2, v3 +; PWR5-NEXT: vspltish v3, 9 +; PWR5-NEXT: vcmpgtuh v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_9_v8i16: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI28_0@toc@ha -; PWR6-NEXT: vspltish 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI28_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI28_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI28_1@toc@l -; PWR6-NEXT: vsrh 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 2 -; PWR6-NEXT: vsubuhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 4 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vmladduhm 2, 2, 4, 3 -; PWR6-NEXT: vspltish 3, 8 -; PWR6-NEXT: vsrh 2, 2, 3 -; PWR6-NEXT: vspltish 3, 9 -; PWR6-NEXT: vcmpgtuh 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI28_0@toc@ha +; PWR6-NEXT: vspltish v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI28_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI28_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI28_1@toc@l +; PWR6-NEXT: vsrh v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 2 +; PWR6-NEXT: vsubuhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 4 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vmladduhm v2, v2, v4, v3 +; PWR6-NEXT: vspltish v3, 8 +; PWR6-NEXT: vsrh v2, v2, v3 +; PWR6-NEXT: vspltish v3, 9 +; PWR6-NEXT: vcmpgtuh v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_9_v8i16: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltish 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI28_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI28_0@toc@l -; PWR7-NEXT: vspltish 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI28_1@toc@ha -; PWR7-NEXT: vspltish 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI28_1@toc@l -; PWR7-NEXT: vsrh 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltish 6, 8 -; PWR7-NEXT: vspltish 7, 9 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 5 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vxor 3, 3, 3 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmladduhm 2, 2, 1, 3 -; PWR7-NEXT: vsrh 2, 2, 6 -; PWR7-NEXT: vcmpgtuh 2, 2, 7 +; PWR7-NEXT: vspltish v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI28_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI28_0@toc@l +; PWR7-NEXT: vspltish v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI28_1@toc@ha +; PWR7-NEXT: vspltish v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI28_1@toc@l +; PWR7-NEXT: vsrh v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltish v6, 8 +; PWR7-NEXT: vspltish v7, 9 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v5 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vxor v3, v3, v3 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmladduhm v2, v2, v1, v3 +; PWR7-NEXT: vsrh v2, v2, v6 +; PWR7-NEXT: vcmpgtuh v2, v2, v7 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_9_v8i16: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltish 3, 9 -; PWR8-NEXT: vpopcnth 2, 2 -; PWR8-NEXT: vcmpgtuh 2, 2, 3 +; PWR8-NEXT: vspltish v3, 9 +; PWR8-NEXT: vpopcnth v2, v2 +; PWR8-NEXT: vcmpgtuh v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_9_v8i16: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltish 3, 9 -; PWR9-NEXT: vpopcnth 2, 2 -; PWR9-NEXT: vcmpgtuh 2, 2, 3 +; PWR9-NEXT: vspltish v3, 9 +; PWR9-NEXT: vpopcnth v2, v2 +; PWR9-NEXT: vcmpgtuh v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0) %3 = icmp ugt <8 x i16> %2, @@ -2854,109 +2858,109 @@ define <8 x i16> @ugt_9_v8i16(<8 x i16> %0) { define <8 x i16> @ult_10_v8i16(<8 x i16> %0) { ; PWR5-LABEL: ult_10_v8i16: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI29_0@toc@ha -; PWR5-NEXT: vspltish 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI29_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI29_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI29_1@toc@l -; PWR5-NEXT: vsrh 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 2 -; PWR5-NEXT: vsubuhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 4 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vmladduhm 2, 2, 4, 3 -; PWR5-NEXT: vspltish 3, 8 -; PWR5-NEXT: vsrh 2, 2, 3 -; PWR5-NEXT: vspltish 3, 10 -; PWR5-NEXT: vcmpgtuh 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI29_0@toc@ha +; PWR5-NEXT: vspltish v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI29_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI29_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI29_1@toc@l +; PWR5-NEXT: vsrh v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 2 +; PWR5-NEXT: vsubuhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 4 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vmladduhm v2, v2, v4, v3 +; PWR5-NEXT: vspltish v3, 8 +; PWR5-NEXT: vsrh v2, v2, v3 +; PWR5-NEXT: vspltish v3, 10 +; PWR5-NEXT: vcmpgtuh v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_10_v8i16: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI29_0@toc@ha -; PWR6-NEXT: vspltish 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI29_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI29_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI29_1@toc@l -; PWR6-NEXT: vsrh 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 2 -; PWR6-NEXT: vsubuhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 4 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vmladduhm 2, 2, 4, 3 -; PWR6-NEXT: vspltish 3, 8 -; PWR6-NEXT: vsrh 2, 2, 3 -; PWR6-NEXT: vspltish 3, 10 -; PWR6-NEXT: vcmpgtuh 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI29_0@toc@ha +; PWR6-NEXT: vspltish v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI29_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI29_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI29_1@toc@l +; PWR6-NEXT: vsrh v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 2 +; PWR6-NEXT: vsubuhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 4 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vmladduhm v2, v2, v4, v3 +; PWR6-NEXT: vspltish v3, 8 +; PWR6-NEXT: vsrh v2, v2, v3 +; PWR6-NEXT: vspltish v3, 10 +; PWR6-NEXT: vcmpgtuh v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_10_v8i16: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltish 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI29_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI29_0@toc@l -; PWR7-NEXT: vspltish 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI29_1@toc@ha -; PWR7-NEXT: vspltish 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI29_1@toc@l -; PWR7-NEXT: vsrh 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltish 6, 8 -; PWR7-NEXT: vspltish 7, 10 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 5 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vxor 3, 3, 3 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmladduhm 2, 2, 1, 3 -; PWR7-NEXT: vsrh 2, 2, 6 -; PWR7-NEXT: vcmpgtuh 2, 7, 2 +; PWR7-NEXT: vspltish v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI29_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI29_0@toc@l +; PWR7-NEXT: vspltish v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI29_1@toc@ha +; PWR7-NEXT: vspltish v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI29_1@toc@l +; PWR7-NEXT: vsrh v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltish v6, 8 +; PWR7-NEXT: vspltish v7, 10 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v5 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vxor v3, v3, v3 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmladduhm v2, v2, v1, v3 +; PWR7-NEXT: vsrh v2, v2, v6 +; PWR7-NEXT: vcmpgtuh v2, v7, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_10_v8i16: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltish 3, 10 -; PWR8-NEXT: vpopcnth 2, 2 -; PWR8-NEXT: vcmpgtuh 2, 3, 2 +; PWR8-NEXT: vspltish v3, 10 +; PWR8-NEXT: vpopcnth v2, v2 +; PWR8-NEXT: vcmpgtuh v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_10_v8i16: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltish 3, 10 -; PWR9-NEXT: vpopcnth 2, 2 -; PWR9-NEXT: vcmpgtuh 2, 3, 2 +; PWR9-NEXT: vspltish v3, 10 +; PWR9-NEXT: vpopcnth v2, v2 +; PWR9-NEXT: vcmpgtuh v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0) %3 = icmp ult <8 x i16> %2, @@ -2967,109 +2971,109 @@ define <8 x i16> @ult_10_v8i16(<8 x i16> %0) { define <8 x i16> @ugt_10_v8i16(<8 x i16> %0) { ; PWR5-LABEL: ugt_10_v8i16: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI30_0@toc@ha -; PWR5-NEXT: vspltish 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI30_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI30_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI30_1@toc@l -; PWR5-NEXT: vsrh 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 2 -; PWR5-NEXT: vsubuhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 4 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vmladduhm 2, 2, 4, 3 -; PWR5-NEXT: vspltish 3, 8 -; PWR5-NEXT: vsrh 2, 2, 3 -; PWR5-NEXT: vspltish 3, 10 -; PWR5-NEXT: vcmpgtuh 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI30_0@toc@ha +; PWR5-NEXT: vspltish v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI30_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI30_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI30_1@toc@l +; PWR5-NEXT: vsrh v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 2 +; PWR5-NEXT: vsubuhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 4 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vmladduhm v2, v2, v4, v3 +; PWR5-NEXT: vspltish v3, 8 +; PWR5-NEXT: vsrh v2, v2, v3 +; PWR5-NEXT: vspltish v3, 10 +; PWR5-NEXT: vcmpgtuh v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_10_v8i16: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI30_0@toc@ha -; PWR6-NEXT: vspltish 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI30_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI30_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI30_1@toc@l -; PWR6-NEXT: vsrh 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 2 -; PWR6-NEXT: vsubuhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 4 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vmladduhm 2, 2, 4, 3 -; PWR6-NEXT: vspltish 3, 8 -; PWR6-NEXT: vsrh 2, 2, 3 -; PWR6-NEXT: vspltish 3, 10 -; PWR6-NEXT: vcmpgtuh 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI30_0@toc@ha +; PWR6-NEXT: vspltish v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI30_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI30_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI30_1@toc@l +; PWR6-NEXT: vsrh v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 2 +; PWR6-NEXT: vsubuhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 4 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vmladduhm v2, v2, v4, v3 +; PWR6-NEXT: vspltish v3, 8 +; PWR6-NEXT: vsrh v2, v2, v3 +; PWR6-NEXT: vspltish v3, 10 +; PWR6-NEXT: vcmpgtuh v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_10_v8i16: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltish 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI30_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI30_0@toc@l -; PWR7-NEXT: vspltish 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI30_1@toc@ha -; PWR7-NEXT: vspltish 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI30_1@toc@l -; PWR7-NEXT: vsrh 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltish 6, 8 -; PWR7-NEXT: vspltish 7, 10 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 5 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vxor 3, 3, 3 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmladduhm 2, 2, 1, 3 -; PWR7-NEXT: vsrh 2, 2, 6 -; PWR7-NEXT: vcmpgtuh 2, 2, 7 +; PWR7-NEXT: vspltish v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI30_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI30_0@toc@l +; PWR7-NEXT: vspltish v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI30_1@toc@ha +; PWR7-NEXT: vspltish v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI30_1@toc@l +; PWR7-NEXT: vsrh v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltish v6, 8 +; PWR7-NEXT: vspltish v7, 10 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v5 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vxor v3, v3, v3 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmladduhm v2, v2, v1, v3 +; PWR7-NEXT: vsrh v2, v2, v6 +; PWR7-NEXT: vcmpgtuh v2, v2, v7 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_10_v8i16: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltish 3, 10 -; PWR8-NEXT: vpopcnth 2, 2 -; PWR8-NEXT: vcmpgtuh 2, 2, 3 +; PWR8-NEXT: vspltish v3, 10 +; PWR8-NEXT: vpopcnth v2, v2 +; PWR8-NEXT: vcmpgtuh v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_10_v8i16: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltish 3, 10 -; PWR9-NEXT: vpopcnth 2, 2 -; PWR9-NEXT: vcmpgtuh 2, 2, 3 +; PWR9-NEXT: vspltish v3, 10 +; PWR9-NEXT: vpopcnth v2, v2 +; PWR9-NEXT: vcmpgtuh v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0) %3 = icmp ugt <8 x i16> %2, @@ -3080,109 +3084,109 @@ define <8 x i16> @ugt_10_v8i16(<8 x i16> %0) { define <8 x i16> @ult_11_v8i16(<8 x i16> %0) { ; PWR5-LABEL: ult_11_v8i16: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI31_0@toc@ha -; PWR5-NEXT: vspltish 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI31_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI31_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI31_1@toc@l -; PWR5-NEXT: vsrh 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 2 -; PWR5-NEXT: vsubuhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 4 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vmladduhm 2, 2, 4, 3 -; PWR5-NEXT: vspltish 3, 8 -; PWR5-NEXT: vsrh 2, 2, 3 -; PWR5-NEXT: vspltish 3, 11 -; PWR5-NEXT: vcmpgtuh 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI31_0@toc@ha +; PWR5-NEXT: vspltish v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI31_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI31_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI31_1@toc@l +; PWR5-NEXT: vsrh v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 2 +; PWR5-NEXT: vsubuhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 4 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vmladduhm v2, v2, v4, v3 +; PWR5-NEXT: vspltish v3, 8 +; PWR5-NEXT: vsrh v2, v2, v3 +; PWR5-NEXT: vspltish v3, 11 +; PWR5-NEXT: vcmpgtuh v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_11_v8i16: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI31_0@toc@ha -; PWR6-NEXT: vspltish 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI31_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI31_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI31_1@toc@l -; PWR6-NEXT: vsrh 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 2 -; PWR6-NEXT: vsubuhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 4 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vmladduhm 2, 2, 4, 3 -; PWR6-NEXT: vspltish 3, 8 -; PWR6-NEXT: vsrh 2, 2, 3 -; PWR6-NEXT: vspltish 3, 11 -; PWR6-NEXT: vcmpgtuh 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI31_0@toc@ha +; PWR6-NEXT: vspltish v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI31_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI31_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI31_1@toc@l +; PWR6-NEXT: vsrh v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 2 +; PWR6-NEXT: vsubuhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 4 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vmladduhm v2, v2, v4, v3 +; PWR6-NEXT: vspltish v3, 8 +; PWR6-NEXT: vsrh v2, v2, v3 +; PWR6-NEXT: vspltish v3, 11 +; PWR6-NEXT: vcmpgtuh v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_11_v8i16: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltish 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI31_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI31_0@toc@l -; PWR7-NEXT: vspltish 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI31_1@toc@ha -; PWR7-NEXT: vspltish 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI31_1@toc@l -; PWR7-NEXT: vsrh 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltish 6, 8 -; PWR7-NEXT: vspltish 7, 11 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 5 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vxor 3, 3, 3 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmladduhm 2, 2, 1, 3 -; PWR7-NEXT: vsrh 2, 2, 6 -; PWR7-NEXT: vcmpgtuh 2, 7, 2 +; PWR7-NEXT: vspltish v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI31_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI31_0@toc@l +; PWR7-NEXT: vspltish v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI31_1@toc@ha +; PWR7-NEXT: vspltish v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI31_1@toc@l +; PWR7-NEXT: vsrh v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltish v6, 8 +; PWR7-NEXT: vspltish v7, 11 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v5 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vxor v3, v3, v3 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmladduhm v2, v2, v1, v3 +; PWR7-NEXT: vsrh v2, v2, v6 +; PWR7-NEXT: vcmpgtuh v2, v7, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_11_v8i16: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltish 3, 11 -; PWR8-NEXT: vpopcnth 2, 2 -; PWR8-NEXT: vcmpgtuh 2, 3, 2 +; PWR8-NEXT: vspltish v3, 11 +; PWR8-NEXT: vpopcnth v2, v2 +; PWR8-NEXT: vcmpgtuh v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_11_v8i16: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltish 3, 11 -; PWR9-NEXT: vpopcnth 2, 2 -; PWR9-NEXT: vcmpgtuh 2, 3, 2 +; PWR9-NEXT: vspltish v3, 11 +; PWR9-NEXT: vpopcnth v2, v2 +; PWR9-NEXT: vcmpgtuh v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0) %3 = icmp ult <8 x i16> %2, @@ -3193,109 +3197,109 @@ define <8 x i16> @ult_11_v8i16(<8 x i16> %0) { define <8 x i16> @ugt_11_v8i16(<8 x i16> %0) { ; PWR5-LABEL: ugt_11_v8i16: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI32_0@toc@ha -; PWR5-NEXT: vspltish 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI32_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI32_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI32_1@toc@l -; PWR5-NEXT: vsrh 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 2 -; PWR5-NEXT: vsubuhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 4 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vmladduhm 2, 2, 4, 3 -; PWR5-NEXT: vspltish 3, 8 -; PWR5-NEXT: vsrh 2, 2, 3 -; PWR5-NEXT: vspltish 3, 11 -; PWR5-NEXT: vcmpgtuh 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI32_0@toc@ha +; PWR5-NEXT: vspltish v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI32_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI32_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI32_1@toc@l +; PWR5-NEXT: vsrh v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 2 +; PWR5-NEXT: vsubuhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 4 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vmladduhm v2, v2, v4, v3 +; PWR5-NEXT: vspltish v3, 8 +; PWR5-NEXT: vsrh v2, v2, v3 +; PWR5-NEXT: vspltish v3, 11 +; PWR5-NEXT: vcmpgtuh v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_11_v8i16: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI32_0@toc@ha -; PWR6-NEXT: vspltish 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI32_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI32_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI32_1@toc@l -; PWR6-NEXT: vsrh 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 2 -; PWR6-NEXT: vsubuhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 4 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vmladduhm 2, 2, 4, 3 -; PWR6-NEXT: vspltish 3, 8 -; PWR6-NEXT: vsrh 2, 2, 3 -; PWR6-NEXT: vspltish 3, 11 -; PWR6-NEXT: vcmpgtuh 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI32_0@toc@ha +; PWR6-NEXT: vspltish v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI32_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI32_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI32_1@toc@l +; PWR6-NEXT: vsrh v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 2 +; PWR6-NEXT: vsubuhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 4 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vmladduhm v2, v2, v4, v3 +; PWR6-NEXT: vspltish v3, 8 +; PWR6-NEXT: vsrh v2, v2, v3 +; PWR6-NEXT: vspltish v3, 11 +; PWR6-NEXT: vcmpgtuh v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_11_v8i16: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltish 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI32_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI32_0@toc@l -; PWR7-NEXT: vspltish 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI32_1@toc@ha -; PWR7-NEXT: vspltish 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI32_1@toc@l -; PWR7-NEXT: vsrh 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltish 6, 8 -; PWR7-NEXT: vspltish 7, 11 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 5 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vxor 3, 3, 3 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmladduhm 2, 2, 1, 3 -; PWR7-NEXT: vsrh 2, 2, 6 -; PWR7-NEXT: vcmpgtuh 2, 2, 7 +; PWR7-NEXT: vspltish v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI32_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI32_0@toc@l +; PWR7-NEXT: vspltish v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI32_1@toc@ha +; PWR7-NEXT: vspltish v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI32_1@toc@l +; PWR7-NEXT: vsrh v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltish v6, 8 +; PWR7-NEXT: vspltish v7, 11 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v5 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vxor v3, v3, v3 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmladduhm v2, v2, v1, v3 +; PWR7-NEXT: vsrh v2, v2, v6 +; PWR7-NEXT: vcmpgtuh v2, v2, v7 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_11_v8i16: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltish 3, 11 -; PWR8-NEXT: vpopcnth 2, 2 -; PWR8-NEXT: vcmpgtuh 2, 2, 3 +; PWR8-NEXT: vspltish v3, 11 +; PWR8-NEXT: vpopcnth v2, v2 +; PWR8-NEXT: vcmpgtuh v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_11_v8i16: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltish 3, 11 -; PWR9-NEXT: vpopcnth 2, 2 -; PWR9-NEXT: vcmpgtuh 2, 2, 3 +; PWR9-NEXT: vspltish v3, 11 +; PWR9-NEXT: vpopcnth v2, v2 +; PWR9-NEXT: vcmpgtuh v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0) %3 = icmp ugt <8 x i16> %2, @@ -3306,109 +3310,109 @@ define <8 x i16> @ugt_11_v8i16(<8 x i16> %0) { define <8 x i16> @ult_12_v8i16(<8 x i16> %0) { ; PWR5-LABEL: ult_12_v8i16: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI33_0@toc@ha -; PWR5-NEXT: vspltish 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI33_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI33_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI33_1@toc@l -; PWR5-NEXT: vsrh 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 2 -; PWR5-NEXT: vsubuhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 4 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vmladduhm 2, 2, 4, 3 -; PWR5-NEXT: vspltish 3, 8 -; PWR5-NEXT: vsrh 2, 2, 3 -; PWR5-NEXT: vspltish 3, 12 -; PWR5-NEXT: vcmpgtuh 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI33_0@toc@ha +; PWR5-NEXT: vspltish v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI33_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI33_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI33_1@toc@l +; PWR5-NEXT: vsrh v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 2 +; PWR5-NEXT: vsubuhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 4 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vmladduhm v2, v2, v4, v3 +; PWR5-NEXT: vspltish v3, 8 +; PWR5-NEXT: vsrh v2, v2, v3 +; PWR5-NEXT: vspltish v3, 12 +; PWR5-NEXT: vcmpgtuh v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_12_v8i16: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI33_0@toc@ha -; PWR6-NEXT: vspltish 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI33_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI33_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI33_1@toc@l -; PWR6-NEXT: vsrh 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 2 -; PWR6-NEXT: vsubuhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 4 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vmladduhm 2, 2, 4, 3 -; PWR6-NEXT: vspltish 3, 8 -; PWR6-NEXT: vsrh 2, 2, 3 -; PWR6-NEXT: vspltish 3, 12 -; PWR6-NEXT: vcmpgtuh 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI33_0@toc@ha +; PWR6-NEXT: vspltish v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI33_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI33_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI33_1@toc@l +; PWR6-NEXT: vsrh v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 2 +; PWR6-NEXT: vsubuhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 4 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vmladduhm v2, v2, v4, v3 +; PWR6-NEXT: vspltish v3, 8 +; PWR6-NEXT: vsrh v2, v2, v3 +; PWR6-NEXT: vspltish v3, 12 +; PWR6-NEXT: vcmpgtuh v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_12_v8i16: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltish 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI33_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI33_0@toc@l -; PWR7-NEXT: vspltish 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI33_1@toc@ha -; PWR7-NEXT: vspltish 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI33_1@toc@l -; PWR7-NEXT: vsrh 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltish 6, 8 -; PWR7-NEXT: vspltish 7, 12 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 5 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vxor 3, 3, 3 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmladduhm 2, 2, 1, 3 -; PWR7-NEXT: vsrh 2, 2, 6 -; PWR7-NEXT: vcmpgtuh 2, 7, 2 +; PWR7-NEXT: vspltish v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI33_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI33_0@toc@l +; PWR7-NEXT: vspltish v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI33_1@toc@ha +; PWR7-NEXT: vspltish v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI33_1@toc@l +; PWR7-NEXT: vsrh v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltish v6, 8 +; PWR7-NEXT: vspltish v7, 12 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v5 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vxor v3, v3, v3 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmladduhm v2, v2, v1, v3 +; PWR7-NEXT: vsrh v2, v2, v6 +; PWR7-NEXT: vcmpgtuh v2, v7, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_12_v8i16: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltish 3, 12 -; PWR8-NEXT: vpopcnth 2, 2 -; PWR8-NEXT: vcmpgtuh 2, 3, 2 +; PWR8-NEXT: vspltish v3, 12 +; PWR8-NEXT: vpopcnth v2, v2 +; PWR8-NEXT: vcmpgtuh v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_12_v8i16: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltish 3, 12 -; PWR9-NEXT: vpopcnth 2, 2 -; PWR9-NEXT: vcmpgtuh 2, 3, 2 +; PWR9-NEXT: vspltish v3, 12 +; PWR9-NEXT: vpopcnth v2, v2 +; PWR9-NEXT: vcmpgtuh v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0) %3 = icmp ult <8 x i16> %2, @@ -3419,109 +3423,109 @@ define <8 x i16> @ult_12_v8i16(<8 x i16> %0) { define <8 x i16> @ugt_12_v8i16(<8 x i16> %0) { ; PWR5-LABEL: ugt_12_v8i16: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI34_0@toc@ha -; PWR5-NEXT: vspltish 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI34_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI34_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI34_1@toc@l -; PWR5-NEXT: vsrh 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 2 -; PWR5-NEXT: vsubuhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 4 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vmladduhm 2, 2, 4, 3 -; PWR5-NEXT: vspltish 3, 8 -; PWR5-NEXT: vsrh 2, 2, 3 -; PWR5-NEXT: vspltish 3, 12 -; PWR5-NEXT: vcmpgtuh 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI34_0@toc@ha +; PWR5-NEXT: vspltish v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI34_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI34_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI34_1@toc@l +; PWR5-NEXT: vsrh v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 2 +; PWR5-NEXT: vsubuhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 4 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vmladduhm v2, v2, v4, v3 +; PWR5-NEXT: vspltish v3, 8 +; PWR5-NEXT: vsrh v2, v2, v3 +; PWR5-NEXT: vspltish v3, 12 +; PWR5-NEXT: vcmpgtuh v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_12_v8i16: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI34_0@toc@ha -; PWR6-NEXT: vspltish 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI34_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI34_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI34_1@toc@l -; PWR6-NEXT: vsrh 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 2 -; PWR6-NEXT: vsubuhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 4 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vmladduhm 2, 2, 4, 3 -; PWR6-NEXT: vspltish 3, 8 -; PWR6-NEXT: vsrh 2, 2, 3 -; PWR6-NEXT: vspltish 3, 12 -; PWR6-NEXT: vcmpgtuh 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI34_0@toc@ha +; PWR6-NEXT: vspltish v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI34_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI34_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI34_1@toc@l +; PWR6-NEXT: vsrh v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 2 +; PWR6-NEXT: vsubuhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 4 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vmladduhm v2, v2, v4, v3 +; PWR6-NEXT: vspltish v3, 8 +; PWR6-NEXT: vsrh v2, v2, v3 +; PWR6-NEXT: vspltish v3, 12 +; PWR6-NEXT: vcmpgtuh v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_12_v8i16: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltish 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI34_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI34_0@toc@l -; PWR7-NEXT: vspltish 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI34_1@toc@ha -; PWR7-NEXT: vspltish 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI34_1@toc@l -; PWR7-NEXT: vsrh 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltish 6, 8 -; PWR7-NEXT: vspltish 7, 12 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 5 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vxor 3, 3, 3 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmladduhm 2, 2, 1, 3 -; PWR7-NEXT: vsrh 2, 2, 6 -; PWR7-NEXT: vcmpgtuh 2, 2, 7 +; PWR7-NEXT: vspltish v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI34_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI34_0@toc@l +; PWR7-NEXT: vspltish v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI34_1@toc@ha +; PWR7-NEXT: vspltish v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI34_1@toc@l +; PWR7-NEXT: vsrh v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltish v6, 8 +; PWR7-NEXT: vspltish v7, 12 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v5 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vxor v3, v3, v3 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmladduhm v2, v2, v1, v3 +; PWR7-NEXT: vsrh v2, v2, v6 +; PWR7-NEXT: vcmpgtuh v2, v2, v7 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_12_v8i16: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltish 3, 12 -; PWR8-NEXT: vpopcnth 2, 2 -; PWR8-NEXT: vcmpgtuh 2, 2, 3 +; PWR8-NEXT: vspltish v3, 12 +; PWR8-NEXT: vpopcnth v2, v2 +; PWR8-NEXT: vcmpgtuh v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_12_v8i16: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltish 3, 12 -; PWR9-NEXT: vpopcnth 2, 2 -; PWR9-NEXT: vcmpgtuh 2, 2, 3 +; PWR9-NEXT: vspltish v3, 12 +; PWR9-NEXT: vpopcnth v2, v2 +; PWR9-NEXT: vcmpgtuh v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0) %3 = icmp ugt <8 x i16> %2, @@ -3532,109 +3536,109 @@ define <8 x i16> @ugt_12_v8i16(<8 x i16> %0) { define <8 x i16> @ult_13_v8i16(<8 x i16> %0) { ; PWR5-LABEL: ult_13_v8i16: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI35_0@toc@ha -; PWR5-NEXT: vspltish 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI35_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI35_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI35_1@toc@l -; PWR5-NEXT: vsrh 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 2 -; PWR5-NEXT: vsubuhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 4 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vmladduhm 2, 2, 4, 3 -; PWR5-NEXT: vspltish 3, 8 -; PWR5-NEXT: vsrh 2, 2, 3 -; PWR5-NEXT: vspltish 3, 13 -; PWR5-NEXT: vcmpgtuh 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI35_0@toc@ha +; PWR5-NEXT: vspltish v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI35_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI35_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI35_1@toc@l +; PWR5-NEXT: vsrh v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 2 +; PWR5-NEXT: vsubuhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 4 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vmladduhm v2, v2, v4, v3 +; PWR5-NEXT: vspltish v3, 8 +; PWR5-NEXT: vsrh v2, v2, v3 +; PWR5-NEXT: vspltish v3, 13 +; PWR5-NEXT: vcmpgtuh v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_13_v8i16: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI35_0@toc@ha -; PWR6-NEXT: vspltish 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI35_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI35_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI35_1@toc@l -; PWR6-NEXT: vsrh 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 2 -; PWR6-NEXT: vsubuhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 4 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vmladduhm 2, 2, 4, 3 -; PWR6-NEXT: vspltish 3, 8 -; PWR6-NEXT: vsrh 2, 2, 3 -; PWR6-NEXT: vspltish 3, 13 -; PWR6-NEXT: vcmpgtuh 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI35_0@toc@ha +; PWR6-NEXT: vspltish v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI35_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI35_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI35_1@toc@l +; PWR6-NEXT: vsrh v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 2 +; PWR6-NEXT: vsubuhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 4 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vmladduhm v2, v2, v4, v3 +; PWR6-NEXT: vspltish v3, 8 +; PWR6-NEXT: vsrh v2, v2, v3 +; PWR6-NEXT: vspltish v3, 13 +; PWR6-NEXT: vcmpgtuh v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_13_v8i16: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltish 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI35_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI35_0@toc@l -; PWR7-NEXT: vspltish 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI35_1@toc@ha -; PWR7-NEXT: vspltish 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI35_1@toc@l -; PWR7-NEXT: vsrh 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltish 6, 8 -; PWR7-NEXT: vspltish 7, 13 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 5 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vxor 3, 3, 3 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmladduhm 2, 2, 1, 3 -; PWR7-NEXT: vsrh 2, 2, 6 -; PWR7-NEXT: vcmpgtuh 2, 7, 2 +; PWR7-NEXT: vspltish v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI35_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI35_0@toc@l +; PWR7-NEXT: vspltish v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI35_1@toc@ha +; PWR7-NEXT: vspltish v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI35_1@toc@l +; PWR7-NEXT: vsrh v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltish v6, 8 +; PWR7-NEXT: vspltish v7, 13 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v5 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vxor v3, v3, v3 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmladduhm v2, v2, v1, v3 +; PWR7-NEXT: vsrh v2, v2, v6 +; PWR7-NEXT: vcmpgtuh v2, v7, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_13_v8i16: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltish 3, 13 -; PWR8-NEXT: vpopcnth 2, 2 -; PWR8-NEXT: vcmpgtuh 2, 3, 2 +; PWR8-NEXT: vspltish v3, 13 +; PWR8-NEXT: vpopcnth v2, v2 +; PWR8-NEXT: vcmpgtuh v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_13_v8i16: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltish 3, 13 -; PWR9-NEXT: vpopcnth 2, 2 -; PWR9-NEXT: vcmpgtuh 2, 3, 2 +; PWR9-NEXT: vspltish v3, 13 +; PWR9-NEXT: vpopcnth v2, v2 +; PWR9-NEXT: vcmpgtuh v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0) %3 = icmp ult <8 x i16> %2, @@ -3645,109 +3649,109 @@ define <8 x i16> @ult_13_v8i16(<8 x i16> %0) { define <8 x i16> @ugt_13_v8i16(<8 x i16> %0) { ; PWR5-LABEL: ugt_13_v8i16: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI36_0@toc@ha -; PWR5-NEXT: vspltish 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI36_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI36_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI36_1@toc@l -; PWR5-NEXT: vsrh 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 2 -; PWR5-NEXT: vsubuhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 4 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vmladduhm 2, 2, 4, 3 -; PWR5-NEXT: vspltish 3, 8 -; PWR5-NEXT: vsrh 2, 2, 3 -; PWR5-NEXT: vspltish 3, 13 -; PWR5-NEXT: vcmpgtuh 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI36_0@toc@ha +; PWR5-NEXT: vspltish v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI36_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI36_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI36_1@toc@l +; PWR5-NEXT: vsrh v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 2 +; PWR5-NEXT: vsubuhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 4 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vmladduhm v2, v2, v4, v3 +; PWR5-NEXT: vspltish v3, 8 +; PWR5-NEXT: vsrh v2, v2, v3 +; PWR5-NEXT: vspltish v3, 13 +; PWR5-NEXT: vcmpgtuh v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_13_v8i16: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI36_0@toc@ha -; PWR6-NEXT: vspltish 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI36_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI36_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI36_1@toc@l -; PWR6-NEXT: vsrh 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 2 -; PWR6-NEXT: vsubuhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 4 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vmladduhm 2, 2, 4, 3 -; PWR6-NEXT: vspltish 3, 8 -; PWR6-NEXT: vsrh 2, 2, 3 -; PWR6-NEXT: vspltish 3, 13 -; PWR6-NEXT: vcmpgtuh 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI36_0@toc@ha +; PWR6-NEXT: vspltish v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI36_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI36_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI36_1@toc@l +; PWR6-NEXT: vsrh v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 2 +; PWR6-NEXT: vsubuhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 4 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vmladduhm v2, v2, v4, v3 +; PWR6-NEXT: vspltish v3, 8 +; PWR6-NEXT: vsrh v2, v2, v3 +; PWR6-NEXT: vspltish v3, 13 +; PWR6-NEXT: vcmpgtuh v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_13_v8i16: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltish 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI36_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI36_0@toc@l -; PWR7-NEXT: vspltish 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI36_1@toc@ha -; PWR7-NEXT: vspltish 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI36_1@toc@l -; PWR7-NEXT: vsrh 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltish 6, 8 -; PWR7-NEXT: vspltish 7, 13 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 5 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vxor 3, 3, 3 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmladduhm 2, 2, 1, 3 -; PWR7-NEXT: vsrh 2, 2, 6 -; PWR7-NEXT: vcmpgtuh 2, 2, 7 +; PWR7-NEXT: vspltish v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI36_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI36_0@toc@l +; PWR7-NEXT: vspltish v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI36_1@toc@ha +; PWR7-NEXT: vspltish v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI36_1@toc@l +; PWR7-NEXT: vsrh v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltish v6, 8 +; PWR7-NEXT: vspltish v7, 13 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v5 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vxor v3, v3, v3 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmladduhm v2, v2, v1, v3 +; PWR7-NEXT: vsrh v2, v2, v6 +; PWR7-NEXT: vcmpgtuh v2, v2, v7 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_13_v8i16: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltish 3, 13 -; PWR8-NEXT: vpopcnth 2, 2 -; PWR8-NEXT: vcmpgtuh 2, 2, 3 +; PWR8-NEXT: vspltish v3, 13 +; PWR8-NEXT: vpopcnth v2, v2 +; PWR8-NEXT: vcmpgtuh v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_13_v8i16: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltish 3, 13 -; PWR9-NEXT: vpopcnth 2, 2 -; PWR9-NEXT: vcmpgtuh 2, 2, 3 +; PWR9-NEXT: vspltish v3, 13 +; PWR9-NEXT: vpopcnth v2, v2 +; PWR9-NEXT: vcmpgtuh v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0) %3 = icmp ugt <8 x i16> %2, @@ -3758,109 +3762,109 @@ define <8 x i16> @ugt_13_v8i16(<8 x i16> %0) { define <8 x i16> @ult_14_v8i16(<8 x i16> %0) { ; PWR5-LABEL: ult_14_v8i16: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI37_0@toc@ha -; PWR5-NEXT: vspltish 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI37_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI37_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI37_1@toc@l -; PWR5-NEXT: vsrh 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 2 -; PWR5-NEXT: vsubuhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 4 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vmladduhm 2, 2, 4, 3 -; PWR5-NEXT: vspltish 3, 8 -; PWR5-NEXT: vsrh 2, 2, 3 -; PWR5-NEXT: vspltish 3, 14 -; PWR5-NEXT: vcmpgtuh 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI37_0@toc@ha +; PWR5-NEXT: vspltish v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI37_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI37_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI37_1@toc@l +; PWR5-NEXT: vsrh v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 2 +; PWR5-NEXT: vsubuhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 4 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vmladduhm v2, v2, v4, v3 +; PWR5-NEXT: vspltish v3, 8 +; PWR5-NEXT: vsrh v2, v2, v3 +; PWR5-NEXT: vspltish v3, 14 +; PWR5-NEXT: vcmpgtuh v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_14_v8i16: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI37_0@toc@ha -; PWR6-NEXT: vspltish 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI37_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI37_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI37_1@toc@l -; PWR6-NEXT: vsrh 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 2 -; PWR6-NEXT: vsubuhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 4 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vmladduhm 2, 2, 4, 3 -; PWR6-NEXT: vspltish 3, 8 -; PWR6-NEXT: vsrh 2, 2, 3 -; PWR6-NEXT: vspltish 3, 14 -; PWR6-NEXT: vcmpgtuh 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI37_0@toc@ha +; PWR6-NEXT: vspltish v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI37_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI37_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI37_1@toc@l +; PWR6-NEXT: vsrh v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 2 +; PWR6-NEXT: vsubuhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 4 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vmladduhm v2, v2, v4, v3 +; PWR6-NEXT: vspltish v3, 8 +; PWR6-NEXT: vsrh v2, v2, v3 +; PWR6-NEXT: vspltish v3, 14 +; PWR6-NEXT: vcmpgtuh v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_14_v8i16: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltish 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI37_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI37_0@toc@l -; PWR7-NEXT: vspltish 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI37_1@toc@ha -; PWR7-NEXT: vspltish 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI37_1@toc@l -; PWR7-NEXT: vsrh 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltish 6, 8 -; PWR7-NEXT: vspltish 7, 14 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 5 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vxor 3, 3, 3 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmladduhm 2, 2, 1, 3 -; PWR7-NEXT: vsrh 2, 2, 6 -; PWR7-NEXT: vcmpgtuh 2, 7, 2 +; PWR7-NEXT: vspltish v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI37_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI37_0@toc@l +; PWR7-NEXT: vspltish v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI37_1@toc@ha +; PWR7-NEXT: vspltish v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI37_1@toc@l +; PWR7-NEXT: vsrh v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltish v6, 8 +; PWR7-NEXT: vspltish v7, 14 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v5 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vxor v3, v3, v3 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmladduhm v2, v2, v1, v3 +; PWR7-NEXT: vsrh v2, v2, v6 +; PWR7-NEXT: vcmpgtuh v2, v7, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_14_v8i16: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltish 3, 14 -; PWR8-NEXT: vpopcnth 2, 2 -; PWR8-NEXT: vcmpgtuh 2, 3, 2 +; PWR8-NEXT: vspltish v3, 14 +; PWR8-NEXT: vpopcnth v2, v2 +; PWR8-NEXT: vcmpgtuh v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_14_v8i16: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltish 3, 14 -; PWR9-NEXT: vpopcnth 2, 2 -; PWR9-NEXT: vcmpgtuh 2, 3, 2 +; PWR9-NEXT: vspltish v3, 14 +; PWR9-NEXT: vpopcnth v2, v2 +; PWR9-NEXT: vcmpgtuh v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0) %3 = icmp ult <8 x i16> %2, @@ -3871,109 +3875,109 @@ define <8 x i16> @ult_14_v8i16(<8 x i16> %0) { define <8 x i16> @ugt_14_v8i16(<8 x i16> %0) { ; PWR5-LABEL: ugt_14_v8i16: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI38_0@toc@ha -; PWR5-NEXT: vspltish 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI38_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI38_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI38_1@toc@l -; PWR5-NEXT: vsrh 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 2 -; PWR5-NEXT: vsubuhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 4 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vmladduhm 2, 2, 4, 3 -; PWR5-NEXT: vspltish 3, 8 -; PWR5-NEXT: vsrh 2, 2, 3 -; PWR5-NEXT: vspltish 3, 14 -; PWR5-NEXT: vcmpgtuh 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI38_0@toc@ha +; PWR5-NEXT: vspltish v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI38_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI38_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI38_1@toc@l +; PWR5-NEXT: vsrh v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 2 +; PWR5-NEXT: vsubuhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 4 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vmladduhm v2, v2, v4, v3 +; PWR5-NEXT: vspltish v3, 8 +; PWR5-NEXT: vsrh v2, v2, v3 +; PWR5-NEXT: vspltish v3, 14 +; PWR5-NEXT: vcmpgtuh v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_14_v8i16: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI38_0@toc@ha -; PWR6-NEXT: vspltish 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI38_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI38_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI38_1@toc@l -; PWR6-NEXT: vsrh 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 2 -; PWR6-NEXT: vsubuhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 4 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vmladduhm 2, 2, 4, 3 -; PWR6-NEXT: vspltish 3, 8 -; PWR6-NEXT: vsrh 2, 2, 3 -; PWR6-NEXT: vspltish 3, 14 -; PWR6-NEXT: vcmpgtuh 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI38_0@toc@ha +; PWR6-NEXT: vspltish v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI38_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI38_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI38_1@toc@l +; PWR6-NEXT: vsrh v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 2 +; PWR6-NEXT: vsubuhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 4 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vmladduhm v2, v2, v4, v3 +; PWR6-NEXT: vspltish v3, 8 +; PWR6-NEXT: vsrh v2, v2, v3 +; PWR6-NEXT: vspltish v3, 14 +; PWR6-NEXT: vcmpgtuh v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_14_v8i16: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltish 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI38_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI38_0@toc@l -; PWR7-NEXT: vspltish 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI38_1@toc@ha -; PWR7-NEXT: vspltish 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI38_1@toc@l -; PWR7-NEXT: vsrh 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltish 6, 8 -; PWR7-NEXT: vspltish 7, 14 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 5 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vxor 3, 3, 3 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmladduhm 2, 2, 1, 3 -; PWR7-NEXT: vsrh 2, 2, 6 -; PWR7-NEXT: vcmpgtuh 2, 2, 7 +; PWR7-NEXT: vspltish v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI38_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI38_0@toc@l +; PWR7-NEXT: vspltish v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI38_1@toc@ha +; PWR7-NEXT: vspltish v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI38_1@toc@l +; PWR7-NEXT: vsrh v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltish v6, 8 +; PWR7-NEXT: vspltish v7, 14 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v5 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vxor v3, v3, v3 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmladduhm v2, v2, v1, v3 +; PWR7-NEXT: vsrh v2, v2, v6 +; PWR7-NEXT: vcmpgtuh v2, v2, v7 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_14_v8i16: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltish 3, 14 -; PWR8-NEXT: vpopcnth 2, 2 -; PWR8-NEXT: vcmpgtuh 2, 2, 3 +; PWR8-NEXT: vspltish v3, 14 +; PWR8-NEXT: vpopcnth v2, v2 +; PWR8-NEXT: vcmpgtuh v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_14_v8i16: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltish 3, 14 -; PWR9-NEXT: vpopcnth 2, 2 -; PWR9-NEXT: vcmpgtuh 2, 2, 3 +; PWR9-NEXT: vspltish v3, 14 +; PWR9-NEXT: vpopcnth v2, v2 +; PWR9-NEXT: vcmpgtuh v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0) %3 = icmp ugt <8 x i16> %2, @@ -3984,109 +3988,109 @@ define <8 x i16> @ugt_14_v8i16(<8 x i16> %0) { define <8 x i16> @ult_15_v8i16(<8 x i16> %0) { ; PWR5-LABEL: ult_15_v8i16: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI39_0@toc@ha -; PWR5-NEXT: vspltish 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI39_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI39_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI39_1@toc@l -; PWR5-NEXT: vsrh 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 2 -; PWR5-NEXT: vsubuhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: vspltish 5, 4 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vsrh 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduhm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vmladduhm 2, 2, 4, 3 -; PWR5-NEXT: vspltish 3, 8 -; PWR5-NEXT: vsrh 2, 2, 3 -; PWR5-NEXT: vspltish 3, 15 -; PWR5-NEXT: vcmpgtuh 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI39_0@toc@ha +; PWR5-NEXT: vspltish v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI39_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI39_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI39_1@toc@l +; PWR5-NEXT: vsrh v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 2 +; PWR5-NEXT: vsubuhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: vspltish v5, 4 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vsrh v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduhm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vmladduhm v2, v2, v4, v3 +; PWR5-NEXT: vspltish v3, 8 +; PWR5-NEXT: vsrh v2, v2, v3 +; PWR5-NEXT: vspltish v3, 15 +; PWR5-NEXT: vcmpgtuh v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_15_v8i16: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI39_0@toc@ha -; PWR6-NEXT: vspltish 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI39_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI39_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI39_1@toc@l -; PWR6-NEXT: vsrh 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 2 -; PWR6-NEXT: vsubuhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: vspltish 5, 4 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vsrh 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduhm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vmladduhm 2, 2, 4, 3 -; PWR6-NEXT: vspltish 3, 8 -; PWR6-NEXT: vsrh 2, 2, 3 -; PWR6-NEXT: vspltish 3, 15 -; PWR6-NEXT: vcmpgtuh 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI39_0@toc@ha +; PWR6-NEXT: vspltish v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI39_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI39_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI39_1@toc@l +; PWR6-NEXT: vsrh v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 2 +; PWR6-NEXT: vsubuhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: vspltish v5, 4 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vsrh v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduhm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vmladduhm v2, v2, v4, v3 +; PWR6-NEXT: vspltish v3, 8 +; PWR6-NEXT: vsrh v2, v2, v3 +; PWR6-NEXT: vspltish v3, 15 +; PWR6-NEXT: vcmpgtuh v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_15_v8i16: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltish 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI39_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI39_0@toc@l -; PWR7-NEXT: vspltish 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI39_1@toc@ha -; PWR7-NEXT: vspltish 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI39_1@toc@l -; PWR7-NEXT: vsrh 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltish 6, 8 -; PWR7-NEXT: vspltish 7, 15 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vsrh 3, 2, 5 -; PWR7-NEXT: vadduhm 2, 2, 3 -; PWR7-NEXT: vxor 3, 3, 3 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmladduhm 2, 2, 1, 3 -; PWR7-NEXT: vsrh 2, 2, 6 -; PWR7-NEXT: vcmpgtuh 2, 7, 2 +; PWR7-NEXT: vspltish v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI39_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI39_0@toc@l +; PWR7-NEXT: vspltish v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI39_1@toc@ha +; PWR7-NEXT: vspltish v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI39_1@toc@l +; PWR7-NEXT: vsrh v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltish v6, 8 +; PWR7-NEXT: vspltish v7, 15 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vsrh v3, v2, v5 +; PWR7-NEXT: vadduhm v2, v2, v3 +; PWR7-NEXT: vxor v3, v3, v3 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmladduhm v2, v2, v1, v3 +; PWR7-NEXT: vsrh v2, v2, v6 +; PWR7-NEXT: vcmpgtuh v2, v7, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_15_v8i16: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltish 3, 15 -; PWR8-NEXT: vpopcnth 2, 2 -; PWR8-NEXT: vcmpgtuh 2, 3, 2 +; PWR8-NEXT: vspltish v3, 15 +; PWR8-NEXT: vpopcnth v2, v2 +; PWR8-NEXT: vcmpgtuh v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_15_v8i16: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltish 3, 15 -; PWR9-NEXT: vpopcnth 2, 2 -; PWR9-NEXT: vcmpgtuh 2, 3, 2 +; PWR9-NEXT: vspltish v3, 15 +; PWR9-NEXT: vpopcnth v2, v2 +; PWR9-NEXT: vcmpgtuh v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %0) %3 = icmp ult <8 x i16> %2, @@ -4097,46 +4101,46 @@ define <8 x i16> @ult_15_v8i16(<8 x i16> %0) { define <4 x i32> @ugt_1_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ugt_1_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: vspltisb 3, -1 -; PWR5-NEXT: vadduwm 3, 2, 3 -; PWR5-NEXT: vand 2, 2, 3 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: vcmpequw 2, 2, 3 -; PWR5-NEXT: vnot 2, 2 +; PWR5-NEXT: vspltisb v3, -1 +; PWR5-NEXT: vadduwm v3, v2, v3 +; PWR5-NEXT: vand v2, v2, v3 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: vcmpequw v2, v2, v3 +; PWR5-NEXT: vnot v2, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_1_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: vspltisb 3, -1 -; PWR6-NEXT: vadduwm 3, 2, 3 -; PWR6-NEXT: vand 2, 2, 3 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: vcmpequw 2, 2, 3 -; PWR6-NEXT: vnot 2, 2 +; PWR6-NEXT: vspltisb v3, -1 +; PWR6-NEXT: vadduwm v3, v2, v3 +; PWR6-NEXT: vand v2, v2, v3 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: vcmpequw v2, v2, v3 +; PWR6-NEXT: vnot v2, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_1_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisb 3, -1 -; PWR7-NEXT: vadduwm 3, 2, 3 -; PWR7-NEXT: xxland 34, 34, 35 -; PWR7-NEXT: xxlxor 35, 35, 35 -; PWR7-NEXT: vcmpequw 2, 2, 3 -; PWR7-NEXT: xxlnor 34, 34, 34 +; PWR7-NEXT: vspltisb v3, -1 +; PWR7-NEXT: vadduwm v3, v2, v3 +; PWR7-NEXT: xxland v2, v2, v3 +; PWR7-NEXT: xxlxor v3, v3, v3 +; PWR7-NEXT: vcmpequw v2, v2, v3 +; PWR7-NEXT: xxlnor v2, v2, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_1_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 1 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vcmpgtuw 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 1 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vcmpgtuw v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_1_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vspltisw 3, 1 -; PWR9-NEXT: vcmpgtuw 2, 2, 3 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vspltisw v3, 1 +; PWR9-NEXT: vcmpgtuw v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ugt <4 x i32> %2, @@ -4147,43 +4151,43 @@ define <4 x i32> @ugt_1_v4i32(<4 x i32> %0) { define <4 x i32> @ult_2_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ult_2_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: vspltisb 3, -1 -; PWR5-NEXT: vadduwm 3, 2, 3 -; PWR5-NEXT: vand 2, 2, 3 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: vcmpequw 2, 2, 3 +; PWR5-NEXT: vspltisb v3, -1 +; PWR5-NEXT: vadduwm v3, v2, v3 +; PWR5-NEXT: vand v2, v2, v3 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: vcmpequw v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_2_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: vspltisb 3, -1 -; PWR6-NEXT: vadduwm 3, 2, 3 -; PWR6-NEXT: vand 2, 2, 3 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: vcmpequw 2, 2, 3 +; PWR6-NEXT: vspltisb v3, -1 +; PWR6-NEXT: vadduwm v3, v2, v3 +; PWR6-NEXT: vand v2, v2, v3 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: vcmpequw v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_2_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisb 3, -1 -; PWR7-NEXT: vadduwm 3, 2, 3 -; PWR7-NEXT: xxland 34, 34, 35 -; PWR7-NEXT: xxlxor 35, 35, 35 -; PWR7-NEXT: vcmpequw 2, 2, 3 +; PWR7-NEXT: vspltisb v3, -1 +; PWR7-NEXT: vadduwm v3, v2, v3 +; PWR7-NEXT: xxland v2, v2, v3 +; PWR7-NEXT: xxlxor v3, v3, v3 +; PWR7-NEXT: vcmpequw v2, v2, v3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_2_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 2 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vcmpgtuw 2, 3, 2 +; PWR8-NEXT: vspltisw v3, 2 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vcmpgtuw v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_2_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vspltisw 3, 2 -; PWR9-NEXT: vcmpgtuw 2, 3, 2 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vspltisw v3, 2 +; PWR9-NEXT: vcmpgtuw v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ult <4 x i32> %2, @@ -4194,124 +4198,124 @@ define <4 x i32> @ult_2_v4i32(<4 x i32> %0) { define <4 x i32> @ugt_2_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ugt_2_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI42_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI42_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI42_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI42_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 1, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 1, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vcmpgtuw 2, 2, 0 +; PWR5-NEXT: addis r3, r2, .LCPI42_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI42_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI42_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI42_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v1, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v1, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vcmpgtuw v2, v2, v0 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_2_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI42_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI42_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI42_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI42_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 1, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 1, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vcmpgtuw 2, 2, 0 +; PWR6-NEXT: addis r3, r2, .LCPI42_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI42_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI42_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI42_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v1, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v1, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vcmpgtuw v2, v2, v0 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_2_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI42_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI42_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI42_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI42_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: xxland 35, 34, 0 -; PWR7-NEXT: vsrw 2, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: vadduwm 2, 3, 2 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: xxlxor 37, 37, 37 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 5 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vcmpgtuw 2, 2, 4 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI42_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI42_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI42_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI42_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: xxland v3, v2, vs0 +; PWR7-NEXT: vsrw v2, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: vadduwm v2, v3, v2 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: xxlxor v5, v5, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v5 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vcmpgtuw v2, v2, v4 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_2_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 2 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vcmpgtuw 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 2 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vcmpgtuw v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_2_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vspltisw 3, 2 -; PWR9-NEXT: vcmpgtuw 2, 2, 3 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vspltisw v3, 2 +; PWR9-NEXT: vcmpgtuw v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ugt <4 x i32> %2, @@ -4322,127 +4326,127 @@ define <4 x i32> @ugt_2_v4i32(<4 x i32> %0) { define <4 x i32> @ult_3_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ult_3_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI43_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI43_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI43_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI43_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 3 -; PWR5-NEXT: vcmpgtuw 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI43_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI43_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI43_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI43_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 3 +; PWR5-NEXT: vcmpgtuw v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_3_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI43_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI43_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI43_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI43_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 3 -; PWR6-NEXT: vcmpgtuw 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI43_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI43_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI43_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI43_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 3 +; PWR6-NEXT: vcmpgtuw v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_3_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI43_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI43_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI43_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI43_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: xxlxor 37, 37, 37 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 5 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vspltisw 4, 3 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vcmpgtuw 2, 4, 2 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI43_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI43_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI43_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI43_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: xxlxor v5, v5, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v5 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vspltisw v4, 3 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vcmpgtuw v2, v4, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_3_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 3 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vcmpgtuw 2, 3, 2 +; PWR8-NEXT: vspltisw v3, 3 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vcmpgtuw v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_3_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vspltisw 3, 3 -; PWR9-NEXT: vcmpgtuw 2, 3, 2 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vspltisw v3, 3 +; PWR9-NEXT: vcmpgtuw v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ult <4 x i32> %2, @@ -4453,127 +4457,127 @@ define <4 x i32> @ult_3_v4i32(<4 x i32> %0) { define <4 x i32> @ugt_3_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ugt_3_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI44_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI44_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI44_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI44_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 3 -; PWR5-NEXT: vcmpgtuw 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI44_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI44_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI44_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI44_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 3 +; PWR5-NEXT: vcmpgtuw v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_3_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI44_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI44_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI44_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI44_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 3 -; PWR6-NEXT: vcmpgtuw 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI44_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI44_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI44_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI44_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 3 +; PWR6-NEXT: vcmpgtuw v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_3_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI44_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI44_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI44_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI44_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: xxlxor 37, 37, 37 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 5 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vspltisw 4, 3 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vcmpgtuw 2, 2, 4 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI44_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI44_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI44_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI44_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: xxlxor v5, v5, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v5 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vspltisw v4, 3 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vcmpgtuw v2, v2, v4 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_3_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 3 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vcmpgtuw 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 3 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vcmpgtuw v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_3_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vspltisw 3, 3 -; PWR9-NEXT: vcmpgtuw 2, 2, 3 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vspltisw v3, 3 +; PWR9-NEXT: vcmpgtuw v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ugt <4 x i32> %2, @@ -4584,124 +4588,124 @@ define <4 x i32> @ugt_3_v4i32(<4 x i32> %0) { define <4 x i32> @ult_4_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ult_4_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI45_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI45_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI45_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI45_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vspltisb 0, 15 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 0 -; PWR5-NEXT: vspltisw 0, -16 -; PWR5-NEXT: vrlw 1, 4, 0 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 1, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 0 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vcmpgtuw 2, 5, 2 +; PWR5-NEXT: addis r3, r2, .LCPI45_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI45_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI45_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI45_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vspltisb v0, 15 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v0 +; PWR5-NEXT: vspltisw v0, -16 +; PWR5-NEXT: vrlw v1, v4, v0 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v1, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v0 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vcmpgtuw v2, v5, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_4_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI45_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI45_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI45_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI45_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vspltisb 0, 15 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 0 -; PWR6-NEXT: vspltisw 0, -16 -; PWR6-NEXT: vrlw 1, 4, 0 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 1, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 0 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vcmpgtuw 2, 5, 2 +; PWR6-NEXT: addis r3, r2, .LCPI45_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI45_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI45_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI45_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vspltisb v0, 15 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v0 +; PWR6-NEXT: vspltisw v0, -16 +; PWR6-NEXT: vrlw v1, v4, v0 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v1, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v0 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vcmpgtuw v2, v5, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_4_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI45_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI45_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI45_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI45_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxlxor 36, 36, 36 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 4 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vcmpgtuw 2, 5, 2 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI45_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI45_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI45_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI45_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxlxor v4, v4, v4 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v4 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vcmpgtuw v2, v5, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_4_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 4 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vcmpgtuw 2, 3, 2 +; PWR8-NEXT: vspltisw v3, 4 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vcmpgtuw v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_4_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vspltisw 3, 4 -; PWR9-NEXT: vcmpgtuw 2, 3, 2 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vspltisw v3, 4 +; PWR9-NEXT: vcmpgtuw v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ult <4 x i32> %2, @@ -4712,124 +4716,124 @@ define <4 x i32> @ult_4_v4i32(<4 x i32> %0) { define <4 x i32> @ugt_4_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ugt_4_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI46_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI46_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI46_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI46_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vspltisb 0, 15 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 0 -; PWR5-NEXT: vspltisw 0, -16 -; PWR5-NEXT: vrlw 1, 4, 0 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 1, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 0 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vcmpgtuw 2, 2, 5 +; PWR5-NEXT: addis r3, r2, .LCPI46_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI46_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI46_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI46_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vspltisb v0, 15 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v0 +; PWR5-NEXT: vspltisw v0, -16 +; PWR5-NEXT: vrlw v1, v4, v0 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v1, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v0 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vcmpgtuw v2, v2, v5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_4_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI46_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI46_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI46_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI46_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vspltisb 0, 15 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 0 -; PWR6-NEXT: vspltisw 0, -16 -; PWR6-NEXT: vrlw 1, 4, 0 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 1, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 0 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vcmpgtuw 2, 2, 5 +; PWR6-NEXT: addis r3, r2, .LCPI46_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI46_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI46_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI46_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vspltisb v0, 15 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v0 +; PWR6-NEXT: vspltisw v0, -16 +; PWR6-NEXT: vrlw v1, v4, v0 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v1, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v0 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vcmpgtuw v2, v2, v5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_4_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI46_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI46_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI46_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI46_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxlxor 36, 36, 36 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 4 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vcmpgtuw 2, 2, 5 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI46_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI46_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI46_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI46_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxlxor v4, v4, v4 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v4 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vcmpgtuw v2, v2, v5 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_4_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 4 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vcmpgtuw 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 4 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vcmpgtuw v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_4_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vspltisw 3, 4 -; PWR9-NEXT: vcmpgtuw 2, 2, 3 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vspltisw v3, 4 +; PWR9-NEXT: vcmpgtuw v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ugt <4 x i32> %2, @@ -4840,127 +4844,127 @@ define <4 x i32> @ugt_4_v4i32(<4 x i32> %0) { define <4 x i32> @ult_5_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ult_5_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI47_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI47_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI47_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI47_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 5 -; PWR5-NEXT: vcmpgtuw 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI47_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI47_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI47_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI47_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 5 +; PWR5-NEXT: vcmpgtuw v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_5_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI47_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI47_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI47_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI47_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 5 -; PWR6-NEXT: vcmpgtuw 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI47_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI47_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI47_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI47_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 5 +; PWR6-NEXT: vcmpgtuw v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_5_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI47_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI47_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI47_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI47_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: xxlxor 37, 37, 37 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 5 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vspltisw 4, 5 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vcmpgtuw 2, 4, 2 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI47_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI47_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI47_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI47_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: xxlxor v5, v5, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v5 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vspltisw v4, 5 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vcmpgtuw v2, v4, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_5_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 5 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vcmpgtuw 2, 3, 2 +; PWR8-NEXT: vspltisw v3, 5 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vcmpgtuw v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_5_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vspltisw 3, 5 -; PWR9-NEXT: vcmpgtuw 2, 3, 2 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vspltisw v3, 5 +; PWR9-NEXT: vcmpgtuw v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ult <4 x i32> %2, @@ -4971,127 +4975,127 @@ define <4 x i32> @ult_5_v4i32(<4 x i32> %0) { define <4 x i32> @ugt_5_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ugt_5_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI48_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI48_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI48_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI48_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 5 -; PWR5-NEXT: vcmpgtuw 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI48_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI48_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI48_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI48_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 5 +; PWR5-NEXT: vcmpgtuw v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_5_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI48_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI48_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI48_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI48_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 5 -; PWR6-NEXT: vcmpgtuw 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI48_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI48_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI48_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI48_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 5 +; PWR6-NEXT: vcmpgtuw v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_5_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI48_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI48_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI48_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI48_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: xxlxor 37, 37, 37 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 5 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vspltisw 4, 5 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vcmpgtuw 2, 2, 4 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI48_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI48_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI48_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI48_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: xxlxor v5, v5, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v5 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vspltisw v4, 5 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vcmpgtuw v2, v2, v4 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_5_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 5 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vcmpgtuw 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 5 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vcmpgtuw v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_5_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vspltisw 3, 5 -; PWR9-NEXT: vcmpgtuw 2, 2, 3 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vspltisw v3, 5 +; PWR9-NEXT: vcmpgtuw v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ugt <4 x i32> %2, @@ -5102,127 +5106,127 @@ define <4 x i32> @ugt_5_v4i32(<4 x i32> %0) { define <4 x i32> @ult_6_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ult_6_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI49_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI49_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI49_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI49_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 6 -; PWR5-NEXT: vcmpgtuw 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI49_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI49_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI49_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI49_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 6 +; PWR5-NEXT: vcmpgtuw v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_6_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI49_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI49_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI49_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI49_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 6 -; PWR6-NEXT: vcmpgtuw 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI49_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI49_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI49_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI49_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 6 +; PWR6-NEXT: vcmpgtuw v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_6_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI49_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI49_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI49_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI49_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: xxlxor 37, 37, 37 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 5 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vspltisw 4, 6 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vcmpgtuw 2, 4, 2 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI49_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI49_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI49_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI49_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: xxlxor v5, v5, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v5 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vspltisw v4, 6 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vcmpgtuw v2, v4, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_6_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 6 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vcmpgtuw 2, 3, 2 +; PWR8-NEXT: vspltisw v3, 6 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vcmpgtuw v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_6_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vspltisw 3, 6 -; PWR9-NEXT: vcmpgtuw 2, 3, 2 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vspltisw v3, 6 +; PWR9-NEXT: vcmpgtuw v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ult <4 x i32> %2, @@ -5233,127 +5237,127 @@ define <4 x i32> @ult_6_v4i32(<4 x i32> %0) { define <4 x i32> @ugt_6_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ugt_6_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI50_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI50_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI50_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI50_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 6 -; PWR5-NEXT: vcmpgtuw 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI50_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI50_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI50_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI50_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 6 +; PWR5-NEXT: vcmpgtuw v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_6_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI50_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI50_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI50_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI50_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 6 -; PWR6-NEXT: vcmpgtuw 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI50_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI50_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI50_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI50_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 6 +; PWR6-NEXT: vcmpgtuw v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_6_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI50_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI50_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI50_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI50_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: xxlxor 37, 37, 37 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 5 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vspltisw 4, 6 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vcmpgtuw 2, 2, 4 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI50_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI50_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI50_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI50_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: xxlxor v5, v5, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v5 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vspltisw v4, 6 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vcmpgtuw v2, v2, v4 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_6_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 6 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vcmpgtuw 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 6 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vcmpgtuw v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_6_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vspltisw 3, 6 -; PWR9-NEXT: vcmpgtuw 2, 2, 3 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vspltisw v3, 6 +; PWR9-NEXT: vcmpgtuw v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ugt <4 x i32> %2, @@ -5364,127 +5368,127 @@ define <4 x i32> @ugt_6_v4i32(<4 x i32> %0) { define <4 x i32> @ult_7_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ult_7_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI51_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI51_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI51_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI51_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 7 -; PWR5-NEXT: vcmpgtuw 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI51_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI51_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI51_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI51_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 7 +; PWR5-NEXT: vcmpgtuw v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_7_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI51_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI51_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI51_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI51_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 7 -; PWR6-NEXT: vcmpgtuw 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI51_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI51_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI51_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI51_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 7 +; PWR6-NEXT: vcmpgtuw v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_7_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI51_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI51_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI51_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI51_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: xxlxor 37, 37, 37 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 5 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vspltisw 4, 7 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vcmpgtuw 2, 4, 2 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI51_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI51_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI51_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI51_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: xxlxor v5, v5, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v5 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vspltisw v4, 7 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vcmpgtuw v2, v4, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_7_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 7 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vcmpgtuw 2, 3, 2 +; PWR8-NEXT: vspltisw v3, 7 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vcmpgtuw v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_7_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vspltisw 3, 7 -; PWR9-NEXT: vcmpgtuw 2, 3, 2 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vspltisw v3, 7 +; PWR9-NEXT: vcmpgtuw v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ult <4 x i32> %2, @@ -5495,127 +5499,127 @@ define <4 x i32> @ult_7_v4i32(<4 x i32> %0) { define <4 x i32> @ugt_7_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ugt_7_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI52_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI52_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI52_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI52_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 7 -; PWR5-NEXT: vcmpgtuw 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI52_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI52_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI52_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI52_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 7 +; PWR5-NEXT: vcmpgtuw v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_7_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI52_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI52_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI52_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI52_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 7 -; PWR6-NEXT: vcmpgtuw 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI52_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI52_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI52_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI52_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 7 +; PWR6-NEXT: vcmpgtuw v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_7_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI52_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI52_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI52_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI52_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: xxlxor 37, 37, 37 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 5 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vspltisw 4, 7 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vcmpgtuw 2, 2, 4 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI52_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI52_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI52_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI52_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: xxlxor v5, v5, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v5 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vspltisw v4, 7 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vcmpgtuw v2, v2, v4 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_7_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 7 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vcmpgtuw 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 7 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vcmpgtuw v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_7_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vspltisw 3, 7 -; PWR9-NEXT: vcmpgtuw 2, 2, 3 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vspltisw v3, 7 +; PWR9-NEXT: vcmpgtuw v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ugt <4 x i32> %2, @@ -5626,127 +5630,127 @@ define <4 x i32> @ugt_7_v4i32(<4 x i32> %0) { define <4 x i32> @ult_8_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ult_8_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI53_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI53_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI53_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI53_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 8 -; PWR5-NEXT: vcmpgtuw 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI53_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI53_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI53_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI53_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 8 +; PWR5-NEXT: vcmpgtuw v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_8_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI53_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI53_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI53_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI53_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 8 -; PWR6-NEXT: vcmpgtuw 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI53_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI53_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI53_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI53_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 8 +; PWR6-NEXT: vcmpgtuw v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_8_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI53_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI53_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI53_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI53_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: xxlxor 37, 37, 37 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 5 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vspltisw 4, 8 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vcmpgtuw 2, 4, 2 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI53_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI53_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI53_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI53_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: xxlxor v5, v5, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v5 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vspltisw v4, 8 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vcmpgtuw v2, v4, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_8_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 8 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vcmpgtuw 2, 3, 2 +; PWR8-NEXT: vspltisw v3, 8 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vcmpgtuw v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_8_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vspltisw 3, 8 -; PWR9-NEXT: vcmpgtuw 2, 3, 2 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vspltisw v3, 8 +; PWR9-NEXT: vcmpgtuw v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ult <4 x i32> %2, @@ -5757,127 +5761,127 @@ define <4 x i32> @ult_8_v4i32(<4 x i32> %0) { define <4 x i32> @ugt_8_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ugt_8_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI54_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI54_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI54_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI54_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 8 -; PWR5-NEXT: vcmpgtuw 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI54_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI54_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI54_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI54_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 8 +; PWR5-NEXT: vcmpgtuw v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_8_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI54_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI54_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI54_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI54_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 8 -; PWR6-NEXT: vcmpgtuw 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI54_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI54_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI54_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI54_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 8 +; PWR6-NEXT: vcmpgtuw v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_8_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI54_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI54_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI54_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI54_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: xxlxor 37, 37, 37 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 5 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vspltisw 4, 8 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vcmpgtuw 2, 2, 4 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI54_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI54_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI54_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI54_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: xxlxor v5, v5, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v5 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vspltisw v4, 8 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vcmpgtuw v2, v2, v4 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_8_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 8 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vcmpgtuw 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 8 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vcmpgtuw v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_8_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vspltisw 3, 8 -; PWR9-NEXT: vcmpgtuw 2, 2, 3 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vspltisw v3, 8 +; PWR9-NEXT: vcmpgtuw v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ugt <4 x i32> %2, @@ -5888,127 +5892,127 @@ define <4 x i32> @ugt_8_v4i32(<4 x i32> %0) { define <4 x i32> @ult_9_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ult_9_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI55_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI55_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI55_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI55_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 9 -; PWR5-NEXT: vcmpgtuw 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI55_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI55_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI55_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI55_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 9 +; PWR5-NEXT: vcmpgtuw v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_9_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI55_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI55_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI55_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI55_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 9 -; PWR6-NEXT: vcmpgtuw 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI55_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI55_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI55_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI55_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 9 +; PWR6-NEXT: vcmpgtuw v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_9_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI55_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI55_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI55_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI55_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: xxlxor 37, 37, 37 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 5 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vspltisw 4, 9 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vcmpgtuw 2, 4, 2 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI55_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI55_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI55_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI55_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: xxlxor v5, v5, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v5 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vspltisw v4, 9 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vcmpgtuw v2, v4, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_9_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 9 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vcmpgtuw 2, 3, 2 +; PWR8-NEXT: vspltisw v3, 9 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vcmpgtuw v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_9_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vspltisw 3, 9 -; PWR9-NEXT: vcmpgtuw 2, 3, 2 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vspltisw v3, 9 +; PWR9-NEXT: vcmpgtuw v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ult <4 x i32> %2, @@ -6019,127 +6023,127 @@ define <4 x i32> @ult_9_v4i32(<4 x i32> %0) { define <4 x i32> @ugt_9_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ugt_9_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI56_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI56_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI56_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI56_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 9 -; PWR5-NEXT: vcmpgtuw 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI56_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI56_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI56_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI56_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 9 +; PWR5-NEXT: vcmpgtuw v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_9_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI56_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI56_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI56_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI56_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 9 -; PWR6-NEXT: vcmpgtuw 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI56_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI56_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI56_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI56_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 9 +; PWR6-NEXT: vcmpgtuw v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_9_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI56_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI56_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI56_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI56_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: xxlxor 37, 37, 37 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 5 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vspltisw 4, 9 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vcmpgtuw 2, 2, 4 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI56_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI56_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI56_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI56_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: xxlxor v5, v5, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v5 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vspltisw v4, 9 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vcmpgtuw v2, v2, v4 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_9_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 9 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vcmpgtuw 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 9 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vcmpgtuw v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_9_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vspltisw 3, 9 -; PWR9-NEXT: vcmpgtuw 2, 2, 3 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vspltisw v3, 9 +; PWR9-NEXT: vcmpgtuw v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ugt <4 x i32> %2, @@ -6150,127 +6154,127 @@ define <4 x i32> @ugt_9_v4i32(<4 x i32> %0) { define <4 x i32> @ult_10_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ult_10_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI57_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI57_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI57_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI57_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 10 -; PWR5-NEXT: vcmpgtuw 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI57_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI57_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI57_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI57_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 10 +; PWR5-NEXT: vcmpgtuw v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_10_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI57_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI57_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI57_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI57_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 10 -; PWR6-NEXT: vcmpgtuw 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI57_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI57_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI57_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI57_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 10 +; PWR6-NEXT: vcmpgtuw v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_10_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI57_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI57_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI57_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI57_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: xxlxor 37, 37, 37 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 5 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vspltisw 4, 10 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vcmpgtuw 2, 4, 2 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI57_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI57_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI57_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI57_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: xxlxor v5, v5, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v5 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vspltisw v4, 10 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vcmpgtuw v2, v4, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_10_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 10 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vcmpgtuw 2, 3, 2 +; PWR8-NEXT: vspltisw v3, 10 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vcmpgtuw v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_10_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vspltisw 3, 10 -; PWR9-NEXT: vcmpgtuw 2, 3, 2 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vspltisw v3, 10 +; PWR9-NEXT: vcmpgtuw v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ult <4 x i32> %2, @@ -6281,127 +6285,127 @@ define <4 x i32> @ult_10_v4i32(<4 x i32> %0) { define <4 x i32> @ugt_10_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ugt_10_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI58_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI58_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI58_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI58_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 10 -; PWR5-NEXT: vcmpgtuw 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI58_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI58_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI58_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI58_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 10 +; PWR5-NEXT: vcmpgtuw v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_10_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI58_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI58_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI58_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI58_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 10 -; PWR6-NEXT: vcmpgtuw 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI58_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI58_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI58_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI58_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 10 +; PWR6-NEXT: vcmpgtuw v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_10_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI58_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI58_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI58_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI58_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: xxlxor 37, 37, 37 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 5 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vspltisw 4, 10 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vcmpgtuw 2, 2, 4 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI58_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI58_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI58_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI58_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: xxlxor v5, v5, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v5 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vspltisw v4, 10 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vcmpgtuw v2, v2, v4 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_10_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 10 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vcmpgtuw 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 10 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vcmpgtuw v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_10_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vspltisw 3, 10 -; PWR9-NEXT: vcmpgtuw 2, 2, 3 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vspltisw v3, 10 +; PWR9-NEXT: vcmpgtuw v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ugt <4 x i32> %2, @@ -6412,127 +6416,127 @@ define <4 x i32> @ugt_10_v4i32(<4 x i32> %0) { define <4 x i32> @ult_11_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ult_11_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI59_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI59_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI59_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI59_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 11 -; PWR5-NEXT: vcmpgtuw 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI59_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI59_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI59_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI59_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 11 +; PWR5-NEXT: vcmpgtuw v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_11_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI59_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI59_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI59_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI59_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 11 -; PWR6-NEXT: vcmpgtuw 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI59_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI59_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI59_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI59_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 11 +; PWR6-NEXT: vcmpgtuw v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_11_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI59_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI59_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI59_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI59_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: xxlxor 37, 37, 37 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 5 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vspltisw 4, 11 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vcmpgtuw 2, 4, 2 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI59_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI59_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI59_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI59_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: xxlxor v5, v5, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v5 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vspltisw v4, 11 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vcmpgtuw v2, v4, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_11_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 11 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vcmpgtuw 2, 3, 2 +; PWR8-NEXT: vspltisw v3, 11 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vcmpgtuw v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_11_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vspltisw 3, 11 -; PWR9-NEXT: vcmpgtuw 2, 3, 2 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vspltisw v3, 11 +; PWR9-NEXT: vcmpgtuw v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ult <4 x i32> %2, @@ -6543,127 +6547,127 @@ define <4 x i32> @ult_11_v4i32(<4 x i32> %0) { define <4 x i32> @ugt_11_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ugt_11_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI60_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI60_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI60_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI60_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 11 -; PWR5-NEXT: vcmpgtuw 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI60_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI60_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI60_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI60_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 11 +; PWR5-NEXT: vcmpgtuw v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_11_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI60_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI60_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI60_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI60_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 11 -; PWR6-NEXT: vcmpgtuw 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI60_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI60_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI60_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI60_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 11 +; PWR6-NEXT: vcmpgtuw v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_11_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI60_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI60_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI60_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI60_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: xxlxor 37, 37, 37 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 5 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vspltisw 4, 11 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vcmpgtuw 2, 2, 4 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI60_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI60_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI60_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI60_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: xxlxor v5, v5, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v5 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vspltisw v4, 11 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vcmpgtuw v2, v2, v4 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_11_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 11 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vcmpgtuw 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 11 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vcmpgtuw v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_11_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vspltisw 3, 11 -; PWR9-NEXT: vcmpgtuw 2, 2, 3 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vspltisw v3, 11 +; PWR9-NEXT: vcmpgtuw v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ugt <4 x i32> %2, @@ -6674,124 +6678,124 @@ define <4 x i32> @ugt_11_v4i32(<4 x i32> %0) { define <4 x i32> @ult_12_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ult_12_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI61_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI61_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI61_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI61_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 5, 3, 3 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 5 -; PWR5-NEXT: vcmpgtuw 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI61_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI61_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI61_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI61_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v5, v3, v3 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v5 +; PWR5-NEXT: vcmpgtuw v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_12_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI61_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI61_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI61_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI61_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 5, 3, 3 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 5 -; PWR6-NEXT: vcmpgtuw 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI61_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI61_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI61_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI61_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v5, v3, v3 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v5 +; PWR6-NEXT: vcmpgtuw v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_12_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI61_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI61_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI61_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI61_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxlxor 36, 36, 36 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 4 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vcmpgtuw 2, 7, 2 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI61_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI61_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI61_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI61_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxlxor v4, v4, v4 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v4 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vcmpgtuw v2, v7, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_12_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 12 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vcmpgtuw 2, 3, 2 +; PWR8-NEXT: vspltisw v3, 12 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vcmpgtuw v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_12_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vspltisw 3, 12 -; PWR9-NEXT: vcmpgtuw 2, 3, 2 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vspltisw v3, 12 +; PWR9-NEXT: vcmpgtuw v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ult <4 x i32> %2, @@ -6802,124 +6806,124 @@ define <4 x i32> @ult_12_v4i32(<4 x i32> %0) { define <4 x i32> @ugt_12_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ugt_12_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI62_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI62_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI62_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI62_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 5, 3, 3 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 5 -; PWR5-NEXT: vcmpgtuw 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI62_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI62_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI62_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI62_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v5, v3, v3 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v5 +; PWR5-NEXT: vcmpgtuw v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_12_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI62_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI62_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI62_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI62_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 5, 3, 3 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 5 -; PWR6-NEXT: vcmpgtuw 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI62_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI62_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI62_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI62_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v5, v3, v3 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v5 +; PWR6-NEXT: vcmpgtuw v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_12_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI62_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI62_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI62_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI62_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxlxor 36, 36, 36 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 4 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vcmpgtuw 2, 2, 7 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI62_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI62_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI62_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI62_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxlxor v4, v4, v4 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v4 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vcmpgtuw v2, v2, v7 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_12_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 12 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vcmpgtuw 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 12 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vcmpgtuw v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_12_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vspltisw 3, 12 -; PWR9-NEXT: vcmpgtuw 2, 2, 3 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vspltisw v3, 12 +; PWR9-NEXT: vcmpgtuw v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ugt <4 x i32> %2, @@ -6930,127 +6934,127 @@ define <4 x i32> @ugt_12_v4i32(<4 x i32> %0) { define <4 x i32> @ult_13_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ult_13_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI63_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI63_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI63_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI63_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 13 -; PWR5-NEXT: vcmpgtuw 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI63_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI63_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI63_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI63_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 13 +; PWR5-NEXT: vcmpgtuw v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_13_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI63_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI63_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI63_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI63_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 13 -; PWR6-NEXT: vcmpgtuw 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI63_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI63_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI63_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI63_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 13 +; PWR6-NEXT: vcmpgtuw v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_13_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI63_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI63_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI63_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI63_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: xxlxor 37, 37, 37 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 5 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vspltisw 4, 13 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vcmpgtuw 2, 4, 2 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI63_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI63_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI63_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI63_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: xxlxor v5, v5, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v5 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vspltisw v4, 13 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vcmpgtuw v2, v4, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_13_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 13 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vcmpgtuw 2, 3, 2 +; PWR8-NEXT: vspltisw v3, 13 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vcmpgtuw v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_13_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vspltisw 3, 13 -; PWR9-NEXT: vcmpgtuw 2, 3, 2 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vspltisw v3, 13 +; PWR9-NEXT: vcmpgtuw v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ult <4 x i32> %2, @@ -7061,127 +7065,127 @@ define <4 x i32> @ult_13_v4i32(<4 x i32> %0) { define <4 x i32> @ugt_13_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ugt_13_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI64_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI64_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI64_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI64_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 13 -; PWR5-NEXT: vcmpgtuw 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI64_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI64_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI64_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI64_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 13 +; PWR5-NEXT: vcmpgtuw v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_13_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI64_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI64_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI64_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI64_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 13 -; PWR6-NEXT: vcmpgtuw 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI64_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI64_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI64_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI64_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 13 +; PWR6-NEXT: vcmpgtuw v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_13_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI64_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI64_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI64_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI64_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: xxlxor 37, 37, 37 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 5 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vspltisw 4, 13 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vcmpgtuw 2, 2, 4 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI64_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI64_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI64_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI64_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: xxlxor v5, v5, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v5 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vspltisw v4, 13 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vcmpgtuw v2, v2, v4 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_13_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 13 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vcmpgtuw 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 13 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vcmpgtuw v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_13_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vspltisw 3, 13 -; PWR9-NEXT: vcmpgtuw 2, 2, 3 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vspltisw v3, 13 +; PWR9-NEXT: vcmpgtuw v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ugt <4 x i32> %2, @@ -7192,127 +7196,127 @@ define <4 x i32> @ugt_13_v4i32(<4 x i32> %0) { define <4 x i32> @ult_14_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ult_14_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI65_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI65_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI65_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI65_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 14 -; PWR5-NEXT: vcmpgtuw 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI65_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI65_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI65_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI65_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 14 +; PWR5-NEXT: vcmpgtuw v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_14_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI65_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI65_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI65_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI65_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 14 -; PWR6-NEXT: vcmpgtuw 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI65_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI65_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI65_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI65_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 14 +; PWR6-NEXT: vcmpgtuw v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_14_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI65_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI65_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI65_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI65_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: xxlxor 37, 37, 37 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 5 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vspltisw 4, 14 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vcmpgtuw 2, 4, 2 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI65_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI65_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI65_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI65_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: xxlxor v5, v5, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v5 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vspltisw v4, 14 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vcmpgtuw v2, v4, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_14_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 14 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vcmpgtuw 2, 3, 2 +; PWR8-NEXT: vspltisw v3, 14 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vcmpgtuw v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_14_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vspltisw 3, 14 -; PWR9-NEXT: vcmpgtuw 2, 3, 2 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vspltisw v3, 14 +; PWR9-NEXT: vcmpgtuw v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ult <4 x i32> %2, @@ -7323,127 +7327,127 @@ define <4 x i32> @ult_14_v4i32(<4 x i32> %0) { define <4 x i32> @ugt_14_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ugt_14_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI66_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI66_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI66_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI66_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 14 -; PWR5-NEXT: vcmpgtuw 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI66_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI66_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI66_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI66_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 14 +; PWR5-NEXT: vcmpgtuw v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_14_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI66_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI66_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI66_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI66_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 14 -; PWR6-NEXT: vcmpgtuw 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI66_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI66_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI66_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI66_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 14 +; PWR6-NEXT: vcmpgtuw v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_14_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI66_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI66_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI66_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI66_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: xxlxor 37, 37, 37 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 5 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vspltisw 4, 14 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vcmpgtuw 2, 2, 4 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI66_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI66_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI66_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI66_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: xxlxor v5, v5, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v5 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vspltisw v4, 14 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vcmpgtuw v2, v2, v4 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_14_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 14 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vcmpgtuw 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 14 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vcmpgtuw v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_14_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vspltisw 3, 14 -; PWR9-NEXT: vcmpgtuw 2, 2, 3 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vspltisw v3, 14 +; PWR9-NEXT: vcmpgtuw v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ugt <4 x i32> %2, @@ -7454,127 +7458,127 @@ define <4 x i32> @ugt_14_v4i32(<4 x i32> %0) { define <4 x i32> @ult_15_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ult_15_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI67_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI67_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI67_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI67_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 15 -; PWR5-NEXT: vcmpgtuw 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI67_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI67_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI67_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI67_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 15 +; PWR5-NEXT: vcmpgtuw v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_15_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI67_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI67_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI67_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI67_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 15 -; PWR6-NEXT: vcmpgtuw 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI67_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI67_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI67_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI67_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 15 +; PWR6-NEXT: vcmpgtuw v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_15_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI67_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI67_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI67_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI67_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: xxlxor 37, 37, 37 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 5 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vspltisw 4, 15 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vcmpgtuw 2, 4, 2 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI67_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI67_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI67_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI67_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: xxlxor v5, v5, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v5 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vspltisw v4, 15 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vcmpgtuw v2, v4, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_15_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 15 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vcmpgtuw 2, 3, 2 +; PWR8-NEXT: vspltisw v3, 15 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vcmpgtuw v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_15_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vspltisw 3, 15 -; PWR9-NEXT: vcmpgtuw 2, 3, 2 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vspltisw v3, 15 +; PWR9-NEXT: vcmpgtuw v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ult <4 x i32> %2, @@ -7585,127 +7589,127 @@ define <4 x i32> @ult_15_v4i32(<4 x i32> %0) { define <4 x i32> @ugt_15_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ugt_15_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI68_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI68_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI68_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI68_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 15 -; PWR5-NEXT: vcmpgtuw 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI68_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI68_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI68_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI68_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 15 +; PWR5-NEXT: vcmpgtuw v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_15_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI68_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI68_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI68_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI68_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 15 -; PWR6-NEXT: vcmpgtuw 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI68_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI68_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI68_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI68_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 15 +; PWR6-NEXT: vcmpgtuw v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_15_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI68_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI68_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI68_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI68_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: xxlxor 37, 37, 37 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 5 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vspltisw 4, 15 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vcmpgtuw 2, 2, 4 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI68_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI68_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI68_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI68_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: xxlxor v5, v5, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v5 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vspltisw v4, 15 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vcmpgtuw v2, v2, v4 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_15_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 15 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vcmpgtuw 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 15 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vcmpgtuw v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_15_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vspltisw 3, 15 -; PWR9-NEXT: vcmpgtuw 2, 2, 3 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vspltisw v3, 15 +; PWR9-NEXT: vcmpgtuw v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ugt <4 x i32> %2, @@ -7716,132 +7720,132 @@ define <4 x i32> @ugt_15_v4i32(<4 x i32> %0) { define <4 x i32> @ult_16_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ult_16_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI69_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI69_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI69_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI69_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 8 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vcmpgtuw 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI69_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI69_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI69_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI69_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 8 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vcmpgtuw v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_16_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI69_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI69_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI69_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI69_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 8 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vcmpgtuw 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI69_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI69_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI69_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI69_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 8 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vcmpgtuw v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_16_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI69_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI69_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI69_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI69_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: vspltisw 8, 8 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxlxor 36, 36, 36 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 4 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 8, 8 -; PWR7-NEXT: vcmpgtuw 2, 3, 2 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI69_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI69_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI69_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI69_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: vspltisw v8, 8 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxlxor v4, v4, v4 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v4 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v8, v8 +; PWR7-NEXT: vcmpgtuw v2, v3, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_16_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 8 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vadduwm 3, 3, 3 -; PWR8-NEXT: vcmpgtuw 2, 3, 2 +; PWR8-NEXT: vspltisw v3, 8 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vadduwm v3, v3, v3 +; PWR8-NEXT: vcmpgtuw v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_16_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 16 -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vextsb2w 3, 3 -; PWR9-NEXT: vcmpgtuw 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 16 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vextsb2w v3, v3 +; PWR9-NEXT: vcmpgtuw v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ult <4 x i32> %2, @@ -7852,132 +7856,132 @@ define <4 x i32> @ult_16_v4i32(<4 x i32> %0) { define <4 x i32> @ugt_16_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ugt_16_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI70_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI70_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI70_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI70_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 8 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vcmpgtuw 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI70_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI70_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI70_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI70_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 8 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vcmpgtuw v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_16_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI70_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI70_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI70_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI70_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 8 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vcmpgtuw 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI70_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI70_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI70_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI70_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 8 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vcmpgtuw v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_16_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI70_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI70_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI70_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI70_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: vspltisw 8, 8 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxlxor 36, 36, 36 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 4 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 8, 8 -; PWR7-NEXT: vcmpgtuw 2, 2, 3 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI70_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI70_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI70_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI70_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: vspltisw v8, 8 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxlxor v4, v4, v4 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v4 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v8, v8 +; PWR7-NEXT: vcmpgtuw v2, v2, v3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_16_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 8 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vadduwm 3, 3, 3 -; PWR8-NEXT: vcmpgtuw 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 8 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vadduwm v3, v3, v3 +; PWR8-NEXT: vcmpgtuw v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_16_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 16 -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vextsb2w 3, 3 -; PWR9-NEXT: vcmpgtuw 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 16 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vextsb2w v3, v3 +; PWR9-NEXT: vcmpgtuw v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ugt <4 x i32> %2, @@ -7988,130 +7992,130 @@ define <4 x i32> @ugt_16_v4i32(<4 x i32> %0) { define <4 x i32> @ult_17_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ult_17_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI71_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI71_0@toc@l -; PWR5-NEXT: lvx 0, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI71_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI71_1@toc@l -; PWR5-NEXT: vspltisw 1, 2 -; PWR5-NEXT: vsrw 5, 2, 4 -; PWR5-NEXT: vand 5, 5, 0 -; PWR5-NEXT: lvx 0, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 5 -; PWR5-NEXT: vand 5, 2, 0 -; PWR5-NEXT: vsrw 2, 2, 1 -; PWR5-NEXT: vand 2, 2, 0 -; PWR5-NEXT: vspltisw 0, 4 -; PWR5-NEXT: vadduwm 2, 5, 2 -; PWR5-NEXT: vsrw 5, 2, 0 -; PWR5-NEXT: vspltisb 0, 15 -; PWR5-NEXT: vadduwm 2, 2, 5 -; PWR5-NEXT: vspltisb 5, 1 -; PWR5-NEXT: vand 2, 2, 0 -; PWR5-NEXT: vspltisw 0, -16 -; PWR5-NEXT: vrlw 1, 5, 0 -; PWR5-NEXT: vmulouh 5, 2, 5 -; PWR5-NEXT: vmsumuhm 2, 2, 1, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 0 -; PWR5-NEXT: vadduwm 2, 5, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vsubuwm 3, 4, 0 -; PWR5-NEXT: vcmpgtuw 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI71_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI71_0@toc@l +; PWR5-NEXT: lvx v0, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI71_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI71_1@toc@l +; PWR5-NEXT: vspltisw v1, 2 +; PWR5-NEXT: vsrw v5, v2, v4 +; PWR5-NEXT: vand v5, v5, v0 +; PWR5-NEXT: lvx v0, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v5 +; PWR5-NEXT: vand v5, v2, v0 +; PWR5-NEXT: vsrw v2, v2, v1 +; PWR5-NEXT: vand v2, v2, v0 +; PWR5-NEXT: vspltisw v0, 4 +; PWR5-NEXT: vadduwm v2, v5, v2 +; PWR5-NEXT: vsrw v5, v2, v0 +; PWR5-NEXT: vspltisb v0, 15 +; PWR5-NEXT: vadduwm v2, v2, v5 +; PWR5-NEXT: vspltisb v5, 1 +; PWR5-NEXT: vand v2, v2, v0 +; PWR5-NEXT: vspltisw v0, -16 +; PWR5-NEXT: vrlw v1, v5, v0 +; PWR5-NEXT: vmulouh v5, v2, v5 +; PWR5-NEXT: vmsumuhm v2, v2, v1, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v0 +; PWR5-NEXT: vadduwm v2, v5, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vsubuwm v3, v4, v0 +; PWR5-NEXT: vcmpgtuw v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_17_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI71_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI71_0@toc@l -; PWR6-NEXT: lvx 0, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI71_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI71_1@toc@l -; PWR6-NEXT: vspltisw 1, 2 -; PWR6-NEXT: vsrw 5, 2, 4 -; PWR6-NEXT: vand 5, 5, 0 -; PWR6-NEXT: lvx 0, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 5 -; PWR6-NEXT: vand 5, 2, 0 -; PWR6-NEXT: vsrw 2, 2, 1 -; PWR6-NEXT: vand 2, 2, 0 -; PWR6-NEXT: vspltisw 0, 4 -; PWR6-NEXT: vadduwm 2, 5, 2 -; PWR6-NEXT: vsrw 5, 2, 0 -; PWR6-NEXT: vspltisb 0, 15 -; PWR6-NEXT: vadduwm 2, 2, 5 -; PWR6-NEXT: vspltisb 5, 1 -; PWR6-NEXT: vand 2, 2, 0 -; PWR6-NEXT: vspltisw 0, -16 -; PWR6-NEXT: vrlw 1, 5, 0 -; PWR6-NEXT: vmulouh 5, 2, 5 -; PWR6-NEXT: vmsumuhm 2, 2, 1, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 0 -; PWR6-NEXT: vadduwm 2, 5, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vsubuwm 3, 4, 0 -; PWR6-NEXT: vcmpgtuw 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI71_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI71_0@toc@l +; PWR6-NEXT: lvx v0, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI71_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI71_1@toc@l +; PWR6-NEXT: vspltisw v1, 2 +; PWR6-NEXT: vsrw v5, v2, v4 +; PWR6-NEXT: vand v5, v5, v0 +; PWR6-NEXT: lvx v0, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v5 +; PWR6-NEXT: vand v5, v2, v0 +; PWR6-NEXT: vsrw v2, v2, v1 +; PWR6-NEXT: vand v2, v2, v0 +; PWR6-NEXT: vspltisw v0, 4 +; PWR6-NEXT: vadduwm v2, v5, v2 +; PWR6-NEXT: vsrw v5, v2, v0 +; PWR6-NEXT: vspltisb v0, 15 +; PWR6-NEXT: vadduwm v2, v2, v5 +; PWR6-NEXT: vspltisb v5, 1 +; PWR6-NEXT: vand v2, v2, v0 +; PWR6-NEXT: vspltisw v0, -16 +; PWR6-NEXT: vrlw v1, v5, v0 +; PWR6-NEXT: vmulouh v5, v2, v5 +; PWR6-NEXT: vmsumuhm v2, v2, v1, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v0 +; PWR6-NEXT: vadduwm v2, v5, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vsubuwm v3, v4, v0 +; PWR6-NEXT: vcmpgtuw v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_17_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI71_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI71_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI71_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI71_1@toc@l -; PWR7-NEXT: vsrw 8, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: vsubuwm 3, 3, 6 -; PWR7-NEXT: xxland 40, 40, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 8 -; PWR7-NEXT: vsrw 4, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 36, 36, 0 -; PWR7-NEXT: vadduwm 2, 2, 4 -; PWR7-NEXT: vsrw 4, 2, 5 -; PWR7-NEXT: xxlxor 37, 37, 37 -; PWR7-NEXT: vadduwm 2, 2, 4 -; PWR7-NEXT: vrlw 4, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 4, 2, 4, 5 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 4, 4, 6 -; PWR7-NEXT: vadduwm 2, 2, 4 -; PWR7-NEXT: vadduwm 4, 7, 7 -; PWR7-NEXT: vsrw 2, 2, 4 -; PWR7-NEXT: vcmpgtuw 2, 3, 2 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI71_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI71_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI71_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI71_1@toc@l +; PWR7-NEXT: vsrw v8, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: vsubuwm v3, v3, v6 +; PWR7-NEXT: xxland v8, v8, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v8 +; PWR7-NEXT: vsrw v4, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v4, v4, vs0 +; PWR7-NEXT: vadduwm v2, v2, v4 +; PWR7-NEXT: vsrw v4, v2, v5 +; PWR7-NEXT: xxlxor v5, v5, v5 +; PWR7-NEXT: vadduwm v2, v2, v4 +; PWR7-NEXT: vrlw v4, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v4, v2, v4, v5 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v4, v4, v6 +; PWR7-NEXT: vadduwm v2, v2, v4 +; PWR7-NEXT: vadduwm v4, v7, v7 +; PWR7-NEXT: vsrw v2, v2, v4 +; PWR7-NEXT: vcmpgtuw v2, v3, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_17_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, -16 -; PWR8-NEXT: vspltisw 4, 1 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vsubuwm 3, 4, 3 -; PWR8-NEXT: vcmpgtuw 2, 3, 2 +; PWR8-NEXT: vspltisw v3, -16 +; PWR8-NEXT: vspltisw v4, 1 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vsubuwm v3, v4, v3 +; PWR8-NEXT: vcmpgtuw v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_17_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 17 -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vextsb2w 3, 3 -; PWR9-NEXT: vcmpgtuw 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 17 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vextsb2w v3, v3 +; PWR9-NEXT: vcmpgtuw v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ult <4 x i32> %2, @@ -8122,130 +8126,130 @@ define <4 x i32> @ult_17_v4i32(<4 x i32> %0) { define <4 x i32> @ugt_17_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ugt_17_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI72_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI72_0@toc@l -; PWR5-NEXT: lvx 0, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI72_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI72_1@toc@l -; PWR5-NEXT: vspltisw 1, 2 -; PWR5-NEXT: vsrw 5, 2, 4 -; PWR5-NEXT: vand 5, 5, 0 -; PWR5-NEXT: lvx 0, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 5 -; PWR5-NEXT: vand 5, 2, 0 -; PWR5-NEXT: vsrw 2, 2, 1 -; PWR5-NEXT: vand 2, 2, 0 -; PWR5-NEXT: vspltisw 0, 4 -; PWR5-NEXT: vadduwm 2, 5, 2 -; PWR5-NEXT: vsrw 5, 2, 0 -; PWR5-NEXT: vspltisb 0, 15 -; PWR5-NEXT: vadduwm 2, 2, 5 -; PWR5-NEXT: vspltisb 5, 1 -; PWR5-NEXT: vand 2, 2, 0 -; PWR5-NEXT: vspltisw 0, -16 -; PWR5-NEXT: vrlw 1, 5, 0 -; PWR5-NEXT: vmulouh 5, 2, 5 -; PWR5-NEXT: vmsumuhm 2, 2, 1, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 0 -; PWR5-NEXT: vadduwm 2, 5, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vsubuwm 3, 4, 0 -; PWR5-NEXT: vcmpgtuw 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI72_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI72_0@toc@l +; PWR5-NEXT: lvx v0, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI72_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI72_1@toc@l +; PWR5-NEXT: vspltisw v1, 2 +; PWR5-NEXT: vsrw v5, v2, v4 +; PWR5-NEXT: vand v5, v5, v0 +; PWR5-NEXT: lvx v0, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v5 +; PWR5-NEXT: vand v5, v2, v0 +; PWR5-NEXT: vsrw v2, v2, v1 +; PWR5-NEXT: vand v2, v2, v0 +; PWR5-NEXT: vspltisw v0, 4 +; PWR5-NEXT: vadduwm v2, v5, v2 +; PWR5-NEXT: vsrw v5, v2, v0 +; PWR5-NEXT: vspltisb v0, 15 +; PWR5-NEXT: vadduwm v2, v2, v5 +; PWR5-NEXT: vspltisb v5, 1 +; PWR5-NEXT: vand v2, v2, v0 +; PWR5-NEXT: vspltisw v0, -16 +; PWR5-NEXT: vrlw v1, v5, v0 +; PWR5-NEXT: vmulouh v5, v2, v5 +; PWR5-NEXT: vmsumuhm v2, v2, v1, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v0 +; PWR5-NEXT: vadduwm v2, v5, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vsubuwm v3, v4, v0 +; PWR5-NEXT: vcmpgtuw v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_17_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI72_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI72_0@toc@l -; PWR6-NEXT: lvx 0, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI72_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI72_1@toc@l -; PWR6-NEXT: vspltisw 1, 2 -; PWR6-NEXT: vsrw 5, 2, 4 -; PWR6-NEXT: vand 5, 5, 0 -; PWR6-NEXT: lvx 0, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 5 -; PWR6-NEXT: vand 5, 2, 0 -; PWR6-NEXT: vsrw 2, 2, 1 -; PWR6-NEXT: vand 2, 2, 0 -; PWR6-NEXT: vspltisw 0, 4 -; PWR6-NEXT: vadduwm 2, 5, 2 -; PWR6-NEXT: vsrw 5, 2, 0 -; PWR6-NEXT: vspltisb 0, 15 -; PWR6-NEXT: vadduwm 2, 2, 5 -; PWR6-NEXT: vspltisb 5, 1 -; PWR6-NEXT: vand 2, 2, 0 -; PWR6-NEXT: vspltisw 0, -16 -; PWR6-NEXT: vrlw 1, 5, 0 -; PWR6-NEXT: vmulouh 5, 2, 5 -; PWR6-NEXT: vmsumuhm 2, 2, 1, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 0 -; PWR6-NEXT: vadduwm 2, 5, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vsubuwm 3, 4, 0 -; PWR6-NEXT: vcmpgtuw 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI72_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI72_0@toc@l +; PWR6-NEXT: lvx v0, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI72_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI72_1@toc@l +; PWR6-NEXT: vspltisw v1, 2 +; PWR6-NEXT: vsrw v5, v2, v4 +; PWR6-NEXT: vand v5, v5, v0 +; PWR6-NEXT: lvx v0, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v5 +; PWR6-NEXT: vand v5, v2, v0 +; PWR6-NEXT: vsrw v2, v2, v1 +; PWR6-NEXT: vand v2, v2, v0 +; PWR6-NEXT: vspltisw v0, 4 +; PWR6-NEXT: vadduwm v2, v5, v2 +; PWR6-NEXT: vsrw v5, v2, v0 +; PWR6-NEXT: vspltisb v0, 15 +; PWR6-NEXT: vadduwm v2, v2, v5 +; PWR6-NEXT: vspltisb v5, 1 +; PWR6-NEXT: vand v2, v2, v0 +; PWR6-NEXT: vspltisw v0, -16 +; PWR6-NEXT: vrlw v1, v5, v0 +; PWR6-NEXT: vmulouh v5, v2, v5 +; PWR6-NEXT: vmsumuhm v2, v2, v1, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v0 +; PWR6-NEXT: vadduwm v2, v5, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vsubuwm v3, v4, v0 +; PWR6-NEXT: vcmpgtuw v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_17_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI72_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI72_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI72_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI72_1@toc@l -; PWR7-NEXT: vsrw 8, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: vsubuwm 3, 3, 6 -; PWR7-NEXT: xxland 40, 40, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 8 -; PWR7-NEXT: vsrw 4, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxland 36, 36, 0 -; PWR7-NEXT: vadduwm 2, 2, 4 -; PWR7-NEXT: vsrw 4, 2, 5 -; PWR7-NEXT: xxlxor 37, 37, 37 -; PWR7-NEXT: vadduwm 2, 2, 4 -; PWR7-NEXT: vrlw 4, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 4, 2, 4, 5 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 4, 4, 6 -; PWR7-NEXT: vadduwm 2, 2, 4 -; PWR7-NEXT: vadduwm 4, 7, 7 -; PWR7-NEXT: vsrw 2, 2, 4 -; PWR7-NEXT: vcmpgtuw 2, 2, 3 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI72_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI72_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI72_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI72_1@toc@l +; PWR7-NEXT: vsrw v8, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: vsubuwm v3, v3, v6 +; PWR7-NEXT: xxland v8, v8, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v8 +; PWR7-NEXT: vsrw v4, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxland v4, v4, vs0 +; PWR7-NEXT: vadduwm v2, v2, v4 +; PWR7-NEXT: vsrw v4, v2, v5 +; PWR7-NEXT: xxlxor v5, v5, v5 +; PWR7-NEXT: vadduwm v2, v2, v4 +; PWR7-NEXT: vrlw v4, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v4, v2, v4, v5 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v4, v4, v6 +; PWR7-NEXT: vadduwm v2, v2, v4 +; PWR7-NEXT: vadduwm v4, v7, v7 +; PWR7-NEXT: vsrw v2, v2, v4 +; PWR7-NEXT: vcmpgtuw v2, v2, v3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_17_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, -16 -; PWR8-NEXT: vspltisw 4, 1 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vsubuwm 3, 4, 3 -; PWR8-NEXT: vcmpgtuw 2, 2, 3 +; PWR8-NEXT: vspltisw v3, -16 +; PWR8-NEXT: vspltisw v4, 1 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vsubuwm v3, v4, v3 +; PWR8-NEXT: vcmpgtuw v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_17_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 17 -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vextsb2w 3, 3 -; PWR9-NEXT: vcmpgtuw 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 17 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vextsb2w v3, v3 +; PWR9-NEXT: vcmpgtuw v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ugt <4 x i32> %2, @@ -8256,132 +8260,132 @@ define <4 x i32> @ugt_17_v4i32(<4 x i32> %0) { define <4 x i32> @ult_18_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ult_18_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI73_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI73_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI73_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI73_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 9 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vcmpgtuw 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI73_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI73_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI73_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI73_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 9 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vcmpgtuw v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_18_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI73_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI73_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI73_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI73_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 9 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vcmpgtuw 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI73_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI73_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI73_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI73_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 9 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vcmpgtuw v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_18_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI73_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI73_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI73_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI73_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: vspltisw 8, 9 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxlxor 36, 36, 36 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 4 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 8, 8 -; PWR7-NEXT: vcmpgtuw 2, 3, 2 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI73_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI73_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI73_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI73_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: vspltisw v8, 9 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxlxor v4, v4, v4 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v4 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v8, v8 +; PWR7-NEXT: vcmpgtuw v2, v3, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_18_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 9 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vadduwm 3, 3, 3 -; PWR8-NEXT: vcmpgtuw 2, 3, 2 +; PWR8-NEXT: vspltisw v3, 9 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vadduwm v3, v3, v3 +; PWR8-NEXT: vcmpgtuw v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_18_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 18 -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vextsb2w 3, 3 -; PWR9-NEXT: vcmpgtuw 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 18 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vextsb2w v3, v3 +; PWR9-NEXT: vcmpgtuw v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ult <4 x i32> %2, @@ -8392,132 +8396,132 @@ define <4 x i32> @ult_18_v4i32(<4 x i32> %0) { define <4 x i32> @ugt_18_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ugt_18_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI74_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI74_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI74_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI74_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 9 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vcmpgtuw 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI74_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI74_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI74_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI74_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 9 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vcmpgtuw v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_18_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI74_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI74_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI74_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI74_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 9 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vcmpgtuw 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI74_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI74_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI74_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI74_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 9 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vcmpgtuw v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_18_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI74_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI74_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI74_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI74_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: vspltisw 8, 9 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxlxor 36, 36, 36 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 4 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 8, 8 -; PWR7-NEXT: vcmpgtuw 2, 2, 3 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI74_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI74_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI74_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI74_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: vspltisw v8, 9 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxlxor v4, v4, v4 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v4 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v8, v8 +; PWR7-NEXT: vcmpgtuw v2, v2, v3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_18_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 9 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vadduwm 3, 3, 3 -; PWR8-NEXT: vcmpgtuw 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 9 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vadduwm v3, v3, v3 +; PWR8-NEXT: vcmpgtuw v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_18_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 18 -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vextsb2w 3, 3 -; PWR9-NEXT: vcmpgtuw 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 18 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vextsb2w v3, v3 +; PWR9-NEXT: vcmpgtuw v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ugt <4 x i32> %2, @@ -8528,133 +8532,133 @@ define <4 x i32> @ugt_18_v4i32(<4 x i32> %0) { define <4 x i32> @ult_19_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ult_19_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI75_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI75_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI75_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI75_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 3 -; PWR5-NEXT: vsubuwm 3, 3, 5 -; PWR5-NEXT: vcmpgtuw 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI75_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI75_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI75_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI75_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 3 +; PWR5-NEXT: vsubuwm v3, v3, v5 +; PWR5-NEXT: vcmpgtuw v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_19_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI75_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI75_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI75_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI75_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 3 -; PWR6-NEXT: vsubuwm 3, 3, 5 -; PWR6-NEXT: vcmpgtuw 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI75_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI75_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI75_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI75_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 3 +; PWR6-NEXT: vsubuwm v3, v3, v5 +; PWR6-NEXT: vcmpgtuw v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_19_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI75_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI75_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI75_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI75_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: vspltisw 8, 3 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxlxor 36, 36, 36 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 4 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vsubuwm 3, 8, 6 -; PWR7-NEXT: vcmpgtuw 2, 3, 2 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI75_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI75_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI75_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI75_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: vspltisw v8, 3 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxlxor v4, v4, v4 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v4 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vsubuwm v3, v8, v6 +; PWR7-NEXT: vcmpgtuw v2, v3, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_19_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, -16 -; PWR8-NEXT: vspltisw 4, 3 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vsubuwm 3, 4, 3 -; PWR8-NEXT: vcmpgtuw 2, 3, 2 +; PWR8-NEXT: vspltisw v3, -16 +; PWR8-NEXT: vspltisw v4, 3 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vsubuwm v3, v4, v3 +; PWR8-NEXT: vcmpgtuw v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_19_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 19 -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vextsb2w 3, 3 -; PWR9-NEXT: vcmpgtuw 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 19 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vextsb2w v3, v3 +; PWR9-NEXT: vcmpgtuw v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ult <4 x i32> %2, @@ -8665,133 +8669,133 @@ define <4 x i32> @ult_19_v4i32(<4 x i32> %0) { define <4 x i32> @ugt_19_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ugt_19_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI76_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI76_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI76_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI76_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 3 -; PWR5-NEXT: vsubuwm 3, 3, 5 -; PWR5-NEXT: vcmpgtuw 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI76_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI76_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI76_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI76_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 3 +; PWR5-NEXT: vsubuwm v3, v3, v5 +; PWR5-NEXT: vcmpgtuw v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_19_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI76_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI76_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI76_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI76_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 3 -; PWR6-NEXT: vsubuwm 3, 3, 5 -; PWR6-NEXT: vcmpgtuw 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI76_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI76_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI76_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI76_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 3 +; PWR6-NEXT: vsubuwm v3, v3, v5 +; PWR6-NEXT: vcmpgtuw v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_19_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI76_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI76_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI76_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI76_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: vspltisw 8, 3 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxlxor 36, 36, 36 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 4 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vsubuwm 3, 8, 6 -; PWR7-NEXT: vcmpgtuw 2, 2, 3 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI76_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI76_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI76_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI76_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: vspltisw v8, 3 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxlxor v4, v4, v4 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v4 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vsubuwm v3, v8, v6 +; PWR7-NEXT: vcmpgtuw v2, v2, v3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_19_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, -16 -; PWR8-NEXT: vspltisw 4, 3 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vsubuwm 3, 4, 3 -; PWR8-NEXT: vcmpgtuw 2, 2, 3 +; PWR8-NEXT: vspltisw v3, -16 +; PWR8-NEXT: vspltisw v4, 3 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vsubuwm v3, v4, v3 +; PWR8-NEXT: vcmpgtuw v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_19_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 19 -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vextsb2w 3, 3 -; PWR9-NEXT: vcmpgtuw 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 19 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vextsb2w v3, v3 +; PWR9-NEXT: vcmpgtuw v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ugt <4 x i32> %2, @@ -8802,132 +8806,132 @@ define <4 x i32> @ugt_19_v4i32(<4 x i32> %0) { define <4 x i32> @ult_20_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ult_20_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI77_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI77_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI77_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI77_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 10 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vcmpgtuw 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI77_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI77_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI77_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI77_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 10 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vcmpgtuw v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_20_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI77_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI77_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI77_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI77_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 10 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vcmpgtuw 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI77_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI77_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI77_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI77_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 10 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vcmpgtuw v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_20_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI77_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI77_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI77_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI77_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: vspltisw 8, 10 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxlxor 36, 36, 36 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 4 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 8, 8 -; PWR7-NEXT: vcmpgtuw 2, 3, 2 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI77_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI77_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI77_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI77_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: vspltisw v8, 10 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxlxor v4, v4, v4 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v4 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v8, v8 +; PWR7-NEXT: vcmpgtuw v2, v3, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_20_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 10 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vadduwm 3, 3, 3 -; PWR8-NEXT: vcmpgtuw 2, 3, 2 +; PWR8-NEXT: vspltisw v3, 10 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vadduwm v3, v3, v3 +; PWR8-NEXT: vcmpgtuw v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_20_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 20 -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vextsb2w 3, 3 -; PWR9-NEXT: vcmpgtuw 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 20 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vextsb2w v3, v3 +; PWR9-NEXT: vcmpgtuw v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ult <4 x i32> %2, @@ -8938,132 +8942,132 @@ define <4 x i32> @ult_20_v4i32(<4 x i32> %0) { define <4 x i32> @ugt_20_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ugt_20_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI78_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI78_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI78_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI78_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 10 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vcmpgtuw 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI78_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI78_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI78_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI78_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 10 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vcmpgtuw v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_20_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI78_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI78_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI78_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI78_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 10 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vcmpgtuw 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI78_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI78_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI78_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI78_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 10 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vcmpgtuw v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_20_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI78_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI78_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI78_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI78_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: vspltisw 8, 10 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxlxor 36, 36, 36 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 4 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 8, 8 -; PWR7-NEXT: vcmpgtuw 2, 2, 3 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI78_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI78_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI78_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI78_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: vspltisw v8, 10 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxlxor v4, v4, v4 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v4 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v8, v8 +; PWR7-NEXT: vcmpgtuw v2, v2, v3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_20_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 10 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vadduwm 3, 3, 3 -; PWR8-NEXT: vcmpgtuw 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 10 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vadduwm v3, v3, v3 +; PWR8-NEXT: vcmpgtuw v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_20_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 20 -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vextsb2w 3, 3 -; PWR9-NEXT: vcmpgtuw 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 20 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vextsb2w v3, v3 +; PWR9-NEXT: vcmpgtuw v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ugt <4 x i32> %2, @@ -9074,133 +9078,133 @@ define <4 x i32> @ugt_20_v4i32(<4 x i32> %0) { define <4 x i32> @ult_21_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ult_21_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI79_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI79_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI79_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI79_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 5 -; PWR5-NEXT: vsubuwm 3, 3, 5 -; PWR5-NEXT: vcmpgtuw 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI79_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI79_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI79_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI79_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 5 +; PWR5-NEXT: vsubuwm v3, v3, v5 +; PWR5-NEXT: vcmpgtuw v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_21_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI79_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI79_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI79_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI79_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 5 -; PWR6-NEXT: vsubuwm 3, 3, 5 -; PWR6-NEXT: vcmpgtuw 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI79_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI79_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI79_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI79_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 5 +; PWR6-NEXT: vsubuwm v3, v3, v5 +; PWR6-NEXT: vcmpgtuw v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_21_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI79_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI79_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI79_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI79_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: vspltisw 8, 5 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxlxor 36, 36, 36 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 4 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vsubuwm 3, 8, 6 -; PWR7-NEXT: vcmpgtuw 2, 3, 2 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI79_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI79_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI79_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI79_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: vspltisw v8, 5 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxlxor v4, v4, v4 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v4 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vsubuwm v3, v8, v6 +; PWR7-NEXT: vcmpgtuw v2, v3, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_21_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, -16 -; PWR8-NEXT: vspltisw 4, 5 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vsubuwm 3, 4, 3 -; PWR8-NEXT: vcmpgtuw 2, 3, 2 +; PWR8-NEXT: vspltisw v3, -16 +; PWR8-NEXT: vspltisw v4, 5 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vsubuwm v3, v4, v3 +; PWR8-NEXT: vcmpgtuw v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_21_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 21 -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vextsb2w 3, 3 -; PWR9-NEXT: vcmpgtuw 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 21 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vextsb2w v3, v3 +; PWR9-NEXT: vcmpgtuw v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ult <4 x i32> %2, @@ -9211,133 +9215,133 @@ define <4 x i32> @ult_21_v4i32(<4 x i32> %0) { define <4 x i32> @ugt_21_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ugt_21_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI80_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI80_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI80_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI80_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 5 -; PWR5-NEXT: vsubuwm 3, 3, 5 -; PWR5-NEXT: vcmpgtuw 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI80_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI80_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI80_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI80_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 5 +; PWR5-NEXT: vsubuwm v3, v3, v5 +; PWR5-NEXT: vcmpgtuw v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_21_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI80_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI80_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI80_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI80_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 5 -; PWR6-NEXT: vsubuwm 3, 3, 5 -; PWR6-NEXT: vcmpgtuw 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI80_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI80_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI80_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI80_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 5 +; PWR6-NEXT: vsubuwm v3, v3, v5 +; PWR6-NEXT: vcmpgtuw v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_21_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI80_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI80_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI80_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI80_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: vspltisw 8, 5 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxlxor 36, 36, 36 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 4 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vsubuwm 3, 8, 6 -; PWR7-NEXT: vcmpgtuw 2, 2, 3 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI80_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI80_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI80_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI80_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: vspltisw v8, 5 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxlxor v4, v4, v4 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v4 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vsubuwm v3, v8, v6 +; PWR7-NEXT: vcmpgtuw v2, v2, v3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_21_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, -16 -; PWR8-NEXT: vspltisw 4, 5 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vsubuwm 3, 4, 3 -; PWR8-NEXT: vcmpgtuw 2, 2, 3 +; PWR8-NEXT: vspltisw v3, -16 +; PWR8-NEXT: vspltisw v4, 5 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vsubuwm v3, v4, v3 +; PWR8-NEXT: vcmpgtuw v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_21_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 21 -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vextsb2w 3, 3 -; PWR9-NEXT: vcmpgtuw 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 21 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vextsb2w v3, v3 +; PWR9-NEXT: vcmpgtuw v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ugt <4 x i32> %2, @@ -9348,132 +9352,132 @@ define <4 x i32> @ugt_21_v4i32(<4 x i32> %0) { define <4 x i32> @ult_22_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ult_22_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI81_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI81_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI81_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI81_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 11 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vcmpgtuw 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI81_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI81_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI81_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI81_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 11 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vcmpgtuw v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_22_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI81_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI81_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI81_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI81_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 11 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vcmpgtuw 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI81_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI81_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI81_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI81_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 11 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vcmpgtuw v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_22_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI81_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI81_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI81_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI81_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: vspltisw 8, 11 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxlxor 36, 36, 36 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 4 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 8, 8 -; PWR7-NEXT: vcmpgtuw 2, 3, 2 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI81_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI81_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI81_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI81_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: vspltisw v8, 11 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxlxor v4, v4, v4 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v4 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v8, v8 +; PWR7-NEXT: vcmpgtuw v2, v3, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_22_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 11 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vadduwm 3, 3, 3 -; PWR8-NEXT: vcmpgtuw 2, 3, 2 +; PWR8-NEXT: vspltisw v3, 11 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vadduwm v3, v3, v3 +; PWR8-NEXT: vcmpgtuw v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_22_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 22 -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vextsb2w 3, 3 -; PWR9-NEXT: vcmpgtuw 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 22 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vextsb2w v3, v3 +; PWR9-NEXT: vcmpgtuw v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ult <4 x i32> %2, @@ -9484,132 +9488,132 @@ define <4 x i32> @ult_22_v4i32(<4 x i32> %0) { define <4 x i32> @ugt_22_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ugt_22_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI82_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI82_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI82_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI82_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 11 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vcmpgtuw 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI82_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI82_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI82_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI82_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 11 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vcmpgtuw v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_22_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI82_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI82_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI82_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI82_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 11 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vcmpgtuw 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI82_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI82_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI82_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI82_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 11 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vcmpgtuw v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_22_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI82_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI82_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI82_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI82_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: vspltisw 8, 11 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxlxor 36, 36, 36 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 4 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 8, 8 -; PWR7-NEXT: vcmpgtuw 2, 2, 3 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI82_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI82_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI82_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI82_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: vspltisw v8, 11 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxlxor v4, v4, v4 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v4 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v8, v8 +; PWR7-NEXT: vcmpgtuw v2, v2, v3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_22_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 11 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vadduwm 3, 3, 3 -; PWR8-NEXT: vcmpgtuw 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 11 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vadduwm v3, v3, v3 +; PWR8-NEXT: vcmpgtuw v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_22_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 22 -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vextsb2w 3, 3 -; PWR9-NEXT: vcmpgtuw 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 22 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vextsb2w v3, v3 +; PWR9-NEXT: vcmpgtuw v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ugt <4 x i32> %2, @@ -9620,133 +9624,133 @@ define <4 x i32> @ugt_22_v4i32(<4 x i32> %0) { define <4 x i32> @ult_23_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ult_23_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI83_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI83_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI83_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI83_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 7 -; PWR5-NEXT: vsubuwm 3, 3, 5 -; PWR5-NEXT: vcmpgtuw 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI83_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI83_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI83_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI83_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 7 +; PWR5-NEXT: vsubuwm v3, v3, v5 +; PWR5-NEXT: vcmpgtuw v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_23_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI83_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI83_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI83_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI83_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 7 -; PWR6-NEXT: vsubuwm 3, 3, 5 -; PWR6-NEXT: vcmpgtuw 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI83_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI83_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI83_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI83_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 7 +; PWR6-NEXT: vsubuwm v3, v3, v5 +; PWR6-NEXT: vcmpgtuw v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_23_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI83_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI83_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI83_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI83_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: vspltisw 8, 7 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxlxor 36, 36, 36 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 4 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vsubuwm 3, 8, 6 -; PWR7-NEXT: vcmpgtuw 2, 3, 2 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI83_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI83_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI83_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI83_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: vspltisw v8, 7 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxlxor v4, v4, v4 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v4 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vsubuwm v3, v8, v6 +; PWR7-NEXT: vcmpgtuw v2, v3, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_23_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, -16 -; PWR8-NEXT: vspltisw 4, 7 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vsubuwm 3, 4, 3 -; PWR8-NEXT: vcmpgtuw 2, 3, 2 +; PWR8-NEXT: vspltisw v3, -16 +; PWR8-NEXT: vspltisw v4, 7 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vsubuwm v3, v4, v3 +; PWR8-NEXT: vcmpgtuw v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_23_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 23 -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vextsb2w 3, 3 -; PWR9-NEXT: vcmpgtuw 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 23 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vextsb2w v3, v3 +; PWR9-NEXT: vcmpgtuw v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ult <4 x i32> %2, @@ -9757,133 +9761,133 @@ define <4 x i32> @ult_23_v4i32(<4 x i32> %0) { define <4 x i32> @ugt_23_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ugt_23_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI84_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI84_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI84_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI84_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 7 -; PWR5-NEXT: vsubuwm 3, 3, 5 -; PWR5-NEXT: vcmpgtuw 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI84_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI84_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI84_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI84_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 7 +; PWR5-NEXT: vsubuwm v3, v3, v5 +; PWR5-NEXT: vcmpgtuw v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_23_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI84_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI84_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI84_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI84_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 7 -; PWR6-NEXT: vsubuwm 3, 3, 5 -; PWR6-NEXT: vcmpgtuw 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI84_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI84_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI84_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI84_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 7 +; PWR6-NEXT: vsubuwm v3, v3, v5 +; PWR6-NEXT: vcmpgtuw v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_23_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI84_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI84_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI84_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI84_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: vspltisw 8, 7 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxlxor 36, 36, 36 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 4 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vsubuwm 3, 8, 6 -; PWR7-NEXT: vcmpgtuw 2, 2, 3 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI84_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI84_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI84_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI84_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: vspltisw v8, 7 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxlxor v4, v4, v4 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v4 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vsubuwm v3, v8, v6 +; PWR7-NEXT: vcmpgtuw v2, v2, v3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_23_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, -16 -; PWR8-NEXT: vspltisw 4, 7 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vsubuwm 3, 4, 3 -; PWR8-NEXT: vcmpgtuw 2, 2, 3 +; PWR8-NEXT: vspltisw v3, -16 +; PWR8-NEXT: vspltisw v4, 7 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vsubuwm v3, v4, v3 +; PWR8-NEXT: vcmpgtuw v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_23_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 23 -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vextsb2w 3, 3 -; PWR9-NEXT: vcmpgtuw 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 23 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vextsb2w v3, v3 +; PWR9-NEXT: vcmpgtuw v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ugt <4 x i32> %2, @@ -9894,126 +9898,126 @@ define <4 x i32> @ugt_23_v4i32(<4 x i32> %0) { define <4 x i32> @ult_24_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ult_24_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI85_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI85_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI85_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI85_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vcmpgtuw 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI85_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI85_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI85_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI85_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vcmpgtuw v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_24_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI85_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI85_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI85_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI85_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vcmpgtuw 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI85_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI85_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI85_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI85_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vcmpgtuw v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_24_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI85_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI85_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI85_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI85_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxlxor 36, 36, 36 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 4 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vcmpgtuw 2, 3, 2 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI85_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI85_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI85_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI85_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxlxor v4, v4, v4 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v4 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vcmpgtuw v2, v3, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_24_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 12 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vadduwm 3, 3, 3 -; PWR8-NEXT: vcmpgtuw 2, 3, 2 +; PWR8-NEXT: vspltisw v3, 12 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vadduwm v3, v3, v3 +; PWR8-NEXT: vcmpgtuw v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_24_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 24 -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vextsb2w 3, 3 -; PWR9-NEXT: vcmpgtuw 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 24 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vextsb2w v3, v3 +; PWR9-NEXT: vcmpgtuw v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ult <4 x i32> %2, @@ -10024,126 +10028,126 @@ define <4 x i32> @ult_24_v4i32(<4 x i32> %0) { define <4 x i32> @ugt_24_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ugt_24_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI86_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI86_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI86_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI86_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vcmpgtuw 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI86_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI86_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI86_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI86_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vcmpgtuw v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_24_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI86_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI86_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI86_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI86_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vcmpgtuw 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI86_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI86_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI86_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI86_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vcmpgtuw v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_24_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI86_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI86_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI86_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI86_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxlxor 36, 36, 36 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 4 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vcmpgtuw 2, 2, 3 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI86_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI86_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI86_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI86_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxlxor v4, v4, v4 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v4 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vcmpgtuw v2, v2, v3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_24_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 12 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vadduwm 3, 3, 3 -; PWR8-NEXT: vcmpgtuw 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 12 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vadduwm v3, v3, v3 +; PWR8-NEXT: vcmpgtuw v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_24_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 24 -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vextsb2w 3, 3 -; PWR9-NEXT: vcmpgtuw 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 24 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vextsb2w v3, v3 +; PWR9-NEXT: vcmpgtuw v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ugt <4 x i32> %2, @@ -10154,133 +10158,133 @@ define <4 x i32> @ugt_24_v4i32(<4 x i32> %0) { define <4 x i32> @ult_25_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ult_25_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI87_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI87_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI87_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI87_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 9 -; PWR5-NEXT: vsubuwm 3, 3, 5 -; PWR5-NEXT: vcmpgtuw 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI87_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI87_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI87_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI87_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 9 +; PWR5-NEXT: vsubuwm v3, v3, v5 +; PWR5-NEXT: vcmpgtuw v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_25_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI87_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI87_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI87_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI87_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 9 -; PWR6-NEXT: vsubuwm 3, 3, 5 -; PWR6-NEXT: vcmpgtuw 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI87_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI87_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI87_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI87_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 9 +; PWR6-NEXT: vsubuwm v3, v3, v5 +; PWR6-NEXT: vcmpgtuw v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_25_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI87_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI87_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI87_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI87_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: vspltisw 8, 9 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxlxor 36, 36, 36 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 4 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vsubuwm 3, 8, 6 -; PWR7-NEXT: vcmpgtuw 2, 3, 2 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI87_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI87_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI87_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI87_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: vspltisw v8, 9 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxlxor v4, v4, v4 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v4 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vsubuwm v3, v8, v6 +; PWR7-NEXT: vcmpgtuw v2, v3, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_25_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, -16 -; PWR8-NEXT: vspltisw 4, 9 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vsubuwm 3, 4, 3 -; PWR8-NEXT: vcmpgtuw 2, 3, 2 +; PWR8-NEXT: vspltisw v3, -16 +; PWR8-NEXT: vspltisw v4, 9 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vsubuwm v3, v4, v3 +; PWR8-NEXT: vcmpgtuw v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_25_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 25 -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vextsb2w 3, 3 -; PWR9-NEXT: vcmpgtuw 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 25 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vextsb2w v3, v3 +; PWR9-NEXT: vcmpgtuw v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ult <4 x i32> %2, @@ -10291,133 +10295,133 @@ define <4 x i32> @ult_25_v4i32(<4 x i32> %0) { define <4 x i32> @ugt_25_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ugt_25_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI88_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI88_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI88_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI88_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 9 -; PWR5-NEXT: vsubuwm 3, 3, 5 -; PWR5-NEXT: vcmpgtuw 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI88_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI88_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI88_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI88_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 9 +; PWR5-NEXT: vsubuwm v3, v3, v5 +; PWR5-NEXT: vcmpgtuw v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_25_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI88_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI88_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI88_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI88_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 9 -; PWR6-NEXT: vsubuwm 3, 3, 5 -; PWR6-NEXT: vcmpgtuw 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI88_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI88_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI88_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI88_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 9 +; PWR6-NEXT: vsubuwm v3, v3, v5 +; PWR6-NEXT: vcmpgtuw v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_25_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI88_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI88_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI88_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI88_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: vspltisw 8, 9 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxlxor 36, 36, 36 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 4 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vsubuwm 3, 8, 6 -; PWR7-NEXT: vcmpgtuw 2, 2, 3 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI88_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI88_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI88_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI88_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: vspltisw v8, 9 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxlxor v4, v4, v4 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v4 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vsubuwm v3, v8, v6 +; PWR7-NEXT: vcmpgtuw v2, v2, v3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_25_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, -16 -; PWR8-NEXT: vspltisw 4, 9 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vsubuwm 3, 4, 3 -; PWR8-NEXT: vcmpgtuw 2, 2, 3 +; PWR8-NEXT: vspltisw v3, -16 +; PWR8-NEXT: vspltisw v4, 9 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vsubuwm v3, v4, v3 +; PWR8-NEXT: vcmpgtuw v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_25_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 25 -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vextsb2w 3, 3 -; PWR9-NEXT: vcmpgtuw 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 25 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vextsb2w v3, v3 +; PWR9-NEXT: vcmpgtuw v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ugt <4 x i32> %2, @@ -10428,132 +10432,132 @@ define <4 x i32> @ugt_25_v4i32(<4 x i32> %0) { define <4 x i32> @ult_26_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ult_26_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI89_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI89_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI89_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI89_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 13 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vcmpgtuw 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI89_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI89_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI89_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI89_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 13 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vcmpgtuw v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_26_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI89_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI89_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI89_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI89_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 13 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vcmpgtuw 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI89_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI89_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI89_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI89_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 13 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vcmpgtuw v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_26_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI89_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI89_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI89_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI89_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: vspltisw 8, 13 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxlxor 36, 36, 36 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 4 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 8, 8 -; PWR7-NEXT: vcmpgtuw 2, 3, 2 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI89_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI89_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI89_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI89_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: vspltisw v8, 13 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxlxor v4, v4, v4 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v4 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v8, v8 +; PWR7-NEXT: vcmpgtuw v2, v3, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_26_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 13 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vadduwm 3, 3, 3 -; PWR8-NEXT: vcmpgtuw 2, 3, 2 +; PWR8-NEXT: vspltisw v3, 13 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vadduwm v3, v3, v3 +; PWR8-NEXT: vcmpgtuw v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_26_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 26 -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vextsb2w 3, 3 -; PWR9-NEXT: vcmpgtuw 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 26 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vextsb2w v3, v3 +; PWR9-NEXT: vcmpgtuw v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ult <4 x i32> %2, @@ -10564,132 +10568,132 @@ define <4 x i32> @ult_26_v4i32(<4 x i32> %0) { define <4 x i32> @ugt_26_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ugt_26_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI90_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI90_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI90_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI90_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 13 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vcmpgtuw 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI90_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI90_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI90_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI90_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 13 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vcmpgtuw v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_26_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI90_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI90_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI90_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI90_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 13 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vcmpgtuw 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI90_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI90_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI90_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI90_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 13 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vcmpgtuw v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_26_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI90_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI90_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI90_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI90_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: vspltisw 8, 13 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxlxor 36, 36, 36 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 4 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 8, 8 -; PWR7-NEXT: vcmpgtuw 2, 2, 3 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI90_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI90_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI90_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI90_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: vspltisw v8, 13 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxlxor v4, v4, v4 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v4 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v8, v8 +; PWR7-NEXT: vcmpgtuw v2, v2, v3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_26_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 13 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vadduwm 3, 3, 3 -; PWR8-NEXT: vcmpgtuw 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 13 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vadduwm v3, v3, v3 +; PWR8-NEXT: vcmpgtuw v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_26_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 26 -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vextsb2w 3, 3 -; PWR9-NEXT: vcmpgtuw 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 26 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vextsb2w v3, v3 +; PWR9-NEXT: vcmpgtuw v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ugt <4 x i32> %2, @@ -10700,133 +10704,133 @@ define <4 x i32> @ugt_26_v4i32(<4 x i32> %0) { define <4 x i32> @ult_27_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ult_27_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI91_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI91_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI91_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI91_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 11 -; PWR5-NEXT: vsubuwm 3, 3, 5 -; PWR5-NEXT: vcmpgtuw 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI91_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI91_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI91_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI91_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 11 +; PWR5-NEXT: vsubuwm v3, v3, v5 +; PWR5-NEXT: vcmpgtuw v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_27_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI91_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI91_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI91_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI91_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 11 -; PWR6-NEXT: vsubuwm 3, 3, 5 -; PWR6-NEXT: vcmpgtuw 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI91_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI91_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI91_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI91_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 11 +; PWR6-NEXT: vsubuwm v3, v3, v5 +; PWR6-NEXT: vcmpgtuw v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_27_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI91_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI91_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI91_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI91_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: vspltisw 8, 11 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxlxor 36, 36, 36 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 4 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vsubuwm 3, 8, 6 -; PWR7-NEXT: vcmpgtuw 2, 3, 2 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI91_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI91_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI91_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI91_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: vspltisw v8, 11 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxlxor v4, v4, v4 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v4 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vsubuwm v3, v8, v6 +; PWR7-NEXT: vcmpgtuw v2, v3, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_27_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, -16 -; PWR8-NEXT: vspltisw 4, 11 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vsubuwm 3, 4, 3 -; PWR8-NEXT: vcmpgtuw 2, 3, 2 +; PWR8-NEXT: vspltisw v3, -16 +; PWR8-NEXT: vspltisw v4, 11 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vsubuwm v3, v4, v3 +; PWR8-NEXT: vcmpgtuw v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_27_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 27 -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vextsb2w 3, 3 -; PWR9-NEXT: vcmpgtuw 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 27 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vextsb2w v3, v3 +; PWR9-NEXT: vcmpgtuw v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ult <4 x i32> %2, @@ -10837,133 +10841,133 @@ define <4 x i32> @ult_27_v4i32(<4 x i32> %0) { define <4 x i32> @ugt_27_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ugt_27_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI92_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI92_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI92_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI92_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 11 -; PWR5-NEXT: vsubuwm 3, 3, 5 -; PWR5-NEXT: vcmpgtuw 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI92_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI92_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI92_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI92_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 11 +; PWR5-NEXT: vsubuwm v3, v3, v5 +; PWR5-NEXT: vcmpgtuw v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_27_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI92_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI92_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI92_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI92_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 11 -; PWR6-NEXT: vsubuwm 3, 3, 5 -; PWR6-NEXT: vcmpgtuw 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI92_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI92_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI92_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI92_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 11 +; PWR6-NEXT: vsubuwm v3, v3, v5 +; PWR6-NEXT: vcmpgtuw v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_27_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI92_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI92_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI92_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI92_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: vspltisw 8, 11 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxlxor 36, 36, 36 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 4 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vsubuwm 3, 8, 6 -; PWR7-NEXT: vcmpgtuw 2, 2, 3 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI92_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI92_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI92_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI92_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: vspltisw v8, 11 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxlxor v4, v4, v4 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v4 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vsubuwm v3, v8, v6 +; PWR7-NEXT: vcmpgtuw v2, v2, v3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_27_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, -16 -; PWR8-NEXT: vspltisw 4, 11 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vsubuwm 3, 4, 3 -; PWR8-NEXT: vcmpgtuw 2, 2, 3 +; PWR8-NEXT: vspltisw v3, -16 +; PWR8-NEXT: vspltisw v4, 11 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vsubuwm v3, v4, v3 +; PWR8-NEXT: vcmpgtuw v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_27_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 27 -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vextsb2w 3, 3 -; PWR9-NEXT: vcmpgtuw 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 27 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vextsb2w v3, v3 +; PWR9-NEXT: vcmpgtuw v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ugt <4 x i32> %2, @@ -10974,132 +10978,132 @@ define <4 x i32> @ugt_27_v4i32(<4 x i32> %0) { define <4 x i32> @ult_28_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ult_28_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI93_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI93_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI93_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI93_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 14 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vcmpgtuw 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI93_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI93_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI93_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI93_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 14 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vcmpgtuw v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_28_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI93_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI93_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI93_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI93_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 14 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vcmpgtuw 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI93_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI93_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI93_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI93_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 14 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vcmpgtuw v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_28_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI93_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI93_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI93_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI93_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: vspltisw 8, 14 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxlxor 36, 36, 36 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 4 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 8, 8 -; PWR7-NEXT: vcmpgtuw 2, 3, 2 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI93_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI93_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI93_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI93_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: vspltisw v8, 14 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxlxor v4, v4, v4 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v4 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v8, v8 +; PWR7-NEXT: vcmpgtuw v2, v3, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_28_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 14 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vadduwm 3, 3, 3 -; PWR8-NEXT: vcmpgtuw 2, 3, 2 +; PWR8-NEXT: vspltisw v3, 14 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vadduwm v3, v3, v3 +; PWR8-NEXT: vcmpgtuw v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_28_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 28 -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vextsb2w 3, 3 -; PWR9-NEXT: vcmpgtuw 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 28 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vextsb2w v3, v3 +; PWR9-NEXT: vcmpgtuw v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ult <4 x i32> %2, @@ -11110,132 +11114,132 @@ define <4 x i32> @ult_28_v4i32(<4 x i32> %0) { define <4 x i32> @ugt_28_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ugt_28_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI94_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI94_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI94_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI94_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 14 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vcmpgtuw 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI94_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI94_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI94_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI94_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 14 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vcmpgtuw v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_28_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI94_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI94_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI94_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI94_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 14 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vcmpgtuw 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI94_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI94_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI94_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI94_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 14 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vcmpgtuw v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_28_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI94_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI94_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI94_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI94_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: vspltisw 8, 14 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxlxor 36, 36, 36 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 4 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 8, 8 -; PWR7-NEXT: vcmpgtuw 2, 2, 3 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI94_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI94_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI94_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI94_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: vspltisw v8, 14 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxlxor v4, v4, v4 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v4 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v8, v8 +; PWR7-NEXT: vcmpgtuw v2, v2, v3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_28_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 14 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vadduwm 3, 3, 3 -; PWR8-NEXT: vcmpgtuw 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 14 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vadduwm v3, v3, v3 +; PWR8-NEXT: vcmpgtuw v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_28_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 28 -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vextsb2w 3, 3 -; PWR9-NEXT: vcmpgtuw 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 28 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vextsb2w v3, v3 +; PWR9-NEXT: vcmpgtuw v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ugt <4 x i32> %2, @@ -11246,133 +11250,133 @@ define <4 x i32> @ugt_28_v4i32(<4 x i32> %0) { define <4 x i32> @ult_29_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ult_29_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI95_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI95_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI95_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI95_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 13 -; PWR5-NEXT: vsubuwm 3, 3, 5 -; PWR5-NEXT: vcmpgtuw 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI95_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI95_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI95_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI95_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 13 +; PWR5-NEXT: vsubuwm v3, v3, v5 +; PWR5-NEXT: vcmpgtuw v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_29_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI95_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI95_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI95_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI95_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 13 -; PWR6-NEXT: vsubuwm 3, 3, 5 -; PWR6-NEXT: vcmpgtuw 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI95_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI95_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI95_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI95_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 13 +; PWR6-NEXT: vsubuwm v3, v3, v5 +; PWR6-NEXT: vcmpgtuw v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_29_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI95_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI95_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI95_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI95_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: vspltisw 8, 13 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxlxor 36, 36, 36 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 4 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vsubuwm 3, 8, 6 -; PWR7-NEXT: vcmpgtuw 2, 3, 2 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI95_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI95_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI95_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI95_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: vspltisw v8, 13 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxlxor v4, v4, v4 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v4 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vsubuwm v3, v8, v6 +; PWR7-NEXT: vcmpgtuw v2, v3, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_29_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, -16 -; PWR8-NEXT: vspltisw 4, 13 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vsubuwm 3, 4, 3 -; PWR8-NEXT: vcmpgtuw 2, 3, 2 +; PWR8-NEXT: vspltisw v3, -16 +; PWR8-NEXT: vspltisw v4, 13 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vsubuwm v3, v4, v3 +; PWR8-NEXT: vcmpgtuw v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_29_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 29 -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vextsb2w 3, 3 -; PWR9-NEXT: vcmpgtuw 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 29 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vextsb2w v3, v3 +; PWR9-NEXT: vcmpgtuw v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ult <4 x i32> %2, @@ -11383,133 +11387,133 @@ define <4 x i32> @ult_29_v4i32(<4 x i32> %0) { define <4 x i32> @ugt_29_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ugt_29_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI96_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI96_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI96_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI96_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 13 -; PWR5-NEXT: vsubuwm 3, 3, 5 -; PWR5-NEXT: vcmpgtuw 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI96_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI96_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI96_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI96_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 13 +; PWR5-NEXT: vsubuwm v3, v3, v5 +; PWR5-NEXT: vcmpgtuw v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_29_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI96_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI96_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI96_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI96_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 13 -; PWR6-NEXT: vsubuwm 3, 3, 5 -; PWR6-NEXT: vcmpgtuw 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI96_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI96_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI96_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI96_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 13 +; PWR6-NEXT: vsubuwm v3, v3, v5 +; PWR6-NEXT: vcmpgtuw v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_29_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI96_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI96_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI96_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI96_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: vspltisw 8, 13 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxlxor 36, 36, 36 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 4 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vsubuwm 3, 8, 6 -; PWR7-NEXT: vcmpgtuw 2, 2, 3 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI96_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI96_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI96_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI96_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: vspltisw v8, 13 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxlxor v4, v4, v4 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v4 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vsubuwm v3, v8, v6 +; PWR7-NEXT: vcmpgtuw v2, v2, v3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_29_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, -16 -; PWR8-NEXT: vspltisw 4, 13 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vsubuwm 3, 4, 3 -; PWR8-NEXT: vcmpgtuw 2, 2, 3 +; PWR8-NEXT: vspltisw v3, -16 +; PWR8-NEXT: vspltisw v4, 13 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vsubuwm v3, v4, v3 +; PWR8-NEXT: vcmpgtuw v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_29_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 29 -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vextsb2w 3, 3 -; PWR9-NEXT: vcmpgtuw 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 29 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vextsb2w v3, v3 +; PWR9-NEXT: vcmpgtuw v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ugt <4 x i32> %2, @@ -11520,132 +11524,132 @@ define <4 x i32> @ugt_29_v4i32(<4 x i32> %0) { define <4 x i32> @ult_30_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ult_30_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI97_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI97_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI97_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI97_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 15 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vcmpgtuw 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI97_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI97_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI97_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI97_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 15 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vcmpgtuw v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_30_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI97_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI97_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI97_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI97_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 15 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vcmpgtuw 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI97_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI97_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI97_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI97_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 15 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vcmpgtuw v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_30_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI97_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI97_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI97_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI97_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: vspltisw 8, 15 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxlxor 36, 36, 36 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 4 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 8, 8 -; PWR7-NEXT: vcmpgtuw 2, 3, 2 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI97_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI97_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI97_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI97_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: vspltisw v8, 15 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxlxor v4, v4, v4 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v4 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v8, v8 +; PWR7-NEXT: vcmpgtuw v2, v3, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_30_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 15 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vadduwm 3, 3, 3 -; PWR8-NEXT: vcmpgtuw 2, 3, 2 +; PWR8-NEXT: vspltisw v3, 15 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vadduwm v3, v3, v3 +; PWR8-NEXT: vcmpgtuw v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_30_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 30 -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vextsb2w 3, 3 -; PWR9-NEXT: vcmpgtuw 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 30 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vextsb2w v3, v3 +; PWR9-NEXT: vcmpgtuw v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ult <4 x i32> %2, @@ -11656,132 +11660,132 @@ define <4 x i32> @ult_30_v4i32(<4 x i32> %0) { define <4 x i32> @ugt_30_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ugt_30_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI98_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI98_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI98_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI98_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 15 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vcmpgtuw 2, 2, 3 +; PWR5-NEXT: addis r3, r2, .LCPI98_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI98_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI98_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI98_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 15 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vcmpgtuw v2, v2, v3 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_30_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI98_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI98_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI98_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI98_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 15 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vcmpgtuw 2, 2, 3 +; PWR6-NEXT: addis r3, r2, .LCPI98_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI98_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI98_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI98_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 15 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vcmpgtuw v2, v2, v3 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_30_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI98_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI98_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI98_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI98_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: vspltisw 8, 15 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxlxor 36, 36, 36 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 4 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 8, 8 -; PWR7-NEXT: vcmpgtuw 2, 2, 3 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI98_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI98_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI98_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI98_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: vspltisw v8, 15 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxlxor v4, v4, v4 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v4 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v8, v8 +; PWR7-NEXT: vcmpgtuw v2, v2, v3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_30_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 15 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vadduwm 3, 3, 3 -; PWR8-NEXT: vcmpgtuw 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 15 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vadduwm v3, v3, v3 +; PWR8-NEXT: vcmpgtuw v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_30_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 30 -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vextsb2w 3, 3 -; PWR9-NEXT: vcmpgtuw 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 30 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vextsb2w v3, v3 +; PWR9-NEXT: vcmpgtuw v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ugt <4 x i32> %2, @@ -11792,133 +11796,133 @@ define <4 x i32> @ugt_30_v4i32(<4 x i32> %0) { define <4 x i32> @ult_31_v4i32(<4 x i32> %0) { ; PWR5-LABEL: ult_31_v4i32: ; PWR5: # %bb.0: -; PWR5-NEXT: addis 3, 2, .LCPI99_0@toc@ha -; PWR5-NEXT: vspltisw 4, 1 -; PWR5-NEXT: vxor 3, 3, 3 -; PWR5-NEXT: addi 3, 3, .LCPI99_0@toc@l -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: addis 3, 2, .LCPI99_1@toc@ha -; PWR5-NEXT: addi 3, 3, .LCPI99_1@toc@l -; PWR5-NEXT: vspltisw 0, 2 -; PWR5-NEXT: vsrw 4, 2, 4 -; PWR5-NEXT: vand 4, 4, 5 -; PWR5-NEXT: lvx 5, 0, 3 -; PWR5-NEXT: vsubuwm 2, 2, 4 -; PWR5-NEXT: vand 4, 2, 5 -; PWR5-NEXT: vsrw 2, 2, 0 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, 4 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 4, 2, 5 -; PWR5-NEXT: vspltisb 5, 15 -; PWR5-NEXT: vadduwm 2, 2, 4 -; PWR5-NEXT: vspltisb 4, 1 -; PWR5-NEXT: vand 2, 2, 5 -; PWR5-NEXT: vspltisw 5, -16 -; PWR5-NEXT: vrlw 0, 4, 5 -; PWR5-NEXT: vmulouh 4, 2, 4 -; PWR5-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR5-NEXT: vspltisw 3, 12 -; PWR5-NEXT: vadduwm 3, 3, 3 -; PWR5-NEXT: vslw 2, 2, 5 -; PWR5-NEXT: vadduwm 2, 4, 2 -; PWR5-NEXT: vsrw 2, 2, 3 -; PWR5-NEXT: vspltisw 3, 15 -; PWR5-NEXT: vsubuwm 3, 3, 5 -; PWR5-NEXT: vcmpgtuw 2, 3, 2 +; PWR5-NEXT: addis r3, r2, .LCPI99_0@toc@ha +; PWR5-NEXT: vspltisw v4, 1 +; PWR5-NEXT: vxor v3, v3, v3 +; PWR5-NEXT: addi r3, r3, .LCPI99_0@toc@l +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: addis r3, r2, .LCPI99_1@toc@ha +; PWR5-NEXT: addi r3, r3, .LCPI99_1@toc@l +; PWR5-NEXT: vspltisw v0, 2 +; PWR5-NEXT: vsrw v4, v2, v4 +; PWR5-NEXT: vand v4, v4, v5 +; PWR5-NEXT: lvx v5, 0, r3 +; PWR5-NEXT: vsubuwm v2, v2, v4 +; PWR5-NEXT: vand v4, v2, v5 +; PWR5-NEXT: vsrw v2, v2, v0 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, 4 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v4, v2, v5 +; PWR5-NEXT: vspltisb v5, 15 +; PWR5-NEXT: vadduwm v2, v2, v4 +; PWR5-NEXT: vspltisb v4, 1 +; PWR5-NEXT: vand v2, v2, v5 +; PWR5-NEXT: vspltisw v5, -16 +; PWR5-NEXT: vrlw v0, v4, v5 +; PWR5-NEXT: vmulouh v4, v2, v4 +; PWR5-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR5-NEXT: vspltisw v3, 12 +; PWR5-NEXT: vadduwm v3, v3, v3 +; PWR5-NEXT: vslw v2, v2, v5 +; PWR5-NEXT: vadduwm v2, v4, v2 +; PWR5-NEXT: vsrw v2, v2, v3 +; PWR5-NEXT: vspltisw v3, 15 +; PWR5-NEXT: vsubuwm v3, v3, v5 +; PWR5-NEXT: vcmpgtuw v2, v3, v2 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_31_v4i32: ; PWR6: # %bb.0: -; PWR6-NEXT: addis 3, 2, .LCPI99_0@toc@ha -; PWR6-NEXT: vspltisw 4, 1 -; PWR6-NEXT: vxor 3, 3, 3 -; PWR6-NEXT: addi 3, 3, .LCPI99_0@toc@l -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: addis 3, 2, .LCPI99_1@toc@ha -; PWR6-NEXT: addi 3, 3, .LCPI99_1@toc@l -; PWR6-NEXT: vspltisw 0, 2 -; PWR6-NEXT: vsrw 4, 2, 4 -; PWR6-NEXT: vand 4, 4, 5 -; PWR6-NEXT: lvx 5, 0, 3 -; PWR6-NEXT: vsubuwm 2, 2, 4 -; PWR6-NEXT: vand 4, 2, 5 -; PWR6-NEXT: vsrw 2, 2, 0 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, 4 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 4, 2, 5 -; PWR6-NEXT: vspltisb 5, 15 -; PWR6-NEXT: vadduwm 2, 2, 4 -; PWR6-NEXT: vspltisb 4, 1 -; PWR6-NEXT: vand 2, 2, 5 -; PWR6-NEXT: vspltisw 5, -16 -; PWR6-NEXT: vrlw 0, 4, 5 -; PWR6-NEXT: vmulouh 4, 2, 4 -; PWR6-NEXT: vmsumuhm 2, 2, 0, 3 -; PWR6-NEXT: vspltisw 3, 12 -; PWR6-NEXT: vadduwm 3, 3, 3 -; PWR6-NEXT: vslw 2, 2, 5 -; PWR6-NEXT: vadduwm 2, 4, 2 -; PWR6-NEXT: vsrw 2, 2, 3 -; PWR6-NEXT: vspltisw 3, 15 -; PWR6-NEXT: vsubuwm 3, 3, 5 -; PWR6-NEXT: vcmpgtuw 2, 3, 2 +; PWR6-NEXT: addis r3, r2, .LCPI99_0@toc@ha +; PWR6-NEXT: vspltisw v4, 1 +; PWR6-NEXT: vxor v3, v3, v3 +; PWR6-NEXT: addi r3, r3, .LCPI99_0@toc@l +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: addis r3, r2, .LCPI99_1@toc@ha +; PWR6-NEXT: addi r3, r3, .LCPI99_1@toc@l +; PWR6-NEXT: vspltisw v0, 2 +; PWR6-NEXT: vsrw v4, v2, v4 +; PWR6-NEXT: vand v4, v4, v5 +; PWR6-NEXT: lvx v5, 0, r3 +; PWR6-NEXT: vsubuwm v2, v2, v4 +; PWR6-NEXT: vand v4, v2, v5 +; PWR6-NEXT: vsrw v2, v2, v0 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, 4 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v4, v2, v5 +; PWR6-NEXT: vspltisb v5, 15 +; PWR6-NEXT: vadduwm v2, v2, v4 +; PWR6-NEXT: vspltisb v4, 1 +; PWR6-NEXT: vand v2, v2, v5 +; PWR6-NEXT: vspltisw v5, -16 +; PWR6-NEXT: vrlw v0, v4, v5 +; PWR6-NEXT: vmulouh v4, v2, v4 +; PWR6-NEXT: vmsumuhm v2, v2, v0, v3 +; PWR6-NEXT: vspltisw v3, 12 +; PWR6-NEXT: vadduwm v3, v3, v3 +; PWR6-NEXT: vslw v2, v2, v5 +; PWR6-NEXT: vadduwm v2, v4, v2 +; PWR6-NEXT: vsrw v2, v2, v3 +; PWR6-NEXT: vspltisw v3, 15 +; PWR6-NEXT: vsubuwm v3, v3, v5 +; PWR6-NEXT: vcmpgtuw v2, v3, v2 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_31_v4i32: ; PWR7: # %bb.0: -; PWR7-NEXT: vspltisw 3, 1 -; PWR7-NEXT: addis 3, 2, .LCPI99_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI99_0@toc@l -; PWR7-NEXT: vspltisw 4, 2 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI99_1@toc@ha -; PWR7-NEXT: vspltisw 5, 4 -; PWR7-NEXT: addi 3, 3, .LCPI99_1@toc@l -; PWR7-NEXT: vsrw 3, 2, 3 -; PWR7-NEXT: vspltisb 0, 15 -; PWR7-NEXT: vspltisb 1, 1 -; PWR7-NEXT: vspltisw 6, -16 -; PWR7-NEXT: vspltisw 7, 12 -; PWR7-NEXT: vspltisw 8, 15 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: vsubuwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 4 -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: xxlxor 36, 36, 36 -; PWR7-NEXT: xxland 35, 35, 0 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vsrw 3, 2, 5 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vrlw 3, 1, 6 -; PWR7-NEXT: xxland 34, 34, 32 -; PWR7-NEXT: vmsumuhm 3, 2, 3, 4 -; PWR7-NEXT: vmulouh 2, 2, 1 -; PWR7-NEXT: vslw 3, 3, 6 -; PWR7-NEXT: vadduwm 2, 2, 3 -; PWR7-NEXT: vadduwm 3, 7, 7 -; PWR7-NEXT: vsrw 2, 2, 3 -; PWR7-NEXT: vsubuwm 3, 8, 6 -; PWR7-NEXT: vcmpgtuw 2, 3, 2 +; PWR7-NEXT: vspltisw v3, 1 +; PWR7-NEXT: addis r3, r2, .LCPI99_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI99_0@toc@l +; PWR7-NEXT: vspltisw v4, 2 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI99_1@toc@ha +; PWR7-NEXT: vspltisw v5, 4 +; PWR7-NEXT: addi r3, r3, .LCPI99_1@toc@l +; PWR7-NEXT: vsrw v3, v2, v3 +; PWR7-NEXT: vspltisb v0, 15 +; PWR7-NEXT: vspltisb v1, 1 +; PWR7-NEXT: vspltisw v6, -16 +; PWR7-NEXT: vspltisw v7, 12 +; PWR7-NEXT: vspltisw v8, 15 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: vsubuwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v4 +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: xxlxor v4, v4, v4 +; PWR7-NEXT: xxland v3, v3, vs0 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vsrw v3, v2, v5 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vrlw v3, v1, v6 +; PWR7-NEXT: xxland v2, v2, v0 +; PWR7-NEXT: vmsumuhm v3, v2, v3, v4 +; PWR7-NEXT: vmulouh v2, v2, v1 +; PWR7-NEXT: vslw v3, v3, v6 +; PWR7-NEXT: vadduwm v2, v2, v3 +; PWR7-NEXT: vadduwm v3, v7, v7 +; PWR7-NEXT: vsrw v2, v2, v3 +; PWR7-NEXT: vsubuwm v3, v8, v6 +; PWR7-NEXT: vcmpgtuw v2, v3, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_31_v4i32: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, -16 -; PWR8-NEXT: vspltisw 4, 15 -; PWR8-NEXT: vpopcntw 2, 2 -; PWR8-NEXT: vsubuwm 3, 4, 3 -; PWR8-NEXT: vcmpgtuw 2, 3, 2 +; PWR8-NEXT: vspltisw v3, -16 +; PWR8-NEXT: vspltisw v4, 15 +; PWR8-NEXT: vpopcntw v2, v2 +; PWR8-NEXT: vsubuwm v3, v4, v3 +; PWR8-NEXT: vcmpgtuw v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_31_v4i32: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 31 -; PWR9-NEXT: vpopcntw 2, 2 -; PWR9-NEXT: vextsb2w 3, 3 -; PWR9-NEXT: vcmpgtuw 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 31 +; PWR9-NEXT: vpopcntw v2, v2 +; PWR9-NEXT: vextsb2w v3, v3 +; PWR9-NEXT: vcmpgtuw v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %0) %3 = icmp ult <4 x i32> %2, @@ -11929,65 +11933,65 @@ define <4 x i32> @ult_31_v4i32(<4 x i32> %0) { define <2 x i64> @ugt_1_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_1_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: addi 5, 3, -1 -; PWR5-NEXT: addi 6, 4, -1 -; PWR5-NEXT: and 3, 3, 5 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: subfic 3, 3, 0 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subfic 4, 4, 0 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: addi r5, r3, -1 +; PWR5-NEXT: addi r6, r4, -1 +; PWR5-NEXT: and r3, r3, r5 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: subfic r3, r3, 0 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subfic r4, r4, 0 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_1_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: addi 5, 3, -1 -; PWR6-NEXT: addi 6, 4, -1 -; PWR6-NEXT: and 3, 3, 5 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: subfic 3, 3, 0 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subfic 4, 4, 0 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: addi r5, r3, -1 +; PWR6-NEXT: addi r6, r4, -1 +; PWR6-NEXT: and r3, r3, r5 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: subfic r3, r3, 0 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subfic r4, r4, 0 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_1_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: xxlxor 35, 35, 35 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 3, -24(1) -; PWR7-NEXT: addi 3, 3, -1 -; PWR7-NEXT: std 3, -8(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: addi 3, 3, -1 -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI100_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI100_0@toc@l -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: vcmpequw 2, 2, 3 -; PWR7-NEXT: lxvw4x 35, 0, 3 -; PWR7-NEXT: xxlnor 34, 34, 34 -; PWR7-NEXT: vperm 3, 2, 2, 3 -; PWR7-NEXT: xxlor 34, 35, 34 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: xxlxor v3, v3, v3 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r3, -24(r1) +; PWR7-NEXT: addi r3, r3, -1 +; PWR7-NEXT: std r3, -8(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: addi r3, r3, -1 +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI100_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI100_0@toc@l +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: vcmpequw v2, v2, v3 +; PWR7-NEXT: lxvw4x v3, 0, r3 +; PWR7-NEXT: xxlnor v2, v2, v2 +; PWR7-NEXT: vperm v3, v2, v2, v3 +; PWR7-NEXT: xxlor v2, v3, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_1_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 1 -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: vupklsw 3, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 1 +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: vupklsw v3, v3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_1_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltisw 3, 1 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vupklsw 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: vspltisw v3, 1 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vupklsw v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -11998,64 +12002,64 @@ define <2 x i64> @ugt_1_v2i64(<2 x i64> %0) { define <2 x i64> @ult_2_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_2_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: addi 5, 3, -1 -; PWR5-NEXT: addi 6, 4, -1 -; PWR5-NEXT: and 3, 3, 5 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: addic 3, 3, -1 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: addic 4, 4, -1 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: addi r5, r3, -1 +; PWR5-NEXT: addi r6, r4, -1 +; PWR5-NEXT: and r3, r3, r5 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: addic r3, r3, -1 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: addic r4, r4, -1 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_2_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: addi 5, 3, -1 -; PWR6-NEXT: addi 6, 4, -1 -; PWR6-NEXT: and 3, 3, 5 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: addic 3, 3, -1 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: addic 4, 4, -1 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: addi r5, r3, -1 +; PWR6-NEXT: addi r6, r4, -1 +; PWR6-NEXT: and r3, r3, r5 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: addic r3, r3, -1 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: addic r4, r4, -1 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_2_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: xxlxor 35, 35, 35 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 3, -24(1) -; PWR7-NEXT: addi 3, 3, -1 -; PWR7-NEXT: std 3, -8(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: addi 3, 3, -1 -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvw4x 0, 0, 3 -; PWR7-NEXT: addis 3, 2, .LCPI101_0@toc@ha -; PWR7-NEXT: addi 3, 3, .LCPI101_0@toc@l -; PWR7-NEXT: xxland 34, 34, 0 -; PWR7-NEXT: vcmpequw 2, 2, 3 -; PWR7-NEXT: lxvw4x 35, 0, 3 -; PWR7-NEXT: vperm 3, 2, 2, 3 -; PWR7-NEXT: xxland 34, 35, 34 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: xxlxor v3, v3, v3 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r3, -24(r1) +; PWR7-NEXT: addi r3, r3, -1 +; PWR7-NEXT: std r3, -8(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: addi r3, r3, -1 +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvw4x vs0, 0, r3 +; PWR7-NEXT: addis r3, r2, .LCPI101_0@toc@ha +; PWR7-NEXT: addi r3, r3, .LCPI101_0@toc@l +; PWR7-NEXT: xxland v2, v2, vs0 +; PWR7-NEXT: vcmpequw v2, v2, v3 +; PWR7-NEXT: lxvw4x v3, 0, r3 +; PWR7-NEXT: vperm v3, v2, v2, v3 +; PWR7-NEXT: xxland v2, v3, v2 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_2_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 2 -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: vupklsw 3, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: vspltisw v3, 2 +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: vupklsw v3, v3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_2_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltisw 3, 2 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vupklsw 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: vspltisw v3, 2 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vupklsw v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -12066,128 +12070,128 @@ define <2 x i64> @ult_2_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_2_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_2_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 2 -; PWR5-NEXT: subfic 3, 3, 2 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 2 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 2 +; PWR5-NEXT: subfic r3, r3, 2 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 2 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_2_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 2 -; PWR6-NEXT: subfic 3, 3, 2 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 2 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 2 +; PWR6-NEXT: subfic r3, r3, 2 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 2 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_2_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 2 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 2 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 2 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 2 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_2_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 2 -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: vupklsw 3, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 2 +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: vupklsw v3, v3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_2_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltisw 3, 2 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vupklsw 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: vspltisw v3, 2 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vupklsw v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -12198,128 +12202,128 @@ define <2 x i64> @ugt_2_v2i64(<2 x i64> %0) { define <2 x i64> @ult_3_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_3_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 3 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 3 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_3_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 3 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 3 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_3_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 3 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 3 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 3 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 3 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_3_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 3 -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: vupklsw 3, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: vspltisw v3, 3 +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: vupklsw v3, v3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_3_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltisw 3, 3 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vupklsw 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: vspltisw v3, 3 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vupklsw v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -12330,128 +12334,128 @@ define <2 x i64> @ult_3_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_3_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_3_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 3 -; PWR5-NEXT: subfic 3, 3, 3 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 3 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 3 +; PWR5-NEXT: subfic r3, r3, 3 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 3 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_3_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 3 -; PWR6-NEXT: subfic 3, 3, 3 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 3 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 3 +; PWR6-NEXT: subfic r3, r3, 3 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 3 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_3_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 3 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 3 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 3 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 3 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_3_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 3 -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: vupklsw 3, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 3 +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: vupklsw v3, v3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_3_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltisw 3, 3 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vupklsw 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: vspltisw v3, 3 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vupklsw v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -12462,128 +12466,128 @@ define <2 x i64> @ugt_3_v2i64(<2 x i64> %0) { define <2 x i64> @ult_4_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_4_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 4 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 4 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_4_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 4 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 4 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_4_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 4 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 4 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 4 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 4 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_4_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 4 -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: vupklsw 3, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: vspltisw v3, 4 +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: vupklsw v3, v3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_4_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltisw 3, 4 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vupklsw 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: vspltisw v3, 4 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vupklsw v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -12594,128 +12598,128 @@ define <2 x i64> @ult_4_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_4_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_4_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 4 -; PWR5-NEXT: subfic 3, 3, 4 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 4 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 4 +; PWR5-NEXT: subfic r3, r3, 4 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 4 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_4_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 4 -; PWR6-NEXT: subfic 3, 3, 4 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 4 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 4 +; PWR6-NEXT: subfic r3, r3, 4 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 4 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_4_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 4 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 4 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 4 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 4 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_4_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 4 -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: vupklsw 3, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 4 +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: vupklsw v3, v3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_4_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltisw 3, 4 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vupklsw 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: vspltisw v3, 4 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vupklsw v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -12726,128 +12730,128 @@ define <2 x i64> @ugt_4_v2i64(<2 x i64> %0) { define <2 x i64> @ult_5_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_5_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 5 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 5 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_5_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 5 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 5 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_5_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 5 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 5 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 5 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 5 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_5_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 5 -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: vupklsw 3, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: vspltisw v3, 5 +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: vupklsw v3, v3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_5_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltisw 3, 5 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vupklsw 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: vspltisw v3, 5 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vupklsw v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -12858,128 +12862,128 @@ define <2 x i64> @ult_5_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_5_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_5_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 5 -; PWR5-NEXT: subfic 3, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 5 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 5 +; PWR5-NEXT: subfic r3, r3, 5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 5 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_5_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 5 -; PWR6-NEXT: subfic 3, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 5 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 5 +; PWR6-NEXT: subfic r3, r3, 5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 5 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_5_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 5 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 5 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 5 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 5 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_5_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 5 -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: vupklsw 3, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 5 +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: vupklsw v3, v3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_5_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltisw 3, 5 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vupklsw 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: vspltisw v3, 5 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vupklsw v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -12990,128 +12994,128 @@ define <2 x i64> @ugt_5_v2i64(<2 x i64> %0) { define <2 x i64> @ult_6_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_6_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 6 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 6 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_6_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 6 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 6 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_6_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 6 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 6 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 6 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 6 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_6_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 6 -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: vupklsw 3, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: vspltisw v3, 6 +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: vupklsw v3, v3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_6_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltisw 3, 6 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vupklsw 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: vspltisw v3, 6 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vupklsw v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -13122,128 +13126,128 @@ define <2 x i64> @ult_6_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_6_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_6_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 6 -; PWR5-NEXT: subfic 3, 3, 6 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 6 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 6 +; PWR5-NEXT: subfic r3, r3, 6 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 6 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_6_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 6 -; PWR6-NEXT: subfic 3, 3, 6 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 6 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 6 +; PWR6-NEXT: subfic r3, r3, 6 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 6 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_6_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 6 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 6 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 6 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 6 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_6_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 6 -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: vupklsw 3, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 6 +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: vupklsw v3, v3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_6_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltisw 3, 6 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vupklsw 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: vspltisw v3, 6 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vupklsw v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -13254,128 +13258,128 @@ define <2 x i64> @ugt_6_v2i64(<2 x i64> %0) { define <2 x i64> @ult_7_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_7_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 7 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 7 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_7_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 7 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 7 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_7_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 7 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 7 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 7 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 7 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_7_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 7 -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: vupklsw 3, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: vspltisw v3, 7 +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: vupklsw v3, v3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_7_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltisw 3, 7 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vupklsw 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: vspltisw v3, 7 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vupklsw v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -13386,128 +13390,128 @@ define <2 x i64> @ult_7_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_7_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_7_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 7 -; PWR5-NEXT: subfic 3, 3, 7 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 7 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 7 +; PWR5-NEXT: subfic r3, r3, 7 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 7 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_7_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 7 -; PWR6-NEXT: subfic 3, 3, 7 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 7 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 7 +; PWR6-NEXT: subfic r3, r3, 7 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 7 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_7_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 7 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 7 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 7 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 7 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_7_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 7 -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: vupklsw 3, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 7 +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: vupklsw v3, v3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_7_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltisw 3, 7 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vupklsw 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: vspltisw v3, 7 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vupklsw v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -13518,128 +13522,128 @@ define <2 x i64> @ugt_7_v2i64(<2 x i64> %0) { define <2 x i64> @ult_8_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_8_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 8 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 8 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_8_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 8 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 8 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_8_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 8 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 8 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 8 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 8 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_8_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 8 -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: vupklsw 3, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: vspltisw v3, 8 +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: vupklsw v3, v3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_8_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltisw 3, 8 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vupklsw 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: vspltisw v3, 8 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vupklsw v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -13650,128 +13654,128 @@ define <2 x i64> @ult_8_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_8_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_8_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 8 -; PWR5-NEXT: subfic 3, 3, 8 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 8 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 8 +; PWR5-NEXT: subfic r3, r3, 8 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 8 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_8_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 8 -; PWR6-NEXT: subfic 3, 3, 8 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 8 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 8 +; PWR6-NEXT: subfic r3, r3, 8 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 8 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_8_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 8 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 8 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 8 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 8 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_8_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 8 -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: vupklsw 3, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 8 +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: vupklsw v3, v3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_8_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltisw 3, 8 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vupklsw 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: vspltisw v3, 8 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vupklsw v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -13782,128 +13786,128 @@ define <2 x i64> @ugt_8_v2i64(<2 x i64> %0) { define <2 x i64> @ult_9_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_9_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 9 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 9 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_9_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 9 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 9 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_9_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 9 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 9 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 9 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 9 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_9_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 9 -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: vupklsw 3, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: vspltisw v3, 9 +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: vupklsw v3, v3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_9_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltisw 3, 9 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vupklsw 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: vspltisw v3, 9 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vupklsw v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -13914,128 +13918,128 @@ define <2 x i64> @ult_9_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_9_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_9_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 9 -; PWR5-NEXT: subfic 3, 3, 9 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 9 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 9 +; PWR5-NEXT: subfic r3, r3, 9 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 9 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_9_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 9 -; PWR6-NEXT: subfic 3, 3, 9 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 9 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 9 +; PWR6-NEXT: subfic r3, r3, 9 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 9 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_9_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 9 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 9 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 9 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 9 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_9_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 9 -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: vupklsw 3, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 9 +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: vupklsw v3, v3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_9_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltisw 3, 9 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vupklsw 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: vspltisw v3, 9 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vupklsw v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -14046,128 +14050,128 @@ define <2 x i64> @ugt_9_v2i64(<2 x i64> %0) { define <2 x i64> @ult_10_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_10_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 10 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 10 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_10_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 10 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 10 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_10_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 10 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 10 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 10 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 10 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_10_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 10 -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: vupklsw 3, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: vspltisw v3, 10 +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: vupklsw v3, v3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_10_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltisw 3, 10 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vupklsw 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: vspltisw v3, 10 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vupklsw v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -14178,128 +14182,128 @@ define <2 x i64> @ult_10_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_10_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_10_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 10 -; PWR5-NEXT: subfic 3, 3, 10 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 10 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 10 +; PWR5-NEXT: subfic r3, r3, 10 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 10 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_10_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 10 -; PWR6-NEXT: subfic 3, 3, 10 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 10 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 10 +; PWR6-NEXT: subfic r3, r3, 10 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 10 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_10_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 10 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 10 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 10 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 10 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_10_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 10 -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: vupklsw 3, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 10 +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: vupklsw v3, v3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_10_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltisw 3, 10 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vupklsw 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: vspltisw v3, 10 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vupklsw v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -14310,128 +14314,128 @@ define <2 x i64> @ugt_10_v2i64(<2 x i64> %0) { define <2 x i64> @ult_11_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_11_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 11 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 11 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_11_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 11 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 11 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_11_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 11 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 11 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 11 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 11 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_11_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 11 -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: vupklsw 3, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: vspltisw v3, 11 +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: vupklsw v3, v3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_11_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltisw 3, 11 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vupklsw 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: vspltisw v3, 11 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vupklsw v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -14442,128 +14446,128 @@ define <2 x i64> @ult_11_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_11_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_11_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 11 -; PWR5-NEXT: subfic 3, 3, 11 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 11 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 11 +; PWR5-NEXT: subfic r3, r3, 11 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 11 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_11_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 11 -; PWR6-NEXT: subfic 3, 3, 11 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 11 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 11 +; PWR6-NEXT: subfic r3, r3, 11 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 11 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_11_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 11 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 11 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 11 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 11 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_11_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 11 -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: vupklsw 3, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 11 +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: vupklsw v3, v3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_11_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltisw 3, 11 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vupklsw 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: vspltisw v3, 11 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vupklsw v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -14574,128 +14578,128 @@ define <2 x i64> @ugt_11_v2i64(<2 x i64> %0) { define <2 x i64> @ult_12_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_12_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 12 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 12 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_12_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 12 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 12 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_12_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 12 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 12 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 12 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 12 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_12_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 12 -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: vupklsw 3, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: vspltisw v3, 12 +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: vupklsw v3, v3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_12_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltisw 3, 12 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vupklsw 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: vspltisw v3, 12 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vupklsw v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -14706,128 +14710,128 @@ define <2 x i64> @ult_12_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_12_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_12_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 12 -; PWR5-NEXT: subfic 3, 3, 12 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 12 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 12 +; PWR5-NEXT: subfic r3, r3, 12 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 12 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_12_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 12 -; PWR6-NEXT: subfic 3, 3, 12 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 12 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 12 +; PWR6-NEXT: subfic r3, r3, 12 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 12 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_12_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 12 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 12 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 12 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 12 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_12_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 12 -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: vupklsw 3, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 12 +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: vupklsw v3, v3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_12_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltisw 3, 12 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vupklsw 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: vspltisw v3, 12 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vupklsw v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -14838,128 +14842,128 @@ define <2 x i64> @ugt_12_v2i64(<2 x i64> %0) { define <2 x i64> @ult_13_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_13_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 13 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 13 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_13_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 13 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 13 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_13_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 13 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 13 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 13 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 13 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_13_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 13 -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: vupklsw 3, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: vspltisw v3, 13 +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: vupklsw v3, v3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_13_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltisw 3, 13 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vupklsw 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: vspltisw v3, 13 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vupklsw v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -14970,128 +14974,128 @@ define <2 x i64> @ult_13_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_13_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_13_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 13 -; PWR5-NEXT: subfic 3, 3, 13 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 13 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 13 +; PWR5-NEXT: subfic r3, r3, 13 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 13 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_13_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 13 -; PWR6-NEXT: subfic 3, 3, 13 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 13 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 13 +; PWR6-NEXT: subfic r3, r3, 13 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 13 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_13_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 13 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 13 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 13 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 13 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_13_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 13 -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: vupklsw 3, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 13 +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: vupklsw v3, v3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_13_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltisw 3, 13 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vupklsw 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: vspltisw v3, 13 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vupklsw v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -15102,128 +15106,128 @@ define <2 x i64> @ugt_13_v2i64(<2 x i64> %0) { define <2 x i64> @ult_14_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_14_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 14 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 14 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_14_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 14 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 14 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_14_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 14 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 14 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 14 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 14 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_14_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 14 -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: vupklsw 3, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: vspltisw v3, 14 +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: vupklsw v3, v3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_14_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltisw 3, 14 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vupklsw 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: vspltisw v3, 14 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vupklsw v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -15234,128 +15238,128 @@ define <2 x i64> @ult_14_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_14_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_14_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 14 -; PWR5-NEXT: subfic 3, 3, 14 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 14 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 14 +; PWR5-NEXT: subfic r3, r3, 14 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 14 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_14_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 14 -; PWR6-NEXT: subfic 3, 3, 14 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 14 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 14 +; PWR6-NEXT: subfic r3, r3, 14 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 14 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_14_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 14 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 14 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 14 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 14 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_14_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 14 -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: vupklsw 3, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 14 +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: vupklsw v3, v3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_14_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltisw 3, 14 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vupklsw 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: vspltisw v3, 14 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vupklsw v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -15366,128 +15370,128 @@ define <2 x i64> @ugt_14_v2i64(<2 x i64> %0) { define <2 x i64> @ult_15_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_15_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 15 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 15 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_15_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 15 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 15 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_15_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 15 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 15 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 15 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 15 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_15_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 15 -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: vupklsw 3, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: vspltisw v3, 15 +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: vupklsw v3, v3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_15_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltisw 3, 15 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vupklsw 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: vspltisw v3, 15 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vupklsw v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -15498,128 +15502,128 @@ define <2 x i64> @ult_15_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_15_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_15_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 15 -; PWR5-NEXT: subfic 3, 3, 15 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 15 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 15 +; PWR5-NEXT: subfic r3, r3, 15 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 15 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_15_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 15 -; PWR6-NEXT: subfic 3, 3, 15 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 15 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 15 +; PWR6-NEXT: subfic r3, r3, 15 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 15 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_15_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 15 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 15 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 15 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 15 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_15_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: vspltisw 3, 15 -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: vupklsw 3, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: vspltisw v3, 15 +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: vupklsw v3, v3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_15_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: vspltisw 3, 15 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vupklsw 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: vspltisw v3, 15 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vupklsw v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -15630,129 +15634,129 @@ define <2 x i64> @ugt_15_v2i64(<2 x i64> %0) { define <2 x i64> @ult_16_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_16_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 16 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 16 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_16_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 16 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 16 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_16_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 16 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 16 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 16 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 16 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_16_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI129_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI129_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI129_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI129_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_16_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 16 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 16 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -15763,129 +15767,129 @@ define <2 x i64> @ult_16_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_16_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_16_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 16 -; PWR5-NEXT: subfic 3, 3, 16 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 16 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 16 +; PWR5-NEXT: subfic r3, r3, 16 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 16 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_16_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 16 -; PWR6-NEXT: subfic 3, 3, 16 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 16 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 16 +; PWR6-NEXT: subfic r3, r3, 16 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 16 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_16_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 16 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 16 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 16 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 16 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_16_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI130_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI130_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI130_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI130_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_16_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 16 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 16 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -15896,129 +15900,129 @@ define <2 x i64> @ugt_16_v2i64(<2 x i64> %0) { define <2 x i64> @ult_17_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_17_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 17 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 17 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_17_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 17 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 17 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_17_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 17 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 17 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 17 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 17 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_17_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI131_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI131_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI131_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI131_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_17_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 17 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 17 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -16029,129 +16033,129 @@ define <2 x i64> @ult_17_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_17_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_17_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 17 -; PWR5-NEXT: subfic 3, 3, 17 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 17 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 17 +; PWR5-NEXT: subfic r3, r3, 17 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 17 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_17_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 17 -; PWR6-NEXT: subfic 3, 3, 17 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 17 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 17 +; PWR6-NEXT: subfic r3, r3, 17 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 17 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_17_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 17 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 17 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 17 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 17 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_17_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI132_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI132_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI132_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI132_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_17_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 17 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 17 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -16162,129 +16166,129 @@ define <2 x i64> @ugt_17_v2i64(<2 x i64> %0) { define <2 x i64> @ult_18_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_18_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 18 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 18 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_18_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 18 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 18 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_18_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 18 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 18 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 18 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 18 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_18_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI133_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI133_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI133_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI133_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_18_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 18 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 18 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -16295,129 +16299,129 @@ define <2 x i64> @ult_18_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_18_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_18_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 18 -; PWR5-NEXT: subfic 3, 3, 18 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 18 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 18 +; PWR5-NEXT: subfic r3, r3, 18 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 18 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_18_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 18 -; PWR6-NEXT: subfic 3, 3, 18 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 18 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 18 +; PWR6-NEXT: subfic r3, r3, 18 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 18 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_18_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 18 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 18 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 18 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 18 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_18_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI134_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI134_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI134_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI134_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_18_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 18 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 18 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -16428,129 +16432,129 @@ define <2 x i64> @ugt_18_v2i64(<2 x i64> %0) { define <2 x i64> @ult_19_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_19_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 19 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 19 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_19_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 19 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 19 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_19_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 19 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 19 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 19 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 19 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_19_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI135_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI135_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI135_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI135_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_19_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 19 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 19 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -16561,129 +16565,129 @@ define <2 x i64> @ult_19_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_19_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_19_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 19 -; PWR5-NEXT: subfic 3, 3, 19 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 19 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 19 +; PWR5-NEXT: subfic r3, r3, 19 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 19 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_19_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 19 -; PWR6-NEXT: subfic 3, 3, 19 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 19 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 19 +; PWR6-NEXT: subfic r3, r3, 19 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 19 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_19_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 19 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 19 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 19 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 19 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_19_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI136_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI136_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI136_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI136_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_19_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 19 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 19 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -16694,129 +16698,129 @@ define <2 x i64> @ugt_19_v2i64(<2 x i64> %0) { define <2 x i64> @ult_20_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_20_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 20 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 20 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_20_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 20 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 20 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_20_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 20 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 20 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 20 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 20 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_20_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI137_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI137_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI137_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI137_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_20_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 20 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 20 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -16827,129 +16831,129 @@ define <2 x i64> @ult_20_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_20_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_20_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 20 -; PWR5-NEXT: subfic 3, 3, 20 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 20 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 20 +; PWR5-NEXT: subfic r3, r3, 20 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 20 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_20_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 20 -; PWR6-NEXT: subfic 3, 3, 20 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 20 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 20 +; PWR6-NEXT: subfic r3, r3, 20 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 20 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_20_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 20 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 20 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 20 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 20 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_20_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI138_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI138_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI138_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI138_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_20_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 20 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 20 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -16960,129 +16964,129 @@ define <2 x i64> @ugt_20_v2i64(<2 x i64> %0) { define <2 x i64> @ult_21_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_21_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 21 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 21 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_21_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 21 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 21 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_21_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 21 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 21 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 21 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 21 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_21_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI139_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI139_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI139_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI139_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_21_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 21 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 21 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -17093,129 +17097,129 @@ define <2 x i64> @ult_21_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_21_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_21_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 21 -; PWR5-NEXT: subfic 3, 3, 21 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 21 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 21 +; PWR5-NEXT: subfic r3, r3, 21 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 21 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_21_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 21 -; PWR6-NEXT: subfic 3, 3, 21 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 21 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 21 +; PWR6-NEXT: subfic r3, r3, 21 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 21 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_21_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 21 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 21 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 21 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 21 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_21_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI140_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI140_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI140_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI140_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_21_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 21 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 21 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -17226,129 +17230,129 @@ define <2 x i64> @ugt_21_v2i64(<2 x i64> %0) { define <2 x i64> @ult_22_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_22_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 22 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 22 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_22_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 22 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 22 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_22_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 22 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 22 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 22 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 22 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_22_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI141_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI141_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI141_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI141_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_22_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 22 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 22 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -17359,129 +17363,129 @@ define <2 x i64> @ult_22_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_22_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_22_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 22 -; PWR5-NEXT: subfic 3, 3, 22 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 22 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 22 +; PWR5-NEXT: subfic r3, r3, 22 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 22 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_22_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 22 -; PWR6-NEXT: subfic 3, 3, 22 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 22 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 22 +; PWR6-NEXT: subfic r3, r3, 22 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 22 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_22_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 22 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 22 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 22 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 22 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_22_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI142_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI142_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI142_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI142_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_22_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 22 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 22 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -17492,129 +17496,129 @@ define <2 x i64> @ugt_22_v2i64(<2 x i64> %0) { define <2 x i64> @ult_23_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_23_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 23 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 23 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_23_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 23 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 23 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_23_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 23 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 23 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 23 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 23 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_23_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI143_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI143_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI143_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI143_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_23_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 23 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 23 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -17625,129 +17629,129 @@ define <2 x i64> @ult_23_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_23_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_23_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 23 -; PWR5-NEXT: subfic 3, 3, 23 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 23 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 23 +; PWR5-NEXT: subfic r3, r3, 23 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 23 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_23_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 23 -; PWR6-NEXT: subfic 3, 3, 23 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 23 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 23 +; PWR6-NEXT: subfic r3, r3, 23 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 23 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_23_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 23 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 23 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 23 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 23 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_23_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI144_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI144_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI144_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI144_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_23_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 23 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 23 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -17758,129 +17762,129 @@ define <2 x i64> @ugt_23_v2i64(<2 x i64> %0) { define <2 x i64> @ult_24_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_24_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 24 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 24 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_24_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 24 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 24 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_24_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 24 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 24 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 24 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 24 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_24_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI145_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI145_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI145_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI145_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_24_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 24 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 24 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -17891,129 +17895,129 @@ define <2 x i64> @ult_24_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_24_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_24_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 24 -; PWR5-NEXT: subfic 3, 3, 24 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 24 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 24 +; PWR5-NEXT: subfic r3, r3, 24 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 24 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_24_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 24 -; PWR6-NEXT: subfic 3, 3, 24 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 24 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 24 +; PWR6-NEXT: subfic r3, r3, 24 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 24 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_24_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 24 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 24 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 24 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 24 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_24_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI146_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI146_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI146_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI146_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_24_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 24 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 24 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -18024,129 +18028,129 @@ define <2 x i64> @ugt_24_v2i64(<2 x i64> %0) { define <2 x i64> @ult_25_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_25_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 25 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 25 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_25_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 25 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 25 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_25_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 25 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 25 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 25 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 25 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_25_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI147_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI147_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI147_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI147_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_25_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 25 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 25 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -18157,129 +18161,129 @@ define <2 x i64> @ult_25_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_25_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_25_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 25 -; PWR5-NEXT: subfic 3, 3, 25 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 25 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 25 +; PWR5-NEXT: subfic r3, r3, 25 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 25 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_25_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 25 -; PWR6-NEXT: subfic 3, 3, 25 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 25 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 25 +; PWR6-NEXT: subfic r3, r3, 25 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 25 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_25_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 25 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 25 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 25 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 25 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_25_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI148_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI148_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI148_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI148_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_25_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 25 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 25 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -18290,129 +18294,129 @@ define <2 x i64> @ugt_25_v2i64(<2 x i64> %0) { define <2 x i64> @ult_26_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_26_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 26 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 26 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_26_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 26 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 26 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_26_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 26 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 26 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 26 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 26 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_26_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI149_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI149_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI149_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI149_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_26_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 26 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 26 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -18423,129 +18427,129 @@ define <2 x i64> @ult_26_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_26_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_26_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 26 -; PWR5-NEXT: subfic 3, 3, 26 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 26 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 26 +; PWR5-NEXT: subfic r3, r3, 26 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 26 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_26_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 26 -; PWR6-NEXT: subfic 3, 3, 26 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 26 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 26 +; PWR6-NEXT: subfic r3, r3, 26 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 26 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_26_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 26 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 26 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 26 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 26 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_26_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI150_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI150_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI150_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI150_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_26_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 26 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 26 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -18556,129 +18560,129 @@ define <2 x i64> @ugt_26_v2i64(<2 x i64> %0) { define <2 x i64> @ult_27_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_27_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 27 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 27 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_27_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 27 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 27 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_27_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 27 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 27 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 27 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 27 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_27_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI151_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI151_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI151_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI151_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_27_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 27 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 27 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -18689,129 +18693,129 @@ define <2 x i64> @ult_27_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_27_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_27_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 27 -; PWR5-NEXT: subfic 3, 3, 27 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 27 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 27 +; PWR5-NEXT: subfic r3, r3, 27 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 27 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_27_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 27 -; PWR6-NEXT: subfic 3, 3, 27 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 27 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 27 +; PWR6-NEXT: subfic r3, r3, 27 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 27 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_27_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 27 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 27 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 27 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 27 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_27_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI152_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI152_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI152_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI152_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_27_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 27 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 27 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -18822,129 +18826,129 @@ define <2 x i64> @ugt_27_v2i64(<2 x i64> %0) { define <2 x i64> @ult_28_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_28_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 28 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 28 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_28_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 28 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 28 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_28_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 28 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 28 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 28 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 28 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_28_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI153_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI153_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI153_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI153_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_28_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 28 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 28 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -18955,129 +18959,129 @@ define <2 x i64> @ult_28_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_28_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_28_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 28 -; PWR5-NEXT: subfic 3, 3, 28 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 28 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 28 +; PWR5-NEXT: subfic r3, r3, 28 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 28 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_28_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 28 -; PWR6-NEXT: subfic 3, 3, 28 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 28 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 28 +; PWR6-NEXT: subfic r3, r3, 28 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 28 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_28_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 28 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 28 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 28 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 28 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_28_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI154_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI154_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI154_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI154_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_28_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 28 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 28 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -19088,129 +19092,129 @@ define <2 x i64> @ugt_28_v2i64(<2 x i64> %0) { define <2 x i64> @ult_29_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_29_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 29 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 29 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_29_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 29 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 29 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_29_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 29 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 29 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 29 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 29 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_29_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI155_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI155_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI155_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI155_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_29_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 29 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 29 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -19221,129 +19225,129 @@ define <2 x i64> @ult_29_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_29_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_29_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 29 -; PWR5-NEXT: subfic 3, 3, 29 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 29 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 29 +; PWR5-NEXT: subfic r3, r3, 29 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 29 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_29_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 29 -; PWR6-NEXT: subfic 3, 3, 29 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 29 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 29 +; PWR6-NEXT: subfic r3, r3, 29 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 29 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_29_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 29 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 29 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 29 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 29 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_29_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI156_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI156_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI156_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI156_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_29_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 29 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 29 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -19354,129 +19358,129 @@ define <2 x i64> @ugt_29_v2i64(<2 x i64> %0) { define <2 x i64> @ult_30_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_30_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 30 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 30 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_30_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 30 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 30 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_30_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 30 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 30 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 30 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 30 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_30_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI157_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI157_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI157_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI157_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_30_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 30 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 30 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -19487,129 +19491,129 @@ define <2 x i64> @ult_30_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_30_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_30_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 30 -; PWR5-NEXT: subfic 3, 3, 30 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 30 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 30 +; PWR5-NEXT: subfic r3, r3, 30 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 30 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_30_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 30 -; PWR6-NEXT: subfic 3, 3, 30 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 30 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 30 +; PWR6-NEXT: subfic r3, r3, 30 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 30 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_30_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 30 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 30 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 30 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 30 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_30_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI158_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI158_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI158_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI158_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_30_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 30 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 30 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -19620,129 +19624,129 @@ define <2 x i64> @ugt_30_v2i64(<2 x i64> %0) { define <2 x i64> @ult_31_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_31_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 31 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 31 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_31_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 31 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 31 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_31_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 31 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 31 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 31 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 31 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_31_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI159_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI159_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI159_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI159_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_31_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 31 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 31 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -19753,129 +19757,129 @@ define <2 x i64> @ult_31_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_31_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_31_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 31 -; PWR5-NEXT: subfic 3, 3, 31 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 31 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 31 +; PWR5-NEXT: subfic r3, r3, 31 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 31 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_31_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 31 -; PWR6-NEXT: subfic 3, 3, 31 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 31 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 31 +; PWR6-NEXT: subfic r3, r3, 31 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 31 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_31_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 31 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 31 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 31 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 31 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_31_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI160_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI160_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI160_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI160_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_31_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 31 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 31 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -19886,129 +19890,129 @@ define <2 x i64> @ugt_31_v2i64(<2 x i64> %0) { define <2 x i64> @ult_32_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_32_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 32 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 32 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_32_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 32 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 32 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_32_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 32 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 32 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 32 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 32 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_32_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI161_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI161_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI161_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI161_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_32_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 32 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 32 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -20019,129 +20023,129 @@ define <2 x i64> @ult_32_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_32_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_32_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 32 -; PWR5-NEXT: subfic 3, 3, 32 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 32 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 32 +; PWR5-NEXT: subfic r3, r3, 32 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 32 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_32_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 32 -; PWR6-NEXT: subfic 3, 3, 32 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 32 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 32 +; PWR6-NEXT: subfic r3, r3, 32 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 32 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_32_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 32 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 32 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 32 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 32 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_32_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI162_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI162_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI162_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI162_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_32_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 32 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 32 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -20152,129 +20156,129 @@ define <2 x i64> @ugt_32_v2i64(<2 x i64> %0) { define <2 x i64> @ult_33_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_33_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 33 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 33 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_33_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 33 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 33 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_33_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 33 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 33 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 33 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 33 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_33_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI163_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI163_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI163_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI163_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_33_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 33 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 33 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -20285,129 +20289,129 @@ define <2 x i64> @ult_33_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_33_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_33_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 33 -; PWR5-NEXT: subfic 3, 3, 33 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 33 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 33 +; PWR5-NEXT: subfic r3, r3, 33 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 33 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_33_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 33 -; PWR6-NEXT: subfic 3, 3, 33 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 33 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 33 +; PWR6-NEXT: subfic r3, r3, 33 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 33 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_33_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 33 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 33 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 33 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 33 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_33_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI164_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI164_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI164_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI164_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_33_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 33 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 33 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -20418,129 +20422,129 @@ define <2 x i64> @ugt_33_v2i64(<2 x i64> %0) { define <2 x i64> @ult_34_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_34_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 34 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 34 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_34_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 34 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 34 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_34_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 34 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 34 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 34 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 34 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_34_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI165_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI165_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI165_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI165_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_34_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 34 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 34 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -20551,129 +20555,129 @@ define <2 x i64> @ult_34_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_34_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_34_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 34 -; PWR5-NEXT: subfic 3, 3, 34 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 34 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 34 +; PWR5-NEXT: subfic r3, r3, 34 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 34 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_34_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 34 -; PWR6-NEXT: subfic 3, 3, 34 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 34 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 34 +; PWR6-NEXT: subfic r3, r3, 34 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 34 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_34_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 34 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 34 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 34 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 34 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_34_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI166_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI166_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI166_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI166_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_34_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 34 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 34 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -20684,129 +20688,129 @@ define <2 x i64> @ugt_34_v2i64(<2 x i64> %0) { define <2 x i64> @ult_35_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_35_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 35 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 35 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_35_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 35 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 35 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_35_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 35 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 35 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 35 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 35 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_35_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI167_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI167_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI167_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI167_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_35_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 35 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 35 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -20817,129 +20821,129 @@ define <2 x i64> @ult_35_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_35_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_35_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 35 -; PWR5-NEXT: subfic 3, 3, 35 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 35 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 35 +; PWR5-NEXT: subfic r3, r3, 35 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 35 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_35_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 35 -; PWR6-NEXT: subfic 3, 3, 35 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 35 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 35 +; PWR6-NEXT: subfic r3, r3, 35 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 35 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_35_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 35 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 35 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 35 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 35 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_35_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI168_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI168_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI168_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI168_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_35_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 35 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 35 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -20950,129 +20954,129 @@ define <2 x i64> @ugt_35_v2i64(<2 x i64> %0) { define <2 x i64> @ult_36_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_36_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 36 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 36 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_36_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 36 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 36 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_36_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 36 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 36 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 36 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 36 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_36_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI169_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI169_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI169_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI169_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_36_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 36 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 36 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -21083,129 +21087,129 @@ define <2 x i64> @ult_36_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_36_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_36_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 36 -; PWR5-NEXT: subfic 3, 3, 36 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 36 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 36 +; PWR5-NEXT: subfic r3, r3, 36 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 36 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_36_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 36 -; PWR6-NEXT: subfic 3, 3, 36 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 36 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 36 +; PWR6-NEXT: subfic r3, r3, 36 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 36 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_36_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 36 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 36 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 36 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 36 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_36_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI170_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI170_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI170_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI170_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_36_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 36 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 36 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -21216,129 +21220,129 @@ define <2 x i64> @ugt_36_v2i64(<2 x i64> %0) { define <2 x i64> @ult_37_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_37_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 37 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 37 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_37_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 37 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 37 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_37_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 37 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 37 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 37 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 37 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_37_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI171_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI171_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI171_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI171_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_37_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 37 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 37 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -21349,129 +21353,129 @@ define <2 x i64> @ult_37_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_37_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_37_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 37 -; PWR5-NEXT: subfic 3, 3, 37 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 37 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 37 +; PWR5-NEXT: subfic r3, r3, 37 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 37 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_37_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 37 -; PWR6-NEXT: subfic 3, 3, 37 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 37 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 37 +; PWR6-NEXT: subfic r3, r3, 37 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 37 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_37_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 37 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 37 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 37 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 37 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_37_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI172_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI172_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI172_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI172_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_37_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 37 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 37 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -21482,129 +21486,129 @@ define <2 x i64> @ugt_37_v2i64(<2 x i64> %0) { define <2 x i64> @ult_38_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_38_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 38 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 38 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_38_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 38 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 38 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_38_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 38 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 38 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 38 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 38 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_38_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI173_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI173_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI173_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI173_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_38_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 38 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 38 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -21615,129 +21619,129 @@ define <2 x i64> @ult_38_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_38_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_38_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 38 -; PWR5-NEXT: subfic 3, 3, 38 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 38 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 38 +; PWR5-NEXT: subfic r3, r3, 38 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 38 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_38_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 38 -; PWR6-NEXT: subfic 3, 3, 38 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 38 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 38 +; PWR6-NEXT: subfic r3, r3, 38 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 38 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_38_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 38 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 38 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 38 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 38 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_38_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI174_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI174_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI174_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI174_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_38_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 38 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 38 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -21748,129 +21752,129 @@ define <2 x i64> @ugt_38_v2i64(<2 x i64> %0) { define <2 x i64> @ult_39_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_39_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 39 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 39 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_39_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 39 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 39 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_39_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 39 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 39 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 39 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 39 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_39_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI175_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI175_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI175_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI175_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_39_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 39 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 39 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -21881,129 +21885,129 @@ define <2 x i64> @ult_39_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_39_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_39_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 39 -; PWR5-NEXT: subfic 3, 3, 39 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 39 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 39 +; PWR5-NEXT: subfic r3, r3, 39 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 39 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_39_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 39 -; PWR6-NEXT: subfic 3, 3, 39 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 39 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 39 +; PWR6-NEXT: subfic r3, r3, 39 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 39 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_39_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 39 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 39 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 39 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 39 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_39_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI176_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI176_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI176_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI176_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_39_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 39 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 39 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -22014,129 +22018,129 @@ define <2 x i64> @ugt_39_v2i64(<2 x i64> %0) { define <2 x i64> @ult_40_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_40_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 40 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 40 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_40_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 40 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 40 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_40_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 40 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 40 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 40 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 40 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_40_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI177_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI177_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI177_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI177_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_40_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 40 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 40 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -22147,129 +22151,129 @@ define <2 x i64> @ult_40_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_40_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_40_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 40 -; PWR5-NEXT: subfic 3, 3, 40 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 40 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 40 +; PWR5-NEXT: subfic r3, r3, 40 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 40 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_40_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 40 -; PWR6-NEXT: subfic 3, 3, 40 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 40 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 40 +; PWR6-NEXT: subfic r3, r3, 40 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 40 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_40_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 40 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 40 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 40 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 40 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_40_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI178_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI178_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI178_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI178_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_40_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 40 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 40 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -22280,129 +22284,129 @@ define <2 x i64> @ugt_40_v2i64(<2 x i64> %0) { define <2 x i64> @ult_41_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_41_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 41 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 41 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_41_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 41 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 41 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_41_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 41 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 41 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 41 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 41 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_41_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI179_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI179_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI179_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI179_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_41_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 41 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 41 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -22413,129 +22417,129 @@ define <2 x i64> @ult_41_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_41_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_41_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 41 -; PWR5-NEXT: subfic 3, 3, 41 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 41 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 41 +; PWR5-NEXT: subfic r3, r3, 41 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 41 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_41_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 41 -; PWR6-NEXT: subfic 3, 3, 41 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 41 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 41 +; PWR6-NEXT: subfic r3, r3, 41 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 41 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_41_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 41 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 41 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 41 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 41 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_41_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI180_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI180_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI180_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI180_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_41_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 41 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 41 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -22546,129 +22550,129 @@ define <2 x i64> @ugt_41_v2i64(<2 x i64> %0) { define <2 x i64> @ult_42_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_42_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 42 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 42 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_42_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 42 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 42 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_42_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 42 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 42 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 42 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 42 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_42_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI181_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI181_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI181_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI181_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_42_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 42 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 42 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -22679,129 +22683,129 @@ define <2 x i64> @ult_42_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_42_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_42_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 42 -; PWR5-NEXT: subfic 3, 3, 42 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 42 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 42 +; PWR5-NEXT: subfic r3, r3, 42 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 42 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_42_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 42 -; PWR6-NEXT: subfic 3, 3, 42 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 42 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 42 +; PWR6-NEXT: subfic r3, r3, 42 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 42 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_42_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 42 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 42 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 42 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 42 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_42_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI182_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI182_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI182_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI182_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_42_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 42 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 42 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -22812,129 +22816,129 @@ define <2 x i64> @ugt_42_v2i64(<2 x i64> %0) { define <2 x i64> @ult_43_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_43_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 43 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 43 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_43_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 43 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 43 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_43_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 43 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 43 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 43 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 43 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_43_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI183_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI183_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI183_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI183_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_43_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 43 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 43 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -22945,129 +22949,129 @@ define <2 x i64> @ult_43_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_43_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_43_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 43 -; PWR5-NEXT: subfic 3, 3, 43 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 43 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 43 +; PWR5-NEXT: subfic r3, r3, 43 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 43 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_43_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 43 -; PWR6-NEXT: subfic 3, 3, 43 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 43 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 43 +; PWR6-NEXT: subfic r3, r3, 43 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 43 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_43_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 43 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 43 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 43 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 43 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_43_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI184_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI184_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI184_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI184_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_43_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 43 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 43 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -23078,129 +23082,129 @@ define <2 x i64> @ugt_43_v2i64(<2 x i64> %0) { define <2 x i64> @ult_44_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_44_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 44 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 44 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_44_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 44 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 44 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_44_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 44 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 44 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 44 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 44 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_44_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI185_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI185_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI185_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI185_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_44_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 44 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 44 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -23211,129 +23215,129 @@ define <2 x i64> @ult_44_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_44_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_44_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 44 -; PWR5-NEXT: subfic 3, 3, 44 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 44 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 44 +; PWR5-NEXT: subfic r3, r3, 44 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 44 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_44_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 44 -; PWR6-NEXT: subfic 3, 3, 44 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 44 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 44 +; PWR6-NEXT: subfic r3, r3, 44 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 44 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_44_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 44 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 44 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 44 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 44 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_44_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI186_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI186_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI186_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI186_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_44_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 44 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 44 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -23344,129 +23348,129 @@ define <2 x i64> @ugt_44_v2i64(<2 x i64> %0) { define <2 x i64> @ult_45_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_45_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 45 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 45 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_45_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 45 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 45 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_45_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 45 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 45 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 45 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 45 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_45_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI187_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI187_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI187_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI187_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_45_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 45 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 45 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -23477,129 +23481,129 @@ define <2 x i64> @ult_45_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_45_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_45_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 45 -; PWR5-NEXT: subfic 3, 3, 45 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 45 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 45 +; PWR5-NEXT: subfic r3, r3, 45 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 45 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_45_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 45 -; PWR6-NEXT: subfic 3, 3, 45 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 45 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 45 +; PWR6-NEXT: subfic r3, r3, 45 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 45 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_45_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 45 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 45 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 45 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 45 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_45_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI188_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI188_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI188_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI188_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_45_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 45 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 45 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -23610,129 +23614,129 @@ define <2 x i64> @ugt_45_v2i64(<2 x i64> %0) { define <2 x i64> @ult_46_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_46_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 46 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 46 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_46_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 46 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 46 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_46_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 46 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 46 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 46 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 46 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_46_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI189_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI189_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI189_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI189_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_46_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 46 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 46 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -23743,129 +23747,129 @@ define <2 x i64> @ult_46_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_46_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_46_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 46 -; PWR5-NEXT: subfic 3, 3, 46 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 46 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 46 +; PWR5-NEXT: subfic r3, r3, 46 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 46 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_46_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 46 -; PWR6-NEXT: subfic 3, 3, 46 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 46 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 46 +; PWR6-NEXT: subfic r3, r3, 46 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 46 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_46_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 46 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 46 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 46 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 46 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_46_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI190_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI190_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI190_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI190_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_46_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 46 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 46 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -23876,129 +23880,129 @@ define <2 x i64> @ugt_46_v2i64(<2 x i64> %0) { define <2 x i64> @ult_47_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_47_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 47 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 47 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_47_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 47 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 47 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_47_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 47 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 47 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 47 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 47 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_47_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI191_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI191_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI191_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI191_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_47_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 47 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 47 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -24009,129 +24013,129 @@ define <2 x i64> @ult_47_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_47_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_47_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 47 -; PWR5-NEXT: subfic 3, 3, 47 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 47 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 47 +; PWR5-NEXT: subfic r3, r3, 47 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 47 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_47_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 47 -; PWR6-NEXT: subfic 3, 3, 47 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 47 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 47 +; PWR6-NEXT: subfic r3, r3, 47 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 47 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_47_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 47 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 47 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 47 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 47 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_47_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI192_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI192_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI192_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI192_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_47_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 47 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 47 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -24142,129 +24146,129 @@ define <2 x i64> @ugt_47_v2i64(<2 x i64> %0) { define <2 x i64> @ult_48_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_48_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 48 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 48 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_48_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 48 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 48 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_48_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 48 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 48 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 48 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 48 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_48_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI193_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI193_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI193_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI193_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_48_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 48 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 48 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -24275,129 +24279,129 @@ define <2 x i64> @ult_48_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_48_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_48_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 48 -; PWR5-NEXT: subfic 3, 3, 48 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 48 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 48 +; PWR5-NEXT: subfic r3, r3, 48 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 48 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_48_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 48 -; PWR6-NEXT: subfic 3, 3, 48 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 48 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 48 +; PWR6-NEXT: subfic r3, r3, 48 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 48 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_48_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 48 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 48 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 48 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 48 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_48_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI194_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI194_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI194_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI194_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_48_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 48 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 48 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -24408,129 +24412,129 @@ define <2 x i64> @ugt_48_v2i64(<2 x i64> %0) { define <2 x i64> @ult_49_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_49_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 49 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 49 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_49_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 49 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 49 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_49_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 49 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 49 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 49 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 49 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_49_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI195_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI195_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI195_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI195_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_49_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 49 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 49 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -24541,129 +24545,129 @@ define <2 x i64> @ult_49_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_49_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_49_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 49 -; PWR5-NEXT: subfic 3, 3, 49 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 49 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 49 +; PWR5-NEXT: subfic r3, r3, 49 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 49 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_49_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 49 -; PWR6-NEXT: subfic 3, 3, 49 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 49 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 49 +; PWR6-NEXT: subfic r3, r3, 49 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 49 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_49_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 49 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 49 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 49 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 49 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_49_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI196_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI196_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI196_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI196_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_49_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 49 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 49 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -24674,129 +24678,129 @@ define <2 x i64> @ugt_49_v2i64(<2 x i64> %0) { define <2 x i64> @ult_50_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_50_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 50 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 50 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_50_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 50 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 50 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_50_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 50 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 50 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 50 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 50 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_50_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI197_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI197_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI197_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI197_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_50_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 50 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 50 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -24807,129 +24811,129 @@ define <2 x i64> @ult_50_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_50_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_50_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 50 -; PWR5-NEXT: subfic 3, 3, 50 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 50 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 50 +; PWR5-NEXT: subfic r3, r3, 50 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 50 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_50_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 50 -; PWR6-NEXT: subfic 3, 3, 50 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 50 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 50 +; PWR6-NEXT: subfic r3, r3, 50 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 50 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_50_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 50 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 50 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 50 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 50 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_50_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI198_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI198_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI198_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI198_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_50_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 50 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 50 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -24940,129 +24944,129 @@ define <2 x i64> @ugt_50_v2i64(<2 x i64> %0) { define <2 x i64> @ult_51_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_51_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 51 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 51 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_51_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 51 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 51 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_51_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 51 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 51 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 51 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 51 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_51_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI199_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI199_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI199_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI199_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_51_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 51 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 51 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -25073,129 +25077,129 @@ define <2 x i64> @ult_51_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_51_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_51_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 51 -; PWR5-NEXT: subfic 3, 3, 51 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 51 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 51 +; PWR5-NEXT: subfic r3, r3, 51 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 51 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_51_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 51 -; PWR6-NEXT: subfic 3, 3, 51 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 51 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 51 +; PWR6-NEXT: subfic r3, r3, 51 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 51 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_51_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 51 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 51 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 51 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 51 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_51_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI200_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI200_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI200_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI200_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_51_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 51 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 51 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -25206,129 +25210,129 @@ define <2 x i64> @ugt_51_v2i64(<2 x i64> %0) { define <2 x i64> @ult_52_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_52_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 52 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 52 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_52_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 52 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 52 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_52_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 52 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 52 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 52 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 52 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_52_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI201_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI201_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI201_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI201_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_52_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 52 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 52 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -25339,129 +25343,129 @@ define <2 x i64> @ult_52_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_52_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_52_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 52 -; PWR5-NEXT: subfic 3, 3, 52 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 52 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 52 +; PWR5-NEXT: subfic r3, r3, 52 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 52 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_52_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 52 -; PWR6-NEXT: subfic 3, 3, 52 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 52 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 52 +; PWR6-NEXT: subfic r3, r3, 52 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 52 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_52_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 52 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 52 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 52 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 52 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_52_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI202_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI202_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI202_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI202_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_52_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 52 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 52 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -25472,129 +25476,129 @@ define <2 x i64> @ugt_52_v2i64(<2 x i64> %0) { define <2 x i64> @ult_53_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_53_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 53 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 53 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_53_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 53 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 53 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_53_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 53 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 53 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 53 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 53 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_53_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI203_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI203_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI203_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI203_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_53_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 53 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 53 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -25605,129 +25609,129 @@ define <2 x i64> @ult_53_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_53_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_53_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 53 -; PWR5-NEXT: subfic 3, 3, 53 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 53 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 53 +; PWR5-NEXT: subfic r3, r3, 53 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 53 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_53_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 53 -; PWR6-NEXT: subfic 3, 3, 53 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 53 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 53 +; PWR6-NEXT: subfic r3, r3, 53 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 53 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_53_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 53 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 53 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 53 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 53 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_53_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI204_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI204_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI204_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI204_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_53_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 53 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 53 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -25738,129 +25742,129 @@ define <2 x i64> @ugt_53_v2i64(<2 x i64> %0) { define <2 x i64> @ult_54_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_54_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 54 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 54 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_54_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 54 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 54 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_54_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 54 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 54 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 54 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 54 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_54_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI205_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI205_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI205_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI205_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_54_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 54 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 54 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -25871,129 +25875,129 @@ define <2 x i64> @ult_54_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_54_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_54_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 54 -; PWR5-NEXT: subfic 3, 3, 54 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 54 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 54 +; PWR5-NEXT: subfic r3, r3, 54 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 54 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_54_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 54 -; PWR6-NEXT: subfic 3, 3, 54 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 54 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 54 +; PWR6-NEXT: subfic r3, r3, 54 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 54 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_54_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 54 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 54 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 54 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 54 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_54_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI206_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI206_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI206_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI206_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_54_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 54 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 54 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -26004,129 +26008,129 @@ define <2 x i64> @ugt_54_v2i64(<2 x i64> %0) { define <2 x i64> @ult_55_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_55_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 55 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 55 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_55_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 55 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 55 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_55_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 55 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 55 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 55 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 55 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_55_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI207_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI207_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI207_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI207_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_55_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 55 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 55 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -26137,129 +26141,129 @@ define <2 x i64> @ult_55_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_55_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_55_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 55 -; PWR5-NEXT: subfic 3, 3, 55 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 55 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 55 +; PWR5-NEXT: subfic r3, r3, 55 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 55 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_55_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 55 -; PWR6-NEXT: subfic 3, 3, 55 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 55 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 55 +; PWR6-NEXT: subfic r3, r3, 55 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 55 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_55_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 55 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 55 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 55 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 55 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_55_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI208_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI208_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI208_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI208_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_55_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 55 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 55 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -26270,129 +26274,129 @@ define <2 x i64> @ugt_55_v2i64(<2 x i64> %0) { define <2 x i64> @ult_56_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_56_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_56_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_56_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 56 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 56 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 56 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 56 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_56_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI209_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI209_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI209_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI209_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_56_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 56 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 56 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -26403,129 +26407,129 @@ define <2 x i64> @ult_56_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_56_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_56_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 56 -; PWR5-NEXT: subfic 3, 3, 56 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 56 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 56 +; PWR5-NEXT: subfic r3, r3, 56 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 56 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_56_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 56 -; PWR6-NEXT: subfic 3, 3, 56 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 56 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 56 +; PWR6-NEXT: subfic r3, r3, 56 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 56 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_56_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 56 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 56 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 56 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 56 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_56_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI210_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI210_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI210_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI210_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_56_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 56 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 56 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -26536,129 +26540,129 @@ define <2 x i64> @ugt_56_v2i64(<2 x i64> %0) { define <2 x i64> @ult_57_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_57_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 57 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 57 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_57_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 57 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 57 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_57_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 57 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 57 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 57 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 57 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_57_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI211_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI211_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI211_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI211_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_57_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 57 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 57 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -26669,129 +26673,129 @@ define <2 x i64> @ult_57_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_57_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_57_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 57 -; PWR5-NEXT: subfic 3, 3, 57 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 57 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 57 +; PWR5-NEXT: subfic r3, r3, 57 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 57 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_57_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 57 -; PWR6-NEXT: subfic 3, 3, 57 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 57 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 57 +; PWR6-NEXT: subfic r3, r3, 57 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 57 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_57_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 57 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 57 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 57 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 57 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_57_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI212_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI212_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI212_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI212_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_57_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 57 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 57 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -26802,129 +26806,129 @@ define <2 x i64> @ugt_57_v2i64(<2 x i64> %0) { define <2 x i64> @ult_58_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_58_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 58 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 58 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_58_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 58 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 58 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_58_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 58 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 58 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 58 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 58 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_58_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI213_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI213_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI213_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI213_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_58_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 58 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 58 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -26935,129 +26939,129 @@ define <2 x i64> @ult_58_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_58_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_58_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 58 -; PWR5-NEXT: subfic 3, 3, 58 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 58 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 58 +; PWR5-NEXT: subfic r3, r3, 58 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 58 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_58_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 58 -; PWR6-NEXT: subfic 3, 3, 58 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 58 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 58 +; PWR6-NEXT: subfic r3, r3, 58 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 58 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_58_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 58 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 58 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 58 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 58 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_58_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI214_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI214_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI214_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI214_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_58_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 58 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 58 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -27068,129 +27072,129 @@ define <2 x i64> @ugt_58_v2i64(<2 x i64> %0) { define <2 x i64> @ult_59_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_59_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 59 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 59 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_59_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 59 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 59 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_59_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 59 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 59 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 59 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 59 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_59_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI215_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI215_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI215_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI215_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_59_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 59 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 59 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -27201,129 +27205,129 @@ define <2 x i64> @ult_59_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_59_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_59_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 59 -; PWR5-NEXT: subfic 3, 3, 59 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 59 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 59 +; PWR5-NEXT: subfic r3, r3, 59 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 59 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_59_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 59 -; PWR6-NEXT: subfic 3, 3, 59 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 59 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 59 +; PWR6-NEXT: subfic r3, r3, 59 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 59 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_59_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 59 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 59 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 59 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 59 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_59_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI216_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI216_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI216_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI216_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_59_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 59 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 59 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -27334,129 +27338,129 @@ define <2 x i64> @ugt_59_v2i64(<2 x i64> %0) { define <2 x i64> @ult_60_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_60_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 60 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 60 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_60_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 60 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 60 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_60_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 60 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 60 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 60 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 60 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_60_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI217_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI217_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI217_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI217_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_60_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 60 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 60 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -27467,129 +27471,129 @@ define <2 x i64> @ult_60_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_60_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_60_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 60 -; PWR5-NEXT: subfic 3, 3, 60 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 60 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 60 +; PWR5-NEXT: subfic r3, r3, 60 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 60 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_60_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 60 -; PWR6-NEXT: subfic 3, 3, 60 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 60 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 60 +; PWR6-NEXT: subfic r3, r3, 60 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 60 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_60_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 60 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 60 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 60 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 60 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_60_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI218_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI218_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI218_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI218_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_60_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 60 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 60 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -27600,129 +27604,129 @@ define <2 x i64> @ugt_60_v2i64(<2 x i64> %0) { define <2 x i64> @ult_61_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_61_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 61 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 61 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_61_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 61 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 61 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_61_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 61 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 61 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 61 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 61 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_61_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI219_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI219_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI219_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI219_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_61_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 61 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 61 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -27733,129 +27737,129 @@ define <2 x i64> @ult_61_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_61_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_61_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 61 -; PWR5-NEXT: subfic 3, 3, 61 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 61 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 61 +; PWR5-NEXT: subfic r3, r3, 61 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 61 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_61_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 61 -; PWR6-NEXT: subfic 3, 3, 61 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 61 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 61 +; PWR6-NEXT: subfic r3, r3, 61 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 61 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_61_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 61 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 61 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 61 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 61 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_61_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI220_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI220_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI220_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI220_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_61_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 61 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 61 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -27866,129 +27870,129 @@ define <2 x i64> @ugt_61_v2i64(<2 x i64> %0) { define <2 x i64> @ult_62_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_62_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 62 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 62 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_62_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 62 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 62 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_62_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 62 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 62 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 62 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 62 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_62_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI221_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI221_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI221_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI221_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_62_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 62 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 62 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2, @@ -27999,129 +28003,129 @@ define <2 x i64> @ult_62_v2i64(<2 x i64> %0) { define <2 x i64> @ugt_62_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ugt_62_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: li 5, 62 -; PWR5-NEXT: subfic 3, 3, 62 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 5, 5 -; PWR5-NEXT: subfic 4, 4, 62 -; PWR5-NEXT: subfe 4, 5, 5 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: li r5, 62 +; PWR5-NEXT: subfic r3, r3, 62 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r5, r5 +; PWR5-NEXT: subfic r4, r4, 62 +; PWR5-NEXT: subfe r4, r5, r5 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ugt_62_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: li 5, 62 -; PWR6-NEXT: subfic 3, 3, 62 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 5, 5 -; PWR6-NEXT: subfic 4, 4, 62 -; PWR6-NEXT: subfe 4, 5, 5 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: li r5, 62 +; PWR6-NEXT: subfic r3, r3, 62 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r5, r5 +; PWR6-NEXT: subfic r4, r4, 62 +; PWR6-NEXT: subfe r4, r5, r5 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ugt_62_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 62 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: iselgt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 62 -; PWR7-NEXT: iselgt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 62 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: iselgt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 62 +; PWR7-NEXT: iselgt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ugt_62_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI222_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI222_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 2, 3 +; PWR8-NEXT: addis r3, r2, .LCPI222_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI222_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v2, v3 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ugt_62_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 62 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 2, 3 +; PWR9-NEXT: xxspltib v3, 62 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v2, v3 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ugt <2 x i64> %2, @@ -28132,129 +28136,129 @@ define <2 x i64> @ugt_62_v2i64(<2 x i64> %0) { define <2 x i64> @ult_63_v2i64(<2 x i64> %0) { ; PWR5-LABEL: ult_63_v2i64: ; PWR5: # %bb.0: -; PWR5-NEXT: lis 5, 21845 -; PWR5-NEXT: lis 6, 13107 -; PWR5-NEXT: ori 5, 5, 21845 -; PWR5-NEXT: rotldi 8, 4, 63 -; PWR5-NEXT: rotldi 9, 3, 63 -; PWR5-NEXT: rldimi 5, 5, 32, 0 -; PWR5-NEXT: and 8, 8, 5 -; PWR5-NEXT: and 5, 9, 5 -; PWR5-NEXT: ori 6, 6, 13107 -; PWR5-NEXT: sub 3, 3, 5 -; PWR5-NEXT: rldimi 6, 6, 32, 0 -; PWR5-NEXT: sub 4, 4, 8 -; PWR5-NEXT: and 8, 3, 6 -; PWR5-NEXT: rotldi 3, 3, 62 -; PWR5-NEXT: and 3, 3, 6 -; PWR5-NEXT: lis 7, 3855 -; PWR5-NEXT: and 5, 4, 6 -; PWR5-NEXT: rotldi 4, 4, 62 -; PWR5-NEXT: add 3, 8, 3 -; PWR5-NEXT: lis 9, 257 -; PWR5-NEXT: ori 7, 7, 3855 -; PWR5-NEXT: and 4, 4, 6 -; PWR5-NEXT: rldicl 6, 3, 60, 4 -; PWR5-NEXT: ori 9, 9, 257 -; PWR5-NEXT: rldimi 7, 7, 32, 0 -; PWR5-NEXT: add 4, 5, 4 -; PWR5-NEXT: add 3, 3, 6 -; PWR5-NEXT: rldimi 9, 9, 32, 0 -; PWR5-NEXT: rldicl 5, 4, 60, 4 -; PWR5-NEXT: and 3, 3, 7 -; PWR5-NEXT: add 4, 4, 5 -; PWR5-NEXT: mulld 3, 3, 9 -; PWR5-NEXT: and 4, 4, 7 -; PWR5-NEXT: rldicl 3, 3, 8, 56 -; PWR5-NEXT: li 5, 63 -; PWR5-NEXT: mulld 4, 4, 9 -; PWR5-NEXT: subc 6, 3, 5 -; PWR5-NEXT: rldicl 4, 4, 8, 56 -; PWR5-NEXT: subfe 3, 3, 3 -; PWR5-NEXT: subc 5, 4, 5 -; PWR5-NEXT: subfe 4, 4, 4 +; PWR5-NEXT: lis r5, 21845 +; PWR5-NEXT: lis r6, 13107 +; PWR5-NEXT: ori r5, r5, 21845 +; PWR5-NEXT: rotldi r8, r4, 63 +; PWR5-NEXT: rotldi r9, r3, 63 +; PWR5-NEXT: rldimi r5, r5, 32, 0 +; PWR5-NEXT: and r8, r8, r5 +; PWR5-NEXT: and r5, r9, r5 +; PWR5-NEXT: ori r6, r6, 13107 +; PWR5-NEXT: sub r3, r3, r5 +; PWR5-NEXT: rldimi r6, r6, 32, 0 +; PWR5-NEXT: sub r4, r4, r8 +; PWR5-NEXT: and r8, r3, r6 +; PWR5-NEXT: rotldi r3, r3, 62 +; PWR5-NEXT: and r3, r3, r6 +; PWR5-NEXT: lis r7, 3855 +; PWR5-NEXT: and r5, r4, r6 +; PWR5-NEXT: rotldi r4, r4, 62 +; PWR5-NEXT: add r3, r8, r3 +; PWR5-NEXT: lis r9, 257 +; PWR5-NEXT: ori r7, r7, 3855 +; PWR5-NEXT: and r4, r4, r6 +; PWR5-NEXT: rldicl r6, r3, 60, 4 +; PWR5-NEXT: ori r9, r9, 257 +; PWR5-NEXT: rldimi r7, r7, 32, 0 +; PWR5-NEXT: add r4, r5, r4 +; PWR5-NEXT: add r3, r3, r6 +; PWR5-NEXT: rldimi r9, r9, 32, 0 +; PWR5-NEXT: rldicl r5, r4, 60, 4 +; PWR5-NEXT: and r3, r3, r7 +; PWR5-NEXT: add r4, r4, r5 +; PWR5-NEXT: mulld r3, r3, r9 +; PWR5-NEXT: and r4, r4, r7 +; PWR5-NEXT: rldicl r3, r3, 8, 56 +; PWR5-NEXT: li r5, 63 +; PWR5-NEXT: mulld r4, r4, r9 +; PWR5-NEXT: subc r6, r3, r5 +; PWR5-NEXT: rldicl r4, r4, 8, 56 +; PWR5-NEXT: subfe r3, r3, r3 +; PWR5-NEXT: subc r5, r4, r5 +; PWR5-NEXT: subfe r4, r4, r4 ; PWR5-NEXT: blr ; ; PWR6-LABEL: ult_63_v2i64: ; PWR6: # %bb.0: -; PWR6-NEXT: lis 5, 21845 -; PWR6-NEXT: lis 6, 13107 -; PWR6-NEXT: ori 5, 5, 21845 -; PWR6-NEXT: rotldi 8, 4, 63 -; PWR6-NEXT: rotldi 9, 3, 63 -; PWR6-NEXT: rldimi 5, 5, 32, 0 -; PWR6-NEXT: and 8, 8, 5 -; PWR6-NEXT: and 5, 9, 5 -; PWR6-NEXT: ori 6, 6, 13107 -; PWR6-NEXT: sub 3, 3, 5 -; PWR6-NEXT: rldimi 6, 6, 32, 0 -; PWR6-NEXT: sub 4, 4, 8 -; PWR6-NEXT: and 8, 3, 6 -; PWR6-NEXT: rotldi 3, 3, 62 -; PWR6-NEXT: and 3, 3, 6 -; PWR6-NEXT: lis 7, 3855 -; PWR6-NEXT: and 5, 4, 6 -; PWR6-NEXT: rotldi 4, 4, 62 -; PWR6-NEXT: add 3, 8, 3 -; PWR6-NEXT: lis 9, 257 -; PWR6-NEXT: ori 7, 7, 3855 -; PWR6-NEXT: and 4, 4, 6 -; PWR6-NEXT: rldicl 6, 3, 60, 4 -; PWR6-NEXT: ori 9, 9, 257 -; PWR6-NEXT: rldimi 7, 7, 32, 0 -; PWR6-NEXT: add 4, 5, 4 -; PWR6-NEXT: add 3, 3, 6 -; PWR6-NEXT: rldimi 9, 9, 32, 0 -; PWR6-NEXT: rldicl 5, 4, 60, 4 -; PWR6-NEXT: and 3, 3, 7 -; PWR6-NEXT: add 4, 4, 5 -; PWR6-NEXT: mulld 3, 3, 9 -; PWR6-NEXT: and 4, 4, 7 -; PWR6-NEXT: rldicl 3, 3, 8, 56 -; PWR6-NEXT: li 5, 63 -; PWR6-NEXT: mulld 4, 4, 9 -; PWR6-NEXT: subc 6, 3, 5 -; PWR6-NEXT: rldicl 4, 4, 8, 56 -; PWR6-NEXT: subfe 3, 3, 3 -; PWR6-NEXT: subc 5, 4, 5 -; PWR6-NEXT: subfe 4, 4, 4 +; PWR6-NEXT: lis r5, 21845 +; PWR6-NEXT: lis r6, 13107 +; PWR6-NEXT: ori r5, r5, 21845 +; PWR6-NEXT: rotldi r8, r4, 63 +; PWR6-NEXT: rotldi r9, r3, 63 +; PWR6-NEXT: rldimi r5, r5, 32, 0 +; PWR6-NEXT: and r8, r8, r5 +; PWR6-NEXT: and r5, r9, r5 +; PWR6-NEXT: ori r6, r6, 13107 +; PWR6-NEXT: sub r3, r3, r5 +; PWR6-NEXT: rldimi r6, r6, 32, 0 +; PWR6-NEXT: sub r4, r4, r8 +; PWR6-NEXT: and r8, r3, r6 +; PWR6-NEXT: rotldi r3, r3, 62 +; PWR6-NEXT: and r3, r3, r6 +; PWR6-NEXT: lis r7, 3855 +; PWR6-NEXT: and r5, r4, r6 +; PWR6-NEXT: rotldi r4, r4, 62 +; PWR6-NEXT: add r3, r8, r3 +; PWR6-NEXT: lis r9, 257 +; PWR6-NEXT: ori r7, r7, 3855 +; PWR6-NEXT: and r4, r4, r6 +; PWR6-NEXT: rldicl r6, r3, 60, 4 +; PWR6-NEXT: ori r9, r9, 257 +; PWR6-NEXT: rldimi r7, r7, 32, 0 +; PWR6-NEXT: add r4, r5, r4 +; PWR6-NEXT: add r3, r3, r6 +; PWR6-NEXT: rldimi r9, r9, 32, 0 +; PWR6-NEXT: rldicl r5, r4, 60, 4 +; PWR6-NEXT: and r3, r3, r7 +; PWR6-NEXT: add r4, r4, r5 +; PWR6-NEXT: mulld r3, r3, r9 +; PWR6-NEXT: and r4, r4, r7 +; PWR6-NEXT: rldicl r3, r3, 8, 56 +; PWR6-NEXT: li r5, 63 +; PWR6-NEXT: mulld r4, r4, r9 +; PWR6-NEXT: subc r6, r3, r5 +; PWR6-NEXT: rldicl r4, r4, 8, 56 +; PWR6-NEXT: subfe r3, r3, r3 +; PWR6-NEXT: subc r5, r4, r5 +; PWR6-NEXT: subfe r4, r4, r4 ; PWR6-NEXT: blr ; ; PWR7-LABEL: ult_63_v2i64: ; PWR7: # %bb.0: -; PWR7-NEXT: addi 3, 1, -32 -; PWR7-NEXT: li 5, -1 -; PWR7-NEXT: stxvd2x 34, 0, 3 -; PWR7-NEXT: ld 4, -24(1) -; PWR7-NEXT: ld 3, -32(1) -; PWR7-NEXT: popcntd 4, 4 -; PWR7-NEXT: popcntd 3, 3 -; PWR7-NEXT: cmpldi 4, 63 -; PWR7-NEXT: li 4, 0 -; PWR7-NEXT: isellt 6, 5, 4 -; PWR7-NEXT: cmpldi 3, 63 -; PWR7-NEXT: isellt 3, 5, 4 -; PWR7-NEXT: std 6, -8(1) -; PWR7-NEXT: std 3, -16(1) -; PWR7-NEXT: addi 3, 1, -16 -; PWR7-NEXT: lxvd2x 34, 0, 3 +; PWR7-NEXT: addi r3, r1, -32 +; PWR7-NEXT: li r5, -1 +; PWR7-NEXT: stxvd2x v2, 0, r3 +; PWR7-NEXT: ld r4, -24(r1) +; PWR7-NEXT: ld r3, -32(r1) +; PWR7-NEXT: popcntd r4, r4 +; PWR7-NEXT: popcntd r3, r3 +; PWR7-NEXT: cmpldi r4, 63 +; PWR7-NEXT: li r4, 0 +; PWR7-NEXT: isellt r6, r5, r4 +; PWR7-NEXT: cmpldi r3, 63 +; PWR7-NEXT: isellt r3, r5, r4 +; PWR7-NEXT: std r6, -8(r1) +; PWR7-NEXT: std r3, -16(r1) +; PWR7-NEXT: addi r3, r1, -16 +; PWR7-NEXT: lxvd2x v2, 0, r3 ; PWR7-NEXT: blr ; ; PWR8-LABEL: ult_63_v2i64: ; PWR8: # %bb.0: -; PWR8-NEXT: addis 3, 2, .LCPI223_0@toc@ha -; PWR8-NEXT: vpopcntd 2, 2 -; PWR8-NEXT: addi 3, 3, .LCPI223_0@toc@l -; PWR8-NEXT: lxvd2x 35, 0, 3 -; PWR8-NEXT: vcmpgtud 2, 3, 2 +; PWR8-NEXT: addis r3, r2, .LCPI223_0@toc@ha +; PWR8-NEXT: vpopcntd v2, v2 +; PWR8-NEXT: addi r3, r3, .LCPI223_0@toc@l +; PWR8-NEXT: lxvd2x v3, 0, r3 +; PWR8-NEXT: vcmpgtud v2, v3, v2 ; PWR8-NEXT: blr ; ; PWR9-LABEL: ult_63_v2i64: ; PWR9: # %bb.0: -; PWR9-NEXT: xxspltib 35, 63 -; PWR9-NEXT: vpopcntd 2, 2 -; PWR9-NEXT: vextsb2d 3, 3 -; PWR9-NEXT: vcmpgtud 2, 3, 2 +; PWR9-NEXT: xxspltib v3, 63 +; PWR9-NEXT: vpopcntd v2, v2 +; PWR9-NEXT: vextsb2d v3, v3 +; PWR9-NEXT: vcmpgtud v2, v3, v2 ; PWR9-NEXT: blr %2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0) %3 = icmp ult <2 x i64> %2,