diff --git a/llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp b/llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp index 1e3f7fc0070ff..776208bd3e693 100644 --- a/llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp +++ b/llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp @@ -269,6 +269,21 @@ void SPIRVInstPrinter::printInst(const MCInst *MI, uint64_t Address, } break; } + case SPIRV::OpSDot: + case SPIRV::OpUDot: + case SPIRV::OpSUDot: + case SPIRV::OpSDotAccSat: + case SPIRV::OpUDotAccSat: + case SPIRV::OpSUDotAccSat: { + const unsigned NumOps = MI->getNumOperands(); + if (NumOps > NumFixedOps) { + OS << ' '; + printSymbolicOperand( + MI, NumOps - 1, OS); + break; + } + break; + } default: printRemainingVariableOps(MI, NumFixedOps, OS); break; diff --git a/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp b/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp index 2abd9d36f7606..86f445954400e 100644 --- a/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp +++ b/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp @@ -1778,7 +1778,7 @@ static bool generateDotOrFMulInst(const StringRef DemangledCall, // Add Packed Vector Format for Integer dot product builtins if arguments are // scalar if (!IsVec && OC != SPIRV::OpFMulS) - MIB.addImm(0); + MIB.addImm(SPIRV::PackedVectorFormat4x8Bit); return true; } diff --git a/llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td b/llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td index 501bcb94af2ea..66ce5a2d67c3e 100644 --- a/llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td +++ b/llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td @@ -211,6 +211,7 @@ def CooperativeMatrixOperandsOperand : OperandCategory; def SpecConstantOpOperandsOperand : OperandCategory; def MatrixMultiplyAccumulateOperandsOperand : OperandCategory; def FPEncodingOperand : OperandCategory; +def PackedVectorFormatsOperand : OperandCategory; //===----------------------------------------------------------------------===// // Definition of the Environments @@ -2026,3 +2027,22 @@ multiclass FPEncodingOperand value, list reqExtensions>{ } defm BFloat16KHR : FPEncodingOperand<0, [SPV_KHR_bfloat16]>; + +def PackedVectorFormats : GenericEnum, Operand { + let FilterClass = "PackedVectorFormats"; + let NameField = "Name"; + let ValueField = "Value"; + let PrintMethod = !strconcat("printSymbolicOperand"); +} + +class PackedVectorFormats value> { + string Name = name; + bits<32> Value = value; +} + +multiclass PackedVectorFormatsOperand value, list reqExtensions> { + def NAME : BuiltIn; + defm : SymbolicOperandWithRequirements; +} + +defm PackedVectorFormat4x8Bit : PackedVectorFormatsOperand<0, [SPV_KHR_integer_dot_product]>; diff --git a/llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_integer_dot_product/SPV_KHR_integer_dot_product_OCLtoSPIRV_int.ll b/llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_integer_dot_product/SPV_KHR_integer_dot_product_OCLtoSPIRV_int.ll index 284f5c34671b7..52ddc39265442 100644 --- a/llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_integer_dot_product/SPV_KHR_integer_dot_product_OCLtoSPIRV_int.ll +++ b/llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_integer_dot_product/SPV_KHR_integer_dot_product_OCLtoSPIRV_int.ll @@ -13,15 +13,15 @@ ; CHECK: Name %[[#SignedB:]] "ib" ; CHECK: Name %[[#UnsignedB:]] "ub" -; CHECK: SDot %[[#]] %[[#SignedA]] %[[#SignedB]] 0 -; CHECK: SUDot %[[#]] %[[#SignedA]] %[[#UnsignedB]] 0 -; CHECK: SUDot %[[#]] %[[#SignedB]] %[[#UnsignedA]] 0 -; CHECK: UDot %[[#]] %[[#UnsignedA]] %[[#UnsignedB]] 0 - -; CHECK: SDotAccSat %[[#]] %[[#SignedA]] %[[#SignedB]] %[[#]] 0 -; CHECK: SUDotAccSat %[[#]] %[[#SignedA]] %[[#UnsignedB]] %[[#]] 0 -; CHECK: SUDotAccSat %[[#]] %[[#SignedB]] %[[#UnsignedA]] %[[#]] 0 -; CHECK: UDotAccSat %[[#]] %[[#UnsignedA]] %[[#UnsignedB]] %[[#]] 0 +; CHECK: SDot %[[#]] %[[#SignedA]] %[[#SignedB]] PackedVectorFormat4x8Bit +; CHECK: SUDot %[[#]] %[[#SignedA]] %[[#UnsignedB]] PackedVectorFormat4x8Bit +; CHECK: SUDot %[[#]] %[[#SignedB]] %[[#UnsignedA]] PackedVectorFormat4x8Bit +; CHECK: UDot %[[#]] %[[#UnsignedA]] %[[#UnsignedB]] PackedVectorFormat4x8Bit + +; CHECK: SDotAccSat %[[#]] %[[#SignedA]] %[[#SignedB]] %[[#]] PackedVectorFormat4x8Bit +; CHECK: SUDotAccSat %[[#]] %[[#SignedA]] %[[#UnsignedB]] %[[#]] PackedVectorFormat4x8Bit +; CHECK: SUDotAccSat %[[#]] %[[#SignedB]] %[[#UnsignedA]] %[[#]] PackedVectorFormat4x8Bit +; CHECK: UDotAccSat %[[#]] %[[#UnsignedA]] %[[#UnsignedB]] %[[#]] PackedVectorFormat4x8Bit define spir_kernel void @test(i32 %ia, i32 %ua, i32 %ib, i32 %ub, i32 %ires, i32 %ures) { entry: