diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 57cf66e5275e3..69e430d29dbe9 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -45189,6 +45189,7 @@ bool X86TargetLowering::isGuaranteedNotToBeUndefOrPoisonForTargetNode( case X86ISD::UNPCKL: case X86ISD::UNPCKH: case X86ISD::VPERMILPI: + case X86ISD::VPERMV: case X86ISD::VPERMV3: { SmallVector Mask; SmallVector Ops; @@ -45255,6 +45256,7 @@ bool X86TargetLowering::canCreateUndefOrPoisonForTargetNode( case X86ISD::UNPCKL: case X86ISD::UNPCKH: case X86ISD::VPERMILPI: + case X86ISD::VPERMV: case X86ISD::VPERMV3: return false; // SSE comparisons handle all icmp/fcmp cases. diff --git a/llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll b/llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll index 06468f6414751..56c0b164b63d6 100644 --- a/llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll +++ b/llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll @@ -934,19 +934,9 @@ entry: } define <8 x float> @freeze_permps(<8 x float> %a0) { -; AVX2-LABEL: freeze_permps: -; AVX2: # %bb.0: -; AVX2-NEXT: vmovaps {{.*#+}} ymm1 = [7,6,5,4,3,2,1,0] -; AVX2-NEXT: vpermps %ymm0, %ymm1, %ymm0 -; AVX2-NEXT: vpermps %ymm0, %ymm1, %ymm0 -; AVX2-NEXT: ret{{[l|q]}} -; -; AVX512-LABEL: freeze_permps: -; AVX512: # %bb.0: -; AVX512-NEXT: vpmovsxbd {{.*#+}} ymm1 = [7,6,5,4,3,2,1,0] -; AVX512-NEXT: vpermps %ymm0, %ymm1, %ymm0 -; AVX512-NEXT: vpermps %ymm0, %ymm1, %ymm0 -; AVX512-NEXT: ret{{[l|q]}} +; CHECK-LABEL: freeze_permps: +; CHECK: # %bb.0: +; CHECK-NEXT: ret{{[l|q]}} %s0 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x i32> ) %f0 = freeze <8 x float> %s0 %s1 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %f0, <8 x i32> )