Skip to content

[LoongArch] Lowering flog2 to flogb #162978

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 3 commits into from
Oct 31, 2025
Merged

[LoongArch] Lowering flog2 to flogb #162978

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
3 commits
Select commit Hold shift + click to select a range
c81a897
[LoongArch] Lowering flog2 to flogb
ylzsx Oct 11, 2025
df3b83e
According to LoongArch ISA V1.11, FLOGB.S/D is unsupported in LA32.
ylzsx Oct 29, 2025
eb907d0
modify td
ylzsx Oct 30, 2025
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
1 change: 1 addition & 0 deletions llvm/lib/Target/LoongArch/LoongArchFloat32InstrInfo.td
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -365,6 +365,7 @@ def : Pat<(f32 (uint_to_fp (i64 (sexti32 (i64 GPR:$src))))),
// FP Rounding
let Predicates = [HasBasicF, IsLA64] in {
def : PatFpr<frint, FRINT_S, FPR32>;
def : PatFpr<flog2, FLOGB_S, FPR32>;
} // Predicates = [HasBasicF, IsLA64]

let Predicates = [HasBasicF, IsLA32] in {
Expand Down
1 change: 1 addition & 0 deletions llvm/lib/Target/LoongArch/LoongArchFloat64InstrInfo.td
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -348,6 +348,7 @@ def : Pat<(bitconvert FPR64:$src), (MOVFR2GR_D FPR64:$src)>;
// FP Rounding
let Predicates = [HasBasicD, IsLA64] in {
def : PatFpr<frint, FRINT_D, FPR64>;
def : PatFpr<flog2, FLOGB_D, FPR64>;
} // Predicates = [HasBasicD, IsLA64]

/// Pseudo-instructions needed for the soft-float ABI with LA32D
Expand Down
10 changes: 8 additions & 2 deletions llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -244,8 +244,10 @@ LoongArchTargetLowering::LoongArchTargetLowering(const TargetMachine &TM,
setOperationAction(ISD::FP_TO_BF16, MVT::f32,
Subtarget.isSoftFPABI() ? LibCall : Custom);

if (Subtarget.is64Bit())
if (Subtarget.is64Bit()) {
setOperationAction(ISD::FRINT, MVT::f32, Legal);
setOperationAction(ISD::FLOG2, MVT::f32, Legal);
}

if (!Subtarget.hasBasicD()) {
setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom);
Expand Down Expand Up @@ -291,8 +293,10 @@ LoongArchTargetLowering::LoongArchTargetLowering(const TargetMachine &TM,
setOperationAction(ISD::FP_TO_BF16, MVT::f64,
Subtarget.isSoftFPABI() ? LibCall : Custom);

if (Subtarget.is64Bit())
if (Subtarget.is64Bit()) {
setOperationAction(ISD::FRINT, MVT::f64, Legal);
setOperationAction(ISD::FLOG2, MVT::f64, Legal);
}
}

// Set operations for 'LSX' feature.
Expand Down Expand Up @@ -362,6 +366,7 @@ LoongArchTargetLowering::LoongArchTargetLowering(const TargetMachine &TM,
setOperationAction(ISD::FMA, VT, Legal);
setOperationAction(ISD::FSQRT, VT, Legal);
setOperationAction(ISD::FNEG, VT, Legal);
setOperationAction(ISD::FLOG2, VT, Legal);
setCondCodeAction({ISD::SETGE, ISD::SETGT, ISD::SETOGE, ISD::SETOGT,
ISD::SETUGE, ISD::SETUGT},
VT, Expand);
Expand Down Expand Up @@ -443,6 +448,7 @@ LoongArchTargetLowering::LoongArchTargetLowering(const TargetMachine &TM,
setOperationAction(ISD::FMA, VT, Legal);
setOperationAction(ISD::FSQRT, VT, Legal);
setOperationAction(ISD::FNEG, VT, Legal);
setOperationAction(ISD::FLOG2, VT, Legal);
setCondCodeAction({ISD::SETGE, ISD::SETGT, ISD::SETOGE, ISD::SETOGT,
ISD::SETUGE, ISD::SETUGT},
VT, Expand);
Expand Down
3 changes: 3 additions & 0 deletions llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -1593,6 +1593,9 @@ def : Pat<(fma_nsz (fneg v4f64:$xj), v4f64:$xk, v4f64:$xa),
// XVFSQRT_{S/D}
defm : PatXrF<fsqrt, "XVFSQRT">;

// XVFLOGB_{S/D}
defm : PatXrF<flog2, "XVFLOGB">;

// XVRECIP_{S/D}
def : Pat<(fdiv vsplatf32_fpimm_eq_1, v8f32:$xj),
(XVFRECIP_S v8f32:$xj)>;
Expand Down
3 changes: 3 additions & 0 deletions llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -1783,6 +1783,9 @@ def : Pat<(fma_nsz (fneg v2f64:$vj), v2f64:$vk, v2f64:$va),
// VFSQRT_{S/D}
defm : PatVrF<fsqrt, "VFSQRT">;

// VFLOGB_{S/D}
defm : PatVrF<flog2, "VFLOGB">;

// VFRECIP_{S/D}
def : Pat<(fdiv vsplatf32_fpimm_eq_1, v4f32:$vj),
(VFRECIP_S v4f32:$vj)>;
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/LoongArch/ir-instruction/flog2.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -12,8 +12,8 @@ define float @flog2_s(float %x) nounwind {
;
; LA64-LABEL: flog2_s:
; LA64: # %bb.0:
; LA64-NEXT: pcaddu18i $t8, %call36(log2f)
; LA64-NEXT: jr $t8
; LA64-NEXT: flogb.s $fa0, $fa0
; LA64-NEXT: ret
%y = call float @llvm.log2.f32(float %x)
ret float %y
}
Expand All @@ -25,8 +25,8 @@ define double @flog2_d(double %x) nounwind {
;
; LA64-LABEL: flog2_d:
; LA64: # %bb.0:
; LA64-NEXT: pcaddu18i $t8, %call36(log2)
; LA64-NEXT: jr $t8
; LA64-NEXT: flogb.d $fa0, $fa0
; LA64-NEXT: ret
%y = call double @llvm.log2.f64(double %x)
ret double %y
}
258 changes: 14 additions & 244 deletions llvm/test/CodeGen/LoongArch/lasx/ir-instruction/flog2.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,166 +1,17 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s --check-prefix=LA32
; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s --check-prefix=LA64
; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s
; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s

declare <8 x float> @llvm.log2.v8f32(<8 x float>)
declare <4 x double> @llvm.log2.v4f64(<4 x double>)

define void @flog2_v8f32(ptr %res, ptr %a) nounwind {
; LA32-LABEL: flog2_v8f32:
; LA32: # %bb.0: # %entry
; LA32-NEXT: addi.w $sp, $sp, -128
; LA32-NEXT: st.w $ra, $sp, 124 # 4-byte Folded Spill
; LA32-NEXT: st.w $fp, $sp, 120 # 4-byte Folded Spill
; LA32-NEXT: xvld $xr0, $a1, 0
; LA32-NEXT: xvst $xr0, $sp, 80 # 32-byte Folded Spill
; LA32-NEXT: move $fp, $a0
; LA32-NEXT: xvpickve.w $xr0, $xr0, 5
; LA32-NEXT: # kill: def $f0 killed $f0 killed $xr0
; LA32-NEXT: bl log2f
; LA32-NEXT: # kill: def $f0 killed $f0 def $vr0
; LA32-NEXT: vst $vr0, $sp, 48 # 16-byte Folded Spill
; LA32-NEXT: xvld $xr0, $sp, 80 # 32-byte Folded Reload
; LA32-NEXT: xvpickve.w $xr0, $xr0, 4
; LA32-NEXT: # kill: def $f0 killed $f0 killed $xr0
; LA32-NEXT: bl log2f
; LA32-NEXT: # kill: def $f0 killed $f0 def $xr0
; LA32-NEXT: vld $vr1, $sp, 48 # 16-byte Folded Reload
; LA32-NEXT: vextrins.w $vr0, $vr1, 16
; LA32-NEXT: xvst $xr0, $sp, 48 # 32-byte Folded Spill
; LA32-NEXT: xvld $xr0, $sp, 80 # 32-byte Folded Reload
; LA32-NEXT: xvpickve.w $xr0, $xr0, 6
; LA32-NEXT: # kill: def $f0 killed $f0 killed $xr0
; LA32-NEXT: bl log2f
; LA32-NEXT: # kill: def $f0 killed $f0 def $vr0
; LA32-NEXT: xvld $xr1, $sp, 48 # 32-byte Folded Reload
; LA32-NEXT: vextrins.w $vr1, $vr0, 32
; LA32-NEXT: xvst $xr1, $sp, 48 # 32-byte Folded Spill
; LA32-NEXT: xvld $xr0, $sp, 80 # 32-byte Folded Reload
; LA32-NEXT: xvpickve.w $xr0, $xr0, 7
; LA32-NEXT: # kill: def $f0 killed $f0 killed $xr0
; LA32-NEXT: bl log2f
; LA32-NEXT: # kill: def $f0 killed $f0 def $vr0
; LA32-NEXT: xvld $xr1, $sp, 48 # 32-byte Folded Reload
; LA32-NEXT: vextrins.w $vr1, $vr0, 48
; LA32-NEXT: xvst $xr1, $sp, 48 # 32-byte Folded Spill
; LA32-NEXT: xvld $xr0, $sp, 80 # 32-byte Folded Reload
; LA32-NEXT: xvpickve.w $xr0, $xr0, 1
; LA32-NEXT: # kill: def $f0 killed $f0 killed $xr0
; LA32-NEXT: bl log2f
; LA32-NEXT: # kill: def $f0 killed $f0 def $vr0
; LA32-NEXT: vst $vr0, $sp, 16 # 16-byte Folded Spill
; LA32-NEXT: xvld $xr0, $sp, 80 # 32-byte Folded Reload
; LA32-NEXT: xvpickve.w $xr0, $xr0, 0
; LA32-NEXT: # kill: def $f0 killed $f0 killed $xr0
; LA32-NEXT: bl log2f
; LA32-NEXT: # kill: def $f0 killed $f0 def $xr0
; LA32-NEXT: vld $vr1, $sp, 16 # 16-byte Folded Reload
; LA32-NEXT: vextrins.w $vr0, $vr1, 16
; LA32-NEXT: xvst $xr0, $sp, 16 # 32-byte Folded Spill
; LA32-NEXT: xvld $xr0, $sp, 80 # 32-byte Folded Reload
; LA32-NEXT: xvpickve.w $xr0, $xr0, 2
; LA32-NEXT: # kill: def $f0 killed $f0 killed $xr0
; LA32-NEXT: bl log2f
; LA32-NEXT: # kill: def $f0 killed $f0 def $vr0
; LA32-NEXT: xvld $xr1, $sp, 16 # 32-byte Folded Reload
; LA32-NEXT: vextrins.w $vr1, $vr0, 32
; LA32-NEXT: xvst $xr1, $sp, 16 # 32-byte Folded Spill
; LA32-NEXT: xvld $xr0, $sp, 80 # 32-byte Folded Reload
; LA32-NEXT: xvpickve.w $xr0, $xr0, 3
; LA32-NEXT: # kill: def $f0 killed $f0 killed $xr0
; LA32-NEXT: bl log2f
; LA32-NEXT: # kill: def $f0 killed $f0 def $vr0
; LA32-NEXT: xvld $xr1, $sp, 16 # 32-byte Folded Reload
; LA32-NEXT: vextrins.w $vr1, $vr0, 48
; LA32-NEXT: xvld $xr0, $sp, 48 # 32-byte Folded Reload
; LA32-NEXT: xvpermi.q $xr1, $xr0, 2
; LA32-NEXT: xvst $xr1, $fp, 0
; LA32-NEXT: ld.w $fp, $sp, 120 # 4-byte Folded Reload
; LA32-NEXT: ld.w $ra, $sp, 124 # 4-byte Folded Reload
; LA32-NEXT: addi.w $sp, $sp, 128
; LA32-NEXT: ret
;
; LA64-LABEL: flog2_v8f32:
; LA64: # %bb.0: # %entry
; LA64-NEXT: addi.d $sp, $sp, -128
; LA64-NEXT: st.d $ra, $sp, 120 # 8-byte Folded Spill
; LA64-NEXT: st.d $fp, $sp, 112 # 8-byte Folded Spill
; LA64-NEXT: xvld $xr0, $a1, 0
; LA64-NEXT: xvst $xr0, $sp, 80 # 32-byte Folded Spill
; LA64-NEXT: move $fp, $a0
; LA64-NEXT: xvpickve.w $xr0, $xr0, 5
; LA64-NEXT: # kill: def $f0 killed $f0 killed $xr0
; LA64-NEXT: pcaddu18i $ra, %call36(log2f)
; LA64-NEXT: jirl $ra, $ra, 0
; LA64-NEXT: # kill: def $f0 killed $f0 def $vr0
; LA64-NEXT: vst $vr0, $sp, 48 # 16-byte Folded Spill
; LA64-NEXT: xvld $xr0, $sp, 80 # 32-byte Folded Reload
; LA64-NEXT: xvpickve.w $xr0, $xr0, 4
; LA64-NEXT: # kill: def $f0 killed $f0 killed $xr0
; LA64-NEXT: pcaddu18i $ra, %call36(log2f)
; LA64-NEXT: jirl $ra, $ra, 0
; LA64-NEXT: # kill: def $f0 killed $f0 def $xr0
; LA64-NEXT: vld $vr1, $sp, 48 # 16-byte Folded Reload
; LA64-NEXT: vextrins.w $vr0, $vr1, 16
; LA64-NEXT: xvst $xr0, $sp, 48 # 32-byte Folded Spill
; LA64-NEXT: xvld $xr0, $sp, 80 # 32-byte Folded Reload
; LA64-NEXT: xvpickve.w $xr0, $xr0, 6
; LA64-NEXT: # kill: def $f0 killed $f0 killed $xr0
; LA64-NEXT: pcaddu18i $ra, %call36(log2f)
; LA64-NEXT: jirl $ra, $ra, 0
; LA64-NEXT: # kill: def $f0 killed $f0 def $vr0
; LA64-NEXT: xvld $xr1, $sp, 48 # 32-byte Folded Reload
; LA64-NEXT: vextrins.w $vr1, $vr0, 32
; LA64-NEXT: xvst $xr1, $sp, 48 # 32-byte Folded Spill
; LA64-NEXT: xvld $xr0, $sp, 80 # 32-byte Folded Reload
; LA64-NEXT: xvpickve.w $xr0, $xr0, 7
; LA64-NEXT: # kill: def $f0 killed $f0 killed $xr0
; LA64-NEXT: pcaddu18i $ra, %call36(log2f)
; LA64-NEXT: jirl $ra, $ra, 0
; LA64-NEXT: # kill: def $f0 killed $f0 def $vr0
; LA64-NEXT: xvld $xr1, $sp, 48 # 32-byte Folded Reload
; LA64-NEXT: vextrins.w $vr1, $vr0, 48
; LA64-NEXT: xvst $xr1, $sp, 48 # 32-byte Folded Spill
; LA64-NEXT: xvld $xr0, $sp, 80 # 32-byte Folded Reload
; LA64-NEXT: xvpickve.w $xr0, $xr0, 1
; LA64-NEXT: # kill: def $f0 killed $f0 killed $xr0
; LA64-NEXT: pcaddu18i $ra, %call36(log2f)
; LA64-NEXT: jirl $ra, $ra, 0
; LA64-NEXT: # kill: def $f0 killed $f0 def $vr0
; LA64-NEXT: vst $vr0, $sp, 16 # 16-byte Folded Spill
; LA64-NEXT: xvld $xr0, $sp, 80 # 32-byte Folded Reload
; LA64-NEXT: xvpickve.w $xr0, $xr0, 0
; LA64-NEXT: # kill: def $f0 killed $f0 killed $xr0
; LA64-NEXT: pcaddu18i $ra, %call36(log2f)
; LA64-NEXT: jirl $ra, $ra, 0
; LA64-NEXT: # kill: def $f0 killed $f0 def $xr0
; LA64-NEXT: vld $vr1, $sp, 16 # 16-byte Folded Reload
; LA64-NEXT: vextrins.w $vr0, $vr1, 16
; LA64-NEXT: xvst $xr0, $sp, 16 # 32-byte Folded Spill
; LA64-NEXT: xvld $xr0, $sp, 80 # 32-byte Folded Reload
; LA64-NEXT: xvpickve.w $xr0, $xr0, 2
; LA64-NEXT: # kill: def $f0 killed $f0 killed $xr0
; LA64-NEXT: pcaddu18i $ra, %call36(log2f)
; LA64-NEXT: jirl $ra, $ra, 0
; LA64-NEXT: # kill: def $f0 killed $f0 def $vr0
; LA64-NEXT: xvld $xr1, $sp, 16 # 32-byte Folded Reload
; LA64-NEXT: vextrins.w $vr1, $vr0, 32
; LA64-NEXT: xvst $xr1, $sp, 16 # 32-byte Folded Spill
; LA64-NEXT: xvld $xr0, $sp, 80 # 32-byte Folded Reload
; LA64-NEXT: xvpickve.w $xr0, $xr0, 3
; LA64-NEXT: # kill: def $f0 killed $f0 killed $xr0
; LA64-NEXT: pcaddu18i $ra, %call36(log2f)
; LA64-NEXT: jirl $ra, $ra, 0
; LA64-NEXT: # kill: def $f0 killed $f0 def $vr0
; LA64-NEXT: xvld $xr1, $sp, 16 # 32-byte Folded Reload
; LA64-NEXT: vextrins.w $vr1, $vr0, 48
; LA64-NEXT: xvld $xr0, $sp, 48 # 32-byte Folded Reload
; LA64-NEXT: xvpermi.q $xr1, $xr0, 2
; LA64-NEXT: xvst $xr1, $fp, 0
; LA64-NEXT: ld.d $fp, $sp, 112 # 8-byte Folded Reload
; LA64-NEXT: ld.d $ra, $sp, 120 # 8-byte Folded Reload
; LA64-NEXT: addi.d $sp, $sp, 128
; LA64-NEXT: ret
; CHECK-LABEL: flog2_v8f32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvflogb.s $xr0, $xr0
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
%v = load <8 x float>, ptr %a
%r = call <8 x float> @llvm.log2.v8f32(<8 x float> %v)
Expand All @@ -169,93 +20,12 @@ entry:
}

define void @flog2_v4f64(ptr %res, ptr %a) nounwind {
; LA32-LABEL: flog2_v4f64:
; LA32: # %bb.0: # %entry
; LA32-NEXT: addi.w $sp, $sp, -112
; LA32-NEXT: st.w $ra, $sp, 108 # 4-byte Folded Spill
; LA32-NEXT: st.w $fp, $sp, 104 # 4-byte Folded Spill
; LA32-NEXT: xvld $xr0, $a1, 0
; LA32-NEXT: xvst $xr0, $sp, 64 # 32-byte Folded Spill
; LA32-NEXT: move $fp, $a0
; LA32-NEXT: xvpickve.d $xr0, $xr0, 3
; LA32-NEXT: # kill: def $f0_64 killed $f0_64 killed $xr0
; LA32-NEXT: bl log2
; LA32-NEXT: # kill: def $f0_64 killed $f0_64 def $vr0
; LA32-NEXT: vst $vr0, $sp, 32 # 16-byte Folded Spill
; LA32-NEXT: xvld $xr0, $sp, 64 # 32-byte Folded Reload
; LA32-NEXT: xvpickve.d $xr0, $xr0, 2
; LA32-NEXT: # kill: def $f0_64 killed $f0_64 killed $xr0
; LA32-NEXT: bl log2
; LA32-NEXT: # kill: def $f0_64 killed $f0_64 def $xr0
; LA32-NEXT: vld $vr1, $sp, 32 # 16-byte Folded Reload
; LA32-NEXT: vextrins.d $vr0, $vr1, 16
; LA32-NEXT: xvst $xr0, $sp, 32 # 32-byte Folded Spill
; LA32-NEXT: xvld $xr0, $sp, 64 # 32-byte Folded Reload
; LA32-NEXT: xvpickve.d $xr0, $xr0, 1
; LA32-NEXT: # kill: def $f0_64 killed $f0_64 killed $xr0
; LA32-NEXT: bl log2
; LA32-NEXT: # kill: def $f0_64 killed $f0_64 def $vr0
; LA32-NEXT: vst $vr0, $sp, 16 # 16-byte Folded Spill
; LA32-NEXT: xvld $xr0, $sp, 64 # 32-byte Folded Reload
; LA32-NEXT: xvpickve.d $xr0, $xr0, 0
; LA32-NEXT: # kill: def $f0_64 killed $f0_64 killed $xr0
; LA32-NEXT: bl log2
; LA32-NEXT: # kill: def $f0_64 killed $f0_64 def $xr0
; LA32-NEXT: vld $vr1, $sp, 16 # 16-byte Folded Reload
; LA32-NEXT: vextrins.d $vr0, $vr1, 16
; LA32-NEXT: xvld $xr1, $sp, 32 # 32-byte Folded Reload
; LA32-NEXT: xvpermi.q $xr0, $xr1, 2
; LA32-NEXT: xvst $xr0, $fp, 0
; LA32-NEXT: ld.w $fp, $sp, 104 # 4-byte Folded Reload
; LA32-NEXT: ld.w $ra, $sp, 108 # 4-byte Folded Reload
; LA32-NEXT: addi.w $sp, $sp, 112
; LA32-NEXT: ret
;
; LA64-LABEL: flog2_v4f64:
; LA64: # %bb.0: # %entry
; LA64-NEXT: addi.d $sp, $sp, -112
; LA64-NEXT: st.d $ra, $sp, 104 # 8-byte Folded Spill
; LA64-NEXT: st.d $fp, $sp, 96 # 8-byte Folded Spill
; LA64-NEXT: xvld $xr0, $a1, 0
; LA64-NEXT: xvst $xr0, $sp, 64 # 32-byte Folded Spill
; LA64-NEXT: move $fp, $a0
; LA64-NEXT: xvpickve.d $xr0, $xr0, 3
; LA64-NEXT: # kill: def $f0_64 killed $f0_64 killed $xr0
; LA64-NEXT: pcaddu18i $ra, %call36(log2)
; LA64-NEXT: jirl $ra, $ra, 0
; LA64-NEXT: # kill: def $f0_64 killed $f0_64 def $vr0
; LA64-NEXT: vst $vr0, $sp, 32 # 16-byte Folded Spill
; LA64-NEXT: xvld $xr0, $sp, 64 # 32-byte Folded Reload
; LA64-NEXT: xvpickve.d $xr0, $xr0, 2
; LA64-NEXT: # kill: def $f0_64 killed $f0_64 killed $xr0
; LA64-NEXT: pcaddu18i $ra, %call36(log2)
; LA64-NEXT: jirl $ra, $ra, 0
; LA64-NEXT: # kill: def $f0_64 killed $f0_64 def $xr0
; LA64-NEXT: vld $vr1, $sp, 32 # 16-byte Folded Reload
; LA64-NEXT: vextrins.d $vr0, $vr1, 16
; LA64-NEXT: xvst $xr0, $sp, 32 # 32-byte Folded Spill
; LA64-NEXT: xvld $xr0, $sp, 64 # 32-byte Folded Reload
; LA64-NEXT: xvpickve.d $xr0, $xr0, 1
; LA64-NEXT: # kill: def $f0_64 killed $f0_64 killed $xr0
; LA64-NEXT: pcaddu18i $ra, %call36(log2)
; LA64-NEXT: jirl $ra, $ra, 0
; LA64-NEXT: # kill: def $f0_64 killed $f0_64 def $vr0
; LA64-NEXT: vst $vr0, $sp, 16 # 16-byte Folded Spill
; LA64-NEXT: xvld $xr0, $sp, 64 # 32-byte Folded Reload
; LA64-NEXT: xvpickve.d $xr0, $xr0, 0
; LA64-NEXT: # kill: def $f0_64 killed $f0_64 killed $xr0
; LA64-NEXT: pcaddu18i $ra, %call36(log2)
; LA64-NEXT: jirl $ra, $ra, 0
; LA64-NEXT: # kill: def $f0_64 killed $f0_64 def $xr0
; LA64-NEXT: vld $vr1, $sp, 16 # 16-byte Folded Reload
; LA64-NEXT: vextrins.d $vr0, $vr1, 16
; LA64-NEXT: xvld $xr1, $sp, 32 # 32-byte Folded Reload
; LA64-NEXT: xvpermi.q $xr0, $xr1, 2
; LA64-NEXT: xvst $xr0, $fp, 0
; LA64-NEXT: ld.d $fp, $sp, 96 # 8-byte Folded Reload
; LA64-NEXT: ld.d $ra, $sp, 104 # 8-byte Folded Reload
; LA64-NEXT: addi.d $sp, $sp, 112
; LA64-NEXT: ret
; CHECK-LABEL: flog2_v4f64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvflogb.d $xr0, $xr0
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
%v = load <4 x double>, ptr %a
%r = call <4 x double> @llvm.log2.v4f64(<4 x double> %v)
Expand Down
Loading