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[AMDGPU] Enable saving SHARED_BASE to VCC #163244
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[AMDGPU] Enable saving SHARED_BASE to VCC #163244
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This is observed when exhausting scalar registers in kernels with high register usage.
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@llvm/pr-subscribers-backend-amdgpu Author: None (carlobertolli) ChangesThis is observed when exhausting scalar registers in kernels with high register usage. Full diff: https://github.com/llvm/llvm-project/pull/163244.diff 2 Files Affected:
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index ec5c5bb349ac4..86a60e5a6242b 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -899,7 +899,8 @@ void SIInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
}
if (DestReg == AMDGPU::VCC) {
- if (AMDGPU::SReg_64RegClass.contains(SrcReg)) {
+ if (AMDGPU::SReg_64RegClass.contains(SrcReg) ||
+ AMDGPU::SReg_64_EncodableRegClass.contains(SrcReg)) {
BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B64), AMDGPU::VCC)
.addReg(SrcReg, getKillRegState(KillSrc));
} else {
diff --git a/llvm/test/CodeGen/AMDGPU/sgpr-phys-copy.mir b/llvm/test/CodeGen/AMDGPU/sgpr-phys-copy.mir
index 9553fcc1c51c8..f11fe4aa6e00e 100644
--- a/llvm/test/CodeGen/AMDGPU/sgpr-phys-copy.mir
+++ b/llvm/test/CodeGen/AMDGPU/sgpr-phys-copy.mir
@@ -58,6 +58,15 @@ body: |
$sgpr0_sgpr1 = COPY $src_shared_base
...
+---
+name: src_shared_base_to_vcc
+body: |
+ bb.0:
+ ; GFX9-LABEL: name: src_shared_base_to_vcc
+ ; GFX9: $vcc = S_MOV_B64 $src_shared_base
+ $vcc = COPY $src_shared_base
+...
+
---
name: sgpr96_aligned_src_dst
body: |
|
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✅ With the latest revision this PR passed the C/C++ code formatter. |
SReg_64 is part of SReg_64_EncodableRegClass. Co-authored-by: Stanislav Mekhanoshin <rampitec.github@runbox.com>
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LGTM
| bb.0: | ||
| ; GFX9-LABEL: name: src_shared_base_to_vcc | ||
| ; GFX9: $vcc = S_MOV_B64 $src_shared_base | ||
| $vcc = COPY $src_shared_base |
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Also test the inverse case?
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ping. We do not structurally prevent writing to constant registers and it is encodable
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@arsenm I added a test to copy vcc to shared_base but it fails
name: vcc_to_src_shared_base
body: |
bb.0:
; GFX9-LABEL: name: vcc_to_src_shared_base
; GFX9: $src_shared_base = S_MOV_B64 $vcc
$src_shared_base = COPY $vcc
...
I';ll have to fix the copy to enable this, unless I misunderstood you?
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like this?
#164138
This is observed when exhausting scalar registers in kernels with high register usage.