diff --git a/llvm/lib/IR/AutoUpgrade.cpp b/llvm/lib/IR/AutoUpgrade.cpp index f28b98957cae4..d8374b63e88f8 100644 --- a/llvm/lib/IR/AutoUpgrade.cpp +++ b/llvm/lib/IR/AutoUpgrade.cpp @@ -6041,8 +6041,7 @@ std::string llvm::UpgradeDataLayoutString(StringRef DL, StringRef TT) { Triple T(TT); // The only data layout upgrades needed for pre-GCN, SPIR or SPIRV are setting // the address space of globals to 1. This does not apply to SPIRV Logical. - if (((T.isAMDGPU() && !T.isAMDGCN()) || - (T.isSPIR() || (T.isSPIRV() && !T.isSPIRVLogical()))) && + if ((T.isSPIR() || (T.isSPIRV() && !T.isSPIRVLogical())) && !DL.contains("-G") && !DL.starts_with("G")) { return DL.empty() ? std::string("G1") : (DL + "-G1").str(); } @@ -6055,35 +6054,43 @@ std::string llvm::UpgradeDataLayoutString(StringRef DL, StringRef TT) { return DL.str(); } + // AMDGPU data layout upgrades. std::string Res = DL.str(); - // AMDGCN data layout upgrades. - if (T.isAMDGCN()) { + if (T.isAMDGPU()) { // Define address spaces for constants. if (!DL.contains("-G") && !DL.starts_with("G")) Res.append(Res.empty() ? "G1" : "-G1"); - // Add missing non-integral declarations. - // This goes before adding new address spaces to prevent incoherent string - // values. - if (!DL.contains("-ni") && !DL.starts_with("ni")) - Res.append("-ni:7:8:9"); - // Update ni:7 to ni:7:8:9. - if (DL.ends_with("ni:7")) - Res.append(":8:9"); - if (DL.ends_with("ni:7:8")) - Res.append(":9"); - - // Add sizing for address spaces 7 and 8 (fat raw buffers and buffer - // resources) An empty data layout has already been upgraded to G1 by now. - if (!DL.contains("-p7") && !DL.starts_with("p7")) - Res.append("-p7:160:256:256:32"); - if (!DL.contains("-p8") && !DL.starts_with("p8")) - Res.append("-p8:128:128:128:48"); - constexpr StringRef OldP8("-p8:128:128-"); - if (DL.contains(OldP8)) - Res.replace(Res.find(OldP8), OldP8.size(), "-p8:128:128:128:48-"); - if (!DL.contains("-p9") && !DL.starts_with("p9")) - Res.append("-p9:192:256:256:32"); + // AMDGCN data layout upgrades. + if (T.isAMDGCN()) { + + // Add missing non-integral declarations. + // This goes before adding new address spaces to prevent incoherent string + // values. + if (!DL.contains("-ni") && !DL.starts_with("ni")) + Res.append("-ni:7:8:9"); + // Update ni:7 to ni:7:8:9. + if (DL.ends_with("ni:7")) + Res.append(":8:9"); + if (DL.ends_with("ni:7:8")) + Res.append(":9"); + + // Add sizing for address spaces 7 and 8 (fat raw buffers and buffer + // resources) An empty data layout has already been upgraded to G1 by now. + if (!DL.contains("-p7") && !DL.starts_with("p7")) + Res.append("-p7:160:256:256:32"); + if (!DL.contains("-p8") && !DL.starts_with("p8")) + Res.append("-p8:128:128:128:48"); + constexpr StringRef OldP8("-p8:128:128-"); + if (DL.contains(OldP8)) + Res.replace(Res.find(OldP8), OldP8.size(), "-p8:128:128:128:48-"); + if (!DL.contains("-p9") && !DL.starts_with("p9")) + Res.append("-p9:192:256:256:32"); + } + + // Upgrade the ELF mangling mode. + if (!DL.contains("m:e")) + Res = Res.empty() ? "m:e" : "m:e-" + Res; return Res; } diff --git a/llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp b/llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp index 3ab2caf702f6a..57e15a48c0bff 100644 --- a/llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp +++ b/llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp @@ -39,20 +39,21 @@ TEST(DataLayoutUpgradeTest, ValidDataLayoutUpgrade) { "64-i128:128-n32:64-S128-Fn32"); // Check that AMDGPU targets add -G1 if it's not present. - EXPECT_EQ(UpgradeDataLayoutString("e-p:32:32", "r600"), "e-p:32:32-G1"); + EXPECT_EQ(UpgradeDataLayoutString("e-p:32:32", "r600"), "m:e-e-p:32:32-G1"); // and that ANDGCN adds p7 and p8 as well. EXPECT_EQ(UpgradeDataLayoutString("e-p:64:64", "amdgcn"), - "e-p:64:64-G1-ni:7:8:9-p7:160:256:256:32-p8:128:128:128:48-p9:192:" - "256:256:32"); + "m:e-e-p:64:64-G1-ni:7:8:9-p7:160:256:256:32-p8:128:128:128:48-p9:" + "192:256:256:32"); EXPECT_EQ(UpgradeDataLayoutString("e-p:64:64-G1", "amdgcn"), - "e-p:64:64-G1-ni:7:8:9-p7:160:256:256:32-p8:128:128:128:48-p9:192:" - "256:256:32"); + "m:e-e-p:64:64-G1-ni:7:8:9-p7:160:256:256:32-p8:128:128:128:48-p9:" + "192:256:256:32"); // Check that the old AMDGCN p8:128:128 definition is upgraded EXPECT_EQ(UpgradeDataLayoutString("e-p:64:64-p8:128:128-G1", "amdgcn"), - "e-p:64:64-p8:128:128:128:48-G1-ni:7:8:9-p7:160:256:256:32-" - "p9:192:256:256:32"); + "m:e-e-p:64:64-p8:128:128:128:48-G1-ni:7:8:9-p7:160:256:256:32-p9:" + "192:256:256:32"); // but that r600 does not. - EXPECT_EQ(UpgradeDataLayoutString("e-p:32:32-G1", "r600"), "e-p:32:32-G1"); + EXPECT_EQ(UpgradeDataLayoutString("e-p:32:32-G1", "r600"), + "m:e-e-p:32:32-G1"); // Ensure that the non-integral direction for address space 8 doesn't get // added in to pointer declarations. @@ -62,11 +63,10 @@ TEST(DataLayoutUpgradeTest, ValidDataLayoutUpgrade) { "64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-" "v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7", "amdgcn"), - "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-" - "v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:" + "m:e-e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:" + "64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:" "1024-v2048:2048-n32:64-S32-A5-G1-ni:7:8:9-p7:160:256:256:32-p8:128:128:" - "128:48-" - "p9:192:256:256:32"); + "128:48-p9:192:256:256:32"); // Check that RISCV64 upgrades -n64 to -n32:64. EXPECT_EQ(UpgradeDataLayoutString("e-m:e-p:64:64-i64:64-i128:128-n64-S128", @@ -147,28 +147,29 @@ TEST(DataLayoutUpgradeTest, NoDataLayoutUpgrade) { "64-S128-Fn32"); // Check that AMDGPU targets don't add -G1 if there is already a -G flag. - EXPECT_EQ(UpgradeDataLayoutString("e-p:32:32-G2", "r600"), "e-p:32:32-G2"); - EXPECT_EQ(UpgradeDataLayoutString("G2", "r600"), "G2"); + EXPECT_EQ(UpgradeDataLayoutString("e-p:32:32-G2", "r600"), + "m:e-e-p:32:32-G2"); + EXPECT_EQ(UpgradeDataLayoutString("G2", "r600"), "m:e-G2"); EXPECT_EQ(UpgradeDataLayoutString("e-p:64:64-G2", "amdgcn"), - "e-p:64:64-G2-ni:7:8:9-p7:160:256:256:32-p8:128:128:128:48-p9:192:" - "256:256:32"); + "m:e-e-p:64:64-G2-ni:7:8:9-p7:160:256:256:32-p8:128:128:128:48-p9:" + "192:256:256:32"); EXPECT_EQ(UpgradeDataLayoutString("G2-e-p:64:64", "amdgcn"), - "G2-e-p:64:64-ni:7:8:9-p7:160:256:256:32-p8:128:128:128:48-p9:192:" - "256:256:32"); + "m:e-G2-e-p:64:64-ni:7:8:9-p7:160:256:256:32-p8:128:128:128:48-p9:" + "192:256:256:32"); EXPECT_EQ(UpgradeDataLayoutString("e-p:64:64-G0", "amdgcn"), - "e-p:64:64-G0-ni:7:8:9-p7:160:256:256:32-p8:128:128:128:48-p9:192:" - "256:256:32"); + "m:e-e-p:64:64-G0-ni:7:8:9-p7:160:256:256:32-p8:128:128:128:48-p9:" + "192:256:256:32"); // Check that AMDGCN targets don't add already declared address space 7. EXPECT_EQ( UpgradeDataLayoutString("e-p:64:64-p7:64:64", "amdgcn"), - "e-p:64:64-p7:64:64-G1-ni:7:8:9-p8:128:128:128:48-p9:192:256:256:32"); + "m:e-e-p:64:64-p7:64:64-G1-ni:7:8:9-p8:128:128:128:48-p9:192:256:256:32"); EXPECT_EQ( UpgradeDataLayoutString("p7:64:64-G2-e-p:64:64", "amdgcn"), - "p7:64:64-G2-e-p:64:64-ni:7:8:9-p8:128:128:128:48-p9:192:256:256:32"); + "m:e-p7:64:64-G2-e-p:64:64-ni:7:8:9-p8:128:128:128:48-p9:192:256:256:32"); EXPECT_EQ( UpgradeDataLayoutString("e-p:64:64-p7:64:64-G1", "amdgcn"), - "e-p:64:64-p7:64:64-G1-ni:7:8:9-p8:128:128:128:48-p9:192:256:256:32"); + "m:e-e-p:64:64-p7:64:64-G1-ni:7:8:9-p8:128:128:128:48-p9:192:256:256:32"); // Check that SPIR & SPIRV targets don't add -G1 if there is already a -G // flag. @@ -198,10 +199,10 @@ TEST(DataLayoutUpgradeTest, EmptyDataLayout) { EXPECT_EQ(DL2, "e-m:e-p:32:32-i64:64-f80:128-n8:16:32:64-S128"); // Check that AMDGPU targets add G1 if it's not present. - EXPECT_EQ(UpgradeDataLayoutString("", "r600"), "G1"); + EXPECT_EQ(UpgradeDataLayoutString("", "r600"), "m:e-G1"); EXPECT_EQ( UpgradeDataLayoutString("", "amdgcn"), - "G1-ni:7:8:9-p7:160:256:256:32-p8:128:128:128:48-p9:192:256:256:32"); + "m:e-G1-ni:7:8:9-p7:160:256:256:32-p8:128:128:128:48-p9:192:256:256:32"); // Check that SPIR & SPIRV targets add G1 if it's not present. EXPECT_EQ(UpgradeDataLayoutString("", "spir"), "G1");