diff --git a/llvm/lib/CodeGen/TargetInstrInfo.cpp b/llvm/lib/CodeGen/TargetInstrInfo.cpp
index 3c41bbeb4b327..ed28064510e67 100644
--- a/llvm/lib/CodeGen/TargetInstrInfo.cpp
+++ b/llvm/lib/CodeGen/TargetInstrInfo.cpp
@@ -56,6 +56,10 @@ static cl::opt<unsigned int> MaxAccumulatorWidth(
     "acc-max-width", cl::Hidden, cl::init(3),
     cl::desc("Maximum number of branches in the accumulator tree"));
 
+static cl::opt<bool>
+    AllowNTRemat("allow-none-trival-remat", cl::init(true), cl::Hidden,
+                 cl::desc("Allow non-trivial rematerialization by default"));
+
 TargetInstrInfo::~TargetInstrInfo() = default;
 
 const TargetRegisterClass *
@@ -1657,6 +1661,14 @@ bool TargetInstrInfo::isReMaterializableImpl(
     // same virtual register, though.
     if (MO.isDef() && Reg != DefReg)
       return false;
+
+    // Don't allow any virtual-register uses. Rematting an instruction with
+    // virtual register uses would length the live ranges of the uses, which
+    // is not necessarily a good idea, certainly not "trivial".
+    if (!AllowNTRemat) {
+      if (MO.isUse())
+        return false;
+    }
   }
 
   // Everything checked out.