From 176526ee2db0228fc4d08b46f4d5b6d4cfb54520 Mon Sep 17 00:00:00 2001 From: Sergei Barannikov Date: Thu, 6 Nov 2025 14:01:27 +0300 Subject: [PATCH] [GlobalISel] Return byte offsets from computeValueLLTs (NFC) To avoid scaling offsets back and forth. This is also what SelectionDAG equivalent (ComputeValueVTs) does, and will allow to reuse ComputeValueTypes with less effort. --- llvm/lib/CodeGen/Analysis.cpp | 4 +-- llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 28 ++++++++++---------- 2 files changed, 16 insertions(+), 16 deletions(-) diff --git a/llvm/lib/CodeGen/Analysis.cpp b/llvm/lib/CodeGen/Analysis.cpp index 2ef96cc4400f7..f5fbfb7e5e21d 100644 --- a/llvm/lib/CodeGen/Analysis.cpp +++ b/llvm/lib/CodeGen/Analysis.cpp @@ -177,8 +177,8 @@ void llvm::computeValueLLTs(const DataLayout &DL, Type &Ty, return; // Base case: we can get an LLT for this LLVM IR type. ValueTys.push_back(getLLTForType(Ty, DL)); - if (Offsets != nullptr) - Offsets->push_back(StartingOffset * 8); + if (Offsets) + Offsets->push_back(StartingOffset); } /// ExtractTypeInfo - Returns the type info, possibly bitcast, encoded in V. diff --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp index be1b51f546819..b425aaa481246 100644 --- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp +++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp @@ -1412,14 +1412,14 @@ bool IRTranslator::translateLoad(const User &U, MachineIRBuilder &MIRBuilder) { Regs.size() == 1 ? LI.getMetadata(LLVMContext::MD_range) : nullptr; for (unsigned i = 0; i < Regs.size(); ++i) { Register Addr; - MIRBuilder.materializeObjectPtrOffset(Addr, Base, OffsetTy, Offsets[i] / 8); + MIRBuilder.materializeObjectPtrOffset(Addr, Base, OffsetTy, Offsets[i]); - MachinePointerInfo Ptr(LI.getPointerOperand(), Offsets[i] / 8); + MachinePointerInfo Ptr(LI.getPointerOperand(), Offsets[i]); Align BaseAlign = getMemOpAlign(LI); - auto MMO = MF->getMachineMemOperand( - Ptr, Flags, MRI->getType(Regs[i]), - commonAlignment(BaseAlign, Offsets[i] / 8), AAInfo, Ranges, - LI.getSyncScopeID(), LI.getOrdering()); + auto MMO = + MF->getMachineMemOperand(Ptr, Flags, MRI->getType(Regs[i]), + commonAlignment(BaseAlign, Offsets[i]), AAInfo, + Ranges, LI.getSyncScopeID(), LI.getOrdering()); MIRBuilder.buildLoad(Regs[i], Addr, *MMO); } @@ -1451,14 +1451,14 @@ bool IRTranslator::translateStore(const User &U, MachineIRBuilder &MIRBuilder) { for (unsigned i = 0; i < Vals.size(); ++i) { Register Addr; - MIRBuilder.materializeObjectPtrOffset(Addr, Base, OffsetTy, Offsets[i] / 8); + MIRBuilder.materializeObjectPtrOffset(Addr, Base, OffsetTy, Offsets[i]); - MachinePointerInfo Ptr(SI.getPointerOperand(), Offsets[i] / 8); + MachinePointerInfo Ptr(SI.getPointerOperand(), Offsets[i]); Align BaseAlign = getMemOpAlign(SI); - auto MMO = MF->getMachineMemOperand( - Ptr, Flags, MRI->getType(Vals[i]), - commonAlignment(BaseAlign, Offsets[i] / 8), SI.getAAMetadata(), nullptr, - SI.getSyncScopeID(), SI.getOrdering()); + auto MMO = MF->getMachineMemOperand(Ptr, Flags, MRI->getType(Vals[i]), + commonAlignment(BaseAlign, Offsets[i]), + SI.getAAMetadata(), nullptr, + SI.getSyncScopeID(), SI.getOrdering()); MIRBuilder.buildStore(Vals[i], Addr, *MMO); } return true; @@ -1483,8 +1483,8 @@ static uint64_t getOffsetFromIndices(const User &U, const DataLayout &DL) { llvm::append_range(Indices, drop_begin(U.operands())); } - return 8 * static_cast( - DL.getIndexedOffsetInType(Src->getType(), Indices)); + return static_cast( + DL.getIndexedOffsetInType(Src->getType(), Indices)); } bool IRTranslator::translateExtractValue(const User &U,