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@diggerlin diggerlin commented Nov 10, 2025

conversion of bl memmove call to milicode bl .___memmove64[PR] in 64--bit mode is broken , the patch fix the problem.

in the llvm/include/llvm/IR/RuntimeLibcalls.td, we do not need to define the

def ___memmove64 : RuntimeLibcallImpl<MEMCPY> in PPC64AIXCallList
def ___memmove32 : RuntimeLibcallImpl<MEMCPY> in PPC32AIXCallList

since there is function

   /// Return a function impl compatible with RTLIB::MEMCPY, or
  /// RTLIB::Unsupported if fully unsupported.
  RTLIB::LibcallImpl getMemcpyImpl() const {
    RTLIB::LibcallImpl Memcpy = getLibcallImpl(RTLIB::MEMCPY);
    if (Memcpy == RTLIB::Unsupported) {
      // Fallback to memmove if memcpy isn't available.
      return getLibcallImpl(RTLIB::MEMMOVE);
    }

    return Memcpy;
  }

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llvmbot commented Nov 10, 2025

@llvm/pr-subscribers-llvm-ir

@llvm/pr-subscribers-backend-powerpc

Author: zhijian lin (diggerlin)

Changes

TableGen: Allow defining sets of runtime libraries break the conversion of bl memmove call to milicode bl .___memmove64[PR] in 64--bit mode, the patch fix the problem.

we do not need to define the


Full diff: https://github.com/llvm/llvm-project/pull/167334.diff

2 Files Affected:

  • (modified) llvm/include/llvm/IR/RuntimeLibcalls.td (+1-1)
  • (modified) llvm/test/CodeGen/PowerPC/milicode64.ll (+1-1)
diff --git a/llvm/include/llvm/IR/RuntimeLibcalls.td b/llvm/include/llvm/IR/RuntimeLibcalls.td
index 24c1b035d0dda..e3da058a3ce20 100644
--- a/llvm/include/llvm/IR/RuntimeLibcalls.td
+++ b/llvm/include/llvm/IR/RuntimeLibcalls.td
@@ -2333,7 +2333,7 @@ defset list<RuntimeLibcallImpl> PPCRuntimeLibcalls = {
 
 defset list<RuntimeLibcallImpl> PPC64AIXCallList = {
   def ___memcmp64 : RuntimeLibcallImpl<MEMCMP>;
-  def ___memmove64 : RuntimeLibcallImpl<MEMCPY>;
+  def ___memmove64 : RuntimeLibcallImpl<MEMMOVE>;
   def ___memset64 : RuntimeLibcallImpl<MEMSET>;
   def ___bzero64 : RuntimeLibcallImpl<BZERO>;
   def ___strlen64 : RuntimeLibcallImpl<STRLEN>;
diff --git a/llvm/test/CodeGen/PowerPC/milicode64.ll b/llvm/test/CodeGen/PowerPC/milicode64.ll
index f7814a424e0b9..2dbf4140a0fa4 100644
--- a/llvm/test/CodeGen/PowerPC/milicode64.ll
+++ b/llvm/test/CodeGen/PowerPC/milicode64.ll
@@ -156,7 +156,7 @@ define ptr @test_memmove(ptr noundef %destination, ptr noundef %source, i64 noun
 ; CHECK-AIX-64-P9-NEXT:    std r3, 128(r1)
 ; CHECK-AIX-64-P9-NEXT:    std r4, 120(r1)
 ; CHECK-AIX-64-P9-NEXT:    std r5, 112(r1)
-; CHECK-AIX-64-P9-NEXT:    bl .memmove[PR]
+; CHECK-AIX-64-P9-NEXT:    bl .___memmove64[PR]
 ; CHECK-AIX-64-P9-NEXT:    nop
 ; CHECK-AIX-64-P9-NEXT:    mr r3, r31
 ; CHECK-AIX-64-P9-NEXT:    ld r31, 136(r1) # 8-byte Folded Reload

@diggerlin diggerlin changed the title [PowerPC] convert memmove to milicode call in 64-bit mode [PowerPC] convert memmove to milicode call .___memmove64[PR] in 64-bit mode Nov 10, 2025
@arsenm arsenm merged commit ccedf25 into llvm:main Nov 10, 2025
13 checks passed
ckoparkar added a commit to ckoparkar/llvm-project that referenced this pull request Nov 10, 2025
* main: (63 commits)
  [libc++] Inline vector::__append into resize (llvm#162086)
  [Flang][OpenMP] Move char box bounds generation for Maps to DirectiveCommons.h (llvm#165918)
  RuntimeLibcalls: Add entries for vector sincospi functions (llvm#166981)
  [X86] _mm_addsub_pd is not valid for constexpr (llvm#167363)
  [CIR] Re-land: Recognize constant aggregate initialization of auto vars (llvm#167033)
  [gn build] Port d2521f1
  [gn build] Port caed089
  [gn build] Port 315d705
  [gn build] Port 2345b7d
  [PowerPC] convert memmove to milicode call  .___memmove64[PR]  in 64-bit mode (llvm#167334)
  [HLSL] Add internal linkage attribute to resources (llvm#166844)
  AMDGPU: Update test after e95f6fa
  [bazel] Port llvm#166980: TLI/VectorLibrary refactor (llvm#167354)
  [libc++] Split macros related to hardening into their own header (llvm#167069)
  [libc++][NFC] Remove unused imports from generate_feature_test_macro_components.py (llvm#159591)
  [CIR][NFC] Add test for Complex imag with GUN extension (llvm#167215)
  [BOLT][AArch64] Add more heuristics on epilogue determination (llvm#167077)
  RegisterCoalescer: Enable terminal rule by default for AMDGPU (llvm#161621)
  Revert "[clang] Refactor option-related code from clangDriver into new clangOptions library" (llvm#167348)
  [libc++][docs] Update to refer to P3355R2 (llvm#167267)
  ...
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