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[AMDGPU][GISel] Add RegBankLegalize support for G_AMDGPU_WAVE_ADDRESS #167456

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Merged
merged 2 commits into from
Nov 12, 2025
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Merged

[AMDGPU][GISel] Add RegBankLegalize support for G_AMDGPU_WAVE_ADDRESS #167456

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[AMDGPU][GISel] Add RegBankLegalize support for G_AMDGPU_WAVE_ADDRESS
chinmaydd Nov 11, 2025
432c446
Merge branch 'main' into chinmaydd/gisel-wave-addr
chinmaydd Nov 11, 2025
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2 changes: 2 additions & 0 deletions llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -931,6 +931,8 @@ RegBankLegalizeRules::RegBankLegalizeRules(const GCNSubtarget &_ST,
.Any({{UniP4}, {{SgprP4}, {}}})
.Any({{UniP8}, {{SgprP8}, {}}});

addRulesForGOpcs({G_AMDGPU_WAVE_ADDRESS}).Any({{UniP5}, {{SgprP5}, {}}});

bool hasSALUFloat = ST->hasSALUFloatInsts();

addRulesForGOpcs({G_FADD}, Standard)
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7 changes: 3 additions & 4 deletions llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgpu-wave-address.mir
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@@ -1,6 +1,6 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=regbankselect -regbankselect-greedy -o - %s | FileCheck %s
# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=regbankselect -regbankselect-fast -o - %s | FileCheck %s
# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass="amdgpu-regbankselect,amdgpu-regbanklegalize" -regbankselect-greedy -o - %s | FileCheck %s
# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass="amdgpu-regbankselect,amdgpu-regbanklegalize" -regbankselect-fast -o - %s | FileCheck %s

# TODO: We could use scalar
---
Expand All @@ -25,8 +25,7 @@ body: |
; CHECK: [[DEF:%[0-9]+]]:sgpr(p1) = G_IMPLICIT_DEF
; CHECK-NEXT: [[AMDGPU_WAVE_ADDRESS:%[0-9]+]]:sgpr(p5) = G_AMDGPU_WAVE_ADDRESS $sgpr32
; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(p5) = COPY [[AMDGPU_WAVE_ADDRESS]](p5)
; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(p1) = COPY [[DEF]](p1)
; CHECK-NEXT: G_STORE [[COPY]](p5), [[COPY1]](p1) :: (store (p5), addrspace 1)
; CHECK-NEXT: G_STORE [[COPY]](p5), [[DEF]](p1) :: (store (p5), addrspace 1)
%0:_(p1) = G_IMPLICIT_DEF
%1:_(p5) = G_AMDGPU_WAVE_ADDRESS $sgpr32
G_STORE %1, %0 :: (store (p5), addrspace 1)
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