From 7aa4c56a5ab5e2d7474aec502c02a1bba6857dcc Mon Sep 17 00:00:00 2001 From: Jonathan Thackray Date: Wed, 12 Nov 2025 20:57:08 +0000 Subject: [PATCH 1/2] [AArch64][llvm] Improve writeback reg handling for FEAT_MOPS As mentioned in comments for #164913, the `if()` statements here can't be externally triggered, since these writeback registers are passed in from the caller. So they should really be `assert()`s so it's obvious we don't need testcases for them, and more optimal. --- .../AArch64/AsmParser/AArch64AsmParser.cpp | 44 +++++++------------ 1 file changed, 16 insertions(+), 28 deletions(-) diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp index 7293b7fdb0d20..4e8f4b331bf72 100644 --- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp +++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp @@ -5923,21 +5923,15 @@ bool AArch64AsmParser::validateInstruction(MCInst &Inst, SMLoc &IDLoc, case AArch64::CPYETWN: case AArch64::CPYETRN: case AArch64::CPYETN: { - MCRegister Xd_wb = Inst.getOperand(0).getReg(); - MCRegister Xs_wb = Inst.getOperand(1).getReg(); - MCRegister Xn_wb = Inst.getOperand(2).getReg(); + // Xd_wb == op0, Xs_wb == op1, Xn_wb == op2 MCRegister Xd = Inst.getOperand(3).getReg(); MCRegister Xs = Inst.getOperand(4).getReg(); MCRegister Xn = Inst.getOperand(5).getReg(); - if (Xd_wb != Xd) - return Error(Loc[0], - "invalid CPY instruction, Xd_wb and Xd do not match"); - if (Xs_wb != Xs) - return Error(Loc[0], - "invalid CPY instruction, Xs_wb and Xs do not match"); - if (Xn_wb != Xn) - return Error(Loc[0], - "invalid CPY instruction, Xn_wb and Xn do not match"); + + assert(Xd == Inst.getOperand(0).getReg() && "Xd_wb and Xd do not match"); + assert(Xs == Inst.getOperand(1).getReg() && "Xn_wb and Xn do not match"); + assert(Xn == Inst.getOperand(2).getReg() && "Xn_wb and Xn do not match"); + if (Xd == Xs) return Error(Loc[0], "invalid CPY instruction, destination and source" " registers are the same"); @@ -5973,17 +5967,14 @@ bool AArch64AsmParser::validateInstruction(MCInst &Inst, SMLoc &IDLoc, case AArch64::MOPSSETGET: case AArch64::MOPSSETGEN: case AArch64::MOPSSETGETN: { - MCRegister Xd_wb = Inst.getOperand(0).getReg(); - MCRegister Xn_wb = Inst.getOperand(1).getReg(); + // Xd_wb == op0, Xn_wb == op1 MCRegister Xd = Inst.getOperand(2).getReg(); MCRegister Xn = Inst.getOperand(3).getReg(); MCRegister Xm = Inst.getOperand(4).getReg(); - if (Xd_wb != Xd) - return Error(Loc[0], - "invalid SET instruction, Xd_wb and Xd do not match"); - if (Xn_wb != Xn) - return Error(Loc[0], - "invalid SET instruction, Xn_wb and Xn do not match"); + + assert(Xd == Inst.getOperand(0).getReg() && "Xd_wb and Xd do not match"); + assert(Xn == Inst.getOperand(1).getReg() && "Xn_wb and Xn do not match"); + if (Xd == Xn) return Error(Loc[0], "invalid SET instruction, destination and size" " registers are the same"); @@ -6007,16 +5998,13 @@ bool AArch64AsmParser::validateInstruction(MCInst &Inst, SMLoc &IDLoc, case AArch64::SETGOET: case AArch64::SETGOEN: case AArch64::SETGOETN: { - MCRegister Xd_wb = Inst.getOperand(0).getReg(); - MCRegister Xn_wb = Inst.getOperand(1).getReg(); + // Xd_wb == op0, Xn_wb == op1 MCRegister Xd = Inst.getOperand(2).getReg(); MCRegister Xn = Inst.getOperand(3).getReg(); - if (Xd_wb != Xd) - return Error(Loc[0], - "invalid SET instruction, Xd_wb and Xd do not match"); - if (Xn_wb != Xn) - return Error(Loc[0], - "invalid SET instruction, Xn_wb and Xn do not match"); + + assert(Xd == Inst.getOperand(0).getReg() && "Xd_wb and Xd do not match"); + assert(Xn == Inst.getOperand(1).getReg() && "Xn_wb and Xn do not match"); + if (Xd == Xn) return Error(Loc[0], "invalid SET instruction, destination and size" " registers are the same"); From ed1fdbcafe3c7fd2b67ab737e9d9bfe067c27e8d Mon Sep 17 00:00:00 2001 From: Jonathan Thackray Date: Thu, 13 Nov 2025 11:41:50 +0000 Subject: [PATCH 2/2] fixup! [AArch64][llvm] Improve writeback reg handling for FEAT_MOPS Fix silly typos --- llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp index 4e8f4b331bf72..2730833ba06d9 100644 --- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp +++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp @@ -5929,7 +5929,7 @@ bool AArch64AsmParser::validateInstruction(MCInst &Inst, SMLoc &IDLoc, MCRegister Xn = Inst.getOperand(5).getReg(); assert(Xd == Inst.getOperand(0).getReg() && "Xd_wb and Xd do not match"); - assert(Xs == Inst.getOperand(1).getReg() && "Xn_wb and Xn do not match"); + assert(Xs == Inst.getOperand(1).getReg() && "Xs_wb and Xs do not match"); assert(Xn == Inst.getOperand(2).getReg() && "Xn_wb and Xn do not match"); if (Xd == Xs)