diff --git a/llvm/include/llvm/MC/MCRegisterInfo.h b/llvm/include/llvm/MC/MCRegisterInfo.h index f1caa077a6d7b..6d4c2d12e2e51 100644 --- a/llvm/include/llvm/MC/MCRegisterInfo.h +++ b/llvm/include/llvm/MC/MCRegisterInfo.h @@ -438,7 +438,7 @@ class LLVM_ABI MCRegisterInfo { /// number. Returns -1 if there is no equivalent value. The second /// parameter allows targets to use different numberings for EH info and /// debugging info. - virtual int64_t getDwarfRegNum(MCRegister RegNum, bool isEH) const; + virtual int64_t getDwarfRegNum(MCRegister Reg, bool isEH) const; /// Map a dwarf register back to a target register. Returns std::nullopt if /// there is no mapping. @@ -450,11 +450,11 @@ class LLVM_ABI MCRegisterInfo { /// Map a target register to an equivalent SEH register /// number. Returns LLVM register number if there is no equivalent value. - int getSEHRegNum(MCRegister RegNum) const; + int getSEHRegNum(MCRegister Reg) const; /// Map a target register to an equivalent CodeView register /// number. - int getCodeViewRegNum(MCRegister RegNum) const; + int getCodeViewRegNum(MCRegister Reg) const; regclass_iterator regclass_begin() const { return Classes; } regclass_iterator regclass_end() const { return Classes+NumClasses; } diff --git a/llvm/lib/MC/MCInst.cpp b/llvm/lib/MC/MCInst.cpp index 46a6a18e15963..61eeb5e5a5c71 100644 --- a/llvm/lib/MC/MCInst.cpp +++ b/llvm/lib/MC/MCInst.cpp @@ -29,7 +29,7 @@ void MCOperand::print(raw_ostream &OS, const MCContext *Ctx) const { if (Ctx && Ctx->getRegisterInfo()) OS << Ctx->getRegisterInfo()->getName(getReg()); else - OS << getReg(); + OS << getReg().id(); } else if (isImm()) OS << "Imm:" << getImm(); else if (isSFPImm()) diff --git a/llvm/lib/MC/MCRegisterInfo.cpp b/llvm/lib/MC/MCRegisterInfo.cpp index 7fd92bf974b95..77fb7332619cd 100644 --- a/llvm/lib/MC/MCRegisterInfo.cpp +++ b/llvm/lib/MC/MCRegisterInfo.cpp @@ -89,7 +89,7 @@ ArrayRef MCRegisterInfo::getCachedAliasesOf(MCRegister R) const { return Aliases; for (MCRegAliasIteratorImpl It(R, this); It.isValid(); ++It) - Aliases.push_back(*It); + Aliases.push_back((*It).id()); sort(Aliases); Aliases.erase(unique(Aliases), Aliases.end()); @@ -141,15 +141,15 @@ unsigned MCRegisterInfo::getSubRegIndex(MCRegister Reg, return 0; } -int64_t MCRegisterInfo::getDwarfRegNum(MCRegister RegNum, bool isEH) const { +int64_t MCRegisterInfo::getDwarfRegNum(MCRegister Reg, bool isEH) const { const DwarfLLVMRegPair *M = isEH ? EHL2DwarfRegs : L2DwarfRegs; unsigned Size = isEH ? EHL2DwarfRegsSize : L2DwarfRegsSize; if (!M) return -1; - DwarfLLVMRegPair Key = { RegNum, 0 }; + DwarfLLVMRegPair Key = {Reg.id(), 0}; const DwarfLLVMRegPair *I = std::lower_bound(M, M+Size, Key); - if (I == M+Size || I->FromReg != RegNum) + if (I == M + Size || I->FromReg != Reg) return -1; // Consumers need to be able to detect -1 and -2, but at various points // the numbers move between unsigned and signed representations, as well as @@ -191,20 +191,21 @@ int64_t MCRegisterInfo::getDwarfRegNumFromDwarfEHRegNum(uint64_t RegNum) const { return RegNum; } -int MCRegisterInfo::getSEHRegNum(MCRegister RegNum) const { - const DenseMap::const_iterator I = L2SEHRegs.find(RegNum); - if (I == L2SEHRegs.end()) return (int)RegNum; +int MCRegisterInfo::getSEHRegNum(MCRegister Reg) const { + const DenseMap::const_iterator I = L2SEHRegs.find(Reg); + if (I == L2SEHRegs.end()) + return (int)Reg.id(); return I->second; } -int MCRegisterInfo::getCodeViewRegNum(MCRegister RegNum) const { +int MCRegisterInfo::getCodeViewRegNum(MCRegister Reg) const { if (L2CVRegs.empty()) report_fatal_error("target does not implement codeview register mapping"); - const DenseMap::const_iterator I = L2CVRegs.find(RegNum); + const DenseMap::const_iterator I = L2CVRegs.find(Reg); if (I == L2CVRegs.end()) - report_fatal_error("unknown codeview register " + (RegNum < getNumRegs() - ? getName(RegNum) - : Twine(RegNum))); + report_fatal_error("unknown codeview register " + (Reg.id() < getNumRegs() + ? getName(Reg) + : Twine(Reg.id()))); return I->second; }