diff --git a/llvm/lib/Target/M68k/M68kInstrData.td b/llvm/lib/Target/M68k/M68kInstrData.td
index c5b7ae332822f..9bb2c5aa2c971 100644
--- a/llvm/lib/Target/M68k/M68kInstrData.td
+++ b/llvm/lib/Target/M68k/M68kInstrData.td
@@ -372,7 +372,6 @@ def MOVM32mp_P : MxMOVEM_RM_Pseudo<MxType32r, MxType32.POp>;
 ///                               | EFFECTIVE ADDRESS
 ///  0  1  0  0  0  1  0  0  1  1 |   MODE  |   REG
 /// --------------------------------------------------
-let Defs = [CCR] in {
 class MxMoveToCCR<MxOperand MEMOp, MxEncMemOp SRC_ENC>
     : MxInst<(outs CCRC:$dst), (ins MEMOp:$src), "move.w\t$src, $dst", []> {
   let Inst = (ascend
@@ -383,7 +382,6 @@ class MxMoveToCCR<MxOperand MEMOp, MxEncMemOp SRC_ENC>
 
 class MxMoveToCCRPseudo<MxOperand MEMOp>
     : MxPseudo<(outs CCRC:$dst), (ins MEMOp:$src)>;
-} // let Defs = [CCR]
 
 let mayLoad = 1 in
 foreach AM = MxMoveSupportedAMs in {
@@ -403,7 +401,6 @@ def MOV8cd  : MxMoveToCCRPseudo<MxOp8AddrMode_d.Op>;
 ///                               | EFFECTIVE ADDRESS
 ///  0  1  0  0  0  0  1  0  1  1 |   MODE  |   REG
 /// --------------------------------------------------
-let Uses = [CCR] in {
 class MxMoveFromCCR_R
     : MxInst<(outs MxDRD16:$dst), (ins CCRC:$src), "move.w\t$src, $dst", []>,
       Requires<[ AtLeastM68010 ]> {
@@ -423,7 +420,6 @@ class MxMoveFromCCRPseudo<MxOperand MEMOp>
     : MxPseudo<(outs), (ins MEMOp:$dst, CCRC:$src)>;
 class MxMoveFromCCR_RPseudo<MxOperand MEMOp>
     : MxPseudo<(outs MEMOp:$dst), (ins CCRC:$src)>;
-} // let Uses = [CCR]
 
 let mayStore = 1 in
 foreach AM = MxMoveSupportedAMs in {
@@ -445,7 +441,6 @@ def MOV8dc  : MxMoveFromCCR_RPseudo<MxOp8AddrMode_d.Op>;
 ///                               | EFFECTIVE ADDRESS
 ///  0  1  0  0  0  1  1  0  1  1 |   MODE  |   REG
 /// --------------------------------------------------
-let Defs = [SR] in {
 class MxMoveToSR<MxOperand MEMOp, MxEncMemOp SRC_ENC>
     : MxInst<(outs SRC:$dst), (ins MEMOp:$src), "move.w\t$src, $dst", []> {
   let Inst = (ascend
@@ -453,7 +448,6 @@ class MxMoveToSR<MxOperand MEMOp, MxEncMemOp SRC_ENC>
     SRC_ENC.Supplement
   );
 }
-} // let Defs = [SR]
 
 let mayLoad = 1 in
 foreach AM = MxMoveSupportedAMs in {
@@ -470,22 +464,20 @@ def MOV16sd : MxMoveToSR<MxOp16AddrMode_d.Op, MxMoveSrcOpEnc_d>;
 ///                               | EFFECTIVE ADDRESS
 ///  0  1  0  0  0  0  0  0  1  1 |   MODE  |   REG
 /// --------------------------------------------------
-let Uses = [SR] in {
 class MxMoveFromSR_R
     : MxInst<(outs MxDRD16:$dst), (ins SRC:$src), "move.w\t$src, $dst", []>,
-      Requires<[ AtLeastM68010 ]> {
+      Requires<[ IsM68000 ]> {
   let Inst = (descend 0b0100000011, MxEncAddrMode_d<"dst">.EA);
 }
 
 class MxMoveFromSR_M<MxOperand MEMOp, MxEncMemOp DST_ENC>
     : MxInst<(outs), (ins MEMOp:$dst, SRC:$src), "move.w\t$src, $dst", []>,
-      Requires<[ AtLeastM68010 ]> {
+      Requires<[ IsM68000 ]> {
   let Inst = (ascend
     (descend 0b0100000011, DST_ENC.EA),
     DST_ENC.Supplement
   );
 }
-} // let Uses = [SR]
 
 let mayStore = 1 in
 foreach AM = MxMoveSupportedAMs in {
diff --git a/llvm/lib/Target/M68k/M68kInstrInfo.cpp b/llvm/lib/Target/M68k/M68kInstrInfo.cpp
index 91077ff5961a4..c33c5f4f3428b 100644
--- a/llvm/lib/Target/M68k/M68kInstrInfo.cpp
+++ b/llvm/lib/Target/M68k/M68kInstrInfo.cpp
@@ -583,9 +583,13 @@ bool M68kInstrInfo::ExpandCCR(MachineInstrBuilder &MIB, bool IsToCCR) const {
   // Replace the pseudo instruction with the real one
   if (IsToCCR)
     MIB->setDesc(get(M68k::MOV16cd));
-  else
-    // FIXME M68010 or later is required
+  else if (MIB->getParent()
+               ->getParent()
+               ->getSubtarget<M68kSubtarget>()
+               .atLeastM68010())
     MIB->setDesc(get(M68k::MOV16dc));
+  else
+    MIB->setDesc(get(M68k::MOV16ds));
 
   return true;
 }
@@ -709,6 +713,8 @@ void M68kInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
                                 Register SrcReg, bool KillSrc,
                                 bool RenamableDest, bool RenamableSrc) const {
   unsigned Opc = 0;
+  MachineFunction &MF = *MBB.getParent();
+  const M68kSubtarget &STI = MF.getSubtarget<M68kSubtarget>();
 
   // First deal with the normal symmetric copies.
   if (M68k::XR32RegClass.contains(DstReg, SrcReg))
@@ -718,20 +724,13 @@ void M68kInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
   else if (M68k::DR8RegClass.contains(DstReg, SrcReg))
     Opc = M68k::MOV8dd;
 
-  if (Opc) {
-    BuildMI(MBB, MI, DL, get(Opc), DstReg)
-        .addReg(SrcReg, getKillRegState(KillSrc));
-    return;
-  }
-
   // Now deal with asymmetrically sized copies. The cases that follow are upcast
   // moves.
   //
   // NOTE
   // These moves are not aware of type nature of these values and thus
   // won't do any SExt or ZExt and upper bits will basically contain garbage.
-  MachineInstrBuilder MIB(*MBB.getParent(), MI);
-  if (M68k::DR8RegClass.contains(SrcReg)) {
+  else if (M68k::DR8RegClass.contains(SrcReg)) {
     if (M68k::XR16RegClass.contains(DstReg))
       Opc = M68k::MOVXd16d8;
     else if (M68k::XR32RegClass.contains(DstReg))
@@ -740,29 +739,18 @@ void M68kInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
              M68k::XR32RegClass.contains(DstReg))
     Opc = M68k::MOVXd32d16;
 
-  if (Opc) {
-    BuildMI(MBB, MI, DL, get(Opc), DstReg)
-        .addReg(SrcReg, getKillRegState(KillSrc));
-    return;
-  }
-
-  bool FromCCR = SrcReg == M68k::CCR;
-  bool FromSR = SrcReg == M68k::SR;
-  bool ToCCR = DstReg == M68k::CCR;
-  bool ToSR = DstReg == M68k::SR;
-
-  if (FromCCR) {
+  else if (SrcReg == M68k::CCR) {
     if (M68k::DR8RegClass.contains(DstReg)) {
       Opc = M68k::MOV8dc;
     } else if (M68k::DR16RegClass.contains(DstReg)) {
-      Opc = M68k::MOV16dc;
+      Opc = STI.isM68000() ? M68k::MOV16ds : M68k::MOV16dc;
     } else if (M68k::DR32RegClass.contains(DstReg)) {
-      Opc = M68k::MOV16dc;
+      Opc = STI.isM68000() ? M68k::MOV16ds : M68k::MOV16dc;
     } else {
       LLVM_DEBUG(dbgs() << "Cannot copy CCR to " << RI.getName(DstReg) << '\n');
       llvm_unreachable("Invalid register for MOVE from CCR");
     }
-  } else if (ToCCR) {
+  } else if (DstReg == M68k::CCR) {
     if (M68k::DR8RegClass.contains(SrcReg)) {
       Opc = M68k::MOV8cd;
     } else if (M68k::DR16RegClass.contains(SrcReg)) {
@@ -773,18 +761,71 @@ void M68kInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
       LLVM_DEBUG(dbgs() << "Cannot copy " << RI.getName(SrcReg) << " to CCR\n");
       llvm_unreachable("Invalid register for MOVE to CCR");
     }
-  } else if (FromSR || ToSR)
+  } else if (SrcReg == M68k::SR || DstReg == M68k::SR)
     llvm_unreachable("Cannot emit SR copy instruction");
 
-  if (Opc) {
+  if (!Opc) {
+    LLVM_DEBUG(dbgs() << "Cannot copy " << RI.getName(SrcReg) << " to "
+                      << RI.getName(DstReg) << '\n');
+    llvm_unreachable("Cannot emit physreg copy instruction");
+  }
+
+  unsigned CCRSrcReg = STI.isM68000() ? M68k::SR : M68k::CCR;
+
+  // Get the live registers right before the COPY instruction. If CCR is
+  // live, the MOVE is going to kill it, so we will need to preserve it.
+  LiveRegUnits UsedRegs(RI);
+  UsedRegs.addLiveOuts(MBB);
+  auto InstUpToI = MBB.end();
+  while (InstUpToI != MI) {
+    UsedRegs.stepBackward(*--InstUpToI);
+  }
+
+  if (SrcReg == M68k::CCR) {
+    BuildMI(MBB, MI, DL, get(Opc), DstReg).addReg(CCRSrcReg);
+    return;
+  }
+  if (DstReg == M68k::CCR) {
+    BuildMI(MBB, MI, DL, get(Opc), M68k::CCR)
+        .addReg(SrcReg, getKillRegState(KillSrc));
+    return;
+  }
+  if (UsedRegs.available(M68k::CCR)) {
     BuildMI(MBB, MI, DL, get(Opc), DstReg)
         .addReg(SrcReg, getKillRegState(KillSrc));
     return;
   }
 
-  LLVM_DEBUG(dbgs() << "Cannot copy " << RI.getName(SrcReg) << " to "
-                    << RI.getName(DstReg) << '\n');
-  llvm_unreachable("Cannot emit physreg copy instruction");
+  // CCR is live, so we must restore it after the copy. Prepare push/pop ops.
+  // 68000 must use MOVE from SR, 68010+ must use MOVE from CCR. In either
+  // case, MOVE to CCR masks out the upper byte.
+
+  // Look for an available data register for the CCR, or push to stack if
+  // there are none
+  BitVector Allocatable =
+      RI.getAllocatableSet(MF, RI.getRegClass(M68k::DR16RegClassID));
+  for (Register Reg : Allocatable.set_bits()) {
+    if (!RI.regsOverlap(DstReg, Reg) && (UsedRegs.available(Reg))) {
+      unsigned CCRPushOp = STI.isM68000() ? M68k::MOV16ds : M68k::MOV16dc;
+      unsigned CCRPopOp = M68k::MOV16cd;
+      BuildMI(MBB, MI, DL, get(CCRPushOp), Reg).addReg(CCRSrcReg);
+      BuildMI(MBB, MI, DL, get(Opc), DstReg)
+          .addReg(SrcReg, getKillRegState(KillSrc));
+      BuildMI(MBB, MI, DL, get(CCRPopOp), M68k::CCR).addReg(Reg);
+      return;
+    }
+  }
+
+  unsigned CCRPushOp = STI.isM68000() ? M68k::MOV16es : M68k::MOV16ec;
+  unsigned CCRPopOp = M68k::MOV16co;
+
+  BuildMI(MBB, MI, DL, get(CCRPushOp))
+      .addReg(RI.getStackRegister())
+      .addReg(CCRSrcReg);
+  BuildMI(MBB, MI, DL, get(Opc), DstReg)
+      .addReg(SrcReg, getKillRegState(KillSrc));
+  BuildMI(MBB, MI, DL, get(CCRPopOp), M68k::CCR).addReg(RI.getStackRegister());
+  return;
 }
 
 namespace {
diff --git a/llvm/lib/Target/M68k/M68kInstrInfo.td b/llvm/lib/Target/M68k/M68kInstrInfo.td
index 1200c493f9fca..3aa4826ff4e47 100644
--- a/llvm/lib/Target/M68k/M68kInstrInfo.td
+++ b/llvm/lib/Target/M68k/M68kInstrInfo.td
@@ -465,6 +465,9 @@ def IsPIC        : Predicate<"TM.isPositionIndependent()">;
 def IsNotPIC     : Predicate<"!TM.isPositionIndependent()">;
 
 // ISA versions
+def IsM68000 : Predicate<"Subtarget->isM68000()">,
+                            AssemblerPredicate<(all_of FeatureISA00)>;
+
 foreach i = [0,1,2,4,6] in
 def AtLeastM680 # i # "0" : Predicate<"Subtarget->atLeastM680"#i#"0()">,
                             AssemblerPredicate<(all_of
diff --git a/llvm/lib/Target/M68k/M68kRegisterInfo.td b/llvm/lib/Target/M68k/M68kRegisterInfo.td
index 4942636ffd529..25492c6fc9406 100644
--- a/llvm/lib/Target/M68k/M68kRegisterInfo.td
+++ b/llvm/lib/Target/M68k/M68kRegisterInfo.td
@@ -87,7 +87,7 @@ class MxPseudoReg<string N, list<Register> SUBREGS = [], list<SubRegIndex> SUBID
     : MxReg<N, 0, SUBREGS, SUBIDX>;
 
 def CCR : MxPseudoReg<"ccr">;
-def SR  : MxPseudoReg<"sr">;
+def SR  : MxPseudoReg<"sr", [CCR], [MxSubRegIndex8Lo]>;
 
 def PC  : MxPseudoReg<"pc">;
 
diff --git a/llvm/lib/Target/M68k/M68kSubtarget.h b/llvm/lib/Target/M68k/M68kSubtarget.h
index 4f9685814d9a9..0a46f3b8e371f 100644
--- a/llvm/lib/Target/M68k/M68kSubtarget.h
+++ b/llvm/lib/Target/M68k/M68kSubtarget.h
@@ -82,6 +82,7 @@ class M68kSubtarget : public M68kGenSubtargetInfo {
   /// of function is auto generated by tblgen.
   void ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS);
 
+  bool isM68000() const { return SubtargetKind == M00; }
   bool atLeastM68000() const { return SubtargetKind >= M00; }
   bool atLeastM68010() const { return SubtargetKind >= M10; }
   bool atLeastM68020() const { return SubtargetKind >= M20; }
diff --git a/llvm/test/CodeGen/M68k/Atomics/rmw.ll b/llvm/test/CodeGen/M68k/Atomics/rmw.ll
index 71ab4326cfe7d..8b304162df630 100644
--- a/llvm/test/CodeGen/M68k/Atomics/rmw.ll
+++ b/llvm/test/CodeGen/M68k/Atomics/rmw.ll
@@ -1,23 +1,36 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc %s -o - -mtriple=m68k -mcpu=M68000 -verify-machineinstrs | FileCheck %s --check-prefix=NO-ATOMIC
-; RUN: llc %s -o - -mtriple=m68k -mcpu=M68010 -verify-machineinstrs | FileCheck %s --check-prefix=NO-ATOMIC
+; RUN: llc %s -o - -mtriple=m68k -mcpu=M68000 -verify-machineinstrs | FileCheck %s --check-prefix=NO-ATOMIC-000
+; RUN: llc %s -o - -mtriple=m68k -mcpu=M68010 -verify-machineinstrs | FileCheck %s --check-prefix=NO-ATOMIC-010
 ; RUN: llc %s -o - -mtriple=m68k -mcpu=M68020 -verify-machineinstrs | FileCheck %s --check-prefix=ATOMIC
 ; RUN: llc %s -o - -mtriple=m68k -mcpu=M68030 -verify-machineinstrs | FileCheck %s --check-prefix=ATOMIC
 ; RUN: llc %s -o - -mtriple=m68k -mcpu=M68040 -verify-machineinstrs | FileCheck %s --check-prefix=ATOMIC
 
 define i8 @atomicrmw_add_i8(i8 %val, ptr %ptr) {
-; NO-ATOMIC-LABEL: atomicrmw_add_i8:
-; NO-ATOMIC:         .cfi_startproc
-; NO-ATOMIC-NEXT:  ; %bb.0:
-; NO-ATOMIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT:    move.b (19,%sp), %d0
-; NO-ATOMIC-NEXT:    and.l #255, %d0
-; NO-ATOMIC-NEXT:    move.l %d0, (4,%sp)
-; NO-ATOMIC-NEXT:    move.l (20,%sp), (%sp)
-; NO-ATOMIC-NEXT:    jsr __sync_fetch_and_add_1
-; NO-ATOMIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-NEXT:    rts
+; NO-ATOMIC-000-LABEL: atomicrmw_add_i8:
+; NO-ATOMIC-000:         .cfi_startproc
+; NO-ATOMIC-000-NEXT:  ; %bb.0:
+; NO-ATOMIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-000-NEXT:    move.b (19,%sp), %d0
+; NO-ATOMIC-000-NEXT:    and.l #255, %d0
+; NO-ATOMIC-000-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-000-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-000-NEXT:    jsr __sync_fetch_and_add_1
+; NO-ATOMIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-000-NEXT:    rts
+;
+; NO-ATOMIC-010-LABEL: atomicrmw_add_i8:
+; NO-ATOMIC-010:         .cfi_startproc
+; NO-ATOMIC-010-NEXT:  ; %bb.0:
+; NO-ATOMIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-010-NEXT:    move.b (19,%sp), %d0
+; NO-ATOMIC-010-NEXT:    and.l #255, %d0
+; NO-ATOMIC-010-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-010-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-010-NEXT:    jsr __sync_fetch_and_add_1
+; NO-ATOMIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-010-NEXT:    rts
 ;
 ; ATOMIC-LABEL: atomicrmw_add_i8:
 ; ATOMIC:         .cfi_startproc
@@ -39,7 +52,9 @@ define i8 @atomicrmw_add_i8(i8 %val, ptr %ptr) {
 ; ATOMIC-NEXT:    seq %d2
 ; ATOMIC-NEXT:    and.b #1, %d2
 ; ATOMIC-NEXT:    cmpi.b #0, %d2
+; ATOMIC-NEXT:    move.w %ccr, %d3
 ; ATOMIC-NEXT:    move.b %d0, %d2
+; ATOMIC-NEXT:    move.w %d3, %ccr
 ; ATOMIC-NEXT:    beq .LBB0_1
 ; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; ATOMIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
@@ -50,18 +65,31 @@ define i8 @atomicrmw_add_i8(i8 %val, ptr %ptr) {
 }
 
 define i16 @atomicrmw_sub_i16(i16 %val, ptr %ptr) {
-; NO-ATOMIC-LABEL: atomicrmw_sub_i16:
-; NO-ATOMIC:         .cfi_startproc
-; NO-ATOMIC-NEXT:  ; %bb.0:
-; NO-ATOMIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT:    move.w (18,%sp), %d0
-; NO-ATOMIC-NEXT:    and.l #65535, %d0
-; NO-ATOMIC-NEXT:    move.l %d0, (4,%sp)
-; NO-ATOMIC-NEXT:    move.l (20,%sp), (%sp)
-; NO-ATOMIC-NEXT:    jsr __sync_fetch_and_sub_2
-; NO-ATOMIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-NEXT:    rts
+; NO-ATOMIC-000-LABEL: atomicrmw_sub_i16:
+; NO-ATOMIC-000:         .cfi_startproc
+; NO-ATOMIC-000-NEXT:  ; %bb.0:
+; NO-ATOMIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-000-NEXT:    move.w (18,%sp), %d0
+; NO-ATOMIC-000-NEXT:    and.l #65535, %d0
+; NO-ATOMIC-000-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-000-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-000-NEXT:    jsr __sync_fetch_and_sub_2
+; NO-ATOMIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-000-NEXT:    rts
+;
+; NO-ATOMIC-010-LABEL: atomicrmw_sub_i16:
+; NO-ATOMIC-010:         .cfi_startproc
+; NO-ATOMIC-010-NEXT:  ; %bb.0:
+; NO-ATOMIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-010-NEXT:    move.w (18,%sp), %d0
+; NO-ATOMIC-010-NEXT:    and.l #65535, %d0
+; NO-ATOMIC-010-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-010-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-010-NEXT:    jsr __sync_fetch_and_sub_2
+; NO-ATOMIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-010-NEXT:    rts
 ;
 ; ATOMIC-LABEL: atomicrmw_sub_i16:
 ; ATOMIC:         .cfi_startproc
@@ -83,7 +111,9 @@ define i16 @atomicrmw_sub_i16(i16 %val, ptr %ptr) {
 ; ATOMIC-NEXT:    seq %d2
 ; ATOMIC-NEXT:    and.b #1, %d2
 ; ATOMIC-NEXT:    cmpi.b #0, %d2
+; ATOMIC-NEXT:    move.w %ccr, %d3
 ; ATOMIC-NEXT:    move.w %d0, %d2
+; ATOMIC-NEXT:    move.w %d3, %ccr
 ; ATOMIC-NEXT:    beq .LBB1_1
 ; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; ATOMIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
@@ -94,16 +124,27 @@ define i16 @atomicrmw_sub_i16(i16 %val, ptr %ptr) {
 }
 
 define i32 @atomicrmw_and_i32(i32 %val, ptr %ptr) {
-; NO-ATOMIC-LABEL: atomicrmw_and_i32:
-; NO-ATOMIC:         .cfi_startproc
-; NO-ATOMIC-NEXT:  ; %bb.0:
-; NO-ATOMIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT:    move.l (16,%sp), (4,%sp)
-; NO-ATOMIC-NEXT:    move.l (20,%sp), (%sp)
-; NO-ATOMIC-NEXT:    jsr __sync_fetch_and_and_4
-; NO-ATOMIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-NEXT:    rts
+; NO-ATOMIC-000-LABEL: atomicrmw_and_i32:
+; NO-ATOMIC-000:         .cfi_startproc
+; NO-ATOMIC-000-NEXT:  ; %bb.0:
+; NO-ATOMIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-000-NEXT:    move.l (16,%sp), (4,%sp)
+; NO-ATOMIC-000-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-000-NEXT:    jsr __sync_fetch_and_and_4
+; NO-ATOMIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-000-NEXT:    rts
+;
+; NO-ATOMIC-010-LABEL: atomicrmw_and_i32:
+; NO-ATOMIC-010:         .cfi_startproc
+; NO-ATOMIC-010-NEXT:  ; %bb.0:
+; NO-ATOMIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-010-NEXT:    move.l (16,%sp), (4,%sp)
+; NO-ATOMIC-010-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-010-NEXT:    jsr __sync_fetch_and_and_4
+; NO-ATOMIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-010-NEXT:    rts
 ;
 ; ATOMIC-LABEL: atomicrmw_and_i32:
 ; ATOMIC:         .cfi_startproc
@@ -125,7 +166,9 @@ define i32 @atomicrmw_and_i32(i32 %val, ptr %ptr) {
 ; ATOMIC-NEXT:    seq %d2
 ; ATOMIC-NEXT:    and.b #1, %d2
 ; ATOMIC-NEXT:    cmpi.b #0, %d2
+; ATOMIC-NEXT:    move.w %ccr, %d3
 ; ATOMIC-NEXT:    move.l %d0, %d2
+; ATOMIC-NEXT:    move.w %d3, %ccr
 ; ATOMIC-NEXT:    beq .LBB2_1
 ; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; ATOMIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
@@ -136,18 +179,31 @@ define i32 @atomicrmw_and_i32(i32 %val, ptr %ptr) {
 }
 
 define i64 @atomicrmw_xor_i64(i64 %val, ptr %ptr) {
-; NO-ATOMIC-LABEL: atomicrmw_xor_i64:
-; NO-ATOMIC:         .cfi_startproc
-; NO-ATOMIC-NEXT:  ; %bb.0:
-; NO-ATOMIC-NEXT:    suba.l #20, %sp
-; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -24
-; NO-ATOMIC-NEXT:    move.l #3, (12,%sp)
-; NO-ATOMIC-NEXT:    move.l (28,%sp), (8,%sp)
-; NO-ATOMIC-NEXT:    move.l (24,%sp), (4,%sp)
-; NO-ATOMIC-NEXT:    move.l (32,%sp), (%sp)
-; NO-ATOMIC-NEXT:    jsr __atomic_fetch_xor_8
-; NO-ATOMIC-NEXT:    adda.l #20, %sp
-; NO-ATOMIC-NEXT:    rts
+; NO-ATOMIC-000-LABEL: atomicrmw_xor_i64:
+; NO-ATOMIC-000:         .cfi_startproc
+; NO-ATOMIC-000-NEXT:  ; %bb.0:
+; NO-ATOMIC-000-NEXT:    suba.l #20, %sp
+; NO-ATOMIC-000-NEXT:    .cfi_def_cfa_offset -24
+; NO-ATOMIC-000-NEXT:    move.l #3, (12,%sp)
+; NO-ATOMIC-000-NEXT:    move.l (28,%sp), (8,%sp)
+; NO-ATOMIC-000-NEXT:    move.l (24,%sp), (4,%sp)
+; NO-ATOMIC-000-NEXT:    move.l (32,%sp), (%sp)
+; NO-ATOMIC-000-NEXT:    jsr __atomic_fetch_xor_8
+; NO-ATOMIC-000-NEXT:    adda.l #20, %sp
+; NO-ATOMIC-000-NEXT:    rts
+;
+; NO-ATOMIC-010-LABEL: atomicrmw_xor_i64:
+; NO-ATOMIC-010:         .cfi_startproc
+; NO-ATOMIC-010-NEXT:  ; %bb.0:
+; NO-ATOMIC-010-NEXT:    suba.l #20, %sp
+; NO-ATOMIC-010-NEXT:    .cfi_def_cfa_offset -24
+; NO-ATOMIC-010-NEXT:    move.l #3, (12,%sp)
+; NO-ATOMIC-010-NEXT:    move.l (28,%sp), (8,%sp)
+; NO-ATOMIC-010-NEXT:    move.l (24,%sp), (4,%sp)
+; NO-ATOMIC-010-NEXT:    move.l (32,%sp), (%sp)
+; NO-ATOMIC-010-NEXT:    jsr __atomic_fetch_xor_8
+; NO-ATOMIC-010-NEXT:    adda.l #20, %sp
+; NO-ATOMIC-010-NEXT:    rts
 ;
 ; ATOMIC-LABEL: atomicrmw_xor_i64:
 ; ATOMIC:         .cfi_startproc
@@ -166,18 +222,31 @@ define i64 @atomicrmw_xor_i64(i64 %val, ptr %ptr) {
 }
 
 define i8 @atomicrmw_or_i8(i8 %val, ptr %ptr) {
-; NO-ATOMIC-LABEL: atomicrmw_or_i8:
-; NO-ATOMIC:         .cfi_startproc
-; NO-ATOMIC-NEXT:  ; %bb.0:
-; NO-ATOMIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT:    move.b (19,%sp), %d0
-; NO-ATOMIC-NEXT:    and.l #255, %d0
-; NO-ATOMIC-NEXT:    move.l %d0, (4,%sp)
-; NO-ATOMIC-NEXT:    move.l (20,%sp), (%sp)
-; NO-ATOMIC-NEXT:    jsr __sync_fetch_and_or_1
-; NO-ATOMIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-NEXT:    rts
+; NO-ATOMIC-000-LABEL: atomicrmw_or_i8:
+; NO-ATOMIC-000:         .cfi_startproc
+; NO-ATOMIC-000-NEXT:  ; %bb.0:
+; NO-ATOMIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-000-NEXT:    move.b (19,%sp), %d0
+; NO-ATOMIC-000-NEXT:    and.l #255, %d0
+; NO-ATOMIC-000-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-000-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-000-NEXT:    jsr __sync_fetch_and_or_1
+; NO-ATOMIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-000-NEXT:    rts
+;
+; NO-ATOMIC-010-LABEL: atomicrmw_or_i8:
+; NO-ATOMIC-010:         .cfi_startproc
+; NO-ATOMIC-010-NEXT:  ; %bb.0:
+; NO-ATOMIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-010-NEXT:    move.b (19,%sp), %d0
+; NO-ATOMIC-010-NEXT:    and.l #255, %d0
+; NO-ATOMIC-010-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-010-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-010-NEXT:    jsr __sync_fetch_and_or_1
+; NO-ATOMIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-010-NEXT:    rts
 ;
 ; ATOMIC-LABEL: atomicrmw_or_i8:
 ; ATOMIC:         .cfi_startproc
@@ -199,7 +268,9 @@ define i8 @atomicrmw_or_i8(i8 %val, ptr %ptr) {
 ; ATOMIC-NEXT:    seq %d2
 ; ATOMIC-NEXT:    and.b #1, %d2
 ; ATOMIC-NEXT:    cmpi.b #0, %d2
+; ATOMIC-NEXT:    move.w %ccr, %d3
 ; ATOMIC-NEXT:    move.b %d0, %d2
+; ATOMIC-NEXT:    move.w %d3, %ccr
 ; ATOMIC-NEXT:    beq .LBB4_1
 ; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; ATOMIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
@@ -210,22 +281,39 @@ define i8 @atomicrmw_or_i8(i8 %val, ptr %ptr) {
 }
 
 define i16 @atmoicrmw_nand_i16(i16 %val, ptr %ptr) {
-; NO-ATOMIC-LABEL: atmoicrmw_nand_i16:
-; NO-ATOMIC:         .cfi_startproc
-; NO-ATOMIC-NEXT:  ; %bb.0:
-; NO-ATOMIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT:    movem.l %d2, (8,%sp) ; 8-byte Folded Spill
-; NO-ATOMIC-NEXT:    move.w (18,%sp), %d2
-; NO-ATOMIC-NEXT:    move.l %d2, %d0
-; NO-ATOMIC-NEXT:    and.l #65535, %d0
-; NO-ATOMIC-NEXT:    move.l %d0, (4,%sp)
-; NO-ATOMIC-NEXT:    move.l (20,%sp), (%sp)
-; NO-ATOMIC-NEXT:    jsr __sync_fetch_and_nand_2
-; NO-ATOMIC-NEXT:    move.w %d2, %d0
-; NO-ATOMIC-NEXT:    movem.l (8,%sp), %d2 ; 8-byte Folded Reload
-; NO-ATOMIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-NEXT:    rts
+; NO-ATOMIC-000-LABEL: atmoicrmw_nand_i16:
+; NO-ATOMIC-000:         .cfi_startproc
+; NO-ATOMIC-000-NEXT:  ; %bb.0:
+; NO-ATOMIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-000-NEXT:    movem.l %d2, (8,%sp) ; 8-byte Folded Spill
+; NO-ATOMIC-000-NEXT:    move.w (18,%sp), %d2
+; NO-ATOMIC-000-NEXT:    move.l %d2, %d0
+; NO-ATOMIC-000-NEXT:    and.l #65535, %d0
+; NO-ATOMIC-000-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-000-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-000-NEXT:    jsr __sync_fetch_and_nand_2
+; NO-ATOMIC-000-NEXT:    move.w %d2, %d0
+; NO-ATOMIC-000-NEXT:    movem.l (8,%sp), %d2 ; 8-byte Folded Reload
+; NO-ATOMIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-000-NEXT:    rts
+;
+; NO-ATOMIC-010-LABEL: atmoicrmw_nand_i16:
+; NO-ATOMIC-010:         .cfi_startproc
+; NO-ATOMIC-010-NEXT:  ; %bb.0:
+; NO-ATOMIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-010-NEXT:    movem.l %d2, (8,%sp) ; 8-byte Folded Spill
+; NO-ATOMIC-010-NEXT:    move.w (18,%sp), %d2
+; NO-ATOMIC-010-NEXT:    move.l %d2, %d0
+; NO-ATOMIC-010-NEXT:    and.l #65535, %d0
+; NO-ATOMIC-010-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-010-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-010-NEXT:    jsr __sync_fetch_and_nand_2
+; NO-ATOMIC-010-NEXT:    move.w %d2, %d0
+; NO-ATOMIC-010-NEXT:    movem.l (8,%sp), %d2 ; 8-byte Folded Reload
+; NO-ATOMIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-010-NEXT:    rts
 ;
 ; ATOMIC-LABEL: atmoicrmw_nand_i16:
 ; ATOMIC:         .cfi_startproc
@@ -248,7 +336,9 @@ define i16 @atmoicrmw_nand_i16(i16 %val, ptr %ptr) {
 ; ATOMIC-NEXT:    seq %d2
 ; ATOMIC-NEXT:    and.b #1, %d2
 ; ATOMIC-NEXT:    cmpi.b #0, %d2
+; ATOMIC-NEXT:    move.w %ccr, %d3
 ; ATOMIC-NEXT:    move.w %d1, %d2
+; ATOMIC-NEXT:    move.w %d3, %ccr
 ; ATOMIC-NEXT:    beq .LBB5_1
 ; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; ATOMIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
@@ -259,16 +349,27 @@ define i16 @atmoicrmw_nand_i16(i16 %val, ptr %ptr) {
 }
 
 define i32 @atomicrmw_min_i32(i32 %val, ptr %ptr) {
-; NO-ATOMIC-LABEL: atomicrmw_min_i32:
-; NO-ATOMIC:         .cfi_startproc
-; NO-ATOMIC-NEXT:  ; %bb.0:
-; NO-ATOMIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT:    move.l (16,%sp), (4,%sp)
-; NO-ATOMIC-NEXT:    move.l (20,%sp), (%sp)
-; NO-ATOMIC-NEXT:    jsr __sync_fetch_and_min_4
-; NO-ATOMIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-NEXT:    rts
+; NO-ATOMIC-000-LABEL: atomicrmw_min_i32:
+; NO-ATOMIC-000:         .cfi_startproc
+; NO-ATOMIC-000-NEXT:  ; %bb.0:
+; NO-ATOMIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-000-NEXT:    move.l (16,%sp), (4,%sp)
+; NO-ATOMIC-000-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-000-NEXT:    jsr __sync_fetch_and_min_4
+; NO-ATOMIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-000-NEXT:    rts
+;
+; NO-ATOMIC-010-LABEL: atomicrmw_min_i32:
+; NO-ATOMIC-010:         .cfi_startproc
+; NO-ATOMIC-010-NEXT:  ; %bb.0:
+; NO-ATOMIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-010-NEXT:    move.l (16,%sp), (4,%sp)
+; NO-ATOMIC-010-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-010-NEXT:    jsr __sync_fetch_and_min_4
+; NO-ATOMIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-010-NEXT:    rts
 ;
 ; ATOMIC-LABEL: atomicrmw_min_i32:
 ; ATOMIC:         .cfi_startproc
@@ -289,13 +390,17 @@ define i32 @atomicrmw_min_i32(i32 %val, ptr %ptr) {
 ; ATOMIC-NEXT:    seq %d2
 ; ATOMIC-NEXT:    and.b #1, %d2
 ; ATOMIC-NEXT:    cmpi.b #0, %d2
+; ATOMIC-NEXT:    move.w %ccr, %d3
 ; ATOMIC-NEXT:    move.l %d0, %d2
+; ATOMIC-NEXT:    move.w %d3, %ccr
 ; ATOMIC-NEXT:    bne .LBB6_4
 ; ATOMIC-NEXT:  .LBB6_1: ; %atomicrmw.start
 ; ATOMIC-NEXT:    ; =>This Inner Loop Header: Depth=1
 ; ATOMIC-NEXT:    move.l %d2, %d0
 ; ATOMIC-NEXT:    sub.l %d1, %d0
+; ATOMIC-NEXT:    move.w %ccr, %d0
 ; ATOMIC-NEXT:    move.l %d2, %d3
+; ATOMIC-NEXT:    move.w %d0, %ccr
 ; ATOMIC-NEXT:    ble .LBB6_3
 ; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.start
 ; ATOMIC-NEXT:    ; in Loop: Header=BB6_1 Depth=1
@@ -310,53 +415,105 @@ define i32 @atomicrmw_min_i32(i32 %val, ptr %ptr) {
 }
 
 define i64 @atomicrmw_max_i64(i64 %val, ptr %ptr) {
-; NO-ATOMIC-LABEL: atomicrmw_max_i64:
-; NO-ATOMIC:         .cfi_startproc
-; NO-ATOMIC-NEXT:  ; %bb.0:
-; NO-ATOMIC-NEXT:    suba.l #52, %sp
-; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -56
-; NO-ATOMIC-NEXT:    movem.l %d2-%d4/%a2-%a3, (32,%sp) ; 24-byte Folded Spill
-; NO-ATOMIC-NEXT:    move.l (60,%sp), %d3
-; NO-ATOMIC-NEXT:    move.l (56,%sp), %d4
-; NO-ATOMIC-NEXT:    move.l (64,%sp), %a2
-; NO-ATOMIC-NEXT:    move.l (4,%a2), %d1
-; NO-ATOMIC-NEXT:    move.l (%a2), %d0
-; NO-ATOMIC-NEXT:    lea (24,%sp), %a3
-; NO-ATOMIC-NEXT:    bra .LBB7_1
-; NO-ATOMIC-NEXT:  .LBB7_3: ; %atomicrmw.start
-; NO-ATOMIC-NEXT:    ; in Loop: Header=BB7_1 Depth=1
-; NO-ATOMIC-NEXT:    move.l %d1, (12,%sp)
-; NO-ATOMIC-NEXT:    move.l %d0, (8,%sp)
-; NO-ATOMIC-NEXT:    move.l #5, (20,%sp)
-; NO-ATOMIC-NEXT:    move.l #5, (16,%sp)
-; NO-ATOMIC-NEXT:    jsr __atomic_compare_exchange_8
-; NO-ATOMIC-NEXT:    move.b %d0, %d2
-; NO-ATOMIC-NEXT:    move.l (28,%sp), %d1
-; NO-ATOMIC-NEXT:    move.l (24,%sp), %d0
-; NO-ATOMIC-NEXT:    cmpi.b #0, %d2
-; NO-ATOMIC-NEXT:    bne .LBB7_4
-; NO-ATOMIC-NEXT:  .LBB7_1: ; %atomicrmw.start
-; NO-ATOMIC-NEXT:    ; =>This Inner Loop Header: Depth=1
-; NO-ATOMIC-NEXT:    move.l %d0, (24,%sp)
-; NO-ATOMIC-NEXT:    move.l %d1, (28,%sp)
-; NO-ATOMIC-NEXT:    move.l %a2, (%sp)
-; NO-ATOMIC-NEXT:    move.l %a3, (4,%sp)
-; NO-ATOMIC-NEXT:    move.l %d3, %d2
-; NO-ATOMIC-NEXT:    sub.l %d1, %d2
-; NO-ATOMIC-NEXT:    move.l %d4, %d2
-; NO-ATOMIC-NEXT:    subx.l %d0, %d2
-; NO-ATOMIC-NEXT:    slt %d2
-; NO-ATOMIC-NEXT:    cmpi.b #0, %d2
-; NO-ATOMIC-NEXT:    bne .LBB7_3
-; NO-ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.start
-; NO-ATOMIC-NEXT:    ; in Loop: Header=BB7_1 Depth=1
-; NO-ATOMIC-NEXT:    move.l %d3, %d1
-; NO-ATOMIC-NEXT:    move.l %d4, %d0
-; NO-ATOMIC-NEXT:    bra .LBB7_3
-; NO-ATOMIC-NEXT:  .LBB7_4: ; %atomicrmw.end
-; NO-ATOMIC-NEXT:    movem.l (32,%sp), %d2-%d4/%a2-%a3 ; 24-byte Folded Reload
-; NO-ATOMIC-NEXT:    adda.l #52, %sp
-; NO-ATOMIC-NEXT:    rts
+; NO-ATOMIC-000-LABEL: atomicrmw_max_i64:
+; NO-ATOMIC-000:         .cfi_startproc
+; NO-ATOMIC-000-NEXT:  ; %bb.0:
+; NO-ATOMIC-000-NEXT:    suba.l #52, %sp
+; NO-ATOMIC-000-NEXT:    .cfi_def_cfa_offset -56
+; NO-ATOMIC-000-NEXT:    movem.l %d2-%d4/%a2-%a3, (32,%sp) ; 24-byte Folded Spill
+; NO-ATOMIC-000-NEXT:    move.l (60,%sp), %d3
+; NO-ATOMIC-000-NEXT:    move.l (56,%sp), %d4
+; NO-ATOMIC-000-NEXT:    move.l (64,%sp), %a2
+; NO-ATOMIC-000-NEXT:    move.l (4,%a2), %d1
+; NO-ATOMIC-000-NEXT:    move.l (%a2), %d0
+; NO-ATOMIC-000-NEXT:    lea (24,%sp), %a3
+; NO-ATOMIC-000-NEXT:    bra .LBB7_1
+; NO-ATOMIC-000-NEXT:  .LBB7_3: ; %atomicrmw.start
+; NO-ATOMIC-000-NEXT:    ; in Loop: Header=BB7_1 Depth=1
+; NO-ATOMIC-000-NEXT:    move.l %d1, (12,%sp)
+; NO-ATOMIC-000-NEXT:    move.l %d0, (8,%sp)
+; NO-ATOMIC-000-NEXT:    move.l #5, (20,%sp)
+; NO-ATOMIC-000-NEXT:    move.l #5, (16,%sp)
+; NO-ATOMIC-000-NEXT:    jsr __atomic_compare_exchange_8
+; NO-ATOMIC-000-NEXT:    move.b %d0, %d2
+; NO-ATOMIC-000-NEXT:    move.l (28,%sp), %d1
+; NO-ATOMIC-000-NEXT:    move.l (24,%sp), %d0
+; NO-ATOMIC-000-NEXT:    cmpi.b #0, %d2
+; NO-ATOMIC-000-NEXT:    bne .LBB7_4
+; NO-ATOMIC-000-NEXT:  .LBB7_1: ; %atomicrmw.start
+; NO-ATOMIC-000-NEXT:    ; =>This Inner Loop Header: Depth=1
+; NO-ATOMIC-000-NEXT:    move.l %d0, (24,%sp)
+; NO-ATOMIC-000-NEXT:    move.l %d1, (28,%sp)
+; NO-ATOMIC-000-NEXT:    move.l %a2, (%sp)
+; NO-ATOMIC-000-NEXT:    move.l %a3, (4,%sp)
+; NO-ATOMIC-000-NEXT:    move.l %d3, %d2
+; NO-ATOMIC-000-NEXT:    sub.l %d1, %d2
+; NO-ATOMIC-000-NEXT:    move.w %sr, -(%sp)
+; NO-ATOMIC-000-NEXT:    move.l %d4, %d2
+; NO-ATOMIC-000-NEXT:    move.w (%sp)+, %ccr
+; NO-ATOMIC-000-NEXT:    subx.l %d0, %d2
+; NO-ATOMIC-000-NEXT:    slt %d2
+; NO-ATOMIC-000-NEXT:    cmpi.b #0, %d2
+; NO-ATOMIC-000-NEXT:    bne .LBB7_3
+; NO-ATOMIC-000-NEXT:  ; %bb.2: ; %atomicrmw.start
+; NO-ATOMIC-000-NEXT:    ; in Loop: Header=BB7_1 Depth=1
+; NO-ATOMIC-000-NEXT:    move.l %d3, %d1
+; NO-ATOMIC-000-NEXT:    move.l %d4, %d0
+; NO-ATOMIC-000-NEXT:    bra .LBB7_3
+; NO-ATOMIC-000-NEXT:  .LBB7_4: ; %atomicrmw.end
+; NO-ATOMIC-000-NEXT:    movem.l (32,%sp), %d2-%d4/%a2-%a3 ; 24-byte Folded Reload
+; NO-ATOMIC-000-NEXT:    adda.l #52, %sp
+; NO-ATOMIC-000-NEXT:    rts
+;
+; NO-ATOMIC-010-LABEL: atomicrmw_max_i64:
+; NO-ATOMIC-010:         .cfi_startproc
+; NO-ATOMIC-010-NEXT:  ; %bb.0:
+; NO-ATOMIC-010-NEXT:    suba.l #52, %sp
+; NO-ATOMIC-010-NEXT:    .cfi_def_cfa_offset -56
+; NO-ATOMIC-010-NEXT:    movem.l %d2-%d4/%a2-%a3, (32,%sp) ; 24-byte Folded Spill
+; NO-ATOMIC-010-NEXT:    move.l (60,%sp), %d3
+; NO-ATOMIC-010-NEXT:    move.l (56,%sp), %d4
+; NO-ATOMIC-010-NEXT:    move.l (64,%sp), %a2
+; NO-ATOMIC-010-NEXT:    move.l (4,%a2), %d1
+; NO-ATOMIC-010-NEXT:    move.l (%a2), %d0
+; NO-ATOMIC-010-NEXT:    lea (24,%sp), %a3
+; NO-ATOMIC-010-NEXT:    bra .LBB7_1
+; NO-ATOMIC-010-NEXT:  .LBB7_3: ; %atomicrmw.start
+; NO-ATOMIC-010-NEXT:    ; in Loop: Header=BB7_1 Depth=1
+; NO-ATOMIC-010-NEXT:    move.l %d1, (12,%sp)
+; NO-ATOMIC-010-NEXT:    move.l %d0, (8,%sp)
+; NO-ATOMIC-010-NEXT:    move.l #5, (20,%sp)
+; NO-ATOMIC-010-NEXT:    move.l #5, (16,%sp)
+; NO-ATOMIC-010-NEXT:    jsr __atomic_compare_exchange_8
+; NO-ATOMIC-010-NEXT:    move.b %d0, %d2
+; NO-ATOMIC-010-NEXT:    move.l (28,%sp), %d1
+; NO-ATOMIC-010-NEXT:    move.l (24,%sp), %d0
+; NO-ATOMIC-010-NEXT:    cmpi.b #0, %d2
+; NO-ATOMIC-010-NEXT:    bne .LBB7_4
+; NO-ATOMIC-010-NEXT:  .LBB7_1: ; %atomicrmw.start
+; NO-ATOMIC-010-NEXT:    ; =>This Inner Loop Header: Depth=1
+; NO-ATOMIC-010-NEXT:    move.l %d0, (24,%sp)
+; NO-ATOMIC-010-NEXT:    move.l %d1, (28,%sp)
+; NO-ATOMIC-010-NEXT:    move.l %a2, (%sp)
+; NO-ATOMIC-010-NEXT:    move.l %a3, (4,%sp)
+; NO-ATOMIC-010-NEXT:    move.l %d3, %d2
+; NO-ATOMIC-010-NEXT:    sub.l %d1, %d2
+; NO-ATOMIC-010-NEXT:    move.w %ccr, -(%sp)
+; NO-ATOMIC-010-NEXT:    move.l %d4, %d2
+; NO-ATOMIC-010-NEXT:    move.w (%sp)+, %ccr
+; NO-ATOMIC-010-NEXT:    subx.l %d0, %d2
+; NO-ATOMIC-010-NEXT:    slt %d2
+; NO-ATOMIC-010-NEXT:    cmpi.b #0, %d2
+; NO-ATOMIC-010-NEXT:    bne .LBB7_3
+; NO-ATOMIC-010-NEXT:  ; %bb.2: ; %atomicrmw.start
+; NO-ATOMIC-010-NEXT:    ; in Loop: Header=BB7_1 Depth=1
+; NO-ATOMIC-010-NEXT:    move.l %d3, %d1
+; NO-ATOMIC-010-NEXT:    move.l %d4, %d0
+; NO-ATOMIC-010-NEXT:    bra .LBB7_3
+; NO-ATOMIC-010-NEXT:  .LBB7_4: ; %atomicrmw.end
+; NO-ATOMIC-010-NEXT:    movem.l (32,%sp), %d2-%d4/%a2-%a3 ; 24-byte Folded Reload
+; NO-ATOMIC-010-NEXT:    adda.l #52, %sp
+; NO-ATOMIC-010-NEXT:    rts
 ;
 ; ATOMIC-LABEL: atomicrmw_max_i64:
 ; ATOMIC:         .cfi_startproc
@@ -391,7 +548,9 @@ define i64 @atomicrmw_max_i64(i64 %val, ptr %ptr) {
 ; ATOMIC-NEXT:    move.l %a3, (4,%sp)
 ; ATOMIC-NEXT:    move.l %d3, %d2
 ; ATOMIC-NEXT:    sub.l %d1, %d2
+; ATOMIC-NEXT:    move.w %ccr, -(%sp)
 ; ATOMIC-NEXT:    move.l %d4, %d2
+; ATOMIC-NEXT:    move.w (%sp)+, %ccr
 ; ATOMIC-NEXT:    subx.l %d0, %d2
 ; ATOMIC-NEXT:    slt %d2
 ; ATOMIC-NEXT:    cmpi.b #0, %d2
@@ -410,18 +569,31 @@ define i64 @atomicrmw_max_i64(i64 %val, ptr %ptr) {
 }
 
 define i8 @atomicrmw_i8_umin(i8 %val, ptr %ptr) {
-; NO-ATOMIC-LABEL: atomicrmw_i8_umin:
-; NO-ATOMIC:         .cfi_startproc
-; NO-ATOMIC-NEXT:  ; %bb.0:
-; NO-ATOMIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT:    move.b (19,%sp), %d0
-; NO-ATOMIC-NEXT:    and.l #255, %d0
-; NO-ATOMIC-NEXT:    move.l %d0, (4,%sp)
-; NO-ATOMIC-NEXT:    move.l (20,%sp), (%sp)
-; NO-ATOMIC-NEXT:    jsr __sync_fetch_and_umin_1
-; NO-ATOMIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-NEXT:    rts
+; NO-ATOMIC-000-LABEL: atomicrmw_i8_umin:
+; NO-ATOMIC-000:         .cfi_startproc
+; NO-ATOMIC-000-NEXT:  ; %bb.0:
+; NO-ATOMIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-000-NEXT:    move.b (19,%sp), %d0
+; NO-ATOMIC-000-NEXT:    and.l #255, %d0
+; NO-ATOMIC-000-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-000-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-000-NEXT:    jsr __sync_fetch_and_umin_1
+; NO-ATOMIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-000-NEXT:    rts
+;
+; NO-ATOMIC-010-LABEL: atomicrmw_i8_umin:
+; NO-ATOMIC-010:         .cfi_startproc
+; NO-ATOMIC-010-NEXT:  ; %bb.0:
+; NO-ATOMIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-010-NEXT:    move.b (19,%sp), %d0
+; NO-ATOMIC-010-NEXT:    and.l #255, %d0
+; NO-ATOMIC-010-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-010-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-010-NEXT:    jsr __sync_fetch_and_umin_1
+; NO-ATOMIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-010-NEXT:    rts
 ;
 ; ATOMIC-LABEL: atomicrmw_i8_umin:
 ; ATOMIC:         .cfi_startproc
@@ -442,13 +614,17 @@ define i8 @atomicrmw_i8_umin(i8 %val, ptr %ptr) {
 ; ATOMIC-NEXT:    seq %d2
 ; ATOMIC-NEXT:    and.b #1, %d2
 ; ATOMIC-NEXT:    cmpi.b #0, %d2
+; ATOMIC-NEXT:    move.w %ccr, %d3
 ; ATOMIC-NEXT:    move.b %d0, %d2
+; ATOMIC-NEXT:    move.w %d3, %ccr
 ; ATOMIC-NEXT:    bne .LBB8_4
 ; ATOMIC-NEXT:  .LBB8_1: ; %atomicrmw.start
 ; ATOMIC-NEXT:    ; =>This Inner Loop Header: Depth=1
 ; ATOMIC-NEXT:    move.b %d2, %d0
 ; ATOMIC-NEXT:    sub.b %d1, %d0
+; ATOMIC-NEXT:    move.w %ccr, %d0
 ; ATOMIC-NEXT:    move.b %d2, %d3
+; ATOMIC-NEXT:    move.w %d0, %ccr
 ; ATOMIC-NEXT:    bls .LBB8_3
 ; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.start
 ; ATOMIC-NEXT:    ; in Loop: Header=BB8_1 Depth=1
@@ -463,18 +639,31 @@ define i8 @atomicrmw_i8_umin(i8 %val, ptr %ptr) {
 }
 
 define i16 @atomicrmw_umax_i16(i16 %val, ptr %ptr) {
-; NO-ATOMIC-LABEL: atomicrmw_umax_i16:
-; NO-ATOMIC:         .cfi_startproc
-; NO-ATOMIC-NEXT:  ; %bb.0:
-; NO-ATOMIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT:    move.w (18,%sp), %d0
-; NO-ATOMIC-NEXT:    and.l #65535, %d0
-; NO-ATOMIC-NEXT:    move.l %d0, (4,%sp)
-; NO-ATOMIC-NEXT:    move.l (20,%sp), (%sp)
-; NO-ATOMIC-NEXT:    jsr __sync_fetch_and_umax_2
-; NO-ATOMIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-NEXT:    rts
+; NO-ATOMIC-000-LABEL: atomicrmw_umax_i16:
+; NO-ATOMIC-000:         .cfi_startproc
+; NO-ATOMIC-000-NEXT:  ; %bb.0:
+; NO-ATOMIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-000-NEXT:    move.w (18,%sp), %d0
+; NO-ATOMIC-000-NEXT:    and.l #65535, %d0
+; NO-ATOMIC-000-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-000-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-000-NEXT:    jsr __sync_fetch_and_umax_2
+; NO-ATOMIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-000-NEXT:    rts
+;
+; NO-ATOMIC-010-LABEL: atomicrmw_umax_i16:
+; NO-ATOMIC-010:         .cfi_startproc
+; NO-ATOMIC-010-NEXT:  ; %bb.0:
+; NO-ATOMIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-010-NEXT:    move.w (18,%sp), %d0
+; NO-ATOMIC-010-NEXT:    and.l #65535, %d0
+; NO-ATOMIC-010-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-010-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-010-NEXT:    jsr __sync_fetch_and_umax_2
+; NO-ATOMIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-010-NEXT:    rts
 ;
 ; ATOMIC-LABEL: atomicrmw_umax_i16:
 ; ATOMIC:         .cfi_startproc
@@ -495,13 +684,17 @@ define i16 @atomicrmw_umax_i16(i16 %val, ptr %ptr) {
 ; ATOMIC-NEXT:    seq %d2
 ; ATOMIC-NEXT:    and.b #1, %d2
 ; ATOMIC-NEXT:    cmpi.b #0, %d2
+; ATOMIC-NEXT:    move.w %ccr, %d3
 ; ATOMIC-NEXT:    move.w %d0, %d2
+; ATOMIC-NEXT:    move.w %d3, %ccr
 ; ATOMIC-NEXT:    bne .LBB9_4
 ; ATOMIC-NEXT:  .LBB9_1: ; %atomicrmw.start
 ; ATOMIC-NEXT:    ; =>This Inner Loop Header: Depth=1
 ; ATOMIC-NEXT:    move.w %d2, %d0
 ; ATOMIC-NEXT:    sub.w %d1, %d0
+; ATOMIC-NEXT:    move.w %ccr, %d0
 ; ATOMIC-NEXT:    move.w %d2, %d3
+; ATOMIC-NEXT:    move.w %d0, %ccr
 ; ATOMIC-NEXT:    bhi .LBB9_3
 ; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.start
 ; ATOMIC-NEXT:    ; in Loop: Header=BB9_1 Depth=1
@@ -516,18 +709,31 @@ define i16 @atomicrmw_umax_i16(i16 %val, ptr %ptr) {
 }
 
 define i16 @atomicrmw_xchg_i16(i16 %val, ptr %ptr) {
-; NO-ATOMIC-LABEL: atomicrmw_xchg_i16:
-; NO-ATOMIC:         .cfi_startproc
-; NO-ATOMIC-NEXT:  ; %bb.0: ; %entry
-; NO-ATOMIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT:    move.w (18,%sp), %d0
-; NO-ATOMIC-NEXT:    and.l #65535, %d0
-; NO-ATOMIC-NEXT:    move.l %d0, (4,%sp)
-; NO-ATOMIC-NEXT:    move.l (20,%sp), (%sp)
-; NO-ATOMIC-NEXT:    jsr __sync_lock_test_and_set_2
-; NO-ATOMIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-NEXT:    rts
+; NO-ATOMIC-000-LABEL: atomicrmw_xchg_i16:
+; NO-ATOMIC-000:         .cfi_startproc
+; NO-ATOMIC-000-NEXT:  ; %bb.0: ; %entry
+; NO-ATOMIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-000-NEXT:    move.w (18,%sp), %d0
+; NO-ATOMIC-000-NEXT:    and.l #65535, %d0
+; NO-ATOMIC-000-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-000-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-000-NEXT:    jsr __sync_lock_test_and_set_2
+; NO-ATOMIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-000-NEXT:    rts
+;
+; NO-ATOMIC-010-LABEL: atomicrmw_xchg_i16:
+; NO-ATOMIC-010:         .cfi_startproc
+; NO-ATOMIC-010-NEXT:  ; %bb.0: ; %entry
+; NO-ATOMIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-010-NEXT:    move.w (18,%sp), %d0
+; NO-ATOMIC-010-NEXT:    and.l #65535, %d0
+; NO-ATOMIC-010-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-010-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-010-NEXT:    jsr __sync_lock_test_and_set_2
+; NO-ATOMIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-010-NEXT:    rts
 ;
 ; ATOMIC-LABEL: atomicrmw_xchg_i16:
 ; ATOMIC:         .cfi_startproc
@@ -547,7 +753,9 @@ define i16 @atomicrmw_xchg_i16(i16 %val, ptr %ptr) {
 ; ATOMIC-NEXT:    seq %d2
 ; ATOMIC-NEXT:    and.b #1, %d2
 ; ATOMIC-NEXT:    cmpi.b #0, %d2
+; ATOMIC-NEXT:    move.w %ccr, %d3
 ; ATOMIC-NEXT:    move.w %d0, %d2
+; ATOMIC-NEXT:    move.w %d3, %ccr
 ; ATOMIC-NEXT:    beq .LBB10_1
 ; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; ATOMIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
@@ -559,16 +767,27 @@ entry:
 }
 
 define i32 @atomicrmw_xchg_i32(i32 %val, ptr %ptr) {
-; NO-ATOMIC-LABEL: atomicrmw_xchg_i32:
-; NO-ATOMIC:         .cfi_startproc
-; NO-ATOMIC-NEXT:  ; %bb.0: ; %entry
-; NO-ATOMIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT:    move.l (16,%sp), (4,%sp)
-; NO-ATOMIC-NEXT:    move.l (20,%sp), (%sp)
-; NO-ATOMIC-NEXT:    jsr __sync_lock_test_and_set_4
-; NO-ATOMIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-NEXT:    rts
+; NO-ATOMIC-000-LABEL: atomicrmw_xchg_i32:
+; NO-ATOMIC-000:         .cfi_startproc
+; NO-ATOMIC-000-NEXT:  ; %bb.0: ; %entry
+; NO-ATOMIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-000-NEXT:    move.l (16,%sp), (4,%sp)
+; NO-ATOMIC-000-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-000-NEXT:    jsr __sync_lock_test_and_set_4
+; NO-ATOMIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-000-NEXT:    rts
+;
+; NO-ATOMIC-010-LABEL: atomicrmw_xchg_i32:
+; NO-ATOMIC-010:         .cfi_startproc
+; NO-ATOMIC-010-NEXT:  ; %bb.0: ; %entry
+; NO-ATOMIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-010-NEXT:    move.l (16,%sp), (4,%sp)
+; NO-ATOMIC-010-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-010-NEXT:    jsr __sync_lock_test_and_set_4
+; NO-ATOMIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-010-NEXT:    rts
 ;
 ; ATOMIC-LABEL: atomicrmw_xchg_i32:
 ; ATOMIC:         .cfi_startproc
@@ -588,7 +807,9 @@ define i32 @atomicrmw_xchg_i32(i32 %val, ptr %ptr) {
 ; ATOMIC-NEXT:    seq %d2
 ; ATOMIC-NEXT:    and.b #1, %d2
 ; ATOMIC-NEXT:    cmpi.b #0, %d2
+; ATOMIC-NEXT:    move.w %ccr, %d3
 ; ATOMIC-NEXT:    move.l %d0, %d2
+; ATOMIC-NEXT:    move.w %d3, %ccr
 ; ATOMIC-NEXT:    beq .LBB11_1
 ; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; ATOMIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
@@ -600,19 +821,33 @@ entry:
 }
 
 define i8 @atomicrmw_sub_i8_arid(ptr align 2 %self) {
-; NO-ATOMIC-LABEL: atomicrmw_sub_i8_arid:
-; NO-ATOMIC:         .cfi_startproc
-; NO-ATOMIC-NEXT:  ; %bb.0: ; %start
-; NO-ATOMIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT:    move.l (16,%sp), %a0
-; NO-ATOMIC-NEXT:    move.l (%a0), %d0
-; NO-ATOMIC-NEXT:    add.l #4, %d0
-; NO-ATOMIC-NEXT:    move.l %d0, (%sp)
-; NO-ATOMIC-NEXT:    move.l #1, (4,%sp)
-; NO-ATOMIC-NEXT:    jsr __sync_fetch_and_sub_1
-; NO-ATOMIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-NEXT:    rts
+; NO-ATOMIC-000-LABEL: atomicrmw_sub_i8_arid:
+; NO-ATOMIC-000:         .cfi_startproc
+; NO-ATOMIC-000-NEXT:  ; %bb.0: ; %start
+; NO-ATOMIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-000-NEXT:    move.l (16,%sp), %a0
+; NO-ATOMIC-000-NEXT:    move.l (%a0), %d0
+; NO-ATOMIC-000-NEXT:    add.l #4, %d0
+; NO-ATOMIC-000-NEXT:    move.l %d0, (%sp)
+; NO-ATOMIC-000-NEXT:    move.l #1, (4,%sp)
+; NO-ATOMIC-000-NEXT:    jsr __sync_fetch_and_sub_1
+; NO-ATOMIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-000-NEXT:    rts
+;
+; NO-ATOMIC-010-LABEL: atomicrmw_sub_i8_arid:
+; NO-ATOMIC-010:         .cfi_startproc
+; NO-ATOMIC-010-NEXT:  ; %bb.0: ; %start
+; NO-ATOMIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-010-NEXT:    move.l (16,%sp), %a0
+; NO-ATOMIC-010-NEXT:    move.l (%a0), %d0
+; NO-ATOMIC-010-NEXT:    add.l #4, %d0
+; NO-ATOMIC-010-NEXT:    move.l %d0, (%sp)
+; NO-ATOMIC-010-NEXT:    move.l #1, (4,%sp)
+; NO-ATOMIC-010-NEXT:    jsr __sync_fetch_and_sub_1
+; NO-ATOMIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-010-NEXT:    rts
 ;
 ; ATOMIC-LABEL: atomicrmw_sub_i8_arid:
 ; ATOMIC:         .cfi_startproc
@@ -634,7 +869,9 @@ define i8 @atomicrmw_sub_i8_arid(ptr align 2 %self) {
 ; ATOMIC-NEXT:    seq %d1
 ; ATOMIC-NEXT:    and.b #1, %d1
 ; ATOMIC-NEXT:    cmpi.b #0, %d1
+; ATOMIC-NEXT:    move.w %ccr, %d2
 ; ATOMIC-NEXT:    move.b %d0, %d1
+; ATOMIC-NEXT:    move.w %d2, %ccr
 ; ATOMIC-NEXT:    beq .LBB12_1
 ; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; ATOMIC-NEXT:    movem.l (0,%sp), %d2 ; 8-byte Folded Reload
@@ -648,19 +885,33 @@ start:
 }
 
 define i16 @atomicrmw_sub_i16_arid(ptr align 2 %self) {
-; NO-ATOMIC-LABEL: atomicrmw_sub_i16_arid:
-; NO-ATOMIC:         .cfi_startproc
-; NO-ATOMIC-NEXT:  ; %bb.0: ; %start
-; NO-ATOMIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT:    move.l (16,%sp), %a0
-; NO-ATOMIC-NEXT:    move.l (%a0), %d0
-; NO-ATOMIC-NEXT:    add.l #4, %d0
-; NO-ATOMIC-NEXT:    move.l %d0, (%sp)
-; NO-ATOMIC-NEXT:    move.l #1, (4,%sp)
-; NO-ATOMIC-NEXT:    jsr __sync_fetch_and_sub_2
-; NO-ATOMIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-NEXT:    rts
+; NO-ATOMIC-000-LABEL: atomicrmw_sub_i16_arid:
+; NO-ATOMIC-000:         .cfi_startproc
+; NO-ATOMIC-000-NEXT:  ; %bb.0: ; %start
+; NO-ATOMIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-000-NEXT:    move.l (16,%sp), %a0
+; NO-ATOMIC-000-NEXT:    move.l (%a0), %d0
+; NO-ATOMIC-000-NEXT:    add.l #4, %d0
+; NO-ATOMIC-000-NEXT:    move.l %d0, (%sp)
+; NO-ATOMIC-000-NEXT:    move.l #1, (4,%sp)
+; NO-ATOMIC-000-NEXT:    jsr __sync_fetch_and_sub_2
+; NO-ATOMIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-000-NEXT:    rts
+;
+; NO-ATOMIC-010-LABEL: atomicrmw_sub_i16_arid:
+; NO-ATOMIC-010:         .cfi_startproc
+; NO-ATOMIC-010-NEXT:  ; %bb.0: ; %start
+; NO-ATOMIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-010-NEXT:    move.l (16,%sp), %a0
+; NO-ATOMIC-010-NEXT:    move.l (%a0), %d0
+; NO-ATOMIC-010-NEXT:    add.l #4, %d0
+; NO-ATOMIC-010-NEXT:    move.l %d0, (%sp)
+; NO-ATOMIC-010-NEXT:    move.l #1, (4,%sp)
+; NO-ATOMIC-010-NEXT:    jsr __sync_fetch_and_sub_2
+; NO-ATOMIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-010-NEXT:    rts
 ;
 ; ATOMIC-LABEL: atomicrmw_sub_i16_arid:
 ; ATOMIC:         .cfi_startproc
@@ -682,7 +933,9 @@ define i16 @atomicrmw_sub_i16_arid(ptr align 2 %self) {
 ; ATOMIC-NEXT:    seq %d1
 ; ATOMIC-NEXT:    and.b #1, %d1
 ; ATOMIC-NEXT:    cmpi.b #0, %d1
+; ATOMIC-NEXT:    move.w %ccr, %d2
 ; ATOMIC-NEXT:    move.w %d0, %d1
+; ATOMIC-NEXT:    move.w %d2, %ccr
 ; ATOMIC-NEXT:    beq .LBB13_1
 ; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; ATOMIC-NEXT:    movem.l (0,%sp), %d2 ; 8-byte Folded Reload
@@ -696,19 +949,33 @@ start:
 }
 
 define i32 @atomicrmw_sub_i32_arid(ptr align 2 %self) {
-; NO-ATOMIC-LABEL: atomicrmw_sub_i32_arid:
-; NO-ATOMIC:         .cfi_startproc
-; NO-ATOMIC-NEXT:  ; %bb.0: ; %start
-; NO-ATOMIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT:    move.l (16,%sp), %a0
-; NO-ATOMIC-NEXT:    move.l (%a0), %d0
-; NO-ATOMIC-NEXT:    add.l #4, %d0
-; NO-ATOMIC-NEXT:    move.l %d0, (%sp)
-; NO-ATOMIC-NEXT:    move.l #1, (4,%sp)
-; NO-ATOMIC-NEXT:    jsr __sync_fetch_and_sub_4
-; NO-ATOMIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-NEXT:    rts
+; NO-ATOMIC-000-LABEL: atomicrmw_sub_i32_arid:
+; NO-ATOMIC-000:         .cfi_startproc
+; NO-ATOMIC-000-NEXT:  ; %bb.0: ; %start
+; NO-ATOMIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-000-NEXT:    move.l (16,%sp), %a0
+; NO-ATOMIC-000-NEXT:    move.l (%a0), %d0
+; NO-ATOMIC-000-NEXT:    add.l #4, %d0
+; NO-ATOMIC-000-NEXT:    move.l %d0, (%sp)
+; NO-ATOMIC-000-NEXT:    move.l #1, (4,%sp)
+; NO-ATOMIC-000-NEXT:    jsr __sync_fetch_and_sub_4
+; NO-ATOMIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-000-NEXT:    rts
+;
+; NO-ATOMIC-010-LABEL: atomicrmw_sub_i32_arid:
+; NO-ATOMIC-010:         .cfi_startproc
+; NO-ATOMIC-010-NEXT:  ; %bb.0: ; %start
+; NO-ATOMIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-010-NEXT:    move.l (16,%sp), %a0
+; NO-ATOMIC-010-NEXT:    move.l (%a0), %d0
+; NO-ATOMIC-010-NEXT:    add.l #4, %d0
+; NO-ATOMIC-010-NEXT:    move.l %d0, (%sp)
+; NO-ATOMIC-010-NEXT:    move.l #1, (4,%sp)
+; NO-ATOMIC-010-NEXT:    jsr __sync_fetch_and_sub_4
+; NO-ATOMIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-010-NEXT:    rts
 ;
 ; ATOMIC-LABEL: atomicrmw_sub_i32_arid:
 ; ATOMIC:         .cfi_startproc
@@ -730,7 +997,9 @@ define i32 @atomicrmw_sub_i32_arid(ptr align 2 %self) {
 ; ATOMIC-NEXT:    seq %d1
 ; ATOMIC-NEXT:    and.b #1, %d1
 ; ATOMIC-NEXT:    cmpi.b #0, %d1
+; ATOMIC-NEXT:    move.w %ccr, %d2
 ; ATOMIC-NEXT:    move.l %d0, %d1
+; ATOMIC-NEXT:    move.w %d2, %ccr
 ; ATOMIC-NEXT:    beq .LBB14_1
 ; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; ATOMIC-NEXT:    movem.l (0,%sp), %d2 ; 8-byte Folded Reload
diff --git a/llvm/test/CodeGen/M68k/CodeModel/Large/Atomics/rmw.ll b/llvm/test/CodeGen/M68k/CodeModel/Large/Atomics/rmw.ll
index 06b89adc597f0..d63e07777038f 100644
--- a/llvm/test/CodeGen/M68k/CodeModel/Large/Atomics/rmw.ll
+++ b/llvm/test/CodeGen/M68k/CodeModel/Large/Atomics/rmw.ll
@@ -1,8 +1,8 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc %s -o - -mtriple=m68k -mcpu=M68000 -verify-machineinstrs --code-model=large | FileCheck %s --check-prefix=NO-ATOMIC
-; RUN: llc %s -o - -mtriple=m68k -mcpu=M68010 -verify-machineinstrs --code-model=large | FileCheck %s --check-prefix=NO-ATOMIC
-; RUN: llc %s -o - -mtriple=m68k -mcpu=M68000 -verify-machineinstrs --code-model=large --relocation-model=pic | FileCheck %s --check-prefix=NO-ATOMIC-PIC
-; RUN: llc %s -o - -mtriple=m68k -mcpu=M68010 -verify-machineinstrs --code-model=large --relocation-model=pic | FileCheck %s --check-prefix=NO-ATOMIC-PIC
+; RUN: llc %s -o - -mtriple=m68k -mcpu=M68000 -verify-machineinstrs --code-model=large | FileCheck %s --check-prefix=NO-ATOMIC-000
+; RUN: llc %s -o - -mtriple=m68k -mcpu=M68010 -verify-machineinstrs --code-model=large | FileCheck %s --check-prefix=NO-ATOMIC-010
+; RUN: llc %s -o - -mtriple=m68k -mcpu=M68000 -verify-machineinstrs --code-model=large --relocation-model=pic | FileCheck %s --check-prefix=NO-ATOMIC-PIC-000
+; RUN: llc %s -o - -mtriple=m68k -mcpu=M68010 -verify-machineinstrs --code-model=large --relocation-model=pic | FileCheck %s --check-prefix=NO-ATOMIC-PIC-010
 ; RUN: llc %s -o - -mtriple=m68k -mcpu=M68020 -verify-machineinstrs --code-model=large | FileCheck %s --check-prefix=ATOMIC
 ; RUN: llc %s -o - -mtriple=m68k -mcpu=M68030 -verify-machineinstrs --code-model=large | FileCheck %s --check-prefix=ATOMIC
 ; RUN: llc %s -o - -mtriple=m68k -mcpu=M68040 -verify-machineinstrs --code-model=large | FileCheck %s --check-prefix=ATOMIC
@@ -11,31 +11,57 @@
 ; RUN: llc %s -o - -mtriple=m68k -mcpu=M68040 -verify-machineinstrs --code-model=large --relocation-model=pic | FileCheck %s --check-prefix=ATOMIC-PIC
 
 define i8 @atomicrmw_add_i8(i8 %val, ptr %ptr) {
-; NO-ATOMIC-LABEL: atomicrmw_add_i8:
-; NO-ATOMIC:         .cfi_startproc
-; NO-ATOMIC-NEXT:  ; %bb.0:
-; NO-ATOMIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT:    move.b (19,%sp), %d0
-; NO-ATOMIC-NEXT:    and.l #255, %d0
-; NO-ATOMIC-NEXT:    move.l %d0, (4,%sp)
-; NO-ATOMIC-NEXT:    move.l (20,%sp), (%sp)
-; NO-ATOMIC-NEXT:    jsr __sync_fetch_and_add_1
-; NO-ATOMIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-NEXT:    rts
-;
-; NO-ATOMIC-PIC-LABEL: atomicrmw_add_i8:
-; NO-ATOMIC-PIC:         .cfi_startproc
-; NO-ATOMIC-PIC-NEXT:  ; %bb.0:
-; NO-ATOMIC-PIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-PIC-NEXT:    move.b (19,%sp), %d0
-; NO-ATOMIC-PIC-NEXT:    and.l #255, %d0
-; NO-ATOMIC-PIC-NEXT:    move.l %d0, (4,%sp)
-; NO-ATOMIC-PIC-NEXT:    move.l (20,%sp), (%sp)
-; NO-ATOMIC-PIC-NEXT:    jsr (__sync_fetch_and_add_1@PLT,%pc)
-; NO-ATOMIC-PIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-PIC-NEXT:    rts
+; NO-ATOMIC-000-LABEL: atomicrmw_add_i8:
+; NO-ATOMIC-000:         .cfi_startproc
+; NO-ATOMIC-000-NEXT:  ; %bb.0:
+; NO-ATOMIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-000-NEXT:    move.b (19,%sp), %d0
+; NO-ATOMIC-000-NEXT:    and.l #255, %d0
+; NO-ATOMIC-000-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-000-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-000-NEXT:    jsr __sync_fetch_and_add_1
+; NO-ATOMIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-000-NEXT:    rts
+;
+; NO-ATOMIC-010-LABEL: atomicrmw_add_i8:
+; NO-ATOMIC-010:         .cfi_startproc
+; NO-ATOMIC-010-NEXT:  ; %bb.0:
+; NO-ATOMIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-010-NEXT:    move.b (19,%sp), %d0
+; NO-ATOMIC-010-NEXT:    and.l #255, %d0
+; NO-ATOMIC-010-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-010-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-010-NEXT:    jsr __sync_fetch_and_add_1
+; NO-ATOMIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-010-NEXT:    rts
+;
+; NO-ATOMIC-PIC-000-LABEL: atomicrmw_add_i8:
+; NO-ATOMIC-PIC-000:         .cfi_startproc
+; NO-ATOMIC-PIC-000-NEXT:  ; %bb.0:
+; NO-ATOMIC-PIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-000-NEXT:    move.b (19,%sp), %d0
+; NO-ATOMIC-PIC-000-NEXT:    and.l #255, %d0
+; NO-ATOMIC-PIC-000-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-PIC-000-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-PIC-000-NEXT:    jsr (__sync_fetch_and_add_1@PLT,%pc)
+; NO-ATOMIC-PIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-000-NEXT:    rts
+;
+; NO-ATOMIC-PIC-010-LABEL: atomicrmw_add_i8:
+; NO-ATOMIC-PIC-010:         .cfi_startproc
+; NO-ATOMIC-PIC-010-NEXT:  ; %bb.0:
+; NO-ATOMIC-PIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-010-NEXT:    move.b (19,%sp), %d0
+; NO-ATOMIC-PIC-010-NEXT:    and.l #255, %d0
+; NO-ATOMIC-PIC-010-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-PIC-010-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-PIC-010-NEXT:    jsr (__sync_fetch_and_add_1@PLT,%pc)
+; NO-ATOMIC-PIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-010-NEXT:    rts
 ;
 ; ATOMIC-LABEL: atomicrmw_add_i8:
 ; ATOMIC:         .cfi_startproc
@@ -57,7 +83,9 @@ define i8 @atomicrmw_add_i8(i8 %val, ptr %ptr) {
 ; ATOMIC-NEXT:    seq %d2
 ; ATOMIC-NEXT:    and.b #1, %d2
 ; ATOMIC-NEXT:    cmpi.b #0, %d2
+; ATOMIC-NEXT:    move.w %ccr, %d3
 ; ATOMIC-NEXT:    move.b %d0, %d2
+; ATOMIC-NEXT:    move.w %d3, %ccr
 ; ATOMIC-NEXT:    beq .LBB0_1
 ; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; ATOMIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
@@ -84,7 +112,9 @@ define i8 @atomicrmw_add_i8(i8 %val, ptr %ptr) {
 ; ATOMIC-PIC-NEXT:    seq %d2
 ; ATOMIC-PIC-NEXT:    and.b #1, %d2
 ; ATOMIC-PIC-NEXT:    cmpi.b #0, %d2
+; ATOMIC-PIC-NEXT:    move.w %ccr, %d3
 ; ATOMIC-PIC-NEXT:    move.b %d0, %d2
+; ATOMIC-PIC-NEXT:    move.w %d3, %ccr
 ; ATOMIC-PIC-NEXT:    beq .LBB0_1
 ; ATOMIC-PIC-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; ATOMIC-PIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
@@ -95,31 +125,57 @@ define i8 @atomicrmw_add_i8(i8 %val, ptr %ptr) {
 }
 
 define i16 @atomicrmw_sub_i16(i16 %val, ptr %ptr) {
-; NO-ATOMIC-LABEL: atomicrmw_sub_i16:
-; NO-ATOMIC:         .cfi_startproc
-; NO-ATOMIC-NEXT:  ; %bb.0:
-; NO-ATOMIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT:    move.w (18,%sp), %d0
-; NO-ATOMIC-NEXT:    and.l #65535, %d0
-; NO-ATOMIC-NEXT:    move.l %d0, (4,%sp)
-; NO-ATOMIC-NEXT:    move.l (20,%sp), (%sp)
-; NO-ATOMIC-NEXT:    jsr __sync_fetch_and_sub_2
-; NO-ATOMIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-NEXT:    rts
-;
-; NO-ATOMIC-PIC-LABEL: atomicrmw_sub_i16:
-; NO-ATOMIC-PIC:         .cfi_startproc
-; NO-ATOMIC-PIC-NEXT:  ; %bb.0:
-; NO-ATOMIC-PIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-PIC-NEXT:    move.w (18,%sp), %d0
-; NO-ATOMIC-PIC-NEXT:    and.l #65535, %d0
-; NO-ATOMIC-PIC-NEXT:    move.l %d0, (4,%sp)
-; NO-ATOMIC-PIC-NEXT:    move.l (20,%sp), (%sp)
-; NO-ATOMIC-PIC-NEXT:    jsr (__sync_fetch_and_sub_2@PLT,%pc)
-; NO-ATOMIC-PIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-PIC-NEXT:    rts
+; NO-ATOMIC-000-LABEL: atomicrmw_sub_i16:
+; NO-ATOMIC-000:         .cfi_startproc
+; NO-ATOMIC-000-NEXT:  ; %bb.0:
+; NO-ATOMIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-000-NEXT:    move.w (18,%sp), %d0
+; NO-ATOMIC-000-NEXT:    and.l #65535, %d0
+; NO-ATOMIC-000-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-000-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-000-NEXT:    jsr __sync_fetch_and_sub_2
+; NO-ATOMIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-000-NEXT:    rts
+;
+; NO-ATOMIC-010-LABEL: atomicrmw_sub_i16:
+; NO-ATOMIC-010:         .cfi_startproc
+; NO-ATOMIC-010-NEXT:  ; %bb.0:
+; NO-ATOMIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-010-NEXT:    move.w (18,%sp), %d0
+; NO-ATOMIC-010-NEXT:    and.l #65535, %d0
+; NO-ATOMIC-010-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-010-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-010-NEXT:    jsr __sync_fetch_and_sub_2
+; NO-ATOMIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-010-NEXT:    rts
+;
+; NO-ATOMIC-PIC-000-LABEL: atomicrmw_sub_i16:
+; NO-ATOMIC-PIC-000:         .cfi_startproc
+; NO-ATOMIC-PIC-000-NEXT:  ; %bb.0:
+; NO-ATOMIC-PIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-000-NEXT:    move.w (18,%sp), %d0
+; NO-ATOMIC-PIC-000-NEXT:    and.l #65535, %d0
+; NO-ATOMIC-PIC-000-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-PIC-000-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-PIC-000-NEXT:    jsr (__sync_fetch_and_sub_2@PLT,%pc)
+; NO-ATOMIC-PIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-000-NEXT:    rts
+;
+; NO-ATOMIC-PIC-010-LABEL: atomicrmw_sub_i16:
+; NO-ATOMIC-PIC-010:         .cfi_startproc
+; NO-ATOMIC-PIC-010-NEXT:  ; %bb.0:
+; NO-ATOMIC-PIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-010-NEXT:    move.w (18,%sp), %d0
+; NO-ATOMIC-PIC-010-NEXT:    and.l #65535, %d0
+; NO-ATOMIC-PIC-010-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-PIC-010-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-PIC-010-NEXT:    jsr (__sync_fetch_and_sub_2@PLT,%pc)
+; NO-ATOMIC-PIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-010-NEXT:    rts
 ;
 ; ATOMIC-LABEL: atomicrmw_sub_i16:
 ; ATOMIC:         .cfi_startproc
@@ -141,7 +197,9 @@ define i16 @atomicrmw_sub_i16(i16 %val, ptr %ptr) {
 ; ATOMIC-NEXT:    seq %d2
 ; ATOMIC-NEXT:    and.b #1, %d2
 ; ATOMIC-NEXT:    cmpi.b #0, %d2
+; ATOMIC-NEXT:    move.w %ccr, %d3
 ; ATOMIC-NEXT:    move.w %d0, %d2
+; ATOMIC-NEXT:    move.w %d3, %ccr
 ; ATOMIC-NEXT:    beq .LBB1_1
 ; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; ATOMIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
@@ -168,7 +226,9 @@ define i16 @atomicrmw_sub_i16(i16 %val, ptr %ptr) {
 ; ATOMIC-PIC-NEXT:    seq %d2
 ; ATOMIC-PIC-NEXT:    and.b #1, %d2
 ; ATOMIC-PIC-NEXT:    cmpi.b #0, %d2
+; ATOMIC-PIC-NEXT:    move.w %ccr, %d3
 ; ATOMIC-PIC-NEXT:    move.w %d0, %d2
+; ATOMIC-PIC-NEXT:    move.w %d3, %ccr
 ; ATOMIC-PIC-NEXT:    beq .LBB1_1
 ; ATOMIC-PIC-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; ATOMIC-PIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
@@ -179,27 +239,49 @@ define i16 @atomicrmw_sub_i16(i16 %val, ptr %ptr) {
 }
 
 define i32 @atomicrmw_and_i32(i32 %val, ptr %ptr) {
-; NO-ATOMIC-LABEL: atomicrmw_and_i32:
-; NO-ATOMIC:         .cfi_startproc
-; NO-ATOMIC-NEXT:  ; %bb.0:
-; NO-ATOMIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT:    move.l (16,%sp), (4,%sp)
-; NO-ATOMIC-NEXT:    move.l (20,%sp), (%sp)
-; NO-ATOMIC-NEXT:    jsr __sync_fetch_and_and_4
-; NO-ATOMIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-NEXT:    rts
-;
-; NO-ATOMIC-PIC-LABEL: atomicrmw_and_i32:
-; NO-ATOMIC-PIC:         .cfi_startproc
-; NO-ATOMIC-PIC-NEXT:  ; %bb.0:
-; NO-ATOMIC-PIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-PIC-NEXT:    move.l (16,%sp), (4,%sp)
-; NO-ATOMIC-PIC-NEXT:    move.l (20,%sp), (%sp)
-; NO-ATOMIC-PIC-NEXT:    jsr (__sync_fetch_and_and_4@PLT,%pc)
-; NO-ATOMIC-PIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-PIC-NEXT:    rts
+; NO-ATOMIC-000-LABEL: atomicrmw_and_i32:
+; NO-ATOMIC-000:         .cfi_startproc
+; NO-ATOMIC-000-NEXT:  ; %bb.0:
+; NO-ATOMIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-000-NEXT:    move.l (16,%sp), (4,%sp)
+; NO-ATOMIC-000-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-000-NEXT:    jsr __sync_fetch_and_and_4
+; NO-ATOMIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-000-NEXT:    rts
+;
+; NO-ATOMIC-010-LABEL: atomicrmw_and_i32:
+; NO-ATOMIC-010:         .cfi_startproc
+; NO-ATOMIC-010-NEXT:  ; %bb.0:
+; NO-ATOMIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-010-NEXT:    move.l (16,%sp), (4,%sp)
+; NO-ATOMIC-010-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-010-NEXT:    jsr __sync_fetch_and_and_4
+; NO-ATOMIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-010-NEXT:    rts
+;
+; NO-ATOMIC-PIC-000-LABEL: atomicrmw_and_i32:
+; NO-ATOMIC-PIC-000:         .cfi_startproc
+; NO-ATOMIC-PIC-000-NEXT:  ; %bb.0:
+; NO-ATOMIC-PIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-000-NEXT:    move.l (16,%sp), (4,%sp)
+; NO-ATOMIC-PIC-000-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-PIC-000-NEXT:    jsr (__sync_fetch_and_and_4@PLT,%pc)
+; NO-ATOMIC-PIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-000-NEXT:    rts
+;
+; NO-ATOMIC-PIC-010-LABEL: atomicrmw_and_i32:
+; NO-ATOMIC-PIC-010:         .cfi_startproc
+; NO-ATOMIC-PIC-010-NEXT:  ; %bb.0:
+; NO-ATOMIC-PIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-010-NEXT:    move.l (16,%sp), (4,%sp)
+; NO-ATOMIC-PIC-010-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-PIC-010-NEXT:    jsr (__sync_fetch_and_and_4@PLT,%pc)
+; NO-ATOMIC-PIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-010-NEXT:    rts
 ;
 ; ATOMIC-LABEL: atomicrmw_and_i32:
 ; ATOMIC:         .cfi_startproc
@@ -221,7 +303,9 @@ define i32 @atomicrmw_and_i32(i32 %val, ptr %ptr) {
 ; ATOMIC-NEXT:    seq %d2
 ; ATOMIC-NEXT:    and.b #1, %d2
 ; ATOMIC-NEXT:    cmpi.b #0, %d2
+; ATOMIC-NEXT:    move.w %ccr, %d3
 ; ATOMIC-NEXT:    move.l %d0, %d2
+; ATOMIC-NEXT:    move.w %d3, %ccr
 ; ATOMIC-NEXT:    beq .LBB2_1
 ; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; ATOMIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
@@ -248,7 +332,9 @@ define i32 @atomicrmw_and_i32(i32 %val, ptr %ptr) {
 ; ATOMIC-PIC-NEXT:    seq %d2
 ; ATOMIC-PIC-NEXT:    and.b #1, %d2
 ; ATOMIC-PIC-NEXT:    cmpi.b #0, %d2
+; ATOMIC-PIC-NEXT:    move.w %ccr, %d3
 ; ATOMIC-PIC-NEXT:    move.l %d0, %d2
+; ATOMIC-PIC-NEXT:    move.w %d3, %ccr
 ; ATOMIC-PIC-NEXT:    beq .LBB2_1
 ; ATOMIC-PIC-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; ATOMIC-PIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
@@ -259,31 +345,57 @@ define i32 @atomicrmw_and_i32(i32 %val, ptr %ptr) {
 }
 
 define i64 @atomicrmw_xor_i64(i64 %val, ptr %ptr) {
-; NO-ATOMIC-LABEL: atomicrmw_xor_i64:
-; NO-ATOMIC:         .cfi_startproc
-; NO-ATOMIC-NEXT:  ; %bb.0:
-; NO-ATOMIC-NEXT:    suba.l #20, %sp
-; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -24
-; NO-ATOMIC-NEXT:    move.l #3, (12,%sp)
-; NO-ATOMIC-NEXT:    move.l (28,%sp), (8,%sp)
-; NO-ATOMIC-NEXT:    move.l (24,%sp), (4,%sp)
-; NO-ATOMIC-NEXT:    move.l (32,%sp), (%sp)
-; NO-ATOMIC-NEXT:    jsr __atomic_fetch_xor_8
-; NO-ATOMIC-NEXT:    adda.l #20, %sp
-; NO-ATOMIC-NEXT:    rts
-;
-; NO-ATOMIC-PIC-LABEL: atomicrmw_xor_i64:
-; NO-ATOMIC-PIC:         .cfi_startproc
-; NO-ATOMIC-PIC-NEXT:  ; %bb.0:
-; NO-ATOMIC-PIC-NEXT:    suba.l #20, %sp
-; NO-ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -24
-; NO-ATOMIC-PIC-NEXT:    move.l #3, (12,%sp)
-; NO-ATOMIC-PIC-NEXT:    move.l (28,%sp), (8,%sp)
-; NO-ATOMIC-PIC-NEXT:    move.l (24,%sp), (4,%sp)
-; NO-ATOMIC-PIC-NEXT:    move.l (32,%sp), (%sp)
-; NO-ATOMIC-PIC-NEXT:    jsr (__atomic_fetch_xor_8@PLT,%pc)
-; NO-ATOMIC-PIC-NEXT:    adda.l #20, %sp
-; NO-ATOMIC-PIC-NEXT:    rts
+; NO-ATOMIC-000-LABEL: atomicrmw_xor_i64:
+; NO-ATOMIC-000:         .cfi_startproc
+; NO-ATOMIC-000-NEXT:  ; %bb.0:
+; NO-ATOMIC-000-NEXT:    suba.l #20, %sp
+; NO-ATOMIC-000-NEXT:    .cfi_def_cfa_offset -24
+; NO-ATOMIC-000-NEXT:    move.l #3, (12,%sp)
+; NO-ATOMIC-000-NEXT:    move.l (28,%sp), (8,%sp)
+; NO-ATOMIC-000-NEXT:    move.l (24,%sp), (4,%sp)
+; NO-ATOMIC-000-NEXT:    move.l (32,%sp), (%sp)
+; NO-ATOMIC-000-NEXT:    jsr __atomic_fetch_xor_8
+; NO-ATOMIC-000-NEXT:    adda.l #20, %sp
+; NO-ATOMIC-000-NEXT:    rts
+;
+; NO-ATOMIC-010-LABEL: atomicrmw_xor_i64:
+; NO-ATOMIC-010:         .cfi_startproc
+; NO-ATOMIC-010-NEXT:  ; %bb.0:
+; NO-ATOMIC-010-NEXT:    suba.l #20, %sp
+; NO-ATOMIC-010-NEXT:    .cfi_def_cfa_offset -24
+; NO-ATOMIC-010-NEXT:    move.l #3, (12,%sp)
+; NO-ATOMIC-010-NEXT:    move.l (28,%sp), (8,%sp)
+; NO-ATOMIC-010-NEXT:    move.l (24,%sp), (4,%sp)
+; NO-ATOMIC-010-NEXT:    move.l (32,%sp), (%sp)
+; NO-ATOMIC-010-NEXT:    jsr __atomic_fetch_xor_8
+; NO-ATOMIC-010-NEXT:    adda.l #20, %sp
+; NO-ATOMIC-010-NEXT:    rts
+;
+; NO-ATOMIC-PIC-000-LABEL: atomicrmw_xor_i64:
+; NO-ATOMIC-PIC-000:         .cfi_startproc
+; NO-ATOMIC-PIC-000-NEXT:  ; %bb.0:
+; NO-ATOMIC-PIC-000-NEXT:    suba.l #20, %sp
+; NO-ATOMIC-PIC-000-NEXT:    .cfi_def_cfa_offset -24
+; NO-ATOMIC-PIC-000-NEXT:    move.l #3, (12,%sp)
+; NO-ATOMIC-PIC-000-NEXT:    move.l (28,%sp), (8,%sp)
+; NO-ATOMIC-PIC-000-NEXT:    move.l (24,%sp), (4,%sp)
+; NO-ATOMIC-PIC-000-NEXT:    move.l (32,%sp), (%sp)
+; NO-ATOMIC-PIC-000-NEXT:    jsr (__atomic_fetch_xor_8@PLT,%pc)
+; NO-ATOMIC-PIC-000-NEXT:    adda.l #20, %sp
+; NO-ATOMIC-PIC-000-NEXT:    rts
+;
+; NO-ATOMIC-PIC-010-LABEL: atomicrmw_xor_i64:
+; NO-ATOMIC-PIC-010:         .cfi_startproc
+; NO-ATOMIC-PIC-010-NEXT:  ; %bb.0:
+; NO-ATOMIC-PIC-010-NEXT:    suba.l #20, %sp
+; NO-ATOMIC-PIC-010-NEXT:    .cfi_def_cfa_offset -24
+; NO-ATOMIC-PIC-010-NEXT:    move.l #3, (12,%sp)
+; NO-ATOMIC-PIC-010-NEXT:    move.l (28,%sp), (8,%sp)
+; NO-ATOMIC-PIC-010-NEXT:    move.l (24,%sp), (4,%sp)
+; NO-ATOMIC-PIC-010-NEXT:    move.l (32,%sp), (%sp)
+; NO-ATOMIC-PIC-010-NEXT:    jsr (__atomic_fetch_xor_8@PLT,%pc)
+; NO-ATOMIC-PIC-010-NEXT:    adda.l #20, %sp
+; NO-ATOMIC-PIC-010-NEXT:    rts
 ;
 ; ATOMIC-LABEL: atomicrmw_xor_i64:
 ; ATOMIC:         .cfi_startproc
@@ -315,31 +427,57 @@ define i64 @atomicrmw_xor_i64(i64 %val, ptr %ptr) {
 }
 
 define i8 @atomicrmw_or_i8(i8 %val, ptr %ptr) {
-; NO-ATOMIC-LABEL: atomicrmw_or_i8:
-; NO-ATOMIC:         .cfi_startproc
-; NO-ATOMIC-NEXT:  ; %bb.0:
-; NO-ATOMIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT:    move.b (19,%sp), %d0
-; NO-ATOMIC-NEXT:    and.l #255, %d0
-; NO-ATOMIC-NEXT:    move.l %d0, (4,%sp)
-; NO-ATOMIC-NEXT:    move.l (20,%sp), (%sp)
-; NO-ATOMIC-NEXT:    jsr __sync_fetch_and_or_1
-; NO-ATOMIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-NEXT:    rts
-;
-; NO-ATOMIC-PIC-LABEL: atomicrmw_or_i8:
-; NO-ATOMIC-PIC:         .cfi_startproc
-; NO-ATOMIC-PIC-NEXT:  ; %bb.0:
-; NO-ATOMIC-PIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-PIC-NEXT:    move.b (19,%sp), %d0
-; NO-ATOMIC-PIC-NEXT:    and.l #255, %d0
-; NO-ATOMIC-PIC-NEXT:    move.l %d0, (4,%sp)
-; NO-ATOMIC-PIC-NEXT:    move.l (20,%sp), (%sp)
-; NO-ATOMIC-PIC-NEXT:    jsr (__sync_fetch_and_or_1@PLT,%pc)
-; NO-ATOMIC-PIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-PIC-NEXT:    rts
+; NO-ATOMIC-000-LABEL: atomicrmw_or_i8:
+; NO-ATOMIC-000:         .cfi_startproc
+; NO-ATOMIC-000-NEXT:  ; %bb.0:
+; NO-ATOMIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-000-NEXT:    move.b (19,%sp), %d0
+; NO-ATOMIC-000-NEXT:    and.l #255, %d0
+; NO-ATOMIC-000-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-000-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-000-NEXT:    jsr __sync_fetch_and_or_1
+; NO-ATOMIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-000-NEXT:    rts
+;
+; NO-ATOMIC-010-LABEL: atomicrmw_or_i8:
+; NO-ATOMIC-010:         .cfi_startproc
+; NO-ATOMIC-010-NEXT:  ; %bb.0:
+; NO-ATOMIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-010-NEXT:    move.b (19,%sp), %d0
+; NO-ATOMIC-010-NEXT:    and.l #255, %d0
+; NO-ATOMIC-010-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-010-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-010-NEXT:    jsr __sync_fetch_and_or_1
+; NO-ATOMIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-010-NEXT:    rts
+;
+; NO-ATOMIC-PIC-000-LABEL: atomicrmw_or_i8:
+; NO-ATOMIC-PIC-000:         .cfi_startproc
+; NO-ATOMIC-PIC-000-NEXT:  ; %bb.0:
+; NO-ATOMIC-PIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-000-NEXT:    move.b (19,%sp), %d0
+; NO-ATOMIC-PIC-000-NEXT:    and.l #255, %d0
+; NO-ATOMIC-PIC-000-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-PIC-000-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-PIC-000-NEXT:    jsr (__sync_fetch_and_or_1@PLT,%pc)
+; NO-ATOMIC-PIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-000-NEXT:    rts
+;
+; NO-ATOMIC-PIC-010-LABEL: atomicrmw_or_i8:
+; NO-ATOMIC-PIC-010:         .cfi_startproc
+; NO-ATOMIC-PIC-010-NEXT:  ; %bb.0:
+; NO-ATOMIC-PIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-010-NEXT:    move.b (19,%sp), %d0
+; NO-ATOMIC-PIC-010-NEXT:    and.l #255, %d0
+; NO-ATOMIC-PIC-010-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-PIC-010-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-PIC-010-NEXT:    jsr (__sync_fetch_and_or_1@PLT,%pc)
+; NO-ATOMIC-PIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-010-NEXT:    rts
 ;
 ; ATOMIC-LABEL: atomicrmw_or_i8:
 ; ATOMIC:         .cfi_startproc
@@ -361,7 +499,9 @@ define i8 @atomicrmw_or_i8(i8 %val, ptr %ptr) {
 ; ATOMIC-NEXT:    seq %d2
 ; ATOMIC-NEXT:    and.b #1, %d2
 ; ATOMIC-NEXT:    cmpi.b #0, %d2
+; ATOMIC-NEXT:    move.w %ccr, %d3
 ; ATOMIC-NEXT:    move.b %d0, %d2
+; ATOMIC-NEXT:    move.w %d3, %ccr
 ; ATOMIC-NEXT:    beq .LBB4_1
 ; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; ATOMIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
@@ -388,7 +528,9 @@ define i8 @atomicrmw_or_i8(i8 %val, ptr %ptr) {
 ; ATOMIC-PIC-NEXT:    seq %d2
 ; ATOMIC-PIC-NEXT:    and.b #1, %d2
 ; ATOMIC-PIC-NEXT:    cmpi.b #0, %d2
+; ATOMIC-PIC-NEXT:    move.w %ccr, %d3
 ; ATOMIC-PIC-NEXT:    move.b %d0, %d2
+; ATOMIC-PIC-NEXT:    move.w %d3, %ccr
 ; ATOMIC-PIC-NEXT:    beq .LBB4_1
 ; ATOMIC-PIC-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; ATOMIC-PIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
@@ -399,39 +541,73 @@ define i8 @atomicrmw_or_i8(i8 %val, ptr %ptr) {
 }
 
 define i16 @atmoicrmw_nand_i16(i16 %val, ptr %ptr) {
-; NO-ATOMIC-LABEL: atmoicrmw_nand_i16:
-; NO-ATOMIC:         .cfi_startproc
-; NO-ATOMIC-NEXT:  ; %bb.0:
-; NO-ATOMIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT:    movem.l %d2, (8,%sp) ; 8-byte Folded Spill
-; NO-ATOMIC-NEXT:    move.w (18,%sp), %d2
-; NO-ATOMIC-NEXT:    move.l %d2, %d0
-; NO-ATOMIC-NEXT:    and.l #65535, %d0
-; NO-ATOMIC-NEXT:    move.l %d0, (4,%sp)
-; NO-ATOMIC-NEXT:    move.l (20,%sp), (%sp)
-; NO-ATOMIC-NEXT:    jsr __sync_fetch_and_nand_2
-; NO-ATOMIC-NEXT:    move.w %d2, %d0
-; NO-ATOMIC-NEXT:    movem.l (8,%sp), %d2 ; 8-byte Folded Reload
-; NO-ATOMIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-NEXT:    rts
-;
-; NO-ATOMIC-PIC-LABEL: atmoicrmw_nand_i16:
-; NO-ATOMIC-PIC:         .cfi_startproc
-; NO-ATOMIC-PIC-NEXT:  ; %bb.0:
-; NO-ATOMIC-PIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-PIC-NEXT:    movem.l %d2, (8,%sp) ; 8-byte Folded Spill
-; NO-ATOMIC-PIC-NEXT:    move.w (18,%sp), %d2
-; NO-ATOMIC-PIC-NEXT:    move.l %d2, %d0
-; NO-ATOMIC-PIC-NEXT:    and.l #65535, %d0
-; NO-ATOMIC-PIC-NEXT:    move.l %d0, (4,%sp)
-; NO-ATOMIC-PIC-NEXT:    move.l (20,%sp), (%sp)
-; NO-ATOMIC-PIC-NEXT:    jsr (__sync_fetch_and_nand_2@PLT,%pc)
-; NO-ATOMIC-PIC-NEXT:    move.w %d2, %d0
-; NO-ATOMIC-PIC-NEXT:    movem.l (8,%sp), %d2 ; 8-byte Folded Reload
-; NO-ATOMIC-PIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-PIC-NEXT:    rts
+; NO-ATOMIC-000-LABEL: atmoicrmw_nand_i16:
+; NO-ATOMIC-000:         .cfi_startproc
+; NO-ATOMIC-000-NEXT:  ; %bb.0:
+; NO-ATOMIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-000-NEXT:    movem.l %d2, (8,%sp) ; 8-byte Folded Spill
+; NO-ATOMIC-000-NEXT:    move.w (18,%sp), %d2
+; NO-ATOMIC-000-NEXT:    move.l %d2, %d0
+; NO-ATOMIC-000-NEXT:    and.l #65535, %d0
+; NO-ATOMIC-000-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-000-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-000-NEXT:    jsr __sync_fetch_and_nand_2
+; NO-ATOMIC-000-NEXT:    move.w %d2, %d0
+; NO-ATOMIC-000-NEXT:    movem.l (8,%sp), %d2 ; 8-byte Folded Reload
+; NO-ATOMIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-000-NEXT:    rts
+;
+; NO-ATOMIC-010-LABEL: atmoicrmw_nand_i16:
+; NO-ATOMIC-010:         .cfi_startproc
+; NO-ATOMIC-010-NEXT:  ; %bb.0:
+; NO-ATOMIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-010-NEXT:    movem.l %d2, (8,%sp) ; 8-byte Folded Spill
+; NO-ATOMIC-010-NEXT:    move.w (18,%sp), %d2
+; NO-ATOMIC-010-NEXT:    move.l %d2, %d0
+; NO-ATOMIC-010-NEXT:    and.l #65535, %d0
+; NO-ATOMIC-010-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-010-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-010-NEXT:    jsr __sync_fetch_and_nand_2
+; NO-ATOMIC-010-NEXT:    move.w %d2, %d0
+; NO-ATOMIC-010-NEXT:    movem.l (8,%sp), %d2 ; 8-byte Folded Reload
+; NO-ATOMIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-010-NEXT:    rts
+;
+; NO-ATOMIC-PIC-000-LABEL: atmoicrmw_nand_i16:
+; NO-ATOMIC-PIC-000:         .cfi_startproc
+; NO-ATOMIC-PIC-000-NEXT:  ; %bb.0:
+; NO-ATOMIC-PIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-000-NEXT:    movem.l %d2, (8,%sp) ; 8-byte Folded Spill
+; NO-ATOMIC-PIC-000-NEXT:    move.w (18,%sp), %d2
+; NO-ATOMIC-PIC-000-NEXT:    move.l %d2, %d0
+; NO-ATOMIC-PIC-000-NEXT:    and.l #65535, %d0
+; NO-ATOMIC-PIC-000-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-PIC-000-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-PIC-000-NEXT:    jsr (__sync_fetch_and_nand_2@PLT,%pc)
+; NO-ATOMIC-PIC-000-NEXT:    move.w %d2, %d0
+; NO-ATOMIC-PIC-000-NEXT:    movem.l (8,%sp), %d2 ; 8-byte Folded Reload
+; NO-ATOMIC-PIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-000-NEXT:    rts
+;
+; NO-ATOMIC-PIC-010-LABEL: atmoicrmw_nand_i16:
+; NO-ATOMIC-PIC-010:         .cfi_startproc
+; NO-ATOMIC-PIC-010-NEXT:  ; %bb.0:
+; NO-ATOMIC-PIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-010-NEXT:    movem.l %d2, (8,%sp) ; 8-byte Folded Spill
+; NO-ATOMIC-PIC-010-NEXT:    move.w (18,%sp), %d2
+; NO-ATOMIC-PIC-010-NEXT:    move.l %d2, %d0
+; NO-ATOMIC-PIC-010-NEXT:    and.l #65535, %d0
+; NO-ATOMIC-PIC-010-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-PIC-010-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-PIC-010-NEXT:    jsr (__sync_fetch_and_nand_2@PLT,%pc)
+; NO-ATOMIC-PIC-010-NEXT:    move.w %d2, %d0
+; NO-ATOMIC-PIC-010-NEXT:    movem.l (8,%sp), %d2 ; 8-byte Folded Reload
+; NO-ATOMIC-PIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-010-NEXT:    rts
 ;
 ; ATOMIC-LABEL: atmoicrmw_nand_i16:
 ; ATOMIC:         .cfi_startproc
@@ -454,7 +630,9 @@ define i16 @atmoicrmw_nand_i16(i16 %val, ptr %ptr) {
 ; ATOMIC-NEXT:    seq %d2
 ; ATOMIC-NEXT:    and.b #1, %d2
 ; ATOMIC-NEXT:    cmpi.b #0, %d2
+; ATOMIC-NEXT:    move.w %ccr, %d3
 ; ATOMIC-NEXT:    move.w %d1, %d2
+; ATOMIC-NEXT:    move.w %d3, %ccr
 ; ATOMIC-NEXT:    beq .LBB5_1
 ; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; ATOMIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
@@ -482,7 +660,9 @@ define i16 @atmoicrmw_nand_i16(i16 %val, ptr %ptr) {
 ; ATOMIC-PIC-NEXT:    seq %d2
 ; ATOMIC-PIC-NEXT:    and.b #1, %d2
 ; ATOMIC-PIC-NEXT:    cmpi.b #0, %d2
+; ATOMIC-PIC-NEXT:    move.w %ccr, %d3
 ; ATOMIC-PIC-NEXT:    move.w %d1, %d2
+; ATOMIC-PIC-NEXT:    move.w %d3, %ccr
 ; ATOMIC-PIC-NEXT:    beq .LBB5_1
 ; ATOMIC-PIC-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; ATOMIC-PIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
@@ -493,27 +673,49 @@ define i16 @atmoicrmw_nand_i16(i16 %val, ptr %ptr) {
 }
 
 define i32 @atomicrmw_min_i32(i32 %val, ptr %ptr) {
-; NO-ATOMIC-LABEL: atomicrmw_min_i32:
-; NO-ATOMIC:         .cfi_startproc
-; NO-ATOMIC-NEXT:  ; %bb.0:
-; NO-ATOMIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT:    move.l (16,%sp), (4,%sp)
-; NO-ATOMIC-NEXT:    move.l (20,%sp), (%sp)
-; NO-ATOMIC-NEXT:    jsr __sync_fetch_and_min_4
-; NO-ATOMIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-NEXT:    rts
-;
-; NO-ATOMIC-PIC-LABEL: atomicrmw_min_i32:
-; NO-ATOMIC-PIC:         .cfi_startproc
-; NO-ATOMIC-PIC-NEXT:  ; %bb.0:
-; NO-ATOMIC-PIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-PIC-NEXT:    move.l (16,%sp), (4,%sp)
-; NO-ATOMIC-PIC-NEXT:    move.l (20,%sp), (%sp)
-; NO-ATOMIC-PIC-NEXT:    jsr (__sync_fetch_and_min_4@PLT,%pc)
-; NO-ATOMIC-PIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-PIC-NEXT:    rts
+; NO-ATOMIC-000-LABEL: atomicrmw_min_i32:
+; NO-ATOMIC-000:         .cfi_startproc
+; NO-ATOMIC-000-NEXT:  ; %bb.0:
+; NO-ATOMIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-000-NEXT:    move.l (16,%sp), (4,%sp)
+; NO-ATOMIC-000-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-000-NEXT:    jsr __sync_fetch_and_min_4
+; NO-ATOMIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-000-NEXT:    rts
+;
+; NO-ATOMIC-010-LABEL: atomicrmw_min_i32:
+; NO-ATOMIC-010:         .cfi_startproc
+; NO-ATOMIC-010-NEXT:  ; %bb.0:
+; NO-ATOMIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-010-NEXT:    move.l (16,%sp), (4,%sp)
+; NO-ATOMIC-010-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-010-NEXT:    jsr __sync_fetch_and_min_4
+; NO-ATOMIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-010-NEXT:    rts
+;
+; NO-ATOMIC-PIC-000-LABEL: atomicrmw_min_i32:
+; NO-ATOMIC-PIC-000:         .cfi_startproc
+; NO-ATOMIC-PIC-000-NEXT:  ; %bb.0:
+; NO-ATOMIC-PIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-000-NEXT:    move.l (16,%sp), (4,%sp)
+; NO-ATOMIC-PIC-000-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-PIC-000-NEXT:    jsr (__sync_fetch_and_min_4@PLT,%pc)
+; NO-ATOMIC-PIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-000-NEXT:    rts
+;
+; NO-ATOMIC-PIC-010-LABEL: atomicrmw_min_i32:
+; NO-ATOMIC-PIC-010:         .cfi_startproc
+; NO-ATOMIC-PIC-010-NEXT:  ; %bb.0:
+; NO-ATOMIC-PIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-010-NEXT:    move.l (16,%sp), (4,%sp)
+; NO-ATOMIC-PIC-010-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-PIC-010-NEXT:    jsr (__sync_fetch_and_min_4@PLT,%pc)
+; NO-ATOMIC-PIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-010-NEXT:    rts
 ;
 ; ATOMIC-LABEL: atomicrmw_min_i32:
 ; ATOMIC:         .cfi_startproc
@@ -534,13 +736,17 @@ define i32 @atomicrmw_min_i32(i32 %val, ptr %ptr) {
 ; ATOMIC-NEXT:    seq %d2
 ; ATOMIC-NEXT:    and.b #1, %d2
 ; ATOMIC-NEXT:    cmpi.b #0, %d2
+; ATOMIC-NEXT:    move.w %ccr, %d3
 ; ATOMIC-NEXT:    move.l %d0, %d2
+; ATOMIC-NEXT:    move.w %d3, %ccr
 ; ATOMIC-NEXT:    bne .LBB6_4
 ; ATOMIC-NEXT:  .LBB6_1: ; %atomicrmw.start
 ; ATOMIC-NEXT:    ; =>This Inner Loop Header: Depth=1
 ; ATOMIC-NEXT:    move.l %d2, %d0
 ; ATOMIC-NEXT:    sub.l %d1, %d0
+; ATOMIC-NEXT:    move.w %ccr, %d0
 ; ATOMIC-NEXT:    move.l %d2, %d3
+; ATOMIC-NEXT:    move.w %d0, %ccr
 ; ATOMIC-NEXT:    ble .LBB6_3
 ; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.start
 ; ATOMIC-NEXT:    ; in Loop: Header=BB6_1 Depth=1
@@ -570,13 +776,17 @@ define i32 @atomicrmw_min_i32(i32 %val, ptr %ptr) {
 ; ATOMIC-PIC-NEXT:    seq %d2
 ; ATOMIC-PIC-NEXT:    and.b #1, %d2
 ; ATOMIC-PIC-NEXT:    cmpi.b #0, %d2
+; ATOMIC-PIC-NEXT:    move.w %ccr, %d3
 ; ATOMIC-PIC-NEXT:    move.l %d0, %d2
+; ATOMIC-PIC-NEXT:    move.w %d3, %ccr
 ; ATOMIC-PIC-NEXT:    bne .LBB6_4
 ; ATOMIC-PIC-NEXT:  .LBB6_1: ; %atomicrmw.start
 ; ATOMIC-PIC-NEXT:    ; =>This Inner Loop Header: Depth=1
 ; ATOMIC-PIC-NEXT:    move.l %d2, %d0
 ; ATOMIC-PIC-NEXT:    sub.l %d1, %d0
+; ATOMIC-PIC-NEXT:    move.w %ccr, %d0
 ; ATOMIC-PIC-NEXT:    move.l %d2, %d3
+; ATOMIC-PIC-NEXT:    move.w %d0, %ccr
 ; ATOMIC-PIC-NEXT:    ble .LBB6_3
 ; ATOMIC-PIC-NEXT:  ; %bb.2: ; %atomicrmw.start
 ; ATOMIC-PIC-NEXT:    ; in Loop: Header=BB6_1 Depth=1
@@ -591,101 +801,205 @@ define i32 @atomicrmw_min_i32(i32 %val, ptr %ptr) {
 }
 
 define i64 @atomicrmw_max_i64(i64 %val, ptr %ptr) {
-; NO-ATOMIC-LABEL: atomicrmw_max_i64:
-; NO-ATOMIC:         .cfi_startproc
-; NO-ATOMIC-NEXT:  ; %bb.0:
-; NO-ATOMIC-NEXT:    suba.l #52, %sp
-; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -56
-; NO-ATOMIC-NEXT:    movem.l %d2-%d4/%a2-%a3, (32,%sp) ; 24-byte Folded Spill
-; NO-ATOMIC-NEXT:    move.l (60,%sp), %d3
-; NO-ATOMIC-NEXT:    move.l (56,%sp), %d4
-; NO-ATOMIC-NEXT:    move.l (64,%sp), %a2
-; NO-ATOMIC-NEXT:    move.l (4,%a2), %d1
-; NO-ATOMIC-NEXT:    move.l (%a2), %d0
-; NO-ATOMIC-NEXT:    lea (24,%sp), %a3
-; NO-ATOMIC-NEXT:    bra .LBB7_1
-; NO-ATOMIC-NEXT:  .LBB7_3: ; %atomicrmw.start
-; NO-ATOMIC-NEXT:    ; in Loop: Header=BB7_1 Depth=1
-; NO-ATOMIC-NEXT:    move.l %d1, (12,%sp)
-; NO-ATOMIC-NEXT:    move.l %d0, (8,%sp)
-; NO-ATOMIC-NEXT:    move.l #5, (20,%sp)
-; NO-ATOMIC-NEXT:    move.l #5, (16,%sp)
-; NO-ATOMIC-NEXT:    jsr __atomic_compare_exchange_8
-; NO-ATOMIC-NEXT:    move.b %d0, %d2
-; NO-ATOMIC-NEXT:    move.l (28,%sp), %d1
-; NO-ATOMIC-NEXT:    move.l (24,%sp), %d0
-; NO-ATOMIC-NEXT:    cmpi.b #0, %d2
-; NO-ATOMIC-NEXT:    bne .LBB7_4
-; NO-ATOMIC-NEXT:  .LBB7_1: ; %atomicrmw.start
-; NO-ATOMIC-NEXT:    ; =>This Inner Loop Header: Depth=1
-; NO-ATOMIC-NEXT:    move.l %d0, (24,%sp)
-; NO-ATOMIC-NEXT:    move.l %d1, (28,%sp)
-; NO-ATOMIC-NEXT:    move.l %a2, (%sp)
-; NO-ATOMIC-NEXT:    move.l %a3, (4,%sp)
-; NO-ATOMIC-NEXT:    move.l %d3, %d2
-; NO-ATOMIC-NEXT:    sub.l %d1, %d2
-; NO-ATOMIC-NEXT:    move.l %d4, %d2
-; NO-ATOMIC-NEXT:    subx.l %d0, %d2
-; NO-ATOMIC-NEXT:    slt %d2
-; NO-ATOMIC-NEXT:    cmpi.b #0, %d2
-; NO-ATOMIC-NEXT:    bne .LBB7_3
-; NO-ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.start
-; NO-ATOMIC-NEXT:    ; in Loop: Header=BB7_1 Depth=1
-; NO-ATOMIC-NEXT:    move.l %d3, %d1
-; NO-ATOMIC-NEXT:    move.l %d4, %d0
-; NO-ATOMIC-NEXT:    bra .LBB7_3
-; NO-ATOMIC-NEXT:  .LBB7_4: ; %atomicrmw.end
-; NO-ATOMIC-NEXT:    movem.l (32,%sp), %d2-%d4/%a2-%a3 ; 24-byte Folded Reload
-; NO-ATOMIC-NEXT:    adda.l #52, %sp
-; NO-ATOMIC-NEXT:    rts
-;
-; NO-ATOMIC-PIC-LABEL: atomicrmw_max_i64:
-; NO-ATOMIC-PIC:         .cfi_startproc
-; NO-ATOMIC-PIC-NEXT:  ; %bb.0:
-; NO-ATOMIC-PIC-NEXT:    suba.l #52, %sp
-; NO-ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -56
-; NO-ATOMIC-PIC-NEXT:    movem.l %d2-%d4/%a2-%a3, (32,%sp) ; 24-byte Folded Spill
-; NO-ATOMIC-PIC-NEXT:    move.l (60,%sp), %d3
-; NO-ATOMIC-PIC-NEXT:    move.l (56,%sp), %d4
-; NO-ATOMIC-PIC-NEXT:    move.l (64,%sp), %a2
-; NO-ATOMIC-PIC-NEXT:    move.l (4,%a2), %d1
-; NO-ATOMIC-PIC-NEXT:    move.l (%a2), %d0
-; NO-ATOMIC-PIC-NEXT:    lea (24,%sp), %a3
-; NO-ATOMIC-PIC-NEXT:    bra .LBB7_1
-; NO-ATOMIC-PIC-NEXT:  .LBB7_3: ; %atomicrmw.start
-; NO-ATOMIC-PIC-NEXT:    ; in Loop: Header=BB7_1 Depth=1
-; NO-ATOMIC-PIC-NEXT:    move.l %d1, (12,%sp)
-; NO-ATOMIC-PIC-NEXT:    move.l %d0, (8,%sp)
-; NO-ATOMIC-PIC-NEXT:    move.l #5, (20,%sp)
-; NO-ATOMIC-PIC-NEXT:    move.l #5, (16,%sp)
-; NO-ATOMIC-PIC-NEXT:    jsr (__atomic_compare_exchange_8@PLT,%pc)
-; NO-ATOMIC-PIC-NEXT:    move.b %d0, %d2
-; NO-ATOMIC-PIC-NEXT:    move.l (28,%sp), %d1
-; NO-ATOMIC-PIC-NEXT:    move.l (24,%sp), %d0
-; NO-ATOMIC-PIC-NEXT:    cmpi.b #0, %d2
-; NO-ATOMIC-PIC-NEXT:    bne .LBB7_4
-; NO-ATOMIC-PIC-NEXT:  .LBB7_1: ; %atomicrmw.start
-; NO-ATOMIC-PIC-NEXT:    ; =>This Inner Loop Header: Depth=1
-; NO-ATOMIC-PIC-NEXT:    move.l %d0, (24,%sp)
-; NO-ATOMIC-PIC-NEXT:    move.l %d1, (28,%sp)
-; NO-ATOMIC-PIC-NEXT:    move.l %a2, (%sp)
-; NO-ATOMIC-PIC-NEXT:    move.l %a3, (4,%sp)
-; NO-ATOMIC-PIC-NEXT:    move.l %d3, %d2
-; NO-ATOMIC-PIC-NEXT:    sub.l %d1, %d2
-; NO-ATOMIC-PIC-NEXT:    move.l %d4, %d2
-; NO-ATOMIC-PIC-NEXT:    subx.l %d0, %d2
-; NO-ATOMIC-PIC-NEXT:    slt %d2
-; NO-ATOMIC-PIC-NEXT:    cmpi.b #0, %d2
-; NO-ATOMIC-PIC-NEXT:    bne .LBB7_3
-; NO-ATOMIC-PIC-NEXT:  ; %bb.2: ; %atomicrmw.start
-; NO-ATOMIC-PIC-NEXT:    ; in Loop: Header=BB7_1 Depth=1
-; NO-ATOMIC-PIC-NEXT:    move.l %d3, %d1
-; NO-ATOMIC-PIC-NEXT:    move.l %d4, %d0
-; NO-ATOMIC-PIC-NEXT:    bra .LBB7_3
-; NO-ATOMIC-PIC-NEXT:  .LBB7_4: ; %atomicrmw.end
-; NO-ATOMIC-PIC-NEXT:    movem.l (32,%sp), %d2-%d4/%a2-%a3 ; 24-byte Folded Reload
-; NO-ATOMIC-PIC-NEXT:    adda.l #52, %sp
-; NO-ATOMIC-PIC-NEXT:    rts
+; NO-ATOMIC-000-LABEL: atomicrmw_max_i64:
+; NO-ATOMIC-000:         .cfi_startproc
+; NO-ATOMIC-000-NEXT:  ; %bb.0:
+; NO-ATOMIC-000-NEXT:    suba.l #52, %sp
+; NO-ATOMIC-000-NEXT:    .cfi_def_cfa_offset -56
+; NO-ATOMIC-000-NEXT:    movem.l %d2-%d4/%a2-%a3, (32,%sp) ; 24-byte Folded Spill
+; NO-ATOMIC-000-NEXT:    move.l (60,%sp), %d3
+; NO-ATOMIC-000-NEXT:    move.l (56,%sp), %d4
+; NO-ATOMIC-000-NEXT:    move.l (64,%sp), %a2
+; NO-ATOMIC-000-NEXT:    move.l (4,%a2), %d1
+; NO-ATOMIC-000-NEXT:    move.l (%a2), %d0
+; NO-ATOMIC-000-NEXT:    lea (24,%sp), %a3
+; NO-ATOMIC-000-NEXT:    bra .LBB7_1
+; NO-ATOMIC-000-NEXT:  .LBB7_3: ; %atomicrmw.start
+; NO-ATOMIC-000-NEXT:    ; in Loop: Header=BB7_1 Depth=1
+; NO-ATOMIC-000-NEXT:    move.l %d1, (12,%sp)
+; NO-ATOMIC-000-NEXT:    move.l %d0, (8,%sp)
+; NO-ATOMIC-000-NEXT:    move.l #5, (20,%sp)
+; NO-ATOMIC-000-NEXT:    move.l #5, (16,%sp)
+; NO-ATOMIC-000-NEXT:    jsr __atomic_compare_exchange_8
+; NO-ATOMIC-000-NEXT:    move.b %d0, %d2
+; NO-ATOMIC-000-NEXT:    move.l (28,%sp), %d1
+; NO-ATOMIC-000-NEXT:    move.l (24,%sp), %d0
+; NO-ATOMIC-000-NEXT:    cmpi.b #0, %d2
+; NO-ATOMIC-000-NEXT:    bne .LBB7_4
+; NO-ATOMIC-000-NEXT:  .LBB7_1: ; %atomicrmw.start
+; NO-ATOMIC-000-NEXT:    ; =>This Inner Loop Header: Depth=1
+; NO-ATOMIC-000-NEXT:    move.l %d0, (24,%sp)
+; NO-ATOMIC-000-NEXT:    move.l %d1, (28,%sp)
+; NO-ATOMIC-000-NEXT:    move.l %a2, (%sp)
+; NO-ATOMIC-000-NEXT:    move.l %a3, (4,%sp)
+; NO-ATOMIC-000-NEXT:    move.l %d3, %d2
+; NO-ATOMIC-000-NEXT:    sub.l %d1, %d2
+; NO-ATOMIC-000-NEXT:    move.w %sr, -(%sp)
+; NO-ATOMIC-000-NEXT:    move.l %d4, %d2
+; NO-ATOMIC-000-NEXT:    move.w (%sp)+, %ccr
+; NO-ATOMIC-000-NEXT:    subx.l %d0, %d2
+; NO-ATOMIC-000-NEXT:    slt %d2
+; NO-ATOMIC-000-NEXT:    cmpi.b #0, %d2
+; NO-ATOMIC-000-NEXT:    bne .LBB7_3
+; NO-ATOMIC-000-NEXT:  ; %bb.2: ; %atomicrmw.start
+; NO-ATOMIC-000-NEXT:    ; in Loop: Header=BB7_1 Depth=1
+; NO-ATOMIC-000-NEXT:    move.l %d3, %d1
+; NO-ATOMIC-000-NEXT:    move.l %d4, %d0
+; NO-ATOMIC-000-NEXT:    bra .LBB7_3
+; NO-ATOMIC-000-NEXT:  .LBB7_4: ; %atomicrmw.end
+; NO-ATOMIC-000-NEXT:    movem.l (32,%sp), %d2-%d4/%a2-%a3 ; 24-byte Folded Reload
+; NO-ATOMIC-000-NEXT:    adda.l #52, %sp
+; NO-ATOMIC-000-NEXT:    rts
+;
+; NO-ATOMIC-010-LABEL: atomicrmw_max_i64:
+; NO-ATOMIC-010:         .cfi_startproc
+; NO-ATOMIC-010-NEXT:  ; %bb.0:
+; NO-ATOMIC-010-NEXT:    suba.l #52, %sp
+; NO-ATOMIC-010-NEXT:    .cfi_def_cfa_offset -56
+; NO-ATOMIC-010-NEXT:    movem.l %d2-%d4/%a2-%a3, (32,%sp) ; 24-byte Folded Spill
+; NO-ATOMIC-010-NEXT:    move.l (60,%sp), %d3
+; NO-ATOMIC-010-NEXT:    move.l (56,%sp), %d4
+; NO-ATOMIC-010-NEXT:    move.l (64,%sp), %a2
+; NO-ATOMIC-010-NEXT:    move.l (4,%a2), %d1
+; NO-ATOMIC-010-NEXT:    move.l (%a2), %d0
+; NO-ATOMIC-010-NEXT:    lea (24,%sp), %a3
+; NO-ATOMIC-010-NEXT:    bra .LBB7_1
+; NO-ATOMIC-010-NEXT:  .LBB7_3: ; %atomicrmw.start
+; NO-ATOMIC-010-NEXT:    ; in Loop: Header=BB7_1 Depth=1
+; NO-ATOMIC-010-NEXT:    move.l %d1, (12,%sp)
+; NO-ATOMIC-010-NEXT:    move.l %d0, (8,%sp)
+; NO-ATOMIC-010-NEXT:    move.l #5, (20,%sp)
+; NO-ATOMIC-010-NEXT:    move.l #5, (16,%sp)
+; NO-ATOMIC-010-NEXT:    jsr __atomic_compare_exchange_8
+; NO-ATOMIC-010-NEXT:    move.b %d0, %d2
+; NO-ATOMIC-010-NEXT:    move.l (28,%sp), %d1
+; NO-ATOMIC-010-NEXT:    move.l (24,%sp), %d0
+; NO-ATOMIC-010-NEXT:    cmpi.b #0, %d2
+; NO-ATOMIC-010-NEXT:    bne .LBB7_4
+; NO-ATOMIC-010-NEXT:  .LBB7_1: ; %atomicrmw.start
+; NO-ATOMIC-010-NEXT:    ; =>This Inner Loop Header: Depth=1
+; NO-ATOMIC-010-NEXT:    move.l %d0, (24,%sp)
+; NO-ATOMIC-010-NEXT:    move.l %d1, (28,%sp)
+; NO-ATOMIC-010-NEXT:    move.l %a2, (%sp)
+; NO-ATOMIC-010-NEXT:    move.l %a3, (4,%sp)
+; NO-ATOMIC-010-NEXT:    move.l %d3, %d2
+; NO-ATOMIC-010-NEXT:    sub.l %d1, %d2
+; NO-ATOMIC-010-NEXT:    move.w %ccr, -(%sp)
+; NO-ATOMIC-010-NEXT:    move.l %d4, %d2
+; NO-ATOMIC-010-NEXT:    move.w (%sp)+, %ccr
+; NO-ATOMIC-010-NEXT:    subx.l %d0, %d2
+; NO-ATOMIC-010-NEXT:    slt %d2
+; NO-ATOMIC-010-NEXT:    cmpi.b #0, %d2
+; NO-ATOMIC-010-NEXT:    bne .LBB7_3
+; NO-ATOMIC-010-NEXT:  ; %bb.2: ; %atomicrmw.start
+; NO-ATOMIC-010-NEXT:    ; in Loop: Header=BB7_1 Depth=1
+; NO-ATOMIC-010-NEXT:    move.l %d3, %d1
+; NO-ATOMIC-010-NEXT:    move.l %d4, %d0
+; NO-ATOMIC-010-NEXT:    bra .LBB7_3
+; NO-ATOMIC-010-NEXT:  .LBB7_4: ; %atomicrmw.end
+; NO-ATOMIC-010-NEXT:    movem.l (32,%sp), %d2-%d4/%a2-%a3 ; 24-byte Folded Reload
+; NO-ATOMIC-010-NEXT:    adda.l #52, %sp
+; NO-ATOMIC-010-NEXT:    rts
+;
+; NO-ATOMIC-PIC-000-LABEL: atomicrmw_max_i64:
+; NO-ATOMIC-PIC-000:         .cfi_startproc
+; NO-ATOMIC-PIC-000-NEXT:  ; %bb.0:
+; NO-ATOMIC-PIC-000-NEXT:    suba.l #52, %sp
+; NO-ATOMIC-PIC-000-NEXT:    .cfi_def_cfa_offset -56
+; NO-ATOMIC-PIC-000-NEXT:    movem.l %d2-%d4/%a2-%a3, (32,%sp) ; 24-byte Folded Spill
+; NO-ATOMIC-PIC-000-NEXT:    move.l (60,%sp), %d3
+; NO-ATOMIC-PIC-000-NEXT:    move.l (56,%sp), %d4
+; NO-ATOMIC-PIC-000-NEXT:    move.l (64,%sp), %a2
+; NO-ATOMIC-PIC-000-NEXT:    move.l (4,%a2), %d1
+; NO-ATOMIC-PIC-000-NEXT:    move.l (%a2), %d0
+; NO-ATOMIC-PIC-000-NEXT:    lea (24,%sp), %a3
+; NO-ATOMIC-PIC-000-NEXT:    bra .LBB7_1
+; NO-ATOMIC-PIC-000-NEXT:  .LBB7_3: ; %atomicrmw.start
+; NO-ATOMIC-PIC-000-NEXT:    ; in Loop: Header=BB7_1 Depth=1
+; NO-ATOMIC-PIC-000-NEXT:    move.l %d1, (12,%sp)
+; NO-ATOMIC-PIC-000-NEXT:    move.l %d0, (8,%sp)
+; NO-ATOMIC-PIC-000-NEXT:    move.l #5, (20,%sp)
+; NO-ATOMIC-PIC-000-NEXT:    move.l #5, (16,%sp)
+; NO-ATOMIC-PIC-000-NEXT:    jsr (__atomic_compare_exchange_8@PLT,%pc)
+; NO-ATOMIC-PIC-000-NEXT:    move.b %d0, %d2
+; NO-ATOMIC-PIC-000-NEXT:    move.l (28,%sp), %d1
+; NO-ATOMIC-PIC-000-NEXT:    move.l (24,%sp), %d0
+; NO-ATOMIC-PIC-000-NEXT:    cmpi.b #0, %d2
+; NO-ATOMIC-PIC-000-NEXT:    bne .LBB7_4
+; NO-ATOMIC-PIC-000-NEXT:  .LBB7_1: ; %atomicrmw.start
+; NO-ATOMIC-PIC-000-NEXT:    ; =>This Inner Loop Header: Depth=1
+; NO-ATOMIC-PIC-000-NEXT:    move.l %d0, (24,%sp)
+; NO-ATOMIC-PIC-000-NEXT:    move.l %d1, (28,%sp)
+; NO-ATOMIC-PIC-000-NEXT:    move.l %a2, (%sp)
+; NO-ATOMIC-PIC-000-NEXT:    move.l %a3, (4,%sp)
+; NO-ATOMIC-PIC-000-NEXT:    move.l %d3, %d2
+; NO-ATOMIC-PIC-000-NEXT:    sub.l %d1, %d2
+; NO-ATOMIC-PIC-000-NEXT:    move.w %sr, -(%sp)
+; NO-ATOMIC-PIC-000-NEXT:    move.l %d4, %d2
+; NO-ATOMIC-PIC-000-NEXT:    move.w (%sp)+, %ccr
+; NO-ATOMIC-PIC-000-NEXT:    subx.l %d0, %d2
+; NO-ATOMIC-PIC-000-NEXT:    slt %d2
+; NO-ATOMIC-PIC-000-NEXT:    cmpi.b #0, %d2
+; NO-ATOMIC-PIC-000-NEXT:    bne .LBB7_3
+; NO-ATOMIC-PIC-000-NEXT:  ; %bb.2: ; %atomicrmw.start
+; NO-ATOMIC-PIC-000-NEXT:    ; in Loop: Header=BB7_1 Depth=1
+; NO-ATOMIC-PIC-000-NEXT:    move.l %d3, %d1
+; NO-ATOMIC-PIC-000-NEXT:    move.l %d4, %d0
+; NO-ATOMIC-PIC-000-NEXT:    bra .LBB7_3
+; NO-ATOMIC-PIC-000-NEXT:  .LBB7_4: ; %atomicrmw.end
+; NO-ATOMIC-PIC-000-NEXT:    movem.l (32,%sp), %d2-%d4/%a2-%a3 ; 24-byte Folded Reload
+; NO-ATOMIC-PIC-000-NEXT:    adda.l #52, %sp
+; NO-ATOMIC-PIC-000-NEXT:    rts
+;
+; NO-ATOMIC-PIC-010-LABEL: atomicrmw_max_i64:
+; NO-ATOMIC-PIC-010:         .cfi_startproc
+; NO-ATOMIC-PIC-010-NEXT:  ; %bb.0:
+; NO-ATOMIC-PIC-010-NEXT:    suba.l #52, %sp
+; NO-ATOMIC-PIC-010-NEXT:    .cfi_def_cfa_offset -56
+; NO-ATOMIC-PIC-010-NEXT:    movem.l %d2-%d4/%a2-%a3, (32,%sp) ; 24-byte Folded Spill
+; NO-ATOMIC-PIC-010-NEXT:    move.l (60,%sp), %d3
+; NO-ATOMIC-PIC-010-NEXT:    move.l (56,%sp), %d4
+; NO-ATOMIC-PIC-010-NEXT:    move.l (64,%sp), %a2
+; NO-ATOMIC-PIC-010-NEXT:    move.l (4,%a2), %d1
+; NO-ATOMIC-PIC-010-NEXT:    move.l (%a2), %d0
+; NO-ATOMIC-PIC-010-NEXT:    lea (24,%sp), %a3
+; NO-ATOMIC-PIC-010-NEXT:    bra .LBB7_1
+; NO-ATOMIC-PIC-010-NEXT:  .LBB7_3: ; %atomicrmw.start
+; NO-ATOMIC-PIC-010-NEXT:    ; in Loop: Header=BB7_1 Depth=1
+; NO-ATOMIC-PIC-010-NEXT:    move.l %d1, (12,%sp)
+; NO-ATOMIC-PIC-010-NEXT:    move.l %d0, (8,%sp)
+; NO-ATOMIC-PIC-010-NEXT:    move.l #5, (20,%sp)
+; NO-ATOMIC-PIC-010-NEXT:    move.l #5, (16,%sp)
+; NO-ATOMIC-PIC-010-NEXT:    jsr (__atomic_compare_exchange_8@PLT,%pc)
+; NO-ATOMIC-PIC-010-NEXT:    move.b %d0, %d2
+; NO-ATOMIC-PIC-010-NEXT:    move.l (28,%sp), %d1
+; NO-ATOMIC-PIC-010-NEXT:    move.l (24,%sp), %d0
+; NO-ATOMIC-PIC-010-NEXT:    cmpi.b #0, %d2
+; NO-ATOMIC-PIC-010-NEXT:    bne .LBB7_4
+; NO-ATOMIC-PIC-010-NEXT:  .LBB7_1: ; %atomicrmw.start
+; NO-ATOMIC-PIC-010-NEXT:    ; =>This Inner Loop Header: Depth=1
+; NO-ATOMIC-PIC-010-NEXT:    move.l %d0, (24,%sp)
+; NO-ATOMIC-PIC-010-NEXT:    move.l %d1, (28,%sp)
+; NO-ATOMIC-PIC-010-NEXT:    move.l %a2, (%sp)
+; NO-ATOMIC-PIC-010-NEXT:    move.l %a3, (4,%sp)
+; NO-ATOMIC-PIC-010-NEXT:    move.l %d3, %d2
+; NO-ATOMIC-PIC-010-NEXT:    sub.l %d1, %d2
+; NO-ATOMIC-PIC-010-NEXT:    move.w %ccr, -(%sp)
+; NO-ATOMIC-PIC-010-NEXT:    move.l %d4, %d2
+; NO-ATOMIC-PIC-010-NEXT:    move.w (%sp)+, %ccr
+; NO-ATOMIC-PIC-010-NEXT:    subx.l %d0, %d2
+; NO-ATOMIC-PIC-010-NEXT:    slt %d2
+; NO-ATOMIC-PIC-010-NEXT:    cmpi.b #0, %d2
+; NO-ATOMIC-PIC-010-NEXT:    bne .LBB7_3
+; NO-ATOMIC-PIC-010-NEXT:  ; %bb.2: ; %atomicrmw.start
+; NO-ATOMIC-PIC-010-NEXT:    ; in Loop: Header=BB7_1 Depth=1
+; NO-ATOMIC-PIC-010-NEXT:    move.l %d3, %d1
+; NO-ATOMIC-PIC-010-NEXT:    move.l %d4, %d0
+; NO-ATOMIC-PIC-010-NEXT:    bra .LBB7_3
+; NO-ATOMIC-PIC-010-NEXT:  .LBB7_4: ; %atomicrmw.end
+; NO-ATOMIC-PIC-010-NEXT:    movem.l (32,%sp), %d2-%d4/%a2-%a3 ; 24-byte Folded Reload
+; NO-ATOMIC-PIC-010-NEXT:    adda.l #52, %sp
+; NO-ATOMIC-PIC-010-NEXT:    rts
 ;
 ; ATOMIC-LABEL: atomicrmw_max_i64:
 ; ATOMIC:         .cfi_startproc
@@ -720,7 +1034,9 @@ define i64 @atomicrmw_max_i64(i64 %val, ptr %ptr) {
 ; ATOMIC-NEXT:    move.l %a3, (4,%sp)
 ; ATOMIC-NEXT:    move.l %d3, %d2
 ; ATOMIC-NEXT:    sub.l %d1, %d2
+; ATOMIC-NEXT:    move.w %ccr, -(%sp)
 ; ATOMIC-NEXT:    move.l %d4, %d2
+; ATOMIC-NEXT:    move.w (%sp)+, %ccr
 ; ATOMIC-NEXT:    subx.l %d0, %d2
 ; ATOMIC-NEXT:    slt %d2
 ; ATOMIC-NEXT:    cmpi.b #0, %d2
@@ -768,7 +1084,9 @@ define i64 @atomicrmw_max_i64(i64 %val, ptr %ptr) {
 ; ATOMIC-PIC-NEXT:    move.l %a3, (4,%sp)
 ; ATOMIC-PIC-NEXT:    move.l %d3, %d2
 ; ATOMIC-PIC-NEXT:    sub.l %d1, %d2
+; ATOMIC-PIC-NEXT:    move.w %ccr, -(%sp)
 ; ATOMIC-PIC-NEXT:    move.l %d4, %d2
+; ATOMIC-PIC-NEXT:    move.w (%sp)+, %ccr
 ; ATOMIC-PIC-NEXT:    subx.l %d0, %d2
 ; ATOMIC-PIC-NEXT:    slt %d2
 ; ATOMIC-PIC-NEXT:    cmpi.b #0, %d2
@@ -787,31 +1105,57 @@ define i64 @atomicrmw_max_i64(i64 %val, ptr %ptr) {
 }
 
 define i8 @atomicrmw_i8_umin(i8 %val, ptr %ptr) {
-; NO-ATOMIC-LABEL: atomicrmw_i8_umin:
-; NO-ATOMIC:         .cfi_startproc
-; NO-ATOMIC-NEXT:  ; %bb.0:
-; NO-ATOMIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT:    move.b (19,%sp), %d0
-; NO-ATOMIC-NEXT:    and.l #255, %d0
-; NO-ATOMIC-NEXT:    move.l %d0, (4,%sp)
-; NO-ATOMIC-NEXT:    move.l (20,%sp), (%sp)
-; NO-ATOMIC-NEXT:    jsr __sync_fetch_and_umin_1
-; NO-ATOMIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-NEXT:    rts
-;
-; NO-ATOMIC-PIC-LABEL: atomicrmw_i8_umin:
-; NO-ATOMIC-PIC:         .cfi_startproc
-; NO-ATOMIC-PIC-NEXT:  ; %bb.0:
-; NO-ATOMIC-PIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-PIC-NEXT:    move.b (19,%sp), %d0
-; NO-ATOMIC-PIC-NEXT:    and.l #255, %d0
-; NO-ATOMIC-PIC-NEXT:    move.l %d0, (4,%sp)
-; NO-ATOMIC-PIC-NEXT:    move.l (20,%sp), (%sp)
-; NO-ATOMIC-PIC-NEXT:    jsr (__sync_fetch_and_umin_1@PLT,%pc)
-; NO-ATOMIC-PIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-PIC-NEXT:    rts
+; NO-ATOMIC-000-LABEL: atomicrmw_i8_umin:
+; NO-ATOMIC-000:         .cfi_startproc
+; NO-ATOMIC-000-NEXT:  ; %bb.0:
+; NO-ATOMIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-000-NEXT:    move.b (19,%sp), %d0
+; NO-ATOMIC-000-NEXT:    and.l #255, %d0
+; NO-ATOMIC-000-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-000-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-000-NEXT:    jsr __sync_fetch_and_umin_1
+; NO-ATOMIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-000-NEXT:    rts
+;
+; NO-ATOMIC-010-LABEL: atomicrmw_i8_umin:
+; NO-ATOMIC-010:         .cfi_startproc
+; NO-ATOMIC-010-NEXT:  ; %bb.0:
+; NO-ATOMIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-010-NEXT:    move.b (19,%sp), %d0
+; NO-ATOMIC-010-NEXT:    and.l #255, %d0
+; NO-ATOMIC-010-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-010-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-010-NEXT:    jsr __sync_fetch_and_umin_1
+; NO-ATOMIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-010-NEXT:    rts
+;
+; NO-ATOMIC-PIC-000-LABEL: atomicrmw_i8_umin:
+; NO-ATOMIC-PIC-000:         .cfi_startproc
+; NO-ATOMIC-PIC-000-NEXT:  ; %bb.0:
+; NO-ATOMIC-PIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-000-NEXT:    move.b (19,%sp), %d0
+; NO-ATOMIC-PIC-000-NEXT:    and.l #255, %d0
+; NO-ATOMIC-PIC-000-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-PIC-000-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-PIC-000-NEXT:    jsr (__sync_fetch_and_umin_1@PLT,%pc)
+; NO-ATOMIC-PIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-000-NEXT:    rts
+;
+; NO-ATOMIC-PIC-010-LABEL: atomicrmw_i8_umin:
+; NO-ATOMIC-PIC-010:         .cfi_startproc
+; NO-ATOMIC-PIC-010-NEXT:  ; %bb.0:
+; NO-ATOMIC-PIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-010-NEXT:    move.b (19,%sp), %d0
+; NO-ATOMIC-PIC-010-NEXT:    and.l #255, %d0
+; NO-ATOMIC-PIC-010-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-PIC-010-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-PIC-010-NEXT:    jsr (__sync_fetch_and_umin_1@PLT,%pc)
+; NO-ATOMIC-PIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-010-NEXT:    rts
 ;
 ; ATOMIC-LABEL: atomicrmw_i8_umin:
 ; ATOMIC:         .cfi_startproc
@@ -832,13 +1176,17 @@ define i8 @atomicrmw_i8_umin(i8 %val, ptr %ptr) {
 ; ATOMIC-NEXT:    seq %d2
 ; ATOMIC-NEXT:    and.b #1, %d2
 ; ATOMIC-NEXT:    cmpi.b #0, %d2
+; ATOMIC-NEXT:    move.w %ccr, %d3
 ; ATOMIC-NEXT:    move.b %d0, %d2
+; ATOMIC-NEXT:    move.w %d3, %ccr
 ; ATOMIC-NEXT:    bne .LBB8_4
 ; ATOMIC-NEXT:  .LBB8_1: ; %atomicrmw.start
 ; ATOMIC-NEXT:    ; =>This Inner Loop Header: Depth=1
 ; ATOMIC-NEXT:    move.b %d2, %d0
 ; ATOMIC-NEXT:    sub.b %d1, %d0
+; ATOMIC-NEXT:    move.w %ccr, %d0
 ; ATOMIC-NEXT:    move.b %d2, %d3
+; ATOMIC-NEXT:    move.w %d0, %ccr
 ; ATOMIC-NEXT:    bls .LBB8_3
 ; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.start
 ; ATOMIC-NEXT:    ; in Loop: Header=BB8_1 Depth=1
@@ -868,13 +1216,17 @@ define i8 @atomicrmw_i8_umin(i8 %val, ptr %ptr) {
 ; ATOMIC-PIC-NEXT:    seq %d2
 ; ATOMIC-PIC-NEXT:    and.b #1, %d2
 ; ATOMIC-PIC-NEXT:    cmpi.b #0, %d2
+; ATOMIC-PIC-NEXT:    move.w %ccr, %d3
 ; ATOMIC-PIC-NEXT:    move.b %d0, %d2
+; ATOMIC-PIC-NEXT:    move.w %d3, %ccr
 ; ATOMIC-PIC-NEXT:    bne .LBB8_4
 ; ATOMIC-PIC-NEXT:  .LBB8_1: ; %atomicrmw.start
 ; ATOMIC-PIC-NEXT:    ; =>This Inner Loop Header: Depth=1
 ; ATOMIC-PIC-NEXT:    move.b %d2, %d0
 ; ATOMIC-PIC-NEXT:    sub.b %d1, %d0
+; ATOMIC-PIC-NEXT:    move.w %ccr, %d0
 ; ATOMIC-PIC-NEXT:    move.b %d2, %d3
+; ATOMIC-PIC-NEXT:    move.w %d0, %ccr
 ; ATOMIC-PIC-NEXT:    bls .LBB8_3
 ; ATOMIC-PIC-NEXT:  ; %bb.2: ; %atomicrmw.start
 ; ATOMIC-PIC-NEXT:    ; in Loop: Header=BB8_1 Depth=1
@@ -889,31 +1241,57 @@ define i8 @atomicrmw_i8_umin(i8 %val, ptr %ptr) {
 }
 
 define i16 @atomicrmw_umax_i16(i16 %val, ptr %ptr) {
-; NO-ATOMIC-LABEL: atomicrmw_umax_i16:
-; NO-ATOMIC:         .cfi_startproc
-; NO-ATOMIC-NEXT:  ; %bb.0:
-; NO-ATOMIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT:    move.w (18,%sp), %d0
-; NO-ATOMIC-NEXT:    and.l #65535, %d0
-; NO-ATOMIC-NEXT:    move.l %d0, (4,%sp)
-; NO-ATOMIC-NEXT:    move.l (20,%sp), (%sp)
-; NO-ATOMIC-NEXT:    jsr __sync_fetch_and_umax_2
-; NO-ATOMIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-NEXT:    rts
-;
-; NO-ATOMIC-PIC-LABEL: atomicrmw_umax_i16:
-; NO-ATOMIC-PIC:         .cfi_startproc
-; NO-ATOMIC-PIC-NEXT:  ; %bb.0:
-; NO-ATOMIC-PIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-PIC-NEXT:    move.w (18,%sp), %d0
-; NO-ATOMIC-PIC-NEXT:    and.l #65535, %d0
-; NO-ATOMIC-PIC-NEXT:    move.l %d0, (4,%sp)
-; NO-ATOMIC-PIC-NEXT:    move.l (20,%sp), (%sp)
-; NO-ATOMIC-PIC-NEXT:    jsr (__sync_fetch_and_umax_2@PLT,%pc)
-; NO-ATOMIC-PIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-PIC-NEXT:    rts
+; NO-ATOMIC-000-LABEL: atomicrmw_umax_i16:
+; NO-ATOMIC-000:         .cfi_startproc
+; NO-ATOMIC-000-NEXT:  ; %bb.0:
+; NO-ATOMIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-000-NEXT:    move.w (18,%sp), %d0
+; NO-ATOMIC-000-NEXT:    and.l #65535, %d0
+; NO-ATOMIC-000-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-000-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-000-NEXT:    jsr __sync_fetch_and_umax_2
+; NO-ATOMIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-000-NEXT:    rts
+;
+; NO-ATOMIC-010-LABEL: atomicrmw_umax_i16:
+; NO-ATOMIC-010:         .cfi_startproc
+; NO-ATOMIC-010-NEXT:  ; %bb.0:
+; NO-ATOMIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-010-NEXT:    move.w (18,%sp), %d0
+; NO-ATOMIC-010-NEXT:    and.l #65535, %d0
+; NO-ATOMIC-010-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-010-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-010-NEXT:    jsr __sync_fetch_and_umax_2
+; NO-ATOMIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-010-NEXT:    rts
+;
+; NO-ATOMIC-PIC-000-LABEL: atomicrmw_umax_i16:
+; NO-ATOMIC-PIC-000:         .cfi_startproc
+; NO-ATOMIC-PIC-000-NEXT:  ; %bb.0:
+; NO-ATOMIC-PIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-000-NEXT:    move.w (18,%sp), %d0
+; NO-ATOMIC-PIC-000-NEXT:    and.l #65535, %d0
+; NO-ATOMIC-PIC-000-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-PIC-000-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-PIC-000-NEXT:    jsr (__sync_fetch_and_umax_2@PLT,%pc)
+; NO-ATOMIC-PIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-000-NEXT:    rts
+;
+; NO-ATOMIC-PIC-010-LABEL: atomicrmw_umax_i16:
+; NO-ATOMIC-PIC-010:         .cfi_startproc
+; NO-ATOMIC-PIC-010-NEXT:  ; %bb.0:
+; NO-ATOMIC-PIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-010-NEXT:    move.w (18,%sp), %d0
+; NO-ATOMIC-PIC-010-NEXT:    and.l #65535, %d0
+; NO-ATOMIC-PIC-010-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-PIC-010-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-PIC-010-NEXT:    jsr (__sync_fetch_and_umax_2@PLT,%pc)
+; NO-ATOMIC-PIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-010-NEXT:    rts
 ;
 ; ATOMIC-LABEL: atomicrmw_umax_i16:
 ; ATOMIC:         .cfi_startproc
@@ -934,13 +1312,17 @@ define i16 @atomicrmw_umax_i16(i16 %val, ptr %ptr) {
 ; ATOMIC-NEXT:    seq %d2
 ; ATOMIC-NEXT:    and.b #1, %d2
 ; ATOMIC-NEXT:    cmpi.b #0, %d2
+; ATOMIC-NEXT:    move.w %ccr, %d3
 ; ATOMIC-NEXT:    move.w %d0, %d2
+; ATOMIC-NEXT:    move.w %d3, %ccr
 ; ATOMIC-NEXT:    bne .LBB9_4
 ; ATOMIC-NEXT:  .LBB9_1: ; %atomicrmw.start
 ; ATOMIC-NEXT:    ; =>This Inner Loop Header: Depth=1
 ; ATOMIC-NEXT:    move.w %d2, %d0
 ; ATOMIC-NEXT:    sub.w %d1, %d0
+; ATOMIC-NEXT:    move.w %ccr, %d0
 ; ATOMIC-NEXT:    move.w %d2, %d3
+; ATOMIC-NEXT:    move.w %d0, %ccr
 ; ATOMIC-NEXT:    bhi .LBB9_3
 ; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.start
 ; ATOMIC-NEXT:    ; in Loop: Header=BB9_1 Depth=1
@@ -970,13 +1352,17 @@ define i16 @atomicrmw_umax_i16(i16 %val, ptr %ptr) {
 ; ATOMIC-PIC-NEXT:    seq %d2
 ; ATOMIC-PIC-NEXT:    and.b #1, %d2
 ; ATOMIC-PIC-NEXT:    cmpi.b #0, %d2
+; ATOMIC-PIC-NEXT:    move.w %ccr, %d3
 ; ATOMIC-PIC-NEXT:    move.w %d0, %d2
+; ATOMIC-PIC-NEXT:    move.w %d3, %ccr
 ; ATOMIC-PIC-NEXT:    bne .LBB9_4
 ; ATOMIC-PIC-NEXT:  .LBB9_1: ; %atomicrmw.start
 ; ATOMIC-PIC-NEXT:    ; =>This Inner Loop Header: Depth=1
 ; ATOMIC-PIC-NEXT:    move.w %d2, %d0
 ; ATOMIC-PIC-NEXT:    sub.w %d1, %d0
+; ATOMIC-PIC-NEXT:    move.w %ccr, %d0
 ; ATOMIC-PIC-NEXT:    move.w %d2, %d3
+; ATOMIC-PIC-NEXT:    move.w %d0, %ccr
 ; ATOMIC-PIC-NEXT:    bhi .LBB9_3
 ; ATOMIC-PIC-NEXT:  ; %bb.2: ; %atomicrmw.start
 ; ATOMIC-PIC-NEXT:    ; in Loop: Header=BB9_1 Depth=1
@@ -991,31 +1377,57 @@ define i16 @atomicrmw_umax_i16(i16 %val, ptr %ptr) {
 }
 
 define i16 @atomicrmw_xchg_i16(i16 %val, ptr %ptr) {
-; NO-ATOMIC-LABEL: atomicrmw_xchg_i16:
-; NO-ATOMIC:         .cfi_startproc
-; NO-ATOMIC-NEXT:  ; %bb.0: ; %entry
-; NO-ATOMIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT:    move.w (18,%sp), %d0
-; NO-ATOMIC-NEXT:    and.l #65535, %d0
-; NO-ATOMIC-NEXT:    move.l %d0, (4,%sp)
-; NO-ATOMIC-NEXT:    move.l (20,%sp), (%sp)
-; NO-ATOMIC-NEXT:    jsr __sync_lock_test_and_set_2
-; NO-ATOMIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-NEXT:    rts
-;
-; NO-ATOMIC-PIC-LABEL: atomicrmw_xchg_i16:
-; NO-ATOMIC-PIC:         .cfi_startproc
-; NO-ATOMIC-PIC-NEXT:  ; %bb.0: ; %entry
-; NO-ATOMIC-PIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-PIC-NEXT:    move.w (18,%sp), %d0
-; NO-ATOMIC-PIC-NEXT:    and.l #65535, %d0
-; NO-ATOMIC-PIC-NEXT:    move.l %d0, (4,%sp)
-; NO-ATOMIC-PIC-NEXT:    move.l (20,%sp), (%sp)
-; NO-ATOMIC-PIC-NEXT:    jsr (__sync_lock_test_and_set_2@PLT,%pc)
-; NO-ATOMIC-PIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-PIC-NEXT:    rts
+; NO-ATOMIC-000-LABEL: atomicrmw_xchg_i16:
+; NO-ATOMIC-000:         .cfi_startproc
+; NO-ATOMIC-000-NEXT:  ; %bb.0: ; %entry
+; NO-ATOMIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-000-NEXT:    move.w (18,%sp), %d0
+; NO-ATOMIC-000-NEXT:    and.l #65535, %d0
+; NO-ATOMIC-000-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-000-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-000-NEXT:    jsr __sync_lock_test_and_set_2
+; NO-ATOMIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-000-NEXT:    rts
+;
+; NO-ATOMIC-010-LABEL: atomicrmw_xchg_i16:
+; NO-ATOMIC-010:         .cfi_startproc
+; NO-ATOMIC-010-NEXT:  ; %bb.0: ; %entry
+; NO-ATOMIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-010-NEXT:    move.w (18,%sp), %d0
+; NO-ATOMIC-010-NEXT:    and.l #65535, %d0
+; NO-ATOMIC-010-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-010-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-010-NEXT:    jsr __sync_lock_test_and_set_2
+; NO-ATOMIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-010-NEXT:    rts
+;
+; NO-ATOMIC-PIC-000-LABEL: atomicrmw_xchg_i16:
+; NO-ATOMIC-PIC-000:         .cfi_startproc
+; NO-ATOMIC-PIC-000-NEXT:  ; %bb.0: ; %entry
+; NO-ATOMIC-PIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-000-NEXT:    move.w (18,%sp), %d0
+; NO-ATOMIC-PIC-000-NEXT:    and.l #65535, %d0
+; NO-ATOMIC-PIC-000-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-PIC-000-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-PIC-000-NEXT:    jsr (__sync_lock_test_and_set_2@PLT,%pc)
+; NO-ATOMIC-PIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-000-NEXT:    rts
+;
+; NO-ATOMIC-PIC-010-LABEL: atomicrmw_xchg_i16:
+; NO-ATOMIC-PIC-010:         .cfi_startproc
+; NO-ATOMIC-PIC-010-NEXT:  ; %bb.0: ; %entry
+; NO-ATOMIC-PIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-010-NEXT:    move.w (18,%sp), %d0
+; NO-ATOMIC-PIC-010-NEXT:    and.l #65535, %d0
+; NO-ATOMIC-PIC-010-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-PIC-010-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-PIC-010-NEXT:    jsr (__sync_lock_test_and_set_2@PLT,%pc)
+; NO-ATOMIC-PIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-010-NEXT:    rts
 ;
 ; ATOMIC-LABEL: atomicrmw_xchg_i16:
 ; ATOMIC:         .cfi_startproc
@@ -1035,7 +1447,9 @@ define i16 @atomicrmw_xchg_i16(i16 %val, ptr %ptr) {
 ; ATOMIC-NEXT:    seq %d2
 ; ATOMIC-NEXT:    and.b #1, %d2
 ; ATOMIC-NEXT:    cmpi.b #0, %d2
+; ATOMIC-NEXT:    move.w %ccr, %d3
 ; ATOMIC-NEXT:    move.w %d0, %d2
+; ATOMIC-NEXT:    move.w %d3, %ccr
 ; ATOMIC-NEXT:    beq .LBB10_1
 ; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; ATOMIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
@@ -1060,7 +1474,9 @@ define i16 @atomicrmw_xchg_i16(i16 %val, ptr %ptr) {
 ; ATOMIC-PIC-NEXT:    seq %d2
 ; ATOMIC-PIC-NEXT:    and.b #1, %d2
 ; ATOMIC-PIC-NEXT:    cmpi.b #0, %d2
+; ATOMIC-PIC-NEXT:    move.w %ccr, %d3
 ; ATOMIC-PIC-NEXT:    move.w %d0, %d2
+; ATOMIC-PIC-NEXT:    move.w %d3, %ccr
 ; ATOMIC-PIC-NEXT:    beq .LBB10_1
 ; ATOMIC-PIC-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; ATOMIC-PIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
@@ -1072,27 +1488,49 @@ entry:
 }
 
 define i32 @atomicrmw_xchg_i32(i32 %val, ptr %ptr) {
-; NO-ATOMIC-LABEL: atomicrmw_xchg_i32:
-; NO-ATOMIC:         .cfi_startproc
-; NO-ATOMIC-NEXT:  ; %bb.0: ; %entry
-; NO-ATOMIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT:    move.l (16,%sp), (4,%sp)
-; NO-ATOMIC-NEXT:    move.l (20,%sp), (%sp)
-; NO-ATOMIC-NEXT:    jsr __sync_lock_test_and_set_4
-; NO-ATOMIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-NEXT:    rts
-;
-; NO-ATOMIC-PIC-LABEL: atomicrmw_xchg_i32:
-; NO-ATOMIC-PIC:         .cfi_startproc
-; NO-ATOMIC-PIC-NEXT:  ; %bb.0: ; %entry
-; NO-ATOMIC-PIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-PIC-NEXT:    move.l (16,%sp), (4,%sp)
-; NO-ATOMIC-PIC-NEXT:    move.l (20,%sp), (%sp)
-; NO-ATOMIC-PIC-NEXT:    jsr (__sync_lock_test_and_set_4@PLT,%pc)
-; NO-ATOMIC-PIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-PIC-NEXT:    rts
+; NO-ATOMIC-000-LABEL: atomicrmw_xchg_i32:
+; NO-ATOMIC-000:         .cfi_startproc
+; NO-ATOMIC-000-NEXT:  ; %bb.0: ; %entry
+; NO-ATOMIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-000-NEXT:    move.l (16,%sp), (4,%sp)
+; NO-ATOMIC-000-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-000-NEXT:    jsr __sync_lock_test_and_set_4
+; NO-ATOMIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-000-NEXT:    rts
+;
+; NO-ATOMIC-010-LABEL: atomicrmw_xchg_i32:
+; NO-ATOMIC-010:         .cfi_startproc
+; NO-ATOMIC-010-NEXT:  ; %bb.0: ; %entry
+; NO-ATOMIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-010-NEXT:    move.l (16,%sp), (4,%sp)
+; NO-ATOMIC-010-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-010-NEXT:    jsr __sync_lock_test_and_set_4
+; NO-ATOMIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-010-NEXT:    rts
+;
+; NO-ATOMIC-PIC-000-LABEL: atomicrmw_xchg_i32:
+; NO-ATOMIC-PIC-000:         .cfi_startproc
+; NO-ATOMIC-PIC-000-NEXT:  ; %bb.0: ; %entry
+; NO-ATOMIC-PIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-000-NEXT:    move.l (16,%sp), (4,%sp)
+; NO-ATOMIC-PIC-000-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-PIC-000-NEXT:    jsr (__sync_lock_test_and_set_4@PLT,%pc)
+; NO-ATOMIC-PIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-000-NEXT:    rts
+;
+; NO-ATOMIC-PIC-010-LABEL: atomicrmw_xchg_i32:
+; NO-ATOMIC-PIC-010:         .cfi_startproc
+; NO-ATOMIC-PIC-010-NEXT:  ; %bb.0: ; %entry
+; NO-ATOMIC-PIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-010-NEXT:    move.l (16,%sp), (4,%sp)
+; NO-ATOMIC-PIC-010-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-PIC-010-NEXT:    jsr (__sync_lock_test_and_set_4@PLT,%pc)
+; NO-ATOMIC-PIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-010-NEXT:    rts
 ;
 ; ATOMIC-LABEL: atomicrmw_xchg_i32:
 ; ATOMIC:         .cfi_startproc
@@ -1112,7 +1550,9 @@ define i32 @atomicrmw_xchg_i32(i32 %val, ptr %ptr) {
 ; ATOMIC-NEXT:    seq %d2
 ; ATOMIC-NEXT:    and.b #1, %d2
 ; ATOMIC-NEXT:    cmpi.b #0, %d2
+; ATOMIC-NEXT:    move.w %ccr, %d3
 ; ATOMIC-NEXT:    move.l %d0, %d2
+; ATOMIC-NEXT:    move.w %d3, %ccr
 ; ATOMIC-NEXT:    beq .LBB11_1
 ; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; ATOMIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
@@ -1137,7 +1577,9 @@ define i32 @atomicrmw_xchg_i32(i32 %val, ptr %ptr) {
 ; ATOMIC-PIC-NEXT:    seq %d2
 ; ATOMIC-PIC-NEXT:    and.b #1, %d2
 ; ATOMIC-PIC-NEXT:    cmpi.b #0, %d2
+; ATOMIC-PIC-NEXT:    move.w %ccr, %d3
 ; ATOMIC-PIC-NEXT:    move.l %d0, %d2
+; ATOMIC-PIC-NEXT:    move.w %d3, %ccr
 ; ATOMIC-PIC-NEXT:    beq .LBB11_1
 ; ATOMIC-PIC-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; ATOMIC-PIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
@@ -1149,33 +1591,61 @@ entry:
 }
 
 define i8 @atomicrmw_sub_i8_arid(ptr align 2 %self) {
-; NO-ATOMIC-LABEL: atomicrmw_sub_i8_arid:
-; NO-ATOMIC:         .cfi_startproc
-; NO-ATOMIC-NEXT:  ; %bb.0: ; %start
-; NO-ATOMIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT:    move.l (16,%sp), %a0
-; NO-ATOMIC-NEXT:    move.l (%a0), %d0
-; NO-ATOMIC-NEXT:    add.l #4, %d0
-; NO-ATOMIC-NEXT:    move.l %d0, (%sp)
-; NO-ATOMIC-NEXT:    move.l #1, (4,%sp)
-; NO-ATOMIC-NEXT:    jsr __sync_fetch_and_sub_1
-; NO-ATOMIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-NEXT:    rts
-;
-; NO-ATOMIC-PIC-LABEL: atomicrmw_sub_i8_arid:
-; NO-ATOMIC-PIC:         .cfi_startproc
-; NO-ATOMIC-PIC-NEXT:  ; %bb.0: ; %start
-; NO-ATOMIC-PIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-PIC-NEXT:    move.l (16,%sp), %a0
-; NO-ATOMIC-PIC-NEXT:    move.l (%a0), %d0
-; NO-ATOMIC-PIC-NEXT:    add.l #4, %d0
-; NO-ATOMIC-PIC-NEXT:    move.l %d0, (%sp)
-; NO-ATOMIC-PIC-NEXT:    move.l #1, (4,%sp)
-; NO-ATOMIC-PIC-NEXT:    jsr (__sync_fetch_and_sub_1@PLT,%pc)
-; NO-ATOMIC-PIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-PIC-NEXT:    rts
+; NO-ATOMIC-000-LABEL: atomicrmw_sub_i8_arid:
+; NO-ATOMIC-000:         .cfi_startproc
+; NO-ATOMIC-000-NEXT:  ; %bb.0: ; %start
+; NO-ATOMIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-000-NEXT:    move.l (16,%sp), %a0
+; NO-ATOMIC-000-NEXT:    move.l (%a0), %d0
+; NO-ATOMIC-000-NEXT:    add.l #4, %d0
+; NO-ATOMIC-000-NEXT:    move.l %d0, (%sp)
+; NO-ATOMIC-000-NEXT:    move.l #1, (4,%sp)
+; NO-ATOMIC-000-NEXT:    jsr __sync_fetch_and_sub_1
+; NO-ATOMIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-000-NEXT:    rts
+;
+; NO-ATOMIC-010-LABEL: atomicrmw_sub_i8_arid:
+; NO-ATOMIC-010:         .cfi_startproc
+; NO-ATOMIC-010-NEXT:  ; %bb.0: ; %start
+; NO-ATOMIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-010-NEXT:    move.l (16,%sp), %a0
+; NO-ATOMIC-010-NEXT:    move.l (%a0), %d0
+; NO-ATOMIC-010-NEXT:    add.l #4, %d0
+; NO-ATOMIC-010-NEXT:    move.l %d0, (%sp)
+; NO-ATOMIC-010-NEXT:    move.l #1, (4,%sp)
+; NO-ATOMIC-010-NEXT:    jsr __sync_fetch_and_sub_1
+; NO-ATOMIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-010-NEXT:    rts
+;
+; NO-ATOMIC-PIC-000-LABEL: atomicrmw_sub_i8_arid:
+; NO-ATOMIC-PIC-000:         .cfi_startproc
+; NO-ATOMIC-PIC-000-NEXT:  ; %bb.0: ; %start
+; NO-ATOMIC-PIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-000-NEXT:    move.l (16,%sp), %a0
+; NO-ATOMIC-PIC-000-NEXT:    move.l (%a0), %d0
+; NO-ATOMIC-PIC-000-NEXT:    add.l #4, %d0
+; NO-ATOMIC-PIC-000-NEXT:    move.l %d0, (%sp)
+; NO-ATOMIC-PIC-000-NEXT:    move.l #1, (4,%sp)
+; NO-ATOMIC-PIC-000-NEXT:    jsr (__sync_fetch_and_sub_1@PLT,%pc)
+; NO-ATOMIC-PIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-000-NEXT:    rts
+;
+; NO-ATOMIC-PIC-010-LABEL: atomicrmw_sub_i8_arid:
+; NO-ATOMIC-PIC-010:         .cfi_startproc
+; NO-ATOMIC-PIC-010-NEXT:  ; %bb.0: ; %start
+; NO-ATOMIC-PIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-010-NEXT:    move.l (16,%sp), %a0
+; NO-ATOMIC-PIC-010-NEXT:    move.l (%a0), %d0
+; NO-ATOMIC-PIC-010-NEXT:    add.l #4, %d0
+; NO-ATOMIC-PIC-010-NEXT:    move.l %d0, (%sp)
+; NO-ATOMIC-PIC-010-NEXT:    move.l #1, (4,%sp)
+; NO-ATOMIC-PIC-010-NEXT:    jsr (__sync_fetch_and_sub_1@PLT,%pc)
+; NO-ATOMIC-PIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-010-NEXT:    rts
 ;
 ; ATOMIC-LABEL: atomicrmw_sub_i8_arid:
 ; ATOMIC:         .cfi_startproc
@@ -1197,7 +1667,9 @@ define i8 @atomicrmw_sub_i8_arid(ptr align 2 %self) {
 ; ATOMIC-NEXT:    seq %d1
 ; ATOMIC-NEXT:    and.b #1, %d1
 ; ATOMIC-NEXT:    cmpi.b #0, %d1
+; ATOMIC-NEXT:    move.w %ccr, %d2
 ; ATOMIC-NEXT:    move.b %d0, %d1
+; ATOMIC-NEXT:    move.w %d2, %ccr
 ; ATOMIC-NEXT:    beq .LBB12_1
 ; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; ATOMIC-NEXT:    movem.l (0,%sp), %d2 ; 8-byte Folded Reload
@@ -1224,7 +1696,9 @@ define i8 @atomicrmw_sub_i8_arid(ptr align 2 %self) {
 ; ATOMIC-PIC-NEXT:    seq %d1
 ; ATOMIC-PIC-NEXT:    and.b #1, %d1
 ; ATOMIC-PIC-NEXT:    cmpi.b #0, %d1
+; ATOMIC-PIC-NEXT:    move.w %ccr, %d2
 ; ATOMIC-PIC-NEXT:    move.b %d0, %d1
+; ATOMIC-PIC-NEXT:    move.w %d2, %ccr
 ; ATOMIC-PIC-NEXT:    beq .LBB12_1
 ; ATOMIC-PIC-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; ATOMIC-PIC-NEXT:    movem.l (0,%sp), %d2 ; 8-byte Folded Reload
@@ -1238,33 +1712,61 @@ start:
 }
 
 define i16 @atomicrmw_sub_i16_arid(ptr align 2 %self) {
-; NO-ATOMIC-LABEL: atomicrmw_sub_i16_arid:
-; NO-ATOMIC:         .cfi_startproc
-; NO-ATOMIC-NEXT:  ; %bb.0: ; %start
-; NO-ATOMIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT:    move.l (16,%sp), %a0
-; NO-ATOMIC-NEXT:    move.l (%a0), %d0
-; NO-ATOMIC-NEXT:    add.l #4, %d0
-; NO-ATOMIC-NEXT:    move.l %d0, (%sp)
-; NO-ATOMIC-NEXT:    move.l #1, (4,%sp)
-; NO-ATOMIC-NEXT:    jsr __sync_fetch_and_sub_2
-; NO-ATOMIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-NEXT:    rts
-;
-; NO-ATOMIC-PIC-LABEL: atomicrmw_sub_i16_arid:
-; NO-ATOMIC-PIC:         .cfi_startproc
-; NO-ATOMIC-PIC-NEXT:  ; %bb.0: ; %start
-; NO-ATOMIC-PIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-PIC-NEXT:    move.l (16,%sp), %a0
-; NO-ATOMIC-PIC-NEXT:    move.l (%a0), %d0
-; NO-ATOMIC-PIC-NEXT:    add.l #4, %d0
-; NO-ATOMIC-PIC-NEXT:    move.l %d0, (%sp)
-; NO-ATOMIC-PIC-NEXT:    move.l #1, (4,%sp)
-; NO-ATOMIC-PIC-NEXT:    jsr (__sync_fetch_and_sub_2@PLT,%pc)
-; NO-ATOMIC-PIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-PIC-NEXT:    rts
+; NO-ATOMIC-000-LABEL: atomicrmw_sub_i16_arid:
+; NO-ATOMIC-000:         .cfi_startproc
+; NO-ATOMIC-000-NEXT:  ; %bb.0: ; %start
+; NO-ATOMIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-000-NEXT:    move.l (16,%sp), %a0
+; NO-ATOMIC-000-NEXT:    move.l (%a0), %d0
+; NO-ATOMIC-000-NEXT:    add.l #4, %d0
+; NO-ATOMIC-000-NEXT:    move.l %d0, (%sp)
+; NO-ATOMIC-000-NEXT:    move.l #1, (4,%sp)
+; NO-ATOMIC-000-NEXT:    jsr __sync_fetch_and_sub_2
+; NO-ATOMIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-000-NEXT:    rts
+;
+; NO-ATOMIC-010-LABEL: atomicrmw_sub_i16_arid:
+; NO-ATOMIC-010:         .cfi_startproc
+; NO-ATOMIC-010-NEXT:  ; %bb.0: ; %start
+; NO-ATOMIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-010-NEXT:    move.l (16,%sp), %a0
+; NO-ATOMIC-010-NEXT:    move.l (%a0), %d0
+; NO-ATOMIC-010-NEXT:    add.l #4, %d0
+; NO-ATOMIC-010-NEXT:    move.l %d0, (%sp)
+; NO-ATOMIC-010-NEXT:    move.l #1, (4,%sp)
+; NO-ATOMIC-010-NEXT:    jsr __sync_fetch_and_sub_2
+; NO-ATOMIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-010-NEXT:    rts
+;
+; NO-ATOMIC-PIC-000-LABEL: atomicrmw_sub_i16_arid:
+; NO-ATOMIC-PIC-000:         .cfi_startproc
+; NO-ATOMIC-PIC-000-NEXT:  ; %bb.0: ; %start
+; NO-ATOMIC-PIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-000-NEXT:    move.l (16,%sp), %a0
+; NO-ATOMIC-PIC-000-NEXT:    move.l (%a0), %d0
+; NO-ATOMIC-PIC-000-NEXT:    add.l #4, %d0
+; NO-ATOMIC-PIC-000-NEXT:    move.l %d0, (%sp)
+; NO-ATOMIC-PIC-000-NEXT:    move.l #1, (4,%sp)
+; NO-ATOMIC-PIC-000-NEXT:    jsr (__sync_fetch_and_sub_2@PLT,%pc)
+; NO-ATOMIC-PIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-000-NEXT:    rts
+;
+; NO-ATOMIC-PIC-010-LABEL: atomicrmw_sub_i16_arid:
+; NO-ATOMIC-PIC-010:         .cfi_startproc
+; NO-ATOMIC-PIC-010-NEXT:  ; %bb.0: ; %start
+; NO-ATOMIC-PIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-010-NEXT:    move.l (16,%sp), %a0
+; NO-ATOMIC-PIC-010-NEXT:    move.l (%a0), %d0
+; NO-ATOMIC-PIC-010-NEXT:    add.l #4, %d0
+; NO-ATOMIC-PIC-010-NEXT:    move.l %d0, (%sp)
+; NO-ATOMIC-PIC-010-NEXT:    move.l #1, (4,%sp)
+; NO-ATOMIC-PIC-010-NEXT:    jsr (__sync_fetch_and_sub_2@PLT,%pc)
+; NO-ATOMIC-PIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-010-NEXT:    rts
 ;
 ; ATOMIC-LABEL: atomicrmw_sub_i16_arid:
 ; ATOMIC:         .cfi_startproc
@@ -1286,7 +1788,9 @@ define i16 @atomicrmw_sub_i16_arid(ptr align 2 %self) {
 ; ATOMIC-NEXT:    seq %d1
 ; ATOMIC-NEXT:    and.b #1, %d1
 ; ATOMIC-NEXT:    cmpi.b #0, %d1
+; ATOMIC-NEXT:    move.w %ccr, %d2
 ; ATOMIC-NEXT:    move.w %d0, %d1
+; ATOMIC-NEXT:    move.w %d2, %ccr
 ; ATOMIC-NEXT:    beq .LBB13_1
 ; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; ATOMIC-NEXT:    movem.l (0,%sp), %d2 ; 8-byte Folded Reload
@@ -1313,7 +1817,9 @@ define i16 @atomicrmw_sub_i16_arid(ptr align 2 %self) {
 ; ATOMIC-PIC-NEXT:    seq %d1
 ; ATOMIC-PIC-NEXT:    and.b #1, %d1
 ; ATOMIC-PIC-NEXT:    cmpi.b #0, %d1
+; ATOMIC-PIC-NEXT:    move.w %ccr, %d2
 ; ATOMIC-PIC-NEXT:    move.w %d0, %d1
+; ATOMIC-PIC-NEXT:    move.w %d2, %ccr
 ; ATOMIC-PIC-NEXT:    beq .LBB13_1
 ; ATOMIC-PIC-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; ATOMIC-PIC-NEXT:    movem.l (0,%sp), %d2 ; 8-byte Folded Reload
@@ -1327,33 +1833,61 @@ start:
 }
 
 define i32 @atomicrmw_sub_i32_arid(ptr align 2 %self) {
-; NO-ATOMIC-LABEL: atomicrmw_sub_i32_arid:
-; NO-ATOMIC:         .cfi_startproc
-; NO-ATOMIC-NEXT:  ; %bb.0: ; %start
-; NO-ATOMIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT:    move.l (16,%sp), %a0
-; NO-ATOMIC-NEXT:    move.l (%a0), %d0
-; NO-ATOMIC-NEXT:    add.l #4, %d0
-; NO-ATOMIC-NEXT:    move.l %d0, (%sp)
-; NO-ATOMIC-NEXT:    move.l #1, (4,%sp)
-; NO-ATOMIC-NEXT:    jsr __sync_fetch_and_sub_4
-; NO-ATOMIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-NEXT:    rts
-;
-; NO-ATOMIC-PIC-LABEL: atomicrmw_sub_i32_arid:
-; NO-ATOMIC-PIC:         .cfi_startproc
-; NO-ATOMIC-PIC-NEXT:  ; %bb.0: ; %start
-; NO-ATOMIC-PIC-NEXT:    suba.l #12, %sp
-; NO-ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -16
-; NO-ATOMIC-PIC-NEXT:    move.l (16,%sp), %a0
-; NO-ATOMIC-PIC-NEXT:    move.l (%a0), %d0
-; NO-ATOMIC-PIC-NEXT:    add.l #4, %d0
-; NO-ATOMIC-PIC-NEXT:    move.l %d0, (%sp)
-; NO-ATOMIC-PIC-NEXT:    move.l #1, (4,%sp)
-; NO-ATOMIC-PIC-NEXT:    jsr (__sync_fetch_and_sub_4@PLT,%pc)
-; NO-ATOMIC-PIC-NEXT:    adda.l #12, %sp
-; NO-ATOMIC-PIC-NEXT:    rts
+; NO-ATOMIC-000-LABEL: atomicrmw_sub_i32_arid:
+; NO-ATOMIC-000:         .cfi_startproc
+; NO-ATOMIC-000-NEXT:  ; %bb.0: ; %start
+; NO-ATOMIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-000-NEXT:    move.l (16,%sp), %a0
+; NO-ATOMIC-000-NEXT:    move.l (%a0), %d0
+; NO-ATOMIC-000-NEXT:    add.l #4, %d0
+; NO-ATOMIC-000-NEXT:    move.l %d0, (%sp)
+; NO-ATOMIC-000-NEXT:    move.l #1, (4,%sp)
+; NO-ATOMIC-000-NEXT:    jsr __sync_fetch_and_sub_4
+; NO-ATOMIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-000-NEXT:    rts
+;
+; NO-ATOMIC-010-LABEL: atomicrmw_sub_i32_arid:
+; NO-ATOMIC-010:         .cfi_startproc
+; NO-ATOMIC-010-NEXT:  ; %bb.0: ; %start
+; NO-ATOMIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-010-NEXT:    move.l (16,%sp), %a0
+; NO-ATOMIC-010-NEXT:    move.l (%a0), %d0
+; NO-ATOMIC-010-NEXT:    add.l #4, %d0
+; NO-ATOMIC-010-NEXT:    move.l %d0, (%sp)
+; NO-ATOMIC-010-NEXT:    move.l #1, (4,%sp)
+; NO-ATOMIC-010-NEXT:    jsr __sync_fetch_and_sub_4
+; NO-ATOMIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-010-NEXT:    rts
+;
+; NO-ATOMIC-PIC-000-LABEL: atomicrmw_sub_i32_arid:
+; NO-ATOMIC-PIC-000:         .cfi_startproc
+; NO-ATOMIC-PIC-000-NEXT:  ; %bb.0: ; %start
+; NO-ATOMIC-PIC-000-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-000-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-000-NEXT:    move.l (16,%sp), %a0
+; NO-ATOMIC-PIC-000-NEXT:    move.l (%a0), %d0
+; NO-ATOMIC-PIC-000-NEXT:    add.l #4, %d0
+; NO-ATOMIC-PIC-000-NEXT:    move.l %d0, (%sp)
+; NO-ATOMIC-PIC-000-NEXT:    move.l #1, (4,%sp)
+; NO-ATOMIC-PIC-000-NEXT:    jsr (__sync_fetch_and_sub_4@PLT,%pc)
+; NO-ATOMIC-PIC-000-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-000-NEXT:    rts
+;
+; NO-ATOMIC-PIC-010-LABEL: atomicrmw_sub_i32_arid:
+; NO-ATOMIC-PIC-010:         .cfi_startproc
+; NO-ATOMIC-PIC-010-NEXT:  ; %bb.0: ; %start
+; NO-ATOMIC-PIC-010-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-010-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-010-NEXT:    move.l (16,%sp), %a0
+; NO-ATOMIC-PIC-010-NEXT:    move.l (%a0), %d0
+; NO-ATOMIC-PIC-010-NEXT:    add.l #4, %d0
+; NO-ATOMIC-PIC-010-NEXT:    move.l %d0, (%sp)
+; NO-ATOMIC-PIC-010-NEXT:    move.l #1, (4,%sp)
+; NO-ATOMIC-PIC-010-NEXT:    jsr (__sync_fetch_and_sub_4@PLT,%pc)
+; NO-ATOMIC-PIC-010-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-010-NEXT:    rts
 ;
 ; ATOMIC-LABEL: atomicrmw_sub_i32_arid:
 ; ATOMIC:         .cfi_startproc
@@ -1375,7 +1909,9 @@ define i32 @atomicrmw_sub_i32_arid(ptr align 2 %self) {
 ; ATOMIC-NEXT:    seq %d1
 ; ATOMIC-NEXT:    and.b #1, %d1
 ; ATOMIC-NEXT:    cmpi.b #0, %d1
+; ATOMIC-NEXT:    move.w %ccr, %d2
 ; ATOMIC-NEXT:    move.l %d0, %d1
+; ATOMIC-NEXT:    move.w %d2, %ccr
 ; ATOMIC-NEXT:    beq .LBB14_1
 ; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; ATOMIC-NEXT:    movem.l (0,%sp), %d2 ; 8-byte Folded Reload
@@ -1402,7 +1938,9 @@ define i32 @atomicrmw_sub_i32_arid(ptr align 2 %self) {
 ; ATOMIC-PIC-NEXT:    seq %d1
 ; ATOMIC-PIC-NEXT:    and.b #1, %d1
 ; ATOMIC-PIC-NEXT:    cmpi.b #0, %d1
+; ATOMIC-PIC-NEXT:    move.w %ccr, %d2
 ; ATOMIC-PIC-NEXT:    move.l %d0, %d1
+; ATOMIC-PIC-NEXT:    move.w %d2, %ccr
 ; ATOMIC-PIC-NEXT:    beq .LBB14_1
 ; ATOMIC-PIC-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; ATOMIC-PIC-NEXT:    movem.l (0,%sp), %d2 ; 8-byte Folded Reload