diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp index eb46124d9eb5f..caacacb7a7983 100644 --- a/llvm/lib/CodeGen/MachineInstr.cpp +++ b/llvm/lib/CodeGen/MachineInstr.cpp @@ -1398,7 +1398,9 @@ bool MachineInstr::isDead(const MachineRegisterInfo &MRI, Register Reg = MO.getReg(); if (Reg.isPhysical()) { // Don't delete live physreg defs, or any reserved register defs. - if (!LivePhysRegs || !LivePhysRegs->available(Reg) || MRI.isReserved(Reg)) + if ((!(MRI.tracksLiveness() && MO.isDead()) && + (!LivePhysRegs || !LivePhysRegs->available(Reg))) || + MRI.isReserved(Reg)) return false; } else { if (MO.isDead()) diff --git a/llvm/test/CodeGen/RISCV/machine-sink.mir b/llvm/test/CodeGen/RISCV/machine-sink.mir new file mode 100644 index 0000000000000..fb81c13300d51 --- /dev/null +++ b/llvm/test/CodeGen/RISCV/machine-sink.mir @@ -0,0 +1,113 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6 +# RUN: llc -mtriple=riscv64 -run-pass machine-sink -sink-insts-to-avoid-spills -o - %s | FileCheck %s +--- +name: no_delete_live_phys_def +tracksRegLiveness: true +body: | + ; CHECK-LABEL: name: no_delete_live_phys_def + ; CHECK: bb.0: + ; CHECK-NEXT: successors: %bb.1(0x80000000) + ; CHECK-NEXT: liveins: $x8 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: %x:gpr = COPY $x8 + ; CHECK-NEXT: %y:gpr = COPY %x, implicit-def $x8 + ; CHECK-NEXT: PseudoBR %bb.1 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: bb.1: + ; CHECK-NEXT: successors: %bb.1(0x80000000) + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: %z:gpr = ADDI %y, 1 + ; CHECK-NEXT: PseudoBR %bb.1 + bb.0: + liveins: $x8 + %x:gpr = COPY $x8 + %y:gpr = COPY %x, implicit-def $x8 + PseudoBR %bb.1 + bb.1: + %z:gpr = ADDI %y, 1 + PseudoBR %bb.1 +... +--- +name: delete_dead_phys_def +tracksRegLiveness: true +body: | + ; CHECK-LABEL: name: delete_dead_phys_def + ; CHECK: bb.0: + ; CHECK-NEXT: successors: %bb.1(0x80000000) + ; CHECK-NEXT: liveins: $x8 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: %x:gpr = COPY $x8 + ; CHECK-NEXT: PseudoBR %bb.1 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: bb.1: + ; CHECK-NEXT: successors: %bb.1(0x80000000) + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY %x, implicit-def dead $x8 + ; CHECK-NEXT: %z:gpr = ADDI [[COPY]], 1 + ; CHECK-NEXT: PseudoBR %bb.1 + bb.0: + liveins: $x8 + %x:gpr = COPY $x8 + %y:gpr = COPY %x, implicit-def dead $x8 + PseudoBR %bb.1 + bb.1: + %z:gpr = ADDI %y, 1 + PseudoBR %bb.1 +... +--- +name: no_delete_dead_phys_def_no_tracksregliveness +tracksRegLiveness: false +body: | + ; CHECK-LABEL: name: no_delete_dead_phys_def_no_tracksregliveness + ; CHECK: bb.0: + ; CHECK-NEXT: successors: %bb.1(0x80000000) + ; CHECK-NEXT: liveins: $x8 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: %x:gpr = COPY $x8 + ; CHECK-NEXT: %y:gpr = COPY %x, implicit-def dead $x8 + ; CHECK-NEXT: PseudoBR %bb.1 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: bb.1: + ; CHECK-NEXT: successors: %bb.1(0x80000000) + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY %x, implicit-def dead $x8 + ; CHECK-NEXT: %z:gpr = ADDI [[COPY]], 1 + ; CHECK-NEXT: PseudoBR %bb.1 + bb.0: + liveins: $x8 + %x:gpr = COPY $x8 + %y:gpr = COPY %x, implicit-def dead $x8 + PseudoBR %bb.1 + bb.1: + %z:gpr = ADDI %y, 1 + PseudoBR %bb.1 +... +--- +name: reserved_phys_def +tracksRegLiveness: true +body: | + ; CHECK-LABEL: name: reserved_phys_def + ; CHECK: bb.0: + ; CHECK-NEXT: successors: %bb.1(0x80000000) + ; CHECK-NEXT: liveins: $x8 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: %x:gpr = COPY $x8 + ; CHECK-NEXT: %y:gpr = COPY %x, implicit-def dead $x2 + ; CHECK-NEXT: PseudoBR %bb.1 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: bb.1: + ; CHECK-NEXT: successors: %bb.1(0x80000000) + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY %x, implicit-def dead $x2 + ; CHECK-NEXT: %z:gpr = ADDI [[COPY]], 1 + ; CHECK-NEXT: PseudoBR %bb.1 + bb.0: + liveins: $x8 + %x:gpr = COPY $x8 + %y:gpr = COPY %x, implicit-def dead $x2 + PseudoBR %bb.1 + + bb.1: + %z:gpr = ADDI %y, 1 + PseudoBR %bb.1 +...