From 74c8f1b3f523c13d24bfbce403daff906fba84a1 Mon Sep 17 00:00:00 2001 From: Luke Lau Date: Wed, 19 Nov 2025 16:26:48 +0800 Subject: [PATCH 1/3] Precommit tests --- llvm/test/CodeGen/RISCV/machine-sink.mir | 86 ++++++++++++++++++++++++ 1 file changed, 86 insertions(+) create mode 100644 llvm/test/CodeGen/RISCV/machine-sink.mir diff --git a/llvm/test/CodeGen/RISCV/machine-sink.mir b/llvm/test/CodeGen/RISCV/machine-sink.mir new file mode 100644 index 0000000000000..5c7ba672f6ca7 --- /dev/null +++ b/llvm/test/CodeGen/RISCV/machine-sink.mir @@ -0,0 +1,86 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6 +# RUN: llc -mtriple=riscv64 -run-pass machine-sink -sink-insts-to-avoid-spills -o - %s | FileCheck %s +--- +name: no_delete_live_phys_def +tracksRegLiveness: true +body: | + ; CHECK-LABEL: name: no_delete_live_phys_def + ; CHECK: bb.0: + ; CHECK-NEXT: successors: %bb.1(0x80000000) + ; CHECK-NEXT: liveins: $x8 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: %x:gpr = COPY $x8 + ; CHECK-NEXT: %y:gpr = COPY %x, implicit-def $x8 + ; CHECK-NEXT: PseudoBR %bb.1 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: bb.1: + ; CHECK-NEXT: successors: %bb.1(0x80000000) + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: %z:gpr = ADDI %y, 1 + ; CHECK-NEXT: PseudoBR %bb.1 + bb.0: + liveins: $x8 + %x:gpr = COPY $x8 + %y:gpr = COPY %x, implicit-def $x8 + PseudoBR %bb.1 + bb.1: + %z:gpr = ADDI %y, 1 + PseudoBR %bb.1 +... +--- +name: delete_dead_phys_def +tracksRegLiveness: true +body: | + ; CHECK-LABEL: name: delete_dead_phys_def + ; CHECK: bb.0: + ; CHECK-NEXT: successors: %bb.1(0x80000000) + ; CHECK-NEXT: liveins: $x8 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: %x:gpr = COPY $x8 + ; CHECK-NEXT: %y:gpr = COPY %x, implicit-def dead $x8 + ; CHECK-NEXT: PseudoBR %bb.1 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: bb.1: + ; CHECK-NEXT: successors: %bb.1(0x80000000) + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY %x, implicit-def dead $x8 + ; CHECK-NEXT: %z:gpr = ADDI [[COPY]], 1 + ; CHECK-NEXT: PseudoBR %bb.1 + bb.0: + liveins: $x8 + %x:gpr = COPY $x8 + %y:gpr = COPY %x, implicit-def dead $x8 + PseudoBR %bb.1 + bb.1: + %z:gpr = ADDI %y, 1 + PseudoBR %bb.1 +... +--- +name: reserved_phys_def +tracksRegLiveness: true +body: | + ; CHECK-LABEL: name: reserved_phys_def + ; CHECK: bb.0: + ; CHECK-NEXT: successors: %bb.1(0x80000000) + ; CHECK-NEXT: liveins: $x8 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: %x:gpr = COPY $x8 + ; CHECK-NEXT: %y:gpr = COPY %x, implicit-def dead $x2 + ; CHECK-NEXT: PseudoBR %bb.1 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: bb.1: + ; CHECK-NEXT: successors: %bb.1(0x80000000) + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY %x, implicit-def dead $x2 + ; CHECK-NEXT: %z:gpr = ADDI [[COPY]], 1 + ; CHECK-NEXT: PseudoBR %bb.1 + bb.0: + liveins: $x8 + %x:gpr = COPY $x8 + %y:gpr = COPY %x, implicit-def dead $x2 + PseudoBR %bb.1 + + bb.1: + %z:gpr = ADDI %y, 1 + PseudoBR %bb.1 +... From 215423a567a91967a057e2c08ff6884a99c0f2b7 Mon Sep 17 00:00:00 2001 From: Luke Lau Date: Wed, 19 Nov 2025 16:27:11 +0800 Subject: [PATCH 2/3] [CodeGen] Check physical def kill flag in MachineInstr::isDead Currently when checking if a MachineInstr is dead we use LiveRegUnits to check if any physical defs are alive. However if the kill/dead flag is set on the def, then we don't need to rely on LiveRegUnits check. This should save some cycles on the hot path and allows users of isDead which don't pass in LiveRegUnits to catch more dead instructions. --- llvm/lib/CodeGen/MachineInstr.cpp | 3 ++- llvm/test/CodeGen/RISCV/machine-sink.mir | 1 - 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp index eb46124d9eb5f..d6790714b9660 100644 --- a/llvm/lib/CodeGen/MachineInstr.cpp +++ b/llvm/lib/CodeGen/MachineInstr.cpp @@ -1398,7 +1398,8 @@ bool MachineInstr::isDead(const MachineRegisterInfo &MRI, Register Reg = MO.getReg(); if (Reg.isPhysical()) { // Don't delete live physreg defs, or any reserved register defs. - if (!LivePhysRegs || !LivePhysRegs->available(Reg) || MRI.isReserved(Reg)) + if ((!MO.isDead() && (!LivePhysRegs || !LivePhysRegs->available(Reg))) || + MRI.isReserved(Reg)) return false; } else { if (MO.isDead()) diff --git a/llvm/test/CodeGen/RISCV/machine-sink.mir b/llvm/test/CodeGen/RISCV/machine-sink.mir index 5c7ba672f6ca7..213e6fd73e196 100644 --- a/llvm/test/CodeGen/RISCV/machine-sink.mir +++ b/llvm/test/CodeGen/RISCV/machine-sink.mir @@ -37,7 +37,6 @@ body: | ; CHECK-NEXT: liveins: $x8 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: %x:gpr = COPY $x8 - ; CHECK-NEXT: %y:gpr = COPY %x, implicit-def dead $x8 ; CHECK-NEXT: PseudoBR %bb.1 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: From 577cf9acfc5b6f7f3fd68aadc9d4894c573cc1bc Mon Sep 17 00:00:00 2001 From: Luke Lau Date: Wed, 19 Nov 2025 17:13:01 +0800 Subject: [PATCH 3/3] Check for tracksRegLiveness --- llvm/lib/CodeGen/MachineInstr.cpp | 3 ++- llvm/test/CodeGen/RISCV/machine-sink.mir | 28 ++++++++++++++++++++++++ 2 files changed, 30 insertions(+), 1 deletion(-) diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp index d6790714b9660..caacacb7a7983 100644 --- a/llvm/lib/CodeGen/MachineInstr.cpp +++ b/llvm/lib/CodeGen/MachineInstr.cpp @@ -1398,7 +1398,8 @@ bool MachineInstr::isDead(const MachineRegisterInfo &MRI, Register Reg = MO.getReg(); if (Reg.isPhysical()) { // Don't delete live physreg defs, or any reserved register defs. - if ((!MO.isDead() && (!LivePhysRegs || !LivePhysRegs->available(Reg))) || + if ((!(MRI.tracksLiveness() && MO.isDead()) && + (!LivePhysRegs || !LivePhysRegs->available(Reg))) || MRI.isReserved(Reg)) return false; } else { diff --git a/llvm/test/CodeGen/RISCV/machine-sink.mir b/llvm/test/CodeGen/RISCV/machine-sink.mir index 213e6fd73e196..fb81c13300d51 100644 --- a/llvm/test/CodeGen/RISCV/machine-sink.mir +++ b/llvm/test/CodeGen/RISCV/machine-sink.mir @@ -55,6 +55,34 @@ body: | PseudoBR %bb.1 ... --- +name: no_delete_dead_phys_def_no_tracksregliveness +tracksRegLiveness: false +body: | + ; CHECK-LABEL: name: no_delete_dead_phys_def_no_tracksregliveness + ; CHECK: bb.0: + ; CHECK-NEXT: successors: %bb.1(0x80000000) + ; CHECK-NEXT: liveins: $x8 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: %x:gpr = COPY $x8 + ; CHECK-NEXT: %y:gpr = COPY %x, implicit-def dead $x8 + ; CHECK-NEXT: PseudoBR %bb.1 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: bb.1: + ; CHECK-NEXT: successors: %bb.1(0x80000000) + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY %x, implicit-def dead $x8 + ; CHECK-NEXT: %z:gpr = ADDI [[COPY]], 1 + ; CHECK-NEXT: PseudoBR %bb.1 + bb.0: + liveins: $x8 + %x:gpr = COPY $x8 + %y:gpr = COPY %x, implicit-def dead $x8 + PseudoBR %bb.1 + bb.1: + %z:gpr = ADDI %y, 1 + PseudoBR %bb.1 +... +--- name: reserved_phys_def tracksRegLiveness: true body: |