diff --git a/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp b/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
index 2ddc9b0adb9e1..b347351e1a8a5 100644
--- a/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
+++ b/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
@@ -519,13 +519,13 @@ class VSETVLIInfo {
     unsigned AVLImm;
   };
 
-  enum : uint8_t {
+  enum class AVLState : uint8_t {
     Uninitialized,
     AVLIsReg,
     AVLIsImm,
     AVLIsVLMAX,
     Unknown, // AVL and VTYPE are fully unknown
-  } State = Uninitialized;
+  } State = AVLState::Uninitialized;
 
   // Fields from VTYPE.
   RISCVVType::VLMUL VLMul = RISCVVType::LMUL_1;
@@ -547,27 +547,27 @@ class VSETVLIInfo {
     return Info;
   }
 
-  bool isValid() const { return State != Uninitialized; }
-  void setUnknown() { State = Unknown; }
-  bool isUnknown() const { return State == Unknown; }
+  bool isValid() const { return State != AVLState::Uninitialized; }
+  void setUnknown() { State = AVLState::Unknown; }
+  bool isUnknown() const { return State == AVLState::Unknown; }
 
   void setAVLRegDef(const VNInfo *VNInfo, Register AVLReg) {
     assert(AVLReg.isVirtual());
     AVLRegDef.ValNo = VNInfo;
     AVLRegDef.DefReg = AVLReg;
-    State = AVLIsReg;
+    State = AVLState::AVLIsReg;
   }
 
   void setAVLImm(unsigned Imm) {
     AVLImm = Imm;
-    State = AVLIsImm;
+    State = AVLState::AVLIsImm;
   }
 
-  void setAVLVLMAX() { State = AVLIsVLMAX; }
+  void setAVLVLMAX() { State = AVLState::AVLIsVLMAX; }
 
-  bool hasAVLImm() const { return State == AVLIsImm; }
-  bool hasAVLReg() const { return State == AVLIsReg; }
-  bool hasAVLVLMAX() const { return State == AVLIsVLMAX; }
+  bool hasAVLImm() const { return State == AVLState::AVLIsImm; }
+  bool hasAVLReg() const { return State == AVLState::AVLIsReg; }
+  bool hasAVLVLMAX() const { return State == AVLState::AVLIsVLMAX; }
   Register getAVLReg() const {
     assert(hasAVLReg() && AVLRegDef.DefReg.isVirtual());
     return AVLRegDef.DefReg;
@@ -839,19 +839,19 @@ class VSETVLIInfo {
   void print(raw_ostream &OS) const {
     OS << "{";
     switch (State) {
-    case Uninitialized:
+    case AVLState::Uninitialized:
       OS << "Uninitialized";
       break;
-    case Unknown:
+    case AVLState::Unknown:
       OS << "unknown";
       break;
-    case AVLIsReg:
+    case AVLState::AVLIsReg:
       OS << "AVLReg=" << llvm::printReg(getAVLReg());
       break;
-    case AVLIsImm:
+    case AVLState::AVLIsImm:
       OS << "AVLImm=" << (unsigned)AVLImm;
       break;
-    case AVLIsVLMAX:
+    case AVLState::AVLIsVLMAX:
       OS << "AVLVLMAX";
       break;
     }