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1 change: 1 addition & 0 deletions mlir/lib/Dialect/ControlFlow/IR/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -12,4 +12,5 @@ add_mlir_dialect_library(MLIRControlFlowDialect
MLIRControlFlowInterfaces
MLIRIR
MLIRSideEffectInterfaces
MLIRUBDialect
)
34 changes: 33 additions & 1 deletion mlir/lib/Dialect/ControlFlow/IR/ControlFlowOps.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -12,6 +12,7 @@
#include "mlir/Dialect/Arith/IR/Arith.h"
#include "mlir/Dialect/Bufferization/IR/BufferDeallocationOpInterface.h"
#include "mlir/Dialect/Bufferization/IR/BufferizableOpInterface.h"
#include "mlir/Dialect/UB/IR/UBOps.h"
#include "mlir/IR/AffineExpr.h"
#include "mlir/IR/AffineMap.h"
#include "mlir/IR/Builders.h"
Expand Down Expand Up @@ -445,14 +446,45 @@ struct CondBranchTruthPropagation : public OpRewritePattern<CondBranchOp> {
return success(replaced);
}
};

/// If the destination block of a conditional branch contains only
/// ub.unreachable, unconditionally branch to the other destination.
struct DropUnreachableCondBranch : public OpRewritePattern<CondBranchOp> {
using OpRewritePattern<CondBranchOp>::OpRewritePattern;

LogicalResult matchAndRewrite(CondBranchOp condbr,
PatternRewriter &rewriter) const override {
// If the "true" destination is unreachable, branch to the "false"
// destination.
Block *trueDest = condbr.getTrueDest();
Block *falseDest = condbr.getFalseDest();
if (llvm::hasSingleElement(*trueDest) &&
isa<ub::UnreachableOp>(trueDest->getTerminator())) {
rewriter.replaceOpWithNewOp<BranchOp>(condbr, falseDest,
condbr.getFalseOperands());
return success();
}

// If the "false" destination is unreachable, branch to the "true"
// destination.
if (llvm::hasSingleElement(*falseDest) &&
isa<ub::UnreachableOp>(falseDest->getTerminator())) {
rewriter.replaceOpWithNewOp<BranchOp>(condbr, trueDest,
condbr.getTrueOperands());
return success();
}

return failure();
}
};
} // namespace

void CondBranchOp::getCanonicalizationPatterns(RewritePatternSet &results,
MLIRContext *context) {
results.add<SimplifyConstCondBranchPred, SimplifyPassThroughCondBranch,
SimplifyCondBranchIdenticalSuccessors,
SimplifyCondBranchFromCondBranchOnSameCondition,
CondBranchTruthPropagation>(context);
CondBranchTruthPropagation, DropUnreachableCondBranch>(context);
}

SuccessorOperands CondBranchOp::getSuccessorOperands(unsigned index) {
Expand Down
22 changes: 22 additions & 0 deletions mlir/test/Dialect/ControlFlow/canonicalize.mlir
Original file line number Diff line number Diff line change
Expand Up @@ -634,3 +634,25 @@ func.func @unsimplified_cycle_2(%c : i1) {
^bb7:
cf.br ^bb6
}

// CHECK-LABEL: @drop_unreachable_branch_1
// CHECK-NEXT: "test.foo"() : () -> ()
// CHECK-NEXT: return
func.func @drop_unreachable_branch_1(%c: i1) {
cf.cond_br %c, ^bb1, ^bb2
^bb1:
"test.foo"() : () -> ()
return
^bb2:
ub.unreachable
}

// CHECK-LABEL: @drop_unreachable_branch_2
// CHECK-NEXT: ub.unreachable
func.func @drop_unreachable_branch_2(%c: i1) {
cf.cond_br %c, ^bb1, ^bb2
^bb1:
ub.unreachable
^bb2:
ub.unreachable
}