diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td b/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td index 8d13aed7ba096..8aff5b3c62f6d 100644 --- a/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td +++ b/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td @@ -4567,9 +4567,10 @@ multiclass VPatUnaryV_VF vtilist, bit isSEWAware = 0> { + list vtilist, bit isSEWAware = 0, + list ExtraPreds = []> { foreach vti = vtilist in { - let Predicates = GetVTypePredicates.Predicates in { + let Predicates = !listconcat(ExtraPreds, GetVTypePredicates.Predicates) in { def : VPatUnaryNoMask; @@ -4813,9 +4814,10 @@ multiclass VPatConversionRTZ vtilist, bit isSEWAware = 0> { + list vtilist, bit isSEWAware = 0, + list ExtraPreds = []> { foreach vti = vtilist in - let Predicates = GetVTypePredicates.Predicates in + let Predicates = !listconcat(ExtraPreds, GetVTypePredicates.Predicates) in defm : VPatBinary vtilist, bit isSEWAware = 0> { + list vtilist, bit isSEWAware = 0, + list ExtraPreds = []> { foreach vti = vtilist in { defvar kind = "V"#vti.ScalarSuffix; - let Predicates = GetVTypePredicates.Predicates in + let Predicates = !listconcat(ExtraPreds, GetVTypePredicates.Predicates) in defm : VPatBinary vtilist, Operand imm_type> { + list vtilist, Operand imm_type, + list ExtraPreds = []> { foreach vti = vtilist in - let Predicates = GetVTypePredicates.Predicates in + let Predicates = !listconcat(ExtraPreds, GetVTypePredicates.Predicates) in defm : VPatBinary { } multiclass VPatBinaryW_VV vtilist> { + list vtilist, + list ExtraPreds = []> { foreach VtiToWti = vtilist in { defvar Vti = VtiToWti.Vti; defvar Wti = VtiToWti.Wti; - let Predicates = !listconcat(GetVTypePredicates.Predicates, + let Predicates = !listconcat(ExtraPreds, + GetVTypePredicates.Predicates, GetVTypePredicates.Predicates) in defm : VPatBinary vtilist, Operand ImmType = simm5> - : VPatBinaryV_VV, - VPatBinaryV_VX, - VPatBinaryV_VI; + list vtilist, Operand ImmType = simm5, + list ExtraPreds = []> + : VPatBinaryV_VV, + VPatBinaryV_VX, + VPatBinaryV_VI; multiclass VPatBinaryV_VV_VX_VI_RM vtilist, Operand ImmType> @@ -5354,9 +5361,10 @@ multiclass VPatBinaryV_VV_VX_VI_RM; multiclass VPatBinaryV_VV_VX vtilist, bit isSEWAware = 0> - : VPatBinaryV_VV, - VPatBinaryV_VX; + list vtilist, bit isSEWAware = 0, + list ExtraPreds = []> + : VPatBinaryV_VV, + VPatBinaryV_VX; multiclass VPatBinaryV_VV_VX_RM vtilist, bit isSEWAware = 0> diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td b/llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td index a0c0666f51c34..ed49786c93353 100644 --- a/llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td +++ b/llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td @@ -937,32 +937,42 @@ class VPatUnaryNoMask_VS_Zvk; multiclass VPatUnaryV_V_NoMask_Zvk vtilist> { + list vtilist, + list ExtraPreds> { foreach vti = vtilist in + let Predicates = !listconcat(ExtraPreds, GetVTypePredicates.Predicates) in def : VPatUnaryNoMask_Zvk; + vti.Vector, vti.Vector, vti.Log2SEW, + vti.LMul, vti.RegClass, vti.RegClass>; } multiclass VPatUnaryV_S_NoMaskVectorCrypto vtilist> { + list vtilist, + list ExtraPreds> { foreach vti = vtilist in foreach vti_vs2 = ZvkI32IntegerVectors.vs2_types in + let Predicates = !listconcat(ExtraPreds, + GetVTypePredicates.Predicates, + GetVTypePredicates.Predicates) in def : VPatUnaryNoMask_VS_Zvk; } multiclass VPatUnaryV_V_S_NoMask_Zvk vtilist> { - defm : VPatUnaryV_V_NoMask_Zvk; - defm : VPatUnaryV_S_NoMaskVectorCrypto; + list vtilist, + list ExtraPreds> { + defm : VPatUnaryV_V_NoMask_Zvk; + defm : VPatUnaryV_S_NoMaskVectorCrypto; } multiclass VPatBinaryV_VV_NoMask vtilist, + list ExtraPreds, bit isSEWAware = false> { foreach vti = vtilist in + let Predicates = !listconcat(ExtraPreds, GetVTypePredicates.Predicates) in def : VPatTernaryNoMaskWithPolicy vtilist, + list ExtraPreds, Operand imm_type = tuimm5> { foreach vti = vtilist in + let Predicates = !listconcat(ExtraPreds, GetVTypePredicates.Predicates) in def : VPatTernaryNoMaskWithPolicy vtilist, + list ExtraPreds, Operand imm_type = tuimm5> { foreach vti = vtilist in + let Predicates = !listconcat(ExtraPreds, GetVTypePredicates.Predicates) in def : VPatBinaryNoMaskTU; } multiclass VPatBinaryV_VV_NoMaskTU vtilist> { + list vtilist, + list ExtraPreds> { foreach vti = vtilist in + let Predicates = !listconcat(ExtraPreds, GetVTypePredicates.Predicates) in def : VPatBinaryNoMaskTU; @@ -1013,13 +1029,14 @@ multiclass VPatBinaryV_VX_VROTATE vtilist, bit isSEWAware = 0> { + list vtilist, bit isSEWAware = 0, + list ExtraPreds = []> { foreach vti = vtilist in { defvar Intr = !cast(intrinsic); defvar Pseudo = !cast( !if(isSEWAware, instruction#"_VI_"#vti.LMul.MX#"_E"#vti.SEW, instruction#"_VI_"#vti.LMul.MX)); - let Predicates = GetVTypePredicates.Predicates in + let Predicates = !listconcat(ExtraPreds, GetVTypePredicates.Predicates) in def : Pat<(vti.Vector (Intr (vti.Vector vti.RegClass:$passthru), (vti.Vector vti.RegClass:$rs2), (XLenVT uimm6:$rs1), @@ -1033,7 +1050,7 @@ multiclass VPatBinaryV_VI_VROL( !if(isSEWAware, instruction#"_VI_"#vti.LMul.MX#"_E"#vti.SEW#"_MASK", instruction#"_VI_"#vti.LMul.MX#"_MASK")); - let Predicates = GetVTypePredicates.Predicates in + let Predicates = !listconcat(ExtraPreds, GetVTypePredicates.Predicates) in def : Pat<(vti.Vector (IntrMask (vti.Vector vti.RegClass:$passthru), (vti.Vector vti.RegClass:$rs2), (XLenVT uimm6:$rs1), @@ -1048,18 +1065,21 @@ multiclass VPatBinaryV_VI_VROL vtilist> - : VPatBinaryV_VV_VX, - VPatBinaryV_VI_VROL; + string instruction2, list vtilist, + list ExtraPreds> + : VPatBinaryV_VV_VX, + VPatBinaryV_VI_VROL; multiclass VPatBinaryW_VV_VX_VI_VWSLL vtilist> - : VPatBinaryW_VV { + list vtilist, + list ExtraPreds> + : VPatBinaryW_VV { foreach VtiToWti = vtilist in { defvar Vti = VtiToWti.Vti; defvar Wti = VtiToWti.Wti; defvar kind = "V"#Vti.ScalarSuffix; - let Predicates = !listconcat(GetVTypePredicates.Predicates, + let Predicates = !listconcat(ExtraPreds, + GetVTypePredicates.Predicates, GetVTypePredicates.Predicates) in { defm : VPatBinary; - defm : VPatUnaryV_V<"int_riscv_vclz", "PseudoVCLZ", AllIntegerVectors>; - defm : VPatUnaryV_V<"int_riscv_vctz", "PseudoVCTZ", AllIntegerVectors>; - defm : VPatUnaryV_V<"int_riscv_vcpopv", "PseudoVCPOP", AllIntegerVectors>; - defm : VPatBinaryW_VV_VX_VI_VWSLL<"int_riscv_vwsll", "PseudoVWSLL", AllWidenableIntVectors>; -} // Predicates = [HasStdExtZvbb] - -let Predicates = [HasStdExtZvbc] in { - defm : VPatBinaryV_VV_VX<"int_riscv_vclmul", "PseudoVCLMUL", I64IntegerVectors>; - defm : VPatBinaryV_VV_VX<"int_riscv_vclmulh", "PseudoVCLMULH", I64IntegerVectors>; -} // Predicates = [HasStdExtZvbc] - -let Predicates = [HasStdExtZvkb] in { - defm : VPatBinaryV_VV_VX<"int_riscv_vandn", "PseudoVANDN", AllIntegerVectors>; - defm : VPatUnaryV_V<"int_riscv_vbrev8", "PseudoVBREV8", AllIntegerVectors>; - defm : VPatUnaryV_V<"int_riscv_vrev8", "PseudoVREV8", AllIntegerVectors>; - defm : VPatBinaryV_VV_VX_VROL<"int_riscv_vrol", "PseudoVROL", "PseudoVROR", AllIntegerVectors>; - defm : VPatBinaryV_VV_VX_VI<"int_riscv_vror", "PseudoVROR", AllIntegerVectors, uimm6>; -} // Predicates = [HasStdExtZvkb] - -let Predicates = [HasStdExtZvkg] in { - defm : VPatBinaryV_VV_NoMask<"int_riscv_vghsh", "PseudoVGHSH", I32IntegerVectors>; - defm : VPatUnaryV_V_NoMask_Zvk<"int_riscv_vgmul", "PseudoVGMUL", I32IntegerVectors>; -} // Predicates = [HasStdExtZvkg] - -let Predicates = [HasStdExtZvkned] in { - defm : VPatUnaryV_V_S_NoMask_Zvk<"int_riscv_vaesdf", "PseudoVAESDF", I32IntegerVectors>; - defm : VPatUnaryV_V_S_NoMask_Zvk<"int_riscv_vaesdm", "PseudoVAESDM", I32IntegerVectors>; - defm : VPatUnaryV_V_S_NoMask_Zvk<"int_riscv_vaesef", "PseudoVAESEF", I32IntegerVectors>; - defm : VPatUnaryV_V_S_NoMask_Zvk<"int_riscv_vaesem", "PseudoVAESEM", I32IntegerVectors>; - defm : VPatBinaryV_VI_NoMaskTU<"int_riscv_vaeskf1", "PseudoVAESKF1", I32IntegerVectors>; - defm : VPatBinaryV_VI_NoMask<"int_riscv_vaeskf2", "PseudoVAESKF2", I32IntegerVectors>; - defm : VPatUnaryV_S_NoMaskVectorCrypto<"int_riscv_vaesz", "PseudoVAESZ", I32IntegerVectors>; -} // Predicates = [HasStdExtZvkned] - -let Predicates = [HasStdExtZvknhaOrZvknhb] in { - defm : VPatBinaryV_VV_NoMask<"int_riscv_vsha2ch", "PseudoVSHA2CH", I32IntegerVectors>; - defm : VPatBinaryV_VV_NoMask<"int_riscv_vsha2cl", "PseudoVSHA2CL", I32IntegerVectors>; - defm : VPatBinaryV_VV_NoMask<"int_riscv_vsha2ms", "PseudoVSHA2MS", I32IntegerVectors, isSEWAware=true>; -} // Predicates = [HasStdExtZvknha] - -let Predicates = [HasStdExtZvknhb] in { - defm : VPatBinaryV_VV_NoMask<"int_riscv_vsha2ch", "PseudoVSHA2CH", I64IntegerVectors>; - defm : VPatBinaryV_VV_NoMask<"int_riscv_vsha2cl", "PseudoVSHA2CL", I64IntegerVectors>; - defm : VPatBinaryV_VV_NoMask<"int_riscv_vsha2ms", "PseudoVSHA2MS", I64IntegerVectors, isSEWAware=true>; -} // Predicates = [HasStdExtZvknhb] - -let Predicates = [HasStdExtZvksed] in { - defm : VPatBinaryV_VI_NoMaskTU<"int_riscv_vsm4k", "PseudoVSM4K", I32IntegerVectors>; - defm : VPatUnaryV_V_S_NoMask_Zvk<"int_riscv_vsm4r", "PseudoVSM4R", I32IntegerVectors>; -} // Predicates = [HasStdExtZvksed] - -let Predicates = [HasStdExtZvksh] in { - defm : VPatBinaryV_VI_NoMask<"int_riscv_vsm3c", "PseudoVSM3C", I32IntegerVectors>; - defm : VPatBinaryV_VV_NoMaskTU<"int_riscv_vsm3me", "PseudoVSM3ME", I32IntegerVectors>; -} // Predicates = [HasStdExtZvksh] +defm : VPatUnaryV_V<"int_riscv_vbrev", "PseudoVBREV", AllIntegerVectors, ExtraPreds=[HasStdExtZvbb]>; +defm : VPatUnaryV_V<"int_riscv_vclz", "PseudoVCLZ", AllIntegerVectors, ExtraPreds=[HasStdExtZvbb]>; +defm : VPatUnaryV_V<"int_riscv_vctz", "PseudoVCTZ", AllIntegerVectors, ExtraPreds=[HasStdExtZvbb]>; +defm : VPatUnaryV_V<"int_riscv_vcpopv", "PseudoVCPOP", AllIntegerVectors, ExtraPreds=[HasStdExtZvbb]>; +defm : VPatBinaryW_VV_VX_VI_VWSLL<"int_riscv_vwsll", "PseudoVWSLL", AllWidenableIntVectors, [HasStdExtZvbb]>; + +defm : VPatBinaryV_VV_VX<"int_riscv_vclmul", "PseudoVCLMUL", I64IntegerVectors, ExtraPreds=[HasStdExtZvbc]>; +defm : VPatBinaryV_VV_VX<"int_riscv_vclmulh", "PseudoVCLMULH", I64IntegerVectors, ExtraPreds=[HasStdExtZvbc]>; + +defm : VPatBinaryV_VV_VX<"int_riscv_vandn", "PseudoVANDN", AllIntegerVectors, ExtraPreds=[HasStdExtZvkb]>; +defm : VPatUnaryV_V<"int_riscv_vbrev8", "PseudoVBREV8", AllIntegerVectors, ExtraPreds=[HasStdExtZvkb]>; +defm : VPatUnaryV_V<"int_riscv_vrev8", "PseudoVREV8", AllIntegerVectors, ExtraPreds=[HasStdExtZvkb]>; +defm : VPatBinaryV_VV_VX_VROL<"int_riscv_vrol", "PseudoVROL", "PseudoVROR", AllIntegerVectors, [HasStdExtZvkb]>; +defm : VPatBinaryV_VV_VX_VI<"int_riscv_vror", "PseudoVROR", AllIntegerVectors, uimm6, ExtraPreds=[HasStdExtZvkb]>; + +defm : VPatBinaryV_VV_NoMask<"int_riscv_vghsh", "PseudoVGHSH", I32IntegerVectors, [HasStdExtZvkg]>; +defm : VPatUnaryV_V_NoMask_Zvk<"int_riscv_vgmul", "PseudoVGMUL", I32IntegerVectors, [HasStdExtZvkg]>; + +defm : VPatUnaryV_V_S_NoMask_Zvk<"int_riscv_vaesdf", "PseudoVAESDF", I32IntegerVectors, [HasStdExtZvkned]>; +defm : VPatUnaryV_V_S_NoMask_Zvk<"int_riscv_vaesdm", "PseudoVAESDM", I32IntegerVectors, [HasStdExtZvkned]>; +defm : VPatUnaryV_V_S_NoMask_Zvk<"int_riscv_vaesef", "PseudoVAESEF", I32IntegerVectors, [HasStdExtZvkned]>; +defm : VPatUnaryV_V_S_NoMask_Zvk<"int_riscv_vaesem", "PseudoVAESEM", I32IntegerVectors, [HasStdExtZvkned]>; +defm : VPatBinaryV_VI_NoMaskTU<"int_riscv_vaeskf1", "PseudoVAESKF1", I32IntegerVectors, [HasStdExtZvkned]>; +defm : VPatBinaryV_VI_NoMask<"int_riscv_vaeskf2", "PseudoVAESKF2", I32IntegerVectors, [HasStdExtZvkned]>; +defm : VPatUnaryV_S_NoMaskVectorCrypto<"int_riscv_vaesz", "PseudoVAESZ", I32IntegerVectors, [HasStdExtZvkned] >; + +defm : VPatBinaryV_VV_NoMask<"int_riscv_vsha2ch", "PseudoVSHA2CH", I32IntegerVectors, [HasStdExtZvknhaOrZvknhb]>; +defm : VPatBinaryV_VV_NoMask<"int_riscv_vsha2cl", "PseudoVSHA2CL", I32IntegerVectors, [HasStdExtZvknhaOrZvknhb]>; +defm : VPatBinaryV_VV_NoMask<"int_riscv_vsha2ms", "PseudoVSHA2MS", I32IntegerVectors, [HasStdExtZvknhaOrZvknhb], isSEWAware=true>; + +defm : VPatBinaryV_VV_NoMask<"int_riscv_vsha2ch", "PseudoVSHA2CH", I64IntegerVectors, [HasStdExtZvknhb]>; +defm : VPatBinaryV_VV_NoMask<"int_riscv_vsha2cl", "PseudoVSHA2CL", I64IntegerVectors, [HasStdExtZvknhb]>; +defm : VPatBinaryV_VV_NoMask<"int_riscv_vsha2ms", "PseudoVSHA2MS", I64IntegerVectors, [HasStdExtZvknhb], isSEWAware=true>; + +defm : VPatBinaryV_VI_NoMaskTU<"int_riscv_vsm4k", "PseudoVSM4K", I32IntegerVectors, ExtraPreds=[HasStdExtZvksed]>; +defm : VPatUnaryV_V_S_NoMask_Zvk<"int_riscv_vsm4r", "PseudoVSM4R", I32IntegerVectors, [HasStdExtZvksed]>; + +defm : VPatBinaryV_VI_NoMask<"int_riscv_vsm3c", "PseudoVSM3C", I32IntegerVectors, [HasStdExtZvksh]>; +defm : VPatBinaryV_VV_NoMaskTU<"int_riscv_vsm3me", "PseudoVSM3ME", I32IntegerVectors, [HasStdExtZvksh]>;