diff --git a/llvm/test/CodeGen/AArch64/stp-opt-with-renaming-undef-assert.mir b/llvm/test/CodeGen/AArch64/stp-opt-with-renaming-undef-assert.mir index 66d2067b531a3..bfdb1763776b4 100644 --- a/llvm/test/CodeGen/AArch64/stp-opt-with-renaming-undef-assert.mir +++ b/llvm/test/CodeGen/AArch64/stp-opt-with-renaming-undef-assert.mir @@ -12,7 +12,7 @@ # This test also checks that pairwise store STP is generated. -# CHECK-LABLE: test +# CHECK-LABEL: test # CHECK: bb.0: # CHECK-NEXT: liveins: $x0, $x17, $x18 # CHECK: renamable $q13_q14_q15 = LD3Threev16b undef renamable $x17 :: (load (s384) from `ptr undef`, align 64) diff --git a/llvm/test/CodeGen/AArch64/sve-calling-convention.ll b/llvm/test/CodeGen/AArch64/sve-calling-convention.ll index 3b3e73f0c08d3..c3f7e9f28ebc2 100644 --- a/llvm/test/CodeGen/AArch64/sve-calling-convention.ll +++ b/llvm/test/CodeGen/AArch64/sve-calling-convention.ll @@ -192,7 +192,7 @@ define [2 x ] @sve_signature_pred_2xv4i1([2 x } ; Test that a scalable predicate argument in [1 x ] type is assigned to two P registers. -; CHECK-LABLE: name: sve_signature_pred_1xv32i1 +; CHECK-LABEL: name: sve_signature_pred_1xv32i1 ; CHECK: [[RES1:%[0-9]+]]:ppr = COPY $p3 ; CHECK: [[RES0:%[0-9]+]]:ppr = COPY $p2 ; CHECK: $p0 = COPY [[RES0]] @@ -203,7 +203,7 @@ define [1 x ] @sve_signature_pred_1xv32i1([1 x ] type is assigned to four P registers. -; CHECK-LABLE: name: sve_signature_pred_2xv32i1 +; CHECK-LABEL: name: sve_signature_pred_2xv32i1 ; CHECK: [[RES3:%[0-9]+]]:ppr = COPY $p3 ; CHECK: [[RES2:%[0-9]+]]:ppr = COPY $p2 ; CHECK: [[RES1:%[0-9]+]]:ppr = COPY $p1 diff --git a/llvm/test/CodeGen/AMDGPU/postra-bundle-memops.mir b/llvm/test/CodeGen/AMDGPU/postra-bundle-memops.mir index 025d9e63436d7..40936c5d23bf0 100644 --- a/llvm/test/CodeGen/AMDGPU/postra-bundle-memops.mir +++ b/llvm/test/CodeGen/AMDGPU/postra-bundle-memops.mir @@ -358,7 +358,6 @@ name: no_sched_barrier_within_bundle tracksRegLiveness: true body: | bb.0: - ; GCN-LABLE: name: no_sched_barrier_within_bundle ; GCN-LABEL: name: no_sched_barrier_within_bundle ; GCN: renamable $sgpr0_sgpr1 = IMPLICIT_DEF ; GCN-NEXT: renamable $vgpr0 = IMPLICIT_DEF diff --git a/llvm/test/CodeGen/Mips/optimizeAndPlusShift.ll b/llvm/test/CodeGen/Mips/optimizeAndPlusShift.ll index bf69adf6702f0..58920483e24bf 100644 --- a/llvm/test/CodeGen/Mips/optimizeAndPlusShift.ll +++ b/llvm/test/CodeGen/Mips/optimizeAndPlusShift.ll @@ -3,11 +3,11 @@ ; RUN: llc < %s -mtriple=mips64el-unknown-linux-gnuabi64 | FileCheck %s --check-prefixes=MIPS64 define i32 @shl_32(i32 %a, i32 %b) { -; MIPS32-LABLE: shl_32: +; MIPS32-LABEL: shl_32: ; MIPS32: # %bb.0: ; MIPS32-NEXT: jr $ra ; MIPS32-NEXT: sllv $2, $4, $5 -; MIPS64-LABLE: shl_32: +; MIPS64-LABEL: shl_32: ; MIPS64: # %bb.0: ; MIPS64-NEXT: sll $1, $5, 0 ; MIPS64-NEXT: sll $2, $4, 0 @@ -19,11 +19,11 @@ define i32 @shl_32(i32 %a, i32 %b) { } define i32 @lshr_32(i32 %a, i32 %b) { -; MIPS32-LABLE: lshr_32: +; MIPS32-LABEL: lshr_32: ; MIPS32: # %bb.0: ; MIPS32-NEXT: jr $ra ; MIPS32-NEXT: srlv $2, $4, $5 -; MIPS64-LABLE: lshr_32: +; MIPS64-LABEL: lshr_32: ; MIPS64: # %bb.0: ; MIPS64-NEXT: sll $1, $5, 0 ; MIPS64-NEXT: sll $2, $4, 0 @@ -35,11 +35,11 @@ define i32 @lshr_32(i32 %a, i32 %b) { } define i32 @ashr_32(i32 %a, i32 %b) { -; MIPS32-LABLE: ashr_32: +; MIPS32-LABEL: ashr_32: ; MIPS32: # %bb.0: ; MIPS32-NEXT: jr $ra ; MIPS32-NEXT: srav $2, $4, $5 -; MIPS64-LABLE: ashr_32: +; MIPS64-LABEL: ashr_32: ; MIPS64: # %bb.0: ; MIPS64-NEXT: sll $1, $5, 0 ; MIPS64-NEXT: sll $2, $4, 0 @@ -51,7 +51,7 @@ define i32 @ashr_32(i32 %a, i32 %b) { } define i64 @shl_64(i64 %a, i64 %b) { -; MIPS64-LABLE: shl_64: +; MIPS64-LABEL: shl_64: ; MIPS64: # %bb.0: ; MIPS64-NEXT: sll $1, $5, 0 ; MIPS64-NEXT: jr $ra @@ -62,7 +62,7 @@ define i64 @shl_64(i64 %a, i64 %b) { } define i64 @lshr_64(i64 %a, i64 %b) { -; MIPS64-LABLE: lshr_64: +; MIPS64-LABEL: lshr_64: ; MIPS64: # %bb.0: ; MIPS64-NEXT: sll $1, $5, 0 ; MIPS64-NEXT: jr $ra @@ -73,7 +73,7 @@ define i64 @lshr_64(i64 %a, i64 %b) { } define i64 @ashr_64(i64 %a, i64 %b) { -; MIPS64-LABLE: ashr_64: +; MIPS64-LABEL: ashr_64: ; MIPS64: # %bb.0: ; MIPS64-NEXT: sll $1, $5, 0 ; MIPS64-NEXT: jr $ra diff --git a/llvm/test/CodeGen/X86/tailregccpic.ll b/llvm/test/CodeGen/X86/tailregccpic.ll index f89c4ac4df599..a3a17d3b05397 100644 --- a/llvm/test/CodeGen/X86/tailregccpic.ll +++ b/llvm/test/CodeGen/X86/tailregccpic.ll @@ -13,12 +13,12 @@ entry: ret void } -;CHECK-LABLE: tail_call_regcall: +;CHECK-LABEL: tail_call_regcall: ;CHECK: # %bb.0: ;CHECK-NEXT: jmp __regcall3__func # TAILCALL ;CHECK-NEXT: .Lfunc_end0: -;CHECK-LABLE: __regcall3__func: +;CHECK-LABEL: __regcall3__func: ;CHECK: addl $_GLOBAL_OFFSET_TABLE_+({{.*}}), %ecx ;CHECK-NEXT: movl a0@GOT(%ecx), %ecx ;CHECK-NEXT: movl %eax, (%ecx) diff --git a/llvm/test/MC/AsmParser/altmacro_string_escape.s b/llvm/test/MC/AsmParser/altmacro_string_escape.s index bcc9e845953ee..f9b0639c02ff8 100644 --- a/llvm/test/MC/AsmParser/altmacro_string_escape.s +++ b/llvm/test/MC/AsmParser/altmacro_string_escape.s @@ -10,7 +10,7 @@ # CHECK: workForFun: .macro fun1 number .if \number=5 - lableNotWork: + labelNotWork: .else workForFun: .endif diff --git a/llvm/test/Transforms/LoopVectorize/memdep.ll b/llvm/test/Transforms/LoopVectorize/memdep.ll index d9d9eec9b7d33..3cd56d5a9e39a 100644 --- a/llvm/test/Transforms/LoopVectorize/memdep.ll +++ b/llvm/test/Transforms/LoopVectorize/memdep.ll @@ -244,7 +244,7 @@ for.end: ; RIGHTVF-LABEL: @pr34283 ; RIGHTVF: <4 x i64> -; WRONGVF-LABLE: @pr34283 +; WRONGVF-LABEL: @pr34283 ; WRONGVF-NOT: <8 x i64> @a = common local_unnamed_addr global [64 x i32] zeroinitializer, align 16 diff --git a/llvm/utils/DSAclean.py b/llvm/utils/DSAclean.py index 1b833ff893248..f9b083ee27f29 100755 --- a/llvm/utils/DSAclean.py +++ b/llvm/utils/DSAclean.py @@ -7,7 +7,7 @@ #%tmp.#, i.e. it now will remove %tmp.12.3.15 etc, additionally fixed a spelling error in # the comments # 10/12/2005: now it only removes nodes and edges for which the label is %tmp.# rather -# than removing all lines for which the lable CONTAINS %tmp.# +# than removing all lines for which the label CONTAINS %tmp.# from __future__ import print_function