diff --git a/clang/lib/Headers/CMakeLists.txt b/clang/lib/Headers/CMakeLists.txt index d60ae2b5961e0..ce34f8b9410a7 100644 --- a/clang/lib/Headers/CMakeLists.txt +++ b/clang/lib/Headers/CMakeLists.txt @@ -55,6 +55,7 @@ set(arm_only_files ) set(aarch64_only_files + arm64_neon.h arm64intr.h arm_neon_sve_bridge.h ) diff --git a/clang/lib/Headers/arm64_neon.h b/clang/lib/Headers/arm64_neon.h new file mode 100644 index 0000000000000..29803a8e455ae --- /dev/null +++ b/clang/lib/Headers/arm64_neon.h @@ -0,0 +1,21 @@ +/*===---- arm64_neon.h - ARM64 NEON intrinsics -----------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +/* Only include this if we're compiling for the windows platform. */ +#ifndef _MSC_VER +#include_next +#else + +#ifndef __ARM64_NEON_H +#define __ARM64_NEON_H + +#include + +#endif /* __ARM64_NEON_H */ +#endif /* _MSC_VER */ diff --git a/clang/lib/Headers/module.modulemap b/clang/lib/Headers/module.modulemap index 3fcaa55f1110e..c8f96df1672c1 100644 --- a/clang/lib/Headers/module.modulemap +++ b/clang/lib/Headers/module.modulemap @@ -50,6 +50,12 @@ module _Builtin_intrinsics [system] [extern_c] { header "arm64intr.h" export * + + explicit module neon { + requires neon + header "arm64_neon.h" + export * + } } explicit module intel { diff --git a/clang/test/CodeGen/arm64-neon-header.c b/clang/test/CodeGen/arm64-neon-header.c new file mode 100644 index 0000000000000..3560bfeaad814 --- /dev/null +++ b/clang/test/CodeGen/arm64-neon-header.c @@ -0,0 +1,14 @@ +// RUN: %clang_cc1 -triple arm64-pc-windows-msvc -target-feature +neon \ +// RUN: -fms-compatibility -fms-compatibility-version=19.00 \ +// RUN: -emit-llvm -o - %s | FileCheck %s + +#include + +// CHECK-LABEL: define{{.*}} @test_vld1q_s32_x4( +// CHECK-NOT: neon_ld1m4_q32 +// CHECK: call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld1x4.v4i32.p0(ptr {{.*}}) +// CHECK-NOT: neon_ld1m4_q32 +// CHECK: ret +int32x4x4_t test_vld1q_s32_x4(int32_t const *a) { + return vld1q_s32_x4(a); +}