diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp b/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
index 127b22975977d..b288f30d8c291 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
@@ -286,9 +286,10 @@ simplifyAMDGCNImageIntrinsic(const GCNSubtarget *ST,
         // Obtain the original image sample intrinsic's signature
         // and replace its return type with the half-vector for D16 folding
         SmallVector<Type *, 8> OverloadTys;
-        Intrinsic::isSignatureValid(II.getCalledFunction(), OverloadTys);
-        OverloadTys[0] = HalfVecTy;
+        if (!Intrinsic::isSignatureValid(II.getCalledFunction(), OverloadTys))
+          return std::nullopt;
 
+        OverloadTys[0] = HalfVecTy;
         Module *M = II.getModule();
         Function *HalfDecl = Intrinsic::getOrInsertDeclaration(
             M, ImageDimIntr->Intr, OverloadTys);
diff --git a/llvm/lib/Target/AMDGPU/GCNRegPressure.h b/llvm/lib/Target/AMDGPU/GCNRegPressure.h
index 85757eb718d46..df0bfd1a0cc5d 100644
--- a/llvm/lib/Target/AMDGPU/GCNRegPressure.h
+++ b/llvm/lib/Target/AMDGPU/GCNRegPressure.h
@@ -303,12 +303,12 @@ class GCNRPTarget {
   GCNRegPressure RP;
 
   /// Target number of SGPRs.
-  unsigned MaxSGPRs;
+  unsigned MaxSGPRs = 0;
   /// Target number of ArchVGPRs and AGPRs.
-  unsigned MaxVGPRs;
+  unsigned MaxVGPRs = 0;
   /// Target number of overall VGPRs for subtargets with unified RFs. Always 0
   /// for subtargets with non-unified RFs.
-  unsigned MaxUnifiedVGPRs;
+  unsigned MaxUnifiedVGPRs = 0;
 
   GCNRPTarget(const GCNRegPressure &RP, const MachineFunction &MF)
       : MF(MF), UnifiedRF(MF.getSubtarget<GCNSubtarget>().hasGFX90AInsts()),