diff --git a/clang/include/clang/Sema/Sema.h b/clang/include/clang/Sema/Sema.h index 4fd0e6bd5982a..5c7207062741b 100644 --- a/clang/include/clang/Sema/Sema.h +++ b/clang/include/clang/Sema/Sema.h @@ -13726,7 +13726,7 @@ class Sema final { bool CheckRISCVLMUL(CallExpr *TheCall, unsigned ArgNum); bool CheckRISCVBuiltinFunctionCall(const TargetInfo &TI, unsigned BuiltinID, CallExpr *TheCall); - void checkRVVTypeSupport(QualType Ty, SourceLocation Loc, ValueDecl *D); + void checkRVVTypeSupport(QualType Ty, SourceLocation Loc, Decl *D); bool CheckLoongArchBuiltinFunctionCall(const TargetInfo &TI, unsigned BuiltinID, CallExpr *TheCall); bool CheckWebAssemblyBuiltinFunctionCall(const TargetInfo &TI, diff --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp index 3932d9cd07d98..3b4ac613da76a 100644 --- a/clang/lib/Sema/SemaChecking.cpp +++ b/clang/lib/Sema/SemaChecking.cpp @@ -5514,7 +5514,7 @@ bool Sema::CheckWebAssemblyBuiltinFunctionCall(const TargetInfo &TI, return false; } -void Sema::checkRVVTypeSupport(QualType Ty, SourceLocation Loc, ValueDecl *D) { +void Sema::checkRVVTypeSupport(QualType Ty, SourceLocation Loc, Decl *D) { const TargetInfo &TI = Context.getTargetInfo(); // (ELEN, LMUL) pairs of (8, mf8), (16, mf4), (32, mf2), (64, m1) requires at // least zve64x diff --git a/clang/lib/Sema/SemaDecl.cpp b/clang/lib/Sema/SemaDecl.cpp index d6e090ee496eb..37060f668b7ac 100644 --- a/clang/lib/Sema/SemaDecl.cpp +++ b/clang/lib/Sema/SemaDecl.cpp @@ -8866,7 +8866,7 @@ void Sema::CheckVariableDeclarationType(VarDecl *NewVD) { } if (T->isRVVType()) - checkRVVTypeSupport(T, NewVD->getLocation(), cast(CurContext)); + checkRVVTypeSupport(T, NewVD->getLocation(), cast(CurContext)); } /// Perform semantic checking on a newly-created variable diff --git a/clang/test/SemaOpenMP/riscv-vector-with-openmp.c b/clang/test/SemaOpenMP/riscv-vector-with-openmp.c new file mode 100644 index 0000000000000..5dae3eb9ce0b0 --- /dev/null +++ b/clang/test/SemaOpenMP/riscv-vector-with-openmp.c @@ -0,0 +1,12 @@ +// RUN: %clang_cc1 -triple riscv64 -target-feature +v -fsyntax-only \ +// RUN: -verify -fopenmp %s +// REQUIRES: riscv-registered-target + +// expected-no-diagnostics + +void foo() { + #pragma omp parallel + { + __rvv_int32m1_t i32m1; + } +}