diff --git a/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/multiple-defs.mir.expected b/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/multiple-defs.mir.expected
index d2b05dd6b585b..61428b94d459d 100644
--- a/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/multiple-defs.mir.expected
+++ b/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/multiple-defs.mir.expected
@@ -8,9 +8,9 @@ body: |
     ; CHECK-LABEL: name: test
     ; CHECK: [[DEF:%[0-9]+]]:gr32 = IMPLICIT_DEF
     ; CHECK-NEXT: [[DEF1:%[0-9]+]]:gr32 = IMPLICIT_DEF
+    ; CHECK-NEXT: [[DEF:%[0-9]+]]:gr32 = IMPLICIT_DEF
     ; CHECK-NEXT: [[DEF2:%[0-9]+]]:gr32 = IMPLICIT_DEF
-    ; CHECK-NEXT: [[DEF2:%[0-9]+]]:gr32 = IMPLICIT_DEF
-    ; CHECK-NEXT: KILL [[DEF2]], [[DEF2]]
+    ; CHECK-NEXT: KILL [[DEF]], [[DEF2]]
     %0:gr32 = IMPLICIT_DEF
     %1:gr32 = IMPLICIT_DEF
     %0:gr32 = IMPLICIT_DEF
diff --git a/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/multiple-defs.test b/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/multiple-defs.test
index b6f329290c1ee..f97c73ff3bf4a 100644
--- a/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/multiple-defs.test
+++ b/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/multiple-defs.test
@@ -4,4 +4,3 @@
 # RUN: cp -f %S/Inputs/multiple-defs.mir %t.mir && %update_mir_test_checks %t.mir
 # RUN: diff -u %S/Inputs/multiple-defs.mir.expected %t.mir
 # RUN: FileCheck %t.mir < %t.mir
-# XFAIL: *
diff --git a/llvm/utils/update_mir_test_checks.py b/llvm/utils/update_mir_test_checks.py
index 815738b234023..8a539b5fb5ce4 100755
--- a/llvm/utils/update_mir_test_checks.py
+++ b/llvm/utils/update_mir_test_checks.py
@@ -204,8 +204,11 @@ def build_function_info_dictionary(
             m = VREG_DEF_RE.match(func_line)
             if m:
                 for vreg in VREG_RE.finditer(m.group("vregs")):
-                    name = mangle_vreg(m.group("opcode"), vreg_map.values())
-                    vreg_map[vreg.group(1)] = name
+                    if vreg.group(1) in vreg_map:
+                        name = vreg_map[vreg.group(1)]
+                    else:
+                        name = mangle_vreg(m.group("opcode"), vreg_map.values())
+                        vreg_map[vreg.group(1)] = name
                     func_line = func_line.replace(
                         vreg.group(1), "[[{}:%[0-9]+]]".format(name), 1
                     )