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@KanRobert KanRobert Sep 19, 2023
Why was it encoded correctly before this PR? I think r9 needs R bit too.
llvm/test/MC/X86/cmpccxadd-intel-64.s
FreddyLeaf
@phoebewang phoebewang Sep 19, 2023
Don't understand the change. Is the `CurOp` the index of operands? According to above comment and assemble test, the order in `MemAddr, src1(ModR/M), src2(VEX_4V)` was correct. Does the change make it `src1(ModR/M), MemAddr, src2(VEX_4V)`?
...get/X86/MCTargetDesc/X86MCCodeEmitter.cpp
FreddyLeaf KanRobert