diff --git a/clang/include/clang/Basic/riscv_vector.td b/clang/include/clang/Basic/riscv_vector.td index 60a1a2b2be6fb..c685f3ef6087d 100644 --- a/clang/include/clang/Basic/riscv_vector.td +++ b/clang/include/clang/Basic/riscv_vector.td @@ -14,466 +14,6 @@ include "riscv_vector_common.td" -//===----------------------------------------------------------------------===// -// Basic classes with automatic codegen. -//===----------------------------------------------------------------------===// - -class RVVOutBuiltin - : RVVBuiltin { - let IntrinsicTypes = [-1]; -} - -class RVVOp0Builtin - : RVVBuiltin { - let IntrinsicTypes = [0]; -} - -class RVVOutOp1Builtin - : RVVBuiltin { - let IntrinsicTypes = [-1, 1]; -} - -class RVVOutOp0Op1Builtin - : RVVBuiltin { - let IntrinsicTypes = [-1, 0, 1]; -} - -multiclass RVVBuiltinSet> suffixes_prototypes, - list intrinsic_types> { - let IRName = intrinsic_name, MaskedIRName = intrinsic_name # "_mask", - IntrinsicTypes = intrinsic_types in { - foreach s_p = suffixes_prototypes in { - let Name = NAME # "_" # s_p[0] in { - defvar suffix = s_p[1]; - defvar prototype = s_p[2]; - def : RVVBuiltin; - } - } - } -} - -// IntrinsicTypes is output, op0, op1 [-1, 0, 1] -multiclass RVVOutOp0Op1BuiltinSet> suffixes_prototypes> - : RVVBuiltinSet; - -multiclass RVVOutBuiltinSet> suffixes_prototypes> - : RVVBuiltinSet; - -multiclass RVVOp0BuiltinSet> suffixes_prototypes> - : RVVBuiltinSet; - -// IntrinsicTypes is output, op1 [-1, 0] -multiclass RVVOutOp0BuiltinSet> suffixes_prototypes> - : RVVBuiltinSet; - -// IntrinsicTypes is output, op1 [-1, 1] -multiclass RVVOutOp1BuiltinSet> suffixes_prototypes> - : RVVBuiltinSet; - -multiclass RVVOp0Op1BuiltinSet> suffixes_prototypes> - : RVVBuiltinSet; - -multiclass RVVOutOp1Op2BuiltinSet> suffixes_prototypes> - : RVVBuiltinSet; - -// IntrinsicTypes is output, op2 [-1, 2] -multiclass RVVOutOp2BuiltinSet> suffixes_prototypes> - : RVVBuiltinSet; - -multiclass RVVSignedBinBuiltinSet - : RVVOutOp1BuiltinSet; - -multiclass RVVSignedBinBuiltinSetRoundingMode - : RVVOutOp1BuiltinSet; - -multiclass RVVUnsignedBinBuiltinSet - : RVVOutOp1BuiltinSet; - -multiclass RVVUnsignedBinBuiltinSetRoundingMode - : RVVOutOp1BuiltinSet; - -multiclass RVVIntBinBuiltinSet - : RVVSignedBinBuiltinSet, - RVVUnsignedBinBuiltinSet; - -multiclass RVVInt64BinBuiltinSet - : RVVOutOp1BuiltinSet, - RVVOutOp1BuiltinSet; - -multiclass RVVSlideOneBuiltinSet - : RVVOutOp1BuiltinSet; - -multiclass RVVSignedShiftBuiltinSet - : RVVOutOp1BuiltinSet; - -multiclass RVVSignedShiftBuiltinSetRoundingMode - : RVVOutOp1BuiltinSet; - -multiclass RVVUnsignedShiftBuiltinSet - : RVVOutOp1BuiltinSet; - -multiclass RVVUnsignedShiftBuiltinSetRoundingMode - : RVVOutOp1BuiltinSet; - -multiclass RVVShiftBuiltinSet - : RVVSignedShiftBuiltinSet, - RVVUnsignedShiftBuiltinSet; - -let Log2LMUL = [-3, -2, -1, 0, 1, 2] in { - multiclass RVVSignedNShiftBuiltinSet - : RVVOutOp0Op1BuiltinSet; - - multiclass RVVSignedNShiftBuiltinSetRoundingMode - : RVVOutOp0Op1BuiltinSet; - - multiclass RVVUnsignedNShiftBuiltinSet - : RVVOutOp0Op1BuiltinSet; - - multiclass RVVUnsignedNShiftBuiltinSetRoundingMode - : RVVOutOp0Op1BuiltinSet; - -} - -multiclass RVVCarryinBuiltinSet - : RVVOutOp1BuiltinSet; - -multiclass RVVCarryOutInBuiltinSet - : RVVOp0Op1BuiltinSet; - -multiclass RVVSignedMaskOutBuiltinSet - : RVVOp0Op1BuiltinSet; - -multiclass RVVUnsignedMaskOutBuiltinSet - : RVVOp0Op1BuiltinSet; - -multiclass RVVIntMaskOutBuiltinSet - : RVVSignedMaskOutBuiltinSet, - RVVUnsignedMaskOutBuiltinSet; - -class RVVIntExt - : RVVBuiltin { - let IRName = intrinsic_name; - let MaskedIRName = intrinsic_name # "_mask"; - let OverloadedName = NAME; - let IntrinsicTypes = [-1, 0]; -} - -let HasMaskedOffOperand = false in { - multiclass RVVIntTerBuiltinSet { - defm "" : RVVOutOp1BuiltinSet; - } - multiclass RVVFloatingTerBuiltinSet { - defm "" : RVVOutOp1BuiltinSet; - } - multiclass RVVFloatingTerBuiltinSetRoundingMode { - defm "" : RVVOutOp1BuiltinSet; - } -} - -let HasMaskedOffOperand = false, Log2LMUL = [-2, -1, 0, 1, 2] in { - multiclass RVVFloatingWidenTerBuiltinSet { - defm "" : RVVOutOp1Op2BuiltinSet; - } - multiclass RVVFloatingWidenTerBuiltinSetRoundingMode { - defm "" : RVVOutOp1Op2BuiltinSet; - } -} - -multiclass RVVFloatingBinBuiltinSet - : RVVOutOp1BuiltinSet; - -multiclass RVVFloatingBinBuiltinSetRoundingMode - : RVVOutOp1BuiltinSet; - -multiclass RVVFloatingBinVFBuiltinSet - : RVVOutOp1BuiltinSet; - -multiclass RVVFloatingBinVFBuiltinSetRoundingMode - : RVVOutOp1BuiltinSet; - -multiclass RVVFloatingMaskOutBuiltinSet - : RVVOp0Op1BuiltinSet; - -multiclass RVVFloatingMaskOutVFBuiltinSet - : RVVOp0Op1BuiltinSet; - -multiclass RVVConvBuiltinSet> suffixes_prototypes> { -let Name = intrinsic_name, - IRName = intrinsic_name, - MaskedIRName = intrinsic_name # "_mask", - IntrinsicTypes = [-1, 0] in { - foreach s_p = suffixes_prototypes in { - defvar suffix = s_p[0]; - defvar prototype = s_p[1]; - def : RVVBuiltin; - } - } -} - - -class RVVMaskBinBuiltin : RVVOutBuiltin<"m", "mmm", "c"> { - let Name = NAME # "_mm"; - let HasMasked = false; -} - -class RVVMaskUnaryBuiltin : RVVOutBuiltin<"m", "mm", "c"> { - let Name = NAME # "_m"; -} - -class RVVMaskNullaryBuiltin : RVVOutBuiltin<"m", "m", "c"> { - let Name = NAME # "_m"; - let HasMasked = false; - let SupportOverloading = false; -} - -class RVVMaskOp0Builtin : RVVOp0Builtin<"m", prototype, "c"> { - let Name = NAME # "_m"; - let HasMaskedOffOperand = false; -} - -let UnMaskedPolicyScheme = HasPolicyOperand, - HasMaskedOffOperand = false in { - multiclass RVVSlideUpBuiltinSet { - defm "" : RVVOutBuiltinSet; - defm "" : RVVOutBuiltinSet; - } -} - -let UnMaskedPolicyScheme = HasPassthruOperand, - ManualCodegen = [{ - if (IsMasked) { - std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end() - 1); - if ((PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) - Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType)); - } else { - if (PolicyAttrs & RVV_VTA) - Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType)); - } - - Ops.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs)); - IntrinsicTypes = {ResultType, Ops.back()->getType()}; - }] in { - multiclass RVVSlideDownBuiltinSet { - defm "" : RVVOutBuiltinSet; - defm "" : RVVOutBuiltinSet; - } -} - -class RVVFloatingUnaryBuiltin - : RVVOutBuiltin { - let Name = NAME # "_" # builtin_suffix; -} - -class RVVFloatingUnaryVVBuiltin : RVVFloatingUnaryBuiltin<"v", "v", "vv">; - -class RVVConvBuiltin - : RVVBuiltin { - let IntrinsicTypes = [-1, 0]; - let OverloadedName = overloaded_name; -} - -class RVVConvToSignedBuiltin - : RVVConvBuiltin<"Iv", "Ivv", "xfd", overloaded_name>; - -class RVVConvToUnsignedBuiltin - : RVVConvBuiltin<"Uv", "Uvv", "xfd", overloaded_name>; - -class RVVConvToWidenSignedBuiltin - : RVVConvBuiltin<"Iw", "Iwv", "xf", overloaded_name>; - -class RVVConvToWidenUnsignedBuiltin - : RVVConvBuiltin<"Uw", "Uwv", "xf", overloaded_name>; - -class RVVConvToNarrowingSignedBuiltin - : RVVConvBuiltin<"Iv", "IvFw", "csi", overloaded_name>; - -class RVVConvToNarrowingUnsignedBuiltin - : RVVConvBuiltin<"Uv", "UvFw", "csi", overloaded_name>; - -let HasMaskedOffOperand = true in { - multiclass RVVSignedReductionBuiltin { - defm "" : RVVOutOp0BuiltinSet; - } - multiclass RVVUnsignedReductionBuiltin { - defm "" : RVVOutOp0BuiltinSet; - } - multiclass RVVFloatingReductionBuiltin { - defm "" : RVVOutOp0BuiltinSet; - } - multiclass RVVFloatingReductionBuiltinRoundingMode { - defm "" : RVVOutOp0BuiltinSet; - } - multiclass RVVFloatingWidenReductionBuiltin { - defm "" : RVVOutOp0BuiltinSet; - } - multiclass RVVFloatingWidenReductionBuiltinRoundingMode { - defm "" : RVVOutOp0BuiltinSet; - } -} - -multiclass RVVIntReductionBuiltinSet - : RVVSignedReductionBuiltin, - RVVUnsignedReductionBuiltin; - -// For widen operation which has different mangling name. -multiclass RVVWidenBuiltinSet> suffixes_prototypes> { - let Log2LMUL = [-3, -2, -1, 0, 1, 2], - IRName = intrinsic_name, MaskedIRName = intrinsic_name # "_mask" in { - foreach s_p = suffixes_prototypes in { - let Name = NAME # "_" # s_p[0], - OverloadedName = NAME # "_" # s_p[0] in { - defvar suffix = s_p[1]; - defvar prototype = s_p[2]; - def : RVVOutOp0Op1Builtin; - } - } - } -} - -// For widen operation with widen operand which has different mangling name. -multiclass RVVWidenWOp0BuiltinSet> suffixes_prototypes> { - let Log2LMUL = [-3, -2, -1, 0, 1, 2], - IRName = intrinsic_name, MaskedIRName = intrinsic_name # "_mask" in { - foreach s_p = suffixes_prototypes in { - let Name = NAME # "_" # s_p[0], - OverloadedName = NAME # "_" # s_p[0] in { - defvar suffix = s_p[1]; - defvar prototype = s_p[2]; - def : RVVOutOp1Builtin; - } - } - } -} - -multiclass RVVSignedWidenBinBuiltinSet - : RVVWidenBuiltinSet; - -multiclass RVVSignedWidenOp0BinBuiltinSet - : RVVWidenWOp0BuiltinSet; - -multiclass RVVUnsignedWidenBinBuiltinSet - : RVVWidenBuiltinSet; - -multiclass RVVUnsignedWidenOp0BinBuiltinSet - : RVVWidenWOp0BuiltinSet; - -multiclass RVVFloatingWidenBinBuiltinSet - : RVVWidenBuiltinSet; - -multiclass RVVFloatingWidenBinBuiltinSetRoundingMode - : RVVWidenBuiltinSet; - -multiclass RVVFloatingWidenOp0BinBuiltinSet - : RVVWidenWOp0BuiltinSet; - -multiclass RVVFloatingWidenOp0BinBuiltinSetRoundingMode - : RVVWidenWOp0BuiltinSet; - defvar TypeList = ["c","s","i","l","x","f","d"]; defvar EEWList = [["8", "(Log2EEW:3)"], ["16", "(Log2EEW:4)"], diff --git a/clang/include/clang/Basic/riscv_vector_common.td b/clang/include/clang/Basic/riscv_vector_common.td index 74d9ace212e15..141fac9d68e6d 100644 --- a/clang/include/clang/Basic/riscv_vector_common.td +++ b/clang/include/clang/Basic/riscv_vector_common.td @@ -249,3 +249,463 @@ class RVVBuiltin + : RVVBuiltin { + let IntrinsicTypes = [-1]; +} + +class RVVOp0Builtin + : RVVBuiltin { + let IntrinsicTypes = [0]; +} + +class RVVOutOp1Builtin + : RVVBuiltin { + let IntrinsicTypes = [-1, 1]; +} + +class RVVOutOp0Op1Builtin + : RVVBuiltin { + let IntrinsicTypes = [-1, 0, 1]; +} + +multiclass RVVBuiltinSet> suffixes_prototypes, + list intrinsic_types> { + let IRName = intrinsic_name, MaskedIRName = intrinsic_name # "_mask", + IntrinsicTypes = intrinsic_types in { + foreach s_p = suffixes_prototypes in { + let Name = NAME # "_" # s_p[0] in { + defvar suffix = s_p[1]; + defvar prototype = s_p[2]; + def : RVVBuiltin; + } + } + } +} + +// IntrinsicTypes is output, op0, op1 [-1, 0, 1] +multiclass RVVOutOp0Op1BuiltinSet> suffixes_prototypes> + : RVVBuiltinSet; + +multiclass RVVOutBuiltinSet> suffixes_prototypes> + : RVVBuiltinSet; + +multiclass RVVOp0BuiltinSet> suffixes_prototypes> + : RVVBuiltinSet; + +// IntrinsicTypes is output, op1 [-1, 0] +multiclass RVVOutOp0BuiltinSet> suffixes_prototypes> + : RVVBuiltinSet; + +// IntrinsicTypes is output, op1 [-1, 1] +multiclass RVVOutOp1BuiltinSet> suffixes_prototypes> + : RVVBuiltinSet; + +multiclass RVVOp0Op1BuiltinSet> suffixes_prototypes> + : RVVBuiltinSet; + +multiclass RVVOutOp1Op2BuiltinSet> suffixes_prototypes> + : RVVBuiltinSet; + +// IntrinsicTypes is output, op2 [-1, 2] +multiclass RVVOutOp2BuiltinSet> suffixes_prototypes> + : RVVBuiltinSet; + +multiclass RVVSignedBinBuiltinSet + : RVVOutOp1BuiltinSet; + +multiclass RVVSignedBinBuiltinSetRoundingMode + : RVVOutOp1BuiltinSet; + +multiclass RVVUnsignedBinBuiltinSet + : RVVOutOp1BuiltinSet; + +multiclass RVVUnsignedBinBuiltinSetRoundingMode + : RVVOutOp1BuiltinSet; + +multiclass RVVIntBinBuiltinSet + : RVVSignedBinBuiltinSet, + RVVUnsignedBinBuiltinSet; + +multiclass RVVInt64BinBuiltinSet + : RVVOutOp1BuiltinSet, + RVVOutOp1BuiltinSet; + +multiclass RVVSlideOneBuiltinSet + : RVVOutOp1BuiltinSet; + +multiclass RVVSignedShiftBuiltinSet + : RVVOutOp1BuiltinSet; + +multiclass RVVSignedShiftBuiltinSetRoundingMode + : RVVOutOp1BuiltinSet; + +multiclass RVVUnsignedShiftBuiltinSet + : RVVOutOp1BuiltinSet; + +multiclass RVVUnsignedShiftBuiltinSetRoundingMode + : RVVOutOp1BuiltinSet; + +multiclass RVVShiftBuiltinSet + : RVVSignedShiftBuiltinSet, + RVVUnsignedShiftBuiltinSet; + +let Log2LMUL = [-3, -2, -1, 0, 1, 2] in { + multiclass RVVSignedNShiftBuiltinSet + : RVVOutOp0Op1BuiltinSet; + + multiclass RVVSignedNShiftBuiltinSetRoundingMode + : RVVOutOp0Op1BuiltinSet; + + multiclass RVVUnsignedNShiftBuiltinSet + : RVVOutOp0Op1BuiltinSet; + + multiclass RVVUnsignedNShiftBuiltinSetRoundingMode + : RVVOutOp0Op1BuiltinSet; + +} + +multiclass RVVCarryinBuiltinSet + : RVVOutOp1BuiltinSet; + +multiclass RVVCarryOutInBuiltinSet + : RVVOp0Op1BuiltinSet; + +multiclass RVVSignedMaskOutBuiltinSet + : RVVOp0Op1BuiltinSet; + +multiclass RVVUnsignedMaskOutBuiltinSet + : RVVOp0Op1BuiltinSet; + +multiclass RVVIntMaskOutBuiltinSet + : RVVSignedMaskOutBuiltinSet, + RVVUnsignedMaskOutBuiltinSet; + +class RVVIntExt + : RVVBuiltin { + let IRName = intrinsic_name; + let MaskedIRName = intrinsic_name # "_mask"; + let OverloadedName = NAME; + let IntrinsicTypes = [-1, 0]; +} + +let HasMaskedOffOperand = false in { + multiclass RVVIntTerBuiltinSet { + defm "" : RVVOutOp1BuiltinSet; + } + multiclass RVVFloatingTerBuiltinSet { + defm "" : RVVOutOp1BuiltinSet; + } + multiclass RVVFloatingTerBuiltinSetRoundingMode { + defm "" : RVVOutOp1BuiltinSet; + } +} + +let HasMaskedOffOperand = false, Log2LMUL = [-2, -1, 0, 1, 2] in { + multiclass RVVFloatingWidenTerBuiltinSet { + defm "" : RVVOutOp1Op2BuiltinSet; + } + multiclass RVVFloatingWidenTerBuiltinSetRoundingMode { + defm "" : RVVOutOp1Op2BuiltinSet; + } +} + +multiclass RVVFloatingBinBuiltinSet + : RVVOutOp1BuiltinSet; + +multiclass RVVFloatingBinBuiltinSetRoundingMode + : RVVOutOp1BuiltinSet; + +multiclass RVVFloatingBinVFBuiltinSet + : RVVOutOp1BuiltinSet; + +multiclass RVVFloatingBinVFBuiltinSetRoundingMode + : RVVOutOp1BuiltinSet; + +multiclass RVVFloatingMaskOutBuiltinSet + : RVVOp0Op1BuiltinSet; + +multiclass RVVFloatingMaskOutVFBuiltinSet + : RVVOp0Op1BuiltinSet; + +multiclass RVVConvBuiltinSet> suffixes_prototypes> { +let Name = intrinsic_name, + IRName = intrinsic_name, + MaskedIRName = intrinsic_name # "_mask", + IntrinsicTypes = [-1, 0] in { + foreach s_p = suffixes_prototypes in { + defvar suffix = s_p[0]; + defvar prototype = s_p[1]; + def : RVVBuiltin; + } + } +} + + +class RVVMaskBinBuiltin : RVVOutBuiltin<"m", "mmm", "c"> { + let Name = NAME # "_mm"; + let HasMasked = false; +} + +class RVVMaskUnaryBuiltin : RVVOutBuiltin<"m", "mm", "c"> { + let Name = NAME # "_m"; +} + +class RVVMaskNullaryBuiltin : RVVOutBuiltin<"m", "m", "c"> { + let Name = NAME # "_m"; + let HasMasked = false; + let SupportOverloading = false; +} + +class RVVMaskOp0Builtin : RVVOp0Builtin<"m", prototype, "c"> { + let Name = NAME # "_m"; + let HasMaskedOffOperand = false; +} + +let UnMaskedPolicyScheme = HasPolicyOperand, + HasMaskedOffOperand = false in { + multiclass RVVSlideUpBuiltinSet { + defm "" : RVVOutBuiltinSet; + defm "" : RVVOutBuiltinSet; + } +} + +let UnMaskedPolicyScheme = HasPassthruOperand, + ManualCodegen = [{ + if (IsMasked) { + std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end() - 1); + if ((PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) + Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType)); + } else { + if (PolicyAttrs & RVV_VTA) + Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType)); + } + + Ops.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs)); + IntrinsicTypes = {ResultType, Ops.back()->getType()}; + }] in { + multiclass RVVSlideDownBuiltinSet { + defm "" : RVVOutBuiltinSet; + defm "" : RVVOutBuiltinSet; + } +} + +class RVVFloatingUnaryBuiltin + : RVVOutBuiltin { + let Name = NAME # "_" # builtin_suffix; +} + +class RVVFloatingUnaryVVBuiltin : RVVFloatingUnaryBuiltin<"v", "v", "vv">; + +class RVVConvBuiltin + : RVVBuiltin { + let IntrinsicTypes = [-1, 0]; + let OverloadedName = overloaded_name; +} + +class RVVConvToSignedBuiltin + : RVVConvBuiltin<"Iv", "Ivv", "xfd", overloaded_name>; + +class RVVConvToUnsignedBuiltin + : RVVConvBuiltin<"Uv", "Uvv", "xfd", overloaded_name>; + +class RVVConvToWidenSignedBuiltin + : RVVConvBuiltin<"Iw", "Iwv", "xf", overloaded_name>; + +class RVVConvToWidenUnsignedBuiltin + : RVVConvBuiltin<"Uw", "Uwv", "xf", overloaded_name>; + +class RVVConvToNarrowingSignedBuiltin + : RVVConvBuiltin<"Iv", "IvFw", "csi", overloaded_name>; + +class RVVConvToNarrowingUnsignedBuiltin + : RVVConvBuiltin<"Uv", "UvFw", "csi", overloaded_name>; + +let HasMaskedOffOperand = true in { + multiclass RVVSignedReductionBuiltin { + defm "" : RVVOutOp0BuiltinSet; + } + multiclass RVVUnsignedReductionBuiltin { + defm "" : RVVOutOp0BuiltinSet; + } + multiclass RVVFloatingReductionBuiltin { + defm "" : RVVOutOp0BuiltinSet; + } + multiclass RVVFloatingReductionBuiltinRoundingMode { + defm "" : RVVOutOp0BuiltinSet; + } + multiclass RVVFloatingWidenReductionBuiltin { + defm "" : RVVOutOp0BuiltinSet; + } + multiclass RVVFloatingWidenReductionBuiltinRoundingMode { + defm "" : RVVOutOp0BuiltinSet; + } +} + +multiclass RVVIntReductionBuiltinSet + : RVVSignedReductionBuiltin, + RVVUnsignedReductionBuiltin; + +// For widen operation which has different mangling name. +multiclass RVVWidenBuiltinSet> suffixes_prototypes> { + let Log2LMUL = [-3, -2, -1, 0, 1, 2], + IRName = intrinsic_name, MaskedIRName = intrinsic_name # "_mask" in { + foreach s_p = suffixes_prototypes in { + let Name = NAME # "_" # s_p[0], + OverloadedName = NAME # "_" # s_p[0] in { + defvar suffix = s_p[1]; + defvar prototype = s_p[2]; + def : RVVOutOp0Op1Builtin; + } + } + } +} + +// For widen operation with widen operand which has different mangling name. +multiclass RVVWidenWOp0BuiltinSet> suffixes_prototypes> { + let Log2LMUL = [-3, -2, -1, 0, 1, 2], + IRName = intrinsic_name, MaskedIRName = intrinsic_name # "_mask" in { + foreach s_p = suffixes_prototypes in { + let Name = NAME # "_" # s_p[0], + OverloadedName = NAME # "_" # s_p[0] in { + defvar suffix = s_p[1]; + defvar prototype = s_p[2]; + def : RVVOutOp1Builtin; + } + } + } +} + +multiclass RVVSignedWidenBinBuiltinSet + : RVVWidenBuiltinSet; + +multiclass RVVSignedWidenOp0BinBuiltinSet + : RVVWidenWOp0BuiltinSet; + +multiclass RVVUnsignedWidenBinBuiltinSet + : RVVWidenBuiltinSet; + +multiclass RVVUnsignedWidenOp0BinBuiltinSet + : RVVWidenWOp0BuiltinSet; + +multiclass RVVFloatingWidenBinBuiltinSet + : RVVWidenBuiltinSet; + +multiclass RVVFloatingWidenBinBuiltinSetRoundingMode + : RVVWidenBuiltinSet; + +multiclass RVVFloatingWidenOp0BinBuiltinSet + : RVVWidenWOp0BuiltinSet; + +multiclass RVVFloatingWidenOp0BinBuiltinSetRoundingMode + : RVVWidenWOp0BuiltinSet;