diff --git a/llvm/lib/Target/AArch64/AArch64CallingConvention.td b/llvm/lib/Target/AArch64/AArch64CallingConvention.td
index 117c9cad3916f..bfb4c2c185d68 100644
--- a/llvm/lib/Target/AArch64/AArch64CallingConvention.td
+++ b/llvm/lib/Target/AArch64/AArch64CallingConvention.td
@@ -108,7 +108,10 @@ defvar AArch64_Common = [
   CCIfType<[i64, f64, v1f64, v2f32, v1i64, v2i32, v4i16, v8i8, v4f16, v4bf16],
            CCAssignToStack<8, 8>>,
   CCIfType<[f128, v2i64, v4i32, v8i16, v16i8, v4f32, v2f64, v8f16, v8bf16],
-           CCAssignToStack<16, 16>>
+           CCAssignToStack<16, 16>>,
+  // TODO: Add more vector types
+  CCIfType<[v8f32],
+           CCAssignToStack<32, 16>>
 ];
 
 let Entry = 1 in
diff --git a/llvm/test/CodeGen/AArch64/aarch64-vector-pcs.ll b/llvm/test/CodeGen/AArch64/aarch64-vector-pcs.ll
new file mode 100644
index 0000000000000..9ea8649a5a985
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/aarch64-vector-pcs.ll
@@ -0,0 +1,9 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=aarch64 -mattr=+sve -o - %s | FileCheck %s
+
+define fastcc void @inline_foo(<8 x float> %val)  vscale_range(2,2) {
+; CHECK-LABEL: inline_foo:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    ret
+  ret void
+}