From e3965f7fab2a1c143017f372d89ba07553f90a89 Mon Sep 17 00:00:00 2001 From: ShihPo Hung Date: Tue, 28 Nov 2023 01:07:26 -0800 Subject: [PATCH 1/9] [RISCV][CostModel][NFC] Add getRISCVInstructionCost() to TTI for CostKind Instruction cost for CodeSize and Latency/RecipThroughput can be very differnet. Considering the diversity of CostKind and vendor-specific cost, and how they are spread across various TTI functions, it's becoming quite a challenge to handle. This patch adds an interface getRISCVInstructionCost to address it. --- .../Target/RISCV/RISCVTargetTransformInfo.cpp | 102 +++++++++++++++--- .../Target/RISCV/RISCVTargetTransformInfo.h | 18 ++++ 2 files changed, 108 insertions(+), 12 deletions(-) diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp index 3a2f2f39cd1c9b..b583a6a9cb4329 100644 --- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp +++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp @@ -34,6 +34,51 @@ static cl::opt SLPMaxVF( "exclusively by SLP vectorizer."), cl::Hidden); +InstructionCost +RISCVTTIImpl::getRISCVInstructionCost(RISCVInstruction Inst, MVT VT, + unsigned NumInstr, + TTI::TargetCostKind CostKind) { + if (CostKind == TTI::TCK_CodeSize) + return NumInstr; + + InstructionCost LMUL = TLI->getLMULCost(VT); + InstructionCost Cost = LMUL * NumInstr; + + if ((CostKind == TTI::TCK_RecipThroughput) || + (CostKind == TTI::TCK_Latency)) { + switch (Inst) { + case RISCVInstruction::VRGATHER_VI: + return NumInstr * TLI->getVRGatherVICost(VT); + case RISCVInstruction::VRGATHER_VV: + return NumInstr * TLI->getVRGatherVVCost(VT); + case RISCVInstruction::VSLIDE: + return NumInstr * TLI->getVSlideCost(VT); + case RISCVInstruction::VSIMPLE_INT_RED: + case RISCVInstruction::VMINMAX_INTFP_RED: + case RISCVInstruction::VUNORD_FP_RED: { + unsigned VL = VT.getVectorMinNumElements(); + if (!VT.isFixedLengthVector()) { + VL *= *getVScaleForTuning(); + } + return Log2_32_Ceil(VL); + } + case RISCVInstruction::VORD_FP_RED: { + unsigned VL = VT.getVectorMinNumElements(); + if (!VT.isFixedLengthVector()) { + VL *= *getVScaleForTuning(); + } + return VL; + } + case RISCVInstruction::VMERGE: + case RISCVInstruction::VMV: + case RISCVInstruction::VSIMPLE_INT: + case RISCVInstruction::VNARROWING: + return Cost; + } + } + return Cost; +} + InstructionCost RISCVTTIImpl::getIntImmCost(const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind) { assert(Ty->isIntegerTy() && @@ -279,7 +324,9 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, // Example sequence: // vnsrl.wi v10, v8, 0 if (equal(DeinterleaveMask, Mask)) - return LT.first * TLI->getLMULCost(LT.second); + return LT.first * + getRISCVInstructionCost(RISCVInstruction::VNARROWING, + LT.second, 1, CostKind); } } } @@ -290,7 +337,9 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, LT.second.getVectorNumElements() <= 256)) { VectorType *IdxTy = getVRGatherIndexType(LT.second, *ST, Tp->getContext()); InstructionCost IndexCost = getConstantPoolLoadCost(IdxTy, CostKind); - return IndexCost + TLI->getVRGatherVVCost(LT.second); + return IndexCost + + getRISCVInstructionCost(RISCVInstruction::VRGATHER_VV, LT.second, + 1, CostKind); } [[fallthrough]]; } @@ -308,7 +357,10 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, VectorType *MaskTy = VectorType::get(IntegerType::getInt1Ty(C), EC); InstructionCost IndexCost = getConstantPoolLoadCost(IdxTy, CostKind); InstructionCost MaskCost = getConstantPoolLoadCost(MaskTy, CostKind); - return 2 * IndexCost + 2 * TLI->getVRGatherVVCost(LT.second) + MaskCost; + return 2 * IndexCost + + getRISCVInstructionCost(RISCVInstruction::VRGATHER_VV, LT.second, + 2, CostKind) + + MaskCost; } [[fallthrough]]; } @@ -363,19 +415,26 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, // Example sequence: // vsetivli zero, 4, e8, mf2, tu, ma (ignored) // vslidedown.vi v8, v9, 2 - return LT.first * TLI->getVSlideCost(LT.second); + return LT.first * getRISCVInstructionCost(RISCVInstruction::VSLIDE, + LT.second, 1, CostKind); case TTI::SK_InsertSubvector: // Example sequence: // vsetivli zero, 4, e8, mf2, tu, ma (ignored) // vslideup.vi v8, v9, 2 - return LT.first * TLI->getVSlideCost(LT.second); + return LT.first * getRISCVInstructionCost(RISCVInstruction::VSLIDE, + LT.second, 1, CostKind); case TTI::SK_Select: { // Example sequence: // li a0, 90 // vsetivli zero, 8, e8, mf2, ta, ma (ignored) // vmv.s.x v0, a0 // vmerge.vvm v8, v9, v8, v0 - return LT.first * 3 * TLI->getLMULCost(LT.second); + return LT.first * + (TLI->getLMULCost(LT.second) + // FIXME: should be 1 for li + getRISCVInstructionCost(RISCVInstruction::VMV, LT.second, 1, + CostKind) + + getRISCVInstructionCost(RISCVInstruction::VMERGE, LT.second, 1, + CostKind)); } case TTI::SK_Broadcast: { bool HasScalar = (Args.size() > 0) && (Operator::getOpcode(Args[0]) == @@ -387,7 +446,12 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, // vsetivli zero, 2, e8, mf8, ta, ma (ignored) // vmv.v.x v8, a0 // vmsne.vi v0, v8, 0 - return LT.first * TLI->getLMULCost(LT.second) * 3; + return LT.first * + (TLI->getLMULCost(LT.second) + // FIXME: should be 1 for andi + getRISCVInstructionCost(RISCVInstruction::VMV, LT.second, 1, + CostKind) + + getRISCVInstructionCost(RISCVInstruction::VSIMPLE_INT, + LT.second, 1, CostKind)); } // Example sequence: // vsetivli zero, 2, e8, mf8, ta, mu (ignored) @@ -398,24 +462,34 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, // vmv.v.x v8, a0 // vmsne.vi v0, v8, 0 - return LT.first * TLI->getLMULCost(LT.second) * 6; + return LT.first * + (TLI->getLMULCost(LT.second) + // FIXME: this should be 1 for andi + getRISCVInstructionCost(RISCVInstruction::VMV, LT.second, 3, + CostKind) + + getRISCVInstructionCost(RISCVInstruction::VMERGE, LT.second, 1, + CostKind) + + getRISCVInstructionCost(RISCVInstruction::VSIMPLE_INT, LT.second, + 1, CostKind)); } if (HasScalar) { // Example sequence: // vmv.v.x v8, a0 - return LT.first * TLI->getLMULCost(LT.second); + return LT.first * getRISCVInstructionCost(RISCVInstruction::VMV, + LT.second, 1, CostKind); } // Example sequence: // vrgather.vi v9, v8, 0 - return LT.first * TLI->getVRGatherVICost(LT.second); + return LT.first * getRISCVInstructionCost(RISCVInstruction::VRGATHER_VI, + LT.second, 1, CostKind); } case TTI::SK_Splice: // vslidedown+vslideup. // TODO: Multiplying by LT.first implies this legalizes into multiple copies // of similar code, but I think we expand through memory. - return 2 * LT.first * TLI->getVSlideCost(LT.second); + return LT.first * getRISCVInstructionCost(RISCVInstruction::VSLIDE, + LT.second, 2, CostKind); case TTI::SK_Reverse: { // TODO: Cases to improve here: // * Illegal vector types @@ -435,7 +509,11 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, if (LT.second.isFixedLengthVector()) // vrsub.vi has a 5 bit immediate field, otherwise an li suffices LenCost = isInt<5>(LT.second.getVectorNumElements() - 1) ? 0 : 1; - InstructionCost GatherCost = 2 + TLI->getVRGatherVVCost(LT.second); + // FIXME: replace the constant `2` below with cost of VSIMPLE_INT (vid.v & + // vrsub.vx) + InstructionCost GatherCost = + 2 + getRISCVInstructionCost(RISCVInstruction::VRGATHER_VV, LT.second, 1, + CostKind); // Mask operation additionally required extend and truncate InstructionCost ExtendCost = Tp->getElementType()->isIntegerTy(1) ? 3 : 0; return LT.first * (LenCost + GatherCost + ExtendCost); diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h index 81a45f623d294e..829eace9d1236d 100644 --- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h +++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h @@ -48,6 +48,24 @@ class RISCVTTIImpl : public BasicTTIImplBase { /// actual target hardware. unsigned getEstimatedVLFor(VectorType *Ty); + enum class RISCVInstruction { + VRGATHER_VV, + VRGATHER_VI, + VSLIDE, + VMERGE, + VMV, + VSIMPLE_INT, // ICMP + VNARROWING, // VNSRL + VSIMPLE_INT_RED, // VREDSUM, VREDAND, VREDOR, VREDXOR + VMINMAX_INTFP_RED, // VREDMAX, VREDMAXU, VREDMIN, VREDMINU + VUNORD_FP_RED, // VFREDUSUM, VFREDMAX, VFREDMIN + VORD_FP_RED, // VFREDOSUM + }; + + InstructionCost getRISCVInstructionCost(RISCVInstruction Inst, MVT VT, + unsigned NumInstr, + TTI::TargetCostKind CostKind); + /// Return the cost of accessing a constant pool entry of the specified /// type. InstructionCost getConstantPoolLoadCost(Type *Ty, From 9ff94a24b56d80a1e72a8da62805859f26b77cd4 Mon Sep 17 00:00:00 2001 From: ShihPo Hung Date: Tue, 28 Nov 2023 19:26:23 -0800 Subject: [PATCH 2/9] Split VMV into VMV_SX and VMV_V --- llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp | 14 +++++++++----- llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h | 3 ++- 2 files changed, 11 insertions(+), 6 deletions(-) diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp index b583a6a9cb4329..cbbf0ef0c159a5 100644 --- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp +++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp @@ -69,8 +69,10 @@ RISCVTTIImpl::getRISCVInstructionCost(RISCVInstruction Inst, MVT VT, } return VL; } + case RISCVInstruction::VMV_SX: + // FIXME: VMV_SX doesn't use LMUL, just return NumInstr + case RISCVInstruction::VMV_V: case RISCVInstruction::VMERGE: - case RISCVInstruction::VMV: case RISCVInstruction::VSIMPLE_INT: case RISCVInstruction::VNARROWING: return Cost; @@ -431,7 +433,7 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, // vmerge.vvm v8, v9, v8, v0 return LT.first * (TLI->getLMULCost(LT.second) + // FIXME: should be 1 for li - getRISCVInstructionCost(RISCVInstruction::VMV, LT.second, 1, + getRISCVInstructionCost(RISCVInstruction::VMV_SX, LT.second, 1, CostKind) + getRISCVInstructionCost(RISCVInstruction::VMERGE, LT.second, 1, CostKind)); @@ -448,7 +450,7 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, // vmsne.vi v0, v8, 0 return LT.first * (TLI->getLMULCost(LT.second) + // FIXME: should be 1 for andi - getRISCVInstructionCost(RISCVInstruction::VMV, LT.second, 1, + getRISCVInstructionCost(RISCVInstruction::VMV_V, LT.second, 1, CostKind) + getRISCVInstructionCost(RISCVInstruction::VSIMPLE_INT, LT.second, 1, CostKind)); @@ -464,7 +466,9 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, return LT.first * (TLI->getLMULCost(LT.second) + // FIXME: this should be 1 for andi - getRISCVInstructionCost(RISCVInstruction::VMV, LT.second, 3, + TLI->getLMULCost( + LT.second) + // FIXME: vmv.x.s is the same as extractelement + getRISCVInstructionCost(RISCVInstruction::VMV_V, LT.second, 2, CostKind) + getRISCVInstructionCost(RISCVInstruction::VMERGE, LT.second, 1, CostKind) + @@ -475,7 +479,7 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, if (HasScalar) { // Example sequence: // vmv.v.x v8, a0 - return LT.first * getRISCVInstructionCost(RISCVInstruction::VMV, + return LT.first * getRISCVInstructionCost(RISCVInstruction::VMV_V, LT.second, 1, CostKind); } diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h index 829eace9d1236d..e053e0e3ebb2b1 100644 --- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h +++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h @@ -53,7 +53,8 @@ class RISCVTTIImpl : public BasicTTIImplBase { VRGATHER_VI, VSLIDE, VMERGE, - VMV, + VMV_V, + VMV_SX, VSIMPLE_INT, // ICMP VNARROWING, // VNSRL VSIMPLE_INT_RED, // VREDSUM, VREDAND, VREDOR, VREDXOR From 45ac18eac3b0d1cef96467fa7188e9b0c9fa9b36 Mon Sep 17 00:00:00 2001 From: ShihPo Hung Date: Wed, 29 Nov 2023 00:28:19 -0800 Subject: [PATCH 3/9] Use Opcode defined in RISCV namespace --- .../Target/RISCV/RISCVTargetTransformInfo.cpp | 76 ++++++++++--------- .../Target/RISCV/RISCVTargetTransformInfo.h | 17 +---- 2 files changed, 42 insertions(+), 51 deletions(-) diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp index cbbf0ef0c159a5..a8a2bdc0e4d4d6 100644 --- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp +++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp @@ -35,7 +35,7 @@ static cl::opt SLPMaxVF( cl::Hidden); InstructionCost -RISCVTTIImpl::getRISCVInstructionCost(RISCVInstruction Inst, MVT VT, +RISCVTTIImpl::getRISCVInstructionCost(unsigned OpCode, MVT VT, unsigned NumInstr, TTI::TargetCostKind CostKind) { if (CostKind == TTI::TCK_CodeSize) @@ -46,35 +46,41 @@ RISCVTTIImpl::getRISCVInstructionCost(RISCVInstruction Inst, MVT VT, if ((CostKind == TTI::TCK_RecipThroughput) || (CostKind == TTI::TCK_Latency)) { - switch (Inst) { - case RISCVInstruction::VRGATHER_VI: + switch (OpCode) { + case RISCV::VRGATHER_VI: return NumInstr * TLI->getVRGatherVICost(VT); - case RISCVInstruction::VRGATHER_VV: + case RISCV::VRGATHER_VV: return NumInstr * TLI->getVRGatherVVCost(VT); - case RISCVInstruction::VSLIDE: + case RISCV::VSLIDEUP_VI: + case RISCV::VSLIDEDOWN_VI: + case RISCV::VSLIDEUP_VX: + case RISCV::VSLIDEDOWN_VX: return NumInstr * TLI->getVSlideCost(VT); - case RISCVInstruction::VSIMPLE_INT_RED: - case RISCVInstruction::VMINMAX_INTFP_RED: - case RISCVInstruction::VUNORD_FP_RED: { + case RISCV::VREDMAX_VS: + case RISCV::VREDMIN_VS: + case RISCV::VREDMAXU_VS: + case RISCV::VREDMINU_VS: + case RISCV::VREDSUM_VS: + case RISCV::VREDAND_VS: + case RISCV::VREDOR_VS: + case RISCV::VREDXOR_VS: + case RISCV::VFREDMAX_VS: + case RISCV::VFREDMIN_VS: + case RISCV::VFREDUSUM_VS: { unsigned VL = VT.getVectorMinNumElements(); - if (!VT.isFixedLengthVector()) { + if (!VT.isFixedLengthVector()) VL *= *getVScaleForTuning(); - } return Log2_32_Ceil(VL); } - case RISCVInstruction::VORD_FP_RED: { + case RISCV::VFREDOSUM_VS: { unsigned VL = VT.getVectorMinNumElements(); - if (!VT.isFixedLengthVector()) { + if (!VT.isFixedLengthVector()) VL *= *getVScaleForTuning(); - } return VL; } - case RISCVInstruction::VMV_SX: - // FIXME: VMV_SX doesn't use LMUL, just return NumInstr - case RISCVInstruction::VMV_V: - case RISCVInstruction::VMERGE: - case RISCVInstruction::VSIMPLE_INT: - case RISCVInstruction::VNARROWING: + case RISCV::VMV_S_X: + // FIXME: VMV_S_X doesn't use LMUL, just return NumInstr + default: return Cost; } } @@ -327,7 +333,7 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, // vnsrl.wi v10, v8, 0 if (equal(DeinterleaveMask, Mask)) return LT.first * - getRISCVInstructionCost(RISCVInstruction::VNARROWING, + getRISCVInstructionCost(RISCV::VNSRL_WI, LT.second, 1, CostKind); } } @@ -340,7 +346,7 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, VectorType *IdxTy = getVRGatherIndexType(LT.second, *ST, Tp->getContext()); InstructionCost IndexCost = getConstantPoolLoadCost(IdxTy, CostKind); return IndexCost + - getRISCVInstructionCost(RISCVInstruction::VRGATHER_VV, LT.second, + getRISCVInstructionCost(RISCV::VRGATHER_VV, LT.second, 1, CostKind); } [[fallthrough]]; @@ -360,7 +366,7 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, InstructionCost IndexCost = getConstantPoolLoadCost(IdxTy, CostKind); InstructionCost MaskCost = getConstantPoolLoadCost(MaskTy, CostKind); return 2 * IndexCost + - getRISCVInstructionCost(RISCVInstruction::VRGATHER_VV, LT.second, + getRISCVInstructionCost(RISCV::VRGATHER_VV, LT.second, 2, CostKind) + MaskCost; } @@ -417,13 +423,13 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, // Example sequence: // vsetivli zero, 4, e8, mf2, tu, ma (ignored) // vslidedown.vi v8, v9, 2 - return LT.first * getRISCVInstructionCost(RISCVInstruction::VSLIDE, + return LT.first * getRISCVInstructionCost(RISCV::VSLIDEDOWN_VI, LT.second, 1, CostKind); case TTI::SK_InsertSubvector: // Example sequence: // vsetivli zero, 4, e8, mf2, tu, ma (ignored) // vslideup.vi v8, v9, 2 - return LT.first * getRISCVInstructionCost(RISCVInstruction::VSLIDE, + return LT.first * getRISCVInstructionCost(RISCV::VSLIDEUP_VI, LT.second, 1, CostKind); case TTI::SK_Select: { // Example sequence: @@ -433,9 +439,9 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, // vmerge.vvm v8, v9, v8, v0 return LT.first * (TLI->getLMULCost(LT.second) + // FIXME: should be 1 for li - getRISCVInstructionCost(RISCVInstruction::VMV_SX, LT.second, 1, + getRISCVInstructionCost(RISCV::VMV_S_X, LT.second, 1, CostKind) + - getRISCVInstructionCost(RISCVInstruction::VMERGE, LT.second, 1, + getRISCVInstructionCost(RISCV::VMERGE_VVM, LT.second, 1, CostKind)); } case TTI::SK_Broadcast: { @@ -450,9 +456,9 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, // vmsne.vi v0, v8, 0 return LT.first * (TLI->getLMULCost(LT.second) + // FIXME: should be 1 for andi - getRISCVInstructionCost(RISCVInstruction::VMV_V, LT.second, 1, + getRISCVInstructionCost(RISCV::VMV_V_X, LT.second, 1, CostKind) + - getRISCVInstructionCost(RISCVInstruction::VSIMPLE_INT, + getRISCVInstructionCost(RISCV::VMSNE_VI, LT.second, 1, CostKind)); } // Example sequence: @@ -468,31 +474,31 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, (TLI->getLMULCost(LT.second) + // FIXME: this should be 1 for andi TLI->getLMULCost( LT.second) + // FIXME: vmv.x.s is the same as extractelement - getRISCVInstructionCost(RISCVInstruction::VMV_V, LT.second, 2, + getRISCVInstructionCost(RISCV::VMV_V_X, LT.second, 2, CostKind) + - getRISCVInstructionCost(RISCVInstruction::VMERGE, LT.second, 1, + getRISCVInstructionCost(RISCV::VMERGE_VIM, LT.second, 1, CostKind) + - getRISCVInstructionCost(RISCVInstruction::VSIMPLE_INT, LT.second, + getRISCVInstructionCost(RISCV::VMSNE_VI, LT.second, 1, CostKind)); } if (HasScalar) { // Example sequence: // vmv.v.x v8, a0 - return LT.first * getRISCVInstructionCost(RISCVInstruction::VMV_V, + return LT.first * getRISCVInstructionCost(RISCV::VMV_V_X, LT.second, 1, CostKind); } // Example sequence: // vrgather.vi v9, v8, 0 - return LT.first * getRISCVInstructionCost(RISCVInstruction::VRGATHER_VI, + return LT.first * getRISCVInstructionCost(RISCV::VRGATHER_VI, LT.second, 1, CostKind); } case TTI::SK_Splice: // vslidedown+vslideup. // TODO: Multiplying by LT.first implies this legalizes into multiple copies // of similar code, but I think we expand through memory. - return LT.first * getRISCVInstructionCost(RISCVInstruction::VSLIDE, + return LT.first * getRISCVInstructionCost(RISCV::VSLIDEDOWN_VX, LT.second, 2, CostKind); case TTI::SK_Reverse: { // TODO: Cases to improve here: @@ -516,7 +522,7 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, // FIXME: replace the constant `2` below with cost of VSIMPLE_INT (vid.v & // vrsub.vx) InstructionCost GatherCost = - 2 + getRISCVInstructionCost(RISCVInstruction::VRGATHER_VV, LT.second, 1, + 2 + getRISCVInstructionCost(RISCV::VRGATHER_VV, LT.second, 1, CostKind); // Mask operation additionally required extend and truncate InstructionCost ExtendCost = Tp->getElementType()->isIntegerTy(1) ? 3 : 0; diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h index e053e0e3ebb2b1..06fbde9d568659 100644 --- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h +++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h @@ -48,22 +48,7 @@ class RISCVTTIImpl : public BasicTTIImplBase { /// actual target hardware. unsigned getEstimatedVLFor(VectorType *Ty); - enum class RISCVInstruction { - VRGATHER_VV, - VRGATHER_VI, - VSLIDE, - VMERGE, - VMV_V, - VMV_SX, - VSIMPLE_INT, // ICMP - VNARROWING, // VNSRL - VSIMPLE_INT_RED, // VREDSUM, VREDAND, VREDOR, VREDXOR - VMINMAX_INTFP_RED, // VREDMAX, VREDMAXU, VREDMIN, VREDMINU - VUNORD_FP_RED, // VFREDUSUM, VFREDMAX, VFREDMIN - VORD_FP_RED, // VFREDOSUM - }; - - InstructionCost getRISCVInstructionCost(RISCVInstruction Inst, MVT VT, + InstructionCost getRISCVInstructionCost(unsigned OpCode, MVT VT, unsigned NumInstr, TTI::TargetCostKind CostKind); From d1365823e88e74564f06bc8d8f09f729e197957d Mon Sep 17 00:00:00 2001 From: ShihPo Hung Date: Wed, 29 Nov 2023 03:24:05 -0800 Subject: [PATCH 4/9] Support array of Opcodes --- .../Target/RISCV/RISCVTargetTransformInfo.cpp | 95 +++++++++---------- .../Target/RISCV/RISCVTargetTransformInfo.h | 3 +- 2 files changed, 46 insertions(+), 52 deletions(-) diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp index a8a2bdc0e4d4d6..03fd8c745793f2 100644 --- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp +++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp @@ -35,27 +35,29 @@ static cl::opt SLPMaxVF( cl::Hidden); InstructionCost -RISCVTTIImpl::getRISCVInstructionCost(unsigned OpCode, MVT VT, - unsigned NumInstr, +RISCVTTIImpl::getRISCVInstructionCost(ArrayRef OpCodes, MVT VT, TTI::TargetCostKind CostKind) { + size_t NumInstr = OpCodes.size(); if (CostKind == TTI::TCK_CodeSize) return NumInstr; - - InstructionCost LMUL = TLI->getLMULCost(VT); - InstructionCost Cost = LMUL * NumInstr; - - if ((CostKind == TTI::TCK_RecipThroughput) || - (CostKind == TTI::TCK_Latency)) { - switch (OpCode) { + InstructionCost LMULCost = TLI->getLMULCost(VT); + if ((CostKind != TTI::TCK_RecipThroughput) && (CostKind != TTI::TCK_Latency)) + return LMULCost * NumInstr; + InstructionCost Cost = 0; + for (auto Op : OpCodes) { + switch (Op) { case RISCV::VRGATHER_VI: - return NumInstr * TLI->getVRGatherVICost(VT); + Cost += TLI->getVRGatherVICost(VT); + break; case RISCV::VRGATHER_VV: - return NumInstr * TLI->getVRGatherVVCost(VT); + Cost += TLI->getVRGatherVVCost(VT); + break; case RISCV::VSLIDEUP_VI: case RISCV::VSLIDEDOWN_VI: case RISCV::VSLIDEUP_VX: case RISCV::VSLIDEDOWN_VX: - return NumInstr * TLI->getVSlideCost(VT); + Cost += TLI->getVSlideCost(VT); + break; case RISCV::VREDMAX_VS: case RISCV::VREDMIN_VS: case RISCV::VREDMAXU_VS: @@ -70,18 +72,20 @@ RISCVTTIImpl::getRISCVInstructionCost(unsigned OpCode, MVT VT, unsigned VL = VT.getVectorMinNumElements(); if (!VT.isFixedLengthVector()) VL *= *getVScaleForTuning(); - return Log2_32_Ceil(VL); + Cost += Log2_32_Ceil(VL); + break; } case RISCV::VFREDOSUM_VS: { unsigned VL = VT.getVectorMinNumElements(); if (!VT.isFixedLengthVector()) VL *= *getVScaleForTuning(); - return VL; + Cost += VL; + break; } case RISCV::VMV_S_X: - // FIXME: VMV_S_X doesn't use LMUL, just return NumInstr + // FIXME: VMV_S_X doesn't use LMUL, the cost should be 1 default: - return Cost; + Cost += LMULCost; } } return Cost; @@ -332,9 +336,8 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, // Example sequence: // vnsrl.wi v10, v8, 0 if (equal(DeinterleaveMask, Mask)) - return LT.first * - getRISCVInstructionCost(RISCV::VNSRL_WI, - LT.second, 1, CostKind); + return LT.first * getRISCVInstructionCost({RISCV::VNSRL_WI}, + LT.second, CostKind); } } } @@ -345,9 +348,8 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, LT.second.getVectorNumElements() <= 256)) { VectorType *IdxTy = getVRGatherIndexType(LT.second, *ST, Tp->getContext()); InstructionCost IndexCost = getConstantPoolLoadCost(IdxTy, CostKind); - return IndexCost + - getRISCVInstructionCost(RISCV::VRGATHER_VV, LT.second, - 1, CostKind); + return IndexCost + getRISCVInstructionCost({RISCV::VRGATHER_VV}, + LT.second, CostKind); } [[fallthrough]]; } @@ -366,8 +368,8 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, InstructionCost IndexCost = getConstantPoolLoadCost(IdxTy, CostKind); InstructionCost MaskCost = getConstantPoolLoadCost(MaskTy, CostKind); return 2 * IndexCost + - getRISCVInstructionCost(RISCV::VRGATHER_VV, LT.second, - 2, CostKind) + + getRISCVInstructionCost({RISCV::VRGATHER_VV, RISCV::VRGATHER_VV}, + LT.second, CostKind) + MaskCost; } [[fallthrough]]; @@ -423,14 +425,14 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, // Example sequence: // vsetivli zero, 4, e8, mf2, tu, ma (ignored) // vslidedown.vi v8, v9, 2 - return LT.first * getRISCVInstructionCost(RISCV::VSLIDEDOWN_VI, - LT.second, 1, CostKind); + return LT.first * + getRISCVInstructionCost({RISCV::VSLIDEDOWN_VI}, LT.second, CostKind); case TTI::SK_InsertSubvector: // Example sequence: // vsetivli zero, 4, e8, mf2, tu, ma (ignored) // vslideup.vi v8, v9, 2 - return LT.first * getRISCVInstructionCost(RISCV::VSLIDEUP_VI, - LT.second, 1, CostKind); + return LT.first * + getRISCVInstructionCost({RISCV::VSLIDEUP_VI}, LT.second, CostKind); case TTI::SK_Select: { // Example sequence: // li a0, 90 @@ -439,10 +441,8 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, // vmerge.vvm v8, v9, v8, v0 return LT.first * (TLI->getLMULCost(LT.second) + // FIXME: should be 1 for li - getRISCVInstructionCost(RISCV::VMV_S_X, LT.second, 1, - CostKind) + - getRISCVInstructionCost(RISCV::VMERGE_VVM, LT.second, 1, - CostKind)); + getRISCVInstructionCost({RISCV::VMV_S_X, RISCV::VMERGE_VVM}, + LT.second, CostKind)); } case TTI::SK_Broadcast: { bool HasScalar = (Args.size() > 0) && (Operator::getOpcode(Args[0]) == @@ -456,10 +456,8 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, // vmsne.vi v0, v8, 0 return LT.first * (TLI->getLMULCost(LT.second) + // FIXME: should be 1 for andi - getRISCVInstructionCost(RISCV::VMV_V_X, LT.second, 1, - CostKind) + - getRISCVInstructionCost(RISCV::VMSNE_VI, - LT.second, 1, CostKind)); + getRISCVInstructionCost({RISCV::VMV_V_X, RISCV::VMSNE_VI}, + LT.second, CostKind)); } // Example sequence: // vsetivli zero, 2, e8, mf8, ta, mu (ignored) @@ -474,32 +472,30 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, (TLI->getLMULCost(LT.second) + // FIXME: this should be 1 for andi TLI->getLMULCost( LT.second) + // FIXME: vmv.x.s is the same as extractelement - getRISCVInstructionCost(RISCV::VMV_V_X, LT.second, 2, - CostKind) + - getRISCVInstructionCost(RISCV::VMERGE_VIM, LT.second, 1, - CostKind) + - getRISCVInstructionCost(RISCV::VMSNE_VI, LT.second, - 1, CostKind)); + getRISCVInstructionCost({RISCV::VMV_V_I, RISCV::VMERGE_VIM, + RISCV::VMV_V_X, RISCV::VMSNE_VI}, + LT.second, CostKind)); } if (HasScalar) { // Example sequence: // vmv.v.x v8, a0 - return LT.first * getRISCVInstructionCost(RISCV::VMV_V_X, - LT.second, 1, CostKind); + return LT.first * + getRISCVInstructionCost({RISCV::VMV_V_X}, LT.second, CostKind); } // Example sequence: // vrgather.vi v9, v8, 0 - return LT.first * getRISCVInstructionCost(RISCV::VRGATHER_VI, - LT.second, 1, CostKind); + return LT.first * + getRISCVInstructionCost({RISCV::VRGATHER_VI}, LT.second, CostKind); } case TTI::SK_Splice: // vslidedown+vslideup. // TODO: Multiplying by LT.first implies this legalizes into multiple copies // of similar code, but I think we expand through memory. - return LT.first * getRISCVInstructionCost(RISCV::VSLIDEDOWN_VX, - LT.second, 2, CostKind); + return LT.first * + getRISCVInstructionCost({RISCV::VSLIDEDOWN_VX, RISCV::VSLIDEUP_VX}, + LT.second, CostKind); case TTI::SK_Reverse: { // TODO: Cases to improve here: // * Illegal vector types @@ -522,8 +518,7 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, // FIXME: replace the constant `2` below with cost of VSIMPLE_INT (vid.v & // vrsub.vx) InstructionCost GatherCost = - 2 + getRISCVInstructionCost(RISCV::VRGATHER_VV, LT.second, 1, - CostKind); + 2 + getRISCVInstructionCost({RISCV::VRGATHER_VV}, LT.second, CostKind); // Mask operation additionally required extend and truncate InstructionCost ExtendCost = Tp->getElementType()->isIntegerTy(1) ? 3 : 0; return LT.first * (LenCost + GatherCost + ExtendCost); diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h index 06fbde9d568659..c60ea54c5d4498 100644 --- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h +++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h @@ -48,8 +48,7 @@ class RISCVTTIImpl : public BasicTTIImplBase { /// actual target hardware. unsigned getEstimatedVLFor(VectorType *Ty); - InstructionCost getRISCVInstructionCost(unsigned OpCode, MVT VT, - unsigned NumInstr, + InstructionCost getRISCVInstructionCost(ArrayRef OpCodes, MVT VT, TTI::TargetCostKind CostKind); /// Return the cost of accessing a constant pool entry of the specified From 3d6c042d01d568a5570f40f0d281b0fe67c9e41b Mon Sep 17 00:00:00 2001 From: ShihPo Hung Date: Wed, 29 Nov 2023 04:27:25 -0800 Subject: [PATCH 5/9] Remove braces for single element --- .../Target/RISCV/RISCVTargetTransformInfo.cpp | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp index 03fd8c745793f2..63b37d94961430 100644 --- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp +++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp @@ -336,7 +336,7 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, // Example sequence: // vnsrl.wi v10, v8, 0 if (equal(DeinterleaveMask, Mask)) - return LT.first * getRISCVInstructionCost({RISCV::VNSRL_WI}, + return LT.first * getRISCVInstructionCost(RISCV::VNSRL_WI, LT.second, CostKind); } } @@ -348,8 +348,8 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, LT.second.getVectorNumElements() <= 256)) { VectorType *IdxTy = getVRGatherIndexType(LT.second, *ST, Tp->getContext()); InstructionCost IndexCost = getConstantPoolLoadCost(IdxTy, CostKind); - return IndexCost + getRISCVInstructionCost({RISCV::VRGATHER_VV}, - LT.second, CostKind); + return IndexCost + + getRISCVInstructionCost(RISCV::VRGATHER_VV, LT.second, CostKind); } [[fallthrough]]; } @@ -426,13 +426,13 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, // vsetivli zero, 4, e8, mf2, tu, ma (ignored) // vslidedown.vi v8, v9, 2 return LT.first * - getRISCVInstructionCost({RISCV::VSLIDEDOWN_VI}, LT.second, CostKind); + getRISCVInstructionCost(RISCV::VSLIDEDOWN_VI, LT.second, CostKind); case TTI::SK_InsertSubvector: // Example sequence: // vsetivli zero, 4, e8, mf2, tu, ma (ignored) // vslideup.vi v8, v9, 2 return LT.first * - getRISCVInstructionCost({RISCV::VSLIDEUP_VI}, LT.second, CostKind); + getRISCVInstructionCost(RISCV::VSLIDEUP_VI, LT.second, CostKind); case TTI::SK_Select: { // Example sequence: // li a0, 90 @@ -481,13 +481,13 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, // Example sequence: // vmv.v.x v8, a0 return LT.first * - getRISCVInstructionCost({RISCV::VMV_V_X}, LT.second, CostKind); + getRISCVInstructionCost(RISCV::VMV_V_X, LT.second, CostKind); } // Example sequence: // vrgather.vi v9, v8, 0 return LT.first * - getRISCVInstructionCost({RISCV::VRGATHER_VI}, LT.second, CostKind); + getRISCVInstructionCost(RISCV::VRGATHER_VI, LT.second, CostKind); } case TTI::SK_Splice: // vslidedown+vslideup. @@ -518,7 +518,7 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, // FIXME: replace the constant `2` below with cost of VSIMPLE_INT (vid.v & // vrsub.vx) InstructionCost GatherCost = - 2 + getRISCVInstructionCost({RISCV::VRGATHER_VV}, LT.second, CostKind); + 2 + getRISCVInstructionCost(RISCV::VRGATHER_VV, LT.second, CostKind); // Mask operation additionally required extend and truncate InstructionCost ExtendCost = Tp->getElementType()->isIntegerTy(1) ? 3 : 0; return LT.first * (LenCost + GatherCost + ExtendCost); From 3cfbca0d56ad36bb6a28ea750d2ec862406abf74 Mon Sep 17 00:00:00 2001 From: ShihPo Hung Date: Wed, 6 Dec 2023 08:04:43 -0800 Subject: [PATCH 6/9] Fix comments --- llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp index 63b37d94961430..1879c52afed125 100644 --- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp +++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp @@ -515,8 +515,7 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, if (LT.second.isFixedLengthVector()) // vrsub.vi has a 5 bit immediate field, otherwise an li suffices LenCost = isInt<5>(LT.second.getVectorNumElements() - 1) ? 0 : 1; - // FIXME: replace the constant `2` below with cost of VSIMPLE_INT (vid.v & - // vrsub.vx) + // FIXME: replace the constant `2` below with cost of {VID_V,VRSUB_VX} InstructionCost GatherCost = 2 + getRISCVInstructionCost(RISCV::VRGATHER_VV, LT.second, CostKind); // Mask operation additionally required extend and truncate From 0921879c67bc98b3d6cbb3e43afcfe43e4077085 Mon Sep 17 00:00:00 2001 From: ShihPo Hung Date: Fri, 8 Dec 2023 08:00:53 -0800 Subject: [PATCH 7/9] Test code-size in shuffle tests --- .../Analysis/CostModel/RISCV/rvv-shuffle.ll | 60 +++++++ .../CostModel/RISCV/shuffle-broadcast.ll | 99 +++++++++++ .../CostModel/RISCV/shuffle-insert.ll | 36 ++++ .../RISCV/shuffle-insert_subvector.ll | 166 ++++++++++++++++++ .../CostModel/RISCV/shuffle-permute.ll | 50 ++++++ .../CostModel/RISCV/shuffle-reverse.ll | 26 +++ .../CostModel/RISCV/shuffle-select.ll | 20 +++ .../CostModel/RISCV/shuffle-transpose.ll | 97 ++++++++++ llvm/test/Analysis/CostModel/RISCV/splice.ll | 53 ++++++ 9 files changed, 607 insertions(+) diff --git a/llvm/test/Analysis/CostModel/RISCV/rvv-shuffle.ll b/llvm/test/Analysis/CostModel/RISCV/rvv-shuffle.ll index e6e0a4c7ae8fb2..bd9f6af89a5cd9 100644 --- a/llvm/test/Analysis/CostModel/RISCV/rvv-shuffle.ll +++ b/llvm/test/Analysis/CostModel/RISCV/rvv-shuffle.ll @@ -2,6 +2,7 @@ ; Check getShuffleCost for scalable vector ; RUN: opt -passes="print" 2>&1 -disable-output -mtriple=riscv64 -mattr=+m,+v < %s | FileCheck %s +; RUN: opt -passes="print" 2>&1 -disable-output -mtriple=riscv64 -mattr=+m,+v -cost-kind=code-size < %s | FileCheck %s --check-prefix=SIZE define void @vector_broadcast() { ; CHECK-LABEL: 'vector_broadcast' @@ -18,6 +19,21 @@ define void @vector_broadcast() { ; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %10 = shufflevector undef, undef, zeroinitializer ; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %11 = shufflevector undef, undef, zeroinitializer ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; SIZE-LABEL: 'vector_broadcast' +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %zero = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %2 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %3 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %4 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %5 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %6 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %7 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %8 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %9 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %10 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %11 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void ; %zero = shufflevector undef, undef, zeroinitializer %1 = shufflevector undef, undef, zeroinitializer @@ -41,6 +57,13 @@ define void @vector_insert_extract( %v0, % ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %extract_scalable_from_scalable = call @llvm.vector.extract.nxv4i32.nxv16i32( %v1, i64 0) ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %insert_scalable_into_scalable = call @llvm.vector.insert.nxv16i32.nxv4i32( %v1, %v0, i64 0) ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; SIZE-LABEL: 'vector_insert_extract' +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %extract_fixed_from_scalable = call <16 x i32> @llvm.vector.extract.v16i32.nxv4i32( %v0, i64 0) +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %insert_fixed_into_scalable = call @llvm.vector.insert.nxv4i32.v16i32( %v0, <16 x i32> %v2, i64 0) +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %extract_scalable_from_scalable = call @llvm.vector.extract.nxv4i32.nxv16i32( %v1, i64 0) +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %insert_scalable_into_scalable = call @llvm.vector.insert.nxv16i32.nxv4i32( %v1, %v0, i64 0) +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void ; %extract_fixed_from_scalable = call <16 x i32> @llvm.vector.extract.v16i32.nxv4i32( %v0, i64 0) %insert_fixed_into_scalable = call @llvm.vector.insert.nxv4i32.v16i32( %v0, <16 x i32> %v2, i64 0) @@ -73,6 +96,26 @@ define void @vector_reverse() { ; CHECK-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %reverse_nxv4i1 = call @llvm.experimental.vector.reverse.nxv4i1( undef) ; CHECK-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %reverse_nxv2i1 = call @llvm.experimental.vector.reverse.nxv2i1( undef) ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; SIZE-LABEL: 'vector_reverse' +; SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %reverse_nxv16i8 = call @llvm.experimental.vector.reverse.nxv16i8( undef) +; SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %reverse_nxv32i8 = call @llvm.experimental.vector.reverse.nxv32i8( undef) +; SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %reverse_nxv2i16 = call @llvm.experimental.vector.reverse.nxv2i16( undef) +; SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %reverse_nxv4i16 = call @llvm.experimental.vector.reverse.nxv4i16( undef) +; SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %reverse_nxv8i16 = call @llvm.experimental.vector.reverse.nxv8i16( undef) +; SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %reverse_nxv16i16 = call @llvm.experimental.vector.reverse.nxv16i16( undef) +; SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %reverse_nxv4i32 = call @llvm.experimental.vector.reverse.nxv4i32( undef) +; SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %reverse_nxv8i32 = call @llvm.experimental.vector.reverse.nxv8i32( undef) +; SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %reverse_nxv2i64 = call @llvm.experimental.vector.reverse.nxv2i64( undef) +; SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %reverse_nxv4i64 = call @llvm.experimental.vector.reverse.nxv4i64( undef) +; SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %reverse_nxv8i64 = call @llvm.experimental.vector.reverse.nxv8i64( undef) +; SIZE-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %reverse_nxv16i64 = call @llvm.experimental.vector.reverse.nxv16i64( undef) +; SIZE-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %reverse_nxv32i64 = call @llvm.experimental.vector.reverse.nxv32i64( undef) +; SIZE-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %reverse_nxv16i1 = call @llvm.experimental.vector.reverse.nxv16i1( undef) +; SIZE-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %reverse_nxv8i1 = call @llvm.experimental.vector.reverse.nxv8i1( undef) +; SIZE-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %reverse_nxv4i1 = call @llvm.experimental.vector.reverse.nxv4i1( undef) +; SIZE-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %reverse_nxv2i1 = call @llvm.experimental.vector.reverse.nxv2i1( undef) +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void ; %reverse_nxv16i8 = call @llvm.experimental.vector.reverse.nxv16i8( undef) %reverse_nxv32i8 = call @llvm.experimental.vector.reverse.nxv32i8( undef) @@ -130,6 +173,23 @@ define void @vector_splice() { ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice_nxv4i1 = call @llvm.experimental.vector.splice.nxv4i1( zeroinitializer, zeroinitializer, i32 1) ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice_nxv2i1 = call @llvm.experimental.vector.splice.nxv2i1( zeroinitializer, zeroinitializer, i32 1) ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; SIZE-LABEL: 'vector_splice' +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice_nxv16i8 = call @llvm.experimental.vector.splice.nxv16i8( zeroinitializer, zeroinitializer, i32 1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice_nxv32i8 = call @llvm.experimental.vector.splice.nxv32i8( zeroinitializer, zeroinitializer, i32 1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice_nxv2i16 = call @llvm.experimental.vector.splice.nxv2i16( zeroinitializer, zeroinitializer, i32 1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice_nxv4i16 = call @llvm.experimental.vector.splice.nxv4i16( zeroinitializer, zeroinitializer, i32 1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice_nxv8i16 = call @llvm.experimental.vector.splice.nxv8i16( zeroinitializer, zeroinitializer, i32 1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice_nxv16i16 = call @llvm.experimental.vector.splice.nxv16i16( zeroinitializer, zeroinitializer, i32 1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice_nxv4i32 = call @llvm.experimental.vector.splice.nxv4i32( zeroinitializer, zeroinitializer, i32 1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice_nxv8i32 = call @llvm.experimental.vector.splice.nxv8i32( zeroinitializer, zeroinitializer, i32 1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice_nxv2i64 = call @llvm.experimental.vector.splice.nxv2i64( zeroinitializer, zeroinitializer, i32 1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice_nxv4i64 = call @llvm.experimental.vector.splice.nxv4i64( zeroinitializer, zeroinitializer, i32 1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice_nxv16i1 = call @llvm.experimental.vector.splice.nxv16i1( zeroinitializer, zeroinitializer, i32 1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice_nxv8i1 = call @llvm.experimental.vector.splice.nxv8i1( zeroinitializer, zeroinitializer, i32 1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice_nxv4i1 = call @llvm.experimental.vector.splice.nxv4i1( zeroinitializer, zeroinitializer, i32 1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice_nxv2i1 = call @llvm.experimental.vector.splice.nxv2i1( zeroinitializer, zeroinitializer, i32 1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void ; %splice_nxv16i8 = call @llvm.experimental.vector.splice.nxv16i8( zeroinitializer, zeroinitializer, i32 1) %splice_nxv32i8 = call @llvm.experimental.vector.splice.nxv32i8( zeroinitializer, zeroinitializer, i32 1) diff --git a/llvm/test/Analysis/CostModel/RISCV/shuffle-broadcast.ll b/llvm/test/Analysis/CostModel/RISCV/shuffle-broadcast.ll index e281e2f8cc0184..432b90d9305af3 100644 --- a/llvm/test/Analysis/CostModel/RISCV/shuffle-broadcast.ll +++ b/llvm/test/Analysis/CostModel/RISCV/shuffle-broadcast.ll @@ -1,5 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py ; RUN: opt < %s -passes="print" 2>&1 -disable-output -S -mtriple=riscv64 -mattr=+v,+f,+d,+zfh,+zvfh | FileCheck %s +; RUN: opt < %s -passes="print" -cost-kind=code-size 2>&1 -disable-output -S -mtriple=riscv64 -mattr=+v,+f,+d,+zfh,+zvfh | FileCheck %s --check-prefix=SIZE define void @broadcast_scalable() #0{ ; CHECK-LABEL: 'broadcast_scalable' @@ -48,6 +49,53 @@ define void @broadcast_scalable() #0{ ; CHECK-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %42 = shufflevector undef, undef, zeroinitializer ; CHECK-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %43 = shufflevector undef, undef, zeroinitializer ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; SIZE-LABEL: 'broadcast_scalable' +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %zero = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %2 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %3 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %4 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %5 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %6 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %7 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %8 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %9 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %10 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %11 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %12 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %13 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %14 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %15 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %16 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %17 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %18 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %19 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %20 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %21 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %22 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %23 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %24 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %25 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %26 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %27 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %28 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %29 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %30 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %31 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %32 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %33 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %34 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %35 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %36 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %37 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %38 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %39 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %40 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %41 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %42 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %43 = shufflevector undef, undef, zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void ; %zero = shufflevector undef, undef, zeroinitializer %1 = shufflevector undef, undef, zeroinitializer @@ -154,6 +202,57 @@ define void @broadcast_fixed() #0{ ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ins2 = insertelement <2 x i8> poison, i8 3, i32 0 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %45 = shufflevector <2 x i8> %ins2, <2 x i8> undef, <2 x i32> zeroinitializer ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; SIZE-LABEL: 'broadcast_fixed' +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %zero = shufflevector <2 x half> undef, <2 x half> undef, <2 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <4 x half> undef, <4 x half> undef, <4 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %2 = shufflevector <8 x half> undef, <8 x half> undef, <8 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %3 = shufflevector <16 x half> undef, <16 x half> undef, <16 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %4 = shufflevector <32 x half> undef, <32 x half> undef, <32 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %5 = shufflevector <64 x half> undef, <64 x half> undef, <64 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %6 = shufflevector <2 x float> undef, <2 x float> undef, <2 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %7 = shufflevector <4 x float> undef, <4 x float> undef, <4 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %8 = shufflevector <8 x float> undef, <8 x float> undef, <8 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %9 = shufflevector <16 x float> undef, <16 x float> undef, <16 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %10 = shufflevector <32 x float> undef, <32 x float> undef, <32 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %11 = shufflevector <2 x double> undef, <2 x double> undef, <2 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %12 = shufflevector <4 x double> undef, <4 x double> undef, <4 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %13 = shufflevector <8 x double> undef, <8 x double> undef, <8 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %14 = shufflevector <16 x double> undef, <16 x double> undef, <16 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %15 = shufflevector <2 x i8> undef, <2 x i8> undef, <2 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %16 = shufflevector <4 x i8> undef, <4 x i8> undef, <4 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %17 = shufflevector <8 x i8> undef, <8 x i8> undef, <8 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %18 = shufflevector <16 x i8> undef, <16 x i8> undef, <16 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %19 = shufflevector <32 x i8> undef, <32 x i8> undef, <32 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %20 = shufflevector <64 x i8> undef, <64 x i8> undef, <64 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %21 = shufflevector <128 x i8> undef, <128 x i8> undef, <128 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %22 = shufflevector <2 x i16> undef, <2 x i16> undef, <2 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %23 = shufflevector <4 x i16> undef, <4 x i16> undef, <4 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %24 = shufflevector <8 x i16> undef, <8 x i16> undef, <8 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %25 = shufflevector <16 x i16> undef, <16 x i16> undef, <16 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %26 = shufflevector <32 x i16> undef, <32 x i16> undef, <32 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %27 = shufflevector <64 x i16> undef, <64 x i16> undef, <64 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %28 = shufflevector <2 x i32> undef, <2 x i32> undef, <2 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %29 = shufflevector <4 x i32> undef, <4 x i32> undef, <4 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %30 = shufflevector <8 x i32> undef, <8 x i32> undef, <8 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %31 = shufflevector <16 x i32> undef, <16 x i32> undef, <16 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %32 = shufflevector <32 x i32> undef, <32 x i32> undef, <32 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %33 = shufflevector <2 x i64> undef, <2 x i64> undef, <2 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %34 = shufflevector <4 x i64> undef, <4 x i64> undef, <4 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %35 = shufflevector <8 x i64> undef, <8 x i64> undef, <8 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %36 = shufflevector <16 x i64> undef, <16 x i64> undef, <16 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %37 = shufflevector <2 x i1> undef, <2 x i1> undef, <2 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %38 = shufflevector <4 x i1> undef, <4 x i1> undef, <4 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %39 = shufflevector <8 x i1> undef, <8 x i1> undef, <8 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %40 = shufflevector <16 x i1> undef, <16 x i1> undef, <16 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %41 = shufflevector <32 x i1> undef, <32 x i1> undef, <32 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %42 = shufflevector <64 x i1> undef, <64 x i1> undef, <64 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %43 = shufflevector <128 x i1> undef, <128 x i1> undef, <128 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %ins1 = insertelement <128 x i1> poison, i1 poison, i32 0 +; SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %44 = shufflevector <128 x i1> %ins1, <128 x i1> poison, <128 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ins2 = insertelement <2 x i8> poison, i8 3, i32 0 +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %45 = shufflevector <2 x i8> %ins2, <2 x i8> undef, <2 x i32> zeroinitializer +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void ; %zero = shufflevector <2 x half> undef, <2 x half> undef, <2 x i32> zeroinitializer %1 = shufflevector <4 x half> undef, <4 x half> undef, <4 x i32> zeroinitializer diff --git a/llvm/test/Analysis/CostModel/RISCV/shuffle-insert.ll b/llvm/test/Analysis/CostModel/RISCV/shuffle-insert.ll index f5ec6625196158..0f0c37cb6ae430 100644 --- a/llvm/test/Analysis/CostModel/RISCV/shuffle-insert.ll +++ b/llvm/test/Analysis/CostModel/RISCV/shuffle-insert.ll @@ -1,11 +1,17 @@ ; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --version 2 ; RUN: opt < %s -passes="print" 2>&1 -disable-output -mtriple=riscv32 -mattr=+v | FileCheck %s -check-prefixes=CHECK,RV32 ; RUN: opt < %s -passes="print" 2>&1 -disable-output -mtriple=riscv64 -mattr=+v | FileCheck %s -check-prefixes=CHECK,RV64 +; RUN: opt < %s -passes="print" -cost-kind=code-size 2>&1 -disable-output -mtriple=riscv32 -mattr=+v | FileCheck %s -check-prefixes=CHECK-SIZE,RV32-SIZE +; RUN: opt < %s -passes="print" -cost-kind=code-size 2>&1 -disable-output -mtriple=riscv64 -mattr=+v | FileCheck %s -check-prefixes=CHECK-SIZE,RV64-SIZE define <8 x i8> @insert_subvector_middle_v8i8(<8 x i8> %v, <8 x i8> %w) { ; CHECK-LABEL: 'insert_subvector_middle_v8i8' ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %res = shufflevector <8 x i8> %v, <8 x i8> %w, <8 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i8> %res +; +; CHECK-SIZE-LABEL: 'insert_subvector_middle_v8i8' +; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %res = shufflevector <8 x i8> %v, <8 x i8> %w, <8 x i32> +; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <8 x i8> %res ; %res = shufflevector <8 x i8> %v, <8 x i8> %w, <8 x i32> ret <8 x i8> %res @@ -15,6 +21,10 @@ define <8 x i8> @insert_subvector_end_v8i8(<8 x i8> %v, <8 x i8> %w) { ; CHECK-LABEL: 'insert_subvector_end_v8i8' ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %res = shufflevector <8 x i8> %v, <8 x i8> %w, <8 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i8> %res +; +; CHECK-SIZE-LABEL: 'insert_subvector_end_v8i8' +; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %res = shufflevector <8 x i8> %v, <8 x i8> %w, <8 x i32> +; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <8 x i8> %res ; %res = shufflevector <8 x i8> %v, <8 x i8> %w, <8 x i32> ret <8 x i8> %res @@ -24,6 +34,10 @@ define <8 x i8> @insert_subvector_end_swapped_v8i8(<8 x i8> %v, <8 x i8> %w) { ; CHECK-LABEL: 'insert_subvector_end_swapped_v8i8' ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %res = shufflevector <8 x i8> %v, <8 x i8> %w, <8 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i8> %res +; +; CHECK-SIZE-LABEL: 'insert_subvector_end_swapped_v8i8' +; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %res = shufflevector <8 x i8> %v, <8 x i8> %w, <8 x i32> +; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <8 x i8> %res ; %res = shufflevector <8 x i8> %v, <8 x i8> %w, <8 x i32> ret <8 x i8> %res @@ -33,6 +47,10 @@ define <8 x i8> @insert_subvector_short_v8i8(<8 x i8> %v, <8 x i8> %w) { ; CHECK-LABEL: 'insert_subvector_short_v8i8' ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %res = shufflevector <8 x i8> %v, <8 x i8> %w, <8 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i8> %res +; +; CHECK-SIZE-LABEL: 'insert_subvector_short_v8i8' +; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %res = shufflevector <8 x i8> %v, <8 x i8> %w, <8 x i32> +; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <8 x i8> %res ; %res = shufflevector <8 x i8> %v, <8 x i8> %w, <8 x i32> ret <8 x i8> %res @@ -42,6 +60,10 @@ define <8 x i8> @insert_subvector_offset_1_v8i8(<8 x i8> %v, <8 x i8> %w) { ; CHECK-LABEL: 'insert_subvector_offset_1_v8i8' ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %res = shufflevector <8 x i8> %v, <8 x i8> %w, <8 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i8> %res +; +; CHECK-SIZE-LABEL: 'insert_subvector_offset_1_v8i8' +; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %res = shufflevector <8 x i8> %v, <8 x i8> %w, <8 x i32> +; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <8 x i8> %res ; %res = shufflevector <8 x i8> %v, <8 x i8> %w, <8 x i32> ret <8 x i8> %res @@ -51,6 +73,10 @@ define <8 x i64> @insert_subvector_offset_1_v8i64(<8 x i64> %v, <8 x i64> %w) { ; CHECK-LABEL: 'insert_subvector_offset_1_v8i64' ; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %res = shufflevector <8 x i64> %v, <8 x i64> %w, <8 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %res +; +; CHECK-SIZE-LABEL: 'insert_subvector_offset_1_v8i64' +; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %res = shufflevector <8 x i64> %v, <8 x i64> %w, <8 x i32> +; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <8 x i64> %res ; %res = shufflevector <8 x i64> %v, <8 x i64> %w, <8 x i32> ret <8 x i64> %res @@ -61,6 +87,10 @@ define <12 x i8> @insert_subvector_concat_v6i8(<6 x i8> %x, <6 x i8> %y) { ; CHECK-LABEL: 'insert_subvector_concat_v6i8' ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %a = shufflevector <6 x i8> %x, <6 x i8> %y, <12 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <12 x i8> %a +; +; CHECK-SIZE-LABEL: 'insert_subvector_concat_v6i8' +; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %a = shufflevector <6 x i8> %x, <6 x i8> %y, <12 x i32> +; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <12 x i8> %a ; %a = shufflevector <6 x i8> %x, <6 x i8> %y, <12 x i32> ret <12 x i8> %a @@ -71,6 +101,10 @@ define <8 x i8> @insert_subvector_concat_v8i8(<4 x i8> %x, <4 x i8> %y) { ; CHECK-LABEL: 'insert_subvector_concat_v8i8' ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %a = shufflevector <4 x i8> %x, <4 x i8> %y, <8 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i8> %a +; +; CHECK-SIZE-LABEL: 'insert_subvector_concat_v8i8' +; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %a = shufflevector <4 x i8> %x, <4 x i8> %y, <8 x i32> +; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <8 x i8> %a ; %a = shufflevector <4 x i8> %x, <4 x i8> %y, <8 x i32> ret <8 x i8> %a @@ -78,4 +112,6 @@ define <8 x i8> @insert_subvector_concat_v8i8(<4 x i8> %x, <4 x i8> %y) { ;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: ; RV32: {{.*}} +; RV32-SIZE: {{.*}} ; RV64: {{.*}} +; RV64-SIZE: {{.*}} diff --git a/llvm/test/Analysis/CostModel/RISCV/shuffle-insert_subvector.ll b/llvm/test/Analysis/CostModel/RISCV/shuffle-insert_subvector.ll index d0e2a7c71a107b..af656b4d7976d2 100644 --- a/llvm/test/Analysis/CostModel/RISCV/shuffle-insert_subvector.ll +++ b/llvm/test/Analysis/CostModel/RISCV/shuffle-insert_subvector.ll @@ -1,5 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py ; RUN: opt < %s -passes="print" 2>&1 -disable-output -mtriple=riscv32 -mattr=+v,+f,+d,+zfh,+zvfh -riscv-v-vector-bits-min=-1 | FileCheck %s +; RUN: opt < %s -passes="print" -cost-kind=code-size 2>&1 -disable-output -mtriple=riscv32 -mattr=+v,+f,+d,+zfh,+zvfh -riscv-v-vector-bits-min=-1 | FileCheck %s --check-prefix=SIZE ; Check that we don't crash querying costs when vectors are not enabled. ; RUN: opt -passes="print" 2>&1 -disable-output -mtriple=riscv32 @@ -17,6 +18,20 @@ define void @test_vXf64(<2 x double> %src128, <4 x double> %src256, <8 x double> ; CHECK-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V512_0123 = shufflevector <8 x double> %src512, <8 x double> %src256_512, <8 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V512_4567 = shufflevector <8 x double> %src512, <8 x double> %src256_512, <8 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; SIZE-LABEL: 'test_vXf64' +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src128_256 = shufflevector <2 x double> %src128, <2 x double> undef, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src128_512 = shufflevector <2 x double> %src128, <2 x double> undef, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src256_512 = shufflevector <4 x double> %src256, <4 x double> undef, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V256_01 = shufflevector <4 x double> %src256, <4 x double> %src128_256, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256_23 = shufflevector <4 x double> %src256, <4 x double> %src128_256, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V512_01 = shufflevector <8 x double> %src512, <8 x double> %src128_512, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512_23 = shufflevector <8 x double> %src512, <8 x double> %src128_512, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512_45 = shufflevector <8 x double> %src512, <8 x double> %src128_512, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512_67 = shufflevector <8 x double> %src512, <8 x double> %src128_512, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V512_0123 = shufflevector <8 x double> %src512, <8 x double> %src256_512, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512_4567 = shufflevector <8 x double> %src512, <8 x double> %src256_512, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void ; %src128_256 = shufflevector <2 x double> %src128, <2 x double> undef, <4 x i32> %src128_512 = shufflevector <2 x double> %src128, <2 x double> undef, <8 x i32> @@ -47,6 +62,20 @@ define void @test_vXi64(<2 x i64> %src128, <4 x i64> %src256, <8 x i64> %src512) ; CHECK-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V512_0123 = shufflevector <8 x i64> %src512, <8 x i64> %src256_512, <8 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V512_4567 = shufflevector <8 x i64> %src512, <8 x i64> %src256_512, <8 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; SIZE-LABEL: 'test_vXi64' +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src128_256 = shufflevector <2 x i64> %src128, <2 x i64> undef, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src128_512 = shufflevector <2 x i64> %src128, <2 x i64> undef, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src256_512 = shufflevector <4 x i64> %src256, <4 x i64> undef, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V256_01 = shufflevector <4 x i64> %src256, <4 x i64> %src128_256, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256_23 = shufflevector <4 x i64> %src256, <4 x i64> %src128_256, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V512_01 = shufflevector <8 x i64> %src512, <8 x i64> %src128_512, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512_23 = shufflevector <8 x i64> %src512, <8 x i64> %src128_512, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512_45 = shufflevector <8 x i64> %src512, <8 x i64> %src128_512, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512_67 = shufflevector <8 x i64> %src512, <8 x i64> %src128_512, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V512_0123 = shufflevector <8 x i64> %src512, <8 x i64> %src256_512, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512_4567 = shufflevector <8 x i64> %src512, <8 x i64> %src256_512, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void ; %src128_256 = shufflevector <2 x i64> %src128, <2 x i64> undef, <4 x i32> %src128_512 = shufflevector <2 x i64> %src128, <2 x i64> undef, <8 x i32> @@ -94,6 +123,37 @@ define void @test_vXf32(<2 x float> %src64, <4 x float> %src128, <8 x float> %sr ; CHECK-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V512_01234567 = shufflevector <16 x float> %src512, <16 x float> %src128_512, <16 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V512_89ABCDEF = shufflevector <16 x float> %src512, <16 x float> %src128_512, <16 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; SIZE-LABEL: 'test_vXf32' +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src64_128 = shufflevector <2 x float> %src64, <2 x float> undef, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src64_256 = shufflevector <2 x float> %src64, <2 x float> undef, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src64_512 = shufflevector <2 x float> %src64, <2 x float> undef, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src128_256 = shufflevector <4 x float> %src128, <4 x float> undef, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src128_512 = shufflevector <4 x float> %src128, <4 x float> undef, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src256_512 = shufflevector <8 x float> %src256, <8 x float> undef, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V128_01 = shufflevector <4 x float> %src128, <4 x float> %src64_128, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128_23 = shufflevector <4 x float> %src128, <4 x float> %src64_128, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V256_01 = shufflevector <8 x float> %src256, <8 x float> %src64_256, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256_23 = shufflevector <8 x float> %src256, <8 x float> %src64_256, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256_45 = shufflevector <8 x float> %src256, <8 x float> %src64_256, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256_67 = shufflevector <8 x float> %src256, <8 x float> %src64_256, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V256_0123 = shufflevector <8 x float> %src256, <8 x float> %src128_256, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256_4567 = shufflevector <8 x float> %src256, <8 x float> %src128_256, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V512_01 = shufflevector <16 x float> %src512, <16 x float> %src64_512, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512_23 = shufflevector <16 x float> %src512, <16 x float> %src64_512, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512_45 = shufflevector <16 x float> %src512, <16 x float> %src64_512, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512_67 = shufflevector <16 x float> %src512, <16 x float> %src64_512, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512_89 = shufflevector <16 x float> %src512, <16 x float> %src64_512, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512_AB = shufflevector <16 x float> %src512, <16 x float> %src64_512, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512_CD = shufflevector <16 x float> %src512, <16 x float> %src64_512, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512_EF = shufflevector <16 x float> %src512, <16 x float> %src64_512, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V512_0123 = shufflevector <16 x float> %src512, <16 x float> %src128_512, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512_4567 = shufflevector <16 x float> %src512, <16 x float> %src128_512, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512_89AB = shufflevector <16 x float> %src512, <16 x float> %src128_512, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512_CDEF = shufflevector <16 x float> %src512, <16 x float> %src128_512, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V512_01234567 = shufflevector <16 x float> %src512, <16 x float> %src128_512, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512_89ABCDEF = shufflevector <16 x float> %src512, <16 x float> %src128_512, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void ; %src64_128 = shufflevector <2 x float> %src64, <2 x float> undef, <4 x i32> %src64_256 = shufflevector <2 x float> %src64, <2 x float> undef, <8 x i32> @@ -160,6 +220,37 @@ define void @test_vXi32(<2 x i32> %src64, <4 x i32> %src128, <8 x i32> %src256, ; CHECK-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V512_01234567 = shufflevector <16 x i32> %src512, <16 x i32> %src128_512, <16 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V512_89ABCDEF = shufflevector <16 x i32> %src512, <16 x i32> %src128_512, <16 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; SIZE-LABEL: 'test_vXi32' +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src64_128 = shufflevector <2 x i32> %src64, <2 x i32> undef, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src64_256 = shufflevector <2 x i32> %src64, <2 x i32> undef, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src64_512 = shufflevector <2 x i32> %src64, <2 x i32> undef, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src128_256 = shufflevector <4 x i32> %src128, <4 x i32> undef, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src128_512 = shufflevector <4 x i32> %src128, <4 x i32> undef, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src256_512 = shufflevector <8 x i32> %src256, <8 x i32> undef, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V128_01 = shufflevector <4 x i32> %src128, <4 x i32> %src64_128, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128_23 = shufflevector <4 x i32> %src128, <4 x i32> %src64_128, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V256_01 = shufflevector <8 x i32> %src256, <8 x i32> %src64_256, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256_23 = shufflevector <8 x i32> %src256, <8 x i32> %src64_256, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256_45 = shufflevector <8 x i32> %src256, <8 x i32> %src64_256, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256_67 = shufflevector <8 x i32> %src256, <8 x i32> %src64_256, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V256_0123 = shufflevector <8 x i32> %src256, <8 x i32> %src128_256, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256_4567 = shufflevector <8 x i32> %src256, <8 x i32> %src128_256, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V512_01 = shufflevector <16 x i32> %src512, <16 x i32> %src64_512, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512_23 = shufflevector <16 x i32> %src512, <16 x i32> %src64_512, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512_45 = shufflevector <16 x i32> %src512, <16 x i32> %src64_512, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512_67 = shufflevector <16 x i32> %src512, <16 x i32> %src64_512, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512_89 = shufflevector <16 x i32> %src512, <16 x i32> %src64_512, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512_AB = shufflevector <16 x i32> %src512, <16 x i32> %src64_512, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512_CD = shufflevector <16 x i32> %src512, <16 x i32> %src64_512, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512_EF = shufflevector <16 x i32> %src512, <16 x i32> %src64_512, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V512_0123 = shufflevector <16 x i32> %src512, <16 x i32> %src128_512, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512_4567 = shufflevector <16 x i32> %src512, <16 x i32> %src128_512, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512_89AB = shufflevector <16 x i32> %src512, <16 x i32> %src128_512, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512_CDEF = shufflevector <16 x i32> %src512, <16 x i32> %src128_512, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V512_01234567 = shufflevector <16 x i32> %src512, <16 x i32> %src128_512, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512_89ABCDEF = shufflevector <16 x i32> %src512, <16 x i32> %src128_512, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void ; %src64_128 = shufflevector <2 x i32> %src64, <2 x i32> undef, <4 x i32> %src64_256 = shufflevector <2 x i32> %src64, <2 x i32> undef, <8 x i32> @@ -230,6 +321,41 @@ define void @test_vXi16(<2 x i16> %src32, <4 x i16> %src64, <8 x i16> %src128, < ; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V256_01234567 = shufflevector <16 x i16> %src256, <16 x i16> %src128_256, <16 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V256_89ABCDEF = shufflevector <16 x i16> %src256, <16 x i16> %src128_256, <16 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; SIZE-LABEL: 'test_vXi16' +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src32_64 = shufflevector <2 x i16> %src32, <2 x i16> undef, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src32_128 = shufflevector <2 x i16> %src32, <2 x i16> undef, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src32_256 = shufflevector <2 x i16> %src32, <2 x i16> undef, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src32_512 = shufflevector <2 x i16> %src32, <2 x i16> undef, <32 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src64_128 = shufflevector <4 x i16> %src64, <4 x i16> undef, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src64_256 = shufflevector <4 x i16> %src64, <4 x i16> undef, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src64_512 = shufflevector <4 x i16> %src64, <4 x i16> undef, <32 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src128_256 = shufflevector <8 x i16> %src128, <8 x i16> undef, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src128_512 = shufflevector <8 x i16> %src128, <8 x i16> undef, <32 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src256_512 = shufflevector <16 x i16> %src256, <16 x i16> undef, <32 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V64_01 = shufflevector <4 x i16> %src64, <4 x i16> %src32_64, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64_23 = shufflevector <4 x i16> %src64, <4 x i16> %src32_64, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V128_01 = shufflevector <8 x i16> %src128, <8 x i16> %src32_128, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128_23 = shufflevector <8 x i16> %src128, <8 x i16> %src32_128, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128_45 = shufflevector <8 x i16> %src128, <8 x i16> %src32_128, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128_67 = shufflevector <8 x i16> %src128, <8 x i16> %src32_128, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V128_0123 = shufflevector <8 x i16> %src128, <8 x i16> %src32_128, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128_4567 = shufflevector <8 x i16> %src128, <8 x i16> %src32_128, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V256_01 = shufflevector <16 x i16> %src256, <16 x i16> %src64_256, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256_23 = shufflevector <16 x i16> %src256, <16 x i16> %src64_256, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256_45 = shufflevector <16 x i16> %src256, <16 x i16> %src64_256, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256_67 = shufflevector <16 x i16> %src256, <16 x i16> %src64_256, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256_89 = shufflevector <16 x i16> %src256, <16 x i16> %src64_256, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256_AB = shufflevector <16 x i16> %src256, <16 x i16> %src64_256, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256_CD = shufflevector <16 x i16> %src256, <16 x i16> %src64_256, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256_EF = shufflevector <16 x i16> %src256, <16 x i16> %src64_256, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V256_0123 = shufflevector <16 x i16> %src256, <16 x i16> %src128_256, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256_4567 = shufflevector <16 x i16> %src256, <16 x i16> %src128_256, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256_89AB = shufflevector <16 x i16> %src256, <16 x i16> %src128_256, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256_CDEF = shufflevector <16 x i16> %src256, <16 x i16> %src128_256, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V256_01234567 = shufflevector <16 x i16> %src256, <16 x i16> %src128_256, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256_89ABCDEF = shufflevector <16 x i16> %src256, <16 x i16> %src128_256, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void ; %src32_64 = shufflevector <2 x i16> %src32, <2 x i16> undef, <4 x i32> %src32_128 = shufflevector <2 x i16> %src32, <2 x i16> undef, <8 x i32> @@ -310,6 +436,46 @@ define void @test_vXi8(<2 x i8> %src16, <4 x i8> %src32, <8 x i8> %src64, <16x i ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V128_01234567 = shufflevector <16 x i8> %src128, <16 x i8> %src64_128, <16 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128_89ABCDEF = shufflevector <16 x i8> %src128, <16 x i8> %src64_128, <16 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; SIZE-LABEL: 'test_vXi8' +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src16_32 = shufflevector <2 x i8> %src16, <2 x i8> undef, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src16_64 = shufflevector <2 x i8> %src16, <2 x i8> undef, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src16_128 = shufflevector <2 x i8> %src16, <2 x i8> undef, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src16_256 = shufflevector <2 x i8> %src16, <2 x i8> undef, <32 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src16_512 = shufflevector <2 x i8> %src16, <2 x i8> undef, <64 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src32_64 = shufflevector <4 x i8> %src32, <4 x i8> undef, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src32_128 = shufflevector <4 x i8> %src32, <4 x i8> undef, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src32_256 = shufflevector <4 x i8> %src32, <4 x i8> undef, <32 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src32_512 = shufflevector <4 x i8> %src32, <4 x i8> undef, <64 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src64_128 = shufflevector <8 x i8> %src64, <8 x i8> undef, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src64_256 = shufflevector <8 x i8> %src64, <8 x i8> undef, <32 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src64_512 = shufflevector <8 x i8> %src64, <8 x i8> undef, <64 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src128_256 = shufflevector <16 x i8> %src128, <16 x i8> undef, <32 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src128_512 = shufflevector <16 x i8> %src128, <16 x i8> undef, <64 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %src256_512 = shufflevector <32 x i8> %src256, <32 x i8> undef, <64 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V32_01 = shufflevector <4 x i8> %src32, <4 x i8> %src16_32, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32_23 = shufflevector <4 x i8> %src32, <4 x i8> %src16_32, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V64_01 = shufflevector <8 x i8> %src64, <8 x i8> %src32_64, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64_23 = shufflevector <8 x i8> %src64, <8 x i8> %src32_64, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64_45 = shufflevector <8 x i8> %src64, <8 x i8> %src32_64, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64_67 = shufflevector <8 x i8> %src64, <8 x i8> %src32_64, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V64_0123 = shufflevector <8 x i8> %src64, <8 x i8> %src32_64, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64_4567 = shufflevector <8 x i8> %src64, <8 x i8> %src32_64, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V128_01 = shufflevector <16 x i8> %src128, <16 x i8> %src16_128, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128_23 = shufflevector <16 x i8> %src128, <16 x i8> %src16_128, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128_45 = shufflevector <16 x i8> %src128, <16 x i8> %src16_128, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128_67 = shufflevector <16 x i8> %src128, <16 x i8> %src16_128, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128_89 = shufflevector <16 x i8> %src128, <16 x i8> %src16_128, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128_AB = shufflevector <16 x i8> %src128, <16 x i8> %src16_128, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128_CD = shufflevector <16 x i8> %src128, <16 x i8> %src16_128, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128_EF = shufflevector <16 x i8> %src128, <16 x i8> %src16_128, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V128_0123 = shufflevector <16 x i8> %src128, <16 x i8> %src32_128, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128_4567 = shufflevector <16 x i8> %src128, <16 x i8> %src32_128, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128_89AB = shufflevector <16 x i8> %src128, <16 x i8> %src32_128, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128_CDEF = shufflevector <16 x i8> %src128, <16 x i8> %src32_128, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V128_01234567 = shufflevector <16 x i8> %src128, <16 x i8> %src64_128, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128_89ABCDEF = shufflevector <16 x i8> %src128, <16 x i8> %src64_128, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void ; %src16_32 = shufflevector <2 x i8> %src16, <2 x i8> undef, <4 x i32> %src16_64 = shufflevector <2 x i8> %src16, <2 x i8> undef, <8 x i32> diff --git a/llvm/test/Analysis/CostModel/RISCV/shuffle-permute.ll b/llvm/test/Analysis/CostModel/RISCV/shuffle-permute.ll index 8f8ec20451f2b4..8e98d6e3b60fbf 100644 --- a/llvm/test/Analysis/CostModel/RISCV/shuffle-permute.ll +++ b/llvm/test/Analysis/CostModel/RISCV/shuffle-permute.ll @@ -1,5 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py ; RUN: opt < %s -passes="print" 2>&1 -disable-output -mtriple=riscv32 -mattr=+v,+f,+d,+zfh,+zvfh | FileCheck %s +; RUN: opt < %s -passes="print" -cost-kind=code-size 2>&1 -disable-output -mtriple=riscv32 -mattr=+v,+f,+d,+zfh,+zvfh | FileCheck %s --check-prefix=SIZE ; Check that we don't crash querying costs when vectors are not enabled. ; RUN: opt -passes="print" 2>&1 -disable-output -mtriple=riscv32 @@ -23,6 +24,24 @@ define void @general_permute_single_source() { ; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v8f32 = shufflevector <8 x float> undef, <8 x float> undef, <8 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v4f64 = shufflevector <4 x double> undef, <4 x double> undef, <4 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; SIZE-LABEL: 'general_permute_single_source' +; SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i8 = shufflevector <4 x i8> undef, <4 x i8> undef, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8i8 = shufflevector <8 x i8> undef, <8 x i8> undef, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v16i8 = shufflevector <16 x i8> undef, <16 x i8> undef, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i16 = shufflevector <4 x i16> undef, <4 x i16> undef, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8i16 = shufflevector <8 x i16> undef, <8 x i16> undef, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v16i16 = shufflevector <16 x i16> undef, <16 x i16> undef, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i32 = shufflevector <4 x i32> undef, <4 x i32> undef, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v8i32 = shufflevector <8 x i32> undef, <8 x i32> undef, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i64 = shufflevector <4 x i64> undef, <4 x i64> undef, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4f16 = shufflevector <4 x half> undef, <4 x half> undef, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v8f16 = shufflevector <8 x half> undef, <8 x half> undef, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v16f16 = shufflevector <16 x half> undef, <16 x half> undef, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4f32 = shufflevector <4 x float> undef, <4 x float> undef, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v8f32 = shufflevector <8 x float> undef, <8 x float> undef, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4f64 = shufflevector <4 x double> undef, <4 x double> undef, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void ; %v4i8 = shufflevector <4 x i8> undef, <4 x i8> undef, <4 x i32> %v8i8 = shufflevector <8 x i8> undef, <8 x i8> undef, <8 x i32> @@ -81,6 +100,37 @@ define void @general_permute_two_source() { ; CHECK-NEXT: Cost Model: Found an estimated cost of 41 for instruction: %v8double = shufflevector <8 x double> undef, <8 x double> undef, <8 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 139 for instruction: %v16double = shufflevector <16 x double> undef, <16 x double> undef, <16 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; SIZE-LABEL: 'general_permute_two_source' +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v2i8 = shufflevector <2 x i8> undef, <2 x i8> undef, <2 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v4i8 = shufflevector <4 x i8> undef, <4 x i8> undef, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v8i8 = shufflevector <8 x i8> undef, <8 x i8> undef, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v16i8 = shufflevector <16 x i8> undef, <16 x i8> undef, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v2i16 = shufflevector <2 x i16> undef, <2 x i16> undef, <2 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v4i16 = shufflevector <4 x i16> undef, <4 x i16> undef, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v8i16 = shufflevector <8 x i16> undef, <8 x i16> undef, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v16i16 = shufflevector <16 x i16> undef, <16 x i16> undef, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v2i32 = shufflevector <2 x i32> undef, <2 x i32> undef, <2 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v4i32 = shufflevector <4 x i32> undef, <4 x i32> undef, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v8i32 = shufflevector <8 x i32> undef, <8 x i32> undef, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v16i32 = shufflevector <16 x i32> undef, <16 x i32> undef, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v2i64 = shufflevector <2 x i64> undef, <2 x i64> undef, <2 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v4i64 = shufflevector <4 x i64> undef, <4 x i64> undef, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v8i64 = shufflevector <8 x i64> undef, <8 x i64> undef, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v16i64 = shufflevector <16 x i64> undef, <16 x i64> undef, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v2half = shufflevector <2 x half> undef, <2 x half> undef, <2 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v4half = shufflevector <4 x half> undef, <4 x half> undef, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v8half = shufflevector <8 x half> undef, <8 x half> undef, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v16half = shufflevector <16 x half> undef, <16 x half> undef, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v2float = shufflevector <2 x float> undef, <2 x float> undef, <2 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v4float = shufflevector <4 x float> undef, <4 x float> undef, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v8float = shufflevector <8 x float> undef, <8 x float> undef, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %v16float = shufflevector <16 x float> undef, <16 x float> undef, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v2double = shufflevector <2 x double> undef, <2 x double> undef, <2 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v4double = shufflevector <4 x double> undef, <4 x double> undef, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %v8double = shufflevector <8 x double> undef, <8 x double> undef, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %v16double = shufflevector <16 x double> undef, <16 x double> undef, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void ; %v2i8 = shufflevector <2 x i8> undef, <2 x i8> undef, <2 x i32> %v4i8 = shufflevector <4 x i8> undef, <4 x i8> undef, <4 x i32> diff --git a/llvm/test/Analysis/CostModel/RISCV/shuffle-reverse.ll b/llvm/test/Analysis/CostModel/RISCV/shuffle-reverse.ll index 4393505d3b28dc..17deeb2cfafa62 100644 --- a/llvm/test/Analysis/CostModel/RISCV/shuffle-reverse.ll +++ b/llvm/test/Analysis/CostModel/RISCV/shuffle-reverse.ll @@ -1,5 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py ; RUN: opt < %s -passes="print" 2>&1 -disable-output -mtriple=riscv32 -mattr=+v,+f,+d,+zfh,+zvfh -riscv-v-vector-bits-min=-1 | FileCheck %s +; RUN: opt < %s -passes="print" -cost-kind=code-size 2>&1 -disable-output -mtriple=riscv32 -mattr=+v,+f,+d,+zfh,+zvfh -riscv-v-vector-bits-min=-1 | FileCheck %s --check-prefixes=SIZE ; Check that we don't crash querying costs when vectors are not enabled. ; RUN: opt -passes="print" 2>&1 -disable-output -mtriple=riscv32 @@ -31,6 +32,31 @@ define void @reverse() { ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2f64 = shufflevector <2 x double> undef, <2 x double> undef, <2 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v4f64 = shufflevector <4 x double> undef, <4 x double> undef, <4 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; SIZE-LABEL: 'reverse' +; SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2i8 = shufflevector <2 x i8> undef, <2 x i8> undef, <2 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i8 = shufflevector <4 x i8> undef, <4 x i8> undef, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i8 = shufflevector <8 x i8> undef, <8 x i8> undef, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16i8 = shufflevector <16 x i8> undef, <16 x i8> undef, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2i16 = shufflevector <2 x i16> undef, <2 x i16> undef, <2 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i16 = shufflevector <4 x i16> undef, <4 x i16> undef, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i16 = shufflevector <8 x i16> undef, <8 x i16> undef, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16i16 = shufflevector <16 x i16> undef, <16 x i16> undef, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2i32 = shufflevector <2 x i32> undef, <2 x i32> undef, <2 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i32 = shufflevector <4 x i32> undef, <4 x i32> undef, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8i32 = shufflevector <8 x i32> undef, <8 x i32> undef, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2i64 = shufflevector <2 x i64> undef, <2 x i64> undef, <2 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4i64 = shufflevector <4 x i64> undef, <4 x i64> undef, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2f16 = shufflevector <2 x half> undef, <2 x half> undef, <2 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f16 = shufflevector <4 x half> undef, <4 x half> undef, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f16 = shufflevector <8 x half> undef, <8 x half> undef, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v16f16 = shufflevector <16 x half> undef, <16 x half> undef, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2f32 = shufflevector <2 x float> undef, <2 x float> undef, <2 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f32 = shufflevector <4 x float> undef, <4 x float> undef, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v8f32 = shufflevector <8 x float> undef, <8 x float> undef, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2f64 = shufflevector <2 x double> undef, <2 x double> undef, <2 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v4f64 = shufflevector <4 x double> undef, <4 x double> undef, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void ; %v2i8 = shufflevector <2 x i8> undef, <2 x i8> undef, <2 x i32> %v4i8 = shufflevector <4 x i8> undef, <4 x i8> undef, <4 x i32> diff --git a/llvm/test/Analysis/CostModel/RISCV/shuffle-select.ll b/llvm/test/Analysis/CostModel/RISCV/shuffle-select.ll index 8f47c481fff483..81454cc826e143 100644 --- a/llvm/test/Analysis/CostModel/RISCV/shuffle-select.ll +++ b/llvm/test/Analysis/CostModel/RISCV/shuffle-select.ll @@ -1,11 +1,17 @@ ; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --version 2 ; RUN: opt < %s -passes="print" 2>&1 -disable-output -mtriple=riscv32 -mattr=+v | FileCheck %s -check-prefixes=CHECK,RV32 ; RUN: opt < %s -passes="print" 2>&1 -disable-output -mtriple=riscv64 -mattr=+v | FileCheck %s -check-prefixes=CHECK,RV64 +; RUN: opt < %s -passes="print" -cost-kind=code-size 2>&1 -disable-output -mtriple=riscv32 -mattr=+v | FileCheck %s -check-prefixes=CHECK-SIZE,RV32-SIZE +; RUN: opt < %s -passes="print" -cost-kind=code-size 2>&1 -disable-output -mtriple=riscv64 -mattr=+v | FileCheck %s -check-prefixes=CHECK-SIZE,RV64-SIZE define <8 x i8> @select_start_v8i8(<8 x i8> %v, <8 x i8> %w) { ; CHECK-LABEL: 'select_start_v8i8' ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %res = shufflevector <8 x i8> %v, <8 x i8> %w, <8 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i8> %res +; +; CHECK-SIZE-LABEL: 'select_start_v8i8' +; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %res = shufflevector <8 x i8> %v, <8 x i8> %w, <8 x i32> +; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <8 x i8> %res ; %res = shufflevector <8 x i8> %v, <8 x i8> %w, <8 x i32> ret <8 x i8> %res @@ -15,6 +21,10 @@ define <8 x i8> @select_non_contiguous_v8i8(<8 x i8> %v, <8 x i8> %w) { ; CHECK-LABEL: 'select_non_contiguous_v8i8' ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %res = shufflevector <8 x i8> %v, <8 x i8> %w, <8 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i8> %res +; +; CHECK-SIZE-LABEL: 'select_non_contiguous_v8i8' +; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %res = shufflevector <8 x i8> %v, <8 x i8> %w, <8 x i32> +; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <8 x i8> %res ; %res = shufflevector <8 x i8> %v, <8 x i8> %w, <8 x i32> ret <8 x i8> %res @@ -24,6 +34,10 @@ define <8 x i64> @select_start_v8i64(<8 x i64> %v, <8 x i64> %w) { ; CHECK-LABEL: 'select_start_v8i64' ; CHECK-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %res = shufflevector <8 x i64> %v, <8 x i64> %w, <8 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %res +; +; CHECK-SIZE-LABEL: 'select_start_v8i64' +; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %res = shufflevector <8 x i64> %v, <8 x i64> %w, <8 x i32> +; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <8 x i64> %res ; %res = shufflevector <8 x i64> %v, <8 x i64> %w, <8 x i32> ret <8 x i64> %res @@ -33,10 +47,16 @@ define <8 x i64> @select_non_contiguous_v8i64(<8 x i64> %v, <8 x i64> %w) { ; CHECK-LABEL: 'select_non_contiguous_v8i64' ; CHECK-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %res = shufflevector <8 x i64> %v, <8 x i64> %w, <8 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %res +; +; CHECK-SIZE-LABEL: 'select_non_contiguous_v8i64' +; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %res = shufflevector <8 x i64> %v, <8 x i64> %w, <8 x i32> +; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <8 x i64> %res ; %res = shufflevector <8 x i64> %v, <8 x i64> %w, <8 x i32> ret <8 x i64> %res } ;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: ; RV32: {{.*}} +; RV32-SIZE: {{.*}} ; RV64: {{.*}} +; RV64-SIZE: {{.*}} diff --git a/llvm/test/Analysis/CostModel/RISCV/shuffle-transpose.ll b/llvm/test/Analysis/CostModel/RISCV/shuffle-transpose.ll index 8d7457ee5de670..c3f20c858ba5e1 100644 --- a/llvm/test/Analysis/CostModel/RISCV/shuffle-transpose.ll +++ b/llvm/test/Analysis/CostModel/RISCV/shuffle-transpose.ll @@ -1,5 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py ; RUN: opt < %s -passes="print" 2>&1 -disable-output -mtriple=riscv32 -mattr=+v,+f,+d,+zfh,+zvfh -riscv-v-vector-bits-min=-1 | FileCheck %s +; RUN: opt < %s -passes="print" -cost-kind=code-size 2>&1 -disable-output -mtriple=riscv32 -mattr=+v,+f,+d,+zfh,+zvfh -riscv-v-vector-bits-min=-1 | FileCheck %s --check-prefix=SIZE ; Check that we don't crash querying costs when vectors are not enabled. ; RUN: opt -passes="print" 2>&1 -disable-output -mtriple=riscv32 @@ -9,6 +10,10 @@ define <8 x i8> @trn1.v8i8(<8 x i8> %v0, <8 x i8> %v1) { ; CHECK-LABEL: 'trn1.v8i8' ; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <8 x i8> %v0, <8 x i8> %v1, <8 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i8> %tmp0 +; +; SIZE-LABEL: 'trn1.v8i8' +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <8 x i8> %v0, <8 x i8> %v1, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <8 x i8> %tmp0 ; %tmp0 = shufflevector <8 x i8> %v0, <8 x i8> %v1, <8 x i32> ret <8 x i8> %tmp0 @@ -18,6 +23,10 @@ define <8 x i8> @trn2.v8i8(<8 x i8> %v0, <8 x i8> %v1) { ; CHECK-LABEL: 'trn2.v8i8' ; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <8 x i8> %v0, <8 x i8> %v1, <8 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i8> %tmp0 +; +; SIZE-LABEL: 'trn2.v8i8' +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <8 x i8> %v0, <8 x i8> %v1, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <8 x i8> %tmp0 ; %tmp0 = shufflevector <8 x i8> %v0, <8 x i8> %v1, <8 x i32> ret <8 x i8> %tmp0 @@ -27,6 +36,10 @@ define <16 x i8> @trn1.v16i8(<16 x i8> %v0, <16 x i8> %v1) { ; CHECK-LABEL: 'trn1.v16i8' ; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <16 x i8> %v0, <16 x i8> %v1, <16 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %tmp0 +; +; SIZE-LABEL: 'trn1.v16i8' +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <16 x i8> %v0, <16 x i8> %v1, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <16 x i8> %tmp0 ; %tmp0 = shufflevector <16 x i8> %v0, <16 x i8> %v1, <16 x i32> ret <16 x i8> %tmp0 @@ -36,6 +49,10 @@ define <16 x i8> @trn2.v16i8(<16 x i8> %v0, <16 x i8> %v1) { ; CHECK-LABEL: 'trn2.v16i8' ; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <16 x i8> %v0, <16 x i8> %v1, <16 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %tmp0 +; +; SIZE-LABEL: 'trn2.v16i8' +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <16 x i8> %v0, <16 x i8> %v1, <16 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <16 x i8> %tmp0 ; %tmp0 = shufflevector <16 x i8> %v0, <16 x i8> %v1, <16 x i32> ret <16 x i8> %tmp0 @@ -45,6 +62,10 @@ define <4 x i16> @trn1.v4i16(<4 x i16> %v0, <4 x i16> %v1) { ; CHECK-LABEL: 'trn1.v4i16' ; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <4 x i16> %v0, <4 x i16> %v1, <4 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i16> %tmp0 +; +; SIZE-LABEL: 'trn1.v4i16' +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <4 x i16> %v0, <4 x i16> %v1, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <4 x i16> %tmp0 ; %tmp0 = shufflevector <4 x i16> %v0, <4 x i16> %v1, <4 x i32> ret <4 x i16> %tmp0 @@ -54,6 +75,10 @@ define <4 x i16> @trn2.v4i16(<4 x i16> %v0, <4 x i16> %v1) { ; CHECK-LABEL: 'trn2.v4i16' ; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <4 x i16> %v0, <4 x i16> %v1, <4 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i16> %tmp0 +; +; SIZE-LABEL: 'trn2.v4i16' +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <4 x i16> %v0, <4 x i16> %v1, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <4 x i16> %tmp0 ; %tmp0 = shufflevector <4 x i16> %v0, <4 x i16> %v1, <4 x i32> ret <4 x i16> %tmp0 @@ -63,6 +88,10 @@ define <8 x i16> @trn1.v8i16(<8 x i16> %v0, <8 x i16> %v1) { ; CHECK-LABEL: 'trn1.v8i16' ; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <8 x i16> %v0, <8 x i16> %v1, <8 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %tmp0 +; +; SIZE-LABEL: 'trn1.v8i16' +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <8 x i16> %v0, <8 x i16> %v1, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <8 x i16> %tmp0 ; %tmp0 = shufflevector <8 x i16> %v0, <8 x i16> %v1, <8 x i32> ret <8 x i16> %tmp0 @@ -72,6 +101,10 @@ define <8 x i16> @trn2.v8i16(<8 x i16> %v0, <8 x i16> %v1) { ; CHECK-LABEL: 'trn2.v8i16' ; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <8 x i16> %v0, <8 x i16> %v1, <8 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %tmp0 +; +; SIZE-LABEL: 'trn2.v8i16' +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <8 x i16> %v0, <8 x i16> %v1, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <8 x i16> %tmp0 ; %tmp0 = shufflevector <8 x i16> %v0, <8 x i16> %v1, <8 x i32> ret <8 x i16> %tmp0 @@ -81,6 +114,10 @@ define <2 x i32> @trn1.v2i32(<2 x i32> %v0, <2 x i32> %v1) { ; CHECK-LABEL: 'trn1.v2i32' ; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <2 x i32> %v0, <2 x i32> %v1, <2 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i32> %tmp0 +; +; SIZE-LABEL: 'trn1.v2i32' +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <2 x i32> %v0, <2 x i32> %v1, <2 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <2 x i32> %tmp0 ; %tmp0 = shufflevector <2 x i32> %v0, <2 x i32> %v1, <2 x i32> ret <2 x i32> %tmp0 @@ -90,6 +127,10 @@ define <2 x i32> @trn2.v2i32(<2 x i32> %v0, <2 x i32> %v1) { ; CHECK-LABEL: 'trn2.v2i32' ; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <2 x i32> %v0, <2 x i32> %v1, <2 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i32> %tmp0 +; +; SIZE-LABEL: 'trn2.v2i32' +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <2 x i32> %v0, <2 x i32> %v1, <2 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <2 x i32> %tmp0 ; %tmp0 = shufflevector <2 x i32> %v0, <2 x i32> %v1, <2 x i32> ret <2 x i32> %tmp0 @@ -99,6 +140,10 @@ define <4 x i32> @trn1.v4i32(<4 x i32> %v0, <4 x i32> %v1) { ; CHECK-LABEL: 'trn1.v4i32' ; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <4 x i32> %v0, <4 x i32> %v1, <4 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %tmp0 +; +; SIZE-LABEL: 'trn1.v4i32' +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <4 x i32> %v0, <4 x i32> %v1, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <4 x i32> %tmp0 ; %tmp0 = shufflevector <4 x i32> %v0, <4 x i32> %v1, <4 x i32> ret <4 x i32> %tmp0 @@ -108,6 +153,10 @@ define <4 x i32> @trn2.v4i32(<4 x i32> %v0, <4 x i32> %v1) { ; CHECK-LABEL: 'trn2.v4i32' ; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <4 x i32> %v0, <4 x i32> %v1, <4 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %tmp0 +; +; SIZE-LABEL: 'trn2.v4i32' +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <4 x i32> %v0, <4 x i32> %v1, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <4 x i32> %tmp0 ; %tmp0 = shufflevector <4 x i32> %v0, <4 x i32> %v1, <4 x i32> ret <4 x i32> %tmp0 @@ -117,6 +166,10 @@ define <2 x i64> @trn1.v2i64(<2 x i64> %v0, <2 x i64> %v1) { ; CHECK-LABEL: 'trn1.v2i64' ; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <2 x i64> %v0, <2 x i64> %v1, <2 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %tmp0 +; +; SIZE-LABEL: 'trn1.v2i64' +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <2 x i64> %v0, <2 x i64> %v1, <2 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <2 x i64> %tmp0 ; %tmp0 = shufflevector <2 x i64> %v0, <2 x i64> %v1, <2 x i32> ret <2 x i64> %tmp0 @@ -126,6 +179,10 @@ define <2 x i64> @trn2.v2i64(<2 x i64> %v0, <2 x i64> %v1) { ; CHECK-LABEL: 'trn2.v2i64' ; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <2 x i64> %v0, <2 x i64> %v1, <2 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %tmp0 +; +; SIZE-LABEL: 'trn2.v2i64' +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <2 x i64> %v0, <2 x i64> %v1, <2 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <2 x i64> %tmp0 ; %tmp0 = shufflevector <2 x i64> %v0, <2 x i64> %v1, <2 x i32> ret <2 x i64> %tmp0 @@ -135,6 +192,10 @@ define <2 x float> @trn1.v2f32(<2 x float> %v0, <2 x float> %v1) { ; CHECK-LABEL: 'trn1.v2f32' ; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <2 x float> %v0, <2 x float> %v1, <2 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x float> %tmp0 +; +; SIZE-LABEL: 'trn1.v2f32' +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <2 x float> %v0, <2 x float> %v1, <2 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <2 x float> %tmp0 ; %tmp0 = shufflevector <2 x float> %v0, <2 x float> %v1, <2 x i32> ret <2 x float> %tmp0 @@ -144,6 +205,10 @@ define <2 x float> @trn2.v2f32(<2 x float> %v0, <2 x float> %v1) { ; CHECK-LABEL: 'trn2.v2f32' ; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <2 x float> %v0, <2 x float> %v1, <2 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x float> %tmp0 +; +; SIZE-LABEL: 'trn2.v2f32' +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <2 x float> %v0, <2 x float> %v1, <2 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <2 x float> %tmp0 ; %tmp0 = shufflevector <2 x float> %v0, <2 x float> %v1, <2 x i32> ret <2 x float> %tmp0 @@ -153,6 +218,10 @@ define <4 x float> @trn1.v4f32(<4 x float> %v0, <4 x float> %v1) { ; CHECK-LABEL: 'trn1.v4f32' ; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <4 x float> %v0, <4 x float> %v1, <4 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x float> %tmp0 +; +; SIZE-LABEL: 'trn1.v4f32' +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <4 x float> %v0, <4 x float> %v1, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <4 x float> %tmp0 ; %tmp0 = shufflevector <4 x float> %v0, <4 x float> %v1, <4 x i32> ret <4 x float> %tmp0 @@ -162,6 +231,10 @@ define <4 x float> @trn2.v4f32(<4 x float> %v0, <4 x float> %v1) { ; CHECK-LABEL: 'trn2.v4f32' ; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <4 x float> %v0, <4 x float> %v1, <4 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x float> %tmp0 +; +; SIZE-LABEL: 'trn2.v4f32' +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <4 x float> %v0, <4 x float> %v1, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <4 x float> %tmp0 ; %tmp0 = shufflevector <4 x float> %v0, <4 x float> %v1, <4 x i32> ret <4 x float> %tmp0 @@ -171,6 +244,10 @@ define <2 x double> @trn1.v2f64(<2 x double> %v0, <2 x double> %v1) { ; CHECK-LABEL: 'trn1.v2f64' ; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <2 x double> %v0, <2 x double> %v1, <2 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x double> %tmp0 +; +; SIZE-LABEL: 'trn1.v2f64' +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <2 x double> %v0, <2 x double> %v1, <2 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <2 x double> %tmp0 ; %tmp0 = shufflevector <2 x double> %v0, <2 x double> %v1, <2 x i32> ret <2 x double> %tmp0 @@ -180,6 +257,10 @@ define <2 x double> @trn2.v2f64(<2 x double> %v0, <2 x double> %v1) { ; CHECK-LABEL: 'trn2.v2f64' ; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <2 x double> %v0, <2 x double> %v1, <2 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x double> %tmp0 +; +; SIZE-LABEL: 'trn2.v2f64' +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <2 x double> %v0, <2 x double> %v1, <2 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <2 x double> %tmp0 ; %tmp0 = shufflevector <2 x double> %v0, <2 x double> %v1, <2 x i32> ret <2 x double> %tmp0 @@ -189,6 +270,10 @@ define <4 x half> @trn1.v4f16(<4 x half> %v0, <4 x half> %v1) { ; CHECK-LABEL: 'trn1.v4f16' ; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <4 x half> %v0, <4 x half> %v1, <4 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x half> %tmp0 +; +; SIZE-LABEL: 'trn1.v4f16' +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <4 x half> %v0, <4 x half> %v1, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <4 x half> %tmp0 ; %tmp0 = shufflevector <4 x half> %v0, <4 x half> %v1, <4 x i32> ret <4 x half> %tmp0 @@ -198,6 +283,10 @@ define <4 x half> @trn2.v4f16(<4 x half> %v0, <4 x half> %v1) { ; CHECK-LABEL: 'trn2.v4f16' ; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <4 x half> %v0, <4 x half> %v1, <4 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x half> %tmp0 +; +; SIZE-LABEL: 'trn2.v4f16' +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <4 x half> %v0, <4 x half> %v1, <4 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <4 x half> %tmp0 ; %tmp0 = shufflevector <4 x half> %v0, <4 x half> %v1, <4 x i32> ret <4 x half> %tmp0 @@ -207,6 +296,10 @@ define <8 x half> @trn1.v8f16(<8 x half> %v0, <8 x half> %v1) { ; CHECK-LABEL: 'trn1.v8f16' ; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <8 x half> %v0, <8 x half> %v1, <8 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x half> %tmp0 +; +; SIZE-LABEL: 'trn1.v8f16' +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <8 x half> %v0, <8 x half> %v1, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <8 x half> %tmp0 ; %tmp0 = shufflevector <8 x half> %v0, <8 x half> %v1, <8 x i32> ret <8 x half> %tmp0 @@ -216,6 +309,10 @@ define <8 x half> @trn2.v8f16(<8 x half> %v0, <8 x half> %v1) { ; CHECK-LABEL: 'trn2.v8f16' ; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <8 x half> %v0, <8 x half> %v1, <8 x i32> ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x half> %tmp0 +; +; SIZE-LABEL: 'trn2.v8f16' +; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %tmp0 = shufflevector <8 x half> %v0, <8 x half> %v1, <8 x i32> +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <8 x half> %tmp0 ; %tmp0 = shufflevector <8 x half> %v0, <8 x half> %v1, <8 x i32> ret <8 x half> %tmp0 diff --git a/llvm/test/Analysis/CostModel/RISCV/splice.ll b/llvm/test/Analysis/CostModel/RISCV/splice.ll index 89015c48c6c478..c70c879dba5abe 100644 --- a/llvm/test/Analysis/CostModel/RISCV/splice.ll +++ b/llvm/test/Analysis/CostModel/RISCV/splice.ll @@ -1,5 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py ; RUN: opt < %s -passes="print" 2>&1 -disable-output -S -mtriple=riscv64 -mattr=+v,+f,+d,+zfh,+zvfh | FileCheck %s +; RUN: opt < %s -passes="print" -cost-kind=code-size 2>&1 -disable-output -S -mtriple=riscv64 -mattr=+v,+f,+d,+zfh,+zvfh | FileCheck %s --check-prefix=SIZE define void @vector_splice() { ; CHECK-LABEL: 'vector_splice' @@ -53,6 +54,58 @@ define void @vector_splice() { ; CHECK-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %splice.nxv32f64 = call @llvm.experimental.vector.splice.nxv32f64( zeroinitializer, zeroinitializer, i32 -1) ; CHECK-NEXT: Cost Model: Found an estimated cost of 128 for instruction: %splice.nxv64f64 = call @llvm.experimental.vector.splice.nxv64f64( zeroinitializer, zeroinitializer, i32 -1) ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; SIZE-LABEL: 'vector_splice' +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice.nxv1i8 = call @llvm.experimental.vector.splice.nxv1i8( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice.nxv2i8 = call @llvm.experimental.vector.splice.nxv2i8( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice.nxv4i8 = call @llvm.experimental.vector.splice.nxv4i8( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice.nxv8i8 = call @llvm.experimental.vector.splice.nxv8i8( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice.nxv16i8 = call @llvm.experimental.vector.splice.nxv16i8( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice.nxv32i8 = call @llvm.experimental.vector.splice.nxv32i8( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice.nxv64i8 = call @llvm.experimental.vector.splice.nxv64i8( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice.nxv1i16 = call @llvm.experimental.vector.splice.nxv1i16( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice.nxv2i16 = call @llvm.experimental.vector.splice.nxv2i16( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice.nxv4i16 = call @llvm.experimental.vector.splice.nxv4i16( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice.nxv8i16 = call @llvm.experimental.vector.splice.nxv8i16( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice.nxv16i16 = call @llvm.experimental.vector.splice.nxv16i16( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice.nxv32i16 = call @llvm.experimental.vector.splice.nxv32i16( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %splice.nxv64i16 = call @llvm.experimental.vector.splice.nxv64i16( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice.nxv1i32 = call @llvm.experimental.vector.splice.nxv1i32( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice.nxv2i32 = call @llvm.experimental.vector.splice.nxv2i32( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice.nxv4i32 = call @llvm.experimental.vector.splice.nxv4i32( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice.nxv8i32 = call @llvm.experimental.vector.splice.nxv8i32( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice.nxv16i32 = call @llvm.experimental.vector.splice.nxv16i32( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %splice.nxv32i32 = call @llvm.experimental.vector.splice.nxv32i32( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %splice.nxv64i32 = call @llvm.experimental.vector.splice.nxv64i32( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice.nxv1i64 = call @llvm.experimental.vector.splice.nxv1i64( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice.nxv2i64 = call @llvm.experimental.vector.splice.nxv2i64( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice.nxv4i64 = call @llvm.experimental.vector.splice.nxv4i64( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice.nxv8i64 = call @llvm.experimental.vector.splice.nxv8i64( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %splice.nxv16i64 = call @llvm.experimental.vector.splice.nxv16i64( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %splice.nxv32i64 = call @llvm.experimental.vector.splice.nxv32i64( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %splice.nxv64i64 = call @llvm.experimental.vector.splice.nxv64i64( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice.nxv1f16 = call @llvm.experimental.vector.splice.nxv1f16( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice.nxv2f16 = call @llvm.experimental.vector.splice.nxv2f16( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice.nxv4f16 = call @llvm.experimental.vector.splice.nxv4f16( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice.nxv8f16 = call @llvm.experimental.vector.splice.nxv8f16( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice.nxv16f16 = call @llvm.experimental.vector.splice.nxv16f16( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice.nxv32f16 = call @llvm.experimental.vector.splice.nxv32f16( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %splice.nxv64f16 = call @llvm.experimental.vector.splice.nxv64f16( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice.nxv1f32 = call @llvm.experimental.vector.splice.nxv1f32( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice.nxv2f32 = call @llvm.experimental.vector.splice.nxv2f32( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice.nxv4f32 = call @llvm.experimental.vector.splice.nxv4f32( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice.nxv8f32 = call @llvm.experimental.vector.splice.nxv8f32( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice.nxv16f32 = call @llvm.experimental.vector.splice.nxv16f32( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %splice.nxv32f32 = call @llvm.experimental.vector.splice.nxv32f32( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %splice.nxv64f32 = call @llvm.experimental.vector.splice.nxv64f32( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice.nxv1f64 = call @llvm.experimental.vector.splice.nxv1f64( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice.nxv2f64 = call @llvm.experimental.vector.splice.nxv2f64( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice.nxv4f64 = call @llvm.experimental.vector.splice.nxv4f64( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splice.nxv8f64 = call @llvm.experimental.vector.splice.nxv8f64( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %splice.nxv16f64 = call @llvm.experimental.vector.splice.nxv16f64( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %splice.nxv32f64 = call @llvm.experimental.vector.splice.nxv32f64( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %splice.nxv64f64 = call @llvm.experimental.vector.splice.nxv64f64( zeroinitializer, zeroinitializer, i32 -1) +; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void ; %splice.nxv1i8 = call @llvm.experimental.vector.splice.nxv1i8( zeroinitializer, zeroinitializer, i32 -1) %splice.nxv2i8 = call @llvm.experimental.vector.splice.nxv2i8( zeroinitializer, zeroinitializer, i32 -1) From fce7beb84c60f4744649ff52de586e2d3ef8a7e7 Mon Sep 17 00:00:00 2001 From: ShihPo Hung Date: Tue, 26 Dec 2023 00:05:59 -0800 Subject: [PATCH 8/9] Check Splice index and separate VSlide VI/VX cost --- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 12 ++++++++++-- llvm/lib/Target/RISCV/RISCVISelLowering.h | 3 ++- .../Target/RISCV/RISCVTargetTransformInfo.cpp | 16 +++++++++++----- 3 files changed, 23 insertions(+), 8 deletions(-) diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp index e23a7fc1c8e946..c1feebdc7594e7 100644 --- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp +++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp @@ -2676,11 +2676,19 @@ InstructionCost RISCVTargetLowering::getVRGatherVICost(MVT VT) const { return getLMULCost(VT); } -/// Return the cost of a vslidedown.vi/vx or vslideup.vi/vx instruction +/// Return the cost of a vslidedown.vx or vslideup.vx instruction /// for the type VT. (This does not cover the vslide1up or vslide1down /// variants.) Slides may be linear in the number of vregs implied by LMUL, /// or may track the vrgather.vv cost. It is implementation-dependent. -InstructionCost RISCVTargetLowering::getVSlideCost(MVT VT) const { +InstructionCost RISCVTargetLowering::getVSlideVXCost(MVT VT) const { + return getLMULCost(VT); +} + +/// Return the cost of a vslidedown.vi or vslideup.vi instruction +/// for the type VT. (This does not cover the vslide1up or vslide1down +/// variants.) Slides may be linear in the number of vregs implied by LMUL, +/// or may track the vrgather.vv cost. It is implementation-dependent. +InstructionCost RISCVTargetLowering::getVSlideVICost(MVT VT) const { return getLMULCost(VT); } diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.h b/llvm/lib/Target/RISCV/RISCVISelLowering.h index 45200b54595a0b..0f156556f6913e 100644 --- a/llvm/lib/Target/RISCV/RISCVISelLowering.h +++ b/llvm/lib/Target/RISCV/RISCVISelLowering.h @@ -525,7 +525,8 @@ class RISCVTargetLowering : public TargetLowering { InstructionCost getVRGatherVVCost(MVT VT) const; InstructionCost getVRGatherVICost(MVT VT) const; - InstructionCost getVSlideCost(MVT VT) const; + InstructionCost getVSlideVXCost(MVT VT) const; + InstructionCost getVSlideVICost(MVT VT) const; // Provide custom lowering hooks for some operations. SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp index 1879c52afed125..b9ffa08a1ecd6d 100644 --- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp +++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp @@ -54,9 +54,11 @@ RISCVTTIImpl::getRISCVInstructionCost(ArrayRef OpCodes, MVT VT, break; case RISCV::VSLIDEUP_VI: case RISCV::VSLIDEDOWN_VI: + Cost += TLI->getVSlideVICost(VT); + break; case RISCV::VSLIDEUP_VX: case RISCV::VSLIDEDOWN_VX: - Cost += TLI->getVSlideCost(VT); + Cost += TLI->getVSlideVXCost(VT); break; case RISCV::VREDMAX_VS: case RISCV::VREDMIN_VS: @@ -489,13 +491,17 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, return LT.first * getRISCVInstructionCost(RISCV::VRGATHER_VI, LT.second, CostKind); } - case TTI::SK_Splice: + case TTI::SK_Splice: { // vslidedown+vslideup. // TODO: Multiplying by LT.first implies this legalizes into multiple copies // of similar code, but I think we expand through memory. - return LT.first * - getRISCVInstructionCost({RISCV::VSLIDEDOWN_VX, RISCV::VSLIDEUP_VX}, - LT.second, CostKind); + ArrayRef Opcodes; + if (Index >= 0) + Opcodes = {RISCV::VSLIDEDOWN_VI, RISCV::VSLIDEUP_VX}; + else + Opcodes = {RISCV::VSLIDEDOWN_VX, RISCV::VSLIDEUP_VI}; + return LT.first * getRISCVInstructionCost(Opcodes, LT.second, CostKind); + } case TTI::SK_Reverse: { // TODO: Cases to improve here: // * Illegal vector types From 5edd16524ceece10094d62f974750133be1050cb Mon Sep 17 00:00:00 2001 From: ShihPo Hung Date: Tue, 26 Dec 2023 00:37:05 -0800 Subject: [PATCH 9/9] Check if Index is a 5-bit immediate --- llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp index b9ffa08a1ecd6d..e38da7e3cfd3fa 100644 --- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp +++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp @@ -496,10 +496,12 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, // TODO: Multiplying by LT.first implies this legalizes into multiple copies // of similar code, but I think we expand through memory. ArrayRef Opcodes; - if (Index >= 0) + if (Index >= 0 && Index < 32) Opcodes = {RISCV::VSLIDEDOWN_VI, RISCV::VSLIDEUP_VX}; - else + else if (Index < 0 && Index > -32) Opcodes = {RISCV::VSLIDEDOWN_VX, RISCV::VSLIDEUP_VI}; + else + Opcodes = {RISCV::VSLIDEDOWN_VX, RISCV::VSLIDEUP_VX}; return LT.first * getRISCVInstructionCost(Opcodes, LT.second, CostKind); } case TTI::SK_Reverse: {