diff --git a/llvm/lib/Target/AMDGPU/GCNSubtarget.h b/llvm/lib/Target/AMDGPU/GCNSubtarget.h index 8e1350be8b45f..f017b809dae62 100644 --- a/llvm/lib/Target/AMDGPU/GCNSubtarget.h +++ b/llvm/lib/Target/AMDGPU/GCNSubtarget.h @@ -830,6 +830,9 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo, bool hasInstPrefetch() const { return getGeneration() >= GFX10; } + // Has s_cmpk_* instructions. + bool hasSCmpK() const { return getGeneration() < GFX12; } + // Scratch is allocated in 256 dword per wave blocks for the entire // wavefront. When viewed from the perspective of an arbitrary workitem, this // is 4-byte aligned. diff --git a/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp b/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp index 856121be78031..d290dd82b7605 100644 --- a/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp +++ b/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp @@ -211,6 +211,9 @@ void SIShrinkInstructions::copyExtraImplicitOps(MachineInstr &NewMI, } void SIShrinkInstructions::shrinkScalarCompare(MachineInstr &MI) const { + if (!ST->hasSCmpK()) + return; + // cmpk instructions do scc = dst imm16, so commute the instruction to // get constants on the RHS. if (!MI.getOperand(0).isReg()) diff --git a/llvm/test/MC/AMDGPU/gfx12_unsupported.s b/llvm/test/MC/AMDGPU/gfx12_unsupported.s index e835710a69fe8..7e455d1d83a3d 100644 --- a/llvm/test/MC/AMDGPU/gfx12_unsupported.s +++ b/llvm/test/MC/AMDGPU/gfx12_unsupported.s @@ -31,6 +31,42 @@ ds_sub_gs_reg_rtn v[0:1], v2 gds ds_wrap_rtn_b32 v0, v1, v2, v3 // CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU +s_cmpk_eq_i32 s0, 0 +// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU + +s_cmpk_lg_i32 s0, 0 +// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU + +s_cmpk_gt_i32 s0, 0 +// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU + +s_cmpk_ge_i32 s0, 0 +// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU + +s_cmpk_lt_i32 s0, 0 +// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU + +s_cmpk_le_i32 s0, 0 +// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU + +s_cmpk_eq_u32 s0, 0 +// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU + +s_cmpk_lg_u32 s0, 0 +// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU + +s_cmpk_gt_u32 s0, 0 +// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU + +s_cmpk_ge_u32 s0, 0 +// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU + +s_cmpk_lt_u32 s0, 0 +// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU + +s_cmpk_le_u32 s0, 0 +// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU + ds_gws_sema_release_all gds // CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU