diff --git a/llvm/lib/CodeGen/ExpandLargeFpConvert.cpp b/llvm/lib/CodeGen/ExpandLargeFpConvert.cpp index 308f13c19f756..4ec966e56d6ee 100644 --- a/llvm/lib/CodeGen/ExpandLargeFpConvert.cpp +++ b/llvm/lib/CodeGen/ExpandLargeFpConvert.cpp @@ -175,9 +175,10 @@ static void expandFPToI(Instruction *FPToI) { // if.end: Builder.SetInsertPoint(IfEnd); Value *Add1 = Builder.CreateAdd( - And2, ConstantInt::getSigned(IntTy, -int64_t(ExponentBias + BitWidth))); - Value *Cmp3 = - Builder.CreateICmpULT(Add1, ConstantInt::getSigned(IntTy, -BitWidth)); + And2, ConstantInt::getSigned( + IntTy, -static_cast(ExponentBias + BitWidth))); + Value *Cmp3 = Builder.CreateICmpULT( + Add1, ConstantInt::getSigned(IntTy, -static_cast(BitWidth))); Builder.CreateCondBr(Cmp3, IfThen5, IfEnd9); // if.then5: @@ -203,8 +204,8 @@ static void expandFPToI(Instruction *FPToI) { // if.else: Builder.SetInsertPoint(IfElse); Value *Sub15 = Builder.CreateAdd( - And2, - ConstantInt::getSigned(IntTy, -(ExponentBias + FPMantissaWidth))); + And2, ConstantInt::getSigned( + IntTy, -static_cast(ExponentBias + FPMantissaWidth))); Value *Shl = Builder.CreateShl(Or, Sub15); Value *Mul16 = Builder.CreateMul(Shl, Sign); Builder.CreateBr(End); diff --git a/llvm/test/CodeGen/AMDGPU/fptoi.i128.ll b/llvm/test/CodeGen/AMDGPU/fptoi.i128.ll index a69418d436419..66bf0d5abb732 100644 --- a/llvm/test/CodeGen/AMDGPU/fptoi.i128.ll +++ b/llvm/test/CodeGen/AMDGPU/fptoi.i128.ll @@ -22,35 +22,31 @@ define i128 @fptosi_f64_to_i128(double %x) { ; SDAG-NEXT: v_add_co_u32_e32 v0, vcc, 0xfffffb81, v6 ; SDAG-NEXT: v_addc_co_u32_e32 v1, vcc, -1, v7, vcc ; SDAG-NEXT: v_addc_co_u32_e32 v2, vcc, -1, v7, vcc +; SDAG-NEXT: s_movk_i32 s4, 0xff7f ; SDAG-NEXT: v_addc_co_u32_e32 v3, vcc, -1, v7, vcc -; SDAG-NEXT: s_mov_b64 s[6:7], 0xffffff7f -; SDAG-NEXT: v_cmp_lt_u64_e32 vcc, s[6:7], v[0:1] -; SDAG-NEXT: v_cmp_lt_i64_e64 s[4:5], -1, v[4:5] -; SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc -; SDAG-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[2:3] -; SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc -; SDAG-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[2:3] -; SDAG-NEXT: ; implicit-def: $vgpr2_vgpr3 -; SDAG-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc -; SDAG-NEXT: v_and_b32_e32 v0, 1, v0 -; SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 1, v0 +; SDAG-NEXT: s_mov_b32 s5, -1 +; SDAG-NEXT: v_cmp_lt_u64_e64 s[4:5], s[4:5], v[0:1] +; SDAG-NEXT: v_cmp_eq_u64_e64 s[6:7], -1, v[2:3] +; SDAG-NEXT: v_cmp_lt_i64_e32 vcc, -1, v[4:5] +; SDAG-NEXT: s_and_b64 s[4:5], s[6:7], s[4:5] ; SDAG-NEXT: ; implicit-def: $vgpr0_vgpr1 -; SDAG-NEXT: s_and_saveexec_b64 s[6:7], vcc +; SDAG-NEXT: ; implicit-def: $vgpr2_vgpr3 +; SDAG-NEXT: s_and_saveexec_b64 s[6:7], s[4:5] ; SDAG-NEXT: s_xor_b64 s[10:11], exec, s[6:7] ; SDAG-NEXT: s_cbranch_execz .LBB0_7 ; SDAG-NEXT: ; %bb.2: ; %fp-to-i-if-end9 -; SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[4:5] -; SDAG-NEXT: v_add_co_u32_e32 v9, vcc, -1, v0 -; SDAG-NEXT: v_addc_co_u32_e64 v10, s[6:7], 0, -1, vcc -; SDAG-NEXT: s_mov_b64 s[6:7], 0x432 +; SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc +; SDAG-NEXT: v_add_co_u32_e64 v9, s[4:5], -1, v0 +; SDAG-NEXT: v_addc_co_u32_e64 v10, s[4:5], 0, -1, s[4:5] +; SDAG-NEXT: s_mov_b64 s[4:5], 0x432 ; SDAG-NEXT: v_and_b32_e32 v0, 0xfffff, v5 -; SDAG-NEXT: v_cmp_lt_u64_e32 vcc, s[6:7], v[6:7] -; SDAG-NEXT: v_cndmask_b32_e64 v8, -1, 0, s[4:5] -; SDAG-NEXT: v_cndmask_b32_e64 v11, -1, 1, s[4:5] +; SDAG-NEXT: v_cmp_lt_u64_e64 s[4:5], s[4:5], v[6:7] +; SDAG-NEXT: v_cndmask_b32_e64 v8, -1, 0, vcc +; SDAG-NEXT: v_cndmask_b32_e64 v11, -1, 1, vcc ; SDAG-NEXT: v_or_b32_e32 v5, 0x100000, v0 ; SDAG-NEXT: ; implicit-def: $vgpr0_vgpr1 ; SDAG-NEXT: ; implicit-def: $vgpr2_vgpr3 -; SDAG-NEXT: s_and_saveexec_b64 s[6:7], vcc +; SDAG-NEXT: s_and_saveexec_b64 s[6:7], s[4:5] ; SDAG-NEXT: s_xor_b64 s[12:13], exec, s[6:7] ; SDAG-NEXT: s_cbranch_execz .LBB0_4 ; SDAG-NEXT: ; %bb.3: ; %fp-to-i-if-else @@ -59,37 +55,37 @@ define i128 @fptosi_f64_to_i128(double %x) { ; SDAG-NEXT: v_add_u32_e32 v7, 0xfffffbcd, v6 ; SDAG-NEXT: v_lshrrev_b64 v[0:1], v0, v[4:5] ; SDAG-NEXT: v_lshlrev_b64 v[2:3], v2, v[4:5] -; SDAG-NEXT: v_cmp_gt_u32_e32 vcc, 64, v7 -; SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc +; SDAG-NEXT: v_cmp_gt_u32_e64 s[4:5], 64, v7 +; SDAG-NEXT: v_cndmask_b32_e64 v1, v3, v1, s[4:5] ; SDAG-NEXT: v_cmp_ne_u32_e64 s[6:7], 0, v7 ; SDAG-NEXT: v_cndmask_b32_e64 v6, 0, v1, s[6:7] -; SDAG-NEXT: v_cndmask_b32_e32 v2, v2, v0, vcc +; SDAG-NEXT: v_cndmask_b32_e64 v2, v2, v0, s[4:5] ; SDAG-NEXT: v_lshlrev_b64 v[0:1], v7, v[4:5] ; SDAG-NEXT: v_cndmask_b32_e64 v2, 0, v2, s[6:7] -; SDAG-NEXT: v_cndmask_b32_e32 v12, 0, v0, vcc -; SDAG-NEXT: v_cndmask_b32_e32 v7, 0, v1, vcc -; SDAG-NEXT: v_mad_u64_u32 v[0:1], s[6:7], v12, v11, 0 +; SDAG-NEXT: v_cndmask_b32_e64 v12, 0, v0, s[4:5] +; SDAG-NEXT: v_cndmask_b32_e64 v7, 0, v1, s[4:5] +; SDAG-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v12, v11, 0 ; SDAG-NEXT: v_mov_b32_e32 v3, 0 ; SDAG-NEXT: v_mul_lo_u32 v13, v8, v2 -; SDAG-NEXT: v_mad_u64_u32 v[4:5], s[6:7], v11, v2, 0 +; SDAG-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v11, v2, 0 ; SDAG-NEXT: v_mov_b32_e32 v2, v1 ; SDAG-NEXT: v_mul_lo_u32 v6, v11, v6 -; SDAG-NEXT: v_mad_u64_u32 v[1:2], s[6:7], v7, v11, v[2:3] +; SDAG-NEXT: v_mad_u64_u32 v[1:2], s[4:5], v7, v11, v[2:3] ; SDAG-NEXT: v_mul_lo_u32 v10, v10, v12 ; SDAG-NEXT: v_add3_u32 v5, v5, v6, v13 ; SDAG-NEXT: v_mov_b32_e32 v6, v2 ; SDAG-NEXT: v_mov_b32_e32 v2, v3 -; SDAG-NEXT: v_mad_u64_u32 v[1:2], s[6:7], v12, v8, v[1:2] -; SDAG-NEXT: v_mad_u64_u32 v[3:4], s[6:7], v9, v12, v[4:5] -; SDAG-NEXT: v_add_co_u32_e32 v5, vcc, v6, v2 -; SDAG-NEXT: v_addc_co_u32_e64 v6, s[6:7], 0, 0, vcc +; SDAG-NEXT: v_mad_u64_u32 v[1:2], s[4:5], v12, v8, v[1:2] +; SDAG-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v9, v12, v[4:5] +; SDAG-NEXT: v_add_co_u32_e64 v5, s[4:5], v6, v2 +; SDAG-NEXT: v_addc_co_u32_e64 v6, s[4:5], 0, 0, s[4:5] ; SDAG-NEXT: v_mul_lo_u32 v9, v9, v7 -; SDAG-NEXT: v_mad_u64_u32 v[5:6], s[6:7], v7, v8, v[5:6] +; SDAG-NEXT: v_mad_u64_u32 v[5:6], s[4:5], v7, v8, v[5:6] ; SDAG-NEXT: ; implicit-def: $vgpr11 ; SDAG-NEXT: ; implicit-def: $vgpr8 ; SDAG-NEXT: v_add3_u32 v4, v10, v4, v9 -; SDAG-NEXT: v_add_co_u32_e32 v2, vcc, v5, v3 -; SDAG-NEXT: v_addc_co_u32_e32 v3, vcc, v6, v4, vcc +; SDAG-NEXT: v_add_co_u32_e64 v2, s[4:5], v5, v3 +; SDAG-NEXT: v_addc_co_u32_e64 v3, s[4:5], v6, v4, s[4:5] ; SDAG-NEXT: ; implicit-def: $vgpr6_vgpr7 ; SDAG-NEXT: ; implicit-def: $vgpr4_vgpr5 ; SDAG-NEXT: ; implicit-def: $vgpr9 @@ -100,37 +96,37 @@ define i128 @fptosi_f64_to_i128(double %x) { ; SDAG-NEXT: ; %bb.5: ; %fp-to-i-if-then12 ; SDAG-NEXT: v_sub_u32_e32 v2, 0x433, v6 ; SDAG-NEXT: v_lshrrev_b64 v[0:1], v2, v[4:5] -; SDAG-NEXT: v_cmp_gt_u32_e32 vcc, 64, v2 +; SDAG-NEXT: v_cmp_gt_u32_e64 s[4:5], 64, v2 ; SDAG-NEXT: v_cmp_eq_u32_e64 s[6:7], 0, v2 -; SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc -; SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc +; SDAG-NEXT: v_cndmask_b32_e64 v0, 0, v0, s[4:5] +; SDAG-NEXT: v_cndmask_b32_e64 v1, 0, v1, s[4:5] ; SDAG-NEXT: v_cndmask_b32_e64 v6, v0, v4, s[6:7] ; SDAG-NEXT: v_cndmask_b32_e64 v5, v1, v5, s[6:7] -; SDAG-NEXT: v_mad_u64_u32 v[0:1], s[6:7], v6, v11, 0 +; SDAG-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v6, v11, 0 ; SDAG-NEXT: v_mov_b32_e32 v2, 0 -; SDAG-NEXT: v_mad_u64_u32 v[3:4], s[6:7], v5, v11, v[1:2] +; SDAG-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v5, v11, v[1:2] ; SDAG-NEXT: v_mov_b32_e32 v7, v4 ; SDAG-NEXT: v_mov_b32_e32 v4, v2 -; SDAG-NEXT: v_mad_u64_u32 v[1:2], s[6:7], v6, v8, v[3:4] -; SDAG-NEXT: v_add_co_u32_e32 v2, vcc, v7, v2 -; SDAG-NEXT: v_addc_co_u32_e64 v3, s[6:7], 0, 0, vcc -; SDAG-NEXT: v_mad_u64_u32 v[2:3], s[6:7], v5, v8, v[2:3] -; SDAG-NEXT: v_mad_u64_u32 v[2:3], s[6:7], v9, v6, v[2:3] -; SDAG-NEXT: v_mad_u64_u32 v[3:4], s[6:7], v10, v6, v[3:4] +; SDAG-NEXT: v_mad_u64_u32 v[1:2], s[4:5], v6, v8, v[3:4] +; SDAG-NEXT: v_add_co_u32_e64 v2, s[4:5], v7, v2 +; SDAG-NEXT: v_addc_co_u32_e64 v3, s[4:5], 0, 0, s[4:5] +; SDAG-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v5, v8, v[2:3] +; SDAG-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v9, v6, v[2:3] +; SDAG-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v10, v6, v[3:4] ; SDAG-NEXT: v_mad_i32_i24 v3, v9, v5, v3 ; SDAG-NEXT: .LBB0_6: ; %Flow1 ; SDAG-NEXT: s_or_b64 exec, exec, s[12:13] ; SDAG-NEXT: .LBB0_7: ; %Flow2 -; SDAG-NEXT: s_andn2_saveexec_b64 s[6:7], s[10:11] +; SDAG-NEXT: s_andn2_saveexec_b64 s[4:5], s[10:11] ; SDAG-NEXT: ; %bb.8: ; %fp-to-i-if-then5 ; SDAG-NEXT: v_bfrev_b32_e32 v0, 1 ; SDAG-NEXT: v_bfrev_b32_e32 v1, -2 -; SDAG-NEXT: v_cndmask_b32_e64 v2, 0, -1, s[4:5] -; SDAG-NEXT: v_cndmask_b32_e64 v3, v0, v1, s[4:5] +; SDAG-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc +; SDAG-NEXT: v_cndmask_b32_e32 v3, v0, v1, vcc ; SDAG-NEXT: v_mov_b32_e32 v0, v2 ; SDAG-NEXT: v_mov_b32_e32 v1, v2 ; SDAG-NEXT: ; %bb.9: ; %Flow3 -; SDAG-NEXT: s_or_b64 exec, exec, s[6:7] +; SDAG-NEXT: s_or_b64 exec, exec, s[4:5] ; SDAG-NEXT: .LBB0_10: ; %fp-to-i-cleanup ; SDAG-NEXT: s_or_b64 exec, exec, s[8:9] ; SDAG-NEXT: s_setpc_b64 s[30:31] @@ -158,14 +154,16 @@ define i128 @fptosi_f64_to_i128(double %x) { ; GISEL-NEXT: v_add_co_u32_e32 v0, vcc, 0xfffffb81, v6 ; GISEL-NEXT: v_mov_b32_e32 v2, 0xffffff80 ; GISEL-NEXT: v_addc_co_u32_e64 v1, s[6:7], 0, -1, vcc -; GISEL-NEXT: v_mov_b32_e32 v3, 0 +; GISEL-NEXT: v_mov_b32_e32 v3, -1 ; GISEL-NEXT: v_addc_co_u32_e64 v8, s[6:7], 0, -1, s[6:7] ; GISEL-NEXT: v_cmp_ge_u64_e32 vcc, v[0:1], v[2:3] ; GISEL-NEXT: v_addc_co_u32_e64 v9, s[6:7], 0, -1, s[6:7] ; GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc -; GISEL-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[8:9] +; GISEL-NEXT: v_cmp_le_u64_e32 vcc, -1, v[8:9] ; GISEL-NEXT: v_cmp_lt_i64_e64 s[4:5], -1, v[4:5] -; GISEL-NEXT: v_cndmask_b32_e32 v0, 1, v0, vcc +; GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc +; GISEL-NEXT: v_cmp_eq_u64_e32 vcc, -1, v[8:9] +; GISEL-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc ; GISEL-NEXT: v_and_b32_e32 v0, 1, v0 ; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 ; GISEL-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3 @@ -396,35 +394,31 @@ define i128 @fptoui_f64_to_i128(double %x) { ; SDAG-NEXT: v_add_co_u32_e32 v0, vcc, 0xfffffb81, v6 ; SDAG-NEXT: v_addc_co_u32_e32 v1, vcc, -1, v7, vcc ; SDAG-NEXT: v_addc_co_u32_e32 v2, vcc, -1, v7, vcc +; SDAG-NEXT: s_movk_i32 s4, 0xff7f ; SDAG-NEXT: v_addc_co_u32_e32 v3, vcc, -1, v7, vcc -; SDAG-NEXT: s_mov_b64 s[6:7], 0xffffff7f -; SDAG-NEXT: v_cmp_lt_u64_e32 vcc, s[6:7], v[0:1] -; SDAG-NEXT: v_cmp_lt_i64_e64 s[4:5], -1, v[4:5] -; SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc -; SDAG-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[2:3] -; SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc -; SDAG-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[2:3] -; SDAG-NEXT: ; implicit-def: $vgpr2_vgpr3 -; SDAG-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc -; SDAG-NEXT: v_and_b32_e32 v0, 1, v0 -; SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 1, v0 +; SDAG-NEXT: s_mov_b32 s5, -1 +; SDAG-NEXT: v_cmp_lt_u64_e64 s[4:5], s[4:5], v[0:1] +; SDAG-NEXT: v_cmp_eq_u64_e64 s[6:7], -1, v[2:3] +; SDAG-NEXT: v_cmp_lt_i64_e32 vcc, -1, v[4:5] +; SDAG-NEXT: s_and_b64 s[4:5], s[6:7], s[4:5] ; SDAG-NEXT: ; implicit-def: $vgpr0_vgpr1 -; SDAG-NEXT: s_and_saveexec_b64 s[6:7], vcc +; SDAG-NEXT: ; implicit-def: $vgpr2_vgpr3 +; SDAG-NEXT: s_and_saveexec_b64 s[6:7], s[4:5] ; SDAG-NEXT: s_xor_b64 s[10:11], exec, s[6:7] ; SDAG-NEXT: s_cbranch_execz .LBB1_7 ; SDAG-NEXT: ; %bb.2: ; %fp-to-i-if-end9 -; SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[4:5] -; SDAG-NEXT: v_add_co_u32_e32 v9, vcc, -1, v0 -; SDAG-NEXT: v_addc_co_u32_e64 v10, s[6:7], 0, -1, vcc -; SDAG-NEXT: s_mov_b64 s[6:7], 0x432 +; SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc +; SDAG-NEXT: v_add_co_u32_e64 v9, s[4:5], -1, v0 +; SDAG-NEXT: v_addc_co_u32_e64 v10, s[4:5], 0, -1, s[4:5] +; SDAG-NEXT: s_mov_b64 s[4:5], 0x432 ; SDAG-NEXT: v_and_b32_e32 v0, 0xfffff, v5 -; SDAG-NEXT: v_cmp_lt_u64_e32 vcc, s[6:7], v[6:7] -; SDAG-NEXT: v_cndmask_b32_e64 v8, -1, 0, s[4:5] -; SDAG-NEXT: v_cndmask_b32_e64 v11, -1, 1, s[4:5] +; SDAG-NEXT: v_cmp_lt_u64_e64 s[4:5], s[4:5], v[6:7] +; SDAG-NEXT: v_cndmask_b32_e64 v8, -1, 0, vcc +; SDAG-NEXT: v_cndmask_b32_e64 v11, -1, 1, vcc ; SDAG-NEXT: v_or_b32_e32 v5, 0x100000, v0 ; SDAG-NEXT: ; implicit-def: $vgpr0_vgpr1 ; SDAG-NEXT: ; implicit-def: $vgpr2_vgpr3 -; SDAG-NEXT: s_and_saveexec_b64 s[6:7], vcc +; SDAG-NEXT: s_and_saveexec_b64 s[6:7], s[4:5] ; SDAG-NEXT: s_xor_b64 s[12:13], exec, s[6:7] ; SDAG-NEXT: s_cbranch_execz .LBB1_4 ; SDAG-NEXT: ; %bb.3: ; %fp-to-i-if-else @@ -433,37 +427,37 @@ define i128 @fptoui_f64_to_i128(double %x) { ; SDAG-NEXT: v_add_u32_e32 v7, 0xfffffbcd, v6 ; SDAG-NEXT: v_lshrrev_b64 v[0:1], v0, v[4:5] ; SDAG-NEXT: v_lshlrev_b64 v[2:3], v2, v[4:5] -; SDAG-NEXT: v_cmp_gt_u32_e32 vcc, 64, v7 -; SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc +; SDAG-NEXT: v_cmp_gt_u32_e64 s[4:5], 64, v7 +; SDAG-NEXT: v_cndmask_b32_e64 v1, v3, v1, s[4:5] ; SDAG-NEXT: v_cmp_ne_u32_e64 s[6:7], 0, v7 ; SDAG-NEXT: v_cndmask_b32_e64 v6, 0, v1, s[6:7] -; SDAG-NEXT: v_cndmask_b32_e32 v2, v2, v0, vcc +; SDAG-NEXT: v_cndmask_b32_e64 v2, v2, v0, s[4:5] ; SDAG-NEXT: v_lshlrev_b64 v[0:1], v7, v[4:5] ; SDAG-NEXT: v_cndmask_b32_e64 v2, 0, v2, s[6:7] -; SDAG-NEXT: v_cndmask_b32_e32 v12, 0, v0, vcc -; SDAG-NEXT: v_cndmask_b32_e32 v7, 0, v1, vcc -; SDAG-NEXT: v_mad_u64_u32 v[0:1], s[6:7], v12, v11, 0 +; SDAG-NEXT: v_cndmask_b32_e64 v12, 0, v0, s[4:5] +; SDAG-NEXT: v_cndmask_b32_e64 v7, 0, v1, s[4:5] +; SDAG-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v12, v11, 0 ; SDAG-NEXT: v_mov_b32_e32 v3, 0 ; SDAG-NEXT: v_mul_lo_u32 v13, v8, v2 -; SDAG-NEXT: v_mad_u64_u32 v[4:5], s[6:7], v11, v2, 0 +; SDAG-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v11, v2, 0 ; SDAG-NEXT: v_mov_b32_e32 v2, v1 ; SDAG-NEXT: v_mul_lo_u32 v6, v11, v6 -; SDAG-NEXT: v_mad_u64_u32 v[1:2], s[6:7], v7, v11, v[2:3] +; SDAG-NEXT: v_mad_u64_u32 v[1:2], s[4:5], v7, v11, v[2:3] ; SDAG-NEXT: v_mul_lo_u32 v10, v10, v12 ; SDAG-NEXT: v_add3_u32 v5, v5, v6, v13 ; SDAG-NEXT: v_mov_b32_e32 v6, v2 ; SDAG-NEXT: v_mov_b32_e32 v2, v3 -; SDAG-NEXT: v_mad_u64_u32 v[1:2], s[6:7], v12, v8, v[1:2] -; SDAG-NEXT: v_mad_u64_u32 v[3:4], s[6:7], v9, v12, v[4:5] -; SDAG-NEXT: v_add_co_u32_e32 v5, vcc, v6, v2 -; SDAG-NEXT: v_addc_co_u32_e64 v6, s[6:7], 0, 0, vcc +; SDAG-NEXT: v_mad_u64_u32 v[1:2], s[4:5], v12, v8, v[1:2] +; SDAG-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v9, v12, v[4:5] +; SDAG-NEXT: v_add_co_u32_e64 v5, s[4:5], v6, v2 +; SDAG-NEXT: v_addc_co_u32_e64 v6, s[4:5], 0, 0, s[4:5] ; SDAG-NEXT: v_mul_lo_u32 v9, v9, v7 -; SDAG-NEXT: v_mad_u64_u32 v[5:6], s[6:7], v7, v8, v[5:6] +; SDAG-NEXT: v_mad_u64_u32 v[5:6], s[4:5], v7, v8, v[5:6] ; SDAG-NEXT: ; implicit-def: $vgpr11 ; SDAG-NEXT: ; implicit-def: $vgpr8 ; SDAG-NEXT: v_add3_u32 v4, v10, v4, v9 -; SDAG-NEXT: v_add_co_u32_e32 v2, vcc, v5, v3 -; SDAG-NEXT: v_addc_co_u32_e32 v3, vcc, v6, v4, vcc +; SDAG-NEXT: v_add_co_u32_e64 v2, s[4:5], v5, v3 +; SDAG-NEXT: v_addc_co_u32_e64 v3, s[4:5], v6, v4, s[4:5] ; SDAG-NEXT: ; implicit-def: $vgpr6_vgpr7 ; SDAG-NEXT: ; implicit-def: $vgpr4_vgpr5 ; SDAG-NEXT: ; implicit-def: $vgpr9 @@ -474,37 +468,37 @@ define i128 @fptoui_f64_to_i128(double %x) { ; SDAG-NEXT: ; %bb.5: ; %fp-to-i-if-then12 ; SDAG-NEXT: v_sub_u32_e32 v2, 0x433, v6 ; SDAG-NEXT: v_lshrrev_b64 v[0:1], v2, v[4:5] -; SDAG-NEXT: v_cmp_gt_u32_e32 vcc, 64, v2 +; SDAG-NEXT: v_cmp_gt_u32_e64 s[4:5], 64, v2 ; SDAG-NEXT: v_cmp_eq_u32_e64 s[6:7], 0, v2 -; SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc -; SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc +; SDAG-NEXT: v_cndmask_b32_e64 v0, 0, v0, s[4:5] +; SDAG-NEXT: v_cndmask_b32_e64 v1, 0, v1, s[4:5] ; SDAG-NEXT: v_cndmask_b32_e64 v6, v0, v4, s[6:7] ; SDAG-NEXT: v_cndmask_b32_e64 v5, v1, v5, s[6:7] -; SDAG-NEXT: v_mad_u64_u32 v[0:1], s[6:7], v6, v11, 0 +; SDAG-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v6, v11, 0 ; SDAG-NEXT: v_mov_b32_e32 v2, 0 -; SDAG-NEXT: v_mad_u64_u32 v[3:4], s[6:7], v5, v11, v[1:2] +; SDAG-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v5, v11, v[1:2] ; SDAG-NEXT: v_mov_b32_e32 v7, v4 ; SDAG-NEXT: v_mov_b32_e32 v4, v2 -; SDAG-NEXT: v_mad_u64_u32 v[1:2], s[6:7], v6, v8, v[3:4] -; SDAG-NEXT: v_add_co_u32_e32 v2, vcc, v7, v2 -; SDAG-NEXT: v_addc_co_u32_e64 v3, s[6:7], 0, 0, vcc -; SDAG-NEXT: v_mad_u64_u32 v[2:3], s[6:7], v5, v8, v[2:3] -; SDAG-NEXT: v_mad_u64_u32 v[2:3], s[6:7], v9, v6, v[2:3] -; SDAG-NEXT: v_mad_u64_u32 v[3:4], s[6:7], v10, v6, v[3:4] +; SDAG-NEXT: v_mad_u64_u32 v[1:2], s[4:5], v6, v8, v[3:4] +; SDAG-NEXT: v_add_co_u32_e64 v2, s[4:5], v7, v2 +; SDAG-NEXT: v_addc_co_u32_e64 v3, s[4:5], 0, 0, s[4:5] +; SDAG-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v5, v8, v[2:3] +; SDAG-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v9, v6, v[2:3] +; SDAG-NEXT: v_mad_u64_u32 v[3:4], s[4:5], v10, v6, v[3:4] ; SDAG-NEXT: v_mad_i32_i24 v3, v9, v5, v3 ; SDAG-NEXT: .LBB1_6: ; %Flow1 ; SDAG-NEXT: s_or_b64 exec, exec, s[12:13] ; SDAG-NEXT: .LBB1_7: ; %Flow2 -; SDAG-NEXT: s_andn2_saveexec_b64 s[6:7], s[10:11] +; SDAG-NEXT: s_andn2_saveexec_b64 s[4:5], s[10:11] ; SDAG-NEXT: ; %bb.8: ; %fp-to-i-if-then5 ; SDAG-NEXT: v_bfrev_b32_e32 v0, 1 ; SDAG-NEXT: v_bfrev_b32_e32 v1, -2 -; SDAG-NEXT: v_cndmask_b32_e64 v2, 0, -1, s[4:5] -; SDAG-NEXT: v_cndmask_b32_e64 v3, v0, v1, s[4:5] +; SDAG-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc +; SDAG-NEXT: v_cndmask_b32_e32 v3, v0, v1, vcc ; SDAG-NEXT: v_mov_b32_e32 v0, v2 ; SDAG-NEXT: v_mov_b32_e32 v1, v2 ; SDAG-NEXT: ; %bb.9: ; %Flow3 -; SDAG-NEXT: s_or_b64 exec, exec, s[6:7] +; SDAG-NEXT: s_or_b64 exec, exec, s[4:5] ; SDAG-NEXT: .LBB1_10: ; %fp-to-i-cleanup ; SDAG-NEXT: s_or_b64 exec, exec, s[8:9] ; SDAG-NEXT: s_setpc_b64 s[30:31] @@ -532,14 +526,16 @@ define i128 @fptoui_f64_to_i128(double %x) { ; GISEL-NEXT: v_add_co_u32_e32 v0, vcc, 0xfffffb81, v6 ; GISEL-NEXT: v_mov_b32_e32 v2, 0xffffff80 ; GISEL-NEXT: v_addc_co_u32_e64 v1, s[6:7], 0, -1, vcc -; GISEL-NEXT: v_mov_b32_e32 v3, 0 +; GISEL-NEXT: v_mov_b32_e32 v3, -1 ; GISEL-NEXT: v_addc_co_u32_e64 v8, s[6:7], 0, -1, s[6:7] ; GISEL-NEXT: v_cmp_ge_u64_e32 vcc, v[0:1], v[2:3] ; GISEL-NEXT: v_addc_co_u32_e64 v9, s[6:7], 0, -1, s[6:7] ; GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc -; GISEL-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[8:9] +; GISEL-NEXT: v_cmp_le_u64_e32 vcc, -1, v[8:9] ; GISEL-NEXT: v_cmp_lt_i64_e64 s[4:5], -1, v[4:5] -; GISEL-NEXT: v_cndmask_b32_e32 v0, 1, v0, vcc +; GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc +; GISEL-NEXT: v_cmp_eq_u64_e32 vcc, -1, v[8:9] +; GISEL-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc ; GISEL-NEXT: v_and_b32_e32 v0, 1, v0 ; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 ; GISEL-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3 @@ -769,36 +765,32 @@ define i128 @fptosi_f32_to_i128(float %x) { ; SDAG-NEXT: v_add_co_u32_e32 v0, vcc, 0xffffff01, v5 ; SDAG-NEXT: v_addc_co_u32_e32 v1, vcc, -1, v6, vcc ; SDAG-NEXT: v_addc_co_u32_e32 v2, vcc, -1, v6, vcc +; SDAG-NEXT: s_movk_i32 s4, 0xff7f ; SDAG-NEXT: v_addc_co_u32_e32 v3, vcc, -1, v6, vcc -; SDAG-NEXT: s_mov_b64 s[6:7], 0xffffff7f -; SDAG-NEXT: v_cmp_lt_u64_e32 vcc, s[6:7], v[0:1] -; SDAG-NEXT: v_cmp_lt_i32_e64 s[4:5], -1, v4 -; SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc -; SDAG-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[2:3] -; SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc -; SDAG-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[2:3] -; SDAG-NEXT: ; implicit-def: $vgpr2_vgpr3 -; SDAG-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc -; SDAG-NEXT: v_and_b32_e32 v0, 1, v0 -; SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 1, v0 +; SDAG-NEXT: s_mov_b32 s5, -1 +; SDAG-NEXT: v_cmp_lt_u64_e64 s[4:5], s[4:5], v[0:1] +; SDAG-NEXT: v_cmp_eq_u64_e64 s[6:7], -1, v[2:3] +; SDAG-NEXT: v_cmp_lt_i32_e32 vcc, -1, v4 +; SDAG-NEXT: s_and_b64 s[4:5], s[6:7], s[4:5] ; SDAG-NEXT: ; implicit-def: $vgpr0_vgpr1 -; SDAG-NEXT: s_and_saveexec_b64 s[6:7], vcc +; SDAG-NEXT: ; implicit-def: $vgpr2_vgpr3 +; SDAG-NEXT: s_and_saveexec_b64 s[6:7], s[4:5] ; SDAG-NEXT: s_xor_b64 s[10:11], exec, s[6:7] ; SDAG-NEXT: s_cbranch_execz .LBB2_7 ; SDAG-NEXT: ; %bb.2: ; %fp-to-i-if-end9 -; SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[4:5] -; SDAG-NEXT: v_add_co_u32_e32 v9, vcc, -1, v0 -; SDAG-NEXT: v_addc_co_u32_e64 v11, s[6:7], 0, -1, vcc -; SDAG-NEXT: s_mov_b64 s[6:7], 0x95 +; SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc +; SDAG-NEXT: v_add_co_u32_e64 v9, s[4:5], -1, v0 +; SDAG-NEXT: v_addc_co_u32_e64 v11, s[4:5], 0, -1, s[4:5] +; SDAG-NEXT: s_mov_b64 s[4:5], 0x95 ; SDAG-NEXT: v_and_b32_e32 v0, 0x7fffff, v4 -; SDAG-NEXT: v_cmp_lt_u64_e32 vcc, s[6:7], v[5:6] +; SDAG-NEXT: v_cmp_lt_u64_e64 s[4:5], s[4:5], v[5:6] ; SDAG-NEXT: v_mov_b32_e32 v7, 0 -; SDAG-NEXT: v_cndmask_b32_e64 v8, -1, 0, s[4:5] -; SDAG-NEXT: v_cndmask_b32_e64 v10, -1, 1, s[4:5] +; SDAG-NEXT: v_cndmask_b32_e64 v8, -1, 0, vcc +; SDAG-NEXT: v_cndmask_b32_e64 v10, -1, 1, vcc ; SDAG-NEXT: v_or_b32_e32 v6, 0x800000, v0 ; SDAG-NEXT: ; implicit-def: $vgpr0_vgpr1 ; SDAG-NEXT: ; implicit-def: $vgpr2_vgpr3 -; SDAG-NEXT: s_and_saveexec_b64 s[6:7], vcc +; SDAG-NEXT: s_and_saveexec_b64 s[6:7], s[4:5] ; SDAG-NEXT: s_xor_b64 s[12:13], exec, s[6:7] ; SDAG-NEXT: s_cbranch_execz .LBB2_4 ; SDAG-NEXT: ; %bb.3: ; %fp-to-i-if-else @@ -807,37 +799,37 @@ define i128 @fptosi_f32_to_i128(float %x) { ; SDAG-NEXT: v_add_u32_e32 v4, 0xffffff6a, v5 ; SDAG-NEXT: v_lshrrev_b64 v[0:1], v0, v[6:7] ; SDAG-NEXT: v_lshlrev_b64 v[2:3], v2, v[6:7] -; SDAG-NEXT: v_cmp_gt_u32_e32 vcc, 64, v4 -; SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc +; SDAG-NEXT: v_cmp_gt_u32_e64 s[4:5], 64, v4 +; SDAG-NEXT: v_cndmask_b32_e64 v1, v3, v1, s[4:5] ; SDAG-NEXT: v_cmp_ne_u32_e64 s[6:7], 0, v4 ; SDAG-NEXT: v_cndmask_b32_e64 v3, 0, v1, s[6:7] -; SDAG-NEXT: v_cndmask_b32_e32 v2, v2, v0, vcc +; SDAG-NEXT: v_cndmask_b32_e64 v2, v2, v0, s[4:5] ; SDAG-NEXT: v_lshlrev_b64 v[0:1], v4, v[6:7] ; SDAG-NEXT: v_cndmask_b32_e64 v2, 0, v2, s[6:7] -; SDAG-NEXT: v_cndmask_b32_e32 v13, 0, v0, vcc -; SDAG-NEXT: v_cndmask_b32_e32 v12, 0, v1, vcc -; SDAG-NEXT: v_mad_u64_u32 v[0:1], s[6:7], v13, v10, 0 +; SDAG-NEXT: v_cndmask_b32_e64 v13, 0, v0, s[4:5] +; SDAG-NEXT: v_cndmask_b32_e64 v12, 0, v1, s[4:5] +; SDAG-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v13, v10, 0 ; SDAG-NEXT: v_mul_lo_u32 v14, v8, v2 ; SDAG-NEXT: v_mul_lo_u32 v15, v10, v3 ; SDAG-NEXT: v_mov_b32_e32 v6, v1 -; SDAG-NEXT: v_mad_u64_u32 v[4:5], s[6:7], v12, v10, v[6:7] -; SDAG-NEXT: v_mad_u64_u32 v[2:3], s[6:7], v10, v2, 0 +; SDAG-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v12, v10, v[6:7] +; SDAG-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v10, v2, 0 ; SDAG-NEXT: v_mov_b32_e32 v6, v5 ; SDAG-NEXT: v_mov_b32_e32 v5, v7 -; SDAG-NEXT: v_mad_u64_u32 v[4:5], s[6:7], v13, v8, v[4:5] +; SDAG-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v13, v8, v[4:5] ; SDAG-NEXT: v_add3_u32 v3, v3, v15, v14 -; SDAG-NEXT: v_mad_u64_u32 v[1:2], s[6:7], v9, v13, v[2:3] -; SDAG-NEXT: v_add_co_u32_e32 v5, vcc, v6, v5 -; SDAG-NEXT: v_addc_co_u32_e64 v6, s[6:7], 0, 0, vcc +; SDAG-NEXT: v_mad_u64_u32 v[1:2], s[4:5], v9, v13, v[2:3] +; SDAG-NEXT: v_add_co_u32_e64 v5, s[4:5], v6, v5 +; SDAG-NEXT: v_addc_co_u32_e64 v6, s[4:5], 0, 0, s[4:5] ; SDAG-NEXT: v_mul_lo_u32 v3, v9, v12 ; SDAG-NEXT: v_mul_lo_u32 v7, v11, v13 -; SDAG-NEXT: v_mad_u64_u32 v[5:6], s[6:7], v12, v8, v[5:6] +; SDAG-NEXT: v_mad_u64_u32 v[5:6], s[4:5], v12, v8, v[5:6] ; SDAG-NEXT: ; implicit-def: $vgpr10 ; SDAG-NEXT: ; implicit-def: $vgpr8 ; SDAG-NEXT: ; implicit-def: $vgpr9 ; SDAG-NEXT: v_add3_u32 v3, v7, v2, v3 -; SDAG-NEXT: v_add_co_u32_e32 v2, vcc, v5, v1 -; SDAG-NEXT: v_addc_co_u32_e32 v3, vcc, v6, v3, vcc +; SDAG-NEXT: v_add_co_u32_e64 v2, s[4:5], v5, v1 +; SDAG-NEXT: v_addc_co_u32_e64 v3, s[4:5], v6, v3, s[4:5] ; SDAG-NEXT: ; implicit-def: $vgpr5_vgpr6 ; SDAG-NEXT: v_mov_b32_e32 v1, v4 ; SDAG-NEXT: ; implicit-def: $vgpr6_vgpr7 @@ -847,29 +839,29 @@ define i128 @fptosi_f32_to_i128(float %x) { ; SDAG-NEXT: ; %bb.5: ; %fp-to-i-if-then12 ; SDAG-NEXT: v_sub_u32_e32 v2, 0x96, v5 ; SDAG-NEXT: v_lshrrev_b64 v[0:1], v2, v[6:7] -; SDAG-NEXT: v_cmp_gt_u32_e32 vcc, 64, v2 -; SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc -; SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2 -; SDAG-NEXT: v_cndmask_b32_e32 v3, v0, v6, vcc -; SDAG-NEXT: v_mad_u64_u32 v[0:1], s[12:13], v3, v10, 0 +; SDAG-NEXT: v_cmp_gt_u32_e64 s[4:5], 64, v2 +; SDAG-NEXT: v_cndmask_b32_e64 v0, 0, v0, s[4:5] +; SDAG-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v2 +; SDAG-NEXT: v_cndmask_b32_e64 v3, v0, v6, s[4:5] +; SDAG-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v3, v10, 0 ; SDAG-NEXT: v_mov_b32_e32 v2, 0 -; SDAG-NEXT: v_mad_u64_u32 v[4:5], s[12:13], v3, v8, v[1:2] +; SDAG-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v3, v8, v[1:2] ; SDAG-NEXT: v_mov_b32_e32 v1, v5 -; SDAG-NEXT: v_mad_i64_i32 v[2:3], s[12:13], v9, v3, v[1:2] +; SDAG-NEXT: v_mad_i64_i32 v[2:3], s[4:5], v9, v3, v[1:2] ; SDAG-NEXT: v_mov_b32_e32 v1, v4 ; SDAG-NEXT: .LBB2_6: ; %Flow1 ; SDAG-NEXT: s_or_b64 exec, exec, s[6:7] ; SDAG-NEXT: .LBB2_7: ; %Flow2 -; SDAG-NEXT: s_andn2_saveexec_b64 s[6:7], s[10:11] +; SDAG-NEXT: s_andn2_saveexec_b64 s[4:5], s[10:11] ; SDAG-NEXT: ; %bb.8: ; %fp-to-i-if-then5 ; SDAG-NEXT: v_bfrev_b32_e32 v0, 1 ; SDAG-NEXT: v_bfrev_b32_e32 v1, -2 -; SDAG-NEXT: v_cndmask_b32_e64 v2, 0, -1, s[4:5] -; SDAG-NEXT: v_cndmask_b32_e64 v3, v0, v1, s[4:5] +; SDAG-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc +; SDAG-NEXT: v_cndmask_b32_e32 v3, v0, v1, vcc ; SDAG-NEXT: v_mov_b32_e32 v0, v2 ; SDAG-NEXT: v_mov_b32_e32 v1, v2 ; SDAG-NEXT: ; %bb.9: ; %Flow3 -; SDAG-NEXT: s_or_b64 exec, exec, s[6:7] +; SDAG-NEXT: s_or_b64 exec, exec, s[4:5] ; SDAG-NEXT: .LBB2_10: ; %fp-to-i-cleanup ; SDAG-NEXT: s_or_b64 exec, exec, s[8:9] ; SDAG-NEXT: s_setpc_b64 s[30:31] @@ -897,14 +889,16 @@ define i128 @fptosi_f32_to_i128(float %x) { ; GISEL-NEXT: v_add_co_u32_e32 v0, vcc, 0xffffff01, v6 ; GISEL-NEXT: v_mov_b32_e32 v2, 0xffffff80 ; GISEL-NEXT: v_addc_co_u32_e64 v1, s[6:7], 0, -1, vcc -; GISEL-NEXT: v_mov_b32_e32 v3, 0 +; GISEL-NEXT: v_mov_b32_e32 v3, -1 ; GISEL-NEXT: v_addc_co_u32_e64 v8, s[6:7], 0, -1, s[6:7] ; GISEL-NEXT: v_cmp_ge_u64_e32 vcc, v[0:1], v[2:3] ; GISEL-NEXT: v_addc_co_u32_e64 v9, s[6:7], 0, -1, s[6:7] ; GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc -; GISEL-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[8:9] +; GISEL-NEXT: v_cmp_le_u64_e32 vcc, -1, v[8:9] ; GISEL-NEXT: v_cmp_lt_i32_e64 s[4:5], -1, v4 -; GISEL-NEXT: v_cndmask_b32_e32 v0, 1, v0, vcc +; GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc +; GISEL-NEXT: v_cmp_eq_u64_e32 vcc, -1, v[8:9] +; GISEL-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc ; GISEL-NEXT: v_and_b32_e32 v0, 1, v0 ; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 ; GISEL-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3 @@ -1129,36 +1123,32 @@ define i128 @fptoui_f32_to_i128(float %x) { ; SDAG-NEXT: v_add_co_u32_e32 v0, vcc, 0xffffff01, v5 ; SDAG-NEXT: v_addc_co_u32_e32 v1, vcc, -1, v6, vcc ; SDAG-NEXT: v_addc_co_u32_e32 v2, vcc, -1, v6, vcc +; SDAG-NEXT: s_movk_i32 s4, 0xff7f ; SDAG-NEXT: v_addc_co_u32_e32 v3, vcc, -1, v6, vcc -; SDAG-NEXT: s_mov_b64 s[6:7], 0xffffff7f -; SDAG-NEXT: v_cmp_lt_u64_e32 vcc, s[6:7], v[0:1] -; SDAG-NEXT: v_cmp_lt_i32_e64 s[4:5], -1, v4 -; SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc -; SDAG-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[2:3] -; SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc -; SDAG-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[2:3] -; SDAG-NEXT: ; implicit-def: $vgpr2_vgpr3 -; SDAG-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc -; SDAG-NEXT: v_and_b32_e32 v0, 1, v0 -; SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 1, v0 +; SDAG-NEXT: s_mov_b32 s5, -1 +; SDAG-NEXT: v_cmp_lt_u64_e64 s[4:5], s[4:5], v[0:1] +; SDAG-NEXT: v_cmp_eq_u64_e64 s[6:7], -1, v[2:3] +; SDAG-NEXT: v_cmp_lt_i32_e32 vcc, -1, v4 +; SDAG-NEXT: s_and_b64 s[4:5], s[6:7], s[4:5] ; SDAG-NEXT: ; implicit-def: $vgpr0_vgpr1 -; SDAG-NEXT: s_and_saveexec_b64 s[6:7], vcc +; SDAG-NEXT: ; implicit-def: $vgpr2_vgpr3 +; SDAG-NEXT: s_and_saveexec_b64 s[6:7], s[4:5] ; SDAG-NEXT: s_xor_b64 s[10:11], exec, s[6:7] ; SDAG-NEXT: s_cbranch_execz .LBB3_7 ; SDAG-NEXT: ; %bb.2: ; %fp-to-i-if-end9 -; SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[4:5] -; SDAG-NEXT: v_add_co_u32_e32 v9, vcc, -1, v0 -; SDAG-NEXT: v_addc_co_u32_e64 v11, s[6:7], 0, -1, vcc -; SDAG-NEXT: s_mov_b64 s[6:7], 0x95 +; SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc +; SDAG-NEXT: v_add_co_u32_e64 v9, s[4:5], -1, v0 +; SDAG-NEXT: v_addc_co_u32_e64 v11, s[4:5], 0, -1, s[4:5] +; SDAG-NEXT: s_mov_b64 s[4:5], 0x95 ; SDAG-NEXT: v_and_b32_e32 v0, 0x7fffff, v4 -; SDAG-NEXT: v_cmp_lt_u64_e32 vcc, s[6:7], v[5:6] +; SDAG-NEXT: v_cmp_lt_u64_e64 s[4:5], s[4:5], v[5:6] ; SDAG-NEXT: v_mov_b32_e32 v7, 0 -; SDAG-NEXT: v_cndmask_b32_e64 v8, -1, 0, s[4:5] -; SDAG-NEXT: v_cndmask_b32_e64 v10, -1, 1, s[4:5] +; SDAG-NEXT: v_cndmask_b32_e64 v8, -1, 0, vcc +; SDAG-NEXT: v_cndmask_b32_e64 v10, -1, 1, vcc ; SDAG-NEXT: v_or_b32_e32 v6, 0x800000, v0 ; SDAG-NEXT: ; implicit-def: $vgpr0_vgpr1 ; SDAG-NEXT: ; implicit-def: $vgpr2_vgpr3 -; SDAG-NEXT: s_and_saveexec_b64 s[6:7], vcc +; SDAG-NEXT: s_and_saveexec_b64 s[6:7], s[4:5] ; SDAG-NEXT: s_xor_b64 s[12:13], exec, s[6:7] ; SDAG-NEXT: s_cbranch_execz .LBB3_4 ; SDAG-NEXT: ; %bb.3: ; %fp-to-i-if-else @@ -1167,37 +1157,37 @@ define i128 @fptoui_f32_to_i128(float %x) { ; SDAG-NEXT: v_add_u32_e32 v4, 0xffffff6a, v5 ; SDAG-NEXT: v_lshrrev_b64 v[0:1], v0, v[6:7] ; SDAG-NEXT: v_lshlrev_b64 v[2:3], v2, v[6:7] -; SDAG-NEXT: v_cmp_gt_u32_e32 vcc, 64, v4 -; SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc +; SDAG-NEXT: v_cmp_gt_u32_e64 s[4:5], 64, v4 +; SDAG-NEXT: v_cndmask_b32_e64 v1, v3, v1, s[4:5] ; SDAG-NEXT: v_cmp_ne_u32_e64 s[6:7], 0, v4 ; SDAG-NEXT: v_cndmask_b32_e64 v3, 0, v1, s[6:7] -; SDAG-NEXT: v_cndmask_b32_e32 v2, v2, v0, vcc +; SDAG-NEXT: v_cndmask_b32_e64 v2, v2, v0, s[4:5] ; SDAG-NEXT: v_lshlrev_b64 v[0:1], v4, v[6:7] ; SDAG-NEXT: v_cndmask_b32_e64 v2, 0, v2, s[6:7] -; SDAG-NEXT: v_cndmask_b32_e32 v13, 0, v0, vcc -; SDAG-NEXT: v_cndmask_b32_e32 v12, 0, v1, vcc -; SDAG-NEXT: v_mad_u64_u32 v[0:1], s[6:7], v13, v10, 0 +; SDAG-NEXT: v_cndmask_b32_e64 v13, 0, v0, s[4:5] +; SDAG-NEXT: v_cndmask_b32_e64 v12, 0, v1, s[4:5] +; SDAG-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v13, v10, 0 ; SDAG-NEXT: v_mul_lo_u32 v14, v8, v2 ; SDAG-NEXT: v_mul_lo_u32 v15, v10, v3 ; SDAG-NEXT: v_mov_b32_e32 v6, v1 -; SDAG-NEXT: v_mad_u64_u32 v[4:5], s[6:7], v12, v10, v[6:7] -; SDAG-NEXT: v_mad_u64_u32 v[2:3], s[6:7], v10, v2, 0 +; SDAG-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v12, v10, v[6:7] +; SDAG-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v10, v2, 0 ; SDAG-NEXT: v_mov_b32_e32 v6, v5 ; SDAG-NEXT: v_mov_b32_e32 v5, v7 -; SDAG-NEXT: v_mad_u64_u32 v[4:5], s[6:7], v13, v8, v[4:5] +; SDAG-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v13, v8, v[4:5] ; SDAG-NEXT: v_add3_u32 v3, v3, v15, v14 -; SDAG-NEXT: v_mad_u64_u32 v[1:2], s[6:7], v9, v13, v[2:3] -; SDAG-NEXT: v_add_co_u32_e32 v5, vcc, v6, v5 -; SDAG-NEXT: v_addc_co_u32_e64 v6, s[6:7], 0, 0, vcc +; SDAG-NEXT: v_mad_u64_u32 v[1:2], s[4:5], v9, v13, v[2:3] +; SDAG-NEXT: v_add_co_u32_e64 v5, s[4:5], v6, v5 +; SDAG-NEXT: v_addc_co_u32_e64 v6, s[4:5], 0, 0, s[4:5] ; SDAG-NEXT: v_mul_lo_u32 v3, v9, v12 ; SDAG-NEXT: v_mul_lo_u32 v7, v11, v13 -; SDAG-NEXT: v_mad_u64_u32 v[5:6], s[6:7], v12, v8, v[5:6] +; SDAG-NEXT: v_mad_u64_u32 v[5:6], s[4:5], v12, v8, v[5:6] ; SDAG-NEXT: ; implicit-def: $vgpr10 ; SDAG-NEXT: ; implicit-def: $vgpr8 ; SDAG-NEXT: ; implicit-def: $vgpr9 ; SDAG-NEXT: v_add3_u32 v3, v7, v2, v3 -; SDAG-NEXT: v_add_co_u32_e32 v2, vcc, v5, v1 -; SDAG-NEXT: v_addc_co_u32_e32 v3, vcc, v6, v3, vcc +; SDAG-NEXT: v_add_co_u32_e64 v2, s[4:5], v5, v1 +; SDAG-NEXT: v_addc_co_u32_e64 v3, s[4:5], v6, v3, s[4:5] ; SDAG-NEXT: ; implicit-def: $vgpr5_vgpr6 ; SDAG-NEXT: v_mov_b32_e32 v1, v4 ; SDAG-NEXT: ; implicit-def: $vgpr6_vgpr7 @@ -1207,29 +1197,29 @@ define i128 @fptoui_f32_to_i128(float %x) { ; SDAG-NEXT: ; %bb.5: ; %fp-to-i-if-then12 ; SDAG-NEXT: v_sub_u32_e32 v2, 0x96, v5 ; SDAG-NEXT: v_lshrrev_b64 v[0:1], v2, v[6:7] -; SDAG-NEXT: v_cmp_gt_u32_e32 vcc, 64, v2 -; SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc -; SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2 -; SDAG-NEXT: v_cndmask_b32_e32 v3, v0, v6, vcc -; SDAG-NEXT: v_mad_u64_u32 v[0:1], s[12:13], v3, v10, 0 +; SDAG-NEXT: v_cmp_gt_u32_e64 s[4:5], 64, v2 +; SDAG-NEXT: v_cndmask_b32_e64 v0, 0, v0, s[4:5] +; SDAG-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v2 +; SDAG-NEXT: v_cndmask_b32_e64 v3, v0, v6, s[4:5] +; SDAG-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v3, v10, 0 ; SDAG-NEXT: v_mov_b32_e32 v2, 0 -; SDAG-NEXT: v_mad_u64_u32 v[4:5], s[12:13], v3, v8, v[1:2] +; SDAG-NEXT: v_mad_u64_u32 v[4:5], s[4:5], v3, v8, v[1:2] ; SDAG-NEXT: v_mov_b32_e32 v1, v5 -; SDAG-NEXT: v_mad_i64_i32 v[2:3], s[12:13], v9, v3, v[1:2] +; SDAG-NEXT: v_mad_i64_i32 v[2:3], s[4:5], v9, v3, v[1:2] ; SDAG-NEXT: v_mov_b32_e32 v1, v4 ; SDAG-NEXT: .LBB3_6: ; %Flow1 ; SDAG-NEXT: s_or_b64 exec, exec, s[6:7] ; SDAG-NEXT: .LBB3_7: ; %Flow2 -; SDAG-NEXT: s_andn2_saveexec_b64 s[6:7], s[10:11] +; SDAG-NEXT: s_andn2_saveexec_b64 s[4:5], s[10:11] ; SDAG-NEXT: ; %bb.8: ; %fp-to-i-if-then5 ; SDAG-NEXT: v_bfrev_b32_e32 v0, 1 ; SDAG-NEXT: v_bfrev_b32_e32 v1, -2 -; SDAG-NEXT: v_cndmask_b32_e64 v2, 0, -1, s[4:5] -; SDAG-NEXT: v_cndmask_b32_e64 v3, v0, v1, s[4:5] +; SDAG-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc +; SDAG-NEXT: v_cndmask_b32_e32 v3, v0, v1, vcc ; SDAG-NEXT: v_mov_b32_e32 v0, v2 ; SDAG-NEXT: v_mov_b32_e32 v1, v2 ; SDAG-NEXT: ; %bb.9: ; %Flow3 -; SDAG-NEXT: s_or_b64 exec, exec, s[6:7] +; SDAG-NEXT: s_or_b64 exec, exec, s[4:5] ; SDAG-NEXT: .LBB3_10: ; %fp-to-i-cleanup ; SDAG-NEXT: s_or_b64 exec, exec, s[8:9] ; SDAG-NEXT: s_setpc_b64 s[30:31] @@ -1257,14 +1247,16 @@ define i128 @fptoui_f32_to_i128(float %x) { ; GISEL-NEXT: v_add_co_u32_e32 v0, vcc, 0xffffff01, v6 ; GISEL-NEXT: v_mov_b32_e32 v2, 0xffffff80 ; GISEL-NEXT: v_addc_co_u32_e64 v1, s[6:7], 0, -1, vcc -; GISEL-NEXT: v_mov_b32_e32 v3, 0 +; GISEL-NEXT: v_mov_b32_e32 v3, -1 ; GISEL-NEXT: v_addc_co_u32_e64 v8, s[6:7], 0, -1, s[6:7] ; GISEL-NEXT: v_cmp_ge_u64_e32 vcc, v[0:1], v[2:3] ; GISEL-NEXT: v_addc_co_u32_e64 v9, s[6:7], 0, -1, s[6:7] ; GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc -; GISEL-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[8:9] +; GISEL-NEXT: v_cmp_le_u64_e32 vcc, -1, v[8:9] ; GISEL-NEXT: v_cmp_lt_i32_e64 s[4:5], -1, v4 -; GISEL-NEXT: v_cndmask_b32_e32 v0, 1, v0, vcc +; GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc +; GISEL-NEXT: v_cmp_eq_u64_e32 vcc, -1, v[8:9] +; GISEL-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc ; GISEL-NEXT: v_and_b32_e32 v0, 1, v0 ; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 ; GISEL-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3 diff --git a/llvm/test/Transforms/ExpandLargeFpConvert/X86/expand-large-fp-convert-fptosi129.ll b/llvm/test/Transforms/ExpandLargeFpConvert/X86/expand-large-fp-convert-fptosi129.ll index 77bbd5f0bb425..75130c27f4737 100644 --- a/llvm/test/Transforms/ExpandLargeFpConvert/X86/expand-large-fp-convert-fptosi129.ll +++ b/llvm/test/Transforms/ExpandLargeFpConvert/X86/expand-large-fp-convert-fptosi129.ll @@ -27,7 +27,7 @@ define i129 @floattosi129(float %a) { ; CHECK-NEXT: br i1 [[TMP8]], label [[FP_TO_I_CLEANUP:%.*]], label [[FP_TO_I_IF_END:%.*]] ; CHECK: fp-to-i-if-end: ; CHECK-NEXT: [[TMP9:%.*]] = add i129 [[TMP5]], -256 -; CHECK-NEXT: [[TMP10:%.*]] = icmp ult i129 [[TMP9]], 4294967167 +; CHECK-NEXT: [[TMP10:%.*]] = icmp ult i129 [[TMP9]], -129 ; CHECK-NEXT: br i1 [[TMP10]], label [[FP_TO_I_IF_THEN5:%.*]], label [[FP_TO_I_IF_END9:%.*]] ; CHECK: fp-to-i-if-then5: ; CHECK-NEXT: [[TMP11:%.*]] = select i1 [[TMP2]], i129 340282366920938463463374607431768211455, i129 -340282366920938463463374607431768211456 @@ -41,7 +41,7 @@ define i129 @floattosi129(float %a) { ; CHECK-NEXT: [[TMP15:%.*]] = mul i129 [[TMP14]], [[TMP3]] ; CHECK-NEXT: br label [[FP_TO_I_CLEANUP]] ; CHECK: fp-to-i-if-else: -; CHECK-NEXT: [[TMP16:%.*]] = add i129 [[TMP5]], 4294967146 +; CHECK-NEXT: [[TMP16:%.*]] = add i129 [[TMP5]], -150 ; CHECK-NEXT: [[TMP17:%.*]] = shl i129 [[TMP7]], [[TMP16]] ; CHECK-NEXT: [[TMP18:%.*]] = mul i129 [[TMP17]], [[TMP3]] ; CHECK-NEXT: br label [[FP_TO_I_CLEANUP]] @@ -68,7 +68,7 @@ define i129 @doubletosi129(double %a) { ; CHECK-NEXT: br i1 [[TMP8]], label [[FP_TO_I_CLEANUP:%.*]], label [[FP_TO_I_IF_END:%.*]] ; CHECK: fp-to-i-if-end: ; CHECK-NEXT: [[TMP9:%.*]] = add i129 [[TMP5]], -1152 -; CHECK-NEXT: [[TMP10:%.*]] = icmp ult i129 [[TMP9]], 4294967167 +; CHECK-NEXT: [[TMP10:%.*]] = icmp ult i129 [[TMP9]], -129 ; CHECK-NEXT: br i1 [[TMP10]], label [[FP_TO_I_IF_THEN5:%.*]], label [[FP_TO_I_IF_END9:%.*]] ; CHECK: fp-to-i-if-then5: ; CHECK-NEXT: [[TMP11:%.*]] = select i1 [[TMP2]], i129 340282366920938463463374607431768211455, i129 -340282366920938463463374607431768211456 @@ -82,7 +82,7 @@ define i129 @doubletosi129(double %a) { ; CHECK-NEXT: [[TMP15:%.*]] = mul i129 [[TMP14]], [[TMP3]] ; CHECK-NEXT: br label [[FP_TO_I_CLEANUP]] ; CHECK: fp-to-i-if-else: -; CHECK-NEXT: [[TMP16:%.*]] = add i129 [[TMP5]], 4294966221 +; CHECK-NEXT: [[TMP16:%.*]] = add i129 [[TMP5]], -1075 ; CHECK-NEXT: [[TMP17:%.*]] = shl i129 [[TMP7]], [[TMP16]] ; CHECK-NEXT: [[TMP18:%.*]] = mul i129 [[TMP17]], [[TMP3]] ; CHECK-NEXT: br label [[FP_TO_I_CLEANUP]] @@ -110,7 +110,7 @@ define i129 @x86_fp80tosi129(x86_fp80 %a) { ; CHECK-NEXT: br i1 [[TMP9]], label [[FP_TO_I_CLEANUP:%.*]], label [[FP_TO_I_IF_END:%.*]] ; CHECK: fp-to-i-if-end: ; CHECK-NEXT: [[TMP10:%.*]] = add i129 [[TMP6]], -16512 -; CHECK-NEXT: [[TMP11:%.*]] = icmp ult i129 [[TMP10]], 4294967167 +; CHECK-NEXT: [[TMP11:%.*]] = icmp ult i129 [[TMP10]], -129 ; CHECK-NEXT: br i1 [[TMP11]], label [[FP_TO_I_IF_THEN5:%.*]], label [[FP_TO_I_IF_END9:%.*]] ; CHECK: fp-to-i-if-then5: ; CHECK-NEXT: [[TMP12:%.*]] = select i1 [[TMP3]], i129 340282366920938463463374607431768211455, i129 -340282366920938463463374607431768211456 @@ -124,7 +124,7 @@ define i129 @x86_fp80tosi129(x86_fp80 %a) { ; CHECK-NEXT: [[TMP16:%.*]] = mul i129 [[TMP15]], [[TMP4]] ; CHECK-NEXT: br label [[FP_TO_I_CLEANUP]] ; CHECK: fp-to-i-if-else: -; CHECK-NEXT: [[TMP17:%.*]] = add i129 [[TMP6]], 4294950801 +; CHECK-NEXT: [[TMP17:%.*]] = add i129 [[TMP6]], -16495 ; CHECK-NEXT: [[TMP18:%.*]] = shl i129 [[TMP8]], [[TMP17]] ; CHECK-NEXT: [[TMP19:%.*]] = mul i129 [[TMP18]], [[TMP4]] ; CHECK-NEXT: br label [[FP_TO_I_CLEANUP]] @@ -151,7 +151,7 @@ define i129 @fp128tosi129(fp128 %a) { ; CHECK-NEXT: br i1 [[TMP8]], label [[FP_TO_I_CLEANUP:%.*]], label [[FP_TO_I_IF_END:%.*]] ; CHECK: fp-to-i-if-end: ; CHECK-NEXT: [[TMP9:%.*]] = add i129 [[TMP5]], -16512 -; CHECK-NEXT: [[TMP10:%.*]] = icmp ult i129 [[TMP9]], 4294967167 +; CHECK-NEXT: [[TMP10:%.*]] = icmp ult i129 [[TMP9]], -129 ; CHECK-NEXT: br i1 [[TMP10]], label [[FP_TO_I_IF_THEN5:%.*]], label [[FP_TO_I_IF_END9:%.*]] ; CHECK: fp-to-i-if-then5: ; CHECK-NEXT: [[TMP11:%.*]] = select i1 [[TMP2]], i129 340282366920938463463374607431768211455, i129 -340282366920938463463374607431768211456 @@ -165,7 +165,7 @@ define i129 @fp128tosi129(fp128 %a) { ; CHECK-NEXT: [[TMP15:%.*]] = mul i129 [[TMP14]], [[TMP3]] ; CHECK-NEXT: br label [[FP_TO_I_CLEANUP]] ; CHECK: fp-to-i-if-else: -; CHECK-NEXT: [[TMP16:%.*]] = add i129 [[TMP5]], 4294950801 +; CHECK-NEXT: [[TMP16:%.*]] = add i129 [[TMP5]], -16495 ; CHECK-NEXT: [[TMP17:%.*]] = shl i129 [[TMP7]], [[TMP16]] ; CHECK-NEXT: [[TMP18:%.*]] = mul i129 [[TMP17]], [[TMP3]] ; CHECK-NEXT: br label [[FP_TO_I_CLEANUP]] diff --git a/llvm/test/Transforms/ExpandLargeFpConvert/X86/expand-large-fp-convert-fptoui129.ll b/llvm/test/Transforms/ExpandLargeFpConvert/X86/expand-large-fp-convert-fptoui129.ll index 67d9eb533a3e7..ed630d7934c3a 100644 --- a/llvm/test/Transforms/ExpandLargeFpConvert/X86/expand-large-fp-convert-fptoui129.ll +++ b/llvm/test/Transforms/ExpandLargeFpConvert/X86/expand-large-fp-convert-fptoui129.ll @@ -27,7 +27,7 @@ define i129 @floattoui129(float %a) { ; CHECK-NEXT: br i1 [[TMP8]], label [[FP_TO_I_CLEANUP:%.*]], label [[FP_TO_I_IF_END:%.*]] ; CHECK: fp-to-i-if-end: ; CHECK-NEXT: [[TMP9:%.*]] = add i129 [[TMP5]], -256 -; CHECK-NEXT: [[TMP10:%.*]] = icmp ult i129 [[TMP9]], 4294967167 +; CHECK-NEXT: [[TMP10:%.*]] = icmp ult i129 [[TMP9]], -129 ; CHECK-NEXT: br i1 [[TMP10]], label [[FP_TO_I_IF_THEN5:%.*]], label [[FP_TO_I_IF_END9:%.*]] ; CHECK: fp-to-i-if-then5: ; CHECK-NEXT: [[TMP11:%.*]] = select i1 [[TMP2]], i129 340282366920938463463374607431768211455, i129 -340282366920938463463374607431768211456 @@ -41,7 +41,7 @@ define i129 @floattoui129(float %a) { ; CHECK-NEXT: [[TMP15:%.*]] = mul i129 [[TMP14]], [[TMP3]] ; CHECK-NEXT: br label [[FP_TO_I_CLEANUP]] ; CHECK: fp-to-i-if-else: -; CHECK-NEXT: [[TMP16:%.*]] = add i129 [[TMP5]], 4294967146 +; CHECK-NEXT: [[TMP16:%.*]] = add i129 [[TMP5]], -150 ; CHECK-NEXT: [[TMP17:%.*]] = shl i129 [[TMP7]], [[TMP16]] ; CHECK-NEXT: [[TMP18:%.*]] = mul i129 [[TMP17]], [[TMP3]] ; CHECK-NEXT: br label [[FP_TO_I_CLEANUP]] @@ -68,7 +68,7 @@ define i129 @doubletoui129(double %a) { ; CHECK-NEXT: br i1 [[TMP8]], label [[FP_TO_I_CLEANUP:%.*]], label [[FP_TO_I_IF_END:%.*]] ; CHECK: fp-to-i-if-end: ; CHECK-NEXT: [[TMP9:%.*]] = add i129 [[TMP5]], -1152 -; CHECK-NEXT: [[TMP10:%.*]] = icmp ult i129 [[TMP9]], 4294967167 +; CHECK-NEXT: [[TMP10:%.*]] = icmp ult i129 [[TMP9]], -129 ; CHECK-NEXT: br i1 [[TMP10]], label [[FP_TO_I_IF_THEN5:%.*]], label [[FP_TO_I_IF_END9:%.*]] ; CHECK: fp-to-i-if-then5: ; CHECK-NEXT: [[TMP11:%.*]] = select i1 [[TMP2]], i129 340282366920938463463374607431768211455, i129 -340282366920938463463374607431768211456 @@ -82,7 +82,7 @@ define i129 @doubletoui129(double %a) { ; CHECK-NEXT: [[TMP15:%.*]] = mul i129 [[TMP14]], [[TMP3]] ; CHECK-NEXT: br label [[FP_TO_I_CLEANUP]] ; CHECK: fp-to-i-if-else: -; CHECK-NEXT: [[TMP16:%.*]] = add i129 [[TMP5]], 4294966221 +; CHECK-NEXT: [[TMP16:%.*]] = add i129 [[TMP5]], -1075 ; CHECK-NEXT: [[TMP17:%.*]] = shl i129 [[TMP7]], [[TMP16]] ; CHECK-NEXT: [[TMP18:%.*]] = mul i129 [[TMP17]], [[TMP3]] ; CHECK-NEXT: br label [[FP_TO_I_CLEANUP]] @@ -110,7 +110,7 @@ define i129 @x86_fp80toui129(x86_fp80 %a) { ; CHECK-NEXT: br i1 [[TMP9]], label [[FP_TO_I_CLEANUP:%.*]], label [[FP_TO_I_IF_END:%.*]] ; CHECK: fp-to-i-if-end: ; CHECK-NEXT: [[TMP10:%.*]] = add i129 [[TMP6]], -16512 -; CHECK-NEXT: [[TMP11:%.*]] = icmp ult i129 [[TMP10]], 4294967167 +; CHECK-NEXT: [[TMP11:%.*]] = icmp ult i129 [[TMP10]], -129 ; CHECK-NEXT: br i1 [[TMP11]], label [[FP_TO_I_IF_THEN5:%.*]], label [[FP_TO_I_IF_END9:%.*]] ; CHECK: fp-to-i-if-then5: ; CHECK-NEXT: [[TMP12:%.*]] = select i1 [[TMP3]], i129 340282366920938463463374607431768211455, i129 -340282366920938463463374607431768211456 @@ -124,7 +124,7 @@ define i129 @x86_fp80toui129(x86_fp80 %a) { ; CHECK-NEXT: [[TMP16:%.*]] = mul i129 [[TMP15]], [[TMP4]] ; CHECK-NEXT: br label [[FP_TO_I_CLEANUP]] ; CHECK: fp-to-i-if-else: -; CHECK-NEXT: [[TMP17:%.*]] = add i129 [[TMP6]], 4294950801 +; CHECK-NEXT: [[TMP17:%.*]] = add i129 [[TMP6]], -16495 ; CHECK-NEXT: [[TMP18:%.*]] = shl i129 [[TMP8]], [[TMP17]] ; CHECK-NEXT: [[TMP19:%.*]] = mul i129 [[TMP18]], [[TMP4]] ; CHECK-NEXT: br label [[FP_TO_I_CLEANUP]] @@ -151,7 +151,7 @@ define i129 @fp128toui129(fp128 %a) { ; CHECK-NEXT: br i1 [[TMP8]], label [[FP_TO_I_CLEANUP:%.*]], label [[FP_TO_I_IF_END:%.*]] ; CHECK: fp-to-i-if-end: ; CHECK-NEXT: [[TMP9:%.*]] = add i129 [[TMP5]], -16512 -; CHECK-NEXT: [[TMP10:%.*]] = icmp ult i129 [[TMP9]], 4294967167 +; CHECK-NEXT: [[TMP10:%.*]] = icmp ult i129 [[TMP9]], -129 ; CHECK-NEXT: br i1 [[TMP10]], label [[FP_TO_I_IF_THEN5:%.*]], label [[FP_TO_I_IF_END9:%.*]] ; CHECK: fp-to-i-if-then5: ; CHECK-NEXT: [[TMP11:%.*]] = select i1 [[TMP2]], i129 340282366920938463463374607431768211455, i129 -340282366920938463463374607431768211456 @@ -165,7 +165,7 @@ define i129 @fp128toui129(fp128 %a) { ; CHECK-NEXT: [[TMP15:%.*]] = mul i129 [[TMP14]], [[TMP3]] ; CHECK-NEXT: br label [[FP_TO_I_CLEANUP]] ; CHECK: fp-to-i-if-else: -; CHECK-NEXT: [[TMP16:%.*]] = add i129 [[TMP5]], 4294950801 +; CHECK-NEXT: [[TMP16:%.*]] = add i129 [[TMP5]], -16495 ; CHECK-NEXT: [[TMP17:%.*]] = shl i129 [[TMP7]], [[TMP16]] ; CHECK-NEXT: [[TMP18:%.*]] = mul i129 [[TMP17]], [[TMP3]] ; CHECK-NEXT: br label [[FP_TO_I_CLEANUP]]