diff --git a/bolt/CMakeLists.txt b/bolt/CMakeLists.txt index cc3a70fa35e0a..2e45aa79a9f88 100644 --- a/bolt/CMakeLists.txt +++ b/bolt/CMakeLists.txt @@ -1,4 +1,15 @@ -include(ExternalProject) +cmake_minimum_required(VERSION 3.20.0) + +if(NOT DEFINED LLVM_COMMON_CMAKE_UTILS) + set(LLVM_COMMON_CMAKE_UTILS ${CMAKE_CURRENT_SOURCE_DIR}/../cmake) +endif() +include(${LLVM_COMMON_CMAKE_UTILS}/Modules/CMakePolicy.cmake + NO_POLICY_SCOPE) + +if(CMAKE_SOURCE_DIR STREQUAL CMAKE_CURRENT_SOURCE_DIR) + project(bolt) + set(BOLT_BUILT_STANDALONE TRUE) +endif() set(BOLT_SOURCE_DIR ${CMAKE_CURRENT_SOURCE_DIR}) set(BOLT_BINARY_DIR ${CMAKE_CURRENT_BINARY_DIR}) @@ -7,6 +18,39 @@ set(CMAKE_CXX_STANDARD 17) # Add path for custom modules. list(INSERT CMAKE_MODULE_PATH 0 "${BOLT_SOURCE_DIR}/cmake/modules") +# standalone build, copied from clang +if(BOLT_BUILT_STANDALONE) + set(CMAKE_CXX_STANDARD 17 CACHE STRING "C++ standard to conform to") + set(CMAKE_CXX_STANDARD_REQUIRED YES) + set(CMAKE_CXX_EXTENSIONS NO) + + if(NOT MSVC_IDE) + set(LLVM_ENABLE_ASSERTIONS ${ENABLE_ASSERTIONS} + CACHE BOOL "Enable assertions") + # Assertions should follow llvm-config's. + mark_as_advanced(LLVM_ENABLE_ASSERTIONS) + endif() + + find_package(LLVM REQUIRED HINTS "${LLVM_CMAKE_DIR}") + list(APPEND CMAKE_MODULE_PATH "${LLVM_DIR}") + + set(LLVM_MAIN_SRC_DIR "${CMAKE_CURRENT_SOURCE_DIR}/../llvm" CACHE PATH "Path to LLVM source tree") + find_program(LLVM_TABLEGEN_EXE "llvm-tblgen" ${LLVM_TOOLS_BINARY_DIR} + NO_DEFAULT_PATH) + + # They are used as destination of target generators. + set(LLVM_RUNTIME_OUTPUT_INTDIR ${CMAKE_BINARY_DIR}/${CMAKE_CFG_INTDIR}/bin) + set(LLVM_LIBRARY_OUTPUT_INTDIR ${CMAKE_BINARY_DIR}/${CMAKE_CFG_INTDIR}/lib${LLVM_LIBDIR_SUFFIX}) + + include(AddLLVM) + include(TableGen) + include_directories(${LLVM_INCLUDE_DIRS}) + + set( CMAKE_RUNTIME_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR}/bin ) + set( CMAKE_LIBRARY_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR}/lib${LLVM_LIBDIR_SUFFIX} ) + set( CMAKE_ARCHIVE_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR}/lib${LLVM_LIBDIR_SUFFIX} ) +endif() # standalone + # Determine default set of targets to build -- the intersection of # those BOLT supports and those LLVM is targeting. set(BOLT_TARGETS_TO_BUILD_all "AArch64;X86;RISCV") @@ -92,6 +136,8 @@ if (BOLT_ENABLE_RUNTIME) if(CMAKE_SYSROOT) list(APPEND extra_args -DCMAKE_SYSROOT=${CMAKE_SYSROOT}) endif() + + include(ExternalProject) ExternalProject_Add(bolt_rt SOURCE_DIR "${CMAKE_CURRENT_SOURCE_DIR}/runtime" STAMP_DIR ${CMAKE_CURRENT_BINARY_DIR}/bolt_rt-stamps diff --git a/bolt/lib/Target/AArch64/CMakeLists.txt b/bolt/lib/Target/AArch64/CMakeLists.txt index be03e247aa96b..ba7be426203bd 100644 --- a/bolt/lib/Target/AArch64/CMakeLists.txt +++ b/bolt/lib/Target/AArch64/CMakeLists.txt @@ -4,6 +4,39 @@ set(LLVM_LINK_COMPONENTS AArch64Desc ) +if(BOLT_BUILT_STANDALONE) + # tablegen, copied from llvm/lib/Target/AAarch64/CMakeLists.txt + set(LLVM_TARGET_DEFINITIONS ${LLVM_MAIN_SRC_DIR}/lib/Target/AArch64/AArch64.td) + list(APPEND LLVM_TABLEGEN_FLAGS -I ${LLVM_MAIN_SRC_DIR}/lib/Target/AArch64) + tablegen(LLVM AArch64GenAsmMatcher.inc -gen-asm-matcher) + tablegen(LLVM AArch64GenAsmWriter.inc -gen-asm-writer) + tablegen(LLVM AArch64GenAsmWriter1.inc -gen-asm-writer -asmwriternum=1) + tablegen(LLVM AArch64GenCallingConv.inc -gen-callingconv) + tablegen(LLVM AArch64GenDAGISel.inc -gen-dag-isel) + tablegen(LLVM AArch64GenDisassemblerTables.inc -gen-disassembler) + tablegen(LLVM AArch64GenFastISel.inc -gen-fast-isel) + tablegen(LLVM AArch64GenGlobalISel.inc -gen-global-isel) + tablegen(LLVM AArch64GenO0PreLegalizeGICombiner.inc -gen-global-isel-combiner + -combiners="AArch64O0PreLegalizerCombiner") + tablegen(LLVM AArch64GenPreLegalizeGICombiner.inc -gen-global-isel-combiner + -combiners="AArch64PreLegalizerCombiner") + tablegen(LLVM AArch64GenPostLegalizeGICombiner.inc -gen-global-isel-combiner + -combiners="AArch64PostLegalizerCombiner") + tablegen(LLVM AArch64GenPostLegalizeGILowering.inc -gen-global-isel-combiner + -combiners="AArch64PostLegalizerLowering") + tablegen(LLVM AArch64GenInstrInfo.inc -gen-instr-info) + tablegen(LLVM AArch64GenMCCodeEmitter.inc -gen-emitter) + tablegen(LLVM AArch64GenMCPseudoLowering.inc -gen-pseudo-lowering) + tablegen(LLVM AArch64GenRegisterBank.inc -gen-register-bank) + tablegen(LLVM AArch64GenRegisterInfo.inc -gen-register-info) + tablegen(LLVM AArch64GenSubtargetInfo.inc -gen-subtarget) + tablegen(LLVM AArch64GenSystemOperands.inc -gen-searchable-tables) + tablegen(LLVM AArch64GenExegesis.inc -gen-exegesis) + + add_public_tablegen_target(AArch64CommonTableGen) + include_directories(${CMAKE_CURRENT_BINARY_DIR}) +endif() + add_llvm_library(LLVMBOLTTargetAArch64 AArch64MCPlusBuilder.cpp diff --git a/bolt/lib/Target/RISCV/CMakeLists.txt b/bolt/lib/Target/RISCV/CMakeLists.txt index 7f95576063200..6016a13a1b082 100644 --- a/bolt/lib/Target/RISCV/CMakeLists.txt +++ b/bolt/lib/Target/RISCV/CMakeLists.txt @@ -4,6 +4,37 @@ set(LLVM_LINK_COMPONENTS RISCVDesc ) +if(BOLT_BUILT_STANDALONE) + # tablegen, copied from llvm/lib/Target/RISCV/CMakeLists.txt + set(LLVM_TARGET_DEFINITIONS ${LLVM_MAIN_SRC_DIR}/lib/Target/RISCV/RISCV.td) + list(APPEND LLVM_TABLEGEN_FLAGS -I ${LLVM_MAIN_SRC_DIR}/lib/Target/RISCV) + tablegen(LLVM RISCVGenAsmMatcher.inc -gen-asm-matcher) + tablegen(LLVM RISCVGenAsmWriter.inc -gen-asm-writer) + tablegen(LLVM RISCVGenCompressInstEmitter.inc -gen-compress-inst-emitter) + tablegen(LLVM RISCVGenMacroFusion.inc -gen-macro-fusion-pred) + tablegen(LLVM RISCVGenDAGISel.inc -gen-dag-isel) + tablegen(LLVM RISCVGenDisassemblerTables.inc -gen-disassembler) + tablegen(LLVM RISCVGenInstrInfo.inc -gen-instr-info) + tablegen(LLVM RISCVGenMCCodeEmitter.inc -gen-emitter) + tablegen(LLVM RISCVGenMCPseudoLowering.inc -gen-pseudo-lowering) + tablegen(LLVM RISCVGenRegisterBank.inc -gen-register-bank) + tablegen(LLVM RISCVGenRegisterInfo.inc -gen-register-info) + tablegen(LLVM RISCVGenSearchableTables.inc -gen-searchable-tables) + tablegen(LLVM RISCVGenSubtargetInfo.inc -gen-subtarget) + + set(LLVM_TARGET_DEFINITIONS ${LLVM_MAIN_SRC_DIR}/lib/Target/RISCV/RISCVGISel.td) + tablegen(LLVM RISCVGenGlobalISel.inc -gen-global-isel) + tablegen(LLVM RISCVGenO0PreLegalizeGICombiner.inc -gen-global-isel-combiner + -combiners="RISCVO0PreLegalizerCombiner") + tablegen(LLVM RISCVGenPreLegalizeGICombiner.inc -gen-global-isel-combiner + -combiners="RISCVPreLegalizerCombiner") + tablegen(LLVM RISCVGenPostLegalizeGICombiner.inc -gen-global-isel-combiner + -combiners="RISCVPostLegalizerCombiner") + + add_public_tablegen_target(RISCVCommonTableGen) + include_directories(${CMAKE_CURRENT_BINARY_DIR}) +endif() + add_llvm_library(LLVMBOLTTargetRISCV RISCVMCPlusBuilder.cpp diff --git a/bolt/lib/Target/X86/CMakeLists.txt b/bolt/lib/Target/X86/CMakeLists.txt index 2b769bc7e7f5c..4527c45401237 100644 --- a/bolt/lib/Target/X86/CMakeLists.txt +++ b/bolt/lib/Target/X86/CMakeLists.txt @@ -5,6 +5,32 @@ set(LLVM_LINK_COMPONENTS X86Desc ) +if(BOLT_BUILT_STANDALONE) + # tablegen, copied from llvm/lib/Target/X86/CMakeLists.txt + set(LLVM_TARGET_DEFINITIONS ${LLVM_MAIN_SRC_DIR}/lib/Target/X86/X86.td) + list(APPEND LLVM_TABLEGEN_FLAGS -I ${LLVM_MAIN_SRC_DIR}/lib/Target/X86) + tablegen(LLVM X86GenAsmMatcher.inc -gen-asm-matcher) + tablegen(LLVM X86GenAsmWriter.inc -gen-asm-writer) + tablegen(LLVM X86GenAsmWriter1.inc -gen-asm-writer -asmwriternum=1) + tablegen(LLVM X86GenCallingConv.inc -gen-callingconv) + tablegen(LLVM X86GenDAGISel.inc -gen-dag-isel) + tablegen(LLVM X86GenDisassemblerTables.inc -gen-disassembler) + tablegen(LLVM X86GenCompressEVEXTables.inc -gen-x86-compress-evex-tables) + tablegen(LLVM X86GenExegesis.inc -gen-exegesis) + tablegen(LLVM X86GenFastISel.inc -gen-fast-isel) + tablegen(LLVM X86GenGlobalISel.inc -gen-global-isel) + tablegen(LLVM X86GenInstrInfo.inc -gen-instr-info + -instr-info-expand-mi-operand-info=0) + tablegen(LLVM X86GenMnemonicTables.inc -gen-x86-mnemonic-tables -asmwriternum=1) + tablegen(LLVM X86GenRegisterBank.inc -gen-register-bank) + tablegen(LLVM X86GenRegisterInfo.inc -gen-register-info) + tablegen(LLVM X86GenSubtargetInfo.inc -gen-subtarget) + tablegen(LLVM X86GenFoldTables.inc -gen-x86-fold-tables -asmwriternum=1) + + add_public_tablegen_target(X86CommonTableGen) + include_directories(${CMAKE_CURRENT_BINARY_DIR}) +endif() + add_llvm_library(LLVMBOLTTargetX86 X86MCPlusBuilder.cpp X86MCSymbolizer.cpp diff --git a/bolt/lib/Utils/CMakeLists.txt b/bolt/lib/Utils/CMakeLists.txt index d1403314274bd..79623b33f4e81 100644 --- a/bolt/lib/Utils/CMakeLists.txt +++ b/bolt/lib/Utils/CMakeLists.txt @@ -1,15 +1,43 @@ +find_first_existing_vc_file("${LLVM_MAIN_SRC_DIR}" llvm_vc) +find_first_existing_vc_file("${BOLT_SOURCE_DIR}" bolt_vc) + +# The VC revision include that we want to generate. +set(version_inc "${CMAKE_CURRENT_BINARY_DIR}/VCSVersion.inc") + +set(generate_vcs_version_script "${LLVM_CMAKE_DIR}/GenerateVersionFromVCS.cmake") + +if(llvm_vc AND LLVM_APPEND_VC_REV) + set(llvm_source_dir ${LLVM_MAIN_SRC_DIR}) +endif() + +# Create custom target to generate the VC revision include. +add_custom_command(OUTPUT "${version_inc}" + DEPENDS "${llvm_vc}" "${bolt_vc}" "${generate_vcs_version_script}" + COMMAND ${CMAKE_COMMAND} "-DNAMES=BOLT" + "-DHEADER_FILE=${version_inc}" + "-DBOLT_SOURCE_DIR=${BOLT_SOURCE_DIR}" + "-DLLVM_VC_REPOSITORY=${llvm_vc_repository}" + "-DLLVM_VC_REVISION=${llvm_vc_revision}" + "-DLLVM_FORCE_VC_REVISION=${LLVM_FORCE_VC_REVISION}" + "-DLLVM_FORCE_VC_REPOSITORY=${LLVM_FORCE_VC_REPOSITORY}" + -P "${generate_vcs_version_script}") + +# Mark the generated header as being generated. +set_source_files_properties("${version_inc}" + PROPERTIES GENERATED TRUE + HEADER_FILE_ONLY TRUE) + +include_directories(${CMAKE_CURRENT_BINARY_DIR}) + add_llvm_library(LLVMBOLTUtils CommandLineOpts.cpp Utils.cpp - + ${version_inc} DISABLE_LLVM_LINK_LLVM_DYLIB LINK_LIBS ${LLVM_PTHREAD_LIB} - DEPENDS - llvm_vcsrevision_h - LINK_COMPONENTS Support ) diff --git a/bolt/lib/Utils/CommandLineOpts.cpp b/bolt/lib/Utils/CommandLineOpts.cpp index ba296c10c00ae..fe819821a115a 100644 --- a/bolt/lib/Utils/CommandLineOpts.cpp +++ b/bolt/lib/Utils/CommandLineOpts.cpp @@ -11,7 +11,7 @@ //===----------------------------------------------------------------------===// #include "bolt/Utils/CommandLineOpts.h" -#include "llvm/Support/VCSRevision.h" +#include "VCSVersion.inc" using namespace llvm; diff --git a/bolt/runtime/CMakeLists.txt b/bolt/runtime/CMakeLists.txt index 6a65f80fb9079..fb395e481aba6 100644 --- a/bolt/runtime/CMakeLists.txt +++ b/bolt/runtime/CMakeLists.txt @@ -16,12 +16,10 @@ add_library(bolt_rt_instr STATIC instr.cpp ${CMAKE_CURRENT_BINARY_DIR}/config.h ) -set_target_properties(bolt_rt_instr PROPERTIES ARCHIVE_OUTPUT_DIRECTORY "${LLVM_LIBRARY_DIR}") add_library(bolt_rt_hugify STATIC hugify.cpp ${CMAKE_CURRENT_BINARY_DIR}/config.h ) -set_target_properties(bolt_rt_hugify PROPERTIES ARCHIVE_OUTPUT_DIRECTORY "${LLVM_LIBRARY_DIR}") set(BOLT_RT_FLAGS -ffreestanding diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.h b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.h index 3cfddb530cdf6..3fca9ef7b80dc 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.h +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.h @@ -13,7 +13,6 @@ #ifndef LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVMCTARGETDESC_H #define LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVMCTARGETDESC_H -#include "llvm/Config/config.h" #include "llvm/MC/MCTargetOptions.h" #include "llvm/Support/DataTypes.h" #include