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release/18.x: [Codegen][X86] Fix /HOTPATCH with clang-cl and inline asm (#87639) #88388

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merged 1 commit into from
Apr 15, 2024

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@llvmbot llvmbot commented Apr 11, 2024

Backport ec1af63

Requested by: @aganea

@llvmbot llvmbot added this to the LLVM 18.X Release milestone Apr 11, 2024
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llvmbot commented Apr 11, 2024

@aganea What do you think about merging this PR to the release branch?

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llvmbot commented Apr 11, 2024

@llvm/pr-subscribers-backend-x86

Author: None (llvmbot)

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Backport ec1af63

Requested by: @aganea


Full diff: https://github.com/llvm/llvm-project/pull/88388.diff

2 Files Affected:

  • (modified) llvm/lib/Target/X86/X86MCInstLower.cpp (+3-1)
  • (modified) llvm/test/CodeGen/X86/patchable-prologue.ll (+17)
diff --git a/llvm/lib/Target/X86/X86MCInstLower.cpp b/llvm/lib/Target/X86/X86MCInstLower.cpp
index 58ebe023cd61ec..7ce0aa22b99795 100644
--- a/llvm/lib/Target/X86/X86MCInstLower.cpp
+++ b/llvm/lib/Target/X86/X86MCInstLower.cpp
@@ -959,8 +959,10 @@ void X86AsmPrinter::LowerPATCHABLE_OP(const MachineInstr &MI,
   SmallString<256> Code;
   unsigned MinSize = MI.getOperand(0).getImm();
 
-  if (NextMI != MI.getParent()->end()) {
+  if (NextMI != MI.getParent()->end() && !NextMI->isInlineAsm()) {
     // Lower the next MachineInstr to find its byte size.
+    // If the next instruction is inline assembly, we skip lowering it for now,
+    // and assume we should always generate NOPs.
     MCInst MCI;
     MCIL.Lower(&*NextMI, MCI);
 
diff --git a/llvm/test/CodeGen/X86/patchable-prologue.ll b/llvm/test/CodeGen/X86/patchable-prologue.ll
index 71a392845fdea3..43761e3d1e1eb9 100644
--- a/llvm/test/CodeGen/X86/patchable-prologue.ll
+++ b/llvm/test/CodeGen/X86/patchable-prologue.ll
@@ -193,3 +193,20 @@ do.body:                                          ; preds = %do.body, %entry
 do.end:                                           ; preds = %do.body
   ret void
 }
+
+
+; Test that inline asm is properly hotpatched. We currently don't examine the
+; asm instruction when printing it, thus we always emit patching NOPs.
+
+; 64: inline_asm:
+; 64-NEXT: # %bb.0:
+; 64-NEXT: xchgw   %ax, %ax                        # encoding: [0x66,0x90]
+; 64-NEXT: #APP
+; 64-NEXT: int3                                    # encoding: [0xcc]
+; 64-NEXT: #NO_APP
+
+define dso_local void @inline_asm() "patchable-function"="prologue-short-redirect" {
+entry:
+  call void asm sideeffect "int3", "~{dirflag},~{fpsr},~{flags}"()
+  ret void
+}

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It think this should be good to go, but ideally I'd like someone else to sign off please. @phoebewang @KanRobert @sylvain-audi

@RKSimon RKSimon requested a review from phoebewang April 11, 2024 13:29
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It think this should be good to go, but ideally I'd like someone else to sign off please. @phoebewang @KanRobert @sylvain-audi

I think it's safe and good to go too.

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LGTM.

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@KanRobert KanRobert left a comment

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LGTM

This fixes an edge case where functions starting with inline assembly
would assert while trying to lower that inline asm instruction.

After this PR, for now we always add a no-op (xchgw in this case) without
considering the size of the next inline asm instruction. We might want
to revisit this in the future.

This fixes Unreal Engine 5.3.2 compilation with clang-cl and /HOTPATCH.

Should close llvm#56234

(cherry picked from commit ec1af63)
@tstellar tstellar merged commit c837970 into llvm:release/18.x Apr 15, 2024
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Hi @aganea (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix.

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6 participants