From 556c84781532d84f7b824f1abea90902b1073045 Mon Sep 17 00:00:00 2001 From: Rose Date: Tue, 7 May 2024 23:15:57 -0400 Subject: [PATCH] [InstCombine] Fix comment from #88193 (NFC) It is inaccurate and needs to be corrected. --- llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp index 8847de3667130..ba297111d945f 100644 --- a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp @@ -1259,7 +1259,7 @@ Instruction *InstCombinerImpl::visitLShr(BinaryOperator &I) { match(Op1, m_SpecificIntAllowPoison(BitWidth - 1))) return new ZExtInst(Builder.CreateIsNotNeg(X, "isnotneg"), Ty); - // ((X << nuw Z) sub nuw Y) >>u exact Z --> X sub nuw (Y >>u exact Z), + // ((X << nuw Z) sub nuw Y) >>u exact Z --> X sub nuw (Y >>u exact Z) Value *Y; if (I.isExact() && match(Op0, m_OneUse(m_NUWSub(m_NUWShl(m_Value(X), m_Specific(Op1)), @@ -1279,7 +1279,7 @@ Instruction *InstCombinerImpl::visitLShr(BinaryOperator &I) { case Instruction::And: case Instruction::Or: case Instruction::Xor: - // And does not work here, and sub is handled separately. + // Sub is handled separately. return true; } };