2525#include <drm/drmP.h>
2626#include "amdgpu.h"
2727
28- static int amdgpu_ctx_init (struct amdgpu_device * adev , struct amdgpu_ctx * ctx )
28+ static int amdgpu_ctx_init (struct amdgpu_device * adev , int priority , struct amdgpu_ctx * ctx )
2929{
3030 unsigned i , j ;
3131 int r ;
3232
33+ int pid = task_pid_nr (current );
34+
35+ if (priority < 0 || priority >= AMD_SCHED_MAX_PRIORITY )
36+ return - EINVAL ;
37+
38+ if (priority == AMD_SCHED_PRIORITY_HIGH && !capable (CAP_SYS_ADMIN ))
39+ return - EACCES ;
40+
3341 memset (ctx , 0 , sizeof (* ctx ));
3442 ctx -> adev = adev ;
3543 kref_init (& ctx -> refcount );
@@ -51,7 +59,7 @@ static int amdgpu_ctx_init(struct amdgpu_device *adev, struct amdgpu_ctx *ctx)
5159 struct amdgpu_ring * ring = adev -> rings [i ];
5260 struct amd_sched_rq * rq ;
5361
54- rq = & ring -> sched .sched_rq [AMD_SCHED_PRIORITY_NORMAL ];
62+ rq = & ring -> sched .sched_rq [priority ];
5563 r = amd_sched_entity_init (& ring -> sched , & ctx -> rings [i ].entity ,
5664 rq , amdgpu_sched_jobs );
5765 if (r )
@@ -90,11 +98,15 @@ static void amdgpu_ctx_fini(struct amdgpu_ctx *ctx)
9098
9199static int amdgpu_ctx_alloc (struct amdgpu_device * adev ,
92100 struct amdgpu_fpriv * fpriv ,
101+ int flags ,
93102 uint32_t * id )
94103{
95104 struct amdgpu_ctx_mgr * mgr = & fpriv -> ctx_mgr ;
96105 struct amdgpu_ctx * ctx ;
97- int r ;
106+ int r , priority ;
107+
108+ priority = flags & AMDGPU_CTX_FLAG_HIGHPRIORITY ?
109+ AMD_SCHED_PRIORITY_HIGH : AMD_SCHED_PRIORITY_NORMAL ;
98110
99111 ctx = kmalloc (sizeof (* ctx ), GFP_KERNEL );
100112 if (!ctx )
@@ -107,8 +119,9 @@ static int amdgpu_ctx_alloc(struct amdgpu_device *adev,
107119 kfree (ctx );
108120 return r ;
109121 }
122+
110123 * id = (uint32_t )r ;
111- r = amdgpu_ctx_init (adev , ctx );
124+ r = amdgpu_ctx_init (adev , priority , ctx );
112125 if (r ) {
113126 idr_remove (& mgr -> ctx_handles , * id );
114127 * id = 0 ;
@@ -186,18 +199,19 @@ int amdgpu_ctx_ioctl(struct drm_device *dev, void *data,
186199 struct drm_file * filp )
187200{
188201 int r ;
189- uint32_t id ;
202+ uint32_t id , flags ;
190203
191204 union drm_amdgpu_ctx * args = data ;
192205 struct amdgpu_device * adev = dev -> dev_private ;
193206 struct amdgpu_fpriv * fpriv = filp -> driver_priv ;
194207
195208 r = 0 ;
196209 id = args -> in .ctx_id ;
210+ flags = args -> in .flags ;
197211
198212 switch (args -> in .op ) {
199213 case AMDGPU_CTX_OP_ALLOC_CTX :
200- r = amdgpu_ctx_alloc (adev , fpriv , & id );
214+ r = amdgpu_ctx_alloc (adev , fpriv , flags , & id );
201215 args -> out .alloc .ctx_id = id ;
202216 break ;
203217 case AMDGPU_CTX_OP_FREE_CTX :
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