From 806074f53a5ee33be0642f64294fd02d9a78009d Mon Sep 17 00:00:00 2001 From: Greg Chadwick Date: Thu, 22 Sep 2022 20:24:17 +0100 Subject: [PATCH 1/2] [rtl] Don't take interrupts when single stepping Fixes #1814 --- rtl/ibex_controller.sv | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/rtl/ibex_controller.sv b/rtl/ibex_controller.sv index a14523a25..bb049dd38 100644 --- a/rtl/ibex_controller.sv +++ b/rtl/ibex_controller.sv @@ -401,8 +401,9 @@ module ibex_controller #( // Interrupts including NMI are ignored, // - while in debug mode, // - while in NMI mode (nested NMIs are not supported, NMI has highest priority and - // cannot be interrupted by regular interrupts). - assign handle_irq = ~debug_mode_q & ~nmi_mode_q & + // cannot be interrupted by regular interrupts), + // - while single stepping. + assign handle_irq = ~debug_mode_q & ~debug_single_step_i & ~nmi_mode_q & (irq_nm | (irq_pending_i & csr_mstatus_mie_i)); // generate ID of fast interrupts, highest priority to lowest ID From e9a72bd34642a5101c529c453af77ed3c0fb8d32 Mon Sep 17 00:00:00 2001 From: Greg Chadwick Date: Fri, 30 Sep 2022 17:45:38 +0100 Subject: [PATCH 2/2] [rtl] Ignore MIE bit in U mode --- rtl/ibex_controller.sv | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/rtl/ibex_controller.sv b/rtl/ibex_controller.sv index bb049dd38..3dcdd1f77 100644 --- a/rtl/ibex_controller.sv +++ b/rtl/ibex_controller.sv @@ -143,6 +143,7 @@ module ibex_controller #( logic enter_debug_mode_prio_q; logic enter_debug_mode; logic ebreak_into_debug; + logic irq_enabled; logic handle_irq; logic id_wb_pending; @@ -398,13 +399,16 @@ module ibex_controller #( // ibex_core) source. For internal sources the cause is specified via irq_nm_int_cause. assign irq_nm = irq_nm_ext_i | irq_nm_int; + // MIE bit only applies when in M mode + assign irq_enabled = csr_mstatus_mie_i | (priv_mode_i == PRIV_LVL_U); + // Interrupts including NMI are ignored, // - while in debug mode, // - while in NMI mode (nested NMIs are not supported, NMI has highest priority and // cannot be interrupted by regular interrupts), // - while single stepping. assign handle_irq = ~debug_mode_q & ~debug_single_step_i & ~nmi_mode_q & - (irq_nm | (irq_pending_i & csr_mstatus_mie_i)); + (irq_nm | (irq_pending_i & irq_enabled)); // generate ID of fast interrupts, highest priority to lowest ID always_comb begin : gen_mfip_id