From 670dcd7bc76e154e1b0e6455796f03a74525f328 Mon Sep 17 00:00:00 2001 From: James Wainwright Date: Tue, 4 Feb 2025 17:57:27 +0000 Subject: [PATCH 1/2] [ot] scripts/opentitan: bazel: add script to run OT Bazel tests Signed-off-by: James Wainwright --- scripts/opentitan/run-bazel-tests.sh | 123 ++++++++++++++++ scripts/opentitan/tests-flaky.txt | 5 + scripts/opentitan/tests-passing.txt | 200 +++++++++++++++++++++++++++ 3 files changed, 328 insertions(+) create mode 100755 scripts/opentitan/run-bazel-tests.sh create mode 100644 scripts/opentitan/tests-flaky.txt create mode 100644 scripts/opentitan/tests-passing.txt diff --git a/scripts/opentitan/run-bazel-tests.sh b/scripts/opentitan/run-bazel-tests.sh new file mode 100755 index 0000000000000..db20b6815e500 --- /dev/null +++ b/scripts/opentitan/run-bazel-tests.sh @@ -0,0 +1,123 @@ +#!/usr/bin/env sh +# Copyright (c) 2025 lowRISC contributors. + +set -e + +# This script will run all QEMU tests in the provided OpenTitan repository, +# comparing the results with a list of expected passes. +# +# USAGE: run-bazel-tests.sh path/to/opentitan/repo path/to/qemu/repo +# +# There are two companion files in this directory read by this script: +# +# * `tests-passing.txt` +# * `tests-flaky.txt` +# +# The idea is to keep the list of passing tests up to date as QEMU changes. +# +# * If a test starts passing, add it to `tests-passing.txt` to catch +# regressions. +# * When a test starts failing, investigate why and fix it, or remove it +# from the `tests-passing.txt` list if necessary. +# +# Tests which are "flaky" and may pass/fail randomly will still be run, +# but can be recorded below to prevent them from being checked. + +# CLI arguments: +opentitan_path="$1" +qemu_path="$2" +if [ ! -d "$opentitan_path" ] || [ ! -d "$qemu_path" ]; then + echo "USAGE: ${0} " + exit 1 +fi +opentitan_path="$(realpath "$opentitan_path")" +qemu_path="$(realpath "$qemu_path")" + +# Lists of passing and flaky OpenTitan tests: +passing_tests_path="${qemu_path}/scripts/opentitan/tests-passing.txt" +flaky_tests_path="${qemu_path}/scripts/opentitan/tests-flaky.txt" + +# Check the test lists are sorted: +if ! sort --check "$passing_tests_path" || ! sort --check "$flaky_tests_path"; then + echo >&2 "ERROR: test lists must be sorted!" + exit 1 +fi + +# Ensure QEMU has already been built in `./build`: +if [ ! -x "${qemu_path}/build/qemu-system-riscv32" ]; then + echo >&2 "ERROR: expected QEMU binary at '${qemu_path}/build/qemu-system-riscv32'" + exit 1 +fi + +# Temporary files used by this script: +results="$(mktemp)" +flaky="$(mktemp)" +expected="$(mktemp)" +all_passed="$(mktemp)" +passed="$(mktemp)" +cleanup() { + rm -f "${qemu_path}/REPO.bazel" "${qemu_path}/BUILD" + rm -f "$results" "$flaky" "$expected" "$all_passed" "$passed" +} +trap "cleanup" EXIT + +## Add temporary `REPO.bazel` and `BUILD` files from Bazel: +touch "${qemu_path}/REPO.bazel" +ln -s \ + "${opentitan_path}/third_party/qemu/BUILD.qemu_opentitan.bazel" \ + "${qemu_path}/BUILD" + +## RUN BAZEL TESTS +cd "$opentitan_path" >/dev/null + +./bazelisk.sh test //... \ + --test_tag_filters="qemu" \ + --test_summary="short" \ + --test_output=all \ + --override_repository="+qemu+qemu_opentitan=${qemu_path}" \ + --build_tests_only \ + | tee "$results" + +## COMPARE RESULTS + +# Write the flaky test list to a flat file: +printf "%s\n" "$flaky_tests_path" | sort > "$flaky" + +# Load the list of passing tests and strip flaky tests: +comm -23 "$passing_tests_path" "$flaky" > "$expected" + +# Find all the tests which passed in Bazel: +grep "PASSED" "$results" | cut -d' ' -f1 | sort > "$all_passed" + +# Filter out the flaky tests: +comm -23 "$all_passed" "$flaky" > "$passed" + +## REPORT MISMATCHES + +unexpected_failures="$(comm -13 "$passed" "$expected")" +unexpected_passes="$(comm -23 "$passed" "$expected")" + +status=0 + +if [ -n "$unexpected_failures" ]; then + echo >&2 + echo >&2 Tests that we expected to pass which did NOT pass: + echo "$unexpected_failures" | awk '$0=" "$0' >&2 + status=1 +fi + +if [ -n "$unexpected_passes" ]; then + echo >&2 + echo >&2 Tests which passed but we did NOT expect them to pass: + echo "$unexpected_passes" | awk '$0=" "$0' >&2 + status=1 +fi + +# Print helpful errors in CI. +if [ $status -ne 0 ] && [ -n "$CI" ]; then + echo >&2 + echo >&2 "::error::Bazel test results did not match the list of expected passing tests." + echo >&2 "::error::Consider fixing the tests or updating the test list in ${0}." +fi + +exit $status diff --git a/scripts/opentitan/tests-flaky.txt b/scripts/opentitan/tests-flaky.txt new file mode 100644 index 0000000000000..50bbbefb17a35 --- /dev/null +++ b/scripts/opentitan/tests-flaky.txt @@ -0,0 +1,5 @@ +//sw/device/silicon_creator/lib/ownership:owner_verify_functest_sim_qemu_rom_with_fake_keys +//sw/device/silicon_creator/lib/sigverify:mod_exp_ibex_functest_hardcoded_sim_qemu_rom_with_fake_keys +//sw/device/tests/autogen:alert_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:edn_auto_mode_sim_qemu_rom_with_fake_keys +//sw/device/tests:rv_core_ibex_rnd_test_sim_qemu_rom_with_fake_keys diff --git a/scripts/opentitan/tests-passing.txt b/scripts/opentitan/tests-passing.txt new file mode 100644 index 0000000000000..6bcbb8df40cd7 --- /dev/null +++ b/scripts/opentitan/tests-passing.txt @@ -0,0 +1,200 @@ +//sw/device/lib/base:crc32_functest_sim_qemu_rom_with_fake_keys +//sw/device/lib/base:crc32_perftest_sim_qemu_rom_with_fake_keys +//sw/device/lib/base:hardened_functest_sim_qemu_rom_with_fake_keys +//sw/device/lib/crypto/drivers:aes_test_sim_qemu_rom_with_fake_keys +//sw/device/lib/crypto/drivers:entropy_test_sim_qemu_rom_with_fake_keys +//sw/device/lib/crypto/drivers:rv_core_ibex_test_sim_qemu_rom_with_fake_keys +//sw/device/silicon_creator/lib/drivers:hmac_functest_sim_qemu_rom_with_fake_keys +//sw/device/silicon_creator/lib/drivers:kmac_functest_sim_qemu_rom_with_fake_keys +//sw/device/silicon_creator/lib/drivers:retention_sram_functest_sim_qemu_rom_with_fake_keys +//sw/device/silicon_creator/lib/drivers:rnd_functest_sim_qemu_rom_with_fake_keys +//sw/device/silicon_creator/lib/drivers:rstmgr_functest_sim_qemu_rom_with_fake_keys +//sw/device/silicon_creator/lib/drivers:uart_functest_sim_qemu_rom_with_fake_keys +//sw/device/silicon_creator/lib/ownership:owner_verify_functest_sim_qemu_rom_with_fake_keys +//sw/device/silicon_creator/lib/sigverify/sphincsplus/test:fors_test_sim_qemu_rom_with_fake_keys +//sw/device/silicon_creator/lib/sigverify/sphincsplus/test:mgf1_test_sim_qemu_rom_with_fake_keys +//sw/device/silicon_creator/lib/sigverify/sphincsplus/test:thash_test_sim_qemu_rom_with_fake_keys +//sw/device/silicon_creator/lib/sigverify/sphincsplus/test:verify_test_hardcoded_sim_qemu_rom_with_fake_keys +//sw/device/silicon_creator/lib/sigverify/sphincsplus/test:verify_test_kat0_sim_qemu_rom_with_fake_keys +//sw/device/silicon_creator/lib/sigverify/sphincsplus/test:verify_test_kat1_sim_qemu_rom_with_fake_keys +//sw/device/silicon_creator/lib/sigverify/sphincsplus/test:verify_test_kat2_sim_qemu_rom_with_fake_keys +//sw/device/silicon_creator/lib/sigverify/sphincsplus/test:verify_test_kat3_sim_qemu_rom_with_fake_keys +//sw/device/silicon_creator/lib/sigverify/sphincsplus/test:verify_test_kat4_sim_qemu_rom_with_fake_keys +//sw/device/silicon_creator/lib/sigverify/sphincsplus/test:verify_test_kat5_sim_qemu_rom_with_fake_keys +//sw/device/silicon_creator/lib/sigverify/sphincsplus/test:verify_test_kat6_sim_qemu_rom_with_fake_keys +//sw/device/silicon_creator/lib/sigverify/sphincsplus/test:verify_test_kat7_sim_qemu_rom_with_fake_keys +//sw/device/silicon_creator/lib/sigverify/sphincsplus/test:verify_test_kat8_sim_qemu_rom_with_fake_keys +//sw/device/silicon_creator/lib/sigverify/sphincsplus/test:verify_test_kat9_sim_qemu_rom_with_fake_keys +//sw/device/silicon_creator/lib/sigverify/sphincsplus/test:wots_test_sim_qemu_rom_with_fake_keys +//sw/device/silicon_creator/lib/sigverify:ecdsa_p256_verify_functest_sim_qemu_rom_with_fake_keys +//sw/device/silicon_creator/lib/sigverify:rsa_verify_functest_sim_qemu_rom_with_fake_keys +//sw/device/silicon_creator/lib/sigverify:sigverify_dynamic_functest_hardcoded_sim_qemu_rom_with_fake_keys +//sw/device/silicon_creator/lib/sigverify:sigverify_dynamic_functest_wycheproof_sim_qemu_rom_with_fake_keys +//sw/device/silicon_creator/lib/sigverify:spx_verify_functest_sim_qemu_rom_with_fake_keys +//sw/device/tests/crypto:aes_functest_sim_qemu_rom_with_fake_keys +//sw/device/tests/crypto:aes_gcm_functest_sim_qemu_rom_with_fake_keys +//sw/device/tests/crypto:aes_kwp_functest_sim_qemu_rom_with_fake_keys +//sw/device/tests/crypto:aes_kwp_kat_functest_sim_qemu_rom_with_fake_keys +//sw/device/tests/crypto:drbg_functest_sim_qemu_rom_with_fake_keys +//sw/device/tests/crypto:ecdh_p256_functest_sim_qemu_rom_with_fake_keys +//sw/device/tests/crypto:ecdh_p384_functest_sim_qemu_rom_with_fake_keys +//sw/device/tests/crypto:ecdsa_p256_verify_functest_hardcoded_sim_qemu_rom_with_fake_keys +//sw/device/tests/crypto:hkdf_functest_sim_qemu_rom_with_fake_keys +//sw/device/tests/crypto:hmac_functest_sim_qemu_rom_with_fake_keys +//sw/device/tests/crypto:hmac_multistream_functest_sim_qemu_rom_with_fake_keys +//sw/device/tests/crypto:hmac_sha256_functest_sim_qemu_rom_with_fake_keys +//sw/device/tests/crypto:hmac_sha384_functest_sim_qemu_rom_with_fake_keys +//sw/device/tests/crypto:hmac_sha512_functest_sim_qemu_rom_with_fake_keys +//sw/device/tests/crypto:kdf_hmac_ctr_functest_sim_qemu_rom_with_fake_keys +//sw/device/tests/crypto:kdf_kmac_functest_sim_qemu_rom_with_fake_keys +//sw/device/tests/crypto:kmac_functest_hardcoded_sim_qemu_rom_with_fake_keys +//sw/device/tests/crypto:rsa_2048_encryption_functest_sim_qemu_rom_with_fake_keys +//sw/device/tests/crypto:rsa_2048_key_from_cofactor_functest_sim_qemu_rom_with_fake_keys +//sw/device/tests/crypto:rsa_2048_signature_functest_sim_qemu_rom_with_fake_keys +//sw/device/tests/crypto:rsa_3072_encryption_functest_sim_qemu_rom_with_fake_keys +//sw/device/tests/crypto:rsa_3072_signature_functest_sim_qemu_rom_with_fake_keys +//sw/device/tests/crypto:rsa_3072_verify_functest_hardcoded_sim_qemu_rom_with_fake_keys +//sw/device/tests/crypto:rsa_4096_encryption_functest_sim_qemu_rom_with_fake_keys +//sw/device/tests/crypto:rsa_4096_signature_functest_sim_qemu_rom_with_fake_keys +//sw/device/tests/crypto:sha256_functest_sim_qemu_rom_with_fake_keys +//sw/device/tests/crypto:sha384_functest_sim_qemu_rom_with_fake_keys +//sw/device/tests/crypto:sha512_functest_sim_qemu_rom_with_fake_keys +//sw/device/tests/crypto:symmetric_keygen_functest_sim_qemu_rom_with_fake_keys +//sw/device/tests:aes_entropy_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:aes_idle_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:aes_smoketest_sim_qemu_rom_with_fake_keys +//sw/device/tests:alert_handler_lpg_clkoff_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:alert_handler_lpg_reset_toggle_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:alert_handler_ping_ok_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:aon_timer_irq_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:clkmgr_jitter_frequency_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:clkmgr_jitter_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:clkmgr_off_aes_trans_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:clkmgr_off_hmac_trans_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:clkmgr_off_kmac_trans_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:clkmgr_off_otbn_trans_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:clkmgr_smoketest_sim_qemu_rom_with_fake_keys +//sw/device/tests:coverage_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:crt_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:csrng_kat_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:csrng_smoketest_sim_qemu_rom_with_fake_keys +//sw/device/tests:edn_sw_mode_sim_qemu_rom_with_fake_keys +//sw/device/tests:entropy_src_fw_ovr_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:entropy_src_kat_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:example_concurrency_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:example_test_from_flash_sim_qemu_rom_with_fake_keys +//sw/device/tests:flash_ctrl_clock_freqs_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:flash_ctrl_ops_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:flash_ctrl_write_clear_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:hmac_enc_idle_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:hmac_enc_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:hmac_secure_wipe_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:hmac_smoketest_sim_qemu_rom_with_fake_keys +//sw/device/tests:kmac_endianess_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:kmac_mode_cshake_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:kmac_mode_kmac_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:kmac_smoketest_sim_qemu_rom_with_fake_keys +//sw/device/tests:otbn_ecdsa_op_irq_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:otbn_isa_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:otbn_randomness_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:otbn_rsa_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:plic_sw_irq_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:pmp_smoketest_napot_sim_qemu_rom_with_fake_keys +//sw/device/tests:pmp_smoketest_tor_sim_qemu_rom_with_fake_keys +//sw/device/tests:pwrmgr_lowpower_cancel_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:pwrmgr_sleep_disabled_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:pwrmgr_wdog_reset_reqs_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:rom_exit_immediately_sim_qemu_base +//sw/device/tests:rstmgr_smoketest_sim_qemu_rom_with_fake_keys +//sw/device/tests:rstmgr_sw_req_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:rv_core_ibex_mem_test_prod_sim_qemu_rom_with_fake_keys +//sw/device/tests:rv_timer_smoketest_sim_qemu_rom_with_fake_keys +//sw/device/tests:spi_host_irq_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:sram_ctrl_memset_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:sram_ctrl_readback_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:sram_ctrl_smoketest_sim_qemu_rom_with_fake_keys +//sw/device/tests:sram_ctrl_subword_access_test_sim_qemu_rom_with_fake_keys +//sw/device/tests:uart_smoketest_sim_qemu_rom_with_fake_keys +//sw/device/tests:usbdev_mem_test_sim_qemu_rom_with_fake_keys +//third_party/coremark/top_earlgrey:coremark_test_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:C-ADDI16SP_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:C-ADDI4SPN_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:C-ADDI_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:C-ADD_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:C-ANDI_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:C-AND_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:C-BEQZ_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:C-BNEZ_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:C-JALR_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:C-JAL_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:C-JR_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:C-J_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:C-LI_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:C-LUI_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:C-LWSP_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:C-LW_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:C-MV_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:C-OR_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:C-SLLI_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:C-SRAI_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:C-SRLI_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:C-SUB_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:C-SWSP_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:C-SW_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:C-XOR_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:DIVU_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:DIV_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-ADD-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-ADDI-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-AND-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-ANDI-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-AUIPC-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-BEQ-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-BGE-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-BGEU-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-BLT-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-BLTU-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-BNE-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-CSRRC-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-CSRRCI-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-CSRRS-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-CSRRSI-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-CSRRW-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-CSRRWI-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-DELAY_SLOTS-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-ENDIANESS-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-IO-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-JAL-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-JALR-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-LB-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-LBU-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-LH-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-LHU-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-LUI-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-LW-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-OR-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-ORI-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-RF_size-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-RF_width-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-SB-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-SH-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-SLL-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-SLLI-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-SLT-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-SLTI-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-SLTIU-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-SLTU-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-SRA-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-SRAI-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-SRL-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-SRLI-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-SUB-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-SW-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-XOR-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:I-XORI-01_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:MULHSU_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:MULHU_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:MULH_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:MUL_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:REMU_sim_qemu_rom_with_fake_keys +//third_party/riscv-compliance:REM_sim_qemu_rom_with_fake_keys From e26c9fc782bfbe05f4e5abdf6bf833db4b366aab Mon Sep 17 00:00:00 2001 From: James Wainwright Date: Wed, 5 Feb 2025 15:54:16 +0000 Subject: [PATCH 2/2] [ot] .github/workflows: opentitan_regression: add OT Bazel to CI Signed-off-by: James Wainwright --- .github/workflows/opentitan_regression.yaml | 60 +++++++++++++++++++++ 1 file changed, 60 insertions(+) create mode 100644 .github/workflows/opentitan_regression.yaml diff --git a/.github/workflows/opentitan_regression.yaml b/.github/workflows/opentitan_regression.yaml new file mode 100644 index 0000000000000..4092242009685 --- /dev/null +++ b/.github/workflows/opentitan_regression.yaml @@ -0,0 +1,60 @@ +#------------------------------------------------------------------------------ +# OpenTitan regression runner +# +# Copyright (c) 2025 lowRISC CIC +# SPDX-License-Identifier: Apache License 2.0 +#------------------------------------------------------------------------------ + +name: OpenTitan Regression +on: + pull_request: + workflow_dispatch: + inputs: + opentitan_ref: + description: Branch, tag, or commit ref from OpenTitan to test + required: true + default: earlgrey_1.0.0 + type: string + +jobs: + earlgrey: + name: Earlgrey + runs-on: ubuntu-22.04 + steps: + - name: Checkout OpenTitan + uses: actions/checkout@v5 + with: + repository: lowRISC/opentitan + ref: ${{ inputs.opentitan_ref || 'earlgrey_1.0.0' }} + + - name: Prepare OpenTitan environment + uses: ./.github/actions/prepare-env + + - name: Checkout QEMU + uses: actions/checkout@v5 + with: + path: qemu + + - name: Build QEMU + working-directory: qemu + run: | + ./configure \ + --target-list=riscv32-softmmu \ + --without-default-features \ + --enable-tcg \ + --disable-tools \ + --enable-trace-backends=log + + ninja -C build qemu-system-riscv32 + + - name: Run OpenTitan regressions + run: | + ./qemu/scripts/opentitan/run-bazel-tests.sh ./ qemu \ + | tee test_results.txt + + - name: Upload Bazel test results + if: always() + uses: actions/upload-artifact@v4 + with: + name: bazel-test-results + path: test_results.txt